ASoC: msm: Disable 100 KHz level shifter when not in use.
When 100KHz level shifter is enabled this is causing an i2c
Failures for the tuner chips sitting on the same bus, to avoid this
Errors the spdif 100KHz level shifter should be disabled when
The i2c read / write of cs8427 chip is not in use.
How 100KHz disabled is, as and when the driver tries to do I2C
Write / Read Level shifter is enabled and disabled after i2c
Read / Write is done, This is done for every read / write i2c
Transfers on cs8427 chip, though it adds and over head of enabling
And disabling level shifter every time, this is the only better way
To address this.
CRs-Fixed: 390239
Change-Id: Ifedaa86a2a7f7487073fff9e2b10263afc19be58
Signed-off-by: Santosh Mardi <gsantosh@codeaurora.org>
diff --git a/sound/soc/codecs/cs8427.c b/sound/soc/codecs/cs8427.c
index dc7f23b..23870a4 100644
--- a/sound/soc/codecs/cs8427.c
+++ b/sound/soc/codecs/cs8427.c
@@ -103,8 +103,37 @@
static int cs8427_i2c_write(struct cs8427 *chip, unsigned short reg,
int bytes, void *src)
{
- return cs8427_i2c_write_device(chip, reg, src, bytes);
+ int ret = 0, err = 0;
+ struct cs8427_platform_data *pdata = chip->client->dev.platform_data;
+ /*
+ * enable the 100KHz level shifter to communicate
+ * with CS8427 chip
+ */
+ if (pdata->enable) {
+ err = pdata->enable(1);
+ if (err < 0) {
+ dev_err(&chip->client->dev,
+ "failed to enable the level shifter\n");
+ return err;
+ }
+ }
+ ret = cs8427_i2c_write_device(chip, reg, src, bytes);
+
+ /*
+ * Disable the 100KHz level shifter to communicate
+ * with CS8427 chip
+ */
+ if (pdata->enable) {
+ err = pdata->enable(0);
+ if (err < 0) {
+ dev_err(&chip->client->dev,
+ "failed to disable the level shifter\n");
+ return err;
+ }
+ }
+ return ret;
}
+
static int cs8427_i2c_read_device(struct cs8427 *cs8427_i2c,
unsigned short reg,
int bytes, unsigned char *dest)
@@ -156,16 +185,45 @@
unsigned short reg,
int bytes, void *dest)
{
- return cs8427_i2c_read_device(chip, reg,
+ u32 err = 0, ret = 0;
+ struct cs8427_platform_data *pdata = chip->client->dev.platform_data;
+ /*
+ * enable the 100KHz level shifter to communicate
+ * with CS8427 chip
+ */
+ if (pdata->enable) {
+ err = pdata->enable(1);
+ if (err < 0) {
+ dev_err(&chip->client->dev,
+ "failed to enable the level shifter\n");
+ return err;
+ }
+ }
+ ret = cs8427_i2c_read_device(chip, reg,
bytes, dest);
+
+ /*
+ * Disable the 100KHz level shifter to communicate
+ * with CS8427 chip
+ */
+ if (pdata->enable) {
+ err = pdata->enable(0);
+ if (err < 0) {
+ dev_err(&chip->client->dev,
+ "failed to disable the level shifter\n");
+ return err;
+ }
+ }
+ return ret;
}
static int cs8427_i2c_sendbytes(struct cs8427 *chip,
char *reg_addr, char *data,
int bytes)
{
- u32 ret = 0;
+ u32 ret = 0, err = 0;
u8 i = 0;
+ struct cs8427_platform_data *pdata = chip->client->dev.platform_data;
if (!chip) {
pr_err("%s, invalid device info\n", __func__);
@@ -176,6 +234,18 @@
"invalid data pointer\n", __func__);
return -EINVAL;
}
+ /*
+ * enable the 100KHz level shifter to communicate
+ * with CS8427 chip
+ */
+ if (pdata->enable) {
+ err = pdata->enable(1);
+ if (err < 0) {
+ dev_err(&chip->client->dev,
+ "failed to enable the level shifter\n");
+ return err;
+ }
+ }
for (i = 0; i < bytes; i++) {
ret = cs8427_i2c_write_device(chip, (*reg_addr + i),
&data[i], 1);
@@ -186,6 +256,19 @@
break;
}
}
+
+ /*
+ * Disable the 100KHz level shifter to communicate
+ * with CS8427 chip
+ */
+ if (pdata->enable) {
+ err = pdata->enable(0);
+ if (err < 0) {
+ dev_err(&chip->client->dev,
+ "failed to disable the level shifter\n");
+ return err;
+ }
+ }
return i;
}
@@ -651,16 +734,6 @@
struct cs8427_platform_data *pdata = chip->client->dev.platform_data;
int ret = 0;
- /*enable the 100KHz level shifter*/
- if (pdata->enable) {
- ret = pdata->enable(1);
- if (ret < 0) {
- dev_err(&chip->client->dev,
- "failed to enable the level shifter\n");
- return ret;
- }
- }
-
ret = gpio_request(pdata->reset_gpio, "cs8427 reset");
if (ret < 0) {
dev_err(&chip->client->dev,