| commit | 38cf189fa13e988f85efb6de26315e762cecc260 | [log] [tgz] |
|---|---|---|
| author | Francisco Jerez <currojerez@riseup.net> | Sat Nov 20 14:43:51 2010 +0100 |
| committer | Francisco Jerez <currojerez@riseup.net> | Wed Dec 08 03:00:20 2010 +0100 |
| tree | 3f2572b44a4d2d56632fcc3f59e85dfc356acac1 | |
| parent | ca130c2267d0719c92ed188e15082d6baad6c046 [diff] |
drm/nv04-nv10: Don't re-enable FIFO access multiple times after IRQ dispatch. nvxx_graph_isr is already taking care of it. In some cases this could've made you miss PGRAPH interrupts (e.g. when you were supposed to get several IRQs of the same kind in a row). Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>