[POWERPC] Simplify the code defining the 64-bit CPU features

Signed-off-by: Paul Mackerras <paulus@samba.org>
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index fab41c2..1ba3c99 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -117,38 +117,30 @@
 #define CPU_FTR_PPC_LE			ASM_CONST(0x0000000000200000)
 #define CPU_FTR_REAL_LE			ASM_CONST(0x0000000000400000)
 
+/*
+ * Add the 64-bit processor unique features in the top half of the word;
+ * on 32-bit, make the names available but defined to be 0.
+ */
 #ifdef __powerpc64__
-/* Add the 64b processor unique features in the top half of the word */
-#define CPU_FTR_SLB			ASM_CONST(0x0000000100000000)
-#define CPU_FTR_16M_PAGE		ASM_CONST(0x0000000200000000)
-#define CPU_FTR_TLBIEL			ASM_CONST(0x0000000400000000)
-#define CPU_FTR_NOEXECUTE		ASM_CONST(0x0000000800000000)
-#define CPU_FTR_IABR			ASM_CONST(0x0000002000000000)
-#define CPU_FTR_MMCRA			ASM_CONST(0x0000004000000000)
-#define CPU_FTR_CTRL			ASM_CONST(0x0000008000000000)
-#define CPU_FTR_SMT			ASM_CONST(0x0000010000000000)
-#define CPU_FTR_COHERENT_ICACHE		ASM_CONST(0x0000020000000000)
-#define CPU_FTR_LOCKLESS_TLBIE		ASM_CONST(0x0000040000000000)
-#define CPU_FTR_CI_LARGE_PAGE		ASM_CONST(0x0000100000000000)
-#define CPU_FTR_PAUSE_ZERO		ASM_CONST(0x0000200000000000)
-#define CPU_FTR_PURR			ASM_CONST(0x0000400000000000)
+#define LONG_ASM_CONST(x)		ASM_CONST(x)
 #else
-/* ensure on 32b processors the flags are available for compiling but
- * don't do anything */
-#define CPU_FTR_SLB			ASM_CONST(0x0)
-#define CPU_FTR_16M_PAGE		ASM_CONST(0x0)
-#define CPU_FTR_TLBIEL			ASM_CONST(0x0)
-#define CPU_FTR_NOEXECUTE		ASM_CONST(0x0)
-#define CPU_FTR_IABR			ASM_CONST(0x0)
-#define CPU_FTR_MMCRA			ASM_CONST(0x0)
-#define CPU_FTR_CTRL			ASM_CONST(0x0)
-#define CPU_FTR_SMT			ASM_CONST(0x0)
-#define CPU_FTR_COHERENT_ICACHE		ASM_CONST(0x0)
-#define CPU_FTR_LOCKLESS_TLBIE		ASM_CONST(0x0)
-#define CPU_FTR_CI_LARGE_PAGE		ASM_CONST(0x0)
-#define CPU_FTR_PURR			ASM_CONST(0x0)
+#define LONG_ASM_CONST(x)		0
 #endif
 
+#define CPU_FTR_SLB			LONG_ASM_CONST(0x0000000100000000)
+#define CPU_FTR_16M_PAGE		LONG_ASM_CONST(0x0000000200000000)
+#define CPU_FTR_TLBIEL			LONG_ASM_CONST(0x0000000400000000)
+#define CPU_FTR_NOEXECUTE		LONG_ASM_CONST(0x0000000800000000)
+#define CPU_FTR_IABR			LONG_ASM_CONST(0x0000002000000000)
+#define CPU_FTR_MMCRA			LONG_ASM_CONST(0x0000004000000000)
+#define CPU_FTR_CTRL			LONG_ASM_CONST(0x0000008000000000)
+#define CPU_FTR_SMT			LONG_ASM_CONST(0x0000010000000000)
+#define CPU_FTR_COHERENT_ICACHE		LONG_ASM_CONST(0x0000020000000000)
+#define CPU_FTR_LOCKLESS_TLBIE		LONG_ASM_CONST(0x0000040000000000)
+#define CPU_FTR_CI_LARGE_PAGE		LONG_ASM_CONST(0x0000100000000000)
+#define CPU_FTR_PAUSE_ZERO		LONG_ASM_CONST(0x0000200000000000)
+#define CPU_FTR_PURR			LONG_ASM_CONST(0x0000400000000000)
+
 #ifndef __ASSEMBLY__
 
 #define CPU_FTR_PPCAS_ARCH_V2_BASE (CPU_FTR_SLB | \