msm: clock: Support clk_prepare/unprepare()

Fill in the boiler plate prepare()/unprepare() code. Add a
prepare count and a prepare lock to protect the prepare/unprepare
paths. Also handle the parent/child relationship similarly to how
enable/disable is done.

In particular, WARN() whenever a driver calls clk_enable() before
calling clk_prepare() and whenever a driver calls clk_unprepare()
before calling clk_disable(). This should catch a few bugs even
though it's technically not SMP safe if an enable call is racing
with an unprepare call for example.

We also mark PLLs and XOs as already warned since those are
mostly internal clocks that driver authors aren't aware of. The
markings will be removed when the local clock driver is updated
to handle prepare/unprepare in another patch.

Change-Id: I41dd39d27a279f3477c6e1cef292ac5308d65243
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index 272163a..98a32c6 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -478,6 +478,7 @@
 		.rate = 800000000,
 		.ops = &clk_ops_pll,
 		CLK_INIT(pll2_clk.c),
+		.warned = true,
 	},
 };
 
@@ -491,6 +492,7 @@
 		.vdd_class = &vdd_sr2_pll,
 		.fmax[VDD_SR2_PLL_ON] = ULONG_MAX,
 		CLK_INIT(pll3_clk.c),
+		.warned = true,
 	},
 };
 
@@ -504,6 +506,7 @@
 		.rate = 393216000,
 		.ops = &clk_ops_pll_vote,
 		CLK_INIT(pll4_clk.c),
+		.warned = true,
 	},
 };
 
@@ -517,6 +520,7 @@
 		.rate = 384000000,
 		.ops = &clk_ops_pll_vote,
 		CLK_INIT(pll8_clk.c),
+		.warned = true,
 	},
 };
 
@@ -530,6 +534,7 @@
 		.rate = 480000000,
 		.ops = &clk_ops_pll_vote,
 		CLK_INIT(pll14_clk.c),
+		.warned = true,
 	},
 };
 
@@ -541,6 +546,7 @@
 		.rate = 975000000,
 		.ops = &clk_ops_pll,
 		CLK_INIT(pll15_clk.c),
+		.warned = true,
 	},
 };