Merge "msm: timer: correct timer0 base setting" into msm-3.0
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index 103a224..26de3e6 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -2647,11 +2647,6 @@
msm_gpiomux_install(wcnss_5wire_interface,
ARRAY_SIZE(wcnss_5wire_interface));
-#ifdef CONFIG_USB_EHCI_MSM_HSIC
- msm_gpiomux_install(msm8960_hsic_configs,
- ARRAY_SIZE(msm8960_hsic_configs));
-#endif
-
return 0;
}
@@ -3799,7 +3794,6 @@
&msm8960_device_otg,
&msm8960_device_gadget_peripheral,
&msm_device_hsusb_host,
- &msm_device_hsic_host,
&android_usb_device,
&msm_pcm,
&msm_pcm_routing,
@@ -4409,6 +4403,28 @@
#endif /* CONFIG_MSM_DSPS */
}
+static void __init msm8960_init_hsic(void)
+{
+#ifdef CONFIG_USB_EHCI_MSM_HSIC
+ uint32_t version = socinfo_get_version();
+
+ pr_info("%s: version:%d mtp:%d\n", __func__,
+ SOCINFO_VERSION_MAJOR(version),
+ machine_is_msm8960_mtp());
+
+ if ((SOCINFO_VERSION_MAJOR(version) == 1) ||
+ machine_is_msm8960_mtp() ||
+ machine_is_msm8960_fluid())
+ return;
+
+ msm_gpiomux_install(msm8960_hsic_configs,
+ ARRAY_SIZE(msm8960_hsic_configs));
+
+ platform_device_register(&msm_device_hsic_host);
+#endif
+}
+
+
#ifdef CONFIG_ISL9519_CHARGER
static struct isl_platform_data isl_data __initdata = {
.valid_n_gpio = 0, /* Not required when notify-by-pmic */
@@ -4612,6 +4628,7 @@
platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
pm8921_gpio_mpp_init();
platform_add_devices(cdp_devices, ARRAY_SIZE(cdp_devices));
+ msm8960_init_hsic();
msm8960_init_cam();
msm8960_init_mmc();
acpuclk_init(&acpuclk_8960_soc_data);
diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index a0c6878..6762601 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -5660,10 +5660,10 @@
/* Check if PLL8 is active */
is_pll_enabled = readl_relaxed(BB_PLL8_STATUS_REG) & BIT(16);
if (!is_pll_enabled) {
- /* Ref clk = 24.5MHz and program pll8 to 384MHz */
- writel_relaxed(0xF, BB_PLL8_L_VAL_REG);
- writel_relaxed(0x21, BB_PLL8_M_VAL_REG);
- writel_relaxed(0x31, BB_PLL8_N_VAL_REG);
+ /* Ref clk = 27MHz and program pll8 to 384MHz */
+ writel_relaxed(0xE, BB_PLL8_L_VAL_REG);
+ writel_relaxed(0x2, BB_PLL8_M_VAL_REG);
+ writel_relaxed(0x9, BB_PLL8_N_VAL_REG);
regval = readl_relaxed(BB_PLL8_CONFIG_REG);
@@ -5689,10 +5689,10 @@
/* Check if PLL3 is active */
is_pll_enabled = readl_relaxed(GPLL1_STATUS_REG) & BIT(16);
if (!is_pll_enabled) {
- /* Ref clk = 24.5MHz and program pll3 to 1200MHz */
- writel_relaxed(0x30, GPLL1_L_VAL_REG);
- writel_relaxed(0x30, GPLL1_M_VAL_REG);
- writel_relaxed(0x31, GPLL1_N_VAL_REG);
+ /* Ref clk = 27MHz and program pll3 to 1200MHz */
+ writel_relaxed(0x2C, GPLL1_L_VAL_REG);
+ writel_relaxed(0x4, GPLL1_M_VAL_REG);
+ writel_relaxed(0x9, GPLL1_N_VAL_REG);
regval = readl_relaxed(GPLL1_CONFIG_REG);
@@ -5708,10 +5708,10 @@
/* Check if PLL14 is active */
is_pll_enabled = readl_relaxed(BB_PLL14_STATUS_REG) & BIT(16);
if (!is_pll_enabled) {
- /* Ref clk = 24.5MHz and program pll14 to 480MHz */
- writel_relaxed(0x13, BB_PLL14_L_VAL_REG);
- writel_relaxed(0x1D, BB_PLL14_M_VAL_REG);
- writel_relaxed(0x31, BB_PLL14_N_VAL_REG);
+ /* Ref clk = 27MHz and program pll14 to 480MHz */
+ writel_relaxed(0x11, BB_PLL14_L_VAL_REG);
+ writel_relaxed(0x7, BB_PLL14_M_VAL_REG);
+ writel_relaxed(0x9, BB_PLL14_N_VAL_REG);
regval = readl_relaxed(BB_PLL14_CONFIG_REG);
@@ -5775,10 +5775,10 @@
/* Check if PLL4 is active */
is_pll_enabled = readl_relaxed(LCC_PLL0_STATUS_REG) & BIT(16);
if (!is_pll_enabled) {
- /* Ref clk = 24.5MHz and program pll4 to 393.2160MHz */
- writel_relaxed(0x10, LCC_PLL0_L_VAL_REG);
- writel_relaxed(0x130, LCC_PLL0_M_VAL_REG);
- writel_relaxed(0x17ED, LCC_PLL0_N_VAL_REG);
+ /* Ref clk = 27MHz and program pll4 to 393.2160MHz */
+ writel_relaxed(0xE, LCC_PLL0_L_VAL_REG);
+ writel_relaxed(0x27A, LCC_PLL0_M_VAL_REG);
+ writel_relaxed(0x465, LCC_PLL0_N_VAL_REG);
regval = readl_relaxed(LCC_PLL0_CONFIG_REG);
diff --git a/arch/arm/mach-msm/sdio_cmux.c b/arch/arm/mach-msm/sdio_cmux.c
index f7c25c3..0aa5423 100644
--- a/arch/arm/mach-msm/sdio_cmux.c
+++ b/arch/arm/mach-msm/sdio_cmux.c
@@ -336,10 +336,12 @@
ch = &logical_ch[id];
mutex_lock(&ch->lc_lock);
+ ch->receive_cb = NULL;
+ mutex_lock(&ch->tx_lock);
+ ch->write_done = NULL;
+ mutex_unlock(&ch->tx_lock);
ch->is_local_open = 0;
ch->priv = NULL;
- ch->receive_cb = NULL;
- ch->write_done = NULL;
mutex_unlock(&ch->lc_lock);
sdio_cmux_write_cmd(ch->lc_id, CLOSE);
return 0;
diff --git a/drivers/media/video/msm/msm_vfe32.c b/drivers/media/video/msm/msm_vfe32.c
index e01bf6d..691516f 100644
--- a/drivers/media/video/msm/msm_vfe32.c
+++ b/drivers/media/video/msm/msm_vfe32.c
@@ -1726,6 +1726,39 @@
cmdp_local, V32_DEMOSAICV3_1_LEN);
break;
+ case VFE_CMD_DEMOSAICV3_UPDATE:
+ if (cmd->length !=
+ V32_DEMOSAICV3_0_LEN * V32_DEMOSAICV3_UP_REG_CNT) {
+ rc = -EFAULT;
+ goto proc_general_done;
+ }
+ cmdp = kmalloc(cmd->length, GFP_ATOMIC);
+ if (!cmdp) {
+ rc = -ENOMEM;
+ goto proc_general_done;
+ }
+ if (copy_from_user(cmdp,
+ (void __user *)(cmd->value),
+ cmd->length)) {
+ rc = -EFAULT;
+ goto proc_general_done;
+ }
+ cmdp_local = cmdp;
+
+ msm_io_memcpy(vfe32_ctrl->vfebase + V32_DEMOSAICV3_0_OFF,
+ cmdp_local, V32_DEMOSAICV3_0_LEN);
+ /* As the address space is not contiguous increment by 2
+ * before copying to next address space */
+ cmdp_local += 1;
+ msm_io_memcpy(vfe32_ctrl->vfebase + V32_DEMOSAICV3_1_OFF,
+ cmdp_local, 2 * V32_DEMOSAICV3_0_LEN);
+ /* As the address space is not contiguous increment by 2
+ * before copying to next address space */
+ cmdp_local += 2;
+ msm_io_memcpy(vfe32_ctrl->vfebase + V32_DEMOSAICV3_2_OFF,
+ cmdp_local, 2 * V32_DEMOSAICV3_0_LEN);
+ break;
+
case VFE_CMD_DEMOSAICV3_ABCC_CFG:
rc = -EFAULT;
break;
diff --git a/drivers/media/video/msm/msm_vfe32.h b/drivers/media/video/msm/msm_vfe32.h
index 5ccc10d..596db48 100644
--- a/drivers/media/video/msm/msm_vfe32.h
+++ b/drivers/media/video/msm/msm_vfe32.h
@@ -211,6 +211,8 @@
#define V32_DEMOSAICV3_0_LEN 4
#define V32_DEMOSAICV3_1_OFF 0x0000061C
#define V32_DEMOSAICV3_1_LEN 88
+#define V32_DEMOSAICV3_2_OFF 0x0000066C
+#define V32_DEMOSAICV3_UP_REG_CNT 5
/* BPC */
#define V32_DEMOSAIC_2_OFF 0x0000029C
#define V32_DEMOSAIC_2_LEN 8
diff --git a/include/media/msm_isp.h b/include/media/msm_isp.h
index d4fe4ca..b4e1981 100644
--- a/include/media/msm_isp.h
+++ b/include/media/msm_isp.h
@@ -171,6 +171,7 @@
#define VFE_CMD_GET_PCA_ROLLOFF_TABLE 125
#define VFE_CMD_GET_RGB_G_TABLE 126
#define VFE_CMD_GET_LA_TABLE 127
+#define VFE_CMD_DEMOSAICV3_UPDATE 128
struct msm_isp_cmd {
int32_t id;