| commit | 3fc93030e5a792fdd0da3321487f5cbfd1143c2b | [log] [tgz] |
|---|---|---|
| author | Peter Ujfalusi <peter.ujfalusi@nokia.com> | Tue Jan 27 11:29:39 2009 +0200 |
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | Tue Jan 27 10:42:39 2009 +0000 |
| tree | e917a95e51ac8a393c5641ae4c45fb1ec003146f | |
| parent | 6627a653bceb3a54e55e5cdc478ec5b8d5c9cc44 [diff] |
ASoC: TWL4030: Syncronize the reg_cache for ANAMICL after the offset cancelation The offset cancelation bit in ANAMICL register is self cleanig. Make sure that the reg_cache holds the same value as the HW register. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>