Merge "ARM: dts: msm: add device info for reducing power stage"
diff --git a/Documentation/devicetree/bindings/power/qpnp-charger.txt b/Documentation/devicetree/bindings/power/qpnp-charger.txt
index 5425c92..584a76d 100644
--- a/Documentation/devicetree/bindings/power/qpnp-charger.txt
+++ b/Documentation/devicetree/bindings/power/qpnp-charger.txt
@@ -93,6 +93,10 @@
set, the charger ovp status is monitored in software.
- qcom,ext-ovp-present Indicates if an external OVP exists which reduces the
overall input resistance of the charge path.
+- qcom,power-stage-reduced Indicates if power stage workaround is enabled. This work
+ around reduces the power stage segments while charging
+ under high load during low battery voltages. It's for
+ improving IADC accuracy while board has a bad layout.
Sub node required structure:
- A qcom,chg node must be a child of an SPMI node that has specified
diff --git a/drivers/power/qpnp-charger.c b/drivers/power/qpnp-charger.c
index a65ac5b..a627ec2 100644
--- a/drivers/power/qpnp-charger.c
+++ b/drivers/power/qpnp-charger.c
@@ -369,6 +369,7 @@
struct alarm reduce_power_stage_alarm;
struct work_struct reduce_power_stage_work;
bool power_stage_workaround_running;
+ bool power_stage_workaround_enable;
};
@@ -2151,7 +2152,8 @@
if ((chip->flags & POWER_STAGE_WA)
&& ((ret.intval / 1000) > USB_WALL_THRESHOLD_MA)
- && !chip->power_stage_workaround_running) {
+ && !chip->power_stage_workaround_running
+ && chip->power_stage_workaround_enable) {
chip->power_stage_workaround_running = true;
pr_debug("usb wall chg inserted starting power stage workaround charger_monitor = %d\n",
charger_monitor);
@@ -4124,6 +4126,10 @@
if (chip->use_default_batt_values)
chip->charging_disabled = true;
+ chip->power_stage_workaround_enable =
+ of_property_read_bool(chip->spmi->dev.of_node,
+ "qcom,power-stage-reduced");
+
of_get_property(chip->spmi->dev.of_node, "qcom,thermal-mitigation",
&(chip->thermal_levels));