commit 40df2d1d8538865341a4cb9d4b7a375296517ad2
author Russell King <rmk@dyn-67.arm.linux.org.uk> Sun Sep 07 12:36:46 2008 +0100
committer Russell King <rmk+kernel@arm.linux.org.uk> Wed Oct 01 16:41:04 2008 +0100
tree 2b97595b5d31917432af57e4d9a70f8a459d8f65
parent 40d192b63d079db1f76cec9ae8ccbf461fda23e4

[ARM] Update Xscale and Xscale3 PTE mappings

Use 'shared device' mappings for devices, and use the standard
bit combinations for Xscale3.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

arch/arm/mm/proc-xsc3.S

diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index 9c5318e..22ecef5 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -345,23 +345,21 @@
  * cpu_xsc3_set_pte_ext(ptep, pte, ext)
  *
  * Set a PTE and flush it out
- *
  */
-
 cpu_xsc3_mt_table:
 	.long	0x00						@ L_PTE_MT_UNCACHED
-	.long	PTE_BUFFERABLE					@ L_PTE_MT_BUFFERABLE
-	.long	PTE_EXT_TEX(5) | PTE_CACHEABLE			@ L_PTE_MT_WRITETHROUGH
-	.long	PTE_EXT_TEX(5) | PTE_CACHEABLE | PTE_BUFFERABLE	@ L_PTE_MT_WRITEBACK
-	.long	0x00						@ L_PTE_MT_DEV_SHARED
+	.long	PTE_EXT_TEX(1)					@ L_PTE_MT_BUFFERABLE
+	.long	PTE_CACHEABLE					@ L_PTE_MT_WRITETHROUGH
+	.long	PTE_CACHEABLE | PTE_BUFFERABLE			@ L_PTE_MT_WRITEBACK
+	.long	PTE_EXT_TEX(1) | PTE_BUFFERABLE			@ L_PTE_MT_DEV_SHARED
 	.long	0x00						@ unused
 	.long	0x00						@ L_PTE_MT_MINICACHE (not present)
 	.long	PTE_EXT_TEX(5) | PTE_CACHEABLE | PTE_BUFFERABLE	@ L_PTE_MT_WRITEALLOC (not present?)
 	.long	0x00						@ unused
 	.long	PTE_EXT_TEX(1)					@ L_PTE_MT_DEV_WC
 	.long	0x00						@ unused
-	.long	PTE_EXT_TEX(5) | PTE_CACHEABLE | PTE_BUFFERABLE	@ L_PTE_MT_DEV_CACHED
-	.long	0x00						@ L_PTE_MT_DEV_NONSHARED
+	.long	PTE_CACHEABLE | PTE_BUFFERABLE			@ L_PTE_MT_DEV_CACHED
+	.long	PTE_EXT_TEX(2)					@ L_PTE_MT_DEV_NONSHARED
 	.long	0x00						@ L_PTE_MT_DEV_IXP2000 (not present)
 	.long	0x00						@ unused
 	.long	0x00						@ unused