| commit | 4272f98a1ae81709fc5c804c33c044064e419cd9 | [log] [tgz] |
|---|---|---|
| author | Javi Merino <javi.merino@arm.com> | Wed Nov 16 12:36:39 2011 +0100 |
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | Wed Feb 15 21:10:49 2012 +0000 |
| tree | 0e3af4e730a6f1bbec98f3e4808dd272e8ae8e58 | |
| parent | 8e43a905dd574f54c5715d978318290ceafbe275 [diff] |
ARM: 7164/3: PL330: Fix the size of the dst_cache_ctrl field dst_cache_ctrl affects bits 3, 1 and 0 of AWCACHE but it is a 3-bit field in the Channel Control Register (see Table 3-21 of the DMA-330 Technical Reference Manual) and should be programmed as such. Reference: <1320244259-10496-3-git-send-email-javi.merino@arm.com> Signed-off-by: Javi Merino <javi.merino@arm.com> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>