msm: clock-8226: Switch to standard regulator APIs
Now that all regulator voting is done in non-atomic context,
switch away from the RPM regulator API to the generic Linux
regulator framework API.
Vote for the SR2 PLL to ensure it remains on until the acpuclock
driver probes.
Change-Id: I1bd22e0961cd6f9a86a512ea54b68604fb47e5af
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
diff --git a/arch/arm/mach-msm/clock-8226.c b/arch/arm/mach-msm/clock-8226.c
index be02c1b..f65b595 100644
--- a/arch/arm/mach-msm/clock-8226.c
+++ b/arch/arm/mach-msm/clock-8226.c
@@ -19,6 +19,7 @@
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/iopoll.h>
+#include <linux/regulator/consumer.h>
#include <mach/rpm-regulator-smd.h>
#include <mach/socinfo.h>
@@ -173,11 +174,11 @@
[VDD_DIG_HIGH] = RPM_REGULATOR_CORNER_SUPER_TURBO,
};
-static struct rpm_regulator *vdd_dig_reg;
+static struct regulator *vdd_dig_reg;
static int set_vdd_dig(struct clk_vdd_class *vdd_class, int level)
{
- return rpm_regulator_set_voltage(vdd_dig_reg, vdd_corner[level],
+ return regulator_set_voltage(vdd_dig_reg, vdd_corner[level],
RPM_REGULATOR_CORNER_SUPER_TURBO);
}
@@ -3310,14 +3311,14 @@
VDD_SR2_PLL_NUM
};
-static struct rpm_regulator *vdd_sr2_reg;
+static struct regulator *vdd_sr2_reg;
static int set_vdd_sr2_pll(struct clk_vdd_class *vdd_class, int level)
{
if (level == VDD_SR2_PLL_ON) {
- return rpm_regulator_set_voltage(vdd_sr2_reg, 1800000,
+ return regulator_set_voltage(vdd_sr2_reg, 1800000,
1800000);
} else {
- return rpm_regulator_set_voltage(vdd_sr2_reg, 0, 1800000);
+ return regulator_set_voltage(vdd_sr2_reg, 0, 1800000);
}
}
@@ -4257,10 +4258,21 @@
clk_ops_local_pll.enable = sr_hpm_lp_pll_clk_enable;
- vdd_dig_reg = rpm_regulator_get(NULL, "vdd_dig");
+ vdd_dig_reg = regulator_get(NULL, "vdd_dig");
if (IS_ERR(vdd_dig_reg))
panic("clock-8226: Unable to get the vdd_dig regulator!");
+ vdd_sr2_reg = regulator_get(NULL, "vdd_sr2_pll");
+ if (IS_ERR(vdd_dig_reg))
+ panic("clock-8226: Unable to get the sr2_pll regulator!");
+
+ /*
+ * The SR2 PLL is used at boot. Vote to prevent its regulator from
+ * being turned off while the PLL is still in use.
+ */
+ regulator_set_voltage(vdd_sr2_reg, 1800000, 1800000);
+ regulator_enable(vdd_sr2_reg);
+
/*
* TODO: Set a voltage and enable vdd_dig, leaving the voltage high
* until late_init. This may not be necessary with clock handoff;
@@ -4268,7 +4280,7 @@
* its necessity.
*/
vote_vdd_level(&vdd_dig, VDD_DIG_HIGH);
- rpm_regulator_enable(vdd_dig_reg);
+ regulator_enable(vdd_dig_reg);
/*
* Hold an active set vote at a rate of 40MHz for the MMSS NOC AHB