commit 490d20c29737b37c173a0cf0fd1e536faba40408
author Abhimanyu Kapur <abhimany@codeaurora.org> Fri Jun 22 17:34:20 2012 -0700
committer QuIC Gerrit Code Review <code-review@localhost> Wed Aug 08 02:01:13 2012 -0700
tree 9f24fc5cf38fa00d4bd25154ec7985071b8e109a
parent 987f40bd986ce7f46f7cd9c995de26b7b49424a6

msm: 9625: Add support for the external L2 controller

The 9625 chipset has an external L2 cache controller; add support for it
to the device tree and board config.

Change-Id: I900aa28ded4dc6968c5305f9b5a31aa44d2f9774
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>

arch/arm/mach-msm/Kconfig

diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index a5d851e..2cf05d8 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -310,6 +310,7 @@
 	bool "MSM9625"
 	select ARM_GIC
 	select GIC_SECURE
+	select MIGHT_HAVE_CACHE_L2X0
 	select ARCH_MSM_CORTEX_A5
 	select SMP
 	select MSM_SMP