msm: clock-8610: Rename camera mux clocks temporarily
To allow the generic mux code to co-exist with the camera
mux code, rename the camera mux clocks temporarily. These
clocks will use the generic code soon allowing the camera
specific mux code to go away.
Change-Id: Ic7ddfd9809df3f98782dbfe8187b8b82fa95e91b
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
diff --git a/arch/arm/mach-msm/clock-8610.c b/arch/arm/mach-msm/clock-8610.c
index 478f77f..b778662 100644
--- a/arch/arm/mach-msm/clock-8610.c
+++ b/arch/arm/mach-msm/clock-8610.c
@@ -2017,7 +2017,7 @@
},
};
-static struct mux_clk csi0phy_mux_clk = {
+static struct cam_mux_clk csi0phy_cam_mux_clk = {
.enable_reg = MMSS_CAMSS_MISC,
.enable_mask = BIT(11),
.select_reg = MMSS_CAMSS_MISC,
@@ -2029,13 +2029,13 @@
},
.base = &virt_bases[MMSS_BASE],
.c = {
- .dbg_name = "csi0phy_mux_clk",
- .ops = &clk_ops_mux,
- CLK_INIT(csi0phy_mux_clk.c),
+ .dbg_name = "csi0phy_cam_mux_clk",
+ .ops = &clk_ops_cam_mux,
+ CLK_INIT(csi0phy_cam_mux_clk.c),
},
};
-static struct mux_clk csi1phy_mux_clk = {
+static struct cam_mux_clk csi1phy_cam_mux_clk = {
.enable_reg = MMSS_CAMSS_MISC,
.enable_mask = BIT(10),
.select_reg = MMSS_CAMSS_MISC,
@@ -2047,13 +2047,13 @@
},
.base = &virt_bases[MMSS_BASE],
.c = {
- .dbg_name = "csi1phy_mux_clk",
- .ops = &clk_ops_mux,
- CLK_INIT(csi1phy_mux_clk.c),
+ .dbg_name = "csi1phy_cam_mux_clk",
+ .ops = &clk_ops_cam_mux,
+ CLK_INIT(csi1phy_cam_mux_clk.c),
},
};
-static struct mux_clk csi0pix_mux_clk = {
+static struct cam_mux_clk csi0pix_cam_mux_clk = {
.enable_reg = MMSS_CAMSS_MISC,
.enable_mask = BIT(7),
.select_reg = MMSS_CAMSS_MISC,
@@ -2065,14 +2065,14 @@
},
.base = &virt_bases[MMSS_BASE],
.c = {
- .dbg_name = "csi0pix_mux_clk",
- .ops = &clk_ops_mux,
- CLK_INIT(csi0pix_mux_clk.c),
+ .dbg_name = "csi0pix_cam_mux_clk",
+ .ops = &clk_ops_cam_mux,
+ CLK_INIT(csi0pix_cam_mux_clk.c),
},
};
-static struct mux_clk rdi2_mux_clk = {
+static struct cam_mux_clk rdi2_cam_mux_clk = {
.enable_reg = MMSS_CAMSS_MISC,
.enable_mask = BIT(6),
.select_reg = MMSS_CAMSS_MISC,
@@ -2084,13 +2084,13 @@
},
.base = &virt_bases[MMSS_BASE],
.c = {
- .dbg_name = "rdi2_mux_clk",
- .ops = &clk_ops_mux,
- CLK_INIT(rdi2_mux_clk.c),
+ .dbg_name = "rdi2_cam_mux_clk",
+ .ops = &clk_ops_cam_mux,
+ CLK_INIT(rdi2_cam_mux_clk.c),
},
};
-static struct mux_clk rdi1_mux_clk = {
+static struct cam_mux_clk rdi1_cam_mux_clk = {
.enable_reg = MMSS_CAMSS_MISC,
.enable_mask = BIT(5),
.select_reg = MMSS_CAMSS_MISC,
@@ -2102,13 +2102,13 @@
},
.base = &virt_bases[MMSS_BASE],
.c = {
- .dbg_name = "rdi1_mux_clk",
- .ops = &clk_ops_mux,
- CLK_INIT(rdi1_mux_clk.c),
+ .dbg_name = "rdi1_cam_mux_clk",
+ .ops = &clk_ops_cam_mux,
+ CLK_INIT(rdi1_cam_mux_clk.c),
},
};
-static struct mux_clk rdi0_mux_clk = {
+static struct cam_mux_clk rdi0_cam_mux_clk = {
.enable_reg = MMSS_CAMSS_MISC,
.enable_mask = BIT(4),
.select_reg = MMSS_CAMSS_MISC,
@@ -2120,9 +2120,9 @@
},
.base = &virt_bases[MMSS_BASE],
.c = {
- .dbg_name = "rdi0_mux_clk",
- .ops = &clk_ops_mux,
- CLK_INIT(rdi0_mux_clk.c),
+ .dbg_name = "rdi0_cam_mux_clk",
+ .ops = &clk_ops_cam_mux,
+ CLK_INIT(rdi0_cam_mux_clk.c),
},
};
@@ -2967,12 +2967,12 @@
CLK_LOOKUP("core_clk", vfe_ahb_clk.c, ""),
CLK_LOOKUP("core_clk", vfe_axi_clk.c, ""),
- CLK_LOOKUP("core_clk", csi0pix_mux_clk.c, ""),
- CLK_LOOKUP("core_clk", csi0phy_mux_clk.c, ""),
- CLK_LOOKUP("core_clk", csi1phy_mux_clk.c, ""),
- CLK_LOOKUP("core_clk", rdi2_mux_clk.c, ""),
- CLK_LOOKUP("core_clk", rdi1_mux_clk.c, ""),
- CLK_LOOKUP("core_clk", rdi0_mux_clk.c, ""),
+ CLK_LOOKUP("core_clk", csi0pix_cam_mux_clk.c, ""),
+ CLK_LOOKUP("core_clk", csi0phy_cam_mux_clk.c, ""),
+ CLK_LOOKUP("core_clk", csi1phy_cam_mux_clk.c, ""),
+ CLK_LOOKUP("core_clk", rdi2_cam_mux_clk.c, ""),
+ CLK_LOOKUP("core_clk", rdi1_cam_mux_clk.c, ""),
+ CLK_LOOKUP("core_clk", rdi0_cam_mux_clk.c, ""),
CLK_LOOKUP("core_clk", oxili_gfx3d_clk.c, "fdc00000.qcom,kgsl-3d0"),
CLK_LOOKUP("iface_clk", oxili_ahb_clk.c, "fdc00000.qcom,kgsl-3d0"),
diff --git a/arch/arm/mach-msm/clock-local2.c b/arch/arm/mach-msm/clock-local2.c
index 8915bad..e67d973 100644
--- a/arch/arm/mach-msm/clock-local2.c
+++ b/arch/arm/mach-msm/clock-local2.c
@@ -815,18 +815,18 @@
/*
* mux clock functions
*/
-static void mux_clk_halt_check(void)
+static void cam_mux_clk_halt_check(void)
{
/* Ensure that the delay starts after the mux disable/enable. */
mb();
udelay(HALT_CHECK_DELAY_US);
}
-static int mux_clk_enable(struct clk *c)
+static int cam_mux_clk_enable(struct clk *c)
{
unsigned long flags;
u32 regval;
- struct mux_clk *mux = to_mux_clk(c);
+ struct cam_mux_clk *mux = to_cam_mux_clk(c);
spin_lock_irqsave(&local_clock_reg_lock, flags);
regval = readl_relaxed(ENABLE_REG(mux));
@@ -835,15 +835,15 @@
spin_unlock_irqrestore(&local_clock_reg_lock, flags);
/* Wait for clock to enable before continuing. */
- mux_clk_halt_check();
+ cam_mux_clk_halt_check();
return 0;
}
-static void mux_clk_disable(struct clk *c)
+static void cam_mux_clk_disable(struct clk *c)
{
unsigned long flags;
- struct mux_clk *mux = to_mux_clk(c);
+ struct cam_mux_clk *mux = to_cam_mux_clk(c);
u32 regval;
spin_lock_irqsave(&local_clock_reg_lock, flags);
@@ -853,10 +853,10 @@
spin_unlock_irqrestore(&local_clock_reg_lock, flags);
/* Wait for clock to disable before continuing. */
- mux_clk_halt_check();
+ cam_mux_clk_halt_check();
}
-static int mux_source_switch(struct mux_clk *mux, struct mux_source *dest)
+static int mux_source_switch(struct cam_mux_clk *mux, struct mux_source *dest)
{
unsigned long flags;
u32 regval;
@@ -879,9 +879,9 @@
return ret;
}
-static int mux_clk_set_parent(struct clk *c, struct clk *parent)
+static int cam_mux_clk_set_parent(struct clk *c, struct clk *parent)
{
- struct mux_clk *mux = to_mux_clk(c);
+ struct cam_mux_clk *mux = to_cam_mux_clk(c);
struct mux_source *dest = NULL;
int ret;
@@ -908,9 +908,9 @@
return 0;
}
-static enum handoff mux_clk_handoff(struct clk *c)
+static enum handoff cam_mux_clk_handoff(struct clk *c)
{
- struct mux_clk *mux = to_mux_clk(c);
+ struct cam_mux_clk *mux = to_cam_mux_clk(c);
u32 mask = mux->enable_mask;
u32 regval = readl_relaxed(ENABLE_REG(mux));
@@ -922,9 +922,9 @@
return HANDOFF_DISABLED_CLK;
}
-static struct clk *mux_clk_get_parent(struct clk *c)
+static struct clk *cam_mux_clk_get_parent(struct clk *c)
{
- struct mux_clk *mux = to_mux_clk(c);
+ struct cam_mux_clk *mux = to_cam_mux_clk(c);
struct mux_source *parent = NULL;
u32 regval = readl_relaxed(SELECT_REG(mux));
@@ -943,9 +943,9 @@
return ERR_PTR(-EPERM);
}
-static int mux_clk_list_rate(struct clk *c, unsigned n)
+static int cam_mux_clk_list_rate(struct clk *c, unsigned n)
{
- struct mux_clk *mux = to_mux_clk(c);
+ struct cam_mux_clk *mux = to_cam_mux_clk(c);
int i;
for (i = 0; i < n; i++)
@@ -1022,13 +1022,13 @@
.handoff = local_vote_clk_handoff,
};
-struct clk_ops clk_ops_mux = {
- .enable = mux_clk_enable,
- .disable = mux_clk_disable,
- .set_parent = mux_clk_set_parent,
- .get_parent = mux_clk_get_parent,
- .handoff = mux_clk_handoff,
- .list_rate = mux_clk_list_rate,
+struct clk_ops clk_ops_cam_mux = {
+ .enable = cam_mux_clk_enable,
+ .disable = cam_mux_clk_disable,
+ .set_parent = cam_mux_clk_set_parent,
+ .get_parent = cam_mux_clk_get_parent,
+ .handoff = cam_mux_clk_handoff,
+ .list_rate = cam_mux_clk_list_rate,
};
diff --git a/arch/arm/mach-msm/clock-local2.h b/arch/arm/mach-msm/clock-local2.h
index f33cf9c..f307a2f 100644
--- a/arch/arm/mach-msm/clock-local2.h
+++ b/arch/arm/mach-msm/clock-local2.h
@@ -163,7 +163,7 @@
};
/**
- * struct mux_clk - branch clock
+ * struct cam_mux_clk - branch clock
* @c: clk
* @enable_reg: register that contains the enable bit(s) for the mux
* @select_reg: register that contains the source selection bits for the mux
@@ -172,7 +172,7 @@
* @sources: list of mux sources
* @base: pointer to base address of ioremapped registers.
*/
-struct mux_clk {
+struct cam_mux_clk {
struct clk c;
const u32 enable_reg;
const u32 select_reg;
@@ -184,9 +184,9 @@
void *const __iomem *base;
};
-static inline struct mux_clk *to_mux_clk(struct clk *clk)
+static inline struct cam_mux_clk *to_cam_mux_clk(struct clk *clk)
{
- return container_of(clk, struct mux_clk, c);
+ return container_of(clk, struct cam_mux_clk, c);
}
/*
@@ -200,7 +200,7 @@
*/
extern spinlock_t local_clock_reg_lock;
-extern struct clk_ops clk_ops_mux;
+extern struct clk_ops clk_ops_cam_mux;
extern struct clk_ops clk_ops_empty;
extern struct clk_ops clk_ops_rcg;
extern struct clk_ops clk_ops_rcg_mnd;