Blackfin arch: Add assembly function insl_16
/*
* CPUs often take a performance hit when accessing unaligned memory
* locations. The actual performance hit varies, it can be small if the
* hardware handles it or large if we have to take an exception and fix
* it
* in software.
*
* Since an ethernet header is 14 bytes network drivers often end up
* with
* the IP header at an unaligned offset. The IP header can be aligned by
* shifting the start of the packet by 2 bytes. Drivers should do this
* with:
*
* skb_reserve(NET_IP_ALIGN);
*
* The downside to this alignment of the IP header is that the DMA is
* now
* unaligned. On some architectures the cost of an unaligned DMA is high
* and this cost outweighs the gains made by aligning the IP header.
*
* Since this trade off varies between architectures, we allow
* NET_IP_ALIGN
* to be overridden.
*/
This new function insl_16 allows to read form 32-bit IO and writes to
16-bit aligned memory. This is useful in above described scenario -
In particular with the AXIS AX88180 Gigabit Ethernet MAC.
Once the device is in 32-bit mode, reads from the RX FIFO always
decrements 4bytes.
While on the other side the destination address in SDRAM is always
16-bit aligned.
If we use skb_reserve(0) the receive buffer is 32-bit aligned but later
we hit a unaligned exception in the IP code.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
3 files changed