qseecom: Add support for key management scheme
Add IOCTLs and APIs for creating and wiping CE HW pipe Keys.
CE HW PIPE keys are not accessible by HLOS (xpu protected
by secure domain). So, HLOS needs to request TZ to set/clear
these PIPE key registers.
This patch adds support for issuing commands to TZ to generate
and wipe keys.
Change-Id: I43777bf20be4f82e37ca39b81b9a9e862e47cea7
Signed-off-by: Mona Hossain <mhossain@codeaurora.org>
diff --git a/arch/arm/mach-msm/include/mach/qseecomi.h b/arch/arm/mach-msm/include/mach/qseecomi.h
index ea02425..20dc851 100644
--- a/arch/arm/mach-msm/include/mach/qseecomi.h
+++ b/arch/arm/mach-msm/include/mach/qseecomi.h
@@ -16,6 +16,8 @@
#include <linux/qseecom.h>
+#define QSEECOM_KEY_ID_SIZE 32
+
enum qseecom_command_scm_resp_type {
QSEOS_APP_ID = 0xEE01,
QSEOS_LISTENER_ID
@@ -141,5 +143,45 @@
unsigned int rsp_len; /* in/out */
};
+/* Key Management requests */
+enum qseecom_qceos_key_gen_cmd_id {
+ QSEOS_GENERATE_KEY = 0x02,
+ QSEOS_SET_KEY,
+ QSEOS_DELETE_KEY,
+ QSEOS_MAX_KEY_COUNT,
+ QSEOS_KEY_CMD_MAX = 0xEFFFFFFF
+};
+
+__packed struct qseecom_key_generate_ireq {
+ uint32_t flags;
+ uint8_t key_id[QSEECOM_KEY_ID_SIZE];
+};
+
+__packed struct qseecom_key_select_ireq {
+ uint32_t ce;
+ uint32_t pipe;
+ uint32_t flags;
+ uint8_t key_id[QSEECOM_KEY_ID_SIZE];
+ unsigned char hash[QSEECOM_HASH_SIZE];
+};
+
+__packed struct qseecom_key_delete_ireq {
+ uint32_t flags;
+ uint8_t key_id[QSEECOM_KEY_ID_SIZE];
+};
+
+__packed struct qseecom_key_max_count_query_ireq {
+ uint32_t flags;
+};
+
+__packed struct qseecom_key_max_count_query_irsp {
+ uint32_t max_key_count;
+};
+
+struct key_id_info {
+ uint32_t ce_hw;
+ uint32_t pipe;
+ bool flags;
+};
#endif /* __QSEECOMI_H_ */
diff --git a/arch/arm/mach-msm/include/mach/scm.h b/arch/arm/mach-msm/include/mach/scm.h
index 0cc7bbf..4258dbd 100644
--- a/arch/arm/mach-msm/include/mach/scm.h
+++ b/arch/arm/mach-msm/include/mach/scm.h
@@ -22,6 +22,7 @@
#define SCM_SVC_FUSE 0x8
#define SCM_SVC_PWR 0x9
#define SCM_SVC_MP 0xC
+#define SCM_SVC_CRYPTO 0xA
#define SCM_SVC_DCVS 0xD
#define SCM_SVC_TZSCHEDULER 0xFC