commit 4dd373d278943ec1a3e1cbe26de9463206074c26
author Matt Wagantall <mattw@codeaurora.org> Mon Jan 23 12:38:18 2012 -0800
committer David Collins <collinsd@codeaurora.org> Wed Jan 25 06:51:28 2012 -0800
tree 97f9ff92dad57f9aa686f88cbb34a6653d692ea3
parent 74010b2fbd46bff61e9392082abc8f4c0a7ef3ae

msm: acpuclock-8960: Add HFPLL regulator voting for 8064

8064's HFPLLs are powered by LVS7. Update the code to reflect
this.

Change-Id: Id091453cb20caebdc81cfb6920352ad3bb73734d
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>

arch/arm/mach-msm/acpuclock-8960.c

diff --git a/arch/arm/mach-msm/acpuclock-8960.c b/arch/arm/mach-msm/acpuclock-8960.c
index 9082b07..cee4fc5 100644
--- a/arch/arm/mach-msm/acpuclock-8960.c
+++ b/arch/arm/mach-msm/acpuclock-8960.c
@@ -200,6 +200,9 @@
 			.vreg[VREG_DIG]  = { "krait0_dig", 1150000,
 					     RPM_VREG_VOTER1,
 					     RPM_VREG_ID_PM8921_S3 },
+			.vreg[VREG_HFPLL_B] = { "hfpll", 1800000,
+					     RPM_VREG_VOTER1,
+					     RPM_VREG_ID_PM8921_LVS7 },
 		},
 	[CPU1] = {
 			.hfpll_base      = MSM_HFPLL_BASE + 0x240,
@@ -212,6 +215,9 @@
 			.vreg[VREG_DIG]  = { "krait0_dig", 1150000,
 					     RPM_VREG_VOTER2,
 					     RPM_VREG_ID_PM8921_S3 },
+			.vreg[VREG_HFPLL_B] = { "hfpll", 1800000,
+					     RPM_VREG_VOTER2,
+					     RPM_VREG_ID_PM8921_LVS7 },
 		},
 	[CPU2] = {
 			.hfpll_base      = MSM_HFPLL_BASE + 0x280,
@@ -224,6 +230,9 @@
 			.vreg[VREG_DIG]  = { "krait0_dig", 1150000,
 					     RPM_VREG_VOTER4,
 					     RPM_VREG_ID_PM8921_S3 },
+			.vreg[VREG_HFPLL_B] = { "hfpll", 1800000,
+					     RPM_VREG_VOTER4,
+					     RPM_VREG_ID_PM8921_LVS7 },
 		},
 	[CPU3] = {
 			.hfpll_base      = MSM_HFPLL_BASE + 0x2C0,
@@ -236,11 +245,17 @@
 			.vreg[VREG_DIG]  = { "krait0_dig", 1150000,
 					     RPM_VREG_VOTER5,
 					     RPM_VREG_ID_PM8921_S3 },
+			.vreg[VREG_HFPLL_B] = { "hfpll", 1800000,
+					     RPM_VREG_VOTER5,
+					     RPM_VREG_ID_PM8921_LVS7 },
 		},
 	[L2] = {
 			.hfpll_base   = MSM_HFPLL_BASE    + 0x300,
 			.aux_clk_sel  = MSM_APCS_GCC_BASE + 0x028,
 			.l2cpmr_iaddr = L2CPMR_IADDR,
+			.vreg[VREG_HFPLL_B] = { "hfpll", 1800000,
+					     RPM_VREG_VOTER6,
+					     RPM_VREG_ID_PM8921_LVS7 },
 		},
 };
 
@@ -741,12 +756,14 @@
 {
 	int rc;
 
-	rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_A].rpm_vreg_id,
-			sc->vreg[VREG_HFPLL_A].rpm_vreg_voter, 2100000,
-			sc->vreg[VREG_HFPLL_A].max_vdd, 0);
-	if (rc)
-		pr_err("%s regulator enable failed (%d)\n",
-			sc->vreg[VREG_HFPLL_A].name, rc);
+	if (!cpu_is_apq8064()) {
+		rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_A].rpm_vreg_id,
+				sc->vreg[VREG_HFPLL_A].rpm_vreg_voter, 2100000,
+				sc->vreg[VREG_HFPLL_A].max_vdd, 0);
+		if (rc)
+			pr_err("%s regulator enable failed (%d)\n",
+				sc->vreg[VREG_HFPLL_A].name, rc);
+	}
 	rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_B].rpm_vreg_id,
 			sc->vreg[VREG_HFPLL_B].rpm_vreg_voter, 1800000,
 			sc->vreg[VREG_HFPLL_B].max_vdd, 0);
@@ -792,12 +809,14 @@
 	if (rc)
 		pr_err("%s regulator enable failed (%d)\n",
 			sc->vreg[VREG_HFPLL_B].name, rc);
-	rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_A].rpm_vreg_id,
-			sc->vreg[VREG_HFPLL_A].rpm_vreg_voter, 0,
-			0, 0);
-	if (rc)
-		pr_err("%s regulator enable failed (%d)\n",
-			sc->vreg[VREG_HFPLL_A].name, rc);
+	if (!cpu_is_apq8064()) {
+		rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_A].rpm_vreg_id,
+				sc->vreg[VREG_HFPLL_A].rpm_vreg_voter, 0,
+				0, 0);
+		if (rc)
+			pr_err("%s regulator enable failed (%d)\n",
+				sc->vreg[VREG_HFPLL_A].name, rc);
+	}
 }
 
 /* Program the HFPLL rate. Assumes HFPLL is already disabled. */