tree e74d910f9937d61c3128526ad10a8f61ba2649fa
parent 65655d4ab72456c4c3e503fead55fabf8211a79d
author Zhenyu Wang <zhenyuw@linux.intel.com> 1251860272 +0800
committer Eric Anholt <eric@anholt.net> 1252094744 -0700

drm/i915: fix tiling on IGDNG

It seems that on IGDNG the same swizzling setup always applys.
And front buffer tiling needs to set address swizzle in display
arb control too.

Fix plane tricle feed setting in v1 which should be disable bit,
and always setup address swizzle to let hardware care for buffer
tiling in all cases.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>