Merge "VFS : mount lock scalability for internal mounts" into msm-3.0
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 2097e0a..0a7fe5f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -222,6 +222,10 @@
to allow physical memory down to a theoretical minimum of 64K
boundaries.
+config GENERIC_BUG
+ def_bool y
+ depends on BUG
+
source "init/Kconfig"
source "kernel/Kconfig.freezer"
diff --git a/arch/arm/configs/msm8660-perf_defconfig b/arch/arm/configs/msm8660-perf_defconfig
index 985d735..bf01b40 100644
--- a/arch/arm/configs/msm8660-perf_defconfig
+++ b/arch/arm/configs/msm8660-perf_defconfig
@@ -62,6 +62,7 @@
CONFIG_MSM_RMT_STORAGE_CLIENT=y
CONFIG_MSM_SDIO_SMEM=y
# CONFIG_MSM_HW3D is not set
+CONFIG_MSM_PIL_QDSP6V3=y
CONFIG_MSM_SUBSYSTEM_RESTART=y
CONFIG_MSM_RPM_LOG=y
CONFIG_MSM_RPM_STATS_LOG=y
diff --git a/arch/arm/configs/msm8660_defconfig b/arch/arm/configs/msm8660_defconfig
index dbde99f..0472ad7 100644
--- a/arch/arm/configs/msm8660_defconfig
+++ b/arch/arm/configs/msm8660_defconfig
@@ -54,6 +54,7 @@
# CONFIG_MSM_RPCSERVER_HANDSET is not set
CONFIG_MSM_RMT_STORAGE_CLIENT=y
# CONFIG_MSM_HW3D is not set
+CONFIG_MSM_PIL_QDSP6V3=y
CONFIG_MSM_SUBSYSTEM_RESTART=y
CONFIG_MSM_RPM_LOG=y
CONFIG_MSM_RPM_STATS_LOG=y
diff --git a/arch/arm/include/asm/bug.h b/arch/arm/include/asm/bug.h
index 4d88425..9abe7a0 100644
--- a/arch/arm/include/asm/bug.h
+++ b/arch/arm/include/asm/bug.h
@@ -3,21 +3,58 @@
#ifdef CONFIG_BUG
-#ifdef CONFIG_DEBUG_BUGVERBOSE
-extern void __bug(const char *file, int line) __attribute__((noreturn));
-/* give file/line information */
-#define BUG() __bug(__FILE__, __LINE__)
-
+/*
+ * Use a suitable undefined instruction to use for ARM/Thumb2 bug handling.
+ * We need to be careful not to conflict with those used by other modules and
+ * the register_undef_hook() system.
+ */
+#ifdef CONFIG_THUMB2_KERNEL
+#define BUG_INSTR_VALUE 0xde02
+#define BUG_INSTR_TYPE ".hword "
#else
-
-/* this just causes an oops */
-#define BUG() do { *(int *)0 = 0; } while (1)
-
+#define BUG_INSTR_VALUE 0xe7f001f2
+#define BUG_INSTR_TYPE ".word "
#endif
+
+#define BUG() _BUG(__FILE__, __LINE__, BUG_INSTR_VALUE)
+#define _BUG(file, line, value) __BUG(file, line, value)
+
+#ifdef CONFIG_DEBUG_BUGVERBOSE
+
+/*
+ * The extra indirection is to ensure that the __FILE__ string comes through
+ * OK. Many version of gcc do not support the asm %c parameter which would be
+ * preferable to this unpleasantness. We use mergeable string sections to
+ * avoid multiple copies of the string appearing in the kernel image.
+ */
+
+#define __BUG(__file, __line, __value) \
+do { \
+ BUILD_BUG_ON(sizeof(struct bug_entry) != 12); \
+ asm volatile("1:\t" BUG_INSTR_TYPE #__value "\n" \
+ ".pushsection .rodata.str, \"aMS\", %progbits, 1\n" \
+ "2:\t.asciz " #__file "\n" \
+ ".popsection\n" \
+ ".pushsection __bug_table,\"a\"\n" \
+ "3:\t.word 1b, 2b\n" \
+ "\t.hword " #__line ", 0\n" \
+ ".popsection"); \
+ unreachable(); \
+} while (0)
+
+#else /* not CONFIG_DEBUG_BUGVERBOSE */
+
+#define __BUG(__file, __line, __value) \
+do { \
+ asm volatile(BUG_INSTR_TYPE #__value); \
+ unreachable(); \
+} while (0)
+#endif /* CONFIG_DEBUG_BUGVERBOSE */
+
#define HAVE_ARCH_BUG
-#endif
+#endif /* CONFIG_BUG */
#include <asm-generic/bug.h>
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 2f8bf62..b0c57a9 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -398,6 +398,15 @@
mcr p15, 0, r0, c1, c0, 0 @ write control reg
mrc p15, 0, r3, c0, c0, 0 @ read id reg
mov r3, r3
+#ifdef CONFIG_ARCH_MSM_KRAIT
+ ldr r3, =0xff00fc00
+ and r3, r9, r3
+ ldr r4, =0x51000400
+ cmp r3, r4
+ mrceq p15, 7, r3, c15, c0, 2
+ biceq r3, r3, #0x400
+ mcreq p15, 7, r3, c15, c0, 2
+#endif
mov r3, r13
mov pc, r3
__enable_mmu_end:
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index c063c56..ef37557 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -21,6 +21,7 @@
#include <linux/kdebug.h>
#include <linux/module.h>
#include <linux/kexec.h>
+#include <linux/bug.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/sched.h>
@@ -270,6 +271,8 @@
raw_spin_lock_irq(&die_lock);
console_verbose();
bust_spinlocks(1);
+ if (!user_mode(regs))
+ report_bug(regs->ARM_pc, regs);
ret = __die(str, err, thread, regs);
if (regs && kexec_should_crash(thread->task))
@@ -301,6 +304,24 @@
}
}
+#ifdef CONFIG_GENERIC_BUG
+
+int is_valid_bugaddr(unsigned long pc)
+{
+#ifdef CONFIG_THUMB2_KERNEL
+ unsigned short bkpt;
+#else
+ unsigned long bkpt;
+#endif
+
+ if (probe_kernel_address((unsigned *)pc, bkpt))
+ return 0;
+
+ return bkpt == BUG_INSTR_VALUE;
+}
+
+#endif
+
static LIST_HEAD(undef_hook);
static DEFINE_RAW_SPINLOCK(undef_lock);
@@ -697,16 +718,6 @@
arm_notify_die("unknown data abort code", regs, &info, instr, 0);
}
-void __attribute__((noreturn)) __bug(const char *file, int line)
-{
- printk(KERN_CRIT"kernel BUG at %s:%d!\n", file, line);
- *(int *)0 = 0;
-
- /* Avoid "noreturn function does return" */
- for (;;);
-}
-EXPORT_SYMBOL(__bug);
-
void __readwrite_bug(const char *fn)
{
printk("%s called, but not implemented\n", fn);
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 8652d45..6530fa3 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -24,7 +24,8 @@
#define ARM_CPU_KEEP(x)
#endif
-#if defined(CONFIG_SMP_ON_UP) && !defined(CONFIG_DEBUG_SPINLOCK)
+#if (defined(CONFIG_SMP_ON_UP) && !defined(CONFIG_DEBUG_SPINLOCK)) || \
+ defined(CONFIG_GENERIC_BUG)
#define ARM_EXIT_KEEP(x) x
#else
#define ARM_EXIT_KEEP(x)
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 204aa5d..7aeb560 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -1580,6 +1580,13 @@
Say yes to support these devices.
+config MSM_PIL_QDSP6V3
+ tristate "QDSP6v3 (Hexagon) Boot Support"
+ depends on MSM_PIL
+ help
+ Support for booting and shutting down QDSP6v3 processors (hexagon).
+ The QDSP6 is a low power DSP used in audio software applications.
+
config MSM_PIL_QDSP6V4
tristate "QDSP6v4 (Hexagon) Boot Support"
depends on MSM_PIL
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 05f4ab4..5fda40c 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -71,6 +71,7 @@
obj-$(CONFIG_ARCH_MSM8X60) += peripheral-reset.o
obj-$(CONFIG_ARCH_MSM8960) += peripheral-reset-8960.o
endif
+obj-$(CONFIG_MSM_PIL_QDSP6V3) += pil-q6v3.o
obj-$(CONFIG_MSM_PIL_QDSP6V4) += pil-q6v4.o
obj-$(CONFIG_ARCH_QSD8X50) += sirc.o
obj-$(CONFIG_ARCH_FSM9XXX) += sirc-fsm9xxx.o
@@ -231,7 +232,7 @@
obj-$(CONFIG_ARCH_APQ8064) += devices-8960.o devices-8064.o
board-8960-all-objs += board-8960.o board-8960-camera.o board-8960-display.o board-8960-pmic.o board-8960-storage.o board-8960-gpiomux.o
board-8930-all-objs += board-8930.o board-8930-camera.o board-8930-display.o board-8930-pmic.o board-8930-storage.o board-8930-gpiomux.o
-board-8064-all-objs += board-8064.o board-8064-storage.o
+board-8064-all-objs += board-8064.o board-8064-pmic.o board-8064-storage.o board-8064-gpiomux.o
obj-$(CONFIG_MACH_MSM8960_SIM) += board-8960-all.o board-8960-regulator.o
obj-$(CONFIG_MACH_MSM8960_RUMI3) += board-8960-all.o board-8960-regulator.o
obj-$(CONFIG_MACH_MSM8960_CDP) += board-8960-all.o board-8960-regulator.o
diff --git a/arch/arm/mach-msm/acpuclock-8960.c b/arch/arm/mach-msm/acpuclock-8960.c
index 82d8173..c9ca339 100644
--- a/arch/arm/mach-msm/acpuclock-8960.c
+++ b/arch/arm/mach-msm/acpuclock-8960.c
@@ -244,6 +244,57 @@
},
};
+/*TODO: Update the rpm vreg id when the rpm driver is ready */
+static struct scalable scalable_8930[] = {
+ [CPU0] = {
+ .hfpll_base = MSM_HFPLL_BASE + 0x200,
+ .aux_clk_sel = MSM_ACC0_BASE + 0x014,
+ .l2cpmr_iaddr = L2CPUCPMR_IADDR,
+ .vreg[VREG_CORE] = { "krait0", 1300000 },
+ .vreg[VREG_MEM] = { "krait0_mem", 1150000,
+ RPM_VREG_VOTER1,
+ RPM_VREG_ID_PM8921_L24 },
+ .vreg[VREG_DIG] = { "krait0_dig", 1150000,
+ RPM_VREG_VOTER1,
+ RPM_VREG_ID_PM8921_S3 },
+ .vreg[VREG_HFPLL_A] = { "hfpll", 2100000,
+ RPM_VREG_VOTER1,
+ RPM_VREG_ID_PM8921_S8 },
+ .vreg[VREG_HFPLL_B] = { "hfpll", 1800000,
+ RPM_VREG_VOTER1,
+ RPM_VREG_ID_PM8921_L23 },
+ },
+ [CPU1] = {
+ .hfpll_base = MSM_HFPLL_BASE + 0x300,
+ .aux_clk_sel = MSM_ACC1_BASE + 0x014,
+ .l2cpmr_iaddr = L2CPUCPMR_IADDR,
+ .vreg[VREG_CORE] = { "krait1", 1300000 },
+ .vreg[VREG_MEM] = { "krait0_mem", 1150000,
+ RPM_VREG_VOTER2,
+ RPM_VREG_ID_PM8921_L24 },
+ .vreg[VREG_DIG] = { "krait0_dig", 1150000,
+ RPM_VREG_VOTER2,
+ RPM_VREG_ID_PM8921_S3 },
+ .vreg[VREG_HFPLL_A] = { "hfpll", 2100000,
+ RPM_VREG_VOTER2,
+ RPM_VREG_ID_PM8921_S8 },
+ .vreg[VREG_HFPLL_B] = { "hfpll", 1800000,
+ RPM_VREG_VOTER2,
+ RPM_VREG_ID_PM8921_L23 },
+ },
+ [L2] = {
+ .hfpll_base = MSM_HFPLL_BASE + 0x400,
+ .aux_clk_sel = MSM_APCS_GCC_BASE + 0x028,
+ .l2cpmr_iaddr = L2CPMR_IADDR,
+ .vreg[VREG_HFPLL_A] = { "hfpll", 2100000,
+ RPM_VREG_VOTER6,
+ RPM_VREG_ID_PM8921_S8 },
+ .vreg[VREG_HFPLL_B] = { "hfpll", 1800000,
+ RPM_VREG_VOTER6,
+ RPM_VREG_ID_PM8921_L23 },
+ },
+};
+
static struct scalable *scalable;
static struct l2_level *l2_freq_tbl;
static struct acpu_level *acpu_freq_tbl;
@@ -461,6 +512,51 @@
{ 0, { 0 } }
};
+/* TODO: Update vdd_dig, vdd_mem and bw when data is available. */
+#undef L2
+#define L2(x) (&l2_freq_tbl_8930[(x)])
+static struct l2_level l2_freq_tbl_8930[] = {
+ [0] = { {STBY_KHZ, QSB, 0, 0, 0x00 }, 1050000, 1050000, 0 },
+ [1] = { { 384000, PLL_8, 0, 2, 0x00 }, 1050000, 1050000, 1 },
+ [2] = { { 432000, HFPLL, 2, 0, 0x20 }, 1050000, 1050000, 1 },
+ [3] = { { 486000, HFPLL, 2, 0, 0x24 }, 1050000, 1050000, 1 },
+ [4] = { { 540000, HFPLL, 2, 0, 0x28 }, 1050000, 1050000, 1 },
+ [5] = { { 594000, HFPLL, 1, 0, 0x16 }, 1050000, 1050000, 2 },
+ [6] = { { 648000, HFPLL, 1, 0, 0x18 }, 1050000, 1050000, 2 },
+ [7] = { { 702000, HFPLL, 1, 0, 0x1A }, 1050000, 1050000, 2 },
+ [8] = { { 756000, HFPLL, 1, 0, 0x1C }, 1150000, 1150000, 2 },
+ [9] = { { 810000, HFPLL, 1, 0, 0x1E }, 1150000, 1150000, 3 },
+ [10] = { { 864000, HFPLL, 1, 0, 0x20 }, 1150000, 1150000, 3 },
+ [11] = { { 918000, HFPLL, 1, 0, 0x22 }, 1150000, 1150000, 3 },
+ [12] = { { 972000, HFPLL, 1, 0, 0x24 }, 1150000, 1150000, 3 },
+ [13] = { { 1026000, HFPLL, 1, 0, 0x26 }, 1150000, 1150000, 4 },
+ [14] = { { 1080000, HFPLL, 1, 0, 0x28 }, 1150000, 1150000, 4 },
+ [15] = { { 1134000, HFPLL, 1, 0, 0x2A }, 1150000, 1150000, 4 },
+ [16] = { { 1188000, HFPLL, 1, 0, 0x2C }, 1150000, 1150000, 4 },
+};
+
+/* TODO: Update core voltages when data is available. */
+static struct acpu_level acpu_freq_tbl_8930[] = {
+ { 0, { STBY_KHZ, QSB, 0, 0, 0x00 }, L2(0), 900000 },
+ { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(1), 900000 },
+ { 1, { 432000, HFPLL, 2, 0, 0x20 }, L2(6), 925000 },
+ { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(6), 925000 },
+ { 1, { 540000, HFPLL, 2, 0, 0x28 }, L2(6), 937500 },
+ { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(6), 962500 },
+ { 1, { 648000, HFPLL, 1, 0, 0x18 }, L2(6), 987500 },
+ { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(6), 1000000 },
+ { 1, { 756000, HFPLL, 1, 0, 0x1C }, L2(11), 1025000 },
+ { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(11), 1062500 },
+ { 1, { 864000, HFPLL, 1, 0, 0x20 }, L2(11), 1062500 },
+ { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(11), 1087500 },
+ { 1, { 972000, HFPLL, 1, 0, 0x24 }, L2(16), 1100000 },
+ { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(16), 1100000 },
+ { 1, { 1080000, HFPLL, 1, 0, 0x28 }, L2(16), 1100000 },
+ { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(16), 1100000 },
+ { 1, { 1188000, HFPLL, 1, 0, 0x2C }, L2(16), 1125000 },
+ { 0, { 0 } }
+};
+
static unsigned long acpuclk_8960_get_rate(int cpu)
{
return scalable[cpu].current_speed->khz;
@@ -527,7 +623,7 @@
{
int rc;
- if (cpu_is_msm8960()) {
+ if (cpu_is_msm8960() || cpu_is_msm8930()) {
rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_A].rpm_vreg_id,
sc->vreg[VREG_HFPLL_A].rpm_vreg_voter, 2100000,
sc->vreg[VREG_HFPLL_A].max_vdd, 0);
@@ -574,7 +670,7 @@
*/
writel_relaxed(0, sc->hfpll_base + HFPLL_MODE);
- if (cpu_is_msm8960()) {
+ if (cpu_is_msm8960() || cpu_is_msm8930()) {
rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_B].rpm_vreg_id,
sc->vreg[VREG_HFPLL_B].rpm_vreg_voter, 0,
0, 0);
@@ -1122,7 +1218,7 @@
struct acpu_level *l, *max_acpu_level = NULL;
/* Select frequency tables. */
- if (cpu_is_msm8960() || cpu_is_msm8930()) {
+ if (cpu_is_msm8960()) {
uint32_t pte_efuse, pvs;
struct acpu_level *v1, *v2;
@@ -1170,6 +1266,11 @@
acpu_freq_tbl = acpu_freq_tbl_8064;
l2_freq_tbl = l2_freq_tbl_8064;
l2_freq_tbl_size = ARRAY_SIZE(l2_freq_tbl_8064);
+ } else if (cpu_is_msm8930()) {
+ scalable = scalable_8930;
+ acpu_freq_tbl = acpu_freq_tbl_8930;
+ l2_freq_tbl = l2_freq_tbl_8930;
+ l2_freq_tbl_size = ARRAY_SIZE(l2_freq_tbl_8930);
} else {
BUG();
}
@@ -1210,3 +1311,7 @@
struct acpuclk_soc_data acpuclk_8960_soc_data __initdata = {
.init = acpuclk_8960_init,
};
+
+struct acpuclk_soc_data acpuclk_8930_soc_data __initdata = {
+ .init = acpuclk_8960_init,
+};
diff --git a/arch/arm/mach-msm/acpuclock.h b/arch/arm/mach-msm/acpuclock.h
index 2b188d8..b12258f 100644
--- a/arch/arm/mach-msm/acpuclock.h
+++ b/arch/arm/mach-msm/acpuclock.h
@@ -109,5 +109,6 @@
extern struct acpuclk_soc_data acpuclk_8960_soc_data;
extern struct acpuclk_soc_data acpuclk_9xxx_soc_data;
extern struct acpuclk_soc_data acpuclk_9615_soc_data;
+extern struct acpuclk_soc_data acpuclk_8930_soc_data;
#endif
diff --git a/arch/arm/mach-msm/board-8064-gpiomux.c b/arch/arm/mach-msm/board-8064-gpiomux.c
new file mode 100644
index 0000000..50673b4
--- /dev/null
+++ b/arch/arm/mach-msm/board-8064-gpiomux.c
@@ -0,0 +1,154 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/platform_device.h>
+#include <linux/bootmem.h>
+#include <asm/mach-types.h>
+#include <asm/mach/mmc.h>
+#include <mach/msm_bus_board.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
+#include <mach/gpiomux.h>
+#include "devices.h"
+#include "board-8064.h"
+
+#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE)
+static struct gpiomux_setting gpio_eth_config = {
+ .pull = GPIOMUX_PULL_NONE,
+ .drv = GPIOMUX_DRV_8MA,
+ .func = GPIOMUX_FUNC_GPIO,
+};
+
+/* The SPI configurations apply to GSBI 5*/
+static struct gpiomux_setting gpio_spi_config = {
+ .func = GPIOMUX_FUNC_2,
+ .drv = GPIOMUX_DRV_8MA,
+ .pull = GPIOMUX_PULL_NONE,
+};
+
+/* The SPI configurations apply to GSBI 5 chip select 2*/
+static struct gpiomux_setting gpio_spi_cs2_config = {
+ .func = GPIOMUX_FUNC_3,
+ .drv = GPIOMUX_DRV_8MA,
+ .pull = GPIOMUX_PULL_NONE,
+};
+
+struct msm_gpiomux_config apq8064_ethernet_configs[] = {
+ {
+ .gpio = 43,
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_eth_config,
+ [GPIOMUX_ACTIVE] = &gpio_eth_config,
+ }
+ },
+};
+#endif
+
+static struct gpiomux_setting audio_auxpcm[] = {
+ /* Suspended state */
+ {
+ .func = GPIOMUX_FUNC_GPIO,
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_NONE,
+ },
+ /* Active state */
+ {
+ .func = GPIOMUX_FUNC_1,
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_NONE,
+ },
+};
+
+static struct msm_gpiomux_config apq8064_gsbi_configs[] __initdata = {
+#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE)
+ {
+ .gpio = 51, /* GSBI5 QUP SPI_DATA_MOSI */
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_spi_config,
+ },
+ },
+ {
+ .gpio = 52, /* GSBI5 QUP SPI_DATA_MISO */
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_spi_config,
+ },
+ },
+ {
+ .gpio = 31, /* GSBI5 QUP SPI_CS2_N */
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_spi_cs2_config,
+ },
+ },
+ {
+ .gpio = 54, /* GSBI5 QUP SPI_CLK */
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_spi_config,
+ },
+ },
+#endif
+};
+
+static struct msm_gpiomux_config apq8064_audio_auxpcm_configs[] __initdata = {
+ {
+ .gpio = 43,
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &audio_auxpcm[0],
+ [GPIOMUX_ACTIVE] = &audio_auxpcm[1],
+ },
+ },
+ {
+ .gpio = 44,
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &audio_auxpcm[0],
+ [GPIOMUX_ACTIVE] = &audio_auxpcm[1],
+ },
+ },
+ {
+ .gpio = 45,
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &audio_auxpcm[0],
+ [GPIOMUX_ACTIVE] = &audio_auxpcm[1],
+ },
+ },
+ {
+ .gpio = 46,
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &audio_auxpcm[0],
+ [GPIOMUX_ACTIVE] = &audio_auxpcm[1],
+ },
+ },
+};
+
+void __init apq8064_init_gpiomux(void)
+{
+ int rc;
+
+ rc = msm_gpiomux_init(NR_GPIO_IRQS);
+ if (rc) {
+ pr_err(KERN_ERR "msm_gpiomux_init failed %d\n", rc);
+ return;
+ }
+
+#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE)
+ msm_gpiomux_install(apq8064_ethernet_configs,
+ ARRAY_SIZE(apq8064_ethernet_configs));
+#endif
+
+ msm_gpiomux_install(apq8064_gsbi_configs,
+ ARRAY_SIZE(apq8064_gsbi_configs));
+
+ msm_gpiomux_install(apq8064_audio_auxpcm_configs,
+ ARRAY_SIZE(apq8064_audio_auxpcm_configs));
+}
diff --git a/arch/arm/mach-msm/board-8064-pmic.c b/arch/arm/mach-msm/board-8064-pmic.c
new file mode 100644
index 0000000..032d8da
--- /dev/null
+++ b/arch/arm/mach-msm/board-8064-pmic.c
@@ -0,0 +1,102 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/platform_device.h>
+#include <linux/bootmem.h>
+#include <asm/mach-types.h>
+#include <asm/mach/mmc.h>
+#include <mach/msm_bus_board.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
+#include <mach/gpiomux.h>
+#include "devices.h"
+#include "board-8064.h"
+
+
+static struct pm8xxx_mpp_platform_data
+apq8064_pm8921_mpp_pdata __devinitdata = {
+ .mpp_base = PM8921_MPP_PM_TO_SYS(1),
+};
+
+static struct pm8xxx_gpio_platform_data
+apq8064_pm8921_gpio_pdata __devinitdata = {
+ .gpio_base = PM8921_GPIO_PM_TO_SYS(1),
+};
+
+static struct pm8xxx_irq_platform_data
+apq8064_pm8921_irq_pdata __devinitdata = {
+ .irq_base = PM8921_IRQ_BASE,
+ .devirq = PM8921_USR_IRQ_N,
+ .irq_trigger_flag = IRQF_TRIGGER_HIGH,
+ .dev_id = 0,
+};
+
+static struct pm8921_platform_data
+apq8064_pm8921_platform_data __devinitdata = {
+ .regulator_pdatas = msm8064_pm8921_regulator_pdata,
+ .irq_pdata = &apq8064_pm8921_irq_pdata,
+ .gpio_pdata = &apq8064_pm8921_gpio_pdata,
+ .mpp_pdata = &apq8064_pm8921_mpp_pdata,
+};
+
+static struct pm8xxx_irq_platform_data
+apq8064_pm8821_irq_pdata __devinitdata = {
+ .irq_base = PM8821_IRQ_BASE,
+ .devirq = PM8821_USR_IRQ_N,
+ .irq_trigger_flag = IRQF_TRIGGER_HIGH,
+ .dev_id = 1,
+};
+
+static struct pm8xxx_mpp_platform_data
+apq8064_pm8821_mpp_pdata __devinitdata = {
+ .mpp_base = PM8821_MPP_PM_TO_SYS(1),
+};
+
+static struct pm8821_platform_data
+apq8064_pm8821_platform_data __devinitdata = {
+ .irq_pdata = &apq8064_pm8821_irq_pdata,
+ .mpp_pdata = &apq8064_pm8821_mpp_pdata,
+};
+
+static struct msm_ssbi_platform_data apq8064_ssbi_pm8921_pdata __devinitdata = {
+ .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
+ .slave = {
+ .name = "pm8921-core",
+ .platform_data = &apq8064_pm8921_platform_data,
+ },
+};
+
+static struct msm_ssbi_platform_data apq8064_ssbi_pm8821_pdata __devinitdata = {
+ .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
+ .slave = {
+ .name = "pm8821-core",
+ .platform_data = &apq8064_pm8821_platform_data,
+ },
+};
+
+void __init apq8064_init_pmic(void)
+{
+ apq8064_device_ssbi_pmic1.dev.platform_data =
+ &apq8064_ssbi_pm8921_pdata;
+ apq8064_device_ssbi_pmic2.dev.platform_data =
+ &apq8064_ssbi_pm8821_pdata;
+ apq8064_pm8921_platform_data.num_regulators =
+ msm8064_pm8921_regulator_pdata_len;
+
+ if (machine_is_apq8064_rumi3()) {
+ apq8064_pm8921_irq_pdata.devirq = 0;
+ apq8064_pm8821_irq_pdata.devirq = 0;
+ }
+}
diff --git a/arch/arm/mach-msm/board-8064.c b/arch/arm/mach-msm/board-8064.c
index 6e2c044..4dcc626 100644
--- a/arch/arm/mach-msm/board-8064.c
+++ b/arch/arm/mach-msm/board-8064.c
@@ -152,7 +152,6 @@
apq8064_reserve_table[p->memory_type].size += p->size;
}
-
static void __init reserve_pmem_memory(void)
{
reserve_memory_for(&android_pmem_adsp_pdata);
@@ -521,130 +520,6 @@
},
};
-#ifdef CONFIG_KS8851
-static struct gpiomux_setting gpio_eth_config = {
- .pull = GPIOMUX_PULL_NONE,
- .drv = GPIOMUX_DRV_8MA,
- .func = GPIOMUX_FUNC_GPIO,
-};
-
-/* The SPI configurations apply to GSBI 5*/
-static struct gpiomux_setting gpio_spi_config = {
- .func = GPIOMUX_FUNC_2,
- .drv = GPIOMUX_DRV_8MA,
- .pull = GPIOMUX_PULL_NONE,
-};
-
-/* The SPI configurations apply to GSBI 5 chip select 2*/
-static struct gpiomux_setting gpio_spi_cs2_config = {
- .func = GPIOMUX_FUNC_3,
- .drv = GPIOMUX_DRV_8MA,
- .pull = GPIOMUX_PULL_NONE,
-};
-#endif
-
-struct msm_gpiomux_config apq8064_ethernet_configs[NR_GPIO_IRQS] = {
-#ifdef CONFIG_KS8851
- {
- .gpio = KS8851_IRQ_GPIO,
- .settings = {
- [GPIOMUX_SUSPENDED] = &gpio_eth_config,
- [GPIOMUX_ACTIVE] = &gpio_eth_config,
- }
- },
-#endif
-};
-
-static struct msm_gpiomux_config apq8064_gsbi_configs[] __initdata = {
-#ifdef CONFIG_KS8851
- {
- .gpio = 51, /* GSBI5 QUP SPI_DATA_MOSI */
- .settings = {
- [GPIOMUX_SUSPENDED] = &gpio_spi_config,
- },
- },
- {
- .gpio = 52, /* GSBI5 QUP SPI_DATA_MISO */
- .settings = {
- [GPIOMUX_SUSPENDED] = &gpio_spi_config,
- },
- },
- {
- .gpio = 31, /* GSBI5 QUP SPI_CS2_N */
- .settings = {
- [GPIOMUX_SUSPENDED] = &gpio_spi_cs2_config,
- },
- },
- {
- .gpio = 54, /* GSBI5 QUP SPI_CLK */
- .settings = {
- [GPIOMUX_SUSPENDED] = &gpio_spi_config,
- },
- },
-#endif
-};
-
-static struct pm8xxx_mpp_platform_data
-apq8064_pm8921_mpp_pdata __devinitdata = {
- .mpp_base = PM8921_MPP_PM_TO_SYS(1),
-};
-
-static struct pm8xxx_gpio_platform_data
-apq8064_pm8921_gpio_pdata __devinitdata = {
- .gpio_base = PM8921_GPIO_PM_TO_SYS(1),
-};
-
-static struct pm8xxx_irq_platform_data
-apq8064_pm8921_irq_pdata __devinitdata = {
- .irq_base = PM8921_IRQ_BASE,
- .devirq = PM8921_USR_IRQ_N,
- .irq_trigger_flag = IRQF_TRIGGER_HIGH,
- .dev_id = 0,
-};
-
-static struct pm8921_platform_data
-apq8064_pm8921_platform_data __devinitdata = {
- .regulator_pdatas = msm8064_pm8921_regulator_pdata,
- .irq_pdata = &apq8064_pm8921_irq_pdata,
- .gpio_pdata = &apq8064_pm8921_gpio_pdata,
- .mpp_pdata = &apq8064_pm8921_mpp_pdata,
-};
-
-static struct pm8xxx_irq_platform_data
-apq8064_pm8821_irq_pdata __devinitdata = {
- .irq_base = PM8821_IRQ_BASE,
- .devirq = PM8821_USR_IRQ_N,
- .irq_trigger_flag = IRQF_TRIGGER_HIGH,
- .dev_id = 1,
-};
-
-static struct pm8xxx_mpp_platform_data
-apq8064_pm8821_mpp_pdata __devinitdata = {
- .mpp_base = PM8821_MPP_PM_TO_SYS(1),
-};
-
-static struct pm8821_platform_data
-apq8064_pm8821_platform_data __devinitdata = {
- .irq_pdata = &apq8064_pm8821_irq_pdata,
- .mpp_pdata = &apq8064_pm8821_mpp_pdata,
-};
-
-static struct msm_ssbi_platform_data apq8064_ssbi_pm8921_pdata __devinitdata = {
- .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
- .slave = {
- .name = "pm8921-core",
- .platform_data = &apq8064_pm8921_platform_data,
- },
-};
-
-static struct msm_ssbi_platform_data apq8064_ssbi_pm8821_pdata __devinitdata = {
- .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
- .slave = {
- .name = "pm8821-core",
- .platform_data = &apq8064_pm8821_platform_data,
- },
-};
-
static struct slim_boardinfo apq8064_slim_devices[] = {
{
.bus_num = 1,
@@ -658,77 +533,12 @@
.src_clk_rate = 24000000,
};
-
-static struct gpiomux_setting audio_auxpcm[] = {
- /* Suspended state */
- {
- .func = GPIOMUX_FUNC_GPIO,
- .drv = GPIOMUX_DRV_2MA,
- .pull = GPIOMUX_PULL_NONE,
- },
- /* Active state */
- {
- .func = GPIOMUX_FUNC_1,
- .drv = GPIOMUX_DRV_2MA,
- .pull = GPIOMUX_PULL_NONE,
- },
-};
-static struct msm_gpiomux_config apq8064_audio_auxpcm_configs[] __initdata = {
- {
- .gpio = 43,
- .settings = {
- [GPIOMUX_SUSPENDED] = &audio_auxpcm[0],
- [GPIOMUX_ACTIVE] = &audio_auxpcm[1],
- },
- },
- {
- .gpio = 44,
- .settings = {
- [GPIOMUX_SUSPENDED] = &audio_auxpcm[0],
- [GPIOMUX_ACTIVE] = &audio_auxpcm[1],
- },
- },
- {
- .gpio = 45,
- .settings = {
- [GPIOMUX_SUSPENDED] = &audio_auxpcm[0],
- [GPIOMUX_ACTIVE] = &audio_auxpcm[1],
- },
- },
- {
- .gpio = 46,
- .settings = {
- [GPIOMUX_SUSPENDED] = &audio_auxpcm[0],
- [GPIOMUX_ACTIVE] = &audio_auxpcm[1],
- },
- },
-};
-
static void __init apq8064_i2c_init(void)
{
apq8064_device_qup_i2c_gsbi4.dev.platform_data =
&apq8064_i2c_qup_gsbi4_pdata;
}
-static int __init gpiomux_init(void)
-{
- int rc;
-
- rc = msm_gpiomux_init(NR_GPIO_IRQS);
- if (rc) {
- pr_err(KERN_ERR "msm_gpiomux_init failed %d\n", rc);
- return rc;
- }
- msm_gpiomux_install(apq8064_ethernet_configs,
- ARRAY_SIZE(apq8064_ethernet_configs));
-
- msm_gpiomux_install(apq8064_gsbi_configs,
- ARRAY_SIZE(apq8064_gsbi_configs));
- msm_gpiomux_install(apq8064_audio_auxpcm_configs,
- ARRAY_SIZE(apq8064_audio_auxpcm_configs));
- return 0;
-}
-
#ifdef CONFIG_KS8851
static int ethernet_init(void)
{
@@ -763,18 +573,13 @@
if (socinfo_init() < 0)
pr_err("socinfo_init() failed!\n");
apq8064_clock_init();
- gpiomux_init();
+ apq8064_init_gpiomux();
apq8064_i2c_init();
apq8064_device_qup_spi_gsbi5.dev.platform_data =
&apq8064_qup_spi_gsbi5_pdata;
- apq8064_device_ssbi_pmic1.dev.platform_data =
- &apq8064_ssbi_pm8921_pdata;
- apq8064_device_ssbi_pmic2.dev.platform_data =
- &apq8064_ssbi_pm8821_pdata;
+ apq8064_init_pmic();
apq8064_device_otg.dev.platform_data = &msm_otg_pdata;
- apq8064_pm8921_platform_data.num_regulators =
- msm8064_pm8921_regulator_pdata_len;
platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
apq8064_init_mmc();
slim_register_board_info(apq8064_slim_devices,
@@ -793,8 +598,6 @@
static void __init apq8064_rumi3_init(void)
{
- apq8064_pm8921_irq_pdata.devirq = 0;
- apq8064_pm8821_irq_pdata.devirq = 0;
apq8064_common_init();
ethernet_init();
platform_add_devices(rumi3_devices, ARRAY_SIZE(rumi3_devices));
diff --git a/arch/arm/mach-msm/board-8064.h b/arch/arm/mach-msm/board-8064.h
index d9da00a..4a48897 100644
--- a/arch/arm/mach-msm/board-8064.h
+++ b/arch/arm/mach-msm/board-8064.h
@@ -42,4 +42,6 @@
struct mmc_platform_data *plat);
void apq8064_init_mmc(void);
+void apq8064_init_gpiomux(void);
+void apq8064_init_pmic(void);
#endif
diff --git a/arch/arm/mach-msm/board-8930.c b/arch/arm/mach-msm/board-8930.c
index d6c6ec8..5cf6c78 100644
--- a/arch/arm/mach-msm/board-8930.c
+++ b/arch/arm/mach-msm/board-8930.c
@@ -1996,7 +1996,7 @@
msm8930_init_hsic();
msm8930_init_cam();
msm8930_init_mmc();
- acpuclk_init(&acpuclk_8960_soc_data);
+ acpuclk_init(&acpuclk_8930_soc_data);
register_i2c_devices();
msm8930_init_fb();
slim_register_board_info(msm_slim_devices,
diff --git a/arch/arm/mach-msm/board-8960-camera.c b/arch/arm/mach-msm/board-8960-camera.c
index 9e97e3f..6de6b65 100644
--- a/arch/arm/mach-msm/board-8960-camera.c
+++ b/arch/arm/mach-msm/board-8960-camera.c
@@ -131,7 +131,7 @@
{
.gpio = 5,
.settings = {
- [GPIOMUX_ACTIVE] = &cam_settings[1],
+ [GPIOMUX_ACTIVE] = &cam_settings[3],
[GPIOMUX_SUSPENDED] = &cam_settings[0],
},
},
diff --git a/arch/arm/mach-msm/board-8960-pmic.c b/arch/arm/mach-msm/board-8960-pmic.c
index 5e1ea0d..c5d47f4 100644
--- a/arch/arm/mach-msm/board-8960-pmic.c
+++ b/arch/arm/mach-msm/board-8960-pmic.c
@@ -403,10 +403,11 @@
325,
};
+#define MAX_VOLTAGE_MV 4200
static struct pm8921_charger_platform_data pm8921_chg_pdata __devinitdata = {
.safety_time = 180,
.update_time = 60000,
- .max_voltage = 4200,
+ .max_voltage = MAX_VOLTAGE_MV,
.min_voltage = 3200,
.resume_voltage_delta = 100,
.term_current = 100,
@@ -431,6 +432,7 @@
.i_test = 2500,
.v_failure = 3000,
.calib_delay_ms = 600000,
+ .max_voltage_uv = MAX_VOLTAGE_MV * 1000,
};
#define PM8921_LC_LED_MAX_CURRENT 4 /* I = 4mA */
diff --git a/arch/arm/mach-msm/board-8960.c b/arch/arm/mach-msm/board-8960.c
index cadaa4d..be5e02a 100644
--- a/arch/arm/mach-msm/board-8960.c
+++ b/arch/arm/mach-msm/board-8960.c
@@ -114,11 +114,20 @@
.io_open_drain_ena = 0x0,
.irq_summary = -1,
},
+ [SX150X_LIQUID] = {
+ .gpio_base = GPIO_LIQUID_EXPANDER_BASE,
+ .oscio_is_gpo = false,
+ .io_pullup_ena = 0x0c08,
+ .io_pulldn_ena = 0x4060,
+ .io_open_drain_ena = 0x000c,
+ .io_polarity = 0,
+ .irq_summary = -1,
+ },
};
#endif
-#define MSM_PMEM_ADSP_SIZE 0x3800000
+#define MSM_PMEM_ADSP_SIZE 0x4200000
#define MSM_PMEM_AUDIO_SIZE 0x28B000
#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
#define MSM_PMEM_SIZE 0x4000000 /* 64 Mbytes */
@@ -1986,6 +1995,13 @@
};
#endif /* CONFIG_ISL9519_CHARGER */
+static struct i2c_board_info liquid_io_expander_i2c_info[] __initdata = {
+ {
+ I2C_BOARD_INFO("sx1508q", 0x20),
+ .platform_data = &msm8960_sx150x_data[SX150X_LIQUID]
+ },
+};
+
static struct i2c_registry msm8960_i2c_devices[] __initdata = {
#ifdef CONFIG_MSM_CAMERA
{
@@ -2027,6 +2043,12 @@
msm_isa1200_board_info,
ARRAY_SIZE(msm_isa1200_board_info),
},
+ {
+ I2C_LIQUID,
+ MSM_8960_GSBI10_QUP_I2C_BUS_ID,
+ liquid_io_expander_i2c_info,
+ ARRAY_SIZE(liquid_io_expander_i2c_info),
+ },
};
#endif /* CONFIG_I2C */
diff --git a/arch/arm/mach-msm/board-8960.h b/arch/arm/mach-msm/board-8960.h
index 56fa3ca..e22868f 100644
--- a/arch/arm/mach-msm/board-8960.h
+++ b/arch/arm/mach-msm/board-8960.h
@@ -57,12 +57,13 @@
GPIO_CAM_GP_XMT_FLASH_INT,
GPIO_CAM_GP_LED_EN1,
GPIO_CAM_GP_LED_EN2,
-
+ GPIO_LIQUID_EXPANDER_BASE = GPIO_CAM_EXPANDER_BASE + 8,
};
#endif
enum {
SX150X_CAM,
+ SX150X_LIQUID,
};
#endif
diff --git a/arch/arm/mach-msm/board-9615-regulator.c b/arch/arm/mach-msm/board-9615-regulator.c
index c4b7c5a..7cf4a8c 100644
--- a/arch/arm/mach-msm/board-9615-regulator.c
+++ b/arch/arm/mach-msm/board-9615-regulator.c
@@ -75,6 +75,7 @@
};
VREG_CONSUMERS(S3) = {
REGULATOR_SUPPLY("8018_s3", NULL),
+ REGULATOR_SUPPLY("wlan_vreg", "wlan_ar6000_pm_dev"),
};
VREG_CONSUMERS(S4) = {
REGULATOR_SUPPLY("8018_s4", NULL),
diff --git a/arch/arm/mach-msm/board-msm7x27a.c b/arch/arm/mach-msm/board-msm7x27a.c
index f369c6c..f9beced 100644
--- a/arch/arm/mach-msm/board-msm7x27a.c
+++ b/arch/arm/mach-msm/board-msm7x27a.c
@@ -554,7 +554,7 @@
};
static struct bt_vreg_info bt_vregs[] = {
{"msme1", 2, 1800000, 1800000, 0, NULL},
- {"bt", 21, 2900000, 3050000, 1, NULL}
+ {"bt", 21, 2900000, 3300000, 1, NULL}
};
static int bahama_bt(int on)
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 765f49e..0a539c5 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -5082,6 +5082,7 @@
static struct platform_device *surf_devices[] __initdata = {
&msm_device_smd,
&msm_device_uart_dm12,
+ &msm_pil_q6v3,
#ifdef CONFIG_I2C_QUP
&msm_gsbi3_qup_i2c_device,
&msm_gsbi4_qup_i2c_device,
@@ -6633,6 +6634,10 @@
PM8901_VREG_INIT_VS(HDMI_MVS),
};
+static struct pm8xxx_misc_platform_data pm8901_misc_pdata = {
+ .priority = 1,
+};
+
static struct pm8xxx_irq_platform_data pm8901_irq_pdata = {
.irq_base = PM8901_IRQ_BASE,
.devirq = MSM_GPIO_TO_INT(PM8901_GPIO_INT),
@@ -6648,6 +6653,7 @@
.mpp_pdata = &pm8901_mpp_pdata,
.regulator_pdatas = pm8901_vreg_init,
.num_regulators = ARRAY_SIZE(pm8901_vreg_init),
+ .misc_pdata = &pm8901_misc_pdata,
};
static struct msm_ssbi_platform_data msm8x60_ssbi_pm8901_pdata __devinitdata = {
diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index 841c899..ed5f265 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -41,6 +41,7 @@
#define REG_GCC(off) (MSM_APCS_GCC_BASE + (off))
/* Peripheral clock registers. */
+#define ADM0_PBUS_CLK_CTL_REG REG(0x2208)
#define CE1_HCLK_CTL_REG REG(0x2720)
#define CE1_CORE_CLK_CTL_REG REG(0x2724)
#define CE3_HCLK_CTL_REG REG(0x36C4)
@@ -109,6 +110,7 @@
#define RINGOSC_NS_REG REG(0x2DC0)
#define RINGOSC_STATUS_REG REG(0x2DCC)
#define RINGOSC_TCXO_CTL_REG REG(0x2DC4)
+#define RPM_MSG_RAM_HCLK_CTL_REG REG(0x27E0)
#define SC0_U_CLK_BRANCH_ENA_VOTE_REG REG(0x3080)
#define SDCn_APPS_CLK_MD_REG(n) REG(0x2828+(0x20*((n)-1)))
#define SDCn_APPS_CLK_NS_REG(n) REG(0x282C+(0x20*((n)-1)))
@@ -631,14 +633,12 @@
},
};
-static int soc_clk_reset(struct clk *clk, enum clk_reset_action action)
-{
- return branch_reset(&to_rcg_clk(clk)->b, action);
-}
-
static struct clk_ops clk_ops_rcg_8960 = {
.enable = rcg_clk_enable,
.disable = rcg_clk_disable,
+ .enable_hwcg = rcg_clk_enable_hwcg,
+ .disable_hwcg = rcg_clk_disable_hwcg,
+ .in_hwcg_mode = rcg_clk_in_hwcg_mode,
.auto_off = rcg_clk_disable,
.handoff = rcg_clk_handoff,
.set_rate = rcg_clk_set_rate,
@@ -646,7 +646,7 @@
.list_rate = rcg_clk_list_rate,
.is_enabled = rcg_clk_is_enabled,
.round_rate = rcg_clk_round_rate,
- .reset = soc_clk_reset,
+ .reset = rcg_clk_reset,
.is_local = local_clk_is_local,
.get_parent = rcg_clk_get_parent,
};
@@ -654,12 +654,16 @@
static struct clk_ops clk_ops_branch = {
.enable = branch_clk_enable,
.disable = branch_clk_disable,
+ .enable_hwcg = branch_clk_enable_hwcg,
+ .disable_hwcg = branch_clk_disable_hwcg,
+ .in_hwcg_mode = branch_clk_in_hwcg_mode,
.auto_off = branch_clk_disable,
.is_enabled = branch_clk_is_enabled,
.reset = branch_clk_reset,
.is_local = local_clk_is_local,
.get_parent = branch_clk_get_parent,
.set_parent = branch_clk_set_parent,
+ .handoff = branch_clk_handoff,
};
static struct clk_ops clk_ops_reset = {
@@ -686,6 +690,8 @@
.b = {
.ctl_reg = MAXI_EN_REG,
.en_mask = BIT(21),
+ .hwcg_reg = MAXI_EN_REG,
+ .hwcg_mask = BIT(11),
.reset_reg = SW_RESET_AXI_REG,
.reset_mask = BIT(14),
.halt_reg = DBG_BUS_VEC_E_REG,
@@ -702,6 +708,8 @@
.b = {
.ctl_reg = MAXI_EN_REG,
.en_mask = BIT(22),
+ .hwcg_reg = MAXI_EN_REG,
+ .hwcg_mask = BIT(15),
.reset_reg = SW_RESET_CORE_REG,
.reset_mask = BIT(10),
.halt_reg = DBG_BUS_VEC_E_REG,
@@ -732,6 +740,8 @@
.b = {
.ctl_reg = MAXI_EN4_REG,
.en_mask = BIT(23),
+ .hwcg_reg = MAXI_EN4_REG,
+ .hwcg_mask = BIT(22),
.halt_reg = DBG_BUS_VEC_I_REG,
.halt_bit = 25,
},
@@ -746,6 +756,8 @@
.b = {
.ctl_reg = MAXI_EN4_REG,
.en_mask = BIT(25),
+ .hwcg_reg = MAXI_EN4_REG,
+ .hwcg_mask = BIT(24),
.halt_reg = DBG_BUS_VEC_I_REG,
.halt_bit = 26,
},
@@ -761,6 +773,8 @@
.b = {
.ctl_reg = MAXI_EN_REG,
.en_mask = BIT(19),
+ .hwcg_reg = MAXI_EN_REG,
+ .hwcg_mask = BIT(13),
.reset_reg = SW_RESET_AXI_REG,
.reset_mask = BIT(4)|BIT(5)|BIT(7),
.halt_reg = DBG_BUS_VEC_E_REG,
@@ -794,6 +808,8 @@
.b = {
.ctl_reg = MAXI_EN_REG,
.en_mask = BIT(23),
+ .hwcg_reg = MAXI_EN_REG,
+ .hwcg_mask = BIT(16),
.reset_reg = SW_RESET_AXI_REG,
.reset_mask = BIT(13),
.halt_reg = DBG_BUS_VEC_E_REG,
@@ -810,6 +826,8 @@
.b = {
.ctl_reg = MAXI_EN2_REG,
.en_mask = BIT(24),
+ .hwcg_reg = MAXI_EN2_REG,
+ .hwcg_mask = BIT(25),
.reset_reg = SW_RESET_AXI_REG,
.reset_mask = BIT(6),
.halt_reg = DBG_BUS_VEC_E_REG,
@@ -826,6 +844,8 @@
.b = {
.ctl_reg = MAXI_EN2_REG,
.en_mask = BIT(26),
+ .hwcg_reg = MAXI_EN2_REG,
+ .hwcg_mask = BIT(27),
.reset_reg = SW_RESET_AXI_REG,
.reset_mask = BIT(15),
.halt_reg = DBG_BUS_VEC_E_REG,
@@ -922,6 +942,8 @@
.b = {
.ctl_reg = AHB_EN_REG,
.en_mask = BIT(18),
+ .hwcg_reg = AHB_EN2_REG,
+ .hwcg_mask = BIT(20),
.reset_reg = SW_RESET_AHB_REG,
.reset_mask = BIT(5),
.halt_reg = DBG_BUS_VEC_F_REG,
@@ -954,6 +976,8 @@
.b = {
.ctl_reg = AHB_EN_REG,
.en_mask = BIT(22),
+ .hwcg_reg = AHB_EN2_REG,
+ .hwcg_mask = BIT(15),
.reset_reg = SW_RESET_AHB2_REG,
.reset_mask = BIT(0),
.halt_reg = DBG_BUS_VEC_F_REG,
@@ -970,6 +994,8 @@
.b = {
.ctl_reg = AHB_EN_REG,
.en_mask = BIT(19),
+ .hwcg_reg = AHB_EN2_REG,
+ .hwcg_mask = BIT(28),
.reset_reg = SW_RESET_AHB_REG,
.reset_mask = BIT(12),
.halt_reg = DBG_BUS_VEC_F_REG,
@@ -986,6 +1012,8 @@
.b = {
.ctl_reg = AHB_EN_REG,
.en_mask = BIT(2),
+ .hwcg_reg = AHB_EN2_REG,
+ .hwcg_mask = BIT(29),
.reset_reg = SW_RESET_AHB_REG,
.reset_mask = BIT(11),
.halt_reg = DBG_BUS_VEC_F_REG,
@@ -1002,6 +1030,8 @@
.b = {
.ctl_reg = AHB_EN_REG,
.en_mask = BIT(3),
+ .hwcg_reg = AHB_EN2_REG,
+ .hwcg_mask = BIT(27),
.reset_reg = SW_RESET_AHB_REG,
.reset_mask = BIT(10),
.halt_reg = DBG_BUS_VEC_F_REG,
@@ -1018,6 +1048,8 @@
.b = {
.ctl_reg = AHB_EN_REG,
.en_mask = BIT(14),
+ .hwcg_reg = AHB_EN2_REG,
+ .hwcg_mask = BIT(21),
.reset_reg = SW_RESET_AHB_REG,
.reset_mask = BIT(9),
.halt_reg = DBG_BUS_VEC_F_REG,
@@ -1034,6 +1066,8 @@
.b = {
.ctl_reg = AHB_EN_REG,
.en_mask = BIT(4),
+ .hwcg_reg = AHB_EN2_REG,
+ .hwcg_mask = BIT(22),
.reset_reg = SW_RESET_AHB_REG,
.reset_mask = BIT(9),
.halt_reg = DBG_BUS_VEC_F_REG,
@@ -1066,6 +1100,8 @@
.b = {
.ctl_reg = AHB_EN_REG,
.en_mask = BIT(6),
+ .hwcg_reg = AHB_EN2_REG,
+ .hwcg_mask = BIT(12),
.reset_reg = SW_RESET_AHB_REG,
.reset_mask = BIT(8),
.halt_reg = DBG_BUS_VEC_F_REG,
@@ -1130,6 +1166,8 @@
.b = {
.ctl_reg = AHB_EN_REG,
.en_mask = BIT(15),
+ .hwcg_reg = AHB_EN_REG,
+ .hwcg_mask = BIT(26),
.halt_reg = DBG_BUS_VEC_F_REG,
.halt_bit = 22,
},
@@ -1160,6 +1198,8 @@
.b = {
.ctl_reg = AHB_EN_REG,
.en_mask = BIT(11),
+ .hwcg_reg = AHB_EN2_REG,
+ .hwcg_mask = BIT(26),
.reset_reg = SW_RESET_AHB_REG,
.reset_mask = BIT(1),
.halt_reg = DBG_BUS_VEC_F_REG,
@@ -1537,7 +1577,7 @@
.list_rate = rcg_clk_list_rate,
.is_enabled = rcg_clk_is_enabled,
.round_rate = rcg_clk_round_rate,
- .reset = soc_clk_reset,
+ .reset = rcg_clk_reset,
.is_local = local_clk_is_local,
.get_parent = rcg_clk_get_parent,
};
@@ -1707,6 +1747,8 @@
.b = {
.ctl_reg = PMEM_ACLK_CTL_REG,
.en_mask = BIT(4),
+ .hwcg_reg = PMEM_ACLK_CTL_REG,
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_DFAB_STATE_REG,
.halt_bit = 20,
},
@@ -2133,6 +2175,8 @@
.b = {
.ctl_reg = CE1_CORE_CLK_CTL_REG,
.en_mask = BIT(4),
+ .hwcg_reg = CE1_CORE_CLK_CTL_REG,
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_CFPB_STATEC_REG,
.halt_bit = 27,
},
@@ -2257,6 +2301,8 @@
.b = {
.ctl_reg = DMA_BAM_HCLK_CTL,
.en_mask = BIT(4),
+ .hwcg_reg = DMA_BAM_HCLK_CTL,
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_DFAB_STATE_REG,
.halt_bit = 12,
},
@@ -2271,6 +2317,8 @@
.b = {
.ctl_reg = GSBIn_HCLK_CTL_REG(1),
.en_mask = BIT(4),
+ .hwcg_reg = GSBIn_HCLK_CTL_REG(1),
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_CFPB_STATEA_REG,
.halt_bit = 11,
},
@@ -2285,6 +2333,8 @@
.b = {
.ctl_reg = GSBIn_HCLK_CTL_REG(2),
.en_mask = BIT(4),
+ .hwcg_reg = GSBIn_HCLK_CTL_REG(2),
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_CFPB_STATEA_REG,
.halt_bit = 7,
},
@@ -2299,6 +2349,8 @@
.b = {
.ctl_reg = GSBIn_HCLK_CTL_REG(3),
.en_mask = BIT(4),
+ .hwcg_reg = GSBIn_HCLK_CTL_REG(3),
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_CFPB_STATEA_REG,
.halt_bit = 3,
},
@@ -2313,6 +2365,8 @@
.b = {
.ctl_reg = GSBIn_HCLK_CTL_REG(4),
.en_mask = BIT(4),
+ .hwcg_reg = GSBIn_HCLK_CTL_REG(4),
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_CFPB_STATEB_REG,
.halt_bit = 27,
},
@@ -2327,6 +2381,8 @@
.b = {
.ctl_reg = GSBIn_HCLK_CTL_REG(5),
.en_mask = BIT(4),
+ .hwcg_reg = GSBIn_HCLK_CTL_REG(5),
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_CFPB_STATEB_REG,
.halt_bit = 23,
},
@@ -2341,6 +2397,8 @@
.b = {
.ctl_reg = GSBIn_HCLK_CTL_REG(6),
.en_mask = BIT(4),
+ .hwcg_reg = GSBIn_HCLK_CTL_REG(6),
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_CFPB_STATEB_REG,
.halt_bit = 19,
},
@@ -2355,6 +2413,8 @@
.b = {
.ctl_reg = GSBIn_HCLK_CTL_REG(7),
.en_mask = BIT(4),
+ .hwcg_reg = GSBIn_HCLK_CTL_REG(7),
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_CFPB_STATEB_REG,
.halt_bit = 15,
},
@@ -2369,6 +2429,8 @@
.b = {
.ctl_reg = GSBIn_HCLK_CTL_REG(8),
.en_mask = BIT(4),
+ .hwcg_reg = GSBIn_HCLK_CTL_REG(8),
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_CFPB_STATEB_REG,
.halt_bit = 11,
},
@@ -2383,6 +2445,8 @@
.b = {
.ctl_reg = GSBIn_HCLK_CTL_REG(9),
.en_mask = BIT(4),
+ .hwcg_reg = GSBIn_HCLK_CTL_REG(9),
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_CFPB_STATEB_REG,
.halt_bit = 7,
},
@@ -2397,6 +2461,8 @@
.b = {
.ctl_reg = GSBIn_HCLK_CTL_REG(10),
.en_mask = BIT(4),
+ .hwcg_reg = GSBIn_HCLK_CTL_REG(10),
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_CFPB_STATEB_REG,
.halt_bit = 3,
},
@@ -2411,6 +2477,8 @@
.b = {
.ctl_reg = GSBIn_HCLK_CTL_REG(11),
.en_mask = BIT(4),
+ .hwcg_reg = GSBIn_HCLK_CTL_REG(11),
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_CFPB_STATEC_REG,
.halt_bit = 18,
},
@@ -2425,6 +2493,8 @@
.b = {
.ctl_reg = GSBIn_HCLK_CTL_REG(12),
.en_mask = BIT(4),
+ .hwcg_reg = GSBIn_HCLK_CTL_REG(12),
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_CFPB_STATEC_REG,
.halt_bit = 14,
},
@@ -2470,6 +2540,8 @@
.b = {
.ctl_reg = TSIF_HCLK_CTL_REG,
.en_mask = BIT(4),
+ .hwcg_reg = TSIF_HCLK_CTL_REG,
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_CFPB_STATEC_REG,
.halt_bit = 7,
},
@@ -2512,6 +2584,8 @@
.b = {
.ctl_reg = USB_HS1_HCLK_CTL_REG,
.en_mask = BIT(4),
+ .hwcg_reg = USB_HS1_HCLK_CTL_REG,
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_DFAB_STATE_REG,
.halt_bit = 1,
},
@@ -2568,6 +2642,8 @@
.b = {
.ctl_reg = SDCn_HCLK_CTL_REG(1),
.en_mask = BIT(4),
+ .hwcg_reg = SDCn_HCLK_CTL_REG(1),
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_DFAB_STATE_REG,
.halt_bit = 11,
},
@@ -2582,6 +2658,8 @@
.b = {
.ctl_reg = SDCn_HCLK_CTL_REG(2),
.en_mask = BIT(4),
+ .hwcg_reg = SDCn_HCLK_CTL_REG(2),
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_DFAB_STATE_REG,
.halt_bit = 10,
},
@@ -2596,6 +2674,8 @@
.b = {
.ctl_reg = SDCn_HCLK_CTL_REG(3),
.en_mask = BIT(4),
+ .hwcg_reg = SDCn_HCLK_CTL_REG(3),
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_DFAB_STATE_REG,
.halt_bit = 9,
},
@@ -2610,6 +2690,8 @@
.b = {
.ctl_reg = SDCn_HCLK_CTL_REG(4),
.en_mask = BIT(4),
+ .hwcg_reg = SDCn_HCLK_CTL_REG(4),
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_DFAB_STATE_REG,
.halt_bit = 8,
},
@@ -2624,6 +2706,8 @@
.b = {
.ctl_reg = SDCn_HCLK_CTL_REG(5),
.en_mask = BIT(4),
+ .hwcg_reg = SDCn_HCLK_CTL_REG(5),
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_DFAB_STATE_REG,
.halt_bit = 7,
},
@@ -2654,6 +2738,8 @@
.b = {
.ctl_reg = SC0_U_CLK_BRANCH_ENA_VOTE_REG,
.en_mask = BIT(3),
+ .hwcg_reg = ADM0_PBUS_CLK_CTL_REG,
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_MSS_SMPSS_MISC_STATE_REG,
.halt_check = HALT_VOTED,
.halt_bit = 13,
@@ -2714,6 +2800,8 @@
.b = {
.ctl_reg = SC0_U_CLK_BRANCH_ENA_VOTE_REG,
.en_mask = BIT(6),
+ .hwcg_reg = RPM_MSG_RAM_HCLK_CTL_REG,
+ .hwcg_mask = BIT(6),
.halt_reg = CLK_HALT_SFPB_MISC_STATE_REG,
.halt_check = HALT_VOTED,
.halt_bit = 12,
@@ -5074,22 +5162,24 @@
CLK_LOOKUP("pll4", pll4_clk.c, NULL),
CLK_LOOKUP("measure", measure_clk.c, "debug"),
- CLK_DUMMY("afab_clk", AFAB_CLK, NULL, 0),
- CLK_DUMMY("afab_a_clk", AFAB_A_CLK, NULL, 0),
- CLK_DUMMY("cfpb_clk", CFPB_CLK, NULL, 0),
- CLK_DUMMY("cfpb_a_clk", CFPB_A_CLK, NULL, 0),
+ CLK_DUMMY("bus_clk", AFAB_CLK, "msm_apps_fab", 0),
+ CLK_DUMMY("bus_a_clk", AFAB_A_CLK, "msm_apps_fab", 0),
+ CLK_DUMMY("bus_clk", SFAB_CLK, "msm_sys_fab", 0),
+ CLK_DUMMY("bus_a_clk", SFAB_A_CLK, "msm_sys_fab", 0),
+ CLK_DUMMY("bus_clk", SFPB_CLK, "msm_sys_fpb", 0),
+ CLK_DUMMY("bus_a_clk", SFPB_A_CLK, "msm_sys_fpb", 0),
+ CLK_DUMMY("bus_clk", MMFAB_CLK, "msm_mm_fab", 0),
+ CLK_DUMMY("bus_a_clk", MMFAB_A_CLK, "msm_mm_fab", 0),
+ CLK_DUMMY("bus_clk", CFPB_CLK, "msm_cpss_fpb", 0),
+ CLK_DUMMY("bus_a_clk", CFPB_A_CLK, "msm_cpss_fpb", 0),
+ CLK_LOOKUP("mem_clk", ebi1_msmbus_clk.c, "msm_bus"),
+ CLK_DUMMY("mem_a_clk", EBI1_A_CLK, "msm_bus", 0),
+
+ CLK_DUMMY("ebi1_clk", EBI1_CLK, NULL, 0),
CLK_DUMMY("dfab_clk", DFAB_CLK, NULL, 0),
CLK_DUMMY("dfab_a_clk", DFAB_A_CLK, NULL, 0),
- CLK_DUMMY("ebi1_clk", EBI1_CLK, NULL, 0),
- CLK_DUMMY("ebi1_a_clk", EBI1_A_CLK, NULL, 0),
- CLK_DUMMY("mmfab_clk", MMFAB_CLK, NULL, 0),
- CLK_DUMMY("mmfab_a_clk", MMFAB_A_CLK, NULL, 0),
- CLK_DUMMY("mmfpb_clk", MMFPB_CLK, NULL, 0),
- CLK_DUMMY("mmfpb_a_clk", MMFPB_A_CLK, NULL, 0),
- CLK_DUMMY("sfab_clk", SFAB_CLK, NULL, 0),
- CLK_DUMMY("sfab_a_clk", SFAB_A_CLK, NULL, 0),
- CLK_DUMMY("sfpb_clk", SFPB_CLK, NULL, 0),
- CLK_DUMMY("sfpb_a_clk", SFPB_A_CLK, NULL, 0),
+ CLK_DUMMY("bus_clk", MMFPB_CLK, NULL, 0),
+ CLK_DUMMY("bus_a_clk", MMFPB_A_CLK, NULL, 0),
CLK_LOOKUP("core_clk", gp0_clk.c, NULL),
CLK_LOOKUP("core_clk", gp1_clk.c, NULL),
@@ -5291,7 +5381,6 @@
CLK_LOOKUP("usb_hsic_system_clk", usb_hsic_system_clk.c, NULL),
CLK_LOOKUP("usb_hsic_p_clk", usb_hsic_p_clk.c, NULL),
- CLK_LOOKUP("ebi1_msmbus_clk", ebi1_msmbus_clk.c, NULL),
CLK_LOOKUP("mem_clk", ebi1_adm_clk.c, "msm_dmov"),
CLK_LOOKUP("l2_mclk", l2_m_clk, NULL),
@@ -5306,24 +5395,25 @@
CLK_LOOKUP("pll4", pll4_clk.c, NULL),
CLK_LOOKUP("measure", measure_clk.c, "debug"),
- CLK_LOOKUP("afab_clk", afab_clk.c, NULL),
- CLK_LOOKUP("afab_a_clk", afab_a_clk.c, NULL),
- CLK_LOOKUP("cfpb_clk", cfpb_clk.c, NULL),
- CLK_LOOKUP("cfpb_a_clk", cfpb_a_clk.c, NULL),
- CLK_LOOKUP("cfpb_a_clk", cfpb_a_clk.c, "clock-8960"),
- CLK_LOOKUP("dfab_clk", dfab_clk.c, NULL),
- CLK_LOOKUP("dfab_a_clk", dfab_a_clk.c, NULL),
- CLK_LOOKUP("ebi1_clk", ebi1_clk.c, NULL),
- CLK_LOOKUP("ebi1_a_clk", ebi1_a_clk.c, NULL),
- CLK_LOOKUP("mmfab_clk", mmfab_clk.c, NULL),
- CLK_LOOKUP("mmfab_a_clk", mmfab_a_clk.c, NULL),
- CLK_LOOKUP("mmfpb_clk", mmfpb_clk.c, NULL),
- CLK_LOOKUP("mmfpb_a_clk", mmfpb_a_clk.c, NULL),
- CLK_LOOKUP("mmfpb_a_clk", mmfpb_a_clk.c, "clock-8960"),
- CLK_LOOKUP("sfab_clk", sfab_clk.c, NULL),
- CLK_LOOKUP("sfab_a_clk", sfab_a_clk.c, NULL),
- CLK_LOOKUP("sfpb_clk", sfpb_clk.c, NULL),
- CLK_LOOKUP("sfpb_a_clk", sfpb_a_clk.c, NULL),
+ CLK_LOOKUP("bus_clk", afab_clk.c, "msm_apps_fab"),
+ CLK_LOOKUP("bus_a_clk", afab_a_clk.c, "msm_apps_fab"),
+ CLK_LOOKUP("bus_clk", cfpb_clk.c, "msm_cpss_fpb"),
+ CLK_LOOKUP("bus_a_clk", cfpb_a_clk.c, "msm_cpss_fpb"),
+ CLK_LOOKUP("bus_clk", sfab_clk.c, "msm_sys_fab"),
+ CLK_LOOKUP("bus_a_clk", sfab_a_clk.c, "msm_sys_fab"),
+ CLK_LOOKUP("bus_clk", sfpb_clk.c, "msm_sys_fpb"),
+ CLK_LOOKUP("bus_a_clk", sfpb_a_clk.c, "msm_sys_fpb"),
+ CLK_LOOKUP("bus_clk", mmfab_clk.c, "msm_mm_fab"),
+ CLK_LOOKUP("bus_a_clk", mmfab_a_clk.c, "msm_mm_fab"),
+ CLK_LOOKUP("mem_clk", ebi1_msmbus_clk.c, "msm_bus"),
+ CLK_LOOKUP("mem_a_clk", ebi1_a_clk.c, "msm_bus"),
+
+ CLK_LOOKUP("ebi1_clk", ebi1_clk.c, NULL),
+ CLK_LOOKUP("dfab_clk", dfab_clk.c, NULL),
+ CLK_LOOKUP("dfab_a_clk", dfab_a_clk.c, NULL),
+ CLK_LOOKUP("mmfpb_clk", mmfpb_clk.c, NULL),
+ CLK_LOOKUP("mmfpb_a_clk", mmfpb_a_clk.c, "clock-8960"),
+ CLK_LOOKUP("cfpb_a_clk", cfpb_a_clk.c, "clock-8960"),
CLK_LOOKUP("core_clk", gp0_clk.c, NULL),
CLK_LOOKUP("core_clk", gp1_clk.c, NULL),
@@ -5536,7 +5626,6 @@
CLK_LOOKUP("dfab_clk", dfab_sps_clk.c, "msm_sps"),
CLK_LOOKUP("bus_clk", dfab_bam_dmux_clk.c, "BAM_RMNT"),
- CLK_LOOKUP("ebi1_msmbus_clk", ebi1_msmbus_clk.c, NULL),
CLK_LOOKUP("mem_clk", ebi1_adm_clk.c, "msm_dmov"),
CLK_LOOKUP("l2_mclk", l2_m_clk, NULL),
@@ -5605,6 +5694,7 @@
static void __init reg_init(void)
{
+ void __iomem *imem_reg;
/* Deassert MM SW_RESET_ALL signal. */
writel_relaxed(0, SW_RESET_ALL_REG);
@@ -5613,12 +5703,21 @@
* reserved bits on the other SoC. Writing to these reserved bits
* should have no effect.
*/
- /* Initialize MM AHB registers: Enable the FPB clock and disable HW
- * gating for all clocks. Also set VFE_AHB's FORCE_CORE_ON bit to
- * prevent its memory from being collapsed when the clock is halted.
- * The sleep and wake-up delays are set to safe values. */
- rmwreg(0x00000003, AHB_EN_REG, 0x6C000103);
- writel_relaxed(0x000007F9, AHB_EN2_REG);
+ /*
+ * Initialize MM AHB registers: Enable the FPB clock and disable HW
+ * gating on 8960v1/8064 for all clocks. Also set VFE_AHB's
+ * FORCE_CORE_ON bit to prevent its memory from being collapsed when
+ * the clock is halted. The sleep and wake-up delays are set to safe
+ * values.
+ */
+ if (cpu_is_msm8960() &&
+ SOCINFO_VERSION_MAJOR(socinfo_get_version()) >= 2) {
+ rmwreg(0x44000000, AHB_EN_REG, 0x6C000103);
+ writel_relaxed(0x3C7097F9, AHB_EN2_REG);
+ } else {
+ rmwreg(0x00000003, AHB_EN_REG, 0x6C000103);
+ writel_relaxed(0x000007F9, AHB_EN2_REG);
+ }
if (cpu_is_apq8064())
rmwreg(0x00000000, AHB_EN3_REG, 0x00000001);
@@ -5629,14 +5728,31 @@
/* Initialize MM AXI registers: Enable HW gating for all clocks that
* support it. Also set FORCE_CORE_ON bits, and any sleep and wake-up
* delays to safe values. */
- /* TODO: Enable HW Gating */
- rmwreg(0x000007F9, MAXI_EN_REG, 0x0803FFFF);
- rmwreg(0x3027FCFF, MAXI_EN2_REG, 0x3A3FFFFF);
+ if (cpu_is_msm8960() &&
+ SOCINFO_VERSION_MAJOR(socinfo_get_version()) >= 3) {
+ rmwreg(0x0003AFF9, MAXI_EN_REG, 0x0803FFFF);
+ rmwreg(0x3A27FCFF, MAXI_EN2_REG, 0x3A3FFFFF);
+ rmwreg(0x0027FCFF, MAXI_EN4_REG, 0x017FFFFF);
+ } else {
+ rmwreg(0x000007F9, MAXI_EN_REG, 0x0803FFFF);
+ rmwreg(0x3027FCFF, MAXI_EN2_REG, 0x3A3FFFFF);
+ rmwreg(0x0027FCFF, MAXI_EN4_REG, 0x017FFFFF);
+ }
rmwreg(0x0027FCFF, MAXI_EN3_REG, 0x003FFFFF);
- rmwreg(0x0027FCFF, MAXI_EN4_REG, 0x017FFFFF);
if (cpu_is_apq8064())
rmwreg(0x009FE4FF, MAXI_EN5_REG, 0x01FFEFFF);
- rmwreg(0x000003C7, SAXI_EN_REG, 0x00003FFF);
+ if (cpu_is_msm8960() &&
+ SOCINFO_VERSION_MAJOR(socinfo_get_version()) >= 2)
+ rmwreg(0x00003C38, SAXI_EN_REG, 0x00003FFF);
+ else
+ rmwreg(0x000003C7, SAXI_EN_REG, 0x00003FFF);
+
+ /* Enable IMEM's clk_on signal */
+ imem_reg = ioremap(0x04b00040, 4);
+ if (imem_reg) {
+ writel_relaxed(0x3, imem_reg);
+ iounmap(imem_reg);
+ }
/* Initialize MM CC registers: Set MM FORCE_CORE_ON bits so that core
* memories retain state even when not clocked. Also, set sleep and
diff --git a/arch/arm/mach-msm/clock-8x60.c b/arch/arm/mach-msm/clock-8x60.c
index 454e9cf..45094d9 100644
--- a/arch/arm/mach-msm/clock-8x60.c
+++ b/arch/arm/mach-msm/clock-8x60.c
@@ -535,11 +535,6 @@
writel_relaxed(pll_mode, MM_PLL2_MODE_REG);
}
-static int soc_clk_reset(struct clk *clk, enum clk_reset_action action)
-{
- return branch_reset(&to_rcg_clk(clk)->b, action);
-}
-
static struct clk_ops clk_ops_rcg_8x60 = {
.enable = rcg_clk_enable,
.disable = rcg_clk_disable,
@@ -550,7 +545,7 @@
.list_rate = rcg_clk_list_rate,
.is_enabled = rcg_clk_is_enabled,
.round_rate = rcg_clk_round_rate,
- .reset = soc_clk_reset,
+ .reset = rcg_clk_reset,
.is_local = local_clk_is_local,
.get_parent = rcg_clk_get_parent,
};
@@ -3576,28 +3571,29 @@
static struct clk_lookup msm_clocks_8x60[] = {
CLK_LOOKUP("cxo", cxo_clk.c, NULL),
- CLK_LOOKUP("pll4", pll4_clk.c, NULL),
- CLK_LOOKUP("pll4", pll4_clk.c, "peripheral-reset"),
+ CLK_LOOKUP("pll4", pll4_clk.c, "pil_qdsp6v3"),
CLK_LOOKUP("measure", measure_clk.c, "debug"),
- CLK_LOOKUP("afab_clk", afab_clk.c, NULL),
- CLK_LOOKUP("afab_a_clk", afab_a_clk.c, NULL),
- CLK_LOOKUP("cfpb_clk", cfpb_clk.c, NULL),
- CLK_LOOKUP("cfpb_a_clk", cfpb_a_clk.c, NULL),
+ CLK_LOOKUP("bus_clk", afab_clk.c, "msm_apps_fab"),
+ CLK_LOOKUP("bus_a_clk", afab_a_clk.c, "msm_apps_fab"),
+ CLK_LOOKUP("bus_clk", sfab_clk.c, "msm_sys_fab"),
+ CLK_LOOKUP("bus_a_clk", sfab_a_clk.c, "msm_sys_fab"),
+ CLK_LOOKUP("bus_clk", sfpb_clk.c, "msm_sys_fpb"),
+ CLK_LOOKUP("bus_a_clk", sfpb_a_clk.c, "msm_sys_fpb"),
+ CLK_LOOKUP("bus_clk", mmfab_clk.c, "msm_mm_fab"),
+ CLK_LOOKUP("bus_a_clk", mmfab_a_clk.c, "msm_mm_fab"),
+ CLK_LOOKUP("bus_clk", cfpb_clk.c, "msm_cpss_fpb"),
+ CLK_LOOKUP("bus_a_clk", cfpb_a_clk.c, "msm_cpss_fpb"),
+ CLK_LOOKUP("mem_clk", ebi1_msmbus_clk.c, "msm_bus"),
+ CLK_LOOKUP("mem_a_clk", ebi1_a_clk.c, "msm_bus"),
+ CLK_LOOKUP("smi_clk", smi_clk.c, "msm_bus"),
+ CLK_LOOKUP("smi_a_clk", smi_a_clk.c, "msm_bus"),
+
+ CLK_LOOKUP("ebi1_clk", ebi1_clk.c, NULL),
CLK_LOOKUP("dfab_clk", dfab_clk.c, NULL),
CLK_LOOKUP("dfab_a_clk", dfab_a_clk.c, NULL),
- CLK_LOOKUP("ebi1_clk", ebi1_clk.c, NULL),
- CLK_LOOKUP("ebi1_a_clk", ebi1_a_clk.c, NULL),
- CLK_LOOKUP("mmfab_clk", mmfab_clk.c, NULL),
- CLK_LOOKUP("mmfab_a_clk", mmfab_a_clk.c, NULL),
CLK_LOOKUP("mmfpb_clk", mmfpb_clk.c, NULL),
CLK_LOOKUP("mmfpb_a_clk", mmfpb_a_clk.c, NULL),
- CLK_LOOKUP("sfab_clk", sfab_clk.c, NULL),
- CLK_LOOKUP("sfab_a_clk", sfab_a_clk.c, NULL),
- CLK_LOOKUP("sfpb_clk", sfpb_clk.c, NULL),
- CLK_LOOKUP("sfpb_a_clk", sfpb_a_clk.c, NULL),
- CLK_LOOKUP("smi_clk", smi_clk.c, NULL),
- CLK_LOOKUP("smi_a_clk", smi_a_clk.c, NULL),
CLK_LOOKUP("core_clk", gp0_clk.c, NULL),
CLK_LOOKUP("core_clk", gp1_clk.c, NULL),
@@ -3793,7 +3789,6 @@
CLK_LOOKUP("bus_clk", dfab_sdc4_clk.c, "msm_sdcc.4"),
CLK_LOOKUP("bus_clk", dfab_sdc5_clk.c, "msm_sdcc.5"),
- CLK_LOOKUP("ebi1_msmbus_clk", ebi1_msmbus_clk.c, NULL),
CLK_LOOKUP("mem_clk", ebi1_adm0_clk.c, "msm_dmov.0"),
CLK_LOOKUP("mem_clk", ebi1_adm1_clk.c, "msm_dmov.1"),
diff --git a/arch/arm/mach-msm/clock-9615.c b/arch/arm/mach-msm/clock-9615.c
index 553fb4d..8c5f027 100644
--- a/arch/arm/mach-msm/clock-9615.c
+++ b/arch/arm/mach-msm/clock-9615.c
@@ -414,11 +414,6 @@
},
};
-static int soc_clk_reset(struct clk *clk, enum clk_reset_action action)
-{
- return branch_reset(&to_rcg_clk(clk)->b, action);
-}
-
static struct clk_ops clk_ops_rcg_9615 = {
.enable = rcg_clk_enable,
.disable = rcg_clk_disable,
@@ -428,7 +423,7 @@
.list_rate = rcg_clk_list_rate,
.is_enabled = rcg_clk_is_enabled,
.round_rate = rcg_clk_round_rate,
- .reset = soc_clk_reset,
+ .reset = rcg_clk_reset,
.is_local = local_clk_is_local,
.get_parent = rcg_clk_get_parent,
};
@@ -1631,16 +1626,18 @@
CLK_LOOKUP("measure", measure_clk.c, "debug"),
- CLK_LOOKUP("cfpb_clk", cfpb_clk.c, NULL),
- CLK_LOOKUP("cfpb_a_clk", cfpb_a_clk.c, NULL),
+ CLK_LOOKUP("bus_clk", sfab_clk.c, "msm_sys_fab"),
+ CLK_LOOKUP("bus_a_clk", sfab_a_clk.c, "msm_sys_fab"),
+ CLK_LOOKUP("mem_clk", ebi1_msmbus_clk.c, "msm_bus"),
+ CLK_LOOKUP("mem_a_clk", ebi1_a_clk.c, "msm_bus"),
+
+ CLK_LOOKUP("bus_clk", sfpb_clk.c, NULL),
+ CLK_LOOKUP("bus_a_clk", sfpb_a_clk.c, NULL),
+ CLK_LOOKUP("bus_clk", cfpb_clk.c, NULL),
+ CLK_LOOKUP("bus_a_clk", cfpb_a_clk.c, NULL),
+ CLK_LOOKUP("ebi1_clk", ebi1_clk.c, NULL),
CLK_LOOKUP("dfab_clk", dfab_clk.c, NULL),
CLK_LOOKUP("dfab_a_clk", dfab_a_clk.c, NULL),
- CLK_LOOKUP("ebi1_clk", ebi1_clk.c, NULL),
- CLK_LOOKUP("ebi1_a_clk", ebi1_a_clk.c, NULL),
- CLK_LOOKUP("sfab_clk", sfab_clk.c, NULL),
- CLK_LOOKUP("sfab_a_clk", sfab_a_clk.c, NULL),
- CLK_LOOKUP("sfpb_clk", sfpb_clk.c, NULL),
- CLK_LOOKUP("sfpb_a_clk", sfpb_a_clk.c, NULL),
CLK_LOOKUP("core_clk", gp0_clk.c, NULL),
CLK_LOOKUP("core_clk", gp1_clk.c, NULL),
@@ -1703,7 +1700,6 @@
CLK_LOOKUP("bus_clk", dfab_sdc2_clk.c, "msm_sdcc.2"),
CLK_LOOKUP("dfab_clk", dfab_sps_clk.c, "msm_sps"),
CLK_LOOKUP("bus_clk", dfab_bam_dmux_clk.c, "BAM_RMNT"),
- CLK_LOOKUP("ebi1_msmbus_clk", ebi1_msmbus_clk.c, NULL),
CLK_LOOKUP("mem_clk", ebi1_adm_clk.c, "msm_dmov"),
CLK_LOOKUP("iface_clk", ce1_p_clk.c, "qce.0"),
diff --git a/arch/arm/mach-msm/clock-debug.c b/arch/arm/mach-msm/clock-debug.c
index 4990c81..411a272 100644
--- a/arch/arm/mach-msm/clock-debug.c
+++ b/arch/arm/mach-msm/clock-debug.c
@@ -54,12 +54,31 @@
static int clock_debug_measure_get(void *data, u64 *val)
{
- int ret;
struct clk *clock = data;
+ int ret, is_hw_gated;
+
+ /* Check to see if the clock is in hardware gating mode */
+ if (clock->flags & CLKFLAG_HWCG)
+ is_hw_gated = clock->ops->in_hwcg_mode(clock);
+ else
+ is_hw_gated = 0;
ret = clk_set_parent(measure, clock);
- if (!ret)
+ if (!ret) {
+ /*
+ * Disable hw gating to get accurate rate measurements. Only do
+ * this if the clock is explictly enabled by software. This
+ * allows us to detect errors where clocks are on even though
+ * software is not requesting them to be on due to broken
+ * hardware gating signals.
+ */
+ if (is_hw_gated && clock->count)
+ clock->ops->disable_hwcg(clock);
*val = clk_get_rate(measure);
+ /* Reenable hwgating if it was disabled */
+ if (is_hw_gated && clock->count)
+ clock->ops->enable_hwcg(clock);
+ }
return ret;
}
@@ -109,6 +128,16 @@
DEFINE_SIMPLE_ATTRIBUTE(clock_local_fops, clock_debug_local_get,
NULL, "%llu\n");
+static int clock_debug_hwcg_get(void *data, u64 *val)
+{
+ struct clk *clock = data;
+ *val = !!(clock->flags & CLKFLAG_HWCG);
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(clock_hwcg_fops, clock_debug_hwcg_get,
+ NULL, "%llu\n");
+
static struct dentry *debugfs_base;
static u32 debug_suspend;
static struct clk_lookup *msm_clocks;
@@ -239,6 +268,10 @@
&clock_local_fops))
goto error;
+ if (!debugfs_create_file("has_hw_gating", S_IRUGO, clk_dir, clock,
+ &clock_hwcg_fops))
+ goto error;
+
if (measure &&
!clk_set_parent(measure, clock) &&
!debugfs_create_file("measure", S_IRUGO, clk_dir, clock,
diff --git a/arch/arm/mach-msm/clock-local.c b/arch/arm/mach-msm/clock-local.c
index f8d84be..2a1c013 100644
--- a/arch/arm/mach-msm/clock-local.c
+++ b/arch/arm/mach-msm/clock-local.c
@@ -273,6 +273,14 @@
return invert ? !status_bit : status_bit;
}
+int branch_in_hwcg_mode(const struct branch *b)
+{
+ if (!b->hwcg_mask)
+ return 0;
+
+ return !!(readl_relaxed(b->hwcg_reg) & b->hwcg_mask);
+}
+
void __branch_clk_enable_reg(const struct branch *clk, const char *name)
{
u32 reg_val;
@@ -291,6 +299,10 @@
*/
mb();
+ /* Skip checking halt bit if the clock is in hardware gated mode */
+ if (branch_in_hwcg_mode(clk))
+ return;
+
/* Wait for clock to enable before returning. */
if (clk->halt_check == DELAY)
udelay(HALT_CHECK_DELAY_US);
@@ -362,6 +374,10 @@
*/
mb();
+ /* Skip checking halt bit if the clock is in hardware gated mode */
+ if (branch_in_hwcg_mode(clk))
+ return reg_val;
+
/* Wait for clock to disable before continuing. */
if (clk->halt_check == DELAY || clk->halt_check == ENABLE_VOTED
|| clk->halt_check == HALT_VOTED)
@@ -584,12 +600,32 @@
return to_rcg_clk(clk)->current_freq->src_clk;
}
+/* Disable hw clock gating if not set at boot */
+static void branch_handoff(struct branch *clk, struct clk *c)
+{
+ if (!branch_in_hwcg_mode(clk)) {
+ clk->hwcg_mask = 0;
+ c->flags &= ~CLKFLAG_HWCG;
+ } else {
+ c->flags |= CLKFLAG_HWCG;
+ }
+}
+
+int branch_clk_handoff(struct clk *c)
+{
+ struct branch_clk *clk = to_branch_clk(c);
+ branch_handoff(&clk->b, &clk->c);
+ return 0;
+}
+
int rcg_clk_handoff(struct clk *c)
{
struct rcg_clk *clk = to_rcg_clk(c);
uint32_t ctl_val, ns_val, md_val, ns_mask;
struct clk_freq_tbl *freq;
+ branch_handoff(&clk->b, &clk->c);
+
ctl_val = readl_relaxed(clk->b.ctl_reg);
if (!(ctl_val & clk->root_en_mask))
return 0;
@@ -859,35 +895,100 @@
return branch->enabled;
}
-int branch_reset(struct branch *clk, enum clk_reset_action action)
+static void branch_enable_hwcg(struct branch *b)
+{
+ unsigned long flags;
+ u32 reg_val;
+
+ spin_lock_irqsave(&local_clock_reg_lock, flags);
+ reg_val = readl_relaxed(b->hwcg_reg);
+ reg_val |= b->hwcg_mask;
+ writel_relaxed(reg_val, b->hwcg_reg);
+ spin_unlock_irqrestore(&local_clock_reg_lock, flags);
+}
+
+static void branch_disable_hwcg(struct branch *b)
+{
+ unsigned long flags;
+ u32 reg_val;
+
+ spin_lock_irqsave(&local_clock_reg_lock, flags);
+ reg_val = readl_relaxed(b->hwcg_reg);
+ reg_val &= ~b->hwcg_mask;
+ writel_relaxed(reg_val, b->hwcg_reg);
+ spin_unlock_irqrestore(&local_clock_reg_lock, flags);
+}
+
+void branch_clk_enable_hwcg(struct clk *clk)
+{
+ struct branch_clk *branch = to_branch_clk(clk);
+ branch_enable_hwcg(&branch->b);
+}
+
+void branch_clk_disable_hwcg(struct clk *clk)
+{
+ struct branch_clk *branch = to_branch_clk(clk);
+ branch_disable_hwcg(&branch->b);
+}
+
+int branch_clk_in_hwcg_mode(struct clk *c)
+{
+ struct branch_clk *clk = to_branch_clk(c);
+ return branch_in_hwcg_mode(&clk->b);
+}
+
+void rcg_clk_enable_hwcg(struct clk *clk)
+{
+ struct rcg_clk *rcg = to_rcg_clk(clk);
+ branch_enable_hwcg(&rcg->b);
+}
+
+void rcg_clk_disable_hwcg(struct clk *clk)
+{
+ struct rcg_clk *rcg = to_rcg_clk(clk);
+ branch_disable_hwcg(&rcg->b);
+}
+
+int rcg_clk_in_hwcg_mode(struct clk *c)
+{
+ struct rcg_clk *clk = to_rcg_clk(c);
+ return branch_in_hwcg_mode(&clk->b);
+}
+
+int branch_reset(struct branch *b, enum clk_reset_action action)
{
int ret = 0;
u32 reg_val;
unsigned long flags;
- if (!clk->reset_reg)
+ if (!b->reset_reg)
return -EPERM;
- spin_lock_irqsave(&local_clock_reg_lock, flags);
+ /* Disable hw gating when asserting a reset */
+ if (b->hwcg_mask && action == CLK_RESET_ASSERT)
+ branch_disable_hwcg(b);
- reg_val = readl_relaxed(clk->reset_reg);
+ spin_lock_irqsave(&local_clock_reg_lock, flags);
+ /* Assert/Deassert reset */
+ reg_val = readl_relaxed(b->reset_reg);
switch (action) {
case CLK_RESET_ASSERT:
- reg_val |= clk->reset_mask;
+ reg_val |= b->reset_mask;
break;
case CLK_RESET_DEASSERT:
- reg_val &= ~(clk->reset_mask);
+ reg_val &= ~b->reset_mask;
break;
default:
ret = -EINVAL;
}
- writel_relaxed(reg_val, clk->reset_reg);
-
+ writel_relaxed(reg_val, b->reset_reg);
spin_unlock_irqrestore(&local_clock_reg_lock, flags);
+ /* Enable hw gating when deasserting a reset */
+ if (b->hwcg_mask && action == CLK_RESET_DEASSERT)
+ branch_enable_hwcg(b);
/* Make sure write is issued before returning. */
mb();
-
return ret;
}
@@ -896,6 +997,11 @@
return branch_reset(&to_branch_clk(clk)->b, action);
}
+int rcg_clk_reset(struct clk *clk, enum clk_reset_action action)
+{
+ return branch_reset(&to_rcg_clk(clk)->b, action);
+}
+
static int cdiv_clk_enable(struct clk *c)
{
unsigned long flags;
@@ -967,6 +1073,8 @@
struct cdiv_clk *clk = to_cdiv_clk(c);
u32 reg_val;
+ branch_handoff(&clk->b, &clk->c);
+
reg_val = readl_relaxed(clk->ns_reg);
if (reg_val & clk->ext_mask) {
clk->cur_div = 0;
@@ -978,9 +1086,30 @@
return 0;
}
+static void cdiv_clk_enable_hwcg(struct clk *c)
+{
+ struct cdiv_clk *clk = to_cdiv_clk(c);
+ branch_enable_hwcg(&clk->b);
+}
+
+static void cdiv_clk_disable_hwcg(struct clk *c)
+{
+ struct cdiv_clk *clk = to_cdiv_clk(c);
+ branch_disable_hwcg(&clk->b);
+}
+
+static int cdiv_clk_in_hwcg_mode(struct clk *c)
+{
+ struct cdiv_clk *clk = to_cdiv_clk(c);
+ return branch_in_hwcg_mode(&clk->b);
+}
+
struct clk_ops clk_ops_cdiv = {
.enable = cdiv_clk_enable,
.disable = cdiv_clk_disable,
+ .in_hwcg_mode = cdiv_clk_in_hwcg_mode,
+ .enable_hwcg = cdiv_clk_enable_hwcg,
+ .disable_hwcg = cdiv_clk_disable_hwcg,
.auto_off = cdiv_clk_disable,
.handoff = cdiv_clk_handoff,
.set_rate = cdiv_clk_set_rate,
diff --git a/arch/arm/mach-msm/clock-local.h b/arch/arm/mach-msm/clock-local.h
index 2123513..a561802d 100644
--- a/arch/arm/mach-msm/clock-local.h
+++ b/arch/arm/mach-msm/clock-local.h
@@ -90,6 +90,8 @@
* struct branch - branch on/off
* @ctl_reg: clock control register
* @en_mask: ORed with @ctl_reg to enable the clock
+ * @hwcg_reg: hardware clock gating register
+ * @hwcg_mask: ORed with @hwcg_reg to enable hardware clock gating
* @halt_reg: halt register
* @halt_check: type of halt check to perform
* @halt_bit: ANDed with @halt_reg to test for clock halted
@@ -100,6 +102,9 @@
void __iomem *const ctl_reg;
const u32 en_mask;
+ void __iomem *hwcg_reg;
+ u32 hwcg_mask;
+
void __iomem *const halt_reg;
const u16 halt_check;
const u16 halt_bit;
@@ -108,9 +113,10 @@
const u32 reset_mask;
};
-int branch_reset(struct branch *clk, enum clk_reset_action action);
+int branch_reset(struct branch *b, enum clk_reset_action action);
void __branch_clk_enable_reg(const struct branch *clk, const char *name);
u32 __branch_clk_disable_reg(const struct branch *clk, const char *name);
+int branch_clk_handoff(struct clk *c);
/*
* Generic clock-definition struct and macros
@@ -150,6 +156,10 @@
long rcg_clk_round_rate(struct clk *clk, unsigned long rate);
struct clk *rcg_clk_get_parent(struct clk *c);
int rcg_clk_handoff(struct clk *c);
+int rcg_clk_reset(struct clk *clk, enum clk_reset_action action);
+void rcg_clk_enable_hwcg(struct clk *clk);
+void rcg_clk_disable_hwcg(struct clk *clk);
+int rcg_clk_in_hwcg_mode(struct clk *c);
/**
* struct cdiv_clk - integer divider clock with external source selection
@@ -286,6 +296,9 @@
int branch_clk_set_parent(struct clk *clk, struct clk *parent);
int branch_clk_is_enabled(struct clk *clk);
int branch_clk_reset(struct clk *c, enum clk_reset_action action);
+void branch_clk_enable_hwcg(struct clk *clk);
+void branch_clk_disable_hwcg(struct clk *clk);
+int branch_clk_in_hwcg_mode(struct clk *c);
/**
* struct measure_clk - for rate measurement debug use
diff --git a/arch/arm/mach-msm/clock.h b/arch/arm/mach-msm/clock.h
index ec8ff6c..91121e6 100644
--- a/arch/arm/mach-msm/clock.h
+++ b/arch/arm/mach-msm/clock.h
@@ -29,6 +29,7 @@
#define CLKFLAG_NONEST 0x00000004
#define CLKFLAG_NORESET 0x00000008
#define CLKFLAG_HANDOFF_RATE 0x00000010
+#define CLKFLAG_HWCG 0x00000020
#define CLKFLAG_SKIP_AUTO_OFF 0x00000200
#define CLKFLAG_MIN 0x00000400
#define CLKFLAG_MAX 0x00000800
@@ -63,6 +64,9 @@
int (*enable)(struct clk *clk);
void (*disable)(struct clk *clk);
void (*auto_off)(struct clk *clk);
+ void (*enable_hwcg)(struct clk *clk);
+ void (*disable_hwcg)(struct clk *clk);
+ int (*in_hwcg_mode)(struct clk *clk);
int (*handoff)(struct clk *clk);
int (*reset)(struct clk *clk, enum clk_reset_action action);
int (*set_rate)(struct clk *clk, unsigned long rate);
diff --git a/arch/arm/mach-msm/devices-msm8x60.c b/arch/arm/mach-msm/devices-msm8x60.c
index 72fdcf7..aa9e380 100644
--- a/arch/arm/mach-msm/devices-msm8x60.c
+++ b/arch/arm/mach-msm/devices-msm8x60.c
@@ -188,6 +188,23 @@
}
}
+#define MSM_LPASS_QDSP6SS_PHYS 0x28800000
+
+static struct resource msm_8660_q6_resources[] = {
+ {
+ .start = MSM_LPASS_QDSP6SS_PHYS,
+ .end = MSM_LPASS_QDSP6SS_PHYS + SZ_256 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+struct platform_device msm_pil_q6v3 = {
+ .name = "pil_qdsp6v3",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(msm_8660_q6_resources),
+ .resource = msm_8660_q6_resources,
+};
+
static struct resource msm_uart1_dm_resources[] = {
{
.start = MSM_UART1DM_PHYS,
diff --git a/arch/arm/mach-msm/devices.h b/arch/arm/mach-msm/devices.h
index ffe22f8..9743ee2 100644
--- a/arch/arm/mach-msm/devices.h
+++ b/arch/arm/mach-msm/devices.h
@@ -174,6 +174,7 @@
extern struct platform_device msm_pcm_afe;
extern struct platform_device msm_compr_dsp;
+extern struct platform_device msm_pil_q6v3;
extern struct platform_device msm_8960_q6_lpass;
extern struct platform_device msm_8960_q6_mss_fw;
extern struct platform_device msm_8960_q6_mss_sw;
diff --git a/arch/arm/mach-msm/idle-v7.S b/arch/arm/mach-msm/idle-v7.S
index 40e13fa..e855357 100644
--- a/arch/arm/mach-msm/idle-v7.S
+++ b/arch/arm/mach-msm/idle-v7.S
@@ -212,8 +212,17 @@
mcr p15, 0, r3, c8, c7, 0 /* UTLBIALL */
mcr p15, 0, r3, c7, c5, 6 /* BPIALL */
dsb
-
isb
+#ifdef CONFIG_ARCH_MSM_KRAIT
+ mrc p15, 0, r1, c0, c0, 0
+ ldr r3, =0xff00fc00
+ and r3, r1, r3
+ ldr r1, =0x51000400
+ cmp r3, r1
+ mrceq p15, 7, r3, c15, c0, 2
+ biceq r3, r3, #0x400
+ mcreq p15, 7, r3, c15, c0, 2
+#endif
stmfd sp!, {lr}
bl v7_flush_kern_cache_all
#ifdef CONFIG_MSM_TRACE_ACROSS_PC
diff --git a/arch/arm/mach-msm/include/mach/camera.h b/arch/arm/mach-msm/include/mach/camera.h
index ce89c14..ae1f753 100644
--- a/arch/arm/mach-msm/include/mach/camera.h
+++ b/arch/arm/mach-msm/include/mach/camera.h
@@ -324,7 +324,8 @@
struct msm_actuator_ctrl {
int (*a_init_table)(void);
- int (*a_power_down)(void);
+ int (*a_power_up)(void *);
+ int (*a_power_down)(void *);
int (*a_create_subdevice)(void *, void *);
int (*a_config)(void __user *);
};
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_board_8660.c b/arch/arm/mach-msm/msm_bus/msm_bus_board_8660.c
index fc91291..296c6dc 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_board_8660.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_board_8660.c
@@ -140,8 +140,8 @@
.tier = tiered_slave_ebi,
.num_tiers = ARRAY_SIZE(tiered_slave_ebi),
.buswidth = 8,
- .slaveclk[DUAL_CTX] = "ebi1_msmbus_clk",
- .slaveclk[ACTIVE_CTX] = "ebi1_a_clk",
+ .slaveclk[DUAL_CTX] = "mem_clk",
+ .slaveclk[ACTIVE_CTX] = "mem_a_clk",
},
{
.id = MSM_BUS_SLAVE_AMPSS_L2,
@@ -848,8 +848,8 @@
.info = apps_fabric_info,
.len = ARRAY_SIZE(apps_fabric_info),
.ahb = 0,
- .fabclk[DUAL_CTX] = "afab_clk",
- .fabclk[ACTIVE_CTX] = "afab_a_clk",
+ .fabclk[DUAL_CTX] = "bus_clk",
+ .fabclk[ACTIVE_CTX] = "bus_a_clk",
.haltid = MSM_RPM_ID_APPS_FABRIC_HALT_0,
.offset = MSM_RPM_ID_APPS_FABRIC_ARB_0,
.nmasters = 4,
@@ -864,8 +864,8 @@
system_fabric_info,
ARRAY_SIZE(system_fabric_info),
.ahb = 0,
- .fabclk[DUAL_CTX] = "sfab_clk",
- .fabclk[ACTIVE_CTX] = "sfab_a_clk",
+ .fabclk[DUAL_CTX] = "bus_clk",
+ .fabclk[ACTIVE_CTX] = "bus_a_clk",
.haltid = MSM_RPM_ID_SYSTEM_FABRIC_HALT_0,
.offset = MSM_RPM_ID_SYSTEM_FABRIC_ARB_0,
.nmasters = 17,
@@ -880,8 +880,8 @@
mmss_fabric_info,
ARRAY_SIZE(mmss_fabric_info),
.ahb = 0,
- .fabclk[DUAL_CTX] = "mmfab_clk",
- .fabclk[ACTIVE_CTX] = "mmfab_a_clk",
+ .fabclk[DUAL_CTX] = "bus_clk",
+ .fabclk[ACTIVE_CTX] = "bus_a_clk",
.haltid = MSM_RPM_ID_MM_FABRIC_HALT_0,
.offset = MSM_RPM_ID_MM_FABRIC_ARB_0,
.nmasters = 14,
@@ -896,8 +896,8 @@
sys_fpb_fabric_info,
ARRAY_SIZE(sys_fpb_fabric_info),
.ahb = 1,
- .fabclk[DUAL_CTX] = "sfpb_clk",
- .fabclk[ACTIVE_CTX] = "sfpb_a_clk",
+ .fabclk[DUAL_CTX] = "bus_clk",
+ .fabclk[ACTIVE_CTX] = "bus_a_clk",
.nmasters = 0,
.nslaves = 0,
.ntieredslaves = 0,
@@ -910,8 +910,8 @@
cpss_fpb_fabric_info,
ARRAY_SIZE(cpss_fpb_fabric_info),
.ahb = 1,
- .fabclk[DUAL_CTX] = "cfpb_clk",
- .fabclk[ACTIVE_CTX] = "cfpb_a_clk",
+ .fabclk[DUAL_CTX] = "bus_clk",
+ .fabclk[ACTIVE_CTX] = "bus_a_clk",
.nmasters = 0,
.nslaves = 0,
.ntieredslaves = 0,
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_board_8960.c b/arch/arm/mach-msm/msm_bus/msm_bus_board_8960.c
index 97a3145..0d265c7 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_board_8960.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_board_8960.c
@@ -154,8 +154,8 @@
.tier = tiered_slave_ebi1_ch0,
.num_tiers = ARRAY_SIZE(tiered_slave_ebi1_ch0),
.buswidth = 8,
- .slaveclk[DUAL_CTX] = "ebi1_msmbus_clk",
- .slaveclk[ACTIVE_CTX] = "ebi1_a_clk",
+ .slaveclk[DUAL_CTX] = "mem_clk",
+ .slaveclk[ACTIVE_CTX] = "mem_a_clk",
},
{
.id = MSM_BUS_SLAVE_EBI_CH1,
@@ -164,8 +164,8 @@
.tier = tiered_slave_ebi1_ch1,
.num_tiers = ARRAY_SIZE(tiered_slave_ebi1_ch1),
.buswidth = 8,
- .slaveclk[DUAL_CTX] = "ebi1_msmbus_clk",
- .slaveclk[ACTIVE_CTX] = "ebi1_a_clk",
+ .slaveclk[DUAL_CTX] = "mem_clk",
+ .slaveclk[ACTIVE_CTX] = "mem_a_clk",
},
{
.id = MSM_BUS_SLAVE_AMPSS_L2,
@@ -875,8 +875,8 @@
.info = apps_fabric_info,
.len = ARRAY_SIZE(apps_fabric_info),
.ahb = 0,
- .fabclk[DUAL_CTX] = "afab_clk",
- .fabclk[ACTIVE_CTX] = "afab_a_clk",
+ .fabclk[DUAL_CTX] = "bus_clk",
+ .fabclk[ACTIVE_CTX] = "bus_a_clk",
.haltid = MSM_RPM_ID_APPS_FABRIC_CFG_HALT_0,
.offset = MSM_RPM_ID_APPS_FABRIC_ARB_0,
.nmasters = 6,
@@ -891,8 +891,8 @@
system_fabric_info,
ARRAY_SIZE(system_fabric_info),
.ahb = 0,
- .fabclk[DUAL_CTX] = "sfab_clk",
- .fabclk[ACTIVE_CTX] = "sfab_a_clk",
+ .fabclk[DUAL_CTX] = "bus_clk",
+ .fabclk[ACTIVE_CTX] = "bus_a_clk",
.haltid = MSM_RPM_ID_SYS_FABRIC_CFG_HALT_0,
.offset = MSM_RPM_ID_SYSTEM_FABRIC_ARB_0,
.nmasters = 15,
@@ -907,8 +907,8 @@
mmss_fabric_info,
ARRAY_SIZE(mmss_fabric_info),
.ahb = 0,
- .fabclk[DUAL_CTX] = "mmfab_clk",
- .fabclk[ACTIVE_CTX] = "mmfab_a_clk",
+ .fabclk[DUAL_CTX] = "bus_clk",
+ .fabclk[ACTIVE_CTX] = "bus_a_clk",
.haltid = MSM_RPM_ID_MMSS_FABRIC_CFG_HALT_0,
.offset = MSM_RPM_ID_MM_FABRIC_ARB_0,
.nmasters = 14,
@@ -923,8 +923,8 @@
sys_fpb_fabric_info,
ARRAY_SIZE(sys_fpb_fabric_info),
.ahb = 1,
- .fabclk[DUAL_CTX] = "sfpb_clk",
- .fabclk[ACTIVE_CTX] = "sfpb_a_clk",
+ .fabclk[DUAL_CTX] = "bus_clk",
+ .fabclk[ACTIVE_CTX] = "bus_a_clk",
.nmasters = 0,
.nslaves = 0,
.ntieredslaves = 0,
@@ -937,8 +937,8 @@
cpss_fpb_fabric_info,
ARRAY_SIZE(cpss_fpb_fabric_info),
.ahb = 1,
- .fabclk[DUAL_CTX] = "cfpb_clk",
- .fabclk[ACTIVE_CTX] = "cfpb_a_clk",
+ .fabclk[DUAL_CTX] = "bus_clk",
+ .fabclk[ACTIVE_CTX] = "bus_a_clk",
.nmasters = 0,
.nslaves = 0,
.ntieredslaves = 0,
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_board_9615.c b/arch/arm/mach-msm/msm_bus/msm_bus_board_9615.c
index a941a89..5b52cb9 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_board_9615.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_board_9615.c
@@ -192,8 +192,8 @@
.tier = tiered_slave_ebi1_ch0,
.num_tiers = ARRAY_SIZE(tiered_slave_ebi1_ch0),
.buswidth = 8,
- .slaveclk[DUAL_CTX] = "ebi1_msmbus_clk",
- .slaveclk[ACTIVE_CTX] = "ebi1_a_clk",
+ .slaveclk[DUAL_CTX] = "mem_clk",
+ .slaveclk[ACTIVE_CTX] = "mem_a_clk",
},
{
.id = MSM_BUS_SLAVE_SYSTEM_IMEM,
@@ -285,8 +285,8 @@
system_fabric_info,
ARRAY_SIZE(system_fabric_info),
.ahb = 0,
- .fabclk[DUAL_CTX] = "sfab_clk",
- .fabclk[ACTIVE_CTX] = "sfab_a_clk",
+ .fabclk[DUAL_CTX] = "bus_clk",
+ .fabclk[ACTIVE_CTX] = "bus_a_clk",
.haltid = MSM_RPM_ID_SYS_FABRIC_CFG_HALT_0,
.offset = MSM_RPM_ID_SYSTEM_FABRIC_ARB_0,
.nmasters = 12,
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_fabric.c b/arch/arm/mach-msm/msm_bus/msm_bus_fabric.c
index fd82111..02dfed6 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_fabric.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_fabric.c
@@ -71,7 +71,7 @@
SLAVE_NODE);
if (info->node_info->slaveclk[DUAL_CTX]) {
- info->nodeclk[DUAL_CTX].clk = clk_get(NULL,
+ info->nodeclk[DUAL_CTX].clk = clk_get_sys("msm_bus",
info->node_info->slaveclk[DUAL_CTX]);
if (IS_ERR(info->nodeclk[DUAL_CTX].clk)) {
MSM_BUS_ERR("Could not get clock for %s\n",
@@ -144,8 +144,8 @@
for (ctx = 0; ctx < NUM_CTX; ctx++) {
if (info->node_info->slaveclk[ctx]) {
- info->nodeclk[ctx].clk = clk_get(NULL,
- info->node_info->slaveclk[ctx]);
+ info->nodeclk[ctx].clk = clk_get_sys("msm_bus",
+ info->node_info->slaveclk[ctx]);
if (IS_ERR(info->nodeclk[ctx].clk)) {
MSM_BUS_ERR("Couldn't get clk %s\n",
info->node_info->slaveclk[ctx]);
@@ -156,7 +156,7 @@
}
}
if (info->node_info->memclk) {
- info->memclk.clk = clk_get(NULL,
+ info->memclk.clk = clk_get_sys("msm_bus",
info->node_info->memclk);
if (IS_ERR(info->memclk.clk)) {
MSM_BUS_ERR("Couldn't get clk %s\n",
@@ -652,10 +652,21 @@
fabric->fabdev.id);
fabric->fabdev.board_algo = fabric->pdata->board_algo;
+ /*
+ * clk and bw for fabric->info will contain the max bw and clk
+ * it will allow. This info will come from the boards file.
+ */
+ ret = msm_bus_fabric_device_register(&fabric->fabdev);
+ if (ret) {
+ MSM_BUS_ERR("Error registering fabric %d ret %d\n",
+ fabric->fabdev.id, ret);
+ goto err;
+ }
+
for (ctx = 0; ctx < NUM_CTX; ctx++) {
if (pdata->fabclk[ctx]) {
- fabric->info.nodeclk[ctx].clk = clk_get(NULL,
- pdata->fabclk[ctx]);
+ fabric->info.nodeclk[ctx].clk = clk_get(
+ &fabric->fabdev.dev, pdata->fabclk[ctx]);
if (IS_ERR(fabric->info.nodeclk[ctx].clk)) {
MSM_BUS_ERR("Couldn't get clock %s\n",
pdata->fabclk[ctx]);
@@ -687,16 +698,6 @@
}
}
}
- /*
- * clk and bw for fabric->info will contain the max bw and clk
- * it will allow. This info will come from the boards file.
- */
- ret = msm_bus_fabric_device_register(&fabric->fabdev);
- if (ret) {
- MSM_BUS_ERR("Error registering fabric %d ret %d\n",
- fabric->fabdev.id, ret);
- goto err;
- }
return ret;
err:
diff --git a/arch/arm/mach-msm/peripheral-reset.c b/arch/arm/mach-msm/peripheral-reset.c
index f3f5388..2d60a7e 100644
--- a/arch/arm/mach-msm/peripheral-reset.c
+++ b/arch/arm/mach-msm/peripheral-reset.c
@@ -34,7 +34,6 @@
#define PROXY_VOTE_TIMEOUT 10000
#define MSM_MMS_REGS_BASE 0x10200000
-#define MSM_LPASS_QDSP6SS_BASE 0x28800000
#define MARM_RESET (MSM_CLK_CTL_BASE + 0x2BD4)
#define MARM_BOOT_CONTROL (msm_mms_regs_base + 0x0010)
@@ -58,18 +57,12 @@
#define PLL8_STATUS (MSM_CLK_CTL_BASE + 0x3158)
#define CLK_HALT_MSS_SMPSS_MISC_STATE (MSM_CLK_CTL_BASE + 0x2FDC)
-#define LCC_Q6_FUNC (MSM_LPASS_CLK_CTL_BASE + 0x001C)
-#define QDSP6SS_RST_EVB (msm_lpass_qdsp6ss_base + 0x0000)
-#define QDSP6SS_STRAP_TCM (msm_lpass_qdsp6ss_base + 0x001C)
-#define QDSP6SS_STRAP_AHB (msm_lpass_qdsp6ss_base + 0x0020)
-
#define PPSS_RESET (MSM_CLK_CTL_BASE + 0x2594)
#define PPSS_PROC_CLK_CTL (MSM_CLK_CTL_BASE + 0x2588)
#define CLK_HALT_DFAB_STATE (MSM_CLK_CTL_BASE + 0x2FC8)
-static int modem_start, q6_start, dsps_start;
+static int modem_start, dsps_start;
static void __iomem *msm_mms_regs_base;
-static void __iomem *msm_lpass_qdsp6ss_base;
static int init_image_modem_trusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
@@ -85,20 +78,6 @@
return 0;
}
-static int init_image_q6_trusted(struct pil_desc *pil,
- const u8 *metadata, size_t size)
-{
- return pas_init_image(PAS_Q6, metadata, size);
-}
-
-static int init_image_q6_untrusted(struct pil_desc *pil, const u8 *metadata,
- size_t size)
-{
- struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
- q6_start = ehdr->e_entry;
- return 0;
-}
-
static int init_image_dsps_trusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
@@ -291,154 +270,6 @@
return 0;
}
-#define LV_EN BIT(27)
-#define STOP_CORE BIT(26)
-#define CLAMP_IO BIT(25)
-#define Q6SS_PRIV_ARES BIT(24)
-#define Q6SS_SS_ARES BIT(23)
-#define Q6SS_ISDB_ARES BIT(22)
-#define Q6SS_ETM_ARES BIT(21)
-#define Q6_JTAG_CRC_EN BIT(20)
-#define Q6_JTAG_INV_EN BIT(19)
-#define Q6_JTAG_CXC_EN BIT(18)
-#define Q6_PXO_CRC_EN BIT(17)
-#define Q6_PXO_INV_EN BIT(16)
-#define Q6_PXO_CXC_EN BIT(15)
-#define Q6_PXO_SLEEP_EN BIT(14)
-#define Q6_SLP_CRC_EN BIT(13)
-#define Q6_SLP_INV_EN BIT(12)
-#define Q6_SLP_CXC_EN BIT(11)
-#define CORE_ARES BIT(10)
-#define CORE_L1_MEM_CORE_EN BIT(9)
-#define CORE_TCM_MEM_CORE_EN BIT(8)
-#define CORE_TCM_MEM_PERPH_EN BIT(7)
-#define CORE_GFM4_CLK_EN BIT(2)
-#define CORE_GFM4_RES BIT(1)
-#define RAMP_PLL_SRC_SEL BIT(0)
-
-#define Q6_STRAP_AHB_UPPER (0x290 << 12)
-#define Q6_STRAP_AHB_LOWER 0x280
-#define Q6_STRAP_TCM_BASE (0x28C << 15)
-#define Q6_STRAP_TCM_CONFIG 0x28B
-
-static struct clk *pll4;
-
-static void remove_q6_proxy_votes(unsigned long data)
-{
- clk_disable(pll4);
-}
-static DEFINE_TIMER(q6_timer, remove_q6_proxy_votes, 0, 0);
-
-static void make_q6_proxy_votes(void)
-{
- /* Make proxy votes for Q6 and set up timer to disable it. */
- clk_enable(pll4);
- mod_timer(&q6_timer, jiffies + msecs_to_jiffies(PROXY_VOTE_TIMEOUT));
-}
-
-static void remove_q6_proxy_votes_now(void)
-{
- /*
- * If the Q6 proxy vote hasn't been removed yet, them remove the
- * votes immediately.
- */
- if (del_timer(&q6_timer))
- remove_q6_proxy_votes(0);
-}
-
-static int reset_q6_untrusted(struct pil_desc *pil)
-{
- u32 reg;
-
- make_q6_proxy_votes();
-
- /* Put Q6 into reset */
- reg = __raw_readl(LCC_Q6_FUNC);
- reg |= Q6SS_SS_ARES | Q6SS_ISDB_ARES | Q6SS_ETM_ARES | STOP_CORE |
- CORE_ARES;
- reg &= ~CORE_GFM4_CLK_EN;
- __raw_writel(reg, LCC_Q6_FUNC);
-
- /* Wait 8 AHB cycles for Q6 to be fully reset (AHB = 1.5Mhz) */
- usleep_range(20, 30);
-
- /* Turn on Q6 memory */
- reg |= CORE_GFM4_CLK_EN | CORE_L1_MEM_CORE_EN | CORE_TCM_MEM_CORE_EN |
- CORE_TCM_MEM_PERPH_EN;
- __raw_writel(reg, LCC_Q6_FUNC);
-
- /* Turn on Q6 core clocks and take core out of reset */
- reg &= ~(CLAMP_IO | Q6SS_SS_ARES | Q6SS_ISDB_ARES | Q6SS_ETM_ARES |
- CORE_ARES);
- __raw_writel(reg, LCC_Q6_FUNC);
-
- /* Wait for clocks to be enabled */
- mb();
- /* Program boot address */
- __raw_writel((q6_start >> 12) & 0xFFFFF, QDSP6SS_RST_EVB);
-
- __raw_writel(Q6_STRAP_TCM_CONFIG | Q6_STRAP_TCM_BASE,
- QDSP6SS_STRAP_TCM);
- __raw_writel(Q6_STRAP_AHB_UPPER | Q6_STRAP_AHB_LOWER,
- QDSP6SS_STRAP_AHB);
-
- /* Wait for addresses to be programmed before starting Q6 */
- mb();
-
- /* Start Q6 instruction execution */
- reg &= ~STOP_CORE;
- __raw_writel(reg, LCC_Q6_FUNC);
-
- return 0;
-}
-
-static int reset_q6_trusted(struct pil_desc *pil)
-{
- make_q6_proxy_votes();
-
- return pas_auth_and_reset(PAS_Q6);
-}
-
-static int shutdown_q6_untrusted(struct pil_desc *pil)
-{
- u32 reg;
-
- /* Put Q6 into reset */
- reg = __raw_readl(LCC_Q6_FUNC);
- reg |= Q6SS_SS_ARES | Q6SS_ISDB_ARES | Q6SS_ETM_ARES | STOP_CORE |
- CORE_ARES;
- reg &= ~CORE_GFM4_CLK_EN;
- __raw_writel(reg, LCC_Q6_FUNC);
-
- /* Wait 8 AHB cycles for Q6 to be fully reset (AHB = 1.5Mhz) */
- usleep_range(20, 30);
-
- /* Turn off Q6 memory */
- reg &= ~(CORE_L1_MEM_CORE_EN | CORE_TCM_MEM_CORE_EN |
- CORE_TCM_MEM_PERPH_EN);
- __raw_writel(reg, LCC_Q6_FUNC);
-
- reg |= CLAMP_IO;
- __raw_writel(reg, LCC_Q6_FUNC);
-
- remove_q6_proxy_votes_now();
-
- return 0;
-}
-
-static int shutdown_q6_trusted(struct pil_desc *pil)
-{
- int ret;
-
- ret = pas_shutdown(PAS_Q6);
- if (ret)
- return ret;
-
- remove_q6_proxy_votes_now();
-
- return 0;
-}
-
static int reset_dsps_untrusted(struct pil_desc *pil)
{
__raw_writel(0x10, PPSS_PROC_CLK_CTL);
@@ -490,13 +321,6 @@
.shutdown = shutdown_modem_untrusted,
};
-struct pil_reset_ops pil_q6_ops = {
- .init_image = init_image_q6_untrusted,
- .verify_blob = verify_blob,
- .auth_and_reset = reset_q6_untrusted,
- .shutdown = shutdown_q6_untrusted,
-};
-
struct pil_reset_ops pil_dsps_ops = {
.init_image = init_image_dsps_untrusted,
.verify_blob = verify_blob,
@@ -522,16 +346,6 @@
.ops = &pil_modem_ops,
};
-static struct platform_device pil_q6 = {
- .name = "pil_q6",
-};
-
-static struct pil_desc pil_q6_desc = {
- .name = "q6",
- .dev = &pil_q6.dev,
- .ops = &pil_q6_ops,
-};
-
static struct platform_device pil_playready = {
.name = "pil_playready",
};
@@ -558,38 +372,22 @@
if (!msm_mms_regs_base)
goto err;
- msm_lpass_qdsp6ss_base = ioremap(MSM_LPASS_QDSP6SS_BASE, SZ_256);
- if (!msm_lpass_qdsp6ss_base)
- goto err_lpass;
-
pxo = msm_xo_get(MSM_XO_PXO, "pil");
if (IS_ERR(pxo))
goto err_pxo;
- pll4 = clk_get_sys("peripheral-reset", "pll4");
- if (IS_ERR(pll4))
- goto err_clk;
-
if (pas_supported(PAS_MODEM) > 0) {
pil_modem_ops.init_image = init_image_modem_trusted;
pil_modem_ops.auth_and_reset = reset_modem_trusted;
pil_modem_ops.shutdown = shutdown_modem_trusted;
}
- if (pas_supported(PAS_Q6) > 0) {
- pil_q6_ops.init_image = init_image_q6_trusted;
- pil_q6_ops.auth_and_reset = reset_q6_trusted;
- pil_q6_ops.shutdown = shutdown_q6_trusted;
- }
-
if (pas_supported(PAS_DSPS) > 0) {
pil_dsps_ops.init_image = init_image_dsps_trusted;
pil_dsps_ops.auth_and_reset = reset_dsps_trusted;
pil_dsps_ops.shutdown = shutdown_dsps_trusted;
}
- BUG_ON(platform_device_register(&pil_q6));
- BUG_ON(msm_pil_register(&pil_q6_desc));
BUG_ON(platform_device_register(&pil_modem));
BUG_ON(msm_pil_register(&pil_modem_desc));
BUG_ON(platform_device_register(&pil_playready));
@@ -602,11 +400,7 @@
return 0;
-err_clk:
- msm_xo_put(pxo);
err_pxo:
- iounmap(msm_lpass_qdsp6ss_base);
-err_lpass:
iounmap(msm_mms_regs_base);
err:
return -ENOMEM;
@@ -615,7 +409,6 @@
static void __exit msm_peripheral_reset_exit(void)
{
iounmap(msm_mms_regs_base);
- iounmap(msm_lpass_qdsp6ss_base);
}
arch_initcall(msm_peripheral_reset_init);
diff --git a/arch/arm/mach-msm/pil-q6v3.c b/arch/arm/mach-msm/pil-q6v3.c
new file mode 100644
index 0000000..7354d93
--- /dev/null
+++ b/arch/arm/mach-msm/pil-q6v3.c
@@ -0,0 +1,299 @@
+/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/delay.h>
+#include <linux/elf.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+
+#include <mach/msm_iomap.h>
+
+#include "peripheral-loader.h"
+#include "scm-pas.h"
+
+#define QDSP6SS_RST_EVB 0x0000
+#define QDSP6SS_STRAP_TCM 0x001C
+#define QDSP6SS_STRAP_AHB 0x0020
+
+#define LCC_Q6_FUNC (MSM_LPASS_CLK_CTL_BASE + 0x001C)
+#define LV_EN BIT(27)
+#define STOP_CORE BIT(26)
+#define CLAMP_IO BIT(25)
+#define Q6SS_PRIV_ARES BIT(24)
+#define Q6SS_SS_ARES BIT(23)
+#define Q6SS_ISDB_ARES BIT(22)
+#define Q6SS_ETM_ARES BIT(21)
+#define Q6_JTAG_CRC_EN BIT(20)
+#define Q6_JTAG_INV_EN BIT(19)
+#define Q6_JTAG_CXC_EN BIT(18)
+#define Q6_PXO_CRC_EN BIT(17)
+#define Q6_PXO_INV_EN BIT(16)
+#define Q6_PXO_CXC_EN BIT(15)
+#define Q6_PXO_SLEEP_EN BIT(14)
+#define Q6_SLP_CRC_EN BIT(13)
+#define Q6_SLP_INV_EN BIT(12)
+#define Q6_SLP_CXC_EN BIT(11)
+#define CORE_ARES BIT(10)
+#define CORE_L1_MEM_CORE_EN BIT(9)
+#define CORE_TCM_MEM_CORE_EN BIT(8)
+#define CORE_TCM_MEM_PERPH_EN BIT(7)
+#define CORE_GFM4_CLK_EN BIT(2)
+#define CORE_GFM4_RES BIT(1)
+#define RAMP_PLL_SRC_SEL BIT(0)
+
+#define Q6_STRAP_AHB_UPPER (0x290 << 12)
+#define Q6_STRAP_AHB_LOWER 0x280
+#define Q6_STRAP_TCM_BASE (0x28C << 15)
+#define Q6_STRAP_TCM_CONFIG 0x28B
+
+#define PROXY_VOTE_TIMEOUT 10000
+
+struct q6v3_data {
+ void __iomem *base;
+ unsigned long start_addr;
+ struct clk *pll;
+ struct timer_list timer;
+};
+
+static int nop_verify_blob(struct pil_desc *pil, u32 phy_addr, size_t size)
+{
+ return 0;
+}
+
+static int pil_q6v3_init_image(struct pil_desc *pil, const u8 *metadata,
+ size_t size)
+{
+ const struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
+ struct q6v3_data *drv = dev_get_drvdata(pil->dev);
+ drv->start_addr = ehdr->e_entry;
+ return 0;
+}
+
+static void q6v3_remove_proxy_votes(unsigned long data)
+{
+ struct q6v3_data *drv = (struct q6v3_data *)data;
+ clk_disable(drv->pll);
+}
+
+static void q6v3_make_proxy_votes(struct device *dev)
+{
+ int ret;
+ struct q6v3_data *drv = dev_get_drvdata(dev);
+
+ ret = clk_enable(drv->pll);
+ if (ret)
+ dev_err(dev, "Failed to enable PLL\n");
+ mod_timer(&drv->timer, jiffies + msecs_to_jiffies(PROXY_VOTE_TIMEOUT));
+}
+
+static void q6v3_remove_proxy_votes_now(struct q6v3_data *drv)
+{
+ /* If the proxy vote hasn't been removed yet, remove it immediately. */
+ if (del_timer(&drv->timer))
+ q6v3_remove_proxy_votes((unsigned long)drv);
+}
+
+static int pil_q6v3_reset(struct pil_desc *pil)
+{
+ u32 reg;
+ struct q6v3_data *drv = dev_get_drvdata(pil->dev);
+
+ q6v3_make_proxy_votes(pil->dev);
+
+ /* Put Q6 into reset */
+ reg = readl_relaxed(LCC_Q6_FUNC);
+ reg |= Q6SS_SS_ARES | Q6SS_ISDB_ARES | Q6SS_ETM_ARES | STOP_CORE |
+ CORE_ARES;
+ reg &= ~CORE_GFM4_CLK_EN;
+ writel_relaxed(reg, LCC_Q6_FUNC);
+
+ /* Wait 8 AHB cycles for Q6 to be fully reset (AHB = 1.5Mhz) */
+ usleep_range(20, 30);
+
+ /* Turn on Q6 memory */
+ reg |= CORE_GFM4_CLK_EN | CORE_L1_MEM_CORE_EN | CORE_TCM_MEM_CORE_EN |
+ CORE_TCM_MEM_PERPH_EN;
+ writel_relaxed(reg, LCC_Q6_FUNC);
+
+ /* Turn on Q6 core clocks and take core out of reset */
+ reg &= ~(CLAMP_IO | Q6SS_SS_ARES | Q6SS_ISDB_ARES | Q6SS_ETM_ARES |
+ CORE_ARES);
+ writel_relaxed(reg, LCC_Q6_FUNC);
+
+ /* Wait for clocks to be enabled */
+ mb();
+ /* Program boot address */
+ writel_relaxed((drv->start_addr >> 12) & 0xFFFFF,
+ drv->base + QDSP6SS_RST_EVB);
+
+ writel_relaxed(Q6_STRAP_TCM_CONFIG | Q6_STRAP_TCM_BASE,
+ drv->base + QDSP6SS_STRAP_TCM);
+ writel_relaxed(Q6_STRAP_AHB_UPPER | Q6_STRAP_AHB_LOWER,
+ drv->base + QDSP6SS_STRAP_AHB);
+
+ /* Wait for addresses to be programmed before starting Q6 */
+ mb();
+
+ /* Start Q6 instruction execution */
+ reg &= ~STOP_CORE;
+ writel_relaxed(reg, LCC_Q6_FUNC);
+
+ return 0;
+}
+
+static int pil_q6v3_shutdown(struct pil_desc *pil)
+{
+ u32 reg;
+ struct q6v3_data *drv = dev_get_drvdata(pil->dev);
+
+ /* Put Q6 into reset */
+ reg = readl_relaxed(LCC_Q6_FUNC);
+ reg |= Q6SS_SS_ARES | Q6SS_ISDB_ARES | Q6SS_ETM_ARES | STOP_CORE |
+ CORE_ARES;
+ reg &= ~CORE_GFM4_CLK_EN;
+ writel_relaxed(reg, LCC_Q6_FUNC);
+
+ /* Wait 8 AHB cycles for Q6 to be fully reset (AHB = 1.5Mhz) */
+ usleep_range(20, 30);
+
+ /* Turn off Q6 memory */
+ reg &= ~(CORE_L1_MEM_CORE_EN | CORE_TCM_MEM_CORE_EN |
+ CORE_TCM_MEM_PERPH_EN);
+ writel_relaxed(reg, LCC_Q6_FUNC);
+
+ reg |= CLAMP_IO;
+ writel_relaxed(reg, LCC_Q6_FUNC);
+
+ q6v3_remove_proxy_votes_now(drv);
+
+ return 0;
+}
+
+static struct pil_reset_ops pil_q6v3_ops = {
+ .init_image = pil_q6v3_init_image,
+ .verify_blob = nop_verify_blob,
+ .auth_and_reset = pil_q6v3_reset,
+ .shutdown = pil_q6v3_shutdown,
+};
+
+static int pil_q6v3_init_image_trusted(struct pil_desc *pil,
+ const u8 *metadata, size_t size)
+{
+ return pas_init_image(PAS_Q6, metadata, size);
+}
+
+static int pil_q6v3_reset_trusted(struct pil_desc *pil)
+{
+ q6v3_make_proxy_votes(pil->dev);
+ return pas_auth_and_reset(PAS_Q6);
+}
+
+static int pil_q6v3_shutdown_trusted(struct pil_desc *pil)
+{
+ int ret;
+ struct q6v3_data *drv = dev_get_drvdata(pil->dev);
+
+ ret = pas_shutdown(PAS_Q6);
+ if (ret)
+ return ret;
+
+ q6v3_remove_proxy_votes_now(drv);
+
+ return 0;
+}
+
+static struct pil_reset_ops pil_q6v3_ops_trusted = {
+ .init_image = pil_q6v3_init_image_trusted,
+ .verify_blob = nop_verify_blob,
+ .auth_and_reset = pil_q6v3_reset_trusted,
+ .shutdown = pil_q6v3_shutdown_trusted,
+};
+
+static int __devinit pil_q6v3_driver_probe(struct platform_device *pdev)
+{
+ struct q6v3_data *drv;
+ struct resource *res;
+ struct pil_desc *desc;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res)
+ return -EINVAL;
+
+ drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL);
+ if (!drv)
+ return -ENOMEM;
+ platform_set_drvdata(pdev, drv);
+
+ drv->base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
+ if (!drv->base)
+ return -ENOMEM;
+
+ desc = devm_kzalloc(&pdev->dev, sizeof(*desc), GFP_KERNEL);
+ if (!drv)
+ return -ENOMEM;
+
+ drv->pll = clk_get(&pdev->dev, "pll4");
+ if (IS_ERR(drv->pll))
+ return PTR_ERR(drv->pll);
+
+ setup_timer(&drv->timer, q6v3_remove_proxy_votes, (unsigned long)drv);
+ desc->name = "q6";
+ desc->dev = &pdev->dev;
+
+ if (pas_supported(PAS_Q6) > 0) {
+ desc->ops = &pil_q6v3_ops_trusted;
+ dev_info(&pdev->dev, "using secure boot\n");
+ } else {
+ desc->ops = &pil_q6v3_ops;
+ dev_info(&pdev->dev, "using non-secure boot\n");
+ }
+
+ if (msm_pil_register(desc))
+ return -EINVAL;
+ return 0;
+}
+
+static int __devexit pil_q6v3_driver_exit(struct platform_device *pdev)
+{
+ struct q6v3_data *drv = platform_get_drvdata(pdev);
+ del_timer_sync(&drv->timer);
+ return 0;
+}
+
+static struct platform_driver pil_q6v3_driver = {
+ .probe = pil_q6v3_driver_probe,
+ .remove = __devexit_p(pil_q6v3_driver_exit),
+ .driver = {
+ .name = "pil_qdsp6v3",
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init pil_q6v3_init(void)
+{
+ return platform_driver_register(&pil_q6v3_driver);
+}
+module_init(pil_q6v3_init);
+
+static void __exit pil_q6v3_exit(void)
+{
+ platform_driver_unregister(&pil_q6v3_driver);
+}
+module_exit(pil_q6v3_exit);
+
+MODULE_DESCRIPTION("Support for booting QDSP6v3 (Hexagon) processors");
+MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/mach-msm/qdsp6v2/aac_in.c b/arch/arm/mach-msm/qdsp6v2/aac_in.c
index 2519bb7..41d3ff3 100644
--- a/arch/arm/mach-msm/qdsp6v2/aac_in.c
+++ b/arch/arm/mach-msm/qdsp6v2/aac_in.c
@@ -214,7 +214,10 @@
rc = -EINVAL;
break;
}
- if ((cfg.bit_rate < 24000) || (cfg.bit_rate > 192000)) {
+ /* For aac-lc, min_bit_rate = min(24Kbps, 0.5*SR*num_chan);
+ max_bi_rate = min(192Kbps, 6*SR*num_chan);
+ min_sample_rate = 8000Hz, max_rate=48000 */
+ if ((cfg.bit_rate < 4000) || (cfg.bit_rate > 192000)) {
pr_err("%s: ERROR in setting bitrate = %d\n",
__func__, cfg.bit_rate);
rc = -EINVAL;
diff --git a/arch/arm/mach-msm/restart.c b/arch/arm/mach-msm/restart.c
index 28bf064..06e3d37 100644
--- a/arch/arm/mach-msm/restart.c
+++ b/arch/arm/mach-msm/restart.c
@@ -122,9 +122,6 @@
#endif
pm8xxx_reset_pwr_off(0);
- if (cpu_is_msm8x60())
- pm8901_reset_pwr_off(0);
-
if (lower_pshold) {
__raw_writel(0, PSHOLD_CTL_SU);
mdelay(10000);
diff --git a/arch/arm/mach-msm/smd_tty.c b/arch/arm/mach-msm/smd_tty.c
index dc6ba5c..c8248a7 100644
--- a/arch/arm/mach-msm/smd_tty.c
+++ b/arch/arm/mach-msm/smd_tty.c
@@ -59,33 +59,38 @@
int is_open;
wait_queue_head_t ch_opened_wait_queue;
spinlock_t reset_lock;
+ struct smd_config *smd;
};
+/**
+ * SMD port configuration.
+ *
+ * @tty_dev_index Index into smd_tty[]
+ * @port_name Name of the SMD port
+ * @dev_name Name of the TTY Device (if NULL, @port_name is used)
+ * @edge SMD edge
+ */
+struct smd_config {
+ uint32_t tty_dev_index;
+ const char *port_name;
+ const char *dev_name;
+ uint32_t edge;
+};
+
+static struct smd_config smd_configs[] = {
+ {0, "DS", NULL, SMD_APPS_MODEM},
+ {1, "APPS_FM", NULL, SMD_APPS_WCNSS},
+ {2, "APPS_RIVA_BT_ACL", NULL, SMD_APPS_WCNSS},
+ {3, "APPS_RIVA_BT_CMD", NULL, SMD_APPS_WCNSS},
+ {4, "MBALBRIDGE", NULL, SMD_APPS_MODEM},
+ {7, "DATA1", NULL, SMD_APPS_MODEM},
+ {11, "DATA11", NULL, SMD_APPS_MODEM},
+ {21, "DATA21", NULL, SMD_APPS_MODEM},
+ {27, "GPSNMEA", NULL, SMD_APPS_MODEM},
+ {36, "LOOPBACK", "LOOPBACK_TTY", SMD_APPS_MODEM},
+};
+#define DS_IDX 0
#define LOOPBACK_IDX 36
-static char *smd_ch_name[] = {
- [0] = "DS",
- [1] = "APPS_FM",
- [2] = "APPS_RIVA_BT_ACL",
- [3] = "APPS_RIVA_BT_CMD",
- [4] = "MBALBRIDGE",
- [7] = "DATA1",
- [21] = "DATA21",
- [27] = "GPSNMEA",
- [36] = "LOOPBACK",
-};
-
-static uint32_t smd_ch_edge[] = {
- [0] = SMD_APPS_MODEM,
- [1] = SMD_APPS_WCNSS,
- [2] = SMD_APPS_WCNSS,
- [3] = SMD_APPS_WCNSS,
- [4] = SMD_APPS_MODEM,
- [7] = SMD_APPS_MODEM,
- [21] = SMD_APPS_MODEM,
- [27] = SMD_APPS_MODEM,
- [36] = SMD_APPS_MODEM,
-};
-
static struct delayed_work loopback_work;
static struct smd_tty_info smd_tty[MAX_SMD_TTYS];
@@ -228,12 +233,12 @@
static int smd_tty_open(struct tty_struct *tty, struct file *f)
{
int res = 0;
- int n = tty->index;
+ unsigned int n = tty->index;
struct smd_tty_info *info;
char *peripheral = NULL;
- if (!smd_ch_name[n])
+ if (n >= MAX_SMD_TTYS || !smd_tty[n].smd)
return -ENODEV;
info = smd_tty + n;
@@ -242,11 +247,11 @@
tty->driver_data = info;
if (info->open_count++ == 0) {
- if (smd_ch_edge[n] == SMD_APPS_MODEM)
+ if (smd_tty[n].smd->edge == SMD_APPS_MODEM)
peripheral = "modem";
if (peripheral) {
- info->pil = pil_get("modem");
+ info->pil = pil_get(peripheral);
if (IS_ERR(info->pil)) {
res = PTR_ERR(info->pil);
goto out;
@@ -257,7 +262,7 @@
* the wait need to be done atmost once, using msleep
* doesn't degrade the performance.
*/
- if (n == 36) {
+ if (n == LOOPBACK_IDX) {
if (!is_modem_smsm_inited())
msleep(5000);
smsm_change_state(SMSM_APPS_STATE,
@@ -297,15 +302,15 @@
tasklet_init(&info->tty_tsklt, smd_tty_read,
(unsigned long)info);
wake_lock_init(&info->wake_lock, WAKE_LOCK_SUSPEND,
- smd_ch_name[n]);
+ smd_tty[n].smd->port_name);
if (!info->ch) {
- res = smd_named_open_on_edge(smd_ch_name[n],
- smd_ch_edge[n],
+ res = smd_named_open_on_edge(smd_tty[n].smd->port_name,
+ smd_tty[n].smd->edge,
&info->ch, info,
smd_tty_notify);
if (res < 0) {
pr_err("%s: %s open failed %d\n", __func__,
- smd_ch_name[n], res);
+ smd_tty[n].smd->port_name, res);
goto release_pil;
}
@@ -316,7 +321,8 @@
res = -ETIMEDOUT;
if (res < 0) {
pr_err("%s: wait for %s smd_open failed %d\n",
- __func__, smd_ch_name[n], res);
+ __func__, smd_tty[n].smd->port_name,
+ res);
goto release_pil;
}
res = 0;
@@ -474,35 +480,24 @@
static int smd_tty_dummy_probe(struct platform_device *pdev)
{
- if (!strncmp(pdev->name, smd_ch_name[0],
- strnlen(smd_ch_name[0], SMD_MAX_CH_NAME_LEN)))
- complete_all(&smd_tty[0].ch_allocated);
- else if (!strncmp(pdev->name, smd_ch_name[1],
- strnlen(smd_ch_name[1], SMD_MAX_CH_NAME_LEN)))
- complete_all(&smd_tty[1].ch_allocated);
- else if (!strncmp(pdev->name, smd_ch_name[2],
- strnlen(smd_ch_name[2], SMD_MAX_CH_NAME_LEN)))
- complete_all(&smd_tty[2].ch_allocated);
- else if (!strncmp(pdev->name, smd_ch_name[3],
- strnlen(smd_ch_name[3], SMD_MAX_CH_NAME_LEN)))
- complete_all(&smd_tty[3].ch_allocated);
- else if (!strncmp(pdev->name, smd_ch_name[4],
- strnlen(smd_ch_name[4], SMD_MAX_CH_NAME_LEN)))
- complete_all(&smd_tty[4].ch_allocated);
- else if (!strncmp(pdev->name, smd_ch_name[7],
- strnlen(smd_ch_name[7], SMD_MAX_CH_NAME_LEN)))
- complete_all(&smd_tty[7].ch_allocated);
- else if (!strncmp(pdev->name, smd_ch_name[21],
- strnlen(smd_ch_name[21], SMD_MAX_CH_NAME_LEN)))
- complete_all(&smd_tty[21].ch_allocated);
- else if (!strncmp(pdev->name, smd_ch_name[27],
- strnlen(smd_ch_name[27], SMD_MAX_CH_NAME_LEN)))
- complete_all(&smd_tty[27].ch_allocated);
- else if (!strncmp(pdev->name, "LOOPBACK_TTY",
- strnlen("LOOPBACK_TTY", SMD_MAX_CH_NAME_LEN)))
- complete_all(&smd_tty[36].ch_allocated);
+ int n;
+ int idx;
- return 0;
+ for (n = 0; n < ARRAY_SIZE(smd_configs); ++n) {
+ idx = smd_configs[n].tty_dev_index;
+
+ if (!smd_configs[n].dev_name)
+ continue;
+
+ if (!strncmp(pdev->name, smd_configs[n].dev_name,
+ SMD_MAX_CH_NAME_LEN)) {
+ complete_all(&smd_tty[idx].ch_allocated);
+ return 0;
+ }
+ }
+ pr_err("%s: unknown device '%s'\n", __func__, pdev->name);
+
+ return -ENODEV;
}
static struct tty_driver *smd_tty_driver;
@@ -510,7 +505,8 @@
static int __init smd_tty_init(void)
{
int ret;
- int ds_registered = 0;
+ int n;
+ int idx;
smd_tty_driver = alloc_tty_driver(MAX_SMD_TTYS);
if (smd_tty_driver == 0)
@@ -533,150 +529,69 @@
tty_set_operations(smd_tty_driver, &smd_tty_ops);
ret = tty_register_driver(smd_tty_driver);
- if (ret) return ret;
-
- /* this should be dynamic */
- tty_register_device(smd_tty_driver, 0, 0);
- tty_register_device(smd_tty_driver, 1, 0);
- tty_register_device(smd_tty_driver, 2, 0);
- tty_register_device(smd_tty_driver, 3, 0);
- tty_register_device(smd_tty_driver, 4, 0);
- tty_register_device(smd_tty_driver, 7, 0);
- tty_register_device(smd_tty_driver, 21, 0);
- tty_register_device(smd_tty_driver, 27, 0);
- tty_register_device(smd_tty_driver, 36, 0);
-
- init_completion(&smd_tty[0].ch_allocated);
- init_completion(&smd_tty[1].ch_allocated);
- init_completion(&smd_tty[2].ch_allocated);
- init_completion(&smd_tty[3].ch_allocated);
- init_completion(&smd_tty[4].ch_allocated);
- init_completion(&smd_tty[7].ch_allocated);
- init_completion(&smd_tty[21].ch_allocated);
- init_completion(&smd_tty[27].ch_allocated);
- init_completion(&smd_tty[36].ch_allocated);
-
- smd_tty[0].driver.probe = smd_tty_dummy_probe;
- smd_tty[0].driver.driver.name = smd_ch_name[0];
- smd_tty[0].driver.driver.owner = THIS_MODULE;
- spin_lock_init(&smd_tty[0].reset_lock);
- smd_tty[0].is_open = 0;
- init_waitqueue_head(&smd_tty[0].ch_opened_wait_queue);
- /*
- * DS port is opened in the kernel starting with 8660 fusion.
- * Only register the platform driver for targets older than that.
- */
- if (cpu_is_msm7x01() || cpu_is_msm7x25() || cpu_is_msm7x27() ||
- cpu_is_msm7x30() || cpu_is_qsd8x50() ||
- cpu_is_msm8x55() || (cpu_is_msm8x60() &&
- socinfo_get_platform_subtype() == 0x1)) {
- ret = platform_driver_register(&smd_tty[0].driver);
- if (ret)
- goto out;
- ds_registered = 1;
+ if (ret) {
+ put_tty_driver(smd_tty_driver);
+ pr_err("%s: driver registration failed %d\n", __func__, ret);
+ return ret;
}
- smd_tty[1].driver.probe = smd_tty_dummy_probe;
- smd_tty[1].driver.driver.name = smd_ch_name[1];
- smd_tty[1].driver.driver.owner = THIS_MODULE;
- spin_lock_init(&smd_tty[1].reset_lock);
- smd_tty[1].is_open = 0;
- init_waitqueue_head(&smd_tty[1].ch_opened_wait_queue);
- ret = platform_driver_register(&smd_tty[1].driver);
- if (ret)
- goto unreg0;
- smd_tty[2].driver.probe = smd_tty_dummy_probe;
- smd_tty[2].driver.driver.name = smd_ch_name[2];
- smd_tty[2].driver.driver.owner = THIS_MODULE;
- spin_lock_init(&smd_tty[2].reset_lock);
- smd_tty[2].is_open = 0;
- init_waitqueue_head(&smd_tty[2].ch_opened_wait_queue);
- ret = platform_driver_register(&smd_tty[2].driver);
- if (ret)
- goto unreg1;
- smd_tty[3].driver.probe = smd_tty_dummy_probe;
- smd_tty[3].driver.driver.name = smd_ch_name[3];
- smd_tty[3].driver.driver.owner = THIS_MODULE;
- spin_lock_init(&smd_tty[3].reset_lock);
- smd_tty[3].is_open = 0;
- init_waitqueue_head(&smd_tty[3].ch_opened_wait_queue);
- ret = platform_driver_register(&smd_tty[3].driver);
- if (ret)
- goto unreg2;
- smd_tty[4].driver.probe = smd_tty_dummy_probe;
- smd_tty[4].driver.driver.name = smd_ch_name[4];
- smd_tty[4].driver.driver.owner = THIS_MODULE;
- spin_lock_init(&smd_tty[4].reset_lock);
- smd_tty[4].is_open = 0;
- init_waitqueue_head(&smd_tty[4].ch_opened_wait_queue);
- ret = platform_driver_register(&smd_tty[4].driver);
- if (ret)
- goto unreg3;
- smd_tty[7].driver.probe = smd_tty_dummy_probe;
- smd_tty[7].driver.driver.name = smd_ch_name[7];
- smd_tty[7].driver.driver.owner = THIS_MODULE;
- spin_lock_init(&smd_tty[7].reset_lock);
- smd_tty[7].is_open = 0;
- init_waitqueue_head(&smd_tty[7].ch_opened_wait_queue);
- ret = platform_driver_register(&smd_tty[7].driver);
- if (ret)
- goto unreg4;
- smd_tty[21].driver.probe = smd_tty_dummy_probe;
- smd_tty[21].driver.driver.name = smd_ch_name[21];
- smd_tty[21].driver.driver.owner = THIS_MODULE;
- spin_lock_init(&smd_tty[21].reset_lock);
- smd_tty[21].is_open = 0;
- init_waitqueue_head(&smd_tty[21].ch_opened_wait_queue);
- ret = platform_driver_register(&smd_tty[21].driver);
- if (ret)
- goto unreg7;
- smd_tty[27].driver.probe = smd_tty_dummy_probe;
- smd_tty[27].driver.driver.name = smd_ch_name[27];
- smd_tty[27].driver.driver.owner = THIS_MODULE;
- spin_lock_init(&smd_tty[27].reset_lock);
- smd_tty[27].is_open = 0;
- init_waitqueue_head(&smd_tty[27].ch_opened_wait_queue);
- ret = platform_driver_register(&smd_tty[27].driver);
- if (ret)
- goto unreg21;
- smd_tty[36].driver.probe = smd_tty_dummy_probe;
- smd_tty[36].driver.driver.name = "LOOPBACK_TTY";
- smd_tty[36].driver.driver.owner = THIS_MODULE;
- spin_lock_init(&smd_tty[36].reset_lock);
- smd_tty[36].is_open = 0;
- init_waitqueue_head(&smd_tty[36].ch_opened_wait_queue);
- INIT_DELAYED_WORK(&loopback_work, loopback_probe_worker);
- ret = platform_driver_register(&smd_tty[36].driver);
- if (ret)
- goto unreg27;
+ for (n = 0; n < ARRAY_SIZE(smd_configs); ++n) {
+ idx = smd_configs[n].tty_dev_index;
+
+ if (smd_configs[n].dev_name == NULL)
+ smd_configs[n].dev_name = smd_configs[n].port_name;
+
+ if (idx == DS_IDX) {
+ /*
+ * DS port uses the kernel API starting with
+ * 8660 Fusion. Only register the userspace
+ * platform device for older targets.
+ */
+ int legacy_ds = 0;
+
+ legacy_ds |= cpu_is_msm7x01() || cpu_is_msm7x25();
+ legacy_ds |= cpu_is_msm7x27() || cpu_is_msm7x30();
+ legacy_ds |= cpu_is_qsd8x50() || cpu_is_msm8x55();
+ legacy_ds |= cpu_is_msm8x60() &&
+ (socinfo_get_platform_subtype() == 0x1);
+
+ if (!legacy_ds)
+ continue;
+ }
+
+ tty_register_device(smd_tty_driver, idx, 0);
+ init_completion(&smd_tty[idx].ch_allocated);
+
+ /* register platform device */
+ smd_tty[idx].driver.probe = smd_tty_dummy_probe;
+ smd_tty[idx].driver.driver.name = smd_configs[n].dev_name;
+ smd_tty[idx].driver.driver.owner = THIS_MODULE;
+ spin_lock_init(&smd_tty[idx].reset_lock);
+ smd_tty[idx].is_open = 0;
+ init_waitqueue_head(&smd_tty[idx].ch_opened_wait_queue);
+ ret = platform_driver_register(&smd_tty[idx].driver);
+
+ if (ret) {
+ pr_err("%s: init failed %d (%d)\n", __func__, idx, ret);
+ smd_tty[idx].driver.probe = NULL;
+ goto out;
+ }
+ smd_tty[idx].smd = &smd_configs[n];
+ }
+ INIT_DELAYED_WORK(&loopback_work, loopback_probe_worker);
return 0;
-unreg27:
- platform_driver_unregister(&smd_tty[27].driver);
-unreg21:
- platform_driver_unregister(&smd_tty[21].driver);
-unreg7:
- platform_driver_unregister(&smd_tty[7].driver);
-unreg4:
- platform_driver_unregister(&smd_tty[4].driver);
-unreg3:
- platform_driver_unregister(&smd_tty[3].driver);
-unreg2:
- platform_driver_unregister(&smd_tty[2].driver);
-unreg1:
- platform_driver_unregister(&smd_tty[1].driver);
-unreg0:
- if (ds_registered)
- platform_driver_unregister(&smd_tty[0].driver);
out:
- tty_unregister_device(smd_tty_driver, 0);
- tty_unregister_device(smd_tty_driver, 1);
- tty_unregister_device(smd_tty_driver, 2);
- tty_unregister_device(smd_tty_driver, 3);
- tty_unregister_device(smd_tty_driver, 7);
- tty_unregister_device(smd_tty_driver, 21);
- tty_unregister_device(smd_tty_driver, 27);
- tty_unregister_device(smd_tty_driver, 36);
+ /* unregister platform devices */
+ for (n = 0; n < ARRAY_SIZE(smd_configs); ++n) {
+ idx = smd_configs[n].tty_dev_index;
+
+ if (smd_tty[idx].driver.probe) {
+ platform_driver_unregister(&smd_tty[idx].driver);
+ tty_unregister_device(smd_tty_driver, idx);
+ }
+ }
+
tty_unregister_driver(smd_tty_driver);
put_tty_driver(smd_tty_driver);
return ret;
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 90a1c7e..7e61e8b 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -939,15 +939,17 @@
* Store the most recent timestamp read from hardware
* in last_ns. This is useful for debugging crashes.
*/
-static u64 last_ns;
+static atomic64_t last_ns;
unsigned long long notrace sched_clock(void)
{
struct msm_clock *clock = &msm_clocks[msm_global_timer];
struct clocksource *cs = &clock->clocksource;
- u32 cyc = cs->read(cs);
- last_ns = cyc_to_sched_clock(&cd, cyc, ((u32)~0 >> clock->shift));
- return last_ns;
+ u64 cyc = cs->read(cs);
+ u64 last_ns_local;
+ last_ns_local = cyc_to_sched_clock(&cd, cyc, ((u32)~0 >> clock->shift));
+ atomic64_set(&last_ns, last_ns_local);
+ return last_ns_local;
}
static void notrace msm_update_sched_clock(void)
diff --git a/arch/arm/mach-msm/wcnss-ssr-8960.c b/arch/arm/mach-msm/wcnss-ssr-8960.c
index af92d22..07a9241 100644
--- a/arch/arm/mach-msm/wcnss-ssr-8960.c
+++ b/arch/arm/mach-msm/wcnss-ssr-8960.c
@@ -59,14 +59,33 @@
MODULE_NAME);
return;
}
- if (new_state & SMSM_RESET)
+ if (new_state & SMSM_RESET) {
+ ss_restart_inprogress = true;
schedule_work(&riva_smsm_cb_work);
+ }
}
static void riva_fatal_fn(struct work_struct *work)
{
- if (!ss_restart_inprogress)
+ if (!enable_riva_ssr)
panic(MODULE_NAME ": Watchdog bite received from Riva");
+ else
+ subsystem_restart("riva");
+}
+
+static irqreturn_t riva_wdog_bite_irq_hdlr(int irq, void *dev_id)
+{
+ int ret;
+
+ if (ss_restart_inprogress) {
+ pr_err("%s: Ignoring riva bite irq, restart in progress\n",
+ MODULE_NAME);
+ return IRQ_HANDLED;
+ }
+ disable_irq_nosync(RIVA_APSS_WDOG_BITE_RESET_RDY_IRQ);
+ ss_restart_inprogress = true;
+ ret = schedule_work(&riva_fatal_work);
+ return IRQ_HANDLED;
}
/* SMSM reset Riva */
@@ -106,6 +125,9 @@
if (!ret)
pil_force_boot("wcnss");
+ ss_restart_inprogress = false;
+ enable_irq(RIVA_APSS_WDOG_BITE_RESET_RDY_IRQ);
+
return ret;
}
@@ -128,8 +150,6 @@
/* Riva crash handler */
static void riva_crash_shutdown(const struct subsys_data *subsys)
{
- ss_restart_inprogress = true;
-
pr_err("%s: crash shutdown : %d\n", MODULE_NAME, riva_crash);
if (riva_crash != true)
smsm_riva_reset();
@@ -176,6 +196,15 @@
" (%d)\n", MODULE_NAME, ret);
goto out;
}
+ ret = request_irq(RIVA_APSS_WDOG_BITE_RESET_RDY_IRQ,
+ riva_wdog_bite_irq_hdlr, IRQF_TRIGGER_HIGH,
+ "riva_wdog", NULL);
+
+ if (ret < 0) {
+ pr_err("%s: Unable to register for Riva bite interrupt"
+ " (%d)\n", MODULE_NAME, ret);
+ goto out;
+ }
ret = riva_restart_init();
if (ret < 0) {
pr_err("%s: Unable to register with ssr. (%d)\n",
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index e5e3486..db80bd3 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -491,6 +491,17 @@
return pages;
}
+/*
+ * Poison init memory with an undefined instruction (ARM) or a branch to an
+ * undefined instruction (Thumb).
+ */
+static inline void poison_init_mem(void *s, size_t count)
+{
+ u32 *p = (u32 *)s;
+ for (; count != 0; count -= 4)
+ *p++ = 0xe7fddef0;
+}
+
static inline void
free_memmap(unsigned long start_pfn, unsigned long end_pfn)
{
@@ -799,12 +810,14 @@
#ifdef CONFIG_HAVE_TCM
extern char __tcm_start, __tcm_end;
+ poison_init_mem(&__tcm_start, &__tcm_end - &__tcm_start);
totalram_pages += free_area(__phys_to_pfn(__pa(&__tcm_start)),
__phys_to_pfn(__pa(&__tcm_end)),
"TCM link");
#endif
if (!machine_is_integrator() && !machine_is_cintegrator()) {
+ poison_init_mem(__init_begin, __init_end - __init_begin);
reclaimed_initmem = free_area(__phys_to_pfn(__pa(__init_begin)),
__phys_to_pfn(__pa(__init_end)),
"init");
@@ -850,6 +863,7 @@
{
unsigned long reclaimed_initrd_mem;
if (!keep_initrd) {
+ poison_init_mem((void *)start, PAGE_ALIGN(end) - start);
reclaimed_initrd_mem = free_area(__phys_to_pfn(__pa(start)),
__phys_to_pfn(__pa(end)),
"initrd");
diff --git a/drivers/bluetooth/hci_smd.c b/drivers/bluetooth/hci_smd.c
index a321849..3c4aa8f 100644
--- a/drivers/bluetooth/hci_smd.c
+++ b/drivers/bluetooth/hci_smd.c
@@ -36,8 +36,6 @@
#define RX_Q_MONITOR (1) /* 1 milli second */
-static unsigned int driver_state;
-
static int hcismd_set;
static DEFINE_MUTEX(hci_smd_enable);
@@ -127,7 +125,8 @@
static void hci_smd_destruct(struct hci_dev *hdev)
{
- kfree(hdev->driver_data);
+ if (NULL != hdev->driver_data)
+ kfree(hdev->driver_data);
}
static void hci_smd_recv_data(unsigned long arg)
@@ -388,33 +387,25 @@
int rc;
/* Initialize and register HCI device */
- if (!driver_state) {
- hdev = hci_alloc_dev();
- if (!hdev) {
- BT_ERR("Can't allocate HCI device");
- return -ENOMEM;
- }
-
- hsmd->hdev = hdev;
- hdev->bus = HCI_SMD;
- hdev->driver_data = hsmd;
- hdev->open = hci_smd_open;
- hdev->close = hci_smd_close;
- hdev->send = hci_smd_send_frame;
- hdev->destruct = hci_smd_destruct;
- hdev->owner = THIS_MODULE;
+ hdev = hci_alloc_dev();
+ if (!hdev) {
+ BT_ERR("Can't allocate HCI device");
+ return -ENOMEM;
}
+ hsmd->hdev = hdev;
+ hdev->bus = HCI_SMD;
+ hdev->driver_data = NULL;
+ hdev->open = hci_smd_open;
+ hdev->close = hci_smd_close;
+ hdev->send = hci_smd_send_frame;
+ hdev->destruct = hci_smd_destruct;
+ hdev->owner = THIS_MODULE;
+
tasklet_init(&hsmd->hci_event_task,
hci_smd_recv_event, (unsigned long) hsmd);
tasklet_init(&hsmd->hci_data_task,
hci_smd_recv_data, (unsigned long) hsmd);
- if (!driver_state) {
- wake_lock_init(&hs.wake_lock_rx, WAKE_LOCK_SUSPEND,
- "msm_smd_Rx");
- wake_lock_init(&hs.wake_lock_tx, WAKE_LOCK_SUSPEND,
- "msm_smd_Tx");
- }
/*
* Setup the timer to monitor whether the Rx queue is empty,
* to control the wake lock release
@@ -442,29 +433,32 @@
/* Disable the read interrupts on the channel */
smd_disable_read_intr(hsmd->event_channel);
smd_disable_read_intr(hsmd->data_channel);
- if (!driver_state) {
- if (hci_register_dev(hdev) < 0) {
- BT_ERR("Can't register HCI device");
- hci_free_dev(hdev);
- return -ENODEV;
- }
- driver_state = 1;
+ if (hci_register_dev(hdev) < 0) {
+ BT_ERR("Can't register HCI device");
+ hci_free_dev(hdev);
+ return -ENODEV;
}
return 0;
}
-static void hci_smd_deregister_dev(void)
+static void hci_smd_deregister_dev(struct hci_smd_data *hsmd)
{
smd_close(hs.event_channel);
smd_close(hs.data_channel);
if (wake_lock_active(&hs.wake_lock_rx))
wake_unlock(&hs.wake_lock_rx);
+ if (wake_lock_active(&hs.wake_lock_tx))
+ wake_unlock(&hs.wake_lock_tx);
/*Destroy the timer used to monitor the Rx queue for emptiness */
del_timer_sync(&hs.rx_q_timer);
tasklet_kill(&hs.hci_event_task);
tasklet_kill(&hs.hci_data_task);
+ if (hci_unregister_dev(hsmd->hdev) < 0)
+ BT_ERR("Can't unregister HCI device %s", hsmd->hdev->name);
+
+ hci_free_dev(hsmd->hdev);
}
static int hcismd_set_enable(const char *val, struct kernel_param *kp)
@@ -484,7 +478,7 @@
hci_smd_register_dev(&hs);
break;
case 0:
- hci_smd_deregister_dev();
+ hci_smd_deregister_dev(&hs);
break;
default:
ret = -EFAULT;
@@ -494,7 +488,22 @@
mutex_unlock(&hci_smd_enable);
return ret;
}
+static int __init hci_smd_init(void)
+{
+ wake_lock_init(&hs.wake_lock_rx, WAKE_LOCK_SUSPEND,
+ "msm_smd_Rx");
+ wake_lock_init(&hs.wake_lock_tx, WAKE_LOCK_SUSPEND,
+ "msm_smd_Tx");
+ return 0;
+}
+module_init(hci_smd_init);
+static void __exit hci_smd_exit(void)
+{
+ wake_lock_destroy(&hs.wake_lock_rx);
+ wake_lock_destroy(&hs.wake_lock_tx);
+}
+module_exit(hci_smd_exit);
MODULE_AUTHOR("Ankur Nandwani <ankurn@codeaurora.org>");
MODULE_DESCRIPTION("Bluetooth SMD driver");
diff --git a/drivers/gpu/msm/kgsl_pwrctrl.c b/drivers/gpu/msm/kgsl_pwrctrl.c
index e8bad9d..dbbe4d5 100644
--- a/drivers/gpu/msm/kgsl_pwrctrl.c
+++ b/drivers/gpu/msm/kgsl_pwrctrl.c
@@ -722,6 +722,8 @@
return 0;
if (device->ftbl->isidle(device))
goto slumber;
+ else
+ device->pwrctrl.restore_slumber = true;
}
device->requested_state = KGSL_STATE_NONE;
diff --git a/drivers/hwmon/pm8xxx-adc.c b/drivers/hwmon/pm8xxx-adc.c
index 6b3aa0c..72246e5 100644
--- a/drivers/hwmon/pm8xxx-adc.c
+++ b/drivers/hwmon/pm8xxx-adc.c
@@ -122,6 +122,7 @@
#define PM8XXX_ADC_PA_THERM_VREG_UV_MAX 1800000
#define PM8XXX_ADC_PA_THERM_VREG_UA_LOAD 100000
#define PM8XXX_ADC_HWMON_NAME_LENGTH 32
+#define PM8XXX_ADC_BTM_INTERVAL_MAX 0x14
struct pm8xxx_adc {
struct device *dev;
@@ -843,6 +844,12 @@
return rc;
}
+ if (btm_param->interval > PM8XXX_ADC_BTM_INTERVAL_MAX) {
+ pr_info("Bug in PMIC BTM interval time and cannot set"
+ " a value greater than 0x14 %x\n", btm_param->interval);
+ btm_param->interval = PM8XXX_ADC_BTM_INTERVAL_MAX;
+ }
+
spin_lock_irqsave(&adc_pmic->btm_lock, flags);
data_btm_cool_thr0 = ((btm_param->low_thr_voltage << 24) >> 24);
diff --git a/drivers/media/video/msm/msm.c b/drivers/media/video/msm/msm.c
index 251f12d..579c4d5 100644
--- a/drivers/media/video/msm/msm.c
+++ b/drivers/media/video/msm/msm.c
@@ -2407,6 +2407,7 @@
adapter = NULL;
probe_fail:
actctrl->a_init_table = NULL;
+ actctrl->a_power_up = NULL;
actctrl->a_power_down = NULL;
actctrl->a_config = NULL;
actctrl->a_create_subdevice = NULL;
diff --git a/drivers/media/video/msm/msm_mctl.c b/drivers/media/video/msm/msm_mctl.c
index 8d502da..689a614 100644
--- a/drivers/media/video/msm/msm_mctl.c
+++ b/drivers/media/video/msm/msm_mctl.c
@@ -543,6 +543,15 @@
goto msm_open_done;
}
+ if (sync->actctrl.a_power_up)
+ rc = sync->actctrl.a_power_up(
+ sync->sdata->actuator_info);
+
+ if (rc < 0) {
+ pr_err("%s: act power failed:%d\n", __func__, rc);
+ goto msm_open_done;
+ }
+
pm_qos_add_request(&p_mctl->pm_qos_req_list,
PM_QOS_CPU_DMA_LATENCY,
PM_QOS_DEFAULT_VALUE);
@@ -576,7 +585,7 @@
VIDIOC_MSM_CSIPHY_RELEASE, NULL);
if (p_mctl->sync.actctrl.a_power_down)
- p_mctl->sync.actctrl.a_power_down();
+ p_mctl->sync.actctrl.a_power_down(sync->sdata->actuator_info);
if (p_mctl->sync.sctrl.s_release)
p_mctl->sync.sctrl.s_release();
diff --git a/drivers/media/video/msm/msm_vpe.c b/drivers/media/video/msm/msm_vpe.c
index 16bec18..3a7faa2 100644
--- a/drivers/media/video/msm/msm_vpe.c
+++ b/drivers/media/video/msm/msm_vpe.c
@@ -543,6 +543,7 @@
vpe_ctrl->fs_vpe = NULL;
vpe_fs_failed:
disable_irq(vpe_ctrl->vpeirq->start);
+ vpe_ctrl->state = VPE_STATE_IDLE;
return rc;
}
@@ -578,9 +579,11 @@
unsigned long flags;
spin_lock_irqsave(&vpe_ctrl->lock, flags);
- if (vpe_ctrl->state == VPE_STATE_ACTIVE) {
+ if (vpe_ctrl->state == VPE_STATE_ACTIVE ||
+ vpe_ctrl->state == VPE_STATE_IDLE) {
spin_unlock_irqrestore(&vpe_ctrl->lock, flags);
- pr_err(" =====VPE is busy!!! Wrong!========\n");
+ pr_err(" =====VPE in wrong state:%d!!! Wrong!========\n",
+ vpe_ctrl->state);
return -EBUSY;
}
spin_unlock_irqrestore(&vpe_ctrl->lock, flags);
diff --git a/drivers/mfd/pm8xxx-misc.c b/drivers/mfd/pm8xxx-misc.c
index a73a695..7314c7e 100644
--- a/drivers/mfd/pm8xxx-misc.c
+++ b/drivers/mfd/pm8xxx-misc.c
@@ -18,6 +18,7 @@
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
+#include <linux/delay.h>
#include <linux/mfd/pm8xxx/core.h>
#include <linux/mfd/pm8xxx/misc.h>
@@ -131,6 +132,10 @@
#define UART_PATH_SEL_MASK 0x60
#define UART_PATH_SEL_SHIFT 0x5
+/* Shutdown/restart delays to allow for LDO 7/dVdd regulator load settling. */
+#define PM8901_DELAY_AFTER_REG_DISABLE_MS 4
+#define PM8901_DELAY_BEFORE_SHUTDOWN_MS 8
+
struct pm8xxx_misc_chip {
struct list_head link;
struct pm8xxx_misc_platform_data pdata;
@@ -420,10 +425,12 @@
"rc=%d\n", rc);
goto read_write_err;
}
+ mdelay(PM8901_DELAY_AFTER_REG_DISABLE_MS);
}
}
read_write_err:
+ mdelay(PM8901_DELAY_BEFORE_SHUTDOWN_MS);
return rc;
}
diff --git a/drivers/mfd/pmic8901.c b/drivers/mfd/pmic8901.c
index 9e8786e..080a3e3 100644
--- a/drivers/mfd/pmic8901.c
+++ b/drivers/mfd/pmic8901.c
@@ -13,7 +13,6 @@
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
-#include <linux/delay.h>
#include <linux/mfd/core.h>
#include <linux/msm_ssbi.h>
#include <linux/mfd/pmic8901.h>
@@ -31,19 +30,6 @@
#define REG_TEMP_ALRM_CTRL 0x23
#define REG_TEMP_ALRM_PWM 0x24
-/* FTS regulator PMR registers */
-#define SSBI_REG_ADDR_S1_PMR (0xA7)
-#define SSBI_REG_ADDR_S2_PMR (0xA8)
-#define SSBI_REG_ADDR_S3_PMR (0xA9)
-#define SSBI_REG_ADDR_S4_PMR (0xAA)
-
-#define REGULATOR_PMR_STATE_MASK 0x60
-#define REGULATOR_PMR_STATE_OFF 0x20
-
-/* Shutdown/restart delays to allow for LDO 7/dVdd regulator load settling. */
-#define DELAY_AFTER_REG_DISABLE_MS 4
-#define DELAY_BEFORE_SHUTDOWN_MS 8
-
#define SINGLE_IRQ_RESOURCE(_name, _irq) \
{ \
.name = _name, \
@@ -60,63 +46,6 @@
u8 revision;
};
-static struct pm8901_chip *pmic_chip;
-
-static inline int
-ssbi_read(struct device *dev, u16 addr, u8 *buf, size_t len)
-{
- return msm_ssbi_read(dev->parent, addr, buf, len);
-}
-
-static inline int
-ssbi_write(struct device *dev, u16 addr, u8 *buf, size_t len)
-{
- return msm_ssbi_write(dev->parent, addr, buf, len);
-}
-
-int pm8901_reset_pwr_off(int reset)
-{
- int rc = 0, i;
- u8 pmr;
- u8 pmr_addr[4] = {
- SSBI_REG_ADDR_S2_PMR,
- SSBI_REG_ADDR_S3_PMR,
- SSBI_REG_ADDR_S4_PMR,
- SSBI_REG_ADDR_S1_PMR,
- };
-
- if (pmic_chip == NULL)
- return -ENODEV;
-
- /* Turn off regulators S1, S2, S3, S4 when shutting down. */
- if (!reset) {
- for (i = 0; i < 4; i++) {
- rc = ssbi_read(pmic_chip->dev, pmr_addr[i], &pmr, 1);
- if (rc) {
- pr_err("%s: FAIL ssbi_read(0x%x): rc=%d\n",
- __func__, pmr_addr[i], rc);
- goto get_out;
- }
-
- pmr &= ~REGULATOR_PMR_STATE_MASK;
- pmr |= REGULATOR_PMR_STATE_OFF;
-
- rc = ssbi_write(pmic_chip->dev, pmr_addr[i], &pmr, 1);
- if (rc) {
- pr_err("%s: FAIL ssbi_write(0x%x)=0x%x: rc=%d"
- "\n", __func__, pmr_addr[i], pmr, rc);
- goto get_out;
- }
- mdelay(DELAY_AFTER_REG_DISABLE_MS);
- }
- }
-
-get_out:
- mdelay(DELAY_BEFORE_SHUTDOWN_MS);
- return rc;
-}
-EXPORT_SYMBOL(pm8901_reset_pwr_off);
-
static int pm8901_readb(const struct device *dev, u16 addr, u8 *val)
{
const struct pm8xxx_drvdata *pm8901_drvdata = dev_get_drvdata(dev);
@@ -191,6 +120,11 @@
.pmic_get_revision = pm8901_get_revision,
};
+static struct mfd_cell misc_cell = {
+ .name = PM8XXX_MISC_DEV_NAME,
+ .id = 1,
+};
+
static struct mfd_cell debugfs_cell = {
.name = "pm8xxx-debug",
.id = 1,
@@ -315,6 +249,17 @@
goto bail;
}
+ if (pdata->misc_pdata) {
+ misc_cell.platform_data = pdata->misc_pdata;
+ misc_cell.pdata_size = sizeof(struct pm8xxx_misc_platform_data);
+ rc = mfd_add_devices(pmic->dev, 0, &misc_cell, 1, NULL,
+ irq_base);
+ if (rc) {
+ pr_err("Failed to add misc subdevice ret=%d\n", rc);
+ goto bail;
+ }
+ }
+
return rc;
bail:
@@ -346,7 +291,6 @@
pm8901_drvdata.pm_chip_data = pmic;
platform_set_drvdata(pdev, &pm8901_drvdata);
- pmic_chip = pmic;
/* Read PMIC chip revision */
rc = pm8901_readb(pmic->dev, PM8901_REG_REV, &pmic->revision);
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
index eeca25a..4040c32 100644
--- a/drivers/mmc/host/msm_sdcc.c
+++ b/drivers/mmc/host/msm_sdcc.c
@@ -138,8 +138,7 @@
unsigned short ret = NR_SG;
if (host->is_sps_mode) {
- if (NR_SG > MAX_NR_SG_SPS)
- ret = MAX_NR_SG_SPS;
+ ret = SPS_MAX_DESCS;
} else { /* DMA or PIO mode */
if (NR_SG > MAX_NR_SG_DMA_PIO)
ret = MAX_NR_SG_DMA_PIO;
@@ -148,28 +147,6 @@
return ret;
}
-static inline unsigned int msmsdcc_get_max_seg_size(struct msmsdcc_host *host)
-{
- unsigned int max_seg_size;
-
- /*
- * SPS BAM has limitation of max. number of descriptors.
- * max. # of descriptors = SPS_MAX_DESCS
- * each descriptor can point to SPS_MAX_DESC_SIZE (16KB)
- * So (nr_sg * max_seg_size) should be limited to the
- * max. size that all of the descriptors can point to.
- * i.e., (nr_sg * max_seg_size) = (SPS_MAX_DESCS * SPS_MAX_DESC_SIZE).
- */
- if (host->is_sps_mode) {
- max_seg_size = (SPS_MAX_DESCS * SPS_MAX_DESC_SIZE) /
- msmsdcc_get_nr_sg(host);
- } else { /* DMA or PIO mode */
- max_seg_size = MMC_MAX_REQ_SIZE;
- }
-
- return max_seg_size;
-}
-
#ifdef CONFIG_MMC_MSM_SPS_SUPPORT
static int msmsdcc_sps_reset_ep(struct msmsdcc_host *host,
struct msmsdcc_sps_ep_conn_data *ep);
@@ -4009,7 +3986,7 @@
mmc->max_blk_count = MMC_MAX_BLK_CNT;
mmc->max_req_size = MMC_MAX_REQ_SIZE;
- mmc->max_seg_size = msmsdcc_get_max_seg_size(host);
+ mmc->max_seg_size = mmc->max_req_size;
writel_relaxed(0, host->base + MMCIMASK0);
writel_relaxed(MCI_CLEAR_STATIC_MASK, host->base + MMCICLEAR);
diff --git a/drivers/mmc/host/msm_sdcc.h b/drivers/mmc/host/msm_sdcc.h
index a8332e51..d128984 100644
--- a/drivers/mmc/host/msm_sdcc.h
+++ b/drivers/mmc/host/msm_sdcc.h
@@ -242,8 +242,6 @@
/* Each descriptor is of length 8 bytes */
#define SPS_MAX_DESC_LENGTH 8
#define SPS_MAX_DESCS (SPS_MAX_DESC_FIFO_SIZE / SPS_MAX_DESC_LENGTH)
-#define SPS_MAX_SG_DESCS (MAX_SG_SIZE / SPS_MAX_DESC_SIZE)
-#define MAX_NR_SG_SPS (SPS_MAX_DESCS / SPS_MAX_SG_DESCS)
/*
* DMA limitations
diff --git a/drivers/power/pm8921-bms.c b/drivers/power/pm8921-bms.c
index 85d8a08..74562bc 100644
--- a/drivers/power/pm8921-bms.c
+++ b/drivers/power/pm8921-bms.c
@@ -52,6 +52,26 @@
PM_BMS_MAX_INTS,
};
+struct pm8921_soc_params {
+ uint16_t ocv_for_rbatt_raw;
+ uint16_t vsense_for_rbatt_raw;
+ uint16_t vbatt_for_rbatt_raw;
+ uint16_t last_good_ocv_raw;
+ int cc;
+
+ int ocv_for_rbatt_uv;
+ int vsense_for_rbatt_uv;
+ int vbatt_for_rbatt_uv;
+ int last_good_ocv_uv;
+};
+
+/**
+ * struct pm8921_bms_chip -
+ * @bms_output_lock: lock to prevent concurrent bms reads
+ * @bms_100_lock: lock to prevent concurrent updates to values that force
+ * 100% charge
+ *
+ */
struct pm8921_bms_chip {
struct device *dev;
struct dentry *dent;
@@ -77,6 +97,7 @@
unsigned int pmic_bms_irq[PM_BMS_MAX_INTS];
DECLARE_BITMAP(enabled_irqs, PM_BMS_MAX_INTS);
spinlock_t bms_output_lock;
+ spinlock_t bms_100_lock;
struct single_row_lut *adjusted_fcc_temp_lut;
unsigned int charging_began;
unsigned int start_percent;
@@ -84,6 +105,7 @@
uint16_t ocv_reading_at_100;
int cc_reading_at_100;
+ int max_voltage_uv;
};
static struct pm8921_bms_chip *the_chip;
@@ -129,6 +151,31 @@
static int bms_fake_battery;
module_param(bms_fake_battery, int, 0644);
+/* bms_start_XXX and bms_end_XXX are read only */
+static int bms_start_percent;
+static int bms_start_ocv_uv;
+static int bms_start_cc_mah;
+static int bms_end_percent;
+static int bms_end_ocv_uv;
+static int bms_end_cc_mah;
+
+static int bms_ro_ops_set(const char *val, const struct kernel_param *kp)
+{
+ return -EINVAL;
+}
+
+static struct kernel_param_ops bms_ro_param_ops = {
+ .set = bms_ro_ops_set,
+ .get = param_get_int,
+};
+module_param_cb(bms_start_percent, &bms_ro_param_ops, &bms_start_percent, 0644);
+module_param_cb(bms_start_ocv_uv, &bms_ro_param_ops, &bms_start_ocv_uv, 0644);
+module_param_cb(bms_start_cc_mah, &bms_ro_param_ops, &bms_start_cc_mah, 0644);
+
+module_param_cb(bms_end_percent, &bms_ro_param_ops, &bms_end_percent, 0644);
+module_param_cb(bms_end_ocv_uv, &bms_ro_param_ops, &bms_end_ocv_uv, 0644);
+module_param_cb(bms_end_cc_mah, &bms_ro_param_ops, &bms_end_cc_mah, 0644);
+
static int interpolate_fcc(struct pm8921_bms_chip *chip, int batt_temp);
static void readjust_fcc_table(void)
{
@@ -314,9 +361,6 @@
return rc;
}
- /* Output register data must be held (locked) while reading output */
- WARN_ON(!(reg && HOLD_OREG_DATA));
-
rc = pm_bms_masked_write(chip, BMS_CONTROL, SELECT_OUTPUT_DATA,
type << SELECT_OUTPUT_TYPE_SHIFT);
if (rc) {
@@ -425,96 +469,28 @@
}
*result = msw << 16 | lsw;
pr_debug("msw = %04x lsw = %04x cc = %d\n", msw, lsw, *result);
- *result = *result - chip->cc_reading_at_100;
pr_debug("cc = %d after subtracting %d\n",
*result, chip->cc_reading_at_100);
return 0;
}
-static int read_last_good_ocv(struct pm8921_bms_chip *chip, uint *result)
+static int convert_vbatt_raw_to_uv(struct pm8921_bms_chip *chip,
+ uint16_t reading, int *result)
{
- int rc;
- uint16_t reading;
-
- rc = pm_bms_read_output_data(chip, LAST_GOOD_OCV_VALUE, &reading);
- if (rc) {
- pr_err("fail to read LAST_GOOD_OCV_VALUE rc = %d\n", rc);
- return rc;
- }
-
- if (chip->ocv_reading_at_100 != reading) {
- chip->ocv_reading_at_100 = 0;
- chip->cc_reading_at_100 = 0;
- *result = xoadc_reading_to_microvolt(reading);
- pr_debug("raw = %04x ocv_uV = %u\n", reading, *result);
- *result = adjust_xo_vbatt_reading(chip, *result);
- pr_debug("after adj ocv_uV = %u\n", *result);
- if (*result != 0)
- last_ocv_uv = *result;
- } else {
- /*
- * force 100% ocv by selecting the highest profiled ocv
- * This is the first row last column entry in the ocv
- * lookup table
- */
- int cols = chip->pc_temp_ocv_lut->cols;
-
- pr_debug("Forcing max voltage %d\n",
- 1000 * chip->pc_temp_ocv_lut->ocv[0][cols-1]);
- *result = 1000 * chip->pc_temp_ocv_lut->ocv[0][cols-1];
- }
-
- return 0;
-}
-
-static int read_vbatt_for_rbatt(struct pm8921_bms_chip *chip, uint *result)
-{
- int rc;
- uint16_t reading;
-
- rc = pm_bms_read_output_data(chip, VBATT_FOR_RBATT, &reading);
- if (rc) {
- pr_err("fail to read VBATT_FOR_RBATT rc = %d\n", rc);
- return rc;
- }
*result = xoadc_reading_to_microvolt(reading);
- pr_debug("raw = %04x vbatt_for_r_microV = %u\n", reading, *result);
+ pr_debug("raw = %04x vbatt = %u\n", reading, *result);
*result = adjust_xo_vbatt_reading(chip, *result);
- pr_debug("after adj vbatt_for_r_uV = %u\n", *result);
+ pr_debug("after adj vbatt = %u\n", *result);
return 0;
}
-static int read_vsense_for_rbatt(struct pm8921_bms_chip *chip, uint *result)
+static int convert_vsense_to_uv(struct pm8921_bms_chip *chip,
+ int16_t reading, int *result)
{
- int rc;
- uint16_t reading;
-
- rc = pm_bms_read_output_data(chip, VSENSE_FOR_RBATT, &reading);
- if (rc) {
- pr_err("fail to read VSENSE_FOR_RBATT rc = %d\n", rc);
- return rc;
- }
*result = pm8xxx_ccadc_reading_to_microvolt(chip->revision, reading);
- pr_debug("raw = %04x vsense_for_r_uV = %u\n", reading, *result);
+ pr_debug("raw = %04x vsense = %d\n", reading, *result);
*result = pm8xxx_cc_adjust_for_gain(*result);
- pr_debug("after adj vsense_for_r_uV = %u\n", *result);
- return 0;
-}
-
-static int read_ocv_for_rbatt(struct pm8921_bms_chip *chip, uint *result)
-{
- int rc;
- uint16_t reading;
-
- rc = pm_bms_read_output_data(chip, OCV_FOR_RBATT, &reading);
- if (rc) {
- pr_err("fail to read OCV_FOR_RBATT rc = %d\n", rc);
- return rc;
- }
- *result = xoadc_reading_to_microvolt(reading);
- pr_debug("raw = %04x ocv_for_r_uV = %u\n", reading, *result);
- *result = adjust_xo_vbatt_reading(chip, *result);
- pr_debug("after adj ocv_for_r_uV = %u\n", *result);
+ pr_debug("after adj vsense = %d\n", *result);
return 0;
}
@@ -528,11 +504,8 @@
pr_err("fail to read VSENSE_AVG rc = %d\n", rc);
return rc;
}
- *result = pm8xxx_ccadc_reading_to_microvolt(the_chip->revision,
- reading);
- pr_debug("raw = %04x vsense = %d\n", reading, *result);
- *result = pm8xxx_cc_adjust_for_gain((s64)*result);
- pr_debug("after adj vsense = %d\n", *result);
+
+ convert_vsense_to_uv(chip, reading, result);
return 0;
}
@@ -790,37 +763,59 @@
return 100;
}
-static int calculate_rbatt(struct pm8921_bms_chip *chip)
+static int read_soc_params_raw(struct pm8921_bms_chip *chip,
+ struct pm8921_soc_params *raw)
{
- int rc;
- unsigned int ocv, vsense, vbatt, r_batt;
+ unsigned long flags;
- rc = read_ocv_for_rbatt(chip, &ocv);
- if (rc) {
- pr_err("fail to read ocv_for_rbatt rc = %d\n", rc);
- ocv = 0;
- }
+ spin_lock_irqsave(&chip->bms_output_lock, flags);
+ pm_bms_lock_output_data(chip);
- rc = read_vbatt_for_rbatt(chip, &vbatt);
- if (rc) {
- pr_err("fail to read vbatt_for_rbatt rc = %d\n", rc);
- ocv = 0;
- }
+ pm_bms_read_output_data(chip,
+ OCV_FOR_RBATT, &raw->ocv_for_rbatt_raw);
+ pm_bms_read_output_data(chip,
+ VBATT_FOR_RBATT, &raw->vbatt_for_rbatt_raw);
+ pm_bms_read_output_data(chip,
+ VSENSE_FOR_RBATT, &raw->vsense_for_rbatt_raw);
+ pm_bms_read_output_data(chip,
+ LAST_GOOD_OCV_VALUE, &raw->last_good_ocv_raw);
+ read_cc(chip, &raw->cc);
- rc = read_vsense_for_rbatt(chip, &vsense);
- if (rc) {
- pr_err("fail to read vsense_for_rbatt rc = %d\n", rc);
- ocv = 0;
- }
- if (ocv == 0
- || ocv == vbatt
- || vsense == 0) {
+ pm_bms_unlock_output_data(chip);
+ spin_unlock_irqrestore(&chip->bms_output_lock, flags);
+
+ convert_vbatt_raw_to_uv(chip,
+ raw->vbatt_for_rbatt_raw, &raw->vbatt_for_rbatt_uv);
+ convert_vbatt_raw_to_uv(chip,
+ raw->ocv_for_rbatt_raw, &raw->ocv_for_rbatt_uv);
+ convert_vbatt_raw_to_uv(chip,
+ raw->last_good_ocv_raw, &raw->last_good_ocv_uv);
+ convert_vsense_to_uv(chip,
+ raw->vsense_for_rbatt_raw, &raw->vsense_for_rbatt_uv);
+
+ if (raw->last_good_ocv_uv)
+ last_ocv_uv = raw->last_good_ocv_uv;
+
+ return 0;
+}
+
+static int calculate_rbatt(struct pm8921_bms_chip *chip,
+ struct pm8921_soc_params *raw)
+{
+ unsigned int r_batt;
+
+ if (raw->ocv_for_rbatt_uv == 0
+ || raw->ocv_for_rbatt_uv == raw->vbatt_for_rbatt_uv
+ || raw->vsense_for_rbatt_raw == 0) {
pr_debug("rbatt readings unavailable ocv = %d, vbatt = %d,"
"vsen = %d\n",
- ocv, vbatt, vsense);
+ raw->ocv_for_rbatt_uv,
+ raw->vbatt_for_rbatt_uv,
+ raw->vsense_for_rbatt_raw);
return -EINVAL;
}
- r_batt = ((ocv - vbatt) * chip->r_sense) / vsense;
+ r_batt = ((raw->ocv_for_rbatt_uv - raw->vbatt_for_rbatt_uv)
+ * chip->r_sense) / raw->vsense_for_rbatt_uv;
last_rbatt = r_batt;
pr_debug("r_batt = %umilliOhms", r_batt);
return r_batt;
@@ -866,6 +861,7 @@
static int adc_based_ocv(struct pm8921_bms_chip *chip, int *ocv)
{
int vbatt, rbatt, ibatt, rc;
+ struct pm8921_soc_params raw;
rc = get_battery_uvolts(chip, &vbatt);
if (rc) {
@@ -879,7 +875,9 @@
return rc;
}
- rbatt = calculate_rbatt(the_chip);
+ read_soc_params_raw(chip, &raw);
+
+ rbatt = calculate_rbatt(the_chip, &raw);
if (rbatt < 0)
rbatt = (last_rbatt < 0) ? DEFAULT_RBATT_MOHMS : last_rbatt;
*ocv = vbatt + ibatt * rbatt;
@@ -903,13 +901,13 @@
return pc;
}
-static void calculate_cc_mah(struct pm8921_bms_chip *chip, int64_t *val,
+static void calculate_cc_mah(struct pm8921_bms_chip *chip, int cc, int *val,
int *coulumb_counter)
{
- int rc;
int64_t cc_voltage_uv, cc_uvh, cc_mah;
- rc = read_cc(the_chip, coulumb_counter);
+ *coulumb_counter = cc;
+ *coulumb_counter -= chip->cc_reading_at_100;
cc_voltage_uv = (int64_t)*coulumb_counter;
cc_voltage_uv = cc_to_microvolt(chip, cc_voltage_uv);
cc_voltage_uv = pm8xxx_cc_adjust_for_gain(cc_voltage_uv);
@@ -921,11 +919,12 @@
}
static int calculate_unusable_charge_mah(struct pm8921_bms_chip *chip,
+ struct pm8921_soc_params *raw,
int fcc, int batt_temp, int chargecycles)
{
int rbatt, voltage_unusable_uv, pc_unusable;
- rbatt = calculate_rbatt(chip);
+ rbatt = calculate_rbatt(chip, raw);
if (rbatt < 0) {
rbatt = (last_rbatt < 0) ? DEFAULT_RBATT_MOHMS : last_rbatt;
pr_debug("rbatt unavailable assuming %d\n", rbatt);
@@ -942,16 +941,26 @@
}
/* calculate remainging charge at the time of ocv */
-static int calculate_remaining_charge_mah(struct pm8921_bms_chip *chip, int fcc,
- int batt_temp, int chargecycles)
+static int calculate_remaining_charge_mah(struct pm8921_bms_chip *chip,
+ struct pm8921_soc_params *raw,
+ int fcc, int batt_temp,
+ int chargecycles)
{
- int rc, ocv, pc;
+ int ocv, pc;
/* calculate remainging charge */
ocv = 0;
- rc = read_last_good_ocv(chip, &ocv);
- if (rc)
- pr_debug("failed to read ocv rc = %d\n", rc);
+ if (chip->ocv_reading_at_100 != raw->last_good_ocv_raw) {
+ chip->ocv_reading_at_100 = 0;
+ chip->cc_reading_at_100 = 0;
+ ocv = raw->last_good_ocv_uv;
+ } else {
+ /*
+ * force 100% ocv by selecting the highest voltage the
+ * battery could every reach
+ */
+ ocv = chip->max_voltage_uv;
+ }
if (ocv == 0) {
ocv = last_ocv_uv;
@@ -964,11 +973,12 @@
}
static void calculate_charging_params(struct pm8921_bms_chip *chip,
+ struct pm8921_soc_params *raw,
int batt_temp, int chargecycles,
int *fcc,
int *unusable_charge,
int *remaining_charge,
- int64_t *cc_mah)
+ int *cc_mah)
{
int coulumb_counter;
unsigned long flags;
@@ -977,38 +987,35 @@
pr_debug("FCC = %umAh batt_temp = %d, cycles = %d",
*fcc, batt_temp, chargecycles);
- /* fcc doesnt need to be read from hardware, lock the bms now */
- spin_lock_irqsave(&chip->bms_output_lock, flags);
- pm_bms_lock_output_data(chip);
-
- *unusable_charge = calculate_unusable_charge_mah(chip, *fcc,
+ *unusable_charge = calculate_unusable_charge_mah(chip, raw, *fcc,
batt_temp, chargecycles);
pr_debug("UUC = %umAh", *unusable_charge);
+ spin_lock_irqsave(&chip->bms_100_lock, flags);
/* calculate remainging charge */
- *remaining_charge = calculate_remaining_charge_mah(chip, *fcc,
+ *remaining_charge = calculate_remaining_charge_mah(chip, raw, *fcc,
batt_temp, chargecycles);
pr_debug("RC = %umAh\n", *remaining_charge);
/* calculate cc milli_volt_hour */
- calculate_cc_mah(chip, cc_mah, &coulumb_counter);
- pr_debug("cc_mah = %lldmAh cc = %d\n", *cc_mah, coulumb_counter);
-
- pm_bms_unlock_output_data(chip);
- spin_unlock_irqrestore(&chip->bms_output_lock, flags);
+ calculate_cc_mah(chip, raw->cc, cc_mah, &coulumb_counter);
+ pr_debug("cc_mah = %dmAh raw->cc = %x cc = %x\n",
+ *cc_mah, raw->cc, coulumb_counter);
+ spin_unlock_irqrestore(&chip->bms_100_lock, flags);
}
static int calculate_real_fcc(struct pm8921_bms_chip *chip,
- int batt_temp, int chargecycles,
- int *ret_fcc)
+ struct pm8921_soc_params *raw,
+ int batt_temp, int chargecycles,
+ int *ret_fcc)
{
int fcc, unusable_charge;
int remaining_charge;
- int64_t cc_mah;
+ int cc_mah;
int real_fcc;
- calculate_charging_params(chip, batt_temp, chargecycles,
+ calculate_charging_params(chip, raw, batt_temp, chargecycles,
&fcc,
&unusable_charge,
&remaining_charge,
@@ -1016,7 +1023,7 @@
real_fcc = remaining_charge - cc_mah;
*ret_fcc = fcc;
- pr_debug("real_fcc = %d, RC = %d CC = %lld fcc = %d\n",
+ pr_debug("real_fcc = %d, RC = %d CC = %d fcc = %d\n",
real_fcc, remaining_charge, cc_mah, fcc);
return real_fcc;
}
@@ -1028,14 +1035,15 @@
*/
#define BATTERY_POWER_SUPPLY_SOC 53
static int calculate_state_of_charge(struct pm8921_bms_chip *chip,
- int batt_temp, int chargecycles)
+ struct pm8921_soc_params *raw,
+ int batt_temp, int chargecycles)
{
int remaining_usable_charge, fcc, unusable_charge;
int remaining_charge, soc;
int update_userspace = 1;
- int64_t cc_mah;
+ int cc_mah;
- calculate_charging_params(chip, batt_temp, chargecycles,
+ calculate_charging_params(chip, raw, batt_temp, chargecycles,
&fcc,
&unusable_charge,
&remaining_charge,
@@ -1057,7 +1065,7 @@
if (soc < 0) {
pr_err("bad rem_usb_chg = %d rem_chg %d,"
- "cc_mah %lld, unusb_chg %d\n",
+ "cc_mah %d, unusb_chg %d\n",
remaining_usable_charge, remaining_charge,
cc_mah, unusable_charge);
pr_err("for bad rem_usb_chg last_ocv_uv = %d"
@@ -1209,6 +1217,7 @@
{
int batt_temp, rc;
struct pm8xxx_adc_chan_result result;
+ struct pm8921_soc_params raw;
if (!the_chip) {
pr_err("called before initialization\n");
@@ -1224,7 +1233,10 @@
pr_debug("batt_temp phy = %lld meas = 0x%llx", result.physical,
result.measurement);
batt_temp = (int)result.physical;
- return calculate_state_of_charge(the_chip,
+
+ read_soc_params_raw(the_chip, &raw);
+
+ return calculate_state_of_charge(the_chip, &raw,
batt_temp, last_chargecycles);
}
EXPORT_SYMBOL_GPL(pm8921_bms_get_percent_charge);
@@ -1254,7 +1266,28 @@
void pm8921_bms_charging_began(void)
{
- the_chip->start_percent = pm8921_bms_get_percent_charge();
+ int batt_temp, coulumb_counter, rc;
+ struct pm8xxx_adc_chan_result result;
+ struct pm8921_soc_params raw;
+
+ rc = pm8xxx_adc_read(the_chip->batt_temp_channel, &result);
+ if (rc) {
+ pr_err("error reading adc channel = %d, rc = %d\n",
+ the_chip->batt_temp_channel, rc);
+ return;
+ }
+ pr_debug("batt_temp phy = %lld meas = 0x%llx\n", result.physical,
+ result.measurement);
+ batt_temp = (int)result.physical;
+
+ read_soc_params_raw(the_chip, &raw);
+
+ the_chip->start_percent = calculate_state_of_charge(the_chip, &raw,
+ batt_temp, last_chargecycles);
+ bms_start_percent = the_chip->start_percent;
+ bms_start_ocv_uv = raw.last_good_ocv_uv;
+ calculate_cc_mah(the_chip, raw.cc, &bms_start_cc_mah, &coulumb_counter);
+
pr_debug("start_percent = %u%%\n", the_chip->start_percent);
}
EXPORT_SYMBOL_GPL(pm8921_bms_charging_began);
@@ -1262,22 +1295,27 @@
#define DELTA_FCC_PERCENT 3
void pm8921_bms_charging_end(int is_battery_full)
{
+ int batt_temp, coulumb_counter, rc;
+ struct pm8xxx_adc_chan_result result;
+ struct pm8921_soc_params raw;
+
+ rc = pm8xxx_adc_read(the_chip->batt_temp_channel, &result);
+ if (rc) {
+ pr_err("error reading adc channel = %d, rc = %d\n",
+ the_chip->batt_temp_channel, rc);
+ return;
+ }
+ pr_debug("batt_temp phy = %lld meas = 0x%llx\n", result.physical,
+ result.measurement);
+ batt_temp = (int)result.physical;
+
+ read_soc_params_raw(the_chip, &raw);
+
if (is_battery_full && the_chip != NULL) {
unsigned long flags;
- int batt_temp, rc, cc_reading;
int fcc, new_fcc, delta_fcc;
- struct pm8xxx_adc_chan_result result;
- rc = pm8xxx_adc_read(the_chip->batt_temp_channel, &result);
- if (rc) {
- pr_err("error reading adc channel = %d, rc = %d\n",
- the_chip->batt_temp_channel, rc);
- goto charge_cycle_calculation;
- }
- pr_debug("batt_temp phy = %lld meas = 0x%llx", result.physical,
- result.measurement);
- batt_temp = (int)result.physical;
- new_fcc = calculate_real_fcc(the_chip,
+ new_fcc = calculate_real_fcc(the_chip, &raw,
batt_temp, last_chargecycles,
&fcc);
delta_fcc = new_fcc - fcc;
@@ -1296,21 +1334,22 @@
delta_fcc, DELTA_FCC_PERCENT, fcc);
}
- spin_lock_irqsave(&the_chip->bms_output_lock, flags);
- pm_bms_lock_output_data(the_chip);
- pm_bms_read_output_data(the_chip, LAST_GOOD_OCV_VALUE,
- &the_chip->ocv_reading_at_100);
- read_cc(the_chip, &cc_reading);
- pm_bms_unlock_output_data(the_chip);
- spin_unlock_irqrestore(&the_chip->bms_output_lock, flags);
- the_chip->cc_reading_at_100 = cc_reading;
- pr_debug("EOC ocv_reading = 0x%x cc_reading = %d\n",
+ spin_lock_irqsave(&the_chip->bms_100_lock, flags);
+ the_chip->ocv_reading_at_100 = raw.last_good_ocv_raw;
+ the_chip->cc_reading_at_100 = raw.cc;
+ spin_unlock_irqrestore(&the_chip->bms_100_lock, flags);
+ pr_debug("EOC ocv_reading = 0x%x cc = %d\n",
the_chip->ocv_reading_at_100,
the_chip->cc_reading_at_100);
}
-charge_cycle_calculation:
- the_chip->end_percent = pm8921_bms_get_percent_charge();
+ the_chip->end_percent = calculate_state_of_charge(the_chip, &raw,
+ batt_temp, last_chargecycles);
+
+ bms_end_percent = the_chip->end_percent;
+ bms_end_ocv_uv = raw.last_good_ocv_uv;
+ calculate_cc_mah(the_chip, raw.cc, &bms_end_cc_mah, &coulumb_counter);
+
if (the_chip->end_percent > the_chip->start_percent) {
last_charge_increase =
the_chip->end_percent - the_chip->start_percent;
@@ -1472,24 +1511,26 @@
static void check_initial_ocv(struct pm8921_bms_chip *chip)
{
- int ocv, rc;
+ int ocv_uv, rc;
+ int16_t ocv_raw;
/*
* Check if a ocv is available in bms hw,
* if not compute it here at boot time and save it
* in the last_ocv_uv.
*/
- ocv = 0;
- rc = read_last_good_ocv(chip, &ocv);
- if (rc || ocv == 0) {
- rc = adc_based_ocv(chip, &ocv);
+ ocv_uv = 0;
+ pm_bms_read_output_data(chip, LAST_GOOD_OCV_VALUE, &ocv_raw);
+ rc = convert_vbatt_raw_to_uv(chip, ocv_raw, &ocv_uv);
+ if (rc || ocv_uv == 0) {
+ rc = adc_based_ocv(chip, &ocv_uv);
if (rc) {
- pr_err("failed to read adc based ocv rc = %d\n", rc);
- ocv = DEFAULT_OCV_MICROVOLTS;
+ pr_err("failed to read adc based ocv_uv rc = %d\n", rc);
+ ocv_uv = DEFAULT_OCV_MICROVOLTS;
}
- last_ocv_uv = ocv;
+ last_ocv_uv = ocv_uv;
}
- pr_debug("ocv = %d last_ocv_uv = %d\n", ocv, last_ocv_uv);
+ pr_debug("ocv_uv = %d last_ocv_uv = %d\n", ocv_uv, last_ocv_uv);
}
static int64_t read_battery_id(struct pm8921_bms_chip *chip)
@@ -1596,13 +1637,16 @@
{
int param = (int)data;
int ret = 0;
+ struct pm8921_soc_params raw;
+
+ read_soc_params_raw(the_chip, &raw);
*val = 0;
/* global irq number passed in via data */
switch (param) {
case CALC_RBATT:
- *val = calculate_rbatt(the_chip);
+ *val = calculate_rbatt(the_chip, &raw);
break;
case CALC_FCC:
*val = calculate_fcc(the_chip, test_batt_temp,
@@ -1613,7 +1657,7 @@
test_chargecycle);
break;
case CALC_SOC:
- *val = calculate_state_of_charge(the_chip,
+ *val = calculate_state_of_charge(the_chip, &raw,
test_batt_temp, test_chargecycle);
break;
case CALIB_HKADC:
@@ -1637,6 +1681,9 @@
{
int param = (int)data;
int ret = 0;
+ struct pm8921_soc_params raw;
+
+ read_soc_params_raw(the_chip, &raw);
*val = 0;
@@ -1644,19 +1691,19 @@
switch (param) {
case CC_MSB:
case CC_LSB:
- read_cc(the_chip, (int *)val);
+ *val = raw.cc;
break;
case LAST_GOOD_OCV_VALUE:
- read_last_good_ocv(the_chip, (uint *)val);
+ *val = raw.last_good_ocv_uv;
break;
case VBATT_FOR_RBATT:
- read_vbatt_for_rbatt(the_chip, (uint *)val);
+ *val = raw.vbatt_for_rbatt_uv;
break;
case VSENSE_FOR_RBATT:
- read_vsense_for_rbatt(the_chip, (uint *)val);
+ *val = raw.vsense_for_rbatt_uv;
break;
case OCV_FOR_RBATT:
- read_ocv_for_rbatt(the_chip, (uint *)val);
+ *val = raw.ocv_for_rbatt_uv;
break;
case VSENSE_AVG:
read_vsense_avg(the_chip, (uint *)val);
@@ -1794,11 +1841,13 @@
return -ENOMEM;
}
spin_lock_init(&chip->bms_output_lock);
+ spin_lock_init(&chip->bms_100_lock);
chip->dev = &pdev->dev;
chip->r_sense = pdata->r_sense;
chip->i_test = pdata->i_test;
chip->v_failure = pdata->v_failure;
chip->calib_delay_ms = pdata->calib_delay_ms;
+ chip->max_voltage_uv = pdata->max_voltage_uv;
rc = set_battery_data(chip);
if (rc) {
pr_err("%s bad battery data %d\n", __func__, rc);
diff --git a/drivers/power/pm8xxx-ccadc.c b/drivers/power/pm8xxx-ccadc.c
index 5e0f8ec..e40677b 100644
--- a/drivers/power/pm8xxx-ccadc.c
+++ b/drivers/power/pm8xxx-ccadc.c
@@ -76,6 +76,7 @@
static struct pm8xxx_ccadc_chip *the_chip;
+#ifdef DEBUG
static s64 microvolt_to_ccadc_reading_v1(s64 uv)
{
return div_s64(uv * CCADC_READING_RESOLUTION_D_V1,
@@ -98,6 +99,7 @@
microvolt_to_ccadc_reading_v1((s64)cc) :
microvolt_to_ccadc_reading_v2((s64)cc);
}
+#endif
static int cc_adjust_for_offset(u16 raw)
{
@@ -328,7 +330,7 @@
void pm8xxx_calib_ccadc(void)
{
u8 data_msb, data_lsb, sec_cntrl;
- int result_offset, voltage_offset, result_gain;
+ int result_offset, result_gain;
u16 result;
int i, rc;
@@ -385,26 +387,11 @@
result_offset = result_offset / SAMPLE_COUNT;
- voltage_offset = pm8xxx_ccadc_reading_to_microvolt(the_chip->revision,
- ((s64)result_offset - CCADC_INTRINSIC_OFFSET));
- pr_debug("offset result_offset = 0x%x, voltage = %d microVolts\n",
- result_offset, voltage_offset);
-
- /* Sanity Check */
- if (voltage_offset > CCADC_MAX_0UV) {
- pr_err("offset voltage = %d is huge limiting to %d\n",
- voltage_offset, CCADC_MAX_0UV);
- result_offset = CCADC_INTRINSIC_OFFSET
- + microvolt_to_ccadc_reading(the_chip,
- (s64)CCADC_MAX_0UV);
- } else if (voltage_offset < CCADC_MIN_0UV) {
- pr_err("offset voltage = %d is too low limiting to %d\n",
- voltage_offset, CCADC_MIN_0UV);
- result_offset = CCADC_INTRINSIC_OFFSET
- + microvolt_to_ccadc_reading(the_chip,
- (s64)CCADC_MIN_0UV);
- }
+ pr_debug("offset result_offset = 0x%x, voltage = %llduV\n",
+ result_offset,
+ pm8xxx_ccadc_reading_to_microvolt(the_chip->revision,
+ ((s64)result_offset - CCADC_INTRINSIC_OFFSET)));
the_chip->ccadc_offset = result_offset;
data_msb = the_chip->ccadc_offset >> 8;
@@ -474,22 +461,6 @@
pr_debug("gain result_gain = 0x%x, voltage = %d microVolts\n",
result_gain, the_chip->ccadc_gain_uv);
- /* Sanity Check */
- if (the_chip->ccadc_gain_uv > CCADC_MAX_25MV) {
- pr_err("gain voltage = %d is huge limiting to %d\n",
- the_chip->ccadc_gain_uv,
- CCADC_MAX_25MV);
- the_chip->ccadc_gain_uv = CCADC_MAX_25MV;
- result_gain = result_offset +
- microvolt_to_ccadc_reading(the_chip, CCADC_MAX_25MV);
- } else if (the_chip->ccadc_gain_uv < CCADC_MIN_25MV) {
- pr_err("gain voltage = %d is too low limiting to %d\n",
- the_chip->ccadc_gain_uv,
- CCADC_MIN_25MV);
- the_chip->ccadc_gain_uv = CCADC_MIN_25MV;
- result_gain = result_offset +
- microvolt_to_ccadc_reading(the_chip, CCADC_MIN_25MV);
- }
data_msb = result_gain >> 8;
data_lsb = result_gain;
diff --git a/drivers/usb/gadget/android.c b/drivers/usb/gadget/android.c
index af6f351..047df1a 100644
--- a/drivers/usb/gadget/android.c
+++ b/drivers/usb/gadget/android.c
@@ -373,12 +373,13 @@
char *name;
char buf[32], *b;
int once = 0, err = -1;
- int (*notify)(uint32_t, const char *) = NULL;
+ int (*notify)(uint32_t, const char *);
strlcpy(buf, diag_clients, sizeof(buf));
b = strim(buf);
while (b) {
+ notify = NULL;
name = strsep(&b, ",");
/* Allow only first diag channel to update pid and serial no */
if (_android_dev->pdata && !once++)
diff --git a/drivers/usb/gadget/f_diag.c b/drivers/usb/gadget/f_diag.c
index ccfd2e3..f492143 100644
--- a/drivers/usb/gadget/f_diag.c
+++ b/drivers/usb/gadget/f_diag.c
@@ -515,9 +515,11 @@
int rc = 0;
dev->in_desc = ep_choose(cdev->gadget,
- &hs_bulk_in_desc, &fs_bulk_in_desc);
+ (struct usb_endpoint_descriptor *)f->hs_descriptors[1],
+ (struct usb_endpoint_descriptor *)f->descriptors[1]);
dev->out_desc = ep_choose(cdev->gadget,
- &hs_bulk_out_desc, &fs_bulk_out_desc);
+ (struct usb_endpoint_descriptor *)f->hs_descriptors[2],
+ (struct usb_endpoint_descriptor *)f->descriptors[2]);
dev->in->driver_data = dev;
rc = usb_ep_enable(dev->in, dev->in_desc);
if (rc) {
@@ -669,10 +671,13 @@
temp += scnprintf(buf + temp, PAGE_SIZE - temp,
"---Name: %s---\n"
+ "endpoints: %s, %s\n"
"dpkts_tolaptop: %lu\n"
"dpkts_tomodem: %lu\n"
"pkts_tolaptop_pending: %u\n",
- ch->name, ctxt->dpkts_tolaptop,
+ ch->name,
+ ctxt->in->name, ctxt->out->name,
+ ctxt->dpkts_tolaptop,
ctxt->dpkts_tomodem,
ctxt->dpkts_tolaptop_pending);
}
diff --git a/drivers/usb/otg/msm_otg.c b/drivers/usb/otg/msm_otg.c
index 2466246..dc3ff26 100644
--- a/drivers/usb/otg/msm_otg.c
+++ b/drivers/usb/otg/msm_otg.c
@@ -1653,6 +1653,12 @@
msm_otg_reset(otg);
msm_otg_init_sm(motg);
otg->state = OTG_STATE_B_IDLE;
+ if (!test_bit(B_SESS_VLD, &motg->inputs) &&
+ test_bit(ID, &motg->inputs)) {
+ pm_runtime_put_noidle(otg->dev);
+ pm_runtime_suspend(otg->dev);
+ break;
+ }
/* FALL THROUGH */
case OTG_STATE_B_IDLE:
dev_dbg(otg->dev, "OTG_STATE_B_IDLE state\n");
@@ -1978,7 +1984,7 @@
{
struct msm_otg *motg = s->private;
- seq_printf(s, chg_to_string(motg->chg_type));
+ seq_printf(s, "%s\n", chg_to_string(motg->chg_type));
return 0;
}
diff --git a/drivers/usb/serial/usb_wwan.c b/drivers/usb/serial/usb_wwan.c
index e4fad5e..64fc6ea 100644
--- a/drivers/usb/serial/usb_wwan.c
+++ b/drivers/usb/serial/usb_wwan.c
@@ -406,6 +406,10 @@
portdata = usb_get_serial_port_data(port);
intfdata = serial->private;
+ /* explicitly set the driver mode to raw */
+ tty->raw = 0;
+ tty->real_raw = 0;
+
dbg("%s", __func__);
/* Start reading from the IN endpoint */
diff --git a/drivers/video/msm/hdmi_msm.c b/drivers/video/msm/hdmi_msm.c
index 0f1d19b..559d8b4 100644
--- a/drivers/video/msm/hdmi_msm.c
+++ b/drivers/video/msm/hdmi_msm.c
@@ -3398,18 +3398,6 @@
HDMI_OUTP(0x002C, audio_info_ctrl_reg);
}
-static void hdmi_msm_audio_ctrl_setup(boolean enabled, int delay)
-{
- uint32 audio_pkt_ctrl_reg = 0;
-
- /* Enable Packet Transmission */
- audio_pkt_ctrl_reg |= enabled ? 0x00000001 : 0;
- audio_pkt_ctrl_reg |= (delay << 4);
-
- /* HDMI_AUDIO_PKT_CTRL1[0x0020] */
- HDMI_OUTP(0x0020, audio_pkt_ctrl_reg);
-}
-
static void hdmi_msm_en_gc_packet(boolean av_mute_is_requested)
{
/* HDMI_GC[0x0040] */
@@ -3544,7 +3532,6 @@
}
}
hdmi_msm_audio_info_setup(FALSE, 0, 0, FALSE);
- hdmi_msm_audio_ctrl_setup(FALSE, 0);
hdmi_msm_audio_acr_setup(FALSE, 0, 0, 0);
DEV_INFO("HDMI Audio: Disabled\n");
return 0;
diff --git a/drivers/video/msm/mipi_dsi_host.c b/drivers/video/msm/mipi_dsi_host.c
index 35af84d..0a80363 100644
--- a/drivers/video/msm/mipi_dsi_host.c
+++ b/drivers/video/msm/mipi_dsi_host.c
@@ -792,6 +792,11 @@
uint32 dsi_ctrl, intr_ctrl;
uint32 data;
+ if (mdp_rev > MDP_REV_41 || mdp_rev == MDP_REV_303)
+ pinfo->rgb_swap = DSI_RGB_SWAP_RGB;
+ else
+ pinfo->rgb_swap = DSI_RGB_SWAP_BGR;
+
if (pinfo->mode == DSI_VIDEO_MODE) {
data = 0;
if (pinfo->pulse_mode_hsa_he)
@@ -811,11 +816,6 @@
data |= (pinfo->vc & 0x03);
MIPI_OUTP(MIPI_DSI_BASE + 0x000c, data);
- if (mdp_rev > MDP_REV_41 || mdp_rev == MDP_REV_303)
- pinfo->rgb_swap = DSI_RGB_SWAP_RGB;
- else
- pinfo->rgb_swap = DSI_RGB_SWAP_BGR;
-
data = 0;
data |= ((pinfo->rgb_swap & 0x07) << 12);
if (pinfo->b_sel)
diff --git a/include/linux/mfd/pm8xxx/pm8921-bms.h b/include/linux/mfd/pm8xxx/pm8921-bms.h
index 5d186df..630e90a 100644
--- a/include/linux/mfd/pm8xxx/pm8921-bms.h
+++ b/include/linux/mfd/pm8xxx/pm8921-bms.h
@@ -109,6 +109,7 @@
unsigned int i_test;
unsigned int v_failure;
unsigned int calib_delay_ms;
+ unsigned int max_voltage_uv;
};
#if defined(CONFIG_PM8921_BMS) || defined(CONFIG_PM8921_BMS_MODULE)
diff --git a/include/linux/mfd/pmic8901.h b/include/linux/mfd/pmic8901.h
index 932f8da..f5b34be 100644
--- a/include/linux/mfd/pmic8901.h
+++ b/include/linux/mfd/pmic8901.h
@@ -23,6 +23,7 @@
#include <linux/mfd/pm8xxx/mpp.h>
#include <linux/mfd/pm8xxx/tm.h>
#include <linux/regulator/pmic8901-regulator.h>
+#include <linux/mfd/pm8xxx/misc.h>
#define PM8901_IRQ_BLOCK_BIT(block, bit) ((block) * 8 + (bit))
@@ -37,19 +38,12 @@
#define PM8901_TEMPSTAT_IRQ PM8901_IRQ_BLOCK_BIT(6, 4)
#define PM8901_OVERTEMP_IRQ PM8901_IRQ_BLOCK_BIT(6, 5)
-struct pm8901_chip;
-
struct pm8901_platform_data {
- struct pm8xxx_irq_platform_data *irq_pdata;
- struct pm8xxx_mpp_platform_data *mpp_pdata;
- struct pm8901_vreg_pdata *regulator_pdatas;
- int num_regulators;
+ struct pm8xxx_irq_platform_data *irq_pdata;
+ struct pm8xxx_mpp_platform_data *mpp_pdata;
+ struct pm8xxx_misc_platform_data *misc_pdata;
+ struct pm8901_vreg_pdata *regulator_pdatas;
+ int num_regulators;
};
-#ifdef CONFIG_PMIC8901
-int pm8901_reset_pwr_off(int reset);
-#else
-static inline int pm8901_reset_pwr_off(int reset) { return 0; }
-#endif
-
#endif /* __PMIC8901_H__ */
diff --git a/net/bluetooth/hci_event.c b/net/bluetooth/hci_event.c
index 13d9b71..45aa228 100644
--- a/net/bluetooth/hci_event.c
+++ b/net/bluetooth/hci_event.c
@@ -2708,6 +2708,11 @@
ie->data.ssp_mode = (ev->features[0] & 0x01);
conn->ssp_mode = (ev->features[0] & 0x01);
+ /*In case if remote device ssp supported/2.0 device
+ reduce the security level to MEDIUM if it is HIGH*/
+ if (!conn->ssp_mode &&
+ (conn->pending_sec_level == BT_SECURITY_HIGH))
+ conn->pending_sec_level = BT_SECURITY_MEDIUM;
}
if (conn->state != BT_CONFIG)