ASoC: msm8974: Add Support for Tertiary MI2S CPU DIA

Tertiary MI2S block has 2 serial data lines. They can be configured
to either Rx or TX direction. RX and TX paths share same bit clock
and word select.

Change-Id: I4be2f6c645a35ed2608bfde0c74722ccb02d0889
Signed-off-by: Kiran Kandi <kkandi@codeaurora.org>
4 files changed