tree 19f8a929ce264068a21b25b91258afe4bad64b75
parent 77543cebab7387eab7d482e90018a64d6f2ced1e
author Michal Simek <monstr@monstr.eu> 1272282203 +0200
committer Michal Simek <monstr@monstr.eu> 1273137719 +0200

microblaze: Define correct L1_CACHE_SHIFT value

Microblaze cacheline length is configurable and current cpu
uses two cacheline length 4 and 8.

We are taking conservative maximum value to be sure that cacheline
alignment is satisfied for all cases.

Here is the calculation for cacheline lenght 8  32bit=4Byte values
which is corresponding with SHIFT 5.

Signed-off-by: Michal Simek <monstr@monstr.eu>