Merge "usb: rmnet_sdio: Fix various crashes during composition switch" into msm-3.0
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 61b70cf..916645c 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -109,6 +109,10 @@
#include "rpm_resources.h"
#include "acpuclock.h"
#include "pm-boot.h"
+
+#include <linux/ion.h>
+#include <mach/ion.h>
+
#define MSM_SHARED_RAM_PHYS 0x40000000
/* Macros assume PMIC GPIOs start at 0 */
@@ -2624,6 +2628,16 @@
#define USER_SMI_SIZE (MSM_SMI_SIZE - KERNEL_SMI_SIZE)
#define MSM_PMEM_SMIPOOL_SIZE USER_SMI_SIZE
+#define MSM_ION_EBI_SIZE MSM_PMEM_SF_SIZE
+#define MSM_ION_ADSP_SIZE MSM_PMEM_ADSP_SIZE
+#define MSM_ION_SMI_SIZE MSM_USER_SMI_SIZE
+
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+#define MSM_ION_HEAP_NUM 5
+#else
+#define MSM_ION_HEAP_NUM 2
+#endif
+
static unsigned fb_size;
static int __init fb_size_setup(char *p)
{
@@ -2753,6 +2767,7 @@
};
#ifdef CONFIG_ANDROID_PMEM
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
static struct android_pmem_platform_data android_pmem_pdata = {
.name = "pmem",
.allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
@@ -2778,7 +2793,7 @@
.id = 2,
.dev = { .platform_data = &android_pmem_adsp_pdata },
};
-
+#endif
static struct android_pmem_platform_data android_pmem_audio_pdata = {
.name = "pmem_audio",
.allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
@@ -2802,6 +2817,7 @@
}, \
.num_paths = 1, \
}
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
static struct msm_bus_paths pmem_smi_table[] = {
[0] = PMEM_BUS_WIDTH(0), /* Off */
[1] = PMEM_BUS_WIDTH(1), /* On */
@@ -2846,7 +2862,7 @@
.id = 7,
.dev = { .platform_data = &android_pmem_smipool_pdata },
};
-
+#endif
#endif
#define GPIO_DONGLE_PWR_EN 258
@@ -5001,11 +5017,13 @@
&msm_batt_device,
#endif
#ifdef CONFIG_ANDROID_PMEM
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
&android_pmem_device,
&android_pmem_adsp_device,
- &android_pmem_audio_device,
&android_pmem_smipool_device,
#endif
+ &android_pmem_audio_device,
+#endif
#ifdef CONFIG_MSM_ROTATOR
&msm_rotator_device,
#endif
@@ -5098,9 +5116,59 @@
&msm_tsens_device,
&msm_rpm_device,
-
+#ifdef CONFIG_ION_MSM
+ &ion_dev,
+#endif
};
+#ifdef CONFIG_ION_MSM
+struct ion_platform_data ion_pdata = {
+ .nr = MSM_ION_HEAP_NUM,
+ .heaps = {
+ {
+ .id = ION_HEAP_SYSTEM_ID,
+ .type = ION_HEAP_TYPE_SYSTEM,
+ .name = ION_VMALLOC_HEAP_NAME,
+ },
+ {
+ .id = ION_HEAP_SYSTEM_CONTIG_ID,
+ .type = ION_HEAP_TYPE_SYSTEM_CONTIG,
+ .name = ION_KMALLOC_HEAP_NAME,
+ },
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ {
+ .id = ION_HEAP_EBI_ID,
+ .type = ION_HEAP_TYPE_CARVEOUT,
+ .name = ION_EBI1_HEAP_NAME,
+ .size = MSM_ION_EBI_SIZE,
+ .memory_type = ION_EBI_TYPE,
+ },
+ {
+ .id = ION_HEAP_ADSP_ID,
+ .type = ION_HEAP_TYPE_CARVEOUT,
+ .name = ION_ADSP_HEAP_NAME,
+ .size = MSM_ION_ADSP_SIZE,
+ .memory_type = ION_EBI_TYPE,
+ },
+ {
+ .id = ION_HEAP_SMI_ID,
+ .type = ION_HEAP_TYPE_CARVEOUT,
+ .name = ION_SMI_HEAP_NAME,
+ .size = MSM_ION_SMI_SIZE,
+ .memory_type = ION_SMI_TYPE,
+ },
+#endif
+ }
+};
+
+struct platform_device ion_dev = {
+ .name = "ion-msm",
+ .id = 1,
+ .dev = { .platform_data = &ion_pdata },
+};
+#endif
+
+
static struct memtype_reserve msm8x60_reserve_table[] __initdata = {
/* Kernel SMI memory pool for video core, used for firmware */
/* and encoder, decoder scratch buffers */
@@ -5128,14 +5196,25 @@
},
};
+static void reserve_ion_memory(void)
+{
+#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
+ msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_EBI_SIZE;
+ msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_ADSP_SIZE;
+ msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_SMI_SIZE;
+#endif
+}
+
static void __init size_pmem_devices(void)
{
#ifdef CONFIG_ANDROID_PMEM
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
android_pmem_adsp_pdata.size = pmem_adsp_size;
android_pmem_smipool_pdata.size = MSM_PMEM_SMIPOOL_SIZE;
- android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
android_pmem_pdata.size = pmem_sf_size;
#endif
+ android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
+#endif
}
static void __init reserve_memory_for(struct android_pmem_platform_data *p)
@@ -5146,18 +5225,23 @@
static void __init reserve_pmem_memory(void)
{
#ifdef CONFIG_ANDROID_PMEM
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
reserve_memory_for(&android_pmem_adsp_pdata);
reserve_memory_for(&android_pmem_smipool_pdata);
- reserve_memory_for(&android_pmem_audio_pdata);
reserve_memory_for(&android_pmem_pdata);
+#endif
+ reserve_memory_for(&android_pmem_audio_pdata);
msm8x60_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
#endif
}
+
+
static void __init msm8x60_calculate_reserve_sizes(void)
{
size_pmem_devices();
reserve_pmem_memory();
+ reserve_ion_memory();
}
static int msm8x60_paddr_to_memtype(unsigned int paddr)
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
index 102b27d..ab252c9 100644
--- a/drivers/mmc/host/msm_sdcc.c
+++ b/drivers/mmc/host/msm_sdcc.c
@@ -132,6 +132,8 @@
static void
msmsdcc_start_command(struct msmsdcc_host *host, struct mmc_command *cmd,
u32 c);
+static inline void msmsdcc_delay(struct msmsdcc_host *host);
+
#ifdef CONFIG_MMC_MSM_SPS_SUPPORT
static int msmsdcc_sps_reset_ep(struct msmsdcc_host *host,
@@ -207,77 +209,83 @@
* @host - Pointer to driver's host structure
*
*/
-static void msmsdcc_soft_reset_and_restore(struct msmsdcc_host *host)
+static void msmsdcc_soft_reset(struct msmsdcc_host *host)
{
- if (host->is_sps_mode) {
- /* Reset DML first */
- msmsdcc_dml_reset(host);
- /*
- * delay the SPS pipe reset in thread context as
- * sps_connect/sps_disconnect APIs can be called
- * only from non-atomic context.
- */
- host->sps.pipe_reset_pending = true;
- }
/*
* Reset SDCC controller's DPSM (data path state machine
* and CPSM (command path state machine).
*/
- mb();
writel_relaxed(0, host->base + MMCICOMMAND);
+ msmsdcc_delay(host);
writel_relaxed(0, host->base + MMCIDATACTRL);
- mb();
+ msmsdcc_delay(host);
+}
- pr_debug("%s: Applied soft reset to Controller\n",
- mmc_hostname(host->mmc));
+static void msmsdcc_hard_reset(struct msmsdcc_host *host)
+{
+ int ret;
- if (host->is_sps_mode)
- msmsdcc_dml_init(host);
+ /* Reset the controller */
+ ret = clk_reset(host->clk, CLK_RESET_ASSERT);
+ if (ret)
+ pr_err("%s: Clock assert failed at %u Hz"
+ " with err %d\n", mmc_hostname(host->mmc),
+ host->clk_rate, ret);
+
+ ret = clk_reset(host->clk, CLK_RESET_DEASSERT);
+ if (ret)
+ pr_err("%s: Clock deassert failed at %u Hz"
+ " with err %d\n", mmc_hostname(host->mmc),
+ host->clk_rate, ret);
+
+ /* Give some delay for clock reset to propogate to controller */
+ msmsdcc_delay(host);
}
static void msmsdcc_reset_and_restore(struct msmsdcc_host *host)
{
if (host->plat->sdcc_v4_sup) {
- msmsdcc_soft_reset_and_restore(host);
+ if (host->is_sps_mode) {
+ /* Reset DML first */
+ msmsdcc_dml_reset(host);
+ /*
+ * delay the SPS pipe reset in thread context as
+ * sps_connect/sps_disconnect APIs can be called
+ * only from non-atomic context.
+ */
+ host->sps.pipe_reset_pending = true;
+ }
+ mb();
+ msmsdcc_soft_reset(host);
+
+ pr_debug("%s: Applied soft reset to Controller\n",
+ mmc_hostname(host->mmc));
+
+ if (host->is_sps_mode)
+ msmsdcc_dml_init(host);
} else {
/* Give Clock reset (hard reset) to controller */
u32 mci_clk = 0;
u32 mci_mask0 = 0;
- int ret;
/* Save the controller state */
mci_clk = readl_relaxed(host->base + MMCICLOCK);
mci_mask0 = readl_relaxed(host->base + MMCIMASK0);
-
mb();
- /* Reset the controller */
- ret = clk_reset(host->clk, CLK_RESET_ASSERT);
- if (ret)
- pr_err("%s: Clock assert failed at %u Hz"
- " with err %d\n", mmc_hostname(host->mmc),
- host->clk_rate, ret);
- ret = clk_reset(host->clk, CLK_RESET_DEASSERT);
- if (ret)
- pr_err("%s: Clock deassert failed at %u Hz"
- " with err %d\n", mmc_hostname(host->mmc),
- host->clk_rate, ret);
-
+ msmsdcc_hard_reset(host);
pr_debug("%s: Controller has been reinitialized\n",
mmc_hostname(host->mmc));
- mb();
/* Restore the contoller state */
writel_relaxed(host->pwr, host->base + MMCIPOWER);
+ msmsdcc_delay(host);
writel_relaxed(mci_clk, host->base + MMCICLOCK);
+ msmsdcc_delay(host);
writel_relaxed(mci_mask0, host->base + MMCIMASK0);
- ret = clk_set_rate(host->clk, host->clk_rate);
- if (ret)
- pr_err("%s: Failed to set clk rate %u Hz. err %d\n",
- mmc_hostname(host->mmc),
- host->clk_rate, ret);
- mb();
+ mb(); /* no delay required after writing to MASK0 register */
}
+
if (host->dummy_52_needed)
host->dummy_52_needed = 0;
}
@@ -310,8 +318,6 @@
return retval;
}
-static inline void msmsdcc_delay(struct msmsdcc_host *host);
-
static void
msmsdcc_stop_data(struct msmsdcc_host *host)
{
@@ -361,8 +367,13 @@
msmsdcc_start_command_exec(struct msmsdcc_host *host, u32 arg, u32 c)
{
writel_relaxed(arg, host->base + MMCIARGUMENT);
- msmsdcc_delay(host);
writel_relaxed(c, host->base + MMCICOMMAND);
+ /*
+ * As after sending the command, we don't write any of the
+ * controller registers and just wait for the
+ * CMD_RESPOND_END/CMD_SENT/Command failure notication
+ * from Controller.
+ */
mb();
}
@@ -374,7 +385,6 @@
writel_relaxed(host->cmd_timeout, host->base + MMCIDATATIMER);
writel_relaxed((unsigned int)host->curr.xfer_size,
host->base + MMCIDATALENGTH);
- msmsdcc_delay(host); /* Allow data parms to be applied */
writel_relaxed(host->cmd_datactrl, host->base + MMCIDATACTRL);
msmsdcc_delay(host); /* Force delay prior to ADM or command */
@@ -931,7 +941,7 @@
}
}
- if (host->prog_scan && (cmd->opcode == 12)) {
+ if ((cmd->flags & MMC_RSP_R1B) == MMC_RSP_R1B) {
*c |= MCI_CPSM_PROGENA;
host->prog_enable = 1;
}
@@ -1031,8 +1041,6 @@
host->dma.hdr.exec_func = msmsdcc_dma_exec_func;
host->dma.hdr.user = (void *)host;
host->dma.busy = 1;
- if ((data->flags & MMC_DATA_WRITE) && !host->curr.mrq->sbc)
- host->prog_scan = 1;
if (cmd) {
msmsdcc_start_command_deferred(host, cmd, &c);
@@ -1045,8 +1053,6 @@
msm_dmov_enqueue_cmd_ext(host->dma.channel, &host->dma.hdr);
} else {
/* SPS-BAM mode or PIO mode */
- if ((data->flags & MMC_DATA_WRITE) && !host->curr.mrq->sbc)
- host->prog_scan = 1;
writel_relaxed(timeout, base + MMCIDATATIMER);
writel_relaxed(host->curr.xfer_size, base + MMCIDATALENGTH);
@@ -1054,8 +1060,14 @@
writel_relaxed((readl_relaxed(host->base + MMCIMASK0) &
(~(MCI_IRQ_PIO))) | pio_irqmask,
host->base + MMCIMASK0);
- msmsdcc_delay(host); /* Allow parms to be applied */
writel_relaxed(datactrl, base + MMCIDATACTRL);
+ /*
+ * We don't need delay after writing to DATA_CTRL register
+ * if we are not writing to CMD register immediately after
+ * this. As we already have delay before sending the
+ * command, we just need mb() here.
+ */
+ mb();
if (cmd) {
msmsdcc_delay(host); /* Delay between data/command */
@@ -1241,8 +1253,10 @@
(~(MCI_IRQ_PIO))) | MCI_RXDATAAVLBLMASK,
host->base + MMCIMASK0);
if (!host->curr.xfer_remain) {
- /* Delay needed (same port was just written) */
- msmsdcc_delay(host);
+ /*
+ * back to back write to MASK0 register don't need
+ * synchronization delay.
+ */
writel_relaxed((readl_relaxed(host->base + MMCIMASK0) &
(~(MCI_IRQ_PIO))) | 0, host->base + MMCIMASK0);
}
@@ -1331,16 +1345,12 @@
} else { /* host->data == NULL */
if (!cmd->error && host->prog_enable) {
if (status & MCI_PROGDONE) {
- host->prog_scan = 0;
host->prog_enable = 0;
- msmsdcc_request_end(host, cmd->mrq);
+ msmsdcc_request_end(host, cmd->mrq);
} else
host->curr.cmd = cmd;
} else {
- if (host->prog_enable) {
- host->prog_scan = 0;
- host->prog_enable = 0;
- }
+ host->prog_enable = 0;
if (host->dummy_52_needed)
host->dummy_52_needed = 0;
if (cmd->data && cmd->error)
@@ -1921,7 +1931,9 @@
if (!IS_ERR(host->pclk))
clk_enable(host->pclk);
clk_enable(host->clk);
+ msmsdcc_delay(host);
} else {
+ msmsdcc_delay(host);
clk_disable(host->clk);
if (!IS_ERR(host->pclk))
clk_disable(host->pclk);
@@ -2119,6 +2131,10 @@
writel_relaxed(host->mci_irqenable,
host->base + MMCIMASK0);
}
+ } else {
+ writel_relaxed(host->mci_irqenable,
+ host->base + MMCIMASK0);
+ mb();
}
}
spin_unlock_irqrestore(&host->lock, flags);
@@ -2221,6 +2237,7 @@
msmsdcc_setup_pins(host, false);
break;
case MMC_POWER_UP:
+ /* writing PWR_UP bit is redundant */
pwr |= MCI_PWR_UP;
if (host->sdcc_irq_disabled) {
if (host->plat->cfg_mpm_sdiowakeup)
@@ -2254,7 +2271,7 @@
if (host->pwr != pwr) {
host->pwr = pwr;
writel_relaxed(pwr, host->base + MMCIPOWER);
- mb();
+ msmsdcc_delay(host);
}
if (!host->clks_on) {
/* force the clocks to be off */
@@ -2278,7 +2295,7 @@
writel_relaxed(MCI_SDIOINTMASK,
host->base + MMCIMASK0);
}
- msmsdcc_delay(host);
+ mb();
}
msmsdcc_setup_clocks(host, false);
host->clks_on = 0;
@@ -2298,7 +2315,7 @@
else
clk &= ~MCI_CLK_PWRSAVE;
writel_relaxed(clk, host->base + MMCICLOCK);
- mb();
+ msmsdcc_delay(host);
return 0;
}
@@ -2445,7 +2462,7 @@
/* Stop SD CLK output. */
writel_relaxed((readl_relaxed(host->base + MMCICLOCK) |
MCI_CLK_PWRSAVE), host->base + MMCICLOCK);
-
+ msmsdcc_delay(host);
spin_unlock_irqrestore(&host->lock, flags);
/*
@@ -2459,6 +2476,7 @@
spin_lock_irqsave(&host->lock, flags);
writel_relaxed((readl_relaxed(host->base + MMCICLOCK) |
IO_PAD_PWR_SWITCH), host->base + MMCICLOCK);
+ msmsdcc_delay(host);
host->io_pad_pwr_switch = 1;
spin_unlock_irqrestore(&host->lock, flags);
@@ -2469,6 +2487,7 @@
/* Start SD CLK output. */
writel_relaxed((readl_relaxed(host->base + MMCICLOCK)
& ~MCI_CLK_PWRSAVE), host->base + MMCICLOCK);
+ msmsdcc_delay(host);
spin_unlock_irqrestore(&host->lock, flags);
/*
@@ -2682,6 +2701,7 @@
*/
writel_relaxed((readl_relaxed(host->base + MMCICLOCK)
& ~MCI_CLK_PWRSAVE), host->base + MMCICLOCK);
+ msmsdcc_delay(host);
/* first of all reset the tuning block */
rc = msmsdcc_init_cm_sdc4_dll(host);
if (rc)
@@ -2756,6 +2776,7 @@
/* re-enable PWESAVE */
writel_relaxed((readl_relaxed(host->base + MMCICLOCK) |
MCI_CLK_PWRSAVE), host->base + MMCICLOCK);
+ msmsdcc_delay(host);
host->cmd19_tuning_in_progress = 0;
return rc;
}
@@ -3462,10 +3483,7 @@
msmsdcc_request_end(host, mrq);
}
} else {
- if (host->prog_enable) {
- host->prog_scan = 0;
- host->prog_enable = 0;
- }
+ host->prog_enable = 0;
msmsdcc_reset_and_restore(host);
msmsdcc_request_end(host, mrq);
}
@@ -3677,6 +3695,8 @@
msmsdcc_get_min_sup_clk_rate(host)));
host->clks_on = 1;
+ /* Apply Hard reset to SDCC to put it in power on default state */
+ msmsdcc_hard_reset(host);
ret = msmsdcc_vreg_init(host, true);
if (ret) {
@@ -3708,6 +3728,7 @@
mmc->caps |= plat->mmc_bus_width;
mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED;
+ mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY;
/*
* If we send the CMD23 before multi block write/read command
@@ -3748,8 +3769,6 @@
writel_relaxed(0, host->base + MMCIMASK0);
writel_relaxed(MCI_CLEAR_STATIC_MASK, host->base + MMCICLEAR);
- /* Delay needed (MMCIMASK0 was just written above) */
- msmsdcc_delay(host);
writel_relaxed(MCI_IRQENABLE, host->base + MMCIMASK0);
mb();
host->mci_irqenable = MCI_IRQENABLE;
@@ -4142,12 +4161,14 @@
* part of LPM), then clocks should be turned on before
* calling mmc_suspend_host() because mmc_suspend_host might
* send some commands to the card. The clocks will be turned
- * off again after mmc_suspend_host. Thus for SD/MMC/SDIO
+ * off again after mmc_suspend_host. Thus for SDIO
* cards, clocks will be turned on before mmc_suspend_host
* and turned off after mmc_suspend_host.
*/
- mmc->ios.clock = host->clk_rate;
- mmc->ops->set_ios(host->mmc, &host->mmc->ios);
+ if (mmc->card && mmc_card_sdio(mmc->card)) {
+ mmc->ios.clock = host->clk_rate;
+ mmc->ops->set_ios(host->mmc, &host->mmc->ios);
+ }
/*
* MMC core thinks that host is disabled by now since
@@ -4216,26 +4237,26 @@
enable_irq(host->core_irqres->start);
host->sdcc_irq_disabled = 0;
}
- }
- mmc->ios.clock = host->clk_rate;
- mmc->ops->set_ios(host->mmc, &host->mmc->ios);
+ mmc->ios.clock = host->clk_rate;
+ mmc->ops->set_ios(host->mmc, &host->mmc->ios);
- spin_lock_irqsave(&host->lock, flags);
- writel_relaxed(host->mci_irqenable, host->base + MMCIMASK0);
- mb();
+ spin_lock_irqsave(&host->lock, flags);
+ writel_relaxed(host->mci_irqenable,
+ host->base + MMCIMASK0);
+ mb();
- if (mmc->card && (mmc->card->type == MMC_TYPE_SDIO) &&
- (mmc->pm_flags & MMC_PM_WAKE_SDIO_IRQ) &&
- !host->sdio_irq_disabled) {
+ if ((mmc->pm_flags & MMC_PM_WAKE_SDIO_IRQ) &&
+ !host->sdio_irq_disabled) {
if (host->plat->sdiowakeup_irq) {
disable_irq_nosync(
host->plat->sdiowakeup_irq);
msmsdcc_disable_irq_wake(host);
host->sdio_irq_disabled = 1;
}
- }
+ }
- spin_unlock_irqrestore(&host->lock, flags);
+ spin_unlock_irqrestore(&host->lock, flags);
+ }
mmc_resume_host(mmc);
diff --git a/drivers/mmc/host/msm_sdcc.h b/drivers/mmc/host/msm_sdcc.h
index 78c1a54..590c293 100644
--- a/drivers/mmc/host/msm_sdcc.h
+++ b/drivers/mmc/host/msm_sdcc.h
@@ -333,7 +333,6 @@
struct tasklet_struct dma_tlet;
- unsigned int prog_scan;
unsigned int prog_enable;
/* Command parameters */
diff --git a/drivers/tty/serial/msm_serial_hs.c b/drivers/tty/serial/msm_serial_hs.c
index 06d614b..bc1a25b 100644
--- a/drivers/tty/serial/msm_serial_hs.c
+++ b/drivers/tty/serial/msm_serial_hs.c
@@ -262,7 +262,10 @@
gsbi_resource = platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"gsbi_resource");
- size = gsbi_resource->end - gsbi_resource->start + 1;
+ if (unlikely(!gsbi_resource))
+ return;
+
+ size = resource_size(gsbi_resource);
release_mem_region(gsbi_resource->start, size);
iounmap(msm_uport->mapped_gsbi);
msm_uport->mapped_gsbi = NULL;
@@ -280,7 +283,7 @@
IORESOURCE_MEM,
"gsbi_resource");
if (gsbi_resource) {
- size = gsbi_resource->end - gsbi_resource->start + 1;
+ size = resource_size(gsbi_resource);
if (unlikely(!request_mem_region(gsbi_resource->start, size,
"msm_serial_hs")))
return -EBUSY;
diff --git a/drivers/tty/serial/msm_serial_hs_lite.c b/drivers/tty/serial/msm_serial_hs_lite.c
index ad085f9..a7b53e4 100644
--- a/drivers/tty/serial/msm_serial_hs_lite.c
+++ b/drivers/tty/serial/msm_serial_hs_lite.c
@@ -799,7 +799,6 @@
struct msm_hsl_port *msm_hsl_port = UART_TO_MSM(port);
struct platform_device *pdev = to_platform_device(port->dev);
struct resource *uart_resource;
- struct resource *gsbi_resource;
resource_size_t size;
uart_resource = platform_get_resource_byname(pdev, IORESOURCE_MEM,
@@ -815,11 +814,6 @@
if (msm_serial_hsl_has_gsbi(port)) {
iowrite32(GSBI_PROTOCOL_IDLE, msm_hsl_port->mapped_gsbi +
GSBI_CONTROL_ADDR);
- gsbi_resource = platform_get_resource_byname(pdev,
- IORESOURCE_MEM,
- "gsbi_resource");
-
- size = gsbi_resource->end - gsbi_resource->start + 1;
iounmap(msm_hsl_port->mapped_gsbi);
msm_hsl_port->mapped_gsbi = NULL;
}
diff --git a/include/linux/ion.h b/include/linux/ion.h
index 9f220f8..4b7b8b7d1 100644
--- a/include/linux/ion.h
+++ b/include/linux/ion.h
@@ -65,6 +65,7 @@
#define ION_VMALLOC_HEAP_NAME "vmalloc"
#define ION_EBI1_HEAP_NAME "EBI1"
#define ION_ADSP_HEAP_NAME "adsp"
+#define ION_SMI_HEAP_NAME "smi"
#define CACHED 1
#define UNCACHED 0