Merge "radio-tavarua: Add private IOCTLs to poke threshold values." into msm-3.0
diff --git a/drivers/media/radio/radio-tavarua.c b/drivers/media/radio/radio-tavarua.c
index 49bc46c..5976424 100644
--- a/drivers/media/radio/radio-tavarua.c
+++ b/drivers/media/radio/radio-tavarua.c
@@ -2745,6 +2745,7 @@
{
struct tavarua_device *radio = video_get_drvdata(video_devdata(file));
int retval = 0;
+ int size = 0, cnt = 0;
unsigned char value;
unsigned char xfr_buf[XFR_REG_NUM];
unsigned char tx_data[XFR_REG_NUM];
@@ -2961,6 +2962,110 @@
SET_REG_FIELD(radio->registers[IOCTRL], ctrl->value,
IOC_ANTENNA_OFFSET, IOC_ANTENNA_MASK);
break;
+ case V4L2_CID_PRIVATE_TAVARUA_ON_CHANNEL_THRESHOLD:
+ size = 0x04;
+ /* Poking the value of ON Channel Threshold value */
+ xfr_buf[0] = (XFR_POKE_MODE | (size << 1));
+ xfr_buf[1] = ON_CHANNEL_TH_MSB;
+ xfr_buf[2] = ON_CHANNEL_TH_LSB;
+ /* Data to be poked into the register */
+ xfr_buf[3] = (ctrl->value & 0xFF000000) >> 24;
+ xfr_buf[4] = (ctrl->value & 0x00FF0000) >> 16;
+ xfr_buf[5] = (ctrl->value & 0x0000FF00) >> 8;
+ xfr_buf[6] = (ctrl->value & 0x000000FF);
+
+ for (cnt = 3; cnt < 7; cnt++) {
+ FMDBG("On-channel data to be poked is : %d",
+ (int)xfr_buf[cnt]);
+ }
+
+ retval = tavarua_write_registers(radio, XFRCTRL,
+ xfr_buf, size+3);
+ if (retval < 0) {
+ FMDBG("Failed to write\n");
+ return retval;
+ }
+ /*Wait for the XFR interrupt */
+ msleep(TAVARUA_DELAY*15);
+
+ for (cnt = 0; cnt < 5; cnt++) {
+ xfr_buf[cnt] = 0;
+ radio->registers[XFRDAT0+cnt] = 0x0;
+ }
+
+ /* Peeking Regs 0x88C2-0x88C4 */
+ size = 0x04;
+ xfr_buf[0] = (XFR_PEEK_MODE | (size << 1));
+ xfr_buf[1] = ON_CHANNEL_TH_MSB;
+ xfr_buf[2] = ON_CHANNEL_TH_LSB;
+ retval = tavarua_write_registers(radio, XFRCTRL, xfr_buf, 3);
+ if (retval < 0) {
+ pr_err("%s: Failed to write\n", __func__);
+ return retval;
+ }
+ /*Wait for the XFR interrupt */
+ msleep(TAVARUA_DELAY*10);
+ retval = tavarua_read_registers(radio, XFRDAT0, 4);
+ if (retval < 0) {
+ pr_err("%s: On Ch. DET: Read failure\n", __func__);
+ return retval;
+ }
+ for (cnt = 0; cnt < 4; cnt++)
+ FMDBG("On-Channel data set is : 0x%x\t",
+ (int)radio->registers[XFRDAT0+cnt]);
+ break;
+ case V4L2_CID_PRIVATE_TAVARUA_OFF_CHANNEL_THRESHOLD:
+ size = 0x04;
+ /* Poking the value of OFF Channel Threshold value */
+ xfr_buf[0] = (XFR_POKE_MODE | (size << 1));
+ xfr_buf[1] = OFF_CHANNEL_TH_MSB;
+ xfr_buf[2] = OFF_CHANNEL_TH_LSB;
+ /* Data to be poked into the register */
+ xfr_buf[3] = (ctrl->value & 0xFF000000) >> 24;
+ xfr_buf[4] = (ctrl->value & 0x00FF0000) >> 16;
+ xfr_buf[5] = (ctrl->value & 0x0000FF00) >> 8;
+ xfr_buf[6] = (ctrl->value & 0x000000FF);
+
+ for (cnt = 3; cnt < 7; cnt++) {
+ FMDBG("Off-channel data to be poked is : %d",
+ (int)xfr_buf[cnt]);
+ }
+
+ retval = tavarua_write_registers(radio, XFRCTRL,
+ xfr_buf, size+3);
+ if (retval < 0) {
+ pr_err("%s: Failed to write\n", __func__);
+ return retval;
+ }
+ /*Wait for the XFR interrupt */
+ msleep(TAVARUA_DELAY*10);
+
+ for (cnt = 0; cnt < 5; cnt++) {
+ xfr_buf[cnt] = 0;
+ radio->registers[XFRDAT0+cnt] = 0x0;
+ }
+
+ /* Peeking Regs 0x88C2-0x88C4 */
+ size = 0x04;
+ xfr_buf[0] = (XFR_PEEK_MODE | (size << 1));
+ xfr_buf[1] = OFF_CHANNEL_TH_MSB;
+ xfr_buf[2] = OFF_CHANNEL_TH_LSB;
+ retval = tavarua_write_registers(radio, XFRCTRL, xfr_buf, 3);
+ if (retval < 0) {
+ pr_err("%s: Failed to write\n", __func__);
+ return retval;
+ }
+ /*Wait for the XFR interrupt */
+ msleep(TAVARUA_DELAY*10);
+ retval = tavarua_read_registers(radio, XFRDAT0, 4);
+ if (retval < 0) {
+ pr_err("%s: Off Ch. DET: Read failure\n", __func__);
+ return retval;
+ }
+ for (cnt = 0; cnt < 4; cnt++)
+ FMDBG("Off-channel data set is : 0x%x\t",
+ (int)radio->registers[XFRDAT0+cnt]);
+ break;
/* TX Controls */
case V4L2_CID_RDS_TX_PTY: {
diff --git a/include/media/tavarua.h b/include/media/tavarua.h
index aafa5d0..43ce153 100644
--- a/include/media/tavarua.h
+++ b/include/media/tavarua.h
@@ -41,6 +41,12 @@
#define MPX_DCC_PEEK_MSB_REG3 (0x88)
#define MPX_DCC_PEEK_LSB_REG3 (0xC4)
+#define ON_CHANNEL_TH_MSB (0x0B)
+#define ON_CHANNEL_TH_LSB (0xA8)
+
+#define OFF_CHANNEL_TH_MSB (0x0B)
+#define OFF_CHANNEL_TH_LSB (0xAC)
+
#define ENF_200Khz (1)
#define SRCH200KHZ_OFFSET (7)
#define SRCH_MASK (1 << SRCH200KHZ_OFFSET)
@@ -147,7 +153,14 @@
*/
V4L2_CID_PRIVATE_TAVARUA_SET_NOTCH_FILTER =
V4L2_CID_PRIVATE_BASE + 0x28,
- V4L2_CID_PRIVATE_TAVARUA_SET_AUDIO_PATH
+ V4L2_CID_PRIVATE_TAVARUA_SET_AUDIO_PATH,
+ /*0x800002a is used for iris specific ioctl*/
+
+ V4L2_CID_PRIVATE_TAVARUA_ON_CHANNEL_THRESHOLD =
+ V4L2_CTRL_CLASS_USER + 0x92B,
+ V4L2_CID_PRIVATE_TAVARUA_OFF_CHANNEL_THRESHOLD =
+ V4L2_CTRL_CLASS_USER + 0x92C
+
};
enum tavarua_buf_t {