blob: 69ea6ee8162efb7aecec31c4cc823677947825fe [file] [log] [blame]
/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/i2c.h>
#include <linux/i2c/sx150x.h>
#include <linux/i2c/isl9519.h>
#include <linux/gpio.h>
#include <linux/msm_ssbi.h>
#include <linux/regulator/gpio-regulator.h>
#include <linux/mfd/pm8xxx/pm8921.h>
#include <linux/mfd/pm8xxx/pm8xxx-adc.h>
#include <linux/regulator/consumer.h>
#include <linux/spi/spi.h>
#include <linux/slimbus/slimbus.h>
#include <linux/bootmem.h>
#include <linux/msm_kgsl.h>
#ifdef CONFIG_ANDROID_PMEM
#include <linux/android_pmem.h>
#endif
#include <linux/cyttsp.h>
#include <linux/dma-mapping.h>
#include <linux/platform_data/qcom_crypto_device.h>
#include <linux/platform_data/qcom_wcnss_device.h>
#include <linux/leds.h>
#include <linux/leds-pm8xxx.h>
#include <linux/i2c/atmel_mxt_ts.h>
#include <linux/msm_tsens.h>
#include <linux/ks8851.h>
#include <linux/i2c/isa1200.h>
#include <linux/gpio_keys.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/setup.h>
#include <asm/hardware/gic.h>
#include <asm/mach/mmc.h>
#include <mach/board.h>
#include <mach/msm_iomap.h>
#include <mach/msm_spi.h>
#ifdef CONFIG_USB_MSM_OTG_72K
#include <mach/msm_hsusb.h>
#else
#include <linux/usb/msm_hsusb.h>
#endif
#include <linux/usb/android.h>
#include <mach/usbdiag.h>
#include <mach/socinfo.h>
#include <mach/rpm.h>
#include <mach/gpio.h>
#include <mach/gpiomux.h>
#include <mach/msm_bus_board.h>
#include <mach/msm_memtypes.h>
#include <mach/dma.h>
#include <mach/msm_xo.h>
#include <mach/restart.h>
#ifdef CONFIG_WCD9310_CODEC
#include <linux/slimbus/slimbus.h>
#include <linux/mfd/wcd9310/core.h>
#include <linux/mfd/wcd9310/pdata.h>
#endif
#include <linux/ion.h>
#include <mach/ion.h>
#include <mach/mdm2.h>
#include "timer.h"
#include "devices.h"
#include "devices-msm8x60.h"
#include "spm.h"
#include <mach/pm.h>
#include <mach/cpuidle.h>
#include "rpm_resources.h"
#include "mpm.h"
#include "acpuclock.h"
#include "smd_private.h"
#include "pm-boot.h"
#include "msm_watchdog.h"
#include "board-8930.h"
static struct platform_device msm_fm_platform_init = {
.name = "iris_fm",
.id = -1,
};
#define KS8851_RST_GPIO 89
#define KS8851_IRQ_GPIO 90
#define HAP_SHIFT_LVL_OE_GPIO 47
#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
struct sx150x_platform_data msm8930_sx150x_data[] = {
[SX150X_CAM] = {
.gpio_base = GPIO_CAM_EXPANDER_BASE,
.oscio_is_gpo = false,
.io_pullup_ena = 0x0,
.io_pulldn_ena = 0xc0,
.io_open_drain_ena = 0x0,
.irq_summary = -1,
},
};
#endif
#define MSM_PMEM_ADSP_SIZE 0x7800000
#define MSM_PMEM_AUDIO_SIZE 0x2B4000
#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
#define MSM_PMEM_SIZE 0x4000000 /* 64 Mbytes */
#else
#define MSM_PMEM_SIZE 0x2800000 /* 40 Mbytes */
#endif
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
#define MSM_PMEM_KERNEL_EBI1_SIZE 0x280000
#define MSM_ION_SF_SIZE MSM_PMEM_SIZE
#define MSM_ION_MM_FW_SIZE 0x200000 /* (2MB) */
#define MSM_ION_MM_SIZE MSM_PMEM_ADSP_SIZE
#define MSM_ION_QSECOM_SIZE 0x100000 /* (1MB) */
#define MSM_ION_MFC_SIZE SZ_8K
#define MSM_ION_AUDIO_SIZE MSM_PMEM_AUDIO_SIZE
#define MSM_ION_HEAP_NUM 8
#else
#define MSM_PMEM_KERNEL_EBI1_SIZE 0x110C000
#define MSM_ION_HEAP_NUM 1
#endif
#ifdef CONFIG_KERNEL_PMEM_EBI_REGION
static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
static int __init pmem_kernel_ebi1_size_setup(char *p)
{
pmem_kernel_ebi1_size = memparse(p, NULL);
return 0;
}
early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
#endif
#ifdef CONFIG_ANDROID_PMEM
static unsigned pmem_size = MSM_PMEM_SIZE;
static int __init pmem_size_setup(char *p)
{
pmem_size = memparse(p, NULL);
return 0;
}
early_param("pmem_size", pmem_size_setup);
static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
static int __init pmem_adsp_size_setup(char *p)
{
pmem_adsp_size = memparse(p, NULL);
return 0;
}
early_param("pmem_adsp_size", pmem_adsp_size_setup);
static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
static int __init pmem_audio_size_setup(char *p)
{
pmem_audio_size = memparse(p, NULL);
return 0;
}
early_param("pmem_audio_size", pmem_audio_size_setup);
#endif
#ifdef CONFIG_ANDROID_PMEM
#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
static struct android_pmem_platform_data android_pmem_pdata = {
.name = "pmem",
.allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
.cached = 1,
.memory_type = MEMTYPE_EBI1,
};
static struct platform_device android_pmem_device = {
.name = "android_pmem",
.id = 0,
.dev = {.platform_data = &android_pmem_pdata},
};
static struct android_pmem_platform_data android_pmem_adsp_pdata = {
.name = "pmem_adsp",
.allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
.cached = 0,
.memory_type = MEMTYPE_EBI1,
};
static struct platform_device android_pmem_adsp_device = {
.name = "android_pmem",
.id = 2,
.dev = { .platform_data = &android_pmem_adsp_pdata },
};
#endif
static struct android_pmem_platform_data android_pmem_audio_pdata = {
.name = "pmem_audio",
.allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
.cached = 0,
.memory_type = MEMTYPE_EBI1,
};
static struct platform_device android_pmem_audio_device = {
.name = "android_pmem",
.id = 4,
.dev = { .platform_data = &android_pmem_audio_pdata },
};
#endif
#define DSP_RAM_BASE_8960 0x8da00000
#define DSP_RAM_SIZE_8960 0x1800000
static int dspcrashd_pdata_8960 = 0xDEADDEAD;
static struct resource resources_dspcrashd_8960[] = {
{
.name = "msm_dspcrashd",
.start = DSP_RAM_BASE_8960,
.end = DSP_RAM_BASE_8960 + DSP_RAM_SIZE_8960,
.flags = IORESOURCE_DMA,
},
};
static struct platform_device msm_device_dspcrashd_8960 = {
.name = "msm_dspcrashd",
.num_resources = ARRAY_SIZE(resources_dspcrashd_8960),
.resource = resources_dspcrashd_8960,
.dev = { .platform_data = &dspcrashd_pdata_8960 },
};
static struct memtype_reserve msm8930_reserve_table[] __initdata = {
[MEMTYPE_SMI] = {
},
[MEMTYPE_EBI0] = {
.flags = MEMTYPE_FLAGS_1M_ALIGN,
},
[MEMTYPE_EBI1] = {
.flags = MEMTYPE_FLAGS_1M_ALIGN,
},
};
static void __init size_pmem_devices(void)
{
#ifdef CONFIG_ANDROID_PMEM
#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
android_pmem_adsp_pdata.size = pmem_adsp_size;
android_pmem_pdata.size = pmem_size;
#endif
android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
#endif
}
static void __init reserve_memory_for(struct android_pmem_platform_data *p)
{
msm8930_reserve_table[p->memory_type].size += p->size;
}
static void __init reserve_pmem_memory(void)
{
#ifdef CONFIG_ANDROID_PMEM
#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
reserve_memory_for(&android_pmem_adsp_pdata);
reserve_memory_for(&android_pmem_pdata);
#endif
reserve_memory_for(&android_pmem_audio_pdata);
msm8930_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
#endif
}
static int msm8930_paddr_to_memtype(unsigned int paddr)
{
return MEMTYPE_EBI1;
}
#ifdef CONFIG_ION_MSM
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
static struct ion_cp_heap_pdata cp_mm_ion_pdata = {
.permission_type = IPT_TYPE_MM_CARVEOUT,
.align = PAGE_SIZE,
};
static struct ion_cp_heap_pdata cp_mfc_ion_pdata = {
.permission_type = IPT_TYPE_MFC_SHAREDMEM,
.align = PAGE_SIZE,
};
static struct ion_co_heap_pdata co_ion_pdata = {
.adjacent_mem_id = INVALID_HEAP_ID,
.align = PAGE_SIZE,
};
static struct ion_co_heap_pdata fw_co_ion_pdata = {
.adjacent_mem_id = ION_CP_MM_HEAP_ID,
.align = SZ_128K,
};
#endif
static struct ion_platform_data ion_pdata = {
.nr = MSM_ION_HEAP_NUM,
.heaps = {
{
.id = ION_SYSTEM_HEAP_ID,
.type = ION_HEAP_TYPE_SYSTEM,
.name = ION_VMALLOC_HEAP_NAME,
},
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
{
.id = ION_SF_HEAP_ID,
.type = ION_HEAP_TYPE_CARVEOUT,
.name = ION_SF_HEAP_NAME,
.size = MSM_ION_SF_SIZE,
.memory_type = ION_EBI_TYPE,
.extra_data = (void *) &co_ion_pdata,
},
{
.id = ION_CP_MM_HEAP_ID,
.type = ION_HEAP_TYPE_CP,
.name = ION_MM_HEAP_NAME,
.size = MSM_ION_MM_SIZE,
.memory_type = ION_EBI_TYPE,
.extra_data = (void *) &cp_mm_ion_pdata,
},
{
.id = ION_MM_FIRMWARE_HEAP_ID,
.type = ION_HEAP_TYPE_CARVEOUT,
.name = ION_MM_FIRMWARE_HEAP_NAME,
.size = MSM_ION_MM_FW_SIZE,
.memory_type = ION_EBI_TYPE,
.extra_data = (void *) &fw_co_ion_pdata,
},
{
.id = ION_CP_MFC_HEAP_ID,
.type = ION_HEAP_TYPE_CP,
.name = ION_MFC_HEAP_NAME,
.size = MSM_ION_MFC_SIZE,
.memory_type = ION_EBI_TYPE,
.extra_data = (void *) &cp_mfc_ion_pdata,
},
{
.id = ION_IOMMU_HEAP_ID,
.type = ION_HEAP_TYPE_IOMMU,
.name = ION_IOMMU_HEAP_NAME,
},
{
.id = ION_QSECOM_HEAP_ID,
.type = ION_HEAP_TYPE_CARVEOUT,
.name = ION_QSECOM_HEAP_NAME,
.size = MSM_ION_QSECOM_SIZE,
.memory_type = ION_EBI_TYPE,
.extra_data = (void *) &co_ion_pdata,
},
{
.id = ION_AUDIO_HEAP_ID,
.type = ION_HEAP_TYPE_CARVEOUT,
.name = ION_AUDIO_HEAP_NAME,
.size = MSM_ION_AUDIO_SIZE,
.memory_type = ION_EBI_TYPE,
.extra_data = (void *) &co_ion_pdata,
},
#endif
}
};
static struct platform_device ion_dev = {
.name = "ion-msm",
.id = 1,
.dev = { .platform_data = &ion_pdata },
};
#endif
static void reserve_ion_memory(void)
{
#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
msm8930_reserve_table[MEMTYPE_EBI1].size += MSM_ION_SF_SIZE;
msm8930_reserve_table[MEMTYPE_EBI1].size += MSM_ION_MM_SIZE;
msm8930_reserve_table[MEMTYPE_EBI1].size += MSM_ION_MM_FW_SIZE;
msm8930_reserve_table[MEMTYPE_EBI1].size += MSM_ION_MFC_SIZE;
msm8930_reserve_table[MEMTYPE_EBI1].size += MSM_ION_QSECOM_SIZE;
msm8930_reserve_table[MEMTYPE_EBI1].size += MSM_ION_AUDIO_SIZE;
#endif
}
static void __init reserve_mdp_memory(void)
{
msm8930_mdp_writeback(msm8930_reserve_table);
}
static void __init msm8930_calculate_reserve_sizes(void)
{
size_pmem_devices();
reserve_pmem_memory();
reserve_ion_memory();
reserve_mdp_memory();
}
static struct reserve_info msm8930_reserve_info __initdata = {
.memtype_reserve_table = msm8930_reserve_table,
.calculate_reserve_sizes = msm8930_calculate_reserve_sizes,
.paddr_to_memtype = msm8930_paddr_to_memtype,
};
static int msm8930_memory_bank_size(void)
{
return 1<<29;
}
static void __init locate_unstable_memory(void)
{
struct membank *mb = &meminfo.bank[meminfo.nr_banks - 1];
unsigned long bank_size;
unsigned long low, high;
bank_size = msm8930_memory_bank_size();
low = meminfo.bank[0].start;
high = mb->start + mb->size;
/* Check if 32 bit overflow occured */
if (high < mb->start)
high = ~0UL;
low &= ~(bank_size - 1);
if (high - low <= bank_size)
return;
msm8930_reserve_info.low_unstable_address = low + bank_size;
/* To avoid overflow of u32 compute max_unstable_size
* by first subtracting low from mb->start)
* */
msm8930_reserve_info.max_unstable_size = (mb->start - low) +
mb->size - bank_size;
msm8930_reserve_info.bank_size = bank_size;
pr_info("low unstable address %lx max size %lx bank size %lx\n",
msm8930_reserve_info.low_unstable_address,
msm8930_reserve_info.max_unstable_size,
msm8930_reserve_info.bank_size);
}
static void __init place_movable_zone(void)
{
movable_reserved_start = msm8930_reserve_info.low_unstable_address;
movable_reserved_size = msm8930_reserve_info.max_unstable_size;
pr_info("movable zone start %lx size %lx\n",
movable_reserved_start, movable_reserved_size);
}
static void __init msm8930_early_memory(void)
{
reserve_info = &msm8930_reserve_info;
locate_unstable_memory();
place_movable_zone();
}
static void __init msm8930_reserve(void)
{
msm_reserve();
}
static int msm8930_change_memory_power(u64 start, u64 size,
int change_type)
{
return soc_change_memory_power(start, size, change_type);
}
static void __init msm8930_allocate_memory_regions(void)
{
msm8930_allocate_fb_region();
}
#ifdef CONFIG_WCD9310_CODEC
#define TABLA_INTERRUPT_BASE (NR_MSM_IRQS + NR_GPIO_IRQS + NR_PM8921_IRQS)
/* Micbias setting is based on 8660 CDP/MTP/FLUID requirement
* 4 micbiases are used to power various analog and digital
* microphones operating at 1800 mV. Technically, all micbiases
* can source from single cfilter since all microphones operate
* at the same voltage level. The arrangement below is to make
* sure all cfilters are exercised. LDO_H regulator ouput level
* does not need to be as high as 2.85V. It is choosen for
* microphone sensitivity purpose.
*/
static struct tabla_pdata tabla_platform_data = {
.slimbus_slave_device = {
.name = "tabla-slave",
.e_addr = {0, 0, 0x10, 0, 0x17, 2},
},
.irq = MSM_GPIO_TO_INT(62),
.irq_base = TABLA_INTERRUPT_BASE,
.num_irqs = NR_TABLA_IRQS,
/*TODO: Replace this with right PM8038 gpio */
#ifndef MSM8930_PHASE_2
.reset_gpio = PM8921_GPIO_PM_TO_SYS(34),
#endif
.micbias = {
.ldoh_v = TABLA_LDOH_2P85_V,
.cfilt1_mv = 1800,
.cfilt2_mv = 1800,
.cfilt3_mv = 1800,
.bias1_cfilt_sel = TABLA_CFILT1_SEL,
.bias2_cfilt_sel = TABLA_CFILT2_SEL,
.bias3_cfilt_sel = TABLA_CFILT3_SEL,
.bias4_cfilt_sel = TABLA_CFILT3_SEL,
}
};
static struct slim_device msm_slim_tabla = {
.name = "tabla-slim",
.e_addr = {0, 1, 0x10, 0, 0x17, 2},
.dev = {
.platform_data = &tabla_platform_data,
},
};
static struct tabla_pdata tabla20_platform_data = {
.slimbus_slave_device = {
.name = "tabla-slave",
.e_addr = {0, 0, 0x60, 0, 0x17, 2},
},
.irq = MSM_GPIO_TO_INT(62),
.irq_base = TABLA_INTERRUPT_BASE,
.num_irqs = NR_TABLA_IRQS,
/*TODO: Replace this with right PM8038 gpio */
#ifndef MSM8930_PHASE_2
.reset_gpio = PM8921_GPIO_PM_TO_SYS(34),
#endif
.micbias = {
.ldoh_v = TABLA_LDOH_2P85_V,
.cfilt1_mv = 1800,
.cfilt2_mv = 1800,
.cfilt3_mv = 1800,
.bias1_cfilt_sel = TABLA_CFILT1_SEL,
.bias2_cfilt_sel = TABLA_CFILT2_SEL,
.bias3_cfilt_sel = TABLA_CFILT3_SEL,
.bias4_cfilt_sel = TABLA_CFILT3_SEL,
}
};
static struct slim_device msm_slim_tabla20 = {
.name = "tabla2x-slim",
.e_addr = {0, 1, 0x60, 0, 0x17, 2},
.dev = {
.platform_data = &tabla20_platform_data,
},
};
#endif
static struct slim_boardinfo msm_slim_devices[] = {
#ifdef CONFIG_WCD9310_CODEC
{
.bus_num = 1,
.slim_slave = &msm_slim_tabla,
},
{
.bus_num = 1,
.slim_slave = &msm_slim_tabla20,
},
#endif
/* add more slimbus slaves as needed */
};
#define MSM_WCNSS_PHYS 0x03000000
#define MSM_WCNSS_SIZE 0x280000
static struct resource resources_wcnss_wlan[] = {
{
.start = RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ,
.end = RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ,
.name = "wcnss_wlanrx_irq",
.flags = IORESOURCE_IRQ,
},
{
.start = RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ,
.end = RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ,
.name = "wcnss_wlantx_irq",
.flags = IORESOURCE_IRQ,
},
{
.start = MSM_WCNSS_PHYS,
.end = MSM_WCNSS_PHYS + MSM_WCNSS_SIZE - 1,
.name = "wcnss_mmio",
.flags = IORESOURCE_MEM,
},
{
.start = 84,
.end = 88,
.name = "wcnss_gpios_5wire",
.flags = IORESOURCE_IO,
},
};
static struct qcom_wcnss_opts qcom_wcnss_pdata = {
.has_48mhz_xo = 1,
};
static struct platform_device msm_device_wcnss_wlan = {
.name = "wcnss_wlan",
.id = 0,
.num_resources = ARRAY_SIZE(resources_wcnss_wlan),
.resource = resources_wcnss_wlan,
.dev = {.platform_data = &qcom_wcnss_pdata},
};
#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
#define QCE_SIZE 0x10000
#define QCE_0_BASE 0x18500000
#define QCE_HW_KEY_SUPPORT 0
#define QCE_SHA_HMAC_SUPPORT 1
#define QCE_SHARE_CE_RESOURCE 1
#define QCE_CE_SHARED 0
static struct resource qcrypto_resources[] = {
[0] = {
.start = QCE_0_BASE,
.end = QCE_0_BASE + QCE_SIZE - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.name = "crypto_channels",
.start = DMOV_CE_IN_CHAN,
.end = DMOV_CE_OUT_CHAN,
.flags = IORESOURCE_DMA,
},
[2] = {
.name = "crypto_crci_in",
.start = DMOV_CE_IN_CRCI,
.end = DMOV_CE_IN_CRCI,
.flags = IORESOURCE_DMA,
},
[3] = {
.name = "crypto_crci_out",
.start = DMOV_CE_OUT_CRCI,
.end = DMOV_CE_OUT_CRCI,
.flags = IORESOURCE_DMA,
},
};
static struct resource qcedev_resources[] = {
[0] = {
.start = QCE_0_BASE,
.end = QCE_0_BASE + QCE_SIZE - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.name = "crypto_channels",
.start = DMOV_CE_IN_CHAN,
.end = DMOV_CE_OUT_CHAN,
.flags = IORESOURCE_DMA,
},
[2] = {
.name = "crypto_crci_in",
.start = DMOV_CE_IN_CRCI,
.end = DMOV_CE_IN_CRCI,
.flags = IORESOURCE_DMA,
},
[3] = {
.name = "crypto_crci_out",
.start = DMOV_CE_OUT_CRCI,
.end = DMOV_CE_OUT_CRCI,
.flags = IORESOURCE_DMA,
},
};
#endif
#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
.ce_shared = QCE_CE_SHARED,
.shared_ce_resource = QCE_SHARE_CE_RESOURCE,
.hw_key_support = QCE_HW_KEY_SUPPORT,
.sha_hmac = QCE_SHA_HMAC_SUPPORT,
};
static struct platform_device qcrypto_device = {
.name = "qcrypto",
.id = 0,
.num_resources = ARRAY_SIZE(qcrypto_resources),
.resource = qcrypto_resources,
.dev = {
.coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &qcrypto_ce_hw_suppport,
},
};
#endif
#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
.ce_shared = QCE_CE_SHARED,
.shared_ce_resource = QCE_SHARE_CE_RESOURCE,
.hw_key_support = QCE_HW_KEY_SUPPORT,
.sha_hmac = QCE_SHA_HMAC_SUPPORT,
};
static struct platform_device qcedev_device = {
.name = "qce",
.id = 0,
.num_resources = ARRAY_SIZE(qcedev_resources),
.resource = qcedev_resources,
.dev = {
.coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &qcedev_ce_hw_suppport,
},
};
#endif
#define MDM2AP_ERRFATAL 70
#define AP2MDM_ERRFATAL 95
#define MDM2AP_STATUS 69
#define AP2MDM_STATUS 94
#define AP2MDM_PMIC_RESET_N 80
#define AP2MDM_KPDPWR_N 81
static struct resource mdm_resources[] = {
{
.start = MDM2AP_ERRFATAL,
.end = MDM2AP_ERRFATAL,
.name = "MDM2AP_ERRFATAL",
.flags = IORESOURCE_IO,
},
{
.start = AP2MDM_ERRFATAL,
.end = AP2MDM_ERRFATAL,
.name = "AP2MDM_ERRFATAL",
.flags = IORESOURCE_IO,
},
{
.start = MDM2AP_STATUS,
.end = MDM2AP_STATUS,
.name = "MDM2AP_STATUS",
.flags = IORESOURCE_IO,
},
{
.start = AP2MDM_STATUS,
.end = AP2MDM_STATUS,
.name = "AP2MDM_STATUS",
.flags = IORESOURCE_IO,
},
{
.start = AP2MDM_PMIC_RESET_N,
.end = AP2MDM_PMIC_RESET_N,
.name = "AP2MDM_PMIC_RESET_N",
.flags = IORESOURCE_IO,
},
{
.start = AP2MDM_KPDPWR_N,
.end = AP2MDM_KPDPWR_N,
.name = "AP2MDM_KPDPWR_N",
.flags = IORESOURCE_IO,
},
};
static struct mdm_platform_data mdm_platform_data = {
.mdm_version = "2.5",
};
static struct platform_device mdm_device = {
.name = "mdm2_modem",
.id = -1,
.num_resources = ARRAY_SIZE(mdm_resources),
.resource = mdm_resources,
.dev = {
.platform_data = &mdm_platform_data,
},
};
static struct platform_device *mdm_devices[] __initdata = {
&mdm_device,
};
#ifdef CONFIG_MSM_MPM
static uint16_t msm_mpm_irqs_m2a[MSM_MPM_NR_MPM_IRQS] __initdata = {
[1] = MSM_GPIO_TO_INT(46),
[2] = MSM_GPIO_TO_INT(150),
[4] = MSM_GPIO_TO_INT(103),
[5] = MSM_GPIO_TO_INT(104),
[6] = MSM_GPIO_TO_INT(105),
[7] = MSM_GPIO_TO_INT(106),
[8] = MSM_GPIO_TO_INT(107),
[9] = MSM_GPIO_TO_INT(7),
[10] = MSM_GPIO_TO_INT(11),
[11] = MSM_GPIO_TO_INT(15),
[12] = MSM_GPIO_TO_INT(19),
[13] = MSM_GPIO_TO_INT(23),
[14] = MSM_GPIO_TO_INT(27),
[15] = MSM_GPIO_TO_INT(31),
[16] = MSM_GPIO_TO_INT(35),
[19] = MSM_GPIO_TO_INT(90),
[20] = MSM_GPIO_TO_INT(92),
[23] = MSM_GPIO_TO_INT(85),
[24] = MSM_GPIO_TO_INT(83),
[25] = USB1_HS_IRQ,
[27] = HDMI_IRQ,
[29] = MSM_GPIO_TO_INT(10),
[30] = MSM_GPIO_TO_INT(102),
[31] = MSM_GPIO_TO_INT(81),
[32] = MSM_GPIO_TO_INT(78),
[33] = MSM_GPIO_TO_INT(94),
[34] = MSM_GPIO_TO_INT(72),
[35] = MSM_GPIO_TO_INT(39),
[36] = MSM_GPIO_TO_INT(43),
[37] = MSM_GPIO_TO_INT(61),
[38] = MSM_GPIO_TO_INT(50),
[39] = MSM_GPIO_TO_INT(42),
[41] = MSM_GPIO_TO_INT(62),
[42] = MSM_GPIO_TO_INT(76),
[43] = MSM_GPIO_TO_INT(75),
[44] = MSM_GPIO_TO_INT(70),
[45] = MSM_GPIO_TO_INT(69),
[46] = MSM_GPIO_TO_INT(67),
[47] = MSM_GPIO_TO_INT(65),
[48] = MSM_GPIO_TO_INT(58),
[49] = MSM_GPIO_TO_INT(54),
[50] = MSM_GPIO_TO_INT(52),
[51] = MSM_GPIO_TO_INT(49),
[52] = MSM_GPIO_TO_INT(40),
[53] = MSM_GPIO_TO_INT(37),
[54] = MSM_GPIO_TO_INT(24),
[55] = MSM_GPIO_TO_INT(14),
};
static uint16_t msm_mpm_bypassed_apps_irqs[] __initdata = {
TLMM_MSM_SUMMARY_IRQ,
RPM_APCC_CPU0_GP_HIGH_IRQ,
RPM_APCC_CPU0_GP_MEDIUM_IRQ,
RPM_APCC_CPU0_GP_LOW_IRQ,
RPM_APCC_CPU0_WAKE_UP_IRQ,
RPM_APCC_CPU1_GP_HIGH_IRQ,
RPM_APCC_CPU1_GP_MEDIUM_IRQ,
RPM_APCC_CPU1_GP_LOW_IRQ,
RPM_APCC_CPU1_WAKE_UP_IRQ,
MSS_TO_APPS_IRQ_0,
MSS_TO_APPS_IRQ_1,
MSS_TO_APPS_IRQ_2,
MSS_TO_APPS_IRQ_3,
MSS_TO_APPS_IRQ_4,
MSS_TO_APPS_IRQ_5,
MSS_TO_APPS_IRQ_6,
MSS_TO_APPS_IRQ_7,
MSS_TO_APPS_IRQ_8,
MSS_TO_APPS_IRQ_9,
LPASS_SCSS_GP_LOW_IRQ,
LPASS_SCSS_GP_MEDIUM_IRQ,
LPASS_SCSS_GP_HIGH_IRQ,
SPS_MTI_30,
SPS_MTI_31,
RIVA_APSS_SPARE_IRQ,
RIVA_APPS_WLAN_SMSM_IRQ,
RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ,
RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ,
};
struct msm_mpm_device_data msm8930_mpm_dev_data __initdata = {
.irqs_m2a = msm_mpm_irqs_m2a,
.irqs_m2a_size = ARRAY_SIZE(msm_mpm_irqs_m2a),
.bypassed_apps_irqs = msm_mpm_bypassed_apps_irqs,
.bypassed_apps_irqs_size = ARRAY_SIZE(msm_mpm_bypassed_apps_irqs),
.mpm_request_reg_base = MSM_RPM_BASE + 0x9d8,
.mpm_status_reg_base = MSM_RPM_BASE + 0xdf8,
.mpm_apps_ipc_reg = MSM_APCS_GCC_BASE + 0x008,
.mpm_apps_ipc_val = BIT(1),
.mpm_ipc_irq = RPM_APCC_CPU0_GP_MEDIUM_IRQ,
};
#endif
#define MSM_SHARED_RAM_PHYS 0x80000000
static void __init msm8930_map_io(void)
{
msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
msm_map_msm8930_io();
if (socinfo_init() < 0)
pr_err("socinfo_init() failed!\n");
}
static void __init msm8930_init_irq(void)
{
struct msm_mpm_device_data *data = NULL;
#ifdef CONFIG_MSM_MPM
data = &msm8930_mpm_dev_data;
#endif
msm_mpm_irq_extn_init(data);
gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
(void *)MSM_QGIC_CPU_BASE);
/* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
writel_relaxed(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
writel_relaxed(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
mb();
}
static void __init msm8930_init_buses(void)
{
#ifdef CONFIG_MSM_BUS_SCALING
msm_bus_rpm_set_mt_mask();
msm_bus_8960_apps_fabric_pdata.rpm_enabled = 1;
msm_bus_8960_sys_fabric_pdata.rpm_enabled = 1;
msm_bus_8960_mm_fabric_pdata.rpm_enabled = 1;
msm_bus_apps_fabric.dev.platform_data =
&msm_bus_8960_apps_fabric_pdata;
msm_bus_sys_fabric.dev.platform_data = &msm_bus_8960_sys_fabric_pdata;
msm_bus_mm_fabric.dev.platform_data = &msm_bus_8960_mm_fabric_pdata;
msm_bus_sys_fpb.dev.platform_data = &msm_bus_8960_sys_fpb_pdata;
msm_bus_cpss_fpb.dev.platform_data = &msm_bus_8960_cpss_fpb_pdata;
#endif
}
static struct msm_spi_platform_data msm8960_qup_spi_gsbi1_pdata = {
.max_clock_speed = 15060000,
};
#ifdef CONFIG_USB_MSM_OTG_72K
static struct msm_otg_platform_data msm_otg_pdata;
#else
static struct msm_otg_platform_data msm_otg_pdata = {
.mode = USB_OTG,
.otg_control = OTG_PMIC_CONTROL,
.phy_type = SNPS_28NM_INTEGRATED_PHY,
.pmic_id_irq = PM8038_USB_ID_IN_IRQ(PM8038_IRQ_BASE),
.power_budget = 750,
};
#endif
#ifdef CONFIG_USB_EHCI_MSM_HSIC
#define HSIC_HUB_RESET_GPIO 91
static struct msm_hsic_host_platform_data msm_hsic_pdata = {
.strobe = 150,
.data = 151,
};
#else
static struct msm_hsic_host_platform_data msm_hsic_pdata;
#endif
#define PID_MAGIC_ID 0x71432909
#define SERIAL_NUM_MAGIC_ID 0x61945374
#define SERIAL_NUMBER_LENGTH 127
#define DLOAD_USB_BASE_ADD 0x2A03F0C8
struct magic_num_struct {
uint32_t pid;
uint32_t serial_num;
};
struct dload_struct {
uint32_t reserved1;
uint32_t reserved2;
uint32_t reserved3;
uint16_t reserved4;
uint16_t pid;
char serial_number[SERIAL_NUMBER_LENGTH];
uint16_t reserved5;
struct magic_num_struct magic_struct;
};
static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
{
struct dload_struct __iomem *dload = 0;
dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
if (!dload) {
pr_err("%s: cannot remap I/O memory region: %08x\n",
__func__, DLOAD_USB_BASE_ADD);
return -ENXIO;
}
pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
__func__, dload, pid, snum);
/* update pid */
dload->magic_struct.pid = PID_MAGIC_ID;
dload->pid = pid;
/* update serial number */
dload->magic_struct.serial_num = 0;
if (!snum) {
memset(dload->serial_number, 0, SERIAL_NUMBER_LENGTH);
goto out;
}
dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
strlcpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
out:
iounmap(dload);
return 0;
}
static struct android_usb_platform_data android_usb_pdata = {
.update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
};
static struct platform_device android_usb_device = {
.name = "android_usb",
.id = -1,
.dev = {
.platform_data = &android_usb_pdata,
},
};
static uint8_t spm_wfi_cmd_sequence[] __initdata = {
0x03, 0x0f,
};
static uint8_t spm_power_collapse_without_rpm[] __initdata = {
0x00, 0x24, 0x54, 0x10,
0x09, 0x03, 0x01,
0x10, 0x54, 0x30, 0x0C,
0x24, 0x30, 0x0f,
};
static uint8_t spm_power_collapse_with_rpm[] __initdata = {
0x00, 0x24, 0x54, 0x10,
0x09, 0x07, 0x01, 0x0B,
0x10, 0x54, 0x30, 0x0C,
0x24, 0x30, 0x0f,
};
static struct msm_spm_seq_entry msm_spm_seq_list[] __initdata = {
[0] = {
.mode = MSM_SPM_MODE_CLOCK_GATING,
.notify_rpm = false,
.cmd = spm_wfi_cmd_sequence,
},
[1] = {
.mode = MSM_SPM_MODE_POWER_COLLAPSE,
.notify_rpm = false,
.cmd = spm_power_collapse_without_rpm,
},
[2] = {
.mode = MSM_SPM_MODE_POWER_COLLAPSE,
.notify_rpm = true,
.cmd = spm_power_collapse_with_rpm,
},
};
static struct msm_spm_platform_data msm_spm_data[] __initdata = {
[0] = {
.reg_base_addr = MSM_SAW0_BASE,
.reg_init_values[MSM_SPM_REG_SAW2_SECURE] = 0x00,
.reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F,
.reg_init_values[MSM_SPM_REG_SAW2_VCTL] = 0x9C,
#if defined(CONFIG_MSM_AVS_HW)
.reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x00,
.reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
#endif
.reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
.vctl_timeout_us = 50,
.num_modes = ARRAY_SIZE(msm_spm_seq_list),
.modes = msm_spm_seq_list,
},
[1] = {
.reg_base_addr = MSM_SAW1_BASE,
.reg_init_values[MSM_SPM_REG_SAW2_SECURE] = 0x00,
.reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F,
.reg_init_values[MSM_SPM_REG_SAW2_VCTL] = 0x9C,
#if defined(CONFIG_MSM_AVS_HW)
.reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x00,
.reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
#endif
.reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
.vctl_timeout_us = 50,
.num_modes = ARRAY_SIZE(msm_spm_seq_list),
.modes = msm_spm_seq_list,
},
};
static uint8_t l2_spm_wfi_cmd_sequence[] __initdata = {
0x00, 0x20, 0x03, 0x20,
0x00, 0x0f,
};
static uint8_t l2_spm_gdhs_cmd_sequence[] __initdata = {
0x00, 0x20, 0x34, 0x64,
0x48, 0x07, 0x48, 0x20,
0x50, 0x64, 0x04, 0x34,
0x50, 0x0f,
};
static uint8_t l2_spm_power_off_cmd_sequence[] __initdata = {
0x00, 0x10, 0x34, 0x64,
0x48, 0x07, 0x48, 0x10,
0x50, 0x64, 0x04, 0x34,
0x50, 0x0F,
};
static struct msm_spm_seq_entry msm_spm_l2_seq_list[] __initdata = {
[0] = {
.mode = MSM_SPM_L2_MODE_RETENTION,
.notify_rpm = false,
.cmd = l2_spm_wfi_cmd_sequence,
},
[1] = {
.mode = MSM_SPM_L2_MODE_GDHS,
.notify_rpm = true,
.cmd = l2_spm_gdhs_cmd_sequence,
},
[2] = {
.mode = MSM_SPM_L2_MODE_POWER_COLLAPSE,
.notify_rpm = true,
.cmd = l2_spm_power_off_cmd_sequence,
},
};
static struct msm_spm_platform_data msm_spm_l2_data[] __initdata = {
[0] = {
.reg_base_addr = MSM_SAW_L2_BASE,
.reg_init_values[MSM_SPM_REG_SAW2_SECURE] = 0x00,
.reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x00,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x00A000AE,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x00A00020,
.modes = msm_spm_l2_seq_list,
.num_modes = ARRAY_SIZE(msm_spm_l2_seq_list),
},
};
#/* TODO: Remove this once PM8038 physically becomes
* available.
*/
#ifndef MSM8930_PHASE_2
#define PM_HAP_EN_GPIO PM8921_GPIO_PM_TO_SYS(33)
#define PM_HAP_LEN_GPIO PM8921_GPIO_PM_TO_SYS(20)
#else
#define ISA1200_HAP_EN_GPIO 77
#define ISA1200_HAP_LEN_GPIO 78
#define ISA1200_HAP_CLK PM8038_GPIO_PM_TO_SYS(7)
#endif
#ifndef MSM8930_PHASE_2
static struct msm_xo_voter *xo_handle_d1;
#endif
static int isa1200_power(int on)
{
#ifndef MSM8930_PHASE_2
int rc = 0;
gpio_set_value(HAP_SHIFT_LVL_OE_GPIO, !!on);
rc = on ? msm_xo_mode_vote(xo_handle_d1, MSM_XO_MODE_ON) :
msm_xo_mode_vote(xo_handle_d1, MSM_XO_MODE_OFF);
if (rc < 0) {
pr_err("%s: failed to %svote for TCXO D1 buffer%d\n",
__func__, on ? "" : "de-", rc);
goto err_xo_vote;
}
return 0;
err_xo_vote:
gpio_set_value(HAP_SHIFT_LVL_OE_GPIO, !on);
return rc;
#else
gpio_set_value_cansleep(ISA1200_HAP_CLK, !!on);
return 0;
#endif
}
static int isa1200_dev_setup(bool enable)
{
int rc = 0;
#ifndef MSM8930_PHASE_2
struct pm_gpio hap_gpio_config = {
.direction = PM_GPIO_DIR_OUT,
.pull = PM_GPIO_PULL_NO,
.out_strength = PM_GPIO_STRENGTH_HIGH,
.function = PM_GPIO_FUNC_NORMAL,
.inv_int_pol = 0,
.vin_sel = 2,
.output_buffer = PM_GPIO_OUT_BUF_CMOS,
.output_value = 0,
};
if (enable == true) {
rc = pm8xxx_gpio_config(PM_HAP_EN_GPIO, &hap_gpio_config);
if (rc) {
pr_err("%s: pm8921 gpio %d config failed(%d)\n",
__func__, PM_HAP_EN_GPIO, rc);
return rc;
}
rc = pm8xxx_gpio_config(PM_HAP_LEN_GPIO, &hap_gpio_config);
if (rc) {
pr_err("%s: pm8921 gpio %d config failed(%d)\n",
__func__, PM_HAP_LEN_GPIO, rc);
return rc;
}
rc = gpio_request(HAP_SHIFT_LVL_OE_GPIO, "hap_shft_lvl_oe");
if (rc) {
pr_err("%s: unable to request gpio %d (%d)\n",
__func__, HAP_SHIFT_LVL_OE_GPIO, rc);
return rc;
}
rc = gpio_direction_output(HAP_SHIFT_LVL_OE_GPIO, 0);
if (rc) {
pr_err("%s: Unable to set direction\n", __func__);
goto free_gpio;
}
xo_handle_d1 = msm_xo_get(MSM_XO_TCXO_D1, "isa1200");
if (IS_ERR(xo_handle_d1)) {
rc = PTR_ERR(xo_handle_d1);
pr_err("%s: failed to get the handle for D1(%d)\n",
__func__, rc);
goto gpio_set_dir;
}
} else {
gpio_free(HAP_SHIFT_LVL_OE_GPIO);
msm_xo_put(xo_handle_d1);
}
return 0;
gpio_set_dir:
gpio_set_value(HAP_SHIFT_LVL_OE_GPIO, 0);
free_gpio:
gpio_free(HAP_SHIFT_LVL_OE_GPIO);
return rc;
#else
struct pm_gpio hap_clk_gpio_config = {
.direction = PM_GPIO_DIR_OUT,
.pull = PM_GPIO_PULL_NO,
.out_strength = PM_GPIO_STRENGTH_HIGH,
.function = PM_GPIO_FUNC_1,
.inv_int_pol = 0,
.vin_sel = PM_GPIO_VIN_S4,
.output_buffer = PM_GPIO_OUT_BUF_CMOS,
.output_value = 0,
};
rc = pm8xxx_gpio_config(ISA1200_HAP_CLK, &hap_clk_gpio_config);
if (rc) {
pr_err("%s: pm8038 gpio %d config failed(%d)\n",
__func__, ISA1200_HAP_CLK, rc);
return rc;
}
rc = gpio_request(ISA1200_HAP_CLK, "haptics_clk");
if (rc) {
pr_err("%s: gpio_request for %d gpio failed rc(%d)\n",
__func__, ISA1200_HAP_CLK, rc);
goto fail_gpio_req;
}
rc = gpio_direction_output(ISA1200_HAP_CLK, 0);
if (rc) {
pr_err("%s: gpio_direction_output failed for %d gpio rc(%d)\n",
__func__, ISA1200_HAP_CLK, rc);
goto fail_gpio_dir;
}
return 0;
fail_gpio_dir:
gpio_free(ISA1200_HAP_CLK);
fail_gpio_req:
return rc;
#endif
}
static struct isa1200_regulator isa1200_reg_data[] = {
#ifndef MSM8930_PHASE_2
{
.name = "vcc_i2c",
.min_uV = ISA_I2C_VTG_MIN_UV,
.max_uV = ISA_I2C_VTG_MAX_UV,
.load_uA = ISA_I2C_CURR_UA,
},
#else
{
.name = "vddp",
.min_uV = ISA_I2C_VTG_MIN_UV,
.max_uV = ISA_I2C_VTG_MAX_UV,
.load_uA = ISA_I2C_CURR_UA,
},
#endif
};
static struct isa1200_platform_data isa1200_1_pdata = {
.name = "vibrator",
.dev_setup = isa1200_dev_setup,
.power_on = isa1200_power,
#ifndef MSM8930_PHASE_2
.hap_en_gpio = PM_HAP_EN_GPIO,
.hap_len_gpio = PM_HAP_LEN_GPIO,
#else
.hap_en_gpio = ISA1200_HAP_EN_GPIO,
.hap_len_gpio = ISA1200_HAP_LEN_GPIO,
#endif
.max_timeout = 15000,
.mode_ctrl = PWM_GEN_MODE,
.pwm_fd = {
.pwm_div = 256,
},
.is_erm = false,
.smart_en = true,
.ext_clk_en = true,
.chip_en = 1,
.regulator_info = isa1200_reg_data,
.num_regulators = ARRAY_SIZE(isa1200_reg_data),
};
static struct i2c_board_info msm_isa1200_board_info[] __initdata = {
{
I2C_BOARD_INFO("isa1200_1", 0x90>>1),
.platform_data = &isa1200_1_pdata,
},
};
#define CYTTSP_TS_GPIO_IRQ 11
#define CYTTSP_TS_SLEEP_GPIO 50
#define CYTTSP_TS_RESOUT_N_GPIO 52
/*virtual key support */
static ssize_t tma340_vkeys_show(struct kobject *kobj,
struct kobj_attribute *attr, char *buf)
{
return snprintf(buf, 200,
__stringify(EV_KEY) ":" __stringify(KEY_BACK) ":73:1120:97:97"
":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":230:1120:97:97"
":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":389:1120:97:97"
":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":544:1120:97:97"
"\n");
}
static struct kobj_attribute tma340_vkeys_attr = {
.attr = {
.mode = S_IRUGO,
},
.show = &tma340_vkeys_show,
};
static struct attribute *tma340_properties_attrs[] = {
&tma340_vkeys_attr.attr,
NULL
};
static struct attribute_group tma340_properties_attr_group = {
.attrs = tma340_properties_attrs,
};
static int cyttsp_platform_init(struct i2c_client *client)
{
int rc = 0;
static struct kobject *tma340_properties_kobj;
tma340_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
tma340_properties_kobj = kobject_create_and_add("board_properties",
NULL);
if (tma340_properties_kobj)
rc = sysfs_create_group(tma340_properties_kobj,
&tma340_properties_attr_group);
if (!tma340_properties_kobj || rc)
pr_err("%s: failed to create board_properties\n",
__func__);
return 0;
}
static struct cyttsp_regulator regulator_data[] = {
{
.name = "vdd",
.min_uV = CY_TMA300_VTG_MIN_UV,
.max_uV = CY_TMA300_VTG_MAX_UV,
.hpm_load_uA = CY_TMA300_CURR_24HZ_UA,
.lpm_load_uA = CY_TMA300_SLEEP_CURR_UA,
},
/* TODO: Remove after runtime PM is enabled in I2C driver */
{
.name = "vcc_i2c",
.min_uV = CY_I2C_VTG_MIN_UV,
.max_uV = CY_I2C_VTG_MAX_UV,
.hpm_load_uA = CY_I2C_CURR_UA,
.lpm_load_uA = CY_I2C_SLEEP_CURR_UA,
},
};
static struct cyttsp_platform_data cyttsp_pdata = {
.panel_maxx = 634,
.panel_maxy = 1166,
.disp_maxx = 616,
.disp_maxy = 1023,
.disp_minx = 0,
.disp_miny = 16,
.flags = 0x01,
.gen = CY_GEN3, /* or */
.use_st = CY_USE_ST,
.use_mt = CY_USE_MT,
.use_hndshk = CY_SEND_HNDSHK,
.use_trk_id = CY_USE_TRACKING_ID,
.use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
.use_gestures = CY_USE_GESTURES,
.fw_fname = "cyttsp_8960_cdp.hex",
/* activate up to 4 groups
* and set active distance
*/
.gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
CY_GEST_GRP3 | CY_GEST_GRP4 |
CY_ACT_DIST,
/* change act_intrvl to customize the Active power state
* scanning/processing refresh interval for Operating mode
*/
.act_intrvl = CY_ACT_INTRVL_DFLT,
/* change tch_tmout to customize the touch timeout for the
* Active power state for Operating mode
*/
.tch_tmout = CY_TCH_TMOUT_DFLT,
/* change lp_intrvl to customize the Low Power power state
* scanning/processing refresh interval for Operating mode
*/
.lp_intrvl = CY_LP_INTRVL_DFLT,
.sleep_gpio = CYTTSP_TS_SLEEP_GPIO,
.resout_gpio = CYTTSP_TS_RESOUT_N_GPIO,
.irq_gpio = CYTTSP_TS_GPIO_IRQ,
.regulator_info = regulator_data,
.num_regulators = ARRAY_SIZE(regulator_data),
.init = cyttsp_platform_init,
.correct_fw_ver = 9,
};
static struct i2c_board_info cyttsp_info[] __initdata = {
{
I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
.platform_data = &cyttsp_pdata,
#ifndef CY_USE_TIMER
.irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
#endif /* CY_USE_TIMER */
},
};
#define MXT_TS_GPIO_IRQ 11
#define MXT_TS_RESET_GPIO 52
static const u8 mxt_config_data_8930[] = {
/* T6 Object */
0, 0, 0, 0, 0, 0,
/* T38 Object */
15, 1, 0, 15, 12, 11, 0, 0,
/* T7 Object */
48, 255, 25,
/* T8 Object */
27, 0, 5, 1, 0, 0, 8, 8, 0, 0,
/* T9 Object */
131, 0, 0, 19, 11, 0, 16, 35, 1, 3,
10, 15, 1, 11, 4, 5, 40, 10, 54, 2,
43, 4, 0, 0, 0, 0, 143, 40, 143, 80,
18, 15, 50, 50, 2,
/* T15 Object */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0,
/* T18 Object */
0, 0,
/* T19 Object */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0,
/* T23 Object */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
/* T25 Object */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0,
/* T40 Object */
0, 0, 0, 0, 0,
/* T42 Object */
0, 0, 0, 0, 0, 0, 0, 0,
/* T46 Object */
0, 3, 16, 48, 0, 0, 1, 0, 0,
/* T47 Object */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
/* T48 Object */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0,
};
static ssize_t mxt224e_vkeys_show(struct kobject *kobj,
struct kobj_attribute *attr, char *buf)
{
return snprintf(buf, 200,
__stringify(EV_KEY) ":" __stringify(KEY_BACK) ":65:938:90:90"
":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":208:938:90:90"
":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":348:938:90:90"
":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":490:938:90:90"
"\n");
}
static struct kobj_attribute mxt224e_vkeys_attr = {
.attr = {
.mode = S_IRUGO,
},
.show = &mxt224e_vkeys_show,
};
static struct attribute *mxt224e_properties_attrs[] = {
&mxt224e_vkeys_attr.attr,
NULL
};
static struct attribute_group mxt224e_properties_attr_group = {
.attrs = mxt224e_properties_attrs,
};
static void mxt_init_vkeys_8930(void)
{
int rc;
static struct kobject *mxt224e_properties_kobj;
mxt224e_vkeys_attr.attr.name = "virtualkeys.atmel_mxt_ts";
mxt224e_properties_kobj = kobject_create_and_add("board_properties",
NULL);
if (mxt224e_properties_kobj)
rc = sysfs_create_group(mxt224e_properties_kobj,
&mxt224e_properties_attr_group);
if (!mxt224e_properties_kobj || rc)
pr_err("%s: failed to create board_properties\n",
__func__);
return;
}
static struct mxt_platform_data mxt_platform_data_8930 = {
.config = mxt_config_data_8930,
.config_length = ARRAY_SIZE(mxt_config_data_8930),
.x_size = 1067,
.y_size = 566,
.irqflags = IRQF_TRIGGER_FALLING,
#ifdef MSM8930_PHASE_2
.digital_pwr_regulator = true,
#endif
.i2c_pull_up = true,
.reset_gpio = MXT_TS_RESET_GPIO,
.irq_gpio = MXT_TS_GPIO_IRQ,
};
static struct i2c_board_info mxt_device_info_8930[] __initdata = {
{
I2C_BOARD_INFO("atmel_mxt_ts", 0x4a),
.platform_data = &mxt_platform_data_8930,
.irq = MSM_GPIO_TO_INT(MXT_TS_GPIO_IRQ),
},
};
#ifdef MSM8930_PHASE_2
#define GPIO_VOLUME_UP PM8038_GPIO_PM_TO_SYS(3)
#define GPIO_VOLUME_DOWN PM8038_GPIO_PM_TO_SYS(8)
#define GPIO_CAMERA_SNAPSHOT PM8038_GPIO_PM_TO_SYS(10)
#define GPIO_CAMERA_FOCUS PM8038_GPIO_PM_TO_SYS(11)
static struct gpio_keys_button keys_8930[] = {
{
.code = KEY_VOLUMEUP,
.type = EV_KEY,
.desc = "volume_up",
.gpio = GPIO_VOLUME_UP,
.wakeup = 1,
.active_low = 1,
},
{
.code = KEY_VOLUMEDOWN,
.type = EV_KEY,
.desc = "volume_down",
.gpio = GPIO_VOLUME_DOWN,
.wakeup = 1,
.active_low = 1,
},
{
.code = KEY_CAMERA_FOCUS,
.type = EV_KEY,
.desc = "camera_focus",
.gpio = GPIO_CAMERA_FOCUS,
.wakeup = 1,
.active_low = 1,
},
{
.code = KEY_CAMERA_SNAPSHOT,
.type = EV_KEY,
.desc = "camera_snapshot",
.gpio = GPIO_CAMERA_SNAPSHOT,
.wakeup = 1,
.active_low = 1,
},
};
/* Add GPIO keys for 8930 */
static struct gpio_keys_platform_data gpio_keys_8930_pdata = {
.buttons = keys_8930,
.nbuttons = 4,
};
static struct platform_device gpio_keys_8930 = {
.name = "gpio-keys",
.id = -1,
.dev = {
.platform_data = &gpio_keys_8930_pdata,
},
};
#endif /* MSM8930_PHASE_2 */
static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi4_pdata = {
.clk_freq = 100000,
.src_clk_rate = 24000000,
};
static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi3_pdata = {
.clk_freq = 100000,
.src_clk_rate = 24000000,
};
static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi10_pdata = {
.clk_freq = 100000,
.src_clk_rate = 24000000,
};
static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi12_pdata = {
.clk_freq = 100000,
.src_clk_rate = 24000000,
};
static struct ks8851_pdata spi_eth_pdata = {
.irq_gpio = KS8851_IRQ_GPIO,
.rst_gpio = KS8851_RST_GPIO,
};
static struct spi_board_info spi_board_info[] __initdata = {
{
.modalias = "ks8851",
.irq = MSM_GPIO_TO_INT(KS8851_IRQ_GPIO),
.max_speed_hz = 19200000,
.bus_num = 0,
.chip_select = 0,
.mode = SPI_MODE_0,
.platform_data = &spi_eth_pdata
},
{
.modalias = "dsi_novatek_3d_panel_spi",
.max_speed_hz = 10800000,
.bus_num = 0,
.chip_select = 1,
.mode = SPI_MODE_0,
},
};
static struct platform_device msm_device_saw_core0 = {
.name = "saw-regulator",
.id = 0,
.dev = {
.platform_data = &msm8930_saw_regulator_core0_pdata,
},
};
static struct platform_device msm_device_saw_core1 = {
.name = "saw-regulator",
.id = 1,
.dev = {
.platform_data = &msm8930_saw_regulator_core1_pdata,
},
};
static struct tsens_platform_data msm_tsens_pdata = {
.slope = 910,
.tsens_factor = 1000,
.hw_type = MSM_8960,
.tsens_num_sensor = 5,
};
static struct platform_device msm_tsens_device = {
.name = "tsens8960-tm",
.id = -1,
.dev = {
.platform_data = &msm_tsens_pdata,
},
};
#ifdef CONFIG_MSM_FAKE_BATTERY
static struct platform_device fish_battery_device = {
.name = "fish_battery",
};
#endif
#ifndef MSM8930_PHASE_2
/* 8930 Phase 1 */
static struct platform_device msm8930_device_ext_5v_vreg __devinitdata = {
.name = GPIO_REGULATOR_DEV_NAME,
.id = PM8921_MPP_PM_TO_SYS(7),
.dev = {
.platform_data = &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V],
},
};
static struct platform_device msm8930_device_ext_l2_vreg __devinitdata = {
.name = GPIO_REGULATOR_DEV_NAME,
.id = 91,
.dev = {
.platform_data = &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_L2],
},
};
#else
/* 8930 Phase 2 */
static struct platform_device msm8930_device_ext_5v_vreg __devinitdata = {
.name = GPIO_REGULATOR_DEV_NAME,
.id = 63,
.dev = {
.platform_data =
&msm8930_gpio_regulator_pdata[MSM8930_GPIO_VREG_ID_EXT_5V],
},
};
static struct platform_device msm8930_device_ext_otg_sw_vreg __devinitdata = {
.name = GPIO_REGULATOR_DEV_NAME,
.id = 97,
.dev = {
.platform_data =
&msm8930_gpio_regulator_pdata[MSM8930_GPIO_VREG_ID_EXT_OTG_SW],
},
};
#endif
static struct platform_device msm8930_device_rpm_regulator __devinitdata = {
.name = "rpm-regulator",
.id = -1,
.dev = {
#ifndef MSM8930_PHASE_2
.platform_data = &msm_rpm_regulator_pdata,
#else
.platform_data = &msm8930_rpm_regulator_pdata,
#endif
},
};
static struct platform_device *common_devices[] __initdata = {
&msm8960_device_dmov,
&msm_device_smd,
&msm8960_device_uart_gsbi5,
&msm_device_uart_dm6,
&msm_device_saw_core0,
&msm_device_saw_core1,
&msm8930_device_ext_5v_vreg,
#ifndef MSM8930_PHASE_2
&msm8930_device_ext_l2_vreg,
#endif
&msm8960_device_ssbi_pmic,
#ifdef MSM8930_PHASE_2
&msm8930_device_ext_otg_sw_vreg,
#endif
&msm_8960_q6_lpass,
&msm_8960_q6_mss_fw,
&msm_8960_q6_mss_sw,
&msm_8960_riva,
&msm_pil_tzapps,
&msm8960_device_qup_spi_gsbi1,
&msm8960_device_qup_i2c_gsbi3,
&msm8960_device_qup_i2c_gsbi4,
&msm8960_device_qup_i2c_gsbi10,
&msm8960_device_qup_i2c_gsbi12,
&msm_slim_ctrl,
&msm_device_wcnss_wlan,
#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
&qcrypto_device,
#endif
#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
&qcedev_device,
#endif
#ifdef CONFIG_MSM_ROTATOR
&msm_rotator_device,
#endif
&msm_device_sps,
#ifdef CONFIG_MSM_FAKE_BATTERY
&fish_battery_device,
#endif
#ifdef CONFIG_ANDROID_PMEM
#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
&android_pmem_device,
&android_pmem_adsp_device,
#endif
&android_pmem_audio_device,
#endif
&msm_device_vidc,
&msm_device_bam_dmux,
&msm_fm_platform_init,
#ifdef CONFIG_HW_RANDOM_MSM
&msm_device_rng,
#endif
&msm8930_rpm_device,
&msm8930_rpm_log_device,
&msm8930_rpm_stat_device,
#ifdef CONFIG_ION_MSM
&ion_dev,
#endif
&msm_device_tz_log,
#ifdef CONFIG_MSM_QDSS
&msm_etb_device,
&msm_tpiu_device,
&msm_funnel_device,
&msm_ptm_device,
#endif
&msm_device_dspcrashd_8960,
&msm8960_device_watchdog,
#ifdef MSM8930_PHASE_2
&gpio_keys_8930,
#endif
};
static struct platform_device *cdp_devices[] __initdata = {
&msm8960_device_otg,
&msm8960_device_gadget_peripheral,
&msm_device_hsusb_host,
&android_usb_device,
&msm_pcm,
&msm_pcm_routing,
&msm_cpudai0,
&msm_cpudai1,
&msm_cpudai_hdmi_rx,
&msm_cpudai_bt_rx,
&msm_cpudai_bt_tx,
&msm_cpudai_fm_rx,
&msm_cpudai_fm_tx,
&msm_cpudai_auxpcm_rx,
&msm_cpudai_auxpcm_tx,
&msm_cpu_fe,
&msm_stub_codec,
&msm_kgsl_3d0,
#ifdef CONFIG_MSM_KGSL_2D
&msm_kgsl_2d0,
&msm_kgsl_2d1,
#endif
#ifdef CONFIG_MSM_GEMINI
&msm8960_gemini_device,
#endif
&msm_voice,
&msm_voip,
&msm_lpa_pcm,
&msm_cpudai_afe_01_rx,
&msm_cpudai_afe_01_tx,
&msm_cpudai_afe_02_rx,
&msm_cpudai_afe_02_tx,
&msm_pcm_afe,
&msm_compr_dsp,
&msm_cpudai_incall_music_rx,
&msm_cpudai_incall_record_rx,
&msm_cpudai_incall_record_tx,
&msm_pcm_hostless,
&msm_bus_apps_fabric,
&msm_bus_sys_fabric,
&msm_bus_mm_fabric,
&msm_bus_sys_fpb,
&msm_bus_cpss_fpb,
&msm_tsens_device,
};
static void __init msm8930_i2c_init(void)
{
msm8960_device_qup_i2c_gsbi4.dev.platform_data =
&msm8960_i2c_qup_gsbi4_pdata;
msm8960_device_qup_i2c_gsbi3.dev.platform_data =
&msm8960_i2c_qup_gsbi3_pdata;
msm8960_device_qup_i2c_gsbi10.dev.platform_data =
&msm8960_i2c_qup_gsbi10_pdata;
msm8960_device_qup_i2c_gsbi12.dev.platform_data =
&msm8960_i2c_qup_gsbi12_pdata;
}
static void __init msm8930_gfx_init(void)
{
uint32_t soc_platform_version = socinfo_get_version();
if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1) {
struct kgsl_device_platform_data *kgsl_3d0_pdata =
msm_kgsl_3d0.dev.platform_data;
kgsl_3d0_pdata->pwrlevel[0].gpu_freq = 320000000;
kgsl_3d0_pdata->pwrlevel[1].gpu_freq = 266667000;
}
}
static struct msm_cpuidle_state msm_cstates[] __initdata = {
{0, 0, "C0", "WFI",
MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
{0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
{0, 2, "C2", "POWER_COLLAPSE",
MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
{1, 0, "C0", "WFI",
MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
{1, 1, "C1", "STANDALONE_POWER_COLLAPSE",
MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
};
static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
[MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
.idle_supported = 1,
.suspend_supported = 1,
.idle_enabled = 0,
.suspend_enabled = 0,
},
[MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
.idle_supported = 1,
.suspend_supported = 1,
.idle_enabled = 0,
.suspend_enabled = 0,
},
[MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
.idle_supported = 1,
.suspend_supported = 1,
.idle_enabled = 1,
.suspend_enabled = 1,
},
[MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
.idle_supported = 0,
.suspend_supported = 1,
.idle_enabled = 0,
.suspend_enabled = 0,
},
[MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
.idle_supported = 1,
.suspend_supported = 1,
.idle_enabled = 0,
.suspend_enabled = 0,
},
[MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
.idle_supported = 1,
.suspend_supported = 0,
.idle_enabled = 1,
.suspend_enabled = 0,
},
};
static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
{
MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
true,
100, 8000, 100000, 1,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
true,
2000, 6000, 60100000, 3000,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(ON, GDHS, MAX, ACTIVE),
false,
4200, 5000, 60350000, 3500,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
false,
6300, 4500, 65350000, 4800,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(ON, HSFS_OPEN, ACTIVE, RET_HIGH),
false,
7000, 3500, 66600000, 5150,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, GDHS, MAX, ACTIVE),
false,
11700, 2500, 67850000, 5500,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
false,
13800, 2000, 71850000, 6800,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
false,
29700, 500, 75850000, 8800,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
false,
29700, 0, 76350000, 9800,
},
};
static struct msm_rpmrs_platform_data msm_rpmrs_data __initdata = {
.levels = &msm_rpmrs_levels[0],
.num_levels = ARRAY_SIZE(msm_rpmrs_levels),
.vdd_mem_levels = {
[MSM_RPMRS_VDD_MEM_RET_LOW] = 750000,
[MSM_RPMRS_VDD_MEM_RET_HIGH] = 750000,
[MSM_RPMRS_VDD_MEM_ACTIVE] = 1050000,
[MSM_RPMRS_VDD_MEM_MAX] = 1150000,
},
.vdd_dig_levels = {
[MSM_RPMRS_VDD_DIG_RET_LOW] = 500000,
[MSM_RPMRS_VDD_DIG_RET_HIGH] = 750000,
[MSM_RPMRS_VDD_DIG_ACTIVE] = 950000,
[MSM_RPMRS_VDD_DIG_MAX] = 1150000,
},
.vdd_mask = 0x7FFFFF,
.rpmrs_target_id = {
[MSM_RPMRS_ID_PXO_CLK] = MSM_RPM_ID_PXO_CLK,
[MSM_RPMRS_ID_L2_CACHE_CTL] = MSM_RPM_ID_LAST,
[MSM_RPMRS_ID_VDD_DIG_0] = MSM_RPM_ID_PM8038_S1_0,
[MSM_RPMRS_ID_VDD_DIG_1] = MSM_RPM_ID_PM8038_S1_1,
[MSM_RPMRS_ID_VDD_MEM_0] = MSM_RPM_ID_PM8038_L24_0,
[MSM_RPMRS_ID_VDD_MEM_1] = MSM_RPM_ID_PM8038_L24_1,
[MSM_RPMRS_ID_RPM_CTL] = MSM_RPM_ID_RPM_CTL,
},
};
static struct msm_pm_boot_platform_data msm_pm_boot_pdata __initdata = {
.mode = MSM_PM_BOOT_CONFIG_TZ,
};
#ifdef CONFIG_I2C
#define I2C_SURF 1
#define I2C_FFA (1 << 1)
#define I2C_RUMI (1 << 2)
#define I2C_SIM (1 << 3)
#define I2C_FLUID (1 << 4)
#define I2C_LIQUID (1 << 5)
struct i2c_registry {
u8 machs;
int bus;
struct i2c_board_info *info;
int len;
};
static void __init msm8930_init_hsic(void)
{
#ifdef CONFIG_USB_EHCI_MSM_HSIC
uint32_t version = socinfo_get_version();
pr_info("%s: version:%d mtp:%d\n", __func__,
SOCINFO_VERSION_MAJOR(version),
machine_is_msm8930_mtp());
if ((SOCINFO_VERSION_MAJOR(version) == 1) ||
machine_is_msm8930_mtp() ||
machine_is_msm8930_fluid())
return;
platform_device_register(&msm_device_hsic_host);
#endif
}
#ifdef CONFIG_ISL9519_CHARGER
static struct isl_platform_data isl_data __initdata = {
.valid_n_gpio = 0, /* Not required when notify-by-pmic */
.chg_detection_config = NULL, /* Not required when notify-by-pmic */
.max_system_voltage = 4200,
.min_system_voltage = 3200,
.chgcurrent = 1000, /* 1900, */
.term_current = 400, /* Need fine tuning */
.input_current = 2048,
};
static struct i2c_board_info isl_charger_i2c_info[] __initdata = {
{
I2C_BOARD_INFO("isl9519q", 0x9),
.irq = 0, /* Not required when notify-by-pmic */
.platform_data = &isl_data,
},
};
#endif /* CONFIG_ISL9519_CHARGER */
static struct i2c_registry msm8960_i2c_devices[] __initdata = {
#ifdef CONFIG_ISL9519_CHARGER
{
I2C_LIQUID,
MSM_8930_GSBI10_QUP_I2C_BUS_ID,
isl_charger_i2c_info,
ARRAY_SIZE(isl_charger_i2c_info),
},
#endif /* CONFIG_ISL9519_CHARGER */
{
I2C_SURF | I2C_FFA | I2C_FLUID,
MSM_8930_GSBI3_QUP_I2C_BUS_ID,
cyttsp_info,
ARRAY_SIZE(cyttsp_info),
},
#ifndef MSM8930_PHASE_2
{
I2C_LIQUID,
MSM_8930_GSBI10_QUP_I2C_BUS_ID,
msm_isa1200_board_info,
ARRAY_SIZE(msm_isa1200_board_info),
},
#else
{
I2C_FFA | I2C_FLUID,
MSM_8930_GSBI10_QUP_I2C_BUS_ID,
msm_isa1200_board_info,
ARRAY_SIZE(msm_isa1200_board_info),
},
#endif
{
I2C_SURF,
MSM_8930_GSBI3_QUP_I2C_BUS_ID,
mxt_device_info_8930,
ARRAY_SIZE(mxt_device_info_8930),
},
};
#endif /* CONFIG_I2C */
static void __init register_i2c_devices(void)
{
#ifdef CONFIG_I2C
u8 mach_mask = 0;
int i;
#ifdef CONFIG_MSM_CAMERA
struct i2c_registry msm8930_camera_i2c_devices = {
I2C_SURF | I2C_FFA | I2C_FLUID | I2C_LIQUID | I2C_RUMI,
MSM_8930_GSBI4_QUP_I2C_BUS_ID,
msm8930_camera_board_info.board_info,
msm8930_camera_board_info.num_i2c_board_info,
};
#endif
/* Build the matching 'supported_machs' bitmask */
if (machine_is_msm8930_cdp() || machine_is_msm8627_cdp())
mach_mask = I2C_SURF;
else if (machine_is_msm8930_fluid())
mach_mask = I2C_FLUID;
else if (machine_is_msm8930_mtp() || machine_is_msm8627_mtp())
mach_mask = I2C_FFA;
else
pr_err("unmatched machine ID in register_i2c_devices\n");
/* Run the array and install devices as appropriate */
for (i = 0; i < ARRAY_SIZE(msm8960_i2c_devices); ++i) {
if (msm8960_i2c_devices[i].machs & mach_mask)
i2c_register_board_info(msm8960_i2c_devices[i].bus,
msm8960_i2c_devices[i].info,
msm8960_i2c_devices[i].len);
}
#ifdef CONFIG_MSM_CAMERA
if (msm8930_camera_i2c_devices.machs & mach_mask)
i2c_register_board_info(msm8930_camera_i2c_devices.bus,
msm8930_camera_i2c_devices.info,
msm8930_camera_i2c_devices.len);
#endif
#endif
}
static void __init msm8930_cdp_init(void)
{
if (meminfo_init(SYS_MEMORY, SZ_256M) < 0)
pr_err("meminfo_init() failed!\n");
BUG_ON(msm_rpm_init(&msm8930_rpm_data));
BUG_ON(msm_rpmrs_levels_init(&msm_rpmrs_data));
regulator_suppress_info_printing();
if (msm_xo_init())
pr_err("Failed to initialize XO votes\n");
platform_device_register(&msm8930_device_rpm_regulator);
msm_clock_init(&msm8960_clock_init_data);
msm8960_device_otg.dev.platform_data = &msm_otg_pdata;
msm_device_hsic_host.dev.platform_data = &msm_hsic_pdata;
msm8930_init_gpiomux();
msm8960_device_qup_spi_gsbi1.dev.platform_data =
&msm8960_qup_spi_gsbi1_pdata;
spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
/*
* TODO: When physical 8930/PM8038 hardware becomes
* available, remove this block or add the config
* option.
*/
#ifndef MSM8930_PHASE_2
msm8960_init_pmic();
#else
msm8930_init_pmic();
#endif
msm8930_i2c_init();
msm8930_gfx_init();
msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
msm_spm_l2_init(msm_spm_l2_data);
msm8930_init_buses();
platform_add_devices(msm_footswitch_devices,
msm_num_footswitch_devices);
platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
/*
* TODO: When physical 8930/PM8038 hardware becomes
* available, remove this block or add the config
* option.
*/
#ifndef MSM8930_PHASE_2
msm8960_pm8921_gpio_mpp_init();
#else
msm8930_pm8038_gpio_mpp_init();
#endif
platform_add_devices(cdp_devices, ARRAY_SIZE(cdp_devices));
msm8930_init_hsic();
msm8930_init_cam();
msm8930_init_mmc();
acpuclk_init(&acpuclk_8930_soc_data);
if (machine_is_msm8930_cdp() || machine_is_msm8627_cdp())
mxt_init_vkeys_8930();
register_i2c_devices();
msm8930_init_fb();
slim_register_board_info(msm_slim_devices,
ARRAY_SIZE(msm_slim_devices));
msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
msm_pm_data);
change_memory_power = &msm8930_change_memory_power;
BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
if (PLATFORM_IS_CHARM25())
platform_add_devices(mdm_devices, ARRAY_SIZE(mdm_devices));
}
MACHINE_START(MSM8930_CDP, "QCT MSM8930 CDP")
.map_io = msm8930_map_io,
.reserve = msm8930_reserve,
.init_irq = msm8930_init_irq,
.handle_irq = gic_handle_irq,
.timer = &msm_timer,
.init_machine = msm8930_cdp_init,
.init_early = msm8930_allocate_memory_regions,
.init_very_early = msm8930_early_memory,
MACHINE_END
MACHINE_START(MSM8930_MTP, "QCT MSM8930 MTP")
.map_io = msm8930_map_io,
.reserve = msm8930_reserve,
.init_irq = msm8930_init_irq,
.handle_irq = gic_handle_irq,
.timer = &msm_timer,
.init_machine = msm8930_cdp_init,
.init_early = msm8930_allocate_memory_regions,
.init_very_early = msm8930_early_memory,
MACHINE_END
MACHINE_START(MSM8930_FLUID, "QCT MSM8930 FLUID")
.map_io = msm8930_map_io,
.reserve = msm8930_reserve,
.init_irq = msm8930_init_irq,
.handle_irq = gic_handle_irq,
.timer = &msm_timer,
.init_machine = msm8930_cdp_init,
.init_early = msm8930_allocate_memory_regions,
.init_very_early = msm8930_early_memory,
MACHINE_END
MACHINE_START(MSM8627_CDP, "QCT MSM8627 CDP")
.map_io = msm8930_map_io,
.reserve = msm8930_reserve,
.init_irq = msm8930_init_irq,
.handle_irq = gic_handle_irq,
.timer = &msm_timer,
.init_machine = msm8930_cdp_init,
.init_early = msm8930_allocate_memory_regions,
.init_very_early = msm8930_early_memory,
MACHINE_END
MACHINE_START(MSM8627_MTP, "QCT MSM8627 MTP")
.map_io = msm8930_map_io,
.reserve = msm8930_reserve,
.init_irq = msm8930_init_irq,
.handle_irq = gic_handle_irq,
.timer = &msm_timer,
.init_machine = msm8930_cdp_init,
.init_early = msm8930_allocate_memory_regions,
.init_very_early = msm8930_early_memory,
MACHINE_END