Merge "msm: rpm-regulator: Add support for PM8038 LDO 13 and LDO 25" into msm-3.4
diff --git a/Documentation/devicetree/bindings/coresight/coresight.txt b/Documentation/devicetree/bindings/coresight/coresight.txt
new file mode 100644
index 0000000..c584073
--- /dev/null
+++ b/Documentation/devicetree/bindings/coresight/coresight.txt
@@ -0,0 +1,106 @@
+* CoreSight Components
+
+CoreSight components are compliant with the ARM CoreSight architecture
+specification and can be connected in various topologies to suite a particular
+SoCs tracing needs. These trace components can generally be classified as sinks,
+links and sources. Trace data produced by one or more sources flows through the
+intermediate links connecting the source to the currently selected sink. Each
+CoreSight component device should use these properties to describe its hardware
+characteristcs.
+
+Required properties:
+
+- compatible : name of the component used for driver matching
+- reg : physical base address and length of the register set(s) of the component
+- coresight-id : unique integer identifier for the component
+- coresight-name : unique descriptive name of the component
+- coresight-nr-inports : number of input ports on the component
+
+coresight-outports, coresight-child-list and coresight-child-ports lists will
+be of the same length and will have a one to one correspondence among the
+elements at the same list index.
+
+coresight-default-sink must be specified for one of the sink devices that is
+intended to be made the default sink. Other sink devices must not have this
+specified. Not specifying this property on any of the sinks is invalid.
+
+Optional properties:
+
+- coresight-outports : list of output port numbers of this component
+- coresight-child-list : list of phandles pointing to the children of this
+ component
+- coresight-child-ports : list of input port numbers of the children
+- coresight-default-sink : represents the default compile time CoreSight sink
+
+Examples:
+
+1. Sinks
+ tmc_etr: tmc@fc322000 {
+ compatible = "arm,coresight-tmc";
+ reg = <0xfc322000 0x1000>;
+
+ coresight-id = <0>;
+ coresight-name = "coresight-tmc-etr";
+ coresight-nr-inports = <1>;
+ coresight-default-sink;
+ };
+
+ tpiu: tpiu@fc318000 {
+ compatible = "arm,coresight-tpiu";
+ reg = <0xfc318000 0x1000>;
+
+ coresight-id = <1>;
+ coresight-name = "coresight-tpiu";
+ coresight-nr-inports = <1>;
+ };
+
+2. Links
+ funnel_merg: funnel@fc31b000 {
+ compatible = "arm,coresight-funnel";
+ reg = <0xfc31b000 0x1000>;
+
+ coresight-id = <4>;
+ coresight-name = "coresight-funnel-merg";
+ coresight-nr-inports = <2>;
+ coresight-outports = <0>;
+ coresight-child-list = <&tmc_etf>;
+ coresight-child-ports = <0>;
+ };
+
+ funnel_in0: funnel@fc319000 {
+ compatible = "arm,coresight-funnel";
+ reg = <0xfc319000 0x1000>;
+
+ coresight-id = <5>;
+ coresight-name = "coresight-funnel-in0";
+ coresight-nr-inports = <8>;
+ coresight-outports = <0>;
+ coresight-child-list = <&funnel_merg>;
+ coresight-child-ports = <0>;
+ };
+
+3. Sources
+ stm: stm@fc321000 {
+ compatible = "arm,coresight-stm";
+ reg = <0xfc321000 0x1000>,
+ <0xfa280000 0x180000>;
+
+ coresight-id = <9>;
+ coresight-name = "coresight-stm";
+ coresight-nr-inports = <0>;
+ coresight-outports = <0>;
+ coresight-child-list = <&funnel_in1>;
+ coresight-child-ports = <7>;
+ };
+
+ etm0: etm@fc33c000 {
+ compatible = "arm,coresight-etm";
+ reg = <0xfc33c000 0x1000>;
+
+ coresight-id = <10>;
+ coresight-name = "coresight-etm0";
+ coresight-nr-inports = <0>;
+ coresight-outports = <0>;
+ coresight-child-list = <&funnel_kpss>;
+ coresight-child-ports = <0>;
+ };
diff --git a/Documentation/devicetree/bindings/gpio/gpio-msm.txt b/Documentation/devicetree/bindings/gpio/gpio-msm.txt
new file mode 100644
index 0000000..359d700
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-msm.txt
@@ -0,0 +1,39 @@
+MSM GPIO controller bindings
+
+Required properties:
+- compatible:
+ - "qcom,msm-gpio" for MSM controllers
+- #gpio-cells : Should be two.
+ - first cell is the pin number
+ - second cell is used to specify optional parameters (unused)
+- gpio-controller : Marks the device node as a GPIO controller.
+- #interrupt-cells : Should be 2.
+- interrupt-controller: Mark the device node as an interrupt controller
+
+Example:
+
+ msmgpio: gpio@fd510000 {
+ compatible = "qcom,msm-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0xfd510000 0x4000>;
+ };
+
+To specify gpios for a device:
+
+ device1@f991f000 {
+ compatible = "qcom,msm-device-v1";
+ reg = <0xf991f000 0x1000>;
+ gpios = <&msmgpio 45 0>;
+ cs-gpios = <&msmgpio 46 0>;
+ };
+
+45, 46 - gpio numbers.
+The driver for device1 can call of_get_gpio() to extract the
+gpio45. In order to extract gpio46, the driver needs to call
+of_get_named_gpio with "cs-gpios" as the name parameter.
+Please refer to the file: include/linux/of_gpio.h for the
+complete list of APIs the driver can use to extract gpio
+information from the device tree.
diff --git a/Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt b/Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt
index 95e7f88..32c9c35 100644
--- a/Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt
+++ b/Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt
@@ -7,11 +7,12 @@
Required properties:
- compatible: Must be "qcom,pil-q6v5-mss"
-- reg: Four pairs of physical base addresses and region sizes of
+- reg: Five pairs of physical base addresses and region sizes of
memory mapped registers. The first region corresponds to
QDSP6SS_PUB, the second to the bus port halt register
- base, the third to the MSS_RELAY_MSG_BUFFER base, and the
- fourth to the MSS_RESTART register.
+ base, the third to the MSS_RELAY_MSG_BUFFER base, the
+ fourth to the MSS_RESTART register, and the fifth to the
+ MSS_CLAMP_IO register.
- vdd_mss-supply: Reference to the regulator that supplies the processor.
- qcom,firmware-name: Base name of the firmware image. Ex. "mdsp"
- qcom,pil-self-auth: <0> if the hardware does not require self-authenticating
@@ -24,7 +25,8 @@
reg = <0xfc880000 0x100>,
<0xfd485000 0x400>,
<0xfc820000 0x020>,
- <0xfc401680 0x004>;
+ <0xfc401680 0x004>,
+ <0xfc980008 0x004>;
vdd_mss-supply = <&pm8841_s3>;
qcom,firmware-name = "mba";
diff --git a/Documentation/devicetree/bindings/regulator/qpnp-regulator.txt b/Documentation/devicetree/bindings/regulator/qpnp-regulator.txt
index c9bc284..2116888 100644
--- a/Documentation/devicetree/bindings/regulator/qpnp-regulator.txt
+++ b/Documentation/devicetree/bindings/regulator/qpnp-regulator.txt
@@ -76,11 +76,13 @@
1 = 0.25 uA
2 = 0.55 uA
3 = 0.75 uA
-
-- spmi-dev-container: This specifies that all the device nodes specified
- within this node should have their resources coalesced into a single
- spmi_device. This is used to specify all SPMI peripherals that
- logically make up a single regulator device.
+- qcom,force-type: Override the type and subtype register values. Useful for some
+ regulators that have invalid types advertised by the hardware.
+ The format is two unsigned integers of the form <type subtype>.
+- spmi-dev-container: Specifies that all the device nodes specified
+ within this node should have their resources coalesced into a
+ single spmi_device. This is used to specify all SPMI peripherals
+ that logically make up a single regulator device.
Note, if a given optional qcom,* binding is not present, then the qpnp-regulator
driver will leave that feature in the default hardware state.
diff --git a/Documentation/devicetree/bindings/sound/taiko_codec.txt b/Documentation/devicetree/bindings/sound/taiko_codec.txt
new file mode 100644
index 0000000..9f3719b
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/taiko_codec.txt
@@ -0,0 +1,82 @@
+taiko audio CODEC
+
+Required properties:
+
+ - compatible : "qcom,taiko-slim-pgd"
+ - elemental-addr: codec slimbus slave PGD enumeration address.(48 bits)
+
+ - qcom,cdc-reset-gpio: gpio used for codec SOC reset.
+
+ - <supply-name>-supply: phandle to the regulator device tree node
+ - qcom,<supply-name>-voltage - specifies voltage levels for supply. Should be
+ specified in pairs (min, max), units mV.
+ - qcom,<supply-name>-current - specifies max current in mA that can drawn
+ from the <supply-name>.
+
+ above three properties with "supply-name" set to "qcom,cdc-vdd-buck", "qcom,cdc-vdd-tx-h",
+ "qcom,cdc-vdd-rx-h", "qcom,cdc-vddpx-1", "qcom,cdc-vdd-a-1p2v", "qcom,cdc-vddcx-1",
+ "qcom,cdc-vddcx-2" should be present.
+
+ - qcom,cdc-micbias-ldoh-v - LDOH output in volts ( should be 1.95 V and 3.00 V).
+
+ - qcom,cdc-micbias-cfilt1-mv - cfilt1 output voltage in milli volts.
+ - qcom,cdc-micbias-cfilt2-mv - cfilt2 output voltage in milli volts.
+ - qcom,cdc-micbias-cfilt3-mv - cfilt3 output voltage in milli volts.
+ cfilt volatge can be set to max of qcom,cdc-micbias-ldoh-v - 0.15V.
+
+ - qcom,cdc-micbias1-cfilt-sel = cfilt to use for micbias1 (should be from 1 to 3).
+ - qcom,cdc-micbias2-cfilt-sel = cfilt to use for micbias2 (should be from 1 to 3).
+ - qcom,cdc-micbias3-cfilt-sel = cfilt to use for micbias3 (should be from 1 to 3).
+ - qcom,cdc-micbias4-cfilt-sel = cfilt to use for micbias4 (should be from 1 to 3).
+
+ - qcom,cdc-slim-ifd-dev - namme of the codec slim interface device.
+ - qcom,cdc-slim-ifd-elemental-addr - codec slimbus slave interface device
+ enumeration address.
+Example:
+
+taiko_codec {
+ compatible = "qcom,taiko-slim-pgd";
+ elemental-addr = [00 01 A0 00 17 02];
+
+ qcom,cdc-reset-gpio = <&msmgpio 63 0>;
+
+ cdc-vdd-buck-supply = <&pm8941_s2>;
+ qcom,cdc-vdd-buck-voltage = <2150000 2150000>;
+ qcom,cdc-vdd-buck-current = <500000>;
+
+ cdc-vdd-tx-h-supply = <&pm8941_s3>;
+ qcom,cdc-vdd-tx-h-voltage = <1800000 1800000>;
+ qcom,cdc-vdd-tx-h-current = <200000>;
+
+ cdc-vdd-rx-h-supply = <&pm8941_s3>;
+ qcom,cdc-vdd-rx-h-voltage = <1800000 1800000>;
+ qcom,cdc-vdd-rx-h-current = <200000>;
+
+ cdc-vddpx-1-supply = <&pm8941_s3>;
+ qcom,cdc-vddpx-1-voltage = <1800000 1800000>;
+ qcom,cdc-vddpx-1-current = <5000>;
+
+ cdc-vdd-a-1p2v-supply = <&pm8941_l1>;
+ qcom,cdc-vdd-a-1p2v-voltage = <1225000 1225000>;
+ qcom,cdc-vdd-a-1p2v-current = <5000>;
+
+ cdc-vddcx-1-supply = <&pm8941_l1>;
+ qcom,cdc-vddcx-1-voltage = <1225000 1225000>;
+ qcom,cdc-vddcx-1-current = <5000>;
+
+ cdc-vddcx-2-supply = <&pm8941_l1>;
+ qcom,cdc-vddcx-2-voltage = <1225000 1225000>;
+ qcom,cdc-vddcx-2-current = <5000>;
+
+ qcom,cdc-micbias-ldoh-v = <0x3>;
+ qcom,cdc-micbias-cfilt1-mv = <1800>;
+ qcom,cdc-micbias-cfilt2-mv = <2700>;
+ qcom,cdc-micbias-cfilt3-mv = <1800>;
+ qcom,cdc-micbias1-cfilt-sel = <0x0>;
+ qcom,cdc-micbias2-cfilt-sel = <0x1>;
+ qcom,cdc-micbias3-cfilt-sel = <0x2>;
+ qcom,cdc-micbias4-cfilt-sel = <0x2>;
+
+ qcom,cdc-slim-ifd = "taiko-slim-ifd";
+ qcom,cdc-slim-ifd-elemental-addr = [00 00 A0 00 17 02];
+};
diff --git a/arch/arm/boot/dts/msm-pm8841.dtsi b/arch/arm/boot/dts/msm-pm8841.dtsi
index d84c8e0..967d5ec 100644
--- a/arch/arm/boot/dts/msm-pm8841.dtsi
+++ b/arch/arm/boot/dts/msm-pm8841.dtsi
@@ -91,6 +91,7 @@
compatible = "qcom,qpnp-regulator";
reg = <0x1700 0x300>;
status = "disabled";
+ qcom,force-type = <0x1c 0x08>;
qcom,ctl@1700 {
reg = <0x1700 0x100>;
@@ -131,6 +132,7 @@
compatible = "qcom,qpnp-regulator";
reg = <0x1d00 0x300>;
status = "disabled";
+ qcom,force-type = <0x1c 0x08>;
qcom,ctl@1d00 {
reg = <0x1d00 0x100>;
@@ -151,6 +153,7 @@
compatible = "qcom,qpnp-regulator";
reg = <0x2000 0x300>;
status = "disabled";
+ qcom,force-type = <0x1c 0x08>;
qcom,ctl@0 {
reg = <0x2000 0x100>;
@@ -171,6 +174,7 @@
compatible = "qcom,qpnp-regulator";
reg = <0x2300 0x300>;
status = "disabled";
+ qcom,force-type = <0x1c 0x08>;
qcom,ctl@2300 {
reg = <0x2300 0x100>;
@@ -191,6 +195,7 @@
compatible = "qcom,qpnp-regulator";
reg = <0x2600 0x300>;
status = "disabled";
+ qcom,force-type = <0x1c 0x08>;
qcom,ctl@2600 {
reg = <0x2600 0x100>;
@@ -211,6 +216,7 @@
compatible = "qcom,qpnp-regulator";
reg = <0x2900 0x300>;
status = "disabled";
+ qcom,force-type = <0x1c 0x08>;
qcom,ctl@2900 {
reg = <0x2900 0x100>;
diff --git a/arch/arm/boot/dts/msm-pm8941.dtsi b/arch/arm/boot/dts/msm-pm8941.dtsi
index cb1ac34..a1bc937 100644
--- a/arch/arm/boot/dts/msm-pm8941.dtsi
+++ b/arch/arm/boot/dts/msm-pm8941.dtsi
@@ -425,7 +425,7 @@
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
- reg = <0x1400 0x300>;
+ reg = <0x1a00 0x300>;
status = "disabled";
qcom,ctl@1a00 {
@@ -478,6 +478,7 @@
regulator-name = "8941_l5";
reg = <0x4400 0x100>;
compatible = "qcom,qpnp-regulator";
+ qcom,force-type = <0x04 0x10>;
status = "disabled";
};
@@ -492,6 +493,7 @@
regulator-name = "8941_l7";
reg = <0x4600 0x100>;
compatible = "qcom,qpnp-regulator";
+ qcom,force-type = <0x04 0x10>;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/msm8974-cdp.dts b/arch/arm/boot/dts/msm8974-cdp.dts
index 29edf30..bfe24d2 100644
--- a/arch/arm/boot/dts/msm8974-cdp.dts
+++ b/arch/arm/boot/dts/msm8974-cdp.dts
@@ -17,5 +17,9 @@
/ {
model = "Qualcomm MSM 8974 CDP";
compatible = "qcom,msm8974-cdp", "qcom,msm8974";
- qcom,msm-id = <126 1 0>;
+ qcom,msm-id = <126 1 0>, <126 8 0>;
+
+ serial@f991e000 {
+ status = "ok";
+ };
};
diff --git a/arch/arm/boot/dts/msm8974-regulator.dtsi b/arch/arm/boot/dts/msm8974-regulator.dtsi
index a187223..eb269eb 100644
--- a/arch/arm/boot/dts/msm8974-regulator.dtsi
+++ b/arch/arm/boot/dts/msm8974-regulator.dtsi
@@ -10,13 +10,38 @@
* GNU General Public License for more details.
*/
-
-/* QPNP controlled regulators: */
-
&spmi_bus {
-
qcom,pm8941@1 {
+ pm8941_s1: regulator@1400 {
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1300000>;
+ qcom,enable-time = <500>;
+ qcom,pull-down-enable = <1>;
+ regulator-always-on;
+ status = "okay";
+ };
+
+ regulator@1700 {
+ regulator-min-microvolt = <2150000>;
+ regulator-max-microvolt = <2150000>;
+ qcom,enable-time = <500>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ regulator-name = "8941_s2_local";
+ regulator-always-on;
+ qcom,system-load = <100000>;
+ };
+
+ pm8941_s3: regulator@1a00 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,enable-time = <500>;
+ qcom,pull-down-enable = <1>;
+ regulator-always-on;
+ status = "okay";
+ };
+
pm8941_boost: regulator@a000 {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
@@ -24,6 +49,216 @@
status = "okay";
};
+ pm8941_l1: regulator@4000 {
+ parent-supply = <&pm8941_s1>;
+ regulator-min-microvolt = <1225000>;
+ regulator-max-microvolt = <1225000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ regulator-always-on;
+ status = "okay";
+ };
+
+ pm8941_l2: regulator@4100 {
+ parent-supply = <&pm8941_s3>;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ pm8941_l3: regulator@4200 {
+ parent-supply = <&pm8941_s1>;
+ regulator-min-microvolt = <1225000>;
+ regulator-max-microvolt = <1225000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ pm8941_l4: regulator@4300 {
+ parent-supply = <&pm8941_s1>;
+ regulator-min-microvolt = <1225000>;
+ regulator-max-microvolt = <1225000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ pm8941_l6: regulator@4500 {
+ parent-supply = <&pm8941_s2>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ pm8941_l8: regulator@4700 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ pm8941_l9: regulator@4800 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2950000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ pm8941_l10: regulator@4900 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2950000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ pm8941_l11: regulator@4a00 {
+ parent-supply = <&pm8941_s1>;
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1300000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ regulator@4b00 {
+ parent-supply = <&pm8941_s2>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ regulator-name = "8941_l12_local";
+ regulator-always-on;
+ qcom,system-load = <100000>;
+ };
+
+ pm8941_l13: regulator@4c00 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2950000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ pm8941_l14: regulator@4d00 {
+ parent-supply = <&pm8941_s2>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ pm8941_l15: regulator@4e00 {
+ parent-supply = <&pm8941_s2>;
+ regulator-min-microvolt = <2050000>;
+ regulator-max-microvolt = <2050000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ pm8941_l16: regulator@4f00 {
+ regulator-min-microvolt = <2700000>;
+ regulator-max-microvolt = <2700000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ pm8941_l17: regulator@5000 {
+ regulator-min-microvolt = <2850000>;
+ regulator-max-microvolt = <2850000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ pm8941_l18: regulator@5100 {
+ regulator-min-microvolt = <2850000>;
+ regulator-max-microvolt = <2850000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ pm8941_l19: regulator@5200 {
+ regulator-min-microvolt = <2900000>;
+ regulator-max-microvolt = <2900000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ pm8941_l20: regulator@5300 {
+ regulator-min-microvolt = <2950000>;
+ regulator-max-microvolt = <2950000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ pm8941_l21: regulator@5400 {
+ regulator-min-microvolt = <2950000>;
+ regulator-max-microvolt = <2950000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ pm8941_l22: regulator@5500 {
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ pm8941_l23: regulator@5600 {
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ pm8941_l24: regulator@5700 {
+ regulator-min-microvolt = <3075000>;
+ regulator-max-microvolt = <3075000>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ pm8941_lvs1: regulator@8000 {
+ parent-supply = <&pm8941_s3>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ pm8941_lvs2: regulator@8100 {
+ parent-supply = <&pm8941_s3>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
+ pm8941_lvs3: regulator@8200 {
+ parent-supply = <&pm8941_s3>;
+ qcom,enable-time = <200>;
+ qcom,pull-down-enable = <1>;
+ status = "okay";
+ };
+
pm8941_mvs1: regulator@8300 {
parent-supply = <&pm8941_boost>;
qcom,enable-time = <200>;
@@ -41,34 +276,40 @@
qcom,pm8841@5 {
- pm8841_s5: regulator@2000 {
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1100000>;
+ regulator@1400 {
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
+ qcom,enable-time = <500>;
+ qcom,pull-down-enable = <1>;
+ regulator-always-on;
+ status = "okay";
+ regulator-name = "8841_s1_local";
+ qcom,system-load = <100000>;
+ };
+
+ regulator@1700 {
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
+ qcom,enable-time = <500>;
+ qcom,pull-down-enable = <1>;
+ regulator-always-on;
+ regulator-name = "8841_s2_local";
+ qcom,system-load = <100000>;
+ status = "okay";
+ };
+
+ pm8841_s3: regulator@1a00 {
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
qcom,enable-time = <500>;
qcom,pull-down-enable = <1>;
regulator-always-on;
status = "okay";
};
- pm8841_s6: regulator@2300 {
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1100000>;
- qcom,enable-time = <500>;
- qcom,pull-down-enable = <1>;
- status = "okay";
- };
-
- pm8841_s7: regulator@2600 {
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1100000>;
- qcom,enable-time = <500>;
- qcom,pull-down-enable = <1>;
- status = "okay";
- };
-
- pm8841_s8: regulator@2900 {
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1100000>;
+ pm8841_s4: regulator@1d00 {
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
qcom,enable-time = <500>;
qcom,pull-down-enable = <1>;
status = "okay";
@@ -76,7 +317,6 @@
};
};
-
/* RPM controlled regulators: */
&rpm_bus {
@@ -124,39 +364,6 @@
};
};
- rpm-regulator-smpb3 {
- status = "okay";
- pm8841_s3: regulator-s3 {
- regulator-min-microvolt = <1050000>;
- regulator-max-microvolt = <1050000>;
- qcom,init-voltage = <1050000>;
- status = "okay";
- };
- };
-
- rpm-regulator-smpb4 {
- status = "okay";
- pm8841_s4: regulator-s4 {
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- qcom,init-voltage = <900000>;
- status = "okay";
- };
- };
-
- rpm-regulator-smpa1 {
- status = "okay";
- pm8941_s1: regulator-s1 {
- regulator-min-microvolt = <1300000>;
- regulator-max-microvolt = <1300000>;
- qcom,init-voltage = <1300000>;
- qcom,init-current = <100>;
- qcom,system-load = <100000>;
- regulator-always-on;
- status = "okay";
- };
- };
-
rpm-regulator-smpa2 {
status = "okay";
qcom,allow-atomic = <1>;
@@ -176,140 +383,6 @@
};
};
- rpm-regulator-smpa3 {
- status = "okay";
- pm8941_s3: regulator-s3 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- qcom,init-voltage = <1800000>;
- qcom,init-current = <100>;
- qcom,system-load = <100000>;
- regulator-always-on;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa1 {
- status = "okay";
- pm8941_l1: regulator-l1 {
- parent-supply = <&pm8941_s1>;
- regulator-min-microvolt = <1225000>;
- regulator-max-microvolt = <1225000>;
- qcom,init-voltage = <1225000>;
- qcom,init-current = <10>;
- qcom,system-load = <10000>;
- regulator-always-on;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa2 {
- status = "okay";
- pm8941_l2: regulator-l2 {
- parent-supply = <&pm8941_s3>;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- qcom,init-voltage = <1200000>;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa3 {
- status = "okay";
- pm8941_l3: regulator-l3 {
- parent-supply = <&pm8941_s1>;
- regulator-min-microvolt = <1225000>;
- regulator-max-microvolt = <1225000>;
- qcom,init-voltage = <1225000>;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa4 {
- status = "okay";
- pm8941_l4: regulator-l4 {
- parent-supply = <&pm8941_s1>;
- regulator-min-microvolt = <12250000>;
- regulator-max-microvolt = <12250000>;
- qcom,init-voltage = <12250000>;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa5 {
- status = "okay";
- pm8941_l5: regulator-l5 {
- parent-supply = <&pm8941_s2>;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- qcom,init-voltage = <1800000>;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa6 {
- status = "okay";
- pm8941_l6: regulator-l6 {
- parent-supply = <&pm8941_s2>;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- qcom,init-voltage = <1800000>;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa7 {
- status = "okay";
- pm8941_l7: regulator-l7 {
- parent-supply = <&pm8941_s2>;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- qcom,init-voltage = <1800000>;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa8 {
- status = "okay";
- pm8941_l8: regulator-l8 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- qcom,init-voltage = <1800000>;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa9 {
- status = "okay";
- pm8941_l9: regulator-l9 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2950000>;
- qcom,init-voltage = <2950000>;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa10 {
- status = "okay";
- pm8941_l10: regulator-l10 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2950000>;
- qcom,init-voltage = <2950000>;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa11 {
- status = "okay";
- pm8941_l11: regulator-l11 {
- parent-supply = <&pm8941_s1>;
- regulator-min-microvolt = <1300000>;
- regulator-max-microvolt = <1300000>;
- qcom,init-voltage = <1300000>;
- status = "okay";
- };
- };
-
rpm-regulator-ldoa12 {
status = "okay";
qcom,allow-atomic = <1>;
@@ -329,152 +402,6 @@
compatible = "qcom,rpm-regulator-smd";
};
};
-
- rpm-regulator-ldoa13 {
- status = "okay";
- pm8941_l13: regulator-l13 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2950000>;
- qcom,init-voltage = <2950000>;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa14 {
- status = "okay";
- pm8941_l14: regulator-l14 {
- parent-supply = <&pm8941_s2>;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- qcom,init-voltage = <1800000>;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa15 {
- status = "okay";
- pm8941_l15: regulator-l15 {
- parent-supply = <&pm8941_s2>;
- regulator-min-microvolt = <2050000>;
- regulator-max-microvolt = <2050000>;
- qcom,init-voltage = <2050000>;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa16 {
- status = "okay";
- pm8941_l16: regulator-l16 {
- regulator-min-microvolt = <2700000>;
- regulator-max-microvolt = <2700000>;
- qcom,init-voltage = <2700000>;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa17 {
- status = "okay";
- pm8941_l17: regulator-l17 {
- regulator-min-microvolt = <2850000>;
- regulator-max-microvolt = <2850000>;
- qcom,init-voltage = <2850000>;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa18 {
- status = "okay";
- pm8941_l18: regulator-l18 {
- regulator-min-microvolt = <2850000>;
- regulator-max-microvolt = <2850000>;
- qcom,init-voltage = <2850000>;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa19 {
- status = "okay";
- pm8941_l19: regulator-l19 {
- regulator-min-microvolt = <2900000>;
- regulator-max-microvolt = <2900000>;
- qcom,init-voltage = <2900000>;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa20 {
- status = "okay";
- pm8941_l20: regulator-l20 {
- regulator-min-microvolt = <2950000>;
- regulator-max-microvolt = <2950000>;
- qcom,init-voltage = <2950000>;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa21 {
- status = "okay";
- pm8941_l21: regulator-l21 {
- regulator-min-microvolt = <2950000>;
- regulator-max-microvolt = <2950000>;
- qcom,init-voltage = <2950000>;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa22 {
- status = "okay";
- pm8941_l22: regulator-l22 {
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- qcom,init-voltage = <3000000>;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa23 {
- status = "okay";
- pm8941_l23: regulator-l23 {
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- qcom,init-voltage = <3000000>;
- status = "okay";
- };
- };
-
- rpm-regulator-ldoa24 {
- status = "okay";
- pm8941_l24: regulator-l24 {
- regulator-min-microvolt = <3075000>;
- regulator-max-microvolt = <3075000>;
- qcom,init-voltage = <3075000>;
- status = "okay";
- };
- };
-
- rpm-regulator-vsa1 {
- status = "okay";
- pm8941_lvs1: regulator-lvs1 {
- parent-supply = <&pm8941_s3>;
- status = "okay";
- };
- };
-
- rpm-regulator-vsa2 {
- status = "okay";
- pm8941_lvs2: regulator-lvs2 {
- parent-supply = <&pm8941_s3>;
- status = "okay";
- };
- };
-
- rpm-regulator-vsa3 {
- status = "okay";
- pm8941_lvs3: regulator-lvs3 {
- parent-supply = <&pm8941_s3>;
- status = "okay";
- };
- };
};
/ {
diff --git a/arch/arm/boot/dts/msm8974.dtsi b/arch/arm/boot/dts/msm8974.dtsi
index e3dad4f..f9efec5 100644
--- a/arch/arm/boot/dts/msm8974.dtsi
+++ b/arch/arm/boot/dts/msm8974.dtsi
@@ -33,10 +33,11 @@
msmgpio: gpio@fd510000 {
compatible = "qcom,msm-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
reg = <0xfd510000 0x4000>;
- #gpio-cells = <2>;
};
timer {
@@ -73,6 +74,13 @@
status = "disabled";
};
+ serial@f991e000 {
+ compatible = "qcom,msm-lsuart-v14";
+ reg = <0xf991e000 0x1000>;
+ interrupts = <0 108 0>;
+ status = "disabled";
+ };
+
usb@f9a55000 {
compatible = "qcom,hsusb-otg";
reg = <0xf9a55000 0x400>;
@@ -220,6 +228,53 @@
interrupt-names = "slimbus_irq", "slimbus_bam_irq";
qcom,min-clk-gear = <10>;
qcom,rxreg-access;
+
+ taiko_codec {
+ compatible = "qcom,taiko-slim-pgd";
+ elemental-addr = [00 01 A0 00 17 02];
+
+ qcom,cdc-reset-gpio = <&msmgpio 63 0>;
+
+ cdc-vdd-buck-supply = <&pm8941_s2>;
+ qcom,cdc-vdd-buck-voltage = <2150000 2150000>;
+ qcom,cdc-vdd-buck-current = <650000>;
+
+ cdc-vdd-tx-h-supply = <&pm8941_s3>;
+ qcom,cdc-vdd-tx-h-voltage = <1800000 1800000>;
+ qcom,cdc-vdd-tx-h-current = <25000>;
+
+ cdc-vdd-rx-h-supply = <&pm8941_s3>;
+ qcom,cdc-vdd-rx-h-voltage = <1800000 1800000>;
+ qcom,cdc-vdd-rx-h-current = <25000>;
+
+ cdc-vddpx-1-supply = <&pm8941_s3>;
+ qcom,cdc-vddpx-1-voltage = <1800000 1800000>;
+ qcom,cdc-vddpx-1-current = <10000>;
+
+ cdc-vdd-a-1p2v-supply = <&pm8941_l1>;
+ qcom,cdc-vdd-a-1p2v-voltage = <1225000 1225000>;
+ qcom,cdc-vdd-a-1p2v-current = <10000>;
+
+ cdc-vddcx-1-supply = <&pm8941_l1>;
+ qcom,cdc-vddcx-1-voltage = <1225000 1225000>;
+ qcom,cdc-vddcx-1-current = <10000>;
+
+ cdc-vddcx-2-supply = <&pm8941_l1>;
+ qcom,cdc-vddcx-2-voltage = <1225000 1225000>;
+ qcom,cdc-vddcx-2-current = <10000>;
+
+ qcom,cdc-micbias-ldoh-v = <0x3>;
+ qcom,cdc-micbias-cfilt1-mv = <1800>;
+ qcom,cdc-micbias-cfilt2-mv = <2700>;
+ qcom,cdc-micbias-cfilt3-mv = <1800>;
+ qcom,cdc-micbias1-cfilt-sel = <0x0>;
+ qcom,cdc-micbias2-cfilt-sel = <0x1>;
+ qcom,cdc-micbias3-cfilt-sel = <0x2>;
+ qcom,cdc-micbias4-cfilt-sel = <0x2>;
+
+ qcom,cdc-slim-ifd = "taiko-slim-ifd";
+ qcom,cdc-slim-ifd-elemental-addr = [00 00 A0 00 17 02];
+ };
};
spmi_bus: qcom,spmi@fc4c0000 {
@@ -467,7 +522,8 @@
reg = <0xfc880000 0x100>,
<0xfd485000 0x400>,
<0xfc820000 0x020>,
- <0xfc401680 0x004>;
+ <0xfc401680 0x004>,
+ <0xfc980008 0x004>;
vdd_mss-supply = <&pm8841_s3>;
qcom,firmware-name = "mba";
diff --git a/arch/arm/boot/dts/msm9625.dts b/arch/arm/boot/dts/msm9625.dts
index deddc5f..42425ed 100644
--- a/arch/arm/boot/dts/msm9625.dts
+++ b/arch/arm/boot/dts/msm9625.dts
@@ -37,6 +37,8 @@
msmgpio: gpio@fd510000 {
compatible = "qcom,msm-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
reg = <0xfd510000 0x4000>;
diff --git a/arch/arm/configs/msm8974_defconfig b/arch/arm/configs/msm8974_defconfig
index 1a6c134..0949213 100644
--- a/arch/arm/configs/msm8974_defconfig
+++ b/arch/arm/configs/msm8974_defconfig
@@ -67,7 +67,6 @@
CONFIG_HIGHMEM=y
CONFIG_VMALLOC_RESERVE=0x19000000
CONFIG_USE_OF=y
-CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
@@ -131,6 +130,7 @@
CONFIG_SERIAL_MSM_HSL=y
CONFIG_SERIAL_MSM_HSL_CONSOLE=y
CONFIG_DIAG_CHAR=y
+CONFIG_HVC_DCC=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_MSM=y
CONFIG_DCC_TTY=y
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index ca3e996..7d26726 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -541,7 +541,8 @@
dump_stack();
pr_info("\nsending IPI to all other CPUs:\n");
- smp_cross_call(&backtrace_mask, IPI_CPU_BACKTRACE);
+ if (!cpus_empty(backtrace_mask))
+ smp_cross_call(&backtrace_mask, IPI_CPU_BACKTRACE);
/* Wait for up to 10 seconds for all other CPUs to do the backtrace */
for (i = 0; i < 10 * 1000; i++) {
diff --git a/arch/arm/mach-msm/board-8064.c b/arch/arm/mach-msm/board-8064.c
index 4b4e006..665b861 100644
--- a/arch/arm/mach-msm/board-8064.c
+++ b/arch/arm/mach-msm/board-8064.c
@@ -2913,6 +2913,7 @@
static void __init apq8064_common_init(void)
{
u32 platform_version;
+ platform_device_register(&msm_gpio_device);
msm_tsens_early_init(&apq_tsens_pdata);
msm_thermal_init(&msm_thermal_pdata);
if (socinfo_init() < 0)
diff --git a/arch/arm/mach-msm/board-8930.c b/arch/arm/mach-msm/board-8930.c
index 444580f..b80d62d 100644
--- a/arch/arm/mach-msm/board-8930.c
+++ b/arch/arm/mach-msm/board-8930.c
@@ -2572,6 +2572,7 @@
if (meminfo_init(SYS_MEMORY, SZ_256M) < 0)
pr_err("meminfo_init() failed!\n");
+ platform_device_register(&msm_gpio_device);
msm_tsens_early_init(&msm_tsens_pdata);
msm_thermal_init(&msm_thermal_pdata);
BUG_ON(msm_rpm_init(&msm8930_rpm_data));
diff --git a/arch/arm/mach-msm/board-8960.c b/arch/arm/mach-msm/board-8960.c
index 7d88ea6..ad788bc 100644
--- a/arch/arm/mach-msm/board-8960.c
+++ b/arch/arm/mach-msm/board-8960.c
@@ -3082,6 +3082,7 @@
if (meminfo_init(SYS_MEMORY, SZ_256M) < 0)
pr_err("meminfo_init() failed!\n");
+ platform_device_register(&msm_gpio_device);
msm_tsens_early_init(&msm_tsens_pdata);
msm_thermal_init(&msm_thermal_pdata);
BUG_ON(msm_rpm_init(&msm8960_rpm_data));
diff --git a/arch/arm/mach-msm/board-8974-gpiomux.c b/arch/arm/mach-msm/board-8974-gpiomux.c
index 6fcc779..bf80262 100644
--- a/arch/arm/mach-msm/board-8974-gpiomux.c
+++ b/arch/arm/mach-msm/board-8974-gpiomux.c
@@ -101,13 +101,13 @@
},
},
{
- .gpio = 45, /* BLSP8 UART TX */
+ .gpio = 4, /* BLSP2 UART TX */
.settings = {
[GPIOMUX_SUSPENDED] = &gpio_uart_config,
},
},
{
- .gpio = 46, /* BLSP8 UART RX */
+ .gpio = 5, /* BLSP2 UART RX */
.settings = {
[GPIOMUX_SUSPENDED] = &gpio_uart_config,
},
diff --git a/arch/arm/mach-msm/board-8974.c b/arch/arm/mach-msm/board-8974.c
index 1049bcb..ba8d7770 100644
--- a/arch/arm/mach-msm/board-8974.c
+++ b/arch/arm/mach-msm/board-8974.c
@@ -461,8 +461,6 @@
}
static struct of_dev_auxdata msm_8974_auxdata_lookup[] __initdata = {
- OF_DEV_AUXDATA("qcom,msm-lsuart-v14", 0xF991F000, \
- "msm_serial_hsl.0", NULL),
OF_DEV_AUXDATA("qcom,hsusb-otg", 0xF9A55000, \
"msm_otg", NULL),
OF_DEV_AUXDATA("qcom,dwc-usb3-msm", 0xF9200000, \
@@ -487,6 +485,34 @@
OF_DEV_AUXDATA("qcom,pil-mba", 0xFC820000, "pil-mba", NULL),
OF_DEV_AUXDATA("qcom,pil-pronto", 0xFB21B000, \
"pil_pronto", NULL),
+ OF_DEV_AUXDATA("arm,coresight-tmc", 0xFC322000, \
+ "coresight-tmc-etr", NULL),
+ OF_DEV_AUXDATA("arm,coresight-tpiu", 0xFC318000, \
+ "coresight-tpiu", NULL),
+ OF_DEV_AUXDATA("qcom,coresight-replicator", 0xFC31C000, \
+ "coresight-replicator", NULL),
+ OF_DEV_AUXDATA("arm,coresight-tmc", 0xFC307000, \
+ "coresight-tmc-etf", NULL),
+ OF_DEV_AUXDATA("arm,coresight-funnel", 0xFC31B000, \
+ "coresight-funnel-merg", NULL),
+ OF_DEV_AUXDATA("arm,coresight-funnel", 0xFC319000, \
+ "coresight-funnel-in0", NULL),
+ OF_DEV_AUXDATA("arm,coresight-funnel", 0xFC31A000, \
+ "coresight-funnel-in1", NULL),
+ OF_DEV_AUXDATA("arm,coresight-funnel", 0xFC345000, \
+ "coresight-funnel-kpss", NULL),
+ OF_DEV_AUXDATA("arm,coresight-funnel", 0xFC364000, \
+ "coresight-funnel-mmss", NULL),
+ OF_DEV_AUXDATA("arm,coresight-stm", 0xFC321000, \
+ "coresight-stm", NULL),
+ OF_DEV_AUXDATA("arm,coresight-etm", 0xFC33C000, \
+ "coresight-etm0", NULL),
+ OF_DEV_AUXDATA("arm,coresight-etm", 0xFC33D000, \
+ "coresight-etm1", NULL),
+ OF_DEV_AUXDATA("arm,coresight-etm", 0xFC33E000, \
+ "coresight-etm2", NULL),
+ OF_DEV_AUXDATA("arm,coresight-etm", 0xFC33F000, \
+ "coresight-etm3", NULL),
OF_DEV_AUXDATA("qcom,msm-rng", 0xF9BFF000, \
"msm_rng", NULL),
OF_DEV_AUXDATA("qcom,qseecom", 0xFE806000, \
diff --git a/arch/arm/mach-msm/board-9615.c b/arch/arm/mach-msm/board-9615.c
index a312e2b..f885774 100644
--- a/arch/arm/mach-msm/board-9615.c
+++ b/arch/arm/mach-msm/board-9615.c
@@ -976,6 +976,7 @@
msm_android_usb_hsic_device.dev.platform_data;
msm9615_device_init();
+ platform_device_register(&msm_gpio_device);
msm9615_init_gpiomux();
msm9615_i2c_init();
regulator_suppress_info_printing();
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 50b1ac5..38f1170 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -10213,6 +10213,7 @@
#endif
pmic_reset_irq = PM8058_IRQ_BASE + PM8058_RESOUT_IRQ;
+ platform_device_register(&msm_gpio_device);
/*
* Initialize RPM first as other drivers and devices may need
* it for their initialization.
diff --git a/arch/arm/mach-msm/clock-8974.c b/arch/arm/mach-msm/clock-8974.c
index b0ee250..0db82e9 100644
--- a/arch/arm/mach-msm/clock-8974.c
+++ b/arch/arm/mach-msm/clock-8974.c
@@ -18,6 +18,7 @@
#include <linux/spinlock.h>
#include <linux/delay.h>
#include <linux/clk.h>
+#include <linux/iopoll.h>
#include <mach/clk.h>
#include <mach/rpm-regulator-smd.h>
@@ -383,6 +384,7 @@
#define GP1_CBCR 0x1900
#define GP2_CBCR 0x1940
#define GP3_CBCR 0x1980
+#define AUDIO_CORE_GDSCR 0x7000
#define AUDIO_CORE_LPAIF_CODEC_SPKR_OSR_CBCR 0xA014
#define AUDIO_CORE_LPAIF_CODEC_SPKR_IBIT_CBCR 0xA018
#define AUDIO_CORE_LPAIF_CODEC_SPKR_EBIT_CBCR 0xA01C
@@ -485,6 +487,7 @@
#define OCMEMNOC_CBCR 0x50B4
#define LPASS_Q6SS_AHB_LFABIF_CBCR 0x22000
#define LPASS_Q6SS_XO_CBCR 0x26000
+#define Q6SS_AHBM_CBCR 0x22004
#define MSS_XO_Q6_CBCR 0x108C
#define MSS_BUS_Q6_CBCR 0x10A4
#define MSS_CFG_AHB_CBCR 0x0280
@@ -3758,8 +3761,7 @@
static struct branch_clk mmss_mmssnoc_axi_clk = {
.cbcr_reg = MMSS_MMSSNOC_AXI_CBCR,
.parent = &axi_clk_src.c,
- /* The bus driver needs set_rate to go through to the parent */
- .has_sibling = 0,
+ .has_sibling = 1,
.base = &virt_bases[MMSS_BASE],
.c = {
.dbg_name = "mmss_mmssnoc_axi_clk",
@@ -3771,12 +3773,14 @@
static struct branch_clk mmss_s0_axi_clk = {
.cbcr_reg = MMSS_S0_AXI_CBCR,
.parent = &axi_clk_src.c,
- .has_sibling = 1,
+ /* The bus driver needs set_rate to go through to the parent */
+ .has_sibling = 0,
.base = &virt_bases[MMSS_BASE],
.c = {
.dbg_name = "mmss_s0_axi_clk",
.ops = &clk_ops_branch,
CLK_INIT(mmss_s0_axi_clk.c),
+ .depends = &mmss_mmssnoc_axi_clk.c,
},
};
@@ -4315,6 +4319,17 @@
},
};
+static struct branch_clk q6ss_ahbm_clk = {
+ .cbcr_reg = Q6SS_AHBM_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[LPASS_BASE],
+ .c = {
+ .dbg_name = "q6ss_ahbm_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(q6ss_ahbm_clk.c),
+ },
+};
+
static struct branch_clk mss_xo_q6_clk = {
.cbcr_reg = MSS_XO_Q6_CBCR,
.bcr_reg = MSS_Q6SS_BCR,
@@ -4505,6 +4520,7 @@
{&audio_core_slimbus_lfabif_clk.c, LPASS_BASE, 0x003e},
{&q6ss_xo_clk.c, LPASS_BASE, 0x002b},
{&q6ss_ahb_lfabif_clk.c, LPASS_BASE, 0x001e},
+ {&q6ss_ahbm_clk.c, LPASS_BASE, 0x001d},
{&mss_bus_q6_clk.c, MSS_BASE, 0x003c},
{&mss_xo_q6_clk.c, MSS_BASE, 0x0007},
@@ -4722,8 +4738,8 @@
CLK_LOOKUP("bus_clk", pnoc_sdcc4_clk.c, "msm_sdcc.4"),
CLK_DUMMY("xo", XO_CLK, NULL, OFF),
CLK_DUMMY("xo", XO_CLK, "pil_pronto", OFF),
- CLK_DUMMY("core_clk", BLSP2_UART_CLK, "msm_serial_hsl.0", OFF),
- CLK_DUMMY("iface_clk", BLSP2_UART_CLK, "msm_serial_hsl.0", OFF),
+ CLK_DUMMY("core_clk", BLSP2_UART_CLK, "f991f000.serial", OFF),
+ CLK_DUMMY("iface_clk", BLSP2_UART_CLK, "f991f000.serial", OFF),
CLK_DUMMY("core_clk", SDC1_CLK, NULL, OFF),
CLK_DUMMY("iface_clk", SDC1_P_CLK, NULL, OFF),
CLK_DUMMY("core_clk", SDC3_CLK, NULL, OFF),
@@ -4757,7 +4773,8 @@
CLK_LOOKUP("measure", measure_clk.c, "debug"),
CLK_LOOKUP("dma_bam_pclk", gcc_bam_dma_ahb_clk.c, "msm_sps"),
- CLK_LOOKUP("iface_clk", gcc_blsp1_ahb_clk.c, "msm_serial_hsl.0"),
+ CLK_LOOKUP("iface_clk", gcc_blsp1_ahb_clk.c, "f991f000.serial"),
+ CLK_LOOKUP("iface_clk", gcc_blsp1_ahb_clk.c, "f991e000.serial"),
CLK_LOOKUP("iface_clk", gcc_blsp1_ahb_clk.c, "spi_qsd.1"),
CLK_LOOKUP("core_clk", gcc_blsp1_qup1_i2c_apps_clk.c, ""),
CLK_LOOKUP("core_clk", gcc_blsp1_qup1_spi_apps_clk.c, ""),
@@ -4772,8 +4789,8 @@
CLK_LOOKUP("core_clk", gcc_blsp1_qup6_i2c_apps_clk.c, ""),
CLK_LOOKUP("core_clk", gcc_blsp1_qup6_spi_apps_clk.c, ""),
CLK_LOOKUP("core_clk", gcc_blsp1_uart1_apps_clk.c, ""),
- CLK_LOOKUP("core_clk", gcc_blsp1_uart2_apps_clk.c, ""),
- CLK_LOOKUP("core_clk", gcc_blsp1_uart3_apps_clk.c, "msm_serial_hsl.0"),
+ CLK_LOOKUP("core_clk", gcc_blsp1_uart2_apps_clk.c, "f991e000.serial"),
+ CLK_LOOKUP("core_clk", gcc_blsp1_uart3_apps_clk.c, "f991f000.serial"),
CLK_LOOKUP("core_clk", gcc_blsp1_uart4_apps_clk.c, ""),
CLK_LOOKUP("core_clk", gcc_blsp1_uart5_apps_clk.c, ""),
CLK_LOOKUP("core_clk", gcc_blsp1_uart6_apps_clk.c, ""),
@@ -4992,6 +5009,7 @@
CLK_LOOKUP("mem_clk", gcc_boot_rom_ahb_clk.c, "pil-q6v5-mss"),
CLK_LOOKUP("core_clk", q6ss_xo_clk.c, "pil-q6v5-lpass"),
CLK_LOOKUP("bus_clk", q6ss_ahb_lfabif_clk.c, "pil-q6v5-lpass"),
+ CLK_LOOKUP("reg_clk", q6ss_ahbm_clk.c, "pil-q6v5-lpass"),
CLK_LOOKUP("core_clk", gcc_prng_ahb_clk.c, "msm_rng"),
CLK_LOOKUP("dfab_clk", pnoc_sps_clk.c, "msm_sps"),
@@ -5021,8 +5039,8 @@
CLK_LOOKUP("ocmem_a_clk", ocmemgx_msmbus_a_clk.c, "msm_bus"),
CLK_LOOKUP("bus_clk", ocmemnoc_clk.c, "msm_ocmem_noc"),
CLK_LOOKUP("bus_a_clk", ocmemnoc_clk.c, "msm_ocmem_noc"),
- CLK_LOOKUP("bus_clk", mmss_mmssnoc_axi_clk.c, "msm_mmss_noc"),
- CLK_LOOKUP("bus_a_clk", mmss_mmssnoc_axi_clk.c, "msm_mmss_noc"),
+ CLK_LOOKUP("bus_clk", mmss_s0_axi_clk.c, "msm_mmss_noc"),
+ CLK_LOOKUP("bus_a_clk", mmss_s0_axi_clk.c, "msm_mmss_noc"),
CLK_LOOKUP("iface_clk", gcc_mmss_noc_cfg_ahb_clk.c, ""),
CLK_LOOKUP("iface_clk", gcc_ocmem_noc_cfg_ahb_clk.c, ""),
@@ -5220,9 +5238,24 @@
#define PLL_AUX_OUTPUT_BIT 1
#define PLL_AUX2_OUTPUT_BIT 2
+#define PWR_ON_MASK BIT(31)
+#define EN_REST_WAIT_MASK (0xF << 20)
+#define EN_FEW_WAIT_MASK (0xF << 16)
+#define CLK_DIS_WAIT_MASK (0xF << 12)
+#define SW_OVERRIDE_MASK BIT(2)
+#define HW_CONTROL_MASK BIT(1)
+#define SW_COLLAPSE_MASK BIT(0)
+
+/* Wait 2^n CXO cycles between all states. Here, n=2 (4 cycles). */
+#define EN_REST_WAIT_VAL (0x2 << 20)
+#define EN_FEW_WAIT_VAL (0x2 << 16)
+#define CLK_DIS_WAIT_VAL (0x2 << 12)
+#define GDSC_TIMEOUT_US 50000
+
static void __init reg_init(void)
{
- u32 regval;
+ u32 regval, status;
+ int ret;
if (!(readl_relaxed(GCC_REG_BASE(GPLL0_STATUS_REG))
& gpll0_clk_src.status_mask))
@@ -5252,6 +5285,31 @@
* register.
*/
writel_relaxed(0x0, GCC_REG_BASE(APCS_CLOCK_SLEEP_ENA_VOTE));
+
+ /*
+ * TODO: The following sequence enables the LPASS audio core GDSC.
+ * Remove when this becomes unnecessary.
+ */
+
+ /*
+ * Disable HW trigger: collapse/restore occur based on registers writes.
+ * Disable SW override: Use hardware state-machine for sequencing.
+ */
+ regval = readl_relaxed(LPASS_REG_BASE(AUDIO_CORE_GDSCR));
+ regval &= ~(HW_CONTROL_MASK | SW_OVERRIDE_MASK);
+
+ /* Configure wait time between states. */
+ regval &= ~(EN_REST_WAIT_MASK | EN_FEW_WAIT_MASK | CLK_DIS_WAIT_MASK);
+ regval |= EN_REST_WAIT_VAL | EN_FEW_WAIT_VAL | CLK_DIS_WAIT_VAL;
+ writel_relaxed(regval, LPASS_REG_BASE(AUDIO_CORE_GDSCR));
+
+ regval = readl_relaxed(LPASS_REG_BASE(AUDIO_CORE_GDSCR));
+ regval &= ~BIT(0);
+ writel_relaxed(regval, LPASS_REG_BASE(AUDIO_CORE_GDSCR));
+
+ ret = readl_poll_timeout(LPASS_REG_BASE(AUDIO_CORE_GDSCR), status,
+ status & PWR_ON_MASK, 50, GDSC_TIMEOUT_US);
+ WARN(ret, "LPASS Audio Core GDSC did not power on.\n");
}
static void __init msm8974_clock_post_init(void)
diff --git a/arch/arm/mach-msm/devices-8960.c b/arch/arm/mach-msm/devices-8960.c
index e07301a..680770e 100644
--- a/arch/arm/mach-msm/devices-8960.c
+++ b/arch/arm/mach-msm/devices-8960.c
@@ -4017,6 +4017,11 @@
},
};
+struct platform_device msm_gpio_device = {
+ .name = "msmgpio",
+ .id = -1,
+};
+
struct platform_device mdm_sglte_device = {
.name = "mdm2_modem",
.id = -1,
diff --git a/arch/arm/mach-msm/devices-9615.c b/arch/arm/mach-msm/devices-9615.c
index 9f03878..fff8e0d 100644
--- a/arch/arm/mach-msm/devices-9615.c
+++ b/arch/arm/mach-msm/devices-9615.c
@@ -1372,6 +1372,10 @@
},
};
+struct platform_device msm_gpio_device = {
+ .name = "msmgpio",
+ .id = -1,
+};
void __init msm9615_device_init(void)
{
@@ -1382,7 +1386,6 @@
msm_rpmrs_levels[0].latency_us;
msm_android_usb_hsic_pdata.swfi_latency =
msm_rpmrs_levels[0].latency_us;
-
}
#define MSM_SHARED_RAM_PHYS 0x40000000
diff --git a/arch/arm/mach-msm/devices-msm8x60.c b/arch/arm/mach-msm/devices-msm8x60.c
index 9ea817f..5402251 100644
--- a/arch/arm/mach-msm/devices-msm8x60.c
+++ b/arch/arm/mach-msm/devices-msm8x60.c
@@ -100,6 +100,11 @@
#define MSM_UART9DM_PHYS (MSM_GSBI9_PHYS + 0x40000)
#define INT_UART9DM_IRQ GSBI9_UARTDM_IRQ
+struct platform_device msm_gpio_device = {
+ .name = "msmgpio",
+ .id = -1,
+};
+
static void charm_ap2mdm_kpdpwr_on(void)
{
gpio_direction_output(AP2MDM_PMIC_RESET_N, 0);
diff --git a/arch/arm/mach-msm/devices.h b/arch/arm/mach-msm/devices.h
index 6726e60..8e2ab7d 100644
--- a/arch/arm/mach-msm/devices.h
+++ b/arch/arm/mach-msm/devices.h
@@ -436,3 +436,5 @@
extern struct platform_device msm8930aa_device_acpuclk;
extern struct platform_device msm8960_device_acpuclk;
extern struct platform_device msm9615_device_acpuclk;
+
+extern struct platform_device msm_gpio_device;
diff --git a/arch/arm/mach-msm/pil-q6v5-lpass.c b/arch/arm/mach-msm/pil-q6v5-lpass.c
index 311f8a7..99223f2 100644
--- a/arch/arm/mach-msm/pil-q6v5-lpass.c
+++ b/arch/arm/mach-msm/pil-q6v5-lpass.c
@@ -96,6 +96,10 @@
desc->owner = THIS_MODULE;
desc->proxy_timeout = PROXY_TIMEOUT_MS;
+ drv->ss_clk = devm_clk_get(&pdev->dev, "reg_clk");
+ if (IS_ERR(drv->ss_clk))
+ return PTR_ERR(drv->ss_clk);
+
drv->pil = msm_pil_register(desc);
if (IS_ERR(drv->pil))
return PTR_ERR(drv->pil);
diff --git a/arch/arm/mach-msm/pil-q6v5-mss.c b/arch/arm/mach-msm/pil-q6v5-mss.c
index 5c9c3c4..56be717 100644
--- a/arch/arm/mach-msm/pil-q6v5-mss.c
+++ b/arch/arm/mach-msm/pil-q6v5-mss.c
@@ -38,6 +38,9 @@
#define MSS_MODEM_HALT_BASE 0x200
#define MSS_NC_HALT_BASE 0x280
+/* MSS_CLAMP_IO Register Value */
+#define MSS_IO_UNCLAMP_ALL 0x40
+
/* RMB Status Register Values */
#define STATUS_PBL_SUCCESS 0x1
#define STATUS_XPU_UNLOCKED 0x1
@@ -166,6 +169,9 @@
drv->reg_base + QDSP6SS_RST_EVB);
}
+ /* De-assert MSS IO clamps */
+ writel_relaxed(MSS_IO_UNCLAMP_ALL, drv->io_clamp_reg);
+
ret = pil_q6v5_reset(pil);
if (ret)
goto err_q6v5_reset;
@@ -233,6 +239,12 @@
if (!drv->restart_reg)
return -ENOMEM;
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 4);
+ drv->io_clamp_reg = devm_ioremap(&pdev->dev, res->start,
+ resource_size(res));
+ if (!drv->io_clamp_reg)
+ return -ENOMEM;
+
drv->vreg = devm_regulator_get(&pdev->dev, "vdd_mss");
if (IS_ERR(drv->vreg))
return PTR_ERR(drv->vreg);
@@ -247,9 +259,9 @@
return ret;
}
- drv->mem_clk = devm_clk_get(&pdev->dev, "mem_clk");
- if (IS_ERR(drv->mem_clk))
- return PTR_ERR(drv->mem_clk);
+ drv->ss_clk = devm_clk_get(&pdev->dev, "mem_clk");
+ if (IS_ERR(drv->ss_clk))
+ return PTR_ERR(drv->ss_clk);
drv->pil = msm_pil_register(desc);
if (IS_ERR(drv->pil))
diff --git a/arch/arm/mach-msm/pil-q6v5.c b/arch/arm/mach-msm/pil-q6v5.c
index d6ad2aa3..d8d23c0 100644
--- a/arch/arm/mach-msm/pil-q6v5.c
+++ b/arch/arm/mach-msm/pil-q6v5.c
@@ -117,30 +117,30 @@
struct q6v5_data *drv = dev_get_drvdata(pil->dev);
int ret;
+ ret = clk_prepare_enable(drv->bus_clk);
+ if (ret)
+ goto err_bus_clk;
+ if (drv->ss_clk) {
+ ret = clk_prepare_enable(drv->ss_clk);
+ if (ret)
+ goto err_ss_clk;
+ }
ret = clk_reset(drv->core_clk, CLK_RESET_DEASSERT);
if (ret)
goto err_reset;
ret = clk_prepare_enable(drv->core_clk);
if (ret)
goto err_core_clk;
- ret = clk_prepare_enable(drv->bus_clk);
- if (ret)
- goto err_bus_clk;
- if (drv->mem_clk) {
- ret = clk_prepare_enable(drv->mem_clk);
- if (ret)
- goto err_mem_clk;
- }
return 0;
-err_mem_clk:
- clk_disable_unprepare(drv->bus_clk);
-err_bus_clk:
- clk_disable_unprepare(drv->core_clk);
err_core_clk:
clk_reset(drv->core_clk, CLK_RESET_ASSERT);
err_reset:
+ clk_disable_unprepare(drv->ss_clk);
+err_ss_clk:
+ clk_disable_unprepare(drv->bus_clk);
+err_bus_clk:
return ret;
}
EXPORT_SYMBOL(pil_q6v5_enable_clks);
@@ -149,10 +149,10 @@
{
struct q6v5_data *drv = dev_get_drvdata(pil->dev);
- clk_disable_unprepare(drv->bus_clk);
clk_disable_unprepare(drv->core_clk);
- clk_disable_unprepare(drv->mem_clk);
clk_reset(drv->core_clk, CLK_RESET_ASSERT);
+ clk_disable_unprepare(drv->ss_clk);
+ clk_disable_unprepare(drv->bus_clk);
}
EXPORT_SYMBOL(pil_q6v5_disable_clks);
diff --git a/arch/arm/mach-msm/pil-q6v5.h b/arch/arm/mach-msm/pil-q6v5.h
index e0d7a20..6985360 100644
--- a/arch/arm/mach-msm/pil-q6v5.h
+++ b/arch/arm/mach-msm/pil-q6v5.h
@@ -24,10 +24,11 @@
struct clk *xo;
struct clk *bus_clk;
struct clk *core_clk;
- struct clk *mem_clk;
+ struct clk *ss_clk;
void __iomem *axi_halt_base;
void __iomem *rmb_base;
void __iomem *restart_reg;
+ void __iomem *io_clamp_reg;
unsigned long start_addr;
struct regulator *vreg;
bool is_booted;
diff --git a/arch/arm/mach-msm/pil-venus.c b/arch/arm/mach-msm/pil-venus.c
index 6a0aeaa..49c39ec 100644
--- a/arch/arm/mach-msm/pil-venus.c
+++ b/arch/arm/mach-msm/pil-venus.c
@@ -228,12 +228,6 @@
writel_relaxed(drv->fw_sz, wrapper_base +
VENUS_WRAPPER_VBIF_SS_SEC_FW_END_ADDR);
- rc = iommu_attach_device(drv->iommu_fw_domain, drv->iommu_fw_ctx);
- if (rc) {
- dev_err(pil->dev, "venus fw iommu attach failed\n");
- goto err_iommu_attach;
- }
-
/* Enable all Venus internal clocks */
writel_relaxed(0, wrapper_base + VENUS_WRAPPER_CLOCK_CONFIG);
writel_relaxed(0, wrapper_base + VENUS_WRAPPER_CPU_CLOCK_CONFIG);
@@ -247,6 +241,12 @@
*/
udelay(1);
+ rc = iommu_attach_device(drv->iommu_fw_domain, drv->iommu_fw_ctx);
+ if (rc) {
+ dev_err(pil->dev, "venus fw iommu attach failed\n");
+ goto err_iommu_attach;
+ }
+
/* Map virtual addr space 0 - fw_sz to firmware physical addr space */
rc = msm_iommu_map_contig_buffer(pa, drv->venus_domain_num, 0,
drv->fw_sz, SZ_4K, 0, &iova);
@@ -285,19 +285,6 @@
venus_clock_prepare_enable(pil->dev);
- /* Halt AXI and AXI OCMEM VBIF Access */
- reg = readl_relaxed(vbif_base + VENUS_VBIF_AXI_HALT_CTRL0);
- reg |= VENUS_VBIF_AXI_HALT_CTRL0_HALT_REQ;
- writel_relaxed(reg, vbif_base + VENUS_VBIF_AXI_HALT_CTRL0);
-
- /* Request for AXI bus port halt */
- rc = readl_poll_timeout(vbif_base + VENUS_VBIF_AXI_HALT_CTRL1,
- reg, reg & VENUS_VBIF_AXI_HALT_CTRL1_HALT_ACK,
- POLL_INTERVAL_US,
- VENUS_VBIF_AXI_HALT_ACK_TIMEOUT_US);
- if (rc)
- dev_err(pil->dev, "Port halt timeout\n");
-
/* Assert the reset to ARM9 */
reg = readl_relaxed(wrapper_base + VENUS_WRAPPER_SW_RESET);
reg |= BIT(4);
@@ -311,6 +298,19 @@
iommu_detach_device(drv->iommu_fw_domain, drv->iommu_fw_ctx);
+ /* Halt AXI and AXI OCMEM VBIF Access */
+ reg = readl_relaxed(vbif_base + VENUS_VBIF_AXI_HALT_CTRL0);
+ reg |= VENUS_VBIF_AXI_HALT_CTRL0_HALT_REQ;
+ writel_relaxed(reg, vbif_base + VENUS_VBIF_AXI_HALT_CTRL0);
+
+ /* Request for AXI bus port halt */
+ rc = readl_poll_timeout(vbif_base + VENUS_VBIF_AXI_HALT_CTRL1,
+ reg, reg & VENUS_VBIF_AXI_HALT_CTRL1_HALT_ACK,
+ POLL_INTERVAL_US,
+ VENUS_VBIF_AXI_HALT_ACK_TIMEOUT_US);
+ if (rc)
+ dev_err(pil->dev, "Port halt timeout\n");
+
venus_clock_disable_unprepare(pil->dev);
regulator_disable(drv->gdsc);
diff --git a/drivers/char/msm_rotator.c b/drivers/char/msm_rotator.c
index 4d34362..6f3b79b 100644
--- a/drivers/char/msm_rotator.c
+++ b/drivers/char/msm_rotator.c
@@ -421,6 +421,7 @@
break;
case MDP_Y_CRCB_H2V1:
case MDP_Y_CBCR_H2V1:
+ case MDP_Y_CRCB_H1V2:
p->num_planes = 2;
p->plane_size[0] = w * h;
p->plane_size[1] = w * h;
@@ -651,9 +652,12 @@
int bpp;
uint32_t dst_format;
- if (info->src.format == MDP_YCRYCB_H2V1)
- dst_format = MDP_Y_CRCB_H2V1;
- else
+ if (info->src.format == MDP_YCRYCB_H2V1) {
+ if (info->rotations & MDP_ROT_90)
+ dst_format = MDP_Y_CRCB_H1V2;
+ else
+ dst_format = MDP_Y_CRCB_H2V1;
+ } else
return -EINVAL;
if (info->dst.format != dst_format)
@@ -1286,7 +1290,10 @@
info.dst.format = info.src.format;
break;
case MDP_YCRYCB_H2V1:
- info.dst.format = MDP_Y_CRCB_H2V1;
+ if (info.rotations & MDP_ROT_90)
+ info.dst.format = MDP_Y_CRCB_H1V2;
+ else
+ info.dst.format = MDP_Y_CRCB_H2V1;
break;
case MDP_Y_CB_CR_H2V2:
case MDP_Y_CBCR_H2V2_TILE:
diff --git a/drivers/coresight/Makefile b/drivers/coresight/Makefile
index 2ee2093..45450b0 100644
--- a/drivers/coresight/Makefile
+++ b/drivers/coresight/Makefile
@@ -1,2 +1,3 @@
-obj-$(CONFIG_MSM_QDSS) += coresight.o coresight-etb.o coresight-tpiu.o coresight-funnel.o coresight-stm.o coresight-etm.o
+obj-$(CONFIG_OF) += of_coresight.o
+obj-$(CONFIG_MSM_QDSS) += coresight.o coresight-tpiu.o coresight-etb.o coresight-funnel.o coresight-replicator.o coresight-stm.o coresight-etm.o
diff --git a/drivers/coresight/coresight-etb.c b/drivers/coresight/coresight-etb.c
index 30f4d0c..729329b 100644
--- a/drivers/coresight/coresight-etb.c
+++ b/drivers/coresight/coresight-etb.c
@@ -25,6 +25,7 @@
#include <linux/delay.h>
#include <linux/spinlock.h>
#include <linux/clk.h>
+#include <linux/of_coresight.h>
#include <linux/coresight.h>
#include "coresight-priv.h"
@@ -343,58 +344,49 @@
static int __devinit etb_probe(struct platform_device *pdev)
{
int ret;
+ struct device *dev = &pdev->dev;
+ struct coresight_platform_data *pdata;
struct etb_drvdata *drvdata;
struct resource *res;
struct coresight_desc *desc;
- drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
- if (!drvdata) {
- ret = -ENOMEM;
- goto err_kzalloc_drvdata;
+ if (pdev->dev.of_node) {
+ pdata = of_get_coresight_platform_data(dev, pdev->dev.of_node);
+ if (IS_ERR(pdata))
+ return PTR_ERR(pdata);
+ pdev->dev.platform_data = pdata;
}
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res) {
- ret = -EINVAL;
- goto err_res;
- }
- drvdata->base = ioremap_nocache(res->start, resource_size(res));
- if (!drvdata->base) {
- ret = -EINVAL;
- goto err_ioremap;
- }
+
+ drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
+ if (!drvdata)
+ return -ENOMEM;
drvdata->dev = &pdev->dev;
platform_set_drvdata(pdev, drvdata);
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res)
+ return -ENODEV;
+ drvdata->base = devm_ioremap(dev, res->start, resource_size(res));
+ if (!drvdata->base)
+ return -ENOMEM;
+
spin_lock_init(&drvdata->spinlock);
- drvdata->clk = clk_get(drvdata->dev, "core_clk");
- if (IS_ERR(drvdata->clk)) {
- ret = PTR_ERR(drvdata->clk);
- goto err_clk_get;
- }
-
+ drvdata->clk = devm_clk_get(dev, "core_clk");
+ if (IS_ERR(drvdata->clk))
+ return PTR_ERR(drvdata->clk);
ret = clk_set_rate(drvdata->clk, CORESIGHT_CLK_RATE_TRACE);
if (ret)
- goto err_clk_rate;
+ return ret;
- drvdata->buf = kzalloc(ETB_SIZE_WORDS * BYTES_PER_WORD, GFP_KERNEL);
- if (!drvdata->buf) {
- ret = -ENOMEM;
- goto err_kzalloc_buf;
- }
- drvdata->miscdev.name = ((struct coresight_platform_data *)
- (pdev->dev.platform_data))->name;
- drvdata->miscdev.minor = MISC_DYNAMIC_MINOR;
- drvdata->miscdev.fops = &etb_fops;
- ret = misc_register(&drvdata->miscdev);
- if (ret)
- goto err_misc_register;
+ drvdata->buf = devm_kzalloc(dev, ETB_SIZE_WORDS * BYTES_PER_WORD,
+ GFP_KERNEL);
+ if (!drvdata->buf)
+ return -ENOMEM;
- desc = kzalloc(sizeof(*desc), GFP_KERNEL);
- if (!desc) {
- ret = -ENOMEM;
- goto err_kzalloc_desc;
- }
+ desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
+ if (!desc)
+ return -ENOMEM;
desc->type = CORESIGHT_DEV_TYPE_SINK;
desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER;
desc->ops = &etb_cs_ops;
@@ -403,30 +395,21 @@
desc->groups = etb_attr_grps;
desc->owner = THIS_MODULE;
drvdata->csdev = coresight_register(desc);
- if (IS_ERR(drvdata->csdev)) {
- ret = PTR_ERR(drvdata->csdev);
- goto err_coresight_register;
- }
- kfree(desc);
+ if (IS_ERR(drvdata->csdev))
+ return PTR_ERR(drvdata->csdev);
- dev_info(drvdata->dev, "ETB initialized\n");
+ drvdata->miscdev.name = ((struct coresight_platform_data *)
+ (pdev->dev.platform_data))->name;
+ drvdata->miscdev.minor = MISC_DYNAMIC_MINOR;
+ drvdata->miscdev.fops = &etb_fops;
+ ret = misc_register(&drvdata->miscdev);
+ if (ret)
+ goto err;
+
+ dev_info(dev, "ETB initialized\n");
return 0;
-err_coresight_register:
- kfree(desc);
-err_kzalloc_desc:
- misc_deregister(&drvdata->miscdev);
-err_misc_register:
- kfree(drvdata->buf);
-err_kzalloc_buf:
-err_clk_rate:
- clk_put(drvdata->clk);
-err_clk_get:
- iounmap(drvdata->base);
-err_ioremap:
-err_res:
- kfree(drvdata);
-err_kzalloc_drvdata:
- dev_err(drvdata->dev, "ETB init failed\n");
+err:
+ coresight_unregister(drvdata->csdev);
return ret;
}
@@ -434,17 +417,13 @@
{
struct etb_drvdata *drvdata = platform_get_drvdata(pdev);
- coresight_unregister(drvdata->csdev);
misc_deregister(&drvdata->miscdev);
- kfree(drvdata->buf);
- clk_put(drvdata->clk);
- iounmap(drvdata->base);
- kfree(drvdata);
+ coresight_unregister(drvdata->csdev);
return 0;
}
static struct of_device_id etb_match[] = {
- {.compatible = "coresight-etb"},
+ {.compatible = "arm,coresight-etb"},
{}
};
diff --git a/drivers/coresight/coresight-etm.c b/drivers/coresight/coresight-etm.c
index 020e542..73a16e6 100644
--- a/drivers/coresight/coresight-etm.c
+++ b/drivers/coresight/coresight-etm.c
@@ -28,6 +28,7 @@
#include <linux/stat.h>
#include <linux/mutex.h>
#include <linux/clk.h>
+#include <linux/of_coresight.h>
#include <linux/coresight.h>
#include <asm/sections.h>
#include <mach/socinfo.h>
@@ -1505,59 +1506,62 @@
static int __devinit etm_probe(struct platform_device *pdev)
{
int ret;
+ struct device *dev = &pdev->dev;
+ struct coresight_platform_data *pdata;
struct etm_drvdata *drvdata;
struct resource *res;
static int etm_count;
struct coresight_desc *desc;
- drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
- if (!drvdata) {
- ret = -ENOMEM;
- goto err_kzalloc_drvdata;
+ if (pdev->dev.of_node) {
+ pdata = of_get_coresight_platform_data(dev, pdev->dev.of_node);
+ if (IS_ERR(pdata))
+ return PTR_ERR(pdata);
+ pdev->dev.platform_data = pdata;
}
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res) {
- ret = -EINVAL;
- goto err_res;
- }
- drvdata->base = ioremap_nocache(res->start, resource_size(res));
- if (!drvdata->base) {
- ret = -EINVAL;
- goto err_ioremap;
- }
+
+ drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
+ if (!drvdata)
+ return -ENOMEM;
drvdata->dev = &pdev->dev;
platform_set_drvdata(pdev, drvdata);
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res)
+ return -ENODEV;
+ drvdata->base = devm_ioremap(dev, res->start, resource_size(res));
+ if (!drvdata->base)
+ return -ENOMEM;
+
mutex_init(&drvdata->mutex);
wake_lock_init(&drvdata->wake_lock, WAKE_LOCK_SUSPEND, "coresight-etm");
pm_qos_add_request(&drvdata->qos_req, PM_QOS_CPU_DMA_LATENCY,
PM_QOS_DEFAULT_VALUE);
- drvdata->cpu = etm_count++;
- drvdata->clk = clk_get(drvdata->dev, "core_clk");
+ drvdata->clk = devm_clk_get(dev, "core_clk");
if (IS_ERR(drvdata->clk)) {
ret = PTR_ERR(drvdata->clk);
- goto err_clk_get;
+ goto err0;
}
-
ret = clk_set_rate(drvdata->clk, CORESIGHT_CLK_RATE_TRACE);
if (ret)
- goto err_clk_rate;
+ goto err0;
+
+ drvdata->cpu = etm_count++;
+
ret = clk_prepare_enable(drvdata->clk);
if (ret)
- goto err_clk_enable;
-
+ goto err0;
ret = etm_init_arch_data(drvdata);
if (ret)
- goto err_arch;
+ goto err1;
etm_init_default_data(drvdata);
-
clk_disable_unprepare(drvdata->clk);
- desc = kzalloc(sizeof(*desc), GFP_KERNEL);
+ desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
if (!desc) {
ret = -ENOMEM;
- goto err_kzalloc_desc;
+ goto err0;
}
desc->type = CORESIGHT_DEV_TYPE_SOURCE;
desc->subtype.source_subtype = CORESIGHT_DEV_SUBTYPE_SOURCE_PROC;
@@ -1569,34 +1573,21 @@
drvdata->csdev = coresight_register(desc);
if (IS_ERR(drvdata->csdev)) {
ret = PTR_ERR(drvdata->csdev);
- goto err_coresight_register;
+ goto err0;
}
- kfree(desc);
- dev_info(drvdata->dev, "ETM initialized\n");
+ dev_info(dev, "ETM initialized\n");
if (boot_enable)
coresight_enable(drvdata->csdev);
return 0;
-err_coresight_register:
- kfree(desc);
-err_kzalloc_desc:
-err_arch:
+err1:
clk_disable_unprepare(drvdata->clk);
-err_clk_enable:
-err_clk_rate:
- clk_put(drvdata->clk);
-err_clk_get:
+err0:
pm_qos_remove_request(&drvdata->qos_req);
wake_lock_destroy(&drvdata->wake_lock);
mutex_destroy(&drvdata->mutex);
- iounmap(drvdata->base);
-err_ioremap:
-err_res:
- kfree(drvdata);
-err_kzalloc_drvdata:
- dev_err(drvdata->dev, "ETM init failed\n");
return ret;
}
@@ -1605,17 +1596,14 @@
struct etm_drvdata *drvdata = platform_get_drvdata(pdev);
coresight_unregister(drvdata->csdev);
- clk_put(drvdata->clk);
pm_qos_remove_request(&drvdata->qos_req);
wake_lock_destroy(&drvdata->wake_lock);
mutex_destroy(&drvdata->mutex);
- iounmap(drvdata->base);
- kfree(drvdata);
return 0;
}
static struct of_device_id etm_match[] = {
- {.compatible = "coresight-etm"},
+ {.compatible = "arm,coresight-etm"},
{}
};
diff --git a/drivers/coresight/coresight-funnel.c b/drivers/coresight/coresight-funnel.c
index 333a07c..bf1df0b 100644
--- a/drivers/coresight/coresight-funnel.c
+++ b/drivers/coresight/coresight-funnel.c
@@ -20,6 +20,7 @@
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/clk.h>
+#include <linux/of_coresight.h>
#include <linux/coresight.h>
#include "coresight-priv.h"
@@ -172,43 +173,42 @@
static int __devinit funnel_probe(struct platform_device *pdev)
{
int ret;
+ struct device *dev = &pdev->dev;
+ struct coresight_platform_data *pdata;
struct funnel_drvdata *drvdata;
struct resource *res;
struct coresight_desc *desc;
- drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
- if (!drvdata) {
- ret = -ENOMEM;
- goto err_kzalloc_drvdata;
+ if (pdev->dev.of_node) {
+ pdata = of_get_coresight_platform_data(dev, pdev->dev.of_node);
+ if (IS_ERR(pdata))
+ return PTR_ERR(pdata);
+ pdev->dev.platform_data = pdata;
}
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res) {
- ret = -EINVAL;
- goto err_res;
- }
- drvdata->base = ioremap_nocache(res->start, resource_size(res));
- if (!drvdata->base) {
- ret = -EINVAL;
- goto err_ioremap;
- }
+
+ drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
+ if (!drvdata)
+ return -ENOMEM;
drvdata->dev = &pdev->dev;
platform_set_drvdata(pdev, drvdata);
- drvdata->clk = clk_get(drvdata->dev, "core_clk");
- if (IS_ERR(drvdata->clk)) {
- ret = PTR_ERR(drvdata->clk);
- goto err_clk_get;
- }
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res)
+ return -ENODEV;
+ drvdata->base = devm_ioremap(dev, res->start, resource_size(res));
+ if (!drvdata->base)
+ return -ENOMEM;
+ drvdata->clk = devm_clk_get(dev, "core_clk");
+ if (IS_ERR(drvdata->clk))
+ return PTR_ERR(drvdata->clk);
ret = clk_set_rate(drvdata->clk, CORESIGHT_CLK_RATE_TRACE);
if (ret)
- goto err_clk_rate;
+ return ret;
- desc = kzalloc(sizeof(*desc), GFP_KERNEL);
- if (!desc) {
- ret = -ENOMEM;
- goto err_kzalloc_desc;
- }
+ desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
+ if (!desc)
+ return -ENOMEM;
desc->type = CORESIGHT_DEV_TYPE_LINK;
desc->subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_MERG;
desc->ops = &funnel_cs_ops;
@@ -217,27 +217,11 @@
desc->groups = funnel_attr_grps;
desc->owner = THIS_MODULE;
drvdata->csdev = coresight_register(desc);
- if (IS_ERR(drvdata->csdev)) {
- ret = PTR_ERR(drvdata->csdev);
- goto err_coresight_register;
- }
- kfree(desc);
+ if (IS_ERR(drvdata->csdev))
+ return PTR_ERR(drvdata->csdev);
- dev_info(drvdata->dev, "FUNNEL initialized\n");
+ dev_info(dev, "FUNNEL initialized\n");
return 0;
-err_coresight_register:
- kfree(desc);
-err_kzalloc_desc:
-err_clk_rate:
- clk_put(drvdata->clk);
-err_clk_get:
- iounmap(drvdata->base);
-err_ioremap:
-err_res:
- kfree(drvdata);
-err_kzalloc_drvdata:
- dev_err(drvdata->dev, "FUNNEL init failed\n");
- return ret;
}
static int __devexit funnel_remove(struct platform_device *pdev)
@@ -245,14 +229,11 @@
struct funnel_drvdata *drvdata = platform_get_drvdata(pdev);
coresight_unregister(drvdata->csdev);
- clk_put(drvdata->clk);
- iounmap(drvdata->base);
- kfree(drvdata);
return 0;
}
static struct of_device_id funnel_match[] = {
- {.compatible = "coresight-funnel"},
+ {.compatible = "arm,coresight-funnel"},
{}
};
diff --git a/drivers/coresight/coresight-replicator.c b/drivers/coresight/coresight-replicator.c
new file mode 100644
index 0000000..ccf49e9
--- /dev/null
+++ b/drivers/coresight/coresight-replicator.c
@@ -0,0 +1,213 @@
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/clk.h>
+#include <linux/of_coresight.h>
+#include <linux/coresight.h>
+
+#include "coresight-priv.h"
+
+
+#define replicator_writel(drvdata, val, off) \
+ __raw_writel((val), drvdata->base + off)
+#define replicator_readl(drvdata, off) \
+ __raw_readl(drvdata->base + off)
+
+#define REPLICATOR_LOCK(drvdata) \
+do { \
+ mb(); \
+ replicator_writel(drvdata, 0x0, CORESIGHT_LAR); \
+} while (0)
+#define REPLICATOR_UNLOCK(drvdata) \
+do { \
+ replicator_writel(drvdata, CORESIGHT_UNLOCK, CORESIGHT_LAR); \
+ mb(); \
+} while (0)
+
+
+#define REPLICATOR_IDFILTER0 (0x000)
+#define REPLICATOR_IDFILTER1 (0x004)
+#define REPLICATOR_ITATBCTR0 (0xEFC)
+#define REPLICATOR_ITATBCTR1 (0xEF8)
+
+
+struct replicator_drvdata {
+ void __iomem *base;
+ struct device *dev;
+ struct coresight_device *csdev;
+ struct clk *clk;
+};
+
+
+static void __replicator_enable(struct replicator_drvdata *drvdata, int outport)
+{
+ REPLICATOR_UNLOCK(drvdata);
+
+ if (outport == 0) {
+ replicator_writel(drvdata, 0x0, REPLICATOR_IDFILTER0);
+ replicator_writel(drvdata, 0xFF, REPLICATOR_IDFILTER1);
+ } else {
+ replicator_writel(drvdata, 0x0, REPLICATOR_IDFILTER1);
+ replicator_writel(drvdata, 0xFF, REPLICATOR_IDFILTER0);
+ }
+
+ REPLICATOR_LOCK(drvdata);
+}
+
+static int replicator_enable(struct coresight_device *csdev, int inport,
+ int outport)
+{
+ struct replicator_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+ int ret;
+
+ ret = clk_prepare_enable(drvdata->clk);
+ if (ret)
+ return ret;
+
+ __replicator_enable(drvdata, outport);
+
+ dev_info(drvdata->dev, "REPLICATOR enabled\n");
+ return 0;
+}
+
+static void __replicator_disable(struct replicator_drvdata *drvdata,
+ int outport)
+{
+ REPLICATOR_UNLOCK(drvdata);
+
+ if (outport == 0)
+ replicator_writel(drvdata, 0xFF, REPLICATOR_IDFILTER0);
+ else
+ replicator_writel(drvdata, 0xFF, REPLICATOR_IDFILTER1);
+
+ REPLICATOR_LOCK(drvdata);
+}
+
+static void replicator_disable(struct coresight_device *csdev, int inport,
+ int outport)
+{
+ struct replicator_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+ __replicator_disable(drvdata, outport);
+
+ clk_disable_unprepare(drvdata->clk);
+
+ dev_info(drvdata->dev, "REPLICATOR disabled\n");
+}
+
+static const struct coresight_ops_link replicator_link_ops = {
+ .enable = replicator_enable,
+ .disable = replicator_disable,
+};
+
+static const struct coresight_ops replicator_cs_ops = {
+ .link_ops = &replicator_link_ops,
+};
+
+static int __devinit replicator_probe(struct platform_device *pdev)
+{
+ int ret;
+ struct device *dev = &pdev->dev;
+ struct coresight_platform_data *pdata;
+ struct replicator_drvdata *drvdata;
+ struct resource *res;
+ struct coresight_desc *desc;
+
+ if (pdev->dev.of_node) {
+ pdata = of_get_coresight_platform_data(dev, pdev->dev.of_node);
+ if (IS_ERR(pdata))
+ return PTR_ERR(pdata);
+ pdev->dev.platform_data = pdata;
+ }
+
+ drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
+ if (!drvdata)
+ return -ENOMEM;
+ drvdata->dev = &pdev->dev;
+ platform_set_drvdata(pdev, drvdata);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res)
+ return -ENODEV;
+ drvdata->base = devm_ioremap(dev, res->start, resource_size(res));
+ if (!drvdata->base)
+ return -ENOMEM;
+
+ drvdata->clk = devm_clk_get(dev, "core_clk");
+ if (IS_ERR(drvdata->clk))
+ return PTR_ERR(drvdata->clk);
+ ret = clk_set_rate(drvdata->clk, CORESIGHT_CLK_RATE_TRACE);
+ if (ret)
+ return ret;
+
+ desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
+ if (!desc)
+ return -ENOMEM;
+ desc->type = CORESIGHT_DEV_TYPE_LINK;
+ desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_LINK_SPLIT;
+ desc->ops = &replicator_cs_ops;
+ desc->pdata = pdev->dev.platform_data;
+ desc->dev = &pdev->dev;
+ desc->owner = THIS_MODULE;
+ drvdata->csdev = coresight_register(desc);
+ if (IS_ERR(drvdata->csdev))
+ return PTR_ERR(drvdata->csdev);
+
+ dev_info(dev, "REPLICATOR initialized\n");
+ return 0;
+}
+
+static int __devexit replicator_remove(struct platform_device *pdev)
+{
+ struct replicator_drvdata *drvdata = platform_get_drvdata(pdev);
+
+ coresight_unregister(drvdata->csdev);
+ return 0;
+}
+
+static struct of_device_id replicator_match[] = {
+ {.compatible = "qcom,coresight-replicator"},
+ {}
+};
+
+static struct platform_driver replicator_driver = {
+ .probe = replicator_probe,
+ .remove = __devexit_p(replicator_remove),
+ .driver = {
+ .name = "coresight-replicator",
+ .owner = THIS_MODULE,
+ .of_match_table = replicator_match,
+ },
+};
+
+static int __init replicator_init(void)
+{
+ return platform_driver_register(&replicator_driver);
+}
+module_init(replicator_init);
+
+static void __exit replicator_exit(void)
+{
+ platform_driver_unregister(&replicator_driver);
+}
+module_exit(replicator_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("CoreSight Replicator driver");
diff --git a/drivers/coresight/coresight-stm.c b/drivers/coresight/coresight-stm.c
index 22928aa..567bcd5 100644
--- a/drivers/coresight/coresight-stm.c
+++ b/drivers/coresight/coresight-stm.c
@@ -24,6 +24,7 @@
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/clk.h>
+#include <linux/of_coresight.h>
#include <linux/coresight.h>
#include <linux/coresight-stm.h>
#include <asm/unaligned.h>
@@ -426,34 +427,38 @@
static int __devinit stm_probe(struct platform_device *pdev)
{
int ret;
+ struct device *dev = &pdev->dev;
+ struct coresight_platform_data *pdata;
struct stm_drvdata *drvdata;
struct resource *res;
size_t res_size, bitmap_size;
struct coresight_desc *desc;
- drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
- if (!drvdata) {
- ret = -ENOMEM;
- goto err_kzalloc_drvdata;
+ if (pdev->dev.of_node) {
+ pdata = of_get_coresight_platform_data(dev, pdev->dev.of_node);
+ if (IS_ERR(pdata))
+ return PTR_ERR(pdata);
+ pdev->dev.platform_data = pdata;
}
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res) {
- ret = -EINVAL;
- goto err_res0;
- }
- drvdata->base = ioremap_nocache(res->start, resource_size(res));
- if (!drvdata->base) {
- ret = -EINVAL;
- goto err_ioremap0;
- }
+
+ drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
+ if (!drvdata)
+ return -ENOMEM;
+ /* Store the driver data pointer for use in exported functions */
+ stmdrvdata = drvdata;
drvdata->dev = &pdev->dev;
platform_set_drvdata(pdev, drvdata);
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res)
+ return -ENODEV;
+ drvdata->base = devm_ioremap(dev, res->start, resource_size(res));
+ if (!drvdata->base)
+ return -ENOMEM;
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- if (!res) {
- ret = -EINVAL;
- goto err_res1;
- }
+ if (!res)
+ return -ENODEV;
if (boot_nr_channel) {
res_size = min((resource_size_t)(boot_nr_channel *
BYTES_PER_CHANNEL), resource_size(res));
@@ -463,44 +468,25 @@
BYTES_PER_CHANNEL), resource_size(res));
bitmap_size = NR_STM_CHANNEL * sizeof(long);
}
- drvdata->chs.bitmap = kzalloc(bitmap_size, GFP_KERNEL);
- if (!drvdata->chs.bitmap) {
- ret = -ENOMEM;
- goto err_kzalloc_bitmap;
- }
- drvdata->chs.base = ioremap_nocache(res->start, res_size);
- if (!drvdata->chs.base) {
- ret = -EINVAL;
- goto err_ioremap1;
- }
- /* Store the driver data pointer for use in exported functions */
- stmdrvdata = drvdata;
+ drvdata->chs.base = devm_ioremap(dev, res->start, res_size);
+ if (!drvdata->chs.base)
+ return -ENOMEM;
+ drvdata->chs.bitmap = devm_kzalloc(dev, bitmap_size, GFP_KERNEL);
+ if (!drvdata->chs.bitmap)
+ return -ENOMEM;
- drvdata->clk = clk_get(drvdata->dev, "core_clk");
- if (IS_ERR(drvdata->clk)) {
- ret = PTR_ERR(drvdata->clk);
- goto err_clk_get;
- }
-
+ drvdata->clk = devm_clk_get(dev, "core_clk");
+ if (IS_ERR(drvdata->clk))
+ return PTR_ERR(drvdata->clk);
ret = clk_set_rate(drvdata->clk, CORESIGHT_CLK_RATE_TRACE);
if (ret)
- goto err_clk_rate;
-
- drvdata->miscdev.name = ((struct coresight_platform_data *)
- (pdev->dev.platform_data))->name;
- drvdata->miscdev.minor = MISC_DYNAMIC_MINOR;
- drvdata->miscdev.fops = &stm_fops;
- ret = misc_register(&drvdata->miscdev);
- if (ret)
- goto err_misc_register;
+ return ret;
drvdata->entity = OST_ENTITY_ALL;
- desc = kzalloc(sizeof(*desc), GFP_KERNEL);
- if (!desc) {
- ret = -ENOMEM;
- goto err_kzalloc_desc;
- }
+ desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
+ if (!desc)
+ return -ENOMEM;
desc->type = CORESIGHT_DEV_TYPE_SOURCE;
desc->subtype.source_subtype = CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE;
desc->ops = &stm_cs_ops;
@@ -509,11 +495,16 @@
desc->groups = stm_attr_grps;
desc->owner = THIS_MODULE;
drvdata->csdev = coresight_register(desc);
- if (IS_ERR(drvdata->csdev)) {
- ret = PTR_ERR(drvdata->csdev);
- goto err_coresight_register;
- }
- kfree(desc);
+ if (IS_ERR(drvdata->csdev))
+ return PTR_ERR(drvdata->csdev);
+
+ drvdata->miscdev.name = ((struct coresight_platform_data *)
+ (pdev->dev.platform_data))->name;
+ drvdata->miscdev.minor = MISC_DYNAMIC_MINOR;
+ drvdata->miscdev.fops = &stm_fops;
+ ret = misc_register(&drvdata->miscdev);
+ if (ret)
+ goto err;
dev_info(drvdata->dev, "STM initialized\n");
@@ -521,25 +512,8 @@
coresight_enable(drvdata->csdev);
return 0;
-err_coresight_register:
- kfree(desc);
-err_kzalloc_desc:
- misc_deregister(&drvdata->miscdev);
-err_misc_register:
-err_clk_rate:
- clk_put(drvdata->clk);
-err_clk_get:
- iounmap(drvdata->chs.base);
-err_ioremap1:
- kfree(drvdata->chs.bitmap);
-err_kzalloc_bitmap:
-err_res1:
- iounmap(drvdata->base);
-err_ioremap0:
-err_res0:
- kfree(drvdata);
-err_kzalloc_drvdata:
- dev_err(drvdata->dev, "STM init failed\n");
+err:
+ coresight_unregister(drvdata->csdev);
return ret;
}
@@ -547,18 +521,13 @@
{
struct stm_drvdata *drvdata = platform_get_drvdata(pdev);
- coresight_unregister(drvdata->csdev);
misc_deregister(&drvdata->miscdev);
- clk_put(drvdata->clk);
- iounmap(drvdata->chs.base);
- kfree(drvdata->chs.bitmap);
- iounmap(drvdata->base);
- kfree(drvdata);
+ coresight_unregister(drvdata->csdev);
return 0;
}
static struct of_device_id stm_match[] = {
- {.compatible = "coresight-stm"},
+ {.compatible = "arm,coresight-stm"},
{}
};
diff --git a/drivers/coresight/coresight-tpiu.c b/drivers/coresight/coresight-tpiu.c
index 570eeb2..462cbb1 100644
--- a/drivers/coresight/coresight-tpiu.c
+++ b/drivers/coresight/coresight-tpiu.c
@@ -19,6 +19,7 @@
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/clk.h>
+#include <linux/of_coresight.h>
#include <linux/coresight.h>
#include "coresight-priv.h"
@@ -125,50 +126,49 @@
static int __devinit tpiu_probe(struct platform_device *pdev)
{
int ret;
+ struct device *dev = &pdev->dev;
+ struct coresight_platform_data *pdata;
struct tpiu_drvdata *drvdata;
struct resource *res;
struct coresight_desc *desc;
- drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
- if (!drvdata) {
- ret = -ENOMEM;
- goto err_kzalloc_drvdata;
+ if (pdev->dev.of_node) {
+ pdata = of_get_coresight_platform_data(dev, pdev->dev.of_node);
+ if (IS_ERR(pdata))
+ return PTR_ERR(pdata);
+ pdev->dev.platform_data = pdata;
}
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res) {
- ret = -EINVAL;
- goto err_res;
- }
- drvdata->base = ioremap_nocache(res->start, resource_size(res));
- if (!drvdata->base) {
- ret = -EINVAL;
- goto err_ioremap;
- }
+
+ drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
+ if (!drvdata)
+ return -ENOMEM;
drvdata->dev = &pdev->dev;
platform_set_drvdata(pdev, drvdata);
- drvdata->clk = clk_get(drvdata->dev, "core_clk");
- if (IS_ERR(drvdata->clk)) {
- ret = PTR_ERR(drvdata->clk);
- goto err_clk_get;
- }
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res)
+ return -ENODEV;
+ drvdata->base = devm_ioremap(dev, res->start, resource_size(res));
+ if (!drvdata->base)
+ return -ENOMEM;
+ drvdata->clk = devm_clk_get(dev, "core_clk");
+ if (IS_ERR(drvdata->clk))
+ return PTR_ERR(drvdata->clk);
ret = clk_set_rate(drvdata->clk, CORESIGHT_CLK_RATE_TRACE);
if (ret)
- goto err_clk_rate;
+ return ret;
/* Disable tpiu to support older targets that need this */
ret = clk_prepare_enable(drvdata->clk);
if (ret)
- goto err_clk_enable;
+ return ret;
__tpiu_disable(drvdata);
clk_disable_unprepare(drvdata->clk);
- desc = kzalloc(sizeof(*desc), GFP_KERNEL);
- if (!desc) {
- ret = -ENOMEM;
- goto err_kzalloc_desc;
- }
+ desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
+ if (!desc)
+ return -ENOMEM;
desc->type = CORESIGHT_DEV_TYPE_SINK;
desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_PORT;
desc->ops = &tpiu_cs_ops;
@@ -176,28 +176,11 @@
desc->dev = &pdev->dev;
desc->owner = THIS_MODULE;
drvdata->csdev = coresight_register(desc);
- if (IS_ERR(drvdata->csdev)) {
- ret = PTR_ERR(drvdata->csdev);
- goto err_coresight_register;
- }
- kfree(desc);
+ if (IS_ERR(drvdata->csdev))
+ return PTR_ERR(drvdata->csdev);
- dev_info(drvdata->dev, "TPIU initialized\n");
+ dev_info(dev, "TPIU initialized\n");
return 0;
-err_coresight_register:
- kfree(desc);
-err_kzalloc_desc:
-err_clk_enable:
-err_clk_rate:
- clk_put(drvdata->clk);
-err_clk_get:
- iounmap(drvdata->base);
-err_ioremap:
-err_res:
- kfree(drvdata);
-err_kzalloc_drvdata:
- dev_err(drvdata->dev, "TPIU init failed\n");
- return ret;
}
static int __devexit tpiu_remove(struct platform_device *pdev)
@@ -205,14 +188,11 @@
struct tpiu_drvdata *drvdata = platform_get_drvdata(pdev);
coresight_unregister(drvdata->csdev);
- clk_put(drvdata->clk);
- iounmap(drvdata->base);
- kfree(drvdata);
return 0;
}
static struct of_device_id tpiu_match[] = {
- {.compatible = "coresight-tpiu"},
+ {.compatible = "arm,coresight-tpiu"},
{}
};
diff --git a/drivers/coresight/of_coresight.c b/drivers/coresight/of_coresight.c
new file mode 100644
index 0000000..cdc76f1
--- /dev/null
+++ b/drivers/coresight/of_coresight.c
@@ -0,0 +1,100 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/of.h>
+#include <linux/coresight.h>
+
+
+struct coresight_platform_data *of_get_coresight_platform_data(
+ struct device *dev, struct device_node *node)
+{
+ int i, ret = 0;
+ uint32_t outports_len = 0;
+ struct device_node *child_node;
+ struct coresight_platform_data *pdata;
+
+ pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata)
+ return ERR_PTR(-ENOMEM);
+
+ ret = of_property_read_u32(node, "coresight-id", &pdata->id);
+ if (ret)
+ return ERR_PTR(ret);
+
+ ret = of_property_read_string(node, "coresight-name", &pdata->name);
+ if (ret)
+ return ERR_PTR(ret);
+
+ ret = of_property_read_u32(node, "coresight-nr-inports",
+ &pdata->nr_inports);
+ if (ret)
+ return ERR_PTR(ret);
+
+ pdata->nr_outports = 0;
+ if (of_get_property(node, "coresight-outports", &outports_len))
+ pdata->nr_outports = outports_len/sizeof(uint32_t);
+
+ if (pdata->nr_outports) {
+ pdata->outports = devm_kzalloc(dev, pdata->nr_outports *
+ sizeof(*pdata->outports),
+ GFP_KERNEL);
+ if (!pdata->outports)
+ return ERR_PTR(-ENOMEM);
+
+ ret = of_property_read_u32_array(node, "coresight-outports",
+ (u32 *)pdata->outports,
+ pdata->nr_outports);
+ if (ret)
+ return ERR_PTR(ret);
+
+ pdata->child_ids = devm_kzalloc(dev, pdata->nr_outports *
+ sizeof(*pdata->child_ids),
+ GFP_KERNEL);
+ if (!pdata->child_ids)
+ return ERR_PTR(-ENOMEM);
+
+ for (i = 0; i < pdata->nr_outports; i++) {
+ child_node = of_parse_phandle(node,
+ "coresight-child-list",
+ i);
+ if (!child_node)
+ return ERR_PTR(-EINVAL);
+
+ ret = of_property_read_u32(child_node, "coresight-id",
+ (u32 *)&pdata->child_ids[i]);
+ of_node_put(child_node);
+ if (ret)
+ return ERR_PTR(ret);
+ }
+
+ pdata->child_ports = devm_kzalloc(dev, pdata->nr_outports *
+ sizeof(*pdata->child_ports),
+ GFP_KERNEL);
+ if (!pdata->child_ports)
+ return ERR_PTR(-ENOMEM);
+
+ ret = of_property_read_u32_array(node, "coresight-child-ports",
+ (u32 *)pdata->child_ports,
+ pdata->nr_outports);
+ if (ret)
+ return ERR_PTR(ret);
+ }
+
+ pdata->default_sink = of_property_read_bool(node,
+ "coresight-default-sink");
+ return pdata;
+}
+EXPORT_SYMBOL_GPL(of_get_coresight_platform_data);
diff --git a/drivers/gpio/gpio-msm-common.c b/drivers/gpio/gpio-msm-common.c
index bdb8171..46f6460 100644
--- a/drivers/gpio/gpio-msm-common.c
+++ b/drivers/gpio/gpio-msm-common.c
@@ -23,6 +23,7 @@
#include <linux/irqdomain.h>
#include <linux/of.h>
#include <linux/err.h>
+#include <linux/platform_device.h>
#include <asm/mach/irq.h>
@@ -402,59 +403,6 @@
.irq_disable = msm_gpio_irq_disable,
};
-/*
- * This lock class tells lockdep that GPIO irqs are in a different
- * category than their parent, so it won't report false recursion.
- */
-static struct lock_class_key msm_gpio_lock_class;
-
-/* TODO: This should be a real platform_driver */
-static int __devinit msm_gpio_probe(void)
-{
- int ret;
-#ifndef CONFIG_OF
- int irq, i;
-#endif
-
- spin_lock_init(&tlmm_lock);
- bitmap_zero(msm_gpio.enabled_irqs, NR_MSM_GPIOS);
- bitmap_zero(msm_gpio.wake_irqs, NR_MSM_GPIOS);
- bitmap_zero(msm_gpio.dual_edge_irqs, NR_MSM_GPIOS);
- ret = gpiochip_add(&msm_gpio.gpio_chip);
- if (ret < 0)
- return ret;
-
-#ifndef CONFIG_OF
- for (i = 0; i < msm_gpio.gpio_chip.ngpio; ++i) {
- irq = msm_gpio_to_irq(&msm_gpio.gpio_chip, i);
- irq_set_lockdep_class(irq, &msm_gpio_lock_class);
- irq_set_chip_and_handler(irq, &msm_gpio_irq_chip,
- handle_level_irq);
- set_irq_flags(irq, IRQF_VALID);
- }
-#endif
- ret = request_irq(TLMM_MSM_SUMMARY_IRQ, msm_summary_irq_handler,
- IRQF_TRIGGER_HIGH, "msmgpio", NULL);
- if (ret) {
- pr_err("Request_irq failed for TLMM_MSM_SUMMARY_IRQ - %d\n",
- ret);
- return ret;
- }
- return 0;
-}
-
-static int __devexit msm_gpio_remove(void)
-{
- int ret = gpiochip_remove(&msm_gpio.gpio_chip);
-
- if (ret < 0)
- return ret;
-
- irq_set_handler(TLMM_MSM_SUMMARY_IRQ, NULL);
-
- return 0;
-}
-
#ifdef CONFIG_PM
static int msm_gpio_suspend(void)
{
@@ -518,22 +466,6 @@
.resume = msm_gpio_resume,
};
-static int __init msm_gpio_init(void)
-{
- msm_gpio_probe();
- register_syscore_ops(&msm_gpio_syscore_ops);
- return 0;
-}
-
-static void __exit msm_gpio_exit(void)
-{
- unregister_syscore_ops(&msm_gpio_syscore_ops);
- msm_gpio_remove();
-}
-
-postcore_initcall(msm_gpio_init);
-module_exit(msm_gpio_exit);
-
static void msm_tlmm_set_field(const struct tlmm_field_cfg *configs,
unsigned id, unsigned width, unsigned val)
{
@@ -594,6 +526,89 @@
}
EXPORT_SYMBOL(msm_gpio_install_direct_irq);
+/*
+ * This lock class tells lockdep that GPIO irqs are in a different
+ * category than their parent, so it won't report false recursion.
+ */
+static struct lock_class_key msm_gpio_lock_class;
+
+static int __devinit msm_gpio_probe(struct platform_device *pdev)
+{
+ int ret;
+#ifndef CONFIG_OF
+ int irq, i;
+#endif
+ msm_gpio.gpio_chip.dev = &pdev->dev;
+ spin_lock_init(&tlmm_lock);
+ bitmap_zero(msm_gpio.enabled_irqs, NR_MSM_GPIOS);
+ bitmap_zero(msm_gpio.wake_irqs, NR_MSM_GPIOS);
+ bitmap_zero(msm_gpio.dual_edge_irqs, NR_MSM_GPIOS);
+ ret = gpiochip_add(&msm_gpio.gpio_chip);
+ if (ret < 0)
+ return ret;
+
+#ifndef CONFIG_OF
+ for (i = 0; i < msm_gpio.gpio_chip.ngpio; ++i) {
+ irq = msm_gpio_to_irq(&msm_gpio.gpio_chip, i);
+ irq_set_lockdep_class(irq, &msm_gpio_lock_class);
+ irq_set_chip_and_handler(irq, &msm_gpio_irq_chip,
+ handle_level_irq);
+ set_irq_flags(irq, IRQF_VALID);
+ }
+#endif
+ ret = request_irq(TLMM_MSM_SUMMARY_IRQ, msm_summary_irq_handler,
+ IRQF_TRIGGER_HIGH, "msmgpio", NULL);
+ if (ret) {
+ pr_err("Request_irq failed for TLMM_MSM_SUMMARY_IRQ - %d\n",
+ ret);
+ return ret;
+ }
+ register_syscore_ops(&msm_gpio_syscore_ops);
+ return 0;
+}
+
+#ifdef CONFIG_OF
+static struct of_device_id msm_gpio_of_match[] __devinitdata = {
+ {.compatible = "qcom,msm-gpio", },
+ { },
+};
+#endif
+
+static int __devexit msm_gpio_remove(struct platform_device *pdev)
+{
+ int ret;
+
+ unregister_syscore_ops(&msm_gpio_syscore_ops);
+ ret = gpiochip_remove(&msm_gpio.gpio_chip);
+ if (ret < 0)
+ return ret;
+ irq_set_handler(TLMM_MSM_SUMMARY_IRQ, NULL);
+
+ return 0;
+}
+
+static struct platform_driver msm_gpio_driver = {
+ .probe = msm_gpio_probe,
+ .remove = __devexit_p(msm_gpio_remove),
+ .driver = {
+ .name = "msmgpio",
+ .owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(msm_gpio_of_match),
+ },
+};
+
+static void __exit msm_gpio_exit(void)
+{
+ platform_driver_unregister(&msm_gpio_driver);
+}
+module_exit(msm_gpio_exit);
+
+static int __init msm_gpio_init(void)
+{
+ return platform_driver_register(&msm_gpio_driver);
+}
+postcore_initcall(msm_gpio_init);
+
#ifdef CONFIG_OF
static int msm_gpio_irq_domain_xlate(struct irq_domain *d,
struct device_node *controller,
diff --git a/drivers/gpu/msm/kgsl.c b/drivers/gpu/msm/kgsl.c
index 53eff77..3d83508 100644
--- a/drivers/gpu/msm/kgsl.c
+++ b/drivers/gpu/msm/kgsl.c
@@ -649,6 +649,7 @@
struct kgsl_device, display_off);
KGSL_PWR_WARN(device, "early suspend start\n");
mutex_lock(&device->mutex);
+ device->pwrctrl.restore_slumber = true;
kgsl_pwrctrl_request_state(device, KGSL_STATE_SLUMBER);
kgsl_pwrctrl_sleep(device);
mutex_unlock(&device->mutex);
@@ -677,7 +678,7 @@
struct kgsl_device, display_off);
KGSL_PWR_WARN(device, "late resume start\n");
mutex_lock(&device->mutex);
- device->pwrctrl.restore_slumber = 0;
+ device->pwrctrl.restore_slumber = false;
if (device->pwrscale.policy == NULL)
kgsl_pwrctrl_pwrlevel_change(device, KGSL_PWRLEVEL_TURBO);
kgsl_pwrctrl_wake(device);
diff --git a/drivers/gpu/msm/kgsl_pwrctrl.c b/drivers/gpu/msm/kgsl_pwrctrl.c
index 6d4d4d3..4b5021d 100644
--- a/drivers/gpu/msm/kgsl_pwrctrl.c
+++ b/drivers/gpu/msm/kgsl_pwrctrl.c
@@ -800,14 +800,12 @@
case KGSL_STATE_ACTIVE:
if (!device->ftbl->isidle(device)) {
kgsl_pwrctrl_request_state(device, KGSL_STATE_NONE);
- device->pwrctrl.restore_slumber = true;
return -EBUSY;
}
/* fall through */
case KGSL_STATE_NAP:
case KGSL_STATE_SLEEP:
del_timer_sync(&device->idle_timer);
- device->pwrctrl.restore_slumber = true;
device->ftbl->suspend_context(device);
device->ftbl->stop(device);
_sleep_accounting(device);
diff --git a/drivers/media/video/msm_vidc/msm_smem.c b/drivers/media/video/msm_vidc/msm_smem.c
index 76e3592..ff12a5c 100644
--- a/drivers/media/video/msm_vidc/msm_smem.c
+++ b/drivers/media/video/msm_vidc/msm_smem.c
@@ -108,8 +108,6 @@
unsigned long iova = 0;
unsigned long buffer_size = 0;
int rc = 0;
- if (size == 0)
- goto skip_mem_alloc;
flags = flags | ION_HEAP(ION_CP_MM_HEAP_ID);
if (align < 4096)
align = 4096;
@@ -147,7 +145,6 @@
fail_map:
ion_free(client->clnt, hndl);
fail_shared_mem_alloc:
-skip_mem_alloc:
return rc;
}
@@ -236,12 +233,15 @@
struct smem_client *client;
int rc = 0;
struct msm_smem *mem;
-
client = clt;
if (!client) {
pr_err("Invalid client passed\n");
return NULL;
}
+ if (!size) {
+ pr_err("No need to allocate memory of size: %d\n", size);
+ return NULL;
+ }
mem = kzalloc(sizeof(*mem), GFP_KERNEL);
if (!mem) {
pr_err("Failed to allocate shared mem\n");
diff --git a/drivers/media/video/msm_vidc/msm_vidc_common.c b/drivers/media/video/msm_vidc/msm_vidc_common.c
index 58dee31..b07c63b 100644
--- a/drivers/media/video/msm_vidc/msm_vidc_common.c
+++ b/drivers/media/video/msm_vidc/msm_vidc_common.c
@@ -1490,10 +1490,13 @@
struct list_head *ptr, *next;
struct vidc_buffer_addr_info buffer_info;
unsigned long flags;
+ struct hal_buffer_requirements *scratch_buf =
+ &inst->buff_req.buffer[HAL_BUFFER_INTERNAL_SCRATCH];
int i;
+
pr_debug("scratch: num = %d, size = %d\n",
- inst->buff_req.buffer[6].buffer_count_actual,
- inst->buff_req.buffer[6].buffer_size);
+ scratch_buf->buffer_count_actual,
+ scratch_buf->buffer_size);
spin_lock_irqsave(&inst->lock, flags);
if (!list_empty(&inst->internalbufs)) {
list_for_each_safe(ptr, next, &inst->internalbufs) {
@@ -1505,40 +1508,44 @@
}
}
spin_unlock_irqrestore(&inst->lock, flags);
-
-
- for (i = 0; i < inst->buff_req.buffer[6].buffer_count_actual;
+ if (scratch_buf->buffer_size) {
+ for (i = 0; i < scratch_buf->buffer_count_actual;
i++) {
- handle = msm_smem_alloc(inst->mem_client,
- inst->buff_req.buffer[6].buffer_size, 1, 0,
+ handle = msm_smem_alloc(inst->mem_client,
+ scratch_buf->buffer_size, 1, 0,
inst->core->resources.io_map[NS_MAP].domain, 0);
- if (!handle) {
- pr_err("Failed to allocate scratch memory\n");
- rc = -ENOMEM;
- goto err_no_mem;
- }
- binfo = kzalloc(sizeof(*binfo), GFP_KERNEL);
- if (!binfo) {
- pr_err("Out of memory\n");
- rc = -ENOMEM;
- goto err_no_mem;
- }
- binfo->handle = handle;
- spin_lock_irqsave(&inst->lock, flags);
- list_add_tail(&binfo->list, &inst->internalbufs);
- spin_unlock_irqrestore(&inst->lock, flags);
- buffer_info.buffer_size =
- inst->buff_req.buffer[6].buffer_size;
- buffer_info.buffer_type = HAL_BUFFER_INTERNAL_SCRATCH;
- buffer_info.num_buffers = 1;
- buffer_info.align_device_addr = handle->device_addr;
- rc = vidc_hal_session_set_buffers((void *) inst->session,
- &buffer_info);
- if (rc) {
- pr_err("vidc_hal_session_set_buffers failed");
- break;
+ if (!handle) {
+ pr_err("Failed to allocate scratch memory\n");
+ rc = -ENOMEM;
+ goto err_no_mem;
+ }
+ binfo = kzalloc(sizeof(*binfo), GFP_KERNEL);
+ if (!binfo) {
+ pr_err("Out of memory\n");
+ rc = -ENOMEM;
+ goto fail_kzalloc;
+ }
+ binfo->handle = handle;
+ buffer_info.buffer_size = scratch_buf->buffer_size;
+ buffer_info.buffer_type = HAL_BUFFER_INTERNAL_SCRATCH;
+ buffer_info.num_buffers = 1;
+ buffer_info.align_device_addr = handle->device_addr;
+ rc = vidc_hal_session_set_buffers(
+ (void *) inst->session, &buffer_info);
+ if (rc) {
+ pr_err("vidc_hal_session_set_buffers failed");
+ goto fail_set_buffers;
+ }
+ spin_lock_irqsave(&inst->lock, flags);
+ list_add_tail(&binfo->list, &inst->internalbufs);
+ spin_unlock_irqrestore(&inst->lock, flags);
}
}
+ return rc;
+fail_set_buffers:
+ kfree(binfo);
+fail_kzalloc:
+ msm_smem_free(inst->mem_client, handle);
err_no_mem:
return rc;
}
diff --git a/drivers/mfd/wcd9xxx-core.c b/drivers/mfd/wcd9xxx-core.c
index 6d82e11..05707fd 100644
--- a/drivers/mfd/wcd9xxx-core.c
+++ b/drivers/mfd/wcd9xxx-core.c
@@ -12,6 +12,7 @@
#include <linux/kernel.h>
#include <linux/module.h>
+#include <linux/of_gpio.h>
#include <linux/slab.h>
#include <linux/mfd/core.h>
#include <linux/mfd/wcd9xxx/wcd9xxx-slimslave.h>
@@ -320,10 +321,12 @@
wcd9xxx_bring_up(wcd9xxx);
- ret = wcd9xxx_irq_init(wcd9xxx);
- if (ret) {
- pr_err("IRQ initialization failed\n");
- goto err;
+ if (wcd9xxx->irq != -1) {
+ ret = wcd9xxx_irq_init(wcd9xxx);
+ if (ret) {
+ pr_err("IRQ initialization failed\n");
+ goto err;
+ }
}
wcd9xxx->idbyte_0 = wcd9xxx_reg_read(wcd9xxx, WCD9XXX_A_CHIP_ID_BYTE_0);
@@ -497,10 +500,15 @@
goto err;
}
- for (i = 0; i < ARRAY_SIZE(pdata->regulator); i++)
- wcd9xxx->supplies[i].supply = pdata->regulator[i].name;
+ wcd9xxx->num_of_supplies = 0;
+ for (i = 0; i < ARRAY_SIZE(pdata->regulator); i++) {
+ if (pdata->regulator[i].name) {
+ wcd9xxx->supplies[i].supply = pdata->regulator[i].name;
+ wcd9xxx->num_of_supplies++;
+ }
+ }
- ret = regulator_bulk_get(wcd9xxx->dev, ARRAY_SIZE(pdata->regulator),
+ ret = regulator_bulk_get(wcd9xxx->dev, wcd9xxx->num_of_supplies,
wcd9xxx->supplies);
if (ret != 0) {
dev_err(wcd9xxx->dev, "Failed to get supplies: err = %d\n",
@@ -508,7 +516,7 @@
goto err_supplies;
}
- for (i = 0; i < ARRAY_SIZE(pdata->regulator); i++) {
+ for (i = 0; i < wcd9xxx->num_of_supplies; i++) {
ret = regulator_set_voltage(wcd9xxx->supplies[i].consumer,
pdata->regulator[i].min_uV, pdata->regulator[i].max_uV);
if (ret) {
@@ -528,7 +536,7 @@
}
}
- ret = regulator_bulk_enable(ARRAY_SIZE(pdata->regulator),
+ ret = regulator_bulk_enable(wcd9xxx->num_of_supplies,
wcd9xxx->supplies);
if (ret != 0) {
dev_err(wcd9xxx->dev, "Failed to enable supplies: err = %d\n",
@@ -538,13 +546,13 @@
return ret;
err_configure:
- for (i = 0; i < ARRAY_SIZE(pdata->regulator); i++) {
+ for (i = 0; i < wcd9xxx->num_of_supplies; i++) {
regulator_set_voltage(wcd9xxx->supplies[i].consumer, 0,
pdata->regulator[i].max_uV);
regulator_set_optimum_mode(wcd9xxx->supplies[i].consumer, 0);
}
err_get:
- regulator_bulk_free(ARRAY_SIZE(pdata->regulator), wcd9xxx->supplies);
+ regulator_bulk_free(wcd9xxx->num_of_supplies, wcd9xxx->supplies);
err_supplies:
kfree(wcd9xxx->supplies);
err:
@@ -556,14 +564,14 @@
{
int i;
- regulator_bulk_disable(ARRAY_SIZE(pdata->regulator),
+ regulator_bulk_disable(wcd9xxx->num_of_supplies,
wcd9xxx->supplies);
- for (i = 0; i < ARRAY_SIZE(pdata->regulator); i++) {
+ for (i = 0; i < wcd9xxx->num_of_supplies; i++) {
regulator_set_voltage(wcd9xxx->supplies[i].consumer, 0,
pdata->regulator[i].max_uV);
regulator_set_optimum_mode(wcd9xxx->supplies[i].consumer, 0);
}
- regulator_bulk_free(ARRAY_SIZE(pdata->regulator), wcd9xxx->supplies);
+ regulator_bulk_free(wcd9xxx->num_of_supplies, wcd9xxx->supplies);
kfree(wcd9xxx->supplies);
}
@@ -792,6 +800,252 @@
return 0;
}
+#define CODEC_DT_MAX_PROP_SIZE 40
+static int wcd9xxx_dt_parse_vreg_info(struct device *dev,
+ struct wcd9xxx_regulator *vreg, const char *vreg_name)
+{
+ int len, ret = 0;
+ const __be32 *prop;
+ char prop_name[CODEC_DT_MAX_PROP_SIZE];
+ struct device_node *regnode = NULL;
+ u32 prop_val;
+
+ snprintf(prop_name, CODEC_DT_MAX_PROP_SIZE, "%s-supply",
+ vreg_name);
+ regnode = of_parse_phandle(dev->of_node, prop_name, 0);
+
+ if (!regnode) {
+ dev_err(dev, "Looking up %s property in node %s failed",
+ prop_name, dev->of_node->full_name);
+ return -ENODEV;
+ }
+ vreg->name = vreg_name;
+
+ snprintf(prop_name, CODEC_DT_MAX_PROP_SIZE,
+ "qcom,%s-voltage", vreg_name);
+ prop = of_get_property(dev->of_node, prop_name, &len);
+
+ if (!prop || (len != (2 * sizeof(__be32)))) {
+ dev_err(dev, "%s %s property\n",
+ prop ? "invalid format" : "no", prop_name);
+ return -ENODEV;
+ } else {
+ vreg->min_uV = be32_to_cpup(&prop[0]);
+ vreg->max_uV = be32_to_cpup(&prop[1]);
+ }
+
+ snprintf(prop_name, CODEC_DT_MAX_PROP_SIZE,
+ "qcom,%s-current", vreg_name);
+
+ ret = of_property_read_u32(dev->of_node, prop_name, &prop_val);
+ if (ret) {
+ dev_err(dev, "Looking up %s property in node %s failed",
+ prop_name, dev->of_node->full_name);
+ return -ENODEV;
+ }
+ vreg->optimum_uA = prop_val;
+
+ dev_info(dev, "%s: vol=[%d %d]uV, curr=[%d]uA\n", vreg->name,
+ vreg->min_uV, vreg->max_uV, vreg->optimum_uA);
+ return 0;
+}
+
+static int wcd9xxx_dt_parse_micbias_info(struct device *dev,
+ struct wcd9xxx_micbias_setting *micbias)
+{
+ int ret = 0;
+ char prop_name[CODEC_DT_MAX_PROP_SIZE];
+ u32 prop_val;
+
+ snprintf(prop_name, CODEC_DT_MAX_PROP_SIZE,
+ "qcom,cdc-micbias-ldoh-v");
+ ret = of_property_read_u32(dev->of_node, prop_name, &prop_val);
+ if (ret) {
+ dev_err(dev, "Looking up %s property in node %s failed",
+ prop_name, dev->of_node->full_name);
+ return -ENODEV;
+ }
+ micbias->ldoh_v = (u8)prop_val;
+
+ snprintf(prop_name, CODEC_DT_MAX_PROP_SIZE,
+ "qcom,cdc-micbias-cfilt1-mv");
+ ret = of_property_read_u32(dev->of_node, prop_name,
+ &micbias->cfilt1_mv);
+ if (ret) {
+ dev_err(dev, "Looking up %s property in node %s failed",
+ prop_name, dev->of_node->full_name);
+ return -ENODEV;
+ }
+
+ snprintf(prop_name, CODEC_DT_MAX_PROP_SIZE,
+ "qcom,cdc-micbias-cfilt2-mv");
+ ret = of_property_read_u32(dev->of_node, prop_name,
+ &micbias->cfilt2_mv);
+ if (ret) {
+ dev_err(dev, "Looking up %s property in node %s failed",
+ prop_name, dev->of_node->full_name);
+ return -ENODEV;
+ }
+
+ snprintf(prop_name, CODEC_DT_MAX_PROP_SIZE,
+ "qcom,cdc-micbias-cfilt3-mv");
+ ret = of_property_read_u32(dev->of_node, prop_name,
+ &micbias->cfilt3_mv);
+ if (ret) {
+ dev_err(dev, "Looking up %s property in node %s failed",
+ prop_name, dev->of_node->full_name);
+ return -ENODEV;
+ }
+
+ snprintf(prop_name, CODEC_DT_MAX_PROP_SIZE,
+ "qcom,cdc-micbias1-cfilt-sel");
+ ret = of_property_read_u32(dev->of_node, prop_name, &prop_val);
+ if (ret) {
+ dev_err(dev, "Looking up %s property in node %s failed",
+ prop_name, dev->of_node->full_name);
+ return -ENODEV;
+ }
+ micbias->bias1_cfilt_sel = (u8)prop_val;
+
+ snprintf(prop_name, CODEC_DT_MAX_PROP_SIZE,
+ "qcom,cdc-micbias2-cfilt-sel");
+ ret = of_property_read_u32(dev->of_node, prop_name, &prop_val);
+ if (ret) {
+ dev_err(dev, "Looking up %s property in node %s failed",
+ prop_name, dev->of_node->full_name);
+ return -ENODEV;
+ }
+ micbias->bias2_cfilt_sel = (u8)prop_val;
+
+ snprintf(prop_name, CODEC_DT_MAX_PROP_SIZE,
+ "qcom,cdc-micbias3-cfilt-sel");
+ ret = of_property_read_u32(dev->of_node, prop_name, &prop_val);
+ if (ret) {
+ dev_err(dev, "Looking up %s property in node %s failed",
+ prop_name, dev->of_node->full_name);
+ return -ENODEV;
+ }
+ micbias->bias3_cfilt_sel = (u8)prop_val;
+
+ snprintf(prop_name, CODEC_DT_MAX_PROP_SIZE,
+ "qcom,cdc-micbias4-cfilt-sel");
+ ret = of_property_read_u32(dev->of_node, prop_name, &prop_val);
+ if (ret) {
+ dev_err(dev, "Looking up %s property in node %s failed",
+ prop_name, dev->of_node->full_name);
+ return -ENODEV;
+ }
+ micbias->bias4_cfilt_sel = (u8)prop_val;
+
+ dev_dbg(dev, "ldoh_v %u cfilt1_mv %u cfilt2_mv %u cfilt3_mv %u",
+ (u32)micbias->ldoh_v, (u32)micbias->cfilt1_mv,
+ (u32)micbias->cfilt2_mv, (u32)micbias->cfilt3_mv);
+
+ dev_dbg(dev, "bias1_cfilt_sel %u bias2_cfilt_sel %u\n",
+ (u32)micbias->bias1_cfilt_sel, (u32)micbias->bias2_cfilt_sel);
+
+ dev_dbg(dev, "bias3_cfilt_sel %u bias4_cfilt_sel %u\n",
+ (u32)micbias->bias3_cfilt_sel, (u32)micbias->bias4_cfilt_sel);
+
+ return 0;
+}
+
+static int wcd9xxx_dt_parse_slim_interface_dev_info(struct device *dev,
+ struct slim_device *slim_ifd)
+{
+ int ret = 0;
+ struct property *prop;
+
+ ret = of_property_read_string(dev->of_node, "qcom,cdc-slim-ifd",
+ &slim_ifd->name);
+ if (ret) {
+ dev_err(dev, "Looking up %s property in node %s failed",
+ "qcom,cdc-slim-ifd-dev", dev->of_node->full_name);
+ return -ENODEV;
+ }
+ prop = of_find_property(dev->of_node,
+ "qcom,cdc-slim-ifd-elemental-addr", NULL);
+ if (!prop) {
+ dev_err(dev, "Looking up %s property in node %s failed",
+ "qcom,cdc-slim-ifd-elemental-addr",
+ dev->of_node->full_name);
+ return -ENODEV;
+ } else if (prop->length != 6) {
+ dev_err(dev, "invalid codec slim ifd addr. addr length = %d\n",
+ prop->length);
+ return -ENODEV;
+ }
+ memcpy(slim_ifd->e_addr, prop->value, 6);
+
+ return 0;
+}
+
+static char *taiko_supplies[] = {
+ "cdc-vdd-buck", "cdc-vdd-tx-h", "cdc-vdd-rx-h", "cdc-vddpx-1",
+ "cdc-vdd-a-1p2v", "cdc-vddcx-1", "cdc-vddcx-2",
+};
+
+static struct wcd9xxx_pdata *wcd9xxx_populate_dt_pdata(struct device *dev)
+{
+ struct wcd9xxx_pdata *pdata;
+ int ret, i;
+ char **codec_supplies;
+ u32 num_of_supplies = 0;
+
+ pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata) {
+ dev_err(dev,
+ "could not allocate memory for platform data\n");
+ return NULL;
+ }
+
+ if (!strcmp(dev_name(dev), "taiko-slim-pgd")) {
+ codec_supplies = taiko_supplies;
+ num_of_supplies = ARRAY_SIZE(taiko_supplies);
+ } else {
+ dev_err(dev, "%s unsupported device %s\n",
+ __func__, dev_name(dev));
+ goto err;
+ }
+
+ if (num_of_supplies > ARRAY_SIZE(pdata->regulator)) {
+ dev_err(dev, "%s: Num of supplies %u > max supported %u\n",
+ __func__, num_of_supplies, ARRAY_SIZE(pdata->regulator));
+
+ goto err;
+ }
+
+ for (i = 0; i < num_of_supplies; i++) {
+ ret = wcd9xxx_dt_parse_vreg_info(dev, &pdata->regulator[i],
+ codec_supplies[i]);
+ if (ret)
+ goto err;
+ }
+
+ ret = wcd9xxx_dt_parse_micbias_info(dev, &pdata->micbias);
+ if (ret)
+ goto err;
+
+ pdata->reset_gpio = of_get_named_gpio(dev->of_node,
+ "qcom,cdc-reset-gpio", 0);
+ if (pdata->reset_gpio < 0) {
+ dev_err(dev, "Looking up %s property in node %s failed %d\n",
+ "qcom, cdc-reset-gpio", dev->of_node->full_name,
+ pdata->reset_gpio);
+ goto err;
+ }
+ pdata->irq = -1;
+
+ ret = wcd9xxx_dt_parse_slim_interface_dev_info(dev,
+ &pdata->slimbus_slave_device);
+ if (ret)
+ goto err;
+ return pdata;
+err:
+ devm_kfree(dev, pdata);
+ return NULL;
+}
+
static int wcd9xxx_slim_probe(struct slim_device *slim)
{
struct wcd9xxx *wcd9xxx;
@@ -799,8 +1053,15 @@
int ret = 0;
int sgla_retry_cnt;
- dev_info(&slim->dev, "Initialized slim device %s\n", slim->name);
- pdata = slim->dev.platform_data;
+ if (slim->dev.of_node) {
+ dev_info(&slim->dev, "Platform data from device tree\n");
+ pdata = wcd9xxx_populate_dt_pdata(&slim->dev);
+ slim->dev.platform_data = pdata;
+
+ } else {
+ dev_info(&slim->dev, "Platform data from board file\n");
+ pdata = slim->dev.platform_data;
+ }
if (!pdata) {
dev_err(&slim->dev, "Error, no platform data\n");
@@ -1103,7 +1364,7 @@
};
static const struct slim_device_id taiko_slimtest_id[] = {
- {"taiko-slim", 0},
+ {"taiko-slim-pgd", 0},
{}
};
diff --git a/drivers/regulator/qpnp-regulator.c b/drivers/regulator/qpnp-regulator.c
index 8d592fb..0e836c7 100644
--- a/drivers/regulator/qpnp-regulator.c
+++ b/drivers/regulator/qpnp-regulator.c
@@ -268,8 +268,8 @@
};
static struct qpnp_voltage_range ftsmps_ranges[] = {
- VOLTAGE_RANGE(0, 80000, 350000, 1355000, 5000),
- VOLTAGE_RANGE(1, 160000, 1360000, 2710000, 10000),
+ VOLTAGE_RANGE(0, 0, 350000, 1275000, 5000),
+ VOLTAGE_RANGE(1, 0, 1280000, 2040000, 10000),
};
static struct qpnp_voltage_range boost_ranges[] = {
@@ -982,16 +982,26 @@
static int qpnp_regulator_match(struct qpnp_regulator *vreg)
{
const struct qpnp_regulator_mapping *mapping;
+ struct device_node *node = vreg->spmi_dev->dev.of_node;
int rc, i;
u8 raw_type[2], type, subtype;
+ u32 type_reg[2];
- rc = qpnp_vreg_read(vreg, QPNP_COMMON_REG_TYPE, raw_type, 2);
- if (rc) {
- vreg_err(vreg, "could not read type register, rc=%d\n", rc);
- return rc;
+ rc = of_property_read_u32_array(node, "qcom,force-type",
+ type_reg, 2);
+ if (!rc) {
+ type = type_reg[0];
+ subtype = type_reg[1];
+ } else {
+ rc = qpnp_vreg_read(vreg, QPNP_COMMON_REG_TYPE, raw_type, 2);
+ if (rc) {
+ vreg_err(vreg,
+ "could not read type register, rc=%d\n", rc);
+ return rc;
+ }
+ type = raw_type[0];
+ subtype = raw_type[1];
}
- type = raw_type[0];
- subtype = raw_type[1];
rc = -ENODEV;
for (i = 0; i < ARRAY_SIZE(supported_regulators); i++) {
diff --git a/drivers/usb/otg/msm_otg.c b/drivers/usb/otg/msm_otg.c
index 7a1760f..355990a 100644
--- a/drivers/usb/otg/msm_otg.c
+++ b/drivers/usb/otg/msm_otg.c
@@ -3397,7 +3397,7 @@
static int __init msm_otg_probe(struct platform_device *pdev)
{
- int ret = 0;
+ int ret = 0, disable_lpm = 0;
struct resource *res;
struct msm_otg *motg;
struct usb_phy *phy;
@@ -3415,6 +3415,8 @@
dev_err(&pdev->dev, "devices setup failed\n");
return ret;
}
+ /* LPM not supported on targets using DT */
+ disable_lpm = 1;
} else if (!pdev->dev.platform_data) {
dev_err(&pdev->dev, "No platform data given. Bailing out\n");
return -ENODEV;
@@ -3670,7 +3672,8 @@
wake_lock(&motg->wlock);
pm_runtime_set_active(&pdev->dev);
- pm_runtime_enable(&pdev->dev);
+ if (!disable_lpm)
+ pm_runtime_enable(&pdev->dev);
if (motg->pdata->bus_scale_table) {
motg->bus_perf_client =
diff --git a/drivers/video/msm/mdp.c b/drivers/video/msm/mdp.c
index 9614a2d..d911b62 100644
--- a/drivers/video/msm/mdp.c
+++ b/drivers/video/msm/mdp.c
@@ -1510,10 +1510,13 @@
#ifdef CONFIG_FB_MSM_NO_MDP_PIPE_CTRL
-static void mdp_clk_off(void)
+/*
+ * mdp_clk_disable_unprepare(void) called from thread context
+ */
+static void mdp_clk_disable_unprepare(void)
{
mb();
- vsync_clk_disable();
+ vsync_clk_disable_unprepare();
if (mdp_clk != NULL)
clk_disable_unprepare(mdp_clk);
@@ -1525,8 +1528,10 @@
clk_disable_unprepare(mdp_lut_clk);
}
-
-static void mdp_clk_on(void)
+/*
+ * mdp_clk_prepare_enable(void) called from thread context
+ */
+static void mdp_clk_prepare_enable(void)
{
if (mdp_clk != NULL)
clk_prepare_enable(mdp_clk);
@@ -1537,9 +1542,12 @@
if (mdp_lut_clk != NULL)
clk_prepare_enable(mdp_lut_clk);
- vsync_clk_enable();
+ vsync_clk_prepare_enable();
}
+/*
+ * mdp_clk_ctrl: called from thread context
+ */
void mdp_clk_ctrl(int on)
{
static int mdp_clk_cnt;
@@ -1547,13 +1555,13 @@
mutex_lock(&mdp_suspend_mutex);
if (on) {
if (mdp_clk_cnt == 0)
- mdp_clk_on();
+ mdp_clk_prepare_enable();
mdp_clk_cnt++;
} else {
if (mdp_clk_cnt) {
mdp_clk_cnt--;
if (mdp_clk_cnt == 0)
- mdp_clk_off();
+ mdp_clk_disable_unprepare();
}
}
mutex_unlock(&mdp_suspend_mutex);
@@ -2590,6 +2598,7 @@
else {
printk(KERN_ERR "Invalid Selection of destination panel\n");
rc = -ENODEV;
+ mdp_clk_ctrl(0);
goto mdp_probe_err;
}
@@ -2637,6 +2646,7 @@
else {
printk(KERN_ERR "Invalid Selection of destination panel\n");
rc = -ENODEV;
+ mdp_clk_ctrl(0);
goto mdp_probe_err;
}
INIT_WORK(&mfd->dma_update_worker,
@@ -2736,6 +2746,7 @@
pr_err("%s: writeback panel not supprted\n",
__func__);
platform_device_put(msm_fb_dev);
+ mdp_clk_ctrl(0);
return -ENODEV;
}
pdata->on = mdp4_overlay_writeback_on;
diff --git a/drivers/video/msm/mdp.h b/drivers/video/msm/mdp.h
index 12bd1d4..76d06a0 100644
--- a/drivers/video/msm/mdp.h
+++ b/drivers/video/msm/mdp.h
@@ -831,8 +831,8 @@
void mdp3_vsync_irq_disable(int intr, int term);
#ifdef MDP_HW_VSYNC
-void vsync_clk_enable(void);
-void vsync_clk_disable(void);
+void vsync_clk_prepare_enable(void);
+void vsync_clk_disable_unprepare(void);
void mdp_hw_vsync_clk_enable(struct msm_fb_data_type *mfd);
void mdp_hw_vsync_clk_disable(struct msm_fb_data_type *mfd);
void mdp_vsync_clk_disable(void);
diff --git a/drivers/video/msm/mdp4.h b/drivers/video/msm/mdp4.h
index 72e7c8f..767332a 100644
--- a/drivers/video/msm/mdp4.h
+++ b/drivers/video/msm/mdp4.h
@@ -665,24 +665,17 @@
uint32 mdp4_rgb_igc_lut_cvt(uint32 ndx);
void mdp4_vg_qseed_init(int);
int mdp4_overlay_blt(struct fb_info *info, struct msmfb_overlay_blt *req);
-int mdp4_overlay_blt_offset(struct fb_info *info,
- struct msmfb_overlay_blt *req);
-
#ifdef CONFIG_FB_MSM_MIPI_DSI
-int mdp4_dsi_overlay_blt_start(struct msm_fb_data_type *mfd);
-int mdp4_dsi_overlay_blt_stop(struct msm_fb_data_type *mfd);
+void mdp4_dsi_cmd_blt_start(struct msm_fb_data_type *mfd);
+void mdp4_dsi_cmd_blt_stop(struct msm_fb_data_type *mfd);
void mdp4_dsi_video_blt_start(struct msm_fb_data_type *mfd);
void mdp4_dsi_video_blt_stop(struct msm_fb_data_type *mfd);
-void mdp4_dsi_overlay_blt(struct msm_fb_data_type *mfd,
- struct msmfb_overlay_blt *req);
-int mdp4_dsi_overlay_blt_offset(struct msm_fb_data_type *mfd,
+void mdp4_dsi_cmd_overlay_blt(struct msm_fb_data_type *mfd,
struct msmfb_overlay_blt *req);
void mdp4_dsi_video_overlay_blt(struct msm_fb_data_type *mfd,
struct msmfb_overlay_blt *req);
-int mdp4_dsi_video_overlay_blt_offset(struct msm_fb_data_type *mfd,
- struct msmfb_overlay_blt *req);
void mdp4_dsi_video_base_swap(int cndx, struct mdp4_overlay_pipe *pipe);
#ifdef CONFIG_FB_MSM_MDP40
@@ -726,10 +719,9 @@
struct msm_fb_data_type *mfd, struct msmfb_overlay_blt *req)
{
}
-static inline int mdp4_dsi_video_overlay_blt_offset(
+static inline void mdp4_dsi_cmd_overlay_blt(
struct msm_fb_data_type *mfd, struct msmfb_overlay_blt *req)
{
- return -ENODEV;
}
static inline void mdp4_dsi_video_base_swap(int cndx,
struct mdp4_overlay_pipe *pipe)
diff --git a/drivers/video/msm/mdp4_overlay.c b/drivers/video/msm/mdp4_overlay.c
index b3f0b81..9fe5214 100644
--- a/drivers/video/msm/mdp4_overlay.c
+++ b/drivers/video/msm/mdp4_overlay.c
@@ -475,14 +475,18 @@
dma2_cfg_reg |= DMA_PACK_PATTERN_RGB;
- if (mfd->panel_info.bpp == 18) {
+ if ((mfd->panel_info.type == MIPI_CMD_PANEL) ||
+ (mfd->panel_info.type == MIPI_VIDEO_PANEL)) {
+ dma2_cfg_reg |= DMA_DSTC0G_8BITS | /* 888 24BPP */
+ DMA_DSTC1B_8BITS | DMA_DSTC2R_8BITS;
+ } else if (mfd->panel_info.bpp == 18) {
dma2_cfg_reg |= DMA_DSTC0G_6BITS | /* 666 18BPP */
DMA_DSTC1B_6BITS | DMA_DSTC2R_6BITS;
} else if (mfd->panel_info.bpp == 16) {
dma2_cfg_reg |= DMA_DSTC0G_6BITS | /* 565 16BPP */
DMA_DSTC1B_5BITS | DMA_DSTC2R_5BITS;
} else {
- dma2_cfg_reg |= DMA_DSTC0G_8BITS | /* 888 16BPP */
+ dma2_cfg_reg |= DMA_DSTC0G_8BITS | /* 888 24BPP */
DMA_DSTC1B_8BITS | DMA_DSTC2R_8BITS;
}
@@ -2522,7 +2526,7 @@
return -EINTR;
if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD)
- mdp4_dsi_overlay_blt(mfd, req);
+ mdp4_dsi_cmd_overlay_blt(mfd, req);
else if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO)
mdp4_dsi_video_overlay_blt(mfd, req);
else if (ctrl->panel_mode & MDP4_PANEL_LCDC)
@@ -2650,49 +2654,6 @@
}
}
-static void mdp4_overlay_update_blt_mode(struct msm_fb_data_type *mfd)
-{
- if (mfd->use_ov0_blt == mfd->ov0_blt_state)
- return;
-
- if (mfd->use_ov0_blt) {
- if (mfd->panel_info.type == LCDC_PANEL ||
- mfd->panel_info.type == LVDS_PANEL)
- mdp4_lcdc_overlay_blt_start(mfd);
- else if (mfd->panel_info.type == MIPI_VIDEO_PANEL)
- mdp4_dsi_video_blt_start(mfd);
- else if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD)
- mdp4_dsi_overlay_blt_start(mfd);
- else if (ctrl->panel_mode & MDP4_PANEL_MDDI)
- mdp4_mddi_overlay_blt_start(mfd);
- } else {
- if (mfd->panel_info.type == LCDC_PANEL ||
- mfd->panel_info.type == LVDS_PANEL)
- mdp4_lcdc_overlay_blt_stop(mfd);
- else if (mfd->panel_info.type == MIPI_VIDEO_PANEL)
- mdp4_dsi_video_blt_stop(mfd);
- else if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD)
- mdp4_dsi_overlay_blt_stop(mfd);
- else if (ctrl->panel_mode & MDP4_PANEL_MDDI)
- mdp4_mddi_overlay_blt_stop(mfd);
- }
- mfd->ov0_blt_state = mfd->use_ov0_blt;
-}
-
-static void mdp4_overlay1_update_blt_mode(struct msm_fb_data_type *mfd)
-{
- if (mfd->ov1_blt_state == mfd->use_ov1_blt)
- return;
- if (mfd->use_ov1_blt) {
- mdp4_dtv_overlay_blt_start(mfd);
- pr_debug("%s overlay1 writeback is enabled\n", __func__);
- } else {
- mdp4_dtv_overlay_blt_stop(mfd);
- pr_debug("%s overlay1 writeback is disabled\n", __func__);
- }
- mfd->ov1_blt_state = mfd->use_ov1_blt;
-}
-
static u32 mdp4_overlay_blt_enable(struct mdp_overlay *req,
struct msm_fb_data_type *mfd, uint32 perf_level)
{
@@ -2920,12 +2881,10 @@
}
mfd->use_ov0_blt &= ~(1 << (pipe->pipe_ndx-1));
- mdp4_overlay_update_blt_mode(mfd);
} else { /* mixer1, DTV, ATV */
if (ctrl->panel_mode & MDP4_PANEL_DTV) {
mdp4_overlay_dtv_unset(mfd, pipe);
mfd->use_ov1_blt &= ~(1 << (pipe->pipe_ndx-1));
- mdp4_overlay1_update_blt_mode(mfd);
}
}
@@ -2956,16 +2915,22 @@
int mdp4_overlay_vsync_ctrl(struct fb_info *info, int enable)
{
+ int cmd;
+
+ if (enable)
+ cmd = 1;
+ else
+ cmd = 0;
+
if (!hdmi_prim_display && info->node == 0) {
if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO)
- mdp4_dsi_video_vsync_ctrl(0, enable);
+ mdp4_dsi_video_vsync_ctrl(0, cmd);
else if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD)
- mdp4_dsi_cmd_vsync_ctrl(0, enable);
+ mdp4_dsi_cmd_vsync_ctrl(0, cmd);
else if (ctrl->panel_mode & MDP4_PANEL_LCDC)
- mdp4_lcdc_vsync_ctrl(0, enable);
- } else if (hdmi_prim_display || info->node == 1) {
- mdp4_dtv_vsync_ctrl(0, enable);
- }
+ mdp4_lcdc_vsync_ctrl(0, cmd);
+ } else if (hdmi_prim_display || info->node == 1)
+ mdp4_dtv_vsync_ctrl(0, cmd);
return 0;
}
@@ -3182,12 +3147,6 @@
}
}
- if (mfd->use_ov0_blt)
- mdp4_overlay_update_blt_mode(mfd);
-
- if (mfd->use_ov1_blt)
- mdp4_overlay1_update_blt_mode(mfd);
-
if (ctrl->panel_mode & MDP4_PANEL_MDDI)
goto mddi;
diff --git a/drivers/video/msm/mdp4_overlay_dsi_cmd.c b/drivers/video/msm/mdp4_overlay_dsi_cmd.c
index 1781344..e1fa02e 100644
--- a/drivers/video/msm/mdp4_overlay_dsi_cmd.c
+++ b/drivers/video/msm/mdp4_overlay_dsi_cmd.c
@@ -39,7 +39,7 @@
static int vsync_start_y_adjust = 4;
#define MAX_CONTROLLER 1
-#define VSYNC_EXPIRE_TICK 2
+#define VSYNC_EXPIRE_TICK 4
#define BACKLIGHT_MAX 4
struct backlight {
@@ -54,24 +54,34 @@
int inited;
int update_ndx;
int expire_tick;
- uint32 dmap_intr_tot;
+ int blt_wait;
+ u32 ov_koff;
+ u32 ov_done;
+ u32 dmap_koff;
+ u32 dmap_done;
uint32 rdptr_intr_tot;
uint32 rdptr_sirq_tot;
atomic_t suspend;
- int dmap_wait_cnt;
int wait_vsync_cnt;
- int commit_cnt;
+ int blt_change;
+ int blt_free;
+ int blt_end;
+ int fake_vsync;
struct mutex update_lock;
+ struct completion ov_comp;
struct completion dmap_comp;
struct completion vsync_comp;
- spinlock_t dmap_spin_lock;
spinlock_t spin_lock;
+ struct msm_fb_data_type *mfd;
struct mdp4_overlay_pipe *base_pipe;
struct vsync_update vlist[2];
struct backlight blight;
- int vsync_irq_enabled;
+ int vsync_enabled;
+ int clk_enabled;
+ int clk_control;
ktime_t vsync_time;
struct work_struct vsync_work;
+ struct work_struct clk_work;
} vsync_ctrl_db[MAX_CONTROLLER];
static void vsync_irq_enable(int intr, int term)
@@ -80,7 +90,6 @@
spin_lock_irqsave(&mdp_spin_lock, flag);
/* no need to clrear other interrupts for comamnd mode */
- outp32(MDP_INTR_CLEAR, INTR_PRIMARY_RDPTR);
mdp_intr_mask |= intr;
outp32(MDP_INTR_ENABLE, mdp_intr_mask);
mdp_enable_irq(term);
@@ -161,30 +170,7 @@
return cnt;
}
-void mdp4_blt_dmap_cfg(struct mdp4_overlay_pipe *pipe)
-{
- uint32 off, addr;
- int bpp;
-
- if (pipe->ov_blt_addr == 0)
- return;
-
-#ifdef BLT_RGB565
- bpp = 2; /* overlay ouput is RGB565 */
-#else
- bpp = 3; /* overlay ouput is RGB888 */
-#endif
- off = 0;
- if (pipe->blt_dmap_done & 0x01)
- off = pipe->src_height * pipe->src_width * bpp;
- addr = pipe->dma_blt_addr + off;
-
- /* dmap */
- MDP_OUTP(MDP_BASE + 0x90008, addr);
-}
-
-
-void mdp4_blt_overlay0_cfg(struct mdp4_overlay_pipe *pipe)
+static void mdp4_dsi_cmd_blt_ov_update(struct mdp4_overlay_pipe *pipe)
{
uint32 off, addr;
int bpp;
@@ -199,7 +185,7 @@
bpp = 3; /* overlay ouput is RGB888 */
#endif
off = 0;
- if (pipe->blt_ov_done & 0x01)
+ if (pipe->ov_cnt & 0x01)
off = pipe->src_height * pipe->src_width * bpp;
addr = pipe->ov_blt_addr + off;
/* overlay 0 */
@@ -208,32 +194,91 @@
outpdw(overlay_base + 0x001c, addr);
}
-static void vsync_commit_kickoff_dmap(struct mdp4_overlay_pipe *pipe)
+static void mdp4_dsi_cmd_blt_dmap_update(struct mdp4_overlay_pipe *pipe)
{
- if (mipi_dsi_ctrl_lock(1)) {
- mdp4_stat.kickoff_dmap++;
- pipe->blt_dmap_koff++;
- vsync_irq_enable(INTR_DMA_P_DONE, MDP_DMAP_TERM);
- outpdw(MDP_BASE + 0x000c, 0); /* kickoff dmap engine */
- mb();
- }
+ uint32 off, addr;
+ int bpp;
+
+ if (pipe->ov_blt_addr == 0)
+ return;
+
+#ifdef BLT_RGB565
+ bpp = 2; /* overlay ouput is RGB565 */
+#else
+ bpp = 3; /* overlay ouput is RGB888 */
+#endif
+ off = 0;
+ if (pipe->dmap_cnt & 0x01)
+ off = pipe->src_height * pipe->src_width * bpp;
+ addr = pipe->dma_blt_addr + off;
+
+ /* dmap */
+ MDP_OUTP(MDP_BASE + 0x90008, addr);
}
-static void vsync_commit_kickoff_ov0(struct mdp4_overlay_pipe *pipe, int blt)
+static void mdp4_dsi_cmd_wait4dmap(int cndx);
+static void mdp4_dsi_cmd_wait4ov(int cndx);
+
+static void mdp4_dsi_cmd_do_blt(struct msm_fb_data_type *mfd, int enable)
{
- int locked = 1;
+ unsigned long flags;
+ int cndx = 0;
+ struct vsycn_ctrl *vctrl;
+ struct mdp4_overlay_pipe *pipe;
+ int need_wait;
- if (blt)
- vsync_irq_enable(INTR_OVERLAY0_DONE, MDP_OVERLAY0_TERM);
- else
- locked = mipi_dsi_ctrl_lock(1);
+ vctrl = &vsync_ctrl_db[cndx];
+ pipe = vctrl->base_pipe;
- if (locked) {
- mdp4_stat.kickoff_ov0++;
- pipe->blt_ov_koff++;
- outpdw(MDP_BASE + 0x0004, 0); /* kickoff overlay engine */
- mb();
+ mdp4_allocate_writeback_buf(mfd, MDP4_MIXER0);
+
+ if (mfd->ov0_wb_buf->write_addr == 0) {
+ pr_err("%s: no blt_base assigned\n", __func__);
+ return;
}
+
+ spin_lock_irqsave(&vctrl->spin_lock, flags);
+ if (enable && pipe->ov_blt_addr == 0) {
+ vctrl->blt_change++;
+ if (vctrl->dmap_koff != vctrl->dmap_done) {
+ INIT_COMPLETION(vctrl->dmap_comp);
+ need_wait = 1;
+ }
+ } else if (enable == 0 && pipe->ov_blt_addr) {
+ vctrl->blt_change++;
+ if (vctrl->ov_koff != vctrl->dmap_done) {
+ INIT_COMPLETION(vctrl->dmap_comp);
+ need_wait = 1;
+ }
+ }
+ spin_unlock_irqrestore(&vctrl->spin_lock, flags);
+
+ if (need_wait)
+ mdp4_dsi_cmd_wait4dmap(0);
+
+ spin_lock_irqsave(&vctrl->spin_lock, flags);
+ if (enable && pipe->ov_blt_addr == 0) {
+ pipe->ov_blt_addr = mfd->ov0_wb_buf->write_addr;
+ pipe->dma_blt_addr = mfd->ov0_wb_buf->read_addr;
+ pipe->ov_cnt = 0;
+ pipe->dmap_cnt = 0;
+ vctrl->ov_koff = vctrl->dmap_koff;
+ vctrl->ov_done = vctrl->dmap_done;
+ vctrl->blt_free = 0;
+ vctrl->blt_wait = 0;
+ vctrl->blt_end = 0;
+ mdp4_stat.blt_dsi_video++;
+ } else if (enable == 0 && pipe->ov_blt_addr) {
+ pipe->ov_blt_addr = 0;
+ pipe->dma_blt_addr = 0;
+ vctrl->blt_end = 1;
+ vctrl->blt_free = 4; /* 4 commits to free wb buf */
+ }
+
+ pr_debug("%s: changed=%d enable=%d ov_blt_addr=%x\n", __func__,
+ vctrl->blt_change, enable, (int)pipe->ov_blt_addr);
+
+ spin_unlock_irqrestore(&vctrl->spin_lock, flags);
}
/*
@@ -266,95 +311,137 @@
pr_debug("%s: vndx=%d pipe_ndx=%d expire=%x pid=%d\n", __func__,
undx, pipe->pipe_ndx, vctrl->expire_tick, current->pid);
- *pp = *pipe; /* keep it */
+ *pp = *pipe; /* clone it */
vp->update_cnt++;
- if (vctrl->expire_tick == 0) {
- mipi_dsi_clk_cfg(1);
- mdp_clk_ctrl(1);
- vsync_irq_enable(INTR_PRIMARY_RDPTR, MDP_PRIM_RDPTR_TERM);
- }
- vctrl->expire_tick = VSYNC_EXPIRE_TICK;
mutex_unlock(&vctrl->update_lock);
+ mdp4_stat.overlay_play[pipe->mixer_num]++;
}
+static void mdp4_dsi_cmd_blt_ov_update(struct mdp4_overlay_pipe *pipe);
+
int mdp4_dsi_cmd_pipe_commit(void)
{
-
- int i, undx, cnt;
+ int i, undx;
int mixer = 0;
struct vsycn_ctrl *vctrl;
struct vsync_update *vp;
struct mdp4_overlay_pipe *pipe;
unsigned long flags;
- int diff;
+ int need_dmap_wait = 0;
+ int need_ov_wait = 0;
+ int cnt = 0;
vctrl = &vsync_ctrl_db[0];
+
mutex_lock(&vctrl->update_lock);
undx = vctrl->update_ndx;
vp = &vctrl->vlist[undx];
pipe = vctrl->base_pipe;
mixer = pipe->mixer_num;
- pr_debug("%s: vndx=%d cnt=%d expire=%x pid=%d\n", __func__,
- undx, vp->update_cnt, vctrl->expire_tick, current->pid);
-
- cnt = 0;
if (vp->update_cnt == 0) {
mutex_unlock(&vctrl->update_lock);
return cnt;
}
+
vctrl->update_ndx++;
vctrl->update_ndx &= 0x01;
- vctrl->commit_cnt++;
- vp->update_cnt = 0; /* reset */
+ vp->update_cnt = 0; /* reset */
+ if (vctrl->blt_free) {
+ vctrl->blt_free--;
+ if (vctrl->blt_free == 0)
+ mdp4_free_writeback_buf(vctrl->mfd, mixer);
+ }
mutex_unlock(&vctrl->update_lock);
+
mdp4_backlight_commit_level(vctrl);
/* free previous committed iommu back to pool */
mdp4_overlay_iommu_unmap_freelist(mixer);
+ spin_lock_irqsave(&vctrl->spin_lock, flags);
+ if (pipe->ov_blt_addr) {
+ /* Blt */
+ if (vctrl->blt_wait)
+ need_dmap_wait = 1;
+ else if (vctrl->ov_koff != vctrl->ov_done) {
+ INIT_COMPLETION(vctrl->ov_comp);
+ need_ov_wait = 1;
+ }
+ } else {
+ /* direct out */
+ if (vctrl->dmap_koff != vctrl->dmap_done) {
+ INIT_COMPLETION(vctrl->dmap_comp);
+ pr_debug("%s: wait, ok=%d od=%d dk=%d dd=%d cpu=%d\n",
+ __func__, vctrl->ov_koff, vctrl->ov_done,
+ vctrl->dmap_koff, vctrl->dmap_done, smp_processor_id());
+ need_dmap_wait = 1;
+ }
+ }
+ spin_unlock_irqrestore(&vctrl->spin_lock, flags);
+
+ if (need_dmap_wait) {
+ pr_debug("%s: wait4dmap\n", __func__);
+ mdp4_dsi_cmd_wait4dmap(0);
+ }
+
+ if (need_ov_wait) {
+ pr_debug("%s: wait4ov\n", __func__);
+ mdp4_dsi_cmd_wait4ov(0);
+ }
+
+ if (pipe->ov_blt_addr) {
+ if (vctrl->blt_end) {
+ vctrl->blt_end = 0;
+ pipe->ov_blt_addr = 0;
+ pipe->dma_blt_addr = 0;
+ }
+ }
+
+ if (vctrl->blt_change) {
+ mdp4_overlayproc_cfg(pipe);
+ mdp4_overlay_dmap_xy(pipe);
+ vctrl->blt_change = 0;
+ }
+
pipe = vp->plist;
for (i = 0; i < OVERLAY_PIPE_MAX; i++, pipe++) {
if (pipe->pipe_used) {
cnt++;
mdp4_overlay_vsync_commit(pipe);
/* free previous iommu to freelist
- * which will be freed at next
- * pipe_commit
- */
+ * which will be freed at next
+ * pipe_commit
+ */
mdp4_overlay_iommu_pipe_free(pipe->pipe_ndx, 0);
pipe->pipe_used = 0; /* clear */
}
}
+
mdp4_mixer_stage_commit(mixer);
-
- pr_debug("%s: intr=%d expire=%d cpu=%d\n", __func__,
- vctrl->rdptr_intr_tot, vctrl->expire_tick, smp_processor_id());
-
- spin_lock_irqsave(&vctrl->spin_lock, flags);
pipe = vctrl->base_pipe;
- if (pipe->blt_changed) {
- /* blt configurtion changed */
- pipe->blt_changed = 0;
- mdp4_overlayproc_cfg(pipe);
- mdp4_overlay_dmap_xy(pipe);
- }
-
+ spin_lock_irqsave(&vctrl->spin_lock, flags);
if (pipe->ov_blt_addr) {
- diff = pipe->blt_ov_koff - pipe->blt_ov_done;
- if (diff < 1) {
- mdp4_blt_overlay0_cfg(pipe);
- vsync_commit_kickoff_ov0(pipe, 1);
- }
+ mdp4_dsi_cmd_blt_ov_update(pipe);
+ pipe->ov_cnt++;
+ vctrl->ov_koff++;
+ vsync_irq_enable(INTR_OVERLAY0_DONE, MDP_OVERLAY0_TERM);
} else {
- vsync_commit_kickoff_ov0(pipe, 0);
+ vsync_irq_enable(INTR_DMA_P_DONE, MDP_DMAP_TERM);
+ vctrl->dmap_koff++;
}
-
+ pr_debug("%s: kickoff\n", __func__);
+ /* kickoff overlay engine */
+ mdp4_stat.kickoff_ov0++;
+ outpdw(MDP_BASE + 0x0004, 0);
+ mb(); /* make sure kickoff ececuted */
spin_unlock_irqrestore(&vctrl->spin_lock, flags);
+ mdp4_stat.overlay_commit[pipe->mixer_num]++;
+
return cnt;
}
@@ -369,23 +456,15 @@
vctrl = &vsync_ctrl_db[cndx];
- if (vctrl->vsync_irq_enabled == enable)
+ if (enable && vctrl->fake_vsync) {
+ vctrl->fake_vsync = 0;
+ schedule_work(&vctrl->vsync_work);
+ }
+
+ if (vctrl->vsync_enabled == enable)
return;
- vctrl->vsync_irq_enabled = enable;
-
- mutex_lock(&vctrl->update_lock);
- if (enable) {
- mipi_dsi_clk_cfg(1);
- mdp_clk_ctrl(1);
- vsync_irq_enable(INTR_PRIMARY_RDPTR, MDP_PRIM_RDPTR_TERM);
- } else {
- mipi_dsi_clk_cfg(0);
- mdp_clk_ctrl(0);
- vsync_irq_disable(INTR_PRIMARY_RDPTR, MDP_PRIM_RDPTR_TERM);
- vctrl->expire_tick = 0;
- }
- mutex_unlock(&vctrl->update_lock);
+ vctrl->vsync_enabled = enable;
}
void mdp4_dsi_cmd_wait4vsync(int cndx, long long *vtime)
@@ -402,8 +481,10 @@
vctrl = &vsync_ctrl_db[cndx];
pipe = vctrl->base_pipe;
- if (atomic_read(&vctrl->suspend) > 0)
+ if (atomic_read(&vctrl->suspend) > 0) {
+ *vtime = -1;
return;
+ }
spin_lock_irqsave(&vctrl->spin_lock, flags);
if (vctrl->wait_vsync_cnt == 0)
@@ -412,10 +493,44 @@
spin_unlock_irqrestore(&vctrl->spin_lock, flags);
wait_for_completion(&vctrl->vsync_comp);
+ mdp4_stat.wait4vsync0++;
*vtime = ktime_to_ns(vctrl->vsync_time);
}
+static void mdp4_dsi_cmd_wait4dmap(int cndx)
+{
+ struct vsycn_ctrl *vctrl;
+
+ if (cndx >= MAX_CONTROLLER) {
+ pr_err("%s: out or range: cndx=%d\n", __func__, cndx);
+ return;
+ }
+
+ vctrl = &vsync_ctrl_db[cndx];
+
+ if (atomic_read(&vctrl->suspend) > 0)
+ return;
+
+ wait_for_completion(&vctrl->dmap_comp);
+}
+
+static void mdp4_dsi_cmd_wait4ov(int cndx)
+{
+ struct vsycn_ctrl *vctrl;
+
+ if (cndx >= MAX_CONTROLLER) {
+ pr_err("%s: out or range: cndx=%d\n", __func__, cndx);
+ return;
+ }
+
+ vctrl = &vsync_ctrl_db[cndx];
+
+ if (atomic_read(&vctrl->suspend) > 0)
+ return;
+
+ wait_for_completion(&vctrl->ov_comp);
+}
/*
* primary_rdptr_isr:
@@ -427,10 +542,17 @@
struct vsycn_ctrl *vctrl;
vctrl = &vsync_ctrl_db[cndx];
- pr_debug("%s: cpu=%d\n", __func__, smp_processor_id());
+ pr_debug("%s: ISR, cpu=%d\n", __func__, smp_processor_id());
vctrl->rdptr_intr_tot++;
vctrl->vsync_time = ktime_get();
schedule_work(&vctrl->vsync_work);
+
+ spin_lock(&vctrl->spin_lock);
+ if (vctrl->wait_vsync_cnt) {
+ complete(&vctrl->vsync_comp);
+ vctrl->wait_vsync_cnt = 0;
+ }
+ spin_unlock(&vctrl->spin_lock);
}
void mdp4_dmap_done_dsi_cmd(int cndx)
@@ -439,35 +561,34 @@
struct mdp4_overlay_pipe *pipe;
int diff;
- vsync_irq_disable(INTR_DMA_P_DONE, MDP_DMAP_TERM);
-
vctrl = &vsync_ctrl_db[cndx];
- vctrl->dmap_intr_tot++;
pipe = vctrl->base_pipe;
- if (pipe->ov_blt_addr == 0) {
- mdp4_overlay_dma_commit(cndx);
- return;
- }
-
/* blt enabled */
spin_lock(&vctrl->spin_lock);
- pipe->blt_dmap_done++;
- diff = pipe->blt_ov_done - pipe->blt_dmap_done;
- spin_unlock(&vctrl->spin_lock);
- pr_debug("%s: ov_done=%d dmap_done=%d ov_koff=%d dmap_koff=%d\n",
- __func__, pipe->blt_ov_done, pipe->blt_dmap_done,
- pipe->blt_ov_koff, pipe->blt_dmap_koff);
+ vsync_irq_disable(INTR_DMA_P_DONE, MDP_DMAP_TERM);
+ vctrl->dmap_done++;
+ diff = vctrl->ov_done - vctrl->dmap_done;
+ pr_debug("%s: ov_koff=%d ov_done=%d dmap_koff=%d dmap_done=%d cpu=%d\n",
+ __func__, vctrl->ov_koff, vctrl->ov_done, vctrl->dmap_koff,
+ vctrl->dmap_done, smp_processor_id());
+ complete_all(&vctrl->dmap_comp);
if (diff <= 0) {
- if (pipe->blt_end) {
- pipe->blt_end = 0;
- pipe->ov_blt_addr = 0;
- pipe->dma_blt_addr = 0;
- pipe->blt_changed = 1;
- pr_info("%s: BLT-END\n", __func__);
- }
+ if (vctrl->blt_wait)
+ vctrl->blt_wait = 0;
+ spin_unlock(&vctrl->spin_lock);
+ return;
}
- spin_unlock(&dsi_clk_lock);
+
+ /* kick dmap */
+ mdp4_dsi_cmd_blt_dmap_update(pipe);
+ pipe->dmap_cnt++;
+ mdp4_stat.kickoff_dmap++;
+ vctrl->dmap_koff++;
+ vsync_irq_enable(INTR_DMA_P_DONE, MDP_DMAP_TERM);
+ outpdw(MDP_BASE + 0x000c, 0); /* kickoff dmap engine */
+ mb(); /* make sure kickoff executed */
+ spin_unlock(&vctrl->spin_lock);
}
/*
@@ -479,30 +600,61 @@
struct mdp4_overlay_pipe *pipe;
int diff;
- vsync_irq_disable(INTR_OVERLAY0_DONE, MDP_OVERLAY0_TERM);
-
vctrl = &vsync_ctrl_db[cndx];
pipe = vctrl->base_pipe;
spin_lock(&vctrl->spin_lock);
- pipe->blt_ov_done++;
- diff = pipe->blt_ov_done - pipe->blt_dmap_done;
- spin_unlock(&vctrl->spin_lock);
+ vsync_irq_disable(INTR_OVERLAY0_DONE, MDP_OVERLAY0_TERM);
+ vctrl->ov_done++;
+ complete_all(&vctrl->ov_comp);
+ diff = vctrl->ov_done - vctrl->dmap_done;
- pr_debug("%s: ov_done=%d dmap_done=%d ov_koff=%d dmap_koff=%d diff=%d\n",
- __func__, pipe->blt_ov_done, pipe->blt_dmap_done,
- pipe->blt_ov_koff, pipe->blt_dmap_koff, diff);
+ pr_debug("%s: ov_koff=%d ov_done=%d dmap_koff=%d dmap_done=%d cpu=%d\n",
+ __func__, vctrl->ov_koff, vctrl->ov_done, vctrl->dmap_koff,
+ vctrl->dmap_done, smp_processor_id());
if (pipe->ov_blt_addr == 0) {
/* blt disabled */
- pr_debug("%s: NON-BLT\n", __func__);
+ spin_unlock(&vctrl->spin_lock);
return;
}
- if (diff == 1) {
- mdp4_blt_dmap_cfg(pipe);
- vsync_commit_kickoff_dmap(pipe);
+ if (diff > 1) {
+ /*
+ * two overlay_done and none dmap_done yet
+ * let dmap_done kickoff dmap
+ * and put pipe_commit to wait
+ */
+ vctrl->blt_wait = 1;
+ pr_debug("%s: blt_wait set\n", __func__);
+ spin_unlock(&vctrl->spin_lock);
+ return;
}
+ mdp4_dsi_cmd_blt_dmap_update(pipe);
+ pipe->dmap_cnt++;
+ mdp4_stat.kickoff_dmap++;
+ vctrl->dmap_koff++;
+ vsync_irq_enable(INTR_DMA_P_DONE, MDP_DMAP_TERM);
+ outpdw(MDP_BASE + 0x000c, 0); /* kickoff dmap engine */
+ mb(); /* make sure kickoff executed */
+ spin_unlock(&vctrl->spin_lock);
+}
+
+static void clk_ctrl_work(struct work_struct *work)
+{
+ struct vsycn_ctrl *vctrl =
+ container_of(work, typeof(*vctrl), clk_work);
+
+ mutex_lock(&vctrl->update_lock);
+ if (vctrl->clk_control) {
+ if (vctrl->clk_enabled) {
+ mdp_clk_ctrl(0);
+ vctrl->clk_enabled = 0;
+ vctrl->fake_vsync = 1;
+ }
+ }
+
+ mutex_unlock(&vctrl->update_lock);
}
static void send_vsync_work(struct work_struct *work)
@@ -539,11 +691,12 @@
vctrl->blight.get = 0;
vctrl->blight.tot = 0;
mutex_init(&vctrl->update_lock);
- init_completion(&vctrl->vsync_comp);
+ init_completion(&vctrl->ov_comp);
init_completion(&vctrl->dmap_comp);
+ init_completion(&vctrl->vsync_comp);
spin_lock_init(&vctrl->spin_lock);
- spin_lock_init(&vctrl->dmap_spin_lock);
INIT_WORK(&vctrl->vsync_work, send_vsync_work);
+ INIT_WORK(&vctrl->clk_work, clk_ctrl_work);
}
void mdp4_primary_rdptr(void)
@@ -701,7 +854,7 @@
pipe->ov_blt_addr = 0;
pipe->dma_blt_addr = 0;
- MDP_OUTP(MDP_BASE + 0x021c, 0x10); /* read pointer */
+ MDP_OUTP(MDP_BASE + 0x021c, 10); /* read pointer */
/*
* configure dsi stream id
@@ -727,8 +880,6 @@
/* MDP cmd block disable */
mdp_clk_ctrl(0);
-
- wmb();
}
/* 3D side by side */
@@ -808,78 +959,20 @@
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
}
-int mdp4_dsi_overlay_blt_start(struct msm_fb_data_type *mfd)
+void mdp4_dsi_cmd_blt_start(struct msm_fb_data_type *mfd)
{
- unsigned long flag;
- int cndx = 0;
- struct vsycn_ctrl *vctrl;
- struct mdp4_overlay_pipe *pipe;
-
- vctrl = &vsync_ctrl_db[cndx];
- pipe = vctrl->base_pipe;
-
- pr_debug("%s: blt_end=%d blt_addr=%x pid=%d\n",
- __func__, pipe->blt_end, (int)pipe->ov_blt_addr, current->pid);
-
- mdp4_allocate_writeback_buf(mfd, MDP4_MIXER0);
-
- if (mfd->ov0_wb_buf->write_addr == 0) {
- pr_err("%s: no blt_base assigned\n", __func__);
- return -EBUSY;
- }
-
- if (pipe->ov_blt_addr == 0) {
- spin_lock_irqsave(&vctrl->spin_lock, flag);
- pipe->blt_end = 0;
- pipe->blt_cnt = 0;
- pipe->blt_changed = 1;
- pipe->ov_cnt = 0;
- pipe->dmap_cnt = 0;
- pipe->blt_ov_koff = 0;
- pipe->blt_dmap_koff = 0;
- pipe->blt_ov_done = 0;
- pipe->blt_dmap_done = 0;
- pipe->ov_blt_addr = mfd->ov0_wb_buf->write_addr;
- pipe->dma_blt_addr = mfd->ov0_wb_buf->read_addr;
- mdp4_stat.blt_dsi_cmd++;
- spin_unlock_irqrestore(&vctrl->spin_lock, flag);
- return 0;
- }
-
- return -EBUSY;
+ mdp4_dsi_cmd_do_blt(mfd, 1);
}
-int mdp4_dsi_overlay_blt_stop(struct msm_fb_data_type *mfd)
+void mdp4_dsi_cmd_blt_stop(struct msm_fb_data_type *mfd)
{
- unsigned long flag;
- int cndx = 0;
- struct vsycn_ctrl *vctrl;
- struct mdp4_overlay_pipe *pipe;
-
- vctrl = &vsync_ctrl_db[cndx];
- pipe = vctrl->base_pipe;
-
- pr_info("%s: blt_end=%d blt_addr=%x pid=%d\n",
- __func__, pipe->blt_end, (int)pipe->ov_blt_addr, current->pid);
-
- if ((pipe->blt_end == 0) && pipe->ov_blt_addr) {
- spin_lock_irqsave(&vctrl->spin_lock, flag);
- pipe->blt_end = 1; /* mark as end */
- spin_unlock_irqrestore(&vctrl->spin_lock, flag);
- return 0;
- }
-
- return -EBUSY;
+ mdp4_dsi_cmd_do_blt(mfd, 0);
}
-void mdp4_dsi_overlay_blt(struct msm_fb_data_type *mfd,
+void mdp4_dsi_cmd_overlay_blt(struct msm_fb_data_type *mfd,
struct msmfb_overlay_blt *req)
{
- if (req->enable)
- mdp4_dsi_overlay_blt_start(mfd);
- else if (req->enable == 0)
- mdp4_dsi_overlay_blt_stop(mfd);
-
+ mdp4_dsi_cmd_do_blt(mfd, req->enable);
}
int mdp4_dsi_cmd_on(struct platform_device *pdev)
@@ -894,9 +987,11 @@
mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev);
vctrl = &vsync_ctrl_db[cndx];
+ vctrl->mfd = mfd;
vctrl->dev = mfd->fbi->dev;
mdp_clk_ctrl(1);
+ vsync_irq_enable(INTR_PRIMARY_RDPTR, MDP_PRIM_RDPTR_TERM);
if (vctrl->base_pipe == NULL)
mdp4_overlay_update_dsi_cmd(mfd);
@@ -931,16 +1026,16 @@
atomic_set(&vctrl->suspend, 1);
- /* make sure dsi clk is on so that
- * at panel_next_off() dsi panel can be shut off
- */
- mipi_dsi_ahb_ctrl(1);
- mipi_dsi_clk_enable();
+ mipi_dsi_cmd_backlight_tx(150);
mdp4_mixer_stage_down(pipe);
mdp4_overlay_pipe_free(pipe);
vctrl->base_pipe = NULL;
+ vctrl->fake_vsync = 1;
+
+ vsync_irq_disable(INTR_PRIMARY_RDPTR, MDP_PRIM_RDPTR_TERM);
+
pr_info("%s-:\n", __func__);
/*
@@ -983,12 +1078,14 @@
int cndx = 0;
struct vsycn_ctrl *vctrl;
struct mdp4_overlay_pipe *pipe;
+ long long xx;
vctrl = &vsync_ctrl_db[cndx];
if (!mfd->panel_power_on)
return;
+ vctrl->clk_control = 0;
pipe = vctrl->base_pipe;
if (pipe == NULL) {
pr_err("%s: NO base pipe\n", __func__);
@@ -1000,5 +1097,19 @@
mdp4_overlay_setup_pipe_addr(mfd, pipe);
mdp4_dsi_cmd_pipe_queue(0, pipe);
}
+
+ if (mfd->use_ov0_blt != mfd->ov0_blt_state) {
+
+ if (mfd->use_ov0_blt)
+ mdp4_dsi_cmd_do_blt(mfd, 1);
+ else
+ mdp4_dsi_cmd_do_blt(mfd, 0);
+
+ mfd->ov0_blt_state = mfd->use_ov0_blt;
+ }
+
mdp4_dsi_cmd_pipe_commit();
+ mdp4_dsi_cmd_wait4vsync(0, &xx);
+ vctrl->expire_tick = VSYNC_EXPIRE_TICK;
+ vctrl->clk_control = 1;
}
diff --git a/drivers/video/msm/mdp4_overlay_dsi_video.c b/drivers/video/msm/mdp4_overlay_dsi_video.c
index 9f1bfda..340faa2 100644
--- a/drivers/video/msm/mdp4_overlay_dsi_video.c
+++ b/drivers/video/msm/mdp4_overlay_dsi_video.c
@@ -997,6 +997,16 @@
mdp4_dsi_video_pipe_queue(0, pipe);
}
+ if (mfd->use_ov0_blt != mfd->ov0_blt_state) {
+
+ if (mfd->use_ov0_blt)
+ mdp4_dsi_video_do_blt(mfd, 1);
+ else
+ mdp4_dsi_video_do_blt(mfd, 0);
+
+ mfd->ov0_blt_state = mfd->use_ov0_blt;
+ }
+
mdp4_dsi_video_pipe_commit();
if (pipe->ov_blt_addr)
diff --git a/drivers/video/msm/mdp4_overlay_lcdc.c b/drivers/video/msm/mdp4_overlay_lcdc.c
index cae523f..feba8b8 100644
--- a/drivers/video/msm/mdp4_overlay_lcdc.c
+++ b/drivers/video/msm/mdp4_overlay_lcdc.c
@@ -900,6 +900,16 @@
mdp4_lcdc_pipe_queue(0, pipe);
}
+ if (mfd->use_ov0_blt != mfd->ov0_blt_state) {
+
+ if (mfd->use_ov0_blt)
+ mdp4_lcdc_do_blt(mfd, 1);
+ else
+ mdp4_lcdc_do_blt(mfd, 0);
+
+ mfd->ov0_blt_state = mfd->use_ov0_blt;
+ }
+
mdp4_lcdc_pipe_commit();
if (pipe->ov_blt_addr)
diff --git a/drivers/video/msm/mdp_vsync.c b/drivers/video/msm/mdp_vsync.c
index 966b40d..cc350d3 100644
--- a/drivers/video/msm/mdp_vsync.c
+++ b/drivers/video/msm/mdp_vsync.c
@@ -74,14 +74,13 @@
static uint32 vsync_cnt_cfg;
-
-void vsync_clk_enable()
+void vsync_clk_prepare_enable(void)
{
if (mdp_vsync_clk)
clk_prepare_enable(mdp_vsync_clk);
}
-void vsync_clk_disable()
+void vsync_clk_disable_unprepare(void)
{
if (mdp_vsync_clk)
clk_disable_unprepare(mdp_vsync_clk);
diff --git a/drivers/video/msm/mipi_dsi.c b/drivers/video/msm/mipi_dsi.c
index b4fb930..f08a4e4 100644
--- a/drivers/video/msm/mipi_dsi.c
+++ b/drivers/video/msm/mipi_dsi.c
@@ -554,8 +554,10 @@
if (rc)
goto mipi_dsi_probe_err;
- if ((dsi_pclk_rate < 3300000) || (dsi_pclk_rate > 103300000))
+ if ((dsi_pclk_rate < 3300000) || (dsi_pclk_rate > 223000000)) {
+ pr_err("%s: Pixel clock not supported\n", __func__);
dsi_pclk_rate = 35000000;
+ }
mipi->dsi_pclk_rate = dsi_pclk_rate;
/*
diff --git a/drivers/video/msm/mipi_dsi_host.c b/drivers/video/msm/mipi_dsi_host.c
index 4afffb0..39e2d6d 100644
--- a/drivers/video/msm/mipi_dsi_host.c
+++ b/drivers/video/msm/mipi_dsi_host.c
@@ -1151,15 +1151,11 @@
spin_lock_irqsave(&dsi_mdp_lock, flag);
dsi_mdp_busy = TRUE;
- spin_unlock_irqrestore(&dsi_mdp_lock, flag);
-
led_pwm1[1] = (unsigned char)(level);
tp = &dsi_tx_buf;
cmd = &backlight_cmd;
mipi_dsi_buf_init(&dsi_tx_buf);
-
-
if (tp->dmap) {
dma_unmap_single(&dsi_dev, tp->dmap, tp->len, DMA_TO_DEVICE);
tp->dmap = 0;
@@ -1180,10 +1176,6 @@
wmb();
MIPI_OUTP(MIPI_DSI_BASE + 0x08c, 0x01); /* trigger */
wmb();
-
- spin_lock_irqsave(&dsi_mdp_lock, flag);
- dsi_mdp_busy = FALSE;
- complete(&dsi_mdp_comp);
spin_unlock_irqrestore(&dsi_mdp_lock, flag);
}
@@ -1383,6 +1375,8 @@
int mipi_dsi_cmd_dma_tx(struct dsi_buf *tp)
{
+ unsigned long flags;
+
#ifdef DSI_HOST_DEBUG
int i;
char *bp;
@@ -1396,6 +1390,7 @@
pr_debug("\n");
#endif
+ spin_lock_irqsave(&dsi_mdp_lock, flags);
tp->len += 3;
tp->len &= ~0x03; /* multipled by 4 */
@@ -1410,6 +1405,7 @@
wmb();
MIPI_OUTP(MIPI_DSI_BASE + 0x08c, 0x01); /* trigger */
wmb();
+ spin_unlock_irqrestore(&dsi_mdp_lock, flags);
wait_for_completion(&dsi_dma_comp);
@@ -1549,8 +1545,8 @@
if (isr & DSI_INTR_CMD_DMA_DONE) {
mipi_dsi_mdp_stat_inc(STAT_DSI_CMD);
- complete(&dsi_dma_comp);
spin_lock(&dsi_mdp_lock);
+ complete(&dsi_dma_comp);
dsi_ctrl_lock = FALSE;
mipi_dsi_disable_irq_nosync();
spin_unlock(&dsi_mdp_lock);
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_metadata.c b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_metadata.c
index 267e924..fade821 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_metadata.c
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_metadata.c
@@ -217,6 +217,7 @@
DDL_METADATA_ALIGNSIZE(suffix);
decoder->suffix = suffix;
output_buf_req->sz += suffix;
+ decoder->meta_data_offset = 0;
DDL_MSG_LOW("metadata output buf size : %d", suffix);
}
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_properties.c b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_properties.c
index 2d3bee3..033457d 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_properties.c
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_properties.c
@@ -1953,11 +1953,7 @@
DDL_TILE_MULTIPLY_FACTOR);
total_memory_size += component_mem_size;
} else {
- if (decoding)
- total_memory_size = frame_sz.scan_lines *
- frame_sz.stride;
- else
- total_memory_size = frame_sz.height * frame_sz.stride;
+ total_memory_size = frame_sz.scan_lines * frame_sz.stride;
c_offset = DDL_ALIGN(total_memory_size,
DDL_LINEAR_MULTIPLY_FACTOR);
total_memory_size = c_offset + DDL_ALIGN(
diff --git a/include/linux/mfd/wcd9xxx/core.h b/include/linux/mfd/wcd9xxx/core.h
index 17be2cb..105c2cb 100644
--- a/include/linux/mfd/wcd9xxx/core.h
+++ b/include/linux/mfd/wcd9xxx/core.h
@@ -144,6 +144,7 @@
int (*write_dev)(struct wcd9xxx *wcd9xxx, unsigned short reg,
int bytes, void *src, bool interface_reg);
+ u32 num_of_supplies;
struct regulator_bulk_data *supplies;
enum wcd9xxx_pm_state pm_state;
diff --git a/include/linux/mfd/wcd9xxx/pdata.h b/include/linux/mfd/wcd9xxx/pdata.h
index 1b7706b..e831f0b 100644
--- a/include/linux/mfd/wcd9xxx/pdata.h
+++ b/include/linux/mfd/wcd9xxx/pdata.h
@@ -125,7 +125,7 @@
unsigned int hph_ocp_limit:3; /* Headphone OCP current limit */
};
-#define MAX_REGULATOR 6
+#define MAX_REGULATOR 7
/*
* format : TABLA_<POWER_SUPPLY_PIN_NAME>_CUR_MAX
*
diff --git a/include/linux/of_coresight.h b/include/linux/of_coresight.h
new file mode 100644
index 0000000..47a05c9
--- /dev/null
+++ b/include/linux/of_coresight.h
@@ -0,0 +1,27 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __LINUX_OF_CORESIGHT_H
+#define __LINUX_OF_CORESIGHT_H
+
+#ifdef CONFIG_OF
+extern struct coresight_platform_data *of_get_coresight_platform_data(
+ struct device *dev, struct device_node *node);
+#else
+static inline struct coresight_platform_data *of_get_coresight_platform_data(
+ struct device *dev, struct device_node *node)
+{
+ return NULL;
+}
+#endif
+
+#endif
diff --git a/include/net/bluetooth/sco.h b/include/net/bluetooth/sco.h
index 160e3f0..6d94c34 100644
--- a/include/net/bluetooth/sco.h
+++ b/include/net/bluetooth/sco.h
@@ -31,7 +31,7 @@
#define SCO_DEFAULT_FLUSH_TO 0xFFFF
#define SCO_CONN_TIMEOUT (HZ * 40)
-#define SCO_DISCONN_TIMEOUT (HZ * 2)
+#define SCO_DISCONN_TIMEOUT (HZ * 20)
#define SCO_CONN_IDLE_TIMEOUT (HZ * 60)
/* SCO socket address */
diff --git a/net/bluetooth/hci_event.c b/net/bluetooth/hci_event.c
index f83c108..6e8500b 100644
--- a/net/bluetooth/hci_event.c
+++ b/net/bluetooth/hci_event.c
@@ -2929,8 +2929,16 @@
static inline void hci_sniff_subrate_evt(struct hci_dev *hdev, struct sk_buff *skb)
{
struct hci_ev_sniff_subrate *ev = (void *) skb->data;
+ struct hci_conn *conn =
+ hci_conn_hash_lookup_handle(hdev, __le16_to_cpu(ev->handle));
BT_DBG("%s status %d", hdev->name, ev->status);
+ if (conn && (ev->max_rx_latency > hdev->sniff_max_interval)) {
+ BT_ERR("value of rx_latency:%d", ev->max_rx_latency);
+ hci_dev_lock(hdev);
+ hci_conn_enter_active_mode(conn, 1);
+ hci_dev_unlock(hdev);
+ }
}
static inline void hci_extended_inquiry_result_evt(struct hci_dev *hdev, struct sk_buff *skb)
diff --git a/net/bluetooth/hidp/core.c b/net/bluetooth/hidp/core.c
index 0a89c11..d80c0e3 100644
--- a/net/bluetooth/hidp/core.c
+++ b/net/bluetooth/hidp/core.c
@@ -95,12 +95,12 @@
static struct device *hidp_get_device(struct hidp_session *session)
{
- bdaddr_t *src = &bt_sk(session->ctrl_sock->sk)->src;
- bdaddr_t *dst = &bt_sk(session->ctrl_sock->sk)->dst;
+ bdaddr_t *dst = &session->bdaddr;
+
struct device *device = NULL;
struct hci_dev *hdev;
- hdev = hci_get_route(dst, src);
+ hdev = hci_get_route(dst, BDADDR_ANY);
if (!hdev)
return NULL;
diff --git a/net/bluetooth/sco.c b/net/bluetooth/sco.c
index f090a77..9669d4a 100644
--- a/net/bluetooth/sco.c
+++ b/net/bluetooth/sco.c
@@ -394,6 +394,15 @@
case BT_CONNECTED:
case BT_CONFIG:
+ if (sco_pi(sk)->conn) {
+ sk->sk_state = BT_DISCONN;
+ sco_sock_set_timer(sk, SCO_DISCONN_TIMEOUT);
+ hci_conn_put(sco_pi(sk)->conn->hcon);
+ sco_pi(sk)->conn->hcon = NULL;
+ } else
+ sco_chan_del(sk, ECONNRESET);
+ break;
+
case BT_CONNECT:
case BT_DISCONN:
sco_chan_del(sk, ECONNRESET);
@@ -803,6 +812,9 @@
if (sock_flag(sk, SOCK_LINGER) && sk->sk_lingertime)
err = bt_sock_wait_state(sk, BT_CLOSED,
sk->sk_lingertime);
+ else
+ err = bt_sock_wait_state(sk, BT_CLOSED,
+ SCO_DISCONN_TIMEOUT);
}
release_sock(sk);
return err;
@@ -824,6 +836,11 @@
lock_sock(sk);
err = bt_sock_wait_state(sk, BT_CLOSED, sk->sk_lingertime);
release_sock(sk);
+ } else {
+ lock_sock(sk);
+ err = bt_sock_wait_state(sk, BT_CLOSED,
+ SCO_DISCONN_TIMEOUT);
+ release_sock(sk);
}
sock_orphan(sk);
@@ -857,7 +874,9 @@
conn->sk = NULL;
sco_pi(sk)->conn = NULL;
sco_conn_unlock(conn);
- hci_conn_put(conn->hcon);
+
+ if (conn->hcon)
+ hci_conn_put(conn->hcon);
}
sk->sk_state = BT_CLOSED;
diff --git a/sound/soc/codecs/wcd9320.c b/sound/soc/codecs/wcd9320.c
index 6da9166..01820eb 100644
--- a/sound/soc/codecs/wcd9320.c
+++ b/sound/soc/codecs/wcd9320.c
@@ -6817,18 +6817,21 @@
struct snd_soc_codec *codec = taiko->codec;
struct wcd9xxx_pdata *pdata = taiko->pdata;
int k1, k2, k3, rc = 0;
- u8 leg_mode = pdata->amic_settings.legacy_mode;
- u8 txfe_bypass = pdata->amic_settings.txfe_enable;
- u8 txfe_buff = pdata->amic_settings.txfe_buff;
- u8 flag = pdata->amic_settings.use_pdata;
+ u8 leg_mode, txfe_bypass, txfe_buff, flag;
u8 i = 0, j = 0;
u8 val_txfe = 0, value = 0;
if (!pdata) {
+ pr_err("%s: NULL pdata\n", __func__);
rc = -ENODEV;
goto done;
}
+ leg_mode = pdata->amic_settings.legacy_mode;
+ txfe_bypass = pdata->amic_settings.txfe_enable;
+ txfe_buff = pdata->amic_settings.txfe_buff;
+ flag = pdata->amic_settings.use_pdata;
+
/* Make sure settings are correct */
if ((pdata->micbias.ldoh_v > TAIKO_LDOH_2P85_V) ||
(pdata->micbias.bias1_cfilt_sel > TAIKO_CFILT3_SEL) ||