| /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 and |
| * only version 2 as published by the Free Software Foundation. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| |
| /include/ "skeleton.dtsi" |
| /include/ "msm8226-ion.dtsi" |
| /include/ "msm8226-camera.dtsi" |
| /include/ "msm-gdsc.dtsi" |
| /include/ "msm8226-iommu.dtsi" |
| /include/ "msm8226-pm.dtsi" |
| /include/ "msm8226-smp2p.dtsi" |
| /include/ "msm8226-gpu.dtsi" |
| /include/ "msm8226-bus.dtsi" |
| /include/ "msm8226-mdss.dtsi" |
| /include/ "msm8226-coresight.dtsi" |
| /include/ "msm8226-iommu-domains.dtsi" |
| / { |
| model = "Qualcomm MSM 8226"; |
| compatible = "qcom,msm8226"; |
| interrupt-parent = <&intc>; |
| |
| intc: interrupt-controller@f9000000 { |
| compatible = "qcom,msm-qgic2"; |
| interrupt-controller; |
| #interrupt-cells = <3>; |
| reg = <0xF9000000 0x1000>, |
| <0xF9002000 0x1000>; |
| }; |
| |
| msmgpio: gpio@fd510000 { |
| compatible = "qcom,msm-gpio"; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| reg = <0xfd510000 0x4000>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| ngpio = <117>; |
| interrupts = <0 208 0>; |
| qcom,direct-connect-irqs = <8>; |
| }; |
| |
| aliases { |
| spi0 = &spi_0; |
| sdhc1 = &sdhc_1; /* SDC1 eMMC slot */ |
| sdhc2 = &sdhc_2; /* SDC2 SD card slot */ |
| }; |
| |
| memory { |
| secure_mem: secure_region { |
| linux,contiguous-region; |
| reg = <0 0x3800000>; |
| label = "secure_mem"; |
| }; |
| |
| qsecom_mem: qsecom_region { |
| linux,contiguous-region; |
| reg = <0 0x780000>; |
| label = "qsecom_mem"; |
| }; |
| |
| }; |
| |
| qcom,mpm2-sleep-counter@fc4a3000 { |
| compatible = "qcom,mpm2-sleep-counter"; |
| reg = <0xfc4a3000 0x1000>; |
| clock-frequency = <32768>; |
| }; |
| |
| timer { |
| compatible = "arm,armv7-timer"; |
| interrupts = <1 2 0 1 3 0>; |
| clock-frequency = <19200000>; |
| }; |
| |
| timer@f9020000 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| compatible = "arm,armv7-timer-mem"; |
| reg = <0xf9020000 0x1000>; |
| clock-frequency = <19200000>; |
| |
| frame@f9021000 { |
| frame-number = <0>; |
| interrupts = <0 8 0x4>, |
| <0 7 0x4>; |
| reg = <0xf9021000 0x1000>, |
| <0xf9022000 0x1000>; |
| }; |
| |
| frame@f9023000 { |
| frame-number = <1>; |
| interrupts = <0 9 0x4>; |
| reg = <0xf9023000 0x1000>; |
| status = "disabled"; |
| }; |
| |
| frame@f9024000 { |
| frame-number = <2>; |
| interrupts = <0 10 0x4>; |
| reg = <0xf9024000 0x1000>; |
| status = "disabled"; |
| }; |
| |
| frame@f9025000 { |
| frame-number = <3>; |
| interrupts = <0 11 0x4>; |
| reg = <0xf9025000 0x1000>; |
| status = "disabled"; |
| }; |
| |
| frame@f9026000 { |
| frame-number = <4>; |
| interrupts = <0 12 0x4>; |
| reg = <0xf9026000 0x1000>; |
| status = "disabled"; |
| }; |
| |
| frame@f9027000 { |
| frame-number = <5>; |
| interrupts = <0 13 0x4>; |
| reg = <0xf9027000 0x1000>; |
| status = "disabled"; |
| }; |
| |
| frame@f9028000 { |
| frame-number = <6>; |
| interrupts = <0 14 0x4>; |
| reg = <0xf9028000 0x1000>; |
| status = "disabled"; |
| }; |
| }; |
| |
| qcom,vidc@fdc00000 { |
| compatible = "qcom,msm-vidc"; |
| reg = <0xfdc00000 0xff000>; |
| interrupts = <0 44 0>; |
| qcom,load-freq-tbl = <352800 160000000>, |
| <244800 133330000>, |
| <108000 66700000>; |
| qcom,hfi = "venus"; |
| qcom,bus-ports = <1>; |
| qcom,reg-presets = <0xE0024 0x0>, |
| <0x80124 0x3>, |
| <0xE0020 0x5555556>, |
| <0x800B0 0x10101001>, |
| <0x800B4 0x00101010>, |
| <0x800C0 0x1010100f>, |
| <0x800C4 0x00101010>, |
| <0x800D0 0x00000010>, |
| <0x800D4 0x00000010>, |
| <0x800D8 0x00000707>; |
| qcom,enc-ddr-ab-ib = <0 0>, |
| <129000 142000>, |
| <384000 422000>, |
| <866000 953000>; |
| qcom,dec-ddr-ab-ib = <0 0>, |
| <103000 134000>, |
| <268000 348000>, |
| <505000 657000>; |
| qcom,iommu-groups = <&venus_domain_ns &venus_domain_cp>; |
| qcom,iommu-group-buffer-types = <0xfff 0x1ff>; |
| qcom,buffer-type-tz-usage-table = <0x1 0x1>, |
| <0x1fe 0x2>; |
| qcom,max-hw-load = <352800>; /* 720p @ 30 + 1080p @ 30 */ |
| }; |
| |
| qcom,wfd { |
| compatible = "qcom,msm-wfd"; |
| }; |
| |
| serial@f991f000 { |
| compatible = "qcom,msm-lsuart-v14"; |
| reg = <0xf991f000 0x1000>; |
| interrupts = <0 109 0>; |
| status = "disabled"; |
| }; |
| |
| serial@f995e000 { |
| compatible = "qcom,msm-lsuart-v14"; |
| reg = <0xf995e000 0x1000>; |
| interrupts = <0 114 0>; |
| status = "disabled"; |
| }; |
| |
| qcom,msm-imem@fe805000 { |
| compatible = "qcom,msm-imem"; |
| reg = <0xfe805000 0x1000>; /* Address and size of IMEM */ |
| }; |
| |
| qcom,sps@f9984000 { |
| compatible = "qcom,msm_sps"; |
| reg = <0xf9984000 0x15000>, |
| <0xf9999000 0xb000>; |
| interrupts = <0 94 0>; |
| }; |
| |
| qcom,usbbam@f9a44000 { |
| compatible = "qcom,usb-bam-msm"; |
| reg = <0xf9a44000 0x11000>; |
| reg-names = "hsusb"; |
| interrupts = <0 135 0>; |
| interrupt-names = "hsusb"; |
| qcom,usb-bam-num-pipes = <16>; |
| qcom,usb-bam-fifo-baseaddr = <0xfe803000>; |
| qcom,ignore-core-reset-ack; |
| qcom,disable-clk-gating; |
| |
| qcom,pipe0 { |
| label = "hsusb-qdss-in-0"; |
| qcom,usb-bam-mem-type = <3>; |
| qcom,bam-type = <1>; |
| qcom,dir = <1>; |
| qcom,pipe-num = <0>; |
| qcom,peer-bam = <1>; |
| qcom,src-bam-physical-address = <0xfc37c000>; |
| qcom,src-bam-pipe-index = <0>; |
| qcom,dst-bam-physical-address = <0xf9a44000>; |
| qcom,dst-bam-pipe-index = <2>; |
| qcom,data-fifo-offset = <0x0>; |
| qcom,data-fifo-size = <0x600>; |
| qcom,descriptor-fifo-offset = <0x600>; |
| qcom,descriptor-fifo-size = <0x200>; |
| }; |
| }; |
| |
| usb@f9a55000 { |
| compatible = "qcom,hsusb-otg"; |
| reg = <0xf9a55000 0x400>; |
| interrupts = <0 134 0>, <0 140 0>; |
| interrupt-names = "core_irq", "async_irq"; |
| hsusb_vdd_dig-supply = <&pm8226_s1_corner>; |
| HSUSB_1p8-supply = <&pm8226_l10>; |
| HSUSB_3p3-supply = <&pm8226_l20>; |
| qcom,vdd-voltage-level = <1 5 7>; |
| |
| qcom,hsusb-otg-phy-init-seq = |
| <0x44 0x80 0x68 0x81 0x24 0x82 0x13 0x83 0xffffffff>; |
| qcom,hsusb-otg-phy-type = <2>; |
| qcom,hsusb-otg-mode = <1>; |
| qcom,hsusb-otg-otg-control = <2>; |
| qcom,hsusb-otg-disable-reset; |
| qcom,dp-manual-pullup; |
| |
| qcom,msm-bus,name = "usb2"; |
| qcom,msm-bus,num-cases = <2>; |
| qcom,msm-bus,num-paths = <1>; |
| qcom,msm-bus,vectors-KBps = |
| <87 512 0 0>, |
| <87 512 60000 960000>; |
| }; |
| |
| android_usb@fe8050c8 { |
| compatible = "qcom,android-usb"; |
| reg = <0xfe8050c8 0xc8>; |
| qcom,android-usb-cdrom; |
| }; |
| |
| wcd9xxx_intc: wcd9xxx-irq { |
| compatible = "qcom,wcd9xxx-irq"; |
| interrupt-controller; |
| #interrupt-cells = <1>; |
| interrupt-parent = <&msmgpio>; |
| interrupts = <68 0>; |
| interrupt-names = "cdc-int"; |
| }; |
| |
| slim@fe12f000 { |
| cell-index = <1>; |
| compatible = "qcom,slim-ngd"; |
| reg = <0xfe12f000 0x35000>, |
| <0xfe104000 0x20000>; |
| reg-names = "slimbus_physical", "slimbus_bam_physical"; |
| interrupts = <0 163 0>, <0 164 0>; |
| interrupt-names = "slimbus_irq", "slimbus_bam_irq"; |
| |
| tapan_codec { |
| compatible = "qcom,tapan-slim-pgd"; |
| elemental-addr = [00 01 E0 00 17 02]; |
| |
| interrupt-parent = <&wcd9xxx_intc>; |
| interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 |
| 17 18 19 20 21 22 23 24 25 26 27 28>; |
| qcom,cdc-reset-gpio = <&msmgpio 72 0>; |
| |
| cdc-vdd-buck-supply = <&pm8226_s4>; |
| qcom,cdc-vdd-buck-voltage = <2100000 2100000>; |
| qcom,cdc-vdd-buck-current = <650000>; |
| |
| cdc-vdd-h-supply = <&pm8226_l6>; |
| qcom,cdc-vdd-h-voltage = <1800000 1800000>; |
| qcom,cdc-vdd-h-current = <25000>; |
| |
| cdc-vdd-px-supply = <&pm8226_l6>; |
| qcom,cdc-vdd-px-voltage = <1800000 1800000>; |
| qcom,cdc-vdd-px-current = <25000>; |
| |
| cdc-vdd-a-1p2v-supply = <&pm8226_l4>; |
| qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>; |
| qcom,cdc-vdd-a-1p2v-current = <10000>; |
| |
| cdc-vdd-cx-supply = <&pm8226_l4>; |
| qcom,cdc-vdd-cx-voltage = <1200000 1200000>; |
| qcom,cdc-vdd-cx-current = <10000>; |
| |
| qcom,cdc-static-supplies = "cdc-vdd-buck", |
| "cdc-vdd-h", |
| "cdc-vdd-px", |
| "cdc-vdd-a-1p2v", |
| "cdc-vdd-cx"; |
| |
| qcom,cdc-micbias-ldoh-v = <0x3>; |
| qcom,cdc-micbias-cfilt1-mv = <1800>; |
| qcom,cdc-micbias-cfilt2-mv = <1800>; |
| qcom,cdc-micbias-cfilt3-mv = <1800>; |
| |
| qcom,cdc-micbias1-cfilt-sel = <0x0>; |
| qcom,cdc-micbias2-cfilt-sel = <0x1>; |
| qcom,cdc-micbias3-cfilt-sel = <0x2>; |
| |
| qcom,cdc-mclk-clk-rate = <9600000>; |
| qcom,cdc-slim-ifd = "tapan-slim-ifd"; |
| qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02]; |
| }; |
| }; |
| |
| qcom,msm-adsp-loader { |
| compatible = "qcom,adsp-loader"; |
| qcom,adsp-state = <0>; |
| }; |
| |
| sound { |
| compatible = "qcom,msm8226-audio-tapan"; |
| qcom,model = "msm8226-tapan-snd-card"; |
| qcom,tapan-mclk-clk-freq = <9600000>; |
| }; |
| |
| qcom,msm-pcm { |
| compatible = "qcom,msm-pcm-dsp"; |
| qcom,msm-pcm-dsp-id = <0>; |
| }; |
| |
| qcom,msm-pcm-routing { |
| compatible = "qcom,msm-pcm-routing"; |
| }; |
| |
| qcom,msm-pcm-low-latency { |
| compatible = "qcom,msm-pcm-dsp"; |
| qcom,msm-pcm-dsp-id = <1>; |
| qcom,msm-pcm-low-latency; |
| }; |
| |
| qcom,msm-pcm-lpa { |
| compatible = "qcom,msm-pcm-lpa"; |
| }; |
| |
| qcom,msm-compr-dsp { |
| compatible = "qcom,msm-compr-dsp"; |
| }; |
| |
| qcom,msm-voip-dsp { |
| compatible = "qcom,msm-voip-dsp"; |
| }; |
| |
| qcom,msm-pcm-voice { |
| compatible = "qcom,msm-pcm-voice"; |
| }; |
| |
| qcom,msm-stub-codec { |
| compatible = "qcom,msm-stub-codec"; |
| }; |
| |
| qcom,msm-dai-fe { |
| compatible = "qcom,msm-dai-fe"; |
| }; |
| |
| qcom,msm-pcm-afe { |
| compatible = "qcom,msm-pcm-afe"; |
| }; |
| |
| qcom,msm-dai-q6-hdmi { |
| compatible = "qcom,msm-dai-q6-hdmi"; |
| qcom,msm-dai-q6-dev-id = <8>; |
| }; |
| |
| qcom,msm-dai-q6 { |
| compatible = "qcom,msm-dai-q6"; |
| qcom,msm-dai-q6-sb-0-rx { |
| compatible = "qcom,msm-dai-q6-dev"; |
| qcom,msm-dai-q6-dev-id = <16384>; |
| }; |
| |
| qcom,msm-dai-q6-sb-0-tx { |
| compatible = "qcom,msm-dai-q6-dev"; |
| qcom,msm-dai-q6-dev-id = <16385>; |
| }; |
| |
| qcom,msm-dai-q6-sb-1-rx { |
| compatible = "qcom,msm-dai-q6-dev"; |
| qcom,msm-dai-q6-dev-id = <16386>; |
| }; |
| |
| qcom,msm-dai-q6-sb-1-tx { |
| compatible = "qcom,msm-dai-q6-dev"; |
| qcom,msm-dai-q6-dev-id = <16387>; |
| }; |
| |
| qcom,msm-dai-q6-sb-3-rx { |
| compatible = "qcom,msm-dai-q6-dev"; |
| qcom,msm-dai-q6-dev-id = <16390>; |
| }; |
| |
| qcom,msm-dai-q6-sb-3-tx { |
| compatible = "qcom,msm-dai-q6-dev"; |
| qcom,msm-dai-q6-dev-id = <16391>; |
| }; |
| |
| qcom,msm-dai-q6-sb-4-rx { |
| compatible = "qcom,msm-dai-q6-dev"; |
| qcom,msm-dai-q6-dev-id = <16392>; |
| }; |
| |
| qcom,msm-dai-q6-sb-4-tx { |
| compatible = "qcom,msm-dai-q6-dev"; |
| qcom,msm-dai-q6-dev-id = <16393>; |
| }; |
| |
| qcom,msm-dai-q6-bt-sco-rx { |
| compatible = "qcom,msm-dai-q6-dev"; |
| qcom,msm-dai-q6-dev-id = <12288>; |
| }; |
| |
| qcom,msm-dai-q6-bt-sco-tx { |
| compatible = "qcom,msm-dai-q6-dev"; |
| qcom,msm-dai-q6-dev-id = <12289>; |
| }; |
| |
| qcom,msm-dai-q6-int-fm-rx { |
| compatible = "qcom,msm-dai-q6-dev"; |
| qcom,msm-dai-q6-dev-id = <12292>; |
| }; |
| |
| qcom,msm-dai-q6-int-fm-tx { |
| compatible = "qcom,msm-dai-q6-dev"; |
| qcom,msm-dai-q6-dev-id = <12293>; |
| }; |
| |
| qcom,msm-dai-q6-be-afe-pcm-rx { |
| compatible = "qcom,msm-dai-q6-dev"; |
| qcom,msm-dai-q6-dev-id = <224>; |
| }; |
| |
| qcom,msm-dai-q6-be-afe-pcm-tx { |
| compatible = "qcom,msm-dai-q6-dev"; |
| qcom,msm-dai-q6-dev-id = <225>; |
| }; |
| |
| qcom,msm-dai-q6-afe-proxy-rx { |
| compatible = "qcom,msm-dai-q6-dev"; |
| qcom,msm-dai-q6-dev-id = <241>; |
| }; |
| |
| qcom,msm-dai-q6-afe-proxy-tx { |
| compatible = "qcom,msm-dai-q6-dev"; |
| qcom,msm-dai-q6-dev-id = <240>; |
| }; |
| |
| qcom,msm-dai-q6-incall-record-rx { |
| compatible = "qcom,msm-dai-q6-dev"; |
| qcom,msm-dai-q6-dev-id = <32771>; |
| }; |
| |
| qcom,msm-dai-q6-incall-record-tx { |
| compatible = "qcom,msm-dai-q6-dev"; |
| qcom,msm-dai-q6-dev-id = <32772>; |
| }; |
| |
| qcom,msm-dai-q6-incall-music-rx { |
| compatible = "qcom,msm-dai-q6-dev"; |
| qcom,msm-dai-q6-dev-id = <32773>; |
| }; |
| }; |
| |
| qcom,msm-pcm-hostless { |
| compatible = "qcom,msm-pcm-hostless"; |
| }; |
| |
| qcom,wcnss-wlan@fb000000 { |
| compatible = "qcom,wcnss_wlan"; |
| reg = <0xfb000000 0x280000>, |
| <0xf9011008 0x04>; |
| reg-names = "wcnss_mmio", "wcnss_fiq"; |
| interrupts = <0 145 0 0 146 0>; |
| interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq"; |
| |
| qcom,pronto-vddmx-supply = <&pm8226_l3>; |
| qcom,pronto-vddcx-supply = <&pm8226_s1>; |
| qcom,pronto-vddpx-supply = <&pm8226_l6>; |
| qcom,iris-vddxo-supply = <&pm8226_l10>; |
| qcom,iris-vddrfa-supply = <&pm8226_l24>; |
| qcom,iris-vddpa-supply = <&pm8226_l16>; |
| qcom,iris-vdddig-supply = <&pm8226_l24>; |
| |
| gpios = <&msmgpio 40 0>, <&msmgpio 41 0>, <&msmgpio 42 0>, <&msmgpio 43 0>, <&msmgpio 44 0>; |
| qcom,has_pronto_hw; |
| }; |
| |
| qcom,msm-adsp-sensors { |
| compatible = "qcom,msm-adsp-sensors"; |
| qcom,src-id = <11>; |
| qcom,dst-id = <604>; |
| qcom,ab = <32505856>; |
| qcom,ib = <32505856>; |
| }; |
| |
| qcom,wdt@f9017000 { |
| compatible = "qcom,msm-watchdog"; |
| reg = <0xf9017000 0x1000>; |
| interrupts = <0 3 0>, <0 4 0>; |
| qcom,bark-time = <11000>; |
| qcom,pet-time = <10000>; |
| qcom,ipi-ping; |
| }; |
| |
| qcom,smem@fa00000 { |
| compatible = "qcom,smem"; |
| reg = <0xfa00000 0x100000>, |
| <0xf9011000 0x1000>, |
| <0xfc428000 0x4000>; |
| reg-names = "smem", "irq-reg-base", "aux-mem1"; |
| |
| qcom,smd-modem { |
| compatible = "qcom,smd"; |
| qcom,smd-edge = <0>; |
| qcom,smd-irq-offset = <0x8>; |
| qcom,smd-irq-bitmask = <0x1000>; |
| qcom,pil-string = "modem"; |
| interrupts = <0 25 1>; |
| }; |
| |
| qcom,smsm-modem { |
| compatible = "qcom,smsm"; |
| qcom,smsm-edge = <0>; |
| qcom,smsm-irq-offset = <0x8>; |
| qcom,smsm-irq-bitmask = <0x2000>; |
| interrupts = <0 26 1>; |
| }; |
| |
| qcom,smd-adsp { |
| compatible = "qcom,smd"; |
| qcom,smd-edge = <1>; |
| qcom,smd-irq-offset = <0x8>; |
| qcom,smd-irq-bitmask = <0x100>; |
| qcom,pil-string = "adsp"; |
| interrupts = <0 156 1>; |
| }; |
| |
| qcom,smsm-adsp { |
| compatible = "qcom,smsm"; |
| qcom,smsm-edge = <1>; |
| qcom,smsm-irq-offset = <0x8>; |
| qcom,smsm-irq-bitmask = <0x200>; |
| interrupts = <0 157 1>; |
| }; |
| |
| qcom,smd-wcnss { |
| compatible = "qcom,smd"; |
| qcom,smd-edge = <6>; |
| qcom,smd-irq-offset = <0x8>; |
| qcom,smd-irq-bitmask = <0x20000>; |
| qcom,pil-string = "wcnss"; |
| interrupts = <0 142 1>; |
| }; |
| |
| qcom,smsm-wcnss { |
| compatible = "qcom,smsm"; |
| qcom,smsm-edge = <6>; |
| qcom,smsm-irq-offset = <0x8>; |
| qcom,smsm-irq-bitmask = <0x80000>; |
| interrupts = <0 144 1>; |
| }; |
| |
| qcom,smd-rpm { |
| compatible = "qcom,smd"; |
| qcom,smd-edge = <15>; |
| qcom,smd-irq-offset = <0x8>; |
| qcom,smd-irq-bitmask = <0x1>; |
| interrupts = <0 168 1>; |
| qcom,irq-no-suspend; |
| }; |
| }; |
| |
| rpm_bus: qcom,rpm-smd { |
| compatible = "qcom,rpm-smd"; |
| rpm-channel-name = "rpm_requests"; |
| rpm-channel-type = <15>; /* SMD_APPS_RPM */ |
| }; |
| |
| sdcc1: qcom,sdcc@f9824000 { |
| cell-index = <1>; /* SDC1 eMMC slot */ |
| compatible = "qcom,msm-sdcc"; |
| |
| reg = <0xf9824000 0x800>, |
| <0xf9824800 0x100>, |
| <0xf9804000 0x7000>; |
| reg-names = "core_mem", "dml_mem", "bam_mem"; |
| interrupts = <0 123 0>, <0 137 0>; |
| interrupt-names = "core_irq", "bam_irq"; |
| |
| qcom,bus-width = <8>; |
| status = "disabled"; |
| }; |
| |
| sdhc_1: sdhci@f9824900 { |
| compatible = "qcom,sdhci-msm"; |
| reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; |
| reg-names = "hc_mem", "core_mem"; |
| |
| interrupts = <0 123 0>, <0 138 0>; |
| interrupt-names = "hc_irq", "pwr_irq"; |
| |
| qcom,bus-width = <8>; |
| status = "disabled"; |
| }; |
| |
| sdcc2: qcom,sdcc@f98a4000 { |
| cell-index = <2>; /* SDC2 SD card slot */ |
| compatible = "qcom,msm-sdcc"; |
| |
| reg = <0xf98a4000 0x800>, |
| <0xf98a4800 0x100>, |
| <0xf9884000 0x7000>; |
| reg-names = "core_mem", "dml_mem", "bam_mem"; |
| interrupts = <0 125 0>, <0 220 0>; |
| interrupt-names = "core_irq", "bam_irq"; |
| |
| qcom,bus-width = <4>; |
| status = "disabled"; |
| }; |
| |
| sdhc_2: sdhci@f98a4900 { |
| compatible = "qcom,sdhci-msm"; |
| reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; |
| reg-names = "hc_mem", "core_mem"; |
| |
| interrupts = <0 125 0>, <0 221 0>; |
| interrupt-names = "hc_irq", "pwr_irq"; |
| |
| qcom,bus-width = <4>; |
| status = "disabled"; |
| }; |
| |
| spmi_bus: qcom,spmi@fc4c0000 { |
| cell-index = <0>; |
| compatible = "qcom,spmi-pmic-arb"; |
| reg-names = "core", "intr", "cnfg"; |
| reg = <0xfc4cf000 0x1000>, |
| <0Xfc4cb000 0x1000>, |
| <0Xfc4ca000 0x1000>; |
| /* 190,ee0_krait_hlos_spmi_periph_irq */ |
| /* 187,channel_0_krait_hlos_trans_done_irq */ |
| interrupts = <0 190 0>, <0 187 0>; |
| qcom,pmic-arb-ee = <0>; |
| qcom,pmic-arb-channel = <0>; |
| }; |
| |
| i2c@f9926000 { /* BLSP-1 QUP-4 */ |
| cell-index = <0>; |
| compatible = "qcom,i2c-qup"; |
| reg = <0xf9926000 0x1000>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg-names = "qup_phys_addr"; |
| interrupts = <0 98 0>; |
| interrupt-names = "qup_err_intr"; |
| qcom,i2c-bus-freq = <100000>; |
| }; |
| |
| i2c@f9927000 { /* BLSP1 QUP5 */ |
| cell-index = <5>; |
| compatible = "qcom,i2c-qup"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg-names = "qup_phys_addr"; |
| reg = <0xf9927000 0x1000>; |
| interrupt-names = "qup_err_intr"; |
| interrupts = <0 99 0>; |
| qcom,i2c-bus-freq = <384000>; |
| qcom,i2c-src-freq = <19200000>; |
| }; |
| |
| qcom,acpuclk@f9011050 { |
| compatible = "qcom,acpuclk-a7"; |
| reg = <0xf9011050 0x8>; |
| reg-names = "rcg_base"; |
| a7_cpu-supply = <&apc_vreg_corner>; |
| }; |
| |
| qcom,ocmem@fdd00000 { |
| compatible = "qcom,msm-ocmem"; |
| reg = <0xfdd00000 0x2000>, |
| <0xfdd02000 0x2000>, |
| <0xfe039000 0x400>, |
| <0xfec00000 0x20000>; |
| reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical"; |
| interrupts = <0 76 0 0 77 0>; |
| interrupt-names = "ocmem_irq", "dm_irq"; |
| qcom,ocmem-num-regions = <0x1>; |
| qcom,ocmem-num-macros = <0x2>; |
| qcom,resource-type = <0x706d636f>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges = <0x0 0xfec00000 0x20000>; |
| |
| partition@0 { |
| reg = <0x0 0x20000>; |
| qcom,ocmem-part-name = "graphics"; |
| qcom,ocmem-part-min = <0x20000>; |
| }; |
| }; |
| |
| qcom,venus@fdce0000 { |
| compatible = "qcom,pil-venus"; |
| reg = <0xfdce0000 0x4000>, |
| <0xfdc80000 0x400>; |
| reg-names = "wrapper_base", "vbif_base"; |
| vdd-supply = <&gdsc_venus>; |
| |
| qcom,firmware-name = "venus"; |
| }; |
| |
| qcom,pronto@fb21b000 { |
| compatible = "qcom,pil-pronto"; |
| reg = <0xfb21b000 0x3000>, |
| <0xfc401700 0x4>, |
| <0xfd485300 0xc>; |
| reg-names = "pmu_base", "clk_base", "halt_base"; |
| interrupts = <0 149 1>; |
| vdd_pronto_pll-supply = <&pm8226_l8>; |
| |
| qcom,firmware-name = "wcnss"; |
| |
| /* GPIO inputs from wcnss */ |
| qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>; |
| qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>; |
| |
| /* GPIO output to wcnss */ |
| qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>; |
| }; |
| |
| qcom,iris-fm { |
| compatible = "qcom,iris_fm"; |
| }; |
| |
| qcom,lpass@fe200000 { |
| compatible = "qcom,pil-q6v5-lpass"; |
| reg = <0xfe200000 0x00100>, |
| <0xfd485100 0x00010>, |
| <0xfc4016c0 0x00004>; |
| reg-names = "qdsp6_base", "halt_base", "restart_reg"; |
| vdd_cx-supply = <&pm8226_s1_corner>; |
| interrupts = <0 162 1>; |
| |
| qcom,firmware-name = "adsp"; |
| |
| /* GPIO inputs from lpass */ |
| qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>; |
| qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>; |
| |
| /* GPIO output to lpass */ |
| qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>; |
| }; |
| |
| qcom,mss@fc880000 { |
| compatible = "qcom,pil-q6v5-mss"; |
| reg = <0xfc880000 0x100>, |
| <0xfd485000 0x400>, |
| <0xfc820000 0x020>, |
| <0xfc401680 0x004>, |
| <0xfd485194 0x4>; |
| reg-names = "qdsp6_base", "halt_base", "rmb_base", |
| "restart_reg", "cxrail_bhs_reg"; |
| |
| interrupts = <0 24 1>; |
| vdd_mss-supply = <&pm8226_s1>; |
| vdd_cx-supply = <&pm8226_s1_corner>; |
| vdd_mx-supply = <&pm8226_l3>; |
| vdd_pll-supply = <&pm8226_l8>; |
| qcom,vdd_pll = <1800000>; |
| |
| qcom,is-loadable; |
| qcom,firmware-name = "mba"; |
| qcom,pil-self-auth; |
| |
| /* GPIO inputs from mss */ |
| qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>; |
| qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>; |
| qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>; |
| |
| /* GPIO output to mss */ |
| qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>; |
| }; |
| |
| qcom,msm-mem-hole { |
| compatible = "qcom,msm-mem-hole"; |
| qcom,memblock-remove = <0x6400000 0x9b00000>; /* Address and Size of Hole */ |
| }; |
| |
| tsens: tsens@fc4a8000 { |
| compatible = "qcom,msm-tsens"; |
| reg = <0xfc4a8000 0x2000>, |
| <0xfc4b8000 0x1000>; |
| reg-names = "tsens_physical", "tsens_eeprom_physical"; |
| interrupts = <0 184 0>; |
| qcom,sensors = <4>; |
| qcom,slope = <2901 2846 3038 2955>; |
| qcom,calib-mode = "fuse_map2"; |
| }; |
| |
| qcom,msm-thermal { |
| compatible = "qcom,msm-thermal"; |
| qcom,sensor-id = <0>; |
| qcom,poll-ms = <250>; |
| qcom,limit-temp = <60>; |
| qcom,temp-hysteresis = <10>; |
| qcom,freq-step = <2>; |
| }; |
| |
| spi_0: spi@f9923000 { /* BLSP1 QUP1 */ |
| compatible = "qcom,spi-qup-v2"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg-names = "spi_physical", "spi_bam_physical"; |
| reg = <0xf9923000 0x1000>, |
| <0xf9904000 0xF000>; |
| interrupt-names = "spi_irq", "spi_bam_irq"; |
| interrupts = <0 95 0>, <0 238 0>; |
| spi-max-frequency = <19200000>; |
| |
| gpios = <&msmgpio 3 0>, /* CLK */ |
| <&msmgpio 1 0>, /* MISO */ |
| <&msmgpio 0 0>; /* MOSI */ |
| cs-gpios = <&msmgpio 22 0>; |
| |
| qcom,infinite-mode = <0>; |
| qcom,use-bam; |
| qcom,ver-reg-exists; |
| qcom,bam-consumer-pipe-index = <12>; |
| qcom,bam-producer-pipe-index = <13>; |
| }; |
| |
| qcom,bam_dmux@fc834000 { |
| compatible = "qcom,bam_dmux"; |
| reg = <0xfc834000 0x7000>; |
| interrupts = <0 29 1>; |
| }; |
| |
| qcom,msm-rtb { |
| compatible = "qcom,msm-rtb"; |
| qcom,memory-reservation-type = "EBI1"; |
| qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */ |
| }; |
| |
| qcom,msm-rng@f9bff000 { |
| compatible = "qcom,msm-rng"; |
| reg = <0xf9bff000 0x200>; |
| qcom,msm-rng-iface-clk; |
| }; |
| |
| qcom,tz-log@fe805720 { |
| compatible = "qcom,tz-log"; |
| reg = <0x0fe805720 0x1000>; |
| }; |
| |
| jtag_mm0: jtagmm@fc33c000 { |
| compatible = "qcom,jtag-mm"; |
| reg = <0xfc33c000 0x1000>, |
| <0xfc330000 0x1000>; |
| reg-names = "etm-base","debug-base"; |
| }; |
| |
| jtag_mm1: jtagmm@fc33d000 { |
| compatible = "qcom,jtag-mm"; |
| reg = <0xfc33d000 0x1000>, |
| <0xfc332000 0x1000>; |
| reg-names = "etm-base","debug-base"; |
| }; |
| |
| jtag_mm2: jtagmm@fc33e000 { |
| compatible = "qcom,jtag-mm"; |
| reg = <0xfc33e000 0x1000>, |
| <0xfc334000 0x1000>; |
| reg-names = "etm-base","debug-base"; |
| }; |
| |
| jtag_mm3: jtagmm@fc33f000 { |
| compatible = "qcom,jtag-mm"; |
| reg = <0xfc33f000 0x1000>, |
| <0xfc336000 0x1000>; |
| reg-names = "etm-base","debug-base"; |
| }; |
| |
| qcom,ipc-spinlock@fd484000 { |
| compatible = "qcom,ipc-spinlock-sfpb"; |
| reg = <0xfd484000 0x400>; |
| qcom,num-locks = <8>; |
| }; |
| |
| qcom,qseecom@d980000 { |
| compatible = "qcom,qseecom"; |
| reg = <0xd980000 0x256000>; |
| reg-names = "secapp-region"; |
| qcom,disk-encrypt-pipe-pair = <2>; |
| qcom,hlos-ce-hw-instance = <0>; |
| qcom,qsee-ce-hw-instance = <0>; |
| qcom,msm-bus,name = "qseecom-noc"; |
| qcom,msm-bus,num-cases = <4>; |
| qcom,msm-bus,active-only = <0>; |
| qcom,msm-bus,num-paths = <1>; |
| qcom,msm-bus,vectors-KBps = |
| <55 512 0 0>, |
| <55 512 3936000 393600>, |
| <55 512 3936000 393600>, |
| <55 512 3936000 393600>; |
| }; |
| |
| qcom,qcrypto@fd404000 { |
| compatible = "qcom,qcrypto"; |
| reg = <0xfd400000 0x20000>, |
| <0xfd404000 0x8000>; |
| reg-names = "crypto-base","crypto-bam-base"; |
| interrupts = <0 207 0>; |
| qcom,bam-pipe-pair = <2>; |
| qcom,ce-hw-instance = <0>; |
| qcom,ce-hw-shared; |
| qcom,msm-bus,name = "qcrypto-noc"; |
| qcom,msm-bus,num-cases = <2>; |
| qcom,msm-bus,active-only = <0>; |
| qcom,msm-bus,num-paths = <1>; |
| qcom,msm-bus,vectors-KBps = |
| <56 512 0 0>, |
| <56 512 3936000 393600>; |
| }; |
| |
| qcom,qcedev@fd400000 { |
| compatible = "qcom,qcedev"; |
| reg = <0xfd400000 0x20000>, |
| <0xfd404000 0x8000>; |
| reg-names = "crypto-base","crypto-bam-base"; |
| interrupts = <0 207 0>; |
| qcom,bam-pipe-pair = <1>; |
| qcom,ce-hw-instance = <0>; |
| qcom,ce-hw-shared; |
| qcom,msm-bus,name = "qcedev-noc"; |
| qcom,msm-bus,num-cases = <2>; |
| qcom,msm-bus,active-only = <0>; |
| qcom,msm-bus,num-paths = <1>; |
| qcom,msm-bus,vectors-KBps = |
| <56 512 0 0>, |
| <56 512 3936000 393600>; |
| }; |
| }; |
| |
| &gdsc_venus { |
| status = "ok"; |
| }; |
| |
| &gdsc_mdss { |
| status = "ok"; |
| }; |
| |
| &gdsc_jpeg { |
| status = "ok"; |
| }; |
| |
| &gdsc_vfe { |
| status = "ok"; |
| }; |
| |
| &gdsc_oxili_cx { |
| status = "ok"; |
| }; |
| |
| &gdsc_usb_hsic { |
| status = "ok"; |
| }; |
| |
| /include/ "msm-pm8226-rpm-regulator.dtsi" |
| /include/ "msm-pm8226.dtsi" |
| /include/ "msm8226-regulator.dtsi" |
| |
| &pm8226_vadc { |
| chan@0 { |
| label = "usb_in"; |
| reg = <0>; |
| qcom,decimation = <0>; |
| qcom,pre-div-channel-scaling = <4>; |
| qcom,calibration-type = "absolute"; |
| qcom,scale-function = <0>; |
| qcom,hw-settle-time = <0>; |
| qcom,fast-avg-setup = <0>; |
| }; |
| |
| chan@2 { |
| label = "vchg_sns"; |
| reg = <2>; |
| qcom,decimation = <0>; |
| qcom,pre-div-channel-scaling = <3>; |
| qcom,calibration-type = "absolute"; |
| qcom,scale-function = <0>; |
| qcom,hw-settle-time = <0>; |
| qcom,fast-avg-setup = <0>; |
| }; |
| |
| chan@5 { |
| label = "vcoin"; |
| reg = <5>; |
| qcom,decimation = <0>; |
| qcom,pre-div-channel-scaling = <1>; |
| qcom,calibration-type = "absolute"; |
| qcom,scale-function = <0>; |
| qcom,hw-settle-time = <0>; |
| qcom,fast-avg-setup = <0>; |
| }; |
| |
| chan@6 { |
| label = "vbat_sns"; |
| reg = <6>; |
| qcom,decimation = <0>; |
| qcom,pre-div-channel-scaling = <1>; |
| qcom,calibration-type = "absolute"; |
| qcom,scale-function = <0>; |
| qcom,hw-settle-time = <0>; |
| qcom,fast-avg-setup = <0>; |
| }; |
| |
| chan@7 { |
| label = "vph_pwr"; |
| reg = <7>; |
| qcom,decimation = <0>; |
| qcom,pre-div-channel-scaling = <1>; |
| qcom,calibration-type = "absolute"; |
| qcom,scale-function = <0>; |
| qcom,hw-settle-time = <0>; |
| qcom,fast-avg-setup = <0>; |
| }; |
| |
| chan@30 { |
| label = "batt_therm"; |
| reg = <0x30>; |
| qcom,decimation = <0>; |
| qcom,pre-div-channel-scaling = <0>; |
| qcom,calibration-type = "ratiometric"; |
| qcom,scale-function = <1>; |
| qcom,hw-settle-time = <2>; |
| qcom,fast-avg-setup = <0>; |
| }; |
| |
| chan@31 { |
| label = "batt_id"; |
| reg = <0x31>; |
| qcom,decimation = <0>; |
| qcom,pre-div-channel-scaling = <0>; |
| qcom,calibration-type = "ratiometric"; |
| qcom,scale-function = <0>; |
| qcom,hw-settle-time = <2>; |
| qcom,fast-avg-setup = <0>; |
| }; |
| |
| chan@b2 { |
| label = "xo_therm_pu2"; |
| reg = <0xb2>; |
| qcom,decimation = <0>; |
| qcom,pre-div-channel-scaling = <0>; |
| qcom,calibration-type = "ratiometric"; |
| qcom,scale-function = <4>; |
| qcom,hw-settle-time = <2>; |
| qcom,fast-avg-setup = <0>; |
| }; |
| |
| chan@39 { |
| label = "usb_id_nopull"; |
| reg = <0x39>; |
| qcom,decimation = <0>; |
| qcom,pre-div-channel-scaling = <0>; |
| qcom,calibration-type = "ratiometric"; |
| qcom,scale-function = <0>; |
| qcom,hw-settle-time = <2>; |
| qcom,fast-avg-setup = <0>; |
| }; |
| }; |
| |
| &pm8226_chg { |
| status = "ok"; |
| |
| qcom,chgr@1000 { |
| status = "ok"; |
| }; |
| |
| qcom,buck@1100 { |
| status = "ok"; |
| }; |
| |
| qcom,bat-if@1200 { |
| status = "ok"; |
| }; |
| |
| qcom,usb-chgpth@1300 { |
| status = "ok"; |
| }; |
| |
| qcom,boost@1500 { |
| status = "ok"; |
| }; |
| |
| qcom,chg-misc@1600 { |
| status = "ok"; |
| }; |
| }; |