Merge "fmem: interact properly with DMM" into msm-3.0
diff --git a/AndroidKernel.mk b/AndroidKernel.mk
index 50db52c..cc94b69 100644
--- a/AndroidKernel.mk
+++ b/AndroidKernel.mk
@@ -17,7 +17,7 @@
ifeq "$(KERNEL_USE_OF)" "y"
KERNEL_ZIMG = $(KERNEL_OUT)/arch/arm/boot/zImage
DTB_FILE = $(KERNEL_OUT)/arch/arm/boot/$(MSM_ARCH).dtb
-DTS_FILE = $(KERNEL_OUT)/../../../../../../kernel/arch/arm/boot/dts/$(MSM_ARCH).dts
+DTS_FILE = $(TOP)/kernel/arch/arm/boot/dts/$(MSM_ARCH).dts
FULL_KERNEL = $(KERNEL_OUT)/arch/arm/boot/$(MSM_ARCH)-zImage
DTC = $(KERNEL_OUT)/scripts/dtc/dtc
diff --git a/Documentation/devicetree/bindings/spmi/msm-qpnp-gpio.txt b/Documentation/devicetree/bindings/spmi/msm-qpnp-gpio.txt
new file mode 100644
index 0000000..f07d3c2
--- /dev/null
+++ b/Documentation/devicetree/bindings/spmi/msm-qpnp-gpio.txt
@@ -0,0 +1,142 @@
+* msm-qpnp-gpio
+
+msm-qpnp-gpio is a GPIO chip driver for the MSM SPMI implementation.
+It creates a spmi_device for every spmi-dev-container block of device_nodes.
+These device_nodes contained within specify the PMIC GPIO number associated
+with each GPIO chip. The driver will map these to Linux GPIO numbers.
+
+[PMIC GPIO Device Declarations]
+
+-Root Node-
+
+Required properties :
+ - spmi-dev-container : Used to specify the following child nodes as part of the
+ same SPMI device.
+ - gpio-controller : Specify as gpio-contoller. All child nodes will belong to this
+ gpio_chip.
+ - #gpio-cells: We encode a PMIC GPIO number and a 32-bit flag field to
+ specify the gpio configuration. This must be set to '2'.
+ - #address-cells: Specify one address field. This must be set to '1'.
+ - #size-cells: Specify one size-cell. This must be set to '1'.
+ - compatible = "qcom,qpnp-gpio" : Specify driver matching for this driver.
+
+-Child Nodes-
+
+Required properties :
+ - reg : Specify the spmi offset and size for this gpio device.
+ - qcom,qpnp-gpio-num : Specify the PMIC GPIO number for this gpio device.
+
+Optional properties :
+ - qcom,qpnp-gpio-cfg : Specify the PMIC gpio configuration.
+ The format of this configuration is specified in a tuple of 9 entries.
+ These entries should be specified in the same order as the entries listed
+ in this following discription.
+
+ @direction: indicates whether the gpio should be input, output, or
+ both.
+ QPNP_GPIO_DIR_OUT = 1,
+ QPNP_GPIO_DIR_IN = 2,
+ QPNP_GPIO_DIR_BOTH = 3
+
+ @output_type: indicates gpio should be configured as CMOS or open
+ drain.
+ QPNP_GPIO_OUT_BUF_OPEN_DRAIN = 1,
+ QPNP_GPIO_OUT_BUF_CMOS = 0
+
+ @output_value: The gpio output value of the gpio line - 0 or 1
+ @pull: Indicates whether a pull up or pull down should be
+ applied. If a pullup is required the current strength
+ needs to be specified. Current values of 30uA, 1.5uA,
+ 31.5uA, 1.5uA with 30uA boost are supported.
+ QPNP_GPIO_PULL_UP_30 = 0,
+ QPNP_GPIO_PULL_UP_1P5 = 1,
+ QPNP_GPIO_PULL_UP_31P5 = 2,
+ QPNP_GPIO_PULL_UP_1P5_30 = 3,
+ QPNP_GPIO_PULL_DN = 4,
+ QPNP_GPIO_PULL_NO = 5
+
+ @vin_sel: specifies the voltage level when the output is set to 1.
+ For an input gpio specifies the voltage level at which
+ the input is interpreted as a logical 1.
+ QPNP_GPIO_VIN0 = 0,
+ QPNP_GPIO_VIN1 = 1,
+ QPNP_GPIO_VIN2 = 2,
+ QPNP_GPIO_VIN3 = 3,
+ QPNP_GPIO_VIN4 = 4,
+ QPNP_GPIO_VIN5 = 5,
+ QPNP_GPIO_VIN6 = 6,
+ QPNP_GPIO_VIN7 = 7
+
+ @out_strength: the amount of current supplied for an output gpio.
+ QPNP_GPIO_OUT_STRENGTH_HIGH = 1,
+ QPNP_GPIO_OUT_STRENGTH_MED = 2,
+ QPNP_GPIO_OUT_STRENGTH_LOW = 3
+
+ @source_sel: choose alternate function for the gpio. Certain gpios
+ can be paired (shorted) with each other. Some gpio pin
+ can act as alternate functions.
+ QPNP_GPIO_FUNC_NORMAL = 0,
+ QPNP_GPIO_FUNC_PAIRED = 1
+ QPNP_GPIO_FUNC_1 = 2,
+ QPNP_GPIO_FUNC_3 = 3,
+ QPNP_GPIO_DTEST1 = 4,
+ QPNP_GPIO_DTEST2 = 5,
+ QPNP_GPIO_DTEST3 = 6,
+ QPNP_GPIO_DTEST4 = 7
+
+ @inv_int_pol: Invert polarity before feeding the line to the interrupt
+ module in pmic. This feature will almost be never used
+ since the pm8xxx interrupt block can detect both edges
+ and both levels.
+ @master_en: 1 = Enable features within the GPIO block based on
+ configurations.
+ 0 = Completely disable the GPIO block and let the pin
+ float with high impedance regardless of other settings.
+
+[PMIC GPIO clients]
+
+Required properties :
+ - gpios : Contains 3 fields of the form <&gpio_controller pmic_gpio_num flags>
+
+[Example]
+
+qpnp: qcom,spmi@fc4c0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+
+ qcom,pm8941@0 {
+ spmi-slave-container;
+ reg = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ pm8941_gpios: gpios {
+ spmi-dev-container;
+ compatible = "qcom,qpnp-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ qcom,pm8941_gpio1@0xc000 {
+ reg = <0xc000 0x100>;
+ qcom,qpnp-gpio-num = <62>;
+ };
+
+ qcom,pm8941_gpio2@0xc100 {
+ reg = <0xc100 0x100>;
+ qcom,qpnp-gpio-num = <20>;
+ qcom,qpnp-gpio-cfg = <0x1 0x1 0x1 0x2 0x3 0x2 0x0 0x0 0x1>;
+ };
+ };
+
+ qcom,testgpio@1000 {
+ compatible = "qcom,qpnp-testgpio";
+ reg = <0x1000 0x1000>;
+ gpios = <&pm8941_gpios 62 0x0 &pm8941_gpios 20 0x1>;
+ };
+ };
+ };
+};
diff --git a/Documentation/devicetree/bindings/spmi/msm-spmi.txt b/Documentation/devicetree/bindings/spmi/msm-spmi.txt
index fa91514..d50037f 100644
--- a/Documentation/devicetree/bindings/spmi/msm-spmi.txt
+++ b/Documentation/devicetree/bindings/spmi/msm-spmi.txt
@@ -1,13 +1,28 @@
* SPMI
-The spmi Device Tree support interprets up to two levels of Device Tree
+The SPMI Device Tree support interprets up to three levels of Device Tree
topology. The first level is required and specifies only a slave address.
The second level is optional and allows for the specification of different
-offsets within the same 16-bit address space underneath a particular SPMI
-slave ID. Within the second level, any number of address ranges can be
-associated with a particular device within that 16-bit range.
+device nodes within the same 16-bit address space underneath a particular
+SPMI slave ID. Within the second level, any number of address ranges can be
+associated with a particular device within that 16-bit range. An additional
+flag allows for the possiblity to specify that all device nodes should
+have their resources dedicated to only one spmi_device. This flag can
+be specified at the second level, or an optional third level. By default
+without this flag, one spmi_device is created for each device_node.
-First level
+[Root Node]
+
+Recommended properties :
+ - interrupt-controller : Used to specify the root node as the
+ interrupt controller for SPMI devices.
+ - #interrupt-cells : The number of cells used to express one interrupt.
+
+Notes :
+ - It is considered an error to include either spmi-container-dev or
+ spmi-slave-dev in the Root Node.
+
+[First Level Nodes]
Required properites :
@@ -22,51 +37,124 @@
- interrupt-parent : the phandle for the interrupt controller that
services interrupts for this device.
-Second level
+[Second Level Nodes]
Required properties :
- - spmi-dev-container: Used by the parser to understand that this is the second
- level of the tree.
+ - spmi-slave-container: Used by the parser to understand that this is the
+ second level of the tree that includes device nodes associated with the
+ same slave_id.
- reg: <a b> where a is < 65536 and b is a size. Each device supports an
arbitrary number of address ranges.
- compatible : "qcom," prefixed string to match against the driver.
Recommended properties :
- - interrupts : <a b c> where a is the slave ID, b is is the peripheral ID,
+ - interrupts : <a b c> where a is the slave ID, b is the peripheral ID,
c is the device interrupt number (0-7). Each device supports any arbitrary
number of interrupts.
- interrupt-parent : the phandle for the interrupt controller that
services interrupts for this device.
-Example:
+Optional properties :
+
+ - spmi-dev-container: This specifies that all the device nodes specified for
+ this slave_id should have their resources coalesced into only one
+ spmi_device.
+
+[Third Level Nodes]
+
+Required properties :
+
+ - spmi-dev-container: This specifies that all the device nodes specified for
+ this slave_id should have their resources coalesced into only one
+ spmi_device.
+ - reg: <a b> where a is < 65536 and b is a size. Each device supports an
+ arbitrary number of address ranges.
+ - compatible : "qcom," prefixed string to match against the driver.
+
+Recommended properties :
+
+ - interrupts : <a b c> where a is the slave ID, b is the peripheral ID,
+ c is the device interrupt number (0-7). Each device supports any arbitrary
+ number of interrupts.
+ - interrupt-parent : the phandle for the interrupt controller that
+ services interrupts for this device.
+
+Notes :
+ - It is considered an error to include spmi-slave-dev at this level.
+
+[Example]
/ {
- qcom,spmi@fc4c0000 {
+ qpnp: qcom,spmi@fc4c0000 {
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = <&qpnpint>;
- pmic8941@d {
+ interrupt-controller;
+ #interrupt-cells = <3>;
+
+ testint@f {
+ interrupt-parent = <&qpnp>;
+ compatible = "qcom,qpnp-testint";
+ reg = <0xf>;
+ interrupts = <0x3 0x15 0x0 0x3 0x15 0x02 0x1 0x47 0x0>;
+
+ };
+
+ pm8941@0 {
+ spmi-slave-container;
+ reg = <0x0>;
#address-cells = <1>;
#size-cells = <1>;
- reg = <0xd>;
- spmi-dev-container;
- coincell@2800 {
- compatible = "qcom,qpnp-coincell";
- reg = <0x2800 0x4000>;
- interrupts = <0xd 0x28 0x6 0xd 0x28 0x3>;
+ pm8941_gpios: gpios {
+ spmi-dev-container;
+ compatible = "qcom,qpnp-gpio";
+ gpio-controller;
+ #gpio-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ pm8941_gpio1@0xc000 {
+ compatible = "qcom,qpnp-gpio";
+ reg = <0xc000 0x100>;
+ qcom,qpnp_gpio = <1>;
+ interrupt-parent = <&qpnp>;
+ interrupts = <0x3 0x15 0x02 0x1 0x47 0x0>;
+ };
+
+ pm8941_gpio2@0xc100 {
+ compatible = "qcom,qpnp-gpio";
+ reg = <0xc100 0x100>;
+ qcom,qpnp_gpio = <2>;
+ interrupt-parent = <&qpnp>;
+ interrupts = <0x3 0x15 0x0>;
+ };
};
- pon@800 {
- compatible = "qcom,qpnp-pon";
- reg = <0x800 0x4000>;
+
+ testgpio@0x1000 {
+ compatible = "qcom,qpnp-testgpio";
+ reg = <0x1000 0x1000>;
+ qpnp-gpios = <&pm8941_gpios 0x0>;
};
};
- customer_dev@2 {
- compatible = "qcom,qpnp-pon";
+ pm8841@2 {
+ spmi-slave-container;
reg = <0x2>;
- interrupts = <0x2 0x08 0x1 0x2 0x8 0x3>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spmi-dev-container;
+ compatible = "qcom,qpnp-gpio";
+
+ pm8841_gpio1@0xc000 {
+ reg = <0xc000 0x100>;
+ qcom,qpnp_gpio = <1>;
+ };
+
+ pm8841_gpio2@0xc100 {
+ reg = <0xc100 0x100>;
+ qcom,qpnp_gpio = <2>;
+ };
};
+
};
};
diff --git a/Documentation/devicetree/bindings/spmi/spmi-pmic-arb.txt b/Documentation/devicetree/bindings/spmi/spmi-pmic-arb.txt
index 8cc3c54..b5ca08e 100644
--- a/Documentation/devicetree/bindings/spmi/spmi-pmic-arb.txt
+++ b/Documentation/devicetree/bindings/spmi/spmi-pmic-arb.txt
@@ -17,6 +17,13 @@
Up to a maximum of 256 peripherals are supported and the mapping is target
specific.
+Data format of pmic-arb-ppid-map:
+<0x13100001>
+value is 32 bit.
+MSB 12 bits are the PPID
+12 bits padding
+LSB 8 bit are the APID
+
Example:
qcom,spmi@fc4c0000 {
@@ -27,6 +34,8 @@
interrupts = <0>;
qcom,pmic-arb-ee = <0>;
qcom,pmic-arb-channel = <0>;
- qcom,pmic-arb-ppid-map = <0x130 0x00>, /* PPID 0x130, APID 0 */
- <0x131 0x01>; /* PPID 0x131, APID 1 */
+ qcom,pmic-arb-ppid-map = <0x13000000>, /* PPID 0x130, APID 0 */
+ <0x13100001>, /* PPID 0x131, APID 1 */
};
+
+
diff --git a/Documentation/mmc/00-INDEX b/Documentation/mmc/00-INDEX
index 93dd7a7..a9ba672 100644
--- a/Documentation/mmc/00-INDEX
+++ b/Documentation/mmc/00-INDEX
@@ -4,3 +4,5 @@
- info on SD and MMC device attributes
mmc-dev-parts.txt
- info on SD and MMC device partitions
+mmc-async-req.txt
+ - info on mmc asynchronous requests
diff --git a/Documentation/mmc/mmc-async-req.txt b/Documentation/mmc/mmc-async-req.txt
new file mode 100644
index 0000000..ae1907b
--- /dev/null
+++ b/Documentation/mmc/mmc-async-req.txt
@@ -0,0 +1,87 @@
+Rationale
+=========
+
+How significant is the cache maintenance overhead?
+It depends. Fast eMMC and multiple cache levels with speculative cache
+pre-fetch makes the cache overhead relatively significant. If the DMA
+preparations for the next request are done in parallel with the current
+transfer, the DMA preparation overhead would not affect the MMC performance.
+The intention of non-blocking (asynchronous) MMC requests is to minimize the
+time between when an MMC request ends and another MMC request begins.
+Using mmc_wait_for_req(), the MMC controller is idle while dma_map_sg and
+dma_unmap_sg are processing. Using non-blocking MMC requests makes it
+possible to prepare the caches for next job in parallel with an active
+MMC request.
+
+MMC block driver
+================
+
+The mmc_blk_issue_rw_rq() in the MMC block driver is made non-blocking.
+The increase in throughput is proportional to the time it takes to
+prepare (major part of preparations are dma_map_sg() and dma_unmap_sg())
+a request and how fast the memory is. The faster the MMC/SD is the
+more significant the prepare request time becomes. Roughly the expected
+performance gain is 5% for large writes and 10% on large reads on a L2 cache
+platform. In power save mode, when clocks run on a lower frequency, the DMA
+preparation may cost even more. As long as these slower preparations are run
+in parallel with the transfer performance won't be affected.
+
+Details on measurements from IOZone and mmc_test
+================================================
+
+https://wiki.linaro.org/WorkingGroups/Kernel/Specs/StoragePerfMMC-async-req
+
+MMC core API extension
+======================
+
+There is one new public function mmc_start_req().
+It starts a new MMC command request for a host. The function isn't
+truly non-blocking. If there is an ongoing async request it waits
+for completion of that request and starts the new one and returns. It
+doesn't wait for the new request to complete. If there is no ongoing
+request it starts the new request and returns immediately.
+
+MMC host extensions
+===================
+
+There are two optional members in the mmc_host_ops -- pre_req() and
+post_req() -- that the host driver may implement in order to move work
+to before and after the actual mmc_host_ops.request() function is called.
+In the DMA case pre_req() may do dma_map_sg() and prepare the DMA
+descriptor, and post_req() runs the dma_unmap_sg().
+
+Optimize for the first request
+==============================
+
+The first request in a series of requests can't be prepared in parallel
+with the previous transfer, since there is no previous request.
+The argument is_first_req in pre_req() indicates that there is no previous
+request. The host driver may optimize for this scenario to minimize
+the performance loss. A way to optimize for this is to split the current
+request in two chunks, prepare the first chunk and start the request,
+and finally prepare the second chunk and start the transfer.
+
+Pseudocode to handle is_first_req scenario with minimal prepare overhead:
+
+if (is_first_req && req->size > threshold)
+ /* start MMC transfer for the complete transfer size */
+ mmc_start_command(MMC_CMD_TRANSFER_FULL_SIZE);
+
+ /*
+ * Begin to prepare DMA while cmd is being processed by MMC.
+ * The first chunk of the request should take the same time
+ * to prepare as the "MMC process command time".
+ * If prepare time exceeds MMC cmd time
+ * the transfer is delayed, guesstimate max 4k as first chunk size.
+ */
+ prepare_1st_chunk_for_dma(req);
+ /* flush pending desc to the DMAC (dmaengine.h) */
+ dma_issue_pending(req->dma_desc);
+
+ prepare_2nd_chunk_for_dma(req);
+ /*
+ * The second issue_pending should be called before MMC runs out
+ * of the first chunk. If the MMC runs out of the first data chunk
+ * before this call, the transfer is delayed.
+ */
+ dma_issue_pending(req->dma_desc);
diff --git a/Documentation/usb/dwc3.txt b/Documentation/usb/dwc3.txt
new file mode 100644
index 0000000..7b590ed
--- /dev/null
+++ b/Documentation/usb/dwc3.txt
@@ -0,0 +1,45 @@
+
+ TODO
+~~~~~~
+Please pick something while reading :)
+
+- Convert interrupt handler to per-ep-thread-irq
+
+ As it turns out some DWC3-commands ~1ms to complete. Currently we spin
+ until the command completes which is bad.
+
+ Implementation idea:
+ - dwc core implements a demultiplexing irq chip for interrupts per
+ endpoint. The interrupt numbers are allocated during probe and belong
+ to the device. If MSI provides per-endpoint interrupt this dummy
+ interrupt chip can be replaced with "real" interrupts.
+ - interrupts are requested / allocated on usb_ep_enable() and removed on
+ usb_ep_disable(). Worst case are 32 interrupts, the lower limit is two
+ for ep0/1.
+ - dwc3_send_gadget_ep_cmd() will sleep in wait_for_completion_timeout()
+ until the command completes.
+ - the interrupt handler is split into the following pieces:
+ - primary handler of the device
+ goes through every event and calls generic_handle_irq() for event
+ it. On return from generic_handle_irq() in acknowledges the event
+ counter so interrupt goes away (eventually).
+
+ - threaded handler of the device
+ none
+
+ - primary handler of the EP-interrupt
+ reads the event and tries to process it. Everything that requries
+ sleeping is handed over to the Thread. The event is saved in an
+ per-endpoint data-structure.
+ We probably have to pay attention not to process events once we
+ handed something to thread so we don't process event X prio Y
+ where X > Y.
+
+ - threaded handler of the EP-interrupt
+ handles the remaining EP work which might sleep such as waiting
+ for command completion.
+
+ Latency:
+ There should be no increase in latency since the interrupt-thread has a
+ high priority and will be run before an average task in user land
+ (except the user changed priorities).
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0a7fe5f..e6f6998 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -131,7 +131,7 @@
config GENERIC_LOCKBREAK
bool
- default y
+ default y if !ARM_TICKET_LOCKS
depends on SMP && PREEMPT
config ARM_TICKET_LOCKS
@@ -140,7 +140,7 @@
Enable ticket locks, which help preserve fairness among
contended locks and prevent livelock in multicore systems.
Say 'y' if system stability is important.
- default y if ARCH_MSM_SCORPIONMP
+ default y if ARCH_MSM_SCORPIONMP || ARCH_MSM_KRAITMP
depends on SMP
config RWSEM_GENERIC_SPINLOCK
@@ -645,6 +645,7 @@
select GENERIC_TIME
select GENERIC_ALLOCATOR
select HAVE_SCHED_CLOCK
+ select HAVE_CLK_PREPARE
help
Support for Qualcomm MSM/QSD based systems. This runs on the
apps processor of the MSM/QSD and depends on a shared memory
diff --git a/arch/arm/boot/dts/msmcopper.dts b/arch/arm/boot/dts/msmcopper.dts
index 725971d..b9179a3 100644
--- a/arch/arm/boot/dts/msmcopper.dts
+++ b/arch/arm/boot/dts/msmcopper.dts
@@ -80,7 +80,7 @@
spi@f9924000 {
compatible = "qcom,spi-qup-v2";
reg = <0xf9924000 0x1000>;
- interrupts = <96>;
+ interrupts = <0 96 0>;
spi-max-frequency = <24000000>;
};
@@ -94,93 +94,96 @@
interrupts = <0 190 0 0 187 0>;
qcom,pmic-arb-ee = <0>;
qcom,pmic-arb-channel = <0>;
- qcom,pmic-arb-ppid-map = <0x130 0x00>, /* PM8941_LDO1 */
- <0x131 0x01>, /* PM8941_LDO2 */
- <0x132 0x02>, /* PM8941_LDO3 */
- <0x133 0x03>, /* PM8941_LDO4 */
- <0x134 0x04>, /* PM8941_LDO5 */
- <0x135 0x05>, /* PM8941_LDO6 */
- <0x136 0x06>, /* PM8941_LDO7 */
- <0x137 0x07>, /* PM8941_LDO8 */
- <0x138 0x08>, /* PM8941_LDO9 */
- <0x139 0x09>, /* PM8941_LDO10 */
- <0x13a 0x0a>, /* PM8941_LDO11 */
- <0x13b 0x0b>, /* PM8941_LDO12 */
- <0x13c 0x0c>, /* PM8941_LDO13 */
- <0x13d 0x0d>, /* PM8941_LDO14 */
- <0x13e 0x0e>, /* PM8941_LDO15 */
- <0x13f 0x0f>, /* PM8941_LDO16 */
- <0x140 0x10>, /* PM8941_LDO17 */
- <0x141 0x11>, /* PM8941_LDO18 */
- <0x142 0x12>, /* PM8941_LDO19 */
- <0x143 0x13>, /* PM8941_LDO20 */
- <0x144 0x14>, /* PM8941_LDO21 */
- <0x145 0x15>, /* PM8941_LDO22 */
- <0x146 0x16>, /* PM8941_LDO23 */
- <0x147 0x17>, /* PM8941_LDO24 */
- <0x148 0x18>, /* PM8941_LDO25 */
- <0x149 0x19>, /* PM8941_LDO26 */
- <0x0c0 0x1a>, /* PM8941_GPIO1 */
- <0x0c1 0x1b>, /* PM8941_GPIO2 */
- <0x0c2 0x1c>, /* PM8941_GPIO3 */
- <0x0c3 0x1d>, /* PM8941_GPIO4 */
- <0x0c4 0x1e>, /* PM8941_GPIO5 */
- <0x0c5 0x1f>, /* PM8941_GPIO6 */
- <0x0c6 0x20>, /* PM8941_GPIO7 */
- <0x0c7 0x21>, /* PM8941_GPIO8 */
- <0x0c8 0x22>, /* PM8941_GPIO9 */
- <0x0c9 0x23>, /* PM8941_GPIO10 */
- <0x0ca 0x24>, /* PM8941_GPIO11 */
- <0x0cb 0x25>, /* PM8941_GPIO12 */
- <0x0cc 0x26>, /* PM8941_GPIO13 */
- <0x0cd 0x27>, /* PM8941_GPIO14 */
- <0x0ce 0x28>, /* PM8941_GPIO15 */
- <0x0cf 0x29>, /* PM8941_GPIO16 */
- <0x0d0 0x2a>, /* PM8941_GPIO17 */
- <0x0d1 0x2b>, /* PM8941_GPIO18 */
- <0x0d2 0x2c>, /* PM8941_GPIO19 */
- <0x0d3 0x2d>, /* PM8941_GPIO20 */
- <0x0d4 0x2e>, /* PM8941_GPIO21 */
- <0x0d5 0x2f>, /* PM8941_GPIO22 */
- <0x0d6 0x30>, /* PM8941_GPIO23 */
- <0x0d7 0x31>, /* PM8941_GPIO24 */
- <0x0d8 0x32>, /* PM8941_GPIO25 */
- <0x0d9 0x33>, /* PM8941_GPIO26 */
- <0x0da 0x34>, /* PM8941_GPIO27 */
- <0x0db 0x35>, /* PM8941_GPIO28 */
- <0x0dc 0x36>, /* PM8941_GPIO29 */
- <0x0dd 0x37>, /* PM8941_GPIO30 */
- <0x0de 0x38>, /* PM8941_GPIO31 */
- <0x0df 0x39>, /* PM8941_GPIO32 */
- <0x0e0 0x3a>, /* PM8941_GPIO33 */
- <0x0e1 0x3b>, /* PM8941_GPIO34 */
- <0x0e2 0x3c>, /* PM8941_GPIO35 */
- <0x0e3 0x3d>, /* PM8941_GPIO36 */
- <0x028 0x3e>, /* COINCELL */
- <0x005 0x3f>, /* INTERRUPT */
- <0x001 0x40>, /* PM8941_0 */
- <0x201 0x41>, /* PM8841_0 */
- <0x101 0x42>, /* PM8941_1 */
- <0x301 0x43>, /* PM8841_1 */
- <0x008 0x44>, /* PON0 */
- <0x208 0x45>, /* PON1 */
- <0x110 0x46>, /* PM8941_SMPS1 */
- <0x111 0x47>, /* PM8941_SMPS2 */
- <0x112 0x48>, /* PM8941_SMPS3 */
- <0x310 0x49>, /* PM8841_SMPS1 */
- <0x311 0x4a>, /* PM8841_SMPS2 */
- <0x312 0x4b>, /* PM8841_SMPS3 */
- <0x313 0x4c>, /* PM8841_SMPS4 */
- <0x314 0x4d>, /* PM8841_SMPS5 */
- <0x315 0x4e>, /* PM8841_SMPS6 */
- <0x316 0x4f>, /* PM8841_SMPS7 */
- <0x317 0x50>, /* PM8841_SMPS8 */
- <0x050 0x51>, /* SHARED_XO */
- <0x051 0x52>, /* BB_CLK1 */
- <0x052 0x53>, /* BB_CLK2 */
- <0x059 0x54>, /* SLEEP_CLK */
- <0x010 0x55>, /* SMBC_OVP */
- <0x011 0x56>, /* SMBC_CHG */
- <0x012 0x57>; /* SMBC_BIF */
+ qcom,pmic-arb-ppid-map = <0x13000000>, /* PM8941_LDO1 */
+ <0x13100001>, /* PM8941_LDO2 */
+ <0x13200002>, /* PM8941_LDO3 */
+ <0x13300003>, /* PM8941_LDO4 */
+ <0x13400004>, /* PM8941_LDO5 */
+ <0x13500005>, /* PM8941_LDO6 */
+ <0x13600006>, /* PM8941_LDO7 */
+ <0x13700007>, /* PM8941_LDO8 */
+ <0x13800008>, /* PM8941_LDO9 */
+ <0x13900009>, /* PM8941_LDO10 */
+ <0x13a0000a>, /* PM8941_LDO11 */
+ <0x13b0000b>, /* PM8941_LDO12 */
+ <0x13c0000c>, /* PM8941_LDO13 */
+ <0x13d0000d>, /* PM8941_LDO14 */
+ <0x13e0000e>, /* PM8941_LDO15 */
+ <0x13f0000f>, /* PM8941_LDO16 */
+ <0x14000010>, /* PM8941_LDO17 */
+ <0x14100011>, /* PM8941_LDO18 */
+ <0x14200012>, /* PM8941_LDO19 */
+ <0x14300013>, /* PM8941_LDO20 */
+ <0x14400014>, /* PM8941_LDO21 */
+ <0x14500015>, /* PM8941_LDO22 */
+ <0x14600016>, /* PM8941_LDO23 */
+ <0x14700017>, /* PM8941_LDO24 */
+ <0x14800018>, /* PM8941_LDO25 */
+ <0x14900019>, /* PM8941_LDO26 */
+ <0x0c00001a>, /* PM8941_GPIO1 */
+ <0x0c10001b>, /* PM8941_GPIO2 */
+ <0x0c20001c>, /* PM8941_GPIO3 */
+ <0x0c30001d>, /* PM8941_GPIO4 */
+ <0x0c40001e>, /* PM8941_GPIO5 */
+ <0x0c50001f>, /* PM8941_GPIO6 */
+ <0x0c600020>, /* PM8941_GPIO7 */
+ <0x0c700021>, /* PM8941_GPIO8 */
+ <0x0c800022>, /* PM8941_GPIO9 */
+ <0x0c900023>, /* PM8941_GPIO10 */
+ <0x0ca00024>, /* PM8941_GPIO11 */
+ <0x0cb00025>, /* PM8941_GPIO12 */
+ <0x0cc00026>, /* PM8941_GPIO13 */
+ <0x0cd00027>, /* PM8941_GPIO14 */
+ <0x0ce00028>, /* PM8941_GPIO15 */
+ <0x0cf00029>, /* PM8941_GPIO16 */
+ <0x0d00002a>, /* PM8941_GPIO17 */
+ <0x0d10002b>, /* PM8941_GPIO18 */
+ <0x0d20002c>, /* PM8941_GPIO19 */
+ <0x0d30002d>, /* PM8941_GPIO20 */
+ <0x0d40002e>, /* PM8941_GPIO21 */
+ <0x0d50002f>, /* PM8941_GPIO22 */
+ <0x0d600030>, /* PM8941_GPIO23 */
+ <0x0d700031>, /* PM8941_GPIO24 */
+ <0x0d800032>, /* PM8941_GPIO25 */
+ <0x0d900033>, /* PM8941_GPIO26 */
+ <0x0da00034>, /* PM8941_GPIO27 */
+ <0x0db00035>, /* PM8941_GPIO28 */
+ <0x0dc00036>, /* PM8941_GPIO29 */
+ <0x0dd00037>, /* PM8941_GPIO30 */
+ <0x0de00038>, /* PM8941_GPIO31 */
+ <0x0df00039>, /* PM8941_GPIO32 */
+ <0x0e00003a>, /* PM8941_GPIO33 */
+ <0x0e10003b>, /* PM8941_GPIO34 */
+ <0x0e20003c>, /* PM8941_GPIO35 */
+ <0x0e30003d>, /* PM8941_GPIO36 */
+ <0x0280003e>, /* COINCELL */
+ <0x0100003f>, /* SMBC_OVP */
+ <0x01100040>, /* SMBC_CHG */
+ <0x01200041>, /* SMBC_BIF */
+ <0x00500042>, /* INTERRUPT */
+ <0x00100043>, /* PM8941_0 */
+ <0x20100044>, /* PM8841_0 */
+ <0x10100045>, /* PM8941_1 */
+ <0x30100046>, /* PM8841_1 */
+ <0x00800047>, /* PON0 */
+ <0x20800048>, /* PON1 */
+ <0x11000049>, /* PM8941_SMPS1 */
+ <0x1110004a>, /* PM8941_SMPS2 */
+ <0x1120004b>, /* PM8941_SMPS3 */
+ <0x3100004c>, /* PM8841_SMPS1 */
+ <0x3110004d>, /* PM8841_SMPS2 */
+ <0x3120004e>, /* PM8841_SMPS3 */
+ <0x3130004f>, /* PM8841_SMPS4 */
+ <0x31400050>, /* PM8841_SMPS5 */
+ <0x31500051>, /* PM8841_SMPS6 */
+ <0x31600052>, /* PM8841_SMPS7 */
+ <0x31700053>, /* PM8841_SMPS8 */
+ <0x05000054>, /* SHARED_XO */
+ <0x05100055>, /* BB_CLK1 */
+ <0x05200056>, /* BB_CLK2 */
+ <0x05900057>, /* SLEEP_CLK */
+ <0x07000058>, /* PBS_CORE */
+ <0x07100059>, /* PBS_CLIENT1 */
+ <0x0720005a>; /* PBS_CLIENT2 */
};
};
diff --git a/arch/arm/configs/fsm9xxx-perf_defconfig b/arch/arm/configs/fsm9xxx-perf_defconfig
index 3d4b37d..c671d32 100644
--- a/arch/arm/configs/fsm9xxx-perf_defconfig
+++ b/arch/arm/configs/fsm9xxx-perf_defconfig
@@ -114,7 +114,6 @@
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
# CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_KEYBOARD_PMIC8058 is not set
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=y
diff --git a/arch/arm/configs/fsm9xxx_defconfig b/arch/arm/configs/fsm9xxx_defconfig
index ebff2d2..80252d8 100644
--- a/arch/arm/configs/fsm9xxx_defconfig
+++ b/arch/arm/configs/fsm9xxx_defconfig
@@ -112,7 +112,6 @@
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
# CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_KEYBOARD_PMIC8058 is not set
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=y
diff --git a/arch/arm/configs/msm-copper_defconfig b/arch/arm/configs/msm-copper_defconfig
index 9672d2c..e9479c6 100644
--- a/arch/arm/configs/msm-copper_defconfig
+++ b/arch/arm/configs/msm-copper_defconfig
@@ -37,6 +37,10 @@
CONFIG_CPU_HAS_L2_PMU=y
# CONFIG_MSM_FIQ_SUPPORT is not set
# CONFIG_MSM_PROC_COMM is not set
+CONFIG_MSM_SMD=y
+CONFIG_MSM_SMD_PKG4=y
+CONFIG_MSM_IPC_ROUTER=y
+CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y
# CONFIG_MSM_HW3D is not set
CONFIG_MSM_DIRECT_SCLK_ACCESS=y
CONFIG_NO_HZ=y
@@ -100,8 +104,12 @@
# CONFIG_BATTERY_MSM is not set
# CONFIG_HWMON is not set
# CONFIG_MFD_SUPPORT is not set
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_STUB=y
CONFIG_ION=y
CONFIG_ION_MSM=y
+CONFIG_FB=y
+CONFIG_FB_VIRTUAL=y
# CONFIG_HID_SUPPORT is not set
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_CI13XXX_MSM=y
@@ -168,11 +176,3 @@
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRC_CCITT=y
CONFIG_LIBCRC32C=y
-CONFIG_MSM_SMD=y
-CONFIG_MSM_SMD_PKG4=y
-CONFIG_MSM_SMD_PKT=y
-CONFIG_MSM_SMD_DEBUG=y
-CONFIG_MSM_SMD_TTY=y
-CONFIG_MSM_N_WAY_SMD=y
-CONFIG_MSM_N_WAY_SMSM=y
-CONFIG_MSM_SMD_LOGGING=y
diff --git a/arch/arm/configs/msm7627-perf_defconfig b/arch/arm/configs/msm7627-perf_defconfig
index ea5c7c9..3fbe374 100644
--- a/arch/arm/configs/msm7627-perf_defconfig
+++ b/arch/arm/configs/msm7627-perf_defconfig
@@ -263,6 +263,7 @@
CONFIG_MMC_PARANOID_SD_INIT=y
CONFIG_MMC_BLOCK_MINORS=32
# CONFIG_MMC_BLOCK_BOUNCE is not set
+CONFIG_MMC_TEST=m
CONFIG_MMC_MSM=y
CONFIG_MMC_MSM_SDIO_SUPPORT=y
CONFIG_SWITCH=y
diff --git a/arch/arm/configs/msm7627_defconfig b/arch/arm/configs/msm7627_defconfig
index 0841f7e..f05b5f7 100644
--- a/arch/arm/configs/msm7627_defconfig
+++ b/arch/arm/configs/msm7627_defconfig
@@ -261,6 +261,7 @@
CONFIG_MMC_PARANOID_SD_INIT=y
CONFIG_MMC_BLOCK_MINORS=32
# CONFIG_MMC_BLOCK_BOUNCE is not set
+CONFIG_MMC_TEST=m
CONFIG_MMC_MSM=y
CONFIG_MMC_MSM_SDIO_SUPPORT=y
CONFIG_SWITCH=y
diff --git a/arch/arm/configs/msm7627a-perf_defconfig b/arch/arm/configs/msm7627a-perf_defconfig
index dd8cb16..44986a4 100644
--- a/arch/arm/configs/msm7627a-perf_defconfig
+++ b/arch/arm/configs/msm7627a-perf_defconfig
@@ -19,6 +19,7 @@
CONFIG_SLAB=y
CONFIG_PROFILING=y
CONFIG_OPROFILE=y
+CONFIG_KPROBES=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODVERSIONS=y
@@ -49,6 +50,7 @@
CONFIG_BT_MSM_PINTEST=y
CONFIG_MSM_RPC_VIBRATOR=y
CONFIG_PM8XXX_RPC_VIBRATOR=y
+CONFIG_MSM_SPM_V2=y
CONFIG_ARM_THUMBEE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
@@ -56,6 +58,7 @@
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
+CONFIG_VMALLOC_RESERVE=0xC800000
CONFIG_CP_ACCESS=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
@@ -228,7 +231,11 @@
# CONFIG_HWMON is not set
CONFIG_MARIMBA_CORE=y
CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_CONTROLLER=y
CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_SUBDEV_API=y
+# CONFIG_RC_CORE is not set
+# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
# CONFIG_MT9T013 is not set
# CONFIG_MT9D112 is not set
CONFIG_OV5640=y
@@ -326,18 +333,15 @@
CONFIG_NLS_ISO8859_1=y
CONFIG_PRINTK_TIME=y
CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_SHIRQ=y
# CONFIG_SCHED_DEBUG is not set
CONFIG_TIMER_STATS=y
CONFIG_DEBUG_STACK_USAGE=y
CONFIG_DEBUG_INFO=y
-# CONFIG_FTRACE is not set
+CONFIG_ENABLE_DEFAULT_TRACERS=y
CONFIG_DYNAMIC_DEBUG=y
CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
-CONFIG_EARLY_PRINTK=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/msm7627a_defconfig b/arch/arm/configs/msm7627a_defconfig
index 199b91f..6ba9790 100644
--- a/arch/arm/configs/msm7627a_defconfig
+++ b/arch/arm/configs/msm7627a_defconfig
@@ -19,6 +19,7 @@
CONFIG_SLAB=y
CONFIG_PROFILING=y
CONFIG_OPROFILE=y
+CONFIG_KPROBES=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODVERSIONS=y
@@ -45,11 +46,11 @@
# CONFIG_MSM_HW3D is not set
CONFIG_MSM7X27A_AUDIO=y
CONFIG_MSM_DMA_TEST=y
-# CONFIG_MSM_JTAG_V7 is not set
CONFIG_MSM_SLEEP_STATS_DEVICE=y
CONFIG_BT_MSM_PINTEST=y
CONFIG_MSM_RPC_VIBRATOR=y
CONFIG_PM8XXX_RPC_VIBRATOR=y
+CONFIG_MSM_SPM_V2=y
CONFIG_ARM_THUMBEE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
@@ -57,6 +58,7 @@
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
+CONFIG_VMALLOC_RESERVE=0xC800000
CONFIG_CP_ACCESS=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
@@ -230,10 +232,15 @@
# CONFIG_HWMON is not set
CONFIG_MARIMBA_CORE=y
CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_CONTROLLER=y
CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_SUBDEV_API=y
+# CONFIG_RC_CORE is not set
+# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
# CONFIG_MT9T013 is not set
# CONFIG_MT9D112 is not set
CONFIG_OV5640=y
+CONFIG_OV5647=y
CONFIG_WEBCAM_OV7692_QRD=y
CONFIG_WEBCAM_OV9726=y
# CONFIG_MT9P012 is not set
@@ -326,12 +333,11 @@
CONFIG_NLS_ISO8859_1=y
CONFIG_PRINTK_TIME=y
CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_SHIRQ=y
-# CONFIG_SCHED_DEBUG is not set
CONFIG_LOCKUP_DETECTOR=y
CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_SCHED_DEBUG is not set
CONFIG_TIMER_STATS=y
CONFIG_DEBUG_SLAB=y
CONFIG_DEBUG_SLAB_LEAK=y
@@ -341,14 +347,10 @@
CONFIG_DEBUG_STACK_USAGE=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_LIST=y
-CONFIG_LATENCYTOP=y
CONFIG_DEBUG_PAGEALLOC=y
-# CONFIG_FTRACE is not set
+CONFIG_ENABLE_DEFAULT_TRACERS=y
CONFIG_DYNAMIC_DEBUG=y
CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
-CONFIG_EARLY_PRINTK=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRC_CCITT=y
-CONFIG_OV5647=y
diff --git a/arch/arm/configs/msm7630-perf_defconfig b/arch/arm/configs/msm7630-perf_defconfig
index e319f0d..b6c56b6 100644
--- a/arch/arm/configs/msm7630-perf_defconfig
+++ b/arch/arm/configs/msm7630-perf_defconfig
@@ -40,12 +40,13 @@
CONFIG_MSM_MEMORY_LOW_POWER_MODE_IDLE_RETENTION=y
CONFIG_MSM_MEMORY_LOW_POWER_MODE_SUSPEND_DEEP_POWER_DOWN=y
CONFIG_MSM_IDLE_WAIT_ON_MODEM=2000
-# CONFIG_MSM_JTAG_V7 is not set
CONFIG_MSM_STANDALONE_POWER_COLLAPSE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
+CONFIG_HIGHMEM=y
+CONFIG_VMALLOC_RESERVE=0x1A000000
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="init=/sbin/init root=/dev/ram rw initrd=0x11000000,16M console=ttyDCC0 mem=88M ip=dhcp"
@@ -223,7 +224,6 @@
CONFIG_INPUT_EVBUG=m
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_PMIC8XXX=y
-# CONFIG_KEYBOARD_PMIC8058 is not set
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_MSM=y
@@ -329,6 +329,7 @@
CONFIG_MMC_PARANOID_SD_INIT=y
CONFIG_MMC_BLOCK_MINORS=32
# CONFIG_MMC_BLOCK_BOUNCE is not set
+CONFIG_MMC_TEST=m
CONFIG_MMC_MSM=y
CONFIG_MMC_MSM_SDIO_SUPPORT=y
CONFIG_MMC_MSM_CARD_HW_DETECTION=y
diff --git a/arch/arm/configs/msm7630_defconfig b/arch/arm/configs/msm7630_defconfig
index b4babeb..851f189 100644
--- a/arch/arm/configs/msm7630_defconfig
+++ b/arch/arm/configs/msm7630_defconfig
@@ -40,13 +40,14 @@
CONFIG_MSM_MEMORY_LOW_POWER_MODE_IDLE_RETENTION=y
CONFIG_MSM_MEMORY_LOW_POWER_MODE_SUSPEND_DEEP_POWER_DOWN=y
CONFIG_MSM_IDLE_WAIT_ON_MODEM=2000
-# CONFIG_MSM_JTAG_V7 is not set
CONFIG_MSM_STANDALONE_POWER_COLLAPSE=y
CONFIG_STRICT_MEMORY_RWX=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
+CONFIG_HIGHMEM=y
+CONFIG_VMALLOC_RESERVE=0x1A000000
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="init=/sbin/init root=/dev/ram rw initrd=0x11000000,16M console=ttyDCC0 mem=88M ip=dhcp"
@@ -224,7 +225,6 @@
CONFIG_INPUT_EVBUG=m
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_PMIC8XXX=y
-# CONFIG_KEYBOARD_PMIC8058 is not set
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_MSM=y
@@ -331,6 +331,7 @@
CONFIG_MMC_PARANOID_SD_INIT=y
CONFIG_MMC_BLOCK_MINORS=32
# CONFIG_MMC_BLOCK_BOUNCE is not set
+CONFIG_MMC_TEST=m
CONFIG_MMC_MSM=y
CONFIG_MMC_MSM_SDIO_SUPPORT=y
CONFIG_MMC_MSM_CARD_HW_DETECTION=y
@@ -371,7 +372,6 @@
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_KERNEL=y
-# CONFIG_SCHED_DEBUG is not set
CONFIG_LOCKUP_DETECTOR=y
CONFIG_DETECT_HUNG_TASK=y
# CONFIG_SCHED_DEBUG is not set
@@ -380,7 +380,6 @@
CONFIG_DEBUG_SLAB=y
CONFIG_DEBUG_SLAB_LEAK=y
# CONFIG_DEBUG_PREEMPT is not set
-CONFIG_DEBUG_SPINLOCK=y
CONFIG_PROVE_LOCKING=y
CONFIG_DEBUG_SPINLOCK_SLEEP=y
CONFIG_DEBUG_STACK_USAGE=y
diff --git a/arch/arm/configs/msm8660-perf_defconfig b/arch/arm/configs/msm8660-perf_defconfig
index b3a45d2..494b3a3 100644
--- a/arch/arm/configs/msm8660-perf_defconfig
+++ b/arch/arm/configs/msm8660-perf_defconfig
@@ -70,7 +70,6 @@
CONFIG_MSM_RPM_STATS_LOG=y
CONFIG_MSM_WATCHDOG=y
CONFIG_MSM_DLOAD_MODE=y
-# CONFIG_MSM_JTAG_V7 is not set
CONFIG_MSM_ETM=y
CONFIG_MSM_SLEEP_STATS=y
CONFIG_MSM_GSBI9_UART=y
@@ -235,7 +234,7 @@
CONFIG_PMIC8XXX_VIBRATOR=y
CONFIG_PMIC8XXX_UPL=y
CONFIG_PMIC8058_XOADC=y
-CONFIG_TZCOM=y
+CONFIG_QSEECOM=y
CONFIG_SCSI=y
CONFIG_SCSI_TGT=y
CONFIG_BLK_DEV_SD=y
@@ -272,7 +271,6 @@
CONFIG_KEYBOARD_GPIO=y
CONFIG_KEYBOARD_MATRIX=y
CONFIG_KEYBOARD_PMIC8XXX=y
-# CONFIG_KEYBOARD_PMIC8058 is not set
CONFIG_INPUT_JOYSTICK=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ATMEL_MAXTOUCH=y
@@ -299,7 +297,6 @@
CONFIG_DEBUG_GPIO=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_SX150X=y
-# CONFIG_MPP_PMIC8901 is not set
CONFIG_POWER_SUPPLY=y
# CONFIG_BATTERY_MSM is not set
CONFIG_BATTERY_MSM8X60=y
@@ -324,9 +321,9 @@
CONFIG_VIDEO_DEV=y
# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
CONFIG_USB_VIDEO_CLASS=y
+CONFIG_IMX074=y
CONFIG_WEBCAM_OV9726=y
CONFIG_MT9E013=y
-CONFIG_IMX074=y
CONFIG_MSM_GEMINI=y
CONFIG_RADIO_TAVARUA=y
CONFIG_ION=y
@@ -388,6 +385,7 @@
CONFIG_MMC_PARANOID_SD_INIT=y
CONFIG_MMC_BLOCK_MINORS=32
# CONFIG_MMC_BLOCK_BOUNCE is not set
+CONFIG_MMC_TEST=m
CONFIG_MMC_MSM=y
CONFIG_MMC_MSM_SDIO_SUPPORT=y
CONFIG_MMC_MSM_CARD_HW_DETECTION=y
diff --git a/arch/arm/configs/msm8660_defconfig b/arch/arm/configs/msm8660_defconfig
index 1f511bb..9b850da 100644
--- a/arch/arm/configs/msm8660_defconfig
+++ b/arch/arm/configs/msm8660_defconfig
@@ -233,7 +233,7 @@
CONFIG_PMIC8XXX_VIBRATOR=y
CONFIG_PMIC8XXX_UPL=y
CONFIG_PMIC8058_XOADC=y
-CONFIG_TZCOM=y
+CONFIG_QSEECOM=y
CONFIG_SCSI=y
CONFIG_SCSI_TGT=y
CONFIG_BLK_DEV_SD=y
@@ -271,7 +271,6 @@
CONFIG_KEYBOARD_GPIO=y
CONFIG_KEYBOARD_MATRIX=y
CONFIG_KEYBOARD_PMIC8XXX=y
-# CONFIG_KEYBOARD_PMIC8058 is not set
CONFIG_INPUT_JOYSTICK=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ATMEL_MAXTOUCH=y
@@ -299,7 +298,6 @@
CONFIG_DEBUG_GPIO=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_SX150X=y
-# CONFIG_MPP_PMIC8901 is not set
CONFIG_POWER_SUPPLY=y
# CONFIG_BATTERY_MSM is not set
CONFIG_BATTERY_MSM8X60=y
@@ -324,9 +322,9 @@
CONFIG_VIDEO_DEV=y
# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
CONFIG_USB_VIDEO_CLASS=y
+CONFIG_IMX074=y
CONFIG_WEBCAM_OV9726=y
CONFIG_MT9E013=y
-CONFIG_IMX074=y
CONFIG_MSM_GEMINI=y
CONFIG_RADIO_TAVARUA=y
CONFIG_ION=y
@@ -388,6 +386,7 @@
CONFIG_MMC_PARANOID_SD_INIT=y
CONFIG_MMC_BLOCK_MINORS=32
# CONFIG_MMC_BLOCK_BOUNCE is not set
+CONFIG_MMC_TEST=m
CONFIG_MMC_MSM=y
CONFIG_MMC_MSM_SDIO_SUPPORT=y
CONFIG_MMC_MSM_CARD_HW_DETECTION=y
diff --git a/arch/arm/configs/msm8960-perf_defconfig b/arch/arm/configs/msm8960-perf_defconfig
index f1b1fa5..288381b 100644
--- a/arch/arm/configs/msm8960-perf_defconfig
+++ b/arch/arm/configs/msm8960-perf_defconfig
@@ -191,8 +191,10 @@
CONFIG_IP_NF_ARPTABLES=y
CONFIG_IP_NF_ARPFILTER=y
CONFIG_IP_NF_ARP_MANGLE=y
+CONFIG_NF_CONNTRACK_IPV6=y
CONFIG_IP6_NF_IPTABLES=y
CONFIG_IP6_NF_FILTER=y
+CONFIG_IP6_NF_TARGET_REJECT=y
CONFIG_IP6_NF_MANGLE=y
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_HTB=y
@@ -227,7 +229,7 @@
CONFIG_BLK_DEV_RAM=y
CONFIG_HAPTIC_ISA1200=y
CONFIG_PMIC8XXX_VIBRATOR=y
-CONFIG_TZCOM=y
+CONFIG_QSEECOM=y
CONFIG_SCSI=y
CONFIG_SCSI_TGT=y
CONFIG_BLK_DEV_SD=y
@@ -301,24 +303,27 @@
CONFIG_MFD_PM8821_CORE=y
CONFIG_MFD_PM8038_CORE=y
CONFIG_MFD_PM8XXX_BATT_ALARM=y
+CONFIG_WCD9304_CODEC=y
CONFIG_WCD9310_CODEC=y
CONFIG_REGULATOR_PM8XXX=y
CONFIG_REGULATOR_GPIO=y
CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_CONTROLLER=y
CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_SUBDEV_API=y
# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
CONFIG_USB_VIDEO_CLASS=y
CONFIG_MSM_CAMERA_V4L2=y
+CONFIG_IMX074=y
CONFIG_MT9M114=y
+CONFIG_IMX074_ACT=y
CONFIG_MSM_CAMERA_FLASH_SC628A=y
+CONFIG_OV2720=y
CONFIG_MSM_CAMERA_SENSOR=y
CONFIG_MSM_ACTUATOR=y
-CONFIG_IMX074=y
-CONFIG_IMX074_ACT=y
-CONFIG_OV2720=y
-CONFIG_S5K3L1YX=y
CONFIG_MSM_GEMINI=y
+CONFIG_S5K3L1YX=y
CONFIG_RADIO_IRIS=y
CONFIG_RADIO_IRIS_TRANSPORT=m
CONFIG_ION=y
@@ -335,9 +340,9 @@
CONFIG_FB_MSM_OVERLAY=y
CONFIG_FB_MSM_OVERLAY0_WRITEBACK=y
CONFIG_FB_MSM_OVERLAY1_WRITEBACK=y
+CONFIG_FB_MSM_WRITEBACK_MSM_PANEL=y
CONFIG_FB_MSM_LVDS_MIPI_PANEL_DETECT=y
CONFIG_FB_MSM_HDMI_MSM_PANEL=y
-CONFIG_FB_MSM_WRITEBACK_MSM_PANEL=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_SOUND=y
@@ -351,7 +356,6 @@
CONFIG_HID_APPLE=y
CONFIG_HID_MAGICMOUSE=y
CONFIG_HID_MICROSOFT=y
-CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_SUSPEND=y
CONFIG_USB_EHCI_HCD=y
@@ -374,6 +378,7 @@
CONFIG_USB_STORAGE_CYPRESS_ATACB=y
CONFIG_USB_SERIAL=y
CONFIG_USB_SERIAL_QUALCOMM=y
+CONFIG_USB_SERIAL_CSVT=y
CONFIG_USB_EHSET_TEST_FIXTURE=y
CONFIG_USB_QCOM_DIAG_BRIDGE=y
CONFIG_USB_QCOM_MDM_BRIDGE=y
@@ -389,6 +394,7 @@
CONFIG_MMC_PARANOID_SD_INIT=y
CONFIG_MMC_BLOCK_MINORS=32
# CONFIG_MMC_BLOCK_BOUNCE is not set
+CONFIG_MMC_TEST=m
CONFIG_MMC_MSM=y
CONFIG_MMC_MSM_CARD_HW_DETECTION=y
CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT=y
diff --git a/arch/arm/configs/msm8960_defconfig b/arch/arm/configs/msm8960_defconfig
index e58b94b..d12df73 100644
--- a/arch/arm/configs/msm8960_defconfig
+++ b/arch/arm/configs/msm8960_defconfig
@@ -193,8 +193,10 @@
CONFIG_IP_NF_ARPTABLES=y
CONFIG_IP_NF_ARPFILTER=y
CONFIG_IP_NF_ARP_MANGLE=y
+CONFIG_NF_CONNTRACK_IPV6=y
CONFIG_IP6_NF_IPTABLES=y
CONFIG_IP6_NF_FILTER=y
+CONFIG_IP6_NF_TARGET_REJECT=y
CONFIG_IP6_NF_MANGLE=y
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_HTB=y
@@ -229,7 +231,7 @@
CONFIG_BLK_DEV_RAM=y
CONFIG_HAPTIC_ISA1200=y
CONFIG_PMIC8XXX_VIBRATOR=y
-CONFIG_TZCOM=y
+CONFIG_QSEECOM=y
CONFIG_SCSI=y
CONFIG_SCSI_TGT=y
CONFIG_BLK_DEV_SD=y
@@ -297,30 +299,31 @@
CONFIG_SENSORS_PM8XXX_ADC=y
CONFIG_THERMAL=y
CONFIG_THERMAL_TSENS8960=y
-CONFIG_THERMAL_PM8XXX=y
-CONFIG_THERMAL_MONITOR=y
CONFIG_MFD_PM8921_CORE=y
CONFIG_MFD_PM8821_CORE=y
CONFIG_MFD_PM8038_CORE=y
CONFIG_MFD_PM8XXX_BATT_ALARM=y
+CONFIG_WCD9304_CODEC=y
CONFIG_WCD9310_CODEC=y
CONFIG_REGULATOR_PM8XXX=y
CONFIG_REGULATOR_GPIO=y
CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_CONTROLLER=y
CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_SUBDEV_API=y
# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
CONFIG_USB_VIDEO_CLASS=y
CONFIG_MSM_CAMERA_V4L2=y
+CONFIG_IMX074=y
CONFIG_MT9M114=y
+CONFIG_IMX074_ACT=y
CONFIG_MSM_CAMERA_FLASH_SC628A=y
+CONFIG_OV2720=y
CONFIG_MSM_CAMERA_SENSOR=y
CONFIG_MSM_ACTUATOR=y
-CONFIG_IMX074=y
-CONFIG_IMX074_ACT=y
-CONFIG_OV2720=y
-CONFIG_S5K3L1YX=y
CONFIG_MSM_GEMINI=y
+CONFIG_S5K3L1YX=y
CONFIG_RADIO_IRIS=y
CONFIG_RADIO_IRIS_TRANSPORT=m
CONFIG_ION=y
@@ -353,7 +356,6 @@
CONFIG_HID_APPLE=y
CONFIG_HID_MAGICMOUSE=y
CONFIG_HID_MICROSOFT=y
-CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_SUSPEND=y
CONFIG_USB_EHCI_HCD=y
@@ -376,6 +378,7 @@
CONFIG_USB_STORAGE_CYPRESS_ATACB=y
CONFIG_USB_SERIAL=y
CONFIG_USB_SERIAL_QUALCOMM=y
+CONFIG_USB_SERIAL_CSVT=y
CONFIG_USB_EHSET_TEST_FIXTURE=y
CONFIG_USB_QCOM_DIAG_BRIDGE=y
CONFIG_USB_QCOM_MDM_BRIDGE=y
@@ -391,6 +394,7 @@
CONFIG_MMC_PARANOID_SD_INIT=y
CONFIG_MMC_BLOCK_MINORS=32
# CONFIG_MMC_BLOCK_BOUNCE is not set
+CONFIG_MMC_TEST=m
CONFIG_MMC_MSM=y
CONFIG_MMC_MSM_CARD_HW_DETECTION=y
CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT=y
diff --git a/arch/arm/configs/msm9615_defconfig b/arch/arm/configs/msm9615_defconfig
index 7ba17e6..c709178 100644
--- a/arch/arm/configs/msm9615_defconfig
+++ b/arch/arm/configs/msm9615_defconfig
@@ -70,6 +70,7 @@
CONFIG_VFP=y
CONFIG_NEON=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_PM_RUNTIME=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
@@ -234,6 +235,7 @@
CONFIG_MMC_PARANOID_SD_INIT=y
CONFIG_MMC_BLOCK_MINORS=32
# CONFIG_MMC_BLOCK_BOUNCE is not set
+CONFIG_MMC_TEST=m
CONFIG_MMC_MSM=y
CONFIG_MMC_MSM_SDIO_SUPPORT=y
CONFIG_MMC_MSM_CARD_HW_DETECTION=y
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 65c3f24..4e25f18 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -137,6 +137,11 @@
disable_irq
.endm
+ .macro save_and_disable_irqs_notrace, oldcpsr
+ mrs \oldcpsr, cpsr
+ disable_irq_notrace
+ .endm
+
/*
* Restore interrupt state previously stored in a register. We don't
* guarantee that this will preserve the flags.
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 0083033..de314ea 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -763,6 +763,7 @@
break;
case 0x0490: /* 8960 sim */
case 0x04D0: /* 8960 */
+ case 0x06F0: /* 8064 */
armpmu = armv7_krait_pmu_init();
krait_l2_pmu_init();
break;
diff --git a/arch/arm/kernel/perf_event_msm_krait.c b/arch/arm/kernel/perf_event_msm_krait.c
index 1ce4dd6..09cc127 100644
--- a/arch/arm/kernel/perf_event_msm_krait.c
+++ b/arch/arm/kernel/perf_event_msm_krait.c
@@ -280,9 +280,9 @@
u32 v_orig_val;
u32 f_orig_val;
- /* CPACR Enable CP10 access */
+ /* CPACR Enable CP10 and CP11 access */
v_orig_val = get_copro_access();
- venum_new_val = v_orig_val | CPACC_SVC(10);
+ venum_new_val = v_orig_val | CPACC_SVC(10) | CPACC_SVC(11);
set_copro_access(venum_new_val);
/* Store orig venum val */
__get_cpu_var(venum_orig_val) = v_orig_val;
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 18fbcf6..20a5449 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -222,6 +222,7 @@
select MSM_SPM_V2
select MSM_L2_SPM
select MSM_PM8X60 if PM
+ select CPU_HAS_L2_PMU
config ARCH_MSMCOPPER
bool "MSM Copper"
@@ -268,6 +269,7 @@
select ARM_GIC
select ARCH_MSM_CORTEXMP
select MULTI_IRQ_HANDLER
+ select ARM_TICKET_LOCKS
endmenu
choice
@@ -477,6 +479,22 @@
help
Support for the Qualcomm MSM8625 RUMI3 Emulation Platform.
+config MACH_MSM8625_SURF
+ depends on ARCH_MSM8625
+ depends on !MSM_STACKED_MEMORY
+ default y
+ bool "MSM8625 SURF"
+ help
+ Support for the Qualcomm MSM8625 SURF.
+
+config MACH_MSM8625_EVB
+ depends on ARCH_MSM8625
+ depends on !MSM_STACKED_MEMORY
+ default y
+ bool "MSM8625 EVB"
+ help
+ Support for the Qualcomm MSM8625 Reference Design.
+
config MACH_MSM7X30_SURF
depends on ARCH_MSM7X30
depends on !MSM_STACKED_MEMORY
@@ -2082,11 +2100,67 @@
config MSM_RTB_SEPARATE_CPUS
bool "Separate entries for each cpu"
depends on MSM_RTB
+ depends on SMP
help
Under some circumstances, it may be beneficial to give dedicated space
for each cpu to log accesses. Selecting this option will log each cpu
separately. This will guarantee that the last acesses for each cpu
will be logged but there will be fewer entries per cpu
+config MSM_CACHE_ERP
+ bool "Cache / CPU error reporting"
+ depends on ARCH_MSM_KRAIT
+ help
+ Say 'Y' here to enable reporting of cache and TLB errors to the kernel
+ log. Enabling this feature can be used as a system debugging technique
+ if cache corruption is suspected. Cache error statistics will also be
+ reported in /proc/cpu/msm_cache_erp.
+
+ For production builds, you should probably say 'N' here.
+
+config MSM_L1_ERR_PANIC
+ bool "Panic on L1 cache / TLB errors"
+ depends on MSM_CACHE_ERP
+ help
+ To cause the kernel to panic whenever an L1 cache or TLB error is
+ detected, say 'Y' here. This may be useful as a debugging technique if
+ general system instability is suspected.
+
+ For production builds, you should probably say 'N' here.
+
+
+config MSM_L2_ERP_PORT_PANIC
+ bool "Panic on L2 master port errors"
+ depends on MSM_CACHE_ERP
+ help
+ Master port errors can occur when a memory request is not properly
+ handled by the destination slave. Enable this option to catch drivers
+ which attempt to access bad areas of the address space, or access
+ hardware registers in an improper state (such as certain clocks not
+ being on). This option may help with debugging, though production
+ builds should probably say 'N' here.
+
+config MSM_L2_ERP_1BIT_PANIC
+ bool "Panic on recoverable L2 soft errors"
+ depends on MSM_CACHE_ERP
+ help
+ Enable this option to cause a kernel panic whenever the L2 cache
+ encounters a single-bit (correctable) soft error. This option should
+ only be enabled when doing low-level debugging where cache corruption
+ is suspected.
+
+ For production builds, you should definitely say 'N' here.
+
+config MSM_L2_ERP_2BIT_PANIC
+ bool "Panic on unrecoverable L2 soft errors"
+ depends on MSM_CACHE_ERP
+ help
+ Enable this option to cause a kernel panic whenever the L2 cache
+ encounters a double-bit (non-correctable) soft error. Debug builds
+ will likely benefit from having this option enabled to catch cache
+ problems as soon as possible.
+
+ For production builds, it may be acceptable to say 'N' here, since
+ an uncorrectable error might not necessarily cause further problems.
endif
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 8347a25..c4d2c54 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -23,7 +23,7 @@
obj-y += acpuclock.o
obj-$(CONFIG_ARCH_MSM7X01A) += acpuclock-7201.o
obj-$(CONFIG_ARCH_MSM7X25) += acpuclock-7201.o
-obj-$(CONFIG_ARCH_MSM7X27) += acpuclock-7201.o
+obj-$(CONFIG_ARCH_MSM7X27) += acpuclock-7201.o clock-pll.o
obj-$(CONFIG_ARCH_MSM_SCORPION) += pmu.o
obj-$(CONFIG_ARCH_MSM_KRAIT) += msm-krait-l2-accessors.o pmu.o
obj-$(CONFIG_ARCH_MSM7X27A) += pmu.o
@@ -54,7 +54,7 @@
msm-etm-objs := etm.o
obj-$(CONFIG_MSM_ETM) += msm-etm.o
-obj-$(CONFIG_MSM_QDSS) += qdss.o qdss-etb.o qdss-tpiu.o qdss-funnel.o qdss-ptm.o
+obj-$(CONFIG_MSM_QDSS) += qdss.o qdss-etb.o qdss-tpiu.o qdss-funnel.o qdss-etm.o
quiet_cmd_mkrpcsym = MKCAP $@
cmd_mkrpcsym = $(PERL) $(srctree)/$(src)/mkrpcsym.pl $< $@
@@ -221,14 +221,18 @@
obj-$(CONFIG_MACH_MSM7X27_SURF) += board-msm7x27.o devices-msm7x27.o
obj-$(CONFIG_MACH_MSM7X27_FFA) += board-msm7x27.o devices-msm7x27.o
obj-$(CONFIG_ARCH_MSM7X27A) += clock-pcom-lookup.o devices-msm7x27a.o
-obj-$(CONFIG_MACH_MSM7X27A_RUMI3) += board-msm7x27a.o board-msm7627a-storage.o board-msm7627a-bt.o board-msm7627a-camera.o board-msm7627a-display.o board-msm7627a-wlan.o
-obj-$(CONFIG_MACH_MSM7X27A_SURF) += board-msm7x27a.o board-msm7627a-storage.o board-msm7627a-bt.o board-msm7627a-camera.o board-msm7627a-display.o board-msm7627a-wlan.o
-obj-$(CONFIG_MACH_MSM7X27A_FFA) += board-msm7x27a.o board-msm7627a-storage.o board-msm7627a-bt.o board-msm7627a-camera.o board-msm7627a-display.o board-msm7627a-wlan.o
-obj-$(CONFIG_MACH_MSM7627A_QRD1) += board-qrd7627a.o board-msm7627a-storage.o board-msm7627a-bt.o board-msm7627a-camera.o board-msm7627a-display.o board-msm7627a-wlan.o
-obj-$(CONFIG_MACH_MSM7627A_QRD3) += board-qrd7627a.o board-msm7627a-storage.o board-msm7627a-bt.o board-msm7627a-camera.o board-msm7627a-display.o board-msm7627a-wlan.o
-obj-$(CONFIG_MACH_MSM7627A_EVB) += board-qrd7627a.o board-msm7627a-storage.o board-msm7627a-bt.o board-msm7627a-camera.o board-msm7627a-display.o board-msm7627a-wlan.o
-obj-$(CONFIG_ARCH_MSM8625) += devices-msm7x27a.o clock-pcom-lookup.o
+board-7627a-all-objs += board-msm7627a-storage.o board-msm7627a-bt.o board-msm7627a-camera.o
+board-7627a-all-objs += board-msm7627a-display.o board-msm7627a-wlan.o
+obj-$(CONFIG_MACH_MSM7X27A_RUMI3) += board-msm7x27a.o board-7627a-all.o
+obj-$(CONFIG_MACH_MSM7X27A_SURF) += board-msm7x27a.o board-7627a-all.o
+obj-$(CONFIG_MACH_MSM7X27A_FFA) += board-msm7x27a.o board-7627a-all.o
+obj-$(CONFIG_MACH_MSM7627A_QRD1) += board-qrd7627a.o board-7627a-all.o
+obj-$(CONFIG_MACH_MSM7627A_QRD3) += board-qrd7627a.o board-7627a-all.o
+obj-$(CONFIG_MACH_MSM7627A_EVB) += board-qrd7627a.o board-7627a-all.o
+obj-$(CONFIG_ARCH_MSM8625) += devices-msm7x27a.o clock-pcom-lookup.o mpm-8625.o
obj-$(CONFIG_MACH_MSM8625_RUMI3) += board-msm7x27a.o
+obj-$(CONFIG_MACH_MSM8625_SURF) += board-msm7x27a.o board-7627a-all.o
+obj-$(CONFIG_MACH_MSM8625_EVB) += board-qrd7627a.o board-7627a-all.o
obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o devices-msm7x30.o memory_topology.o
obj-$(CONFIG_ARCH_MSM7X30) += clock-local.o clock-7x30.o acpuclock-7x30.o
obj-$(CONFIG_MACH_MSM7X25_SURF) += board-msm7x27.o devices-msm7x25.o
@@ -256,7 +260,7 @@
obj-$(CONFIG_MACH_APQ8064_RUMI3) += board-8064-all.o board-8064-regulator.o
obj-$(CONFIG_ARCH_MSM9615) += board-9615.o devices-9615.o board-9615-regulator.o board-9615-gpiomux.o board-9615-storage.o
obj-$(CONFIG_ARCH_MSM9615) += clock-local.o clock-9615.o acpuclock-9615.o clock-rpm.o
-obj-$(CONFIG_ARCH_MSMCOPPER) += board-copper.o board-dt.o
+obj-$(CONFIG_ARCH_MSMCOPPER) += board-copper.o board-dt.o board-copper-regulator.o
obj-$(CONFIG_MACH_SAPPHIRE) += board-sapphire.o board-sapphire-gpio.o
obj-$(CONFIG_MACH_SAPPHIRE) += board-sapphire-keypad.o board-sapphire-panel.o
@@ -325,3 +329,4 @@
obj-$(CONFIG_ARCH_MSM8960) += mdm2.o mdm_common.o
obj-$(CONFIG_MSM_RTB) += msm_rtb.o
+obj-$(CONFIG_MSM_CACHE_ERP) += cache_erp.o
diff --git a/arch/arm/mach-msm/acpuclock-7201.c b/arch/arm/mach-msm/acpuclock-7201.c
index 7ad3f65..687033c 100644
--- a/arch/arm/mach-msm/acpuclock-7201.c
+++ b/arch/arm/mach-msm/acpuclock-7201.c
@@ -27,7 +27,6 @@
#include <linux/mutex.h>
#include <linux/io.h>
#include <linux/sort.h>
-#include <linux/remote_spinlock.h>
#include <mach/board.h>
#include <mach/msm_iomap.h>
#include <asm/mach-types.h>
@@ -39,36 +38,36 @@
#define A11S_CLK_CNTL_ADDR (MSM_CSR_BASE + 0x100)
#define A11S_CLK_SEL_ADDR (MSM_CSR_BASE + 0x104)
#define A11S_VDD_SVS_PLEVEL_ADDR (MSM_CSR_BASE + 0x124)
-#define PLLn_MODE(n) (MSM_CLK_CTL_BASE + 0x300 + 28 * (n))
-#define PLLn_L_VAL(n) (MSM_CLK_CTL_BASE + 0x304 + 28 * (n))
-#define PLL4_MODE (MSM_CLK_CTL_BASE + 0x374)
-#define PLL4_L_VAL (MSM_CLK_CTL_BASE + 0x378)
#define POWER_COLLAPSE_KHZ 19200
/* Max CPU frequency allowed by hardware while in standby waiting for an irq. */
#define MAX_WAIT_FOR_IRQ_KHZ 128000
+/**
+ * enum - For acpuclock PLL IDs
+ */
enum {
- ACPU_PLL_TCXO = -1,
ACPU_PLL_0 = 0,
ACPU_PLL_1,
ACPU_PLL_2,
ACPU_PLL_3,
ACPU_PLL_4,
+ ACPU_PLL_TCXO,
ACPU_PLL_END,
};
-static const struct pll {
- void __iomem *mod_reg;
- const uint32_t l_val_mask;
-} soc_pll[ACPU_PLL_END] = {
- [ACPU_PLL_0] = {PLLn_MODE(ACPU_PLL_0), 0x3f},
- [ACPU_PLL_1] = {PLLn_MODE(ACPU_PLL_1), 0x3f},
- [ACPU_PLL_2] = {PLLn_MODE(ACPU_PLL_2), 0x3f},
- [ACPU_PLL_3] = {PLLn_MODE(ACPU_PLL_3), 0x3f},
- [ACPU_PLL_4] = {PLL4_MODE, 0x3ff},
+struct acpu_clk_src {
+ struct clk *clk;
+ const char *name;
+};
+
+static struct acpu_clk_src pll_clk[ACPU_PLL_END] = {
+ [ACPU_PLL_0] = { .name = "pll0_clk" },
+ [ACPU_PLL_1] = { .name = "pll1_clk" },
+ [ACPU_PLL_2] = { .name = "pll2_clk" },
+ [ACPU_PLL_4] = { .name = "pll4_clk" },
};
struct clock_state {
@@ -78,24 +77,6 @@
struct clk *ebi1_clk;
};
-#define PLL_BASE 7
-
-struct shared_pll_control {
- uint32_t version;
- struct {
- /* Denotes if the PLL is ON. Technically, this can be read
- * directly from the PLL registers, but this feild is here,
- * so let's use it.
- */
- uint32_t on;
- /* One bit for each processor core. The application processor
- * is allocated bit position 1. All other bits should be
- * considered as votes from other processors.
- */
- uint32_t votes;
- } pll[PLL_BASE + ACPU_PLL_END];
-};
-
struct clkctl_acpu_speed {
unsigned int use_for_scaling;
unsigned int a11clk_khz;
@@ -106,14 +87,11 @@
unsigned int ahbclk_div;
int vdd;
unsigned int axiclk_khz;
- unsigned long lpj; /* loops_per_jiffy */
/* Pointers in acpu_freq_tbl[] for max up/down steppings. */
struct clkctl_acpu_speed *down[ACPU_PLL_END];
struct clkctl_acpu_speed *up[ACPU_PLL_END];
};
-static remote_spinlock_t pll_lock;
-static struct shared_pll_control *pll_control;
static struct clock_state drv_state = { 0 };
static struct clkctl_acpu_speed *acpu_freq_tbl;
@@ -136,7 +114,7 @@
{ 0, 400000, ACPU_PLL_2, 2, 2, 133333, 2, 5, 160000 },
{ 1, 480000, ACPU_PLL_0, 4, 1, 160000, 2, 6, 160000 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 200000, 2, 7, 200000 },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7627 with CDMA capable modem */
@@ -150,7 +128,7 @@
{ 0, 400000, ACPU_PLL_2, 2, 2, 133333, 2, 5, 160000 },
{ 1, 480000, ACPU_PLL_0, 4, 1, 160000, 2, 6, 160000 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 200000, 2, 7, 200000 },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7627 with GSM capable modem - PLL2 @ 800 */
@@ -164,7 +142,7 @@
{ 0, 400000, ACPU_PLL_2, 2, 1, 133333, 2, 5, 160000 },
{ 1, 480000, ACPU_PLL_0, 4, 1, 160000, 2, 6, 160000 },
{ 1, 800000, ACPU_PLL_2, 2, 0, 200000, 3, 7, 200000 },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7627 with CDMA capable modem - PLL2 @ 800 */
@@ -178,7 +156,7 @@
{ 0, 400000, ACPU_PLL_2, 2, 1, 133333, 2, 5, 160000 },
{ 1, 480000, ACPU_PLL_0, 4, 1, 160000, 2, 6, 160000 },
{ 1, 800000, ACPU_PLL_2, 2, 0, 200000, 3, 7, 200000 },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7627a PLL2 @ 1200MHz with GSM capable modem */
@@ -187,13 +165,13 @@
{ 0, 61440, ACPU_PLL_1, 1, 3, 7680, 3, 1, 61440 },
{ 1, 122880, ACPU_PLL_1, 1, 1, 15360, 3, 2, 61440 },
{ 1, 245760, ACPU_PLL_1, 1, 0, 30720, 3, 3, 61440 },
- { 0, 300000, ACPU_PLL_2, 2, 3, 37500, 3, 4, 150000 },
+ { 0, 300000, ACPU_PLL_2, 2, 3, 37500, 3, 4, 122880 },
{ 1, 320000, ACPU_PLL_0, 4, 2, 40000, 3, 4, 122880 },
{ 0, 400000, ACPU_PLL_4, 6, 1, 50000, 3, 4, 122880 },
{ 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 122880 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
{ 1, 800000, ACPU_PLL_4, 6, 0, 100000, 3, 7, 200000 },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7627a PLL2 @ 1200MHz with CDMA capable modem */
@@ -208,7 +186,7 @@
{ 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 120000 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
{ 1, 800000, ACPU_PLL_4, 6, 0, 100000, 3, 7, 200000 },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7627aa PLL4 @ 1008MHz with GSM capable modem */
@@ -217,13 +195,13 @@
{ 0, 61440, ACPU_PLL_1, 1, 3, 7680, 3, 1, 61440 },
{ 1, 122880, ACPU_PLL_1, 1, 1, 15360, 3, 2, 61440 },
{ 1, 245760, ACPU_PLL_1, 1, 0, 30720, 3, 3, 61440 },
- { 0, 300000, ACPU_PLL_2, 2, 3, 37500, 3, 4, 150000 },
+ { 0, 300000, ACPU_PLL_2, 2, 3, 37500, 3, 4, 122880 },
{ 1, 320000, ACPU_PLL_0, 4, 2, 40000, 3, 4, 122880 },
{ 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 122880 },
{ 0, 504000, ACPU_PLL_4, 6, 1, 63000, 3, 6, 200000 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
{ 1, 1008000, ACPU_PLL_4, 6, 0, 126000, 3, 7, 200000},
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7627aa PLL4 @ 1008MHz with CDMA capable modem */
@@ -232,13 +210,41 @@
{ 0, 65536, ACPU_PLL_1, 1, 3, 8192, 3, 1, 49152 },
{ 1, 98304, ACPU_PLL_1, 1, 1, 12288, 3, 2, 49152 },
{ 1, 196608, ACPU_PLL_1, 1, 0, 24576, 3, 3, 98304 },
- { 0, 300000, ACPU_PLL_2, 2, 3, 37500, 3, 4, 150000 },
+ { 0, 300000, ACPU_PLL_2, 2, 3, 37500, 3, 4, 122880 },
{ 1, 320000, ACPU_PLL_0, 4, 2, 40000, 3, 4, 122880 },
{ 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 122880 },
{ 0, 504000, ACPU_PLL_4, 6, 1, 63000, 3, 6, 200000 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
{ 1, 1008000, ACPU_PLL_4, 6, 0, 126000, 3, 7, 200000},
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+};
+
+/* 8625 PLL4 @ 1209MHz with GSM capable modem */
+static struct clkctl_acpu_speed pll0_960_pll1_245_pll2_1200_pll4_1209[] = {
+ { 0, 19200, ACPU_PLL_TCXO, 0, 0, 2400, 3, 0, 30720 },
+ { 0, 61440, ACPU_PLL_1, 1, 3, 7680, 3, 1, 61440 },
+ { 1, 122880, ACPU_PLL_1, 1, 1, 15360, 3, 2, 61440 },
+ { 1, 245760, ACPU_PLL_1, 1, 0, 30720, 3, 3, 61440 },
+ { 1, 320000, ACPU_PLL_0, 4, 2, 40000, 3, 4, 122880 },
+ { 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 122880 },
+ { 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
+ { 0, 604800, ACPU_PLL_4, 6, 1, 75600, 3, 6, 200000 },
+ { 1, 1209600, ACPU_PLL_4, 6, 0, 151200, 3, 7, 200000},
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+};
+
+/* 8625 PLL4 @ 1209MHz with CDMA capable modem */
+static struct clkctl_acpu_speed pll0_960_pll1_196_pll2_1200_pll4_1209[] = {
+ { 0, 19200, ACPU_PLL_TCXO, 0, 0, 2400, 3, 0, 24576 },
+ { 0, 65536, ACPU_PLL_1, 1, 3, 8192, 3, 1, 49152 },
+ { 1, 98304, ACPU_PLL_1, 1, 1, 12288, 3, 2, 49152 },
+ { 1, 196608, ACPU_PLL_1, 1, 0, 24576, 3, 3, 98304 },
+ { 1, 320000, ACPU_PLL_0, 4, 2, 40000, 3, 4, 122880 },
+ { 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 122880 },
+ { 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
+ { 0, 604800, ACPU_PLL_4, 6, 1, 75600, 3, 6, 200000 },
+ { 1, 1209600, ACPU_PLL_4, 6, 0, 151200, 3, 7, 200000},
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7625a PLL2 @ 1200MHz with GSM capable modem */
@@ -247,12 +253,12 @@
{ 0, 61440, ACPU_PLL_1, 1, 3, 7680, 3, 1, 61440 },
{ 1, 122880, ACPU_PLL_1, 1, 1, 15360, 3, 2, 61440 },
{ 1, 245760, ACPU_PLL_1, 1, 0, 30720, 3, 3, 61440 },
- { 0, 300000, ACPU_PLL_2, 2, 3, 37500, 3, 4, 150000 },
+ { 0, 300000, ACPU_PLL_2, 2, 3, 37500, 3, 4, 122880 },
{ 1, 320000, ACPU_PLL_0, 4, 2, 40000, 3, 4, 122880 },
{ 0, 400000, ACPU_PLL_2, 2, 2, 50000, 3, 4, 122880 },
{ 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 122880 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7627a PLL2 @ 1200MHz with GSM capable modem */
@@ -261,13 +267,13 @@
{ 0, 61440, ACPU_PLL_1, 1, 11, 7680, 3, 1, 61440 },
{ 1, 122880, ACPU_PLL_1, 1, 5, 15360, 3, 2, 61440 },
{ 1, 245760, ACPU_PLL_1, 1, 2, 30720, 3, 3, 61440 },
- { 0, 300000, ACPU_PLL_2, 2, 3, 37500, 3, 4, 150000 },
+ { 0, 300000, ACPU_PLL_2, 2, 3, 37500, 3, 4, 122880 },
{ 1, 320000, ACPU_PLL_0, 4, 2, 40000, 3, 4, 122880 },
{ 0, 400000, ACPU_PLL_4, 6, 1, 50000, 3, 4, 122880 },
{ 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 122880 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
{ 1, 800000, ACPU_PLL_4, 6, 0, 100000, 3, 7, 200000 },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7627a PLL2 @ 1200MHz with CDMA capable modem */
@@ -282,7 +288,7 @@
{ 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 120000 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
{ 1, 800000, ACPU_PLL_4, 6, 0, 100000, 3, 7, 200000 },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7627aa PLL4 @ 1008MHz with GSM capable modem */
@@ -291,64 +297,54 @@
{ 0, 61440, ACPU_PLL_1, 1, 11, 7680, 3, 1, 61440 },
{ 1, 122880, ACPU_PLL_1, 1, 5, 15360, 3, 2, 61440 },
{ 1, 245760, ACPU_PLL_1, 1, 2, 30720, 3, 3, 61440 },
- { 0, 300000, ACPU_PLL_2, 2, 3, 37500, 3, 4, 150000 },
+ { 0, 300000, ACPU_PLL_2, 2, 3, 37500, 3, 4, 122880 },
{ 1, 320000, ACPU_PLL_0, 4, 2, 40000, 3, 4, 122880 },
{ 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 122880 },
{ 0, 504000, ACPU_PLL_4, 6, 1, 63000, 3, 6, 200000 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
{ 1, 1008000, ACPU_PLL_4, 6, 0, 126000, 3, 7, 200000},
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
-/* 7x27aa PLL4 @ 1008MHz with CDMA capable modem */
+/* 7627aa PLL4 @ 1008MHz with CDMA capable modem */
static struct clkctl_acpu_speed pll0_960_pll1_589_pll2_1200_pll4_1008[] = {
{ 0, 19200, ACPU_PLL_TCXO, 0, 0, 2400, 3, 0, 24576 },
{ 0, 65536, ACPU_PLL_1, 1, 8, 8192, 3, 1, 49152 },
{ 1, 98304, ACPU_PLL_1, 1, 5, 12288, 3, 2, 49152 },
{ 1, 196608, ACPU_PLL_1, 1, 2, 24576, 3, 3, 98304 },
- { 0, 300000, ACPU_PLL_2, 2, 3, 37500, 3, 4, 150000 },
+ { 0, 300000, ACPU_PLL_2, 2, 3, 37500, 3, 4, 122880 },
{ 1, 320000, ACPU_PLL_0, 4, 2, 40000, 3, 4, 122880 },
{ 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 122880 },
{ 0, 504000, ACPU_PLL_4, 6, 1, 63000, 3, 6, 200000 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
{ 1, 1008000, ACPU_PLL_4, 6, 0, 126000, 3, 7, 200000},
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
-/* 7x25a PLL2 @ 1200MHz with GSM capable modem */
+/* 7625a PLL2 @ 1200MHz with GSM capable modem */
static struct clkctl_acpu_speed pll0_960_pll1_737_pll2_1200_25a[] = {
{ 0, 19200, ACPU_PLL_TCXO, 0, 0, 2400, 3, 0, 30720 },
{ 0, 61440, ACPU_PLL_1, 1, 11, 7680, 3, 1, 61440 },
{ 1, 122880, ACPU_PLL_1, 1, 5, 15360, 3, 2, 61440 },
{ 1, 245760, ACPU_PLL_1, 1, 2, 30720, 3, 3, 61440 },
- { 0, 300000, ACPU_PLL_2, 2, 3, 37500, 3, 4, 150000 },
+ { 0, 300000, ACPU_PLL_2, 2, 3, 37500, 3, 4, 122880 },
{ 1, 320000, ACPU_PLL_0, 4, 2, 40000, 3, 4, 122880 },
{ 0, 400000, ACPU_PLL_2, 2, 2, 50000, 3, 4, 122880 },
{ 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 122880 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
-#define PLL_0_MHZ 0
-#define PLL_196_MHZ 10
-#define PLL_245_MHZ 12
-#define PLL_589_MHZ 30
-#define PLL_737_MHZ 38
-#define PLL_800_MHZ 41
-#define PLL_960_MHZ 50
-#define PLL_1008_MHZ 52
-#define PLL_1200_MHZ 62
-
#define PLL_CONFIG(m0, m1, m2, m4) { \
- PLL_##m0##_MHZ, PLL_##m1##_MHZ, PLL_##m2##_MHZ, PLL_##m4##_MHZ, \
+ m0, m1, m2, m4, \
pll0_##m0##_pll1_##m1##_pll2_##m2##_pll4_##m4 \
}
struct pll_freq_tbl_map {
- unsigned int pll0_l;
- unsigned int pll1_l;
- unsigned int pll2_l;
- unsigned int pll4_l;
+ unsigned int pll0_rate;
+ unsigned int pll1_rate;
+ unsigned int pll2_rate;
+ unsigned int pll4_rate;
struct clkctl_acpu_speed *tbl;
};
@@ -365,6 +361,8 @@
PLL_CONFIG(960, 589, 1200, 800),
PLL_CONFIG(960, 737, 1200, 1008),
PLL_CONFIG(960, 589, 1200, 1008),
+ PLL_CONFIG(960, 245, 1200, 1209),
+ PLL_CONFIG(960, 196, 1200, 1209),
{ 0, 0, 0, 0, 0 }
};
@@ -405,59 +403,6 @@
}
#endif
-static void pll_enable(void __iomem *addr, unsigned on)
-{
- if (on) {
- writel_relaxed(2, addr);
- mb();
- udelay(5);
- writel_relaxed(6, addr);
- mb();
- udelay(50);
- writel_relaxed(7, addr);
- } else {
- writel_relaxed(0, addr);
- }
-}
-
-static int pc_pll_request(unsigned id, unsigned on)
-{
- int res = 0;
- on = !!on;
-
- if (on)
- pr_debug("Enabling PLL %d\n", id);
- else
- pr_debug("Disabling PLL %d\n", id);
-
- if (id >= ACPU_PLL_END)
- return -EINVAL;
-
- remote_spin_lock(&pll_lock);
- if (on) {
- pll_control->pll[PLL_BASE + id].votes |= 2;
- if (!pll_control->pll[PLL_BASE + id].on) {
- pll_enable(soc_pll[id].mod_reg, 1);
- pll_control->pll[PLL_BASE + id].on = 1;
- }
- } else {
- pll_control->pll[PLL_BASE + id].votes &= ~2;
- if (pll_control->pll[PLL_BASE + id].on
- && !pll_control->pll[PLL_BASE + id].votes) {
- pll_enable(soc_pll[id].mod_reg, 0);
- pll_control->pll[PLL_BASE + id].on = 0;
- }
- }
- remote_spin_unlock(&pll_lock);
-
- if (on)
- pr_debug("PLL enabled\n");
- else
- pr_debug("PLL disabled\n");
-
- return res;
-}
-
static int acpuclk_set_vdd_level(int vdd)
{
uint32_t current_vdd;
@@ -576,7 +521,7 @@
if (reason == SETRATE_CPUFREQ) {
if (strt_s->pll != tgt_s->pll && tgt_s->pll != ACPU_PLL_TCXO) {
- rc = pc_pll_request(tgt_s->pll, 1);
+ rc = clk_prepare_enable(pll_clk[tgt_s->pll].clk);
if (rc < 0) {
pr_err("PLL%d enable failed (%d)\n",
tgt_s->pll, rc);
@@ -651,7 +596,7 @@
if (cur_s->pll != ACPU_PLL_TCXO
&& !(plls_enabled & (1 << cur_s->pll))) {
- rc = pc_pll_request(cur_s->pll, 1);
+ rc = clk_prepare_enable(pll_clk[cur_s->pll].clk);
if (rc < 0) {
pr_err("PLL%d enable failed (%d)\n",
cur_s->pll, rc);
@@ -662,8 +607,6 @@
acpuclk_set_div(cur_s);
drv_state.current_speed = cur_s;
- /* Re-adjust lpj for the new clock speed. */
- loops_per_jiffy = cur_s->lpj;
mb();
udelay(50);
}
@@ -684,12 +627,8 @@
if (tgt_s->pll != ACPU_PLL_TCXO)
plls_enabled &= ~(1 << tgt_s->pll);
for (pll = ACPU_PLL_0; pll < ACPU_PLL_END; pll++)
- if (plls_enabled & (1 << pll)) {
- res = pc_pll_request(pll, 0);
- if (res < 0)
- pr_warning("PLL%d disable failed (%d)\n",
- pll, res);
- }
+ if (plls_enabled & (1 << pll))
+ clk_disable_unprepare(pll_clk[pll].clk);
/* Nothing else to do for power collapse. */
if (reason == SETRATE_PC)
@@ -742,9 +681,10 @@
}
drv_state.current_speed = speed;
- if (speed->pll != ACPU_PLL_TCXO)
- if (pc_pll_request(speed->pll, 1))
+ if (speed->pll != ACPU_PLL_TCXO) {
+ if (clk_prepare_enable(pll_clk[speed->pll].clk))
pr_warning("Failed to vote for boot PLL\n");
+ }
/* Fix div2 to 2 for 7x27/5a(aa) targets */
if (!cpu_is_msm7x27()) {
@@ -777,64 +717,52 @@
/*----------------------------------------------------------------------------
* Clock driver initialization
*---------------------------------------------------------------------------*/
-
-static void __init acpu_freq_tbl_fixup(void)
+#define MHZ 1000000
+static void __init select_freq_plan(void)
{
- unsigned long pll0_l, pll1_l, pll2_l, pll4_l;
- struct pll_freq_tbl_map *lst;
+ unsigned long pll_mhz[ACPU_PLL_END];
+ struct pll_freq_tbl_map *t;
+ int i;
- /* Wait for the PLLs to be initialized and then read their frequency.
- */
- do {
- pll0_l = readl_relaxed(PLLn_L_VAL(0)) &
- soc_pll[ACPU_PLL_0].l_val_mask;
- cpu_relax();
- udelay(50);
- } while (pll0_l == 0);
- do {
- pll1_l = readl_relaxed(PLLn_L_VAL(1)) &
- soc_pll[ACPU_PLL_1].l_val_mask;
- cpu_relax();
- udelay(50);
- } while (pll1_l == 0);
- do {
- pll2_l = readl_relaxed(PLLn_L_VAL(2)) &
- soc_pll[ACPU_PLL_2].l_val_mask;
- cpu_relax();
- udelay(50);
- } while (pll2_l == 0);
-
- pr_info("L val: PLL0: %d, PLL1: %d, PLL2: %d\n",
- (int)pll0_l, (int)pll1_l, (int)pll2_l);
-
- if (!cpu_is_msm7x27() && !cpu_is_msm7x25a()) {
- do {
- pll4_l = readl_relaxed(PLL4_L_VAL) &
- soc_pll[ACPU_PLL_4].l_val_mask;
- cpu_relax();
- udelay(50);
- } while (pll4_l == 0);
- pr_info("L val: PLL4: %d\n", (int)pll4_l);
- } else {
- pll4_l = 0;
+ /* Get PLL clocks */
+ for (i = 0; i < ACPU_PLL_END; i++) {
+ if (pll_clk[i].name) {
+ pll_clk[i].clk = clk_get_sys("acpu", pll_clk[i].name);
+ if (IS_ERR(pll_clk[i].clk)) {
+ pll_mhz[i] = 0;
+ continue;
+ }
+ /* Get PLL's Rate */
+ pll_mhz[i] = clk_get_rate(pll_clk[i].clk)/MHZ;
+ }
}
- /* Fix the tables for 7x25a variant to not conflict with 7x27 ones */
+ /*
+ * For the pll configuration used in acpuclock table e.g.
+ * pll0_960_pll1_245_pll2_1200" is same for 7627 and
+ * 7625a (as pll0,pll1,pll2) having same rates, but frequency
+ * table is different for both targets.
+ *
+ * Hence below for loop will not be able to select correct
+ * table based on PLL rates as rates are same. Hence we need
+ * to add this cpu check for selecting the correct acpuclock table.
+ */
if (cpu_is_msm7x25a()) {
- if (pll1_l == PLL_245_MHZ) {
+ if (pll_mhz[ACPU_PLL_1] == 245) {
acpu_freq_tbl =
pll0_960_pll1_245_pll2_1200_25a;
- } else if (pll1_l == PLL_737_MHZ) {
+ } else if (pll_mhz[ACPU_PLL_1] == 737) {
acpu_freq_tbl =
pll0_960_pll1_737_pll2_1200_25a;
}
} else {
/* Select the right table to use. */
- for (lst = acpu_freq_tbl_list; lst->tbl != 0; lst++) {
- if (lst->pll0_l == pll0_l && lst->pll1_l == pll1_l
- && lst->pll2_l == pll2_l
- && lst->pll4_l == pll4_l) {
- acpu_freq_tbl = lst->tbl;
+ for (t = acpu_freq_tbl_list; t->tbl != 0; t++) {
+ if (t->pll0_rate == pll_mhz[ACPU_PLL_0]
+ && t->pll1_rate == pll_mhz[ACPU_PLL_1]
+ && t->pll2_rate == pll_mhz[ACPU_PLL_2]
+ && t->pll4_rate == pll_mhz[ACPU_PLL_4]) {
+ acpu_freq_tbl = t->tbl;
break;
}
}
@@ -862,18 +790,6 @@
return found_khz;
}
-/* Initalize the lpj field in the acpu_freq_tbl. */
-static void __init lpj_init(void)
-{
- int i;
- const struct clkctl_acpu_speed *base_clk = drv_state.current_speed;
- for (i = 0; acpu_freq_tbl[i].a11clk_khz; i++) {
- acpu_freq_tbl[i].lpj = cpufreq_scale(loops_per_jiffy,
- base_clk->a11clk_khz,
- acpu_freq_tbl[i].a11clk_khz);
- }
-}
-
static void __init precompute_stepping(void)
{
int i, step_idx;
@@ -945,33 +861,6 @@
}
}
-static void shared_pll_control_init(void)
-{
-#define PLL_REMOTE_SPINLOCK_ID "S:7"
- unsigned smem_size;
-
- remote_spin_lock_init(&pll_lock, PLL_REMOTE_SPINLOCK_ID);
- pll_control = smem_get_entry(SMEM_CLKREGIM_SOURCES, &smem_size);
-
- if (!pll_control) {
- pr_err("Can't find shared PLL control data structure!\n");
- BUG();
- /* There might be more PLLs than what the application processor knows
- * about. But the index used for each PLL is guaranteed to remain the
- * same. */
- } else if (smem_size < sizeof(struct shared_pll_control)) {
- pr_err("Shared PLL control data"
- "structure too small!\n");
- BUG();
- } else if (pll_control->version != 0xCCEE0001) {
- pr_err("Shared PLL control version mismatch!\n");
- BUG();
- } else {
- pr_info("Shared PLL control available.\n");
- return;
- }
-
-}
static struct acpuclk_data acpuclk_7627_data = {
.set_rate = acpuclk_7627_set_rate,
@@ -988,13 +877,11 @@
BUG_ON(IS_ERR(drv_state.ebi1_clk));
mutex_init(&drv_state.lock);
- shared_pll_control_init();
drv_state.max_speed_delta_khz = soc_data->max_speed_delta_khz;
- acpu_freq_tbl_fixup();
+ select_freq_plan();
acpuclk_7627_data.wait_for_irq_khz = find_wait_for_irq_khz();
precompute_stepping();
acpuclk_hw_init();
- lpj_init();
print_acpu_freq_tbl();
acpuclk_register(&acpuclk_7627_data);
@@ -1018,3 +905,9 @@
.max_speed_delta_khz = 504000,
.init = acpuclk_7627_init,
};
+
+struct acpuclk_soc_data acpuclk_8625_soc_data __initdata = {
+ /* TODO: Need to update speed delta from H/w Team */
+ .max_speed_delta_khz = 604800,
+ .init = acpuclk_7627_init,
+};
diff --git a/arch/arm/mach-msm/acpuclock-7x30.c b/arch/arm/mach-msm/acpuclock-7x30.c
index 7ee4e5b..f2fb292 100644
--- a/arch/arm/mach-msm/acpuclock-7x30.c
+++ b/arch/arm/mach-msm/acpuclock-7x30.c
@@ -1,7 +1,7 @@
/*
*
* Copyright (C) 2007 Google, Inc.
- * Copyright (c) 2007-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2007-2012, Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -76,7 +76,6 @@
unsigned int vdd_mv;
unsigned int vdd_raw;
struct pll *pll_rate;
- unsigned long lpj; /* loops_per_jiffy */
};
static struct clock_state drv_state = { 0 };
@@ -259,7 +258,6 @@
/* Perform the frequency switch */
acpuclk_set_src(tgt_s);
drv_state.current_speed = tgt_s;
- loops_per_jiffy = tgt_s->lpj;
if (tgt_s->src == PLL_2 && strt_s->src == PLL_2)
clk_disable(acpuclk_sources[backup_s->src]);
@@ -392,19 +390,6 @@
return;
}
-/* Initalize the lpj field in the acpu_freq_tbl. */
-static void __init lpj_init(void)
-{
- int i;
- const struct clkctl_acpu_speed *base_clk = drv_state.current_speed;
-
- for (i = 0; acpu_freq_tbl[i].acpu_clk_khz; i++) {
- acpu_freq_tbl[i].lpj = cpufreq_scale(loops_per_jiffy,
- base_clk->acpu_clk_khz,
- acpu_freq_tbl[i].acpu_clk_khz);
- }
-}
-
#ifdef CONFIG_CPU_FREQ_MSM
static struct cpufreq_frequency_table cpufreq_tbl[ARRAY_SIZE(acpu_freq_tbl)];
@@ -479,7 +464,6 @@
pll2_fixup();
populate_plls();
acpuclk_hw_init();
- lpj_init();
setup_cpufreq_table();
acpuclk_register(&acpuclk_7x30_data);
diff --git a/arch/arm/mach-msm/acpuclock-8960.c b/arch/arm/mach-msm/acpuclock-8960.c
index 99c3d78..8d35148 100644
--- a/arch/arm/mach-msm/acpuclock-8960.c
+++ b/arch/arm/mach-msm/acpuclock-8960.c
@@ -194,7 +194,7 @@
.hfpll_base = MSM_HFPLL_BASE + 0x200,
.aux_clk_sel = MSM_ACC0_BASE + 0x014,
.l2cpmr_iaddr = L2CPUCPMR_IADDR,
- .vreg[VREG_CORE] = { "krait0", 1150000 },
+ .vreg[VREG_CORE] = { "krait0", 1300000 },
.vreg[VREG_MEM] = { "krait0_mem", 1150000,
RPM_VREG_VOTER1,
RPM_VREG_ID_PM8921_L24 },
@@ -209,7 +209,7 @@
.hfpll_base = MSM_HFPLL_BASE + 0x240,
.aux_clk_sel = MSM_ACC1_BASE + 0x014,
.l2cpmr_iaddr = L2CPUCPMR_IADDR,
- .vreg[VREG_CORE] = { "krait1", 1150000 },
+ .vreg[VREG_CORE] = { "krait1", 1300000 },
.vreg[VREG_MEM] = { "krait1_mem", 1150000,
RPM_VREG_VOTER2,
RPM_VREG_ID_PM8921_L24 },
@@ -224,7 +224,7 @@
.hfpll_base = MSM_HFPLL_BASE + 0x280,
.aux_clk_sel = MSM_ACC2_BASE + 0x014,
.l2cpmr_iaddr = L2CPUCPMR_IADDR,
- .vreg[VREG_CORE] = { "krait2", 1150000 },
+ .vreg[VREG_CORE] = { "krait2", 1300000 },
.vreg[VREG_MEM] = { "krait2_mem", 1150000,
RPM_VREG_VOTER4,
RPM_VREG_ID_PM8921_L24 },
@@ -239,7 +239,7 @@
.hfpll_base = MSM_HFPLL_BASE + 0x2C0,
.aux_clk_sel = MSM_ACC3_BASE + 0x014,
.l2cpmr_iaddr = L2CPUCPMR_IADDR,
- .vreg[VREG_CORE] = { "krait3", 1150000 },
+ .vreg[VREG_CORE] = { "krait3", 1300000 },
.vreg[VREG_MEM] = { "krait3_mem", 1150000,
RPM_VREG_VOTER5,
RPM_VREG_ID_PM8921_L24 },
@@ -375,6 +375,7 @@
[4] = BW_MBPS(3200), /* At least 400 MHz on bus. */
[5] = BW_MBPS(3600), /* At least 450 MHz on bus. */
[6] = BW_MBPS(3936), /* At least 492 MHz on bus. */
+ [7] = BW_MBPS(4264), /* At least 533 MHz on bus. */
};
static struct msm_bus_scale_pdata bus_client_pdata = {
@@ -546,47 +547,48 @@
#define L2(x) (&l2_freq_tbl_8064[(x)])
static struct l2_level l2_freq_tbl_8064[] = {
[0] = { {STBY_KHZ, QSB, 0, 0, 0x00 }, 1050000, 1050000, 0 },
- [1] = { { 384000, PLL_8, 0, 2, 0x00 }, 1050000, 1050000, 0 },
- [2] = { { 432000, HFPLL, 2, 0, 0x20 }, 1050000, 1050000, 1 },
- [3] = { { 486000, HFPLL, 2, 0, 0x24 }, 1050000, 1050000, 1 },
- [4] = { { 540000, HFPLL, 2, 0, 0x28 }, 1050000, 1050000, 1 },
+ [1] = { { 384000, PLL_8, 0, 2, 0x00 }, 1050000, 1050000, 1 },
+ [2] = { { 432000, HFPLL, 2, 0, 0x20 }, 1050000, 1050000, 2 },
+ [3] = { { 486000, HFPLL, 2, 0, 0x24 }, 1050000, 1050000, 2 },
+ [4] = { { 540000, HFPLL, 2, 0, 0x28 }, 1050000, 1050000, 2 },
[5] = { { 594000, HFPLL, 1, 0, 0x16 }, 1050000, 1050000, 2 },
- [6] = { { 648000, HFPLL, 1, 0, 0x18 }, 1050000, 1050000, 2 },
- [7] = { { 702000, HFPLL, 1, 0, 0x1A }, 1050000, 1050000, 2 },
- [8] = { { 756000, HFPLL, 1, 0, 0x1C }, 1150000, 1150000, 3 },
- [9] = { { 810000, HFPLL, 1, 0, 0x1E }, 1150000, 1150000, 3 },
- [10] = { { 864000, HFPLL, 1, 0, 0x20 }, 1150000, 1150000, 3 },
- [11] = { { 918000, HFPLL, 1, 0, 0x22 }, 1150000, 1150000, 3 },
- [12] = { { 972000, HFPLL, 1, 0, 0x24 }, 1150000, 1150000, 3 },
- [13] = { { 1026000, HFPLL, 1, 0, 0x26 }, 1150000, 1150000, 3 },
- [14] = { { 1080000, HFPLL, 1, 0, 0x28 }, 1150000, 1150000, 4 },
- [15] = { { 1134000, HFPLL, 1, 0, 0x2A }, 1150000, 1150000, 4 },
- [16] = { { 1188000, HFPLL, 1, 0, 0x2C }, 1150000, 1150000, 4 },
- [17] = { { 1242000, HFPLL, 1, 0, 0x2E }, 1150000, 1150000, 4 },
- [18] = { { 1296000, HFPLL, 1, 0, 0x30 }, 1150000, 1150000, 4 },
- [19] = { { 1350000, HFPLL, 1, 0, 0x32 }, 1150000, 1150000, 4 },
- [20] = { { 1404000, HFPLL, 1, 0, 0x34 }, 1150000, 1150000, 4 },
- [21] = { { 1458000, HFPLL, 1, 0, 0x36 }, 1150000, 1150000, 5 },
- [22] = { { 1512000, HFPLL, 1, 0, 0x38 }, 1150000, 1150000, 5 },
- [23] = { { 1566000, HFPLL, 1, 0, 0x3A }, 1150000, 1150000, 5 },
- [24] = { { 1620000, HFPLL, 1, 0, 0x3C }, 1150000, 1150000, 5 },
- [25] = { { 1674000, HFPLL, 1, 0, 0x3E }, 1150000, 1150000, 5 },
+ [6] = { { 648000, HFPLL, 1, 0, 0x18 }, 1050000, 1050000, 4 },
+ [7] = { { 702000, HFPLL, 1, 0, 0x1A }, 1050000, 1050000, 4 },
+ [8] = { { 756000, HFPLL, 1, 0, 0x1C }, 1150000, 1150000, 4 },
+ [9] = { { 810000, HFPLL, 1, 0, 0x1E }, 1150000, 1150000, 4 },
+ [10] = { { 864000, HFPLL, 1, 0, 0x20 }, 1150000, 1150000, 4 },
+ [11] = { { 918000, HFPLL, 1, 0, 0x22 }, 1150000, 1150000, 7 },
+ [12] = { { 972000, HFPLL, 1, 0, 0x24 }, 1150000, 1150000, 7 },
+ [13] = { { 1026000, HFPLL, 1, 0, 0x26 }, 1150000, 1150000, 7 },
+ [14] = { { 1080000, HFPLL, 1, 0, 0x28 }, 1150000, 1150000, 7 },
+ [15] = { { 1134000, HFPLL, 1, 0, 0x2A }, 1150000, 1150000, 7 },
};
/* TODO: Update core voltages when data is available. */
static struct acpu_level acpu_freq_tbl_8064[] = {
- { 0, {STBY_KHZ, QSB, 0, 0, 0x00 }, L2(0), 1050000 },
- { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(1), 1050000 },
- { 1, { 432000, HFPLL, 2, 0, 0x20 }, L2(2), 1050000 },
- { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(3), 1050000 },
- { 1, { 540000, HFPLL, 2, 0, 0x28 }, L2(4), 1050000 },
- { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(5), 1050000 },
- { 1, { 648000, HFPLL, 1, 0, 0x18 }, L2(6), 1050000 },
- { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(7), 1050000 },
- { 1, { 756000, HFPLL, 1, 0, 0x1C }, L2(8), 1150000 },
- { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(9), 1150000 },
- { 1, { 864000, HFPLL, 1, 0, 0x20 }, L2(10), 1150000 },
- { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(11), 1150000 },
+ { 0, { STBY_KHZ, QSB, 0, 0, 0x00 }, L2(0), 950000 },
+ { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(1), 950000 },
+ { 0, { 432000, HFPLL, 2, 0, 0x20 }, L2(7), 975000 },
+ { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(7), 975000 },
+ { 0, { 540000, HFPLL, 2, 0, 0x28 }, L2(7), 1000000 },
+ { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(7), 1000000 },
+ { 0, { 648000, HFPLL, 1, 0, 0x18 }, L2(7), 1025000 },
+ { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(7), 1025000 },
+ { 0, { 756000, HFPLL, 1, 0, 0x1C }, L2(7), 1075000 },
+ { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(7), 1075000 },
+ { 0, { 864000, HFPLL, 1, 0, 0x20 }, L2(7), 1100000 },
+ { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(7), 1100000 },
+ { 0, { 972000, HFPLL, 1, 0, 0x24 }, L2(7), 1125000 },
+ { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(7), 1125000 },
+ { 0, { 1080000, HFPLL, 1, 0, 0x28 }, L2(15), 1175000 },
+ { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(15), 1175000 },
+ { 0, { 1188000, HFPLL, 1, 0, 0x2C }, L2(15), 1200000 },
+ { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(15), 1200000 },
+ { 0, { 1296000, HFPLL, 1, 0, 0x30 }, L2(15), 1225000 },
+ { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(15), 1225000 },
+ { 0, { 1404000, HFPLL, 1, 0, 0x34 }, L2(15), 1237500 },
+ { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(15), 1237500 },
+ { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(15), 1250000 },
{ 0, { 0 } }
};
diff --git a/arch/arm/mach-msm/acpuclock.h b/arch/arm/mach-msm/acpuclock.h
index ef6c359..c5f0ee3 100644
--- a/arch/arm/mach-msm/acpuclock.h
+++ b/arch/arm/mach-msm/acpuclock.h
@@ -110,5 +110,6 @@
extern struct acpuclk_soc_data acpuclk_9615_soc_data;
extern struct acpuclk_soc_data acpuclk_8930_soc_data;
extern struct acpuclk_soc_data acpuclk_8064_soc_data;
+extern struct acpuclk_soc_data acpuclk_8625_soc_data;
#endif
diff --git a/arch/arm/mach-msm/bam_dmux.c b/arch/arm/mach-msm/bam_dmux.c
index 0a56dd2..7b9bdac 100644
--- a/arch/arm/mach-msm/bam_dmux.c
+++ b/arch/arm/mach-msm/bam_dmux.c
@@ -65,6 +65,9 @@
static uint32_t bam_dmux_write_cpy_bytes;
static uint32_t bam_dmux_tx_sps_failure_cnt;
static uint32_t bam_dmux_tx_stall_cnt;
+static atomic_t bam_dmux_ack_out_cnt = ATOMIC_INIT(0);
+static atomic_t bam_dmux_ack_in_cnt = ATOMIC_INIT(0);
+static atomic_t bam_dmux_a2_pwr_cntl_in_cnt = ATOMIC_INIT(0);
#define DBG(x...) do { \
if (msm_bam_dmux_debug_enable) \
@@ -102,6 +105,14 @@
bam_dmux_tx_stall_cnt++; \
} while (0)
+#define DBG_INC_ACK_OUT_CNT() \
+ atomic_inc(&bam_dmux_ack_out_cnt)
+
+#define DBG_INC_A2_POWER_CONTROL_IN_CNT() \
+ atomic_inc(&bam_dmux_a2_pwr_cntl_in_cnt)
+
+#define DBG_INC_ACK_IN_CNT() \
+ atomic_inc(&bam_dmux_ack_in_cnt)
#else
#define DBG(x...) do { } while (0)
#define DBG_INC_READ_CNT(x...) do { } while (0)
@@ -109,6 +120,10 @@
#define DBG_INC_WRITE_CPY(x...) do { } while (0)
#define DBG_INC_TX_SPS_FAILURE_CNT() do { } while (0)
#define DBG_INC_TX_STALL_CNT() do { } while (0)
+#define DBG_INC_ACK_OUT_CNT() do { } while (0)
+#define DBG_INC_A2_POWER_CONTROL_IN_CNT() \
+ do { } while (0)
+#define DBG_INC_ACK_IN_CNT() do { } while (0)
#endif
struct bam_ch_info {
@@ -208,7 +223,7 @@
static struct delayed_work ul_timeout_work;
static int ul_packet_written;
static atomic_t ul_ondemand_vote = ATOMIC_INIT(0);
-static struct clk *dfab_clk;
+static struct clk *dfab_clk, *xo_clk;
static DEFINE_RWLOCK(ul_wakeup_lock);
static DECLARE_WORK(kickoff_ul_wakeup, kickoff_ul_wakeup_func);
static int bam_connection_is_active;
@@ -221,7 +236,6 @@
static struct completion dfab_unvote_completion;
static DEFINE_SPINLOCK(wakelock_reference_lock);
static int wakelock_reference_count;
-static struct delayed_work msm9615_bam_init_work;
static int a2_pc_disabled_wakelock_skipped;
/* End A2 power collaspe */
@@ -541,8 +555,7 @@
if (!a2_pc_disabled) {
a2_pc_disabled = 1;
- schedule_delayed_work(&ul_timeout_work,
- msecs_to_jiffies(UL_TIMEOUT_DELAY));
+ ul_wakeup();
}
handle_bam_mux_cmd_open(rx_hdr);
@@ -1200,14 +1213,20 @@
"skb copy bytes: %u\n"
"sps tx failures: %u\n"
"sps tx stalls: %u\n"
- "rx queue len: %d\n",
+ "rx queue len: %d\n"
+ "a2 ack out cnt: %d\n"
+ "a2 ack in cnt: %d\n"
+ "a2 pwr cntl in: %d\n",
bam_dmux_read_cnt,
bam_dmux_write_cnt,
bam_dmux_write_cpy_cnt,
bam_dmux_write_cpy_bytes,
bam_dmux_tx_sps_failure_cnt,
bam_dmux_tx_stall_cnt,
- bam_rx_pool_len
+ bam_rx_pool_len,
+ atomic_read(&bam_dmux_ack_out_cnt),
+ atomic_read(&bam_dmux_ack_in_cnt),
+ atomic_read(&bam_dmux_a2_pwr_cntl_in_cnt)
);
return i;
@@ -1512,21 +1531,11 @@
static int ssrestart_check(void)
{
- /*
- * if the restart level is RESET_SOC, SSR is not on
- * so the crashed modem will end up crashing the system
- * anyways, so use BUG() to report the error
- * else prepare for the restart event which should
- * happen soon
- */
- DMUX_LOG_KERR("%s: modem timeout\n", __func__);
- if (get_restart_level() <= RESET_SOC) {
- BUG();
- return 0;
- } else {
- in_global_reset = 1;
- return 1;
- }
+ DMUX_LOG_KERR("%s: modem timeout: BAM DMUX disabled\n", __func__);
+ in_global_reset = 1;
+ if (get_restart_level() <= RESET_SOC)
+ DMUX_LOG_KERR("%s: ssrestart not enabled\n", __func__);
+ return 1;
}
static void ul_wakeup(void)
@@ -1629,10 +1638,9 @@
if (polling_mode)
rx_switch_to_interrupt_mode();
- queue_rx();
-
toggle_apps_ack();
complete_all(&bam_connection_completion);
+ queue_rx();
}
static void disconnect_to_bam(void)
@@ -1690,6 +1698,9 @@
rc = clk_prepare_enable(dfab_clk);
if (rc)
DMUX_LOG_KERR("bam_dmux vote for dfab failed rc = %d\n", rc);
+ rc = clk_prepare_enable(xo_clk);
+ if (rc)
+ DMUX_LOG_KERR("bam_dmux vote for xo failed rc = %d\n", rc);
dfab_is_on = 1;
mutex_unlock(&dfab_status_lock);
}
@@ -1705,6 +1716,7 @@
return;
}
clk_disable_unprepare(dfab_clk);
+ clk_disable_unprepare(xo_clk);
dfab_is_on = 0;
mutex_unlock(&dfab_status_lock);
}
@@ -1945,10 +1957,10 @@
}
bam_mux_initialized = 1;
- queue_rx();
toggle_apps_ack();
bam_connection_is_active = 1;
complete_all(&bam_connection_completion);
+ queue_rx();
return 0;
rx_event_reg_failed:
@@ -2020,7 +2032,7 @@
return ret;
}
-static void msm9615_bam_init(struct work_struct *work)
+static void msm9615_bam_init(void)
{
int ret = 0;
@@ -2043,11 +2055,13 @@
clear_bit & SMSM_A2_POWER_CONTROL_ACK,
~clear_bit & SMSM_A2_POWER_CONTROL_ACK);
clear_bit = ~clear_bit;
+ DBG_INC_ACK_OUT_CNT();
}
static void bam_dmux_smsm_cb(void *priv, uint32_t old_state, uint32_t new_state)
{
bam_dmux_power_state = new_state & SMSM_A2_POWER_CONTROL ? 1 : 0;
+ DBG_INC_A2_POWER_CONTROL_IN_CNT();
bam_dmux_log("%s: 0x%08x -> 0x%08x\n", __func__, old_state,
new_state);
@@ -2063,19 +2077,10 @@
} else if (new_state & SMSM_A2_POWER_CONTROL) {
bam_dmux_log("%s: init\n", __func__);
grab_wakelock();
- if (cpu_is_msm9615()) {
- /*
- * even though a2 has signaled it is ready via the
- * SMSM_A2_POWER_CONTROL bit, it has not yet
- * enabled the pipes as needed by sps_connect
- * in satallite mode. Add a short delay to give modem
- * time to enable the pipes.
- */
- schedule_delayed_work(&msm9615_bam_init_work,
- msecs_to_jiffies(100));
- } else {
+ if (cpu_is_msm9615())
+ msm9615_bam_init();
+ else
bam_init();
- }
} else {
bam_dmux_log("%s: bad state change\n", __func__);
pr_err("%s: unsupported state change\n", __func__);
@@ -2086,6 +2091,7 @@
static void bam_dmux_smsm_ack_cb(void *priv, uint32_t old_state,
uint32_t new_state)
{
+ DBG_INC_ACK_IN_CNT();
bam_dmux_log("%s: 0x%08x -> 0x%08x\n", __func__, old_state,
new_state);
complete_all(&ul_wakeup_ack_completion);
@@ -2099,6 +2105,11 @@
if (bam_mux_initialized)
return 0;
+ xo_clk = clk_get(&pdev->dev, "xo");
+ if (IS_ERR(xo_clk)) {
+ pr_err("%s: did not get xo clock\n", __func__);
+ return PTR_ERR(xo_clk);
+ }
dfab_clk = clk_get(&pdev->dev, "bus_clk");
if (IS_ERR(dfab_clk)) {
pr_err("%s: did not get dfab clock\n", __func__);
@@ -2137,7 +2148,6 @@
init_completion(&bam_connection_completion);
init_completion(&dfab_unvote_completion);
INIT_DELAYED_WORK(&ul_timeout_work, ul_timeout);
- INIT_DELAYED_WORK(&msm9615_bam_init_work, msm9615_bam_init);
wake_lock_init(&bam_wakelock, WAKE_LOCK_SUSPEND, "bam_dmux_wakelock");
rc = smsm_state_cb_register(SMSM_MODEM_STATE, SMSM_A2_POWER_CONTROL,
diff --git a/arch/arm/mach-msm/bms-batterydata.c b/arch/arm/mach-msm/bms-batterydata.c
index 4287153..ea2a9f6 100644
--- a/arch/arm/mach-msm/bms-batterydata.c
+++ b/arch/arm/mach-msm/bms-batterydata.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,19 +12,19 @@
#include <linux/mfd/pm8xxx/pm8921-bms.h>
-static struct single_row_lut fcc_temp = {
+static struct single_row_lut palladium_1500_fcc_temp = {
.x = {-30, -20, -10, 0, 10, 25, 40, 60},
.y = {1103, 1179, 1284, 1330, 1420, 1511, 1541, 1571},
.cols = 8,
};
-static struct single_row_lut fcc_sf = {
+static struct single_row_lut palladium_1500_fcc_sf = {
.x = {100, 200, 300, 400, 500},
.y = {97, 93, 93, 90, 87},
.cols = 5,
};
-static struct pc_sf_lut pc_sf = {
+static struct pc_sf_lut palladium_1500_pc_sf = {
.rows = 10,
.cols = 5,
.cycles = {100, 200, 300, 400, 500},
@@ -43,7 +43,7 @@
},
};
-static struct pc_temp_ocv_lut pc_temp_ocv = {
+static struct pc_temp_ocv_lut palladium_1500_pc_temp_ocv = {
.rows = 29,
.cols = 8,
.temp = {-30, -20, -10, 0, 10, 25, 40, 60},
@@ -84,10 +84,81 @@
},
};
-struct pm8921_bms_battery_data palladium_1500_data = {
+struct pm8921_bms_battery_data palladium_1500_data = {
.fcc = 1500,
- .fcc_temp_lut = &fcc_temp,
- .fcc_sf_lut = &fcc_sf,
- .pc_temp_ocv_lut = &pc_temp_ocv,
- .pc_sf_lut = &pc_sf,
+ .fcc_temp_lut = &palladium_1500_fcc_temp,
+ .fcc_sf_lut = &palladium_1500_fcc_sf,
+ .pc_temp_ocv_lut = &palladium_1500_pc_temp_ocv,
+ .pc_sf_lut = &palladium_1500_pc_sf,
+};
+
+static struct single_row_lut desay_5200_fcc_temp = {
+ .x = {-20, 0, 25, 40},
+ .y = {5690, 5722, 5722, 5727},
+ .cols = 4
+};
+
+static struct single_row_lut desay_5200_fcc_sf = {
+ .x = {0},
+ .y = {100},
+ .cols = 1
+};
+
+static struct pc_temp_ocv_lut desay_5200_pc_temp_ocv = {
+ .rows = 29,
+ .cols = 4,
+ .temp = {-20, 0, 25, 40},
+ .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55,
+ 50, 45, 40, 35, 30, 25, 20, 15, 10, 9, 8,
+ 7, 6, 5, 4, 3, 2, 1, 0
+ },
+ .ocv = {
+ {4185, 4184, 4181, 4178},
+ {4103, 4117, 4120, 4119},
+ {4044, 4067, 4074, 4073},
+ {3987, 4019, 4031, 4030},
+ {3941, 3974, 3992, 3992},
+ {3902, 3936, 3958, 3957},
+ {3866, 3901, 3926, 3926},
+ {3835, 3870, 3891, 3896},
+ {3811, 3842, 3855, 3858},
+ {3792, 3818, 3827, 3827},
+ {3776, 3795, 3806, 3806},
+ {3762, 3778, 3789, 3790},
+ {3748, 3765, 3777, 3777},
+ {3735, 3752, 3767, 3765},
+ {3720, 3739, 3756, 3754},
+ {3704, 3726, 3743, 3736},
+ {3685, 3712, 3723, 3716},
+ {3664, 3697, 3695, 3689},
+ {3623, 3672, 3669, 3664},
+ {3611, 3666, 3666, 3661},
+ {3597, 3659, 3662, 3658},
+ {3579, 3648, 3657, 3653},
+ {3559, 3630, 3644, 3639},
+ {3532, 3600, 3612, 3606},
+ {3497, 3558, 3565, 3559},
+ {3450, 3500, 3504, 3498},
+ {3380, 3417, 3421, 3416},
+ {3265, 3287, 3296, 3293},
+ {3000, 3000, 3000, 3000}
+ },
+};
+
+static struct pc_sf_lut desay_5200_pc_sf = {
+ .rows = 1,
+ .cols = 1,
+ .cycles = {0},
+ .percent = {100},
+ .sf = {
+ {100}
+ },
+};
+
+struct pm8921_bms_battery_data desay_5200_data = {
+ .fcc = 5200,
+ .fcc_temp_lut = &desay_5200_fcc_temp,
+ .fcc_sf_lut = &desay_5200_fcc_sf,
+ .pc_temp_ocv_lut = &desay_5200_pc_temp_ocv,
+ .pc_sf_lut = &desay_5200_pc_sf,
};
diff --git a/arch/arm/mach-msm/board-8064-camera.c b/arch/arm/mach-msm/board-8064-camera.c
index 109ed2c..70d76fb 100644
--- a/arch/arm/mach-msm/board-8064-camera.c
+++ b/arch/arm/mach-msm/board-8064-camera.c
@@ -102,6 +102,13 @@
static struct msm_gpiomux_config apq8064_cam_common_configs[] = {
{
+ .gpio = 1,
+ .settings = {
+ [GPIOMUX_ACTIVE] = &cam_settings[2],
+ [GPIOMUX_SUSPENDED] = &cam_settings[0],
+ },
+ },
+ {
.gpio = 2,
.settings = {
[GPIOMUX_ACTIVE] = &cam_settings[12],
@@ -111,7 +118,7 @@
{
.gpio = 3,
.settings = {
- [GPIOMUX_ACTIVE] = &cam_settings[1],
+ [GPIOMUX_ACTIVE] = &cam_settings[2],
[GPIOMUX_SUSPENDED] = &cam_settings[0],
},
},
@@ -173,6 +180,16 @@
},
};
+
+#define VFE_CAMIF_TIMER1_GPIO 3
+#define VFE_CAMIF_TIMER2_GPIO 1
+
+static struct msm_camera_sensor_flash_src msm_flash_src = {
+ .flash_sr_type = MSM_CAMERA_FLASH_SRC_EXT,
+ ._fsrc.ext_driver_src.led_en = VFE_CAMIF_TIMER1_GPIO,
+ ._fsrc.ext_driver_src.led_flash_en = VFE_CAMIF_TIMER2_GPIO,
+};
+
static struct msm_gpiomux_config apq8064_cam_2d_configs[] = {
};
@@ -332,17 +349,15 @@
};
static struct camera_vreg_t apq_8064_back_cam_vreg[] = {
- {"mipi_csi_vdd", REG_LDO, 1200000, 1200000, 20000},
- {"cam_vana", REG_LDO, 2800000, 2850000, 85600},
- {"cam_vio", REG_VS, 0, 0, 0},
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
+ {"cam_vio", REG_VS, 0, 0, 0},
+ {"cam_vana", REG_LDO, 2800000, 2850000, 85600},
{"cam_vaf", REG_LDO, 2800000, 2850000, 300000},
};
static struct camera_vreg_t apq_8064_front_cam_vreg[] = {
- {"mipi_csi_vdd", REG_LDO, 1200000, 1200000, 20000},
- {"cam_vana", REG_LDO, 2800000, 2850000, 85600},
{"cam_vio", REG_VS, 0, 0, 0},
+ {"cam_vana", REG_LDO, 2800000, 2850000, 85600},
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
{"cam_vaf", REG_LDO, 2800000, 2850000, 300000},
};
@@ -403,15 +418,26 @@
.i2c_mux_mode = MODE_L,
};
+static struct i2c_board_info imx074_actuator_i2c_info = {
+ I2C_BOARD_INFO("imx074_act", 0x11),
+};
+
+static struct msm_actuator_info imx074_actuator_info = {
+ .board_info = &imx074_actuator_i2c_info,
+ .bus_id = APQ_8064_GSBI4_QUP_I2C_BUS_ID,
+ .vcm_pwd = 0,
+ .vcm_enable = 1,
+};
+
static struct msm_camera_i2c_conf apq8064_front_cam_i2c_conf = {
.use_i2c_mux = 1,
.mux_dev = &msm8960_device_i2c_mux_gsbi4,
.i2c_mux_mode = MODE_L,
};
-#ifdef CONFIG_IMX074
static struct msm_camera_sensor_flash_data flash_imx074 = {
- .flash_type = MSM_CAMERA_FLASH_NONE,
+ .flash_type = MSM_CAMERA_FLASH_LED,
+ .flash_src = &msm_flash_src
};
static struct msm_camera_sensor_platform_info sensor_board_info_imx074 = {
@@ -429,10 +455,37 @@
.sensor_platform_info = &sensor_board_info_imx074,
.csi_if = 1,
.camera_type = BACK_CAMERA_2D,
+ .actuator_info = &imx074_actuator_info
};
-#endif
-#ifdef CONFIG_OV2720
+static struct camera_vreg_t apq_8064_mt9m114_vreg[] = {
+ {"cam_vio", REG_VS, 0, 0, 0},
+ {"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
+ {"cam_vana", REG_LDO, 2800000, 2850000, 85600},
+ {"cam_vaf", REG_LDO, 2800000, 2850000, 300000},
+};
+
+static struct msm_camera_sensor_flash_data flash_mt9m114 = {
+ .flash_type = MSM_CAMERA_FLASH_NONE
+};
+
+static struct msm_camera_sensor_platform_info sensor_board_info_mt9m114 = {
+ .mount_angle = 90,
+ .cam_vreg = apq_8064_mt9m114_vreg,
+ .num_vreg = ARRAY_SIZE(apq_8064_mt9m114_vreg),
+ .gpio_conf = &apq8064_front_cam_gpio_conf,
+ .i2c_conf = &apq8064_front_cam_i2c_conf,
+};
+
+static struct msm_camera_sensor_info msm_camera_sensor_mt9m114_data = {
+ .sensor_name = "mt9m114",
+ .pdata = &msm_camera_csi_device_data[1],
+ .flash_data = &flash_mt9m114,
+ .sensor_platform_info = &sensor_board_info_mt9m114,
+ .csi_if = 1,
+ .camera_type = FRONT_CAMERA_2D,
+};
+
static struct msm_camera_sensor_flash_data flash_ov2720 = {
.flash_type = MSM_CAMERA_FLASH_NONE,
};
@@ -453,14 +506,15 @@
.csi_if = 1,
.camera_type = FRONT_CAMERA_2D,
};
-#endif
-
void __init apq8064_init_cam(void)
{
msm_gpiomux_install(apq8064_cam_common_configs,
ARRAY_SIZE(apq8064_cam_common_configs));
+ if (machine_is_apq8064_cdp() || machine_is_apq8064_liquid())
+ sensor_board_info_imx074.mount_angle = 0;
+
platform_device_register(&msm8960_device_i2c_mux_gsbi4);
platform_device_register(&msm8960_device_csiphy0);
platform_device_register(&msm8960_device_csiphy1);
@@ -473,18 +527,21 @@
#ifdef CONFIG_I2C
static struct i2c_board_info apq8064_camera_i2c_boardinfo[] = {
-#ifdef CONFIG_IMX074
{
I2C_BOARD_INFO("imx074", 0x1A),
.platform_data = &msm_camera_sensor_imx074_data,
},
-#endif
-#ifdef CONFIG_OV2720
+ {
+ I2C_BOARD_INFO("mt9m114", 0x48),
+ .platform_data = &msm_camera_sensor_mt9m114_data,
+ },
{
I2C_BOARD_INFO("ov2720", 0x6C),
.platform_data = &msm_camera_sensor_ov2720_data,
},
-#endif
+ {
+ I2C_BOARD_INFO("sc628a", 0x6E),
+ },
};
struct msm_camera_board_info apq8064_camera_board_info = {
diff --git a/arch/arm/mach-msm/board-8064-display.c b/arch/arm/mach-msm/board-8064-display.c
index 604769d..2908025 100644
--- a/arch/arm/mach-msm/board-8064-display.c
+++ b/arch/arm/mach-msm/board-8064-display.c
@@ -23,6 +23,7 @@
#include <mach/gpiomux.h>
#include <mach/ion.h>
#include <mach/msm_bus_board.h>
+#include <mach/socinfo.h>
#include "devices.h"
#include "board-8064.h"
@@ -36,14 +37,12 @@
#endif
#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
-/* hdmi = 1920 x 1088 x 2(bpp) x 1(page) */
-#define MSM_FB_EXT_BUF_SIZE 0x3FC000
+#define MSM_FB_EXT_BUF_SIZE (1920 * 1088 * 2 * 1) /* 2 bpp x 1 page */
#elif defined(CONFIG_FB_MSM_TVOUT)
-/* tvout = 720 x 576 x 2(bpp) x 2(pages) */
-#define MSM_FB_EXT_BUF_SIZE 0x195000
-#else /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
-#define MSM_FB_EXT_BUF_SIZE 0
-#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
+#define MSM_FB_EXT_BUF_SIZE (720 * 576 * 2 * 2) /* 2 bpp x 2 pages */
+#else
+#define MSM_FB_EXT_BUF_SIZE 0
+#endif
#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE, 4096)
@@ -66,7 +65,6 @@
}
};
-#define PANEL_NAME_MAX_LEN 30
#define LVDS_CHIMEI_PANEL_NAME "lvds_chimei_wxga"
#define MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME "mipi_video_toshiba_wsvga"
#define MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME "mipi_video_chimei_wxga"
@@ -75,19 +73,21 @@
static int msm_fb_detect_panel(const char *name)
{
+ u32 version;
if (machine_is_apq8064_liquid()) {
- if (!strncmp(name, LVDS_CHIMEI_PANEL_NAME,
- strnlen(LVDS_CHIMEI_PANEL_NAME,
- PANEL_NAME_MAX_LEN)))
- return 0;
-
-#if !defined(CONFIG_FB_MSM_LVDS_MIPI_PANEL_DETECT) && \
- !defined(CONFIG_FB_MSM_MIPI_PANEL_DETECT)
- if (!strncmp(name, MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME,
- strnlen(MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME,
- PANEL_NAME_MAX_LEN)))
- return 0;
-#endif
+ version = socinfo_get_platform_version();
+ if ((SOCINFO_VERSION_MAJOR(version) == 1) &&
+ (SOCINFO_VERSION_MINOR(version) == 1)) {
+ if (!strncmp(name, MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME,
+ strnlen(MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME,
+ PANEL_NAME_MAX_LEN)))
+ return 0;
+ } else {
+ if (!strncmp(name, LVDS_CHIMEI_PANEL_NAME,
+ strnlen(LVDS_CHIMEI_PANEL_NAME,
+ PANEL_NAME_MAX_LEN)))
+ return 0;
+ }
} else if (machine_is_apq8064_mtp()) {
if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
strnlen(MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
@@ -135,7 +135,6 @@
#define MDP_VSYNC_GPIO 0
-#ifdef CONFIG_MSM_BUS_SCALING
static struct msm_bus_vectors mdp_init_vectors[] = {
{
.src = MSM_BUS_MASTER_MDP_PORT0,
@@ -217,8 +216,6 @@
.name = "mdp",
};
-#endif
-
static int mdp_core_clk_rate_table[] = {
200000000,
200000000,
@@ -231,9 +228,7 @@
.mdp_core_clk_rate = 200000000,
.mdp_core_clk_table = mdp_core_clk_rate_table,
.num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
-#ifdef CONFIG_MSM_BUS_SCALING
.mdp_bus_scale_table = &mdp_bus_scale_pdata,
-#endif
.mdp_rev = MDP_REV_44,
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
.mem_hid = ION_CP_MM_HEAP_ID,
@@ -254,6 +249,52 @@
#endif
}
+static struct resource hdmi_msm_resources[] = {
+ {
+ .name = "hdmi_msm_qfprom_addr",
+ .start = 0x00700000,
+ .end = 0x007060FF,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "hdmi_msm_hdmi_addr",
+ .start = 0x04A00000,
+ .end = 0x04A00FFF,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "hdmi_msm_irq",
+ .start = HDMI_IRQ,
+ .end = HDMI_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static int hdmi_enable_5v(int on);
+static int hdmi_core_power(int on, int show);
+static int hdmi_cec_power(int on);
+
+static struct msm_hdmi_platform_data hdmi_msm_data = {
+ .irq = HDMI_IRQ,
+ .enable_5v = hdmi_enable_5v,
+ .core_power = hdmi_core_power,
+ .cec_power = hdmi_cec_power,
+};
+
+static struct platform_device hdmi_msm_device = {
+ .name = "hdmi_msm",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(hdmi_msm_resources),
+ .resource = hdmi_msm_resources,
+ .dev.platform_data = &hdmi_msm_data,
+};
+
+/* HDMI related GPIOs */
+#define HDMI_CEC_VAR_GPIO 69
+#define HDMI_DDC_CLK_GPIO 70
+#define HDMI_DDC_DATA_GPIO 71
+#define HDMI_HPD_GPIO 72
+
static bool dsi_power_on;
static int mipi_dsi_panel_power(int on)
{
@@ -528,8 +569,21 @@
return 0;
}
+static int lvds_pixel_remap(void)
+{
+ if (machine_is_apq8064_cdp() ||
+ machine_is_apq8064_liquid()) {
+ u32 ver = socinfo_get_platform_version();
+ if ((SOCINFO_VERSION_MAJOR(ver) == 1) &&
+ (SOCINFO_VERSION_MINOR(ver) == 0))
+ return 1;
+ }
+ return 0;
+}
+
static struct lcdc_platform_data lvds_pdata = {
.lcdc_power_save = lvds_panel_power,
+ .lvds_pixel_remap = lvds_pixel_remap
};
#define LPM_CHANNEL 2
@@ -574,6 +628,273 @@
}
};
+static struct msm_bus_vectors dtv_bus_init_vectors[] = {
+ {
+ .src = MSM_BUS_MASTER_MDP_PORT0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 0,
+ .ib = 0,
+ },
+};
+
+#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
+static struct msm_bus_vectors dtv_bus_def_vectors[] = {
+ {
+ .src = MSM_BUS_MASTER_MDP_PORT0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 2000000000,
+ .ib = 2000000000,
+ },
+};
+#else
+static struct msm_bus_vectors dtv_bus_def_vectors[] = {
+ {
+ .src = MSM_BUS_MASTER_MDP_PORT0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 566092800 * 2,
+ .ib = 707616000 * 2,
+ },
+};
+#endif
+
+static struct msm_bus_paths dtv_bus_scale_usecases[] = {
+ {
+ ARRAY_SIZE(dtv_bus_init_vectors),
+ dtv_bus_init_vectors,
+ },
+ {
+ ARRAY_SIZE(dtv_bus_def_vectors),
+ dtv_bus_def_vectors,
+ },
+};
+static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
+ dtv_bus_scale_usecases,
+ ARRAY_SIZE(dtv_bus_scale_usecases),
+ .name = "dtv",
+};
+
+static struct lcdc_platform_data dtv_pdata = {
+ .bus_scale_table = &dtv_bus_scale_pdata,
+};
+
+static int hdmi_enable_5v(int on)
+{
+ /* TBD: PM8921 regulator instead of 8901 */
+ static struct regulator *reg_8921_hdmi_mvs; /* HDMI_5V */
+ static int prev_on;
+ int rc;
+
+ if (on == prev_on)
+ return 0;
+
+ if (!reg_8921_hdmi_mvs) {
+ reg_8921_hdmi_mvs = regulator_get(&hdmi_msm_device.dev,
+ "hdmi_mvs");
+ if (IS_ERR(reg_8921_hdmi_mvs)) {
+ pr_err("could not get reg_8921_hdmi_mvs, rc = %ld\n",
+ PTR_ERR(reg_8921_hdmi_mvs));
+ reg_8921_hdmi_mvs = NULL;
+ return -ENODEV;
+ }
+ }
+
+ if (on) {
+ rc = regulator_enable(reg_8921_hdmi_mvs);
+ if (rc) {
+ pr_err("'%s' regulator enable failed, rc=%d\n",
+ "8921_hdmi_mvs", rc);
+ return rc;
+ }
+ pr_debug("%s(on): success\n", __func__);
+ } else {
+ rc = regulator_disable(reg_8921_hdmi_mvs);
+ if (rc)
+ pr_warning("'%s' regulator disable failed, rc=%d\n",
+ "8921_hdmi_mvs", rc);
+ pr_debug("%s(off): success\n", __func__);
+ }
+
+ prev_on = on;
+
+ return 0;
+}
+
+static int hdmi_core_power(int on, int show)
+{
+ static struct regulator *reg_8921_lvs7, *reg_8921_s4, *reg_ext_3p3v;
+ static int prev_on;
+ int rc;
+ int pmic_gpio14 = PM8921_GPIO_PM_TO_SYS(14);
+
+ if (on == prev_on)
+ return 0;
+
+ /* TBD: PM8921 regulator instead of 8901 */
+ if (!reg_ext_3p3v) {
+ reg_ext_3p3v = regulator_get(&hdmi_msm_device.dev,
+ "hdmi_mux_vdd");
+ if (IS_ERR_OR_NULL(reg_ext_3p3v)) {
+ pr_err("could not get reg_ext_3p3v, rc = %ld\n",
+ PTR_ERR(reg_ext_3p3v));
+ reg_ext_3p3v = NULL;
+ return -ENODEV;
+ }
+ }
+
+ if (!reg_8921_lvs7) {
+ reg_8921_lvs7 = regulator_get(&hdmi_msm_device.dev,
+ "hdmi_vdda");
+ if (IS_ERR(reg_8921_lvs7)) {
+ pr_err("could not get reg_8921_lvs7, rc = %ld\n",
+ PTR_ERR(reg_8921_lvs7));
+ reg_8921_lvs7 = NULL;
+ return -ENODEV;
+ }
+ }
+ if (!reg_8921_s4) {
+ reg_8921_s4 = regulator_get(&hdmi_msm_device.dev,
+ "hdmi_lvl_tsl");
+ if (IS_ERR(reg_8921_s4)) {
+ pr_err("could not get reg_8921_s4, rc = %ld\n",
+ PTR_ERR(reg_8921_s4));
+ reg_8921_s4 = NULL;
+ return -ENODEV;
+ }
+ rc = regulator_set_voltage(reg_8921_s4, 1800000, 1800000);
+ if (rc) {
+ pr_err("set_voltage failed for 8921_s4, rc=%d\n", rc);
+ return -EINVAL;
+ }
+ }
+
+ if (on) {
+ /*
+ * Configure 3P3V_BOOST_EN as GPIO, 8mA drive strength,
+ * pull none, out-high
+ */
+ rc = regulator_set_optimum_mode(reg_ext_3p3v, 290000);
+ if (rc < 0) {
+ pr_err("set_optimum_mode ext_3p3v failed, rc=%d\n", rc);
+ return -EINVAL;
+ }
+
+ rc = regulator_enable(reg_ext_3p3v);
+ if (rc) {
+ pr_err("enable reg_ext_3p3v failed, rc=%d\n", rc);
+ return -ENODEV;
+ }
+ rc = regulator_enable(reg_8921_lvs7);
+ if (rc) {
+ pr_err("'%s' regulator enable failed, rc=%d\n",
+ "hdmi_vdda", rc);
+ return rc;
+ }
+ rc = regulator_enable(reg_8921_s4);
+ if (rc) {
+ pr_err("'%s' regulator enable failed, rc=%d\n",
+ "hdmi_lvl_tsl", rc);
+ return rc;
+ }
+ rc = gpio_request(HDMI_DDC_CLK_GPIO, "HDMI_DDC_CLK");
+ if (rc) {
+ pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
+ "HDMI_DDC_CLK", HDMI_DDC_CLK_GPIO, rc);
+ goto error1;
+ }
+ rc = gpio_request(HDMI_DDC_DATA_GPIO, "HDMI_DDC_DATA");
+ if (rc) {
+ pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
+ "HDMI_DDC_DATA", HDMI_DDC_DATA_GPIO, rc);
+ goto error2;
+ }
+ rc = gpio_request(HDMI_HPD_GPIO, "HDMI_HPD");
+ if (rc) {
+ pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
+ "HDMI_HPD", HDMI_HPD_GPIO, rc);
+ goto error3;
+ }
+ if (machine_is_apq8064_liquid()) {
+ rc = gpio_request(pmic_gpio14, "PMIC_HDMI_MUX_SEL");
+ if (rc) {
+ pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
+ "PMIC_HDMI_MUX_SEL", 14, rc);
+ goto error4;
+ }
+ gpio_set_value_cansleep(pmic_gpio14, 0);
+ }
+ pr_debug("%s(on): success\n", __func__);
+ } else {
+ gpio_free(HDMI_DDC_CLK_GPIO);
+ gpio_free(HDMI_DDC_DATA_GPIO);
+ gpio_free(HDMI_HPD_GPIO);
+
+ if (machine_is_apq8064_liquid()) {
+ gpio_set_value_cansleep(pmic_gpio14, 1);
+ gpio_free(pmic_gpio14);
+ }
+
+ rc = regulator_disable(reg_ext_3p3v);
+ if (rc) {
+ pr_err("disable reg_ext_3p3v failed, rc=%d\n", rc);
+ return -ENODEV;
+ }
+ rc = regulator_disable(reg_8921_lvs7);
+ if (rc) {
+ pr_err("disable reg_8921_l23 failed, rc=%d\n", rc);
+ return -ENODEV;
+ }
+ rc = regulator_disable(reg_8921_s4);
+ if (rc) {
+ pr_err("disable reg_8921_s4 failed, rc=%d\n", rc);
+ return -ENODEV;
+ }
+ pr_debug("%s(off): success\n", __func__);
+ }
+
+ prev_on = on;
+
+ return 0;
+
+error4:
+ gpio_free(HDMI_HPD_GPIO);
+error3:
+ gpio_free(HDMI_DDC_DATA_GPIO);
+error2:
+ gpio_free(HDMI_DDC_CLK_GPIO);
+error1:
+ regulator_disable(reg_8921_lvs7);
+ regulator_disable(reg_8921_s4);
+ return rc;
+}
+
+static int hdmi_cec_power(int on)
+{
+ static int prev_on;
+ int rc;
+
+ if (on == prev_on)
+ return 0;
+
+ if (on) {
+ rc = gpio_request(HDMI_CEC_VAR_GPIO, "HDMI_CEC_VAR");
+ if (rc) {
+ pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
+ "HDMI_CEC_VAR", HDMI_CEC_VAR_GPIO, rc);
+ goto error;
+ }
+ pr_debug("%s(on): success\n", __func__);
+ } else {
+ gpio_free(HDMI_CEC_VAR_GPIO);
+ pr_debug("%s(off): success\n", __func__);
+ }
+
+ prev_on = on;
+
+ return 0;
+error:
+ return rc;
+}
+
void __init apq8064_init_fb(void)
{
platform_device_register(&msm_fb_device);
@@ -587,4 +908,6 @@
msm_fb_register_device("mdp", &mdp_pdata);
msm_fb_register_device("lvds", &lvds_pdata);
msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
+ platform_device_register(&hdmi_msm_device);
+ msm_fb_register_device("dtv", &dtv_pdata);
}
diff --git a/arch/arm/mach-msm/board-8064-gpiomux.c b/arch/arm/mach-msm/board-8064-gpiomux.c
index c08df19..bf82e40 100644
--- a/arch/arm/mach-msm/board-8064-gpiomux.c
+++ b/arch/arm/mach-msm/board-8064-gpiomux.c
@@ -82,22 +82,6 @@
.pull = GPIOMUX_PULL_NONE,
};
-static struct gpiomux_setting audio_auxpcm[] = {
- /* Suspended state */
- {
- .func = GPIOMUX_FUNC_GPIO,
- .drv = GPIOMUX_DRV_2MA,
- .pull = GPIOMUX_PULL_NONE,
- },
- /* Active state */
- {
- .func = GPIOMUX_FUNC_1,
- .drv = GPIOMUX_DRV_2MA,
- .pull = GPIOMUX_PULL_NONE,
- },
-};
-
-
static struct gpiomux_setting wcnss_5wire_suspend_cfg = {
.func = GPIOMUX_FUNC_GPIO,
.drv = GPIOMUX_DRV_2MA,
@@ -154,6 +138,24 @@
.pull = GPIOMUX_PULL_NONE,
};
+static struct gpiomux_setting hdmi_suspend_cfg = {
+ .func = GPIOMUX_FUNC_GPIO,
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_DOWN,
+};
+
+static struct gpiomux_setting hdmi_active_1_cfg = {
+ .func = GPIOMUX_FUNC_1,
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_UP,
+};
+
+static struct gpiomux_setting hdmi_active_2_cfg = {
+ .func = GPIOMUX_FUNC_1,
+ .drv = GPIOMUX_DRV_16MA,
+ .pull = GPIOMUX_PULL_DOWN,
+};
+
#ifdef CONFIG_USB_EHCI_MSM_HSIC
static struct gpiomux_setting hsic_act_cfg = {
.func = GPIOMUX_FUNC_1,
@@ -270,6 +272,37 @@
.pull = GPIOMUX_PULL_UP,
};
+static struct msm_gpiomux_config apq8064_hdmi_configs[] __initdata = {
+ {
+ .gpio = 69,
+ .settings = {
+ [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
+ [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
+ },
+ },
+ {
+ .gpio = 70,
+ .settings = {
+ [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
+ [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
+ },
+ },
+ {
+ .gpio = 71,
+ .settings = {
+ [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
+ [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
+ },
+ },
+ {
+ .gpio = 72,
+ .settings = {
+ [GPIOMUX_ACTIVE] = &hdmi_active_2_cfg,
+ [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
+ },
+ },
+};
+
static struct msm_gpiomux_config apq8064_gsbi_configs[] __initdata = {
{
.gpio = 8, /* GSBI3 I2C QUP SDA */
@@ -399,37 +432,6 @@
},
};
-static struct msm_gpiomux_config apq8064_audio_auxpcm_configs[] __initdata = {
- {
- .gpio = 43,
- .settings = {
- [GPIOMUX_SUSPENDED] = &audio_auxpcm[0],
- [GPIOMUX_ACTIVE] = &audio_auxpcm[1],
- },
- },
- {
- .gpio = 44,
- .settings = {
- [GPIOMUX_SUSPENDED] = &audio_auxpcm[0],
- [GPIOMUX_ACTIVE] = &audio_auxpcm[1],
- },
- },
- {
- .gpio = 45,
- .settings = {
- [GPIOMUX_SUSPENDED] = &audio_auxpcm[0],
- [GPIOMUX_ACTIVE] = &audio_auxpcm[1],
- },
- },
- {
- .gpio = 46,
- .settings = {
- [GPIOMUX_SUSPENDED] = &audio_auxpcm[0],
- [GPIOMUX_ACTIVE] = &audio_auxpcm[1],
- },
- },
-};
-
/* External 3.3 V regulator enable */
static struct msm_gpiomux_config apq8064_ext_regulator_configs[] __initdata = {
{
@@ -502,28 +504,6 @@
},
};
-static struct gpiomux_setting gpio_rotate_key_act_config = {
- .pull = GPIOMUX_PULL_UP,
- .drv = GPIOMUX_DRV_8MA,
- .func = GPIOMUX_FUNC_GPIO,
-};
-
-static struct gpiomux_setting gpio_rotate_key_sus_config = {
- .pull = GPIOMUX_PULL_NONE,
- .drv = GPIOMUX_DRV_2MA,
- .func = GPIOMUX_FUNC_GPIO,
-};
-
-struct msm_gpiomux_config apq8064_rotate_key_config[] = {
- {
- .gpio = 46,
- .settings = {
- [GPIOMUX_SUSPENDED] = &gpio_rotate_key_sus_config,
- [GPIOMUX_ACTIVE] = &gpio_rotate_key_act_config,
- }
- },
-};
-
static struct msm_gpiomux_config apq8064_mxt_configs[] __initdata = {
{ /* TS INTERRUPT */
.gpio = 6,
@@ -606,8 +586,9 @@
msm_gpiomux_install(apq8064_audio_codec_configs,
ARRAY_SIZE(apq8064_audio_codec_configs));
- msm_gpiomux_install(apq8064_audio_auxpcm_configs,
- ARRAY_SIZE(apq8064_audio_auxpcm_configs));
+ pr_debug("%s(): audio-auxpcm: Include GPIO configs"
+ " as audio is not the primary user"
+ " for these GPIO Pins\n", __func__);
msm_gpiomux_install(apq8064_ext_regulator_configs,
ARRAY_SIZE(apq8064_ext_regulator_configs));
@@ -621,15 +602,15 @@
ARRAY_SIZE(cyts_gpio_configs));
#ifdef CONFIG_USB_EHCI_MSM_HSIC
- msm_gpiomux_install(apq8064_hsic_configs,
- ARRAY_SIZE(apq8064_hsic_configs));
+ if (machine_is_apq8064_mtp())
+ msm_gpiomux_install(apq8064_hsic_configs,
+ ARRAY_SIZE(apq8064_hsic_configs));
#endif
if (machine_is_apq8064_cdp() || machine_is_apq8064_liquid())
msm_gpiomux_install(apq8064_mxt_configs,
ARRAY_SIZE(apq8064_mxt_configs));
- if (machine_is_apq8064_cdp() || machine_is_apq8064_liquid())
- msm_gpiomux_install(apq8064_rotate_key_config,
- ARRAY_SIZE(apq8064_rotate_key_config));
+ msm_gpiomux_install(apq8064_hdmi_configs,
+ ARRAY_SIZE(apq8064_hdmi_configs));
}
diff --git a/arch/arm/mach-msm/board-8064-gpu.c b/arch/arm/mach-msm/board-8064-gpu.c
index 0357c40..9fbb1c7 100644
--- a/arch/arm/mach-msm/board-8064-gpu.c
+++ b/arch/arm/mach-msm/board-8064-gpu.c
@@ -122,27 +122,51 @@
},
};
+static const char *kgsl_3d0_iommu0_ctx_names[] = {
+ "gfx3d_user",
+ /* priv_ctx goes here */
+};
+
+static const char *kgsl_3d0_iommu1_ctx_names[] = {
+ "gfx3d1_user",
+ /* priv_ctx goes here */
+};
+
+static struct kgsl_device_iommu_data kgsl_3d0_iommu_data[] = {
+ {
+ .iommu_ctx_names = kgsl_3d0_iommu0_ctx_names,
+ .iommu_ctx_count = ARRAY_SIZE(kgsl_3d0_iommu0_ctx_names),
+ .physstart = 0x07C00000,
+ .physend = 0x07C00000 + SZ_1M - 1,
+ },
+ {
+ .iommu_ctx_names = kgsl_3d0_iommu1_ctx_names,
+ .iommu_ctx_count = ARRAY_SIZE(kgsl_3d0_iommu1_ctx_names),
+ .physstart = 0x07D00000,
+ .physend = 0x07D00000 + SZ_1M - 1,
+ },
+};
+
static struct kgsl_device_platform_data kgsl_3d0_pdata = {
.pwrlevel = {
{
- .gpu_freq = 192000000,
- .bus_freq = 2,
- .io_fraction = 100,
+ .gpu_freq = 400000000,
+ .bus_freq = 3,
+ .io_fraction = 0,
},
{
- .gpu_freq = 192000000,
+ .gpu_freq = 320000000,
.bus_freq = 2,
- .io_fraction = 100,
+ .io_fraction = 33,
},
{
.gpu_freq = 1920000000,
- .bus_freq = 2,
+ .bus_freq = 1,
.io_fraction = 100,
},
{
- .gpu_freq = 192000000,
- .bus_freq = 2,
- .io_fraction = 100,
+ .gpu_freq = 27000000,
+ .bus_freq = 0,
},
},
.init_level = 0,
@@ -154,8 +178,8 @@
#ifdef CONFIG_MSM_BUS_SCALING
.bus_scale_table = &grp3d_bus_scale_pdata,
#endif
- .iommu_user_ctx_name = "gfx3d_user",
- .iommu_priv_ctx_name = NULL,
+ .iommu_data = kgsl_3d0_iommu_data,
+ .iommu_count = ARRAY_SIZE(kgsl_3d0_iommu_data),
};
struct platform_device device_kgsl_3d0 = {
diff --git a/arch/arm/mach-msm/board-8064-pmic.c b/arch/arm/mach-msm/board-8064-pmic.c
index 27952f4..99b0a8f 100644
--- a/arch/arm/mach-msm/board-8064-pmic.c
+++ b/arch/arm/mach-msm/board-8064-pmic.c
@@ -113,6 +113,7 @@
/* Initial PM8921 GPIO configurations */
static struct pm8xxx_gpio_init pm8921_gpios[] __initdata = {
+ PM8921_GPIO_OUTPUT(14, 1, HIGH), /* HDMI Mux Selector */
PM8921_GPIO_OUTPUT(23, 0, HIGH), /* touchscreen power FET */
PM8921_GPIO_OUTPUT_BUFCONF(25, 0, LOW, CMOS), /* DISP_RESET_N */
PM8921_GPIO_OUTPUT_FUNC(26, 0, PM_GPIO_FUNC_2), /* Bl: Off, PWM mode */
@@ -122,6 +123,8 @@
PM8921_GPIO_OUTPUT(20, 0, HIGH),
PM8921_GPIO_INPUT(35, PM_GPIO_PULL_UP_1P5),
PM8921_GPIO_INPUT(38, PM_GPIO_PULL_UP_1P5),
+ /* TABLA CODEC RESET */
+ PM8921_GPIO_OUTPUT(34, 1, MED),
};
static struct pm8xxx_gpio_init pm8921_mtp_kp_gpios[] __initdata = {
@@ -131,6 +134,7 @@
static struct pm8xxx_gpio_init pm8921_cdp_kp_gpios[] __initdata = {
PM8921_GPIO_INPUT(37, PM_GPIO_PULL_UP_1P5),
+ PM8921_GPIO_INPUT(42, PM_GPIO_PULL_UP_1P5),
};
/* Initial PM8XXX MPP configurations */
@@ -139,6 +143,8 @@
/* External 5V regulator enable; shared by HDMI and USB_OTG switches. */
PM8921_MPP_INIT(7, D_OUTPUT, PM8921_MPP_DIG_LEVEL_VPH, DOUT_CTRL_LOW),
PM8921_MPP_INIT(8, D_OUTPUT, PM8921_MPP_DIG_LEVEL_S4, DOUT_CTRL_LOW),
+ /*MPP9 is used to detect docking station connection/removal on Liquid*/
+ PM8921_MPP_INIT(9, D_INPUT, PM8921_MPP_DIG_LEVEL_S4, DIN_TO_INT),
};
void __init apq8064_pm8xxx_gpio_mpp_init(void)
@@ -308,8 +314,8 @@
static struct pm8xxx_irq_platform_data
apq8064_pm8921_irq_pdata __devinitdata = {
.irq_base = PM8921_IRQ_BASE,
- .devirq = PM8921_USR_IRQ_N,
- .irq_trigger_flag = IRQF_TRIGGER_HIGH,
+ .devirq = MSM_GPIO_TO_INT(74),
+ .irq_trigger_flag = IRQF_TRIGGER_LOW,
.dev_id = 0,
};
@@ -354,6 +360,7 @@
static struct pm8921_bms_platform_data
apq8064_pm8921_bms_pdata __devinitdata = {
+ .battery_type = BATT_UNKNOWN,
.r_sense = 10,
.i_test = 2500,
.v_failure = 3000,
@@ -426,5 +433,9 @@
if (machine_is_apq8064_rumi3()) {
apq8064_pm8921_irq_pdata.devirq = 0;
apq8064_pm8821_irq_pdata.devirq = 0;
+ } else if (machine_is_apq8064_mtp()) {
+ apq8064_pm8921_bms_pdata.battery_type = BATT_PALLADIUM;
+ } else if (machine_is_apq8064_liquid()) {
+ apq8064_pm8921_bms_pdata.battery_type = BATT_DESAY;
}
}
diff --git a/arch/arm/mach-msm/board-8064-regulator.c b/arch/arm/mach-msm/board-8064-regulator.c
index caee8ba..5181a42 100644
--- a/arch/arm/mach-msm/board-8064-regulator.c
+++ b/arch/arm/mach-msm/board-8064-regulator.c
@@ -27,8 +27,9 @@
};
VREG_CONSUMERS(L2) = {
REGULATOR_SUPPLY("8921_l2", NULL),
- REGULATOR_SUPPLY("mipi_csi_vdd", "4-001a"),
- REGULATOR_SUPPLY("mipi_csi_vdd", "4-006c"),
+ REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csid.0"),
+ REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csid.1"),
+ REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csid.2"),
REGULATOR_SUPPLY("lvds_pll_vdda", "lvds.0"),
REGULATOR_SUPPLY("dsi1_pll_vdda", "mipi_dsi.1"),
};
@@ -41,8 +42,6 @@
VREG_CONSUMERS(L4) = {
REGULATOR_SUPPLY("8921_l4", NULL),
REGULATOR_SUPPLY("HSUSB_1p8", "msm_otg"),
- REGULATOR_SUPPLY("HSUSB_1p8", "msm_ehci_host.0"),
- REGULATOR_SUPPLY("HSUSB_1p8", "msm_ehci_host.1"),
REGULATOR_SUPPLY("iris_vddxo", "wcnss_wlan.0"),
};
VREG_CONSUMERS(L5) = {
@@ -60,6 +59,7 @@
VREG_CONSUMERS(L8) = {
REGULATOR_SUPPLY("8921_l8", NULL),
REGULATOR_SUPPLY("cam_vana", "4-001a"),
+ REGULATOR_SUPPLY("cam_vana", "4-0048"),
REGULATOR_SUPPLY("cam_vana", "4-006c"),
};
VREG_CONSUMERS(L9) = {
@@ -76,6 +76,7 @@
};
VREG_CONSUMERS(L12) = {
REGULATOR_SUPPLY("cam_vdig", "4-001a"),
+ REGULATOR_SUPPLY("cam_vdig", "4-0048"),
REGULATOR_SUPPLY("cam_vdig", "4-006c"),
REGULATOR_SUPPLY("8921_l12", NULL),
};
@@ -88,6 +89,7 @@
VREG_CONSUMERS(L16) = {
REGULATOR_SUPPLY("8921_l16", NULL),
REGULATOR_SUPPLY("cam_vaf", "4-001a"),
+ REGULATOR_SUPPLY("cam_vaf", "4-0048"),
REGULATOR_SUPPLY("cam_vaf", "4-006c"),
};
VREG_CONSUMERS(L17) = {
@@ -103,7 +105,8 @@
REGULATOR_SUPPLY("8921_l23", NULL),
REGULATOR_SUPPLY("pll_vdd", "pil_qdsp6v4.1"),
REGULATOR_SUPPLY("pll_vdd", "pil_qdsp6v4.2"),
-
+ REGULATOR_SUPPLY("HSUSB_1p8", "msm_ehci_host.0"),
+ REGULATOR_SUPPLY("HSUSB_1p8", "msm_ehci_host.1"),
};
VREG_CONSUMERS(L24) = {
REGULATOR_SUPPLY("8921_l24", NULL),
@@ -158,6 +161,7 @@
REGULATOR_SUPPLY("vcc_i2c", "3-005b"),
REGULATOR_SUPPLY("vcc_i2c", "3-0024"),
REGULATOR_SUPPLY("vddp", "0-0048"),
+ REGULATOR_SUPPLY("hdmi_lvl_tsl", "hdmi_msm.0"),
};
VREG_CONSUMERS(S5) = {
REGULATOR_SUPPLY("8921_s5", NULL),
@@ -187,6 +191,7 @@
VREG_CONSUMERS(LVS5) = {
REGULATOR_SUPPLY("8921_lvs5", NULL),
REGULATOR_SUPPLY("cam_vio", "4-001a"),
+ REGULATOR_SUPPLY("cam_vio", "4-0048"),
REGULATOR_SUPPLY("cam_vio", "4-006c"),
};
VREG_CONSUMERS(LVS6) = {
@@ -197,6 +202,7 @@
REGULATOR_SUPPLY("pll_vdd", "pil_riva"),
REGULATOR_SUPPLY("lvds_vdda", "lvds.0"),
REGULATOR_SUPPLY("dsi1_vddio", "mipi_dsi.1"),
+ REGULATOR_SUPPLY("hdmi_vdda", "hdmi_msm.0"),
};
VREG_CONSUMERS(USB_OTG) = {
REGULATOR_SUPPLY("8921_usb_otg", NULL),
@@ -204,6 +210,7 @@
};
VREG_CONSUMERS(HDMI_MVS) = {
REGULATOR_SUPPLY("8921_hdmi_mvs", NULL),
+ REGULATOR_SUPPLY("hdmi_mvs", "hdmi_msm.0"),
};
VREG_CONSUMERS(NCP) = {
REGULATOR_SUPPLY("8921_ncp", NULL),
@@ -218,9 +225,11 @@
};
VREG_CONSUMERS(EXT_5V) = {
REGULATOR_SUPPLY("ext_5v", NULL),
+ REGULATOR_SUPPLY("vbus", "msm_ehci_host.0"),
};
VREG_CONSUMERS(EXT_MPP8) = {
REGULATOR_SUPPLY("ext_mpp8", NULL),
+ REGULATOR_SUPPLY("vbus", "msm_ehci_host.1"),
};
VREG_CONSUMERS(EXT_3P3V) = {
REGULATOR_SUPPLY("ext_3p3v", NULL),
@@ -228,6 +237,7 @@
REGULATOR_SUPPLY("mhl_ext_3p3v", "msm_otg"),
REGULATOR_SUPPLY("lvds_vccs_3p3v", "lvds.0"),
REGULATOR_SUPPLY("dsi1_vccs_3p3v", "mipi_dsi.1"),
+ REGULATOR_SUPPLY("hdmi_mux_vdd", "hdmi_msm.0"),
};
VREG_CONSUMERS(EXT_TS_SW) = {
REGULATOR_SUPPLY("ext_ts_sw", NULL),
@@ -464,15 +474,15 @@
/* SAW regulator constraints */
struct regulator_init_data msm8064_saw_regulator_pdata_8921_s5 =
/* ID vreg_name min_uV max_uV */
- SAW_VREG_INIT(S5, "8921_s5", 950000, 1150000);
+ SAW_VREG_INIT(S5, "8921_s5", 950000, 1300000);
struct regulator_init_data msm8064_saw_regulator_pdata_8921_s6 =
- SAW_VREG_INIT(S6, "8921_s6", 950000, 1150000);
+ SAW_VREG_INIT(S6, "8921_s6", 950000, 1300000);
struct regulator_init_data msm8064_saw_regulator_pdata_8821_s0 =
/* ID vreg_name min_uV max_uV */
- SAW_VREG_INIT(8821_S0, "8821_s0", 950000, 1150000);
+ SAW_VREG_INIT(8821_S0, "8821_s0", 950000, 1300000);
struct regulator_init_data msm8064_saw_regulator_pdata_8821_s1 =
- SAW_VREG_INIT(8821_S1, "8821_s1", 950000, 1150000);
+ SAW_VREG_INIT(8821_S1, "8821_s1", 950000, 1300000);
/* PM8921 regulator constraints */
struct pm8xxx_regulator_platform_data
@@ -507,7 +517,7 @@
RPM_LDO(L6, 0, 1, 0, 2950000, 2950000, NULL, 0, 0),
RPM_LDO(L7, 0, 1, 0, 1850000, 2950000, NULL, 0, 0),
RPM_LDO(L8, 0, 1, 0, 2800000, 2800000, NULL, 0, 0),
- RPM_LDO(L9, 0, 1, 0, 2850000, 2850000, NULL, 0, 0),
+ RPM_LDO(L9, 0, 1, 0, 3000000, 3000000, NULL, 0, 0),
RPM_LDO(L10, 0, 1, 0, 2900000, 2900000, NULL, 0, 0),
RPM_LDO(L11, 0, 1, 0, 3000000, 3000000, NULL, 0, 0),
RPM_LDO(L12, 0, 1, 0, 1200000, 1200000, "8921_s4", 0, 0),
diff --git a/arch/arm/mach-msm/board-8064-storage.c b/arch/arm/mach-msm/board-8064-storage.c
index 9069039..cdafdfc 100644
--- a/arch/arm/mach-msm/board-8064-storage.c
+++ b/arch/arm/mach-msm/board-8064-storage.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -51,7 +51,7 @@
.name = "sdc_vdd",
.high_vol_level = 2950000,
.low_vol_level = 2950000,
- .hpm_uA = 600000, /* 600mA */
+ .hpm_uA = 800000, /* 800mA */
}
};
@@ -210,6 +210,8 @@
#endif
.sup_clk_table = sdc1_sup_clk_rates,
.sup_clk_cnt = ARRAY_SIZE(sdc1_sup_clk_rates),
+ .pclk_src_dfab = 1,
+ .nonremovable = 1,
.pin_data = &mmc_slot_pin_data[SDCC1],
.vreg_data = &mmc_slot_vreg_data[SDCC1],
};
@@ -228,6 +230,7 @@
.mmc_bus_width = MMC_CAP_4_BIT_DATA,
.sup_clk_table = sdc3_sup_clk_rates,
.sup_clk_cnt = ARRAY_SIZE(sdc3_sup_clk_rates),
+ .pclk_src_dfab = 1,
.pin_data = &mmc_slot_pin_data[SDCC3],
.vreg_data = &mmc_slot_vreg_data[SDCC3],
.status_gpio = 26,
@@ -260,6 +263,14 @@
apq8064_sdc3_pdata->disable_cmd23 = true;
}
}
- apq8064_add_sdcc(1, apq8064_sdc1_pdata);
- apq8064_add_sdcc(3, apq8064_sdc3_pdata);
+ if (apq8064_sdc1_pdata) {
+ apq8064_sdc1_pdata->swfi_latency =
+ apq8064_rpm_get_swfi_latency();
+ apq8064_add_sdcc(1, apq8064_sdc1_pdata);
+ }
+ if (apq8064_sdc3_pdata) {
+ apq8064_sdc3_pdata->swfi_latency =
+ apq8064_rpm_get_swfi_latency();
+ apq8064_add_sdcc(3, apq8064_sdc3_pdata);
+ }
}
diff --git a/arch/arm/mach-msm/board-8064.c b/arch/arm/mach-msm/board-8064.c
index cc3b3cc..57bf7ac 100644
--- a/arch/arm/mach-msm/board-8064.c
+++ b/arch/arm/mach-msm/board-8064.c
@@ -16,8 +16,8 @@
#include <linux/irq.h>
#include <linux/i2c.h>
#include <linux/slimbus/slimbus.h>
-#include <linux/mfd/wcd9310/core.h>
-#include <linux/mfd/wcd9310/pdata.h>
+#include <linux/mfd/wcd9xxx/core.h>
+#include <linux/mfd/wcd9xxx/pdata.h>
#include <linux/mfd/pm8xxx/misc.h>
#include <linux/msm_ssbi.h>
#include <linux/spi/spi.h>
@@ -54,10 +54,12 @@
#include <linux/bootmem.h>
#include <asm/setup.h>
#include <mach/dma.h>
+#include <mach/msm_dsps.h>
#include <mach/msm_bus_board.h>
#include <mach/cpuidle.h>
#include <mach/mdm2.h>
#include <linux/msm_tsens.h>
+#include <mach/msm_xo.h>
#include "msm_watchdog.h"
#include "board-8064.h"
@@ -74,7 +76,7 @@
#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
#define MSM_PMEM_SIZE 0x4000000 /* 64 Mbytes */
#else
-#define MSM_PMEM_SIZE 0x2800000 /* 40 Mbytes */
+#define MSM_PMEM_SIZE 0x4000000 /* 64 Mbytes */
#endif
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
@@ -467,14 +469,78 @@
},
};
+/* Bandwidth requests (zero) if no vote placed */
+static struct msm_bus_vectors usb_init_vectors[] = {
+ {
+ .src = MSM_BUS_MASTER_SPS,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 0,
+ .ib = 0,
+ },
+};
+
+/* Bus bandwidth requests in Bytes/sec */
+static struct msm_bus_vectors usb_max_vectors[] = {
+ {
+ .src = MSM_BUS_MASTER_SPS,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 60000000, /* At least 480Mbps on bus. */
+ .ib = 960000000, /* MAX bursts rate */
+ },
+};
+
+static struct msm_bus_paths usb_bus_scale_usecases[] = {
+ {
+ ARRAY_SIZE(usb_init_vectors),
+ usb_init_vectors,
+ },
+ {
+ ARRAY_SIZE(usb_max_vectors),
+ usb_max_vectors,
+ },
+};
+
+static struct msm_bus_scale_pdata usb_bus_scale_pdata = {
+ usb_bus_scale_usecases,
+ ARRAY_SIZE(usb_bus_scale_usecases),
+ .name = "usb",
+};
+
static struct msm_otg_platform_data msm_otg_pdata = {
.mode = USB_OTG,
.otg_control = OTG_PMIC_CONTROL,
.phy_type = SNPS_28NM_INTEGRATED_PHY,
.pmic_id_irq = PM8921_USB_ID_IN_IRQ(PM8921_IRQ_BASE),
.power_budget = 750,
+ .bus_scale_table = &usb_bus_scale_pdata,
};
+static struct msm_usb_host_platform_data msm_ehci_host_pdata3 = {
+ .power_budget = 500,
+};
+
+#ifdef CONFIG_USB_EHCI_MSM_HOST4
+static struct msm_usb_host_platform_data msm_ehci_host_pdata4;
+#endif
+
+static void __init apq8064_ehci_host_init(void)
+{
+ if (machine_is_apq8064_liquid()) {
+ msm_ehci_host_pdata3.dock_connect_irq =
+ PM8921_MPP_IRQ(PM8921_IRQ_BASE, 9);
+
+ apq8064_device_ehci_host3.dev.platform_data =
+ &msm_ehci_host_pdata3;
+ platform_device_register(&apq8064_device_ehci_host3);
+
+#ifdef CONFIG_USB_EHCI_MSM_HOST4
+ apq8064_device_ehci_host4.dev.platform_data =
+ &msm_ehci_host_pdata4;
+ platform_device_register(&apq8064_device_ehci_host4);
+#endif
+ }
+}
+
#define TABLA_INTERRUPT_BASE (NR_MSM_IRQS + NR_GPIO_IRQS + NR_PM8921_IRQS)
/* Micbias setting is based on 8660 CDP/MTP/FLUID requirement
@@ -486,14 +552,14 @@
* does not need to be as high as 2.85V. It is choosen for
* microphone sensitivity purpose.
*/
-static struct tabla_pdata apq8064_tabla_platform_data = {
+static struct wcd9xxx_pdata apq8064_tabla_platform_data = {
.slimbus_slave_device = {
.name = "tabla-slave",
.e_addr = {0, 0, 0x10, 0, 0x17, 2},
},
.irq = MSM_GPIO_TO_INT(42),
.irq_base = TABLA_INTERRUPT_BASE,
- .num_irqs = NR_TABLA_IRQS,
+ .num_irqs = NR_WCD9XXX_IRQS,
.reset_gpio = PM8921_GPIO_PM_TO_SYS(34),
.micbias = {
.ldoh_v = TABLA_LDOH_2P85_V,
@@ -504,7 +570,45 @@
.bias2_cfilt_sel = TABLA_CFILT2_SEL,
.bias3_cfilt_sel = TABLA_CFILT3_SEL,
.bias4_cfilt_sel = TABLA_CFILT3_SEL,
- }
+ },
+ .regulator = {
+ {
+ .name = "CDC_VDD_CP",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .optimum_uA = WCD9XXX_CDC_VDDA_CP_CUR_MAX,
+ },
+ {
+ .name = "CDC_VDDA_RX",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .optimum_uA = WCD9XXX_CDC_VDDA_RX_CUR_MAX,
+ },
+ {
+ .name = "CDC_VDDA_TX",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .optimum_uA = WCD9XXX_CDC_VDDA_TX_CUR_MAX,
+ },
+ {
+ .name = "VDDIO_CDC",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .optimum_uA = WCD9XXX_VDDIO_CDC_CUR_MAX,
+ },
+ {
+ .name = "VDDD_CDC_D",
+ .min_uV = 1225000,
+ .max_uV = 1225000,
+ .optimum_uA = WCD9XXX_VDDD_CDC_D_CUR_MAX,
+ },
+ {
+ .name = "CDC_VDDA_A_1P2V",
+ .min_uV = 1225000,
+ .max_uV = 1225000,
+ .optimum_uA = WCD9XXX_VDDD_CDC_A_CUR_MAX,
+ },
+ },
};
static struct slim_device apq8064_slim_tabla = {
@@ -515,14 +619,14 @@
},
};
-static struct tabla_pdata apq8064_tabla20_platform_data = {
+static struct wcd9xxx_pdata apq8064_tabla20_platform_data = {
.slimbus_slave_device = {
.name = "tabla-slave",
.e_addr = {0, 0, 0x60, 0, 0x17, 2},
},
.irq = MSM_GPIO_TO_INT(42),
.irq_base = TABLA_INTERRUPT_BASE,
- .num_irqs = NR_TABLA_IRQS,
+ .num_irqs = NR_WCD9XXX_IRQS,
.reset_gpio = PM8921_GPIO_PM_TO_SYS(34),
.micbias = {
.ldoh_v = TABLA_LDOH_2P85_V,
@@ -533,7 +637,45 @@
.bias2_cfilt_sel = TABLA_CFILT2_SEL,
.bias3_cfilt_sel = TABLA_CFILT3_SEL,
.bias4_cfilt_sel = TABLA_CFILT3_SEL,
- }
+ },
+ .regulator = {
+ {
+ .name = "CDC_VDD_CP",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .optimum_uA = WCD9XXX_CDC_VDDA_CP_CUR_MAX,
+ },
+ {
+ .name = "CDC_VDDA_RX",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .optimum_uA = WCD9XXX_CDC_VDDA_RX_CUR_MAX,
+ },
+ {
+ .name = "CDC_VDDA_TX",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .optimum_uA = WCD9XXX_CDC_VDDA_TX_CUR_MAX,
+ },
+ {
+ .name = "VDDIO_CDC",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .optimum_uA = WCD9XXX_VDDIO_CDC_CUR_MAX,
+ },
+ {
+ .name = "VDDD_CDC_D",
+ .min_uV = 1225000,
+ .max_uV = 1225000,
+ .optimum_uA = WCD9XXX_VDDD_CDC_D_CUR_MAX,
+ },
+ {
+ .name = "CDC_VDDA_A_1P2V",
+ .min_uV = 1225000,
+ .max_uV = 1225000,
+ .optimum_uA = WCD9XXX_VDDD_CDC_A_CUR_MAX,
+ },
+ },
};
static struct slim_device apq8064_slim_tabla20 = {
@@ -629,7 +771,7 @@
/* T6 Object */
0, 0, 0, 0, 0, 0,
/* T38 Object */
- 14, 0, 0, 24, 1, 12, 0, 0, 0, 0,
+ 14, 1, 0, 22, 2, 12, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -637,14 +779,14 @@
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0,
/* T7 Object */
- 100, 16, 50,
+ 100, 10, 50,
/* T8 Object */
- 25, 0, 20, 20, 0, 0, 20, 50, 0, 0,
+ 25, 0, 20, 20, 0, 0, 0, 0, 0, 0,
/* T9 Object */
131, 0, 0, 26, 42, 0, 32, 80, 2, 5,
0, 5, 5, 0, 10, 30, 10, 10, 255, 2,
- 85, 5, 10, 10, 10, 10, 135, 55, 70, 40,
- 10, 5, 0, 0, 0,
+ 85, 5, 0, 5, 9, 5, 12, 35, 70, 40,
+ 20, 5, 0, 0, 0,
/* T18 Object */
0, 0,
/* T24 Object */
@@ -662,14 +804,14 @@
0, 0, 0, 0, 0, 0, 0, 64, 0, 8,
16,
/* T46 Object */
- 64, 0, 20, 20, 0, 0, 0, 0, 0,
+ 68, 0, 16, 16, 0, 0, 0, 0, 0,
/* T47 Object */
0, 0, 0, 0, 0, 0, 3, 64, 66, 0,
/* T48 Object */
31, 64, 64, 0, 0, 0, 0, 0, 0, 0,
- 48, 40, 0, 10, 10, 0, 0, 100, 10, 80,
- 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
- 52, 0, 12, 0, 17, 0, 1, 0, 0, 0,
+ 32, 40, 0, 10, 10, 0, 0, 100, 10, 90,
+ 0, 0, 0, 0, 0, 0, 0, 10, 1, 10,
+ 52, 10, 12, 0, 33, 0, 1, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0,
/* T56 Object */
@@ -677,8 +819,8 @@
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 2, 99, 33, 0, 149, 24, 193, 255, 255, 255,
- 255,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0,
};
#define MXT_TS_GPIO_IRQ 6
@@ -1049,64 +1191,83 @@
},
};
-static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
+static struct msm_rpmrs_level msm_rpmrs_levels[] = {
{
MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
true,
- 100, 8000, 100000, 1,
+ 100, 650, 801, 200,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
true,
- 2000, 6000, 60100000, 3000,
+ 2000, 200, 576000, 2000,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(ON, GDHS, MAX, ACTIVE),
false,
- 4200, 5000, 60350000, 3500,
+ 8500, 51, 1122000, 8500,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
false,
- 6300, 4500, 65350000, 4800,
+ 9000, 51, 1130300, 9000,
+ },
+ {
+ MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
+ MSM_RPMRS_LIMITS(ON, HSFS_OPEN, ACTIVE, RET_HIGH),
+ false,
+ 10000, 51, 1130300, 10000,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, GDHS, MAX, ACTIVE),
false,
- 11700, 2500, 67850000, 5500,
+ 12000, 14, 2205900, 12000,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
false,
- 13800, 2000, 71850000, 6800,
+ 18000, 12, 2364250, 18000,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
false,
- 29700, 500, 75850000, 8800,
+ 23500, 10, 2667000, 23500,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
false,
- 29700, 0, 76350000, 9800,
+ 29700, 5, 2867000, 30000,
},
};
+uint32_t apq8064_rpm_get_swfi_latency(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(msm_rpmrs_levels); i++) {
+ if (msm_rpmrs_levels[i].sleep_mode ==
+ MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)
+ return msm_rpmrs_levels[i].latency_us;
+ }
+
+ return 0;
+}
+
static struct msm_pm_boot_platform_data msm_pm_boot_pdata __initdata = {
.mode = MSM_PM_BOOT_CONFIG_TZ,
};
@@ -1330,7 +1491,7 @@
[0] = {
.reg_base_addr = MSM_SAW_L2_BASE,
.reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x00,
- .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020204,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x00A000AE,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x00A00020,
.modes = msm_spm_l2_seq_list,
@@ -1347,7 +1508,7 @@
.reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
#endif
.reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
- .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020204,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
.vctl_timeout_us = 50,
@@ -1362,7 +1523,7 @@
.reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
#endif
.reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
- .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020204,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
.vctl_timeout_us = 50,
@@ -1377,7 +1538,7 @@
.reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
#endif
.reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
- .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020204,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
.vctl_timeout_us = 50,
@@ -1392,7 +1553,7 @@
.reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
#endif
.reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
- .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020204,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
.vctl_timeout_us = 50,
@@ -1477,7 +1638,6 @@
&apq8064_device_otg,
&apq8064_device_gadget_peripheral,
&apq8064_device_hsusb_host,
- &apq8064_device_hsic_host,
&android_usb_device,
&msm_device_wcnss_wlan,
#ifdef CONFIG_ANDROID_PMEM
@@ -1562,6 +1722,9 @@
&apq8064_device_uart_gsbi1,
&apq8064_device_uart_gsbi7,
&msm_device_sps_apq8064,
+#ifdef CONFIG_MSM_ROTATOR
+ &msm_rotator_device,
+#endif
};
static struct msm_spi_platform_data apq8064_qup_spi_gsbi5_pdata = {
@@ -1654,7 +1817,7 @@
#define GPIO_KEY_VOLUME_DOWN PM8921_GPIO_PM_TO_SYS(38)
#define GPIO_KEY_CAM_FOCUS PM8921_GPIO_PM_TO_SYS(3)
#define GPIO_KEY_CAM_SNAP PM8921_GPIO_PM_TO_SYS(4)
-#define GPIO_KEY_ROTATION 46
+#define GPIO_KEY_ROTATION PM8921_GPIO_PM_TO_SYS(42)
static struct gpio_keys_button cdp_keys[] = {
{
@@ -1758,6 +1921,18 @@
},
};
+/* Sensors DSPS platform data */
+#define DSPS_PIL_GENERIC_NAME "dsps"
+static void __init apq8064_init_dsps(void)
+{
+ struct msm_dsps_platform_data *pdata =
+ msm_dsps_device_8064.dev.platform_data;
+ pdata->pil_name = DSPS_PIL_GENERIC_NAME;
+ pdata->gpios = NULL;
+ pdata->gpios_num = 0;
+
+ platform_device_register(&msm_dsps_device_8064);
+}
static void __init apq8064_clock_init(void)
{
@@ -1851,6 +2026,8 @@
BUG_ON(msm_rpmrs_levels_init(&msm_rpmrs_data));
regulator_suppress_info_printing();
platform_device_register(&apq8064_device_rpm_regulator);
+ if (msm_xo_init())
+ pr_err("Failed to initialize XO votes\n");
apq8064_clock_init();
apq8064_init_gpiomux();
apq8064_i2c_init();
@@ -1862,9 +2039,13 @@
if (machine_is_apq8064_liquid())
msm_otg_pdata.mhl_enable = true;
apq8064_device_otg.dev.platform_data = &msm_otg_pdata;
- apq8064_device_hsic_host.dev.platform_data = &msm_hsic_pdata;
+ apq8064_ehci_host_init();
apq8064_init_buses();
platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
+ if (machine_is_apq8064_mtp()) {
+ apq8064_device_hsic_host.dev.platform_data = &msm_hsic_pdata;
+ device_initialize(&apq8064_device_hsic_host.dev);
+ }
apq8064_pm8xxx_gpio_mpp_init();
apq8064_init_mmc();
@@ -1875,6 +2056,7 @@
platform_device_register(&apq8064_slim_ctrl);
slim_register_board_info(apq8064_slim_devices,
ARRAY_SIZE(apq8064_slim_devices));
+ apq8064_init_dsps();
msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
acpuclk_init(&acpuclk_8064_soc_data);
msm_spm_l2_init(msm_spm_l2_data);
@@ -1921,8 +2103,7 @@
spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
apq8064_init_fb();
apq8064_init_gpu();
- platform_add_devices(msm_footswitch_devices,
- msm_num_footswitch_devices);
+ platform_add_devices(apq8064_fs_devices, apq8064_num_fs_devices);
apq8064_init_cam();
if (machine_is_apq8064_cdp() || machine_is_apq8064_liquid())
diff --git a/arch/arm/mach-msm/board-8064.h b/arch/arm/mach-msm/board-8064.h
index e8c8144..c19a039 100644
--- a/arch/arm/mach-msm/board-8064.h
+++ b/arch/arm/mach-msm/board-8064.h
@@ -72,6 +72,7 @@
void apq8064_init_fb(void);
void apq8064_allocate_fb_region(void);
void apq8064_mdp_writeback(struct memtype_reserve *reserve_table);
+uint32_t apq8064_rpm_get_swfi_latency(void);
void apq8064_init_gpu(void);
void apq8064_pm8xxx_gpio_mpp_init(void);
diff --git a/arch/arm/mach-msm/board-8930-camera.c b/arch/arm/mach-msm/board-8930-camera.c
index 47a381a..1d743d8 100644
--- a/arch/arm/mach-msm/board-8930-camera.c
+++ b/arch/arm/mach-msm/board-8930-camera.c
@@ -349,7 +349,6 @@
};
static struct camera_vreg_t msm_8930_back_cam_vreg[] = {
- {"mipi_csi_vdd", REG_LDO, 1200000, 1200000, 20000},
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
{"cam_vio", REG_LDO, 1800000, 1800000, 16000},
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
@@ -357,7 +356,6 @@
};
static struct camera_vreg_t msm_8930_front_cam_vreg[] = {
- {"mipi_csi_vdd", REG_LDO, 1200000, 1200000, 20000},
{"cam_vio", REG_LDO, 1800000, 1800000, 16000},
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
@@ -446,7 +444,6 @@
};
static struct camera_vreg_t msm_8930_mt9m114_vreg[] = {
- {"mipi_csi_vdd", REG_LDO, 1200000, 1200000, 20000},
{"cam_vio", REG_LDO, 1800000, 1800000, 16000},
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
@@ -461,16 +458,16 @@
.mount_angle = 90,
.cam_vreg = msm_8930_mt9m114_vreg,
.num_vreg = ARRAY_SIZE(msm_8930_mt9m114_vreg),
- .gpio_conf = &msm_8930_back_cam_gpio_conf,
+ .gpio_conf = &msm_8930_front_cam_gpio_conf,
};
static struct msm_camera_sensor_info msm_camera_sensor_mt9m114_data = {
.sensor_name = "mt9m114",
- .pdata = &msm_camera_csi_device_data[0],
+ .pdata = &msm_camera_csi_device_data[1],
.flash_data = &flash_mt9m114,
.sensor_platform_info = &sensor_board_info_mt9m114,
.csi_if = 1,
- .camera_type = BACK_CAMERA_2D,
+ .camera_type = FRONT_CAMERA_2D,
};
static struct msm_camera_sensor_flash_data flash_ov2720 = {
@@ -494,7 +491,6 @@
};
static struct camera_vreg_t msm_8930_s5k3l1yx_vreg[] = {
- {"mipi_csi_vdd", REG_LDO, 1200000, 1200000, 20000},
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
{"cam_vio", REG_LDO, 1800000, 1800000, 16000},
diff --git a/arch/arm/mach-msm/board-8930-display.c b/arch/arm/mach-msm/board-8930-display.c
index e6b342f..2f18897 100644
--- a/arch/arm/mach-msm/board-8930-display.c
+++ b/arch/arm/mach-msm/board-8930-display.c
@@ -68,7 +68,6 @@
#define MDP_VSYNC_GPIO 0
-#define PANEL_NAME_MAX_LEN 30
#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
#define MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME "mipi_video_toshiba_wsvga"
@@ -623,9 +622,15 @@
if (on == prev_on)
return 0;
- if (!reg_ext_5v)
- reg_ext_5v = regulator_get(&hdmi_msm_device.dev,
- "hdmi_mvs");
+ if (!reg_ext_5v) {
+ reg_ext_5v = regulator_get(&hdmi_msm_device.dev, "hdmi_mvs");
+ if (IS_ERR(reg_ext_5v)) {
+ pr_err("'%s' regulator not found, rc=%ld\n",
+ "hdmi_mvs", IS_ERR(reg_ext_5v));
+ reg_ext_5v = NULL;
+ return -ENODEV;
+ }
+ }
if (on) {
rc = regulator_enable(reg_ext_5v);
@@ -775,8 +780,7 @@
platform_device_register(&mipi_dsi_novatek_panel_device);
#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
- if (!cpu_is_msm8930())
- platform_device_register(&hdmi_msm_device);
+ platform_device_register(&hdmi_msm_device);
#endif
platform_device_register(&mipi_dsi_toshiba_panel_device);
diff --git a/arch/arm/mach-msm/board-8930-gpiomux.c b/arch/arm/mach-msm/board-8930-gpiomux.c
index 84dbea8..9099266 100644
--- a/arch/arm/mach-msm/board-8930-gpiomux.c
+++ b/arch/arm/mach-msm/board-8930-gpiomux.c
@@ -31,18 +31,6 @@
.pull = GPIOMUX_PULL_DOWN,
};
-static struct gpiomux_setting spi_active_config2 = {
- .func = GPIOMUX_FUNC_2,
- .drv = GPIOMUX_DRV_8MA,
- .pull = GPIOMUX_PULL_NONE,
-};
-
-static struct gpiomux_setting spi_suspended_config2 = {
- .func = GPIOMUX_FUNC_GPIO,
- .drv = GPIOMUX_DRV_2MA,
- .pull = GPIOMUX_PULL_UP,
-};
-
static struct gpiomux_setting gsbi3_suspended_cfg = {
.func = GPIOMUX_FUNC_1,
.drv = GPIOMUX_DRV_2MA,
@@ -313,13 +301,6 @@
},
},
{
- .gpio = 14, /* GSBI1 SPI_CS_1 */
- .settings = {
- [GPIOMUX_SUSPENDED] = &spi_suspended_config2,
- [GPIOMUX_ACTIVE] = &spi_active_config2,
- },
- },
- {
.gpio = 16, /* GSBI3 I2C QUP SDA */
.settings = {
[GPIOMUX_SUSPENDED] = &gsbi3_suspended_cfg,
@@ -346,18 +327,6 @@
},
},
{
- .gpio = 24, /* GSBI5 UART2 */
- .settings = {
- [GPIOMUX_SUSPENDED] = &gsbi5,
- },
- },
- {
- .gpio = 25, /* GSBI5 UART2 */
- .settings = {
- [GPIOMUX_SUSPENDED] = &gsbi5,
- },
- },
- {
.gpio = 44, /* GSBI12 I2C QUP SDA */
.settings = {
[GPIOMUX_SUSPENDED] = &gsbi12,
diff --git a/arch/arm/mach-msm/board-8930-pmic.c b/arch/arm/mach-msm/board-8930-pmic.c
index 3f9f976..e19cde0 100644
--- a/arch/arm/mach-msm/board-8930-pmic.c
+++ b/arch/arm/mach-msm/board-8930-pmic.c
@@ -273,6 +273,7 @@
};
static struct pm8921_bms_platform_data pm8921_bms_pdata __devinitdata = {
+ .battery_type = BATT_UNKNOWN,
.r_sense = 10,
.i_test = 2500,
.v_failure = 3000,
@@ -310,4 +311,8 @@
&msm8930_ssbi_pm8038_pdata;
pm8038_platform_data.num_regulators
= msm8930_pm8038_regulator_pdata_len;
+ if (machine_is_apq8064_mtp())
+ pm8921_bms_pdata.battery_type = BATT_PALLADIUM;
+ else if (machine_is_apq8064_liquid())
+ pm8921_bms_pdata.battery_type = BATT_DESAY;
}
diff --git a/arch/arm/mach-msm/board-8930-regulator.c b/arch/arm/mach-msm/board-8930-regulator.c
index 2f9fdcd..db1fb46 100644
--- a/arch/arm/mach-msm/board-8930-regulator.c
+++ b/arch/arm/mach-msm/board-8930-regulator.c
@@ -30,10 +30,9 @@
REGULATOR_SUPPLY("8038_l2", NULL),
REGULATOR_SUPPLY("iris_vdddig", "wcnss_wlan.0"),
REGULATOR_SUPPLY("dsi_vdda", "mipi_dsi.1"),
- REGULATOR_SUPPLY("mipi_csi_vdd", "4-001a"),
- REGULATOR_SUPPLY("mipi_csi_vdd", "4-006c"),
- REGULATOR_SUPPLY("mipi_csi_vdd", "4-0048"),
- REGULATOR_SUPPLY("mipi_csi_vdd", "4-0020"),
+ REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csid.0"),
+ REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csid.1"),
+ REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csid.2"),
};
VREG_CONSUMERS(L3) = {
REGULATOR_SUPPLY("8038_l3", NULL),
@@ -438,7 +437,7 @@
static struct rpm_regulator_init_data
msm8930_rpm_regulator_init_data[] __devinitdata = {
/* ID a_on pd ss min_uV max_uV supply sys_uA freq */
- RPM_SMPS(S1, 1, 1, 1, 500000, 1150000, NULL, 100000, 4p80),
+ RPM_SMPS(S1, 0, 1, 1, 500000, 1150000, NULL, 100000, 4p80),
RPM_SMPS(S2, 1, 1, 0, 1400000, 1400000, NULL, 100000, 1p60),
RPM_SMPS(S3, 0, 1, 0, 1150000, 1150000, NULL, 100000, 3p20),
RPM_SMPS(S4, 1, 1, 0, 2200000, 2200000, NULL, 100000, 1p60),
@@ -464,7 +463,7 @@
RPM_LDO(L21, 0, 1, 0, 1900000, 1900000, "8038_s4", 0, 0),
RPM_LDO(L22, 1, 1, 0, 1850000, 2950000, NULL, 10000, 10000),
RPM_LDO(L23, 1, 1, 1, 1800000, 1800000, "8038_s4", 0, 0),
- RPM_LDO(L24, 1, 1, 1, 500000, 1150000, "8038_s2", 10000, 10000),
+ RPM_LDO(L24, 0, 1, 1, 500000, 1150000, "8038_s2", 10000, 10000),
RPM_LDO(L26, 1, 1, 0, 1050000, 1050000, "8038_s2", 10000, 10000),
/* ID a_on pd ss supply */
diff --git a/arch/arm/mach-msm/board-8930-storage.c b/arch/arm/mach-msm/board-8930-storage.c
index dee1e98..26211bf 100644
--- a/arch/arm/mach-msm/board-8930-storage.c
+++ b/arch/arm/mach-msm/board-8930-storage.c
@@ -52,7 +52,7 @@
.name = "sdc_vdd",
.high_vol_level = 2950000,
.low_vol_level = 2950000,
- .hpm_uA = 600000, /* 600mA */
+ .hpm_uA = 800000, /* 800mA */
}
};
@@ -122,8 +122,8 @@
static struct msm_mmc_pad_pull sdc1_pad_pull_off_cfg[] = {
{TLMM_PULL_SDC1_CLK, GPIO_CFG_NO_PULL},
- {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_DOWN},
- {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_DOWN}
+ {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_UP},
+ {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_UP}
};
/* SDC3 pad data */
@@ -208,11 +208,11 @@
};
static unsigned int sdc1_sup_clk_rates[] = {
- 400000, 24000000, 48000000
+ 400000, 24000000, 48000000,
};
static unsigned int sdc3_sup_clk_rates[] = {
- 400000, 24000000, 48000000, 96000000
+ 400000, 24000000, 48000000, 96000000, 192000000,
};
#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
@@ -264,7 +264,7 @@
.xpc_cap = 1,
.uhs_caps = (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 |
MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_DDR50 |
- MMC_CAP_MAX_CURRENT_600),
+ MMC_CAP_UHS_SDR104 | MMC_CAP_MAX_CURRENT_800),
};
#endif
diff --git a/arch/arm/mach-msm/board-8930.c b/arch/arm/mach-msm/board-8930.c
index a094ba5..dbd6329 100644
--- a/arch/arm/mach-msm/board-8930.c
+++ b/arch/arm/mach-msm/board-8930.c
@@ -42,6 +42,10 @@
#include <linux/gpio_keys.h>
#include <linux/memory.h>
+#include <linux/slimbus/slimbus.h>
+#include <linux/mfd/wcd9xxx/core.h>
+#include <linux/mfd/wcd9xxx/pdata.h>
+
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/setup.h>
@@ -68,12 +72,6 @@
#include <mach/msm_xo.h>
#include <mach/restart.h>
-#ifdef CONFIG_WCD9310_CODEC
-#include <linux/slimbus/slimbus.h>
-#include <linux/mfd/wcd9310/core.h>
-#include <linux/mfd/wcd9310/pdata.h>
-#endif
-
#include <linux/ion.h>
#include <mach/ion.h>
#include <mach/mdm2.h>
@@ -518,9 +516,9 @@
msm8930_allocate_fb_region();
}
-#ifdef CONFIG_WCD9310_CODEC
+#ifdef CONFIG_WCD9304_CODEC
-#define TABLA_INTERRUPT_BASE (NR_MSM_IRQS + NR_GPIO_IRQS + NR_PM8921_IRQS)
+#define SITAR_INTERRUPT_BASE (NR_MSM_IRQS + NR_GPIO_IRQS + NR_PM8921_IRQS)
/* Micbias setting is based on 8660 CDP/MTP/FLUID requirement
* 4 micbiases are used to power various analog and digital
@@ -531,82 +529,77 @@
* does not need to be as high as 2.85V. It is choosen for
* microphone sensitivity purpose.
*/
-static struct tabla_pdata tabla_platform_data = {
- .slimbus_slave_device = {
- .name = "tabla-slave",
- .e_addr = {0, 0, 0x10, 0, 0x17, 2},
+static struct wcd9xxx_pdata sitar_platform_data = {
+ .slimbus_slave_device = {
+ .name = "sitar-slave",
+ .e_addr = {0, 0, 0x00, 0, 0x17, 2},
},
.irq = MSM_GPIO_TO_INT(62),
- .irq_base = TABLA_INTERRUPT_BASE,
- .num_irqs = NR_TABLA_IRQS,
-
-/*TODO: Replace this with right PM8038 gpio */
-#ifndef MSM8930_PHASE_2
- .reset_gpio = PM8921_GPIO_PM_TO_SYS(34),
-#endif
+ .irq_base = SITAR_INTERRUPT_BASE,
+ .num_irqs = NR_WCD9XXX_IRQS,
+ .reset_gpio = 42,
.micbias = {
- .ldoh_v = TABLA_LDOH_2P85_V,
+ .ldoh_v = SITAR_LDOH_2P85_V,
.cfilt1_mv = 1800,
.cfilt2_mv = 1800,
- .cfilt3_mv = 1800,
- .bias1_cfilt_sel = TABLA_CFILT1_SEL,
- .bias2_cfilt_sel = TABLA_CFILT2_SEL,
- .bias3_cfilt_sel = TABLA_CFILT3_SEL,
- .bias4_cfilt_sel = TABLA_CFILT3_SEL,
- }
-};
-
-static struct slim_device msm_slim_tabla = {
- .name = "tabla-slim",
- .e_addr = {0, 1, 0x10, 0, 0x17, 2},
- .dev = {
- .platform_data = &tabla_platform_data,
+ .bias1_cfilt_sel = SITAR_CFILT1_SEL,
+ .bias2_cfilt_sel = SITAR_CFILT2_SEL,
+ },
+ .regulator = {
+ {
+ .name = "CDC_VDD_CP",
+ .min_uV = 2200000,
+ .max_uV = 2200000,
+ .optimum_uA = WCD9XXX_CDC_VDDA_CP_CUR_MAX,
+ },
+ {
+ .name = "CDC_VDDA_RX",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .optimum_uA = WCD9XXX_CDC_VDDA_RX_CUR_MAX,
+ },
+ {
+ .name = "CDC_VDDA_TX",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .optimum_uA = WCD9XXX_CDC_VDDA_TX_CUR_MAX,
+ },
+ {
+ .name = "VDDIO_CDC",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .optimum_uA = WCD9XXX_VDDIO_CDC_CUR_MAX,
+ },
+ {
+ .name = "VDDD_CDC_D",
+ .min_uV = 1200000,
+ .max_uV = 1200000,
+ .optimum_uA = WCD9XXX_VDDD_CDC_D_CUR_MAX,
+ },
+ {
+ .name = "CDC_VDDA_A_1P2V",
+ .min_uV = 1200000,
+ .max_uV = 1200000,
+ .optimum_uA = WCD9XXX_VDDD_CDC_A_CUR_MAX,
+ },
},
};
-static struct tabla_pdata tabla20_platform_data = {
- .slimbus_slave_device = {
- .name = "tabla-slave",
- .e_addr = {0, 0, 0x60, 0, 0x17, 2},
- },
- .irq = MSM_GPIO_TO_INT(62),
- .irq_base = TABLA_INTERRUPT_BASE,
- .num_irqs = NR_TABLA_IRQS,
-
-/*TODO: Replace this with right PM8038 gpio */
-#ifndef MSM8930_PHASE_2
- .reset_gpio = PM8921_GPIO_PM_TO_SYS(34),
-#endif
- .micbias = {
- .ldoh_v = TABLA_LDOH_2P85_V,
- .cfilt1_mv = 1800,
- .cfilt2_mv = 1800,
- .cfilt3_mv = 1800,
- .bias1_cfilt_sel = TABLA_CFILT1_SEL,
- .bias2_cfilt_sel = TABLA_CFILT2_SEL,
- .bias3_cfilt_sel = TABLA_CFILT3_SEL,
- .bias4_cfilt_sel = TABLA_CFILT3_SEL,
- }
-};
-
-static struct slim_device msm_slim_tabla20 = {
- .name = "tabla2x-slim",
- .e_addr = {0, 1, 0x60, 0, 0x17, 2},
+static struct slim_device msm_slim_sitar = {
+ .name = "sitar-slim",
+ .e_addr = {0, 1, 0x00, 0, 0x17, 2},
.dev = {
- .platform_data = &tabla20_platform_data,
+ .platform_data = &sitar_platform_data,
},
};
#endif
+
static struct slim_boardinfo msm_slim_devices[] = {
-#ifdef CONFIG_WCD9310_CODEC
+#ifdef CONFIG_WCD9304_CODEC
{
.bus_num = 1,
- .slim_slave = &msm_slim_tabla,
- },
- {
- .bus_num = 1,
- .slim_slave = &msm_slim_tabla20,
+ .slim_slave = &msm_slim_sitar,
},
#endif
/* add more slimbus slaves as needed */
@@ -971,12 +964,54 @@
#ifdef CONFIG_USB_MSM_OTG_72K
static struct msm_otg_platform_data msm_otg_pdata;
#else
+#ifdef CONFIG_MSM_BUS_SCALING
+/* Bandwidth requests (zero) if no vote placed */
+static struct msm_bus_vectors usb_init_vectors[] = {
+ {
+ .src = MSM_BUS_MASTER_SPS,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 0,
+ .ib = 0,
+ },
+};
+
+/* Bus bandwidth requests in Bytes/sec */
+static struct msm_bus_vectors usb_max_vectors[] = {
+ {
+ .src = MSM_BUS_MASTER_SPS,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 60000000, /* At least 480Mbps on bus. */
+ .ib = 960000000, /* MAX bursts rate */
+ },
+};
+
+static struct msm_bus_paths usb_bus_scale_usecases[] = {
+ {
+ ARRAY_SIZE(usb_init_vectors),
+ usb_init_vectors,
+ },
+ {
+ ARRAY_SIZE(usb_max_vectors),
+ usb_max_vectors,
+ },
+};
+
+static struct msm_bus_scale_pdata usb_bus_scale_pdata = {
+ usb_bus_scale_usecases,
+ ARRAY_SIZE(usb_bus_scale_usecases),
+ .name = "usb",
+};
+#endif
+
static struct msm_otg_platform_data msm_otg_pdata = {
.mode = USB_OTG,
.otg_control = OTG_PMIC_CONTROL,
.phy_type = SNPS_28NM_INTEGRATED_PHY,
.pmic_id_irq = PM8038_USB_ID_IN_IRQ(PM8038_IRQ_BASE),
.power_budget = 750,
+#ifdef CONFIG_MSM_BUS_SCALING
+ .bus_scale_table = &usb_bus_scale_pdata,
+#endif
};
#endif
@@ -1099,7 +1134,7 @@
.reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
#endif
.reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
- .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020204,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
.vctl_timeout_us = 50,
@@ -1114,7 +1149,7 @@
.reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
#endif
.reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
- .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020204,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
.vctl_timeout_us = 50,
@@ -1163,7 +1198,7 @@
[0] = {
.reg_base_addr = MSM_SAW_L2_BASE,
.reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x00,
- .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020204,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x00A000AE,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x00A00020,
.modes = msm_spm_l2_seq_list,
@@ -1618,10 +1653,11 @@
};
static struct tsens_platform_data msm_tsens_pdata = {
- .slope = {872, 872, 872, 872, 872},
.tsens_factor = 1000,
- .hw_type = MSM_8960,
- .tsens_num_sensor = 5,
+ .hw_type = APQ_8064,
+ .tsens_num_sensor = 11,
+ .slope = {1176, 1176, 1154, 1176, 1111,
+ 1132, 1132, 1199, 1132, 1199, 1132},
};
#ifdef CONFIG_MSM_FAKE_BATTERY
@@ -1903,62 +1939,62 @@
MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
true,
- 100, 8000, 100000, 1,
+ 100, 650, 801, 200,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
true,
- 2000, 6000, 60100000, 3000,
+ 2000, 200, 576000, 2000,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(ON, GDHS, MAX, ACTIVE),
false,
- 4200, 5000, 60350000, 3500,
+ 8500, 51, 1122000, 8500,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
false,
- 6300, 4500, 65350000, 4800,
+ 9000, 51, 1130300, 9000,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(ON, HSFS_OPEN, ACTIVE, RET_HIGH),
false,
- 7000, 3500, 66600000, 5150,
+ 10000, 51, 1130300, 10000,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, GDHS, MAX, ACTIVE),
false,
- 11700, 2500, 67850000, 5500,
+ 12000, 14, 2205900, 12000,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
false,
- 13800, 2000, 71850000, 6800,
+ 18000, 12, 2364250, 18000,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
false,
- 29700, 500, 75850000, 8800,
+ 23500, 10, 2667000, 23500,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
false,
- 29700, 0, 76350000, 9800,
+ 29700, 5, 2867000, 30000,
},
};
diff --git a/arch/arm/mach-msm/board-8960-camera.c b/arch/arm/mach-msm/board-8960-camera.c
index 87cb105..3a697bf 100644
--- a/arch/arm/mach-msm/board-8960-camera.c
+++ b/arch/arm/mach-msm/board-8960-camera.c
@@ -420,7 +420,6 @@
};
static struct camera_vreg_t msm_8960_back_cam_vreg[] = {
- {"mipi_csi_vdd", REG_LDO, 1200000, 1200000, 20000},
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
{"cam_vio", REG_VS, 0, 0, 0},
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
@@ -428,7 +427,6 @@
};
static struct camera_vreg_t msm_8960_front_cam_vreg[] = {
- {"mipi_csi_vdd", REG_LDO, 1200000, 1200000, 20000},
{"cam_vio", REG_VS, 0, 0, 0},
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
@@ -517,7 +515,6 @@
};
static struct camera_vreg_t msm_8960_mt9m114_vreg[] = {
- {"mipi_csi_vdd", REG_LDO, 1200000, 1200000, 20000},
{"cam_vio", REG_VS, 0, 0, 0},
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
@@ -532,16 +529,16 @@
.mount_angle = 90,
.cam_vreg = msm_8960_mt9m114_vreg,
.num_vreg = ARRAY_SIZE(msm_8960_mt9m114_vreg),
- .gpio_conf = &msm_8960_back_cam_gpio_conf,
+ .gpio_conf = &msm_8960_front_cam_gpio_conf,
};
static struct msm_camera_sensor_info msm_camera_sensor_mt9m114_data = {
.sensor_name = "mt9m114",
- .pdata = &msm_camera_csi_device_data[0],
+ .pdata = &msm_camera_csi_device_data[1],
.flash_data = &flash_mt9m114,
.sensor_platform_info = &sensor_board_info_mt9m114,
.csi_if = 1,
- .camera_type = BACK_CAMERA_2D,
+ .camera_type = FRONT_CAMERA_2D,
};
static struct msm_camera_sensor_flash_data flash_ov2720 = {
@@ -565,7 +562,6 @@
};
static struct camera_vreg_t msm_8960_s5k3l1yx_vreg[] = {
- {"mipi_csi_vdd", REG_LDO, 1200000, 1200000, 20000},
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
{"cam_vio", REG_VS, 0, 0, 0},
diff --git a/arch/arm/mach-msm/board-8960-display.c b/arch/arm/mach-msm/board-8960-display.c
index 9a98058..3941e66 100644
--- a/arch/arm/mach-msm/board-8960-display.c
+++ b/arch/arm/mach-msm/board-8960-display.c
@@ -30,45 +30,45 @@
#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
#define MSM_FB_PRIM_BUF_SIZE \
- (roundup((1920 * 1200 * 4), 4096) * 3) /* 4 bpp x 3 pages */
+ (roundup((roundup(1920, 32) * roundup(1200, 32) * 4), 4096) * 3)
+ /* 4 bpp x 3 pages */
#else
#define MSM_FB_PRIM_BUF_SIZE \
- (roundup((1920 * 1200 * 4), 4096) * 2) /* 4 bpp x 2 pages */
+ (roundup((roundup(1920, 32) * roundup(1200, 32) * 4), 4096) * 2)
+ /* 4 bpp x 2 pages */
#endif
#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
#define MSM_FB_EXT_BUF_SIZE \
- (roundup((1920 * 1088 * 2), 4096) * 1) /* 2 bpp x 1 page */
+ (roundup((roundup(1920, 32) * roundup(1080, 32) * 2), 4096) * 1)
+ /* 2 bpp x 1 page */
#elif defined(CONFIG_FB_MSM_TVOUT)
#define MSM_FB_EXT_BUF_SIZE \
- (roundup((720 * 576 * 2), 4096) * 2) /* 2 bpp x 2 pages */
+ (roundup((roundup(720, 32) * roundup(576, 32) * 2), 4096) * 2)
+ /* 2 bpp x 2 pages */
#else
#define MSM_FB_EXT_BUF_SIZE 0
#endif
-#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
-/* 4 bpp x 2 page HDMI case */
-#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
-#else
/* Note: must be multiple of 4096 */
#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE, 4096)
-#endif
#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
-#define MSM_FB_OVERLAY0_WRITEBACK_SIZE roundup((1920 * 1200 * 3 * 2), 4096)
+#define MSM_FB_OVERLAY0_WRITEBACK_SIZE \
+ roundup((roundup(1920, 32) * roundup(1200, 32) * 3 * 2), 4096)
#else
#define MSM_FB_OVERLAY0_WRITEBACK_SIZE (0)
#endif /* CONFIG_FB_MSM_OVERLAY0_WRITEBACK */
#ifdef CONFIG_FB_MSM_OVERLAY1_WRITEBACK
-#define MSM_FB_OVERLAY1_WRITEBACK_SIZE roundup((1920 * 1088 * 3 * 2), 4096)
+#define MSM_FB_OVERLAY1_WRITEBACK_SIZE \
+ roundup((roundup(1920, 32) * roundup(1080, 32) * 3 * 2), 4096)
#else
#define MSM_FB_OVERLAY1_WRITEBACK_SIZE (0)
#endif /* CONFIG_FB_MSM_OVERLAY1_WRITEBACK */
#define MDP_VSYNC_GPIO 0
-#define PANEL_NAME_MAX_LEN 30
#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
#define MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME "mipi_video_toshiba_wsvga"
@@ -77,9 +77,17 @@
#define MIPI_VIDEO_CHIMEI_WUXGA_PANEL_NAME "mipi_video_chimei_wuxga"
#define MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME "mipi_video_simulator_vga"
#define MIPI_CMD_RENESAS_FWVGA_PANEL_NAME "mipi_cmd_renesas_fwvga"
+#define MIPI_VIDEO_ORISE_720P_PANEL_NAME "mipi_video_orise_720p"
+#define MIPI_CMD_ORISE_720P_PANEL_NAME "mipi_cmd_orise_720p"
#define HDMI_PANEL_NAME "hdmi_msm"
#define TVOUT_PANEL_NAME "tvout_msm"
+#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
+unsigned char hdmi_is_primary = 1;
+#else
+unsigned char hdmi_is_primary;
+#endif
+
static struct resource msm_fb_resources[] = {
{
.flags = IORESOURCE_DMA,
@@ -139,6 +147,16 @@
set_mdp_clocks_for_wuxga();
return 0;
}
+
+ if (!strncmp(name, MIPI_VIDEO_ORISE_720P_PANEL_NAME,
+ strnlen(MIPI_VIDEO_ORISE_720P_PANEL_NAME,
+ PANEL_NAME_MAX_LEN)))
+ return 0;
+
+ if (!strncmp(name, MIPI_CMD_ORISE_720P_PANEL_NAME,
+ strnlen(MIPI_CMD_ORISE_720P_PANEL_NAME,
+ PANEL_NAME_MAX_LEN)))
+ return 0;
#endif
}
@@ -624,29 +642,16 @@
#endif
-#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
-static int mdp_core_clk_rate_table[] = {
- 200000000,
- 200000000,
- 200000000,
- 200000000,
-};
-#else
static int mdp_core_clk_rate_table[] = {
85330000,
128000000,
160000000,
200000000,
};
-#endif
static struct msm_panel_common_pdata mdp_pdata = {
.gpio = MDP_VSYNC_GPIO,
-#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
- .mdp_core_clk_rate = 200000000,
-#else
.mdp_core_clk_rate = 85330000,
-#endif
.mdp_core_clk_table = mdp_core_clk_rate_table,
.num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
#ifdef CONFIG_MSM_BUS_SCALING
@@ -670,6 +675,12 @@
mdp_ui_vectors[0].ab = 2000000000;
mdp_ui_vectors[0].ib = 2000000000;
+ mdp_vga_vectors[0].ab = 2000000000;
+ mdp_vga_vectors[0].ib = 2000000000;
+ mdp_720p_vectors[0].ab = 2000000000;
+ mdp_720p_vectors[0].ib = 2000000000;
+ mdp_1080p_vectors[0].ab = 2000000000;
+ mdp_1080p_vectors[0].ib = 2000000000;
mdp_pdata.mdp_core_clk_rate = 200000000;
@@ -762,6 +773,11 @@
.dev.platform_data = &mipi_dsi2lvds_pdata,
};
+static struct platform_device mipi_dsi_orise_panel_device = {
+ .name = "mipi_orise",
+ .id = 0,
+};
+
#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
static struct resource hdmi_msm_resources[] = {
{
@@ -827,16 +843,6 @@
},
};
-#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
-static struct msm_bus_vectors dtv_bus_def_vectors[] = {
- {
- .src = MSM_BUS_MASTER_MDP_PORT0,
- .dst = MSM_BUS_SLAVE_EBI_CH0,
- .ab = 2000000000,
- .ib = 2000000000,
- },
-};
-#else
static struct msm_bus_vectors dtv_bus_def_vectors[] = {
{
.src = MSM_BUS_MASTER_MDP_PORT0,
@@ -845,7 +851,6 @@
.ib = 707616000 * 2,
},
};
-#endif
static struct msm_bus_paths dtv_bus_scale_usecases[] = {
{
@@ -879,9 +884,16 @@
if (on == prev_on)
return 0;
- if (!reg_8921_hdmi_mvs)
+ if (!reg_8921_hdmi_mvs) {
reg_8921_hdmi_mvs = regulator_get(&hdmi_msm_device.dev,
- "hdmi_mvs");
+ "hdmi_mvs");
+ if (IS_ERR(reg_8921_hdmi_mvs)) {
+ pr_err("'%s' regulator not found, rc=%ld\n",
+ "hdmi_mvs", IS_ERR(reg_8921_hdmi_mvs));
+ reg_8921_hdmi_mvs = NULL;
+ return -ENODEV;
+ }
+ }
if (on) {
rc = regulator_enable(reg_8921_hdmi_mvs);
@@ -1061,6 +1073,7 @@
if (!machine_is_msm8960_sim() && !machine_is_msm8960_rumi3()) {
platform_device_register(&mipi_dsi_novatek_panel_device);
+ platform_device_register(&mipi_dsi_orise_panel_device);
#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
platform_device_register(&hdmi_msm_device);
@@ -1095,3 +1108,27 @@
pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
size, addr, __pa(addr));
}
+
+void __init msm8960_set_display_params(char *prim_panel, char *ext_panel)
+{
+ if (strnlen(prim_panel, PANEL_NAME_MAX_LEN)) {
+ strlcpy(msm_fb_pdata.prim_panel_name, prim_panel,
+ PANEL_NAME_MAX_LEN);
+ pr_debug("msm_fb_pdata.prim_panel_name %s\n",
+ msm_fb_pdata.prim_panel_name);
+
+ if (!strncmp((char *)msm_fb_pdata.prim_panel_name,
+ HDMI_PANEL_NAME, strnlen(HDMI_PANEL_NAME,
+ PANEL_NAME_MAX_LEN))) {
+ pr_debug("HDMI is the primary display by"
+ " boot parameter\n");
+ hdmi_is_primary = 1;
+ }
+ }
+ if (strnlen(ext_panel, PANEL_NAME_MAX_LEN)) {
+ strlcpy(msm_fb_pdata.ext_panel_name, ext_panel,
+ PANEL_NAME_MAX_LEN);
+ pr_debug("msm_fb_pdata.ext_panel_name %s\n",
+ msm_fb_pdata.ext_panel_name);
+ }
+}
diff --git a/arch/arm/mach-msm/board-8960-pmic.c b/arch/arm/mach-msm/board-8960-pmic.c
index 744709c..4e18f89 100644
--- a/arch/arm/mach-msm/board-8960-pmic.c
+++ b/arch/arm/mach-msm/board-8960-pmic.c
@@ -88,6 +88,12 @@
PM_GPIO_STRENGTH_HIGH, \
PM_GPIO_FUNC_NORMAL, 0, 0)
+#define PM8XXX_GPIO_OUTPUT_STRENGTH(_gpio, _val, _out_strength) \
+ PM8XXX_GPIO_INIT(_gpio, PM_GPIO_DIR_OUT, PM_GPIO_OUT_BUF_CMOS, _val, \
+ PM_GPIO_PULL_NO, PM_GPIO_VIN_S4, \
+ _out_strength, \
+ PM_GPIO_FUNC_NORMAL, 0, 0)
+
/* Initial PM8921 GPIO configurations */
static struct pm8xxx_gpio_init pm8921_gpios[] __initdata = {
PM8XXX_GPIO_OUTPUT_VIN(6, 1, PM_GPIO_VIN_VPH), /* MHL power EN_N */
@@ -104,6 +110,8 @@
PM8XXX_GPIO_INPUT(26, PM_GPIO_PULL_UP_30), /* SD_CARD_DET_N */
PM8XXX_GPIO_OUTPUT(43, PM_GPIO_PULL_UP_30), /* DISP_RESET_N */
PM8XXX_GPIO_OUTPUT(42, 0), /* USB 5V reg enable */
+ /* TABLA CODEC RESET */
+ PM8XXX_GPIO_OUTPUT_STRENGTH(34, 1, PM_GPIO_STRENGTH_MED)
};
/* Initial PM8921 MPP configurations */
@@ -431,6 +439,7 @@
};
static struct pm8921_bms_platform_data pm8921_bms_pdata __devinitdata = {
+ .battery_type = BATT_UNKNOWN,
.r_sense = 10,
.i_test = 2500,
.v_failure = 3000,
@@ -555,6 +564,17 @@
.r_sense = 10,
};
+/**
+ * PM8XXX_PWM_DTEST_CHANNEL_NONE shall be used when no LPG
+ * channel should be in DTEST mode.
+ */
+
+#define PM8XXX_PWM_DTEST_CHANNEL_NONE (-1)
+
+static struct pm8xxx_pwm_platform_data pm8xxx_pwm_pdata = {
+ .dtest_channel = PM8XXX_PWM_DTEST_CHANNEL_NONE,
+};
+
static struct pm8921_platform_data pm8921_platform_data __devinitdata = {
.irq_pdata = &pm8xxx_irq_pdata,
.gpio_pdata = &pm8xxx_gpio_pdata,
@@ -569,6 +589,7 @@
.adc_pdata = &pm8xxx_adc_pdata,
.leds_pdata = &pm8xxx_leds_pdata,
.ccadc_pdata = &pm8xxx_ccadc_pdata,
+ .pwm_pdata = &pm8xxx_pwm_pdata,
};
static struct msm_ssbi_platform_data msm8960_ssbi_pm8921_pdata __devinitdata = {
@@ -593,5 +614,8 @@
if (machine_is_msm8960_liquid()) {
pm8921_platform_data.keypad_pdata = &keypad_data_liquid;
pm8921_platform_data.leds_pdata = &pm8xxx_leds_pdata_liquid;
+ pm8921_platform_data.bms_pdata->battery_type = BATT_DESAY;
+ } else if (machine_is_msm8960_mtp()) {
+ pm8921_platform_data.bms_pdata->battery_type = BATT_PALLADIUM;
}
}
diff --git a/arch/arm/mach-msm/board-8960-regulator.c b/arch/arm/mach-msm/board-8960-regulator.c
index 0f05af5..9c1a439 100644
--- a/arch/arm/mach-msm/board-8960-regulator.c
+++ b/arch/arm/mach-msm/board-8960-regulator.c
@@ -30,10 +30,9 @@
VREG_CONSUMERS(L2) = {
REGULATOR_SUPPLY("8921_l2", NULL),
REGULATOR_SUPPLY("dsi_vdda", "mipi_dsi.1"),
- REGULATOR_SUPPLY("mipi_csi_vdd", "4-001a"),
- REGULATOR_SUPPLY("mipi_csi_vdd", "4-006c"),
- REGULATOR_SUPPLY("mipi_csi_vdd", "4-0048"),
- REGULATOR_SUPPLY("mipi_csi_vdd", "4-0020"),
+ REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csid.0"),
+ REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csid.1"),
+ REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csid.2"),
};
VREG_CONSUMERS(L3) = {
REGULATOR_SUPPLY("8921_l3", NULL),
@@ -222,7 +221,6 @@
};
VREG_CONSUMERS(USB_OTG) = {
REGULATOR_SUPPLY("8921_usb_otg", NULL),
- REGULATOR_SUPPLY("vbus_otg", "msm_otg"),
};
VREG_CONSUMERS(HDMI_MVS) = {
REGULATOR_SUPPLY("8921_hdmi_mvs", NULL),
@@ -246,12 +244,12 @@
};
VREG_CONSUMERS(EXT_OTG_SW) = {
REGULATOR_SUPPLY("ext_otg_sw", NULL),
+ REGULATOR_SUPPLY("vbus_otg", "msm_otg"),
};
#define PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, _modes, _ops, \
_apply_uV, _pull_down, _always_on, _supply_regulator, \
- _system_uA, _enable_time, _reg_id, _ocp_enable, \
- _ocp_enable_time) \
+ _system_uA, _enable_time, _reg_id) \
{ \
.init_data = { \
.constraints = { \
@@ -273,8 +271,6 @@
.pull_down_enable = _pull_down, \
.system_uA = _system_uA, \
.enable_time = _enable_time, \
- .ocp_enable = _ocp_enable, \
- .ocp_enable_time = _ocp_enable_time, \
}
#define PM8XXX_LDO(_id, _name, _always_on, _pull_down, _min_uV, _max_uV, \
@@ -283,7 +279,7 @@
| REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \
REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \
- _supply_regulator, _system_uA, _enable_time, _reg_id, 0, 0)
+ _supply_regulator, _system_uA, _enable_time, _reg_id)
#define PM8XXX_NLDO1200(_id, _name, _always_on, _pull_down, _min_uV, \
_max_uV, _enable_time, _supply_regulator, _system_uA, _reg_id) \
@@ -291,7 +287,7 @@
| REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \
REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \
- _supply_regulator, _system_uA, _enable_time, _reg_id, 0, 0)
+ _supply_regulator, _system_uA, _enable_time, _reg_id)
#define PM8XXX_SMPS(_id, _name, _always_on, _pull_down, _min_uV, _max_uV, \
_enable_time, _supply_regulator, _system_uA, _reg_id) \
@@ -299,32 +295,32 @@
| REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \
REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \
- _supply_regulator, _system_uA, _enable_time, _reg_id, 0, 0)
+ _supply_regulator, _system_uA, _enable_time, _reg_id)
#define PM8XXX_FTSMPS(_id, _name, _always_on, _pull_down, _min_uV, _max_uV, \
_enable_time, _supply_regulator, _system_uA, _reg_id) \
PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS \
| REGULATOR_CHANGE_MODE, 0, _pull_down, _always_on, \
- _supply_regulator, _system_uA, _enable_time, _reg_id, 0, 0)
+ _supply_regulator, _system_uA, _enable_time, _reg_id)
#define PM8XXX_VS(_id, _name, _always_on, _pull_down, _enable_time, \
- _ocp_enable, _ocp_enable_time, _supply_regulator, _reg_id) \
+ _supply_regulator, _reg_id) \
PM8XXX_VREG_INIT(_id, _name, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, \
_pull_down, _always_on, _supply_regulator, 0, _enable_time, \
- _reg_id, _ocp_enable, _ocp_enable_time)
+ _reg_id)
#define PM8XXX_VS300(_id, _name, _always_on, _pull_down, _enable_time, \
- _ocp_enable, _ocp_enable_time, _supply_regulator, _reg_id) \
+ _supply_regulator, _reg_id) \
PM8XXX_VREG_INIT(_id, _name, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, \
_pull_down, _always_on, _supply_regulator, 0, _enable_time, \
- _reg_id, _ocp_enable, _ocp_enable_time)
+ _reg_id)
#define PM8XXX_NCP(_id, _name, _always_on, _min_uV, _max_uV, _enable_time, \
_supply_regulator, _reg_id) \
PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, 0, \
REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, 0, \
- _always_on, _supply_regulator, 0, _enable_time, _reg_id, 0, 0)
+ _always_on, _supply_regulator, 0, _enable_time, _reg_id)
/* Pin control initialization */
#define PM8XXX_PC(_id, _name, _always_on, _pin_fn, _pin_ctrl, \
@@ -473,7 +469,7 @@
GPIO_VREG(EXT_3P3V, "ext_3p3v", "ext_3p3v_en",
PM8921_GPIO_PM_TO_SYS(17), NULL),
GPIO_VREG(EXT_OTG_SW, "ext_otg_sw", "ext_otg_sw_en",
- PM8921_GPIO_PM_TO_SYS(42), "ext_5v"),
+ PM8921_GPIO_PM_TO_SYS(42), "8921_usb_otg"),
};
/* SAW regulator constraints */
@@ -499,13 +495,9 @@
PM8XXX_LDO(L29, "8921_l29", 0, 1, 2050000, 2100000, 200, "8921_s8",
0, 4),
- /*
- * ID name always_on pd en_t ocp ocp_t supply
- * reg_ID
- */
- PM8XXX_VS300(USB_OTG, "8921_usb_otg", 0, 0, 0, 1, 500, "ext_otg_sw",
- 5),
- PM8XXX_VS300(HDMI_MVS, "8921_hdmi_mvs", 0, 1, 0, 0, 0, "ext_5v", 6),
+ /* ID name always_on pd en_t supply reg_ID */
+ PM8XXX_VS300(USB_OTG, "8921_usb_otg", 0, 1, 0, "ext_5v", 5),
+ PM8XXX_VS300(HDMI_MVS, "8921_hdmi_mvs", 0, 1, 0, "ext_5v", 6),
};
static struct rpm_regulator_init_data
@@ -527,7 +519,7 @@
RPM_LDO(L6, 0, 1, 0, 2950000, 2950000, NULL, 0, 0),
RPM_LDO(L7, 1, 1, 0, 1850000, 2950000, NULL, 10000, 10000),
RPM_LDO(L8, 0, 1, 0, 2800000, 3000000, NULL, 0, 0),
- RPM_LDO(L9, 0, 1, 0, 2850000, 2850000, NULL, 0, 0),
+ RPM_LDO(L9, 0, 1, 0, 3000000, 3000000, NULL, 0, 0),
RPM_LDO(L10, 0, 1, 0, 3000000, 3000000, NULL, 0, 0),
RPM_LDO(L11, 0, 1, 0, 2850000, 2850000, NULL, 0, 0),
RPM_LDO(L12, 0, 1, 0, 1200000, 1200000, "8921_s4", 0, 0),
diff --git a/arch/arm/mach-msm/board-8960.c b/arch/arm/mach-msm/board-8960.c
index b99ce8a..462cb5d 100644
--- a/arch/arm/mach-msm/board-8960.c
+++ b/arch/arm/mach-msm/board-8960.c
@@ -70,9 +70,8 @@
#include <mach/restart.h>
#ifdef CONFIG_WCD9310_CODEC
-#include <linux/slimbus/slimbus.h>
-#include <linux/mfd/wcd9310/core.h>
-#include <linux/mfd/wcd9310/pdata.h>
+#include <linux/mfd/wcd9xxx/core.h>
+#include <linux/mfd/wcd9xxx/pdata.h>
#endif
#include <linux/ion.h>
@@ -132,12 +131,9 @@
#define MSM_PMEM_ADSP_SIZE 0x7800000
#define MSM_PMEM_AUDIO_SIZE 0x2B4000
-#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
-#define MSM_PMEM_SIZE 0x4000000 /* 64 Mbytes */
-#else
#define MSM_PMEM_SIZE 0x2800000 /* 40 Mbytes */
-#endif
#define MSM_LIQUID_PMEM_SIZE 0x4000000 /* 64 Mbytes */
+#define MSM_HDMI_PRIM_PMEM_SIZE 0x4000000 /* 64 Mbytes */
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
#define MSM_PMEM_KERNEL_EBI1_SIZE 0x280000
@@ -149,7 +145,9 @@
#define MSM_ION_AUDIO_SIZE MSM_PMEM_AUDIO_SIZE
#define MSM_ION_HEAP_NUM 8
#define MSM_LIQUID_ION_MM_SIZE (MSM_ION_MM_SIZE + 0x600000)
-static unsigned int msm_ion_cp_mm_size = MSM_ION_MM_SIZE;
+#define MSM_LIQUID_ION_SF_SIZE MSM_LIQUID_PMEM_SIZE
+#define MSM_HDMI_PRIM_ION_SF_SIZE MSM_HDMI_PRIM_PMEM_SIZE
+static unsigned msm_ion_sf_size = MSM_ION_SF_SIZE;
#else
#define MSM_PMEM_KERNEL_EBI1_SIZE 0x110C000
#define MSM_ION_HEAP_NUM 1
@@ -309,8 +307,13 @@
#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
android_pmem_adsp_pdata.size = pmem_adsp_size;
- if (!pmem_param_set && machine_is_msm8960_liquid())
- pmem_size = MSM_LIQUID_PMEM_SIZE;
+ if (!pmem_param_set) {
+ if (machine_is_msm8960_liquid())
+ pmem_size = MSM_LIQUID_PMEM_SIZE;
+ if (hdmi_is_primary)
+ pmem_size = MSM_HDMI_PRIM_PMEM_SIZE;
+ }
+
android_pmem_pdata.size = pmem_size;
#endif
android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
@@ -464,14 +467,22 @@
{
unsigned int i;
- if (!pmem_param_set && machine_is_msm8960_liquid()) {
- msm_ion_cp_mm_size = MSM_LIQUID_ION_MM_SIZE;
- for (i = 0; i < ion_pdata.nr; i++) {
- if (ion_pdata.heaps[i].id == ION_CP_MM_HEAP_ID) {
- ion_pdata.heaps[i].size = msm_ion_cp_mm_size;
- pr_debug("msm_ion_cp_mm_size 0x%x\n",
- msm_ion_cp_mm_size);
- break;
+ if (!pmem_param_set) {
+ if (machine_is_msm8960_liquid())
+ msm_ion_sf_size = MSM_LIQUID_ION_SF_SIZE;
+
+ if (hdmi_is_primary)
+ msm_ion_sf_size = MSM_HDMI_PRIM_ION_SF_SIZE;
+
+ if (machine_is_msm8960_liquid() || hdmi_is_primary) {
+ for (i = 0; i < ion_pdata.nr; i++) {
+ if (ion_pdata.heaps[i].id == ION_SF_HEAP_ID) {
+ ion_pdata.heaps[i].size =
+ msm_ion_sf_size;
+ pr_debug("msm_ion_sf_size 0x%x\n",
+ msm_ion_sf_size);
+ break;
+ }
}
}
}
@@ -634,8 +645,27 @@
place_movable_zone();
}
+static char prim_panel_name[PANEL_NAME_MAX_LEN];
+static char ext_panel_name[PANEL_NAME_MAX_LEN];
+static int __init prim_display_setup(char *param)
+{
+ if (strnlen(param, PANEL_NAME_MAX_LEN))
+ strlcpy(prim_panel_name, param, PANEL_NAME_MAX_LEN);
+ return 0;
+}
+early_param("prim_display", prim_display_setup);
+
+static int __init ext_display_setup(char *param)
+{
+ if (strnlen(param, PANEL_NAME_MAX_LEN))
+ strlcpy(ext_panel_name, param, PANEL_NAME_MAX_LEN);
+ return 0;
+}
+early_param("ext_display", ext_display_setup);
+
static void __init msm8960_reserve(void)
{
+ msm8960_set_display_params(prim_panel_name, ext_panel_name);
msm_reserve();
fmem_pdata.phys = reserve_memory_for_fmem(fmem_pdata.size);
}
@@ -664,14 +694,14 @@
* does not need to be as high as 2.85V. It is choosen for
* microphone sensitivity purpose.
*/
-static struct tabla_pdata tabla_platform_data = {
+static struct wcd9xxx_pdata tabla_platform_data = {
.slimbus_slave_device = {
.name = "tabla-slave",
.e_addr = {0, 0, 0x10, 0, 0x17, 2},
},
.irq = MSM_GPIO_TO_INT(62),
.irq_base = TABLA_INTERRUPT_BASE,
- .num_irqs = NR_TABLA_IRQS,
+ .num_irqs = NR_WCD9XXX_IRQS,
.reset_gpio = PM8921_GPIO_PM_TO_SYS(34),
.micbias = {
.ldoh_v = TABLA_LDOH_2P85_V,
@@ -682,7 +712,45 @@
.bias2_cfilt_sel = TABLA_CFILT2_SEL,
.bias3_cfilt_sel = TABLA_CFILT3_SEL,
.bias4_cfilt_sel = TABLA_CFILT3_SEL,
- }
+ },
+ .regulator = {
+ {
+ .name = "CDC_VDD_CP",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .optimum_uA = WCD9XXX_CDC_VDDA_CP_CUR_MAX,
+ },
+ {
+ .name = "CDC_VDDA_RX",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .optimum_uA = WCD9XXX_CDC_VDDA_RX_CUR_MAX,
+ },
+ {
+ .name = "CDC_VDDA_TX",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .optimum_uA = WCD9XXX_CDC_VDDA_TX_CUR_MAX,
+ },
+ {
+ .name = "VDDIO_CDC",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .optimum_uA = WCD9XXX_VDDIO_CDC_CUR_MAX,
+ },
+ {
+ .name = "VDDD_CDC_D",
+ .min_uV = 1225000,
+ .max_uV = 1225000,
+ .optimum_uA = WCD9XXX_VDDD_CDC_D_CUR_MAX,
+ },
+ {
+ .name = "CDC_VDDA_A_1P2V",
+ .min_uV = 1225000,
+ .max_uV = 1225000,
+ .optimum_uA = WCD9XXX_VDDD_CDC_A_CUR_MAX,
+ },
+ },
};
static struct slim_device msm_slim_tabla = {
@@ -693,14 +761,14 @@
},
};
-static struct tabla_pdata tabla20_platform_data = {
+static struct wcd9xxx_pdata tabla20_platform_data = {
.slimbus_slave_device = {
.name = "tabla-slave",
.e_addr = {0, 0, 0x60, 0, 0x17, 2},
},
.irq = MSM_GPIO_TO_INT(62),
.irq_base = TABLA_INTERRUPT_BASE,
- .num_irqs = NR_TABLA_IRQS,
+ .num_irqs = NR_WCD9XXX_IRQS,
.reset_gpio = PM8921_GPIO_PM_TO_SYS(34),
.micbias = {
.ldoh_v = TABLA_LDOH_2P85_V,
@@ -711,7 +779,45 @@
.bias2_cfilt_sel = TABLA_CFILT2_SEL,
.bias3_cfilt_sel = TABLA_CFILT3_SEL,
.bias4_cfilt_sel = TABLA_CFILT3_SEL,
- }
+ },
+ .regulator = {
+ {
+ .name = "CDC_VDD_CP",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .optimum_uA = WCD9XXX_CDC_VDDA_CP_CUR_MAX,
+ },
+ {
+ .name = "CDC_VDDA_RX",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .optimum_uA = WCD9XXX_CDC_VDDA_RX_CUR_MAX,
+ },
+ {
+ .name = "CDC_VDDA_TX",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .optimum_uA = WCD9XXX_CDC_VDDA_TX_CUR_MAX,
+ },
+ {
+ .name = "VDDIO_CDC",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .optimum_uA = WCD9XXX_VDDIO_CDC_CUR_MAX,
+ },
+ {
+ .name = "VDDD_CDC_D",
+ .min_uV = 1225000,
+ .max_uV = 1225000,
+ .optimum_uA = WCD9XXX_VDDD_CDC_D_CUR_MAX,
+ },
+ {
+ .name = "CDC_VDDA_A_1P2V",
+ .min_uV = 1225000,
+ .max_uV = 1225000,
+ .optimum_uA = WCD9XXX_VDDD_CDC_A_CUR_MAX,
+ },
+ },
};
static struct slim_device msm_slim_tabla20 = {
@@ -1238,7 +1344,7 @@
.reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
#endif
.reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
- .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020204,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
.vctl_timeout_us = 50,
@@ -1253,7 +1359,7 @@
.reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
#endif
.reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
- .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020204,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
.vctl_timeout_us = 50,
@@ -1302,7 +1408,7 @@
[0] = {
.reg_base_addr = MSM_SAW_L2_BASE,
.reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x00,
- .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020204,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x00A000AE,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x00A00020,
.modes = msm_spm_l2_seq_list,
@@ -1716,6 +1822,63 @@
255,
};
+/* configuration data for mxt1386e on 3D SKU using V2.1 firmware */
+static const u8 mxt1386e_config_data_3d[] = {
+ /* T6 Object */
+ 0, 0, 0, 0, 0, 0,
+ /* T38 Object */
+ 13, 1, 0, 23, 2, 12, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ /* T7 Object */
+ 100, 10, 50,
+ /* T8 Object */
+ 25, 0, 20, 20, 0, 0, 0, 0, 0, 0,
+ /* T9 Object */
+ 131, 0, 0, 26, 42, 0, 32, 80, 2, 5,
+ 0, 5, 5, 0, 10, 30, 10, 10, 175, 4,
+ 127, 7, 26, 21, 17, 19, 143, 35, 207, 40,
+ 20, 5, 54, 49, 0,
+ /* T18 Object */
+ 0, 0,
+ /* T24 Object */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ /* T25 Object */
+ 0, 0, 72, 113, 168, 97,
+ /* T27 Object */
+ 0, 0, 0, 0, 0, 0, 0,
+ /* T40 Object */
+ 0, 0, 0, 0, 0,
+ /* T42 Object */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ /* T43 Object */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0,
+ /* T46 Object */
+ 68, 0, 16, 16, 0, 0, 0, 0, 0,
+ /* T47 Object */
+ 0, 0, 0, 0, 0, 0, 3, 64, 66, 0,
+ /* T48 Object */
+ 31, 64, 64, 0, 0, 0, 0, 0, 0, 0,
+ 32, 50, 0, 10, 10, 0, 0, 100, 10, 90,
+ 0, 0, 0, 0, 0, 0, 0, 10, 1, 30,
+ 52, 10, 5, 0, 33, 0, 1, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ /* T56 Object */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0,
+};
+
#define MXT_TS_GPIO_IRQ 11
#define MXT_TS_LDO_EN_GPIO 50
#define MXT_TS_RESET_GPIO 52
@@ -1744,7 +1907,7 @@
gpio_free(MXT_TS_LDO_EN_GPIO);
}
-static struct mxt_config_info mxt_config_array[] = {
+static struct mxt_config_info mxt_config_array_2d[] = {
{
.config = mxt1386_config_data,
.config_length = ARRAY_SIZE(mxt1386_config_data),
@@ -1752,6 +1915,7 @@
.variant_id = 0x0,
.version = 0x10,
.build = 0xAA,
+ .bootldr_id = MXT_BOOTLOADER_ID_1386,
},
{
.config = mxt1386e_config_data_v1_0,
@@ -1760,6 +1924,8 @@
.variant_id = 0x2,
.version = 0x10,
.build = 0xAA,
+ .bootldr_id = MXT_BOOTLOADER_ID_1386E,
+ .fw_name = "atmel_8960_liquid_v2_1_AA.hex",
},
{
.config = mxt1386e_config_data_v2_1,
@@ -1768,12 +1934,13 @@
.variant_id = 0x7,
.version = 0x21,
.build = 0xAA,
+ .bootldr_id = MXT_BOOTLOADER_ID_1386E,
},
};
-static struct mxt_platform_data mxt_platform_data = {
- .config_array = mxt_config_array,
- .config_array_size = ARRAY_SIZE(mxt_config_array),
+static struct mxt_platform_data mxt_platform_data_2d = {
+ .config_array = mxt_config_array_2d,
+ .config_array_size = ARRAY_SIZE(mxt_config_array_2d),
.x_size = 1365,
.y_size = 767,
.irqflags = IRQF_TRIGGER_FALLING,
@@ -1782,10 +1949,31 @@
.irq_gpio = MXT_TS_GPIO_IRQ,
};
+static struct mxt_config_info mxt_config_array_3d[] = {
+ {
+ .config = mxt1386e_config_data_3d,
+ .config_length = ARRAY_SIZE(mxt1386e_config_data_3d),
+ .family_id = 0xA0,
+ .variant_id = 0x7,
+ .version = 0x21,
+ .build = 0xAA,
+ },
+};
+
+static struct mxt_platform_data mxt_platform_data_3d = {
+ .config_array = mxt_config_array_3d,
+ .config_array_size = ARRAY_SIZE(mxt_config_array_3d),
+ .x_size = 1919,
+ .y_size = 1199,
+ .irqflags = IRQF_TRIGGER_FALLING,
+ .i2c_pull_up = true,
+ .reset_gpio = MXT_TS_RESET_GPIO,
+ .irq_gpio = MXT_TS_GPIO_IRQ,
+};
+
static struct i2c_board_info mxt_device_info[] __initdata = {
{
I2C_BOARD_INFO("atmel_mxt_ts", 0x5b),
- .platform_data = &mxt_platform_data,
.irq = MSM_GPIO_TO_INT(MXT_TS_GPIO_IRQ),
},
};
@@ -1927,8 +2115,8 @@
&msm_device_saw_core0,
&msm_device_saw_core1,
&msm8960_device_ext_5v_vreg,
- &msm8960_device_ext_otg_sw_vreg,
&msm8960_device_ssbi_pmic,
+ &msm8960_device_ext_otg_sw_vreg,
&msm8960_device_qup_spi_gsbi1,
&msm8960_device_qup_i2c_gsbi3,
&msm8960_device_qup_i2c_gsbi4,
@@ -1966,6 +2154,14 @@
&msm_device_bam_dmux,
&msm_fm_platform_init,
+#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
+#ifdef CONFIG_MSM_USE_TSIF1
+ &msm_device_tsif[1],
+#else
+ &msm_device_tsif[0],
+#endif
+#endif
+
#ifdef CONFIG_HW_RANDOM_MSM
&msm_device_rng,
#endif
@@ -2188,62 +2384,62 @@
MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
true,
- 100, 8000, 100000, 1,
+ 100, 650, 801, 200,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
true,
- 2000, 6000, 60100000, 3000,
+ 2000, 200, 576000, 2000,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(ON, GDHS, MAX, ACTIVE),
false,
- 4200, 5000, 60350000, 3500,
+ 8500, 51, 1122000, 8500,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
false,
- 6300, 4500, 65350000, 4800,
+ 9000, 51, 1130300, 9000,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(ON, HSFS_OPEN, ACTIVE, RET_HIGH),
false,
- 7000, 3500, 66600000, 5150,
+ 10000, 51, 1130300, 10000,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, GDHS, MAX, ACTIVE),
false,
- 11700, 2500, 67850000, 5500,
+ 12000, 14, 2205900, 12000,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
false,
- 13800, 2000, 71850000, 6800,
+ 18000, 12, 2364250, 18000,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
false,
- 29700, 500, 75850000, 8800,
+ 23500, 10, 2667000, 23500,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
false,
- 29700, 0, 76350000, 9800,
+ 29700, 5, 2867000, 30000,
},
};
@@ -2463,6 +2659,15 @@
else
pr_err("unmatched machine ID in register_i2c_devices\n");
+ if (machine_is_msm8960_liquid()) {
+ if (SOCINFO_VERSION_MAJOR(socinfo_get_platform_version()) == 3)
+ mxt_device_info[0].platform_data =
+ &mxt_platform_data_3d;
+ else
+ mxt_device_info[0].platform_data =
+ &mxt_platform_data_2d;
+ }
+
/* Run the array and install devices as appropriate */
for (i = 0; i < ARRAY_SIZE(msm8960_i2c_devices); ++i) {
if (msm8960_i2c_devices[i].machs & mach_mask)
diff --git a/arch/arm/mach-msm/board-8960.h b/arch/arm/mach-msm/board-8960.h
index 20af7b8..dc63fee 100644
--- a/arch/arm/mach-msm/board-8960.h
+++ b/arch/arm/mach-msm/board-8960.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -73,12 +73,15 @@
extern struct sx150x_platform_data msm8960_sx150x_data[];
extern struct msm_camera_board_info msm8960_camera_board_info;
+extern unsigned char hdmi_is_primary;
+
void msm8960_init_cam(void);
void msm8960_init_fb(void);
void msm8960_init_pmic(void);
void msm8960_init_mmc(void);
int msm8960_init_gpiomux(void);
void msm8960_allocate_fb_region(void);
+void msm8960_set_display_params(char *prim_panel, char *ext_panel);
void msm8960_pm8921_gpio_mpp_init(void);
void msm8960_mdp_writeback(struct memtype_reserve *reserve_table);
uint32_t msm_rpm_get_swfi_latency(void);
diff --git a/arch/arm/mach-msm/board-copper-regulator.c b/arch/arm/mach-msm/board-copper-regulator.c
new file mode 100644
index 0000000..a7f0eac
--- /dev/null
+++ b/arch/arm/mach-msm/board-copper-regulator.c
@@ -0,0 +1,322 @@
+/*
+ * Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/regulator/stub-regulator.h>
+
+#define VREG_CONSUMERS(_name) \
+ static struct regulator_consumer_supply vreg_consumers_##_name[]
+
+/*
+ * Consumer specific regulator names:
+ * regulator name consumer dev_name
+ */
+VREG_CONSUMERS(S1B) = {
+ REGULATOR_SUPPLY("8841_s1", NULL),
+};
+VREG_CONSUMERS(S2B) = {
+ REGULATOR_SUPPLY("8841_s2", NULL),
+};
+VREG_CONSUMERS(S3B) = {
+ REGULATOR_SUPPLY("8841_s3", NULL),
+};
+VREG_CONSUMERS(S4B) = {
+ REGULATOR_SUPPLY("8841_s4", NULL),
+};
+VREG_CONSUMERS(S5B) = {
+ REGULATOR_SUPPLY("8841_s5", NULL),
+};
+VREG_CONSUMERS(S6B) = {
+ REGULATOR_SUPPLY("8841_s6", NULL),
+};
+VREG_CONSUMERS(S7B) = {
+ REGULATOR_SUPPLY("8841_s7", NULL),
+};
+VREG_CONSUMERS(S8B) = {
+ REGULATOR_SUPPLY("8841_s8", NULL),
+};
+VREG_CONSUMERS(S1) = {
+ REGULATOR_SUPPLY("8941_s1", NULL),
+};
+VREG_CONSUMERS(S2) = {
+ REGULATOR_SUPPLY("8941_s2", NULL),
+};
+VREG_CONSUMERS(S3) = {
+ REGULATOR_SUPPLY("8941_s3", NULL),
+};
+VREG_CONSUMERS(L1) = {
+ REGULATOR_SUPPLY("8941_l1", NULL),
+};
+VREG_CONSUMERS(L2) = {
+ REGULATOR_SUPPLY("8941_l2", NULL),
+};
+VREG_CONSUMERS(L3) = {
+ REGULATOR_SUPPLY("8941_l3", NULL),
+};
+VREG_CONSUMERS(L4) = {
+ REGULATOR_SUPPLY("8941_l4", NULL),
+};
+VREG_CONSUMERS(L5) = {
+ REGULATOR_SUPPLY("8941_l5", NULL),
+};
+VREG_CONSUMERS(L6) = {
+ REGULATOR_SUPPLY("8941_l6", NULL),
+};
+VREG_CONSUMERS(L7) = {
+ REGULATOR_SUPPLY("8941_l7", NULL),
+};
+VREG_CONSUMERS(L8) = {
+ REGULATOR_SUPPLY("8941_l8", NULL),
+};
+VREG_CONSUMERS(L9) = {
+ REGULATOR_SUPPLY("8941_l9", NULL),
+};
+VREG_CONSUMERS(L10) = {
+ REGULATOR_SUPPLY("8941_l10", NULL),
+};
+VREG_CONSUMERS(L11) = {
+ REGULATOR_SUPPLY("8941_l11", NULL),
+};
+VREG_CONSUMERS(L12) = {
+ REGULATOR_SUPPLY("8941_l12", NULL),
+};
+VREG_CONSUMERS(L13) = {
+ REGULATOR_SUPPLY("8941_l13", NULL),
+};
+VREG_CONSUMERS(L14) = {
+ REGULATOR_SUPPLY("8941_l14", NULL),
+};
+VREG_CONSUMERS(L15) = {
+ REGULATOR_SUPPLY("8941_l15", NULL),
+};
+VREG_CONSUMERS(L16) = {
+ REGULATOR_SUPPLY("8941_l16", NULL),
+};
+VREG_CONSUMERS(L17) = {
+ REGULATOR_SUPPLY("8941_l17", NULL),
+};
+VREG_CONSUMERS(L18) = {
+ REGULATOR_SUPPLY("8941_l18", NULL),
+};
+VREG_CONSUMERS(L19) = {
+ REGULATOR_SUPPLY("8941_l19", NULL),
+};
+VREG_CONSUMERS(L20) = {
+ REGULATOR_SUPPLY("8941_l20", NULL),
+};
+VREG_CONSUMERS(L21) = {
+ REGULATOR_SUPPLY("8941_l21", NULL),
+};
+VREG_CONSUMERS(L22) = {
+ REGULATOR_SUPPLY("8941_l22", NULL),
+};
+VREG_CONSUMERS(L23) = {
+ REGULATOR_SUPPLY("8941_l23", NULL),
+};
+VREG_CONSUMERS(L24) = {
+ REGULATOR_SUPPLY("8941_l24", NULL),
+};
+VREG_CONSUMERS(LVS1) = {
+ REGULATOR_SUPPLY("8941_lvs1", NULL),
+};
+VREG_CONSUMERS(LVS2) = {
+ REGULATOR_SUPPLY("8941_lvs2", NULL),
+};
+VREG_CONSUMERS(LVS3) = {
+ REGULATOR_SUPPLY("8941_lvs3", NULL),
+};
+
+#define PM8X41_VREG_INIT(_id, _name, _min_uV, _max_uV, _modes, _ops, \
+ _always_on, _supply_regulator, _hpm_min, _system_uA) \
+ struct stub_regulator_pdata vreg_dev_##_id##_pdata __devinitdata = { \
+ .init_data = { \
+ .constraints = { \
+ .valid_modes_mask = _modes, \
+ .valid_ops_mask = _ops, \
+ .min_uV = _min_uV, \
+ .max_uV = _max_uV, \
+ .input_uV = _max_uV, \
+ .apply_uV = 0, \
+ .always_on = _always_on, \
+ .name = _name, \
+ }, \
+ .num_consumer_supplies = \
+ ARRAY_SIZE(vreg_consumers_##_id), \
+ .consumer_supplies = vreg_consumers_##_id, \
+ .supply_regulator = _supply_regulator, \
+ }, \
+ .hpm_min_load = _hpm_min, \
+ .system_uA = _system_uA, \
+ }
+
+#define PM8X41_LDO(_id, _name, _always_on, _min_uV, _max_uV, \
+ _supply_regulator, _hpm_min, _system_uA) \
+ PM8X41_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
+ | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \
+ REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
+ REGULATOR_CHANGE_DRMS, _always_on, \
+ _supply_regulator, _hpm_min, _system_uA)
+
+#define PM8X41_SMPS(_id, _name, _always_on, _min_uV, _max_uV, \
+ _supply_regulator, _hpm_min, _system_uA) \
+ PM8X41_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
+ | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \
+ REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
+ REGULATOR_CHANGE_DRMS, _always_on, \
+ _supply_regulator, _hpm_min, _system_uA)
+
+#define PM8X41_FTSMPS(_id, _name, _always_on, _min_uV, _max_uV, \
+ _supply_regulator, _hpm_min, _system_uA) \
+ PM8X41_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
+ REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS \
+ | REGULATOR_CHANGE_MODE, _always_on, \
+ _supply_regulator, _hpm_min, _system_uA)
+
+#define PM8X41_VS(_id, _name, _always_on, _supply_regulator) \
+ PM8X41_VREG_INIT(_id, _name, 0, 0, 0, REGULATOR_CHANGE_STATUS, \
+ _always_on, _supply_regulator, 0, 0)
+
+/* PM8x41 regulator constraints */
+
+/* ID name a_on min_uV max_uV supply hpm_min sys_uA */
+PM8X41_SMPS(S1B, "8841_s1", 0, 900000, 1150000, NULL, 100000, 0);
+PM8X41_FTSMPS(S2B, "8841_s2", 0, 900000, 1150000, NULL, 100000, 0);
+PM8X41_SMPS(S3B, "8841_s3", 0, 1150000, 1150000, NULL, 100000, 0);
+PM8X41_FTSMPS(S4B, "8841_s4", 0, 900000, 900000, NULL, 100000, 0);
+PM8X41_FTSMPS(S5B, "8841_s5", 0, 850000, 1100000, NULL, 100000, 0);
+PM8X41_FTSMPS(S6B, "8841_s6", 0, 850000, 1100000, NULL, 100000, 0);
+PM8X41_FTSMPS(S7B, "8841_s7", 0, 850000, 1100000, NULL, 100000, 0);
+PM8X41_FTSMPS(S8B, "8841_s8", 0, 850000, 1100000, NULL, 100000, 0);
+PM8X41_SMPS(S1, "8941_s1", 0, 1300000, 1300000, NULL, 100000, 0);
+PM8X41_SMPS(S2, "8941_s2", 0, 2150000, 2150000, NULL, 100000, 0);
+PM8X41_SMPS(S3, "8941_s3", 0, 1800000, 1800000, NULL, 100000, 0);
+PM8X41_LDO(L1, "8941_l1", 0, 1225000, 1225000, "8941_s1", 100000, 0);
+PM8X41_LDO(L2, "8941_l2", 0, 1200000, 1200000, "8941_s3", 5000, 0);
+PM8X41_LDO(L3, "8941_l3", 0, 1200000, 1200000, "8941_s1", 10000, 0);
+PM8X41_LDO(L4, "8941_l4", 0, 1150000, 1150000, "8941_s1", 10000, 0);
+PM8X41_LDO(L5, "8941_l5", 0, 1800000, 1800000, "8941_s2", 1000, 0);
+PM8X41_LDO(L6, "8941_l6", 0, 1800000, 1800000, "8941_s2", 10000, 0);
+PM8X41_LDO(L7, "8941_l7", 0, 1800000, 1800000, "8941_s2", 1000, 0);
+PM8X41_LDO(L8, "8941_l8", 0, 1800000, 1800000, NULL, 1000, 0);
+PM8X41_LDO(L9, "8941_l9", 0, 1800000, 2950000, NULL, 10000, 0);
+PM8X41_LDO(L10, "8941_l10", 0, 1800000, 2950000, NULL, 10000, 0);
+PM8X41_LDO(L11, "8941_l11", 0, 1250000, 1250000, "8941_s1", 10000, 0);
+PM8X41_LDO(L12, "8941_l12", 0, 1800000, 1800000, "8941_s2", 10000, 0);
+PM8X41_LDO(L13, "8941_l13", 0, 2950000, 2950000, NULL, 10000, 0);
+PM8X41_LDO(L14, "8941_l14", 0, 1800000, 1800000, "8941_s2", 10000, 0);
+PM8X41_LDO(L15, "8941_l15", 0, 2050000, 2050000, "8941_s2", 10000, 0);
+PM8X41_LDO(L16, "8941_l16", 0, 2700000, 2700000, NULL, 10000, 0);
+PM8X41_LDO(L17, "8941_l17", 0, 2850000, 2850000, NULL, 10000, 0);
+PM8X41_LDO(L18, "8941_l18", 0, 2850000, 2850000, NULL, 10000, 0);
+PM8X41_LDO(L19, "8941_l19", 0, 2900000, 2900000, NULL, 10000, 0);
+PM8X41_LDO(L20, "8941_l20", 0, 2950000, 2950000, NULL, 10000, 0);
+PM8X41_LDO(L21, "8941_l21", 0, 2950000, 2950000, NULL, 10000, 0);
+PM8X41_LDO(L22, "8941_l22", 0, 3000000, 3000000, NULL, 10000, 0);
+PM8X41_LDO(L23, "8941_l23", 0, 3000000, 3000000, NULL, 10000, 0);
+PM8X41_LDO(L24, "8941_l24", 0, 3075000, 3075000, NULL, 5000, 0);
+
+/* ID name a_on supply */
+PM8X41_VS(LVS1, "8941_lvs1", 0, "8941_s3");
+PM8X41_VS(LVS2, "8941_lvs2", 0, "8941_s3");
+PM8X41_VS(LVS3, "8941_lvs3", 0, "8941_s3");
+
+#define VREG_DEVICE(_name, _devid) \
+ vreg_device_##_name __devinitdata = \
+ { \
+ .name = STUB_REGULATOR_DRIVER_NAME, \
+ .id = _devid, \
+ .dev = { .platform_data = &vreg_dev_##_name##_pdata }, \
+ }
+
+static struct platform_device VREG_DEVICE(S1B, 0);
+static struct platform_device VREG_DEVICE(S2B, 1);
+static struct platform_device VREG_DEVICE(S3B, 3);
+static struct platform_device VREG_DEVICE(S4B, 4);
+static struct platform_device VREG_DEVICE(S5B, 5);
+static struct platform_device VREG_DEVICE(S6B, 6);
+static struct platform_device VREG_DEVICE(S7B, 7);
+static struct platform_device VREG_DEVICE(S8B, 8);
+static struct platform_device VREG_DEVICE(S1, 9);
+static struct platform_device VREG_DEVICE(S2, 10);
+static struct platform_device VREG_DEVICE(S3, 11);
+static struct platform_device VREG_DEVICE(L1, 12);
+static struct platform_device VREG_DEVICE(L2, 13);
+static struct platform_device VREG_DEVICE(L3, 14);
+static struct platform_device VREG_DEVICE(L4, 15);
+static struct platform_device VREG_DEVICE(L5, 16);
+static struct platform_device VREG_DEVICE(L6, 17);
+static struct platform_device VREG_DEVICE(L7, 18);
+static struct platform_device VREG_DEVICE(L8, 19);
+static struct platform_device VREG_DEVICE(L9, 20);
+static struct platform_device VREG_DEVICE(L10, 21);
+static struct platform_device VREG_DEVICE(L11, 22);
+static struct platform_device VREG_DEVICE(L12, 23);
+static struct platform_device VREG_DEVICE(L13, 24);
+static struct platform_device VREG_DEVICE(L14, 25);
+static struct platform_device VREG_DEVICE(L15, 26);
+static struct platform_device VREG_DEVICE(L16, 27);
+static struct platform_device VREG_DEVICE(L17, 28);
+static struct platform_device VREG_DEVICE(L18, 29);
+static struct platform_device VREG_DEVICE(L19, 30);
+static struct platform_device VREG_DEVICE(L20, 31);
+static struct platform_device VREG_DEVICE(L21, 32);
+static struct platform_device VREG_DEVICE(L22, 33);
+static struct platform_device VREG_DEVICE(L23, 34);
+static struct platform_device VREG_DEVICE(L24, 35);
+static struct platform_device VREG_DEVICE(LVS1, 36);
+static struct platform_device VREG_DEVICE(LVS2, 37);
+static struct platform_device VREG_DEVICE(LVS3, 38);
+
+struct platform_device *msm_copper_stub_regulator_devices[] __devinitdata = {
+ &vreg_device_S1B,
+ &vreg_device_S2B,
+ &vreg_device_S3B,
+ &vreg_device_S4B,
+ &vreg_device_S5B,
+ &vreg_device_S6B,
+ &vreg_device_S7B,
+ &vreg_device_S8B,
+ &vreg_device_S1,
+ &vreg_device_S2,
+ &vreg_device_S3,
+ &vreg_device_L1,
+ &vreg_device_L2,
+ &vreg_device_L3,
+ &vreg_device_L4,
+ &vreg_device_L5,
+ &vreg_device_L6,
+ &vreg_device_L7,
+ &vreg_device_L8,
+ &vreg_device_L9,
+ &vreg_device_L10,
+ &vreg_device_L11,
+ &vreg_device_L12,
+ &vreg_device_L13,
+ &vreg_device_L14,
+ &vreg_device_L15,
+ &vreg_device_L16,
+ &vreg_device_L17,
+ &vreg_device_L18,
+ &vreg_device_L19,
+ &vreg_device_L20,
+ &vreg_device_L21,
+ &vreg_device_L22,
+ &vreg_device_L23,
+ &vreg_device_L24,
+ &vreg_device_LVS1,
+ &vreg_device_LVS2,
+ &vreg_device_LVS3,
+};
+
+int msm_copper_stub_regulator_devices_len __devinitdata =
+ ARRAY_SIZE(msm_copper_stub_regulator_devices);
diff --git a/arch/arm/mach-msm/board-copper.c b/arch/arm/mach-msm/board-copper.c
index dc26d72..97ea645 100644
--- a/arch/arm/mach-msm/board-copper.c
+++ b/arch/arm/mach-msm/board-copper.c
@@ -26,6 +26,7 @@
#ifdef CONFIG_ANDROID_PMEM
#include <linux/android_pmem.h>
#endif
+#include <linux/regulator/stub-regulator.h>
#include <asm/mach/map.h>
#include <asm/hardware/gic.h>
#include <mach/board.h>
@@ -37,7 +38,9 @@
#endif
#include <mach/msm_memtypes.h>
#include <mach/msm_smd.h>
+#include <mach/qpnp-int.h>
#include "clock.h"
+#include "devices.h"
#define MSM_KERNEL_EBI1_MEM_SIZE 0x280000
#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
@@ -356,11 +359,14 @@
platform_device_register(&ion_dev);
#endif
platform_device_register(&msm_device_smd_copper);
+ platform_add_devices(msm_copper_stub_regulator_devices,
+ msm_copper_stub_regulator_devices_len);
}
static struct of_device_id irq_match[] __initdata = {
{ .compatible = "qcom,msm-qgic2", .data = gic_of_init, },
{ .compatible = "qcom,msm-gpio", .data = msm_gpio_of_init, },
+ { .compatible = "qcom,spmi-pmic-arb", .data = qpnpint_of_init, },
{}
};
diff --git a/arch/arm/mach-msm/board-msm7627a-bt.c b/arch/arm/mach-msm/board-msm7627a-bt.c
index c70b30e..a8ab81a 100644
--- a/arch/arm/mach-msm/board-msm7627a-bt.c
+++ b/arch/arm/mach-msm/board-msm7627a-bt.c
@@ -32,7 +32,7 @@
{"bt", 21, 2900000, 3300000, 1, NULL}
};
-struct platform_device msm_bt_power_device = {
+static struct platform_device msm_bt_power_device = {
.name = "bt_power",
};
@@ -100,7 +100,7 @@
{
if (machine_is_msm7627a_qrd1())
gpio_bt_sys_rest_en = 114;
- if (machine_is_msm7627a_evb())
+ if (machine_is_msm7627a_evb() || machine_is_msm8625_evb())
gpio_bt_sys_rest_en = 16;
}
@@ -109,14 +109,36 @@
int rc = 0;
struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
+ pr_debug("%s: Setting SYS_RST_PIN(%d) to %d\n",
+ __func__, gpio_bt_sys_rest_en, on);
if (on) {
- rc = gpio_direction_output(gpio_bt_sys_rest_en, 1);
+
+ if (machine_is_msm7627a_evb()) {
+ rc = gpio_tlmm_config(GPIO_CFG(gpio_bt_sys_rest_en, 0,
+ GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
+ GPIO_CFG_2MA),
+ GPIO_CFG_ENABLE);
+
+ gpio_set_value(gpio_bt_sys_rest_en, 1);
+ } else {
+ rc = gpio_direction_output(gpio_bt_sys_rest_en, 1);
+ }
msleep(100);
} else {
+
if (!marimba_get_fm_status(&config) &&
!marimba_get_bt_status(&config)) {
- gpio_set_value_cansleep(gpio_bt_sys_rest_en, 0);
- rc = gpio_direction_input(gpio_bt_sys_rest_en);
+ if (machine_is_msm7627a_evb()) {
+ gpio_set_value(gpio_bt_sys_rest_en, 0);
+ rc = gpio_tlmm_config(GPIO_CFG(
+ gpio_bt_sys_rest_en, 0,
+ GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN,
+ GPIO_CFG_2MA),
+ GPIO_CFG_ENABLE);
+ } else {
+ gpio_set_value_cansleep(gpio_bt_sys_rest_en, 0);
+ rc = gpio_direction_input(gpio_bt_sys_rest_en);
+ }
msleep(100);
}
}
@@ -324,7 +346,8 @@
int pin, rc = 0;
if (mode == FM_I2S_ON) {
- if (machine_is_msm7x27a_surf() || machine_is_msm7625a_surf())
+ if (machine_is_msm7x27a_surf() || machine_is_msm7625a_surf()
+ || machine_is_msm8625_surf())
config_pcm_i2s_mode(0);
pr_err("%s mode = FM_I2S_ON", __func__);
@@ -367,7 +390,8 @@
int pin, rc = 0;
if (mode == BT_PCM_ON) {
- if (machine_is_msm7x27a_surf() || machine_is_msm7625a_surf())
+ if (machine_is_msm7x27a_surf() || machine_is_msm7625a_surf()
+ || machine_is_msm8625_surf())
config_pcm_i2s_mode(1);
pr_err("%s mode =BT_PCM_ON", __func__);
rc = switch_pcm_i2s_reg_mode(1);
@@ -940,9 +964,20 @@
gpio_bt_config();
- i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
- bahama_devices,
- ARRAY_SIZE(bahama_devices));
+ rc = i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
+ bahama_devices,
+ ARRAY_SIZE(bahama_devices));
+ if (rc < 0) {
+ pr_err("%s: I2C Register failed\n", __func__);
+ return;
+ }
+
+ rc = platform_device_register(&msm_bt_power_device);
+ if (rc < 0) {
+ pr_err("%s: device register failed\n", __func__);
+ return;
+ }
+
dev = &msm_bt_power_device.dev;
for (i = 0; i < ARRAY_SIZE(bt_vregs); i++) {
@@ -964,6 +999,6 @@
regulator_put(bt_vregs[i].reg);
bt_vregs[i].reg = NULL;
}
- return;
+ platform_device_unregister(&msm_bt_power_device);
}
#endif
diff --git a/arch/arm/mach-msm/board-msm7627a-camera.c b/arch/arm/mach-msm/board-msm7627a-camera.c
index 77af5e2..7fecf59 100644
--- a/arch/arm/mach-msm/board-msm7627a-camera.c
+++ b/arch/arm/mach-msm/board-msm7627a-camera.c
@@ -24,6 +24,12 @@
#include "board-msm7627a.h"
#include <mach/vreg.h>
+#define GPIO_SKU1_CAM_VGA_SHDN 18
+#define GPIO_SKU1_CAM_VGA_RESET_N 29
+#define GPIO_SKU3_CAM_5MP_SHDN_N 5 /* PWDN */
+#define GPIO_SKU3_CAM_5MP_CAMIF_RESET 6 /* (board_is(EVT))?123:121 RESET */
+#define GPIO_SKU3_CAM_5MP_CAM_DRIVER_PWDN 30
+
#ifdef CONFIG_MSM_CAMERA_V4L2
static uint32_t camera_off_gpio_table[] = {
GPIO_CFG(15, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
@@ -33,6 +39,55 @@
GPIO_CFG(15, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
};
+static struct gpio s5k4e1_cam_req_gpio[] = {
+ {GPIO_CAM_GP_CAMIF_RESET_N, GPIOF_DIR_OUT, "CAM_RESET"},
+};
+
+static struct msm_gpio_set_tbl s5k4e1_cam_gpio_set_tbl[] = {
+ {GPIO_CAM_GP_CAMIF_RESET_N, GPIOF_OUT_INIT_LOW, 1000},
+ {GPIO_CAM_GP_CAMIF_RESET_N, GPIOF_OUT_INIT_HIGH, 4000},
+};
+
+static struct msm_camera_gpio_conf gpio_conf_s5k4e1 = {
+ .camera_off_table = camera_off_gpio_table,
+ .camera_off_table_size = ARRAY_SIZE(camera_off_gpio_table),
+ .camera_on_table = camera_on_gpio_table,
+ .camera_on_table_size = ARRAY_SIZE(camera_on_gpio_table),
+ .cam_gpio_req_tbl = s5k4e1_cam_req_gpio,
+ .cam_gpio_req_tbl_size = ARRAY_SIZE(s5k4e1_cam_req_gpio),
+ .cam_gpio_set_tbl = s5k4e1_cam_gpio_set_tbl,
+ .cam_gpio_set_tbl_size = ARRAY_SIZE(s5k4e1_cam_gpio_set_tbl),
+ .gpio_no_mux = 1,
+};
+
+static struct msm_camera_gpio_conf gpio_conf_mt9e013 = {
+ .camera_off_table = camera_off_gpio_table,
+ .camera_on_table = camera_on_gpio_table,
+ .gpio_no_mux = 1,
+};
+
+static struct msm_camera_gpio_conf gpio_conf_ov9726 = {
+ .camera_off_table = camera_off_gpio_table,
+ .camera_on_table = camera_on_gpio_table,
+ .gpio_no_mux = 1,
+};
+
+#ifdef CONFIG_WEBCAM_OV7692_QRD
+static struct msm_camera_gpio_conf gpio_conf_ov7692 = {
+ .camera_off_table = camera_off_gpio_table,
+ .camera_on_table = camera_on_gpio_table,
+ .gpio_no_mux = 1,
+};
+#endif
+
+#ifdef CONFIG_OV5647
+static struct msm_camera_gpio_conf gpio_conf_ov5647 = {
+ .camera_off_table = camera_off_gpio_table,
+ .camera_on_table = camera_on_gpio_table,
+ .gpio_no_mux = 1,
+};
+#endif
+
#ifdef CONFIG_MSM_CAMERA_FLASH
static struct msm_camera_sensor_flash_src msm_flash_src = {
.flash_sr_type = MSM_CAMERA_FLASH_SRC_EXT,
@@ -41,111 +96,22 @@
};
#endif
-static struct regulator_bulk_data regs_camera[] = {
- { .supply = "msme1", .min_uV = 1800000, .max_uV = 1800000 },
- { .supply = "gp2", .min_uV = 2850000, .max_uV = 2850000 },
- { .supply = "usb2", .min_uV = 1800000, .max_uV = 1800000 },
+static struct camera_vreg_t msm_cam_vreg[] = {
+ {"msme1", REG_LDO, 1800000, 1800000, 0},
+ {"gp2", REG_LDO, 2850000, 2850000, 0},
+ {"usb2", REG_LDO, 1800000, 1800000, 0},
};
-static void msm_camera_vreg_config(int vreg_en)
-{
- int rc = vreg_en ?
- regulator_bulk_enable(ARRAY_SIZE(regs_camera), regs_camera) :
- regulator_bulk_disable(ARRAY_SIZE(regs_camera), regs_camera);
-
- if (rc)
- pr_err("%s: could not %sable regulators: %d\n",
- __func__, vreg_en ? "en" : "dis", rc);
-}
-
-static int config_gpio_table(uint32_t *table, int len)
-{
- int rc = 0, i = 0;
-
- for (i = 0; i < len; i++) {
- rc = gpio_tlmm_config(table[i], GPIO_CFG_ENABLE);
- if (rc) {
- pr_err("%s not able to get gpio\n", __func__);
- for (i--; i >= 0; i--)
- gpio_tlmm_config(camera_off_gpio_table[i],
- GPIO_CFG_ENABLE);
- break;
- }
- }
- return rc;
-}
-
static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data;
-/* TODO: static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data; */
-static int config_camera_on_gpios_rear(void)
-{
- int rc = 0;
-
- if (machine_is_msm7x27a_ffa() || machine_is_msm7625a_ffa())
- msm_camera_vreg_config(1);
-
- rc = config_gpio_table(camera_on_gpio_table,
- ARRAY_SIZE(camera_on_gpio_table));
- if (rc < 0) {
- pr_err("%s: CAMSENSOR gpio table request"
- "failed\n", __func__);
- return rc;
- }
-
- return rc;
-}
-
-static void config_camera_off_gpios_rear(void)
-{
- if (machine_is_msm7x27a_ffa() || machine_is_msm7625a_ffa())
- msm_camera_vreg_config(0);
-
- config_gpio_table(camera_off_gpio_table,
- ARRAY_SIZE(camera_off_gpio_table));
-}
-
-static int config_camera_on_gpios_front(void)
-{
- int rc = 0;
-
- if (machine_is_msm7x27a_ffa() || machine_is_msm7625a_ffa())
- msm_camera_vreg_config(1);
-
- rc = config_gpio_table(camera_on_gpio_table,
- ARRAY_SIZE(camera_on_gpio_table));
- if (rc < 0) {
- pr_err("%s: CAMSENSOR gpio table request"
- "failed\n", __func__);
- return rc;
- }
-
- return rc;
-}
-
-static void config_camera_off_gpios_front(void)
-{
- if (machine_is_msm7x27a_ffa() || machine_is_msm7625a_ffa())
- msm_camera_vreg_config(0);
-
- config_gpio_table(camera_off_gpio_table,
- ARRAY_SIZE(camera_off_gpio_table));
-}
struct msm_camera_device_platform_data msm_camera_device_data_csi1 = {
- .camera_gpio_on = config_camera_on_gpios_rear,
- .camera_gpio_off = config_camera_off_gpios_rear,
- .ioclk.mclk_clk_rate = 24000000,
- .ioclk.vfe_clk_rate = 192000000,
.csid_core = 1,
.is_csic = 1,
};
struct msm_camera_device_platform_data msm_camera_device_data_csi0 = {
- .camera_gpio_on = config_camera_on_gpios_front,
- .camera_gpio_off = config_camera_off_gpios_front,
- .ioclk.mclk_clk_rate = 24000000,
- .ioclk.vfe_clk_rate = 192000000,
.csid_core = 0,
+ .is_csic = 1,
};
#ifdef CONFIG_DW9712_ACT
@@ -169,10 +135,9 @@
static struct msm_camera_sensor_platform_info sensor_board_info_s5k4e1 = {
.mount_angle = 90,
- .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N,
- .sensor_pwd = 85,
- .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
- .vcm_enable = 1,
+ .cam_vreg = msm_cam_vreg,
+ .num_vreg = ARRAY_SIZE(msm_cam_vreg),
+ .gpio_conf = &gpio_conf_s5k4e1,
};
static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data = {
@@ -190,6 +155,83 @@
};
#endif
+#ifdef CONFIG_WEBCAM_OV7692_QRD
+static struct msm_camera_sensor_platform_info sensor_board_info_ov7692 = {
+ .mount_angle = 90,
+ .cam_vreg = msm_cam_vreg,
+ .num_vreg = ARRAY_SIZE(msm_cam_vreg),
+ .gpio_conf = &gpio_conf_ov7692,
+};
+
+static struct msm_camera_sensor_flash_data flash_ov7692 = {
+ .flash_type = MSM_CAMERA_FLASH_NONE,
+};
+
+static struct msm_camera_sensor_info msm_camera_sensor_ov7692_data = {
+ .sensor_name = "ov7692",
+ .sensor_reset_enable = 0,
+ .pmic_gpio_enable = 1,
+ .sensor_reset = GPIO_SKU1_CAM_VGA_RESET_N,
+ .sensor_pwd = GPIO_SKU1_CAM_VGA_SHDN,
+ .pdata = &msm_camera_device_data_csi0,
+ .flash_data = &flash_ov7692,
+ .sensor_platform_info = &sensor_board_info_ov7692,
+ .csi_if = 1,
+ .camera_type = FRONT_CAMERA_2D,
+};
+#endif
+
+#ifdef CONFIG_OV5647
+
+#ifdef CONFIG_AD5046_ACT
+static struct i2c_board_info ad5046_actuator_i2c_info = {
+ I2C_BOARD_INFO("ad5046_act", 0x18 >> 1),
+};
+
+static struct msm_actuator_info ad5046_actuator_info = {
+ .board_info = &ad5046_actuator_i2c_info,
+ .bus_id = MSM_GSBI0_QUP_I2C_BUS_ID,
+ .vcm_pwd = GPIO_SKU3_CAM_5MP_CAM_DRIVER_PWDN,
+ .vcm_enable = 1,
+};
+#endif
+
+static struct msm_camera_sensor_platform_info sensor_board_info_ov5647 = {
+ .mount_angle = 90,
+ .cam_vreg = msm_cam_vreg,
+ .num_vreg = ARRAY_SIZE(msm_cam_vreg),
+ .gpio_conf = &gpio_conf_ov5647,
+};
+
+static struct msm_camera_sensor_flash_src msm_flash_src_ov5647 = {
+ .flash_sr_type = MSM_CAMERA_FLASH_SRC_LED,
+ ._fsrc.led_src.led_name = "flashlight",
+ ._fsrc.led_src.led_name_len = 10,
+};
+
+static struct msm_camera_sensor_flash_data flash_ov5647 = {
+ .flash_type = MSM_CAMERA_FLASH_LED,
+ .flash_src = &msm_flash_src_ov5647,
+};
+
+static struct msm_camera_sensor_info msm_camera_sensor_ov5647_data = {
+ .sensor_name = "ov5647",
+ .sensor_reset_enable = 1,
+ .pmic_gpio_enable = 1,
+ .sensor_reset = GPIO_SKU3_CAM_5MP_CAMIF_RESET,
+ .sensor_pwd = GPIO_SKU3_CAM_5MP_SHDN_N,
+ .pdata = &msm_camera_device_data_csi1,
+ .flash_data = &flash_ov5647,
+ .sensor_platform_info = &sensor_board_info_ov5647,
+ .csi_if = 1,
+ .camera_type = BACK_CAMERA_2D,
+
+#ifdef CONFIG_AD5046_ACT
+ .actuator_info = &ad5046_actuator_info
+#endif
+};
+
+#endif
#ifdef CONFIG_MT9E013
static struct msm_camera_sensor_flash_data flash_mt9e013 = {
.flash_type = MSM_CAMERA_FLASH_LED,
@@ -198,10 +240,9 @@
static struct msm_camera_sensor_platform_info sensor_board_info_mt9e013 = {
.mount_angle = 90,
- .sensor_reset = 0,
- .sensor_pwd = 85,
- .vcm_pwd = 1,
- .vcm_enable = 0,
+ .cam_vreg = msm_cam_vreg,
+ .num_vreg = ARRAY_SIZE(msm_cam_vreg),
+ .gpio_conf = &gpio_conf_mt9e013,
};
static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
@@ -216,38 +257,6 @@
};
#endif
-#ifdef CONFIG_IMX072
-static struct msm_camera_sensor_platform_info imx072_sensor_7627a_info = {
- .mount_angle = 90
-};
-
-static struct msm_camera_sensor_flash_data flash_imx072 = {
- .flash_type = MSM_CAMERA_FLASH_LED,
- .flash_src = &msm_flash_src
-};
-
-static struct msm_camera_sensor_info msm_camera_sensor_imx072_data = {
- .sensor_name = "imx072",
- .sensor_reset_enable = 1,
- .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N, /* TODO 106,*/
- .pmic_gpio_enable = 0,
- .sensor_pwd = 85,
- .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
- .vcm_enable = 1,
- .pdata = &msm_camera_device_data_csi1,
- .flash_data = &flash_imx072,
- .sensor_platform_info = &imx072_sensor_7627a_info,
- .csi_if = 1
-};
-
-static struct platform_device msm_camera_sensor_imx072 = {
- .name = "msm_camera_imx072",
- .dev = {
- .platform_data = &msm_camera_sensor_imx072_data,
- },
-};
-#endif
-
#ifdef CONFIG_WEBCAM_OV9726
static struct msm_camera_sensor_flash_data flash_ov9726 = {
.flash_type = MSM_CAMERA_FLASH_LED,
@@ -256,10 +265,9 @@
static struct msm_camera_sensor_platform_info sensor_board_info_ov9726 = {
.mount_angle = 90,
- .sensor_reset = GPIO_CAM_GP_CAM1MP_XCLR,
- .sensor_pwd = 85,
- .vcm_pwd = 1,
- .vcm_enable = 0,
+ .cam_vreg = msm_cam_vreg,
+ .num_vreg = ARRAY_SIZE(msm_cam_vreg),
+ .gpio_conf = &gpio_conf_ov9726,
};
static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
@@ -276,36 +284,51 @@
static void __init msm7x27a_init_cam(void)
{
- platform_device_register(&msm7x27a_device_csic0);
- platform_device_register(&msm7x27a_device_csic1);
+ if (!(machine_is_msm7x27a_ffa() || machine_is_msm7625a_ffa()
+ || machine_is_msm7627a_qrd1())) {
+ sensor_board_info_s5k4e1.cam_vreg = NULL;
+ sensor_board_info_s5k4e1.num_vreg = 0;
+ sensor_board_info_mt9e013.cam_vreg = NULL;
+ sensor_board_info_mt9e013.num_vreg = 0;
+ sensor_board_info_ov9726.cam_vreg = NULL;
+ sensor_board_info_ov9726.num_vreg = 0;
+ sensor_board_info_ov7692.cam_vreg = NULL;
+ sensor_board_info_ov7692.num_vreg = 0;
+ sensor_board_info_ov5647.cam_vreg = NULL;
+ sensor_board_info_ov5647.num_vreg = 0;
+ }
+ if (machine_is_msm8625_surf() || machine_is_msm8625_evb()) {
+ platform_device_register(&msm8625_device_csic0);
+ platform_device_register(&msm8625_device_csic1);
+ } else {
+ platform_device_register(&msm7x27a_device_csic0);
+ platform_device_register(&msm7x27a_device_csic1);
+ }
platform_device_register(&msm7x27a_device_clkctl);
platform_device_register(&msm7x27a_device_vfe);
}
static struct i2c_board_info i2c_camera_devices[] = {
- #ifdef CONFIG_S5K4E1
{
I2C_BOARD_INFO("s5k4e1", 0x36),
.platform_data = &msm_camera_sensor_s5k4e1_data,
},
- #endif
- #ifdef CONFIG_WEBCAM_OV9726
{
I2C_BOARD_INFO("ov9726", 0x10),
.platform_data = &msm_camera_sensor_ov9726_data,
},
- #endif
- #ifdef CONFIG_IMX072
- {
- I2C_BOARD_INFO("imx072", 0x34),
- },
- #endif
- #ifdef CONFIG_MT9E013
{
I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
.platform_data = &msm_camera_sensor_mt9e013_data,
},
- #endif
+ {
+ I2C_BOARD_INFO("ov7692", 0x78),
+ .platform_data = &msm_camera_sensor_ov7692_data,
+ },
+ {
+ I2C_BOARD_INFO("ov5647", 0x36 << 1),
+ .platform_data = &msm_camera_sensor_ov5647_data,
+ },
{
I2C_BOARD_INFO("sc628a", 0x6E),
},
@@ -389,13 +412,7 @@
gpio_direction_output(QRD_GPIO_CAM_5MP_RESET, 1);
gpio_direction_output(QRD_GPIO_CAM_3MP_PWDN, 1);
}
-
-#define GPIO_SKU3_CAM_5MP_SHDN_N 5 /* PWDN */
-#define GPIO_SKU3_CAM_5MP_CAMIF_RESET 6 /* (board_is(EVT))?123:121 RESET */
-#define GPIO_SKU3_CAM_5MP_CAM_DRIVER_PWDN 30
-
-#define GPIO_SKU1_CAM_VGA_SHDN 18
-#define GPIO_SKU1_CAM_VGA_RESET_N 29
+#endif
static void evb_camera_gpio_cfg(void)
{
@@ -469,6 +486,8 @@
}
+#ifndef CONFIG_MSM_CAMERA_V4L2
+
static void msm_camera_vreg_config(int vreg_en)
{
int rc = vreg_en ?
@@ -603,7 +622,7 @@
.pmic_gpio_enable = 1,
.sensor_pwd = GPIO_SKU3_CAM_5MP_SHDN_N,
.vcm_pwd = GPIO_SKU3_CAM_5MP_CAM_DRIVER_PWDN,
- .vcm_enable = 0,
+ .vcm_enable = 1,
.pdata = &msm_camera_device_data_rear,
.flash_data = &flash_ov5647,
.sensor_platform_info = &ov5647_sensor_7627a_info,
@@ -1034,23 +1053,27 @@
}
EXPORT_SYMBOL(lcd_camera_power_onoff);
-
void __init msm7627a_camera_init(void)
{
+
+#ifndef CONFIG_MSM_CAMERA_V4L2
int rc;
+#endif
pr_debug("msm7627a_camera_init Entered\n");
/* LCD and camera power (VREG & LDO) init */
- if (machine_is_msm7627a_evb())
+ if (machine_is_msm7627a_evb() || machine_is_msm8625_evb()) {
+ evb_camera_gpio_cfg();
lcd_camera_power_init();
+ }
+
#ifndef CONFIG_MSM_CAMERA_V4L2
if (machine_is_msm7627a_qrd1()) {
qrd1_camera_gpio_cfg();
platform_add_devices(camera_devices_qrd,
ARRAY_SIZE(camera_devices_qrd));
- } else if (machine_is_msm7627a_evb()) {
- evb_camera_gpio_cfg();
+ } else if (machine_is_msm7627a_evb() || machine_is_msm8625_evb()) {
platform_add_devices(camera_devices_evb,
ARRAY_SIZE(camera_devices_evb));
} else if (machine_is_msm7627a_qrd3())
@@ -1059,8 +1082,10 @@
platform_add_devices(camera_devices_msm,
ARRAY_SIZE(camera_devices_msm));
#endif
- if (!machine_is_msm7627a_qrd1() || !machine_is_msm7627a_evb())
+ if (!machine_is_msm7627a_qrd1() || !machine_is_msm7627a_evb()
+ || !machine_is_msm8625_evb())
register_i2c_devices();
+#ifndef CONFIG_MSM_CAMERA_V4L2
rc = regulator_bulk_get(NULL, ARRAY_SIZE(regs_camera), regs_camera);
if (rc) {
@@ -1074,6 +1099,7 @@
pr_err("%s: could not set voltages: %d\n", __func__, rc);
return;
}
+#endif
#if defined(CONFIG_MSM_CAMERA_V4L2)
msm7x27a_init_cam();
@@ -1083,13 +1109,14 @@
i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
i2c_camera_devices_qrd,
ARRAY_SIZE(i2c_camera_devices_qrd));
- } else if (machine_is_msm7627a_evb()) {
+ } else if (machine_is_msm7627a_evb() || machine_is_msm8625_evb()) {
pr_debug("machine_is_msm7627a_evb i2c_register_board_info\n");
i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
i2c_camera_devices_evb,
ARRAY_SIZE(i2c_camera_devices_evb));
} else
#endif
+ pr_debug("i2c_register_board_info\n");
i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
i2c_camera_devices,
ARRAY_SIZE(i2c_camera_devices));
diff --git a/arch/arm/mach-msm/board-msm7627a-display.c b/arch/arm/mach-msm/board-msm7627a-display.c
index 4e856b1..bf1a4c5 100644
--- a/arch/arm/mach-msm/board-msm7627a-display.c
+++ b/arch/arm/mach-msm/board-msm7627a-display.c
@@ -208,7 +208,6 @@
}
};
-#define PANEL_NAME_MAX_LEN 30
#define LCDC_TOSHIBA_FWVGA_PANEL_NAME "lcdc_toshiba_fwvga_pt"
#define MIPI_CMD_RENESAS_FWVGA_PANEL_NAME "mipi_cmd_renesas_fwvga"
@@ -216,7 +215,8 @@
{
int ret = -ENODEV;
- if (machine_is_msm7x27a_surf() || machine_is_msm7625a_surf()) {
+ if (machine_is_msm7x27a_surf() || machine_is_msm7625a_surf() ||
+ machine_is_msm8625_surf()) {
if (!strncmp(name, "lcdc_toshiba_fwvga_pt", 21) ||
!strncmp(name, "mipi_cmd_renesas_fwvga", 22))
ret = 0;
@@ -226,7 +226,7 @@
} else if (machine_is_msm7627a_qrd1()) {
if (!strncmp(name, "mipi_video_truly_wvga", 21))
ret = 0;
- } else if (machine_is_msm7627a_evb()) {
+ } else if (machine_is_msm7627a_evb() || machine_is_msm8625_evb()) {
if (!strncmp(name, "mipi_cmd_nt35510_wvga", 21))
ret = 0;
}
@@ -235,7 +235,8 @@
!defined(CONFIG_FB_MSM_MIPI_PANEL_AUTO_DETECT) && \
!defined(CONFIG_FB_MSM_LCDC_MIPI_PANEL_AUTO_DETECT)
if (machine_is_msm7x27a_surf() ||
- machine_is_msm7625a_surf()) {
+ machine_is_msm7625a_surf() ||
+ machine_is_msm8625_surf()) {
if (!strncmp(name, LCDC_TOSHIBA_FWVGA_PANEL_NAME,
strnlen(LCDC_TOSHIBA_FWVGA_PANEL_NAME,
PANEL_NAME_MAX_LEN)))
@@ -427,7 +428,8 @@
gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
if (!rc) {
- if (machine_is_msm7x27a_surf() || machine_is_msm7625a_surf()) {
+ if (machine_is_msm7x27a_surf() || machine_is_msm7625a_surf()
+ || machine_is_msm8625_surf()) {
lcdc_reset_ptr = ioremap_nocache(LCDC_RESET_PHYS,
sizeof(uint32_t));
@@ -533,19 +535,6 @@
return rc;
}
- rc = gpio_tlmm_config(qrd3_mipi_dsi_gpio[0], GPIO_CFG_ENABLE);
- if (rc < 0) {
- pr_err("Failed to enable LCD Bridge reset enable\n");
- return rc;
- }
-
- rc = gpio_direction_output(GPIO_QRD3_LCD_BRDG_RESET_N, 1);
- if (rc < 0) {
- pr_err("Failed GPIO bridge Reset\n");
- gpio_free(GPIO_QRD3_LCD_BRDG_RESET_N);
- return rc;
- }
-
return rc;
}
@@ -555,7 +544,7 @@
if (machine_is_msm7627a_qrd1())
rc = msm_fb_dsi_client_qrd1_reset();
- else if (machine_is_msm7627a_evb())
+ else if (machine_is_msm7627a_evb() || machine_is_msm8625_evb())
rc = msm_fb_dsi_client_qrd3_reset();
else
rc = msm_fb_dsi_client_msm_reset();
@@ -586,7 +575,8 @@
return rc;
}
- if (machine_is_msm7x27a_surf() || machine_is_msm7625a_surf()) {
+ if (machine_is_msm7x27a_surf() || machine_is_msm7625a_surf()
+ || machine_is_msm8625_surf()) {
rc = gpio_direction_output(GPIO_DISPLAY_PWR_EN, 1);
if (rc < 0) {
pr_err("failed to enable display pwr\n");
@@ -625,7 +615,8 @@
dsi_gpio_initialized = 1;
}
- if (machine_is_msm7x27a_surf() || machine_is_msm7625a_surf()) {
+ if (machine_is_msm7x27a_surf() || machine_is_msm7625a_surf() ||
+ machine_is_msm8625_surf()) {
gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN, on);
gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, on);
} else if (machine_is_msm7x27a_ffa() ||
@@ -649,7 +640,8 @@
gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
if (machine_is_msm7x27a_surf() ||
- machine_is_msm7625a_surf()) {
+ machine_is_msm7625a_surf() ||
+ machine_is_msm8625_surf()) {
lcdc_reset_cfg = readl_relaxed(lcdc_reset_ptr);
rmb();
lcdc_reset_cfg &= ~1;
@@ -800,12 +792,30 @@
gpio_set_value_cansleep(GPIO_QRD3_LCD_EXT_1V8_EN, !!on);
if (on) {
- gpio_set_value_cansleep(GPIO_QRD3_LCD_BRDG_RESET_N, 1);
+ rc = gpio_tlmm_config(qrd3_mipi_dsi_gpio[0], GPIO_CFG_ENABLE);
+
+ if (rc < 0) {
+ pr_err("Failed to enable LCD Bridge reset enable\n");
+ return rc;
+ }
+
+ rc = gpio_direction_output(GPIO_QRD3_LCD_BRDG_RESET_N, 1);
+
+ if (rc < 0) {
+ pr_err("Failed GPIO bridge Reset\n");
+ gpio_free(GPIO_QRD3_LCD_BRDG_RESET_N);
+ return rc;
+ }
+
msleep(20);
gpio_set_value_cansleep(GPIO_QRD3_LCD_BRDG_RESET_N, 0);
msleep(20);
gpio_set_value_cansleep(GPIO_QRD3_LCD_BRDG_RESET_N, 1);
msleep(20);
+ } else {
+ gpio_tlmm_config(GPIO_CFG(GPIO_QRD3_LCD_BRDG_RESET_N, 0,
+ GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
+ GPIO_CFG_DISABLE);
}
return rc;
@@ -817,7 +827,7 @@
if (machine_is_msm7627a_qrd1())
rc = mipi_dsi_panel_qrd1_power(on);
- else if (machine_is_msm7627a_evb())
+ else if (machine_is_msm7627a_evb() || machine_is_msm8625_evb())
rc = mipi_dsi_panel_qrd3_power(on);
else
rc = mipi_dsi_panel_msm_power(on);
@@ -840,7 +850,7 @@
if (machine_is_msm7627a_qrd1())
platform_add_devices(qrd_fb_devices,
ARRAY_SIZE(qrd_fb_devices));
- else if (machine_is_msm7627a_evb())
+ else if (machine_is_msm7627a_evb() || machine_is_msm8625_evb())
platform_add_devices(evb_fb_devices,
ARRAY_SIZE(evb_fb_devices));
else if (machine_is_msm7627a_qrd3())
@@ -850,7 +860,8 @@
ARRAY_SIZE(msm_fb_devices));
msm_fb_register_device("mdp", &mdp_pdata);
- if (machine_is_msm7625a_surf() || machine_is_msm7x27a_surf())
+ if (machine_is_msm7625a_surf() || machine_is_msm7x27a_surf() ||
+ machine_is_msm8625_surf())
msm_fb_register_device("lcdc", &lcdc_pdata);
#ifdef CONFIG_FB_MSM_MDP303
msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
diff --git a/arch/arm/mach-msm/board-msm7627a-storage.c b/arch/arm/mach-msm/board-msm7627a-storage.c
index a10d81a..e4ee52e 100644
--- a/arch/arm/mach-msm/board-msm7627a-storage.c
+++ b/arch/arm/mach-msm/board-msm7627a-storage.c
@@ -19,6 +19,7 @@
#include <mach/board.h>
#include "devices.h"
+#include "pm.h"
#include "board-msm7627a.h"
#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
@@ -26,6 +27,7 @@
|| defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
|| defined(CONFIG_MMC_MSM_SDC4_SUPPORT))
+#define MAX_SDCC_CONTROLLER 4
static unsigned long vreg_sts, gpio_sts;
struct sdcc_gpio {
@@ -148,11 +150,12 @@
static int gpio_sdc1_hw_det = 85;
static void gpio_sdc1_config(void)
{
- if (machine_is_msm7627a_qrd1() || machine_is_msm7627a_evb())
+ if (machine_is_msm7627a_qrd1() || machine_is_msm7627a_evb()
+ || machine_is_msm8625_evb())
gpio_sdc1_hw_det = 42;
}
-static struct regulator *sdcc_vreg_data[ARRAY_SIZE(sdcc_cfg_data)];
+static struct regulator *sdcc_vreg_data[MAX_SDCC_CONTROLLER];
static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
{
int rc = 0;
@@ -249,7 +252,8 @@
status = gpio_direction_input(gpio_sdc1_hw_det);
if (!status) {
if (machine_is_msm7627a_qrd1() ||
- machine_is_msm7627a_evb())
+ machine_is_msm7627a_evb() ||
+ machine_is_msm8625_evb())
status = !gpio_get_value(gpio_sdc1_hw_det);
else
status = gpio_get_value(gpio_sdc1_hw_det);
@@ -365,6 +369,8 @@
#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
if (mmc_regulator_init(3, "emmc", 3000000))
return;
+ sdc3_plat_data.swfi_latency = msm7627a_power_collapse_latency(
+ MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT);
msm_add_sdcc(3, &sdc3_plat_data);
#endif
/* Micro-SD slot */
@@ -373,18 +379,20 @@
if (mmc_regulator_init(1, "mmc", 2850000))
return;
sdc1_plat_data.status_irq = MSM_GPIO_TO_INT(gpio_sdc1_hw_det);
+ sdc1_plat_data.swfi_latency = msm7627a_power_collapse_latency(
+ MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT);
msm_add_sdcc(1, &sdc1_plat_data);
#endif
/* SDIO WLAN slot */
#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
- if (mmc_regulator_init(2, "mmc", 2850000))
+ if (mmc_regulator_init(2, "smps3", 1800000))
return;
msm_add_sdcc(2, &sdc2_plat_data);
#endif
/* Not Used */
#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
&& !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
- if (mmc_regulator_init(4, "mmc", 2850000))
+ if (mmc_regulator_init(4, "smps3", 1800000))
return;
msm_add_sdcc(4, &sdc4_plat_data);
#endif
diff --git a/arch/arm/mach-msm/board-msm7627a-wlan.c b/arch/arm/mach-msm/board-msm7627a-wlan.c
index 6df7626..53d3c56 100644
--- a/arch/arm/mach-msm/board-msm7627a-wlan.c
+++ b/arch/arm/mach-msm/board-msm7627a-wlan.c
@@ -48,7 +48,8 @@
int gpio_wlan_sys_rest_en = 134;
static void gpio_wlan_config(void)
{
- if (machine_is_msm7627a_qrd1() || machine_is_msm7627a_evb())
+ if (machine_is_msm7627a_qrd1() || machine_is_msm7627a_evb()
+ || machine_is_msm8625_evb())
gpio_wlan_sys_rest_en = 124;
}
@@ -229,7 +230,8 @@
* gpio_wlan_sys_rest_en is not from the GPIO expander for QRD7627a,
* EVB1.0 and QRD8625,so the below step is required for those devices.
*/
- if (machine_is_msm7627a_qrd1() || machine_is_msm7627a_evb()) {
+ if (machine_is_msm7627a_qrd1() || machine_is_msm7627a_evb()
+ || machine_is_msm8625_evb()) {
rc = gpio_tlmm_config(GPIO_CFG(gpio_wlan_sys_rest_en, 0,
GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
GPIO_CFG_2MA), GPIO_CFG_ENABLE);
@@ -302,7 +304,8 @@
* gpio_wlan_sys_rest_en is not from the GPIO expander for QRD7627a,
* EVB1.0 and QRD8625,so the below step is required for those devices.
*/
- if (machine_is_msm7627a_qrd1() || machine_is_msm7627a_evb()) {
+ if (machine_is_msm7627a_qrd1() || machine_is_msm7627a_evb()
+ || machine_is_msm8625_evb()) {
rc = gpio_tlmm_config(GPIO_CFG(gpio_wlan_sys_rest_en, 0,
GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
GPIO_CFG_2MA), GPIO_CFG_ENABLE);
diff --git a/arch/arm/mach-msm/board-msm7627a.h b/arch/arm/mach-msm/board-msm7627a.h
index b0481a0..bde9b61 100644
--- a/arch/arm/mach-msm/board-msm7627a.h
+++ b/arch/arm/mach-msm/board-msm7627a.h
@@ -13,6 +13,7 @@
#ifndef __ARCH_ARM_MACH_MSM_BOARD_7627A__
#define __ARCH_ARM_MACH_MSM_BOARD_7627A__
+#include "pm.h"
void __init msm7627a_init_mmc(void);
void __init msm_msm7627a_allocate_memory_regions(void);
@@ -65,6 +66,7 @@
QRD_GPIO_CAM_GP_CAMIF_RESET,
};
+#define ADSP_RPC_PROG 0x3000000a
#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
#define FPGA_MSM_CNTRL_REG2 0x90008010
@@ -97,11 +99,9 @@
struct regulator *reg;
};
-extern struct platform_device msm_bt_power_device;
-
void __init msm7627a_bt_power_init(void);
#endif
void __init msm7627a_camera_init(void);
-
+u32 msm7627a_power_collapse_latency(enum msm_pm_sleep_mode);
#endif
diff --git a/arch/arm/mach-msm/board-msm7x27.c b/arch/arm/mach-msm/board-msm7x27.c
index d5d8edc..34ae4c8 100644
--- a/arch/arm/mach-msm/board-msm7x27.c
+++ b/arch/arm/mach-msm/board-msm7x27.c
@@ -92,6 +92,7 @@
#define PMEM_KERNEL_EBI1_SIZE 0x1C000
#endif
+#define ADSP_RPC_PROG 0x3000000a
static struct resource smc91x_resources[] = {
[0] = {
@@ -1731,6 +1732,25 @@
}
}
+static void msm_adsp_add_pdev(void)
+{
+ int rc = 0;
+ struct rpc_board_dev *rpc_adsp_pdev;
+
+ rpc_adsp_pdev = kzalloc(sizeof(struct rpc_board_dev), GFP_KERNEL);
+ if (rpc_adsp_pdev == NULL) {
+ pr_err("%s: Memory Allocation failure\n", __func__);
+ return;
+ }
+ rpc_adsp_pdev->prog = ADSP_RPC_PROG;
+ rpc_adsp_pdev->pdev = msm_adsp_device;
+ rc = msm_rpc_add_board_dev(rpc_adsp_pdev, 1);
+ if (rc < 0) {
+ pr_err("%s: return val: %d\n", __func__, rc);
+ kfree(rpc_adsp_pdev);
+ }
+}
+
static void __init msm7x2x_init(void)
{
@@ -1797,6 +1817,7 @@
#ifdef CONFIG_MSM_CAMERA
config_camera_off_gpios(); /* might not be necessary */
#endif
+ msm_adsp_add_pdev();
msm_device_i2c_init();
i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
diff --git a/arch/arm/mach-msm/board-msm7x27a.c b/arch/arm/mach-msm/board-msm7x27a.c
index a6b29dc..d07703b 100644
--- a/arch/arm/mach-msm/board-msm7x27a.c
+++ b/arch/arm/mach-msm/board-msm7x27a.c
@@ -14,6 +14,7 @@
#include <linux/gpio_event.h>
#include <linux/memblock.h>
#include <asm/mach-types.h>
+#include <linux/memblock.h>
#include <asm/mach/arch.h>
#include <asm/hardware/gic.h>
#include <mach/board.h>
@@ -93,7 +94,8 @@
static void __init register_i2c_devices(void)
{
- if (machine_is_msm7x27a_surf() || machine_is_msm7625a_surf())
+ if (machine_is_msm7x27a_surf() || machine_is_msm7625a_surf() ||
+ machine_is_msm8625_surf())
sx150x_data[SX150X_CORE].io_open_drain_ena = 0xe0f0;
core_exp_i2c_info[0].platform_data =
@@ -153,10 +155,6 @@
.msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
};
-static struct msm_i2c_platform_data msm8625_gsbi0_qup_i2c_pdata = {
- .clk_freq = 100000,
-};
-
#ifdef CONFIG_ARCH_MSM7X27A
#define MSM_PMEM_MDP_SIZE 0x2300000
#define MSM7x25A_MSM_PMEM_MDP_SIZE 0x1500000
@@ -361,11 +359,97 @@
},
};
+u32 msm7627a_power_collapse_latency(enum msm_pm_sleep_mode mode)
+{
+ switch (mode) {
+ case MSM_PM_SLEEP_MODE_POWER_COLLAPSE:
+ return msm7x27a_pm_data
+ [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].latency;
+ case MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN:
+ return msm7x27a_pm_data
+ [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].latency;
+ case MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT:
+ return msm7x27a_pm_data
+ [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
+ case MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT:
+ return msm7x27a_pm_data
+ [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].latency;
+ default:
+ return 0;
+ }
+}
+
static struct msm_pm_boot_platform_data msm_pm_boot_pdata __initdata = {
.mode = MSM_PM_BOOT_CONFIG_RESET_VECTOR_PHYS,
.p_addr = 0,
};
+/* 8625 PM platform data */
+static struct msm_pm_platform_data msm8625_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
+ /* CORE0 entries */
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 0,
+ .suspend_enabled = 0,
+ .latency = 16000,
+ .residency = 20000,
+ },
+
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 0,
+ .suspend_enabled = 0,
+ .latency = 12000,
+ .residency = 20000,
+ },
+
+ /* picked latency & redisdency values from 7x30 */
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 0,
+ .suspend_enabled = 0,
+ .latency = 500,
+ .residency = 6000,
+ },
+
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 1,
+ .suspend_enabled = 1,
+ .latency = 2,
+ .residency = 10,
+ },
+
+ /* picked latency & redisdency values from 7x30 */
+ [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 0,
+ .suspend_enabled = 0,
+ .latency = 500,
+ .residency = 6000,
+ },
+
+ [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 1,
+ .suspend_enabled = 1,
+ .latency = 2,
+ .residency = 10,
+ },
+
+};
+
+static struct msm_pm_boot_platform_data msm_pm_8625_boot_pdata __initdata = {
+ .mode = MSM_PM_BOOT_CONFIG_REMAP_BOOT_ADDR,
+ .v_addr = MSM_CFG_CTL_BASE,
+};
+
static struct android_pmem_platform_data android_pmem_adsp_pdata = {
.name = "pmem_adsp",
.allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
@@ -697,37 +781,51 @@
static struct platform_device *msm8625_rumi3_devices[] __initdata = {
&msm8625_device_dmov,
+ &msm8625_device_smd,
&msm8625_device_uart1,
- &msm8625_device_qup_i2c_gsbi0,
+ &msm8625_gsbi0_qup_i2c_device,
};
-static struct platform_device *surf_ffa_devices[] __initdata = {
+static struct platform_device *msm7627a_surf_ffa_devices[] __initdata = {
&msm_device_dmov,
&msm_device_smd,
&msm_device_uart1,
&msm_device_uart_dm1,
&msm_device_uart_dm2,
- &msm_device_nand,
&msm_gsbi0_qup_i2c_device,
&msm_gsbi1_qup_i2c_device,
&msm_device_otg,
&msm_device_gadget_peripheral,
- &fmem_device,
+ &smsc911x_device,
+ &msm_kgsl_3d0,
+};
+
+static struct platform_device *common_devices[] __initdata = {
&android_usb_device,
&android_pmem_device,
&android_pmem_adsp_device,
&android_pmem_audio_device,
+ &fmem_device,
+ &msm_device_nand,
&msm_device_snd,
&msm_device_adspdec,
- &msm_batt_device,
- &smsc911x_device,
- &msm_kgsl_3d0,
-#ifdef CONFIG_BT
- &msm_bt_power_device,
-#endif
&asoc_msm_pcm,
&asoc_msm_dai0,
&asoc_msm_dai1,
+ &msm_batt_device,
+};
+
+static struct platform_device *msm8625_surf_devices[] __initdata = {
+ &msm8625_device_dmov,
+ &msm8625_device_uart1,
+ &msm8625_device_uart_dm1,
+ &msm8625_device_uart_dm2,
+ &msm8625_gsbi0_qup_i2c_device,
+ &msm8625_gsbi1_qup_i2c_device,
+ &msm8625_device_smd,
+ &msm8625_device_otg,
+ &msm8625_device_gadget_peripheral,
+ &msm8625_kgsl_3d0,
};
static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
@@ -849,21 +947,24 @@
static void __init msm8625_reserve(void)
{
- memblock_remove(MSM8625_SECONDARY_PHYS, SZ_8);
+ msm7x27a_reserve();
+ msm_pm_8625_boot_pdata.p_addr = memblock_alloc(SZ_8, SZ_64K);
}
-static void __init msm_device_i2c_init(void)
+static void __init msm7x27a_device_i2c_init(void)
{
- if (machine_is_msm8625_rumi3()) {
- msm8625_device_qup_i2c_gsbi0.dev.platform_data =
- &msm8625_gsbi0_qup_i2c_pdata;
- return;
- }
-
msm_gsbi0_qup_i2c_device.dev.platform_data = &msm_gsbi0_qup_i2c_pdata;
msm_gsbi1_qup_i2c_device.dev.platform_data = &msm_gsbi1_qup_i2c_pdata;
}
+static void __init msm8625_device_i2c_init(void)
+{
+ msm8625_gsbi0_qup_i2c_device.dev.platform_data =
+ &msm_gsbi0_qup_i2c_pdata;
+ msm8625_gsbi1_qup_i2c_device.dev.platform_data =
+ &msm_gsbi1_qup_i2c_pdata;
+}
+
#define MSM_EBI2_PHYS 0xa0d00000
#define MSM_EBI2_XMEM_CS2_CFG1 0xa0d10030
@@ -878,7 +979,7 @@
ebi2_cfg = readl(ebi2_cfg_ptr);
if (machine_is_msm7x27a_rumi3() || machine_is_msm7x27a_surf() ||
- machine_is_msm7625a_surf())
+ machine_is_msm7625a_surf() || machine_is_msm8625_surf())
ebi2_cfg |= (1 << 4); /* CS2 */
writel(ebi2_cfg, ebi2_cfg_ptr);
@@ -1115,6 +1216,29 @@
}
};
+static void msm_adsp_add_pdev(void)
+{
+ int rc = 0;
+ struct rpc_board_dev *rpc_adsp_pdev;
+
+ rpc_adsp_pdev = kzalloc(sizeof(struct rpc_board_dev), GFP_KERNEL);
+ if (rpc_adsp_pdev == NULL) {
+ pr_err("%s: Memory Allocation failure\n", __func__);
+ return;
+ }
+ rpc_adsp_pdev->prog = ADSP_RPC_PROG;
+
+ if (cpu_is_msm8625())
+ rpc_adsp_pdev->pdev = msm8625_device_adsp;
+ else
+ rpc_adsp_pdev->pdev = msm_adsp_device;
+ rc = msm_rpc_add_board_dev(rpc_adsp_pdev, 1);
+ if (rc < 0) {
+ pr_err("%s: return val: %d\n", __func__, rc);
+ kfree(rpc_adsp_pdev);
+ }
+}
+
static void __init msm7627a_rumi3_init(void)
{
msm7x27a_init_ebi2();
@@ -1125,9 +1249,15 @@
static void __init msm8625_rumi3_init(void)
{
msm7x2x_misc_init();
- msm_device_i2c_init();
+ msm_adsp_add_pdev();
+ msm8625_device_i2c_init();
platform_add_devices(msm8625_rumi3_devices,
ARRAY_SIZE(msm8625_rumi3_devices));
+
+ msm_pm_set_platform_data(msm8625_pm_data,
+ ARRAY_SIZE(msm8625_pm_data));
+ BUG_ON(msm_pm_boot_init(&msm_pm_8625_boot_pdata));
+ msm8x25_spm_device_init();
}
#define LED_GPIO_PDM 96
@@ -1151,55 +1281,56 @@
__func__, rc);
}
-static void __init msm7x2x_init(void)
+static void __init msm7x27a_add_footswitch_devices(void)
{
- msm7x2x_misc_init();
-
- /* Initialize regulators first so that other devices can use them */
- msm7x27a_init_regulators();
-
- /* Common functions for SURF/FFA/RUMI3 */
- msm_device_i2c_init();
- msm7x27a_init_ebi2();
- msm7x27a_cfg_uart2dm_serial();
-#ifdef CONFIG_SERIAL_MSM_HS
- msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO);
- msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
-#endif
-
-#ifdef CONFIG_USB_MSM_OTG_72K
- msm_otg_pdata.swfi_latency =
- msm7x27a_pm_data
- [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
- msm_device_otg.dev.platform_data = &msm_otg_pdata;
-#endif
- msm_device_gadget_peripheral.dev.platform_data =
- &msm_gadget_pdata;
- msm7x27a_cfg_smsc911x();
platform_add_devices(msm_footswitch_devices,
msm_num_footswitch_devices);
- platform_add_devices(surf_ffa_devices,
- ARRAY_SIZE(surf_ffa_devices));
- /* Ensure ar6000pm device is registered before MMC/SDC */
- msm7x27a_init_ar6000pm();
-#ifdef CONFIG_MMC_MSM
- msm7627a_init_mmc();
-#endif
- msm_fb_add_devices();
-#ifdef CONFIG_USB_EHCI_MSM_72K
- msm7x2x_init_host();
-#endif
+}
- msm_pm_set_platform_data(msm7x27a_pm_data,
- ARRAY_SIZE(msm7x27a_pm_data));
- BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
+static void __init msm7x27a_add_platform_devices(void)
+{
+ if (machine_is_msm8625_surf()) {
+ platform_add_devices(msm8625_surf_devices,
+ ARRAY_SIZE(msm8625_surf_devices));
+ } else {
+ platform_add_devices(msm7627a_surf_ffa_devices,
+ ARRAY_SIZE(msm7627a_surf_ffa_devices));
+ }
-#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
- register_i2c_devices();
-#endif
-#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
- msm7627a_bt_power_init();
-#endif
+ platform_add_devices(common_devices,
+ ARRAY_SIZE(common_devices));
+}
+
+static void __init msm7x27a_uartdm_config(void)
+{
+ msm7x27a_cfg_uart2dm_serial();
+ msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO);
+ if (cpu_is_msm8625())
+ msm8625_device_uart_dm1.dev.platform_data =
+ &msm_uart_dm1_pdata;
+ else
+ msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
+}
+
+static void __init msm7x27a_otg_gadget(void)
+{
+ msm_otg_pdata.swfi_latency =
+ msm7x27a_pm_data[
+ MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
+ if (cpu_is_msm8625()) {
+ msm8625_device_otg.dev.platform_data = &msm_otg_pdata;
+ msm8625_device_gadget_peripheral.dev.platform_data =
+ &msm_gadget_pdata;
+ } else {
+ msm_device_otg.dev.platform_data = &msm_otg_pdata;
+ msm_device_gadget_peripheral.dev.platform_data =
+ &msm_gadget_pdata;
+ }
+}
+
+static void __init msm7x27a_add_io_devices(void)
+{
+ /* touchscreen */
if (machine_is_msm7625a_surf() || machine_is_msm7625a_ffa()) {
atmel_ts_pdata.min_x = 0;
atmel_ts_pdata.max_x = 480;
@@ -1208,16 +1339,15 @@
}
i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
- atmel_ts_i2c_info,
- ARRAY_SIZE(atmel_ts_i2c_info));
-
-#if defined(CONFIG_MSM_CAMERA)
- msm7627a_camera_init();
-#endif
+ atmel_ts_i2c_info,
+ ARRAY_SIZE(atmel_ts_i2c_info));
+ /* keypad */
platform_device_register(&kp_pdev);
+
+ /* headset */
platform_device_register(&hs_pdev);
- /* configure it as a pdm function*/
+ /* LED: configure it as a pdm function */
if (gpio_tlmm_config(GPIO_CFG(LED_GPIO_PDM, 3,
GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
GPIO_CFG_8MA), GPIO_CFG_ENABLE))
@@ -1226,10 +1356,54 @@
else
platform_device_register(&led_pdev);
-#ifdef CONFIG_MSM_RPC_VIBRATOR
+ /* Vibrator */
if (machine_is_msm7x27a_ffa() || machine_is_msm7625a_ffa())
msm_init_pmic_vibrator();
-#endif
+}
+
+static void __init msm7x27a_pm_init(void)
+{
+ if (machine_is_msm8625_surf()) {
+ msm_pm_set_platform_data(msm8625_pm_data,
+ ARRAY_SIZE(msm8625_pm_data));
+ BUG_ON(msm_pm_boot_init(&msm_pm_8625_boot_pdata));
+ msm8x25_spm_device_init();
+ } else {
+ msm_pm_set_platform_data(msm7x27a_pm_data,
+ ARRAY_SIZE(msm7x27a_pm_data));
+ BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
+ }
+}
+
+static void __init msm7x2x_init(void)
+{
+ msm7x2x_misc_init();
+
+ /* Initialize regulators first so that other devices can use them */
+ msm7x27a_init_regulators();
+ msm_adsp_add_pdev();
+ if (cpu_is_msm8625())
+ msm8625_device_i2c_init();
+ else
+ msm7x27a_device_i2c_init();
+ msm7x27a_init_ebi2();
+ msm7x27a_uartdm_config();
+
+ msm7x27a_otg_gadget();
+ msm7x27a_cfg_smsc911x();
+
+ msm7x27a_add_footswitch_devices();
+ msm7x27a_add_platform_devices();
+ /* Ensure ar6000pm device is registered before MMC/SDC */
+ msm7x27a_init_ar6000pm();
+ msm7627a_init_mmc();
+ msm_fb_add_devices();
+ msm7x2x_init_host();
+ msm7x27a_pm_init();
+ register_i2c_devices();
+ msm7627a_bt_power_init();
+ msm7627a_camera_init();
+ msm7x27a_add_io_devices();
/*7x25a kgsl initializations*/
msm7x25a_kgsl_3d0_init();
}
@@ -1298,3 +1472,13 @@
.timer = &msm_timer,
.handle_irq = gic_handle_irq,
MACHINE_END
+MACHINE_START(MSM8625_SURF, "QCT MSM8625 SURF")
+ .boot_params = PHYS_OFFSET + 0x100,
+ .map_io = msm8625_map_io,
+ .reserve = msm8625_reserve,
+ .init_irq = msm8625_init_irq,
+ .init_machine = msm7x2x_init,
+ .timer = &msm_timer,
+ .init_early = msm7x2x_init_early,
+ .handle_irq = gic_handle_irq,
+MACHINE_END
diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c
index 260c880..b750b7e 100644
--- a/arch/arm/mach-msm/board-msm7x30.c
+++ b/arch/arm/mach-msm/board-msm7x30.c
@@ -91,6 +91,7 @@
#include <linux/bma150.h>
#include "board-msm7x30-regulator.h"
+#include "pm.h"
#define MSM_PMEM_SF_SIZE 0x1700000
#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
@@ -2987,6 +2988,26 @@
},
};
+u32 msm7x30_power_collapse_latency(enum msm_pm_sleep_mode mode)
+{
+ switch (mode) {
+ case MSM_PM_SLEEP_MODE_POWER_COLLAPSE:
+ return msm_pm_data
+ [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].latency;
+ case MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN:
+ return msm_pm_data
+ [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].latency;
+ case MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT:
+ return msm_pm_data
+ [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
+ case MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT:
+ return msm_pm_data
+ [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].latency;
+ default:
+ return 0;
+ }
+}
+
static struct msm_pm_boot_platform_data msm_pm_boot_pdata __initdata = {
.mode = MSM_PM_BOOT_CONFIG_RESET_VECTOR_VIRT,
.v_addr = (uint32_t *)PAGE_OFFSET,
@@ -4274,11 +4295,24 @@
static int msm_fb_mddi_client_power(u32 client_id)
{
+ int rc;
printk(KERN_NOTICE "\n client_id = 0x%x", client_id);
/* Check if it is Quicklogic client */
if (client_id == 0xc5835800) {
printk(KERN_NOTICE "\n Quicklogic MDDI client");
other_mddi_client = 0;
+ if (IS_ERR(mddi_ldo16)) {
+ rc = PTR_ERR(mddi_ldo16);
+ pr_err("%s: gp10 vreg get failed (%d)\n", __func__, rc);
+ return rc;
+ }
+ rc = regulator_disable(mddi_ldo16);
+ if (rc) {
+ pr_err("%s: LDO16 vreg enable failed (%d)\n",
+ __func__, rc);
+ return rc;
+ }
+
} else {
printk(KERN_NOTICE "\n Non-Quicklogic MDDI client");
quickvx_mddi_client = 0;
@@ -5236,7 +5270,8 @@
&msm_batt_device,
&msm_adc_device,
&msm_ebi0_thermal,
- &msm_ebi1_thermal
+ &msm_ebi1_thermal,
+ &msm_adsp_device
};
static struct msm_gpio msm_i2c_gpios_hw[] = {
@@ -6158,6 +6193,8 @@
#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
if (mmc_regulator_init(1, "s3", 1800000))
goto out1;
+ msm7x30_sdc1_data.swfi_latency = msm7x30_power_collapse_latency(
+ MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT);
if (machine_is_msm7x30_fluid()) {
msm7x30_sdc1_data.ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29;
@@ -6173,6 +6210,8 @@
#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
if (mmc_regulator_init(2, "s3", 1800000))
goto out2;
+ msm7x30_sdc2_data.swfi_latency = msm7x30_power_collapse_latency(
+ MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT);
if (machine_is_msm8x55_svlte_surf())
msm7x30_sdc2_data.msmsdcc_fmax = 24576000;
@@ -6188,6 +6227,8 @@
#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
if (mmc_regulator_init(3, "s3", 1800000))
goto out3;
+ msm7x30_sdc3_data.swfi_latency = msm7x30_power_collapse_latency(
+ MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT);
msm_sdcc_setup_gpio(3, 1);
msm_add_sdcc(3, &msm7x30_sdc3_data);
@@ -6196,6 +6237,8 @@
#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
if (mmc_regulator_init(4, "mmc", 2850000))
return;
+ msm7x30_sdc4_data.swfi_latency = msm7x30_power_collapse_latency(
+ MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT);
msm_add_sdcc(4, &msm7x30_sdc4_data);
#endif
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index e3fc97f..9b5e1e2 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -119,7 +119,6 @@
#define LCDC_AUO_SPI_DEVICE_NAME "lcdc_auo_nt35582"
#define LCDC_NT35582_PANEL_NAME "lcdc_nt35582_wvga"
-#define PANEL_NAME_MAX_LEN 30
#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
#define MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME "mipi_video_toshiba_wvga"
@@ -2660,19 +2659,17 @@
#define MSM_FB_EXT_BUFT_SIZE 0
#endif
-#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
-/* 4 bpp x 2 page HDMI case */
-#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
-#else
/* Note: must be multiple of 4096 */
#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE + \
MSM_FB_DSUB_PMEM_ADDER, 4096)
-#endif
+
+#define MSM_PMEM_SF_SIZE 0x4000000 /* 64 Mbytes */
+#define MSM_HDMI_PRIM_PMEM_SF_SIZE 0x4000000 /* 64 Mbytes */
#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
-#define MSM_PMEM_SF_SIZE 0x8000000 /* 128 Mbytes */
+unsigned char hdmi_is_primary = 1;
#else
-#define MSM_PMEM_SF_SIZE 0x4000000 /* 64 Mbytes */
+unsigned char hdmi_is_primary;
#endif
#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
@@ -2712,6 +2709,8 @@
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
#define MSM_ION_HEAP_NUM 9
+#define MSM_HDMI_PRIM_ION_SF_SIZE MSM_HDMI_PRIM_PMEM_SF_SIZE
+static unsigned msm_ion_sf_size = MSM_ION_SF_SIZE;
#else
#define MSM_ION_HEAP_NUM 1
#endif
@@ -3159,7 +3158,11 @@
void *addr;
unsigned long size;
- size = MSM_FB_SIZE;
+ if (hdmi_is_primary)
+ size = roundup((1920 * 1088 * 4 * 2), 4096);
+ else
+ size = MSM_FB_SIZE;
+
addr = alloc_bootmem_align(size, 0x1000);
msm_fb_resources[0].start = __pa(addr);
msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
@@ -3168,6 +3171,30 @@
}
+void __init msm8x60_set_display_params(char *prim_panel, char *ext_panel)
+{
+ if (strnlen(prim_panel, PANEL_NAME_MAX_LEN)) {
+ strlcpy(msm_fb_pdata.prim_panel_name, prim_panel,
+ PANEL_NAME_MAX_LEN);
+ pr_debug("msm_fb_pdata.prim_panel_name %s\n",
+ msm_fb_pdata.prim_panel_name);
+
+ if (!strncmp((char *)msm_fb_pdata.prim_panel_name,
+ HDMI_PANEL_NAME, strnlen(HDMI_PANEL_NAME,
+ PANEL_NAME_MAX_LEN))) {
+ pr_debug("HDMI is the primary display by"
+ " boot parameter\n");
+ hdmi_is_primary = 1;
+ }
+ }
+ if (strnlen(ext_panel, PANEL_NAME_MAX_LEN)) {
+ strlcpy(msm_fb_pdata.ext_panel_name, ext_panel,
+ PANEL_NAME_MAX_LEN);
+ pr_debug("msm_fb_pdata.ext_panel_name %s\n",
+ msm_fb_pdata.ext_panel_name);
+ }
+}
+
#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
/*virtual key support */
@@ -5410,7 +5437,21 @@
static void reserve_ion_memory(void)
{
#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
- msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_SF_SIZE;
+ unsigned int i;
+
+ if (hdmi_is_primary) {
+ msm_ion_sf_size = MSM_HDMI_PRIM_ION_SF_SIZE;
+ for (i = 0; i < ion_pdata.nr; i++) {
+ if (ion_pdata.heaps[i].id == ION_SF_HEAP_ID) {
+ ion_pdata.heaps[i].size = msm_ion_sf_size;
+ pr_debug("msm_ion_sf_size 0x%x\n",
+ msm_ion_sf_size);
+ break;
+ }
+ }
+ }
+
+ msm8x60_reserve_table[MEMTYPE_EBI1].size += msm_ion_sf_size;
msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MM_FW_SIZE;
msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MM_SIZE;
msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MFC_SIZE;
@@ -5426,6 +5467,9 @@
#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
android_pmem_adsp_pdata.size = pmem_adsp_size;
android_pmem_smipool_pdata.size = MSM_PMEM_SMIPOOL_SIZE;
+
+ if (hdmi_is_primary)
+ pmem_sf_size = MSM_HDMI_PRIM_PMEM_SF_SIZE;
android_pmem_pdata.size = pmem_sf_size;
#endif
android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
@@ -5475,8 +5519,27 @@
.paddr_to_memtype = msm8x60_paddr_to_memtype,
};
+static char prim_panel_name[PANEL_NAME_MAX_LEN];
+static char ext_panel_name[PANEL_NAME_MAX_LEN];
+static int __init prim_display_setup(char *param)
+{
+ if (strnlen(param, PANEL_NAME_MAX_LEN))
+ strlcpy(prim_panel_name, param, PANEL_NAME_MAX_LEN);
+ return 0;
+}
+early_param("prim_display", prim_display_setup);
+
+static int __init ext_display_setup(char *param)
+{
+ if (strnlen(param, PANEL_NAME_MAX_LEN))
+ strlcpy(ext_panel_name, param, PANEL_NAME_MAX_LEN);
+ return 0;
+}
+early_param("ext_display", ext_display_setup);
+
static void __init msm8x60_reserve(void)
{
+ msm8x60_set_display_params(prim_panel_name, ext_panel_name);
reserve_info = &msm8x60_reserve_info;
msm_reserve();
}
@@ -9422,26 +9485,7 @@
.ib = 0,
},
};
-#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
-static struct msm_bus_vectors dtv_bus_def_vectors[] = {
- /* For now, 0th array entry is reserved.
- * Please leave 0 as is and don't use it
- */
- {
- .src = MSM_BUS_MASTER_MDP_PORT0,
- .dst = MSM_BUS_SLAVE_SMI,
- .ab = 2000000000,
- .ib = 2000000000,
- },
- /* Master and slaves can be from different fabrics */
- {
- .src = MSM_BUS_MASTER_MDP_PORT0,
- .dst = MSM_BUS_SLAVE_EBI_CH0,
- .ab = 2000000000,
- .ib = 2000000000,
- },
-};
-#else
+
static struct msm_bus_vectors dtv_bus_def_vectors[] = {
/* For now, 0th array entry is reserved.
* Please leave 0 as is and don't use it
@@ -9460,7 +9504,26 @@
.ib = 707616000,
},
};
-#endif
+
+static struct msm_bus_vectors dtv_bus_hdmi_prim_vectors[] = {
+ /* For now, 0th array entry is reserved.
+ * Please leave 0 as is and don't use it
+ */
+ {
+ .src = MSM_BUS_MASTER_MDP_PORT0,
+ .dst = MSM_BUS_SLAVE_SMI,
+ .ab = 2000000000,
+ .ib = 2000000000,
+ },
+ /* Master and slaves can be from different fabrics */
+ {
+ .src = MSM_BUS_MASTER_MDP_PORT0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 2000000000,
+ .ib = 2000000000,
+ },
+};
+
static struct msm_bus_paths dtv_bus_scale_usecases[] = {
{
ARRAY_SIZE(dtv_bus_init_vectors),
@@ -9471,6 +9534,7 @@
dtv_bus_def_vectors,
},
};
+
static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
dtv_bus_scale_usecases,
ARRAY_SIZE(dtv_bus_scale_usecases),
@@ -9480,6 +9544,27 @@
static struct lcdc_platform_data dtv_pdata = {
.bus_scale_table = &dtv_bus_scale_pdata,
};
+
+static struct msm_bus_paths dtv_hdmi_prim_bus_scale_usecases[] = {
+ {
+ ARRAY_SIZE(dtv_bus_init_vectors),
+ dtv_bus_init_vectors,
+ },
+ {
+ ARRAY_SIZE(dtv_bus_hdmi_prim_vectors),
+ dtv_bus_hdmi_prim_vectors,
+ },
+};
+
+static struct msm_bus_scale_pdata dtv_hdmi_prim_bus_scale_pdata = {
+ dtv_hdmi_prim_bus_scale_usecases,
+ ARRAY_SIZE(dtv_hdmi_prim_bus_scale_usecases),
+ .name = "dtv",
+};
+
+static struct lcdc_platform_data dtv_hdmi_prim_pdata = {
+ .bus_scale_table = &dtv_hdmi_prim_bus_scale_pdata,
+};
#endif
@@ -9601,13 +9686,6 @@
160000000,
200000000,
};
-#elif defined(CONFIG_FB_MSM_HDMI_AS_PRIMARY)
-int mdp_core_clk_rate_table[] = {
- 200000000,
- 200000000,
- 200000000,
- 200000000,
-};
#else
int mdp_core_clk_rate_table[] = {
59080000,
@@ -9619,11 +9697,7 @@
static struct msm_panel_common_pdata mdp_pdata = {
.gpio = MDP_VSYNC_GPIO,
-#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
- .mdp_core_clk_rate = 200000000,
-#else
.mdp_core_clk_rate = 59080000,
-#endif
.mdp_core_clk_table = mdp_core_clk_rate_table,
.num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
#ifdef CONFIG_MSM_BUS_SCALING
@@ -9729,7 +9803,10 @@
msm_fb_register_device("lcdc", &lcdc_pdata);
msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
#ifdef CONFIG_MSM_BUS_SCALING
- msm_fb_register_device("dtv", &dtv_pdata);
+ if (hdmi_is_primary)
+ msm_fb_register_device("dtv", &dtv_hdmi_prim_pdata);
+ else
+ msm_fb_register_device("dtv", &dtv_pdata);
#endif
#ifdef CONFIG_FB_MSM_TVOUT
msm_fb_register_device("tvenc", &atv_pdata);
diff --git a/arch/arm/mach-msm/board-qrd7627a.c b/arch/arm/mach-msm/board-qrd7627a.c
index 0427632..a83cde0 100644
--- a/arch/arm/mach-msm/board-qrd7627a.c
+++ b/arch/arm/mach-msm/board-qrd7627a.c
@@ -28,9 +28,11 @@
#include <linux/input/rmi_i2c.h>
#include <linux/i2c/atmel_mxt_ts.h>
#include <linux/regulator/consumer.h>
+#include <linux/memblock.h>
#include <asm/mach/mmc.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
#include <mach/board.h>
#include <mach/msm_iomap.h>
#include <mach/msm_hsusb.h>
@@ -437,6 +439,72 @@
.p_addr = 0,
};
+/* 8625 PM platform data */
+static struct msm_pm_platform_data msm8625_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
+ /* CORE0 entries */
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 0,
+ .suspend_enabled = 0,
+ .latency = 16000,
+ .residency = 20000,
+ },
+
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 0,
+ .suspend_enabled = 0,
+ .latency = 12000,
+ .residency = 20000,
+ },
+
+ /* picked latency & redisdency values from 7x30 */
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 0,
+ .suspend_enabled = 0,
+ .latency = 500,
+ .residency = 6000,
+ },
+
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 1,
+ .suspend_enabled = 1,
+ .latency = 2,
+ .residency = 10,
+ },
+
+ /* picked latency & redisdency values from 7x30 */
+ [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 0,
+ .suspend_enabled = 0,
+ .latency = 500,
+ .residency = 6000,
+ },
+
+ [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 1,
+ .suspend_enabled = 1,
+ .latency = 2,
+ .residency = 10,
+ },
+
+};
+
+static struct msm_pm_boot_platform_data msm_pm_8625_boot_pdata __initdata = {
+ .mode = MSM_PM_BOOT_CONFIG_REMAP_BOOT_ADDR,
+ .v_addr = MSM_CFG_CTL_BASE,
+};
+
static struct android_pmem_platform_data android_pmem_adsp_pdata = {
.name = "pmem_adsp",
.allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
@@ -659,7 +727,20 @@
.dev.platform_data = &msm_psy_batt_data,
};
-static struct platform_device *qrd_common_devices[] __initdata = {
+static struct platform_device *common_devices[] __initdata = {
+ &android_usb_device,
+ &android_pmem_device,
+ &android_pmem_adsp_device,
+ &android_pmem_audio_device,
+ &msm_batt_device,
+ &msm_device_adspdec,
+ &msm_device_snd,
+ &asoc_msm_pcm,
+ &asoc_msm_dai0,
+ &asoc_msm_dai1,
+};
+
+static struct platform_device *qrd7627a_devices[] __initdata = {
&msm_device_dmov,
&msm_device_smd,
&msm_device_uart1,
@@ -668,26 +749,25 @@
&msm_gsbi1_qup_i2c_device,
&msm_device_otg,
&msm_device_gadget_peripheral,
- &android_usb_device,
- &android_pmem_device,
- &android_pmem_adsp_device,
- &android_pmem_audio_device,
- &msm_device_snd,
- &msm_device_adspdec,
- &msm_batt_device,
&msm_kgsl_3d0,
-#ifdef CONFIG_BT
- &msm_bt_power_device,
-#endif
- &asoc_msm_pcm,
- &asoc_msm_dai0,
- &asoc_msm_dai1,
};
static struct platform_device *qrd3_devices[] __initdata = {
&msm_device_nand,
};
+static struct platform_device *msm8625_evb_devices[] __initdata = {
+ &msm8625_device_dmov,
+ &msm8625_device_smd,
+ &msm8625_gsbi0_qup_i2c_device,
+ &msm8625_gsbi1_qup_i2c_device,
+ &msm8625_device_uart1,
+ &msm8625_device_uart_dm1,
+ &msm8625_device_otg,
+ &msm8625_device_gadget_peripheral,
+ &msm8625_kgsl_3d0,
+};
+
static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
static int __init pmem_kernel_ebi1_size_setup(char *p)
{
@@ -760,14 +840,46 @@
{
reserve_info = &msm7627a_reserve_info;
msm_reserve();
+ msm_pm_8625_boot_pdata.p_addr = memblock_alloc(SZ_8, SZ_64K);
}
-static void __init msm_device_i2c_init(void)
+static void msmqrd_adsp_add_pdev(void)
+{
+ int rc = 0;
+ struct rpc_board_dev *rpc_adsp_pdev;
+
+ rpc_adsp_pdev = kzalloc(sizeof(struct rpc_board_dev), GFP_KERNEL);
+ if (rpc_adsp_pdev == NULL) {
+ pr_err("%s: Memory Allocation failure\n", __func__);
+ return;
+ }
+ rpc_adsp_pdev->prog = ADSP_RPC_PROG;
+
+ if (cpu_is_msm8625())
+ rpc_adsp_pdev->pdev = msm8625_device_adsp;
+ else
+ rpc_adsp_pdev->pdev = msm_adsp_device;
+ rc = msm_rpc_add_board_dev(rpc_adsp_pdev, 1);
+ if (rc < 0) {
+ pr_err("%s: return val: %d\n", __func__, rc);
+ kfree(rpc_adsp_pdev);
+ }
+}
+
+static void __init msm7627a_device_i2c_init(void)
{
msm_gsbi0_qup_i2c_device.dev.platform_data = &msm_gsbi0_qup_i2c_pdata;
msm_gsbi1_qup_i2c_device.dev.platform_data = &msm_gsbi1_qup_i2c_pdata;
}
+static void __init msm8625_device_i2c_init(void)
+{
+ msm8625_gsbi0_qup_i2c_device.dev.platform_data
+ = &msm_gsbi0_qup_i2c_pdata;
+ msm8625_gsbi1_qup_i2c_device.dev.platform_data
+ = &msm_gsbi1_qup_i2c_pdata;
+}
+
static struct msm_handset_platform_data hs_platform_data = {
.hs_name = "7k_handset",
.pwr_key_delay_ms = 500, /* 0 will disable end key */
@@ -872,7 +984,7 @@
/* T38 Object */
16, 0, 0, 0, 0, 0, 0, 0,
/* T7 Object */
- 255, 255, 10,
+ 32, 16, 50,
/* T8 Object */
30, 0, 20, 20, 0, 0, 20, 0, 50, 0,
/* T9 Object */
@@ -958,7 +1070,7 @@
i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
synaptic_i2c_clearpad3k,
ARRAY_SIZE(synaptic_i2c_clearpad3k));
- } else if (machine_is_msm7627a_evb()) {
+ } else if (machine_is_msm7627a_evb() || machine_is_msm8625_evb()) {
rc = gpio_tlmm_config(GPIO_CFG(MXT_TS_IRQ_GPIO, 0,
GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
GPIO_CFG_8MA), GPIO_CFG_ENABLE);
@@ -989,11 +1101,11 @@
#endif
/* keypad */
- if (machine_is_msm7627a_evb())
+ if (machine_is_msm7627a_evb() || machine_is_msm8625_evb())
platform_device_register(&kp_pdev_8625);
/* leds */
- if (machine_is_msm7627a_evb()) {
+ if (machine_is_msm7627a_evb() || machine_is_msm8625_evb()) {
rc = gpio_tlmm_config(GPIO_CFG(LED_RED_GPIO_8625, 0,
GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP,
GPIO_CFG_16MA), GPIO_CFG_ENABLE);
@@ -1020,35 +1132,73 @@
return platform_device_register(&msm_wlan_ar6000_pm_device);
}
+static void __init msm_add_footswitch_devices(void)
+{
+ platform_add_devices(msm_footswitch_devices,
+ msm_num_footswitch_devices);
+}
+
static void add_platform_devices(void)
{
- platform_add_devices(qrd_common_devices,
- ARRAY_SIZE(qrd_common_devices));
-
- if (machine_is_msm7627a_qrd3())
- platform_add_devices(qrd3_devices,
- ARRAY_SIZE(qrd3_devices));
+ if (machine_is_msm8625_evb())
+ platform_add_devices(msm8625_evb_devices,
+ ARRAY_SIZE(msm8625_evb_devices));
+ else {
+ platform_add_devices(qrd7627a_devices,
+ ARRAY_SIZE(qrd7627a_devices));
+ if (machine_is_msm7627a_qrd3())
+ platform_add_devices(qrd3_devices,
+ ARRAY_SIZE(qrd3_devices));
+ }
+ platform_add_devices(common_devices,
+ ARRAY_SIZE(common_devices));
}
#define UART1DM_RX_GPIO 45
+static void __init qrd7627a_uart1dm_config(void)
+{
+ msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO);
+ if (cpu_is_msm8625())
+ msm8625_device_uart_dm1.dev.platform_data =
+ &msm_uart_dm1_pdata;
+ else
+ msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
+}
+
+static void __init qrd7627a_otg_gadget(void)
+{
+ msm_otg_pdata.swfi_latency = msm7627a_pm_data
+ [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
+
+ if (cpu_is_msm8625()) {
+ msm8625_device_otg.dev.platform_data = &msm_otg_pdata;
+ msm8625_device_gadget_peripheral.dev.platform_data =
+ &msm_gadget_pdata;
+
+ } else {
+ msm_device_otg.dev.platform_data = &msm_otg_pdata;
+ msm_device_gadget_peripheral.dev.platform_data =
+ &msm_gadget_pdata;
+ }
+}
+
static void __init msm_qrd_init(void)
{
msm7x2x_misc_init();
msm7627a_init_regulators();
- msm_device_i2c_init();
-#ifdef CONFIG_SERIAL_MSM_HS
- msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO);
- msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
-#endif
+ msmqrd_adsp_add_pdev();
-#ifdef CONFIG_USB_MSM_OTG_72K
- msm_otg_pdata.swfi_latency = msm7627a_pm_data
- [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
- msm_device_otg.dev.platform_data = &msm_otg_pdata;
-#endif
- msm_device_gadget_peripheral.dev.platform_data =
- &msm_gadget_pdata;
+ if (cpu_is_msm8625())
+ msm8625_device_i2c_init();
+ else
+ msm7627a_device_i2c_init();
+ /* uart1dm*/
+ qrd7627a_uart1dm_config();
+ /*OTG gadget*/
+ qrd7627a_otg_gadget();
+
+ msm_add_footswitch_devices();
add_platform_devices();
/* Ensure ar6000pm device is registered before MMC/SDC */
@@ -1058,9 +1208,16 @@
#ifdef CONFIG_USB_EHCI_MSM_72K
msm7627a_init_host();
#endif
- msm_pm_set_platform_data(msm7627a_pm_data,
+ if (!machine_is_msm8625_evb()) {
+ msm_pm_set_platform_data(msm7627a_pm_data,
ARRAY_SIZE(msm7627a_pm_data));
- BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
+ BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
+ } else {
+ msm_pm_set_platform_data(msm8625_pm_data,
+ ARRAY_SIZE(msm8625_pm_data));
+ BUG_ON(msm_pm_boot_init(&msm_pm_8625_boot_pdata));
+ msm8x25_spm_device_init();
+ }
msm_fb_add_devices();
@@ -1069,8 +1226,8 @@
#endif
msm7627a_camera_init();
-
msm7627a_add_io_devices();
+ msm7x25a_kgsl_3d0_init();
}
static void __init qrd7627a_init_early(void)
@@ -1108,3 +1265,13 @@
.init_early = qrd7627a_init_early,
.handle_irq = vic_handle_irq,
MACHINE_END
+MACHINE_START(MSM8625_EVB, "QRD MSM8625 EVB")
+ .boot_params = PHYS_OFFSET + 0x100,
+ .map_io = msm8625_map_io,
+ .reserve = msm7627a_reserve,
+ .init_irq = msm8625_init_irq,
+ .init_machine = msm_qrd_init,
+ .timer = &msm_timer,
+ .init_early = qrd7627a_init_early,
+ .handle_irq = gic_handle_irq,
+MACHINE_END
diff --git a/arch/arm/mach-msm/cache_erp.c b/arch/arm/mach-msm/cache_erp.c
new file mode 100644
index 0000000..3c317e9
--- /dev/null
+++ b/arch/arm/mach-msm/cache_erp.c
@@ -0,0 +1,475 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/proc_fs.h>
+#include <linux/cpu.h>
+#include <mach/msm-krait-l2-accessors.h>
+
+#define CESR_DCTPE BIT(0)
+#define CESR_DCDPE BIT(1)
+#define CESR_ICTPE BIT(2)
+#define CESR_ICDPE BIT(3)
+#define CESR_DCTE (BIT(4) | BIT(5))
+#define CESR_ICTE (BIT(6) | BIT(7))
+#define CESR_TLBMH BIT(16)
+#define CESR_I_MASK 0x000000CC
+
+#define L2ESR_IND_ADDR 0x204
+#define L2ESYNR0_IND_ADDR 0x208
+#define L2ESYNR1_IND_ADDR 0x209
+#define L2EAR0_IND_ADDR 0x20C
+#define L2EAR1_IND_ADDR 0x20D
+
+#define L2ESR_MPDCD BIT(0)
+#define L2ESR_MPSLV BIT(1)
+#define L2ESR_TSESB BIT(2)
+#define L2ESR_TSEDB BIT(3)
+#define L2ESR_DSESB BIT(4)
+#define L2ESR_DSEDB BIT(5)
+#define L2ESR_MSE BIT(6)
+#define L2ESR_MPLDREXNOK BIT(8)
+
+#define L2ESR_CPU_MASK 0x0F
+#define L2ESR_CPU_SHIFT 16
+
+#ifdef CONFIG_MSM_L1_ERR_PANIC
+#define ERP_L1_ERR(a) panic(a)
+#else
+#define ERP_L1_ERR(a) do { } while (0)
+#endif
+
+#ifdef CONFIG_MSM_L2_ERP_PORT_PANIC
+#define ERP_PORT_ERR(a) panic(a)
+#else
+#define ERP_PORT_ERR(a) WARN(1, a)
+#endif
+
+#ifdef CONFIG_MSM_L2_ERP_1BIT_PANIC
+#define ERP_1BIT_ERR(a) panic(a)
+#else
+#define ERP_1BIT_ERR(a) do { } while (0)
+#endif
+
+#ifdef CONFIG_MSM_L2_ERP_2BIT_PANIC
+#define ERP_2BIT_ERR(a) panic(a)
+#else
+#define ERP_2BIT_ERR(a) do { } while (0)
+#endif
+
+#define MODULE_NAME "msm_cache_erp"
+
+struct msm_l1_err_stats {
+ unsigned int dctpe;
+ unsigned int dcdpe;
+ unsigned int ictpe;
+ unsigned int icdpe;
+ unsigned int dcte;
+ unsigned int icte;
+ unsigned int tlbmh;
+};
+
+struct msm_l2_err_stats {
+ unsigned int mpdcd;
+ unsigned int mpslv;
+ unsigned int tsesb;
+ unsigned int tsedb;
+ unsigned int dsesb;
+ unsigned int dsedb;
+ unsigned int mse;
+ unsigned int mplxrexnok;
+};
+
+static DEFINE_PER_CPU(struct msm_l1_err_stats, msm_l1_erp_stats);
+static struct msm_l2_err_stats msm_l2_erp_stats;
+
+static int l1_erp_irq, l2_erp_irq;
+static struct proc_dir_entry *procfs_entry;
+
+static inline unsigned int read_cesr(void)
+{
+ unsigned int cesr;
+ asm volatile ("mrc p15, 7, %0, c15, c0, 1" : "=r" (cesr));
+ return cesr;
+}
+
+static inline void write_cesr(unsigned int cesr)
+{
+ asm volatile ("mcr p15, 7, %[cesr], c15, c0, 1" : : [cesr]"r" (cesr));
+}
+
+static inline unsigned int read_cesynr(void)
+{
+ unsigned int cesynr;
+ asm volatile ("mrc p15, 7, %0, c15, c0, 3" : "=r" (cesynr));
+ return cesynr;
+}
+
+static int proc_read_status(char *page, char **start, off_t off, int count,
+ int *eof, void *data)
+{
+ struct msm_l1_err_stats *l1_stats;
+ char *p = page;
+ int len, cpu, ret, bytes_left = PAGE_SIZE;
+
+ for_each_present_cpu(cpu) {
+ l1_stats = &per_cpu(msm_l1_erp_stats, cpu);
+
+ ret = snprintf(p, bytes_left,
+ "CPU %d:\n" \
+ "\tD-cache tag parity errors:\t%u\n" \
+ "\tD-cache data parity errors:\t%u\n" \
+ "\tI-cache tag parity errors:\t%u\n" \
+ "\tI-cache data parity errors:\t%u\n" \
+ "\tD-cache timing errors:\t\t%u\n" \
+ "\tI-cache timing errors:\t\t%u\n" \
+ "\tTLB multi-hit errors:\t\t%u\n\n", \
+ cpu,
+ l1_stats->dctpe,
+ l1_stats->dcdpe,
+ l1_stats->ictpe,
+ l1_stats->icdpe,
+ l1_stats->dcte,
+ l1_stats->icte,
+ l1_stats->tlbmh);
+ p += ret;
+ bytes_left -= ret;
+ }
+
+ p += snprintf(p, bytes_left,
+ "L2 master port decode errors:\t\t%u\n" \
+ "L2 master port slave errors:\t\t%u\n" \
+ "L2 tag soft errors, single-bit:\t\t%u\n" \
+ "L2 tag soft errors, double-bit:\t\t%u\n" \
+ "L2 data soft errors, single-bit:\t%u\n" \
+ "L2 data soft errors, double-bit:\t%u\n" \
+ "L2 modified soft errors:\t\t%u\n" \
+ "L2 master port LDREX NOK errors:\t%u\n",
+ msm_l2_erp_stats.mpdcd,
+ msm_l2_erp_stats.mpslv,
+ msm_l2_erp_stats.tsesb,
+ msm_l2_erp_stats.tsedb,
+ msm_l2_erp_stats.dsesb,
+ msm_l2_erp_stats.dsedb,
+ msm_l2_erp_stats.mse,
+ msm_l2_erp_stats.mplxrexnok);
+
+ len = (p - page) - off;
+ if (len < 0)
+ len = 0;
+
+ *eof = (len <= count) ? 1 : 0;
+ *start = page + off;
+
+ return len;
+}
+
+static irqreturn_t msm_l1_erp_irq(int irq, void *dev_id)
+{
+ struct msm_l1_err_stats *l1_stats = dev_id;
+ unsigned int cesr = read_cesr();
+ unsigned int i_cesynr, d_cesynr;
+
+ pr_alert("L1 Error detected on CPU %d!\n", smp_processor_id());
+ pr_alert("\tCESR = 0x%08x\n", cesr);
+
+ if (cesr & CESR_DCTPE) {
+ pr_alert("D-cache tag parity error\n");
+ l1_stats->dctpe++;
+ }
+
+ if (cesr & CESR_DCDPE) {
+ pr_alert("D-cache data parity error\n");
+ l1_stats->dcdpe++;
+ }
+
+ if (cesr & CESR_ICTPE) {
+ pr_alert("I-cache tag parity error\n");
+ l1_stats->ictpe++;
+ }
+
+ if (cesr & CESR_ICDPE) {
+ pr_alert("I-cache data parity error\n");
+ l1_stats->icdpe++;
+ }
+
+ if (cesr & CESR_DCTE) {
+ pr_alert("D-cache timing error\n");
+ l1_stats->dcte++;
+ }
+
+ if (cesr & CESR_ICTE) {
+ pr_alert("I-cache timing error\n");
+ l1_stats->icte++;
+ }
+
+ if (cesr & CESR_TLBMH) {
+ pr_alert("TLB multi-hit error\n");
+ l1_stats->tlbmh++;
+ }
+
+ if (cesr & (CESR_ICTPE | CESR_ICDPE | CESR_ICTE)) {
+ i_cesynr = read_cesynr();
+ pr_alert("I-side CESYNR = 0x%08x\n", i_cesynr);
+ write_cesr(CESR_I_MASK);
+
+ /*
+ * Clear the I-side bits from the captured CESR value so that we
+ * don't accidentally clear any new I-side errors when we do
+ * the CESR write-clear operation.
+ */
+ cesr &= ~CESR_I_MASK;
+ }
+
+ if (cesr & (CESR_DCTPE | CESR_DCDPE | CESR_DCTE)) {
+ d_cesynr = read_cesynr();
+ pr_alert("D-side CESYNR = 0x%08x\n", d_cesynr);
+ }
+
+ /* Clear the interrupt bits we processed */
+ write_cesr(cesr);
+
+ ERP_L1_ERR("L1 cache / TLB error detected");
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t msm_l2_erp_irq(int irq, void *dev_id)
+{
+ unsigned int l2esr;
+ unsigned int l2esynr0;
+ unsigned int l2esynr1;
+ unsigned int l2ear0;
+ unsigned int l2ear1;
+ int soft_error = 0;
+ int port_error = 0;
+ int unrecoverable = 0;
+
+ l2esr = get_l2_indirect_reg(L2ESR_IND_ADDR);
+ l2esynr0 = get_l2_indirect_reg(L2ESYNR0_IND_ADDR);
+ l2esynr1 = get_l2_indirect_reg(L2ESYNR1_IND_ADDR);
+ l2ear0 = get_l2_indirect_reg(L2EAR0_IND_ADDR);
+ l2ear1 = get_l2_indirect_reg(L2EAR1_IND_ADDR);
+
+ pr_alert("L2 Error detected!\n");
+ pr_alert("\tL2ESR = 0x%08x\n", l2esr);
+ pr_alert("\tL2ESYNR0 = 0x%08x\n", l2esynr0);
+ pr_alert("\tL2ESYNR1 = 0x%08x\n", l2esynr1);
+ pr_alert("\tL2EAR0 = 0x%08x\n", l2ear0);
+ pr_alert("\tL2EAR1 = 0x%08x\n", l2ear1);
+ pr_alert("\tCPU bitmap = 0x%x\n", (l2esr >> L2ESR_CPU_SHIFT) &
+ L2ESR_CPU_MASK);
+
+ if (l2esr & L2ESR_MPDCD) {
+ pr_alert("L2 master port decode error\n");
+ port_error++;
+ msm_l2_erp_stats.mpdcd++;
+ }
+
+ if (l2esr & L2ESR_MPSLV) {
+ pr_alert("L2 master port slave error\n");
+ port_error++;
+ msm_l2_erp_stats.mpslv++;
+ }
+
+ if (l2esr & L2ESR_TSESB) {
+ pr_alert("L2 tag soft error, single-bit\n");
+ soft_error++;
+ msm_l2_erp_stats.tsesb++;
+ }
+
+ if (l2esr & L2ESR_TSEDB) {
+ pr_alert("L2 tag soft error, double-bit\n");
+ soft_error++;
+ unrecoverable++;
+ msm_l2_erp_stats.tsedb++;
+ }
+
+ if (l2esr & L2ESR_DSESB) {
+ pr_alert("L2 data soft error, single-bit\n");
+ soft_error++;
+ msm_l2_erp_stats.dsesb++;
+ }
+
+ if (l2esr & L2ESR_DSEDB) {
+ pr_alert("L2 data soft error, double-bit\n");
+ soft_error++;
+ unrecoverable++;
+ msm_l2_erp_stats.dsedb++;
+ }
+
+ if (l2esr & L2ESR_MSE) {
+ pr_alert("L2 modified soft error\n");
+ soft_error++;
+ msm_l2_erp_stats.mse++;
+ }
+
+ if (l2esr & L2ESR_MPLDREXNOK) {
+ pr_alert("L2 master port LDREX received Normal OK response\n");
+ port_error++;
+ msm_l2_erp_stats.mplxrexnok++;
+ }
+
+ if (port_error)
+ ERP_PORT_ERR("L2 master port error detected");
+
+ if (soft_error && !unrecoverable)
+ ERP_1BIT_ERR("L2 single-bit error detected");
+
+ if (unrecoverable)
+ ERP_2BIT_ERR("L2 double-bit error detected, trouble ahead");
+
+ set_l2_indirect_reg(L2ESR_IND_ADDR, l2esr);
+ return IRQ_HANDLED;
+}
+
+static void enable_erp_irq_callback(void *info)
+{
+ enable_percpu_irq(l1_erp_irq, IRQ_TYPE_LEVEL_HIGH);
+}
+
+static void disable_erp_irq_callback(void *info)
+{
+ disable_percpu_irq(l1_erp_irq);
+}
+
+static int cache_erp_cpu_callback(struct notifier_block *nfb,
+ unsigned long action, void *hcpu)
+{
+ switch (action & (~CPU_TASKS_FROZEN)) {
+ case CPU_STARTING:
+ enable_erp_irq_callback(NULL);
+ break;
+
+ case CPU_DYING:
+ disable_erp_irq_callback(NULL);
+ break;
+ }
+ return NOTIFY_OK;
+}
+
+static struct notifier_block cache_erp_cpu_notifier = {
+ .notifier_call = cache_erp_cpu_callback,
+};
+
+static int msm_cache_erp_probe(struct platform_device *pdev)
+{
+ struct resource *r;
+ int ret, cpu;
+
+ r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "l1_irq");
+
+ if (!r) {
+ pr_err("Could not get L1 resource\n");
+ ret = -ENODEV;
+ goto fail;
+ }
+
+ l1_erp_irq = r->start;
+
+ ret = request_percpu_irq(l1_erp_irq, msm_l1_erp_irq, "MSM_L1",
+ &msm_l1_erp_stats);
+
+ if (ret) {
+ pr_err("Failed to request the L1 cache error interrupt\n");
+ goto fail;
+ }
+
+ r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "l2_irq");
+
+ if (!r) {
+ pr_err("Could not get L2 resource\n");
+ ret = -ENODEV;
+ goto fail_l1;
+ }
+
+ l2_erp_irq = r->start;
+ ret = request_irq(l2_erp_irq, msm_l2_erp_irq, 0, "MSM_L2", NULL);
+
+ if (ret) {
+ pr_err("Failed to request the L2 cache error interrupt\n");
+ goto fail_l1;
+ }
+
+ procfs_entry = create_proc_entry("cpu/msm_cache_erp", S_IRUGO, NULL);
+
+ if (!procfs_entry) {
+ pr_err("Failed to create procfs node for cache error reporting\n");
+ ret = -ENODEV;
+ goto fail_l2;
+ }
+
+ get_online_cpus();
+ register_hotcpu_notifier(&cache_erp_cpu_notifier);
+ for_each_cpu(cpu, cpu_online_mask)
+ smp_call_function_single(cpu, enable_erp_irq_callback, NULL, 1);
+ put_online_cpus();
+
+ procfs_entry->read_proc = proc_read_status;
+ return 0;
+
+fail_l2:
+ free_irq(l2_erp_irq, NULL);
+fail_l1:
+ free_percpu_irq(l1_erp_irq, NULL);
+fail:
+ return ret;
+}
+
+static int msm_cache_erp_remove(struct platform_device *pdev)
+{
+ int cpu;
+ if (procfs_entry)
+ remove_proc_entry("cpu/msm_cache_erp", NULL);
+
+ get_online_cpus();
+ unregister_hotcpu_notifier(&cache_erp_cpu_notifier);
+ for_each_cpu(cpu, cpu_online_mask)
+ smp_call_function_single(cpu, disable_erp_irq_callback, NULL,
+ 1);
+ put_online_cpus();
+
+ free_percpu_irq(l1_erp_irq, NULL);
+
+ disable_irq(l2_erp_irq);
+ free_irq(l2_erp_irq, NULL);
+ return 0;
+}
+
+static struct platform_driver msm_cache_erp_driver = {
+ .probe = msm_cache_erp_probe,
+ .remove = msm_cache_erp_remove,
+ .driver = {
+ .name = MODULE_NAME,
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init msm_cache_erp_init(void)
+{
+ return platform_driver_register(&msm_cache_erp_driver);
+}
+
+static void __exit msm_cache_erp_exit(void)
+{
+ platform_driver_unregister(&msm_cache_erp_driver);
+}
+
+
+module_init(msm_cache_erp_init);
+module_exit(msm_cache_erp_exit);
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("MSM cache error reporting driver");
diff --git a/arch/arm/mach-msm/clock-7x30.c b/arch/arm/mach-msm/clock-7x30.c
index bd7ec87..24a676f 100644
--- a/arch/arm/mach-msm/clock-7x30.c
+++ b/arch/arm/mach-msm/clock-7x30.c
@@ -234,6 +234,7 @@
.rate = 19200000,
.ops = &clk_ops_tcxo,
CLK_INIT(tcxo_clk.c),
+ .warned = true,
},
};
@@ -259,6 +260,7 @@
.rate = 24576000,
.ops = &clk_ops_lpxo,
CLK_INIT(lpxo_clk.c),
+ .warned = true,
},
};
@@ -272,6 +274,7 @@
.rate = 768000000,
.ops = &clk_ops_pll_vote,
CLK_INIT(pll1_clk.c),
+ .warned = true,
},
};
@@ -285,6 +288,7 @@
.rate = 806400000, /* TODO: Support scaling */
.ops = &clk_ops_pll_vote,
CLK_INIT(pll2_clk.c),
+ .warned = true,
},
};
@@ -311,6 +315,7 @@
.rate = 891000000,
.ops = &clk_ops_pll_vote,
CLK_INIT(pll4_clk.c),
+ .warned = true,
},
};
@@ -3012,7 +3017,6 @@
.disable = rcg_clk_disable,
.auto_off = rcg_clk_disable,
.set_rate = rcg_clk_set_rate,
- .get_rate = rcg_clk_get_rate,
.list_rate = rcg_clk_list_rate,
.is_enabled = rcg_clk_is_enabled,
.round_rate = rcg_clk_round_rate,
diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index 8188e08..98a32c6 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -26,7 +26,6 @@
#include <mach/msm_iomap.h>
#include <mach/clk.h>
#include <mach/rpm-regulator.h>
-#include <mach/msm_xo.h>
#include <mach/socinfo.h>
#include "clock-local.h"
@@ -365,9 +364,6 @@
};
#define PLL_RATE(l, m, n, v, d, i) { l, m, n, v, (d>>1), i }
-static int rpm_vreg_id_vdd_dig;
-static int rpm_vreg_id_vdd_sr2_pll;
-
enum vdd_dig_levels {
VDD_DIG_NONE,
VDD_DIG_LOW,
@@ -375,7 +371,7 @@
VDD_DIG_HIGH
};
-static int set_vdd_dig(struct clk_vdd_class *vdd_class, int level)
+static int set_vdd_dig_8960(struct clk_vdd_class *vdd_class, int level)
{
static const int vdd_uv[] = {
[VDD_DIG_NONE] = 0,
@@ -383,11 +379,23 @@
[VDD_DIG_NOMINAL] = 1050000,
[VDD_DIG_HIGH] = 1150000
};
- return rpm_vreg_set_voltage(rpm_vreg_id_vdd_dig, RPM_VREG_VOTER3,
+ return rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_S3, RPM_VREG_VOTER3,
vdd_uv[level], 1150000, 1);
}
-static DEFINE_VDD_CLASS(vdd_dig, set_vdd_dig);
+static DEFINE_VDD_CLASS(vdd_dig, set_vdd_dig_8960);
+
+static int set_vdd_dig_8930(struct clk_vdd_class *vdd_class, int level)
+{
+ static const int vdd_uv[] = {
+ [VDD_DIG_NONE] = 0,
+ [VDD_DIG_LOW] = 945000,
+ [VDD_DIG_NOMINAL] = 1050000,
+ [VDD_DIG_HIGH] = 1150000
+ };
+ return rpm_vreg_set_voltage(RPM_VREG_ID_PM8038_S1, RPM_VREG_VOTER3,
+ vdd_uv[level], 1150000, 1);
+}
#define VDD_DIG_FMAX_MAP1(l1, f1) \
.vdd_class = &vdd_dig, \
@@ -407,105 +415,60 @@
VDD_SR2_PLL_ON
};
-static int set_vdd_sr2_pll(struct clk_vdd_class *vdd_class, int level)
+static int set_vdd_sr2_pll_8960(struct clk_vdd_class *vdd_class, int level)
{
int rc = 0;
- if (cpu_is_msm8960()) {
- if (level == VDD_SR2_PLL_OFF) {
- rc = rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_L23,
- RPM_VREG_VOTER3, 0, 0, 1);
- if (rc)
- return rc;
- rc = rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_S8,
- RPM_VREG_VOTER3, 0, 0, 1);
- if (rc)
- rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_L23,
- RPM_VREG_VOTER3, 1800000, 1800000, 1);
- } else {
- rc = rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_S8,
- RPM_VREG_VOTER3, 2100000, 2100000, 1);
- if (rc)
- return rc;
- rc = rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_L23,
- RPM_VREG_VOTER3, 1800000, 1800000, 1);
- if (rc)
- rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_S8,
- RPM_VREG_VOTER3, 0, 0, 1);
- }
+
+ if (level == VDD_SR2_PLL_OFF) {
+ rc = rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_L23,
+ RPM_VREG_VOTER3, 0, 0, 1);
+ if (rc)
+ return rc;
+ rc = rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_S8,
+ RPM_VREG_VOTER3, 0, 0, 1);
+ if (rc)
+ rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_L23,
+ RPM_VREG_VOTER3, 1800000, 1800000, 1);
} else {
- if (level == VDD_SR2_PLL_OFF) {
- rc = rpm_vreg_set_voltage(rpm_vreg_id_vdd_sr2_pll,
+ rc = rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_S8,
+ RPM_VREG_VOTER3, 2100000, 2100000, 1);
+ if (rc)
+ return rc;
+ rc = rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_L23,
+ RPM_VREG_VOTER3, 1800000, 1800000, 1);
+ if (rc)
+ rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_S8,
RPM_VREG_VOTER3, 0, 0, 1);
- if (rc)
- return rc;
- } else {
- rc = rpm_vreg_set_voltage(rpm_vreg_id_vdd_sr2_pll,
- RPM_VREG_VOTER3, 1800000, 1800000, 1);
- if (rc)
- return rc;
- }
}
return rc;
}
-static DEFINE_VDD_CLASS(vdd_sr2_pll, set_vdd_sr2_pll);
+static DEFINE_VDD_CLASS(vdd_sr2_pll, set_vdd_sr2_pll_8960);
+
+static int sr2_lreg_uv[] = {
+ [VDD_SR2_PLL_OFF] = 0,
+ [VDD_SR2_PLL_ON] = 1800000,
+};
+
+static int set_vdd_sr2_pll_8064(struct clk_vdd_class *vdd_class, int level)
+{
+ return rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_LVS7, RPM_VREG_VOTER3,
+ sr2_lreg_uv[level], sr2_lreg_uv[level], 1);
+}
+
+static int set_vdd_sr2_pll_8930(struct clk_vdd_class *vdd_class, int level)
+{
+ return rpm_vreg_set_voltage(RPM_VREG_ID_PM8038_L23, RPM_VREG_VOTER3,
+ sr2_lreg_uv[level], sr2_lreg_uv[level], 1);
+}
/*
* Clock Descriptions
*/
-static struct msm_xo_voter *xo_pxo, *xo_cxo;
-
-static int pxo_clk_enable(struct clk *clk)
-{
- return msm_xo_mode_vote(xo_pxo, MSM_XO_MODE_ON);
-}
-
-static void pxo_clk_disable(struct clk *clk)
-{
- msm_xo_mode_vote(xo_pxo, MSM_XO_MODE_OFF);
-}
-
-static struct clk_ops clk_ops_pxo = {
- .enable = pxo_clk_enable,
- .disable = pxo_clk_disable,
- .is_local = local_clk_is_local,
-};
-
-static struct fixed_clk pxo_clk = {
- .c = {
- .dbg_name = "pxo_clk",
- .rate = 27000000,
- .ops = &clk_ops_pxo,
- CLK_INIT(pxo_clk.c),
- },
-};
-
-static int cxo_clk_enable(struct clk *clk)
-{
- return msm_xo_mode_vote(xo_cxo, MSM_XO_MODE_ON);
-}
-
-static void cxo_clk_disable(struct clk *clk)
-{
- msm_xo_mode_vote(xo_cxo, MSM_XO_MODE_OFF);
-}
-
-static struct clk_ops clk_ops_cxo = {
- .enable = cxo_clk_enable,
- .disable = cxo_clk_disable,
- .is_local = local_clk_is_local,
-};
-
-static struct fixed_clk cxo_clk = {
- .c = {
- .dbg_name = "cxo_clk",
- .rate = 19200000,
- .ops = &clk_ops_cxo,
- CLK_INIT(cxo_clk.c),
- },
-};
+DEFINE_CLK_RPM_BRANCH(pxo_clk, pxo_a_clk, PXO, 27000000);
+DEFINE_CLK_RPM_BRANCH(cxo_clk, cxo_a_clk, CXO, 19200000);
static struct pll_clk pll2_clk = {
.mode_reg = MM_PLL1_MODE_REG,
@@ -515,6 +478,7 @@
.rate = 800000000,
.ops = &clk_ops_pll,
CLK_INIT(pll2_clk.c),
+ .warned = true,
},
};
@@ -528,6 +492,7 @@
.vdd_class = &vdd_sr2_pll,
.fmax[VDD_SR2_PLL_ON] = ULONG_MAX,
CLK_INIT(pll3_clk.c),
+ .warned = true,
},
};
@@ -541,6 +506,7 @@
.rate = 393216000,
.ops = &clk_ops_pll_vote,
CLK_INIT(pll4_clk.c),
+ .warned = true,
},
};
@@ -554,6 +520,7 @@
.rate = 384000000,
.ops = &clk_ops_pll_vote,
CLK_INIT(pll8_clk.c),
+ .warned = true,
},
};
@@ -567,6 +534,7 @@
.rate = 480000000,
.ops = &clk_ops_pll_vote,
CLK_INIT(pll14_clk.c),
+ .warned = true,
},
};
@@ -578,6 +546,7 @@
.rate = 975000000,
.ops = &clk_ops_pll,
CLK_INIT(pll15_clk.c),
+ .warned = true,
},
};
@@ -590,7 +559,6 @@
.auto_off = rcg_clk_disable,
.handoff = rcg_clk_handoff,
.set_rate = rcg_clk_set_rate,
- .get_rate = rcg_clk_get_rate,
.list_rate = rcg_clk_list_rate,
.is_enabled = rcg_clk_is_enabled,
.round_rate = rcg_clk_round_rate,
@@ -4461,6 +4429,9 @@
DEFINE_CLK_RPM(sfab_clk, sfab_a_clk, SYSTEM_FABRIC, NULL);
DEFINE_CLK_RPM(sfpb_clk, sfpb_a_clk, SFPB, NULL);
+static DEFINE_CLK_VOTER(sfab_msmbus_a_clk, &sfab_a_clk.c);
+static DEFINE_CLK_VOTER(sfab_tmr_a_clk, &sfab_a_clk.c);
+
static DEFINE_CLK_VOTER(dfab_dsps_clk, &dfab_clk.c);
static DEFINE_CLK_VOTER(dfab_usb_hs_clk, &dfab_clk.c);
static DEFINE_CLK_VOTER(dfab_usb_hs3_clk, &dfab_clk.c);
@@ -4473,6 +4444,7 @@
static DEFINE_CLK_VOTER(dfab_sps_clk, &dfab_clk.c);
static DEFINE_CLK_VOTER(dfab_bam_dmux_clk, &dfab_clk.c);
static DEFINE_CLK_VOTER(dfab_scm_clk, &dfab_clk.c);
+static DEFINE_CLK_VOTER(dfab_qseecom_clk, &dfab_clk.c);
static DEFINE_CLK_VOTER(ebi1_msmbus_clk, &ebi1_clk.c);
static DEFINE_CLK_VOTER(ebi1_adm_clk, &ebi1_clk.c);
@@ -4880,6 +4852,8 @@
};
static struct clk_lookup msm_clocks_8064[] = {
+ CLK_LOOKUP("xo", cxo_a_clk.c, ""),
+ CLK_LOOKUP("xo", pxo_a_clk.c, ""),
CLK_LOOKUP("xo", cxo_clk.c, "msm_otg"),
CLK_LOOKUP("cxo", cxo_clk.c, "wcnss_wlan.0"),
CLK_LOOKUP("cxo", cxo_clk.c, "pil_riva"),
@@ -4887,6 +4861,7 @@
CLK_LOOKUP("xo", cxo_clk.c, "pil_qdsp6v4.1"),
CLK_LOOKUP("xo", cxo_clk.c, "pil_qdsp6v4.2"),
CLK_LOOKUP("xo", cxo_clk.c, "pil_gss"),
+ CLK_LOOKUP("xo", cxo_clk.c, "BAM_RMNT"),
CLK_LOOKUP("pll2", pll2_clk.c, NULL),
CLK_LOOKUP("pll8", pll8_clk.c, NULL),
CLK_LOOKUP("pll4", pll4_clk.c, NULL),
@@ -4897,7 +4872,7 @@
CLK_LOOKUP("bus_clk", cfpb_clk.c, "msm_cpss_fpb"),
CLK_LOOKUP("bus_a_clk", cfpb_a_clk.c, "msm_cpss_fpb"),
CLK_LOOKUP("bus_clk", sfab_clk.c, "msm_sys_fab"),
- CLK_LOOKUP("bus_a_clk", sfab_a_clk.c, "msm_sys_fab"),
+ CLK_LOOKUP("bus_a_clk", sfab_msmbus_a_clk.c, "msm_sys_fab"),
CLK_LOOKUP("bus_clk", sfpb_clk.c, "msm_sys_fpb"),
CLK_LOOKUP("bus_a_clk", sfpb_a_clk.c, "msm_sys_fpb"),
CLK_LOOKUP("bus_clk", mmfab_clk.c, "msm_mm_fab"),
@@ -4981,6 +4956,7 @@
CLK_LOOKUP("mem_clk", rpm_msg_ram_p_clk.c, ""),
CLK_LOOKUP("core_clk", amp_clk.c, ""),
CLK_LOOKUP("cam_clk", cam0_clk.c, "4-001a"),
+ CLK_LOOKUP("cam_clk", cam1_clk.c, "4-0048"),
CLK_LOOKUP("cam_clk", cam1_clk.c, "4-006c"),
CLK_LOOKUP("csi_src_clk", csi0_src_clk.c, "msm_csid.0"),
CLK_LOOKUP("csi_src_clk", csi1_src_clk.c, "msm_csid.1"),
@@ -5034,14 +5010,15 @@
CLK_LOOKUP("lut_clk", lut_mdp_clk.c, "footswitch-8x60.4"),
CLK_LOOKUP("core_clk", rot_clk.c, "msm_rotator.0"),
CLK_LOOKUP("core_clk", rot_clk.c, "footswitch-8x60.6"),
- CLK_LOOKUP("tv_src_clk", tv_src_clk.c, ""),
- CLK_LOOKUP("tv_src_div_clk", tv_src_div_clk.c, ""),
+ CLK_LOOKUP("tv_src_clk", tv_src_clk.c, "footswitch-8x60.4"),
+ CLK_LOOKUP("tv_src_clk", tv_src_clk.c, NULL),
+ CLK_LOOKUP("tv_src_div_clk", tv_src_div_clk.c, NULL),
CLK_LOOKUP("core_clk", vcodec_clk.c, "msm_vidc.0"),
CLK_LOOKUP("core_clk", vcodec_clk.c, "footswitch-8x60.7"),
- CLK_LOOKUP("mdp_tv_clk", mdp_tv_clk.c, ""),
+ CLK_LOOKUP("mdp_tv_clk", mdp_tv_clk.c, NULL),
CLK_LOOKUP("tv_clk", mdp_tv_clk.c, "footswitch-8x60.4"),
- CLK_LOOKUP("hdmi_clk", hdmi_tv_clk.c, ""),
- CLK_LOOKUP("core_clk", hdmi_app_clk.c, ""),
+ CLK_LOOKUP("hdmi_clk", hdmi_tv_clk.c, NULL),
+ CLK_LOOKUP("core_clk", hdmi_app_clk.c, "hdmi_msm.1"),
CLK_LOOKUP("vpe_clk", vpe_clk.c, ""),
CLK_LOOKUP("core_clk", vpe_clk.c, "footswitch-8x60.9"),
CLK_LOOKUP("vfe_clk", vfe_clk.c, "msm_vfe.0"),
@@ -5064,8 +5041,8 @@
CLK_LOOKUP("dsi_s_pclk", dsi2_s_p_clk.c, NULL),
CLK_LOOKUP("iface_clk", gfx3d_p_clk.c, "kgsl-3d0.0"),
CLK_LOOKUP("iface_clk", gfx3d_p_clk.c, "footswitch-8x60.2"),
- CLK_LOOKUP("master_iface_clk", hdmi_m_p_clk.c, ""),
- CLK_LOOKUP("slave_iface_clk", hdmi_s_p_clk.c, ""),
+ CLK_LOOKUP("master_iface_clk", hdmi_m_p_clk.c, "hdmi_msm.1"),
+ CLK_LOOKUP("slave_iface_clk", hdmi_s_p_clk.c, "hdmi_msm.1"),
CLK_LOOKUP("ijpeg_pclk", ijpeg_p_clk.c, ""),
CLK_LOOKUP("iface_clk", ijpeg_p_clk.c, "footswitch-8x60.3"),
CLK_LOOKUP("iface_clk", jpegd_p_clk.c, ""),
@@ -5079,8 +5056,8 @@
CLK_LOOKUP("iface_clk", vcodec_p_clk.c, "footswitch-8x60.7"),
CLK_LOOKUP("vfe_pclk", vfe_p_clk.c, "msm_vfe.0"),
CLK_LOOKUP("iface_clk", vfe_p_clk.c, "footswitch-8x60.8"),
- CLK_LOOKUP("vpe_pclk", vpe_p_clk.c, ""),
- CLK_LOOKUP("iface_pclk", vpe_p_clk.c, "footswitch-8x60.9"),
+ CLK_LOOKUP("vpe_pclk", vpe_p_clk.c, "msm_vpe.0"),
+ CLK_LOOKUP("iface_clk", vpe_p_clk.c, "footswitch-8x60.9"),
CLK_LOOKUP("bit_clk", mi2s_bit_clk.c, "msm-dai-q6.6"),
CLK_LOOKUP("osr_clk", mi2s_osr_clk.c, "msm-dai-q6.6"),
@@ -5125,6 +5102,7 @@
CLK_LOOKUP("dfab_clk", dfab_sps_clk.c, "msm_sps"),
CLK_LOOKUP("bus_clk", dfab_bam_dmux_clk.c, "BAM_RMNT"),
CLK_LOOKUP("bus_clk", dfab_scm_clk.c, "scm"),
+ CLK_LOOKUP("bus_clk", dfab_qseecom_clk.c, "qseecom"),
CLK_LOOKUP("alt_core_clk", usb_hsic_xcvr_fs_clk.c, "msm_hsic_host"),
CLK_LOOKUP("phy_clk", usb_hsic_hsic_clk.c, "msm_hsic_host"),
@@ -5155,12 +5133,15 @@
};
static struct clk_lookup msm_clocks_8960[] = {
+ CLK_LOOKUP("xo", cxo_a_clk.c, ""),
+ CLK_LOOKUP("xo", pxo_a_clk.c, ""),
CLK_LOOKUP("xo", cxo_clk.c, "msm_otg"),
CLK_LOOKUP("cxo", cxo_clk.c, "wcnss_wlan.0"),
CLK_LOOKUP("cxo", cxo_clk.c, "pil_riva"),
CLK_LOOKUP("xo", pxo_clk.c, "pil_qdsp6v4.0"),
CLK_LOOKUP("xo", cxo_clk.c, "pil_qdsp6v4.1"),
CLK_LOOKUP("xo", cxo_clk.c, "pil_qdsp6v4.2"),
+ CLK_LOOKUP("xo", cxo_clk.c, "BAM_RMNT"),
CLK_LOOKUP("pll2", pll2_clk.c, NULL),
CLK_LOOKUP("pll8", pll8_clk.c, NULL),
CLK_LOOKUP("pll4", pll4_clk.c, NULL),
@@ -5171,7 +5152,7 @@
CLK_LOOKUP("bus_clk", cfpb_clk.c, "msm_cpss_fpb"),
CLK_LOOKUP("bus_a_clk", cfpb_a_clk.c, "msm_cpss_fpb"),
CLK_LOOKUP("bus_clk", sfab_clk.c, "msm_sys_fab"),
- CLK_LOOKUP("bus_a_clk", sfab_a_clk.c, "msm_sys_fab"),
+ CLK_LOOKUP("bus_a_clk", sfab_msmbus_a_clk.c, "msm_sys_fab"),
CLK_LOOKUP("bus_clk", sfpb_clk.c, "msm_sys_fpb"),
CLK_LOOKUP("bus_a_clk", sfpb_a_clk.c, "msm_sys_fpb"),
CLK_LOOKUP("bus_clk", mmfab_clk.c, "msm_mm_fab"),
@@ -5429,6 +5410,7 @@
CLK_LOOKUP("dfab_clk", dfab_sps_clk.c, "msm_sps"),
CLK_LOOKUP("bus_clk", dfab_bam_dmux_clk.c, "BAM_RMNT"),
CLK_LOOKUP("bus_clk", dfab_scm_clk.c, "scm"),
+ CLK_LOOKUP("bus_clk", dfab_qseecom_clk.c, "qseecom"),
CLK_LOOKUP("mem_clk", ebi1_adm_clk.c, "msm_dmov"),
@@ -5671,28 +5653,14 @@
/* Local clock driver initialization. */
static void __init msm8960_clock_init(void)
{
+ /* Keep PXO on whenever APPS cpu is active */
+ clk_prepare_enable(&pxo_a_clk.c);
- if (cpu_is_msm8960()) {
- rpm_vreg_id_vdd_dig = RPM_VREG_ID_PM8921_S3;
- } else if (cpu_is_apq8064()) {
- rpm_vreg_id_vdd_dig = RPM_VREG_ID_PM8921_S3;
- rpm_vreg_id_vdd_sr2_pll = RPM_VREG_ID_PM8921_LVS7;
+ if (cpu_is_apq8064()) {
+ vdd_sr2_pll.set_vdd = set_vdd_sr2_pll_8064;
} else if (cpu_is_msm8930() || cpu_is_msm8627()) {
- rpm_vreg_id_vdd_dig = RPM_VREG_ID_PM8038_S1;
- rpm_vreg_id_vdd_sr2_pll = RPM_VREG_ID_PM8038_L23;
- } else {
- BUG();
- }
-
- xo_pxo = msm_xo_get(MSM_XO_PXO, "clock-8960");
- if (IS_ERR(xo_pxo)) {
- pr_err("%s: msm_xo_get(PXO) failed.\n", __func__);
- BUG();
- }
- xo_cxo = msm_xo_get(MSM_XO_CXO, "clock-8960");
- if (IS_ERR(xo_cxo)) {
- pr_err("%s: msm_xo_get(CXO) failed.\n", __func__);
- BUG();
+ vdd_dig.set_vdd = set_vdd_dig_8930;
+ vdd_sr2_pll.set_vdd = set_vdd_sr2_pll_8930;
}
/*
@@ -5759,6 +5727,14 @@
rcg_clk_disable(&tssc_clk.c);
clk_enable(&usb_hsic_hsic_clk.c);
clk_disable(&usb_hsic_hsic_clk.c);
+
+ /*
+ * Keep sfab floor @ 54MHz so that Krait AHB is at least 27MHz at all
+ * times when Apps CPU is active. This ensures the timer's requirement
+ * of Krait AHB running 4 times as fast as the timer itself.
+ */
+ clk_set_rate(&sfab_tmr_a_clk.c, 54000000);
+ clk_enable(&sfab_tmr_a_clk.c);
}
static int __init msm8960_clock_late_init(void)
diff --git a/arch/arm/mach-msm/clock-8x60.c b/arch/arm/mach-msm/clock-8x60.c
index d3f5396..4da4454 100644
--- a/arch/arm/mach-msm/clock-8x60.c
+++ b/arch/arm/mach-msm/clock-8x60.c
@@ -24,7 +24,6 @@
#include <mach/msm_iomap.h>
#include <mach/clk.h>
-#include <mach/msm_xo.h>
#include <mach/scm-io.h>
#include <mach/rpm.h>
#include <mach/rpm-regulator.h>
@@ -298,62 +297,8 @@
.fmax[VDD_DIG_##l2] = (f2), \
.fmax[VDD_DIG_##l3] = (f3)
-static struct msm_xo_voter *xo_pxo, *xo_cxo;
-
-static bool xo_clk_is_local(struct clk *clk)
-{
- return false;
-}
-
-static int pxo_clk_enable(struct clk *clk)
-{
- return msm_xo_mode_vote(xo_pxo, MSM_XO_MODE_ON);
-}
-
-static void pxo_clk_disable(struct clk *clk)
-{
- msm_xo_mode_vote(xo_pxo, MSM_XO_MODE_OFF);
-}
-
-static struct clk_ops clk_ops_pxo = {
- .enable = pxo_clk_enable,
- .disable = pxo_clk_disable,
- .is_local = xo_clk_is_local,
-};
-
-static struct fixed_clk pxo_clk = {
- .c = {
- .dbg_name = "pxo_clk",
- .rate = 27000000,
- .ops = &clk_ops_pxo,
- CLK_INIT(pxo_clk.c),
- },
-};
-
-static int cxo_clk_enable(struct clk *clk)
-{
- return msm_xo_mode_vote(xo_cxo, MSM_XO_MODE_ON);
-}
-
-static void cxo_clk_disable(struct clk *clk)
-{
- msm_xo_mode_vote(xo_cxo, MSM_XO_MODE_OFF);
-}
-
-static struct clk_ops clk_ops_cxo = {
- .enable = cxo_clk_enable,
- .disable = cxo_clk_disable,
- .is_local = xo_clk_is_local,
-};
-
-static struct fixed_clk cxo_clk = {
- .c = {
- .dbg_name = "cxo_clk",
- .rate = 19200000,
- .ops = &clk_ops_cxo,
- CLK_INIT(cxo_clk.c),
- },
-};
+DEFINE_CLK_RPM_BRANCH(pxo_clk, pxo_a_clk, PXO, 27000000);
+DEFINE_CLK_RPM_BRANCH(cxo_clk, cxo_a_clk, CXO, 19200000);
static struct pll_vote_clk pll8_clk = {
.en_reg = BB_PLL_ENA_SC0_REG,
@@ -365,6 +310,7 @@
.rate = 384000000,
.ops = &clk_ops_pll_vote,
CLK_INIT(pll8_clk.c),
+ .warned = true,
},
};
@@ -376,6 +322,7 @@
.rate = 800000000,
.ops = &clk_ops_pll,
CLK_INIT(pll2_clk.c),
+ .warned = true,
},
};
@@ -387,6 +334,7 @@
.rate = 0, /* TODO: Detect rate dynamically */
.ops = &clk_ops_pll,
CLK_INIT(pll3_clk.c),
+ .warned = true,
},
};
@@ -425,6 +373,7 @@
.rate = 540672000,
.ops = &clk_ops_pll4,
CLK_INIT(pll4_clk.c),
+ .warned = true,
},
};
@@ -486,7 +435,6 @@
.auto_off = rcg_clk_disable,
.handoff = rcg_clk_handoff,
.set_rate = rcg_clk_set_rate,
- .get_rate = rcg_clk_get_rate,
.list_rate = rcg_clk_list_rate,
.is_enabled = rcg_clk_is_enabled,
.round_rate = rcg_clk_round_rate,
@@ -3548,7 +3496,9 @@
};
static struct clk_lookup msm_clocks_8x60[] = {
- CLK_LOOKUP("cxo", cxo_clk.c, NULL),
+ CLK_LOOKUP("xo", cxo_clk.c, ""),
+ CLK_LOOKUP("xo", cxo_a_clk.c, ""),
+ CLK_LOOKUP("xo", pxo_a_clk.c, ""),
CLK_LOOKUP("xo", pxo_clk.c, "pil_modem"),
CLK_LOOKUP("pll4", pll4_clk.c, "pil_qdsp6v3"),
CLK_LOOKUP("measure", measure_clk.c, "debug"),
@@ -3765,6 +3715,12 @@
CLK_LOOKUP("core_clk", gfx2d0_clk.c, "msm_iommu.10"),
CLK_LOOKUP("core_clk", gfx2d1_clk.c, "msm_iommu.11"),
+ CLK_LOOKUP("mdp_iommu_clk", mdp_axi_clk.c, "msm_vidc.0"),
+ CLK_LOOKUP("rot_iommu_clk", rot_axi_clk.c, "msm_vidc.0"),
+ CLK_LOOKUP("vcodec_iommu0_clk", vcodec_axi_clk.c, "msm_vidc.0"),
+ CLK_LOOKUP("vcodec_iommu1_clk", vcodec_axi_clk.c, "msm_vidc.0"),
+ CLK_LOOKUP("smmu_iface_clk", smmu_p_clk.c, "msm_vidc.0"),
+
CLK_LOOKUP("dfab_dsps_clk", dfab_dsps_clk.c, NULL),
CLK_LOOKUP("core_clk", dfab_usb_hs_clk.c, "msm_otg"),
CLK_LOOKUP("bus_clk", dfab_sdc1_clk.c, "msm_sdcc.1"),
@@ -3883,18 +3839,9 @@
/* Local clock driver initialization. */
static void __init msm8660_clock_init(void)
{
- xo_pxo = msm_xo_get(MSM_XO_PXO, "clock-8x60");
- if (IS_ERR(xo_pxo)) {
- pr_err("%s: msm_xo_get(PXO) failed.\n", __func__);
- BUG();
- }
- xo_cxo = msm_xo_get(MSM_XO_CXO, "clock-8x60");
- if (IS_ERR(xo_cxo)) {
- pr_err("%s: msm_xo_get(CXO) failed.\n", __func__);
- BUG();
- }
-
vote_vdd_level(&vdd_dig, VDD_DIG_HIGH);
+ /* Keep PXO on whenever APPS cpu is active */
+ clk_prepare_enable(&pxo_a_clk.c);
/* Initialize clock registers. */
reg_init();
diff --git a/arch/arm/mach-msm/clock-9615.c b/arch/arm/mach-msm/clock-9615.c
index df9c152..3e059b6 100644
--- a/arch/arm/mach-msm/clock-9615.c
+++ b/arch/arm/mach-msm/clock-9615.c
@@ -25,7 +25,6 @@
#include <mach/msm_iomap.h>
#include <mach/clk.h>
-#include <mach/msm_xo.h>
#include <mach/rpm-9615.h>
#include <mach/rpm-regulator.h>
@@ -208,32 +207,7 @@
* Clock Descriptions
*/
-static struct msm_xo_voter *xo_cxo;
-
-static int cxo_clk_enable(struct clk *clk)
-{
- return msm_xo_mode_vote(xo_cxo, MSM_XO_MODE_ON);
-}
-
-static void cxo_clk_disable(struct clk *clk)
-{
- msm_xo_mode_vote(xo_cxo, MSM_XO_MODE_OFF);
-}
-
-static struct clk_ops clk_ops_cxo = {
- .enable = cxo_clk_enable,
- .disable = cxo_clk_disable,
- .is_local = local_clk_is_local,
-};
-
-static struct fixed_clk cxo_clk = {
- .c = {
- .dbg_name = "cxo_clk",
- .rate = 19200000,
- .ops = &clk_ops_cxo,
- CLK_INIT(cxo_clk.c),
- },
-};
+DEFINE_CLK_RPM_BRANCH(cxo_clk, cxo_a_clk, CXO, 19200000);
static DEFINE_SPINLOCK(soft_vote_lock);
@@ -294,6 +268,7 @@
.rate = 276000000,
.ops = &clk_ops_pll_acpu_vote,
CLK_INIT(pll0_clk.c),
+ .warned = true,
},
};
@@ -308,6 +283,7 @@
.rate = 276000000,
.ops = &clk_ops_pll_acpu_vote,
CLK_INIT(pll0_acpu_clk.c),
+ .warned = true,
},
};
@@ -321,6 +297,7 @@
.rate = 393216000,
.ops = &clk_ops_pll_vote,
CLK_INIT(pll4_clk.c),
+ .warned = true,
},
};
@@ -338,6 +315,7 @@
.rate = 384000000,
.ops = &clk_ops_pll_acpu_vote,
CLK_INIT(pll8_clk.c),
+ .warned = true,
},
};
@@ -352,6 +330,7 @@
.rate = 384000000,
.ops = &clk_ops_pll_acpu_vote,
CLK_INIT(pll8_acpu_clk.c),
+ .warned = true,
},
};
@@ -362,6 +341,7 @@
.rate = 440000000,
.ops = &clk_ops_pll,
CLK_INIT(pll9_acpu_clk.c),
+ .warned = true,
},
};
@@ -375,6 +355,7 @@
.rate = 480000000,
.ops = &clk_ops_pll_vote,
CLK_INIT(pll14_clk.c),
+ .warned = true,
},
};
@@ -387,7 +368,6 @@
.in_hwcg_mode = rcg_clk_in_hwcg_mode,
.handoff = rcg_clk_handoff,
.set_rate = rcg_clk_set_rate,
- .get_rate = rcg_clk_get_rate,
.list_rate = rcg_clk_list_rate,
.is_enabled = rcg_clk_is_enabled,
.round_rate = rcg_clk_round_rate,
@@ -663,7 +643,7 @@
.c = { \
.dbg_name = #name, \
.ops = &clk_ops_rcg_9615, \
- VDD_DIG_FMAX_MAP2(LOW, 25000000, NOMINAL, 50000000), \
+ VDD_DIG_FMAX_MAP2(LOW, 26000000, NOMINAL, 52000000), \
CLK_INIT(name.c), \
}, \
}
@@ -682,7 +662,10 @@
F_SDC( 17070000, pll8, 1, 2, 45),
F_SDC( 20210000, pll8, 1, 1, 19),
F_SDC( 24000000, pll8, 4, 1, 4),
+ F_SDC( 38400000, pll8, 2, 1, 5),
F_SDC( 48000000, pll8, 4, 1, 2),
+ F_SDC( 64000000, pll8, 3, 1, 2),
+ F_SDC( 76800000, pll8, 1, 1, 5),
F_END
};
@@ -1378,12 +1361,7 @@
static DEFINE_CLK_VOTER(dfab_sps_clk, &dfab_clk.c);
static DEFINE_CLK_VOTER(dfab_bam_dmux_clk, &dfab_clk.c);
static DEFINE_CLK_VOTER(ebi1_msmbus_clk, &ebi1_clk.c);
-
-/*
- * TODO: replace dummy_clk below with ebi1_clk.c once the
- * bus driver starts voting on ebi1 rates.
- */
-static DEFINE_CLK_VOTER(ebi1_adm_clk, &dummy_clk);
+static DEFINE_CLK_VOTER(ebi1_adm_clk, &ebi1_clk.c);
#ifdef CONFIG_DEBUG_FS
struct measure_sel {
@@ -1621,7 +1599,9 @@
};
static struct clk_lookup msm_clocks_9615[] = {
+ CLK_LOOKUP("xo", cxo_a_clk.c, ""),
CLK_LOOKUP("xo", cxo_clk.c, "msm_otg"),
+ CLK_LOOKUP("xo", cxo_clk.c, "BAM_RMNT"),
CLK_LOOKUP("pll0", pll0_clk.c, NULL),
CLK_LOOKUP("pll8", pll8_clk.c, NULL),
CLK_LOOKUP("pll14", pll14_clk.c, NULL),
@@ -1730,11 +1710,6 @@
CLK_LOOKUP("q6sw_clk", q6sw_clk, NULL),
CLK_LOOKUP("q6fw_clk", q6fw_clk, NULL),
CLK_LOOKUP("q6_func_clk", q6_func_clk, NULL),
-
- /* TODO: Make this real when RPM's ready. */
- CLK_DUMMY("ebi1_msmbus_clk", ebi1_msmbus_clk.c, NULL, OFF),
- CLK_DUMMY("mem_clk", ebi1_adm_clk.c, "msm_dmov", OFF),
-
};
static void set_fsm_mode(void __iomem *mode_reg)
@@ -1858,13 +1833,9 @@
/* Local clock driver initialization. */
static void __init msm9615_clock_init(void)
{
- xo_cxo = msm_xo_get(MSM_XO_CXO, "clock-9615");
- if (IS_ERR(xo_cxo)) {
- pr_err("%s: msm_xo_get(CXO) failed.\n", __func__);
- BUG();
- }
-
vote_vdd_level(&vdd_dig, VDD_DIG_HIGH);
+ /* Keep CXO on whenever APPS cpu is active */
+ clk_prepare_enable(&cxo_a_clk.c);
clk_ops_pll.enable = sr_pll_clk_enable;
diff --git a/arch/arm/mach-msm/clock-debug.c b/arch/arm/mach-msm/clock-debug.c
index 411a272..31be6af 100644
--- a/arch/arm/mach-msm/clock-debug.c
+++ b/arch/arm/mach-msm/clock-debug.c
@@ -1,6 +1,6 @@
/*
* Copyright (C) 2007 Google, Inc.
- * Copyright (c) 2007-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2007-2012, Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -92,9 +92,9 @@
int rc = 0;
if (val)
- rc = clk_enable(clock);
+ rc = clk_prepare_enable(clock);
else
- clk_disable(clock);
+ clk_disable_unprepare(clock);
return rc;
}
diff --git a/arch/arm/mach-msm/clock-local.c b/arch/arm/mach-msm/clock-local.c
index 4f68fb4..52e8afe 100644
--- a/arch/arm/mach-msm/clock-local.c
+++ b/arch/arm/mach-msm/clock-local.c
@@ -526,27 +526,6 @@
return rc;
}
-/* Get the currently-set rate of a clock in Hz. */
-unsigned long rcg_clk_get_rate(struct clk *c)
-{
- struct rcg_clk *clk = to_rcg_clk(c);
- unsigned long flags;
- unsigned ret = 0;
-
- spin_lock_irqsave(&local_clock_reg_lock, flags);
- ret = clk->current_freq->freq_hz;
- spin_unlock_irqrestore(&local_clock_reg_lock, flags);
-
- /*
- * Return 0 if the rate has never been set. Might not be correct,
- * but it's good enough.
- */
- if (ret == FREQ_END)
- ret = 0;
-
- return ret;
-}
-
/* Check if a clock is currently enabled. */
int rcg_clk_is_enabled(struct clk *clk)
{
diff --git a/arch/arm/mach-msm/clock-local.h b/arch/arm/mach-msm/clock-local.h
index c587b43..44e86b1 100644
--- a/arch/arm/mach-msm/clock-local.h
+++ b/arch/arm/mach-msm/clock-local.h
@@ -207,7 +207,6 @@
int rcg_clk_enable(struct clk *clk);
void rcg_clk_disable(struct clk *clk);
int rcg_clk_set_rate(struct clk *clk, unsigned long rate);
-unsigned long rcg_clk_get_rate(struct clk *clk);
int rcg_clk_list_rate(struct clk *clk, unsigned n);
int rcg_clk_is_enabled(struct clk *clk);
long rcg_clk_round_rate(struct clk *clk, unsigned long rate);
diff --git a/arch/arm/mach-msm/clock-pcom-lookup.c b/arch/arm/mach-msm/clock-pcom-lookup.c
index 200cbfe..a0defe3 100644
--- a/arch/arm/mach-msm/clock-pcom-lookup.c
+++ b/arch/arm/mach-msm/clock-pcom-lookup.c
@@ -11,9 +11,16 @@
*/
#include "clock.h"
+#include "clock-pll.h"
#include "clock-pcom.h"
#include "clock-voter.h"
+#include <mach/msm_iomap.h>
+#include <mach/socinfo.h>
+
+#define PLLn_MODE(n) (MSM_CLK_CTL_BASE + 0x300 + 28 * (n))
+#define PLL4_MODE (MSM_CLK_CTL_BASE + 0x374)
+
static DEFINE_CLK_PCOM(adm_clk, ADM_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(adsp_clk, ADSP_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(ahb_m_clk, AHB_M_CLK, CLKFLAG_SKIP_AUTO_OFF);
@@ -28,6 +35,46 @@
static DEFINE_CLK_PCOM(csi1_p_clk, CSI1_P_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(csi1_vfe_clk, CSI1_VFE_CLK, CLKFLAG_SKIP_AUTO_OFF);
+static struct pll_shared_clk pll0_clk = {
+ .id = PLL_0,
+ .mode_reg = PLLn_MODE(0),
+ .c = {
+ .ops = &clk_pll_ops,
+ .dbg_name = "pll0_clk",
+ CLK_INIT(pll0_clk.c),
+ },
+};
+
+static struct pll_shared_clk pll1_clk = {
+ .id = PLL_1,
+ .mode_reg = PLLn_MODE(1),
+ .c = {
+ .ops = &clk_pll_ops,
+ .dbg_name = "pll1_clk",
+ CLK_INIT(pll1_clk.c),
+ },
+};
+
+static struct pll_shared_clk pll2_clk = {
+ .id = PLL_2,
+ .mode_reg = PLLn_MODE(2),
+ .c = {
+ .ops = &clk_pll_ops,
+ .dbg_name = "pll2_clk",
+ CLK_INIT(pll2_clk.c),
+ },
+};
+
+static struct pll_shared_clk pll4_clk = {
+ .id = PLL_4,
+ .mode_reg = PLL4_MODE,
+ .c = {
+ .ops = &clk_pll_ops,
+ .dbg_name = "pll4_clk",
+ CLK_INIT(pll4_clk.c),
+ },
+};
+
static struct pcom_clk dsi_byte_clk = {
.id = P_DSI_BYTE_CLK,
.c = {
@@ -251,19 +298,30 @@
CLK_LOOKUP("core_clk", ebi_usb_clk.c, "msm_otg"),
CLK_LOOKUP("ebi1_vfe_clk", ebi_vfe_clk.c, NULL),
CLK_LOOKUP("mem_clk", ebi_adm_clk.c, "msm_dmov"),
+
+ CLK_LOOKUP("pll0_clk", pll0_clk.c, "acpu"),
+ CLK_LOOKUP("pll1_clk", pll1_clk.c, "acpu"),
+ CLK_LOOKUP("pll2_clk", pll2_clk.c, "acpu"),
};
struct clock_init_data msm7x27_clock_init_data __initdata = {
.table = msm_clocks_7x27,
.size = ARRAY_SIZE(msm_clocks_7x27),
+ .init = msm_shared_pll_control_init,
};
-static struct clk_lookup msm_clocks_7x27a[] = {
+/* Clock table for common clocks between 7627a and 7625a */
+static struct clk_lookup msm_cmn_clk_7625a_7627a[] __initdata = {
CLK_LOOKUP("core_clk", adm_clk.c, "msm_dmov"),
CLK_LOOKUP("adsp_clk", adsp_clk.c, NULL),
CLK_LOOKUP("ahb_m_clk", ahb_m_clk.c, NULL),
CLK_LOOKUP("ahb_s_clk", ahb_s_clk.c, NULL),
CLK_LOOKUP("cam_m_clk", cam_m_clk.c, NULL),
+ CLK_LOOKUP("cam_clk", cam_m_clk.c, "0-0036"),
+ CLK_LOOKUP("cam_clk", cam_m_clk.c, "0-001b"),
+ CLK_LOOKUP("cam_clk", cam_m_clk.c, "0-0010"),
+ CLK_LOOKUP("cam_clk", cam_m_clk.c, "0-0078"),
+ CLK_LOOKUP("cam_clk", cam_m_clk.c, "0-006c"),
CLK_LOOKUP("csi_clk", csi0_clk.c, "msm_camera_ov9726.0"),
CLK_LOOKUP("csi_pclk", csi0_p_clk.c, "msm_camera_ov9726.0"),
CLK_LOOKUP("csi_vfe_clk", csi0_vfe_clk.c, "msm_camera_ov9726.0"),
@@ -340,11 +398,41 @@
CLK_LOOKUP("ebi1_mddi_clk", ebi_mddi_clk.c, NULL),
CLK_LOOKUP("ebi1_vfe_clk", ebi_vfe_clk.c, NULL),
CLK_LOOKUP("mem_clk", ebi_adm_clk.c, "msm_dmov"),
+
+ CLK_LOOKUP("pll0_clk", pll0_clk.c, "acpu"),
+ CLK_LOOKUP("pll1_clk", pll1_clk.c, "acpu"),
+ CLK_LOOKUP("pll2_clk", pll2_clk.c, "acpu"),
+
};
+/* PLL 4 clock is available for 7627a target. */
+static struct clk_lookup msm_clk_7627a[] __initdata = {
+ CLK_LOOKUP("pll4_clk", pll4_clk.c, "acpu"),
+};
+
+static struct clk_lookup msm_clk_7627a_7625a[ARRAY_SIZE(msm_cmn_clk_7625a_7627a)
+ + ARRAY_SIZE(msm_clk_7627a)];
+
+static void __init msm7627a_clock_init(void)
+{
+ int size = ARRAY_SIZE(msm_cmn_clk_7625a_7627a);
+
+ /* Intialize shared PLL control structure */
+ msm_shared_pll_control_init();
+
+ memcpy(&msm_clk_7627a_7625a, &msm_cmn_clk_7625a_7627a,
+ sizeof(msm_cmn_clk_7625a_7627a));
+ if (!cpu_is_msm7x25a()) {
+ memcpy(&msm_clk_7627a_7625a[size],
+ &msm_clk_7627a, sizeof(msm_clk_7627a));
+ size += ARRAY_SIZE(msm_clk_7627a);
+ }
+ msm7x27a_clock_init_data.size = size;
+}
+
struct clock_init_data msm7x27a_clock_init_data __initdata = {
- .table = msm_clocks_7x27a,
- .size = ARRAY_SIZE(msm_clocks_7x27a),
+ .table = msm_clk_7627a_7625a,
+ .init = msm7627a_clock_init,
};
static struct clk_lookup msm_clocks_8x50[] = {
diff --git a/arch/arm/mach-msm/clock-pll.c b/arch/arm/mach-msm/clock-pll.c
new file mode 100644
index 0000000..b5b6ca7
--- /dev/null
+++ b/arch/arm/mach-msm/clock-pll.c
@@ -0,0 +1,196 @@
+/*
+ * Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/remote_spinlock.h>
+
+#include <mach/socinfo.h>
+#include <mach/msm_iomap.h>
+
+#include "clock.h"
+#include "clock-pll.h"
+#include "smd_private.h"
+
+struct pll_rate {
+ unsigned int lvalue;
+ unsigned long rate;
+};
+
+static struct pll_rate pll_l_rate[] = {
+ {10, 196000000},
+ {12, 245760000},
+ {30, 589820000},
+ {38, 737280000},
+ {41, 800000000},
+ {50, 960000000},
+ {52, 1008000000},
+ {62, 1200000000},
+ {63, 1209600000},
+ {0, 0},
+};
+
+#define PLL_BASE 7
+
+struct shared_pll_control {
+ uint32_t version;
+ struct {
+ /*
+ * Denotes if the PLL is ON. Technically, this can be read
+ * directly from the PLL registers, but this feild is here,
+ * so let's use it.
+ */
+ uint32_t on;
+ /*
+ * One bit for each processor core. The application processor
+ * is allocated bit position 1. All other bits should be
+ * considered as votes from other processors.
+ */
+ uint32_t votes;
+ } pll[PLL_BASE + PLL_END];
+};
+
+static remote_spinlock_t pll_lock;
+static struct shared_pll_control *pll_control;
+
+void __init msm_shared_pll_control_init(void)
+{
+#define PLL_REMOTE_SPINLOCK_ID "S:7"
+ unsigned smem_size;
+
+ remote_spin_lock_init(&pll_lock, PLL_REMOTE_SPINLOCK_ID);
+
+ pll_control = smem_get_entry(SMEM_CLKREGIM_SOURCES, &smem_size);
+ if (!pll_control) {
+ pr_err("Can't find shared PLL control data structure!\n");
+ BUG();
+ /*
+ * There might be more PLLs than what the application processor knows
+ * about. But the index used for each PLL is guaranteed to remain the
+ * same.
+ */
+ } else if (smem_size < sizeof(struct shared_pll_control)) {
+ pr_err("Shared PLL control data"
+ "structure too small!\n");
+ BUG();
+ } else if (pll_control->version != 0xCCEE0001) {
+ pr_err("Shared PLL control version mismatch!\n");
+ BUG();
+ } else {
+ pr_info("Shared PLL control available.\n");
+ return;
+ }
+
+}
+
+static void pll_enable(void __iomem *addr, unsigned on)
+{
+ if (on) {
+ writel_relaxed(2, addr);
+ mb();
+ udelay(5);
+ writel_relaxed(6, addr);
+ mb();
+ udelay(50);
+ writel_relaxed(7, addr);
+ } else {
+ writel_relaxed(0, addr);
+ }
+}
+
+static int pll_clk_enable(struct clk *clk)
+{
+ struct pll_shared_clk *pll = to_pll_shared_clk(clk);
+ unsigned int pll_id = pll->id;
+
+ remote_spin_lock(&pll_lock);
+
+ pll_control->pll[PLL_BASE + pll_id].votes |= BIT(1);
+ if (!pll_control->pll[PLL_BASE + pll_id].on) {
+ pll_enable(pll->mode_reg, 1);
+ pll_control->pll[PLL_BASE + pll_id].on = 1;
+ }
+
+ remote_spin_unlock(&pll_lock);
+ return 0;
+}
+
+static void pll_clk_disable(struct clk *clk)
+{
+ struct pll_shared_clk *pll = to_pll_shared_clk(clk);
+ unsigned int pll_id = pll->id;
+
+ remote_spin_lock(&pll_lock);
+
+ pll_control->pll[PLL_BASE + pll_id].votes &= ~BIT(1);
+ if (pll_control->pll[PLL_BASE + pll_id].on
+ && !pll_control->pll[PLL_BASE + pll_id].votes) {
+ pll_enable(pll->mode_reg, 0);
+ pll_control->pll[PLL_BASE + pll_id].on = 0;
+ }
+
+ remote_spin_unlock(&pll_lock);
+}
+
+static int pll_clk_is_enabled(struct clk *clk)
+{
+ struct pll_shared_clk *pll = to_pll_shared_clk(clk);
+
+ return readl_relaxed(pll->mode_reg) & BIT(0);
+}
+
+static bool pll_clk_is_local(struct clk *clk)
+{
+ return true;
+}
+
+static int pll_clk_handoff(struct clk *clk)
+{
+ struct pll_shared_clk *pll = to_pll_shared_clk(clk);
+ unsigned int pll_lval;
+ struct pll_rate *l;
+
+ /*
+ * Wait for the PLLs to be initialized and then read their frequency.
+ */
+ do {
+ pll_lval = readl_relaxed(pll->mode_reg + 4) & 0x3ff;
+ cpu_relax();
+ udelay(50);
+ } while (pll_lval == 0);
+
+ /* Convert PLL L values to PLL Output rate */
+ for (l = pll_l_rate; l->rate != 0; l++) {
+ if (l->lvalue == pll_lval) {
+ clk->rate = l->rate;
+ break;
+ }
+ }
+
+ if (!clk->rate) {
+ pr_crit("Unknown PLL's L value!\n");
+ BUG();
+ }
+
+ return 0;
+}
+
+struct clk_ops clk_pll_ops = {
+ .enable = pll_clk_enable,
+ .disable = pll_clk_disable,
+ .handoff = pll_clk_handoff,
+ .is_local = pll_clk_is_local,
+ .is_enabled = pll_clk_is_enabled,
+};
diff --git a/arch/arm/mach-msm/clock-pll.h b/arch/arm/mach-msm/clock-pll.h
new file mode 100644
index 0000000..ae0ca17
--- /dev/null
+++ b/arch/arm/mach-msm/clock-pll.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+/**
+ * enum - For PLL IDs
+ */
+enum {
+ PLL_TCXO = -1,
+ PLL_0 = 0,
+ PLL_1,
+ PLL_2,
+ PLL_3,
+ PLL_4,
+ PLL_END,
+};
+
+/**
+ * struct pll_shared_clk - PLL shared with other processors without
+ * any HW voting
+ * @id: PLL ID
+ * @mode_reg: enable register
+ * @parent: clock source
+ * @c: clk
+ */
+struct pll_shared_clk {
+ unsigned int id;
+ void __iomem *const mode_reg;
+ struct clk c;
+};
+
+extern struct clk_ops clk_pll_ops;
+
+static inline struct pll_shared_clk *to_pll_shared_clk(struct clk *clk)
+{
+ return container_of(clk, struct pll_shared_clk, c);
+}
+
+/**
+ * msm_shared_pll_control_init() - Initialize shared pll control structure
+ */
+void msm_shared_pll_control_init(void);
diff --git a/arch/arm/mach-msm/clock-rpm.c b/arch/arm/mach-msm/clock-rpm.c
index fc2e83f..ae87bb7 100644
--- a/arch/arm/mach-msm/clock-rpm.c
+++ b/arch/arm/mach-msm/clock-rpm.c
@@ -187,12 +187,6 @@
return false;
}
-static unsigned long rpm_branch_clk_get_rate(struct clk *clk)
-{
- struct rpm_clk *r = to_rpm_clk(clk);
- return r->last_set_khz * 1000;
-}
-
struct clk_ops clk_ops_rpm = {
.enable = rpm_clk_enable,
.disable = rpm_clk_disable,
@@ -207,5 +201,4 @@
.enable = rpm_clk_enable,
.disable = rpm_clk_disable,
.is_local = rpm_clk_is_local,
- .get_rate = rpm_branch_clk_get_rate,
};
diff --git a/arch/arm/mach-msm/clock-rpm.h b/arch/arm/mach-msm/clock-rpm.h
index 27afd6f..b0d5693 100644
--- a/arch/arm/mach-msm/clock-rpm.h
+++ b/arch/arm/mach-msm/clock-rpm.h
@@ -67,34 +67,38 @@
}, \
};
-#define DEFINE_CLK_RPM_BRANCH(name, active, r_id, rate) \
+#define DEFINE_CLK_RPM_BRANCH(name, active, r_id, r) \
static struct rpm_clk active; \
static struct rpm_clk name = { \
.rpm_clk_id = MSM_RPM_ID_##r_id##_CLK, \
.rpm_status_id = MSM_RPM_STATUS_ID_##r_id##_CLK, \
.peer = &active, \
- .last_set_khz = ((rate) / 1000), \
- .last_set_sleep_khz = ((rate) / 1000), \
+ .last_set_khz = ((r) / 1000), \
+ .last_set_sleep_khz = ((r) / 1000), \
.branch = true, \
.c = { \
.ops = &clk_ops_rpm_branch, \
.flags = CLKFLAG_SKIP_AUTO_OFF, \
.dbg_name = #name, \
+ .rate = (r), \
CLK_INIT(name.c), \
+ .warned = true, \
}, \
}; \
static struct rpm_clk active = { \
.rpm_clk_id = MSM_RPM_ID_##r_id##_CLK, \
.rpm_status_id = MSM_RPM_STATUS_ID_##r_id##_CLK, \
.peer = &name, \
- .last_set_khz = ((rate) / 1000), \
+ .last_set_khz = ((r) / 1000), \
.active_only = true, \
.branch = true, \
.c = { \
.ops = &clk_ops_rpm_branch, \
.flags = CLKFLAG_SKIP_AUTO_OFF, \
.dbg_name = #active, \
+ .rate = (r), \
CLK_INIT(active.c), \
+ .warned = true, \
}, \
};
diff --git a/arch/arm/mach-msm/clock.c b/arch/arm/mach-msm/clock.c
index 5b89fa9..7f0cafd 100644
--- a/arch/arm/mach-msm/clock.c
+++ b/arch/arm/mach-msm/clock.c
@@ -127,6 +127,41 @@
unvote_vdd_level(clk->vdd_class, level);
}
+int clk_prepare(struct clk *clk)
+{
+ int ret = 0;
+ struct clk *parent;
+ if (!clk)
+ return 0;
+
+ mutex_lock(&clk->prepare_lock);
+ if (clk->prepare_count == 0) {
+ parent = clk_get_parent(clk);
+
+ ret = clk_prepare(parent);
+ if (ret)
+ goto out;
+ ret = clk_prepare(clk->depends);
+ if (ret)
+ goto err_prepare_depends;
+
+ if (clk->ops->prepare)
+ ret = clk->ops->prepare(clk);
+ if (ret)
+ goto err_prepare_clock;
+ }
+ clk->prepare_count++;
+out:
+ mutex_unlock(&clk->prepare_lock);
+ return ret;
+err_prepare_clock:
+ clk_unprepare(clk->depends);
+err_prepare_depends:
+ clk_unprepare(parent);
+ goto out;
+}
+EXPORT_SYMBOL(clk_prepare);
+
/*
* Standard clock functions defined in include/linux/clk.h
*/
@@ -140,6 +175,10 @@
return 0;
spin_lock_irqsave(&clk->lock, flags);
+ if (WARN(!clk->warned && !clk->prepare_count,
+ "%s: Don't call enable on unprepared clocks\n",
+ clk->dbg_name))
+ clk->warned = true;
if (clk->count == 0) {
parent = clk_get_parent(clk);
@@ -193,6 +232,11 @@
return;
spin_lock_irqsave(&clk->lock, flags);
+ if (WARN(!clk->warned && !clk->prepare_count,
+ "%s: Never called prepare or calling disable "
+ "after unprepare\n",
+ clk->dbg_name))
+ clk->warned = true;
if (WARN(clk->count == 0, "%s is unbalanced", clk->dbg_name))
goto out;
if (clk->count == 1) {
@@ -210,6 +254,37 @@
}
EXPORT_SYMBOL(clk_disable);
+void clk_unprepare(struct clk *clk)
+{
+ if (!clk)
+ return;
+
+ mutex_lock(&clk->prepare_lock);
+ if (!clk->prepare_count) {
+ if (WARN(!clk->warned, "%s is unbalanced (prepare)",
+ clk->dbg_name))
+ clk->warned = true;
+ goto out;
+ }
+ if (clk->prepare_count == 1) {
+ struct clk *parent = clk_get_parent(clk);
+
+ if (WARN(!clk->warned && clk->count,
+ "%s: Don't call unprepare when the clock is enabled\n",
+ clk->dbg_name))
+ clk->warned = true;
+
+ if (clk->ops->unprepare)
+ clk->ops->unprepare(clk);
+ clk_unprepare(clk->depends);
+ clk_unprepare(parent);
+ }
+ clk->prepare_count--;
+out:
+ mutex_unlock(&clk->prepare_lock);
+}
+EXPORT_SYMBOL(clk_unprepare);
+
int clk_reset(struct clk *clk, enum clk_reset_action action)
{
if (!clk->ops->reset)
@@ -335,7 +410,7 @@
if (clk->ops->handoff && !(clk->flags & CLKFLAG_HANDOFF_RATE)) {
if (clk->ops->handoff(clk)) {
clk->flags |= CLKFLAG_HANDOFF_RATE;
- clk_enable(clk);
+ clk_prepare_enable(clk);
}
}
}
@@ -372,11 +447,11 @@
}
spin_unlock_irqrestore(&clk->lock, flags);
/*
- * Calling clk_disable() outside the lock is safe since
+ * Calling this outside the lock is safe since
* it doesn't need to be atomic with the flag change.
*/
if (handoff)
- clk_disable(clk);
+ clk_disable_unprepare(clk);
}
}
pr_info("clock_late_init() disabled %d unused clocks\n", count);
diff --git a/arch/arm/mach-msm/clock.h b/arch/arm/mach-msm/clock.h
index 4210bd9..bce2e0f 100644
--- a/arch/arm/mach-msm/clock.h
+++ b/arch/arm/mach-msm/clock.h
@@ -21,6 +21,7 @@
#include <linux/list.h>
#include <linux/clkdev.h>
#include <linux/spinlock.h>
+#include <linux/mutex.h>
#include <mach/clk.h>
@@ -63,8 +64,10 @@
}
struct clk_ops {
+ int (*prepare)(struct clk *clk);
int (*enable)(struct clk *clk);
void (*disable)(struct clk *clk);
+ void (*unprepare)(struct clk *clk);
void (*auto_off)(struct clk *clk);
void (*enable_hwcg)(struct clk *clk);
void (*disable_hwcg)(struct clk *clk);
@@ -85,11 +88,14 @@
/**
* struct clk
+ * @prepare_count: prepare refcount
+ * @prepare_lock: protects clk_prepare()/clk_unprepare() path and @prepare_count
* @count: enable refcount
* @lock: protects clk_enable()/clk_disable() path and @count
* @depends: non-direct parent of clock to enable when this clock is enabled
* @vdd_class: voltage scaling requirement class
* @fmax: maximum frequency in Hz supported at each voltage level
+ * @warned: true if the clock has warned of incorrect usage, false otherwise
*/
struct clk {
uint32_t flags;
@@ -103,12 +109,16 @@
struct list_head children;
struct list_head siblings;
+ bool warned;
unsigned count;
spinlock_t lock;
+ unsigned prepare_count;
+ struct mutex prepare_lock;
};
#define CLK_INIT(name) \
.lock = __SPIN_LOCK_UNLOCKED((name).lock), \
+ .prepare_lock = __MUTEX_INITIALIZER((name).prepare_lock), \
.children = LIST_HEAD_INIT((name).children), \
.siblings = LIST_HEAD_INIT((name).siblings)
diff --git a/arch/arm/mach-msm/devices-8064.c b/arch/arm/mach-msm/devices-8064.c
index 6b79fab..6a3a10c 100644
--- a/arch/arm/mach-msm/devices-8064.c
+++ b/arch/arm/mach-msm/devices-8064.c
@@ -23,14 +23,17 @@
#include <mach/usbdiag.h>
#include <mach/msm_sps.h>
#include <mach/dma.h>
+#include <mach/msm_dsps.h>
#include <sound/msm-dai-q6.h>
#include <sound/apr_audio.h>
#include <mach/msm_bus_board.h>
#include <mach/rpm.h>
#include <mach/mdm2.h>
+#include <mach/msm_smd.h>
#include <linux/ion.h>
#include "clock.h"
#include "devices.h"
+#include "footswitch.h"
#include "msm_watchdog.h"
#include "rpm_stats.h"
#include "rpm_log.h"
@@ -67,6 +70,15 @@
#define MSM_HSUSB1_PHYS 0x12500000
#define MSM_HSUSB1_SIZE SZ_4K
+/* Address of HS USB3 */
+#define MSM_HSUSB3_PHYS 0x12520000
+#define MSM_HSUSB3_SIZE SZ_4K
+
+/* Address of HS USB4 */
+#define MSM_HSUSB4_PHYS 0x12530000
+#define MSM_HSUSB4_SIZE SZ_4K
+
+
static struct msm_watchdog_pdata msm_watchdog_pdata = {
.pet_time = 10000,
.bark_time = 11000,
@@ -624,6 +636,12 @@
.name = "peripheral_status_irq",
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = MSM_GPIO_TO_INT(88),
+ .end = MSM_GPIO_TO_INT(88),
+ .name = "wakeup_irq",
+ .flags = IORESOURCE_IRQ,
+ },
};
static u64 dma_mask = DMA_BIT_MASK(32);
@@ -649,6 +667,54 @@
},
};
+static struct resource resources_ehci_host3[] = {
+{
+ .start = MSM_HSUSB3_PHYS,
+ .end = MSM_HSUSB3_PHYS + MSM_HSUSB3_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = USB3_HS_IRQ,
+ .end = USB3_HS_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+struct platform_device apq8064_device_ehci_host3 = {
+ .name = "msm_ehci_host",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(resources_ehci_host3),
+ .resource = resources_ehci_host3,
+ .dev = {
+ .dma_mask = &dma_mask,
+ .coherent_dma_mask = 0xffffffff,
+ },
+};
+
+static struct resource resources_ehci_host4[] = {
+{
+ .start = MSM_HSUSB4_PHYS,
+ .end = MSM_HSUSB4_PHYS + MSM_HSUSB4_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = USB4_HS_IRQ,
+ .end = USB4_HS_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+struct platform_device apq8064_device_ehci_host4 = {
+ .name = "msm_ehci_host",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(resources_ehci_host4),
+ .resource = resources_ehci_host4,
+ .dev = {
+ .dma_mask = &dma_mask,
+ .coherent_dma_mask = 0xffffffff,
+ },
+};
+
/* MSM Video core device */
#ifdef CONFIG_MSM_BUS_SCALING
static struct msm_bus_vectors vidc_init_vectors[] = {
@@ -1188,9 +1254,162 @@
.dev.platform_data = &msm_sps_pdata,
};
+static struct resource smd_resource[] = {
+ {
+ .name = "a9_m2a_0",
+ .start = INT_A9_M2A_0,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "a9_m2a_5",
+ .start = INT_A9_M2A_5,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "adsp_a11",
+ .start = INT_ADSP_A11,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "adsp_a11_smsm",
+ .start = INT_ADSP_A11_SMSM,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "dsps_a11",
+ .start = INT_DSPS_A11,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "dsps_a11_smsm",
+ .start = INT_DSPS_A11_SMSM,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "wcnss_a11",
+ .start = INT_WCNSS_A11,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "wcnss_a11_smsm",
+ .start = INT_WCNSS_A11_SMSM,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct smd_subsystem_config smd_config_list[] = {
+ {
+ .irq_config_id = SMD_MODEM,
+ .subsys_name = "gss",
+ .edge = SMD_APPS_MODEM,
+
+ .smd_int.irq_name = "a9_m2a_0",
+ .smd_int.flags = IRQF_TRIGGER_RISING,
+ .smd_int.irq_id = -1,
+ .smd_int.device_name = "smd_dev",
+ .smd_int.dev_id = 0,
+ .smd_int.out_bit_pos = 1 << 3,
+ .smd_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE,
+ .smd_int.out_offset = 0x8,
+
+ .smsm_int.irq_name = "a9_m2a_5",
+ .smsm_int.flags = IRQF_TRIGGER_RISING,
+ .smsm_int.irq_id = -1,
+ .smsm_int.device_name = "smd_smsm",
+ .smsm_int.dev_id = 0,
+ .smsm_int.out_bit_pos = 1 << 4,
+ .smsm_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE,
+ .smsm_int.out_offset = 0x8,
+ },
+ {
+ .irq_config_id = SMD_Q6,
+ .subsys_name = "q6",
+ .edge = SMD_APPS_QDSP,
+
+ .smd_int.irq_name = "adsp_a11",
+ .smd_int.flags = IRQF_TRIGGER_RISING,
+ .smd_int.irq_id = -1,
+ .smd_int.device_name = "smd_dev",
+ .smd_int.dev_id = 0,
+ .smd_int.out_bit_pos = 1 << 15,
+ .smd_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE,
+ .smd_int.out_offset = 0x8,
+
+ .smsm_int.irq_name = "adsp_a11_smsm",
+ .smsm_int.flags = IRQF_TRIGGER_RISING,
+ .smsm_int.irq_id = -1,
+ .smsm_int.device_name = "smd_smsm",
+ .smsm_int.dev_id = 0,
+ .smsm_int.out_bit_pos = 1 << 14,
+ .smsm_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE,
+ .smsm_int.out_offset = 0x8,
+ },
+ {
+ .irq_config_id = SMD_DSPS,
+ .subsys_name = "dsps",
+ .edge = SMD_APPS_DSPS,
+
+ .smd_int.irq_name = "dsps_a11",
+ .smd_int.flags = IRQF_TRIGGER_RISING,
+ .smd_int.irq_id = -1,
+ .smd_int.device_name = "smd_dev",
+ .smd_int.dev_id = 0,
+ .smd_int.out_bit_pos = 1,
+ .smd_int.out_base = (void __iomem *)MSM_SIC_NON_SECURE_BASE,
+ .smd_int.out_offset = 0x4080,
+
+ .smsm_int.irq_name = "dsps_a11_smsm",
+ .smsm_int.flags = IRQF_TRIGGER_RISING,
+ .smsm_int.irq_id = -1,
+ .smsm_int.device_name = "smd_smsm",
+ .smsm_int.dev_id = 0,
+ .smsm_int.out_bit_pos = 1,
+ .smsm_int.out_base = (void __iomem *)MSM_SIC_NON_SECURE_BASE,
+ .smsm_int.out_offset = 0x4094,
+ },
+ {
+ .irq_config_id = SMD_WCNSS,
+ .subsys_name = "wcnss",
+ .edge = SMD_APPS_WCNSS,
+
+ .smd_int.irq_name = "wcnss_a11",
+ .smd_int.flags = IRQF_TRIGGER_RISING,
+ .smd_int.irq_id = -1,
+ .smd_int.device_name = "smd_dev",
+ .smd_int.dev_id = 0,
+ .smd_int.out_bit_pos = 1 << 25,
+ .smd_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE,
+ .smd_int.out_offset = 0x8,
+
+ .smsm_int.irq_name = "wcnss_a11_smsm",
+ .smsm_int.flags = IRQF_TRIGGER_RISING,
+ .smsm_int.irq_id = -1,
+ .smsm_int.device_name = "smd_smsm",
+ .smsm_int.dev_id = 0,
+ .smsm_int.out_bit_pos = 1 << 23,
+ .smsm_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE,
+ .smsm_int.out_offset = 0x8,
+ },
+};
+
+static struct smd_subsystem_restart_config smd_ssr_config = {
+ .disable_smsm_reset_handshake = 1,
+};
+
+static struct smd_platform smd_platform_data = {
+ .num_ss_configs = ARRAY_SIZE(smd_config_list),
+ .smd_ss_configs = smd_config_list,
+ .smd_ssr_config = &smd_ssr_config,
+};
+
struct platform_device msm_device_smd_apq8064 = {
.name = "msm_smd",
.id = -1,
+ .resource = smd_resource,
+ .num_resources = ARRAY_SIZE(smd_resource),
+ .dev = {
+ .platform_data = &smd_platform_data,
+ },
};
#ifdef CONFIG_HW_RANDOM_MSM
@@ -1230,6 +1449,17 @@
.resource = msm_gss_resources,
};
+struct platform_device *apq8064_fs_devices[] = {
+ FS_8X60(FS_ROT, "fs_rot"),
+ FS_8X60(FS_IJPEG, "fs_ijpeg"),
+ FS_8X60(FS_VFE, "fs_vfe"),
+ FS_8X60(FS_VPE, "fs_vpe"),
+ FS_8X60(FS_GFX3D, "fs_gfx3d"),
+ FS_8X60(FS_VED, "fs_ved"),
+ FS_8X60(FS_VCAP, "fs_vcap"),
+};
+unsigned apq8064_num_fs_devices = ARRAY_SIZE(apq8064_fs_devices);
+
static struct clk_lookup msm_clocks_8064_dummy[] = {
CLK_DUMMY("pll2", PLL2, NULL, 0),
CLK_DUMMY("pll8", PLL8, NULL, 0),
@@ -1712,6 +1942,53 @@
},
};
+/* Sensors DSPS platform data */
+
+#define PPSS_REG_PHYS_BASE 0x12080000
+
+static struct dsps_clk_info dsps_clks[] = {};
+static struct dsps_regulator_info dsps_regs[] = {};
+
+/*
+ * Note: GPIOs field is intialized in run-time at the function
+ * apq8064_init_dsps().
+ */
+
+struct msm_dsps_platform_data msm_dsps_pdata_8064 = {
+ .clks = dsps_clks,
+ .clks_num = ARRAY_SIZE(dsps_clks),
+ .gpios = NULL,
+ .gpios_num = 0,
+ .regs = dsps_regs,
+ .regs_num = ARRAY_SIZE(dsps_regs),
+ .dsps_pwr_ctl_en = 1,
+ .signature = DSPS_SIGNATURE,
+};
+
+static struct resource msm_dsps_resources[] = {
+ {
+ .start = PPSS_REG_PHYS_BASE,
+ .end = PPSS_REG_PHYS_BASE + SZ_8K - 1,
+ .name = "ppss_reg",
+ .flags = IORESOURCE_MEM,
+ },
+
+ {
+ .start = PPSS_WDOG_TIMER_IRQ,
+ .end = PPSS_WDOG_TIMER_IRQ,
+ .name = "ppss_wdog",
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+struct platform_device msm_dsps_device_8064 = {
+ .name = "msm_dsps",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(msm_dsps_resources),
+ .resource = msm_dsps_resources,
+ .dev.platform_data = &msm_dsps_pdata_8064,
+};
+
#ifdef CONFIG_MSM_MPM
static uint16_t msm_mpm_irqs_m2a[MSM_MPM_NR_MPM_IRQS] __initdata = {
[1] = MSM_GPIO_TO_INT(26),
@@ -1851,4 +2128,3 @@
.num_resources = ARRAY_SIZE(mdm_resources),
.resource = mdm_resources,
};
-
diff --git a/arch/arm/mach-msm/devices-8960.c b/arch/arm/mach-msm/devices-8960.c
index 4d4b88f..4c02215 100644
--- a/arch/arm/mach-msm/devices-8960.c
+++ b/arch/arm/mach-msm/devices-8960.c
@@ -30,8 +30,10 @@
#include <mach/rpm.h>
#include <mach/msm_bus_board.h>
#include <mach/msm_memtypes.h>
+#include <mach/msm_smd.h>
#include <sound/msm-dai-q6.h>
#include <sound/apr_audio.h>
+#include <mach/msm_tsif.h>
#include "clock.h"
#include "devices.h"
#include "devices-msm8x60.h"
@@ -950,9 +952,163 @@
.id = -1,
};
+static struct resource smd_resource[] = {
+ {
+ .name = "a9_m2a_0",
+ .start = INT_A9_M2A_0,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "a9_m2a_5",
+ .start = INT_A9_M2A_5,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "adsp_a11",
+ .start = INT_ADSP_A11,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "adsp_a11_smsm",
+ .start = INT_ADSP_A11_SMSM,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "dsps_a11",
+ .start = INT_DSPS_A11,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "dsps_a11_smsm",
+ .start = INT_DSPS_A11_SMSM,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "wcnss_a11",
+ .start = INT_WCNSS_A11,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "wcnss_a11_smsm",
+ .start = INT_WCNSS_A11_SMSM,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct smd_subsystem_config smd_config_list[] = {
+ {
+ .irq_config_id = SMD_MODEM,
+ .subsys_name = "modem",
+ .edge = SMD_APPS_MODEM,
+
+ .smd_int.irq_name = "a9_m2a_0",
+ .smd_int.flags = IRQF_TRIGGER_RISING,
+ .smd_int.irq_id = -1,
+ .smd_int.device_name = "smd_dev",
+ .smd_int.dev_id = 0,
+ .smd_int.out_bit_pos = 1 << 3,
+ .smd_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE,
+ .smd_int.out_offset = 0x8,
+
+ .smsm_int.irq_name = "a9_m2a_5",
+ .smsm_int.flags = IRQF_TRIGGER_RISING,
+ .smsm_int.irq_id = -1,
+ .smsm_int.device_name = "smd_smsm",
+ .smsm_int.dev_id = 0,
+ .smsm_int.out_bit_pos = 1 << 4,
+ .smsm_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE,
+ .smsm_int.out_offset = 0x8,
+ },
+ {
+ .irq_config_id = SMD_Q6,
+ .subsys_name = "q6",
+ .edge = SMD_APPS_QDSP,
+
+ .smd_int.irq_name = "adsp_a11",
+ .smd_int.flags = IRQF_TRIGGER_RISING,
+ .smd_int.irq_id = -1,
+ .smd_int.device_name = "smd_dev",
+ .smd_int.dev_id = 0,
+ .smd_int.out_bit_pos = 1 << 15,
+ .smd_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE,
+ .smd_int.out_offset = 0x8,
+
+ .smsm_int.irq_name = "adsp_a11_smsm",
+ .smsm_int.flags = IRQF_TRIGGER_RISING,
+ .smsm_int.irq_id = -1,
+ .smsm_int.device_name = "smd_smsm",
+ .smsm_int.dev_id = 0,
+ .smsm_int.out_bit_pos = 1 << 14,
+ .smsm_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE,
+ .smsm_int.out_offset = 0x8,
+ },
+ {
+ .irq_config_id = SMD_DSPS,
+ .subsys_name = "dsps",
+ .edge = SMD_APPS_DSPS,
+
+ .smd_int.irq_name = "dsps_a11",
+ .smd_int.flags = IRQF_TRIGGER_RISING,
+ .smd_int.irq_id = -1,
+ .smd_int.device_name = "smd_dev",
+ .smd_int.dev_id = 0,
+ .smd_int.out_bit_pos = 1,
+ .smd_int.out_base = (void __iomem *)MSM_SIC_NON_SECURE_BASE,
+ .smd_int.out_offset = 0x4080,
+
+ .smsm_int.irq_name = "dsps_a11_smsm",
+ .smsm_int.flags = IRQF_TRIGGER_RISING,
+ .smsm_int.irq_id = -1,
+ .smsm_int.device_name = "smd_smsm",
+ .smsm_int.dev_id = 0,
+ .smsm_int.out_bit_pos = 1,
+ .smsm_int.out_base = (void __iomem *)MSM_SIC_NON_SECURE_BASE,
+ .smsm_int.out_offset = 0x4094,
+ },
+ {
+ .irq_config_id = SMD_WCNSS,
+ .subsys_name = "wcnss",
+ .edge = SMD_APPS_WCNSS,
+
+ .smd_int.irq_name = "wcnss_a11",
+ .smd_int.flags = IRQF_TRIGGER_RISING,
+ .smd_int.irq_id = -1,
+ .smd_int.device_name = "smd_dev",
+ .smd_int.dev_id = 0,
+ .smd_int.out_bit_pos = 1 << 25,
+ .smd_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE,
+ .smd_int.out_offset = 0x8,
+
+ .smsm_int.irq_name = "wcnss_a11_smsm",
+ .smsm_int.flags = IRQF_TRIGGER_RISING,
+ .smsm_int.irq_id = -1,
+ .smsm_int.device_name = "smd_smsm",
+ .smsm_int.dev_id = 0,
+ .smsm_int.out_bit_pos = 1 << 23,
+ .smsm_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE,
+ .smsm_int.out_offset = 0x8,
+ },
+};
+
+static struct smd_subsystem_restart_config smd_ssr_config = {
+ .disable_smsm_reset_handshake = 1,
+};
+
+static struct smd_platform smd_platform_data = {
+ .num_ss_configs = ARRAY_SIZE(smd_config_list),
+ .smd_ss_configs = smd_config_list,
+ .smd_ssr_config = &smd_ssr_config,
+};
+
+
struct platform_device msm_device_smd = {
.name = "msm_smd",
.id = -1,
+ .resource = smd_resource,
+ .num_resources = ARRAY_SIZE(smd_resource),
+ .dev = {
+ .platform_data = &smd_platform_data,
+ },
};
struct platform_device msm_device_bam_dmux = {
@@ -1355,6 +1511,111 @@
};
#endif
+#define MSM_TSIF0_PHYS (0x18200000)
+#define MSM_TSIF1_PHYS (0x18201000)
+#define MSM_TSIF_SIZE (0x200)
+
+#define TSIF_0_CLK GPIO_CFG(75, 1, GPIO_CFG_INPUT, \
+ GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
+#define TSIF_0_EN GPIO_CFG(76, 1, GPIO_CFG_INPUT, \
+ GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
+#define TSIF_0_DATA GPIO_CFG(77, 1, GPIO_CFG_INPUT, \
+ GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
+#define TSIF_0_SYNC GPIO_CFG(82, 1, GPIO_CFG_INPUT, \
+ GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
+#define TSIF_1_CLK GPIO_CFG(79, 1, GPIO_CFG_INPUT, \
+ GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
+#define TSIF_1_EN GPIO_CFG(80, 1, GPIO_CFG_INPUT, \
+ GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
+#define TSIF_1_DATA GPIO_CFG(81, 1, GPIO_CFG_INPUT, \
+ GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
+#define TSIF_1_SYNC GPIO_CFG(78, 1, GPIO_CFG_INPUT, \
+ GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
+
+static const struct msm_gpio tsif0_gpios[] = {
+ { .gpio_cfg = TSIF_0_CLK, .label = "tsif_clk", },
+ { .gpio_cfg = TSIF_0_EN, .label = "tsif_en", },
+ { .gpio_cfg = TSIF_0_DATA, .label = "tsif_data", },
+ { .gpio_cfg = TSIF_0_SYNC, .label = "tsif_sync", },
+};
+
+static const struct msm_gpio tsif1_gpios[] = {
+ { .gpio_cfg = TSIF_1_CLK, .label = "tsif_clk", },
+ { .gpio_cfg = TSIF_1_EN, .label = "tsif_en", },
+ { .gpio_cfg = TSIF_1_DATA, .label = "tsif_data", },
+ { .gpio_cfg = TSIF_1_SYNC, .label = "tsif_sync", },
+};
+
+struct msm_tsif_platform_data tsif1_platform_data = {
+ .num_gpios = ARRAY_SIZE(tsif1_gpios),
+ .gpios = tsif1_gpios,
+ .tsif_pclk = "tsif_pclk",
+ .tsif_ref_clk = "tsif_ref_clk",
+};
+
+struct resource tsif1_resources[] = {
+ [0] = {
+ .flags = IORESOURCE_IRQ,
+ .start = TSIF2_IRQ,
+ .end = TSIF2_IRQ,
+ },
+ [1] = {
+ .flags = IORESOURCE_MEM,
+ .start = MSM_TSIF1_PHYS,
+ .end = MSM_TSIF1_PHYS + MSM_TSIF_SIZE - 1,
+ },
+ [2] = {
+ .flags = IORESOURCE_DMA,
+ .start = DMOV_TSIF_CHAN,
+ .end = DMOV_TSIF_CRCI,
+ },
+};
+
+struct msm_tsif_platform_data tsif0_platform_data = {
+ .num_gpios = ARRAY_SIZE(tsif0_gpios),
+ .gpios = tsif0_gpios,
+ .tsif_pclk = "tsif_pclk",
+ .tsif_ref_clk = "tsif_ref_clk",
+};
+struct resource tsif0_resources[] = {
+ [0] = {
+ .flags = IORESOURCE_IRQ,
+ .start = TSIF1_IRQ,
+ .end = TSIF1_IRQ,
+ },
+ [1] = {
+ .flags = IORESOURCE_MEM,
+ .start = MSM_TSIF0_PHYS,
+ .end = MSM_TSIF0_PHYS + MSM_TSIF_SIZE - 1,
+ },
+ [2] = {
+ .flags = IORESOURCE_DMA,
+ .start = DMOV_TSIF_CHAN,
+ .end = DMOV_TSIF_CRCI,
+ },
+};
+
+struct platform_device msm_device_tsif[2] = {
+ {
+ .name = "msm_tsif",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(tsif0_resources),
+ .resource = tsif0_resources,
+ .dev = {
+ .platform_data = &tsif0_platform_data
+ },
+ },
+ {
+ .name = "msm_tsif",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(tsif1_resources),
+ .resource = tsif1_resources,
+ .dev = {
+ .platform_data = &tsif1_platform_data
+ },
+ }
+};
+
static struct resource resources_ssbi_pmic[] = {
{
.start = MSM_PMIC1_SSBI_CMD_PHYS,
@@ -2291,6 +2552,20 @@
},
};
+static const char *kgsl_3d0_iommu_ctx_names[] = {
+ "gfx3d_user",
+ /* priv_ctx goes here */
+};
+
+static struct kgsl_device_iommu_data kgsl_3d0_iommu_data[] = {
+ {
+ .iommu_ctx_names = kgsl_3d0_iommu_ctx_names,
+ .iommu_ctx_count = ARRAY_SIZE(kgsl_3d0_iommu_ctx_names),
+ .physstart = 0x07C00000,
+ .physend = 0x07C00000 + SZ_1M - 1,
+ },
+};
+
static struct kgsl_device_platform_data kgsl_3d0_pdata = {
.pwrlevel = {
{
@@ -2327,8 +2602,8 @@
#ifdef CONFIG_MSM_BUS_SCALING
.bus_scale_table = &grp3d_bus_scale_pdata,
#endif
- .iommu_user_ctx_name = "gfx3d_user",
- .iommu_priv_ctx_name = NULL,
+ .iommu_data = kgsl_3d0_iommu_data,
+ .iommu_count = ARRAY_SIZE(kgsl_3d0_iommu_data),
};
struct platform_device msm_kgsl_3d0 = {
@@ -2356,6 +2631,19 @@
},
};
+static const char *kgsl_2d0_iommu_ctx_names[] = {
+ "gfx2d0_2d0",
+};
+
+static struct kgsl_device_iommu_data kgsl_2d0_iommu_data[] = {
+ {
+ .iommu_ctx_names = kgsl_2d0_iommu_ctx_names,
+ .iommu_ctx_count = ARRAY_SIZE(kgsl_2d0_iommu_ctx_names),
+ .physstart = 0x07D00000,
+ .physend = 0x07D00000 + SZ_1M - 1,
+ },
+};
+
static struct kgsl_device_platform_data kgsl_2d0_pdata = {
.pwrlevel = {
{
@@ -2380,8 +2668,8 @@
#ifdef CONFIG_MSM_BUS_SCALING
.bus_scale_table = &grp2d0_bus_scale_pdata,
#endif
- .iommu_user_ctx_name = "gfx2d0_2d0",
- .iommu_priv_ctx_name = NULL,
+ .iommu_data = kgsl_2d0_iommu_data,
+ .iommu_count = ARRAY_SIZE(kgsl_2d0_iommu_data),
};
struct platform_device msm_kgsl_2d0 = {
@@ -2394,6 +2682,19 @@
},
};
+static const char *kgsl_2d1_iommu_ctx_names[] = {
+ "gfx2d1_2d1",
+};
+
+static struct kgsl_device_iommu_data kgsl_2d1_iommu_data[] = {
+ {
+ .iommu_ctx_names = kgsl_2d1_iommu_ctx_names,
+ .iommu_ctx_count = ARRAY_SIZE(kgsl_2d1_iommu_ctx_names),
+ .physstart = 0x07E00000,
+ .physend = 0x07E00000 + SZ_1M - 1,
+ },
+};
+
static struct resource kgsl_2d1_resources[] = {
{
.name = KGSL_2D1_REG_MEMORY,
@@ -2433,8 +2734,8 @@
#ifdef CONFIG_MSM_BUS_SCALING
.bus_scale_table = &grp2d1_bus_scale_pdata,
#endif
- .iommu_user_ctx_name = "gfx2d1_2d1",
- .iommu_priv_ctx_name = NULL,
+ .iommu_data = kgsl_2d1_iommu_data,
+ .iommu_count = ARRAY_SIZE(kgsl_2d1_iommu_data),
};
struct platform_device msm_kgsl_2d1 = {
diff --git a/arch/arm/mach-msm/devices-iommu.c b/arch/arm/mach-msm/devices-iommu.c
index 3d2d2e7..057a006 100644
--- a/arch/arm/mach-msm/devices-iommu.c
+++ b/arch/arm/mach-msm/devices-iommu.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -391,6 +391,7 @@
.id = 0,
.dev = {
.parent = &msm_root_iommu_dev.dev,
+ .platform_data = &jpegd_iommu,
},
.num_resources = ARRAY_SIZE(msm_iommu_jpegd_resources),
.resource = msm_iommu_jpegd_resources,
@@ -401,6 +402,7 @@
.id = 1,
.dev = {
.parent = &msm_root_iommu_dev.dev,
+ .platform_data = &vpe_iommu,
},
.num_resources = ARRAY_SIZE(msm_iommu_vpe_resources),
.resource = msm_iommu_vpe_resources,
@@ -411,6 +413,7 @@
.id = 2,
.dev = {
.parent = &msm_root_iommu_dev.dev,
+ .platform_data = &mdp0_iommu,
},
.num_resources = ARRAY_SIZE(msm_iommu_mdp0_resources),
.resource = msm_iommu_mdp0_resources,
@@ -421,6 +424,7 @@
.id = 3,
.dev = {
.parent = &msm_root_iommu_dev.dev,
+ .platform_data = &mdp1_iommu,
},
.num_resources = ARRAY_SIZE(msm_iommu_mdp1_resources),
.resource = msm_iommu_mdp1_resources,
@@ -431,6 +435,7 @@
.id = 4,
.dev = {
.parent = &msm_root_iommu_dev.dev,
+ .platform_data = &rot_iommu,
},
.num_resources = ARRAY_SIZE(msm_iommu_rot_resources),
.resource = msm_iommu_rot_resources,
@@ -441,6 +446,7 @@
.id = 5,
.dev = {
.parent = &msm_root_iommu_dev.dev,
+ .platform_data = &ijpeg_iommu,
},
.num_resources = ARRAY_SIZE(msm_iommu_ijpeg_resources),
.resource = msm_iommu_ijpeg_resources,
@@ -451,6 +457,7 @@
.id = 6,
.dev = {
.parent = &msm_root_iommu_dev.dev,
+ .platform_data = &vfe_iommu,
},
.num_resources = ARRAY_SIZE(msm_iommu_vfe_resources),
.resource = msm_iommu_vfe_resources,
@@ -461,6 +468,7 @@
.id = 7,
.dev = {
.parent = &msm_root_iommu_dev.dev,
+ .platform_data = &vcodec_a_iommu,
},
.num_resources = ARRAY_SIZE(msm_iommu_vcodec_a_resources),
.resource = msm_iommu_vcodec_a_resources,
@@ -471,6 +479,7 @@
.id = 8,
.dev = {
.parent = &msm_root_iommu_dev.dev,
+ .platform_data = &vcodec_b_iommu,
},
.num_resources = ARRAY_SIZE(msm_iommu_vcodec_b_resources),
.resource = msm_iommu_vcodec_b_resources,
@@ -481,6 +490,7 @@
.id = 9,
.dev = {
.parent = &msm_root_iommu_dev.dev,
+ .platform_data = &gfx3d_iommu,
},
.num_resources = ARRAY_SIZE(msm_iommu_gfx3d_resources),
.resource = msm_iommu_gfx3d_resources,
@@ -491,6 +501,7 @@
.id = 10,
.dev = {
.parent = &msm_root_iommu_dev.dev,
+ .platform_data = &gfx3d1_iommu,
},
.num_resources = ARRAY_SIZE(msm_iommu_gfx3d1_resources),
.resource = msm_iommu_gfx3d1_resources,
@@ -501,6 +512,7 @@
.id = 10,
.dev = {
.parent = &msm_root_iommu_dev.dev,
+ .platform_data = &gfx2d0_iommu,
},
.num_resources = ARRAY_SIZE(msm_iommu_gfx2d0_resources),
.resource = msm_iommu_gfx2d0_resources,
@@ -511,6 +523,7 @@
.id = 11,
.dev = {
.parent = &msm_root_iommu_dev.dev,
+ .platform_data = &gfx2d1_iommu,
},
.num_resources = ARRAY_SIZE(msm_iommu_gfx2d1_resources),
.resource = msm_iommu_gfx2d1_resources,
@@ -521,6 +534,7 @@
.id = 11,
.dev = {
.parent = &msm_root_iommu_dev.dev,
+ .platform_data = &vcap_iommu,
},
.num_resources = ARRAY_SIZE(msm_iommu_vcap_resources),
.resource = msm_iommu_vcap_resources,
@@ -683,6 +697,7 @@
.id = 0,
.dev = {
.parent = &msm_device_iommu_jpegd.dev,
+ .platform_data = &jpegd_src_ctx,
},
};
@@ -691,6 +706,7 @@
.id = 1,
.dev = {
.parent = &msm_device_iommu_jpegd.dev,
+ .platform_data = &jpegd_dst_ctx,
},
};
@@ -699,6 +715,7 @@
.id = 2,
.dev = {
.parent = &msm_device_iommu_vpe.dev,
+ .platform_data = &vpe_src_ctx,
},
};
@@ -707,6 +724,7 @@
.id = 3,
.dev = {
.parent = &msm_device_iommu_vpe.dev,
+ .platform_data = &vpe_dst_ctx,
},
};
@@ -715,6 +733,7 @@
.id = 4,
.dev = {
.parent = &msm_device_iommu_mdp0.dev,
+ .platform_data = &mdp_vg1_ctx,
},
};
@@ -723,6 +742,7 @@
.id = 5,
.dev = {
.parent = &msm_device_iommu_mdp0.dev,
+ .platform_data = &mdp_rgb1_ctx,
},
};
@@ -731,6 +751,7 @@
.id = 6,
.dev = {
.parent = &msm_device_iommu_mdp1.dev,
+ .platform_data = &mdp_vg2_ctx,
},
};
@@ -739,6 +760,7 @@
.id = 7,
.dev = {
.parent = &msm_device_iommu_mdp1.dev,
+ .platform_data = &mdp_rgb2_ctx,
},
};
@@ -747,6 +769,7 @@
.id = 8,
.dev = {
.parent = &msm_device_iommu_rot.dev,
+ .platform_data = &rot_src_ctx,
},
};
@@ -755,6 +778,7 @@
.id = 9,
.dev = {
.parent = &msm_device_iommu_rot.dev,
+ .platform_data = &rot_dst_ctx,
},
};
@@ -763,6 +787,7 @@
.id = 10,
.dev = {
.parent = &msm_device_iommu_ijpeg.dev,
+ .platform_data = &ijpeg_src_ctx,
},
};
@@ -771,6 +796,7 @@
.id = 11,
.dev = {
.parent = &msm_device_iommu_ijpeg.dev,
+ .platform_data = &ijpeg_dst_ctx,
},
};
@@ -779,6 +805,7 @@
.id = 12,
.dev = {
.parent = &msm_device_iommu_vfe.dev,
+ .platform_data = &vfe_imgwr_ctx,
},
};
@@ -787,6 +814,7 @@
.id = 13,
.dev = {
.parent = &msm_device_iommu_vfe.dev,
+ .platform_data = &vfe_misc_ctx,
},
};
@@ -795,6 +823,7 @@
.id = 14,
.dev = {
.parent = &msm_device_iommu_vcodec_a.dev,
+ .platform_data = &vcodec_a_stream_ctx,
},
};
@@ -803,6 +832,7 @@
.id = 15,
.dev = {
.parent = &msm_device_iommu_vcodec_a.dev,
+ .platform_data = &vcodec_a_mm1_ctx,
},
};
@@ -811,6 +841,7 @@
.id = 16,
.dev = {
.parent = &msm_device_iommu_vcodec_b.dev,
+ .platform_data = &vcodec_b_mm2_ctx,
},
};
@@ -819,6 +850,7 @@
.id = 17,
.dev = {
.parent = &msm_device_iommu_gfx3d.dev,
+ .platform_data = &gfx3d_user_ctx,
},
};
@@ -827,6 +859,7 @@
.id = 18,
.dev = {
.parent = &msm_device_iommu_gfx3d.dev,
+ .platform_data = &gfx3d_priv_ctx,
},
};
@@ -835,6 +868,7 @@
.id = 19,
.dev = {
.parent = &msm_device_iommu_gfx3d1.dev,
+ .platform_data = &gfx3d1_user_ctx,
},
};
@@ -843,6 +877,7 @@
.id = 20,
.dev = {
.parent = &msm_device_iommu_gfx3d1.dev,
+ .platform_data = &gfx3d1_priv_ctx,
},
};
@@ -851,6 +886,7 @@
.id = 19,
.dev = {
.parent = &msm_device_iommu_gfx2d0.dev,
+ .platform_data = &gfx2d0_2d0_ctx,
},
};
@@ -859,6 +895,7 @@
.id = 20,
.dev = {
.parent = &msm_device_iommu_gfx2d1.dev,
+ .platform_data = &gfx2d1_2d1_ctx,
},
};
@@ -867,6 +904,7 @@
.id = 21,
.dev = {
.parent = &msm_device_iommu_vcap.dev,
+ .platform_data = &vcap_vc_ctx,
},
};
@@ -875,11 +913,11 @@
.id = 22,
.dev = {
.parent = &msm_device_iommu_vcap.dev,
+ .platform_data = &vcap_vp_ctx,
},
};
static struct platform_device *msm_iommu_common_devs[] = {
- &msm_device_iommu_jpegd,
&msm_device_iommu_vpe,
&msm_device_iommu_mdp0,
&msm_device_iommu_mdp1,
@@ -901,32 +939,11 @@
&msm_device_iommu_vcap,
};
-static struct msm_iommu_dev *msm_iommu_common_data[] = {
- &jpegd_iommu,
- &vpe_iommu,
- &mdp0_iommu,
- &mdp1_iommu,
- &rot_iommu,
- &ijpeg_iommu,
- &vfe_iommu,
- &vcodec_a_iommu,
- &vcodec_b_iommu,
- &gfx3d_iommu,
-};
-
-static struct msm_iommu_dev *msm_iommu_gfx2d_data[] = {
- &gfx2d0_iommu,
- &gfx2d1_iommu,
-};
-
-static struct msm_iommu_dev *msm_iommu_8064_data[] = {
- &gfx3d1_iommu,
- &vcap_iommu,
+static struct platform_device *msm_iommu_jpegd_devs[] = {
+ &msm_device_iommu_jpegd,
};
static struct platform_device *msm_iommu_common_ctx_devs[] = {
- &msm_device_jpegd_src_ctx,
- &msm_device_jpegd_dst_ctx,
&msm_device_vpe_src_ctx,
&msm_device_vpe_dst_ctx,
&msm_device_mdp_vg1_ctx,
@@ -958,102 +975,11 @@
&msm_device_vcap_vp_ctx,
};
-static struct msm_iommu_ctx_dev *msm_iommu_common_ctx_data[] = {
- &jpegd_src_ctx,
- &jpegd_dst_ctx,
- &vpe_src_ctx,
- &vpe_dst_ctx,
- &mdp_vg1_ctx,
- &mdp_rgb1_ctx,
- &mdp_vg2_ctx,
- &mdp_rgb2_ctx,
- &rot_src_ctx,
- &rot_dst_ctx,
- &ijpeg_src_ctx,
- &ijpeg_dst_ctx,
- &vfe_imgwr_ctx,
- &vfe_misc_ctx,
- &vcodec_a_stream_ctx,
- &vcodec_a_mm1_ctx,
- &vcodec_b_mm2_ctx,
- &gfx3d_user_ctx,
- &gfx3d_priv_ctx,
+static struct platform_device *msm_iommu_jpegd_ctx_devs[] = {
+ &msm_device_jpegd_src_ctx,
+ &msm_device_jpegd_dst_ctx,
};
-static struct msm_iommu_ctx_dev *msm_iommu_gfx2d_ctx_data[] = {
- &gfx2d0_2d0_ctx,
- &gfx2d1_2d1_ctx,
-};
-
-static struct msm_iommu_ctx_dev *msm_iommu_8064_ctx_data[] = {
- &gfx3d1_user_ctx,
- &gfx3d1_priv_ctx,
- &vcap_vc_ctx,
- &vcap_vp_ctx,
-};
-
-static int iommu_init_devs(struct platform_device *devs[],
- struct msm_iommu_dev *data[], int size)
-{
- int ret, i;
-
- for (i = 0; i < size; i++) {
- ret = platform_device_add_data(devs[i],
- data[i], sizeof(struct msm_iommu_dev));
- if (ret != 0) {
- pr_err("platform_device_add_data failed, "
- "i = %d\n", i);
- goto failure_unwind;
- }
-
- ret = platform_device_register(devs[i]);
-
- if (ret != 0) {
- pr_err("platform_device_register iommu failed, "
- "i = %d\n", i);
- goto failure_unwind;
- }
- }
- return 0;
-
-failure_unwind:
- while (--i >= 0)
- platform_device_unregister(devs[i]);
-
- return ret;
-}
-
-
-static int iommu_init_ctx_devs(struct platform_device *ctx_devs[],
- struct msm_iommu_ctx_dev *ctx_data[], int size)
-{
- int ret, i;
-
- for (i = 0; i < size; i++) {
- ret = platform_device_add_data(ctx_devs[i],
- ctx_data[i], sizeof(struct msm_iommu_ctx_dev));
- if (ret != 0) {
- pr_err("platform_device_add_data iommu failed, "
- "i = %d\n", i);
- goto failure_unwind;
- }
-
- ret = platform_device_register(ctx_devs[i]);
- if (ret != 0) {
- pr_err("platform_device_register ctx failed, "
- "i = %d\n", i);
- goto failure_unwind;
- }
- }
- return 0;
-
-failure_unwind:
- while (--i >= 0)
- platform_device_unregister(ctx_devs[i]);
-
- return ret;
-}
-
static int __init iommu_init(void)
{
int ret;
@@ -1069,45 +995,55 @@
}
/* Initialize common devs */
- ret = iommu_init_devs(msm_iommu_common_devs,
- msm_iommu_common_data,
+ ret = platform_add_devices(msm_iommu_common_devs,
ARRAY_SIZE(msm_iommu_common_devs));
if (ret != 0)
goto failure2;
/* Initialize soc-specific devs */
if (cpu_is_apq8064()) {
- ret = iommu_init_devs(msm_iommu_8064_devs,
- msm_iommu_8064_data,
+ ret = platform_add_devices(msm_iommu_8064_devs,
ARRAY_SIZE(msm_iommu_8064_devs));
} else {
- ret = iommu_init_devs(msm_iommu_gfx2d_devs,
- msm_iommu_gfx2d_data,
- ARRAY_SIZE(msm_iommu_gfx2d_devs));
+ ret = platform_add_devices(msm_iommu_gfx2d_devs,
+ ARRAY_SIZE(msm_iommu_gfx2d_devs));
}
if (ret != 0)
goto failure2;
+ if (!cpu_is_msm8930()) {
+ ret = platform_add_devices(msm_iommu_jpegd_devs,
+ ARRAY_SIZE(msm_iommu_jpegd_devs));
+
+ if (ret != 0)
+ goto failure2;
+ }
+
/* Initialize common ctx_devs */
- ret = iommu_init_ctx_devs(msm_iommu_common_ctx_devs,
- msm_iommu_common_ctx_data,
+ ret = platform_add_devices(msm_iommu_common_ctx_devs,
ARRAY_SIZE(msm_iommu_common_ctx_devs));
if (ret != 0)
goto failure2;
/* Initialize soc-specific ctx_devs */
if (cpu_is_apq8064()) {
- ret = iommu_init_ctx_devs(msm_iommu_8064_ctx_devs,
- msm_iommu_8064_ctx_data,
+ ret = platform_add_devices(msm_iommu_8064_ctx_devs,
ARRAY_SIZE(msm_iommu_8064_ctx_devs));
} else {
- ret = iommu_init_ctx_devs(msm_iommu_gfx2d_ctx_devs,
- msm_iommu_gfx2d_ctx_data,
+ ret = platform_add_devices(msm_iommu_gfx2d_ctx_devs,
ARRAY_SIZE(msm_iommu_gfx2d_ctx_devs));
}
if (ret != 0)
goto failure2;
+ if (!cpu_is_msm8930()) {
+ ret = platform_add_devices(msm_iommu_jpegd_ctx_devs,
+ ARRAY_SIZE(msm_iommu_jpegd_ctx_devs));
+
+ if (ret != 0)
+ goto failure2;
+ }
+
return 0;
failure2:
@@ -1133,6 +1069,11 @@
platform_device_unregister(msm_iommu_gfx2d_ctx_devs[i]);
}
+ if (!cpu_is_msm8930()) {
+ for (i = 0; i < ARRAY_SIZE(msm_iommu_jpegd_ctx_devs); i++)
+ platform_device_unregister(msm_iommu_jpegd_ctx_devs[i]);
+ }
+
/* Common devs. */
for (i = 0; i < ARRAY_SIZE(msm_iommu_common_devs); ++i)
platform_device_unregister(msm_iommu_common_devs[i]);
@@ -1146,6 +1087,11 @@
platform_device_unregister(msm_iommu_gfx2d_devs[i]);
}
+ if (!cpu_is_msm8930()) {
+ for (i = 0; i < ARRAY_SIZE(msm_iommu_jpegd_devs); i++)
+ platform_device_unregister(msm_iommu_jpegd_devs[i]);
+ }
+
platform_device_unregister(&msm_root_iommu_dev);
}
diff --git a/arch/arm/mach-msm/devices-msm7x27.c b/arch/arm/mach-msm/devices-msm7x27.c
index b895870..26f246d 100644
--- a/arch/arm/mach-msm/devices-msm7x27.c
+++ b/arch/arm/mach-msm/devices-msm7x27.c
@@ -76,6 +76,21 @@
.resource = resources_uart2,
};
+static struct resource resources_adsp[] = {
+ {
+ .start = INT_ADSP_A9_A11,
+ .end = INT_ADSP_A9_A11,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+struct platform_device msm_adsp_device = {
+ .name = "msm_adsp",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(resources_adsp),
+ .resource = resources_adsp,
+};
+
#define MSM_UART1DM_PHYS 0xA0200000
#define MSM_UART2DM_PHYS 0xA0300000
static struct resource msm_uart1_dm_resources[] = {
diff --git a/arch/arm/mach-msm/devices-msm7x27a.c b/arch/arm/mach-msm/devices-msm7x27a.c
index c18b6b2..f7e67cb 100644
--- a/arch/arm/mach-msm/devices-msm7x27a.c
+++ b/arch/arm/mach-msm/devices-msm7x27a.c
@@ -17,6 +17,7 @@
#include <linux/regulator/machine.h>
#include <linux/init.h>
#include <linux/irq.h>
+#include <linux/memblock.h>
#include <mach/irqs.h>
#include <mach/msm_iomap.h>
#include <mach/board.h>
@@ -33,6 +34,8 @@
#include "devices-msm7x2xa.h"
#include "footswitch.h"
#include "acpuclock.h"
+#include "spm.h"
+#include "mpm-8625.h"
/* Address of GSBI blocks */
#define MSM_GSBI0_PHYS 0xA1200000
@@ -210,6 +213,78 @@
.id = -1,
};
+static struct resource smd_8625_resource[] = {
+ {
+ .name = "a9_m2a_0",
+ .start = MSM8625_INT_A9_M2A_0,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "a9_m2a_5",
+ .start = MSM8625_INT_A9_M2A_5,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct smd_subsystem_config smd_8625_config_list[] = {
+ {
+ .irq_config_id = SMD_MODEM,
+ .subsys_name = "modem",
+ .edge = SMD_APPS_MODEM,
+
+ .smd_int.irq_name = "a9_m2a_0",
+ .smd_int.flags = IRQF_TRIGGER_RISING,
+ .smd_int.irq_id = -1,
+ .smd_int.device_name = "smd_dev",
+ .smd_int.dev_id = 0,
+
+ .smd_int.out_bit_pos = 1,
+ .smd_int.out_base = (void __iomem *)MSM_CSR_BASE,
+ .smd_int.out_offset = 0x400 + (0) * 4,
+
+ .smsm_int.irq_name = "a9_m2a_5",
+ .smsm_int.flags = IRQF_TRIGGER_RISING,
+ .smsm_int.irq_id = -1,
+ .smsm_int.device_name = "smsm_dev",
+ .smsm_int.dev_id = 0,
+
+ .smsm_int.out_bit_pos = 1,
+ .smsm_int.out_base = (void __iomem *)MSM_CSR_BASE,
+ .smsm_int.out_offset = 0x400 + (5) * 4,
+
+ }
+};
+
+static struct smd_platform smd_8625_platform_data = {
+ .num_ss_configs = ARRAY_SIZE(smd_8625_config_list),
+ .smd_ss_configs = smd_8625_config_list,
+};
+
+struct platform_device msm8625_device_smd = {
+ .name = "msm_smd",
+ .id = -1,
+ .resource = smd_8625_resource,
+ .num_resources = ARRAY_SIZE(smd_8625_resource),
+ .dev = {
+ .platform_data = &smd_8625_platform_data,
+ }
+};
+
+static struct resource resources_adsp[] = {
+ {
+ .start = INT_ADSP_A9_A11,
+ .end = INT_ADSP_A9_A11,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+struct platform_device msm_adsp_device = {
+ .name = "msm_adsp",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(resources_adsp),
+ .resource = resources_adsp,
+};
+
static struct resource resources_uart1[] = {
{
.start = INT_UART1,
@@ -569,6 +644,55 @@
#endif
+/* Command sequence for simple WFI */
+static uint8_t spm_wfi_cmd_sequence[] __initdata = {
+ 0x00, 0x40, 0x40, 0x03,
+ 0x00, 0x40, 0x40, 0x0f,
+};
+
+/* Command sequence for GDFS, this won't send any interrupt to the modem */
+static uint8_t spm_pc_without_modem[] __initdata = {
+ 0x20, 0x00, 0x30, 0x10,
+ 0x40, 0x40, 0x03, 0x10,
+ 0x00, 0x30, 0x2E, 0x40,
+ 0x40, 0x0f,
+};
+
+static struct msm_spm_seq_entry msm_spm_seq_list[] __initdata = {
+ [0] = {
+ .mode = MSM_SPM_MODE_CLOCK_GATING,
+ .notify_rpm = false,
+ .cmd = spm_wfi_cmd_sequence,
+ },
+ [1] = {
+ .mode = MSM_SPM_MODE_POWER_COLLAPSE,
+ .notify_rpm = false,
+ .cmd = spm_pc_without_modem,
+ },
+};
+
+static struct msm_spm_platform_data msm_spm_data[] __initdata = {
+ [0] = {
+ .reg_base_addr = MSM_SAW0_BASE,
+ .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x0,
+ .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
+ .num_modes = ARRAY_SIZE(msm_spm_seq_list),
+ .modes = msm_spm_seq_list,
+ },
+ [1] = {
+ .reg_base_addr = MSM_SAW1_BASE,
+ .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x0,
+ .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
+ .num_modes = ARRAY_SIZE(msm_spm_seq_list),
+ .modes = msm_spm_seq_list,
+ },
+};
+
+void __init msm8x25_spm_device_init(void)
+{
+ msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
+}
+
#define MDP_BASE 0xAA200000
#define MIPI_DSI_HW_BASE 0xA1100000
@@ -843,6 +967,21 @@
.resource = msm8625_uart2dm_resources,
};
+static struct resource msm8625_resources_adsp[] = {
+ {
+ .start = MSM8625_INT_ADSP_A9_A11,
+ .end = MSM8625_INT_ADSP_A9_A11,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+struct platform_device msm8625_device_adsp = {
+ .name = "msm_adsp",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(msm8625_resources_adsp),
+ .resource = msm8625_resources_adsp,
+};
+
static struct resource msm8625_dmov_resource[] = {
{
.start = MSM8625_INT_ADM_AARM,
@@ -887,7 +1026,7 @@
};
/* Use GSBI0 QUP for /dev/i2c-0 */
-struct platform_device msm8625_device_qup_i2c_gsbi0 = {
+struct platform_device msm8625_gsbi0_qup_i2c_device = {
.name = "qup_i2c",
.id = MSM_GSBI0_QUP_I2C_BUS_ID,
.num_resources = ARRAY_SIZE(gsbi0_msm8625_qup_resources),
@@ -916,7 +1055,7 @@
};
/* Use GSBI1 QUP for /dev/i2c-1 */
-struct platform_device msm8625_device_qup_i2c_gsbi1 = {
+struct platform_device msm8625_gsbi1_qup_i2c_device = {
.name = "qup_i2c",
.id = MSM_GSBI1_QUP_I2C_BUS_ID,
.num_resources = ARRAY_SIZE(gsbi1_qup_i2c_resources),
@@ -1393,6 +1532,36 @@
.size = ARRAY_SIZE(msm_clock_8625_dummy),
};
+enum {
+ MSM8625,
+ MSM8625A,
+};
+
+static int __init msm8625_cpu_id(void)
+{
+ int raw_id, cpu;
+
+ raw_id = socinfo_get_raw_id();
+ switch (raw_id) {
+ /* Part number for 1GHz part */
+ case 0x770:
+ case 0x771:
+ case 0x780:
+ cpu = MSM8625;
+ break;
+ /* Part number for 1.2GHz part */
+ case 0x773:
+ case 0x774:
+ case 0x781:
+ cpu = MSM8625A;
+ break;
+ default:
+ pr_err("Invalid Raw ID\n");
+ return -ENODEV;
+ }
+ return cpu;
+}
+
int __init msm7x2x_misc_init(void)
{
if (machine_is_msm8625_rumi3()) {
@@ -1403,8 +1572,14 @@
msm_clock_init(&msm7x27a_clock_init_data);
if (cpu_is_msm7x27aa())
acpuclk_init(&acpuclk_7x27aa_soc_data);
- else
+ else if (cpu_is_msm8625()) {
+ if (msm8625_cpu_id() == MSM8625)
+ acpuclk_init(&acpuclk_7x27aa_soc_data);
+ else if (msm8625_cpu_id() == MSM8625A)
+ acpuclk_init(&acpuclk_8625_soc_data);
+ } else {
acpuclk_init(&acpuclk_7x27a_soc_data);
+ }
return 0;
@@ -1445,12 +1620,37 @@
void __init msm8625_init_irq(void)
{
+ msm_gic_irq_extn_init(MSM_QGIC_DIST_BASE, MSM_QGIC_CPU_BASE);
gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
(void *)MSM_QGIC_CPU_BASE);
}
+static phys_addr_t msm8625_phys_base;
+
+static void __init msm_reserve_sdram_memblock(void)
+{
+ phys_addr_t paddr;
+
+ paddr = memblock_alloc(SZ_8, SZ_64K);
+ pr_debug("%s physical address = %x\n", __func__, paddr);
+
+ if (!paddr) {
+ pr_err("%s: failed to reserve SZ_8 bytes\n", __func__);
+ return;
+ }
+
+ msm8625_phys_base = paddr;
+}
+
+phys_addr_t msm8625_get_phys_base(void)
+{
+ return msm8625_phys_base;
+}
+EXPORT_SYMBOL(msm8625_get_phys_base);
+
void __init msm8625_map_io(void)
{
+ msm_reserve_sdram_memblock();
msm_map_msm8625_io();
if (socinfo_init() < 0)
diff --git a/arch/arm/mach-msm/devices-msm7x2xa.h b/arch/arm/mach-msm/devices-msm7x2xa.h
index c2383c6..73b58e0 100644
--- a/arch/arm/mach-msm/devices-msm7x2xa.h
+++ b/arch/arm/mach-msm/devices-msm7x2xa.h
@@ -30,4 +30,6 @@
void __init msm8625_init_irq(void);
void __init msm8625_map_io(void);
int ar600x_wlan_power(bool on);
+void __init msm8x25_spm_device_init(void);
+phys_addr_t msm8625_get_phys_base(void);
#endif
diff --git a/arch/arm/mach-msm/devices-msm7x30.c b/arch/arm/mach-msm/devices-msm7x30.c
index e9b94f6..89c8aaf 100644
--- a/arch/arm/mach-msm/devices-msm7x30.c
+++ b/arch/arm/mach-msm/devices-msm7x30.c
@@ -74,6 +74,20 @@
.resource = msm_ebi1_thermal_resources
};
+static struct resource resources_adsp[] = {
+{
+ .start = INT_ADSP_A9_A11,
+ .end = INT_ADSP_A9_A11,
+ .flags = IORESOURCE_IRQ,
+},
+};
+
+struct platform_device msm_adsp_device = {
+ .name = "msm_adsp",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(resources_adsp),
+ .resource = resources_adsp,
+};
static struct resource resources_uart1[] = {
{
diff --git a/arch/arm/mach-msm/devices.h b/arch/arm/mach-msm/devices.h
index 4e05cc1..2eb716a 100644
--- a/arch/arm/mach-msm/devices.h
+++ b/arch/arm/mach-msm/devices.h
@@ -38,6 +38,7 @@
extern struct platform_device msm_ebi0_thermal;
extern struct platform_device msm_ebi1_thermal;
+extern struct platform_device msm_adsp_device;
extern struct platform_device msm_device_uart1;
extern struct platform_device msm_device_uart2;
extern struct platform_device msm_device_uart3;
@@ -110,6 +111,8 @@
extern struct platform_device apq8064_device_gadget_peripheral;
extern struct platform_device apq8064_device_hsusb_host;
extern struct platform_device apq8064_device_hsic_host;
+extern struct platform_device apq8064_device_ehci_host3;
+extern struct platform_device apq8064_device_ehci_host4;
extern struct platform_device msm_device_i2c;
@@ -126,8 +129,8 @@
extern struct platform_device msm_gsbi9_qup_i2c_device;
extern struct platform_device msm_gsbi12_qup_i2c_device;
-extern struct platform_device msm8625_device_qup_i2c_gsbi0;
-extern struct platform_device msm8625_device_qup_i2c_gsbi1;
+extern struct platform_device msm8625_gsbi0_qup_i2c_device;
+extern struct platform_device msm8625_gsbi1_qup_i2c_device;
extern struct platform_device msm8625_device_uart_dm1;
extern struct platform_device msm8625_device_uart_dm2;
extern struct platform_device msm8625_device_sdc1;
@@ -138,6 +141,7 @@
extern struct platform_device msm8625_device_hsusb_host;
extern struct platform_device msm8625_device_otg;
extern struct platform_device msm8625_kgsl_3d0;
+extern struct platform_device msm8625_device_adsp;
extern struct platform_device msm_slim_ctrl;
extern struct platform_device msm_device_sps;
@@ -146,6 +150,7 @@
extern struct platform_device msm_device_bam_dmux;
extern struct platform_device msm_device_smd;
extern struct platform_device msm_device_smd_apq8064;
+extern struct platform_device msm8625_device_smd;
extern struct platform_device msm_device_dmov;
extern struct platform_device msm8960_device_dmov;
extern struct platform_device apq8064_device_dmov;
@@ -241,6 +246,8 @@
extern struct platform_device *msm_footswitch_devices[];
extern unsigned msm_num_footswitch_devices;
+extern struct platform_device *apq8064_fs_devices[];
+extern unsigned apq8064_num_fs_devices;
extern struct platform_device fsm_qfp_fuse_device;
@@ -317,3 +324,6 @@
extern struct platform_device msm_bus_8064_cpss_fpb;
extern struct platform_device mdm_8064_device;
+extern struct platform_device msm_dsps_device_8064;
+extern struct platform_device *msm_copper_stub_regulator_devices[];
+extern int msm_copper_stub_regulator_devices_len;
diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c
index ad1aecd..087227c 100644
--- a/arch/arm/mach-msm/dma.c
+++ b/arch/arm/mach-msm/dma.c
@@ -1,7 +1,7 @@
/* linux/arch/arm/mach-msm/dma.c
*
* Copyright (C) 2007 Google, Inc.
- * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2008-2010, 2012 Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -286,9 +286,11 @@
int ch = DMOV_ID_TO_CHAN(id);
spin_lock_irqsave(&dmov_conf[adm].lock, irq_flags);
- if (dmov_conf[adm].clk_ctl == CLK_DIS)
- msm_dmov_clk_toggle(adm, 1);
- else if (dmov_conf[adm].clk_ctl == CLK_TO_BE_DIS)
+ if (dmov_conf[adm].clk_ctl == CLK_DIS) {
+ status = msm_dmov_clk_toggle(adm, 1);
+ if (status != 0)
+ goto error;
+ } else if (dmov_conf[adm].clk_ctl == CLK_TO_BE_DIS)
del_timer(&dmov_conf[adm].timer);
dmov_conf[adm].clk_ctl = CLK_EN;
@@ -316,6 +318,7 @@
"%x\n", id, status);
list_add_tail(&cmd->list, &dmov_conf[adm].ready_commands[ch]);
}
+error:
spin_unlock_irqrestore(&dmov_conf[adm].lock, irq_flags);
}
EXPORT_SYMBOL(msm_dmov_enqueue_cmd_ext);
diff --git a/arch/arm/mach-msm/footswitch-8x60.c b/arch/arm/mach-msm/footswitch-8x60.c
index 5c10463..4609a4b 100644
--- a/arch/arm/mach-msm/footswitch-8x60.c
+++ b/arch/arm/mach-msm/footswitch-8x60.c
@@ -99,8 +99,8 @@
clock->reset_rate : DEFAULT_RATE;
rc = clk_set_rate(clock->clk, rate);
if (rc && rc != -ENOSYS) {
- pr_err("Failed to set %s rate to %lu Hz.\n",
- clock->name, clock->rate);
+ pr_err("Failed to set %s %s rate to %lu Hz.\n",
+ fs->desc.name, clock->name, clock->rate);
for (clock--; clock >= fs->clk_data; clock--) {
if (clock->enabled)
clk_disable_unprepare(
@@ -131,8 +131,8 @@
if (clock->enabled)
clk_disable_unprepare(clock->clk);
if (clock->rate && clk_set_rate(clock->clk, clock->rate))
- pr_err("Failed to restore %s rate to %lu Hz.\n",
- clock->name, clock->rate);
+ pr_err("Failed to restore %s %s rate to %lu Hz.\n",
+ fs->desc.name, clock->name, clock->rate);
}
}
@@ -167,14 +167,14 @@
if (fs->bus_port0) {
rc = msm_bus_axi_portunhalt(fs->bus_port0);
if (rc) {
- pr_err("Port 0 unhalt failed.\n");
+ pr_err("%s port 0 unhalt failed.\n", fs->desc.name);
goto err;
}
}
if (fs->bus_port1) {
rc = msm_bus_axi_portunhalt(fs->bus_port1);
if (rc) {
- pr_err("Port 1 unhalt failed.\n");
+ pr_err("%s port 1 unhalt failed.\n", fs->desc.name);
goto err_port2_halt;
}
}
@@ -252,14 +252,14 @@
if (fs->bus_port0) {
rc = msm_bus_axi_porthalt(fs->bus_port0);
if (rc) {
- pr_err("Port 0 halt failed.\n");
+ pr_err("%s port 0 halt failed.\n", fs->desc.name);
goto err;
}
}
if (fs->bus_port1) {
rc = msm_bus_axi_porthalt(fs->bus_port1);
if (rc) {
- pr_err("Port 1 halt failed.\n");
+ pr_err("%s port 1 halt failed.\n", fs->desc.name);
goto err_port2_halt;
}
}
@@ -329,7 +329,7 @@
if (fs->bus_port0) {
rc = msm_bus_axi_portunhalt(fs->bus_port0);
if (rc) {
- pr_err("Port 0 unhalt failed.\n");
+ pr_err("%s port 0 unhalt failed.\n", fs->desc.name);
goto err;
}
}
@@ -404,7 +404,7 @@
if (fs->bus_port0) {
rc = msm_bus_axi_porthalt(fs->bus_port0);
if (rc) {
- pr_err("Port 0 halt failed.\n");
+ pr_err("%s port 0 halt failed.\n", fs->desc.name);
goto err;
}
}
@@ -635,7 +635,8 @@
clock->clk = clk_get(&pdev->dev, clock->name);
if (IS_ERR(clock->clk)) {
rc = PTR_ERR(clock->clk);
- pr_err("clk_get(%s) failed\n", clock->name);
+ pr_err("%s clk_get(%s) failed\n", fs->desc.name,
+ clock->name);
goto err;
}
if (!strncmp(clock->name, "core_clk", 8))
diff --git a/arch/arm/mach-msm/footswitch-pcom.c b/arch/arm/mach-msm/footswitch-pcom.c
index 340f19b..673253b 100644
--- a/arch/arm/mach-msm/footswitch-pcom.c
+++ b/arch/arm/mach-msm/footswitch-pcom.c
@@ -205,14 +205,14 @@
fs->src_clk = clk_get(dev, "core_clk");
}
if (IS_ERR(fs->src_clk)) {
- pr_err("clk_get(src_clk) failed\n");
+ pr_err("%s clk_get(src_clk) failed\n", fs->desc.name);
rc = PTR_ERR(fs->src_clk);
goto err_src_clk;
}
fs->core_clk = clk_get(dev, "core_clk");
if (IS_ERR(fs->core_clk)) {
- pr_err("clk_get(core_clk) failed\n");
+ pr_err("%s clk_get(core_clk) failed\n", fs->desc.name);
rc = PTR_ERR(fs->core_clk);
goto err_core_clk;
}
@@ -220,7 +220,7 @@
if (fs->has_ahb_clk) {
fs->ahb_clk = clk_get(dev, "iface_clk");
if (IS_ERR(fs->ahb_clk)) {
- pr_err("clk_get(iface_clk) failed\n");
+ pr_err("%s clk_get(iface_clk) failed\n", fs->desc.name);
rc = PTR_ERR(fs->ahb_clk);
goto err_ahb_clk;
}
@@ -306,8 +306,6 @@
struct footswitch *fs;
int ret;
- if (cpu_is_msm8625())
- return 0;
/*
* Enable all footswitches in manual mode (ie. not controlled along
* with pcom clocks).
diff --git a/arch/arm/mach-msm/idle.h b/arch/arm/mach-msm/idle.h
index 830e36b..6311b3c 100644
--- a/arch/arm/mach-msm/idle.h
+++ b/arch/arm/mach-msm/idle.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2007-2009,2011 Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2007-2009,2012 Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -28,6 +28,15 @@
{
/* empty */
}
+static inline void msm_pm_boot_entry(void)
+{
+ /* empty */
+}
+static inline void msm_pm_write_boot_vector(unsigned int cpu,
+ unsigned long address)
+{
+ /* empty */
+}
#endif
#endif
diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h
index 96b0083..7fa4a07 100644
--- a/arch/arm/mach-msm/include/mach/board.h
+++ b/arch/arm/mach-msm/include/mach/board.h
@@ -200,6 +200,11 @@
uint8_t cam_gpio_req_tbl_size;
struct msm_gpio_set_tbl *cam_gpio_set_tbl;
uint8_t cam_gpio_set_tbl_size;
+ uint32_t gpio_no_mux;
+ uint32_t *camera_off_table;
+ uint8_t camera_off_table_size;
+ uint32_t *camera_on_table;
+ uint8_t camera_on_table_size;
};
enum msm_camera_i2c_mux_mode {
@@ -367,6 +372,7 @@
#ifdef CONFIG_MSM_BUS_SCALING
struct msm_bus_scale_pdata *bus_scale_table;
#endif
+ int (*lvds_pixel_remap)(void);
};
struct tvenc_platform_data {
@@ -417,10 +423,13 @@
int *gpio;
};
+#define PANEL_NAME_MAX_LEN 50
struct msm_fb_platform_data {
int (*detect_client)(const char *name);
int mddi_prescan;
int (*allow_set_offset)(void);
+ char prim_panel_name[PANEL_NAME_MAX_LEN];
+ char ext_panel_name[PANEL_NAME_MAX_LEN];
};
struct msm_hdmi_platform_data {
diff --git a/arch/arm/mach-msm/include/mach/diag_bridge.h b/arch/arm/mach-msm/include/mach/diag_bridge.h
index a39ed25..b06f020 100644
--- a/arch/arm/mach-msm/include/mach/diag_bridge.h
+++ b/arch/arm/mach-msm/include/mach/diag_bridge.h
@@ -19,6 +19,8 @@
int buf_size, int actual);
void (*write_complete_cb)(void *ctxt, char *buf,
int buf_size, int actual);
+ int (*suspend)(void *ctxt);
+ void (*resume)(void *ctxt);
};
#if defined(CONFIG_USB_QCOM_DIAG_BRIDGE) \
diff --git a/arch/arm/mach-msm/include/mach/dma.h b/arch/arm/mach-msm/include/mach/dma.h
index 3cb79b7..d170f5f 100644
--- a/arch/arm/mach-msm/include/mach/dma.h
+++ b/arch/arm/mach-msm/include/mach/dma.h
@@ -177,6 +177,9 @@
#define DMOV_CE_OUT_CHAN 1
#define DMOV_CE_OUT_CRCI 3
+#define DMOV_TSIF_CHAN 2
+#define DMOV_TSIF_CRCI 11
+
#define DMOV_HSUART_GSBI6_TX_CHAN 7
#define DMOV_HSUART_GSBI6_TX_CRCI 6
diff --git a/arch/arm/mach-msm/include/mach/iommu_domains.h b/arch/arm/mach-msm/include/mach/iommu_domains.h
index 2d2d2fb..af9213f 100644
--- a/arch/arm/mach-msm/include/mach/iommu_domains.h
+++ b/arch/arm/mach-msm/include/mach/iommu_domains.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -14,14 +14,16 @@
#define _ARCH_IOMMU_DOMAINS_H
enum {
- GLOBAL_DOMAIN,
+ VIDEO_DOMAIN,
+ CAMERA_DOMAIN = VIDEO_DOMAIN,
+ DISPLAY_DOMAIN = CAMERA_DOMAIN,
+ ROTATOR_DOMAIN = DISPLAY_DOMAIN,
MAX_DOMAINS
};
enum {
VIDEO_FIRMWARE_POOL,
VIDEO_MAIN_POOL,
- VIDEO_MFC_POOL,
GEN_POOL,
};
diff --git a/arch/arm/mach-msm/include/mach/irqs-8930.h b/arch/arm/mach-msm/include/mach/irqs-8930.h
index ed927bd..bfc32f6 100644
--- a/arch/arm/mach-msm/include/mach/irqs-8930.h
+++ b/arch/arm/mach-msm/include/mach/irqs-8930.h
@@ -152,10 +152,10 @@
#define SPS_MTI_2 (GIC_SPI_START + 109)
#define SPS_MTI_3 (GIC_SPI_START + 110)
#define GPS_PPS_OUT (GIC_SPI_START + 111)
-#define SPS_MTI_5 (GIC_SPI_START + 112)
-#define SPS_MTI_6 (GIC_SPI_START + 113)
-#define SPS_MTI_7 (GIC_SPI_START + 114)
-#define SPS_MTI_8 (GIC_SPI_START + 115)
+/* SPI IRQ 112 is unused */
+/* SPI IRQ 113 is unused */
+/* SPI IRQ 114 is unused */
+/* SPI IRQ 115 is unused */
#define TLMM_MSM_DIR_CONN_IRQ_11 (GIC_SPI_START + 116)
#define TLMM_MSM_DIR_CONN_IRQ_10 (GIC_SPI_START + 117)
#define BAM_DMA1 (GIC_SPI_START + 118)
diff --git a/arch/arm/mach-msm/include/mach/irqs-copper.h b/arch/arm/mach-msm/include/mach/irqs-copper.h
index 821eaeb..c961804 100644
--- a/arch/arm/mach-msm/include/mach/irqs-copper.h
+++ b/arch/arm/mach-msm/include/mach/irqs-copper.h
@@ -36,7 +36,8 @@
#define NR_MSM_IRQS 1020 /* Should be 256 - but higher due to bug in sim */
#define NR_GPIO_IRQS 156
-#define NR_BOARD_IRQS 100
+#define NR_QPNP_IRQS 32768 /* SPARSE_IRQ is required to support this */
+#define NR_BOARD_IRQS NR_QPNP_IRQS
#define NR_TLMM_MSM_DIR_CONN_IRQ 8
#define NR_MSM_GPIOS NR_GPIO_IRQS
diff --git a/arch/arm/mach-msm/include/mach/irqs.h b/arch/arm/mach-msm/include/mach/irqs.h
index 954b673..1ae7454 100644
--- a/arch/arm/mach-msm/include/mach/irqs.h
+++ b/arch/arm/mach-msm/include/mach/irqs.h
@@ -42,10 +42,11 @@
#define NR_GPIO_IRQS 152
#define NR_PM8921_IRQS 256
#define NR_PM8821_IRQS 64
-#define NR_TABLA_IRQS 49
+#define NR_WCD9XXX_IRQS 49
+#define NR_TABLA_IRQS NR_WCD9XXX_IRQS
#define NR_GPIO_EXPANDER_IRQS 8
#define NR_BOARD_IRQS (NR_PM8921_IRQS + NR_PM8821_IRQS + \
- NR_TABLA_IRQS + NR_GPIO_EXPANDER_IRQS)
+ NR_WCD9XXX_IRQS + NR_GPIO_EXPANDER_IRQS)
#define NR_TLMM_MSM_DIR_CONN_IRQ 8 /*Need to Verify this Count*/
#define NR_MSM_GPIOS NR_GPIO_IRQS
diff --git a/arch/arm/mach-msm/include/mach/msm_adsp.h b/arch/arm/mach-msm/include/mach/msm_adsp.h
index bbae6c1..e40c07d 100644
--- a/arch/arm/mach-msm/include/mach/msm_adsp.h
+++ b/arch/arm/mach-msm/include/mach/msm_adsp.h
@@ -1,7 +1,7 @@
/* include/asm-arm/arch-msm/msm_adsp.h
*
* Copyright (C) 2008 Google, Inc.
- * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2009-2010, 2012 Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -52,6 +52,14 @@
unsigned queue_id,
void *data, size_t len);
+/*Explicitly gererate adsp event */
+int msm_adsp_generate_event(void *data,
+ struct msm_adsp_module *mod,
+ unsigned event_id,
+ unsigned event_length,
+ unsigned event_size,
+ void *msg);
+
#define ADSP_MESSAGE_ID 0xFFFF
/* Command Queue Indexes */
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8064.h b/arch/arm/mach-msm/include/mach/msm_iomap-8064.h
index 7479712..96bc35e 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8064.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8064.h
@@ -103,4 +103,7 @@
#define APQ8064_SIC_NON_SECURE_PHYS 0x12100000
#define APQ8064_SIC_NON_SECURE_SIZE SZ_64K
+#define APQ8064_HDMI_PHYS 0x04A00000
+#define APQ8064_HDMI_SIZE SZ_4K
+
#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-copper.h b/arch/arm/mach-msm/include/mach/msm_iomap-copper.h
index 6311dbe..b560276 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-copper.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-copper.h
@@ -34,7 +34,7 @@
#define COPPER_APCS_GCC_PHYS 0xF9011000
#define COPPER_APCS_GCC_SIZE SZ_4K
-#define COPPER_TLMM_PHYS 0xFD400000
+#define COPPER_TLMM_PHYS 0xFD510000
#define COPPER_TLMM_SIZE SZ_16K
#ifdef CONFIG_DEBUG_MSMCOPPER_UART
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index 27965d3..48e3837 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -93,8 +93,6 @@
0xFB600000 */
#define MSM_STRONGLY_ORDERED_PAGE 0xFA0F0000
-#define MSM8625_SECONDARY_PHYS 0x0FE00000
-
#if defined(CONFIG_ARCH_MSM9615) || defined(CONFIG_ARCH_MSM7X27)
#define MSM_SHARED_RAM_SIZE SZ_1M
diff --git a/arch/arm/mach-msm/include/mach/msm_rtb.h b/arch/arm/mach-msm/include/mach/msm_rtb.h
index a75ab91..5eea63f 100644
--- a/arch/arm/mach-msm/include/mach/msm_rtb.h
+++ b/arch/arm/mach-msm/include/mach/msm_rtb.h
@@ -13,13 +13,18 @@
#ifndef __MSM_RTB_H__
#define __MSM_RTB_H__
+/*
+ * These numbers are used from the kernel command line and sysfs
+ * to control filtering. Remove items from here with extreme caution
+ */
enum logk_event_type {
LOGK_NONE = 0,
- LOGK_READL,
- LOGK_WRITEL,
- LOGK_LOGBUF,
- LOGK_HOTPLUG,
- LOGK_OTHER,
+ LOGK_READL = 1,
+ LOGK_WRITEL = 2,
+ LOGK_LOGBUF = 3,
+ LOGK_HOTPLUG = 4,
+ LOGK_CTXID = 5,
+ LOGK_OTHER = 31,
};
struct msm_rtb_platform_data {
diff --git a/arch/arm/mach-msm/include/mach/msm_smd.h b/arch/arm/mach-msm/include/mach/msm_smd.h
index 4be6d9ea..d896013 100644
--- a/arch/arm/mach-msm/include/mach/msm_smd.h
+++ b/arch/arm/mach-msm/include/mach/msm_smd.h
@@ -46,6 +46,7 @@
SMD_WCNSS = SMSM_WCNSS,
SMD_DSPS = SMSM_DSPS,
SMD_MODEM_Q6_FW,
+ SMD_RPM,
NUM_SMD_SUBSYSTEMS,
};
@@ -65,6 +66,10 @@
SMD_QDSP_Q6FW,
SMD_DSPS_Q6FW,
SMD_WCNSS_Q6FW,
+ SMD_APPS_RPM,
+ SMD_MODEM_RPM,
+ SMD_QDSP_RPM,
+ SMD_WCNSS_RPM,
SMD_NUM_TYPE,
SMD_LOOPBACK_TYPE = 100,
@@ -118,9 +123,19 @@
};
+/*
+ * Subsystem Restart Configuration
+ *
+ * @disable_smsm_reset_handshake
+ */
+struct smd_subsystem_restart_config {
+ int disable_smsm_reset_handshake;
+};
+
struct smd_platform {
uint32_t num_ss_configs;
struct smd_subsystem_config *smd_ss_configs;
+ struct smd_subsystem_restart_config *smd_ssr_config;
};
#ifdef CONFIG_MSM_SMD
@@ -236,6 +251,22 @@
*/
int smd_write_end(smd_channel_t *ch);
+/*
+ * Returns a pointer to the subsystem name or NULL if no
+ * subsystem name is available.
+ *
+ * @type - Edge definition
+ */
+const char *smd_edge_to_subsystem(uint32_t type);
+
+/*
+ * Returns a pointer to the subsystem name given the
+ * remote processor ID.
+ *
+ * @pid Remote processor ID
+ * @returns Pointer to subsystem name or NULL if not found
+ */
+const char *smd_pid_to_subsystem(uint32_t pid);
#else
static inline int smd_open(const char *name, smd_channel_t **ch, void *priv,
@@ -337,6 +368,16 @@
{
return -ENODEV;
}
+
+static inline const char *smd_edge_to_subsystem(uint32_t type)
+{
+ return NULL;
+}
+
+static inline const char *smd_pid_to_subsystem(uint32_t pid)
+{
+ return NULL;
+}
#endif
#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_xo.h b/arch/arm/mach-msm/include/mach/msm_xo.h
index 7760647..f9795b4 100644
--- a/arch/arm/mach-msm/include/mach/msm_xo.h
+++ b/arch/arm/mach-msm/include/mach/msm_xo.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -19,8 +19,6 @@
MSM_XO_TCXO_A1,
MSM_XO_TCXO_A2,
MSM_XO_CORE,
- MSM_XO_PXO,
- MSM_XO_CXO,
NUM_MSM_XO_IDS
};
diff --git a/arch/arm/mach-msm/include/mach/qdsp6v2/audio_dev_ctl.h b/arch/arm/mach-msm/include/mach/qdsp6v2/audio_dev_ctl.h
index 71f2bd9..20c6fc4 100644
--- a/arch/arm/mach-msm/include/mach/qdsp6v2/audio_dev_ctl.h
+++ b/arch/arm/mach-msm/include/mach/qdsp6v2/audio_dev_ctl.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -96,6 +96,8 @@
int msm_reset_all_device(void);
+int reset_device(void);
+
int msm_clear_all_session(void);
struct msm_snddev_info *audio_dev_ctrl_find_dev(u32 dev_id);
diff --git a/arch/arm/mach-msm/include/mach/qpnp.h b/arch/arm/mach-msm/include/mach/qpnp.h
new file mode 100644
index 0000000..1d2e440
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/qpnp.h
@@ -0,0 +1,19 @@
+ /* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/spmi.h>
+
+struct resource *qpnp_get_resource(struct spmi_device *dev,
+ unsigned int node_idx, unsigned int type,
+ unsigned int res_num);
+int qpnp_get_irq(struct spmi_device *dev, unsigned int node_idx,
+ unsigned int res_num);
diff --git a/arch/arm/mach-msm/include/mach/scm.h b/arch/arm/mach-msm/include/mach/scm.h
index 6aa944f..af4691a 100644
--- a/arch/arm/mach-msm/include/mach/scm.h
+++ b/arch/arm/mach-msm/include/mach/scm.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -22,6 +22,7 @@
#define SCM_SVC_FUSE 0x8
#define SCM_SVC_PWR 0x9
#define SCM_SVC_CP 0xC
+#define SCM_SVC_DCVS 0xD
#define SCM_SVC_TZSCHEDULER 0xFC
#ifdef CONFIG_MSM_SCM
@@ -30,6 +31,8 @@
extern s32 scm_call_atomic1(u32 svc, u32 cmd, u32 arg1);
extern s32 scm_call_atomic2(u32 svc, u32 cmd, u32 arg1, u32 arg2);
+extern s32 scm_call_atomic4_3(u32 svc, u32 cmd, u32 arg1, u32 arg2, u32 arg3,
+ u32 arg4, u32 *ret1, u32 *ret2);
#define SCM_VERSION(major, minor) (((major) << 16) | ((minor) & 0xFF))
@@ -54,6 +57,12 @@
return 0;
}
+static inline s32 scm_call_atomic4_3(u32 svc, u32 cmd, u32 arg1, u32 arg2,
+ u32 arg3, u32 arg4, u32 *ret1, u32 *ret2)
+{
+ return 0;
+}
+
static inline u32 scm_get_version(void)
{
return 0;
diff --git a/arch/arm/mach-msm/include/mach/socinfo.h b/arch/arm/mach-msm/include/mach/socinfo.h
index e1d4459..407c55a 100644
--- a/arch/arm/mach-msm/include/mach/socinfo.h
+++ b/arch/arm/mach-msm/include/mach/socinfo.h
@@ -68,6 +68,7 @@
enum msm_cpu socinfo_get_msm_cpu(void);
uint32_t socinfo_get_id(void);
uint32_t socinfo_get_version(void);
+uint32_t socinfo_get_raw_id(void);
char *socinfo_get_build_id(void);
uint32_t socinfo_get_platform_type(void);
uint32_t socinfo_get_platform_subtype(void);
@@ -103,7 +104,7 @@
static inline int cpu_is_msm7x27(void)
{
-#ifdef CONFIG_ARCH_MSM7X27
+#if defined(CONFIG_ARCH_MSM7X27) && !defined(CONFIG_ARCH_MSM7X27A)
enum msm_cpu cpu = socinfo_get_msm_cpu();
BUG_ON(cpu == MSM_CPU_UNKNOWN);
diff --git a/arch/arm/mach-msm/include/mach/timex.h b/arch/arm/mach-msm/include/mach/timex.h
index 61f1996..ca7c4c7 100644
--- a/arch/arm/mach-msm/include/mach/timex.h
+++ b/arch/arm/mach-msm/include/mach/timex.h
@@ -18,8 +18,6 @@
#define CLOCK_TICK_RATE 1000000
-#ifdef CONFIG_MSM_SMP
#define ARCH_HAS_READ_CURRENT_TIMER
-#endif
#endif
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index dcf9f12..bad8237 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -43,7 +43,7 @@
*/
unsigned int msm_shared_ram_phys = 0x00100000;
-static void msm_map_io(struct map_desc *io_desc, int size)
+static void __init msm_map_io(struct map_desc *io_desc, int size)
{
int i;
@@ -273,6 +273,7 @@
MSM_CHIP_DEVICE(SAW3, APQ8064),
MSM_CHIP_DEVICE(SAW_L2, APQ8064),
MSM_CHIP_DEVICE(IMEM, APQ8064),
+ MSM_CHIP_DEVICE(HDMI, APQ8064),
{
.virtual = (unsigned long) MSM_SHARED_RAM_BASE,
.length = MSM_SHARED_RAM_SIZE,
@@ -419,6 +420,8 @@
MSM_CHIP_DEVICE(CLK_CTL, MSM8625),
MSM_CHIP_DEVICE(SAW0, MSM8625),
MSM_CHIP_DEVICE(SAW1, MSM8625),
+ MSM_CHIP_DEVICE(AD5, MSM7XXX),
+ MSM_CHIP_DEVICE(MDC, MSM7XXX),
#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
defined(CONFIG_DEBUG_MSM_UART3)
MSM_CHIP_DEVICE(DEBUG_UART, MSM7XXX),
diff --git a/arch/arm/mach-msm/iommu.c b/arch/arm/mach-msm/iommu.c
index 463d6c9..853888a 100644
--- a/arch/arm/mach-msm/iommu.c
+++ b/arch/arm/mach-msm/iommu.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -56,7 +56,7 @@
static int msm_iommu_tex_class[4];
-DEFINE_SPINLOCK(msm_iommu_lock);
+DEFINE_MUTEX(msm_iommu_lock);
struct msm_priv {
unsigned long *pgtable;
@@ -68,14 +68,14 @@
{
int ret;
- ret = clk_enable(drvdata->pclk);
+ ret = clk_prepare_enable(drvdata->pclk);
if (ret)
goto fail;
if (drvdata->clk) {
- ret = clk_enable(drvdata->clk);
+ ret = clk_prepare_enable(drvdata->clk);
if (ret)
- clk_disable(drvdata->pclk);
+ clk_disable_unprepare(drvdata->pclk);
}
fail:
return ret;
@@ -84,8 +84,8 @@
static void __disable_clocks(struct msm_iommu_drvdata *drvdata)
{
if (drvdata->clk)
- clk_disable(drvdata->clk);
- clk_disable(drvdata->pclk);
+ clk_disable_unprepare(drvdata->clk);
+ clk_disable_unprepare(drvdata->pclk);
}
static int __flush_iotlb_va(struct iommu_domain *domain, unsigned int va)
@@ -299,11 +299,10 @@
static void msm_iommu_domain_destroy(struct iommu_domain *domain)
{
struct msm_priv *priv;
- unsigned long flags;
unsigned long *fl_table;
int i;
- spin_lock_irqsave(&msm_iommu_lock, flags);
+ mutex_lock(&msm_iommu_lock);
priv = domain->priv;
domain->priv = NULL;
@@ -320,7 +319,7 @@
}
kfree(priv);
- spin_unlock_irqrestore(&msm_iommu_lock, flags);
+ mutex_unlock(&msm_iommu_lock);
}
static int msm_iommu_attach_dev(struct iommu_domain *domain, struct device *dev)
@@ -331,9 +330,8 @@
struct msm_iommu_ctx_drvdata *ctx_drvdata;
struct msm_iommu_ctx_drvdata *tmp_drvdata;
int ret = 0;
- unsigned long flags;
- spin_lock_irqsave(&msm_iommu_lock, flags);
+ mutex_lock(&msm_iommu_lock);
priv = domain->priv;
@@ -373,7 +371,7 @@
list_add(&(ctx_drvdata->attached_elm), &priv->list_attached);
fail:
- spin_unlock_irqrestore(&msm_iommu_lock, flags);
+ mutex_unlock(&msm_iommu_lock);
return ret;
}
@@ -384,10 +382,9 @@
struct msm_iommu_ctx_dev *ctx_dev;
struct msm_iommu_drvdata *iommu_drvdata;
struct msm_iommu_ctx_drvdata *ctx_drvdata;
- unsigned long flags;
int ret;
- spin_lock_irqsave(&msm_iommu_lock, flags);
+ mutex_lock(&msm_iommu_lock);
priv = domain->priv;
if (!priv || !dev)
@@ -412,7 +409,7 @@
list_del_init(&ctx_drvdata->attached_elm);
fail:
- spin_unlock_irqrestore(&msm_iommu_lock, flags);
+ mutex_unlock(&msm_iommu_lock);
}
static int __get_pgprot(int prot, int len)
@@ -447,7 +444,6 @@
phys_addr_t pa, int order, int prot)
{
struct msm_priv *priv;
- unsigned long flags;
unsigned long *fl_table;
unsigned long *fl_pte;
unsigned long fl_offset;
@@ -458,7 +454,7 @@
size_t len = 0x1000UL << order;
int ret = 0;
- spin_lock_irqsave(&msm_iommu_lock, flags);
+ mutex_lock(&msm_iommu_lock);
priv = domain->priv;
if (!priv) {
@@ -525,7 +521,7 @@
if (*fl_pte == 0) {
unsigned long *sl;
- sl = (unsigned long *) __get_free_pages(GFP_ATOMIC,
+ sl = (unsigned long *) __get_free_pages(GFP_KERNEL,
get_order(SZ_4K));
if (!sl) {
@@ -583,7 +579,7 @@
ret = __flush_iotlb_va(domain, va);
fail:
- spin_unlock_irqrestore(&msm_iommu_lock, flags);
+ mutex_unlock(&msm_iommu_lock);
return ret;
}
@@ -591,7 +587,6 @@
int order)
{
struct msm_priv *priv;
- unsigned long flags;
unsigned long *fl_table;
unsigned long *fl_pte;
unsigned long fl_offset;
@@ -601,7 +596,7 @@
size_t len = 0x1000UL << order;
int i, ret = 0;
- spin_lock_irqsave(&msm_iommu_lock, flags);
+ mutex_lock(&msm_iommu_lock);
priv = domain->priv;
@@ -686,7 +681,7 @@
ret = __flush_iotlb_va(domain, va);
fail:
- spin_unlock_irqrestore(&msm_iommu_lock, flags);
+ mutex_unlock(&msm_iommu_lock);
return ret;
}
@@ -702,13 +697,12 @@
unsigned long fl_offset;
unsigned long *sl_table;
unsigned long sl_offset, sl_start;
- unsigned long flags;
unsigned int chunk_offset = 0;
unsigned int chunk_pa;
int ret = 0;
struct msm_priv *priv;
- spin_lock_irqsave(&msm_iommu_lock, flags);
+ mutex_lock(&msm_iommu_lock);
BUG_ON(len & (SZ_4K - 1));
@@ -734,7 +728,7 @@
/* Set up a 2nd level page table if one doesn't exist */
if (*fl_pte == 0) {
sl_table = (unsigned long *)
- __get_free_pages(GFP_ATOMIC, get_order(SZ_4K));
+ __get_free_pages(GFP_KERNEL, get_order(SZ_4K));
if (!sl_table) {
pr_debug("Could not allocate second level table\n");
@@ -782,7 +776,7 @@
}
__flush_iotlb(domain);
fail:
- spin_unlock_irqrestore(&msm_iommu_lock, flags);
+ mutex_unlock(&msm_iommu_lock);
return ret;
}
@@ -796,11 +790,10 @@
unsigned long fl_offset;
unsigned long *sl_table;
unsigned long sl_start, sl_end;
- unsigned long flags;
int used, i;
struct msm_priv *priv;
- spin_lock_irqsave(&msm_iommu_lock, flags);
+ mutex_lock(&msm_iommu_lock);
BUG_ON(len & (SZ_4K - 1));
@@ -854,7 +847,7 @@
}
__flush_iotlb(domain);
- spin_unlock_irqrestore(&msm_iommu_lock, flags);
+ mutex_unlock(&msm_iommu_lock);
return 0;
}
@@ -865,12 +858,11 @@
struct msm_iommu_drvdata *iommu_drvdata;
struct msm_iommu_ctx_drvdata *ctx_drvdata;
unsigned int par;
- unsigned long flags;
void __iomem *base;
phys_addr_t ret = 0;
int ctx;
- spin_lock_irqsave(&msm_iommu_lock, flags);
+ mutex_lock(&msm_iommu_lock);
priv = domain->priv;
if (list_empty(&priv->list_attached))
@@ -903,7 +895,7 @@
__disable_clocks(iommu_drvdata);
fail:
- spin_unlock_irqrestore(&msm_iommu_lock, flags);
+ mutex_unlock(&msm_iommu_lock);
return ret;
}
@@ -947,7 +939,7 @@
unsigned int fsr;
int i, ret;
- spin_lock(&msm_iommu_lock);
+ mutex_lock(&msm_iommu_lock);
if (!drvdata) {
pr_err("Invalid device ID in context interrupt handler\n");
@@ -975,7 +967,7 @@
}
__disable_clocks(drvdata);
fail:
- spin_unlock(&msm_iommu_lock);
+ mutex_unlock(&msm_iommu_lock);
return 0;
}
diff --git a/arch/arm/mach-msm/iommu_dev.c b/arch/arm/mach-msm/iommu_dev.c
index 1982082..70e96b0 100644
--- a/arch/arm/mach-msm/iommu_dev.c
+++ b/arch/arm/mach-msm/iommu_dev.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -156,7 +156,7 @@
goto fail;
}
- ret = clk_enable(iommu_pclk);
+ ret = clk_prepare_enable(iommu_pclk);
if (ret)
goto fail_enable;
@@ -168,7 +168,7 @@
clk_set_rate(iommu_clk, ret);
}
- ret = clk_enable(iommu_clk);
+ ret = clk_prepare_enable(iommu_clk);
if (ret) {
clk_put(iommu_clk);
goto fail_pclk;
@@ -226,8 +226,8 @@
goto fail_io;
}
- ret = request_irq(irq, msm_iommu_fault_handler, 0,
- "msm_iommu_secure_irpt_handler", drvdata);
+ ret = request_threaded_irq(irq, NULL, msm_iommu_fault_handler,
+ IRQF_ONESHOT, "msm_iommu_secure_irpt_handler", drvdata);
if (ret) {
pr_err("Request IRQ %d failed with ret=%d\n", irq, ret);
goto fail_io;
@@ -247,9 +247,9 @@
platform_set_drvdata(pdev, drvdata);
if (iommu_clk)
- clk_disable(iommu_clk);
+ clk_disable_unprepare(iommu_clk);
- clk_disable(iommu_pclk);
+ clk_disable_unprepare(iommu_pclk);
return 0;
fail_io:
@@ -258,11 +258,11 @@
release_mem_region(r->start, len);
fail_clk:
if (iommu_clk) {
- clk_disable(iommu_clk);
+ clk_disable_unprepare(iommu_clk);
clk_put(iommu_clk);
}
fail_pclk:
- clk_disable(iommu_pclk);
+ clk_disable_unprepare(iommu_pclk);
fail_enable:
clk_put(iommu_pclk);
fail:
@@ -315,14 +315,14 @@
INIT_LIST_HEAD(&ctx_drvdata->attached_elm);
platform_set_drvdata(pdev, ctx_drvdata);
- ret = clk_enable(drvdata->pclk);
+ ret = clk_prepare_enable(drvdata->pclk);
if (ret)
goto fail;
if (drvdata->clk) {
- ret = clk_enable(drvdata->clk);
+ ret = clk_prepare_enable(drvdata->clk);
if (ret) {
- clk_disable(drvdata->pclk);
+ clk_disable_unprepare(drvdata->pclk);
goto fail;
}
}
@@ -357,8 +357,8 @@
mb();
if (drvdata->clk)
- clk_disable(drvdata->clk);
- clk_disable(drvdata->pclk);
+ clk_disable_unprepare(drvdata->clk);
+ clk_disable_unprepare(drvdata->pclk);
dev_info(&pdev->dev, "context %s using bank %d\n", c->name, c->num);
return 0;
diff --git a/arch/arm/mach-msm/iommu_domains.c b/arch/arm/mach-msm/iommu_domains.c
index 727b729..a7663b6 100644
--- a/arch/arm/mach-msm/iommu_domains.c
+++ b/arch/arm/mach-msm/iommu_domains.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -92,9 +92,22 @@
return NULL;
}
+static unsigned long subsystem_to_domain_tbl[] = {
+ VIDEO_DOMAIN,
+ VIDEO_DOMAIN,
+ CAMERA_DOMAIN,
+ DISPLAY_DOMAIN,
+ ROTATOR_DOMAIN,
+ 0xFFFFFFFF
+};
+
unsigned long msm_subsystem_get_domain_no(int subsys_id)
{
- return GLOBAL_DOMAIN;
+ if (subsys_id > INVALID_SUBSYS_ID && subsys_id <= MAX_SUBSYSTEM_ID &&
+ subsys_id < ARRAY_SIZE(subsystem_to_domain_tbl))
+ return subsystem_to_domain_tbl[subsys_id];
+ else
+ return subsystem_to_domain_tbl[MAX_SUBSYSTEM_ID];
}
unsigned long msm_subsystem_get_partition_no(int subsys_id)
diff --git a/arch/arm/mach-msm/ipc_router.c b/arch/arm/mach-msm/ipc_router.c
index 15ea8ba..538dbbe 100644
--- a/arch/arm/mach-msm/ipc_router.c
+++ b/arch/arm/mach-msm/ipc_router.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -756,7 +756,7 @@
pkt->length = pkt_size;
mutex_lock(&xprt_info->tx_lock);
- ret = xprt_info->xprt->write(pkt, pkt_size, 0);
+ ret = xprt_info->xprt->write(pkt, pkt_size, xprt_info->xprt);
mutex_unlock(&xprt_info->tx_lock);
release_pkt(pkt);
@@ -933,7 +933,8 @@
list_for_each_entry(fwd_xprt_info, &xprt_info_list, list) {
mutex_lock(&fwd_xprt_info->tx_lock);
if (xprt_info->xprt->link_id != fwd_xprt_info->xprt->link_id)
- fwd_xprt_info->xprt->write(pkt, pkt->length, 0);
+ fwd_xprt_info->xprt->write(pkt, pkt->length,
+ fwd_xprt_info->xprt);
mutex_unlock(&fwd_xprt_info->tx_lock);
}
mutex_unlock(&xprt_info_list_lock);
@@ -984,7 +985,7 @@
pr_err("%s: DST in the same cluster\n", __func__);
return 0;
}
- fwd_xprt_info->xprt->write(pkt, pkt->length, 0);
+ fwd_xprt_info->xprt->write(pkt, pkt->length, fwd_xprt_info->xprt);
mutex_unlock(&fwd_xprt_info->tx_lock);
mutex_unlock(&rt_entry->lock);
mutex_unlock(&routing_table_lock);
@@ -1713,7 +1714,7 @@
mutex_lock(&rt_entry->lock);
xprt_info = rt_entry->xprt_info;
mutex_lock(&xprt_info->tx_lock);
- ret = xprt_info->xprt->write(pkt, pkt->length, 0);
+ ret = xprt_info->xprt->write(pkt, pkt->length, xprt_info->xprt);
mutex_unlock(&xprt_info->tx_lock);
mutex_unlock(&rt_entry->lock);
mutex_unlock(&routing_table_lock);
@@ -2070,7 +2071,7 @@
mutex_lock(&xprt_info_list_lock);
list_for_each_entry_safe(xprt_info, tmp_xprt_info,
&xprt_info_list, list) {
- xprt_info->xprt->close();
+ xprt_info->xprt->close(xprt_info->xprt);
list_del(&xprt_info->list);
kfree(xprt_info);
}
diff --git a/arch/arm/mach-msm/ipc_router.h b/arch/arm/mach-msm/ipc_router.h
index b125185..bd10ea7 100644
--- a/arch/arm/mach-msm/ipc_router.h
+++ b/arch/arm/mach-msm/ipc_router.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -150,11 +150,13 @@
uint32_t link_id;
void *priv;
- int (*read_avail)(void);
- int (*read)(void *data, uint32_t len);
- int (*write_avail)(void);
- int (*write)(void *data, uint32_t len, enum write_data_type type);
- int (*close)(void);
+ int (*read_avail)(struct msm_ipc_router_xprt *xprt);
+ int (*read)(void *data, uint32_t len,
+ struct msm_ipc_router_xprt *xprt);
+ int (*write_avail)(struct msm_ipc_router_xprt *xprt);
+ int (*write)(void *data, uint32_t len,
+ struct msm_ipc_router_xprt *xprt);
+ int (*close)(struct msm_ipc_router_xprt *xprt);
};
extern struct completion msm_ipc_remote_router_up;
diff --git a/arch/arm/mach-msm/ipc_router_smd_xprt.c b/arch/arm/mach-msm/ipc_router_smd_xprt.c
index 997d4b5..6960d2e 100644
--- a/arch/arm/mach-msm/ipc_router_smd_xprt.c
+++ b/arch/arm/mach-msm/ipc_router_smd_xprt.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -38,14 +38,21 @@
#define MIN_FRAG_SZ (IPC_ROUTER_HDR_SIZE + sizeof(union rr_control_msg))
+#define NUM_SMD_XPRTS 2
+#define XPRT_NAME_LEN (SMD_MAX_CH_NAME_LEN + 12)
+
struct msm_ipc_router_smd_xprt {
struct msm_ipc_router_xprt xprt;
-
smd_channel_t *channel;
+ struct workqueue_struct *smd_xprt_wq;
+ wait_queue_head_t write_avail_wait_q;
+ struct rr_packet *in_pkt;
+ int is_partial_in_pkt;
+ struct delayed_work read_work;
+ spinlock_t ss_reset_lock; /*Subsystem reset lock*/
+ int ss_reset;
};
-static struct msm_ipc_router_smd_xprt smd_remote_xprt;
-
struct msm_ipc_router_smd_xprt_work {
struct msm_ipc_router_xprt *xprt;
struct work_struct work;
@@ -54,24 +61,45 @@
static void smd_xprt_read_data(struct work_struct *work);
static void smd_xprt_open_event(struct work_struct *work);
static void smd_xprt_close_event(struct work_struct *work);
-static DECLARE_DELAYED_WORK(work_read_data, smd_xprt_read_data);
-static struct workqueue_struct *smd_xprt_workqueue;
-static wait_queue_head_t write_avail_wait_q;
-static struct rr_packet *in_pkt;
-static int is_partial_in_pkt;
+struct msm_ipc_router_smd_xprt_config {
+ char ch_name[SMD_MAX_CH_NAME_LEN];
+ char xprt_name[XPRT_NAME_LEN];
+ uint32_t edge;
+ uint32_t link_id;
+};
-static DEFINE_SPINLOCK(modem_reset_lock);
-static int modem_reset;
+struct msm_ipc_router_smd_xprt_config smd_xprt_cfg[] = {
+ {"RPCRPY_CNTL", "ipc_rtr_smd_rpcrpy_cntl", SMD_APPS_MODEM, 1},
+ {"IPCRTR", "ipc_rtr_smd_ipcrtr", SMD_APPS_MODEM, 1},
+};
-static int msm_ipc_router_smd_remote_write_avail(void)
+static struct msm_ipc_router_smd_xprt smd_remote_xprt[NUM_SMD_XPRTS];
+
+static int find_smd_xprt_cfg(const char *name)
{
- return smd_write_avail(smd_remote_xprt.channel);
+ int i;
+
+ for (i = 0; i < NUM_SMD_XPRTS; i++) {
+ if (!strncmp(name, smd_xprt_cfg[i].ch_name, 20))
+ return i;
+ }
+
+ return -ENODEV;
+}
+
+static int msm_ipc_router_smd_remote_write_avail(
+ struct msm_ipc_router_xprt *xprt)
+{
+ struct msm_ipc_router_smd_xprt *smd_xprtp =
+ container_of(xprt, struct msm_ipc_router_smd_xprt, xprt);
+
+ return smd_write_avail(smd_xprtp->channel);
}
static int msm_ipc_router_smd_remote_write(void *data,
uint32_t len,
- uint32_t type)
+ struct msm_ipc_router_xprt *xprt)
{
struct rr_packet *pkt = (struct rr_packet *)data;
struct sk_buff *ipc_rtr_pkt;
@@ -79,6 +107,8 @@
int offset, sz_written = 0;
int ret, num_retries = 0;
unsigned long flags;
+ struct msm_ipc_router_smd_xprt *smd_xprtp =
+ container_of(xprt, struct msm_ipc_router_smd_xprt, xprt);
if (!pkt)
return -EINVAL;
@@ -87,81 +117,92 @@
return -EINVAL;
align_sz = ALIGN_SIZE(pkt->length);
- while ((ret = smd_write_start(smd_remote_xprt.channel,
+ while ((ret = smd_write_start(smd_xprtp->channel,
(len + align_sz))) < 0) {
- spin_lock_irqsave(&modem_reset_lock, flags);
- if (modem_reset) {
- spin_unlock_irqrestore(&modem_reset_lock, flags);
- pr_err("%s: Modem reset\n", __func__);
+ spin_lock_irqsave(&smd_xprtp->ss_reset_lock, flags);
+ if (smd_xprtp->ss_reset) {
+ spin_unlock_irqrestore(&smd_xprtp->ss_reset_lock,
+ flags);
+ pr_err("%s: %s chnl reset\n", __func__, xprt->name);
return -ENETRESET;
}
- spin_unlock_irqrestore(&modem_reset_lock, flags);
+ spin_unlock_irqrestore(&smd_xprtp->ss_reset_lock, flags);
if (num_retries >= 5) {
- pr_err("%s: Error %d @ smd_write_start\n",
- __func__, ret);
+ pr_err("%s: Error %d @smd_write_start for %s\n",
+ __func__, ret, xprt->name);
return ret;
}
msleep(50);
+ num_retries++;
}
D("%s: Ready to write\n", __func__);
skb_queue_walk(pkt->pkt_fragment_q, ipc_rtr_pkt) {
offset = 0;
while (offset < ipc_rtr_pkt->len) {
- if (!smd_write_avail(smd_remote_xprt.channel))
- smd_enable_read_intr(smd_remote_xprt.channel);
+ if (!smd_write_avail(smd_xprtp->channel))
+ smd_enable_read_intr(smd_xprtp->channel);
- wait_event(write_avail_wait_q,
- (smd_write_avail(smd_remote_xprt.channel) ||
- modem_reset));
- smd_disable_read_intr(smd_remote_xprt.channel);
- spin_lock_irqsave(&modem_reset_lock, flags);
- if (modem_reset) {
- spin_unlock_irqrestore(&modem_reset_lock,
- flags);
- pr_err("%s: Modem reset\n", __func__);
+ wait_event(smd_xprtp->write_avail_wait_q,
+ (smd_write_avail(smd_xprtp->channel) ||
+ smd_xprtp->ss_reset));
+ smd_disable_read_intr(smd_xprtp->channel);
+ spin_lock_irqsave(&smd_xprtp->ss_reset_lock, flags);
+ if (smd_xprtp->ss_reset) {
+ spin_unlock_irqrestore(
+ &smd_xprtp->ss_reset_lock, flags);
+ pr_err("%s: %s chnl reset\n",
+ __func__, xprt->name);
return -ENETRESET;
}
- spin_unlock_irqrestore(&modem_reset_lock, flags);
+ spin_unlock_irqrestore(&smd_xprtp->ss_reset_lock,
+ flags);
- sz_written = smd_write_segment(smd_remote_xprt.channel,
- ipc_rtr_pkt->data + offset,
- (ipc_rtr_pkt->len - offset), 0);
+ sz_written = smd_write_segment(smd_xprtp->channel,
+ ipc_rtr_pkt->data + offset,
+ (ipc_rtr_pkt->len - offset), 0);
offset += sz_written;
sz_written = 0;
}
- D("%s: Wrote %d bytes\n", __func__, offset);
+ D("%s: Wrote %d bytes over %s\n",
+ __func__, offset, xprt->name);
}
if (align_sz) {
- if (smd_write_avail(smd_remote_xprt.channel) < align_sz)
- smd_enable_read_intr(smd_remote_xprt.channel);
+ if (smd_write_avail(smd_xprtp->channel) < align_sz)
+ smd_enable_read_intr(smd_xprtp->channel);
- wait_event(write_avail_wait_q,
- ((smd_write_avail(smd_remote_xprt.channel) >=
- align_sz) || modem_reset));
- smd_disable_read_intr(smd_remote_xprt.channel);
- spin_lock_irqsave(&modem_reset_lock, flags);
- if (modem_reset) {
- spin_unlock_irqrestore(&modem_reset_lock, flags);
- pr_err("%s: Modem reset\n", __func__);
+ wait_event(smd_xprtp->write_avail_wait_q,
+ ((smd_write_avail(smd_xprtp->channel) >=
+ align_sz) || smd_xprtp->ss_reset));
+ smd_disable_read_intr(smd_xprtp->channel);
+ spin_lock_irqsave(&smd_xprtp->ss_reset_lock, flags);
+ if (smd_xprtp->ss_reset) {
+ spin_unlock_irqrestore(
+ &smd_xprtp->ss_reset_lock, flags);
+ pr_err("%s: %s chnl reset\n",
+ __func__, xprt->name);
return -ENETRESET;
}
- spin_unlock_irqrestore(&modem_reset_lock, flags);
+ spin_unlock_irqrestore(&smd_xprtp->ss_reset_lock,
+ flags);
- smd_write_segment(smd_remote_xprt.channel,
+ smd_write_segment(smd_xprtp->channel,
&align_data, align_sz, 0);
- D("%s: Wrote %d align bytes\n", __func__, align_sz);
+ D("%s: Wrote %d align bytes over %s\n",
+ __func__, align_sz, xprt->name);
}
- if (!smd_write_end(smd_remote_xprt.channel))
+ if (!smd_write_end(smd_xprtp->channel))
D("%s: Finished writing\n", __func__);
return len;
}
-static int msm_ipc_router_smd_remote_close(void)
+static int msm_ipc_router_smd_remote_close(struct msm_ipc_router_xprt *xprt)
{
- smsm_change_state(SMSM_APPS_STATE, SMSM_RPCINIT, 0);
- return smd_close(smd_remote_xprt.channel);
+ struct msm_ipc_router_smd_xprt *smd_xprtp =
+ container_of(xprt, struct msm_ipc_router_smd_xprt, xprt);
+
+ return smd_close(smd_xprtp->channel);
}
static void smd_xprt_read_data(struct work_struct *work)
@@ -170,90 +211,97 @@
struct sk_buff *ipc_rtr_pkt;
void *data;
unsigned long flags;
+ struct delayed_work *rwork = to_delayed_work(work);
+ struct msm_ipc_router_smd_xprt *smd_xprtp =
+ container_of(rwork, struct msm_ipc_router_smd_xprt, read_work);
- spin_lock_irqsave(&modem_reset_lock, flags);
- if (modem_reset) {
- spin_unlock_irqrestore(&modem_reset_lock, flags);
- release_pkt(in_pkt);
- is_partial_in_pkt = 0;
- pr_err("%s: Modem reset\n", __func__);
+ spin_lock_irqsave(&smd_xprtp->ss_reset_lock, flags);
+ if (smd_xprtp->ss_reset) {
+ spin_unlock_irqrestore(&smd_xprtp->ss_reset_lock, flags);
+ if (smd_xprtp->in_pkt)
+ release_pkt(smd_xprtp->in_pkt);
+ smd_xprtp->is_partial_in_pkt = 0;
+ pr_err("%s: %s channel reset\n",
+ __func__, smd_xprtp->xprt.name);
return;
}
- spin_unlock_irqrestore(&modem_reset_lock, flags);
+ spin_unlock_irqrestore(&smd_xprtp->ss_reset_lock, flags);
D("%s pkt_size: %d, read_avail: %d\n", __func__,
- smd_cur_packet_size(smd_remote_xprt.channel),
- smd_read_avail(smd_remote_xprt.channel));
- while ((pkt_size = smd_cur_packet_size(smd_remote_xprt.channel)) &&
- smd_read_avail(smd_remote_xprt.channel)) {
- if (!is_partial_in_pkt) {
- in_pkt = kzalloc(sizeof(struct rr_packet), GFP_KERNEL);
- if (!in_pkt) {
+ smd_cur_packet_size(smd_xprtp->channel),
+ smd_read_avail(smd_xprtp->channel));
+ while ((pkt_size = smd_cur_packet_size(smd_xprtp->channel)) &&
+ smd_read_avail(smd_xprtp->channel)) {
+ if (!smd_xprtp->is_partial_in_pkt) {
+ smd_xprtp->in_pkt = kzalloc(sizeof(struct rr_packet),
+ GFP_KERNEL);
+ if (!smd_xprtp->in_pkt) {
pr_err("%s: Couldn't alloc rr_packet\n",
__func__);
return;
}
- in_pkt->pkt_fragment_q = kmalloc(
- sizeof(struct sk_buff_head),
- GFP_KERNEL);
- if (!in_pkt->pkt_fragment_q) {
+ smd_xprtp->in_pkt->pkt_fragment_q =
+ kmalloc(sizeof(struct sk_buff_head),
+ GFP_KERNEL);
+ if (!smd_xprtp->in_pkt->pkt_fragment_q) {
pr_err("%s: Couldn't alloc pkt_fragment_q\n",
__func__);
- kfree(in_pkt);
+ kfree(smd_xprtp->in_pkt);
return;
}
- skb_queue_head_init(in_pkt->pkt_fragment_q);
- is_partial_in_pkt = 1;
+ skb_queue_head_init(smd_xprtp->in_pkt->pkt_fragment_q);
+ smd_xprtp->is_partial_in_pkt = 1;
D("%s: Allocated rr_packet\n", __func__);
}
if (((pkt_size >= MIN_FRAG_SZ) &&
- (smd_read_avail(smd_remote_xprt.channel) < MIN_FRAG_SZ)) ||
+ (smd_read_avail(smd_xprtp->channel) < MIN_FRAG_SZ)) ||
((pkt_size < MIN_FRAG_SZ) &&
- (smd_read_avail(smd_remote_xprt.channel) < pkt_size)))
+ (smd_read_avail(smd_xprtp->channel) < pkt_size)))
return;
- sz = smd_read_avail(smd_remote_xprt.channel);
+ sz = smd_read_avail(smd_xprtp->channel);
do {
ipc_rtr_pkt = alloc_skb(sz, GFP_KERNEL);
if (!ipc_rtr_pkt) {
if (sz <= (PAGE_SIZE/2)) {
- queue_delayed_work(smd_xprt_workqueue,
- &work_read_data,
- msecs_to_jiffies(100));
+ queue_delayed_work(
+ smd_xprtp->smd_xprt_wq,
+ &smd_xprtp->read_work,
+ msecs_to_jiffies(100));
return;
}
sz = sz / 2;
}
} while (!ipc_rtr_pkt);
- D("%s: Allocated the sk_buff of size %d\n",
- __func__, sz);
+ D("%s: Allocated the sk_buff of size %d\n", __func__, sz);
data = skb_put(ipc_rtr_pkt, sz);
- sz_read = smd_read(smd_remote_xprt.channel, data, sz);
+ sz_read = smd_read(smd_xprtp->channel, data, sz);
if (sz_read != sz) {
- pr_err("%s: Couldn't read completely\n", __func__);
+ pr_err("%s: Couldn't read %s completely\n",
+ __func__, smd_xprtp->xprt.name);
kfree_skb(ipc_rtr_pkt);
- release_pkt(in_pkt);
- is_partial_in_pkt = 0;
+ release_pkt(smd_xprtp->in_pkt);
+ smd_xprtp->is_partial_in_pkt = 0;
return;
}
- skb_queue_tail(in_pkt->pkt_fragment_q, ipc_rtr_pkt);
- in_pkt->length += sz_read;
+ skb_queue_tail(smd_xprtp->in_pkt->pkt_fragment_q, ipc_rtr_pkt);
+ smd_xprtp->in_pkt->length += sz_read;
if (sz_read != pkt_size)
- is_partial_in_pkt = 1;
+ smd_xprtp->is_partial_in_pkt = 1;
else
- is_partial_in_pkt = 0;
+ smd_xprtp->is_partial_in_pkt = 0;
- if (!is_partial_in_pkt) {
+ if (!smd_xprtp->is_partial_in_pkt) {
D("%s: Packet size read %d\n",
- __func__, in_pkt->length);
- msm_ipc_router_xprt_notify(&smd_remote_xprt.xprt,
- IPC_ROUTER_XPRT_EVENT_DATA,
- (void *)in_pkt);
- release_pkt(in_pkt);
- in_pkt = NULL;
+ __func__, smd_xprtp->in_pkt->length);
+ msm_ipc_router_xprt_notify(&smd_xprtp->xprt,
+ IPC_ROUTER_XPRT_EVENT_DATA,
+ (void *)smd_xprtp->in_pkt);
+ release_pkt(smd_xprtp->in_pkt);
+ smd_xprtp->in_pkt = NULL;
}
}
}
@@ -265,7 +313,8 @@
msm_ipc_router_xprt_notify(xprt_work->xprt,
IPC_ROUTER_XPRT_EVENT_OPEN, NULL);
- D("%s: Notified IPC Router of OPEN Event\n", __func__);
+ D("%s: Notified IPC Router of %s OPEN\n",
+ __func__, xprt_work->xprt->name);
kfree(xprt_work);
}
@@ -276,28 +325,34 @@
msm_ipc_router_xprt_notify(xprt_work->xprt,
IPC_ROUTER_XPRT_EVENT_CLOSE, NULL);
- D("%s: Notified IPC Router of CLOSE Event\n", __func__);
+ D("%s: Notified IPC Router of %s CLOSE\n",
+ __func__, xprt_work->xprt->name);
kfree(xprt_work);
}
static void msm_ipc_router_smd_remote_notify(void *_dev, unsigned event)
{
unsigned long flags;
+ struct msm_ipc_router_smd_xprt *smd_xprtp;
struct msm_ipc_router_smd_xprt_work *xprt_work;
+ smd_xprtp = (struct msm_ipc_router_smd_xprt *)_dev;
+ if (!smd_xprtp)
+ return;
+
switch (event) {
case SMD_EVENT_DATA:
- if (smd_read_avail(smd_remote_xprt.channel))
- queue_delayed_work(smd_xprt_workqueue,
- &work_read_data, 0);
- if (smd_write_avail(smd_remote_xprt.channel))
- wake_up(&write_avail_wait_q);
+ if (smd_read_avail(smd_xprtp->channel))
+ queue_delayed_work(smd_xprtp->smd_xprt_wq,
+ &smd_xprtp->read_work, 0);
+ if (smd_write_avail(smd_xprtp->channel))
+ wake_up(&smd_xprtp->write_avail_wait_q);
break;
case SMD_EVENT_OPEN:
- spin_lock_irqsave(&modem_reset_lock, flags);
- modem_reset = 0;
- spin_unlock_irqrestore(&modem_reset_lock, flags);
+ spin_lock_irqsave(&smd_xprtp->ss_reset_lock, flags);
+ smd_xprtp->ss_reset = 0;
+ spin_unlock_irqrestore(&smd_xprtp->ss_reset_lock, flags);
xprt_work = kmalloc(sizeof(struct msm_ipc_router_smd_xprt_work),
GFP_ATOMIC);
if (!xprt_work) {
@@ -305,16 +360,16 @@
__func__, event);
return;
}
- xprt_work->xprt = &smd_remote_xprt.xprt;
+ xprt_work->xprt = &smd_xprtp->xprt;
INIT_WORK(&xprt_work->work, smd_xprt_open_event);
- queue_work(smd_xprt_workqueue, &xprt_work->work);
+ queue_work(smd_xprtp->smd_xprt_wq, &xprt_work->work);
break;
case SMD_EVENT_CLOSE:
- spin_lock_irqsave(&modem_reset_lock, flags);
- modem_reset = 1;
- spin_unlock_irqrestore(&modem_reset_lock, flags);
- wake_up(&write_avail_wait_q);
+ spin_lock_irqsave(&smd_xprtp->ss_reset_lock, flags);
+ smd_xprtp->ss_reset = 1;
+ spin_unlock_irqrestore(&smd_xprtp->ss_reset_lock, flags);
+ wake_up(&smd_xprtp->write_avail_wait_q);
xprt_work = kmalloc(sizeof(struct msm_ipc_router_smd_xprt_work),
GFP_ATOMIC);
if (!xprt_work) {
@@ -322,9 +377,9 @@
__func__, event);
return;
}
- xprt_work->xprt = &smd_remote_xprt.xprt;
+ xprt_work->xprt = &smd_xprtp->xprt;
INIT_WORK(&xprt_work->work, smd_xprt_close_event);
- queue_work(smd_xprt_workqueue, &xprt_work->work);
+ queue_work(smd_xprtp->smd_xprt_wq, &xprt_work->work);
break;
}
}
@@ -332,50 +387,93 @@
static int msm_ipc_router_smd_remote_probe(struct platform_device *pdev)
{
int rc;
+ int id; /*Index into the smd_xprt_cfg table*/
- smd_xprt_workqueue = create_singlethread_workqueue("smd_xprt");
- if (!smd_xprt_workqueue)
- return -ENOMEM;
+ id = find_smd_xprt_cfg(pdev->name);
+ if (id < 0) {
+ pr_err("%s: called for unknown ch %s\n",
+ __func__, pdev->name);
+ return id;
+ }
- smd_remote_xprt.xprt.name = "msm_ipc_router_smd_xprt";
- smd_remote_xprt.xprt.link_id = 1;
- smd_remote_xprt.xprt.read_avail = NULL;
- smd_remote_xprt.xprt.read = NULL;
- smd_remote_xprt.xprt.write_avail =
+ smd_remote_xprt[id].smd_xprt_wq =
+ create_singlethread_workqueue(pdev->name);
+ if (!smd_remote_xprt[id].smd_xprt_wq) {
+ pr_err("%s: WQ creation failed for %s\n",
+ __func__, pdev->name);
+ return -EFAULT;
+ }
+
+ smd_remote_xprt[id].xprt.name = smd_xprt_cfg[id].xprt_name;
+ smd_remote_xprt[id].xprt.link_id = smd_xprt_cfg[id].link_id;
+ smd_remote_xprt[id].xprt.read_avail = NULL;
+ smd_remote_xprt[id].xprt.read = NULL;
+ smd_remote_xprt[id].xprt.write_avail =
msm_ipc_router_smd_remote_write_avail;
- smd_remote_xprt.xprt.write = msm_ipc_router_smd_remote_write;
- smd_remote_xprt.xprt.close = msm_ipc_router_smd_remote_close;
- smd_remote_xprt.xprt.priv = NULL;
+ smd_remote_xprt[id].xprt.write = msm_ipc_router_smd_remote_write;
+ smd_remote_xprt[id].xprt.close = msm_ipc_router_smd_remote_close;
+ smd_remote_xprt[id].xprt.priv = NULL;
- init_waitqueue_head(&write_avail_wait_q);
+ init_waitqueue_head(&smd_remote_xprt[id].write_avail_wait_q);
+ smd_remote_xprt[id].in_pkt = NULL;
+ smd_remote_xprt[id].is_partial_in_pkt = 0;
+ INIT_DELAYED_WORK(&smd_remote_xprt[id].read_work, smd_xprt_read_data);
+ spin_lock_init(&smd_remote_xprt[id].ss_reset_lock);
+ smd_remote_xprt[id].ss_reset = 0;
- rc = smd_open("RPCRPY_CNTL", &smd_remote_xprt.channel, NULL,
- msm_ipc_router_smd_remote_notify);
+ rc = smd_named_open_on_edge(smd_xprt_cfg[id].ch_name,
+ smd_xprt_cfg[id].edge,
+ &smd_remote_xprt[id].channel,
+ &smd_remote_xprt[id],
+ msm_ipc_router_smd_remote_notify);
if (rc < 0) {
- destroy_workqueue(smd_xprt_workqueue);
+ pr_err("%s: Channel open failed for %s\n",
+ __func__, smd_xprt_cfg[id].ch_name);
+ destroy_workqueue(smd_remote_xprt[id].smd_xprt_wq);
return rc;
}
- smd_disable_read_intr(smd_remote_xprt.channel);
+ smd_disable_read_intr(smd_remote_xprt[id].channel);
smsm_change_state(SMSM_APPS_STATE, 0, SMSM_RPCINIT);
return 0;
}
-static struct platform_driver msm_ipc_router_smd_remote_driver = {
- .probe = msm_ipc_router_smd_remote_probe,
- .driver = {
- .name = "RPCRPY_CNTL",
- .owner = THIS_MODULE,
+static struct platform_driver msm_ipc_router_smd_remote_driver[] = {
+ {
+ .probe = msm_ipc_router_smd_remote_probe,
+ .driver = {
+ .name = "RPCRPY_CNTL",
+ .owner = THIS_MODULE,
+ },
+ },
+ {
+ .probe = msm_ipc_router_smd_remote_probe,
+ .driver = {
+ .name = "IPCRTR",
+ .owner = THIS_MODULE,
+ },
},
};
static int __init msm_ipc_router_smd_init(void)
{
- return platform_driver_register(&msm_ipc_router_smd_remote_driver);
+ int i, ret, rc = 0;
+ BUG_ON(ARRAY_SIZE(msm_ipc_router_smd_remote_driver) != NUM_SMD_XPRTS);
+ BUG_ON(ARRAY_SIZE(smd_xprt_cfg) != NUM_SMD_XPRTS);
+ for (i = 0; i < NUM_SMD_XPRTS; i++) {
+ ret = platform_driver_register(
+ &msm_ipc_router_smd_remote_driver[i]);
+ if (ret) {
+ pr_err("%s: Failed to register platform driver for"
+ " xprt%d. Continuing...\n", __func__, i);
+ rc = ret;
+ }
+ }
+ return rc;
}
module_init(msm_ipc_router_smd_init);
-MODULE_DESCRIPTION("RPC Router SMD XPRT");
+MODULE_DESCRIPTION("IPC Router SMD XPRT");
MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/mach-msm/jtag.c b/arch/arm/mach-msm/jtag.c
index b75fb38..a2ec89b 100644
--- a/arch/arm/mach-msm/jtag.c
+++ b/arch/arm/mach-msm/jtag.c
@@ -33,6 +33,9 @@
#define CPMR_ETMCLKEN (0x8)
+uint32_t msm_jtag_save_cntr[NR_CPUS];
+uint32_t msm_jtag_restore_cntr[NR_CPUS];
+
struct dbg_ctx {
uint8_t arch;
bool arch_supported;
@@ -1015,6 +1018,10 @@
cpu = raw_smp_processor_id();
+ msm_jtag_save_cntr[cpu]++;
+ /* ensure counter is updated before moving forward */
+ mb();
+
if (dbg.arch_supported)
dbg_save_state(cpu);
if (etm.arch_supported)
@@ -1027,6 +1034,10 @@
cpu = raw_smp_processor_id();
+ msm_jtag_restore_cntr[cpu]++;
+ /* ensure counter is updated before moving forward */
+ mb();
+
if (dbg.arch_supported)
dbg_restore_state(cpu);
if (etm.arch_supported)
diff --git a/arch/arm/mach-msm/mdm2.c b/arch/arm/mach-msm/mdm2.c
index 34bc415..7e538b4 100644
--- a/arch/arm/mach-msm/mdm2.c
+++ b/arch/arm/mach-msm/mdm2.c
@@ -48,7 +48,7 @@
static int mdm_debug_on;
static int first_power_on = 1;
-static int hsic_peripheral_status = 1;
+static int hsic_peripheral_status;
static DEFINE_MUTEX(hsic_status_lock);
static void mdm_peripheral_connect(struct mdm_modem_drv *mdm_drv)
diff --git a/arch/arm/mach-msm/mdm_common.c b/arch/arm/mach-msm/mdm_common.c
index 7445a61..04c29cc 100644
--- a/arch/arm/mach-msm/mdm_common.c
+++ b/arch/arm/mach-msm/mdm_common.c
@@ -242,6 +242,8 @@
static int mdm_subsys_powerup(const struct subsys_data *crashed_subsys)
{
+ gpio_direction_output(mdm_drv->ap2mdm_errfatal_gpio, 0);
+ gpio_direction_output(mdm_drv->ap2mdm_status_gpio, 1);
mdm_drv->ops->power_on_mdm_cb(mdm_drv);
mdm_drv->boot_type = CHARM_NORMAL_BOOT;
complete(&mdm_needs_reload);
diff --git a/arch/arm/mach-msm/mpm-8625.c b/arch/arm/mach-msm/mpm-8625.c
new file mode 100644
index 0000000..63de944
--- /dev/null
+++ b/arch/arm/mach-msm/mpm-8625.c
@@ -0,0 +1,454 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/bitops.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/spinlock.h>
+
+#include <asm/hardware/gic.h>
+#include <mach/msm_smsm.h>
+
+#define NUM_REGS_ENABLE 2
+/* (NR_MSM_IRQS/32) 96 max irqs supported */
+#define NUM_REGS_DISABLE 3
+#define GIC_IRQ_MASK(irq) BIT(irq % 32)
+#define GIC_IRQ_INDEX(irq) (irq / 32)
+
+#ifdef CONFIG_PM
+u32 saved_spi_enable[DIV_ROUND_UP(256, 32)];
+u32 saved_spi_conf[DIV_ROUND_UP(256, 16)];
+u32 saved_spi_target[DIV_ROUND_UP(256, 4)];
+u32 __percpu *saved_ppi_enable;
+u32 __percpu *saved_ppi_conf;
+#endif
+
+enum {
+ IRQ_DEBUG_SLEEP_INT_TRIGGER = BIT(0),
+ IRQ_DEBUG_SLEEP_INT = BIT(1),
+ IRQ_DEBUG_SLEEP_ABORT = BIT(2),
+ IRQ_DEBUG_SLEEP = BIT(3),
+ IRQ_DEBUG_SLEEP_REQUEST = BIT(4)
+};
+
+static int msm_gic_irq_debug_mask;
+module_param_named(debug_mask, msm_gic_irq_debug_mask, int,
+ S_IRUGO | S_IWUSR | S_IWGRP);
+
+static uint32_t msm_gic_irq_smsm_wake_enable[NUM_REGS_ENABLE];
+static uint32_t msm_gic_irq_idle_disable[NUM_REGS_DISABLE];
+
+static DEFINE_RAW_SPINLOCK(gic_controller_lock);
+static void __iomem *dist_base, *cpu_base;
+static unsigned int max_irqs;
+
+ /*
+ * Some of the interrupts which will not be considered as wake capable
+ * should be marked as FAKE.
+ * Interrupts: GPIO, Timers etc..
+ */
+#define SMSM_FAKE_IRQ (0xff)
+
+ /* msm_gic_irq_to_smsm: IRQ's those will be monitored by Modem */
+static uint8_t msm_gic_irq_to_smsm[NR_IRQS] = {
+ [MSM8625_INT_USB_OTG] = 4,
+ [MSM8625_INT_PWB_I2C] = 5,
+ [MSM8625_INT_SDC1_0] = 6,
+ [MSM8625_INT_SDC1_1] = 7,
+ [MSM8625_INT_SDC2_0] = 8,
+ [MSM8625_INT_SDC2_1] = 9,
+ [MSM8625_INT_ADSP_A9_A11] = 10,
+ [MSM8625_INT_UART1] = 11,
+ [MSM8625_INT_UART2] = 12,
+ [MSM8625_INT_UART3] = 13,
+ [MSM8625_INT_UART1_RX] = 14,
+ [MSM8625_INT_UART2_RX] = 15,
+ [MSM8625_INT_UART3_RX] = 16,
+ [MSM8625_INT_UART1DM_IRQ] = 17,
+ [MSM8625_INT_UART1DM_RX] = 18,
+ [MSM8625_INT_KEYSENSE] = 19,
+ [MSM8625_INT_AD_HSSD] = 20,
+ [MSM8625_INT_NAND_WR_ER_DONE] = 21,
+ [MSM8625_INT_NAND_OP_DONE] = 22,
+ [MSM8625_INT_TCHSCRN1] = 23,
+ [MSM8625_INT_TCHSCRN2] = 24,
+ [MSM8625_INT_TCHSCRN_SSBI] = 25,
+ [MSM8625_INT_USB_HS] = 26,
+ [MSM8625_INT_UART2DM_RX] = 27,
+ [MSM8625_INT_UART2DM_IRQ] = 28,
+ [MSM8625_INT_SDC4_1] = 29,
+ [MSM8625_INT_SDC4_0] = 30,
+ [MSM8625_INT_SDC3_1] = 31,
+ [MSM8625_INT_SDC3_0] = 32,
+
+ /* fake wakeup interrupts */
+ [MSM8625_INT_GPIO_GROUP1] = SMSM_FAKE_IRQ,
+ [MSM8625_INT_GPIO_GROUP2] = SMSM_FAKE_IRQ,
+ [MSM8625_INT_A9_M2A_0] = SMSM_FAKE_IRQ,
+ [MSM8625_INT_A9_M2A_1] = SMSM_FAKE_IRQ,
+ [MSM8625_INT_A9_M2A_5] = SMSM_FAKE_IRQ,
+ [MSM8625_INT_GP_TIMER_EXP] = SMSM_FAKE_IRQ,
+ [MSM8625_INT_DEBUG_TIMER_EXP] = SMSM_FAKE_IRQ,
+ [MSM8625_INT_ADSP_A11] = SMSM_FAKE_IRQ,
+};
+
+static void msm_gic_mask_irq(struct irq_data *d)
+{
+ unsigned int index = GIC_IRQ_INDEX(d->irq);
+ uint32_t mask;
+ int smsm_irq = msm_gic_irq_to_smsm[d->irq];
+
+ mask = GIC_IRQ_MASK(d->irq);
+
+ if (smsm_irq == 0) {
+ msm_gic_irq_idle_disable[index] &= ~mask;
+ } else {
+ mask = GIC_IRQ_MASK(smsm_irq - 1);
+ msm_gic_irq_smsm_wake_enable[0] &= ~mask;
+ }
+}
+
+static void msm_gic_unmask_irq(struct irq_data *d)
+{
+ unsigned int index = GIC_IRQ_INDEX(d->irq);
+ uint32_t mask;
+ int smsm_irq = msm_gic_irq_to_smsm[d->irq];
+
+ mask = GIC_IRQ_MASK(d->irq);
+
+ if (smsm_irq == 0) {
+ msm_gic_irq_idle_disable[index] |= mask;
+ } else {
+ mask = GIC_IRQ_MASK(smsm_irq - 1);
+ msm_gic_irq_smsm_wake_enable[0] |= mask;
+ }
+}
+
+static int msm_gic_set_irq_wake(struct irq_data *d, unsigned int on)
+{
+ uint32_t mask;
+ int smsm_irq = msm_gic_irq_to_smsm[d->irq];
+
+ if (smsm_irq == 0) {
+ pr_err("bad wake up irq %d\n", d->irq);
+ return -EINVAL;
+ }
+
+ if (smsm_irq == SMSM_FAKE_IRQ)
+ return 0;
+
+ mask = GIC_IRQ_MASK(smsm_irq - 1);
+ if (on)
+ msm_gic_irq_smsm_wake_enable[1] |= mask;
+ else
+ msm_gic_irq_smsm_wake_enable[1] &= ~mask;
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static void __init msm_gic_pm_init(void)
+{
+ saved_ppi_enable = __alloc_percpu(DIV_ROUND_UP(32, 32) * 4,
+ sizeof(u32));
+ BUG_ON(!saved_ppi_enable);
+
+ saved_ppi_conf = __alloc_percpu(DIV_ROUND_UP(32, 16) * 4,
+ sizeof(u32));
+ BUG_ON(!saved_ppi_conf);
+}
+#endif
+
+void msm_gic_irq_extn_init(void __iomem *db, void __iomem *cb)
+{
+ dist_base = db;
+ cpu_base = cb;
+ max_irqs = readl_relaxed(dist_base + GIC_DIST_CTR) & 0x11f;
+ max_irqs = (max_irqs + 1) * 32;
+
+ gic_arch_extn.irq_mask = msm_gic_mask_irq;
+ gic_arch_extn.irq_unmask = msm_gic_unmask_irq;
+ gic_arch_extn.irq_disable = msm_gic_mask_irq;
+ gic_arch_extn.irq_set_wake = msm_gic_set_irq_wake;
+
+#ifdef CONFIG_PM
+ msm_gic_pm_init();
+#endif
+}
+
+/* GIC APIs */
+
+ /*
+ * Save the GIC cpu and distributor context before PC and
+ * restor it back after coming out of PC.
+ */
+static void msm_gic_save(void)
+{
+ int i;
+ u32 *ptr;
+
+ /* Save the Per CPU PPI's */
+ ptr = __this_cpu_ptr(saved_ppi_enable);
+ /* 0 - 31 the SGI and PPI */
+ ptr[0] = readl_relaxed(dist_base + GIC_DIST_ENABLE_SET);
+
+ ptr = __this_cpu_ptr(saved_ppi_conf);
+ for (i = 0; i < 2; i++)
+ ptr[i] = readl_relaxed(dist_base + GIC_DIST_CONFIG + i * 4);
+
+ /* Save the SPIs */
+ for (i = 0; (i * 16) < max_irqs; i++)
+ saved_spi_conf[i] =
+ readl_relaxed(dist_base + GIC_DIST_CONFIG + i * 4);
+
+ for (i = 0; (i * 4) < max_irqs; i++)
+ saved_spi_target[i] =
+ readl_relaxed(dist_base + GIC_DIST_TARGET + i * 4);
+
+ for (i = 0; (i * 32) < max_irqs; i++)
+ saved_spi_enable[i] =
+ readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4);
+}
+
+static void msm_gic_restore(void)
+{
+ int i;
+ u32 *ptr;
+
+ /* restore CPU Interface */
+ /* Per CPU SGIs and PPIs */
+ ptr = __this_cpu_ptr(saved_ppi_enable);
+ writel_relaxed(ptr[0], dist_base + GIC_DIST_ENABLE_SET);
+
+ ptr = __this_cpu_ptr(saved_ppi_conf);
+ for (i = 0; i < 2; i++)
+ writel_relaxed(ptr[i], dist_base + GIC_DIST_CONFIG + i * 4);
+
+ for (i = 0; (i * 4) < max_irqs; i++)
+ writel_relaxed(0xa0a0a0a0, dist_base + GIC_DIST_PRI + i * 4);
+
+ writel_relaxed(0xf0, cpu_base + GIC_CPU_PRIMASK);
+ writel_relaxed(1, cpu_base + GIC_CPU_CTRL);
+
+ /* restore Distributor */
+ writel_relaxed(0, dist_base + GIC_DIST_CTRL);
+
+ for (i = 0; (i * 16) < max_irqs; i++)
+ writel_relaxed(saved_spi_conf[i],
+ dist_base + GIC_DIST_CONFIG + i * 4);
+
+ for (i = 0; (i * 4) < max_irqs; i++)
+ writel_relaxed(0xa0a0a0a0,
+ dist_base + GIC_DIST_PRI + i * 4);
+
+ for (i = 0; (i * 4) < max_irqs; i++)
+ writel_relaxed(saved_spi_target[i],
+ dist_base + GIC_DIST_TARGET + i * 4);
+
+ for (i = 0; (i * 32) < max_irqs; i++)
+ writel_relaxed(saved_spi_enable[i],
+ dist_base + GIC_DIST_ENABLE_SET + i * 4);
+
+ writel_relaxed(1, dist_base + GIC_DIST_CTRL);
+
+ mb();
+}
+
+/* Power APIs */
+
+ /*
+ * Check for any interrupts which are enabled are pending
+ * in the pending set or not.
+ * Return :
+ * 0 : No pending interrupts
+ * 1 : Pending interrupts other than A9_M2A_5
+ */
+unsigned int msm_gic_spi_ppi_pending(void)
+{
+ unsigned int i, bit = 0;
+ unsigned int pending_enb = 0, pending = 0;
+ unsigned long value = 0;
+
+ raw_spin_lock(&gic_controller_lock);
+ /*
+ * PPI and SGI to be included.
+ * MSM8625_INT_A9_M2A_5 needs to be ignored, as A9_M2A_5
+ * requesting sleep triggers it
+ */
+ for (i = 0; (i * 32) < max_irqs; i++) {
+ pending = readl_relaxed(dist_base +
+ GIC_DIST_PENDING_SET + i * 4);
+ pending_enb = readl_relaxed(dist_base +
+ GIC_DIST_ENABLE_SET + i * 4);
+ value = pending & pending_enb;
+
+ if (value) {
+ for (bit = 0; bit < 32; bit++) {
+ bit = find_next_bit(&value, 32, bit);
+ if ((bit + 32 * i) != MSM8625_INT_A9_M2A_5) {
+ raw_spin_unlock(&gic_controller_lock);
+ return 1;
+ }
+ }
+ }
+ }
+ raw_spin_unlock(&gic_controller_lock);
+
+ return 0;
+}
+
+ /*
+ * Iterate over the disable list
+ */
+
+int msm_gic_irq_idle_sleep_allowed(void)
+{
+ uint32_t i, disable = 0;
+
+ for (i = 0; i < NUM_REGS_DISABLE; i++)
+ disable |= msm_gic_irq_idle_disable[i];
+
+ return !disable;
+}
+
+ /*
+ * Prepare interrupt subsystem for entering sleep -- phase 1
+ * If modem_wake is true, return currently enabled interrupt
+ * mask in *irq_mask
+ */
+void msm_gic_irq_enter_sleep1(bool modem_wake, int from_idle, uint32_t
+ *irq_mask)
+{
+ if (modem_wake) {
+ *irq_mask = msm_gic_irq_smsm_wake_enable[!from_idle];
+ if (msm_gic_irq_debug_mask & IRQ_DEBUG_SLEEP)
+ pr_info("%s irq_mask %x\n", __func__, *irq_mask);
+ }
+}
+
+ /*
+ * Prepare interrupt susbsytem for entering sleep -- phase 2
+ * Detect any pending interrupts and configure interrupt hardware.
+ * Return value:
+ * -EAGAIN: there are pending interrupt(s); interrupt configuration is not
+ * changed
+ * 0: Success
+ */
+int msm_gic_irq_enter_sleep2(bool modem_wake, int from_idle)
+{
+
+ if (from_idle && !modem_wake)
+ return 0;
+
+ /* edge triggered interrupt may get lost if this mode is used */
+ WARN_ON_ONCE(!modem_wake && !from_idle);
+
+ if (msm_gic_irq_debug_mask & IRQ_DEBUG_SLEEP)
+ pr_info("%s interrupts pending\n", __func__);
+
+ /* check the pending interrupts */
+ if (msm_gic_spi_ppi_pending()) {
+ if (msm_gic_irq_debug_mask & IRQ_DEBUG_SLEEP_ABORT)
+ pr_info("%s aborted....\n", __func__);
+ return -EAGAIN;
+ }
+
+ if (modem_wake) {
+ irq_set_irq_type(MSM8625_INT_A9_M2A_6, IRQF_TRIGGER_RISING);
+ /* save the contents of GIC CPU interface and Distributor */
+ msm_gic_save();
+ enable_irq(MSM8625_INT_A9_M2A_6);
+ pr_info("%s Good to go for sleep now\n", __func__);
+ }
+
+ return 0;
+}
+
+ /*
+ * Restore interrupt subsystem from sleep -- phase 1
+ * Configure the interrupt hardware.
+ */
+void msm_gic_irq_exit_sleep1(uint32_t irq_mask, uint32_t wakeup_reason,
+ uint32_t pending_irqs)
+{
+ /* Restore GIC contents, which were saved */
+ msm_gic_restore();
+
+ /* Disable A9_M2A_6 */
+ disable_irq(MSM8625_INT_A9_M2A_6);
+
+ if (msm_gic_irq_debug_mask & IRQ_DEBUG_SLEEP)
+ pr_info("%s %x %x %x now\n", __func__, irq_mask,
+ pending_irqs, wakeup_reason);
+}
+
+ /*
+ * Restore interrupt subsystem from sleep -- phase 2
+ * Poke the specified pending interrupts into interrupt hardware.
+ */
+void msm_gic_irq_exit_sleep2(uint32_t irq_mask, uint32_t wakeup_reason,
+ uint32_t pending)
+{
+ int i, smsm_irq, smsm_mask;
+ struct irq_desc *desc;
+
+ if (msm_gic_irq_debug_mask & IRQ_DEBUG_SLEEP)
+ pr_info("%s %x %x %x now\n", __func__, irq_mask,
+ pending, wakeup_reason);
+
+ for (i = 0; pending && i < ARRAY_SIZE(msm_gic_irq_to_smsm); i++) {
+ smsm_irq = msm_gic_irq_to_smsm[i];
+
+ if (smsm_irq == 0)
+ continue;
+
+ smsm_mask = BIT(smsm_irq - 1);
+ if (!(pending & smsm_mask))
+ continue;
+
+ pending &= ~smsm_mask;
+
+ if (msm_gic_irq_debug_mask & IRQ_DEBUG_SLEEP_INT)
+ pr_info("%s, irq %d, still pending %x now\n",
+ __func__, i, pending);
+ /* Peding IRQ */
+ desc = i ? irq_to_desc(i) : NULL;
+
+ /* Check if the pending */
+ if (desc && !irqd_is_level_type(&desc->irq_data)) {
+ /* Mark the IRQ as pending, if not Level */
+ irq_set_pending(i);
+ check_irq_resend(desc, i);
+ }
+ }
+}
+
+ /*
+ * Restore interrupt subsystem from sleep -- phase 3
+ * Print debug information
+ */
+void msm_gic_irq_exit_sleep3(uint32_t irq_mask, uint32_t wakeup_reason,
+ uint32_t pending_irqs)
+{
+ if (msm_gic_irq_debug_mask & IRQ_DEBUG_SLEEP)
+ pr_info("%s, irq_mask %x pending_irqs %x, wakeup_reason %x,"
+ "state %x now\n", __func__, irq_mask,
+ pending_irqs, wakeup_reason,
+ smsm_get_state(SMSM_MODEM_STATE));
+}
diff --git a/arch/arm/mach-msm/mpm-8625.h b/arch/arm/mach-msm/mpm-8625.h
new file mode 100644
index 0000000..4ada9e2
--- /dev/null
+++ b/arch/arm/mach-msm/mpm-8625.h
@@ -0,0 +1,30 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _ARCH_ARM_MACH_MSM_MPM_8625_H_
+#define _ARCH_ARM_MACH_MSM_MPM_8625_H_
+
+void msm_gic_irq_extn_init(void __iomem *, void __iomem *);
+
+unsigned int msm_gic_spi_ppi_pending(void);
+int msm_gic_irq_idle_sleep_allowed(void);
+void msm_gic_irq_enter_sleep1(bool modem_wake, int from_idle, uint32_t
+ *irq_mask);
+int msm_gic_irq_enter_sleep2(bool modem_wake, int from_idle);
+void msm_gic_irq_exit_sleep1(uint32_t irq_mask, uint32_t wakeup_reason,
+ uint32_t pending_irqs);
+void msm_gic_irq_exit_sleep2(uint32_t irq_mask, uint32_t wakeup_reason,
+ uint32_t pending);
+void msm_gic_irq_exit_sleep3(uint32_t irq_mask, uint32_t wakeup_reason,
+ uint32_t pending_irqs);
+#endif
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_arb.c b/arch/arm/mach-msm/msm_bus/msm_bus_arb.c
index feabe04..56aba3e 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_arb.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_arb.c
@@ -9,6 +9,9 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
+
+#define pr_fmt(fmt) "AXI: %s(): " fmt, __func__
+
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_config.c b/arch/arm/mach-msm/msm_bus/msm_bus_config.c
index 7d9d18f..28f3073 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_config.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_config.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -9,6 +9,9 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
+
+#define pr_fmt(fmt) "AXI: %s(): " fmt, __func__
+
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_core.c b/arch/arm/mach-msm/msm_bus/msm_bus_core.c
index 9fe05b7..4d73b03 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_core.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_core.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -9,6 +9,9 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
+
+#define pr_fmt(fmt) "AXI: %s(): " fmt, __func__
+
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_core.h b/arch/arm/mach-msm/msm_bus/msm_bus_core.h
index 50afa81..e35130e 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_core.h
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_core.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -20,22 +20,14 @@
#include <mach/msm_bus_board.h>
#include <mach/msm_bus.h>
-#if defined DEBUG
-
#define MSM_BUS_DBG(msg, ...) \
- printk(KERN_DEBUG "AXI: %s(): " msg, __func__, ## __VA_ARGS__)
-
-#else
-#define MSM_BUS_DBG(msg, ...) no_printk("AXI")
-#endif
-
+ pr_debug(msg, ## __VA_ARGS__)
#define MSM_BUS_ERR(msg, ...) \
- printk(KERN_ERR "AXI: %s(): " msg, __func__, ## __VA_ARGS__)
+ pr_err(msg, ## __VA_ARGS__)
#define MSM_BUS_WARN(msg, ...) \
- printk(KERN_WARNING "AXI: %s(): " msg, __func__, ## __VA_ARGS__)
+ pr_warn(msg, ## __VA_ARGS__)
#define MSM_FAB_ERR(msg, ...) \
- dev_err(&fabric->fabdev.dev, "AXI: %s(): " msg, __func__, ## \
- __VA_ARGS__)
+ dev_err(&fabric->fabdev.dev, msg, ## __VA_ARGS__)
enum msm_bus_dbg_op_type {
MSM_BUS_DBG_UNREGISTER = -2,
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_dbg.c b/arch/arm/mach-msm/msm_bus/msm_bus_dbg.c
index abd986b..e63df1b 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_dbg.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_dbg.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -10,6 +10,9 @@
* GNU General Public License for more details.
*
*/
+
+#define pr_fmt(fmt) "AXI: %s(): " fmt, __func__
+
#include <linux/kernel.h>
#include <linux/seq_file.h>
#include <linux/debugfs.h>
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_fabric.c b/arch/arm/mach-msm/msm_bus/msm_bus_fabric.c
index 3b178b5..2c69914 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_fabric.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_fabric.c
@@ -10,6 +10,8 @@
* GNU General Public License for more details.
*/
+#define pr_fmt(fmt) "AXI: %s(): " fmt, __func__
+
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/device.h>
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_rpm.c b/arch/arm/mach-msm/msm_bus/msm_bus_rpm.c
index a8dc7c8..b13037e 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_rpm.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_rpm.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,6 +11,8 @@
*
*/
+#define pr_fmt(fmt) "AXI: %s(): " fmt, __func__
+
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/device.h>
@@ -342,7 +344,7 @@
fab_pdata->nmasters) + 1);
ret = memcmp(cd1->arb, cd2->arb, n);
if (ret) {
- MSM_BUS_DBG("Commit Data arb[%d] not equal\n", i);
+ MSM_BUS_DBG("Commit Data arb[%d] not equal\n", n);
return ret;
}
diff --git a/arch/arm/mach-msm/msm_rtb.c b/arch/arm/mach-msm/msm_rtb.c
index 6e79dfe..3f56d1a 100644
--- a/arch/arm/mach-msm/msm_rtb.c
+++ b/arch/arm/mach-msm/msm_rtb.c
@@ -54,6 +54,7 @@
int nentries;
int size;
int enabled;
+ int initialized;
uint32_t filter;
int step_size;
};
@@ -66,6 +67,7 @@
struct msm_rtb_state msm_rtb = {
.filter = 1 << LOGK_LOGBUF,
+ .enabled = 1,
};
module_param_named(filter, msm_rtb.filter, uint, 0644);
@@ -73,7 +75,7 @@
int msm_rtb_event_should_log(enum logk_event_type log_type)
{
- return msm_rtb.enabled &&
+ return msm_rtb.initialized && msm_rtb.enabled &&
((1 << log_type) & msm_rtb.filter);
}
EXPORT_SYMBOL(msm_rtb_event_should_log);
@@ -217,7 +219,7 @@
#endif
- msm_rtb.enabled = 1;
+ msm_rtb.initialized = 1;
return 0;
}
diff --git a/arch/arm/mach-msm/msm_watchdog.c b/arch/arm/mach-msm/msm_watchdog.c
index 5bff832..28b5995 100644
--- a/arch/arm/mach-msm/msm_watchdog.c
+++ b/arch/arm/mach-msm/msm_watchdog.c
@@ -304,6 +304,9 @@
static void init_watchdog_work(struct work_struct *work)
{
u64 timeout = (bark_time * WDT_HZ)/1000;
+
+ configure_bark_dump();
+
__raw_writel(timeout, msm_tmr0_base + WDT0_BARK_TIME);
__raw_writel(timeout + 3*WDT_HZ, msm_tmr0_base + WDT0_BITE_TIME);
@@ -366,8 +369,6 @@
if (pdata->needs_expired_enable)
__raw_writel(0x1, MSM_CLK_CTL_BASE + 0x3820);
- configure_bark_dump();
-
delay_time = msecs_to_jiffies(pdata->pet_time);
schedule_work_on(0, &init_dogwork_struct);
return 0;
diff --git a/arch/arm/mach-msm/msm_xo.c b/arch/arm/mach-msm/msm_xo.c
index 74c64c1..52bbaeb 100644
--- a/arch/arm/mach-msm/msm_xo.c
+++ b/arch/arm/mach-msm/msm_xo.c
@@ -82,8 +82,6 @@
msm_xo_dump_xo(m, &msm_xo_sources[MSM_XO_TCXO_A1], "TCXO A1");
msm_xo_dump_xo(m, &msm_xo_sources[MSM_XO_TCXO_A2], "TCXO A2");
msm_xo_dump_xo(m, &msm_xo_sources[MSM_XO_CORE], "TCXO Core");
- msm_xo_dump_xo(m, &msm_xo_sources[MSM_XO_PXO], "PXO during sleep");
- msm_xo_dump_xo(m, &msm_xo_sources[MSM_XO_CXO], "CXO");
spin_unlock_irqrestore(&msm_xo_lock, flags);
return 0;
@@ -109,13 +107,14 @@
&msm_xo_voters_ops);
return IS_ERR(entry) ? PTR_ERR(entry) : 0;
}
-late_initcall(msm_xo_debugfs_init);
+#else
+static int __init msm_xo_debugfs_init(void) { return 0; }
#endif
static int msm_xo_update_vote(struct msm_xo *xo)
{
int ret;
- unsigned vote, prev_vote = xo->mode, ctx_set;
+ unsigned vote, prev_vote = xo->mode;
struct msm_rpm_iv_pair cmd;
if (xo->votes[MSM_XO_MODE_ON])
@@ -133,36 +132,21 @@
* command fails we'll rollback.
*/
xo->mode = vote;
-
- if (xo == &msm_xo_sources[MSM_XO_PXO]) {
- cmd.id = MSM_RPM_ID_PXO_CLK;
- cmd.value = msm_xo_sources[MSM_XO_PXO].mode ? 1 : 0;
- ret = msm_rpmrs_set_noirq(MSM_RPM_CTX_SET_SLEEP, &cmd, 1);
- } else if (xo == &msm_xo_sources[MSM_XO_CXO]) {
- cmd.id = MSM_RPM_ID_CXO_CLK;
- cmd.value = msm_xo_sources[MSM_XO_CXO].mode ? 1 : 0;
- if (cpu_is_msm9615())
- ctx_set = MSM_RPM_CTX_SET_SLEEP;
- else
- ctx_set = MSM_RPM_CTX_SET_0;
- ret = msm_rpmrs_set_noirq(ctx_set, &cmd, 1);
- } else {
- cmd.id = MSM_RPM_ID_CXO_BUFFERS;
- cmd.value = (msm_xo_sources[MSM_XO_TCXO_D0].mode << 0) |
- (msm_xo_sources[MSM_XO_TCXO_D1].mode << 8) |
- (msm_xo_sources[MSM_XO_TCXO_A0].mode << 16) |
- (msm_xo_sources[MSM_XO_TCXO_A1].mode << 24) |
- (msm_xo_sources[MSM_XO_TCXO_A2].mode << 28) |
- /*
- * 8660 RPM has XO_CORE at bit 18 and 8960 RPM has
- * XO_CORE at bit 20. Since the opposite bit is
- * reserved in both cases, just set both and be
- * done with it.
- */
- ((msm_xo_sources[MSM_XO_CORE].mode ? 1 : 0) << 20) |
- ((msm_xo_sources[MSM_XO_CORE].mode ? 1 : 0) << 18);
- ret = msm_rpm_set_noirq(MSM_RPM_CTX_SET_0, &cmd, 1);
- }
+ cmd.id = MSM_RPM_ID_CXO_BUFFERS;
+ cmd.value = (msm_xo_sources[MSM_XO_TCXO_D0].mode << 0) |
+ (msm_xo_sources[MSM_XO_TCXO_D1].mode << 8) |
+ (msm_xo_sources[MSM_XO_TCXO_A0].mode << 16) |
+ (msm_xo_sources[MSM_XO_TCXO_A1].mode << 24) |
+ (msm_xo_sources[MSM_XO_TCXO_A2].mode << 28) |
+ /*
+ * 8660 RPM has XO_CORE at bit 18 and 8960 RPM has
+ * XO_CORE at bit 20. Since the opposite bit is
+ * reserved in both cases, just set both and be
+ * done with it.
+ */
+ ((msm_xo_sources[MSM_XO_CORE].mode ? 1 : 0) << 20) |
+ ((msm_xo_sources[MSM_XO_CORE].mode ? 1 : 0) << 18);
+ ret = msm_rpm_set_noirq(MSM_RPM_CTX_SET_0, &cmd, 1);
if (ret)
xo->mode = prev_vote;
@@ -237,13 +221,6 @@
unsigned long flags;
struct msm_xo_voter *xo_voter;
- /*
- * TODO: Remove early return for 8064 once RPM XO voting support
- * is available.
- */
- if (cpu_is_apq8064())
- return NULL;
-
if (xo_id >= NUM_MSM_XO_IDS) {
ret = -EINVAL;
goto err;
@@ -306,39 +283,17 @@
int __init msm_xo_init(void)
{
- int i;
- int ret = 0;
- struct msm_rpm_iv_pair cmd[2];
+ int i, ret;
+ struct msm_rpm_iv_pair cmd[1];
for (i = 0; i < ARRAY_SIZE(msm_xo_sources); i++)
INIT_LIST_HEAD(&msm_xo_sources[i].voters);
- if (cpu_is_msm9615()) {
- cmd[0].id = MSM_RPM_ID_CXO_CLK;
- cmd[0].value = 1;
- ret = msm_rpmrs_set(MSM_RPM_CTX_SET_0, cmd, 1);
- if (ret)
- goto out;
-
- cmd[0].id = MSM_RPM_ID_CXO_CLK;
- cmd[0].value = 0;
- ret = msm_rpmrs_set(MSM_RPM_CTX_SET_SLEEP, cmd, 1);
- goto out;
- }
-
- cmd[0].id = MSM_RPM_ID_PXO_CLK;
- cmd[0].value = 1;
- cmd[1].id = MSM_RPM_ID_CXO_BUFFERS;
- cmd[1].value = 0;
- ret = msm_rpmrs_set(MSM_RPM_CTX_SET_0, cmd, 2);
- if (ret)
- goto out;
-
- cmd[0].id = MSM_RPM_ID_PXO_CLK;
+ cmd[0].id = MSM_RPM_ID_CXO_BUFFERS;
cmd[0].value = 0;
- ret = msm_rpmrs_set(MSM_RPM_CTX_SET_SLEEP, cmd, 1);
+ ret = msm_rpmrs_set(MSM_RPM_CTX_SET_0, cmd, ARRAY_SIZE(cmd));
if (ret)
- goto out;
-out:
- return ret;
+ return ret;
+ msm_xo_debugfs_init();
+ return 0;
}
diff --git a/arch/arm/mach-msm/peripheral-loader.c b/arch/arm/mach-msm/peripheral-loader.c
index 1004e01..6d1a5f0 100644
--- a/arch/arm/mach-msm/peripheral-loader.c
+++ b/arch/arm/mach-msm/peripheral-loader.c
@@ -20,9 +20,11 @@
#include <linux/mutex.h>
#include <linux/memblock.h>
#include <linux/slab.h>
+#include <linux/atomic.h>
#include <asm/uaccess.h>
#include <asm/setup.h>
+#include <mach/peripheral-loader.h>
#include "peripheral-loader.h"
@@ -30,34 +32,35 @@
struct pil_desc *desc;
int count;
struct mutex lock;
- struct list_head list;
+ struct device dev;
+ struct module *owner;
+#ifdef CONFIG_DEBUG_FS
+ struct dentry *dentry;
+#endif
};
-static DEFINE_MUTEX(pil_list_lock);
-static LIST_HEAD(pil_list);
+#define to_pil_device(d) container_of(d, struct pil_device, dev)
-static struct pil_device *__find_peripheral(const char *str)
+struct bus_type pil_bus_type = {
+ .name = "pil",
+};
+
+static int __find_peripheral(struct device *dev, void *data)
{
- struct pil_device *dev;
-
- list_for_each_entry(dev, &pil_list, list)
- if (!strcmp(dev->desc->name, str))
- return dev;
- return NULL;
+ struct pil_device *pdev = to_pil_device(dev);
+ return !strncmp(pdev->desc->name, data, INT_MAX);
}
static struct pil_device *find_peripheral(const char *str)
{
- struct pil_device *dev;
+ struct device *dev;
if (!str)
return NULL;
- mutex_lock(&pil_list_lock);
- dev = __find_peripheral(str);
- mutex_unlock(&pil_list_lock);
-
- return dev;
+ dev = bus_find_device(&pil_bus_type, NULL, (void *)str,
+ __find_peripheral);
+ return dev ? to_pil_device(dev) : NULL;
}
#define IOMAP_SIZE SZ_4M
@@ -71,24 +74,23 @@
const u8 *data;
if (memblock_is_region_memory(phdr->p_paddr, phdr->p_memsz)) {
- dev_err(pil->desc->dev, "Kernel memory would be overwritten");
+ dev_err(&pil->dev, "Kernel memory would be overwritten");
return -EPERM;
}
if (phdr->p_filesz) {
snprintf(fw_name, ARRAY_SIZE(fw_name), "%s.b%02d",
pil->desc->name, num);
- ret = request_firmware(&fw, fw_name, pil->desc->dev);
+ ret = request_firmware(&fw, fw_name, &pil->dev);
if (ret) {
- dev_err(pil->desc->dev, "Failed to locate blob %s\n",
+ dev_err(&pil->dev, "Failed to locate blob %s\n",
fw_name);
return ret;
}
if (fw->size != phdr->p_filesz) {
- dev_err(pil->desc->dev,
- "Blob size %u doesn't match %u\n", fw->size,
- phdr->p_filesz);
+ dev_err(&pil->dev, "Blob size %u doesn't match %u\n",
+ fw->size, phdr->p_filesz);
ret = -EPERM;
goto release_fw;
}
@@ -105,7 +107,7 @@
size = min_t(size_t, IOMAP_SIZE, count);
buf = ioremap(paddr, size);
if (!buf) {
- dev_err(pil->desc->dev, "Failed to map memory\n");
+ dev_err(&pil->dev, "Failed to map memory\n");
ret = -ENOMEM;
goto release_fw;
}
@@ -126,7 +128,7 @@
size = min_t(size_t, IOMAP_SIZE, count);
buf = ioremap(paddr, size);
if (!buf) {
- dev_err(pil->desc->dev, "Failed to map memory\n");
+ dev_err(&pil->dev, "Failed to map memory\n");
ret = -ENOMEM;
goto release_fw;
}
@@ -140,7 +142,7 @@
ret = pil->desc->ops->verify_blob(pil->desc, phdr->p_paddr,
phdr->p_memsz);
if (ret)
- dev_err(pil->desc->dev, "Blob %u failed verification\n", num);
+ dev_err(&pil->dev, "Blob %u failed verification\n", num);
release_fw:
release_firmware(fw);
@@ -163,40 +165,40 @@
const struct firmware *fw;
snprintf(fw_name, sizeof(fw_name), "%s.mdt", pil->desc->name);
- ret = request_firmware(&fw, fw_name, pil->desc->dev);
+ ret = request_firmware(&fw, fw_name, &pil->dev);
if (ret) {
- dev_err(pil->desc->dev, "Failed to locate %s\n", fw_name);
+ dev_err(&pil->dev, "Failed to locate %s\n", fw_name);
goto out;
}
if (fw->size < sizeof(*ehdr)) {
- dev_err(pil->desc->dev, "Not big enough to be an elf header\n");
+ dev_err(&pil->dev, "Not big enough to be an elf header\n");
ret = -EIO;
goto release_fw;
}
ehdr = (struct elf32_hdr *)fw->data;
if (memcmp(ehdr->e_ident, ELFMAG, SELFMAG)) {
- dev_err(pil->desc->dev, "Not an elf header\n");
+ dev_err(&pil->dev, "Not an elf header\n");
ret = -EIO;
goto release_fw;
}
if (ehdr->e_phnum == 0) {
- dev_err(pil->desc->dev, "No loadable segments\n");
+ dev_err(&pil->dev, "No loadable segments\n");
ret = -EIO;
goto release_fw;
}
if (sizeof(struct elf32_phdr) * ehdr->e_phnum +
sizeof(struct elf32_hdr) > fw->size) {
- dev_err(pil->desc->dev, "Program headers not within mdt\n");
+ dev_err(&pil->dev, "Program headers not within mdt\n");
ret = -EIO;
goto release_fw;
}
ret = pil->desc->ops->init_image(pil->desc, fw->data, fw->size);
if (ret) {
- dev_err(pil->desc->dev, "Invalid firmware metadata\n");
+ dev_err(&pil->dev, "Invalid firmware metadata\n");
goto release_fw;
}
@@ -207,7 +209,7 @@
ret = load_segment(phdr, i, pil);
if (ret) {
- dev_err(pil->desc->dev, "Failed to load segment %d\n",
+ dev_err(&pil->dev, "Failed to load segment %d\n",
i);
goto release_fw;
}
@@ -215,10 +217,10 @@
ret = pil->desc->ops->auth_and_reset(pil->desc);
if (ret) {
- dev_err(pil->desc->dev, "Failed to bring out of reset\n");
+ dev_err(&pil->dev, "Failed to bring out of reset\n");
goto release_fw;
}
- dev_info(pil->desc->dev, "brought out of reset\n");
+ dev_info(&pil->dev, "brought %s out of reset\n", pil->desc->name);
release_fw:
release_firmware(fw);
@@ -242,33 +244,41 @@
struct pil_device *pil_d;
void *retval;
+ if (!name)
+ return NULL;
+
pil = retval = find_peripheral(name);
if (!pil)
return ERR_PTR(-ENODEV);
+ if (!try_module_get(pil->owner)) {
+ put_device(&pil->dev);
+ return ERR_PTR(-ENODEV);
+ }
- pil_d = find_peripheral(pil->desc->depends_on);
- if (pil_d) {
- void *p = pil_get(pil_d->desc->name);
- if (IS_ERR(p))
- return p;
+ pil_d = pil_get(pil->desc->depends_on);
+ if (IS_ERR(pil_d)) {
+ retval = pil_d;
+ goto err_depends;
}
mutex_lock(&pil->lock);
- if (pil->count) {
- pil->count++;
- goto unlock;
+ if (!pil->count++) {
+ ret = load_image(pil);
+ if (ret) {
+ retval = ERR_PTR(ret);
+ goto err_load;
+ }
}
-
- ret = load_image(pil);
- if (ret) {
- retval = ERR_PTR(ret);
- goto unlock;
- }
-
- pil->count++;
-unlock:
mutex_unlock(&pil->lock);
+out:
return retval;
+err_load:
+ mutex_unlock(&pil->lock);
+ pil_put(pil_d);
+err_depends:
+ put_device(&pil->dev);
+ module_put(pil->owner);
+ goto out;
}
EXPORT_SYMBOL(pil_get);
@@ -281,22 +291,29 @@
*/
void pil_put(void *peripheral_handle)
{
- struct pil_device *pil_d;
- struct pil_device *pil = peripheral_handle;
- if (!pil || IS_ERR(pil))
+ struct pil_device *pil_d, *pil = peripheral_handle;
+
+ if (IS_ERR_OR_NULL(pil))
return;
mutex_lock(&pil->lock);
- WARN(!pil->count, "%s: Reference count mismatch\n", __func__);
- if (pil->count)
- pil->count--;
- if (pil->count == 0)
+ if (WARN(!pil->count, "%s: Reference count mismatch\n", __func__))
+ goto err_out;
+ if (!--pil->count)
pil->desc->ops->shutdown(pil->desc);
mutex_unlock(&pil->lock);
pil_d = find_peripheral(pil->desc->depends_on);
- if (pil_d)
+ module_put(pil->owner);
+ if (pil_d) {
pil_put(pil_d);
+ put_device(&pil_d->dev);
+ }
+ put_device(&pil->dev);
+ return;
+err_out:
+ mutex_unlock(&pil->lock);
+ return;
}
EXPORT_SYMBOL(pil_put);
@@ -312,6 +329,7 @@
if (!WARN(!pil->count, "%s: Reference count mismatch\n", __func__))
pil->desc->ops->shutdown(pil->desc);
mutex_unlock(&pil->lock);
+ put_device(&pil->dev);
}
EXPORT_SYMBOL(pil_force_shutdown);
@@ -328,13 +346,14 @@
if (!WARN(!pil->count, "%s: Reference count mismatch\n", __func__))
ret = load_image(pil);
mutex_unlock(&pil->lock);
+ put_device(&pil->dev);
return ret;
}
EXPORT_SYMBOL(pil_force_boot);
#ifdef CONFIG_DEBUG_FS
-int msm_pil_debugfs_open(struct inode *inode, struct file *filp)
+static int msm_pil_debugfs_open(struct inode *inode, struct file *filp)
{
filp->private_data = inode->i_private;
return 0;
@@ -384,7 +403,7 @@
static struct dentry *pil_base_dir;
-static int msm_pil_debugfs_init(void)
+static int __init msm_pil_debugfs_init(void)
{
pil_base_dir = debugfs_create_dir("pil", NULL);
if (!pil_base_dir) {
@@ -394,52 +413,119 @@
return 0;
}
-arch_initcall(msm_pil_debugfs_init);
+
+static void __exit msm_pil_debugfs_exit(void)
+{
+ debugfs_remove_recursive(pil_base_dir);
+}
static int msm_pil_debugfs_add(struct pil_device *pil)
{
if (!pil_base_dir)
return -ENOMEM;
- if (!debugfs_create_file(pil->desc->name, S_IRUGO | S_IWUSR,
- pil_base_dir, pil, &msm_pil_debugfs_fops))
- return -ENOMEM;
- return 0;
+ pil->dentry = debugfs_create_file(pil->desc->name, S_IRUGO | S_IWUSR,
+ pil_base_dir, pil, &msm_pil_debugfs_fops);
+ return !pil->dentry ? -ENOMEM : 0;
+}
+
+static void msm_pil_debugfs_remove(struct pil_device *pil)
+{
+ debugfs_remove(pil->dentry);
}
#else
+static int __init msm_pil_debugfs_init(void) { return 0; };
+static void __exit msm_pil_debugfs_exit(void) { return 0; };
static int msm_pil_debugfs_add(struct pil_device *pil) { return 0; }
+static void msm_pil_debugfs_remove(struct pil_device *pil) { }
#endif
+static int __msm_pil_shutdown(struct device *dev, void *data)
+{
+ struct pil_device *pil = to_pil_device(dev);
+ pil->desc->ops->shutdown(pil->desc);
+ return 0;
+}
+
static int msm_pil_shutdown_at_boot(void)
{
- struct pil_device *pil;
-
- mutex_lock(&pil_list_lock);
- list_for_each_entry(pil, &pil_list, list)
- pil->desc->ops->shutdown(pil->desc);
- mutex_unlock(&pil_list_lock);
-
- return 0;
+ return bus_for_each_dev(&pil_bus_type, NULL, NULL, __msm_pil_shutdown);
}
late_initcall(msm_pil_shutdown_at_boot);
-int msm_pil_register(struct pil_desc *desc)
+static void pil_device_release(struct device *dev)
{
+ struct pil_device *pil = to_pil_device(dev);
+ mutex_destroy(&pil->lock);
+ kfree(pil);
+}
+
+struct pil_device *msm_pil_register(struct pil_desc *desc)
+{
+ int err;
+ static atomic_t pil_count = ATOMIC_INIT(-1);
struct pil_device *pil = kzalloc(sizeof(*pil), GFP_KERNEL);
+
if (!pil)
- return -ENOMEM;
+ return ERR_PTR(-ENOMEM);
mutex_init(&pil->lock);
- INIT_LIST_HEAD(&pil->list);
pil->desc = desc;
+ pil->owner = desc->owner;
+ pil->dev.parent = desc->dev;
+ pil->dev.bus = &pil_bus_type;
+ pil->dev.release = pil_device_release;
- mutex_lock(&pil_list_lock);
- list_add(&pil->list, &pil_list);
- mutex_unlock(&pil_list_lock);
+ dev_set_name(&pil->dev, "pil%d", atomic_inc_return(&pil_count));
+ err = device_register(&pil->dev);
+ if (err) {
+ put_device(&pil->dev);
+ mutex_destroy(&pil->lock);
+ kfree(pil);
+ return ERR_PTR(err);
+ }
- return msm_pil_debugfs_add(pil);
+ err = msm_pil_debugfs_add(pil);
+ if (err) {
+ device_unregister(&pil->dev);
+ return ERR_PTR(err);
+ }
+
+ return pil;
}
EXPORT_SYMBOL(msm_pil_register);
+void msm_pil_unregister(struct pil_device *pil)
+{
+ if (IS_ERR_OR_NULL(pil))
+ return;
+
+ if (get_device(&pil->dev)) {
+ mutex_lock(&pil->lock);
+ WARN_ON(pil->count);
+ msm_pil_debugfs_remove(pil);
+ device_unregister(&pil->dev);
+ mutex_unlock(&pil->lock);
+ put_device(&pil->dev);
+ }
+}
+EXPORT_SYMBOL(msm_pil_unregister);
+
+static int __init msm_pil_init(void)
+{
+ int ret = msm_pil_debugfs_init();
+ if (ret)
+ return ret;
+ return bus_register(&pil_bus_type);
+}
+subsys_initcall(msm_pil_init);
+
+static void __exit msm_pil_exit(void)
+{
+ bus_unregister(&pil_bus_type);
+ msm_pil_debugfs_exit();
+}
+module_exit(msm_pil_exit);
+
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Load peripheral images and bring peripherals out of reset");
diff --git a/arch/arm/mach-msm/peripheral-loader.h b/arch/arm/mach-msm/peripheral-loader.h
index 3d4b4b2..cc00446 100644
--- a/arch/arm/mach-msm/peripheral-loader.h
+++ b/arch/arm/mach-msm/peripheral-loader.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -13,12 +13,14 @@
#define __MSM_PERIPHERAL_LOADER_H
struct device;
+struct module;
struct pil_desc {
const char *name;
const char *depends_on;
struct device *dev;
const struct pil_reset_ops *ops;
+ struct module *owner;
};
struct pil_reset_ops {
@@ -29,6 +31,9 @@
int (*shutdown)(struct pil_desc *pil);
};
-extern int msm_pil_register(struct pil_desc *desc);
+struct pil_device;
+
+extern struct pil_device *msm_pil_register(struct pil_desc *desc);
+extern void msm_pil_unregister(struct pil_device *pil);
#endif
diff --git a/arch/arm/mach-msm/peripheral-reset-8960.c b/arch/arm/mach-msm/peripheral-reset-8960.c
index 6fd8464..7965193 100644
--- a/arch/arm/mach-msm/peripheral-reset-8960.c
+++ b/arch/arm/mach-msm/peripheral-reset-8960.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -91,6 +91,7 @@
.name = "dsps",
.dev = &pil_dsps.dev,
.ops = &pil_dsps_ops,
+ .owner = THIS_MODULE,
};
static void __init use_secure_pil(void)
@@ -114,8 +115,8 @@
use_secure_pil();
BUG_ON(platform_device_register(&pil_dsps));
- BUG_ON(msm_pil_register(&pil_dsps_desc));
+ BUG_ON(IS_ERR(msm_pil_register(&pil_dsps_desc)));
return 0;
}
-arch_initcall(msm_peripheral_reset_init);
+module_init(msm_peripheral_reset_init);
diff --git a/arch/arm/mach-msm/peripheral-reset.c b/arch/arm/mach-msm/peripheral-reset.c
index 88b07a5..45617e3 100644
--- a/arch/arm/mach-msm/peripheral-reset.c
+++ b/arch/arm/mach-msm/peripheral-reset.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -101,6 +101,7 @@
.name = "dsps",
.dev = &pil_dsps.dev,
.ops = &pil_dsps_ops,
+ .owner = THIS_MODULE,
};
static int __init msm_peripheral_reset_init(void)
@@ -114,12 +115,12 @@
if (machine_is_msm8x60_fluid())
pil_dsps_desc.name = "dsps_fluid";
BUG_ON(platform_device_register(&pil_dsps));
- BUG_ON(msm_pil_register(&pil_dsps_desc));
+ BUG_ON(IS_ERR(msm_pil_register(&pil_dsps_desc)));
return 0;
}
-arch_initcall(msm_peripheral_reset_init);
+module_init(msm_peripheral_reset_init);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Validate and bring peripherals out of reset");
diff --git a/arch/arm/mach-msm/pil-gss.c b/arch/arm/mach-msm/pil-gss.c
index 2b4dae1..78a6054 100644
--- a/arch/arm/mach-msm/pil-gss.c
+++ b/arch/arm/mach-msm/pil-gss.c
@@ -26,6 +26,8 @@
#include <mach/msm_iomap.h>
#include <mach/msm_xo.h>
#include <mach/socinfo.h>
+#include <mach/msm_bus_board.h>
+#include <mach/msm_bus.h>
#include "peripheral-loader.h"
#include "scm-pas.h"
@@ -43,14 +45,8 @@
#define GSS_CLAMP_ENA (MSM_CLK_CTL_BASE + 0x2C68)
#define GSS_CXO_SRC_CTL (MSM_CLK_CTL_BASE + 0x2C74)
-#define PLL5_MODE (MSM_CLK_CTL_BASE + 0x30E0)
-#define PLL5_L_VAL (MSM_CLK_CTL_BASE + 0x30E4)
-#define PLL5_M_VAL (MSM_CLK_CTL_BASE + 0x30E8)
-#define PLL5_N_VAL (MSM_CLK_CTL_BASE + 0x30EC)
-#define PLL5_CONFIG (MSM_CLK_CTL_BASE + 0x30F4)
#define PLL5_STATUS (MSM_CLK_CTL_BASE + 0x30F8)
#define PLL_ENA_GSS (MSM_CLK_CTL_BASE + 0x3480)
-#define PLL_ENA_RPM (MSM_CLK_CTL_BASE + 0x34A0)
#define PLL5_VOTE BIT(5)
#define PLL_STATUS BIT(16)
@@ -70,6 +66,7 @@
unsigned long start_addr;
struct delayed_work work;
struct clk *xo;
+ struct pil_device *pil;
};
static int nop_verify_blob(struct pil_desc *pil, u32 phy_addr, size_t size)
@@ -171,6 +168,9 @@
return ret;
}
+ /* Make sure bus port is halted. */
+ msm_bus_axi_porthalt(MSM_BUS_MASTER_GSS_NAV);
+
/*
* Vote PLL on in GSS's voting register and wait for it to enable.
* The PLL must be enable to switch the GFMUX to a low-power source.
@@ -221,6 +221,14 @@
if (ret)
return ret;
+ /* Unhalt bus port. */
+ ret = msm_bus_axi_portunhalt(MSM_BUS_MASTER_GSS_NAV);
+ if (ret) {
+ dev_err(pil->dev, "Failed to unhalt bus port\n");
+ remove_gss_proxy_votes_now(drv);
+ return ret;
+ }
+
/* Vote PLL on in GSS's voting register and wait for it to enable. */
writel_relaxed(PLL5_VOTE, PLL_ENA_GSS);
while ((readl_relaxed(PLL5_STATUS) & PLL_STATUS) == 0)
@@ -273,10 +281,19 @@
struct gss_data *drv = dev_get_drvdata(pil->dev);
int ret;
- ret = pas_shutdown(PAS_GSS);
- if (ret)
+ /*
+ * CXO is used in the secure shutdown code to configure the processor
+ * for low power mode.
+ */
+ ret = clk_prepare_enable(drv->xo);
+ if (ret) {
+ dev_err(pil->dev, "Failed to enable XO\n");
return ret;
+ }
+ msm_bus_axi_porthalt(MSM_BUS_MASTER_GSS_NAV);
+ ret = pas_shutdown(PAS_GSS);
+ clk_disable_unprepare(drv->xo);
remove_gss_proxy_votes_now(drv);
return ret;
@@ -289,11 +306,17 @@
err = make_gss_proxy_votes(pil->dev);
if (err)
- return err;
+ goto out;
+
+ err = msm_bus_axi_portunhalt(MSM_BUS_MASTER_GSS_NAV);
+ if (err) {
+ dev_err(pil->dev, "Failed to unhalt bus port\n");
+ goto remove_votes;
+ }
err = pas_auth_and_reset(PAS_GSS);
if (err)
- remove_gss_proxy_votes_now(drv);
+ goto halt_port;
if (cpu_is_apq8064() &&
((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 1) &&
@@ -311,7 +334,13 @@
*/
writel_relaxed(0x0, drv->base + GSS_CSR_RESET);
}
+ return 0;
+halt_port:
+ msm_bus_axi_porthalt(MSM_BUS_MASTER_GSS_NAV);
+remove_votes:
+ remove_gss_proxy_votes_now(drv);
+out:
return err;
}
@@ -322,69 +351,11 @@
.shutdown = pil_gss_shutdown_trusted,
};
-static void configure_gss_pll(struct gss_data *drv)
-{
- u32 regval, is_pll_enabled;
-
- /* Check if PLL5 is enabled by FSM. */
- is_pll_enabled = readl_relaxed(PLL5_STATUS) & PLL_STATUS;
- if (!is_pll_enabled) {
- /* Enable XO reference for PLL5 */
- clk_prepare_enable(drv->xo);
-
- /*
- * Assert a vote to hold PLL5 on in RPM register until other
- * voters are in place.
- */
- regval = readl_relaxed(PLL_ENA_RPM);
- regval |= PLL5_VOTE;
- writel_relaxed(regval, PLL_ENA_RPM);
-
- /* Ref clk = 27MHz and program pll5 to 288MHz */
- writel_relaxed(0xF, PLL5_L_VAL);
- writel_relaxed(0x0, PLL5_M_VAL);
- writel_relaxed(0x1, PLL5_N_VAL);
-
- regval = readl_relaxed(PLL5_CONFIG);
- /* Disable the MN accumulator and enable the main output. */
- regval &= ~BIT(22);
- regval |= BIT(23);
-
- /* Set pre-divider and post-divider values to 1 and 1 */
- regval &= ~BIT(19);
- regval &= ~(BIT(21)|BIT(20));
-
- /* Set VCO frequency */
- regval &= ~(BIT(17)|BIT(16));
- writel_relaxed(regval, PLL5_CONFIG);
-
- regval = readl_relaxed(PLL5_MODE);
- /* De-assert reset to FSM */
- regval &= ~BIT(21);
- writel_relaxed(regval, PLL5_MODE);
-
- /* Program bias count */
- regval &= ~(0x3F << 14);
- regval |= (0x1 << 14);
- writel_relaxed(regval, PLL5_MODE);
-
- /* Program lock count */
- regval &= ~(0x3F << 8);
- regval |= (0x8 << 8);
- writel_relaxed(regval, PLL5_MODE);
-
- /* Enable PLL FSM voting */
- regval |= BIT(20);
- writel_relaxed(regval, PLL5_MODE);
- }
-}
-
static int __devinit pil_gss_probe(struct platform_device *pdev)
{
struct gss_data *drv;
struct resource *res;
struct pil_desc *desc;
- int ret;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res)
@@ -418,6 +389,7 @@
desc->name = "gss";
desc->dev = &pdev->dev;
+ desc->owner = THIS_MODULE;
if (pas_supported(PAS_GSS) > 0) {
desc->ops = &pil_gss_ops_trusted;
@@ -429,20 +401,19 @@
INIT_DELAYED_WORK(&drv->work, remove_gss_proxy_votes);
- /* FIXME: Remove when PLL is configured by bootloaders. */
- configure_gss_pll(drv);
-
- ret = msm_pil_register(desc);
- if (ret) {
+ drv->pil = msm_pil_register(desc);
+ if (IS_ERR(drv->pil)) {
flush_delayed_work_sync(&drv->work);
clk_put(drv->xo);
+ return PTR_ERR(drv->pil);
}
- return ret;
+ return 0;
}
static int __devexit pil_gss_remove(struct platform_device *pdev)
{
struct gss_data *drv = platform_get_drvdata(pdev);
+ msm_pil_unregister(drv->pil);
flush_delayed_work_sync(&drv->work);
clk_put(drv->xo);
return 0;
diff --git a/arch/arm/mach-msm/pil-modem.c b/arch/arm/mach-msm/pil-modem.c
index 1d13508..a85d13c 100644
--- a/arch/arm/mach-msm/pil-modem.c
+++ b/arch/arm/mach-msm/pil-modem.c
@@ -53,6 +53,7 @@
struct modem_data {
void __iomem *base;
unsigned long start_addr;
+ struct pil_device *pil;
struct clk *xo;
struct delayed_work work;
};
@@ -277,7 +278,6 @@
struct modem_data *drv;
struct resource *res;
struct pil_desc *desc;
- int ret;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res)
@@ -303,6 +303,7 @@
desc->name = "modem";
desc->depends_on = "q6";
desc->dev = &pdev->dev;
+ desc->owner = THIS_MODULE;
if (pas_supported(PAS_MODEM) > 0) {
desc->ops = &pil_modem_ops_trusted;
@@ -313,17 +314,19 @@
}
INIT_DELAYED_WORK(&drv->work, remove_modem_proxy_votes);
- ret = msm_pil_register(desc);
- if (ret) {
+ drv->pil = msm_pil_register(desc);
+ if (IS_ERR(drv->pil)) {
flush_delayed_work_sync(&drv->work);
clk_put(drv->xo);
+ return PTR_ERR(drv->pil);
}
- return ret;
+ return 0;
}
static int __devexit pil_modem_driver_exit(struct platform_device *pdev)
{
struct modem_data *drv = platform_get_drvdata(pdev);
+ msm_pil_unregister(drv->pil);
flush_delayed_work_sync(&drv->work);
clk_put(drv->xo);
return 0;
diff --git a/arch/arm/mach-msm/pil-q6v3.c b/arch/arm/mach-msm/pil-q6v3.c
index 06b98e5..54356b8 100644
--- a/arch/arm/mach-msm/pil-q6v3.c
+++ b/arch/arm/mach-msm/pil-q6v3.c
@@ -66,6 +66,7 @@
struct q6v3_data {
void __iomem *base;
unsigned long start_addr;
+ struct pil_device *pil;
struct clk *pll;
struct delayed_work work;
};
@@ -260,6 +261,7 @@
desc->name = "q6";
desc->dev = &pdev->dev;
+ desc->owner = THIS_MODULE;
if (pas_supported(PAS_Q6) > 0) {
desc->ops = &pil_q6v3_ops_trusted;
@@ -271,9 +273,10 @@
INIT_DELAYED_WORK(&drv->work, q6v3_remove_proxy_votes);
- if (msm_pil_register(desc)) {
+ drv->pil = msm_pil_register(desc);
+ if (IS_ERR(drv->pil)) {
flush_delayed_work_sync(&drv->work);
- return -EINVAL;
+ return PTR_ERR(drv->pil);
}
return 0;
}
@@ -281,6 +284,7 @@
static int __devexit pil_q6v3_driver_exit(struct platform_device *pdev)
{
struct q6v3_data *drv = platform_get_drvdata(pdev);
+ msm_pil_unregister(drv->pil);
flush_delayed_work_sync(&drv->work);
return 0;
}
diff --git a/arch/arm/mach-msm/pil-q6v4.c b/arch/arm/mach-msm/pil-q6v4.c
index b0bce02..17f5a41 100644
--- a/arch/arm/mach-msm/pil-q6v4.c
+++ b/arch/arm/mach-msm/pil-q6v4.c
@@ -71,6 +71,7 @@
bool vreg_enabled;
struct clk *xo;
struct delayed_work work;
+ struct pil_device *pil;
};
static int pil_q6v4_init_image(struct pil_desc *pil, const u8 *metadata,
@@ -421,6 +422,7 @@
desc->name = pdata->name;
desc->depends_on = pdata->depends;
desc->dev = &pdev->dev;
+ desc->owner = THIS_MODULE;
if (pas_supported(pdata->pas_id) > 0) {
desc->ops = &pil_q6v4_ops_trusted;
@@ -443,9 +445,11 @@
}
INIT_DELAYED_WORK(&drv->work, pil_q6v4_remove_proxy_votes);
- ret = msm_pil_register(desc);
- if (ret)
+ drv->pil = msm_pil_register(desc);
+ if (IS_ERR(drv->pil)) {
+ ret = PTR_ERR(drv->pil);
goto err_pil;
+ }
return 0;
err_pil:
flush_delayed_work_sync(&drv->work);
@@ -464,6 +468,7 @@
clk_put(drv->xo);
regulator_put(drv->vreg);
regulator_put(drv->pll_supply);
+ msm_pil_unregister(drv->pil);
return 0;
}
diff --git a/arch/arm/mach-msm/pil-riva.c b/arch/arm/mach-msm/pil-riva.c
index bd49fc0..4449fff 100644
--- a/arch/arm/mach-msm/pil-riva.c
+++ b/arch/arm/mach-msm/pil-riva.c
@@ -21,6 +21,7 @@
#include <linux/regulator/consumer.h>
#include <linux/workqueue.h>
#include <linux/clk.h>
+#include <linux/wakelock.h>
#include <mach/msm_iomap.h>
@@ -86,6 +87,8 @@
bool use_cxo;
struct delayed_work work;
struct regulator *pll_supply;
+ struct pil_device *pil;
+ struct wake_lock wlock;
};
static int pil_riva_make_proxy_votes(struct device *dev)
@@ -93,6 +96,7 @@
struct riva_data *drv = dev_get_drvdata(dev);
int ret;
+ wake_lock(&drv->wlock);
ret = regulator_enable(drv->pll_supply);
if (ret) {
dev_err(dev, "failed to enable pll supply\n");
@@ -119,6 +123,7 @@
regulator_disable(drv->pll_supply);
if (drv->use_cxo)
clk_disable_unprepare(drv->xo);
+ wake_unlock(&drv->wlock);
}
static void pil_riva_remove_proxy_votes_now(struct device *dev)
@@ -390,6 +395,7 @@
desc->name = "wcnss";
desc->dev = &pdev->dev;
+ desc->owner = THIS_MODULE;
if (pas_supported(PAS_RIVA) > 0) {
desc->ops = &pil_riva_ops_trusted;
@@ -404,14 +410,18 @@
ret = PTR_ERR(drv->xo);
goto err;
}
+ wake_lock_init(&drv->wlock, WAKE_LOCK_SUSPEND, "riva-wlock");
INIT_DELAYED_WORK(&drv->work, pil_riva_remove_proxy_votes);
- ret = msm_pil_register(desc);
- if (ret)
+ drv->pil = msm_pil_register(desc);
+ if (IS_ERR(drv->pil)) {
+ ret = PTR_ERR(drv->pil);
goto err_register;
+ }
return 0;
err_register:
flush_delayed_work_sync(&drv->work);
+ wake_lock_destroy(&drv->wlock);
clk_put(drv->xo);
err:
regulator_put(drv->pll_supply);
@@ -421,7 +431,9 @@
static int __devexit pil_riva_remove(struct platform_device *pdev)
{
struct riva_data *drv = platform_get_drvdata(pdev);
+ msm_pil_unregister(drv->pil);
flush_delayed_work_sync(&drv->work);
+ wake_lock_destroy(&drv->wlock);
clk_put(drv->xo);
regulator_put(drv->pll_supply);
return 0;
diff --git a/arch/arm/mach-msm/pil-tzapps.c b/arch/arm/mach-msm/pil-tzapps.c
index 90ac1d9..b6e5343 100644
--- a/arch/arm/mach-msm/pil-tzapps.c
+++ b/arch/arm/mach-msm/pil-tzapps.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -50,6 +50,7 @@
static int __devinit pil_tzapps_driver_probe(struct platform_device *pdev)
{
struct pil_desc *desc;
+ struct pil_device *pil;
if (pas_supported(PAS_TZAPPS) < 0)
return -ENOSYS;
@@ -61,13 +62,18 @@
desc->name = "tzapps";
desc->dev = &pdev->dev;
desc->ops = &pil_tzapps_ops;
- if (msm_pil_register(desc))
- return -EINVAL;
+ desc->owner = THIS_MODULE;
+ pil = msm_pil_register(desc);
+ if (IS_ERR(pil))
+ return PTR_ERR(pil);
+ platform_set_drvdata(pdev, pil);
return 0;
}
static int __devexit pil_tzapps_driver_exit(struct platform_device *pdev)
{
+ struct pil_device *pil = platform_get_drvdata(pdev);
+ msm_pil_unregister(pil);
return 0;
}
diff --git a/arch/arm/mach-msm/platsmp-8625.c b/arch/arm/mach-msm/platsmp-8625.c
index 534fc0e..92ed764 100644
--- a/arch/arm/mach-msm/platsmp-8625.c
+++ b/arch/arm/mach-msm/platsmp-8625.c
@@ -17,6 +17,7 @@
#include <linux/jiffies.h>
#include <linux/smp.h>
#include <linux/io.h>
+#include <linux/highmem.h>
#include <asm/cacheflush.h>
#include <asm/hardware/gic.h>
@@ -25,9 +26,13 @@
#include <asm/unified.h>
#include <mach/msm_iomap.h>
#include <mach/smp.h>
+
#include "pm.h"
+#include "devices-msm7x2xa.h"
#define MSM_CORE1_RESET 0xA8600590
+#define MSM_CORE1_STATUS_MSK 0x02800000
+
/*
* control for which core is the next to come out of the secondary
* boot "holding pen"
@@ -60,6 +65,10 @@
void __cpuinit platform_secondary_init(unsigned int cpu)
{
+ pr_debug("CPU%u: Booted secondary processor\n", cpu);
+
+ WARN_ON(msm_platform_secondary_init(cpu));
+
/*
* if any interrupts are already enabled for the primary
* core (e.g. timer irq), then they will not have been enabled
@@ -80,20 +89,53 @@
spin_unlock(&boot_lock);
}
+static int __cpuinit msm8625_release_secondary(void)
+{
+ void __iomem *base_ptr;
+ int value = 0;
+ unsigned long timeout;
+
+ /*
+ * loop to ensure that the GHS_STATUS_CORE1 bit in the
+ * MPA5_STATUS_REG(0x3c) is set. The timeout for the while
+ * loop can be set as 20us as of now
+ */
+ timeout = jiffies + usecs_to_jiffies(20);
+ while (time_before(jiffies, timeout)) {
+ value = __raw_readl(MSM_CFG_CTL_BASE + 0x3c);
+ if ((value & MSM_CORE1_STATUS_MSK) ==
+ MSM_CORE1_STATUS_MSK)
+ break;
+ udelay(1);
+ }
+
+ if (!value) {
+ pr_err("Core 1 cannot be brought out of Reset!!!\n");
+ return -ENODEV;
+ }
+
+ base_ptr = ioremap_nocache(MSM_CORE1_RESET, SZ_4);
+ if (!base_ptr)
+ return -ENODEV;
+ /* Reset core 1 out of reset */
+ __raw_writel(0x0, base_ptr);
+ mb();
+
+ iounmap(base_ptr);
+
+ return 0;
+}
+
int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
{
unsigned long timeout;
- void __iomem *base_ptr;
if (cold_boot_done == false) {
- base_ptr = ioremap_nocache(MSM_CORE1_RESET, SZ_4);
- if (!base_ptr)
+ if (msm8625_release_secondary()) {
+ pr_err("Failed to release secondary core\n");
return -ENODEV;
- /* Reset core 1 out of reset */
- __raw_writel(0x0, base_ptr);
- mb();
+ }
cold_boot_done = true;
- iounmap(base_ptr);
}
/*
@@ -167,7 +209,8 @@
void __init platform_smp_prepare_cpus(unsigned int max_cpus)
{
int i, value;
- void __iomem *second_ptr;
+ phys_addr_t base;
+ void *vaddr;
/*
* Initialise the present map, which describes the set of CPUs
@@ -182,18 +225,14 @@
* Write the address of secondary startup into the
* boot remapper register. The secondary CPU branches to this address.
*/
- __raw_writel(MSM8625_SECONDARY_PHYS, (MSM_CFG_CTL_BASE + 0x34));
+ base = msm8625_get_phys_base();
+ __raw_writel(base, (MSM_CFG_CTL_BASE + 0x34));
mb();
- second_ptr = ioremap_nocache(MSM8625_SECONDARY_PHYS, SZ_8);
- if (!second_ptr) {
- pr_err("failed to ioremap for secondary core\n");
- return;
- }
+ vaddr = kmap_atomic(phys_to_page(base));
- msm8625_boot_vector_init(second_ptr,
- virt_to_phys(msm_secondary_startup));
- iounmap(second_ptr);
+ msm8625_boot_vector_init(vaddr, virt_to_phys(msm_secondary_startup));
+ kunmap_atomic(vaddr);
/* Enable boot remapper address: bit 26 for core1 */
value = __raw_readl(MSM_CFG_CTL_BASE + 0x30);
diff --git a/arch/arm/mach-msm/pm-8x60.c b/arch/arm/mach-msm/pm-8x60.c
index b3c6d1e..ad235de 100644
--- a/arch/arm/mach-msm/pm-8x60.c
+++ b/arch/arm/mach-msm/pm-8x60.c
@@ -655,6 +655,10 @@
void *entry;
bool collapsed = 0;
int ret;
+ unsigned int saved_gic_cpu_ctrl;
+
+ saved_gic_cpu_ctrl = readl_relaxed(MSM_QGIC_CPU_BASE + GIC_CPU_CTRL);
+ mb();
if (MSM_PM_DEBUG_POWER_COLLAPSE & msm_pm_debug_mask)
pr_info("CPU%u: %s: notify_rpm %d\n",
@@ -686,7 +690,9 @@
#endif
cpu_init();
writel(0xF0, MSM_QGIC_CPU_BASE + GIC_CPU_PRIMASK);
- writel(1, MSM_QGIC_CPU_BASE + GIC_CPU_CTRL);
+ writel_relaxed(saved_gic_cpu_ctrl,
+ MSM_QGIC_CPU_BASE + GIC_CPU_CTRL);
+ mb();
local_fiq_enable();
}
diff --git a/arch/arm/mach-msm/pm-boot.c b/arch/arm/mach-msm/pm-boot.c
index ce09f9f..f4536f7 100644
--- a/arch/arm/mach-msm/pm-boot.c
+++ b/arch/arm/mach-msm/pm-boot.c
@@ -101,6 +101,7 @@
int __init msm_pm_boot_init(struct msm_pm_boot_platform_data *pdata)
{
int ret = 0;
+ unsigned long entry;
switch (pdata->mode) {
case MSM_PM_BOOT_CONFIG_TZ:
@@ -130,15 +131,44 @@
if (!pdata->p_addr || !pdata->v_addr)
return -ENODEV;
- __raw_writel((pdata->p_addr | BOOT_REMAP_ENABLE),
- pdata->v_addr);
-
ret = msm_pm_boot_reset_vector_init(__va(pdata->p_addr));
- msm_pm_boot_before_pc
- = msm_pm_config_rst_vector_before_pc;
- msm_pm_boot_after_pc
- = msm_pm_config_rst_vector_after_pc;
+ if (!cpu_is_msm8625()) {
+ __raw_writel((pdata->p_addr | BOOT_REMAP_ENABLE),
+ pdata->v_addr);
+
+ msm_pm_boot_before_pc
+ = msm_pm_config_rst_vector_before_pc;
+ msm_pm_boot_after_pc
+ = msm_pm_config_rst_vector_after_pc;
+ } else {
+ entry = virt_to_phys(msm_pm_boot_entry);
+
+ msm_pm_reset_vector[0] = 0xE51FF004; /* ldr pc, 4 */
+ msm_pm_reset_vector[1] = entry;
+
+ /* Here upper 16bits[16:31] used by CORE1
+ * lower 16bits[0:15] used by CORE0
+ */
+ entry = (pdata->p_addr) |
+ ((pdata->p_addr & 0xFFFF0000) >> 16);
+
+ /* write 'entry' to boot remapper register */
+ __raw_writel(entry, (pdata->v_addr +
+ MPA5_BOOT_REMAP_ADDR));
+
+ /* Enable boot remapper for C0 [bit:25th] */
+ __raw_writel(readl_relaxed(pdata->v_addr +
+ MPA5_CFG_CTL_REG) | BIT(25),
+ pdata->v_addr + MPA5_CFG_CTL_REG);
+
+ /* Enable boot remapper for C1 [bit:26th] */
+ __raw_writel(readl_relaxed(pdata->v_addr +
+ MPA5_CFG_CTL_REG) | BIT(26),
+ pdata->v_addr + MPA5_CFG_CTL_REG);
+
+ msm_pm_boot_before_pc = msm_pm_write_boot_vector;
+ }
break;
default:
__WARN();
diff --git a/arch/arm/mach-msm/pm-boot.h b/arch/arm/mach-msm/pm-boot.h
index 185d542..30b67c21 100644
--- a/arch/arm/mach-msm/pm-boot.h
+++ b/arch/arm/mach-msm/pm-boot.h
@@ -13,6 +13,11 @@
#ifndef _ARCH_ARM_MACH_MSM_PM_BOOT_H
#define _ARCH_ARM_MACH_MSM_PM_BOOT_H
+/* 8x25 specific macros */
+#define MPA5_CFG_CTL_REG 0x30
+#define MPA5_BOOT_REMAP_ADDR 0x34
+/* end */
+
enum {
MSM_PM_BOOT_CONFIG_TZ = 0,
MSM_PM_BOOT_CONFIG_RESET_VECTOR_PHYS = 1,
diff --git a/arch/arm/mach-msm/pm2.c b/arch/arm/mach-msm/pm2.c
index 7977d22..4d63b6d 100644
--- a/arch/arm/mach-msm/pm2.c
+++ b/arch/arm/mach-msm/pm2.c
@@ -48,6 +48,7 @@
#ifdef CONFIG_MSM_MEMORY_LOW_POWER_MODE_SUSPEND_DEEP_POWER_DOWN
#include <mach/msm_migrate_pages.h>
#endif
+#include <mach/socinfo.h>
#include "smd_private.h"
#include "smd_rpcrouter.h"
@@ -68,13 +69,14 @@
*****************************************************************************/
enum {
- MSM_PM_DEBUG_SUSPEND = 1U << 0,
- MSM_PM_DEBUG_POWER_COLLAPSE = 1U << 1,
- MSM_PM_DEBUG_STATE = 1U << 2,
- MSM_PM_DEBUG_CLOCK = 1U << 3,
- MSM_PM_DEBUG_RESET_VECTOR = 1U << 4,
- MSM_PM_DEBUG_SMSM_STATE = 1U << 5,
- MSM_PM_DEBUG_IDLE = 1U << 6,
+ MSM_PM_DEBUG_SUSPEND = BIT(0),
+ MSM_PM_DEBUG_POWER_COLLAPSE = BIT(1),
+ MSM_PM_DEBUG_STATE = BIT(2),
+ MSM_PM_DEBUG_CLOCK = BIT(3),
+ MSM_PM_DEBUG_RESET_VECTOR = BIT(4),
+ MSM_PM_DEBUG_SMSM_STATE = BIT(5),
+ MSM_PM_DEBUG_IDLE = BIT(6),
+ MSM_PM_DEBUG_HOTPLUG = BIT(7),
};
static int msm_pm_debug_mask;
@@ -142,7 +144,6 @@
static char *msm_pm_sleep_mode_labels[MSM_PM_SLEEP_MODE_NR] = {
[MSM_PM_SLEEP_MODE_POWER_COLLAPSE_SUSPEND] = " ",
[MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = "power_collapse",
- [MSM_PM_SLEEP_MODE_APPS_SLEEP] = "apps_sleep",
[MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT] =
"ramp_down_and_wfi",
[MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT] = "wfi",
@@ -682,8 +683,6 @@
MSM_PM_STAT_IDLE_WFI,
MSM_PM_STAT_IDLE_STANDALONE_POWER_COLLAPSE,
MSM_PM_STAT_IDLE_FAILED_STANDALONE_POWER_COLLAPSE,
- MSM_PM_STAT_IDLE_SLEEP,
- MSM_PM_STAT_IDLE_FAILED_SLEEP,
MSM_PM_STAT_IDLE_POWER_COLLAPSE,
MSM_PM_STAT_IDLE_FAILED_POWER_COLLAPSE,
MSM_PM_STAT_SUSPEND,
@@ -1008,6 +1007,13 @@
memset(msm_pm_smem_data, 0, sizeof(*msm_pm_smem_data));
+ if (cpu_is_msm8625()) {
+ /* Program the SPM */
+ ret = msm_spm_set_low_power_mode(MSM_SPM_MODE_POWER_COLLAPSE,
+ false);
+ WARN_ON(ret);
+ }
+
msm_irq_enter_sleep1(true, from_idle, &msm_pm_smem_data->irq_mask);
msm_sirc_enter_sleep();
msm_gpio_enter_sleep(from_idle);
@@ -1210,6 +1216,13 @@
MSM_PM_DEBUG_PRINT_STATE("msm_pm_power_collapse(): RUN");
smd_sleep_exit();
+
+ if (cpu_is_msm8625()) {
+ ret = msm_spm_set_low_power_mode(MSM_SPM_MODE_CLOCK_GATING,
+ false);
+ WARN_ON(ret);
+ }
+
return 0;
power_collapse_early_exit:
@@ -1263,6 +1276,12 @@
smd_sleep_exit();
power_collapse_bail:
+ if (cpu_is_msm8625()) {
+ ret = msm_spm_set_low_power_mode(MSM_SPM_MODE_CLOCK_GATING,
+ false);
+ WARN_ON(ret);
+ }
+
return ret;
}
@@ -1272,10 +1291,11 @@
* Return value:
* 0: success
*/
-static int msm_pm_power_collapse_standalone(void)
+static int msm_pm_power_collapse_standalone(bool from_idle)
{
int collapsed = 0;
int ret;
+ void *entry;
MSM_PM_DPRINTK(MSM_PM_DEBUG_SUSPEND|MSM_PM_DEBUG_POWER_COLLAPSE,
KERN_INFO, "%s()\n", __func__);
@@ -1283,21 +1303,26 @@
ret = msm_spm_set_low_power_mode(MSM_SPM_MODE_POWER_COLLAPSE, false);
WARN_ON(ret);
+ entry = (!smp_processor_id() || from_idle) ?
+ msm_pm_collapse_exit : msm_secondary_startup;
+
msm_pm_boot_config_before_pc(smp_processor_id(),
- virt_to_phys(msm_pm_collapse_exit));
+ virt_to_phys(entry));
#ifdef CONFIG_VFP
vfp_flush_context();
#endif
#ifdef CONFIG_CACHE_L2X0
- l2x0_suspend();
+ if (!cpu_is_msm8625())
+ l2x0_suspend();
#endif
collapsed = msm_pm_collapse();
#ifdef CONFIG_CACHE_L2X0
- l2x0_resume(collapsed);
+ if (!cpu_is_msm8625())
+ l2x0_resume(collapsed);
#endif
msm_pm_boot_config_after_pc(smp_processor_id());
@@ -1321,18 +1346,6 @@
}
/*
- * Apps-sleep the Apps processor. This function execute the handshake
- * protocol with Modem.
- *
- * Return value:
- * -ENOSYS: function not implemented yet
- */
-static int msm_pm_apps_sleep(uint32_t sleep_delay, uint32_t sleep_limit)
-{
- return -ENOSYS;
-}
-
-/*
* Bring the Apps processor to SWFI.
*
* Return value:
@@ -1353,7 +1366,9 @@
return -EIO;
}
- msm_pm_config_hw_before_swfi();
+ if (!cpu_is_msm8625())
+ msm_pm_config_hw_before_swfi();
+
msm_arch_idle();
if (ramp_acpu) {
@@ -1395,7 +1410,7 @@
int64_t t1;
static int64_t t2;
int exit_stat;
- #endif /* CONFIG_MSM_IDLE_STATS */
+ #endif
if (!atomic_read(&msm_pm_init_done))
return;
@@ -1412,19 +1427,19 @@
exit_stat = MSM_PM_STAT_IDLE_SPIN;
low_power = 0;
-#endif /* CONFIG_MSM_IDLE_STATS */
+#endif
for (i = 0; i < ARRAY_SIZE(allow); i++)
allow[i] = true;
- if ((timer_expiration < msm_pm_idle_sleep_min_time) ||
+ if (num_online_cpus() > 1 ||
+ (timer_expiration < msm_pm_idle_sleep_min_time) ||
#ifdef CONFIG_HAS_WAKELOCK
has_wake_lock(WAKE_LOCK_IDLE) ||
#endif
!msm_irq_idle_sleep_allowed()) {
allow[MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = false;
allow[MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = false;
- allow[MSM_PM_SLEEP_MODE_APPS_SLEEP] = false;
}
for (i = 0; i < ARRAY_SIZE(allow); i++) {
@@ -1493,32 +1508,15 @@
exit_stat = MSM_PM_STAT_IDLE_POWER_COLLAPSE;
msm_pm_sleep_limit = sleep_limit;
}
-#endif /* CONFIG_MSM_IDLE_STATS */
- } else if (allow[MSM_PM_SLEEP_MODE_APPS_SLEEP]) {
- uint32_t sleep_delay;
-
- sleep_delay = (uint32_t) msm_pm_convert_and_cap_time(
- timer_expiration, MSM_PM_SLEEP_TICK_LIMIT);
- if (sleep_delay == 0) /* 0 would mean infinite time */
- sleep_delay = 1;
-
- ret = msm_pm_apps_sleep(sleep_delay, sleep_limit);
- low_power = 0;
-
-#ifdef CONFIG_MSM_IDLE_STATS
- if (ret)
- exit_stat = MSM_PM_STAT_IDLE_FAILED_SLEEP;
- else
- exit_stat = MSM_PM_STAT_IDLE_SLEEP;
-#endif /* CONFIG_MSM_IDLE_STATS */
+#endif
} else if (allow[MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE]) {
- ret = msm_pm_power_collapse_standalone();
+ ret = msm_pm_power_collapse_standalone(true);
low_power = 0;
#ifdef CONFIG_MSM_IDLE_STATS
exit_stat = ret ?
MSM_PM_STAT_IDLE_FAILED_STANDALONE_POWER_COLLAPSE :
MSM_PM_STAT_IDLE_STANDALONE_POWER_COLLAPSE;
-#endif /* CONFIG_MSM_IDLE_STATS */
+#endif
} else if (allow[MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT]) {
ret = msm_pm_swfi(true);
if (ret)
@@ -1527,20 +1525,20 @@
low_power = 0;
#ifdef CONFIG_MSM_IDLE_STATS
exit_stat = ret ? MSM_PM_STAT_IDLE_SPIN : MSM_PM_STAT_IDLE_WFI;
-#endif /* CONFIG_MSM_IDLE_STATS */
+#endif
} else if (allow[MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT]) {
msm_pm_swfi(false);
low_power = 0;
#ifdef CONFIG_MSM_IDLE_STATS
exit_stat = MSM_PM_STAT_IDLE_WFI;
-#endif /* CONFIG_MSM_IDLE_STATS */
+#endif
} else {
while (!msm_irq_pending())
udelay(1);
low_power = 0;
#ifdef CONFIG_MSM_IDLE_STATS
exit_stat = MSM_PM_STAT_IDLE_SPIN;
-#endif /* CONFIG_MSM_IDLE_STATS */
+#endif
}
msm_timer_exit_idle(low_power);
@@ -1548,13 +1546,14 @@
#ifdef CONFIG_MSM_IDLE_STATS
t2 = ktime_to_ns(ktime_get());
msm_pm_add_stat(exit_stat, t2 - t1);
-#endif /* CONFIG_MSM_IDLE_STATS */
+#endif
}
/*
* Suspend the Apps processor.
*
* Return value:
+ * -EPERM: Suspend happened by a not permitted core
* -EAGAIN: modem reset occurred or early exit from suspend
* -EBUSY: modem not ready for our suspend
* -EINVAL: invalid sleep mode
@@ -1566,13 +1565,20 @@
{
bool allow[MSM_PM_SLEEP_MODE_NR];
uint32_t sleep_limit = SLEEP_LIMIT_NONE;
- int ret;
+ int ret = -EPERM;
int i;
-
#ifdef CONFIG_MSM_IDLE_STATS
int64_t period = 0;
int64_t time = 0;
+#endif
+ /* Must executed by CORE0 */
+ if (smp_processor_id()) {
+ __WARN();
+ goto suspend_exit;
+ }
+
+#ifdef CONFIG_MSM_IDLE_STATS
time = msm_timer_get_sclk_time(&period);
#endif
@@ -1589,8 +1595,6 @@
allow[i] = false;
}
- ret = 0;
-
if (allow[MSM_PM_SLEEP_MODE_POWER_COLLAPSE] ||
allow[MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN]) {
#ifdef CONFIG_MSM_IDLE_STATS
@@ -1647,7 +1651,7 @@
msm_pm_add_stat(id, time);
#endif
} else if (allow[MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE]) {
- ret = msm_pm_power_collapse_standalone();
+ ret = msm_pm_power_collapse_standalone(false);
} else if (allow[MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT]) {
ret = msm_pm_swfi(true);
if (ret)
@@ -1657,6 +1661,7 @@
msm_pm_swfi(false);
}
+suspend_exit:
MSM_PM_DPRINTK(MSM_PM_DEBUG_SUSPEND, KERN_INFO,
"%s(): return %d\n", __func__, ret);
@@ -1673,7 +1678,27 @@
*/
void msm_pm_cpu_enter_lowpower(unsigned int cpu)
{
- return;
+ bool allow[MSM_PM_SLEEP_MODE_NR];
+ int i;
+
+ for (i = 0; i < MSM_PM_SLEEP_MODE_NR; i++) {
+ struct msm_pm_platform_data *mode;
+
+ mode = &msm_pm_modes[MSM_PM_MODE(cpu, i)];
+ allow[i] = mode->suspend_supported && mode->suspend_enabled;
+ }
+
+ MSM_PM_DPRINTK(MSM_PM_DEBUG_HOTPLUG, KERN_INFO,
+ "CPU%u: %s: shutting down cpu\n", cpu, __func__);
+
+ if (allow[MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE]) {
+ msm_pm_power_collapse_standalone(false);
+ } else if (allow[MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT]) {
+ msm_pm_swfi(false);
+ } else {
+ MSM_PM_DPRINTK(MSM_PM_DEBUG_HOTPLUG, KERN_INFO,
+ "CPU%u: %s: shutting down failed!!!\n", cpu, __func__);
+ }
}
/******************************************************************************
@@ -1725,10 +1750,6 @@
};
-/******************************************************************************
- *
- *****************************************************************************/
-
/*
* Initialize the power management subsystem.
*
@@ -1748,6 +1769,8 @@
pmd_t *pmd;
unsigned long pmdval;
+ if (cpu_is_msm8625())
+ return 0;
/* Page table for cores to come back up safely. */
pc_pgd = pgd_alloc(&init_mm);
if (!pc_pgd)
@@ -1837,15 +1860,6 @@
first_bucket_time =
CONFIG_MSM_IDLE_STATS_FIRST_BUCKET;
- stats[MSM_PM_STAT_IDLE_SLEEP].name = "idle-sleep";
- stats[MSM_PM_STAT_IDLE_SLEEP].first_bucket_time =
- CONFIG_MSM_IDLE_STATS_FIRST_BUCKET;
-
- stats[MSM_PM_STAT_IDLE_FAILED_SLEEP].name =
- "idle-failed-sleep";
- stats[MSM_PM_STAT_IDLE_FAILED_SLEEP].first_bucket_time =
- CONFIG_MSM_IDLE_STATS_FIRST_BUCKET;
-
stats[MSM_PM_STAT_IDLE_POWER_COLLAPSE].name =
"idle-power-collapse";
stats[MSM_PM_STAT_IDLE_POWER_COLLAPSE].first_bucket_time =
diff --git a/arch/arm/mach-msm/pmu.c b/arch/arm/mach-msm/pmu.c
index 81d4e5b..1f82468 100644
--- a/arch/arm/mach-msm/pmu.c
+++ b/arch/arm/mach-msm/pmu.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -14,24 +14,28 @@
#include <asm/pmu.h>
#include <mach/irqs.h>
-static struct resource cpu_pmu_resource = {
- .start = INT_ARMQC_PERFMON,
- .end = INT_ARMQC_PERFMON,
- .flags = IORESOURCE_IRQ,
+static struct resource cpu_pmu_resource[] = {
+ {
+ .start = INT_ARMQC_PERFMON,
+ .end = INT_ARMQC_PERFMON,
+ .flags = IORESOURCE_IRQ,
+ },
};
#ifdef CONFIG_CPU_HAS_L2_PMU
-static struct resource l2_pmu_resource = {
- .start = SC_SICL2PERFMONIRPTREQ,
- .end = SC_SICL2PERFMONIRPTREQ,
- .flags = IORESOURCE_IRQ,
+static struct resource l2_pmu_resource[] = {
+ {
+ .start = SC_SICL2PERFMONIRPTREQ,
+ .end = SC_SICL2PERFMONIRPTREQ,
+ .flags = IORESOURCE_IRQ,
+ },
};
static struct platform_device l2_pmu_device = {
.name = "l2-arm-pmu",
.id = ARM_PMU_DEVICE_L2,
- .resource = &l2_pmu_resource,
- .num_resources = 1,
+ .resource = l2_pmu_resource,
+ .num_resources = ARRAY_SIZE(l2_pmu_resource),
};
#endif
@@ -39,8 +43,8 @@
static struct platform_device cpu_pmu_device = {
.name = "cpu-arm-pmu",
.id = ARM_PMU_DEVICE_CPU,
- .resource = &cpu_pmu_resource,
- .num_resources = 1,
+ .resource = cpu_pmu_resource,
+ .num_resources = ARRAY_SIZE(cpu_pmu_resource),
};
static struct platform_device *pmu_devices[] = {
diff --git a/arch/arm/mach-msm/qdsp5/adsp.c b/arch/arm/mach-msm/qdsp5/adsp.c
index 33c5a53..4dafbf4 100644
--- a/arch/arm/mach-msm/qdsp5/adsp.c
+++ b/arch/arm/mach-msm/qdsp5/adsp.c
@@ -3,7 +3,7 @@
* Register/Interrupt access for userspace aDSP library.
*
* Copyright (C) 2008 Google, Inc.
- * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2008-2012, Code Aurora Forum. All rights reserved.
* Author: Iliyan Malchev <ibm@android.com>
*
* This software is licensed under the terms of the GNU General Public
@@ -58,8 +58,6 @@
#include <mach/msm_adsp.h>
#include "adsp.h"
-#define INT_ADSP INT_ADSP_A9_A11
-
static struct adsp_info adsp_info;
static struct msm_rpc_endpoint *rpc_cb_server_client;
static struct msm_adsp_module *adsp_modules;
@@ -280,6 +278,7 @@
int rc = 0;
static uint32_t init_info_cmd_sent;
+ mutex_lock(&adsp_info.lock);
if (!init_info_cmd_sent) {
init_waitqueue_head(&adsp_info.init_info_wait);
msm_get_init_info();
@@ -288,10 +287,13 @@
5 * HZ);
if (!rc) {
MM_ERR("INIT_INFO failed\n");
+ mutex_unlock(&adsp_info.lock);
return -ETIMEDOUT;
+
}
init_info_cmd_sent++;
}
+ mutex_unlock(&adsp_info.lock);
module = find_adsp_module_by_name(&adsp_info, name);
if (!module)
@@ -1016,16 +1018,50 @@
int adsp_set_clkrate(struct msm_adsp_module *module, unsigned long clk_rate)
{
+ if (!module)
+ return -EINVAL;
+
if (module->clk && clk_rate)
return clk_set_rate(module->clk, clk_rate);
return -EINVAL;
}
+int msm_adsp_generate_event(void *data,
+ struct msm_adsp_module *mod,
+ unsigned event_id,
+ unsigned event_length,
+ unsigned event_size,
+ void *msg)
+{
+ unsigned long flags;
+ void (*func)(void *, size_t);
+
+ if (!mod)
+ return -EINVAL;
+
+ if (event_size == sizeof(uint32_t))
+ func = read_event_32;
+ else if (event_size == sizeof(uint16_t))
+ func = read_event_16;
+ else
+ return -EINVAL;
+
+ spin_lock_irqsave(&adsp_cmd_lock, flags);
+ read_event_addr = msg;
+ read_event_size = event_length;
+ mod->ops->event(data, event_id, event_length, func);
+ spin_unlock_irqrestore(&adsp_cmd_lock, flags);
+ return 0;
+}
+
int msm_adsp_enable(struct msm_adsp_module *module)
{
int rc = 0;
+ if (!module)
+ return -EINVAL;
+
MM_INFO("enable '%s'state[%d] id[%d]\n",
module->name, module->state, module->id);
@@ -1053,7 +1089,7 @@
mutex_lock(&adsp_open_lock);
if (adsp_open_count++ == 0) {
- enable_irq(INT_ADSP);
+ enable_irq(adsp_info.int_adsp);
prevent_suspend();
}
mutex_unlock(&adsp_open_lock);
@@ -1078,6 +1114,9 @@
{
int rc = 0;
+ if (!module)
+ return -EINVAL;
+
mutex_lock(&module->lock);
rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_DISABLE_EVENT_RSP,
@@ -1092,6 +1131,9 @@
{
int rc = 0;
+ if (!module)
+ return -EINVAL;
+
switch (module->state) {
case ADSP_STATE_DISABLED:
MM_DBG("module '%s' already disabled\n", module->name);
@@ -1105,7 +1147,7 @@
clk_disable(module->clk);
mutex_lock(&adsp_open_lock);
if (--adsp_open_count == 0) {
- disable_irq(INT_ADSP);
+ disable_irq(adsp_info.int_adsp);
allow_suspend();
MM_DBG("disable interrupt\n");
}
@@ -1117,6 +1159,10 @@
int msm_adsp_disable(struct msm_adsp_module *module)
{
int rc;
+
+ if (!module)
+ return -EINVAL;
+
MM_INFO("disable '%s'\n", module->name);
mutex_lock(&module->lock);
rc = msm_adsp_disable_locked(module);
@@ -1130,8 +1176,11 @@
unsigned count;
int rc, i;
- if (pdev->id != (rpc_adsp_rtos_atom_vers & RPC_VERSION_MAJOR_MASK))
- return -EINVAL;
+ adsp_info.int_adsp = platform_get_irq(pdev, 0);
+ if (adsp_info.int_adsp < 0) {
+ MM_ERR("no irq resource?\n");
+ return -ENODEV;
+ }
wake_lock_init(&adsp_wake_lock, WAKE_LOCK_SUSPEND, "adsp");
adsp_info.init_info_ptr = kzalloc(
@@ -1157,12 +1206,13 @@
spin_lock_init(&adsp_cmd_lock);
spin_lock_init(&adsp_write_lock);
+ mutex_init(&adsp_info.lock);
- rc = request_irq(INT_ADSP, adsp_irq_handler, IRQF_TRIGGER_RISING,
- "adsp", 0);
+ rc = request_irq(adsp_info.int_adsp, adsp_irq_handler,
+ IRQF_TRIGGER_RISING, "adsp", 0);
if (rc < 0)
goto fail_request_irq;
- disable_irq(INT_ADSP);
+ disable_irq(adsp_info.int_adsp);
rpc_cb_server_client = msm_rpc_open();
if (IS_ERR(rpc_cb_server_client)) {
@@ -1214,8 +1264,8 @@
msm_rpc_close(rpc_cb_server_client);
rpc_cb_server_client = NULL;
fail_rpc_open:
- enable_irq(INT_ADSP);
- free_irq(INT_ADSP, 0);
+ enable_irq(adsp_info.int_adsp);
+ free_irq(adsp_info.int_adsp, 0);
fail_request_irq:
kfree(adsp_modules);
kfree(adsp_info.init_info_ptr);
@@ -1344,7 +1394,7 @@
},
};
-static char msm_adsp_driver_name[] = "rs00000000";
+static const char msm_adsp_driver_name[] = "msm_adsp";
#ifdef CONFIG_DEBUG_FS
static const struct file_operations adsp_debug_fops = {
@@ -1383,9 +1433,6 @@
rpc_adsp_rtos_mtoa_vers_comp = 0x00030001;
#endif
- snprintf(msm_adsp_driver_name, sizeof(msm_adsp_driver_name),
- "rs%08x",
- rpc_adsp_rtos_atom_prog);
msm_adsp_driver.driver.name = msm_adsp_driver_name;
rc = platform_driver_register(&msm_adsp_driver);
MM_INFO("%s -- %d\n", msm_adsp_driver_name, rc);
diff --git a/arch/arm/mach-msm/qdsp5/adsp.h b/arch/arm/mach-msm/qdsp5/adsp.h
index 0ef27b9..0f16111 100644
--- a/arch/arm/mach-msm/qdsp5/adsp.h
+++ b/arch/arm/mach-msm/qdsp5/adsp.h
@@ -1,7 +1,7 @@
/* arch/arm/mach-msm/qdsp5/adsp.h
*
* Copyright (C) 2008 Google, Inc.
- * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2008-2010, 2012 Code Aurora Forum. All rights reserved.
* Author: Iliyan Malchev <ibm@android.com>
*
* This software is licensed under the terms of the GNU General Public
@@ -117,6 +117,10 @@
struct adsp_rtos_mp_mtoa_init_info_type *init_info_ptr;
wait_queue_head_t init_info_wait;
unsigned init_info_state;
+ struct mutex lock;
+
+ /* Interrupt value */
+ int int_adsp;
};
#define RPC_ADSP_RTOS_ATOM_NULL_PROC 0
diff --git a/arch/arm/mach-msm/qdsp5/audio_aac.c b/arch/arm/mach-msm/qdsp5/audio_aac.c
index 5e1e655..de756eb 100644
--- a/arch/arm/mach-msm/qdsp5/audio_aac.c
+++ b/arch/arm/mach-msm/qdsp5/audio_aac.c
@@ -4,7 +4,7 @@
*
* Copyright (C) 2008 Google, Inc.
* Copyright (C) 2008 HTC Corporation
- * Copyright (c) 2008-2009, 2011 Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2008-2009, 2011-2012 Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -298,6 +298,7 @@
rc = -EFAULT;
else
rc = 0;
+ audio->stopped = 1;
wake_up(&audio->write_wait);
wake_up(&audio->read_wait);
msm_adsp_disable(audio->audplay);
@@ -672,24 +673,31 @@
static void audio_flush(struct audio *audio)
{
+ unsigned long flags;
+
+ spin_lock_irqsave(&audio->dsp_lock, flags);
audio->out[0].used = 0;
audio->out[1].used = 0;
audio->out_head = 0;
audio->out_tail = 0;
audio->reserved = 0;
audio->out_needed = 0;
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
atomic_set(&audio->out_bytes, 0);
}
static void audio_flush_pcm_buf(struct audio *audio)
{
uint8_t index;
+ unsigned long flags;
+ spin_lock_irqsave(&audio->dsp_lock, flags);
for (index = 0; index < PCM_BUF_MAX_COUNT; index++)
audio->in[index].used = 0;
audio->buf_refresh = 0;
audio->read_next = 0;
audio->fill_next = 0;
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
}
static int audaac_validate_usr_config(struct msm_audio_aac_config *config)
@@ -990,7 +998,6 @@
case AUDIO_STOP:
MM_DBG("AUDIO_STOP\n");
rc = audio_disable(audio);
- audio->stopped = 1;
audio_ioport_reset(audio);
audio->stopped = 0;
break;
diff --git a/arch/arm/mach-msm/qdsp5/audio_aac_in.c b/arch/arm/mach-msm/qdsp5/audio_aac_in.c
index c9e60d8..456a8ff 100644
--- a/arch/arm/mach-msm/qdsp5/audio_aac_in.c
+++ b/arch/arm/mach-msm/qdsp5/audio_aac_in.c
@@ -2,7 +2,7 @@
*
* aac audio input device
*
- * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This code is based in part on arch/arm/mach-msm/qdsp5v2/audio_aac_in.c,
* Copyright (C) 2008 Google, Inc.
@@ -320,9 +320,10 @@
audaac_in_dsp_enable(audio, 0);
- wake_up(&audio->wait);
wait_event_interruptible_timeout(audio->wait_enable,
audio->running == 0, 1*HZ);
+ audio->stopped = 1;
+ wake_up(&audio->wait);
msm_adsp_disable(audio->audrec);
if (audio->mode == MSM_AUD_ENC_MODE_TUNNEL) {
msm_adsp_disable(audio->audpre);
@@ -697,21 +698,23 @@
* sleep and knowing that system is not able
* to process io request at the moment
*/
- wake_up(&audio->write_wait);
- mutex_lock(&audio->write_lock);
- audaac_in_flush(audio);
- mutex_unlock(&audio->write_lock);
wake_up(&audio->wait);
mutex_lock(&audio->read_lock);
- audaac_out_flush(audio);
+ audaac_in_flush(audio);
mutex_unlock(&audio->read_lock);
+ wake_up(&audio->write_wait);
+ mutex_lock(&audio->write_lock);
+ audaac_out_flush(audio);
+ mutex_unlock(&audio->write_lock);
}
static void audaac_in_flush(struct audio_aac_in *audio)
{
int i;
+ unsigned long flags;
audio->dsp_cnt = 0;
+ spin_lock_irqsave(&audio->dsp_lock, flags);
audio->in_head = 0;
audio->in_tail = 0;
audio->in_count = 0;
@@ -720,6 +723,7 @@
audio->in[i].size = 0;
audio->in[i].read = 0;
}
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
MM_DBG("in_bytes %d\n", atomic_read(&audio->in_bytes));
MM_DBG("in_samples %d\n", atomic_read(&audio->in_samples));
atomic_set(&audio->in_bytes, 0);
@@ -729,15 +733,18 @@
static void audaac_out_flush(struct audio_aac_in *audio)
{
int i;
+ unsigned long flags;
audio->out_head = 0;
- audio->out_tail = 0;
audio->out_count = 0;
+ spin_lock_irqsave(&audio->dsp_lock, flags);
+ audio->out_tail = 0;
for (i = OUT_FRAME_NUM-1; i >= 0; i--) {
audio->out[i].size = 0;
audio->out[i].read = 0;
audio->out[i].used = 0;
}
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
}
/* ------------------- device --------------------- */
@@ -777,7 +784,6 @@
}
case AUDIO_STOP: {
rc = audaac_in_disable(audio);
- audio->stopped = 1;
break;
}
case AUDIO_FLUSH: {
diff --git a/arch/arm/mach-msm/qdsp5/audio_amrnb.c b/arch/arm/mach-msm/qdsp5/audio_amrnb.c
index 476a63d..d66a270 100644
--- a/arch/arm/mach-msm/qdsp5/audio_amrnb.c
+++ b/arch/arm/mach-msm/qdsp5/audio_amrnb.c
@@ -2,7 +2,7 @@
*
* amrnb audio decoder device
*
- * Copyright (c) 2008-2009, 2011 Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2008-2009, 2011-2012 Code Aurora Forum. All rights reserved.
*
* Based on the mp3 native driver in arch/arm/mach-msm/qdsp5/audio_mp3.c
*
@@ -302,6 +302,7 @@
rc = -EFAULT;
else
rc = 0;
+ audio->stopped = 1;
wake_up(&audio->write_wait);
wake_up(&audio->read_wait);
msm_adsp_disable(audio->audplay);
@@ -628,24 +629,31 @@
static void audamrnb_flush(struct audio *audio)
{
+ unsigned long flags;
+
+ spin_lock_irqsave(&audio->dsp_lock, flags);
audio->out[0].used = 0;
audio->out[1].used = 0;
audio->out_head = 0;
audio->out_tail = 0;
audio->out_needed = 0;
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
atomic_set(&audio->out_bytes, 0);
}
static void audamrnb_flush_pcm_buf(struct audio *audio)
{
uint8_t index;
+ unsigned long flags;
+ spin_lock_irqsave(&audio->dsp_lock, flags);
for (index = 0; index < PCM_BUF_MAX_COUNT; index++)
audio->in[index].used = 0;
audio->buf_refresh = 0;
audio->read_next = 0;
audio->fill_next = 0;
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
}
static void audamrnb_ioport_reset(struct audio *audio)
@@ -876,7 +884,6 @@
case AUDIO_STOP:
MM_DBG("AUDIO_STOP\n");
rc = audamrnb_disable(audio);
- audio->stopped = 1;
audamrnb_ioport_reset(audio);
audio->stopped = 0;
break;
diff --git a/arch/arm/mach-msm/qdsp5/audio_amrwb.c b/arch/arm/mach-msm/qdsp5/audio_amrwb.c
index e811731..b566c60 100644
--- a/arch/arm/mach-msm/qdsp5/audio_amrwb.c
+++ b/arch/arm/mach-msm/qdsp5/audio_amrwb.c
@@ -6,7 +6,7 @@
*
* Copyright (C) 2008 Google, Inc.
* Copyright (C) 2008 HTC Corporation
- * Copyright (c) 2009, 2011 Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2009, 2011-2012 Code Aurora Forum. All rights reserved.
*
* All source code in this file is licensed under the following license except
* where indicated.
@@ -299,6 +299,7 @@
rc = -EFAULT;
else
rc = 0;
+ audio->stopped = 1;
wake_up(&audio->write_wait);
wake_up(&audio->read_wait);
msm_adsp_disable(audio->audplay);
@@ -616,25 +617,32 @@
static void audamrwb_flush(struct audio *audio)
{
+ unsigned long flags;
+
+ spin_lock_irqsave(&audio->dsp_lock, flags);
audio->out[0].used = 0;
audio->out[1].used = 0;
audio->out_head = 0;
audio->out_tail = 0;
audio->reserved = 0;
audio->out_needed = 0;
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
atomic_set(&audio->out_bytes, 0);
}
static void audamrwb_flush_pcm_buf(struct audio *audio)
{
uint8_t index;
+ unsigned long flags;
+ spin_lock_irqsave(&audio->dsp_lock, flags);
for (index = 0; index < PCM_BUF_MAX_COUNT; index++)
audio->in[index].used = 0;
audio->buf_refresh = 0;
audio->read_next = 0;
audio->fill_next = 0;
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
}
static void audamrwb_ioport_reset(struct audio *audio)
@@ -865,7 +873,6 @@
case AUDIO_STOP:
MM_DBG("AUDIO_STOP\n");
rc = audamrwb_disable(audio);
- audio->stopped = 1;
audamrwb_ioport_reset(audio);
audio->stopped = 0;
break;
diff --git a/arch/arm/mach-msm/qdsp5/audio_evrc.c b/arch/arm/mach-msm/qdsp5/audio_evrc.c
index 3c39b6d..86035db 100644
--- a/arch/arm/mach-msm/qdsp5/audio_evrc.c
+++ b/arch/arm/mach-msm/qdsp5/audio_evrc.c
@@ -1,6 +1,6 @@
/* arch/arm/mach-msm/audio_evrc.c
*
- * Copyright (c) 2008-2009, 2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2008-2009, 2011-2012 Code Aurora Forum. All rights reserved.
*
* This code also borrows from audio_aac.c, which is
* Copyright (C) 2008 Google, Inc.
@@ -291,6 +291,7 @@
rc = -EFAULT;
else
rc = 0;
+ audio->stopped = 1;
wake_up(&audio->write_wait);
wake_up(&audio->read_wait);
msm_adsp_disable(audio->audplay);
@@ -615,24 +616,30 @@
static void audevrc_flush(struct audio *audio)
{
+ unsigned long flags;
+
+ spin_lock_irqsave(&audio->dsp_lock, flags);
audio->out[0].used = 0;
audio->out[1].used = 0;
audio->out_head = 0;
audio->out_tail = 0;
audio->out_needed = 0;
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
atomic_set(&audio->out_bytes, 0);
}
static void audevrc_flush_pcm_buf(struct audio *audio)
{
uint8_t index;
+ unsigned long flags;
+ spin_lock_irqsave(&audio->dsp_lock, flags);
for (index = 0; index < PCM_BUF_MAX_COUNT; index++)
audio->in[index].used = 0;
-
audio->buf_refresh = 0;
audio->read_next = 0;
audio->fill_next = 0;
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
}
static void audevrc_ioport_reset(struct audio *audio)
@@ -863,7 +870,6 @@
case AUDIO_STOP:
MM_DBG("AUDIO_STOP\n");
rc = audevrc_disable(audio);
- audio->stopped = 1;
audevrc_ioport_reset(audio);
audio->stopped = 0;
break;
diff --git a/arch/arm/mach-msm/qdsp5/audio_evrc_in.c b/arch/arm/mach-msm/qdsp5/audio_evrc_in.c
index 7a5536a..0bdbf5d 100644
--- a/arch/arm/mach-msm/qdsp5/audio_evrc_in.c
+++ b/arch/arm/mach-msm/qdsp5/audio_evrc_in.c
@@ -2,7 +2,7 @@
*
* evrc audio input device
*
- * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This code is based in part on arch/arm/mach-msm/qdsp5v2/audio_evrc_in.c,
* Copyright (C) 2008 Google, Inc.
@@ -281,6 +281,8 @@
wake_up(&audio->wait);
wait_event_interruptible_timeout(audio->wait_enable,
audio->running == 0, 1*HZ);
+ audio->stopped = 1;
+ wake_up(&audio->wait);
msm_adsp_disable(audio->audrec);
if (audio->mode == MSM_AUD_ENC_MODE_TUNNEL) {
msm_adsp_disable(audio->audpre);
@@ -655,21 +657,23 @@
* sleep and knowing that system is not able
* to process io request at the moment
*/
- wake_up(&audio->write_wait);
- mutex_lock(&audio->write_lock);
- audevrc_in_flush(audio);
- mutex_unlock(&audio->write_lock);
wake_up(&audio->wait);
mutex_lock(&audio->read_lock);
- audevrc_out_flush(audio);
+ audevrc_in_flush(audio);
mutex_unlock(&audio->read_lock);
+ wake_up(&audio->write_wait);
+ mutex_lock(&audio->write_lock);
+ audevrc_out_flush(audio);
+ mutex_unlock(&audio->write_lock);
}
static void audevrc_in_flush(struct audio_evrc_in *audio)
{
int i;
+ unsigned long flags;
audio->dsp_cnt = 0;
+ spin_lock_irqsave(&audio->dsp_lock, flags);
audio->in_head = 0;
audio->in_tail = 0;
audio->in_count = 0;
@@ -678,6 +682,7 @@
audio->in[i].size = 0;
audio->in[i].read = 0;
}
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
MM_DBG("in_bytes %d\n", atomic_read(&audio->in_bytes));
MM_DBG("in_samples %d\n", atomic_read(&audio->in_samples));
atomic_set(&audio->in_bytes, 0);
@@ -687,15 +692,18 @@
static void audevrc_out_flush(struct audio_evrc_in *audio)
{
int i;
+ unsigned long flags;
audio->out_head = 0;
- audio->out_tail = 0;
audio->out_count = 0;
+ spin_lock_irqsave(&audio->dsp_lock, flags);
+ audio->out_tail = 0;
for (i = OUT_FRAME_NUM-1; i >= 0; i--) {
audio->out[i].size = 0;
audio->out[i].read = 0;
audio->out[i].used = 0;
}
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
}
/* ------------------- device --------------------- */
@@ -735,7 +743,6 @@
}
case AUDIO_STOP: {
rc = audevrc_in_disable(audio);
- audio->stopped = 1;
break;
}
case AUDIO_FLUSH: {
diff --git a/arch/arm/mach-msm/qdsp5/audio_mp3.c b/arch/arm/mach-msm/qdsp5/audio_mp3.c
index c4b464a..f6fa62a 100644
--- a/arch/arm/mach-msm/qdsp5/audio_mp3.c
+++ b/arch/arm/mach-msm/qdsp5/audio_mp3.c
@@ -4,7 +4,7 @@
*
* Copyright (C) 2008 Google, Inc.
* Copyright (C) 2008 HTC Corporation
- * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -368,6 +368,7 @@
rc = -EFAULT;
else
rc = 0;
+ audio->stopped = 1;
wake_up(&audio->write_wait);
wake_up(&audio->read_wait);
msm_adsp_disable(audio->audplay);
@@ -853,12 +854,16 @@
static void audio_flush(struct audio *audio)
{
+ unsigned long flags;
+
+ spin_lock_irqsave(&audio->dsp_lock, flags);
audio->out[0].used = 0;
audio->out[1].used = 0;
audio->out_head = 0;
audio->out_tail = 0;
audio->reserved = 0;
audio->out_needed = 0;
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
atomic_set(&audio->out_bytes, 0);
}
@@ -885,13 +890,15 @@
static void audio_flush_pcm_buf(struct audio *audio)
{
uint8_t index;
+ unsigned long flags;
+ spin_lock_irqsave(&audio->dsp_lock, flags);
for (index = 0; index < PCM_BUF_MAX_COUNT; index++)
audio->in[index].used = 0;
-
audio->buf_refresh = 0;
audio->read_next = 0;
audio->fill_next = 0;
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
}
static void audio_ioport_reset(struct audio *audio)
@@ -1366,7 +1373,6 @@
case AUDIO_STOP:
MM_DBG("AUDIO_STOP\n");
rc = audio_disable(audio);
- audio->stopped = 1;
audio_ioport_reset(audio);
audio->stopped = 0;
break;
diff --git a/arch/arm/mach-msm/qdsp5/audio_mvs.c b/arch/arm/mach-msm/qdsp5/audio_mvs.c
index 9c27485..5ccd18b 100644
--- a/arch/arm/mach-msm/qdsp5/audio_mvs.c
+++ b/arch/arm/mach-msm/qdsp5/audio_mvs.c
@@ -25,7 +25,7 @@
#define MVS_PROG 0x30000014
#define MVS_VERS 0x00030001
-#define MVS_VERS_COMP_VER2 0x00020001
+#define MVS_VERS_COMP_VER2 0x00060001
#define MVS_VERS_COMP_VER3 0x00030001
@@ -67,6 +67,8 @@
#define MVS_FRAME_MODE_G711_DL 10
#define MVS_FRAME_MODE_PCM_UL 13
#define MVS_FRAME_MODE_PCM_DL 14
+#define MVS_FRAME_MODE_PCM_WB_UL 23
+#define MVS_FRAME_MODE_PCM_WB_DL 24
#define MVS_FRAME_MODE_G729A_UL 17
#define MVS_FRAME_MODE_G729A_DL 18
#define MVS_FRAME_MODE_G711A_UL 19
@@ -404,6 +406,11 @@
audio->frame_mode = MVS_FRAME_MODE_PCM_DL;
break;
}
+ case MVS_MODE_PCM_WB: {
+ audio->rate_type = MVS_AMR_MODE_UNDEF;
+ audio->frame_mode = MVS_FRAME_MODE_PCM_WB_DL;
+ break;
+ }
case MVS_MODE_IS127:
case MVS_MODE_IS733:
case MVS_MODE_4GV_NB:
diff --git a/arch/arm/mach-msm/qdsp5/audio_out.c b/arch/arm/mach-msm/qdsp5/audio_out.c
index 7c56037..7d33e05 100644
--- a/arch/arm/mach-msm/qdsp5/audio_out.c
+++ b/arch/arm/mach-msm/qdsp5/audio_out.c
@@ -247,6 +247,7 @@
audpp_disable(-1, audio);
+ audio->stopped = 1;
wake_up(&audio->wait);
audmgr_disable(&audio->audmgr);
audio->out_needed = 0;
@@ -519,7 +520,6 @@
break;
case AUDIO_STOP:
rc = audio_disable(audio);
- audio->stopped = 1;
break;
case AUDIO_FLUSH:
if (audio->stopped) {
diff --git a/arch/arm/mach-msm/qdsp5/audio_pcm.c b/arch/arm/mach-msm/qdsp5/audio_pcm.c
index 02103fc..6468e93 100644
--- a/arch/arm/mach-msm/qdsp5/audio_pcm.c
+++ b/arch/arm/mach-msm/qdsp5/audio_pcm.c
@@ -1,7 +1,7 @@
/* audio_pcm.c - pcm audio decoder driver
*
- * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
*
* Based on the mp3 decoder driver in arch/arm/mach-msm/qdsp5/audio_mp3.c
*
@@ -336,6 +336,7 @@
rc = -EFAULT;
else
rc = 0;
+ audio->stopped = 1;
wake_up(&audio->write_wait);
msm_adsp_disable(audio->audplay);
audpp_disable(audio->dec_id, audio);
@@ -639,12 +640,16 @@
static void audio_flush(struct audio *audio)
{
+ unsigned long flags;
+
+ spin_lock_irqsave(&audio->dsp_lock, flags);
audio->out[0].used = 0;
audio->out[1].used = 0;
audio->out_head = 0;
audio->out_tail = 0;
audio->reserved = 0;
audio->out_needed = 0;
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
atomic_set(&audio->out_bytes, 0);
}
@@ -1041,7 +1046,6 @@
case AUDIO_STOP:
MM_DBG("AUDIO_STOP\n");
rc = audio_disable(audio);
- audio->stopped = 1;
audio_ioport_reset(audio);
audio->stopped = 0;
break;
diff --git a/arch/arm/mach-msm/qdsp5/audio_pcm_in.c b/arch/arm/mach-msm/qdsp5/audio_pcm_in.c
index 81813a0..16c70ce 100644
--- a/arch/arm/mach-msm/qdsp5/audio_pcm_in.c
+++ b/arch/arm/mach-msm/qdsp5/audio_pcm_in.c
@@ -218,6 +218,7 @@
audpcm_in_dsp_enable(audio, 0);
+ audio->stopped = 1;
wake_up(&audio->wait);
msm_adsp_disable(audio->audrec);
@@ -613,7 +614,6 @@
}
case AUDIO_STOP:
rc = audpcm_in_disable(audio);
- audio->stopped = 1;
break;
case AUDIO_FLUSH:
if (audio->stopped) {
diff --git a/arch/arm/mach-msm/qdsp5/audio_qcelp.c b/arch/arm/mach-msm/qdsp5/audio_qcelp.c
index b12e713..2be5144 100644
--- a/arch/arm/mach-msm/qdsp5/audio_qcelp.c
+++ b/arch/arm/mach-msm/qdsp5/audio_qcelp.c
@@ -2,7 +2,7 @@
*
* qcelp 13k audio decoder device
*
- * Copyright (c) 2008-2009, 2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2008-2009, 2011-2012 Code Aurora Forum. All rights reserved.
*
* This code is based in part on audio_mp3.c, which is
* Copyright (C) 2008 Google, Inc.
@@ -288,6 +288,7 @@
rc = -EFAULT;
else
rc = 0;
+ audio->stopped = 1;
wake_up(&audio->write_wait);
wake_up(&audio->read_wait);
msm_adsp_disable(audio->audplay);
@@ -612,23 +613,30 @@
static void audqcelp_flush(struct audio *audio)
{
+ unsigned long flags;
+
+ spin_lock_irqsave(&audio->dsp_lock, flags);
audio->out[0].used = 0;
audio->out[1].used = 0;
audio->out_head = 0;
audio->out_tail = 0;
audio->out_needed = 0;
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
}
static void audqcelp_flush_pcm_buf(struct audio *audio)
{
uint8_t index;
+ unsigned long flags;
+ spin_lock_irqsave(&audio->dsp_lock, flags);
for (index = 0; index < PCM_BUF_MAX_COUNT; index++)
audio->in[index].used = 0;
audio->buf_refresh = 0;
audio->read_next = 0;
audio->fill_next = 0;
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
}
static void audqcelp_ioport_reset(struct audio *audio)
@@ -859,7 +867,6 @@
case AUDIO_STOP:
MM_DBG("AUDIO_STOP\n");
rc = audqcelp_disable(audio);
- audio->stopped = 1;
audqcelp_ioport_reset(audio);
audio->stopped = 0;
break;
diff --git a/arch/arm/mach-msm/qdsp5/audio_qcelp_in.c b/arch/arm/mach-msm/qdsp5/audio_qcelp_in.c
index a339825..a79f721 100644
--- a/arch/arm/mach-msm/qdsp5/audio_qcelp_in.c
+++ b/arch/arm/mach-msm/qdsp5/audio_qcelp_in.c
@@ -2,7 +2,7 @@
*
* qcelp audio input device
*
- * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This code is based in part on arch/arm/mach-msm/qdsp5v2/audio_qcelp_in.c,
* Copyright (C) 2008 Google, Inc.
@@ -279,9 +279,10 @@
audqcelp_in_dsp_enable(audio, 0);
- wake_up(&audio->wait);
wait_event_interruptible_timeout(audio->wait_enable,
audio->running == 0, 1*HZ);
+ audio->stopped = 1;
+ wake_up(&audio->wait);
msm_adsp_disable(audio->audrec);
if (audio->mode == MSM_AUD_ENC_MODE_TUNNEL) {
msm_adsp_disable(audio->audpre);
@@ -657,29 +658,32 @@
* sleep and knowing that system is not able
* to process io request at the moment
*/
- wake_up(&audio->write_wait);
- mutex_lock(&audio->write_lock);
- audqcelp_in_flush(audio);
- mutex_unlock(&audio->write_lock);
wake_up(&audio->wait);
mutex_lock(&audio->read_lock);
- audqcelp_out_flush(audio);
+ audqcelp_in_flush(audio);
mutex_unlock(&audio->read_lock);
+ wake_up(&audio->write_wait);
+ mutex_lock(&audio->write_lock);
+ audqcelp_out_flush(audio);
+ mutex_unlock(&audio->write_lock);
}
static void audqcelp_in_flush(struct audio_qcelp_in *audio)
{
int i;
+ unsigned long flags;
+ audio->eos_ack = 0;
+ spin_lock_irqsave(&audio->dsp_lock, flags);
audio->dsp_cnt = 0;
audio->in_head = 0;
audio->in_tail = 0;
audio->in_count = 0;
- audio->eos_ack = 0;
for (i = FRAME_NUM-1; i >= 0; i--) {
audio->in[i].size = 0;
audio->in[i].read = 0;
}
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
MM_DBG("in_bytes %d\n", atomic_read(&audio->in_bytes));
MM_DBG("in_samples %d\n", atomic_read(&audio->in_samples));
atomic_set(&audio->in_bytes, 0);
@@ -689,15 +693,18 @@
static void audqcelp_out_flush(struct audio_qcelp_in *audio)
{
int i;
+ unsigned long flags;
audio->out_head = 0;
- audio->out_tail = 0;
audio->out_count = 0;
+ spin_lock_irqsave(&audio->dsp_lock, flags);
+ audio->out_tail = 0;
for (i = OUT_FRAME_NUM-1; i >= 0; i--) {
audio->out[i].size = 0;
audio->out[i].read = 0;
audio->out[i].used = 0;
}
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
}
/* ------------------- device --------------------- */
@@ -737,7 +744,6 @@
}
case AUDIO_STOP: {
rc = audqcelp_in_disable(audio);
- audio->stopped = 1;
break;
}
case AUDIO_FLUSH: {
diff --git a/arch/arm/mach-msm/qdsp5/audio_voicememo.c b/arch/arm/mach-msm/qdsp5/audio_voicememo.c
index b7e8e1c..2011c42 100644
--- a/arch/arm/mach-msm/qdsp5/audio_voicememo.c
+++ b/arch/arm/mach-msm/qdsp5/audio_voicememo.c
@@ -4,7 +4,7 @@
*
* Copyright (C) 2008 Google, Inc.
* Copyright (C) 2008 HTC Corporation
- * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
*
* This code is based in part on arch/arm/mach-msm/qdsp5/audio_mp3.c
*
@@ -266,7 +266,9 @@
audio->in[index].used = 0;
audio->read_next = 0;
+ mutex_lock(&audio->dsp_lock);
audio->fill_next = 0;
+ mutex_unlock(&audio->dsp_lock);
}
static void audvoicememo_ioport_reset(struct audio_voicememo *audio)
@@ -387,6 +389,7 @@
rc = msm_rpc_write(audio->sndept, &rhdr, sizeof(rhdr));
wait_event_timeout(audio->wait, audio->stopped == 0,
1 * HZ);
+ audio->stopped = 1;
wake_up(&audio->read_wait);
audmgr_disable(&audio->audmgr);
audio->enabled = 0;
@@ -536,12 +539,14 @@
callback time\n");
else if (rec_status == RPC_VOC_REC_STAT_AUTO_STOP) {
MM_DBG(" Voice Record AUTO STOP\n");
+ mutex_lock(&audio->lock);
+ audio->stopped = 1;
wake_up(&audio->read_wait);
audmgr_disable(&audio->audmgr);
- audio->stopped = 1;
audvoicememo_ioport_reset(audio);
audio->stopped = 0;
audio->enabled = 0;
+ mutex_unlock(&audio->lock);
}
break;
}
@@ -648,7 +653,6 @@
case AUDIO_STOP: {
MM_DBG("AUDIO_STOP\n");
rc = audvoicememo_disable(audio);
- audio->stopped = 1;
audvoicememo_ioport_reset(audio);
audio->stopped = 0;
MM_DBG("AUDIO_STOP rc %d\n", rc);
@@ -832,6 +836,7 @@
file->private_data = audio;
audio->opened = 1;
+ audio->stopped = 0;
rc = 0;
done:
mutex_unlock(&audio->lock);
diff --git a/arch/arm/mach-msm/qdsp5/audio_wma.c b/arch/arm/mach-msm/qdsp5/audio_wma.c
index cf2ade4..674ee4f 100644
--- a/arch/arm/mach-msm/qdsp5/audio_wma.c
+++ b/arch/arm/mach-msm/qdsp5/audio_wma.c
@@ -1,6 +1,6 @@
/* audio_wma.c - wma audio decoder driver
*
- * Copyright (c) 2009, 2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2009, 2011-2012, Code Aurora Forum. All rights reserved.
*
* Based on the mp3 native driver in arch/arm/mach-msm/qdsp5/audio_mp3.c
*
@@ -306,6 +306,7 @@
rc = -EFAULT;
else
rc = 0;
+ audio->stopped = 1;
wake_up(&audio->write_wait);
wake_up(&audio->read_wait);
msm_adsp_disable(audio->audplay);
@@ -659,11 +660,15 @@
static void audio_flush(struct audio *audio)
{
+ unsigned long flags;
+
+ spin_lock_irqsave(&audio->dsp_lock, flags);
audio->out[0].used = 0;
audio->out[1].used = 0;
audio->out_head = 0;
audio->out_tail = 0;
audio->reserved = 0;
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
atomic_set(&audio->out_bytes, 0);
}
@@ -671,11 +676,15 @@
{
uint8_t index;
+ unsigned long flags;
+
+ spin_lock_irqsave(&audio->dsp_lock, flags);
for (index = 0; index < PCM_BUF_MAX_COUNT; index++)
audio->in[index].used = 0;
audio->buf_refresh = 0;
audio->read_next = 0;
audio->fill_next = 0;
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
}
static void audio_ioport_reset(struct audio *audio)
@@ -905,7 +914,6 @@
case AUDIO_STOP:
MM_DBG("AUDIO_STOP\n");
rc = audio_disable(audio);
- audio->stopped = 1;
audio_ioport_reset(audio);
audio->stopped = 0;
break;
diff --git a/arch/arm/mach-msm/qdsp5/audio_wmapro.c b/arch/arm/mach-msm/qdsp5/audio_wmapro.c
index d9b384a..c2a0b93 100644
--- a/arch/arm/mach-msm/qdsp5/audio_wmapro.c
+++ b/arch/arm/mach-msm/qdsp5/audio_wmapro.c
@@ -4,7 +4,7 @@
*
* Copyright (C) 2008 Google, Inc.
* Copyright (C) 2008 HTC Corporation
- * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
*
* All source code in this file is licensed under the following license except
* where indicated.
@@ -301,6 +301,7 @@
rc = -EFAULT;
else
rc = 0;
+ audio->stopped = 1;
wake_up(&audio->write_wait);
wake_up(&audio->read_wait);
msm_adsp_disable(audio->audplay);
@@ -648,23 +649,30 @@
static void audio_flush(struct audio *audio)
{
+ unsigned long flags;
+
+ spin_lock_irqsave(&audio->dsp_lock, flags);
audio->out[0].used = 0;
audio->out[1].used = 0;
audio->out_head = 0;
audio->out_tail = 0;
audio->reserved = 0;
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
atomic_set(&audio->out_bytes, 0);
}
static void audio_flush_pcm_buf(struct audio *audio)
{
uint8_t index;
+ unsigned long flags;
+ spin_lock_irqsave(&audio->dsp_lock, flags);
for (index = 0; index < PCM_BUF_MAX_COUNT; index++)
audio->in[index].used = 0;
audio->buf_refresh = 0;
audio->read_next = 0;
audio->fill_next = 0;
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
}
static void audio_ioport_reset(struct audio *audio)
@@ -894,7 +902,6 @@
case AUDIO_STOP:
MM_DBG("AUDIO_STOP\n");
rc = audio_disable(audio);
- audio->stopped = 1;
audio_ioport_reset(audio);
audio->stopped = 0;
break;
diff --git a/arch/arm/mach-msm/qdsp5/audpp.c b/arch/arm/mach-msm/qdsp5/audpp.c
index 3e834d8..2dbb5dc0 100644
--- a/arch/arm/mach-msm/qdsp5/audpp.c
+++ b/arch/arm/mach-msm/qdsp5/audpp.c
@@ -4,7 +4,7 @@
* common code to deal with the AUDPP dsp task (audio postproc)
*
* Copyright (C) 2008 Google, Inc.
- * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2009-2010, 2012 Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -124,6 +124,8 @@
uint16_t avsync[CH_COUNT * AUDPP_CLNT_MAX_COUNT + 1];
struct audpp_event_callback *cb_tbl[MAX_EVENT_CALLBACK_CLIENTS];
+ spinlock_t avsync_lock;
+
wait_queue_head_t event_wait;
};
@@ -237,13 +239,24 @@
}
}
+static void audpp_fake_event(struct audpp_state *audpp, int id,
+ unsigned event, unsigned arg)
+{
+ uint16_t msg[1];
+ msg[0] = arg;
+ audpp->func[id] (audpp->private[id], event, msg);
+}
+
static void audpp_dsp_event(void *data, unsigned id, size_t len,
void (*getevent) (void *ptr, size_t len))
{
struct audpp_state *audpp = data;
+ unsigned long flags;
uint16_t msg[8];
+ int cid = 0;
if (id == AUDPP_MSG_AVSYNC_MSG) {
+ spin_lock_irqsave(&audpp->avsync_lock, flags);
getevent(audpp->avsync, sizeof(audpp->avsync));
/* mask off any channels we're not watching to avoid
@@ -252,6 +265,7 @@
* we next read...
*/
audpp->avsync[0] &= audpp->avsync_mask;
+ spin_unlock_irqrestore(&audpp->avsync_lock, flags);
return;
}
@@ -278,13 +292,28 @@
case AUDPP_MSG_CFG_MSG:
if (msg[0] == AUDPP_MSG_ENA_ENA) {
MM_INFO("ENABLE\n");
- audpp->enabled = 1;
- audpp_broadcast(audpp, id, msg);
+ if (!audpp->enabled) {
+ audpp->enabled = 1;
+ audpp_broadcast(audpp, id, msg);
+ } else {
+ cid = msg[1];
+ audpp_fake_event(audpp, cid,
+ id, AUDPP_MSG_ENA_ENA);
+ }
+
} else if (msg[0] == AUDPP_MSG_ENA_DIS) {
- MM_INFO("DISABLE\n");
- audpp->enabled = 0;
- wake_up(&audpp->event_wait);
- audpp_broadcast(audpp, id, msg);
+ if (audpp->open_count == 0) {
+ MM_INFO("DISABLE\n");
+ audpp->enabled = 0;
+ wake_up(&audpp->event_wait);
+ audpp_broadcast(audpp, id, msg);
+ } else {
+ cid = msg[1];
+ audpp_fake_event(audpp, cid,
+ id, AUDPP_MSG_ENA_DIS);
+ audpp->func[cid] = NULL;
+ audpp->private[cid] = NULL;
+ }
} else {
MM_ERR("invalid config msg %d\n", msg[0]);
}
@@ -307,17 +336,10 @@
.event = audpp_dsp_event,
};
-static void audpp_fake_event(struct audpp_state *audpp, int id,
- unsigned event, unsigned arg)
-{
- uint16_t msg[1];
- msg[0] = arg;
- audpp->func[id] (audpp->private[id], event, msg);
-}
-
int audpp_enable(int id, audpp_event_func func, void *private)
{
struct audpp_state *audpp = &the_audpp_state;
+ uint16_t msg[8];
int res = 0;
if (id < -1 || id > 4)
@@ -350,12 +372,15 @@
msm_adsp_enable(audpp->mod);
audpp_dsp_config(1);
} else {
- unsigned long flags;
- local_irq_save(flags);
- if (audpp->enabled)
- audpp_fake_event(audpp, id,
- AUDPP_MSG_CFG_MSG, AUDPP_MSG_ENA_ENA);
- local_irq_restore(flags);
+ if (audpp->enabled) {
+ msg[0] = AUDPP_MSG_ENA_ENA;
+ msg[1] = id;
+ res = msm_adsp_generate_event(audpp, audpp->mod,
+ AUDPP_MSG_CFG_MSG, sizeof(msg),
+ sizeof(uint16_t), (void *)msg);
+ if (res < 0)
+ goto out;
+ }
}
res = 0;
@@ -368,7 +393,7 @@
void audpp_disable(int id, void *private)
{
struct audpp_state *audpp = &the_audpp_state;
- unsigned long flags;
+ uint16_t msg[8];
int rc;
if (id < -1 || id > 4)
@@ -384,11 +409,13 @@
if (audpp->private[id] != private)
goto out;
- local_irq_save(flags);
- audpp_fake_event(audpp, id, AUDPP_MSG_CFG_MSG, AUDPP_MSG_ENA_DIS);
- audpp->func[id] = NULL;
- audpp->private[id] = NULL;
- local_irq_restore(flags);
+ msg[0] = AUDPP_MSG_ENA_DIS;
+ msg[1] = id;
+ rc = msm_adsp_generate_event(audpp, audpp->mod,
+ AUDPP_MSG_CFG_MSG, sizeof(msg),
+ sizeof(uint16_t), (void *)msg);
+ if (rc < 0)
+ goto out;
if (--audpp->open_count == 0) {
MM_DBG("disable\n");
@@ -420,13 +447,13 @@
if (BAD_ID(id))
return;
- local_irq_save(flags);
+ spin_lock_irqsave(&the_audpp_state.avsync_lock, flags);
if (rate)
the_audpp_state.avsync_mask |= (1 << id);
else
the_audpp_state.avsync_mask &= (~(1 << id));
the_audpp_state.avsync[0] &= the_audpp_state.avsync_mask;
- local_irq_restore(flags);
+ spin_unlock_irqrestore(&the_audpp_state.avsync_lock, flags);
cmd.cmd_id = AUDPP_CMD_AVSYNC;
cmd.object_number = id;
@@ -438,7 +465,8 @@
unsigned audpp_avsync_sample_count(int id)
{
- uint16_t *avsync = the_audpp_state.avsync;
+ struct audpp_state *audpp = &the_audpp_state;
+ uint16_t *avsync = audpp->avsync;
unsigned val;
unsigned long flags;
unsigned mask;
@@ -448,12 +476,12 @@
mask = 1 << id;
id = id * AUDPP_AVSYNC_INFO_SIZE + 2;
- local_irq_save(flags);
+ spin_lock_irqsave(&audpp->avsync_lock, flags);
if (avsync[0] & mask)
val = (avsync[id] << 16) | avsync[id + 1];
else
val = 0;
- local_irq_restore(flags);
+ spin_unlock_irqrestore(&audpp->avsync_lock, flags);
return val;
}
@@ -461,7 +489,8 @@
unsigned audpp_avsync_byte_count(int id)
{
- uint16_t *avsync = the_audpp_state.avsync;
+ struct audpp_state *audpp = &the_audpp_state;
+ uint16_t *avsync = audpp->avsync;
unsigned val;
unsigned long flags;
unsigned mask;
@@ -471,12 +500,12 @@
mask = 1 << id;
id = id * AUDPP_AVSYNC_INFO_SIZE + 5;
- local_irq_save(flags);
+ spin_lock_irqsave(&audpp->avsync_lock, flags);
if (avsync[0] & mask)
val = (avsync[id] << 16) | avsync[id + 1];
else
val = 0;
- local_irq_restore(flags);
+ spin_unlock_irqrestore(&audpp->avsync_lock, flags);
return val;
}
@@ -826,6 +855,8 @@
init_waitqueue_head(&audpp->event_wait);
+ spin_lock_init(&audpp->avsync_lock);
+
for (idx = 0; idx < audpp->dec_database->num_dec; idx++) {
audpp->dec_info_table[idx].codec = -1;
audpp->dec_info_table[idx].pid = 0;
diff --git a/arch/arm/mach-msm/qdsp5v2/adsp.c b/arch/arm/mach-msm/qdsp5v2/adsp.c
index b7b56c8..acd9c4c 100644
--- a/arch/arm/mach-msm/qdsp5v2/adsp.c
+++ b/arch/arm/mach-msm/qdsp5v2/adsp.c
@@ -2,7 +2,7 @@
* Register/Interrupt access for userspace aDSP library.
*
* Copyright (C) 2008 Google, Inc.
- * Copyright (c) 2008-2009,2011 Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2008-2009,2011-2012 Code Aurora Forum. All rights reserved.
* Author: Iliyan Malchev <ibm@android.com>
*
* This software is licensed under the terms of the GNU General Public
@@ -46,8 +46,6 @@
static int wdump, rdump;
#endif /* CONFIG_DEBUG_FS */
-#define INT_ADSP INT_ADSP_A9_A11
-
static struct adsp_info adsp_info;
static struct msm_adsp_module *adsp_modules;
static int adsp_open_count;
@@ -889,7 +887,7 @@
mutex_lock(&adsp_open_lock);
if (adsp_open_count++ == 0)
- enable_irq(INT_ADSP);
+ enable_irq(adsp_info.int_adsp);
mutex_unlock(&adsp_open_lock);
break;
case ADSP_STATE_ENABLING:
@@ -944,7 +942,7 @@
mutex_unlock(&module->lock);
mutex_lock(&adsp_open_lock);
if (--adsp_open_count == 0) {
- disable_irq(INT_ADSP);
+ disable_irq(adsp_info.int_adsp);
MM_INFO("disable interrupt\n");
}
mutex_unlock(&adsp_open_lock);
@@ -959,6 +957,12 @@
unsigned count;
int rc, i;
+ adsp_info.int_adsp = platform_get_irq(pdev, 0);
+ if (adsp_info.int_adsp < 0) {
+ MM_ERR("no irq resource?\n");
+ return -ENODEV;
+ }
+
adsp_info.init_info_ptr = kzalloc(
(sizeof(struct adsp_rtos_mp_mtoa_init_info_type)), GFP_KERNEL);
if (!adsp_info.init_info_ptr)
@@ -996,11 +1000,11 @@
spin_lock_init(&adsp_cmd_lock);
spin_lock_init(&adsp_write_lock);
- rc = request_irq(INT_ADSP, adsp_irq_handler,
+ rc = request_irq(adsp_info.int_adsp, adsp_irq_handler,
IRQF_TRIGGER_RISING, "adsp", 0);
if (rc < 0)
goto fail_request_irq;
- disable_irq(INT_ADSP);
+ disable_irq(adsp_info.int_adsp);
for (i = 0; i < count; i++) {
struct msm_adsp_module *mod = adsp_modules + i;
@@ -1056,8 +1060,8 @@
daldevice_detach(adsp_info.handle);
adsp_info.handle = NULL;
fail_dal_attach:
- enable_irq(INT_ADSP);
- free_irq(INT_ADSP, 0);
+ enable_irq(adsp_info.int_adsp);
+ free_irq(adsp_info.int_adsp, 0);
fail_request_irq:
kfree(adsp_modules);
kfree(adsp_info.init_info_ptr);
@@ -1187,11 +1191,6 @@
},
};
-struct platform_device msm_adsp_device = {
- .name = "msm_adsp",
- .id = -1,
-};
-
static char msm_adsp_driver_name[] = "msm_adsp";
#ifdef CONFIG_DEBUG_FS
@@ -1218,7 +1217,6 @@
#endif /* CONFIG_DEBUG_FS */
msm_adsp_driver.driver.name = msm_adsp_driver_name;
- rc = platform_device_register(&msm_adsp_device);
rc = platform_driver_register(&msm_adsp_driver);
MM_INFO("%s -- %d\n", msm_adsp_driver_name, rc);
return rc;
diff --git a/arch/arm/mach-msm/qdsp5v2/adsp.h b/arch/arm/mach-msm/qdsp5v2/adsp.h
index 18f4046..5aceff9 100644
--- a/arch/arm/mach-msm/qdsp5v2/adsp.h
+++ b/arch/arm/mach-msm/qdsp5v2/adsp.h
@@ -229,6 +229,9 @@
void *handle;
void *cb_handle;
+
+ /* Interrupt value */
+ int int_adsp;
};
#define ADSP_STATE_DISABLED 0
diff --git a/arch/arm/mach-msm/qdsp6v2/amrwb_in.c b/arch/arm/mach-msm/qdsp6v2/amrwb_in.c
index 030d08f..5df976d 100644
--- a/arch/arm/mach-msm/qdsp6v2/amrwb_in.c
+++ b/arch/arm/mach-msm/qdsp6v2/amrwb_in.c
@@ -193,8 +193,8 @@
audio = kzalloc(sizeof(struct q6audio_in), GFP_KERNEL);
if (audio == NULL) {
- pr_err("%s:session id %d: Could not allocate memory for amrwb"
- "driver\n", __func__, audio->ac->session);
+ pr_err("%s: Could not allocate memory for amrwb driver\n",
+ __func__);
return -ENOMEM;
}
/* Allocate memory for encoder config param */
@@ -235,8 +235,8 @@
(void *)audio);
if (!audio->ac) {
- pr_err("%s:session id %d: Could not allocate memory for audio"
- "client\n", __func__, audio->ac->session);
+ pr_err("%s:audio[%p]: Could not allocate memory for audio"
+ "client\n", __func__, audio);
kfree(audio->enc_cfg);
kfree(audio);
return -ENOMEM;
diff --git a/arch/arm/mach-msm/qdsp6v2/apr.c b/arch/arm/mach-msm/qdsp6v2/apr.c
index 541f62f..b5f071f 100644
--- a/arch/arm/mach-msm/qdsp6v2/apr.c
+++ b/arch/arm/mach-msm/qdsp6v2/apr.c
@@ -255,9 +255,9 @@
if (!dest || !svc_name || !svc_fn)
return NULL;
- if (!strcmp(dest, "ADSP"))
+ if (!strncmp(dest, "ADSP", 4))
dest_id = APR_DEST_QDSP6;
- else if (!strcmp(dest, "MODEM")) {
+ else if (!strncmp(dest, "MODEM", 5)) {
dest_id = APR_DEST_MODEM;
} else {
pr_err("APR: wrong destination\n");
@@ -286,23 +286,23 @@
pr_info("%s: modem Up\n", __func__);
}
- if (!strcmp(svc_name, "AFE")) {
+ if (!strncmp(svc_name, "AFE", 3)) {
client_id = APR_CLIENT_AUDIO;
svc_idx = 0;
svc_id = APR_SVC_AFE;
- } else if (!strcmp(svc_name, "ASM")) {
+ } else if (!strncmp(svc_name, "ASM", 3)) {
client_id = APR_CLIENT_AUDIO;
svc_idx = 1;
svc_id = APR_SVC_ASM;
- } else if (!strcmp(svc_name, "ADM")) {
+ } else if (!strncmp(svc_name, "ADM", 3)) {
client_id = APR_CLIENT_AUDIO;
svc_idx = 2;
svc_id = APR_SVC_ADM;
- } else if (!strcmp(svc_name, "CORE")) {
+ } else if (!strncmp(svc_name, "CORE", 4)) {
client_id = APR_CLIENT_AUDIO;
svc_idx = 3;
svc_id = APR_SVC_ADSP_CORE;
- } else if (!strcmp(svc_name, "TEST")) {
+ } else if (!strncmp(svc_name, "TEST", 4)) {
if (dest_id == APR_DEST_QDSP6) {
client_id = APR_CLIENT_AUDIO;
svc_idx = 4;
@@ -311,19 +311,19 @@
svc_idx = 7;
}
svc_id = APR_SVC_TEST_CLIENT;
- } else if (!strcmp(svc_name, "VSM")) {
+ } else if (!strncmp(svc_name, "VSM", 3)) {
client_id = APR_CLIENT_VOICE;
svc_idx = 0;
svc_id = APR_SVC_VSM;
- } else if (!strcmp(svc_name, "VPM")) {
+ } else if (!strncmp(svc_name, "VPM", 3)) {
client_id = APR_CLIENT_VOICE;
svc_idx = 1;
svc_id = APR_SVC_VPM;
- } else if (!strcmp(svc_name, "MVS")) {
+ } else if (!strncmp(svc_name, "MVS", 3)) {
client_id = APR_CLIENT_VOICE;
svc_idx = 2;
svc_id = APR_SVC_MVS;
- } else if (!strcmp(svc_name, "MVM")) {
+ } else if (!strncmp(svc_name, "MVM", 3)) {
if (dest_id == APR_DEST_MODEM) {
client_id = APR_CLIENT_VOICE;
svc_idx = 3;
@@ -333,7 +333,7 @@
svc_idx = 5;
svc_id = APR_SVC_ADSP_MVM;
}
- } else if (!strcmp(svc_name, "CVS")) {
+ } else if (!strncmp(svc_name, "CVS", 3)) {
if (dest_id == APR_DEST_MODEM) {
client_id = APR_CLIENT_VOICE;
svc_idx = 4;
@@ -343,7 +343,7 @@
svc_idx = 6;
svc_id = APR_SVC_ADSP_CVS;
}
- } else if (!strcmp(svc_name, "CVP")) {
+ } else if (!strncmp(svc_name, "CVP", 3)) {
if (dest_id == APR_DEST_MODEM) {
client_id = APR_CLIENT_VOICE;
svc_idx = 5;
@@ -353,7 +353,7 @@
svc_idx = 7;
svc_id = APR_SVC_ADSP_CVP;
}
- } else if (!strcmp(svc_name, "SRD")) {
+ } else if (!strncmp(svc_name, "SRD", 3)) {
client_id = APR_CLIENT_VOICE;
svc_idx = 6;
svc_id = APR_SVC_SRD;
@@ -679,16 +679,13 @@
static int __init apr_late_init(void)
{
- void *ret;
+ int ret = 0;
init_waitqueue_head(&dsp_wait);
init_waitqueue_head(&modem_wait);
atomic_set(&dsp_state, 1);
atomic_set(&modem_state, 1);
- ret = subsys_notif_register_notifier("modem", &mnb);
- pr_debug("subsys_register_notifier: ret1 = %p\n", ret);
- ret = subsys_notif_register_notifier("lpass", &lnb);
- pr_debug("subsys_register_notifier: ret2 = %p\n", ret);
-
- return 0;
+ subsys_notif_register_notifier("modem", &mnb);
+ subsys_notif_register_notifier("lpass", &lnb);
+ return ret;
}
late_initcall(apr_late_init);
diff --git a/arch/arm/mach-msm/qdsp6v2/audio_acdb.c b/arch/arm/mach-msm/qdsp6v2/audio_acdb.c
index ce5d084..9b03985 100644
--- a/arch/arm/mach-msm/qdsp6v2/audio_acdb.c
+++ b/arch/arm/mach-msm/qdsp6v2/audio_acdb.c
@@ -15,7 +15,7 @@
#include <linux/miscdevice.h>
#include <linux/mutex.h>
#include <linux/uaccess.h>
-#include <linux/android_pmem.h>
+#include <linux/ion.h>
#include <linux/mm.h>
#include <mach/qdsp6v2/audio_acdb.h>
@@ -62,13 +62,13 @@
/* Sidetone Cal */
struct sidetone_atomic_cal sidetone_cal;
- /* PMEM information */
- atomic_t pmem_fd;
+ /* Allocation information */
+ struct ion_client *ion_client;
+ struct ion_handle *ion_handle;
+ atomic_t map_handle;
atomic64_t paddr;
atomic64_t kvaddr;
- atomic64_t pmem_len;
- struct file *file;
-
+ atomic64_t mem_len;
};
static struct acdb_data acdb_data;
@@ -200,10 +200,10 @@
{
pr_debug("%s,\n", __func__);
- if (cal_block->cal_offset > atomic64_read(&acdb_data.pmem_len)) {
- pr_err("%s: offset %d is > pmem_len %ld\n",
+ if (cal_block->cal_offset > atomic64_read(&acdb_data.mem_len)) {
+ pr_err("%s: offset %d is > mem_len %ld\n",
__func__, cal_block->cal_offset,
- (long)atomic64_read(&acdb_data.pmem_len));
+ (long)atomic64_read(&acdb_data.mem_len));
goto done;
}
@@ -221,10 +221,10 @@
{
pr_debug("%s, path = %d\n", __func__, path);
- if (cal_block->cal_offset > atomic64_read(&acdb_data.pmem_len)) {
- pr_err("%s: offset %d is > pmem_len %ld\n",
+ if (cal_block->cal_offset > atomic64_read(&acdb_data.mem_len)) {
+ pr_err("%s: offset %d is > mem_len %ld\n",
__func__, cal_block->cal_offset,
- (long)atomic64_read(&acdb_data.pmem_len));
+ (long)atomic64_read(&acdb_data.mem_len));
goto done;
}
if ((path >= MAX_AUDPROC_TYPES) || (path < 0)) {
@@ -271,10 +271,10 @@
{
pr_debug("%s, path = %d\n", __func__, path);
- if (cal_block->cal_offset > atomic64_read(&acdb_data.pmem_len)) {
- pr_err("%s: offset %d is > pmem_len %ld\n",
+ if (cal_block->cal_offset > atomic64_read(&acdb_data.mem_len)) {
+ pr_err("%s: offset %d is > mem_len %ld\n",
__func__, cal_block->cal_offset,
- (long)atomic64_read(&acdb_data.pmem_len));
+ (long)atomic64_read(&acdb_data.mem_len));
goto done;
}
if (path >= MAX_AUDPROC_TYPES) {
@@ -321,10 +321,10 @@
{
pr_debug("%s, path = %d\n", __func__, path);
- if (cal_block->cal_offset > atomic64_read(&acdb_data.pmem_len)) {
- pr_err("%s: offset %d is > pmem_len %ld\n",
+ if (cal_block->cal_offset > atomic64_read(&acdb_data.mem_len)) {
+ pr_err("%s: offset %d is > mem_len %ld\n",
__func__, cal_block->cal_offset,
- (long)atomic64_read(&acdb_data.pmem_len));
+ (long)atomic64_read(&acdb_data.mem_len));
goto done;
}
if (path >= MAX_AUDPROC_TYPES) {
@@ -371,10 +371,10 @@
{
pr_debug("%s, path = %d\n", __func__, path);
- if (cal_block->cal_offset > atomic64_read(&acdb_data.pmem_len)) {
- pr_err("%s: offset %d is > pmem_len %ld\n",
+ if (cal_block->cal_offset > atomic64_read(&acdb_data.mem_len)) {
+ pr_err("%s: offset %d is > mem_len %ld\n",
__func__, cal_block->cal_offset,
- (long)atomic64_read(&acdb_data.pmem_len));
+ (long)atomic64_read(&acdb_data.mem_len));
goto done;
}
if (path >= MAX_AUDPROC_TYPES) {
@@ -432,10 +432,10 @@
atomic_set(&acdb_data.vocproc_total_cal_size, 0);
for (i = 0; i < len; i++) {
if (cal_blocks[i].cal_offset >
- atomic64_read(&acdb_data.pmem_len)) {
- pr_err("%s: offset %d is > pmem_len %ld\n",
+ atomic64_read(&acdb_data.mem_len)) {
+ pr_err("%s: offset %d is > mem_len %ld\n",
__func__, cal_blocks[i].cal_offset,
- (long)atomic64_read(&acdb_data.pmem_len));
+ (long)atomic64_read(&acdb_data.mem_len));
atomic_set(&acdb_data.vocproc_cal[i].cal_size, 0);
} else {
atomic_add(cal_blocks[i].cal_size,
@@ -484,10 +484,10 @@
atomic_set(&acdb_data.vocstrm_total_cal_size, 0);
for (i = 0; i < len; i++) {
if (cal_blocks[i].cal_offset >
- atomic64_read(&acdb_data.pmem_len)) {
- pr_err("%s: offset %d is > pmem_len %ld\n",
+ atomic64_read(&acdb_data.mem_len)) {
+ pr_err("%s: offset %d is > mem_len %ld\n",
__func__, cal_blocks[i].cal_offset,
- (long)atomic64_read(&acdb_data.pmem_len));
+ (long)atomic64_read(&acdb_data.mem_len));
atomic_set(&acdb_data.vocstrm_cal[i].cal_size, 0);
} else {
atomic_add(cal_blocks[i].cal_size,
@@ -536,10 +536,10 @@
atomic_set(&acdb_data.vocvol_total_cal_size, 0);
for (i = 0; i < len; i++) {
if (cal_blocks[i].cal_offset >
- atomic64_read(&acdb_data.pmem_len)) {
- pr_err("%s: offset %d is > pmem_len %ld\n",
+ atomic64_read(&acdb_data.mem_len)) {
+ pr_err("%s: offset %d is > mem_len %ld\n",
__func__, cal_blocks[i].cal_offset,
- (long)atomic64_read(&acdb_data.pmem_len));
+ (long)atomic64_read(&acdb_data.mem_len));
atomic_set(&acdb_data.vocvol_cal[i].cal_size, 0);
} else {
atomic_add(cal_blocks[i].cal_size,
@@ -603,8 +603,9 @@
s32 result = 0;
pr_debug("%s\n", __func__);
- if (atomic_read(&acdb_data.pmem_fd)) {
- pr_debug("%s: ACDB opened but PMEM allocated, using existing PMEM!\n",
+ if (atomic64_read(&acdb_data.mem_len)) {
+ pr_debug("%s: ACDB opened but memory allocated, "
+ "using existing allocation!\n",
__func__);
}
@@ -612,46 +613,74 @@
return result;
}
-static int deregister_pmem(void)
+static int deregister_memory(void)
{
- if (atomic_read(&acdb_data.pmem_fd)) {
+ if (atomic64_read(&acdb_data.mem_len)) {
mutex_lock(&acdb_data.acdb_mutex);
- put_pmem_file(acdb_data.file);
+ ion_unmap_kernel(acdb_data.ion_client, acdb_data.ion_handle);
+ ion_free(acdb_data.ion_client, acdb_data.ion_handle);
+ ion_client_destroy(acdb_data.ion_client);
mutex_unlock(&acdb_data.acdb_mutex);
- atomic_set(&acdb_data.pmem_fd, 0);
+ atomic64_set(&acdb_data.mem_len, 0);
}
return 0;
}
-static int register_pmem(void)
+static int register_memory(void)
{
- int result;
- unsigned long paddr;
- unsigned long kvaddr;
- unsigned long pmem_len;
+ int result;
+ unsigned long paddr;
+ unsigned long kvaddr;
+ unsigned long mem_len;
mutex_lock(&acdb_data.acdb_mutex);
- result = get_pmem_file(atomic_read(&acdb_data.pmem_fd),
- &paddr, &kvaddr, &pmem_len,
- &acdb_data.file);
- mutex_unlock(&acdb_data.acdb_mutex);
- if (result != 0) {
- atomic_set(&acdb_data.pmem_fd, 0);
- atomic64_set(&acdb_data.pmem_len, 0);
- pr_err("%s: Could not register PMEM!!!\n", __func__);
- goto done;
+ acdb_data.ion_client =
+ msm_ion_client_create(UINT_MAX, "audio_acdb_client");
+ if (IS_ERR_OR_NULL(acdb_data.ion_client)) {
+ pr_err("%s: Could not register ION client!!!\n", __func__);
+ goto err;
}
+ acdb_data.ion_handle = ion_import_fd(acdb_data.ion_client,
+ atomic_read(&acdb_data.map_handle));
+ if (IS_ERR_OR_NULL(acdb_data.ion_handle)) {
+ pr_err("%s: Could not import map handle!!!\n", __func__);
+ goto err_ion_client;
+ }
+
+ result = ion_phys(acdb_data.ion_client, acdb_data.ion_handle,
+ &paddr, (size_t *)&mem_len);
+ if (result != 0) {
+ pr_err("%s: Could not get phys addr!!!\n", __func__);
+ goto err_ion_handle;
+ }
+
+ kvaddr = (unsigned long)ion_map_kernel(acdb_data.ion_client,
+ acdb_data.ion_handle, 0);
+ if (IS_ERR_OR_NULL(&kvaddr)) {
+ pr_err("%s: Could not get kernel virt addr!!!\n", __func__);
+ goto err_ion_handle;
+ }
+ mutex_unlock(&acdb_data.acdb_mutex);
+
atomic64_set(&acdb_data.paddr, paddr);
atomic64_set(&acdb_data.kvaddr, kvaddr);
- atomic64_set(&acdb_data.pmem_len, pmem_len);
- pr_debug("AUDIO_REGISTER_PMEM done! paddr = 0x%lx, "
+ atomic64_set(&acdb_data.mem_len, mem_len);
+ pr_debug("%s done! paddr = 0x%lx, "
"kvaddr = 0x%lx, len = x%lx\n",
+ __func__,
(long)atomic64_read(&acdb_data.paddr),
(long)atomic64_read(&acdb_data.kvaddr),
- (long)atomic64_read(&acdb_data.pmem_len));
+ (long)atomic64_read(&acdb_data.mem_len));
-done:
+ return result;
+err_ion_handle:
+ ion_free(acdb_data.ion_client, acdb_data.ion_handle);
+err_ion_client:
+ ion_client_destroy(acdb_data.ion_client);
+err:
+ atomic64_set(&acdb_data.mem_len, 0);
+ mutex_unlock(&acdb_data.acdb_mutex);
return result;
}
static long acdb_ioctl(struct file *f,
@@ -659,7 +688,7 @@
{
int32_t result = 0;
int32_t size;
- int32_t pmem_fd;
+ int32_t map_fd;
uint32_t topology;
struct cal_block data[MAX_NETWORKS];
pr_debug("%s\n", __func__);
@@ -667,23 +696,23 @@
switch (cmd) {
case AUDIO_REGISTER_PMEM:
pr_debug("AUDIO_REGISTER_PMEM\n");
- if (atomic_read(&acdb_data.pmem_fd)) {
- deregister_pmem();
- pr_debug("Remove the existing PMEM\n");
+ if (atomic_read(&acdb_data.mem_len)) {
+ deregister_memory();
+ pr_debug("Remove the existing memory\n");
}
- if (copy_from_user(&pmem_fd, (void *)arg, sizeof(pmem_fd))) {
- pr_err("%s: fail to copy pmem handle!\n", __func__);
+ if (copy_from_user(&map_fd, (void *)arg, sizeof(map_fd))) {
+ pr_err("%s: fail to copy memory handle!\n", __func__);
result = -EFAULT;
} else {
- atomic_set(&acdb_data.pmem_fd, pmem_fd);
- result = register_pmem();
+ atomic_set(&acdb_data.map_handle, map_fd);
+ result = register_memory();
}
goto done;
case AUDIO_DEREGISTER_PMEM:
pr_debug("AUDIO_DEREGISTER_PMEM\n");
- deregister_pmem();
+ deregister_memory();
goto done;
case AUDIO_SET_VOICE_RX_TOPOLOGY:
if (copy_from_user(&topology, (void *)arg,
@@ -835,8 +864,8 @@
pr_debug("%s\n", __func__);
- if (atomic_read(&acdb_data.pmem_fd)) {
- if (size <= atomic64_read(&acdb_data.pmem_len)) {
+ if (atomic64_read(&acdb_data.mem_len)) {
+ if (size <= atomic64_read(&acdb_data.mem_len)) {
vma->vm_page_prot = pgprot_noncached(
vma->vm_page_prot);
result = remap_pfn_range(vma,
@@ -845,11 +874,11 @@
size,
vma->vm_page_prot);
} else {
- pr_err("%s: Not enough PMEM memory!\n", __func__);
+ pr_err("%s: Not enough memory!\n", __func__);
result = -ENOMEM;
}
} else {
- pr_err("%s: PMEM is not allocated, yet!\n", __func__);
+ pr_err("%s: memory is not allocated, yet!\n", __func__);
result = -ENODEV;
}
@@ -869,7 +898,7 @@
if (atomic_read(&usage_count) >= 1)
result = -EBUSY;
else
- result = deregister_pmem();
+ result = deregister_memory();
return result;
}
diff --git a/arch/arm/mach-msm/qdsp6v2/audio_dev_ctl.c b/arch/arm/mach-msm/qdsp6v2/audio_dev_ctl.c
index 0a5acce..aaae776 100644
--- a/arch/arm/mach-msm/qdsp6v2/audio_dev_ctl.c
+++ b/arch/arm/mach-msm/qdsp6v2/audio_dev_ctl.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -17,6 +17,7 @@
#include <linux/slab.h>
#include <linux/wait.h>
#include <linux/sched.h>
+#include <linux/workqueue.h>
#include <asm/uaccess.h>
#include <asm/atomic.h>
#include <mach/qdsp6v2/audio_dev_ctl.h>
@@ -31,6 +32,9 @@
static DEFINE_MUTEX(session_lock);
+static struct workqueue_struct *msm_reset_device_work_queue;
+static void reset_device_work(struct work_struct *work);
+static DECLARE_WORK(msm_reset_device_work, reset_device_work);
struct audio_dev_ctrl_state {
struct msm_snddev_info *devs[AUDIO_DEV_CTL_MAX_DEV];
@@ -119,6 +123,18 @@
}
EXPORT_SYMBOL(msm_reset_all_device);
+static void reset_device_work(struct work_struct *work)
+{
+ msm_reset_all_device();
+}
+
+int reset_device(void)
+{
+ queue_work(msm_reset_device_work_queue, &msm_reset_device_work);
+ return 0;
+}
+EXPORT_SYMBOL(reset_device);
+
int msm_set_copp_id(int session_id, int copp_id)
{
int rc = 0;
@@ -1686,7 +1702,9 @@
init_waitqueue_head(&audio_dev_ctrl.wait);
event.cb = NULL;
-
+ msm_reset_device_work_queue = create_workqueue("reset_device");
+ if (msm_reset_device_work_queue == NULL)
+ return -ENOMEM;
atomic_set(&audio_dev_ctrl.opened, 0);
audio_dev_ctrl.num_dev = 0;
audio_dev_ctrl.voice_tx_dev = NULL;
@@ -1704,6 +1722,7 @@
static void __exit audio_dev_ctrl_exit(void)
{
+ destroy_workqueue(msm_reset_device_work_queue);
}
module_init(audio_dev_ctrl_init);
module_exit(audio_dev_ctrl_exit);
diff --git a/arch/arm/mach-msm/qdsp6v2/audio_lpa.c b/arch/arm/mach-msm/qdsp6v2/audio_lpa.c
index 3225d61..41a7387 100644
--- a/arch/arm/mach-msm/qdsp6v2/audio_lpa.c
+++ b/arch/arm/mach-msm/qdsp6v2/audio_lpa.c
@@ -2,7 +2,7 @@
*
* Copyright (C) 2008 Google, Inc.
* Copyright (C) 2008 HTC Corporation
- * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -28,8 +28,8 @@
#include <linux/debugfs.h>
#include <linux/delay.h>
#include <linux/earlysuspend.h>
+#include <linux/ion.h>
#include <linux/list.h>
-#include <linux/android_pmem.h>
#include <linux/slab.h>
#include <asm/atomic.h>
#include <asm/ioctls.h>
@@ -45,7 +45,7 @@
#include <mach/debug_mm.h>
#include <linux/fs.h>
-#define MAX_BUF 3
+#define MAX_BUF 4
#define BUFSZ (524288)
#define AUDDEC_DEC_PCM 0
@@ -88,10 +88,10 @@
int event_type;
union msm_audio_event_payload payload;
};
-
-struct audlpa_pmem_region {
+struct audlpa_ion_region {
struct list_head list;
- struct file *file;
+ struct ion_handle *handle;
+ struct ion_client *client;
int fd;
void *vaddr;
unsigned long paddr;
@@ -115,12 +115,13 @@
static void audlpa_post_event(struct audio *audio, int type,
union msm_audio_event_payload payload);
-static unsigned long audlpa_pmem_fixup(struct audio *audio, void *addr,
+
+static unsigned long audlpa_ion_fixup(struct audio *audio, void *addr,
unsigned long len, int ref_up);
+static void audlpa_unmap_ion_region(struct audio *audio);
static void audlpa_async_send_data(struct audio *audio, unsigned needed,
uint32_t token);
static int audlpa_pause(struct audio *audio);
-static void audlpa_unmap_pmem_region(struct audio *audio);
static long pcm_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
static int audlpa_set_pcm_params(void *data);
@@ -422,7 +423,7 @@
drv_evt->event_type == AUDIO_EVENT_READ_DONE)) {
pr_debug("%s: AUDIO_EVENT_WRITE_DONE completing\n", __func__);
mutex_lock(&audio->lock);
- audlpa_pmem_fixup(audio, drv_evt->payload.aio_buf.buf_addr,
+ audlpa_ion_fixup(audio, drv_evt->payload.aio_buf.buf_addr,
drv_evt->payload.aio_buf.buf_len, 0);
mutex_unlock(&audio->lock);
}
@@ -432,38 +433,41 @@
return rc;
}
-static int audlpa_pmem_check(struct audio *audio,
- void *vaddr, unsigned long len)
+static int audlpa_ion_check(struct audio *audio,
+ void *vaddr, unsigned long len)
{
- struct audlpa_pmem_region *region_elt;
- struct audlpa_pmem_region t = { .vaddr = vaddr, .len = len };
+ struct audlpa_ion_region *region_elt;
+ struct audlpa_ion_region t = {.vaddr = vaddr, .len = len };
- list_for_each_entry(region_elt, &audio->pmem_region_queue, list) {
+ list_for_each_entry(region_elt, &audio->ion_region_queue, list) {
if (CONTAINS(region_elt, &t) || CONTAINS(&t, region_elt) ||
OVERLAPS(region_elt, &t)) {
- pr_err("%s: region (vaddr %p len %ld)"
- " clashes with registered region"
- " (vaddr %p paddr %p len %ld)\n",
- __func__, vaddr, len,
- region_elt->vaddr,
- (void *)region_elt->paddr,
- region_elt->len);
+ pr_err("%s[%p]:region (vaddr %p len %ld)"
+ " clashes with registered region"
+ " (vaddr %p paddr %p len %ld)\n",
+ __func__, audio, vaddr, len,
+ region_elt->vaddr,
+ (void *)region_elt->paddr, region_elt->len);
return -EINVAL;
}
}
return 0;
}
-
-static int audlpa_pmem_add(struct audio *audio,
- struct msm_audio_pmem_info *info)
+static int audlpa_ion_add(struct audio *audio,
+ struct msm_audio_ion_info *info)
{
- unsigned long paddr, kvaddr, len;
- struct file *file;
- struct audlpa_pmem_region *region;
+ ion_phys_addr_t paddr;
+ size_t len;
+ unsigned long kvaddr;
+ struct audlpa_ion_region *region;
int rc = -EINVAL;
+ struct ion_handle *handle;
+ struct ion_client *client;
+ unsigned long ionflag;
+ void *temp_ptr;
- pr_debug("%s:\n", __func__);
+ pr_debug("%s[%p]:\n", __func__, audio);
region = kmalloc(sizeof(*region), GFP_KERNEL);
if (!region) {
@@ -471,61 +475,105 @@
goto end;
}
- if (get_pmem_file(info->fd, &paddr, &kvaddr, &len, &file)) {
- kfree(region);
- goto end;
+ client = msm_ion_client_create(UINT_MAX, "Audio_LPA_Client");
+ if (IS_ERR_OR_NULL(client)) {
+ pr_err("Unable to create ION client\n");
+ goto client_error;
}
- rc = audlpa_pmem_check(audio, info->vaddr, len);
+ handle = ion_import_fd(client, info->fd);
+ if (IS_ERR_OR_NULL(handle)) {
+ pr_err("%s: could not get handle of the given fd\n", __func__);
+ goto import_error;
+ }
+
+ rc = ion_handle_get_flags(client, handle, &ionflag);
+ if (rc) {
+ pr_err("%s: could not get flags for the handle\n", __func__);
+ goto flag_error;
+ }
+
+ temp_ptr = ion_map_kernel(client, handle, ionflag);
+ if (IS_ERR_OR_NULL(temp_ptr)) {
+ pr_err("%s: could not get virtual address\n", __func__);
+ goto map_error;
+ }
+ kvaddr = (unsigned long) temp_ptr;
+
+ rc = ion_phys(client, handle, &paddr, &len);
+ if (rc) {
+ pr_err("%s: could not get physical address\n", __func__);
+ goto ion_error;
+ }
+
+ rc = audlpa_ion_check(audio, info->vaddr, len);
if (rc < 0) {
- put_pmem_file(file);
- kfree(region);
- goto end;
+ pr_err("%s: audlpa_ion_check failed\n", __func__);
+ goto ion_error;
}
+ region->client = client;
+ region->handle = handle;
region->vaddr = info->vaddr;
region->fd = info->fd;
region->paddr = paddr;
region->kvaddr = kvaddr;
region->len = len;
- region->file = file;
region->ref_cnt = 0;
- pr_debug("%s: add region paddr %lx vaddr %p, len %lu\n", __func__,
- region->paddr, region->vaddr,
- region->len);
- list_add_tail(®ion->list, &audio->pmem_region_queue);
+ pr_debug("%s[%p]:add region paddr %lx vaddr %p, len %lu kvaddr %lx\n",
+ __func__, audio,
+ region->paddr, region->vaddr, region->len, region->kvaddr);
+ list_add_tail(®ion->list, &audio->ion_region_queue);
+
rc = q6asm_memory_map(audio->ac, (uint32_t)paddr, IN, (uint32_t)len, 1);
- if (rc < 0)
- pr_err("%s: memory map failed\n", __func__);
+ if (rc < 0) {
+ pr_err("%s[%p]: memory map failed\n", __func__, audio);
+ goto ion_error;
+ } else {
+ goto end;
+ }
+
+ion_error:
+ ion_unmap_kernel(client, handle);
+map_error:
+ ion_free(client, handle);
+flag_error:
+import_error:
+ ion_client_destroy(client);
+client_error:
+ kfree(region);
end:
return rc;
}
-static int audlpa_pmem_remove(struct audio *audio,
- struct msm_audio_pmem_info *info)
+static int audlpa_ion_remove(struct audio *audio,
+ struct msm_audio_ion_info *info)
{
- struct audlpa_pmem_region *region;
+ struct audlpa_ion_region *region;
struct list_head *ptr, *next;
int rc = -EINVAL;
- list_for_each_safe(ptr, next, &audio->pmem_region_queue) {
- region = list_entry(ptr, struct audlpa_pmem_region, list);
+ list_for_each_safe(ptr, next, &audio->ion_region_queue) {
+ region = list_entry(ptr, struct audlpa_ion_region, list);
- if ((region != NULL) && (region->fd == info->fd) &&
- (region->vaddr == info->vaddr)) {
+ if (region != NULL && (region->fd == info->fd) &&
+ (region->vaddr == info->vaddr)) {
if (region->ref_cnt) {
- pr_debug("%s: region %p in use ref_cnt %d\n",
- __func__, region, region->ref_cnt);
+ pr_debug("%s[%p]:region %p in use ref_cnt %d\n",
+ __func__, audio, region,
+ region->ref_cnt);
break;
}
rc = q6asm_memory_unmap(audio->ac,
- (uint32_t)region->paddr,
- IN);
+ (uint32_t) region->paddr, IN);
if (rc < 0)
- pr_err("%s: memory unmap failed\n", __func__);
+ pr_err("%s[%p]: memory unmap failed\n",
+ __func__, audio);
list_del(®ion->list);
- put_pmem_file(region->file);
+ ion_unmap_kernel(region->client, region->handle);
+ ion_free(region->client, region->handle);
+ ion_client_destroy(region->client);
kfree(region);
rc = 0;
break;
@@ -535,24 +583,21 @@
return rc;
}
-static int audlpa_pmem_lookup_vaddr(struct audio *audio, void *addr,
- unsigned long len, struct audlpa_pmem_region **region)
+static int audlpa_ion_lookup_vaddr(struct audio *audio, void *addr,
+ unsigned long len, struct audlpa_ion_region **region)
{
- struct audlpa_pmem_region *region_elt;
-
+ struct audlpa_ion_region *region_elt;
int match_count = 0;
-
*region = NULL;
/* returns physical address or zero */
- list_for_each_entry(region_elt, &audio->pmem_region_queue,
- list) {
+ list_for_each_entry(region_elt, &audio->ion_region_queue, list) {
if (addr >= region_elt->vaddr &&
- addr < region_elt->vaddr + region_elt->len &&
- addr + len <= region_elt->vaddr + region_elt->len) {
+ addr < region_elt->vaddr + region_elt->len &&
+ addr + len <= region_elt->vaddr + region_elt->len) {
/* offset since we could pass vaddr inside a registerd
- * pmem buffer
- */
+ * ion buffer
+ */
match_count++;
if (!*region)
@@ -561,32 +606,33 @@
}
if (match_count > 1) {
- pr_err("%s: multiple hits for vaddr %p, len %ld\n", __func__,
- addr, len);
- list_for_each_entry(region_elt,
- &audio->pmem_region_queue, list) {
- if (addr >= region_elt->vaddr &&
- addr < region_elt->vaddr + region_elt->len &&
- addr + len <= region_elt->vaddr + region_elt->len)
- pr_err("%s: \t%p, %ld --> %p\n", __func__,
- region_elt->vaddr, region_elt->len,
- (void *)region_elt->paddr);
+ pr_err("%s[%p]:multiple hits for vaddr %p, len %ld\n",
+ __func__, audio, addr, len);
+ list_for_each_entry(region_elt, &audio->ion_region_queue,
+ list) {
+ if (addr >= region_elt->vaddr &&
+ addr < region_elt->vaddr + region_elt->len &&
+ addr + len <= region_elt->vaddr + region_elt->len)
+ pr_err("\t%s[%p]:%p, %ld --> %p\n",
+ __func__, audio,
+ region_elt->vaddr,
+ region_elt->len,
+ (void *)region_elt->paddr);
}
}
-
return *region ? 0 : -1;
}
-
-unsigned long audlpa_pmem_fixup(struct audio *audio, void *addr,
- unsigned long len, int ref_up)
+static unsigned long audlpa_ion_fixup(struct audio *audio, void *addr,
+ unsigned long len, int ref_up)
{
- struct audlpa_pmem_region *region;
+ struct audlpa_ion_region *region;
unsigned long paddr;
int ret;
- ret = audlpa_pmem_lookup_vaddr(audio, addr, len, ®ion);
+ ret = audlpa_ion_lookup_vaddr(audio, addr, len, ®ion);
if (ret) {
- pr_err("%s: lookup (%p, %ld) failed\n", __func__, addr, len);
+ pr_err("%s[%p]:lookup (%p, %ld) failed\n",
+ __func__, audio, addr, len);
return 0;
}
if (ref_up)
@@ -613,7 +659,7 @@
return -EFAULT;
}
- buf_node->paddr = audlpa_pmem_fixup(
+ buf_node->paddr = audlpa_ion_fixup(
audio, buf_node->buf.buf_addr,
buf_node->buf.buf_len, 1);
if (dir) {
@@ -669,6 +715,9 @@
break;
case ASM_SESSION_CMDRSP_GET_SESSION_TIME:
break;
+ case RESET_EVENTS:
+ reset_device();
+ break;
default:
break;
}
@@ -918,25 +967,26 @@
}
break;
- case AUDIO_REGISTER_PMEM: {
- struct msm_audio_pmem_info info;
- pr_debug("%s: AUDIO_REGISTER_PMEM\n", __func__);
- if (copy_from_user(&info, (void *) arg, sizeof(info)))
- rc = -EFAULT;
- else
- rc = audlpa_pmem_add(audio, &info);
- break;
- }
+ case AUDIO_REGISTER_ION: {
+ struct msm_audio_ion_info info;
+ pr_debug("%s: AUDIO_REGISTER_ION\n", __func__);
+ if (copy_from_user(&info, (void *)arg, sizeof(info)))
+ rc = -EFAULT;
+ else
+ rc = audlpa_ion_add(audio, &info);
+ break;
+ }
- case AUDIO_DEREGISTER_PMEM: {
- struct msm_audio_pmem_info info;
- pr_debug("%s: AUDIO_DEREGISTER_PMEM\n", __func__);
- if (copy_from_user(&info, (void *) arg, sizeof(info)))
- rc = -EFAULT;
- else
- rc = audlpa_pmem_remove(audio, &info);
- break;
- }
+ case AUDIO_DEREGISTER_ION: {
+ struct msm_audio_ion_info info;
+ pr_debug("%s: AUDIO_DEREGISTER_ION\n", __func__);
+ if (copy_from_user(&info, (void *)arg, sizeof(info)))
+ rc = -EFAULT;
+ else
+ rc = audlpa_ion_remove(audio, &info);
+ break;
+ }
+
case AUDIO_ASYNC_WRITE:
pr_debug("%s: AUDIO_ASYNC_WRITE\n", __func__);
if (audio->drv_status & ADRV_STATUS_FSYNC)
@@ -1035,34 +1085,37 @@
return audlpa_async_fsync(audio);
}
-static void audlpa_reset_pmem_region(struct audio *audio)
+void audlpa_reset_ion_region(struct audio *audio)
{
- struct audlpa_pmem_region *region;
+ struct audlpa_ion_region *region;
struct list_head *ptr, *next;
- list_for_each_safe(ptr, next, &audio->pmem_region_queue) {
- region = list_entry(ptr, struct audlpa_pmem_region, list);
+ list_for_each_safe(ptr, next, &audio->ion_region_queue) {
+ region = list_entry(ptr, struct audlpa_ion_region, list);
list_del(®ion->list);
- put_pmem_file(region->file);
+ ion_unmap_kernel(region->client, region->handle);
+ ion_free(region->client, region->handle);
+ ion_client_destroy(region->client);
kfree(region);
}
return;
}
-static void audlpa_unmap_pmem_region(struct audio *audio)
+static void audlpa_unmap_ion_region(struct audio *audio)
{
- struct audlpa_pmem_region *region;
+ struct audlpa_ion_region *region;
struct list_head *ptr, *next;
int rc = -EINVAL;
- pr_debug("%s:\n", __func__);
- list_for_each_safe(ptr, next, &audio->pmem_region_queue) {
- region = list_entry(ptr, struct audlpa_pmem_region, list);
- pr_debug("%s: phy_address = 0x%lx\n", __func__, region->paddr);
+ pr_debug("%s[%p]:\n", __func__, audio);
+ list_for_each_safe(ptr, next, &audio->ion_region_queue) {
+ region = list_entry(ptr, struct audlpa_ion_region, list);
+ pr_debug("%s[%p]: phy_address = 0x%lx\n",
+ __func__, audio, region->paddr);
if (region != NULL) {
rc = q6asm_memory_unmap(audio->ac,
- (uint32_t)region->paddr, IN);
+ (uint32_t)region->paddr, IN);
if (rc < 0)
pr_err("%s: memory unmap failed\n", __func__);
}
@@ -1081,12 +1134,12 @@
if (audio->out_enabled)
audlpa_async_flush(audio);
audio->wflush = 0;
- audlpa_unmap_pmem_region(audio);
+ audlpa_unmap_ion_region(audio);
audio_disable(audio);
msm_clear_session_id(audio->ac->session);
auddev_unregister_evt_listner(AUDDEV_CLNT_DEC, audio->ac->session);
q6asm_audio_client_free(audio->ac);
- audlpa_reset_pmem_region(audio);
+ audlpa_reset_ion_region(audio);
#ifdef CONFIG_HAS_EARLYSUSPEND
unregister_early_suspend(&audio->suspend_ctl.node);
#endif
@@ -1096,7 +1149,6 @@
audio->event_abort = 1;
wake_up(&audio->event_wait);
audlpa_reset_event_queue(audio);
- pmem_kfree(audio->phys);
if (audio->stopped == 0)
audlpa_allow_sleep(audio);
wake_lock_destroy(&audio->wakelock);
@@ -1274,7 +1326,7 @@
spin_lock_init(&audio->dsp_lock);
init_waitqueue_head(&audio->write_wait);
INIT_LIST_HEAD(&audio->out_queue);
- INIT_LIST_HEAD(&audio->pmem_region_queue);
+ INIT_LIST_HEAD(&audio->ion_region_queue);
INIT_LIST_HEAD(&audio->free_event_queue);
INIT_LIST_HEAD(&audio->event_queue);
init_waitqueue_head(&audio->wait);
@@ -1339,7 +1391,6 @@
return rc;
err:
q6asm_audio_client_free(audio->ac);
- pmem_kfree(audio->phys);
kfree(audio);
return rc;
}
diff --git a/arch/arm/mach-msm/qdsp6v2/audio_lpa.h b/arch/arm/mach-msm/qdsp6v2/audio_lpa.h
index ffc27ad..34b53f2 100644
--- a/arch/arm/mach-msm/qdsp6v2/audio_lpa.h
+++ b/arch/arm/mach-msm/qdsp6v2/audio_lpa.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -88,7 +88,7 @@
uint32_t device_events;
- struct list_head pmem_region_queue; /* protected by lock */
+ struct list_head ion_region_queue; /* protected by lock */
int eq_enable;
int eq_needs_commit;
diff --git a/arch/arm/mach-msm/qdsp6v2/audio_utils_aio.c b/arch/arm/mach-msm/qdsp6v2/audio_utils_aio.c
index c1b5e8b..d2557ca 100644
--- a/arch/arm/mach-msm/qdsp6v2/audio_utils_aio.c
+++ b/arch/arm/mach-msm/qdsp6v2/audio_utils_aio.c
@@ -1,6 +1,6 @@
/* Copyright (C) 2008 Google, Inc.
* Copyright (C) 2008 HTC Corporation
- * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -129,23 +129,23 @@
}
}
-static int audio_aio_pmem_lookup_vaddr(struct q6audio_aio *audio, void *addr,
+static int audio_aio_ion_lookup_vaddr(struct q6audio_aio *audio, void *addr,
unsigned long len,
- struct audio_aio_pmem_region **region)
+ struct audio_aio_ion_region **region)
{
- struct audio_aio_pmem_region *region_elt;
+ struct audio_aio_ion_region *region_elt;
int match_count = 0;
*region = NULL;
/* returns physical address or zero */
- list_for_each_entry(region_elt, &audio->pmem_region_queue, list) {
+ list_for_each_entry(region_elt, &audio->ion_region_queue, list) {
if (addr >= region_elt->vaddr &&
addr < region_elt->vaddr + region_elt->len &&
addr + len <= region_elt->vaddr + region_elt->len) {
/* offset since we could pass vaddr inside a registerd
- * pmem buffer
+ * ion buffer
*/
match_count++;
@@ -157,7 +157,7 @@
if (match_count > 1) {
pr_err("%s[%p]:multiple hits for vaddr %p, len %ld\n",
__func__, audio, addr, len);
- list_for_each_entry(region_elt, &audio->pmem_region_queue,
+ list_for_each_entry(region_elt, &audio->ion_region_queue,
list) {
if (addr >= region_elt->vaddr &&
addr < region_elt->vaddr + region_elt->len &&
@@ -173,14 +173,14 @@
return *region ? 0 : -1;
}
-static unsigned long audio_aio_pmem_fixup(struct q6audio_aio *audio, void *addr,
+static unsigned long audio_aio_ion_fixup(struct q6audio_aio *audio, void *addr,
unsigned long len, int ref_up, void **kvaddr)
{
- struct audio_aio_pmem_region *region;
+ struct audio_aio_ion_region *region;
unsigned long paddr;
int ret;
- ret = audio_aio_pmem_lookup_vaddr(audio, addr, len, ®ion);
+ ret = audio_aio_ion_lookup_vaddr(audio, addr, len, ®ion);
if (ret) {
pr_err("%s[%p]:lookup (%p, %ld) failed\n",
__func__, audio, addr, len);
@@ -519,15 +519,17 @@
return rc;
}
-void audio_aio_reset_pmem_region(struct q6audio_aio *audio)
+void audio_aio_reset_ion_region(struct q6audio_aio *audio)
{
- struct audio_aio_pmem_region *region;
+ struct audio_aio_ion_region *region;
struct list_head *ptr, *next;
- list_for_each_safe(ptr, next, &audio->pmem_region_queue) {
- region = list_entry(ptr, struct audio_aio_pmem_region, list);
+ list_for_each_safe(ptr, next, &audio->ion_region_queue) {
+ region = list_entry(ptr, struct audio_aio_ion_region, list);
list_del(®ion->list);
- put_pmem_file(region->file);
+ ion_unmap_kernel(region->client, region->handle);
+ ion_free(region->client, region->handle);
+ ion_client_destroy(region->client);
kfree(region);
}
@@ -558,15 +560,15 @@
return;
}
-static void audio_aio_unmap_pmem_region(struct q6audio_aio *audio)
+static void audio_aio_unmap_ion_region(struct q6audio_aio *audio)
{
- struct audio_aio_pmem_region *region;
+ struct audio_aio_ion_region *region;
struct list_head *ptr, *next;
int rc = -EINVAL;
pr_debug("%s[%p]:\n", __func__, audio);
- list_for_each_safe(ptr, next, &audio->pmem_region_queue) {
- region = list_entry(ptr, struct audio_aio_pmem_region, list);
+ list_for_each_safe(ptr, next, &audio->ion_region_queue) {
+ region = list_entry(ptr, struct audio_aio_ion_region, list);
pr_debug("%s[%p]: phy_address = 0x%lx\n",
__func__, audio, region->paddr);
if (region != NULL) {
@@ -590,9 +592,9 @@
audio->wflush = 0;
audio->drv_ops.out_flush(audio);
audio->drv_ops.in_flush(audio);
- audio_aio_unmap_pmem_region(audio);
+ audio_aio_unmap_ion_region(audio);
audio_aio_disable(audio);
- audio_aio_reset_pmem_region(audio);
+ audio_aio_reset_ion_region(audio);
audio->event_abort = 1;
wake_up(&audio->event_wait);
audio_aio_reset_event_queue(audio);
@@ -746,14 +748,14 @@
pr_debug("%s[%p]:posted AUDIO_EVENT_WRITE_DONE to user\n",
__func__, audio);
mutex_lock(&audio->write_lock);
- audio_aio_pmem_fixup(audio, drv_evt->payload.aio_buf.buf_addr,
+ audio_aio_ion_fixup(audio, drv_evt->payload.aio_buf.buf_addr,
drv_evt->payload.aio_buf.buf_len, 0, 0);
mutex_unlock(&audio->write_lock);
} else if (drv_evt->event_type == AUDIO_EVENT_READ_DONE) {
pr_debug("%s[%p]:posted AUDIO_EVENT_READ_DONE to user\n",
__func__, audio);
mutex_lock(&audio->read_lock);
- audio_aio_pmem_fixup(audio, drv_evt->payload.aio_buf.buf_addr,
+ audio_aio_ion_fixup(audio, drv_evt->payload.aio_buf.buf_addr,
drv_evt->payload.aio_buf.buf_len, 0, 0);
mutex_unlock(&audio->read_lock);
}
@@ -773,13 +775,13 @@
return rc;
}
-static int audio_aio_pmem_check(struct q6audio_aio *audio,
+static int audio_aio_ion_check(struct q6audio_aio *audio,
void *vaddr, unsigned long len)
{
- struct audio_aio_pmem_region *region_elt;
- struct audio_aio_pmem_region t = {.vaddr = vaddr, .len = len };
+ struct audio_aio_ion_region *region_elt;
+ struct audio_aio_ion_region t = {.vaddr = vaddr, .len = len };
- list_for_each_entry(region_elt, &audio->pmem_region_queue, list) {
+ list_for_each_entry(region_elt, &audio->ion_region_queue, list) {
if (CONTAINS(region_elt, &t) || CONTAINS(&t, region_elt) ||
OVERLAPS(region_elt, &t)) {
pr_err("%s[%p]:region (vaddr %p len %ld)"
@@ -795,13 +797,18 @@
return 0;
}
-static int audio_aio_pmem_add(struct q6audio_aio *audio,
- struct msm_audio_pmem_info *info)
+static int audio_aio_ion_add(struct q6audio_aio *audio,
+ struct msm_audio_ion_info *info)
{
- unsigned long paddr, kvaddr, len;
- struct file *file;
- struct audio_aio_pmem_region *region;
+ ion_phys_addr_t paddr;
+ size_t len;
+ unsigned long kvaddr;
+ struct audio_aio_ion_region *region;
int rc = -EINVAL;
+ struct ion_handle *handle;
+ struct ion_client *client;
+ unsigned long ionflag;
+ void *temp_ptr;
pr_debug("%s[%p]:\n", __func__, audio);
region = kmalloc(sizeof(*region), GFP_KERNEL);
@@ -811,50 +818,89 @@
goto end;
}
- if (get_pmem_file(info->fd, &paddr, &kvaddr, &len, &file)) {
- kfree(region);
- goto end;
+ client = msm_ion_client_create(UINT_MAX, "Audio_Dec_Client");
+ if (IS_ERR_OR_NULL(client)) {
+ pr_err("Unable to create ION client\n");
+ goto client_error;
}
- rc = audio_aio_pmem_check(audio, info->vaddr, len);
+ handle = ion_import_fd(client, info->fd);
+ if (IS_ERR_OR_NULL(handle)) {
+ pr_err("%s: could not get handle of the given fd\n", __func__);
+ goto import_error;
+ }
+
+ rc = ion_handle_get_flags(client, handle, &ionflag);
+ if (rc) {
+ pr_err("%s: could not get flags for the handle\n", __func__);
+ goto flag_error;
+ }
+
+ temp_ptr = ion_map_kernel(client, handle, ionflag);
+ if (IS_ERR_OR_NULL(temp_ptr)) {
+ pr_err("%s: could not get virtual address\n", __func__);
+ goto map_error;
+ }
+ kvaddr = (unsigned long)temp_ptr;
+
+ rc = ion_phys(client, handle, &paddr, &len);
+ if (rc) {
+ pr_err("%s: could not get physical address\n", __func__);
+ goto ion_error;
+ }
+
+ rc = audio_aio_ion_check(audio, info->vaddr, len);
if (rc < 0) {
- put_pmem_file(file);
- kfree(region);
- goto end;
+ pr_err("%s: audio_aio_ion_check failed\n", __func__);
+ goto ion_error;
}
+ region->client = client;
+ region->handle = handle;
region->vaddr = info->vaddr;
region->fd = info->fd;
region->paddr = paddr;
region->kvaddr = kvaddr;
region->len = len;
- region->file = file;
region->ref_cnt = 0;
pr_debug("%s[%p]:add region paddr %lx vaddr %p, len %lu kvaddr %lx\n",
__func__, audio,
region->paddr, region->vaddr, region->len, region->kvaddr);
- list_add_tail(®ion->list, &audio->pmem_region_queue);
-
+ list_add_tail(®ion->list, &audio->ion_region_queue);
rc = q6asm_memory_map(audio->ac, (uint32_t) paddr, IN, (uint32_t) len,
1);
- if (rc < 0)
+ if (rc < 0) {
pr_err("%s[%p]: memory map failed\n", __func__, audio);
+ goto ion_error;
+ } else {
+ goto end;
+ }
+
+ion_error:
+ ion_unmap_kernel(client, handle);
+map_error:
+ ion_free(client, handle);
+flag_error:
+import_error:
+ ion_client_destroy(client);
+client_error:
+ kfree(region);
end:
return rc;
}
-static int audio_aio_pmem_remove(struct q6audio_aio *audio,
- struct msm_audio_pmem_info *info)
+static int audio_aio_ion_remove(struct q6audio_aio *audio,
+ struct msm_audio_ion_info *info)
{
- struct audio_aio_pmem_region *region;
+ struct audio_aio_ion_region *region;
struct list_head *ptr, *next;
int rc = -EINVAL;
pr_debug("%s[%p]:info fd %d vaddr %p\n",
__func__, audio, info->fd, info->vaddr);
- list_for_each_safe(ptr, next, &audio->pmem_region_queue) {
- region = list_entry(ptr, struct audio_aio_pmem_region, list);
+ list_for_each_safe(ptr, next, &audio->ion_region_queue) {
+ region = list_entry(ptr, struct audio_aio_ion_region, list);
if ((region->fd == info->fd) &&
(region->vaddr == info->vaddr)) {
@@ -873,7 +919,9 @@
__func__, audio);
list_del(®ion->list);
- put_pmem_file(region->file);
+ ion_unmap_kernel(region->client, region->handle);
+ ion_free(region->client, region->handle);
+ ion_client_destroy(region->client);
kfree(region);
rc = 0;
break;
@@ -989,8 +1037,7 @@
pr_debug("%s[%p]:node %p dir %x buf_addr %p buf_len %d data_len \
%d\n", __func__, audio, buf_node, dir, buf_node->buf.buf_addr,
buf_node->buf.buf_len, buf_node->buf.data_len);
-
- buf_node->paddr = audio_aio_pmem_fixup(audio, buf_node->buf.buf_addr,
+ buf_node->paddr = audio_aio_ion_fixup(audio, buf_node->buf.buf_addr,
buf_node->buf.buf_len, 1,
&buf_node->kvaddr);
if (dir) {
@@ -1125,7 +1172,7 @@
init_waitqueue_head(&audio->event_wait);
INIT_LIST_HEAD(&audio->out_queue);
INIT_LIST_HEAD(&audio->in_queue);
- INIT_LIST_HEAD(&audio->pmem_region_queue);
+ INIT_LIST_HEAD(&audio->ion_region_queue);
INIT_LIST_HEAD(&audio->free_event_queue);
INIT_LIST_HEAD(&audio->event_queue);
@@ -1281,25 +1328,25 @@
mutex_unlock(&audio->lock);
break;
}
- case AUDIO_REGISTER_PMEM: {
- struct msm_audio_pmem_info info;
- pr_debug("%s[%p]:AUDIO_REGISTER_PMEM\n", __func__, audio);
+ case AUDIO_REGISTER_ION: {
+ struct msm_audio_ion_info info;
+ pr_debug("%s[%p]:AUDIO_REGISTER_ION\n", __func__, audio);
mutex_lock(&audio->lock);
if (copy_from_user(&info, (void *)arg, sizeof(info)))
rc = -EFAULT;
else
- rc = audio_aio_pmem_add(audio, &info);
+ rc = audio_aio_ion_add(audio, &info);
mutex_unlock(&audio->lock);
break;
}
- case AUDIO_DEREGISTER_PMEM: {
- struct msm_audio_pmem_info info;
+ case AUDIO_DEREGISTER_ION: {
+ struct msm_audio_ion_info info;
mutex_lock(&audio->lock);
- pr_debug("%s[%p]:AUDIO_DEREGISTER_PMEM\n", __func__, audio);
+ pr_debug("%s[%p]:AUDIO_DEREGISTER_ION\n", __func__, audio);
if (copy_from_user(&info, (void *)arg, sizeof(info)))
rc = -EFAULT;
else
- rc = audio_aio_pmem_remove(audio, &info);
+ rc = audio_aio_ion_remove(audio, &info);
mutex_unlock(&audio->lock);
break;
}
diff --git a/arch/arm/mach-msm/qdsp6v2/audio_utils_aio.h b/arch/arm/mach-msm/qdsp6v2/audio_utils_aio.h
index ebf3668..a25ca4d 100644
--- a/arch/arm/mach-msm/qdsp6v2/audio_utils_aio.h
+++ b/arch/arm/mach-msm/qdsp6v2/audio_utils_aio.h
@@ -1,6 +1,6 @@
/* Copyright (C) 2008 Google, Inc.
* Copyright (C) 2008 HTC Corporation
- * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -23,15 +23,13 @@
#include <linux/msm_audio.h>
#include <linux/debugfs.h>
#include <linux/list.h>
-#include <linux/android_pmem.h>
#include <linux/slab.h>
+#include <linux/ion.h>
#include <asm/ioctls.h>
#include <asm/atomic.h>
#include <sound/q6asm.h>
#include <sound/apr_audio.h>
-
-
#define TUNNEL_MODE 0x0000
#define NON_TUNNEL_MODE 0x0001
@@ -114,9 +112,10 @@
#define FRAME_NUM (2)
#define FRAME_SIZE ((4*1536) + sizeof(struct dec_meta_in))
-struct audio_aio_pmem_region {
+struct audio_aio_ion_region {
struct list_head list;
- struct file *file;
+ struct ion_handle *handle;
+ struct ion_client *client;
int fd;
void *vaddr;
unsigned long paddr;
@@ -174,7 +173,7 @@
struct list_head in_queue; /* queue to retain input buffers */
struct list_head free_event_queue;
struct list_head event_queue;
- struct list_head pmem_region_queue; /* protected by lock */
+ struct list_head ion_region_queue; /* protected by lock */
struct audio_aio_drv_operations drv_ops;
union msm_audio_event_payload eos_write_payload;
diff --git a/arch/arm/mach-msm/qdsp6v2/pcm_in.c b/arch/arm/mach-msm/qdsp6v2/pcm_in.c
index 1f20aa7..667628c 100644
--- a/arch/arm/mach-msm/qdsp6v2/pcm_in.c
+++ b/arch/arm/mach-msm/qdsp6v2/pcm_in.c
@@ -1,7 +1,7 @@
/*
* Copyright (C) 2009 Google, Inc.
* Copyright (C) 2009 HTC Corporation
- * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -72,6 +72,9 @@
case ASM_DATA_EVENT_READ_DONE:
pcm_in_get_dsp_buffers(pcm, token, payload);
break;
+ case RESET_EVENTS:
+ reset_device();
+ break;
default:
break;
}
diff --git a/arch/arm/mach-msm/qdsp6v2/pcm_out.c b/arch/arm/mach-msm/qdsp6v2/pcm_out.c
index a4a6b72..733d5e3 100644
--- a/arch/arm/mach-msm/qdsp6v2/pcm_out.c
+++ b/arch/arm/mach-msm/qdsp6v2/pcm_out.c
@@ -1,6 +1,6 @@
/*
* Copyright (C) 2009 Google, Inc.
- * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
* Author: Brian Swetland <swetland@google.com>
*
* This software is licensed under the terms of the GNU General Public
@@ -66,6 +66,9 @@
atomic_inc(&pcm->out_count);
wake_up(&pcm->write_wait);
break;
+ case RESET_EVENTS:
+ reset_device();
+ break;
default:
break;
}
diff --git a/arch/arm/mach-msm/qdsp6v2/rtac.c b/arch/arm/mach-msm/qdsp6v2/rtac.c
index 9823209..a3a14c4 100644
--- a/arch/arm/mach-msm/qdsp6v2/rtac.c
+++ b/arch/arm/mach-msm/qdsp6v2/rtac.c
@@ -442,8 +442,7 @@
}
- if ((payload_size < 0) ||
- (payload_size > MAX_PAYLOAD_SIZE)) {
+ if (payload_size > MAX_PAYLOAD_SIZE) {
pr_err("%s: Invalid payload size = %d\n",
__func__, payload_size);
@@ -614,8 +613,7 @@
goto done;
}
- if ((payload_size < 0) ||
- (payload_size > MAX_PAYLOAD_SIZE)) {
+ if (payload_size > MAX_PAYLOAD_SIZE) {
pr_err("%s: Invalid payload size = %d\n",
__func__, payload_size);
@@ -627,15 +625,17 @@
__func__);
goto done;
}
- if (session_id >= AFE_MAX_PORTS) {
+ if (session_id > (SESSION_MAX + 1)) {
pr_err("%s: Invalid Session = %d\n", __func__, session_id);
goto done;
}
mutex_lock(&rtac_asm_apr_mutex);
- if (rtac_asm_apr_data[session_id].apr_handle == NULL) {
- pr_err("%s: APR not initialized\n", __func__);
- goto err;
+ if (session_id < SESSION_MAX+1) {
+ if (rtac_asm_apr_data[session_id].apr_handle == NULL) {
+ pr_err("%s: APR not initialized\n", __func__);
+ goto err;
+ }
}
/* Set globals for copy of returned payload */
@@ -664,7 +664,8 @@
asm_params.opcode = opcode;
memcpy(rtac_asm_buffer, &asm_params, sizeof(asm_params));
- atomic_set(&rtac_asm_apr_data[session_id].cmd_state, 1);
+ if (session_id < SESSION_MAX+1)
+ atomic_set(&rtac_asm_apr_data[session_id].cmd_state, 1);
pr_debug("%s: Sending RTAC command size = %d, session_id=%d\n",
__func__, asm_params.pkt_size, session_id);
@@ -723,7 +724,7 @@
bool rtac_make_voice_callback(u32 mode, uint32_t *payload, u32 payload_size)
{
if ((atomic_read(&rtac_voice_apr_data[mode].cmd_state) != 1) ||
- (mode < 0) || (mode >= RTAC_VOICE_MODES))
+ (mode >= RTAC_VOICE_MODES))
return false;
pr_debug("%s\n", __func__);
@@ -782,10 +783,8 @@
goto done;
}
- if ((payload_size < 0) ||
- (payload_size > MAX_PAYLOAD_SIZE)) {
-
- pr_err("%s: Invalid payload size = %d\n",
+ if (payload_size > MAX_PAYLOAD_SIZE) {
+ pr_err("%s: Invalid payload size = %d\n",
__func__, payload_size);
goto done;
}
diff --git a/arch/arm/mach-msm/qdss-ptm.c b/arch/arm/mach-msm/qdss-etm.c
similarity index 100%
rename from arch/arm/mach-msm/qdss-ptm.c
rename to arch/arm/mach-msm/qdss-etm.c
diff --git a/arch/arm/mach-msm/scm-pas.c b/arch/arm/mach-msm/scm-pas.c
index 747b585..e0d0dd8 100644
--- a/arch/arm/mach-msm/scm-pas.c
+++ b/arch/arm/mach-msm/scm-pas.c
@@ -190,10 +190,7 @@
static int __init scm_pas_init(void)
{
- /* TODO: Remove once bus scaling driver is in place */
- if (!cpu_is_apq8064())
- scm_perf_client = msm_bus_scale_register_client(
- &scm_pas_bus_pdata);
+ scm_perf_client = msm_bus_scale_register_client(&scm_pas_bus_pdata);
if (!scm_perf_client)
pr_warn("unable to register bus client\n");
scm_bus_clk = clk_get_sys("scm", "bus_clk");
diff --git a/arch/arm/mach-msm/scm.c b/arch/arm/mach-msm/scm.c
index 6794a88..cdb0cbe 100644
--- a/arch/arm/mach-msm/scm.c
+++ b/arch/arm/mach-msm/scm.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -333,6 +333,38 @@
}
EXPORT_SYMBOL(scm_call_atomic2);
+s32 scm_call_atomic4_3(u32 svc, u32 cmd, u32 arg1, u32 arg2,
+ u32 arg3, u32 arg4, u32 *ret1, u32 *ret2)
+{
+ int ret;
+ int context_id;
+ register u32 r0 asm("r0") = SCM_ATOMIC(svc, cmd, 4);
+ register u32 r1 asm("r1") = (u32)&context_id;
+ register u32 r2 asm("r2") = arg1;
+ register u32 r3 asm("r3") = arg2;
+ register u32 r4 asm("r4") = arg3;
+ register u32 r5 asm("r5") = arg4;
+
+ asm volatile(
+ __asmeq("%0", "r0")
+ __asmeq("%1", "r1")
+ __asmeq("%2", "r2")
+ __asmeq("%3", "r0")
+ __asmeq("%4", "r1")
+ __asmeq("%5", "r2")
+ __asmeq("%6", "r3")
+ "smc #0 @ switch to secure world\n"
+ : "=r" (r0), "=r" (r1), "=r" (r2)
+ : "r" (r0), "r" (r1), "r" (r2), "r" (r3), "r" (r4), "r" (r5));
+ ret = r0;
+ if (ret1)
+ *ret1 = r1;
+ if (ret2)
+ *ret2 = r2;
+ return r0;
+}
+EXPORT_SYMBOL(scm_call_atomic4_3);
+
u32 scm_get_version(void)
{
int context_id;
diff --git a/arch/arm/mach-msm/smd.c b/arch/arm/mach-msm/smd.c
index bca1e0c..d7f2623 100644
--- a/arch/arm/mach-msm/smd.c
+++ b/arch/arm/mach-msm/smd.c
@@ -72,6 +72,7 @@
MSM_SMSM_DEBUG = 1U << 1,
MSM_SMD_INFO = 1U << 2,
MSM_SMSM_INFO = 1U << 3,
+ MSM_SMx_POWER_INFO = 1U << 4,
};
struct smsm_shared_info {
@@ -117,29 +118,34 @@
};
static irqreturn_t smd_modem_irq_handler(int irq, void *data);
+static irqreturn_t smsm_modem_irq_handler(int irq, void *data);
static irqreturn_t smd_dsp_irq_handler(int irq, void *data);
+static irqreturn_t smsm_dsp_irq_handler(int irq, void *data);
static irqreturn_t smd_dsps_irq_handler(int irq, void *data);
+static irqreturn_t smsm_dsps_irq_handler(int irq, void *data);
static irqreturn_t smd_wcnss_irq_handler(int irq, void *data);
+static irqreturn_t smsm_wcnss_irq_handler(int irq, void *data);
static irqreturn_t smsm_irq_handler(int irq, void *data);
static struct interrupt_config private_intr_config[NUM_SMD_SUBSYSTEMS] = {
[SMD_MODEM] = {
.smd.irq_handler = smd_modem_irq_handler,
- .smsm.irq_handler = smsm_irq_handler,
+ .smsm.irq_handler = smsm_modem_irq_handler,
},
[SMD_Q6] = {
.smd.irq_handler = smd_dsp_irq_handler,
- .smsm.irq_handler = smsm_irq_handler,
+ .smsm.irq_handler = smsm_dsp_irq_handler,
},
[SMD_DSPS] = {
.smd.irq_handler = smd_dsps_irq_handler,
- .smsm.irq_handler = smsm_irq_handler,
+ .smsm.irq_handler = smsm_dsps_irq_handler,
},
[SMD_WCNSS] = {
.smd.irq_handler = smd_wcnss_irq_handler,
- .smsm.irq_handler = smsm_irq_handler,
+ .smsm.irq_handler = smsm_wcnss_irq_handler,
},
};
+struct interrupt_stat interrupt_stats[NUM_SMD_SUBSYSTEMS];
#define SMSM_STATE_ADDR(entry) (smsm_info.state + entry)
#define SMSM_INTR_MASK_ADDR(entry, host) (smsm_info.intr_mask + \
@@ -175,11 +181,16 @@
if (msm_smd_debug_mask & MSM_SMSM_INFO) \
printk(KERN_INFO x); \
} while (0)
+#define SMx_POWER_INFO(x...) do { \
+ if (msm_smd_debug_mask & MSM_SMx_POWER_INFO) \
+ printk(KERN_INFO x); \
+ } while (0)
#else
#define SMD_DBG(x...) do { } while (0)
#define SMSM_DBG(x...) do { } while (0)
#define SMD_INFO(x...) do { } while (0)
#define SMSM_INFO(x...) do { } while (0)
+#define SMx_POWER_INFO(x...) do { } while (0)
#endif
static unsigned last_heap_free = 0xffffffff;
@@ -214,24 +225,6 @@
#define MSM_TRIG_A2DSPS_SMSM_INT
#define MSM_TRIG_A2WCNSS_SMD_INT
#define MSM_TRIG_A2WCNSS_SMSM_INT
-#elif defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_MSM8930) || \
- defined(CONFIG_ARCH_APQ8064)
-#define MSM_TRIG_A2M_SMD_INT \
- (smd_write_intr(1 << 3, MSM_APCS_GCC_BASE + 0x8))
-#define MSM_TRIG_A2Q6_SMD_INT \
- (smd_write_intr(1 << 15, MSM_APCS_GCC_BASE + 0x8))
-#define MSM_TRIG_A2M_SMSM_INT \
- (smd_write_intr(1 << 4, MSM_APCS_GCC_BASE + 0x8))
-#define MSM_TRIG_A2Q6_SMSM_INT \
- (smd_write_intr(1 << 14, MSM_APCS_GCC_BASE + 0x8))
-#define MSM_TRIG_A2DSPS_SMD_INT \
- (smd_write_intr(1, MSM_SIC_NON_SECURE_BASE + 0x4080))
-#define MSM_TRIG_A2DSPS_SMSM_INT \
- (smd_write_intr(1, MSM_SIC_NON_SECURE_BASE + 0x4094))
-#define MSM_TRIG_A2WCNSS_SMD_INT \
- (smd_write_intr(1 << 25, MSM_APCS_GCC_BASE + 0x8))
-#define MSM_TRIG_A2WCNSS_SMSM_INT \
- (smd_write_intr(1 << 23, MSM_APCS_GCC_BASE + 0x8))
#elif defined(CONFIG_ARCH_MSM9615)
#define MSM_TRIG_A2M_SMD_INT \
(smd_write_intr(1 << 3, MSM_APCS_GCC_BASE + 0x8))
@@ -258,15 +251,33 @@
#define MSM_TRIG_A2DSPS_SMSM_INT
#define MSM_TRIG_A2WCNSS_SMD_INT
#define MSM_TRIG_A2WCNSS_SMSM_INT
-#else
+#elif defined(CONFIG_ARCH_MSM7X01A) || defined(CONFIG_ARCH_MSM7x25)
#define MSM_TRIG_A2M_SMD_INT \
(smd_write_intr(1, MSM_CSR_BASE + 0x400 + (0) * 4))
-#define MSM_TRIG_A2Q6_SMD_INT \
- (smd_write_intr(1, MSM_CSR_BASE + 0x400 + (8) * 4))
+#define MSM_TRIG_A2Q6_SMD_INT
#define MSM_TRIG_A2M_SMSM_INT \
(smd_write_intr(1, MSM_CSR_BASE + 0x400 + (5) * 4))
-#define MSM_TRIG_A2Q6_SMSM_INT \
- (smd_write_intr(1, MSM_CSR_BASE + 0x400 + (8) * 4))
+#define MSM_TRIG_A2Q6_SMSM_INT
+#define MSM_TRIG_A2DSPS_SMD_INT
+#define MSM_TRIG_A2DSPS_SMSM_INT
+#define MSM_TRIG_A2WCNSS_SMD_INT
+#define MSM_TRIG_A2WCNSS_SMSM_INT
+#elif defined(CONFIG_ARCH_MSM7X27) || defined(CONFIG_ARCH_MSM7X27A)
+#define MSM_TRIG_A2M_SMD_INT \
+ (smd_write_intr(1, MSM_CSR_BASE + 0x400 + (0) * 4))
+#define MSM_TRIG_A2Q6_SMD_INT
+#define MSM_TRIG_A2M_SMSM_INT \
+ (smd_write_intr(1, MSM_CSR_BASE + 0x400 + (5) * 4))
+#define MSM_TRIG_A2Q6_SMSM_INT
+#define MSM_TRIG_A2DSPS_SMD_INT
+#define MSM_TRIG_A2DSPS_SMSM_INT
+#define MSM_TRIG_A2WCNSS_SMD_INT
+#define MSM_TRIG_A2WCNSS_SMSM_INT
+#else /* use platform device / device tree configuration */
+#define MSM_TRIG_A2M_SMD_INT
+#define MSM_TRIG_A2Q6_SMD_INT
+#define MSM_TRIG_A2M_SMSM_INT
+#define MSM_TRIG_A2Q6_SMSM_INT
#define MSM_TRIG_A2DSPS_SMD_INT
#define MSM_TRIG_A2DSPS_SMSM_INT
#define MSM_TRIG_A2WCNSS_SMD_INT
@@ -349,33 +360,42 @@
{
static const struct interrupt_config_item *intr
= &private_intr_config[SMD_MODEM].smd;
- if (intr->out_base)
+ if (intr->out_base) {
+ ++interrupt_stats[SMD_MODEM].smd_out_config_count;
smd_write_intr(intr->out_bit_pos,
intr->out_base + intr->out_offset);
- else
+ } else {
+ ++interrupt_stats[SMD_MODEM].smd_out_hardcode_count;
MSM_TRIG_A2M_SMD_INT;
+ }
}
static inline void notify_dsp_smd(void)
{
static const struct interrupt_config_item *intr
= &private_intr_config[SMD_Q6].smd;
- if (intr->out_base)
+ if (intr->out_base) {
+ ++interrupt_stats[SMD_Q6].smd_out_config_count;
smd_write_intr(intr->out_bit_pos,
intr->out_base + intr->out_offset);
- else
+ } else {
+ ++interrupt_stats[SMD_Q6].smd_out_hardcode_count;
MSM_TRIG_A2Q6_SMD_INT;
+ }
}
static inline void notify_dsps_smd(void)
{
static const struct interrupt_config_item *intr
= &private_intr_config[SMD_DSPS].smd;
- if (intr->out_base)
+ if (intr->out_base) {
+ ++interrupt_stats[SMD_DSPS].smd_out_config_count;
smd_write_intr(intr->out_bit_pos,
intr->out_base + intr->out_offset);
- else
+ } else {
+ ++interrupt_stats[SMD_DSPS].smd_out_hardcode_count;
MSM_TRIG_A2DSPS_SMD_INT;
+ }
}
static inline void notify_wcnss_smd(void)
@@ -384,44 +404,56 @@
= &private_intr_config[SMD_WCNSS].smd;
wakeup_v1_riva();
- if (intr->out_base)
+ if (intr->out_base) {
+ ++interrupt_stats[SMD_WCNSS].smd_out_config_count;
smd_write_intr(intr->out_bit_pos,
intr->out_base + intr->out_offset);
- else
+ } else {
+ ++interrupt_stats[SMD_WCNSS].smd_out_hardcode_count;
MSM_TRIG_A2WCNSS_SMD_INT;
+ }
}
static inline void notify_modem_smsm(void)
{
static const struct interrupt_config_item *intr
= &private_intr_config[SMD_MODEM].smsm;
- if (intr->out_base)
+ if (intr->out_base) {
+ ++interrupt_stats[SMD_MODEM].smsm_out_config_count;
smd_write_intr(intr->out_bit_pos,
intr->out_base + intr->out_offset);
- else
+ } else {
+ ++interrupt_stats[SMD_MODEM].smsm_out_hardcode_count;
MSM_TRIG_A2M_SMSM_INT;
+ }
}
static inline void notify_dsp_smsm(void)
{
static const struct interrupt_config_item *intr
= &private_intr_config[SMD_Q6].smsm;
- if (intr->out_base)
+ if (intr->out_base) {
+ ++interrupt_stats[SMD_Q6].smsm_out_config_count;
smd_write_intr(intr->out_bit_pos,
intr->out_base + intr->out_offset);
- else
+ } else {
+ ++interrupt_stats[SMD_Q6].smsm_out_hardcode_count;
MSM_TRIG_A2Q6_SMSM_INT;
+ }
}
static inline void notify_dsps_smsm(void)
{
static const struct interrupt_config_item *intr
= &private_intr_config[SMD_DSPS].smsm;
- if (intr->out_base)
+ if (intr->out_base) {
+ ++interrupt_stats[SMD_DSPS].smsm_out_config_count;
smd_write_intr(intr->out_bit_pos,
intr->out_base + intr->out_offset);
- else
+ } else {
+ ++interrupt_stats[SMD_DSPS].smsm_out_hardcode_count;
MSM_TRIG_A2DSPS_SMSM_INT;
+ }
}
static inline void notify_wcnss_smsm(void)
@@ -430,11 +462,14 @@
= &private_intr_config[SMD_WCNSS].smsm;
wakeup_v1_riva();
- if (intr->out_base)
+ if (intr->out_base) {
+ ++interrupt_stats[SMD_WCNSS].smsm_out_config_count;
smd_write_intr(intr->out_bit_pos,
intr->out_base + intr->out_offset);
- else
+ } else {
+ ++interrupt_stats[SMD_WCNSS].smsm_out_hardcode_count;
MSM_TRIG_A2WCNSS_SMSM_INT;
+ }
}
static void notify_other_smsm(uint32_t smsm_entry, uint32_t notify_mask)
@@ -589,27 +624,28 @@
struct edge_to_pid {
uint32_t local_pid;
uint32_t remote_pid;
+ char subsys_name[SMD_MAX_CH_NAME_LEN];
};
/**
* Maps edge type to local and remote processor ID's.
*/
static struct edge_to_pid edge_to_pids[] = {
- [SMD_APPS_MODEM] = {SMSM_APPS, SMSM_MODEM},
- [SMD_APPS_QDSP] = {SMSM_APPS, SMSM_Q6},
- [SMD_MODEM_QDSP] = {SMSM_MODEM, SMSM_Q6},
- [SMD_APPS_DSPS] = {SMSM_APPS, SMSM_DSPS},
- [SMD_MODEM_DSPS] = {SMSM_MODEM, SMSM_DSPS},
- [SMD_QDSP_DSPS] = {SMSM_Q6, SMSM_DSPS},
- [SMD_APPS_WCNSS] = {SMSM_APPS, SMSM_WCNSS},
- [SMD_MODEM_WCNSS] = {SMSM_MODEM, SMSM_WCNSS},
- [SMD_QDSP_WCNSS] = {SMSM_Q6, SMSM_WCNSS},
- [SMD_DSPS_WCNSS] = {SMSM_DSPS, SMSM_WCNSS},
- [SMD_APPS_Q6FW] = {SMSM_APPS, SMD_MODEM_Q6_FW},
- [SMD_MODEM_Q6FW] = {SMSM_MODEM, SMD_MODEM_Q6_FW},
- [SMD_QDSP_Q6FW] = {SMSM_Q6, SMD_MODEM_Q6_FW},
- [SMD_DSPS_Q6FW] = {SMSM_DSPS, SMD_MODEM_Q6_FW},
- [SMD_WCNSS_Q6FW] = {SMSM_WCNSS, SMD_MODEM_Q6_FW},
+ [SMD_APPS_MODEM] = {SMD_APPS, SMD_MODEM, "modem"},
+ [SMD_APPS_QDSP] = {SMD_APPS, SMD_Q6, "q6"},
+ [SMD_MODEM_QDSP] = {SMD_MODEM, SMD_Q6},
+ [SMD_APPS_DSPS] = {SMD_APPS, SMD_DSPS, "dsps"},
+ [SMD_MODEM_DSPS] = {SMD_MODEM, SMD_DSPS},
+ [SMD_QDSP_DSPS] = {SMD_Q6, SMD_DSPS},
+ [SMD_APPS_WCNSS] = {SMD_APPS, SMD_WCNSS, "wcnss"},
+ [SMD_MODEM_WCNSS] = {SMD_MODEM, SMD_WCNSS},
+ [SMD_QDSP_WCNSS] = {SMD_Q6, SMD_WCNSS},
+ [SMD_DSPS_WCNSS] = {SMD_DSPS, SMD_WCNSS},
+ [SMD_APPS_Q6FW] = {SMD_APPS, SMD_MODEM_Q6_FW},
+ [SMD_MODEM_Q6FW] = {SMD_MODEM, SMD_MODEM_Q6_FW},
+ [SMD_QDSP_Q6FW] = {SMD_Q6, SMD_MODEM_Q6_FW},
+ [SMD_DSPS_Q6FW] = {SMD_DSPS, SMD_MODEM_Q6_FW},
+ [SMD_WCNSS_Q6FW] = {SMD_WCNSS, SMD_MODEM_Q6_FW},
};
struct restart_notifier_block {
@@ -618,6 +654,7 @@
struct notifier_block nb;
};
+static int disable_smsm_reset_handshake;
static struct platform_device loopback_tty_pdev = {.name = "LOOPBACK_TTY"};
static LIST_HEAD(smd_ch_closed_list);
@@ -721,6 +758,50 @@
return ret;
}
+/*
+ * Returns a pointer to the subsystem name or NULL if no
+ * subsystem name is available.
+ *
+ * @type - Edge definition
+ */
+const char *smd_edge_to_subsystem(uint32_t type)
+{
+ const char *subsys = NULL;
+
+ if (type < ARRAY_SIZE(edge_to_pids)) {
+ subsys = edge_to_pids[type].subsys_name;
+ if (subsys[0] == 0x0)
+ subsys = NULL;
+ }
+ return subsys;
+}
+EXPORT_SYMBOL(smd_edge_to_subsystem);
+
+/*
+ * Returns a pointer to the subsystem name given the
+ * remote processor ID.
+ *
+ * @pid Remote processor ID
+ * @returns Pointer to subsystem name or NULL if not found
+ */
+const char *smd_pid_to_subsystem(uint32_t pid)
+{
+ const char *subsys = NULL;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(edge_to_pids); ++i) {
+ if (pid == edge_to_pids[i].remote_pid &&
+ edge_to_pids[i].subsys_name[0] != 0x0
+ ) {
+ subsys = edge_to_pids[i].subsys_name;
+ break;
+ }
+ }
+
+ return subsys;
+}
+EXPORT_SYMBOL(smd_pid_to_subsystem);
+
static void smd_reset_edge(struct smd_half_channel *ch, unsigned new_state)
{
if (ch->state != SMD_SS_CLOSED) {
@@ -796,9 +877,10 @@
/* notify SMSM processors */
smsm_irq_handler(0, 0);
- MSM_TRIG_A2M_SMSM_INT;
- MSM_TRIG_A2Q6_SMSM_INT;
- MSM_TRIG_A2DSPS_SMSM_INT;
+ notify_modem_smsm();
+ notify_dsp_smsm();
+ notify_dsps_smsm();
+ notify_wcnss_smsm();
}
/* change all remote states to CLOSING */
@@ -1110,15 +1192,24 @@
}
tmp = ch->recv->state;
if (tmp != ch->last_state) {
+ SMx_POWER_INFO("SMD ch%d '%s' State change %d->%d\n",
+ ch->n, ch->name, ch->last_state, tmp);
smd_state_change(ch, ch->last_state, tmp);
state_change = 1;
}
- if (ch_flags) {
+ if (ch_flags & 0x3) {
ch->update_state(ch);
+ SMx_POWER_INFO("SMD ch%d '%s' Data event r%d/w%d\n",
+ ch->n, ch->name,
+ ch->read_avail(ch),
+ ch->fifo_size - ch->write_avail(ch));
ch->notify(ch->priv, SMD_EVENT_DATA);
}
- if (ch_flags & 0x4 && !state_change)
+ if (ch_flags & 0x4 && !state_change) {
+ SMx_POWER_INFO("SMD ch%d '%s' State update\n",
+ ch->n, ch->name);
ch->notify(ch->priv, SMD_EVENT_STATUS);
+ }
}
spin_unlock_irqrestore(&smd_lock, flags);
do_smd_probe();
@@ -1126,6 +1217,8 @@
static irqreturn_t smd_modem_irq_handler(int irq, void *data)
{
+ SMx_POWER_INFO("SMD Int Modem->Apps\n");
+ ++interrupt_stats[SMD_MODEM].smd_in_count;
handle_smd_irq(&smd_ch_list_modem, notify_modem_smd);
handle_smd_irq_closing_list();
return IRQ_HANDLED;
@@ -1133,6 +1226,8 @@
static irqreturn_t smd_dsp_irq_handler(int irq, void *data)
{
+ SMx_POWER_INFO("SMD Int LPASS->Apps\n");
+ ++interrupt_stats[SMD_Q6].smd_in_count;
handle_smd_irq(&smd_ch_list_dsp, notify_dsp_smd);
handle_smd_irq_closing_list();
return IRQ_HANDLED;
@@ -1140,6 +1235,8 @@
static irqreturn_t smd_dsps_irq_handler(int irq, void *data)
{
+ SMx_POWER_INFO("SMD Int DSPS->Apps\n");
+ ++interrupt_stats[SMD_DSPS].smd_in_count;
handle_smd_irq(&smd_ch_list_dsps, notify_dsps_smd);
handle_smd_irq_closing_list();
return IRQ_HANDLED;
@@ -1147,6 +1244,8 @@
static irqreturn_t smd_wcnss_irq_handler(int irq, void *data)
{
+ SMx_POWER_INFO("SMD Int WCNSS->Apps\n");
+ ++interrupt_stats[SMD_WCNSS].smd_in_count;
handle_smd_irq(&smd_ch_list_wcnss, notify_wcnss_smd);
handle_smd_irq_closing_list();
return IRQ_HANDLED;
@@ -2240,7 +2339,7 @@
/* If we get an interrupt and the apps SMSM_RESET
bit is already set, the modem is acking the
app's reset ack. */
- if (!cpu_is_msm8960() && !cpu_is_msm8930())
+ if (!disable_smsm_reset_handshake)
apps &= ~SMSM_RESET;
/* Issue a fake irq to handle any
* smd state changes during reset
@@ -2251,7 +2350,7 @@
modem_queue_start_reset_notify();
} else if (modm & SMSM_RESET) {
- if (!cpu_is_msm8960() && !cpu_is_msm8930())
+ if (!disable_smsm_reset_handshake)
apps |= SMSM_RESET;
pr_err("\nSMSM: Modem SMSM state changed to SMSM_RESET.");
@@ -2286,6 +2385,34 @@
return IRQ_HANDLED;
}
+static irqreturn_t smsm_modem_irq_handler(int irq, void *data)
+{
+ SMx_POWER_INFO("SMSM Int Modem->Apps\n");
+ ++interrupt_stats[SMD_MODEM].smsm_in_count;
+ return smsm_irq_handler(irq, data);
+}
+
+static irqreturn_t smsm_dsp_irq_handler(int irq, void *data)
+{
+ SMx_POWER_INFO("SMSM Int LPASS->Apps\n");
+ ++interrupt_stats[SMD_Q6].smsm_in_count;
+ return smsm_irq_handler(irq, data);
+}
+
+static irqreturn_t smsm_dsps_irq_handler(int irq, void *data)
+{
+ SMx_POWER_INFO("SMSM Int DSPS->Apps\n");
+ ++interrupt_stats[SMD_DSPS].smsm_in_count;
+ return smsm_irq_handler(irq, data);
+}
+
+static irqreturn_t smsm_wcnss_irq_handler(int irq, void *data)
+{
+ SMx_POWER_INFO("SMSM Int WCNSS->Apps\n");
+ ++interrupt_stats[SMD_WCNSS].smsm_in_count;
+ return smsm_irq_handler(irq, data);
+}
+
int smsm_change_intr_mask(uint32_t smsm_entry,
uint32_t clear_mask, uint32_t set_mask)
{
@@ -2417,6 +2544,9 @@
state_changes = state_info->last_value ^ new_state;
if (state_changes) {
+ SMx_POWER_INFO("SMSM Change %d: %08x->%08x\n",
+ n, state_info->last_value,
+ new_state);
list_for_each_entry(cb_info,
&state_info->callbacks, cb_list) {
@@ -2567,7 +2697,7 @@
pr_err("smd_core_init: "
"enable_irq_wake failed for INT_A9_M2A_0\n");
- r = request_irq(INT_A9_M2A_5, smsm_irq_handler,
+ r = request_irq(INT_A9_M2A_5, smsm_modem_irq_handler,
flags, "smsm_dev", 0);
if (r < 0) {
free_irq(INT_A9_M2A_0, 0);
@@ -2590,8 +2720,8 @@
return r;
}
- r = request_irq(INT_ADSP_A11_SMSM, smsm_irq_handler,
- flags, "smsm_dev", smsm_irq_handler);
+ r = request_irq(INT_ADSP_A11_SMSM, smsm_dsp_irq_handler,
+ flags, "smsm_dev", smsm_dsp_irq_handler);
if (r < 0) {
free_irq(INT_A9_M2A_0, 0);
free_irq(INT_A9_M2A_5, 0);
@@ -2620,7 +2750,7 @@
free_irq(INT_A9_M2A_0, 0);
free_irq(INT_A9_M2A_5, 0);
free_irq(INT_ADSP_A11, smd_dsp_irq_handler);
- free_irq(INT_ADSP_A11_SMSM, smsm_irq_handler);
+ free_irq(INT_ADSP_A11_SMSM, smsm_dsp_irq_handler);
return r;
}
@@ -2637,7 +2767,7 @@
free_irq(INT_A9_M2A_0, 0);
free_irq(INT_A9_M2A_5, 0);
free_irq(INT_ADSP_A11, smd_dsp_irq_handler);
- free_irq(INT_ADSP_A11_SMSM, smsm_irq_handler);
+ free_irq(INT_ADSP_A11_SMSM, smsm_dsp_irq_handler);
free_irq(INT_DSPS_A11, smd_dsps_irq_handler);
return r;
}
@@ -2647,13 +2777,13 @@
pr_err("smd_core_init: "
"enable_irq_wake failed for INT_WCNSS_A11\n");
- r = request_irq(INT_WCNSS_A11_SMSM, smsm_irq_handler,
- flags, "smsm_dev", smsm_irq_handler);
+ r = request_irq(INT_WCNSS_A11_SMSM, smsm_wcnss_irq_handler,
+ flags, "smsm_dev", smsm_wcnss_irq_handler);
if (r < 0) {
free_irq(INT_A9_M2A_0, 0);
free_irq(INT_A9_M2A_5, 0);
free_irq(INT_ADSP_A11, smd_dsp_irq_handler);
- free_irq(INT_ADSP_A11_SMSM, smsm_irq_handler);
+ free_irq(INT_ADSP_A11_SMSM, smsm_dsp_irq_handler);
free_irq(INT_DSPS_A11, smd_dsps_irq_handler);
free_irq(INT_WCNSS_A11, smd_wcnss_irq_handler);
return r;
@@ -2666,16 +2796,16 @@
#endif
#if defined(CONFIG_DSPS_SMSM)
- r = request_irq(INT_DSPS_A11_SMSM, smsm_irq_handler,
- flags, "smsm_dev", smsm_irq_handler);
+ r = request_irq(INT_DSPS_A11_SMSM, smsm_dsps_irq_handler,
+ flags, "smsm_dev", smsm_dsps_irq_handler);
if (r < 0) {
free_irq(INT_A9_M2A_0, 0);
free_irq(INT_A9_M2A_5, 0);
free_irq(INT_ADSP_A11, smd_dsp_irq_handler);
- free_irq(INT_ADSP_A11_SMSM, smsm_irq_handler);
+ free_irq(INT_ADSP_A11_SMSM, smsm_dsp_irq_handler);
free_irq(INT_DSPS_A11, smd_dsps_irq_handler);
free_irq(INT_WCNSS_A11, smd_wcnss_irq_handler);
- free_irq(INT_WCNSS_A11_SMSM, smsm_irq_handler);
+ free_irq(INT_WCNSS_A11_SMSM, smsm_wcnss_irq_handler);
return r;
}
@@ -2742,6 +2872,10 @@
num_ss = smd_platform_data->num_ss_configs;
smd_ss_config_list = smd_platform_data->smd_ss_configs;
+ if (smd_platform_data->smd_ssr_config)
+ disable_smsm_reset_handshake = smd_platform_data->
+ smd_ssr_config->disable_smsm_reset_handshake;
+
for (i = 0; i < num_ss; i++) {
cfg = &smd_ss_config_list[i];
@@ -2770,6 +2904,9 @@
cfg->smsm_int.irq_name);
break;
}
+
+ strncpy(edge_to_pids[cfg->edge].subsys_name,
+ cfg->subsys_name, SMD_MAX_CH_NAME_LEN);
}
if (err_ret < 0) {
diff --git a/arch/arm/mach-msm/smd_debug.c b/arch/arm/mach-msm/smd_debug.c
index b95a35c..764102d 100644
--- a/arch/arm/mach-msm/smd_debug.c
+++ b/arch/arm/mach-msm/smd_debug.c
@@ -95,6 +95,61 @@
return max;
}
+static int debug_int_stats(char *buf, int max)
+{
+ int i = 0;
+ int subsys;
+ struct interrupt_stat *stats = interrupt_stats;
+ const char *subsys_name;
+
+ i += scnprintf(buf + i, max - i,
+ " Subsystem | In | Out (Hardcoded) |"
+ " Out (Configured) |\n");
+
+ for (subsys = 0; subsys < NUM_SMD_SUBSYSTEMS; ++subsys) {
+ subsys_name = smd_pid_to_subsystem(subsys);
+ if (subsys_name) {
+ i += scnprintf(buf + i, max - i,
+ "%-10s %4s | %9u | %9u | %9u |\n",
+ smd_pid_to_subsystem(subsys), "smd",
+ stats->smd_in_count,
+ stats->smd_out_hardcode_count,
+ stats->smd_out_config_count);
+
+ i += scnprintf(buf + i, max - i,
+ "%-10s %4s | %9u | %9u | %9u |\n",
+ smd_pid_to_subsystem(subsys), "smsm",
+ stats->smsm_in_count,
+ stats->smsm_out_hardcode_count,
+ stats->smsm_out_config_count);
+ }
+ ++stats;
+ }
+
+ return i;
+}
+
+static int debug_int_stats_reset(char *buf, int max)
+{
+ int i = 0;
+ int subsys;
+ struct interrupt_stat *stats = interrupt_stats;
+
+ i += scnprintf(buf + i, max - i, "Resetting interrupt stats.\n");
+
+ for (subsys = 0; subsys < NUM_SMD_SUBSYSTEMS; ++subsys) {
+ stats->smd_in_count = 0;
+ stats->smd_out_hardcode_count = 0;
+ stats->smd_out_config_count = 0;
+ stats->smsm_in_count = 0;
+ stats->smsm_out_hardcode_count = 0;
+ stats->smsm_out_config_count = 0;
+ ++stats;
+ }
+
+ return i;
+}
+
static int debug_diag(char *buf, int max)
{
int i = 0;
@@ -694,6 +749,8 @@
debug_create("modem_err_f3", 0444, dent, debug_modem_err_f3);
debug_create("print_diag", 0444, dent, debug_diag);
debug_create("print_f3", 0444, dent, debug_f3);
+ debug_create("int_stats", 0444, dent, debug_int_stats);
+ debug_create("int_stats_reset", 0444, dent, debug_int_stats_reset);
/* NNV: this is google only stuff */
debug_create("build", 0444, dent, debug_read_build_id);
diff --git a/arch/arm/mach-msm/smd_pkt.c b/arch/arm/mach-msm/smd_pkt.c
index 63c5fef..542d224 100644
--- a/arch/arm/mach-msm/smd_pkt.c
+++ b/arch/arm/mach-msm/smd_pkt.c
@@ -66,6 +66,7 @@
int blocking_write;
int is_open;
+ int poll_mode;
unsigned ch_size;
uint open_modem_wait;
@@ -74,6 +75,7 @@
struct completion ch_allocated;
struct wake_lock pa_wake_lock; /* Packet Arrival Wake lock*/
struct work_struct packet_arrival_work;
+ struct spinlock pa_spinlock;
} *smd_pkt_devp[NUM_SMD_PKT_PORTS];
struct class *smd_pkt_classp;
@@ -236,6 +238,7 @@
int pkt_size;
struct smd_pkt_dev *smd_pkt_devp;
struct smd_channel *chl;
+ unsigned long flags;
D(KERN_ERR "%s: read %i bytes\n",
__func__, count);
@@ -316,6 +319,16 @@
D_DUMP_BUFFER("read: ", bytes_read, buf);
mutex_unlock(&smd_pkt_devp->rx_lock);
+ mutex_lock(&smd_pkt_devp->ch_lock);
+ spin_lock_irqsave(&smd_pkt_devp->pa_spinlock, flags);
+ if (smd_pkt_devp->poll_mode &&
+ !smd_cur_packet_size(smd_pkt_devp->ch)) {
+ wake_unlock(&smd_pkt_devp->pa_wake_lock);
+ smd_pkt_devp->poll_mode = 0;
+ }
+ spin_unlock_irqrestore(&smd_pkt_devp->pa_spinlock, flags);
+ mutex_unlock(&smd_pkt_devp->ch_lock);
+
D(KERN_ERR "%s: just read %i bytes\n",
__func__, bytes_read);
@@ -409,6 +422,7 @@
if (!smd_pkt_devp)
return POLLERR;
+ smd_pkt_devp->poll_mode = 1;
poll_wait(file, &smd_pkt_devp->ch_read_wait_queue, wait);
if (smd_read_avail(smd_pkt_devp->ch))
mask |= POLLIN | POLLRDNORM;
@@ -419,6 +433,7 @@
static void check_and_wakeup_reader(struct smd_pkt_dev *smd_pkt_devp)
{
int sz;
+ unsigned long flags;
if (!smd_pkt_devp || !smd_pkt_devp->ch)
return;
@@ -437,6 +452,9 @@
/* here we have a packet of size sz ready */
wake_up(&smd_pkt_devp->ch_read_wait_queue);
+ spin_lock_irqsave(&smd_pkt_devp->pa_spinlock, flags);
+ wake_lock(&smd_pkt_devp->pa_wake_lock);
+ spin_unlock_irqrestore(&smd_pkt_devp->pa_spinlock, flags);
schedule_work(&smd_pkt_devp->packet_arrival_work);
D(KERN_ERR "%s: after wake_up\n", __func__);
}
@@ -589,7 +607,7 @@
{
int r = 0;
struct smd_pkt_dev *smd_pkt_devp;
- char *peripheral = NULL;
+ const char *peripheral = NULL;
smd_pkt_devp = container_of(inode->i_cdev, struct smd_pkt_dev, cdev);
@@ -604,17 +622,25 @@
mutex_lock(&smd_pkt_devp->ch_lock);
if (smd_pkt_devp->ch == 0) {
+ init_completion(&smd_pkt_devp->ch_allocated);
+ smd_pkt_devp->driver.probe = smd_pkt_dummy_probe;
+ smd_pkt_devp->driver.driver.name =
+ smd_ch_name[smd_pkt_devp->i];
+ smd_pkt_devp->driver.driver.owner = THIS_MODULE;
+ r = platform_driver_register(&smd_pkt_devp->driver);
+ if (r) {
+ pr_err("%s: %s Platform driver reg. failed\n",
+ __func__, smd_ch_name[smd_pkt_devp->i]);
+ goto out;
+ }
- if (smd_ch_edge[smd_pkt_devp->i] == SMD_APPS_MODEM)
- peripheral = "modem";
- else if (smd_ch_edge[smd_pkt_devp->i] == SMD_APPS_QDSP)
- peripheral = "q6";
-
+ peripheral = smd_edge_to_subsystem(
+ smd_ch_edge[smd_pkt_devp->i]);
if (peripheral) {
smd_pkt_devp->pil = pil_get(peripheral);
if (IS_ERR(smd_pkt_devp->pil)) {
r = PTR_ERR(smd_pkt_devp->pil);
- goto out;
+ goto release_pd;
}
/* Wait for the modem SMSM to be inited for the SMD
@@ -683,6 +709,10 @@
release_pil:
if (peripheral && (r < 0))
pil_put(smd_pkt_devp->pil);
+
+release_pd:
+ if (r < 0)
+ platform_driver_unregister(&smd_pkt_devp->driver);
out:
mutex_unlock(&smd_pkt_devp->ch_lock);
@@ -707,6 +737,8 @@
r = smd_close(smd_pkt_devp->ch);
smd_pkt_devp->ch = 0;
smd_pkt_devp->blocking_write = 0;
+ smd_pkt_devp->poll_mode = 0;
+ platform_driver_unregister(&smd_pkt_devp->driver);
if (smd_pkt_devp->pil)
pil_put(smd_pkt_devp->pil);
}
@@ -776,12 +808,13 @@
init_waitqueue_head(&smd_pkt_devp[i]->ch_read_wait_queue);
init_waitqueue_head(&smd_pkt_devp[i]->ch_write_wait_queue);
smd_pkt_devp[i]->is_open = 0;
+ smd_pkt_devp[i]->poll_mode = 0;
init_waitqueue_head(&smd_pkt_devp[i]->ch_opened_wait_queue);
+ spin_lock_init(&smd_pkt_devp[i]->pa_spinlock);
mutex_init(&smd_pkt_devp[i]->ch_lock);
mutex_init(&smd_pkt_devp[i]->rx_lock);
mutex_init(&smd_pkt_devp[i]->tx_lock);
- init_completion(&smd_pkt_devp[i]->ch_allocated);
cdev_init(&smd_pkt_devp[i]->cdev, &smd_pkt_fops);
smd_pkt_devp[i]->cdev.owner = THIS_MODULE;
@@ -822,13 +855,6 @@
&dev_attr_open_timeout))
pr_err("%s: unable to create device attr on #%d\n",
__func__, i);
-
- smd_pkt_devp[i]->driver.probe = smd_pkt_dummy_probe;
- smd_pkt_devp[i]->driver.driver.name = smd_ch_name[i];
- smd_pkt_devp[i]->driver.driver.owner = THIS_MODULE;
- r = platform_driver_register(&smd_pkt_devp[i]->driver);
- if (r)
- goto error2;
}
INIT_DELAYED_WORK(&loopback_work, loopback_probe_worker);
@@ -839,7 +865,6 @@
error2:
if (i > 0) {
while (--i >= 0) {
- platform_driver_unregister(&smd_pkt_devp[i]->driver);
cdev_del(&smd_pkt_devp[i]->cdev);
kfree(smd_pkt_devp[i]);
device_destroy(smd_pkt_classp,
@@ -859,7 +884,6 @@
int i;
for (i = 0; i < NUM_SMD_PKT_PORTS; ++i) {
- platform_driver_unregister(&smd_pkt_devp[i]->driver);
cdev_del(&smd_pkt_devp[i]->cdev);
kfree(smd_pkt_devp[i]);
device_destroy(smd_pkt_classp,
diff --git a/arch/arm/mach-msm/smd_private.h b/arch/arm/mach-msm/smd_private.h
index a4c60e8..e39c57b 100644
--- a/arch/arm/mach-msm/smd_private.h
+++ b/arch/arm/mach-msm/smd_private.h
@@ -1,7 +1,7 @@
/* arch/arm/mach-msm/smd_private.h
*
* Copyright (C) 2007 Google, Inc.
- * Copyright (c) 2007-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2007-2012, Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -19,6 +19,7 @@
#include <linux/types.h>
#include <linux/spinlock.h>
#include <mach/msm_smsm.h>
+#include <mach/msm_smd.h>
#define PC_APPS 0
#define PC_MODEM 1
@@ -208,4 +209,15 @@
void smd_diag(void);
+struct interrupt_stat {
+ uint32_t smd_in_count;
+ uint32_t smd_out_hardcode_count;
+ uint32_t smd_out_config_count;
+
+ uint32_t smsm_in_count;
+ uint32_t smsm_out_hardcode_count;
+ uint32_t smsm_out_config_count;
+};
+extern struct interrupt_stat interrupt_stats[NUM_SMD_SUBSYSTEMS];
+
#endif
diff --git a/arch/arm/mach-msm/smd_tty.c b/arch/arm/mach-msm/smd_tty.c
index 4248be4..28850d0 100644
--- a/arch/arm/mach-msm/smd_tty.c
+++ b/arch/arm/mach-msm/smd_tty.c
@@ -235,7 +235,7 @@
int res = 0;
unsigned int n = tty->index;
struct smd_tty_info *info;
- char *peripheral = NULL;
+ const char *peripheral = NULL;
if (n >= MAX_SMD_TTYS || !smd_tty[n].smd)
@@ -247,9 +247,7 @@
tty->driver_data = info;
if (info->open_count++ == 0) {
- if (smd_tty[n].smd->edge == SMD_APPS_MODEM)
- peripheral = "modem";
-
+ peripheral = smd_edge_to_subsystem(smd_tty[n].smd->edge);
if (peripheral) {
info->pil = pil_get(peripheral);
if (IS_ERR(info->pil)) {
@@ -489,7 +487,8 @@
if (!smd_configs[n].dev_name)
continue;
- if (!strncmp(pdev->name, smd_configs[n].dev_name,
+ if (pdev->id == smd_configs[n].edge &&
+ !strncmp(pdev->name, smd_configs[n].dev_name,
SMD_MAX_CH_NAME_LEN)) {
complete_all(&smd_tty[idx].ch_allocated);
return 0;
diff --git a/arch/arm/mach-msm/socinfo.c b/arch/arm/mach-msm/socinfo.c
index a1bf280..9b10ffd 100644
--- a/arch/arm/mach-msm/socinfo.c
+++ b/arch/arm/mach-msm/socinfo.c
@@ -604,7 +604,7 @@
arch_initcall(socinfo_init_sysdev);
-void *setup_dummy_socinfo(void)
+static void * __init setup_dummy_socinfo(void)
{
if (machine_is_msm8960_rumi3() || machine_is_msm8960_sim() ||
machine_is_msm8960_cdp())
diff --git a/arch/arm/mach-msm/spm_devices.c b/arch/arm/mach-msm/spm_devices.c
index 883dec1..1f85194 100644
--- a/arch/arm/mach-msm/spm_devices.c
+++ b/arch/arm/mach-msm/spm_devices.c
@@ -169,11 +169,7 @@
reg = saw_bases[cpu];
- if (cpu_is_msm8960() || cpu_is_msm8930()) {
- val = 0xB0;
- reg += 0x14;
- timeout = 512;
- } else if (cpu_is_apq8064()) {
+ if (cpu_is_msm8960() || cpu_is_msm8930() || cpu_is_apq8064()) {
val = 0xA4;
reg += 0x14;
timeout = 512;
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 4128e3a..2dfde6f 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -66,6 +66,7 @@
DGT_CLK_CTL_DIV_3 = 2,
DGT_CLK_CTL_DIV_4 = 3,
};
+#define TIMER_STATUS 0x0088
#define TIMER_ENABLE_EN 1
#define TIMER_ENABLE_CLR_ON_MATCH_EN 2
@@ -112,6 +113,7 @@
uint32_t index;
void __iomem *global_counter;
void __iomem *local_counter;
+ uint32_t status_mask;
union {
struct clock_event_device *evt;
struct clock_event_device __percpu **percpu_evt;
@@ -1001,15 +1003,21 @@
dgt->regbase = MSM_TMR_BASE + 0x10;
} else if (cpu_is_fsm9xxx())
dgt->freq = 4800000;
- else if (cpu_is_msm7x30() || cpu_is_msm8x55())
+ else if (cpu_is_msm7x30() || cpu_is_msm8x55()) {
+ gpt->status_mask = BIT(10);
+ dgt->status_mask = BIT(2);
dgt->freq = 6144000;
- else if (cpu_is_msm8x60()) {
+ } else if (cpu_is_msm8x60()) {
global_timer_offset = MSM_TMR0_BASE - MSM_TMR_BASE;
+ gpt->status_mask = BIT(10);
+ dgt->status_mask = BIT(2);
dgt->freq = 6750000;
__raw_writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
} else if (cpu_is_msm9615()) {
dgt->freq = 6750000;
__raw_writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
+ gpt->status_mask = BIT(10);
+ dgt->status_mask = BIT(2);
gpt->freq = 32765;
gpt_hz = 32765;
sclk_hz = 32765;
@@ -1019,6 +1027,8 @@
global_timer_offset = MSM_TMR0_BASE - MSM_TMR_BASE;
dgt->freq = 6750000;
__raw_writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
+ gpt->status_mask = BIT(10);
+ dgt->status_mask = BIT(2);
gpt->freq = 32765;
gpt_hz = 32765;
sclk_hz = 32765;
@@ -1042,8 +1052,7 @@
struct clock_event_device *ce = &clock->clockevent;
struct clocksource *cs = &clock->clocksource;
__raw_writel(0, clock->regbase + TIMER_ENABLE);
- __raw_writel(1, clock->regbase + TIMER_CLEAR);
- __raw_writel(0, clock->regbase + TIMER_COUNT_VAL);
+ __raw_writel(0, clock->regbase + TIMER_CLEAR);
__raw_writel(~0, clock->regbase + TIMER_MATCH_VAL);
if ((clock->freq << clock->shift) == gpt_hz) {
@@ -1105,15 +1114,17 @@
if (chip && chip->irq_mask)
chip->irq_mask(irq_get_irq_data(clock->irq));
+ if (clock->status_mask)
+ while (__raw_readl(MSM_TMR_BASE + TIMER_STATUS) &
+ clock->status_mask)
+ ;
+
clockevents_register_device(ce);
}
msm_sched_clock_init();
- if (is_smp()) {
- __raw_writel(1,
- msm_clocks[MSM_CLOCK_DGT].regbase + TIMER_ENABLE);
- set_delay_fn(read_current_timer_delay_loop);
- }
+ __raw_writel(1, msm_clocks[MSM_CLOCK_DGT].regbase + TIMER_ENABLE);
+ set_delay_fn(read_current_timer_delay_loop);
}
#ifdef CONFIG_SMP
@@ -1136,6 +1147,10 @@
__raw_writel(0, clock->regbase + TIMER_CLEAR);
__raw_writel(~0, clock->regbase + TIMER_MATCH_VAL);
__get_cpu_var(first_boot) = false;
+ if (clock->status_mask)
+ while (__raw_readl(MSM_TMR_BASE + TIMER_STATUS) &
+ clock->status_mask)
+ ;
}
evt->irq = clock->irq;
evt->name = "local_timer";
diff --git a/arch/arm/mach-msm/wcnss-ssr-8960.c b/arch/arm/mach-msm/wcnss-ssr-8960.c
index 9970c90..1bdec12 100644
--- a/arch/arm/mach-msm/wcnss-ssr-8960.c
+++ b/arch/arm/mach-msm/wcnss-ssr-8960.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -35,6 +35,7 @@
static void riva_fatal_fn(struct work_struct *);
static DECLARE_WORK(riva_fatal_work, riva_fatal_fn);
+static struct delayed_work cancel_vote_work;
static void *riva_ramdump_dev;
static int riva_crash;
static int ss_restart_inprogress;
@@ -51,6 +52,9 @@
static void smsm_state_cb_hdlr(void *data, uint32_t old_state,
uint32_t new_state)
{
+ if (!(new_state & SMSM_RESET))
+ return;
+
riva_crash = true;
pr_err("%s: smsm state changed to smsm reset\n", MODULE_NAME);
@@ -59,10 +63,8 @@
MODULE_NAME);
return;
}
- if (new_state & SMSM_RESET) {
- ss_restart_inprogress = true;
- schedule_work(&riva_smsm_cb_work);
- }
+ ss_restart_inprogress = true;
+ schedule_work(&riva_smsm_cb_work);
}
static void riva_fatal_fn(struct work_struct *work)
@@ -97,20 +99,24 @@
smsm_change_state(SMSM_APPS_STATE, SMSM_RESET, SMSM_RESET);
}
-/* Subsystem handlers */
-static int riva_shutdown(const struct subsys_data *subsys)
+static void riva_post_bootup(struct work_struct *work)
{
struct platform_device *pdev = wcnss_get_platform_device();
struct wcnss_wlan_config *pwlanconfig = wcnss_get_wlan_config();
- int ret = -1;
+ pr_debug(MODULE_NAME ": Cancel APPS vote for Iris & Riva\n");
+
+ wcnss_wlan_power(&pdev->dev, pwlanconfig,
+ WCNSS_WLAN_SWITCH_OFF);
+}
+
+/* Subsystem handlers */
+static int riva_shutdown(const struct subsys_data *subsys)
+{
pil_force_shutdown("wcnss");
+ flush_delayed_work(&cancel_vote_work);
- /* proxy vote on behalf of Riva */
- if (pdev && pwlanconfig)
- ret = wcnss_wlan_power(&pdev->dev, pwlanconfig,
- WCNSS_WLAN_SWITCH_OFF);
- return ret;
+ return 0;
}
static int riva_powerup(const struct subsys_data *subsys)
@@ -131,6 +137,7 @@
}
ss_restart_inprogress = false;
enable_irq(RIVA_APSS_WDOG_BITE_RESET_RDY_IRQ);
+ schedule_delayed_work(&cancel_vote_work, msecs_to_jiffies(5000));
return ret;
}
@@ -222,6 +229,8 @@
ret = -ENOMEM;
goto out;
}
+ INIT_DELAYED_WORK(&cancel_vote_work, riva_post_bootup);
+
pr_info("%s: module initialized\n", MODULE_NAME);
out:
return ret;
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 3bce534..f748109 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -55,7 +55,7 @@
cmp r1, #2 @ see what cache we have at this level
blt skip @ skip if no cache, or just i-cache
#ifdef CONFIG_PREEMPT
- save_and_disable_irqs r9 @ make cssr&csidr read atomic
+ save_and_disable_irqs_notrace r9 @ make cssr&csidr read atomic
#endif
mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
isb @ isb to sych the new cssr&csidr
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index 14536f6..946899d 100644
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -17,6 +17,8 @@
#include <asm/thread_notify.h>
#include <asm/tlbflush.h>
+#include <mach/msm_rtb.h>
+
static DEFINE_RAW_SPINLOCK(cpu_asid_lock);
unsigned int cpu_last_asid = ASID_FIRST_VERSION;
#ifdef CONFIG_SMP
@@ -25,6 +27,7 @@
static void write_contextidr(u32 contextidr)
{
+ uncached_logk(LOGK_CTXID, (void *)contextidr);
asm("mcr p15, 0, %0, c13, c0, 1" : : "r" (contextidr));
isb();
}
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
old mode 100755
new mode 100644
index 8dcce03..edede47
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -1139,3 +1139,5 @@
mpq8064_hrd MACH_MPQ8064_HRD MPQ8064_HRD 3994
mpq8064_dtv MACH_MPQ8064_DTV MPQ8064_DTV 3995
msm7627a_qrd3 MACH_MSM7627A_QRD3 MSM7627A_QRD3 4005
+msm8625_surf MACH_MSM8625_SURF MSM8625_SURF 4037
+msm8625_evb MACH_MSM8625_EVB MSM8625_EVB 4042
diff --git a/drivers/char/diag/diagchar.h b/drivers/char/diag/diagchar.h
index 7d28604..228c77fb 100644
--- a/drivers/char/diag/diagchar.h
+++ b/drivers/char/diag/diagchar.h
@@ -23,6 +23,7 @@
#include <asm/mach-types.h>
/* Size of the USB buffers used for read and write*/
#define USB_MAX_OUT_BUF 4096
+#define APPS_BUF_SIZE 2000
#define IN_BUF_SIZE 16384
#define MAX_IN_BUF_SIZE 32768
#define MAX_SYNC_OBJ_NAME_SIZE 32
@@ -50,10 +51,13 @@
#define USER_SPACE_DATA 8000
#define PKT_SIZE 4096
#define MAX_EQUIP_ID 12
+#define DIAG_CTRL_MSG_LOG_MASK 9
+#define DIAG_CTRL_MSG_EVENT_MASK 10
+#define DIAG_CTRL_MSG_F3_MASK 11
/* Maximum number of pkt reg supported at initialization*/
-extern unsigned int diag_max_registration;
-extern unsigned int diag_threshold_registration;
+extern unsigned int diag_max_reg;
+extern unsigned int diag_threshold_reg;
#define APPEND_DEBUG(ch) \
do { \
@@ -130,6 +134,7 @@
int num_clients;
int polling_reg_flag;
struct diag_write_device *buf_tbl;
+ int use_device_tree;
/* Memory pool parameters */
unsigned int itemsize;
@@ -148,7 +153,10 @@
int count_hdlc_pool;
int count_write_struct_pool;
int used;
-
+ /* Buffers for masks */
+ struct diag_ctrl_event_mask *event_mask;
+ struct diag_ctrl_log_mask *log_mask;
+ struct diag_ctrl_msg_mask *msg_mask;
/* State for diag forwarding */
unsigned char *buf_in_1;
unsigned char *buf_in_2;
@@ -161,6 +169,10 @@
unsigned char *usb_buf_out;
unsigned char *apps_rsp_buf;
unsigned char *user_space_data;
+ /* buffer for updating mask to peripherals */
+ unsigned char *buf_msg_mask_update;
+ unsigned char *buf_log_mask_update;
+ unsigned char *buf_event_mask_update;
smd_channel_t *ch;
smd_channel_t *ch_cntl;
smd_channel_t *chqdsp;
@@ -190,6 +202,13 @@
struct work_struct diag_read_smd_qdsp_cntl_work;
struct work_struct diag_read_smd_wcnss_work;
struct work_struct diag_read_smd_wcnss_cntl_work;
+ struct workqueue_struct *diag_cntl_wq;
+ struct work_struct diag_msg_mask_update_work;
+ struct work_struct diag_log_mask_update_work;
+ struct work_struct diag_event_mask_update_work;
+ struct work_struct diag_modem_mask_update_work;
+ struct work_struct diag_qdsp_mask_update_work;
+ struct work_struct diag_wcnss_mask_update_work;
uint8_t *msg_masks;
uint8_t *log_masks;
int log_masks_length;
@@ -228,6 +247,7 @@
int hsic_ch;
int hsic_device_enabled;
int hsic_device_opened;
+ int hsic_suspend;
int read_len_mdm;
int in_busy_hsic_read_on_mdm;
int in_busy_hsic_write_on_mdm;
@@ -238,6 +258,8 @@
struct workqueue_struct *diag_hsic_wq;
struct work_struct diag_read_mdm_work;
struct work_struct diag_read_hsic_work;
+ struct work_struct diag_disconnect_work;
+ struct work_struct diag_usb_read_complete_work;
struct diag_request *usb_read_mdm_ptr;
struct diag_request *write_ptr_mdm;
#endif
diff --git a/drivers/char/diag/diagchar_core.c b/drivers/char/diag/diagchar_core.c
index e24d896..d9f12ac 100644
--- a/drivers/char/diag/diagchar_core.c
+++ b/drivers/char/diag/diagchar_core.c
@@ -48,7 +48,7 @@
};
/* The following variables can be specified by module options */
/* for copy buffer */
-static unsigned int itemsize = 2048; /*Size of item in the mempool */
+static unsigned int itemsize = 4096; /*Size of item in the mempool */
static unsigned int poolsize = 10; /*Number of items in the mempool */
/* for hdlc buffer */
static unsigned int itemsize_hdlc = 8192; /*Size of item in the mempool */
@@ -60,8 +60,8 @@
static unsigned int max_clients = 15;
static unsigned int threshold_client_limit = 30;
/* This is the maximum number of pkt registrations supported at initialization*/
-unsigned int diag_max_registration = 600;
-unsigned int diag_threshold_registration = 750;
+unsigned int diag_max_reg = 600;
+unsigned int diag_threshold_reg = 750;
/* Timer variables */
static struct timer_list drain_timer;
@@ -230,7 +230,7 @@
}
#endif /* DIAG over USB */
/* Delete the pkt response table entry for the exiting process */
- for (i = 0; i < diag_max_registration; i++)
+ for (i = 0; i < diag_max_reg; i++)
if (driver->table[i].process_id == current->tgid)
driver->table[i].process_id = 0;
@@ -286,13 +286,13 @@
mutex_lock(&driver->diagchar_mutex);
/* reset polling flag */
driver->polling_reg_flag = 0;
- for (i = 0; i < diag_max_registration; i++) {
+ for (i = 0; i < diag_max_reg; i++) {
if (driver->table[i].client_id == proc_num) {
driver->table[i].process_id = 0;
}
}
/* re-scan the registration table */
- for (i = 0; i < diag_max_registration; i++) {
+ for (i = 0; i < diag_max_reg; i++) {
if (diag_find_polling_reg(i) == 1) {
driver->polling_reg_flag = 1;
break;
@@ -335,7 +335,7 @@
struct bindpkt_params_per_process *pkt_params =
(struct bindpkt_params_per_process *) ioarg;
mutex_lock(&driver->diagchar_mutex);
- for (i = 0; i < diag_max_registration; i++) {
+ for (i = 0; i < diag_max_reg; i++) {
if (driver->table[i].process_id == 0) {
diag_add_reg(i, pkt_params->params,
&success, &count_entries);
@@ -347,19 +347,20 @@
}
}
}
- if (i < diag_threshold_registration) {
+ if (i < diag_threshold_reg) {
/* Increase table size by amount required */
- diag_max_registration += pkt_params->count -
+ diag_max_reg += pkt_params->count -
count_entries;
/* Make sure size doesnt go beyond threshold */
- if (diag_max_registration > diag_threshold_registration)
- diag_max_registration =
- diag_threshold_registration;
+ if (diag_max_reg > diag_threshold_reg) {
+ diag_max_reg = diag_threshold_reg;
+ pr_info("diag: best case memory allocation\n");
+ }
temp_buf = krealloc(driver->table,
- diag_max_registration*sizeof(struct
+ diag_max_reg*sizeof(struct
diag_master_table), GFP_KERNEL);
if (!temp_buf) {
- diag_max_registration -= pkt_params->count -
+ diag_max_reg -= pkt_params->count -
count_entries;
pr_alert("diag: Insufficient memory for reg.");
mutex_unlock(&driver->diagchar_mutex);
@@ -367,7 +368,7 @@
} else {
driver->table = temp_buf;
}
- for (j = i; j < diag_max_registration; j++) {
+ for (j = i; j < diag_max_reg; j++) {
diag_add_reg(j, pkt_params->params,
&success, &count_entries);
if (pkt_params->count > count_entries) {
@@ -377,6 +378,7 @@
return success;
}
}
+ mutex_unlock(&driver->diagchar_mutex);
} else {
mutex_unlock(&driver->diagchar_mutex);
pr_err("Max size reached, Pkt Registration failed for"
@@ -766,6 +768,14 @@
return 0;
}
+ if (payload_size > itemsize) {
+ pr_err("diag: Dropping packet, packet payload size crosses"
+ "4KB limit. Current payload size %d\n",
+ payload_size);
+ driver->dropped_count++;
+ return -EBADMSG;
+ }
+
buf_copy = diagmem_alloc(driver, payload_size, POOL_TYPE_COPY);
if (!buf_copy) {
driver->dropped_count++;
diff --git a/drivers/char/diag/diagfwd.c b/drivers/char/diag/diagfwd.c
index 079e04b..f16aa0c 100644
--- a/drivers/char/diag/diagfwd.c
+++ b/drivers/char/diag/diagfwd.c
@@ -21,6 +21,7 @@
#include <linux/diagchar.h>
#include <linux/delay.h>
#include <linux/reboot.h>
+#include <linux/of.h>
#ifdef CONFIG_DIAG_OVER_USB
#include <mach/usbdiag.h>
#endif
@@ -43,8 +44,15 @@
static unsigned int buf_tbl_size = 8; /*Number of entries in table of buffers */
struct diag_master_table entry;
smd_channel_t *ch_temp, *chqdsp_temp, *ch_wcnss_temp;
+int diag_event_num_bytes;
+int diag_event_config;
struct diag_send_desc_type send = { NULL, NULL, DIAG_STATE_START, 0 };
struct diag_hdlc_dest_type enc = { NULL, NULL, 0 };
+struct mask_info {
+ int equip_id;
+ int num_items;
+ int index;
+};
#define ENCODE_RSP_AND_SEND(buf_length) \
do { \
@@ -54,7 +62,7 @@
send.terminate = 1; \
if (!driver->in_busy_1) { \
enc.dest = driver->buf_in_1; \
- enc.dest_last = (void *)(driver->buf_in_1 + 499); \
+ enc.dest_last = (void *)(driver->buf_in_1 + APPS_BUF_SIZE - 1);\
diag_hdlc_encode(&send, &enc); \
driver->write_ptr_1->buf = driver->buf_in_1; \
driver->write_ptr_1->length = (int)(enc.dest - \
@@ -62,55 +70,80 @@
driver->in_busy_1 = 1; \
diag_device_write(driver->buf_in_1, MODEM_DATA, \
driver->write_ptr_1); \
- memset(driver->apps_rsp_buf, '\0', 500); \
+ memset(driver->apps_rsp_buf, '\0', APPS_BUF_SIZE); \
} \
} while (0)
#define CHK_OVERFLOW(bufStart, start, end, length) \
((bufStart <= start) && (end - start >= length)) ? 1 : 0
+/* Determine if this device uses a device tree */
+#ifdef CONFIG_OF
+static int has_device_tree(void)
+{
+ struct device_node *node;
+
+ node = of_find_node_by_path("/");
+ if (node) {
+ of_node_put(node);
+ return 1;
+ }
+ return 0;
+}
+#else
+static int has_device_tree(void)
+{
+ return 0;
+}
+#endif
+
int chk_config_get_id(void)
{
/* For all Fusion targets, Modem will always be present */
if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
return 0;
- switch (socinfo_get_id()) {
- case APQ8060_MACHINE_ID:
- case MSM8660_MACHINE_ID:
- return APQ8060_TOOLS_ID;
- case AO8960_MACHINE_ID:
- case MSM8260A_MACHINE_ID:
- return AO8960_TOOLS_ID;
- case APQ8064_MACHINE_ID:
- return APQ8064_TOOLS_ID;
- case MSM8930_MACHINE_ID:
- return MSM8930_TOOLS_ID;
- case MSM8974_MACHINE_ID:
- return MSM8974_TOOLS_ID;
- default:
- return 0;
+ if (driver->use_device_tree) {
+ if (machine_is_copper())
+ return MSM8974_TOOLS_ID;
+ else
+ return 0;
+ } else {
+ switch (socinfo_get_msm_cpu()) {
+ case MSM_CPU_8X60:
+ return APQ8060_TOOLS_ID;
+ case MSM_CPU_8960:
+ return AO8960_TOOLS_ID;
+ case MSM_CPU_8064:
+ return APQ8064_TOOLS_ID;
+ case MSM_CPU_8930:
+ return MSM8930_TOOLS_ID;
+ case MSM_CPU_COPPER:
+ return MSM8974_TOOLS_ID;
+ case MSM_CPU_8625:
+ return MSM8625_TOOLS_ID;
+ default:
+ return 0;
+ }
}
}
/*
- * This will return TRUE for targets which support apps only mode.
+ * This will return TRUE for targets which support apps only mode and hence SSR.
* This applies to 8960 and newer targets.
*/
int chk_apps_only(void)
{
- switch (socinfo_get_id()) {
- case AO8960_MACHINE_ID:
- case APQ8064_MACHINE_ID:
- case MSM8930_MACHINE_ID:
- case MSM8630_MACHINE_ID:
- case MSM8230_MACHINE_ID:
- case APQ8030_MACHINE_ID:
- case MSM8627_MACHINE_ID:
- case MSM8227_MACHINE_ID:
- case MSM8974_MACHINE_ID:
- case MDM9615_MACHINE_ID:
- case MSM8260A_MACHINE_ID:
+ if (driver->use_device_tree)
+ return 1;
+
+ switch (socinfo_get_msm_cpu()) {
+ case MSM_CPU_8960:
+ case MSM_CPU_8064:
+ case MSM_CPU_8930:
+ case MSM_CPU_8627:
+ case MSM_CPU_9615:
+ case MSM_CPU_COPPER:
return 1;
default:
return 0;
@@ -124,8 +157,28 @@
*/
int chk_apps_master(void)
{
- if (cpu_is_msm8960() || cpu_is_msm8930() || cpu_is_msm9615() ||
- cpu_is_apq8064() || cpu_is_msm8627())
+ if (driver->use_device_tree)
+ return 1;
+ else if (cpu_is_msm8960() || cpu_is_msm8930() || cpu_is_msm9615() ||
+ cpu_is_apq8064() || cpu_is_msm8627())
+ return 1;
+ else
+ return 0;
+}
+
+inline int chk_polling_response(void)
+{
+ if (!(driver->polling_reg_flag) && chk_apps_master())
+ /*
+ * If the apps processor is master and no other processor
+ * has registered to respond for polling
+ */
+ return 1;
+ else if (!(driver->ch) && !(chk_apps_master()))
+ /*
+ * If the apps processor is not the master and the modem
+ * is not up
+ */
return 1;
else
return 0;
@@ -400,8 +453,8 @@
uint8_t *ptr_buffer_end = &(*(driver->msg_masks)) + MSG_MASK_SIZE;
mutex_lock(&driver->diagchar_mutex);
- /* First SSID can be zero : So check that last is non-zero */
+ /* First SSID can be zero : So check that last is non-zero */
while (*(uint32_t *)(ptr + 4)) {
first = *(uint32_t *)ptr;
ptr += 4;
@@ -446,7 +499,7 @@
}
-static void diag_update_event_mask(uint8_t *buf, int toggle, int num_bits)
+static void diag_update_event_mask(uint8_t *buf, int toggle, int num_bytes)
{
uint8_t *ptr = driver->event_masks;
uint8_t *temp = buf + 2;
@@ -456,9 +509,8 @@
memset(ptr, 0 , EVENT_MASK_SIZE);
else
if (CHK_OVERFLOW(ptr, ptr,
- ptr+EVENT_MASK_SIZE,
- num_bits/8 + 1))
- memcpy(ptr, temp , num_bits/8 + 1);
+ ptr+EVENT_MASK_SIZE, num_bytes))
+ memcpy(ptr, temp , num_bytes);
else
printk(KERN_CRIT "Not enough buffer space "
"for EVENT_MASK\n");
@@ -468,10 +520,6 @@
static void diag_update_log_mask(int equip_id, uint8_t *buf, int num_items)
{
uint8_t *temp = buf;
- struct mask_info {
- int equip_id;
- int index;
- };
int i = 0;
unsigned char *ptr_data;
int offset = 8*MAX_EQUIP_ID;
@@ -485,8 +533,9 @@
break;
}
if ((ptr->equip_id == 0) && (ptr->index == 0)) {
- /*Reached a null entry */
+ /* Reached a null entry */
ptr->equip_id = equip_id;
+ ptr->num_items = num_items;
ptr->index = driver->log_masks_length;
offset = driver->log_masks_length;
driver->log_masks_length += ((num_items+7)/8);
@@ -571,6 +620,123 @@
}
}
+void diag_modem_mask_update_fn(struct work_struct *work)
+{
+ diag_send_msg_mask_update(driver->ch_cntl);
+ diag_send_log_mask_update(driver->ch_cntl);
+ diag_send_event_mask_update(driver->ch_cntl, diag_event_num_bytes);
+}
+
+void diag_qdsp_mask_update_fn(struct work_struct *work)
+{
+ diag_send_msg_mask_update(driver->chqdsp_cntl);
+ diag_send_log_mask_update(driver->chqdsp_cntl);
+ diag_send_event_mask_update(driver->chqdsp_cntl, diag_event_num_bytes);
+}
+
+void diag_wcnss_mask_update_fn(struct work_struct *work)
+{
+ diag_send_msg_mask_update(driver->ch_wcnss_cntl);
+ diag_send_log_mask_update(driver->ch_wcnss_cntl);
+ diag_send_event_mask_update(driver->ch_wcnss_cntl,
+ diag_event_num_bytes);
+}
+
+void diag_msg_mask_update_fn(struct work_struct *work)
+{
+ diag_send_msg_mask_update(driver->ch_cntl);
+ diag_send_msg_mask_update(driver->chqdsp_cntl);
+ diag_send_msg_mask_update(driver->ch_wcnss_cntl);
+}
+
+void diag_log_mask_update_fn(struct work_struct *work)
+{
+ diag_send_log_mask_update(driver->ch_cntl);
+ diag_send_log_mask_update(driver->chqdsp_cntl);
+ diag_send_log_mask_update(driver->ch_wcnss_cntl);
+}
+
+void diag_send_log_mask_update(smd_channel_t *ch)
+{
+ void *buf = driver->buf_log_mask_update;
+ int header_size = sizeof(struct diag_ctrl_log_mask);
+ struct mask_info *ptr = (struct mask_info *)driver->log_masks;
+ int i, size = (driver->log_mask->num_items+7)/8;
+
+ for (i = 0; i < MAX_EQUIP_ID; i++) {
+ /* reached null entry */
+ if ((ptr->equip_id == 0) && (ptr->index == 0))
+ break;
+ driver->log_mask->cmd_type = DIAG_CTRL_MSG_LOG_MASK;
+ driver->log_mask->num_items = ptr->num_items;
+ driver->log_mask->data_len = 11 + size;
+ driver->log_mask->stream_id = 1; /* 2, if dual stream */
+ driver->log_mask->status = 3; /* status for valid mask */
+ driver->log_mask->equip_id = ptr->equip_id;
+ driver->log_mask->log_mask_size = size;
+ memcpy(buf, driver->log_mask, header_size);
+ memcpy(buf+header_size, driver->log_masks+ptr->index, size);
+ msleep(100);
+ if (ch)
+ smd_write(ch, buf, header_size + size);
+ ptr++;
+ }
+}
+
+void diag_send_event_mask_update(smd_channel_t *ch, int num_bytes)
+{
+ void *buf = driver->buf_event_mask_update;
+ int header_size = sizeof(struct diag_ctrl_event_mask);
+
+ /* send event mask update */
+ driver->event_mask->cmd_type = DIAG_CTRL_MSG_EVENT_MASK;
+ driver->event_mask->data_len = 7 + num_bytes;
+ driver->event_mask->stream_id = 1; /* 2, if dual stream */
+ driver->event_mask->status = 3; /* status for valid mask */
+ driver->event_mask->event_config = diag_event_config; /* event config */
+ driver->event_mask->event_mask_size = num_bytes;
+ memcpy(buf, driver->event_mask, header_size);
+ memcpy(buf+header_size, driver->event_masks, num_bytes);
+ msleep(100);
+ if (ch)
+ smd_write(ch, buf, header_size + num_bytes);
+}
+
+void diag_send_msg_mask_update(smd_channel_t *ch)
+{
+ void *buf = driver->buf_msg_mask_update;
+ int first, last;
+ int header_size = sizeof(struct diag_ctrl_msg_mask);
+ uint8_t *ptr = driver->msg_masks;
+
+ while (*(uint32_t *)(ptr + 4)) {
+ first = *(uint32_t *)ptr;
+ ptr += 4;
+ last = *(uint32_t *)ptr;
+ ptr += 4;
+ /* send event mask update */
+ driver->msg_mask->cmd_type = DIAG_CTRL_MSG_F3_MASK;
+ driver->msg_mask->msg_mask_size = last - first + 1;
+ driver->msg_mask->data_len = 11 +
+ 4 * (driver->msg_mask->msg_mask_size);
+ driver->msg_mask->stream_id = 1; /* 2, if dual stream */
+ driver->msg_mask->status = 3; /* status for valid mask */
+ driver->msg_mask->msg_mode = 0; /* Legcay mode */
+ driver->msg_mask->ssid_first = first;
+ driver->msg_mask->ssid_last = last;
+ memcpy(buf, driver->msg_mask, header_size);
+ memcpy(buf+header_size, ptr,
+ 4 * (driver->msg_mask->msg_mask_size));
+ /* since mask updates are slow, so sleep needed as to
+ prevent modem running out of DSM items */
+ msleep(100);
+ if (ch)
+ smd_write(ch, buf,
+ header_size + 4*(driver->msg_mask->msg_mask_size));
+ ptr += ((last - first) + 1)*4;
+ }
+}
+
static int diag_process_apps_pkt(unsigned char *buf, int len)
{
uint16_t subsys_cmd_code;
@@ -583,6 +749,93 @@
unsigned char *ptr;
#endif
+ /* Set log masks */
+ if (*buf == 0x73 && *(int *)(buf+4) == 3) {
+ buf += 8;
+ /* Read Equip ID and pass as first param below*/
+ diag_update_log_mask(*(int *)buf, buf+8, *(int *)(buf+4));
+ diag_update_userspace_clients(LOG_MASKS_TYPE);
+#if defined(CONFIG_DIAG_OVER_USB)
+ if (chk_apps_only()) {
+ driver->apps_rsp_buf[0] = 0x73;
+ *(int *)(driver->apps_rsp_buf + 4) = 0x3; /* op. ID */
+ *(int *)(driver->apps_rsp_buf + 8) = 0x0; /* success */
+ payload_length = 8 + ((*(int *)(buf + 4)) + 7)/8;
+ for (i = 0; i < payload_length; i++)
+ *(int *)(driver->apps_rsp_buf+12+i) = *(buf+i);
+ queue_work(driver->diag_cntl_wq,
+ &(driver->diag_log_mask_update_work));
+ ENCODE_RSP_AND_SEND(12 + payload_length - 1);
+ return 0;
+ } else
+ buf = temp;
+#endif
+ } /* Check for set message mask */
+ else if ((*buf == 0x7d) && (*(buf+1) == 0x4)) {
+ ssid_first = *(uint16_t *)(buf + 2);
+ ssid_last = *(uint16_t *)(buf + 4);
+ ssid_range = 4 * (ssid_last - ssid_first + 1);
+ diag_update_msg_mask(ssid_first, ssid_last , buf + 8);
+ diag_update_userspace_clients(MSG_MASKS_TYPE);
+#if defined(CONFIG_DIAG_OVER_USB)
+ if (chk_apps_only()) {
+ for (i = 0; i < 8 + ssid_range; i++)
+ *(driver->apps_rsp_buf + i) = *(buf+i);
+ *(driver->apps_rsp_buf + 6) = 0x1;
+ queue_work(driver->diag_cntl_wq,
+ &(driver->diag_msg_mask_update_work));
+ ENCODE_RSP_AND_SEND(8 + ssid_range - 1);
+ return 0;
+ } else
+ buf = temp;
+#endif
+ } else if (*buf == 0x82) { /* event mask change */
+ buf += 4;
+ diag_event_num_bytes = (*(uint16_t *)buf)/8+1;
+ diag_update_event_mask(buf, 1, (*(uint16_t *)buf)/8+1);
+ diag_update_userspace_clients(EVENT_MASKS_TYPE);
+#if defined(CONFIG_DIAG_OVER_USB)
+ if (chk_apps_only()) {
+ driver->apps_rsp_buf[0] = 0x82;
+ driver->apps_rsp_buf[1] = 0x0;
+ *(uint16_t *)(driver->apps_rsp_buf + 2) = 0x0;
+ *(uint16_t *)(driver->apps_rsp_buf + 4) =
+ EVENT_LAST_ID + 1;
+ for (i = 0; i < EVENT_LAST_ID/8 + 1; i++)
+ *(unsigned char *)(driver->apps_rsp_buf + 6 + i)
+ = 0x0;
+ /* cannot do this on work queue, as each event update
+ needs a num_bytes variable. Each queue_work call will
+ overwrite the previous input, as its the same struct */
+ diag_send_event_mask_update(driver->ch_cntl,
+ diag_event_num_bytes);
+ diag_send_event_mask_update(driver->chqdsp_cntl,
+ diag_event_num_bytes);
+ diag_send_event_mask_update(driver->ch_wcnss_cntl,
+ diag_event_num_bytes);
+ ENCODE_RSP_AND_SEND(6 + EVENT_LAST_ID/8);
+ return 0;
+ } else
+ buf = temp;
+#endif
+ } else if (*buf == 0x60) {
+ diag_event_config = *(buf+1);
+#if defined(CONFIG_DIAG_OVER_USB)
+ if (chk_apps_only()) {
+ driver->apps_rsp_buf[0] = 0x60;
+ driver->apps_rsp_buf[1] = 0x0;
+ driver->apps_rsp_buf[2] = 0x0;
+ diag_send_event_mask_update(driver->ch_cntl,
+ diag_event_num_bytes);
+ diag_send_event_mask_update(driver->chqdsp_cntl,
+ diag_event_num_bytes);
+ diag_send_event_mask_update(driver->ch_wcnss_cntl,
+ diag_event_num_bytes);
+ ENCODE_RSP_AND_SEND(2);
+ return 0;
+ }
+#endif
+ }
/* Check for registered clients and forward packet to apropriate proc */
cmd_code = (int)(*(char *)buf);
temp++;
@@ -598,7 +851,7 @@
}
pr_debug("diag: %d %d %d", cmd_code, subsys_id, subsys_cmd_code);
- for (i = 0; i < diag_max_registration; i++) {
+ for (i = 0; i < diag_max_reg; i++) {
entry = driver->table[i];
if (entry.process_id != NO_PROCESS) {
if (entry.cmd_code == cmd_code && entry.subsys_id ==
@@ -632,70 +885,9 @@
}
}
}
- /* set event mask */
- if (*buf == 0x82) {
- buf += 4;
- diag_update_event_mask(buf, 1, *(uint16_t *)buf);
- diag_update_userspace_clients(EVENT_MASKS_TYPE);
- }
- /* event mask change */
- else if ((*buf == 0x60) && (*(buf+1) == 0x0)) {
- diag_update_event_mask(buf+1, 0, 0);
- diag_update_userspace_clients(EVENT_MASKS_TYPE);
-#if defined(CONFIG_DIAG_OVER_USB)
- /* Check for Apps Only */
- if (!(driver->ch) && chk_apps_only()) {
- /* echo response back for apps only DIAG */
- driver->apps_rsp_buf[0] = 0x60;
- driver->apps_rsp_buf[1] = 0x0;
- driver->apps_rsp_buf[2] = 0x0;
- ENCODE_RSP_AND_SEND(2);
- return 0;
- }
-#endif
- }
- /* Set log masks */
- else if (*buf == 0x73 && *(int *)(buf+4) == 3) {
- buf += 8;
- /* Read Equip ID and pass as first param below*/
- diag_update_log_mask(*(int *)buf, buf+8, *(int *)(buf+4));
- diag_update_userspace_clients(LOG_MASKS_TYPE);
-#if defined(CONFIG_DIAG_OVER_USB)
- /* Check for Apps Only */
- if (!(driver->ch) && chk_apps_only()) {
- /* echo response back for Apps only DIAG */
- driver->apps_rsp_buf[0] = 0x73;
- *(int *)(driver->apps_rsp_buf + 4) = 0x3; /* op. ID */
- *(int *)(driver->apps_rsp_buf + 8) = 0x0; /* success */
- payload_length = 8 + ((*(int *)(buf + 4)) + 7)/8;
- for (i = 0; i < payload_length; i++)
- *(int *)(driver->apps_rsp_buf+12+i) =
- *(buf+8+i);
- ENCODE_RSP_AND_SEND(12 + payload_length - 1);
- return 0;
- }
-#endif
- }
- /* Check for set message mask */
- else if ((*buf == 0x7d) && (*(buf+1) == 0x4)) {
- ssid_first = *(uint16_t *)(buf + 2);
- ssid_last = *(uint16_t *)(buf + 4);
- ssid_range = 4 * (ssid_last - ssid_first + 1);
- diag_update_msg_mask(ssid_first, ssid_last , buf + 8);
- diag_update_userspace_clients(MSG_MASKS_TYPE);
-#if defined(CONFIG_DIAG_OVER_USB)
- if (!(driver->ch) && chk_apps_only()) {
- /* echo response back for apps only DIAG */
- for (i = 0; i < 8 + ssid_range; i++)
- *(driver->apps_rsp_buf + i) = *(buf+i);
- ENCODE_RSP_AND_SEND(8 + ssid_range - 1);
- return 0;
- }
-#endif
- }
#if defined(CONFIG_DIAG_OVER_USB)
/* Check for Apps Only & get event mask request */
- else if (!(driver->ch) && chk_apps_only() && *buf == 0x81) {
+ if (!(driver->ch) && chk_apps_only() && *buf == 0x81) {
driver->apps_rsp_buf[0] = 0x81;
driver->apps_rsp_buf[1] = 0x0;
*(uint16_t *)(driver->apps_rsp_buf + 2) = 0x0;
@@ -776,7 +968,15 @@
*(uint16_t *)(driver->apps_rsp_buf + 78) = MSG_SSID_17_LAST;
*(uint16_t *)(driver->apps_rsp_buf + 80) = MSG_SSID_18;
*(uint16_t *)(driver->apps_rsp_buf + 82) = MSG_SSID_18_LAST;
- ENCODE_RSP_AND_SEND(83);
+ *(uint16_t *)(driver->apps_rsp_buf + 84) = MSG_SSID_19;
+ *(uint16_t *)(driver->apps_rsp_buf + 86) = MSG_SSID_19_LAST;
+ *(uint16_t *)(driver->apps_rsp_buf + 88) = MSG_SSID_20;
+ *(uint16_t *)(driver->apps_rsp_buf + 90) = MSG_SSID_20_LAST;
+ *(uint16_t *)(driver->apps_rsp_buf + 92) = MSG_SSID_21;
+ *(uint16_t *)(driver->apps_rsp_buf + 94) = MSG_SSID_21_LAST;
+ *(uint16_t *)(driver->apps_rsp_buf + 96) = MSG_SSID_22;
+ *(uint16_t *)(driver->apps_rsp_buf + 98) = MSG_SSID_22_LAST;
+ ENCODE_RSP_AND_SEND(99);
return 0;
}
/* Check for Apps Only Respond to Get Subsys Build mask */
@@ -871,6 +1071,22 @@
for (i = 0; i < ssid_range; i += 4)
*(int *)(ptr + i) = msg_bld_masks_18[i/4];
break;
+ case MSG_SSID_19:
+ for (i = 0; i < ssid_range; i += 4)
+ *(int *)(ptr + i) = msg_bld_masks_19[i/4];
+ break;
+ case MSG_SSID_20:
+ for (i = 0; i < ssid_range; i += 4)
+ *(int *)(ptr + i) = msg_bld_masks_20[i/4];
+ break;
+ case MSG_SSID_21:
+ for (i = 0; i < ssid_range; i += 4)
+ *(int *)(ptr + i) = msg_bld_masks_21[i/4];
+ break;
+ case MSG_SSID_22:
+ for (i = 0; i < ssid_range; i += 4)
+ *(int *)(ptr + i) = msg_bld_masks_22[i/4];
+ break;
}
ENCODE_RSP_AND_SEND(8 + ssid_range - 1);
return 0;
@@ -892,7 +1108,7 @@
else if ((*buf == 0x4b) && (*(buf+1) == 0x32) &&
(*(buf+2) == 0x03)) {
/* If no one has registered for polling */
- if (!(driver->polling_reg_flag)) {
+ if (chk_polling_response()) {
/* Respond to polling for Apps only DIAG */
for (i = 0; i < 3; i++)
driver->apps_rsp_buf[i] = *(buf+i);
@@ -904,7 +1120,7 @@
}
}
/* Check for ID for NO MODEM present */
- else if (!(driver->polling_reg_flag)) {
+ else if (chk_polling_response()) {
/* respond to 0x0 command */
if (*buf == 0x00) {
for (i = 0; i < 55; i++)
@@ -1311,6 +1527,26 @@
{
diag_debug_buf_idx = 0;
driver->read_len_legacy = 0;
+ driver->use_device_tree = has_device_tree();
+
+ if (driver->event_mask == NULL) {
+ driver->event_mask = kzalloc(sizeof(
+ struct diag_ctrl_event_mask), GFP_KERNEL);
+ if (driver->event_mask == NULL)
+ goto err;
+ }
+ if (driver->msg_mask == NULL) {
+ driver->msg_mask = kzalloc(sizeof(
+ struct diag_ctrl_msg_mask), GFP_KERNEL);
+ if (driver->msg_mask == NULL)
+ goto err;
+ }
+ if (driver->log_mask == NULL) {
+ driver->log_mask = kzalloc(sizeof(
+ struct diag_ctrl_log_mask), GFP_KERNEL);
+ if (driver->log_mask == NULL)
+ goto err;
+ }
if (driver->buf_in_1 == NULL) {
driver->buf_in_1 = kzalloc(IN_BUF_SIZE, GFP_KERNEL);
if (driver->buf_in_1 == NULL)
@@ -1336,6 +1572,24 @@
if (driver->buf_in_wcnss == NULL)
goto err;
}
+ if (driver->buf_msg_mask_update == NULL) {
+ driver->buf_msg_mask_update = kzalloc(APPS_BUF_SIZE,
+ GFP_KERNEL);
+ if (driver->buf_msg_mask_update == NULL)
+ goto err;
+ }
+ if (driver->buf_log_mask_update == NULL) {
+ driver->buf_log_mask_update = kzalloc(APPS_BUF_SIZE,
+ GFP_KERNEL);
+ if (driver->buf_log_mask_update == NULL)
+ goto err;
+ }
+ if (driver->buf_event_mask_update == NULL) {
+ driver->buf_event_mask_update = kzalloc(APPS_BUF_SIZE,
+ GFP_KERNEL);
+ if (driver->buf_event_mask_update == NULL)
+ goto err;
+ }
if (driver->usb_buf_out == NULL &&
(driver->usb_buf_out = kzalloc(USB_MAX_OUT_BUF,
GFP_KERNEL)) == NULL)
@@ -1374,7 +1628,7 @@
, GFP_KERNEL)) == NULL)
goto err;
if (driver->table == NULL &&
- (driver->table = kzalloc(diag_max_registration*
+ (driver->table = kzalloc(diag_max_reg*
sizeof(struct diag_master_table),
GFP_KERNEL)) == NULL)
goto err;
@@ -1419,7 +1673,7 @@
GFP_KERNEL)) == NULL)
goto err;
if (driver->apps_rsp_buf == NULL) {
- driver->apps_rsp_buf = kzalloc(500, GFP_KERNEL);
+ driver->apps_rsp_buf = kzalloc(APPS_BUF_SIZE, GFP_KERNEL);
if (driver->apps_rsp_buf == NULL)
goto err;
}
@@ -1427,6 +1681,16 @@
#ifdef CONFIG_DIAG_OVER_USB
INIT_WORK(&(driver->diag_proc_hdlc_work), diag_process_hdlc_fn);
INIT_WORK(&(driver->diag_read_work), diag_read_work_fn);
+ INIT_WORK(&(driver->diag_msg_mask_update_work),
+ diag_msg_mask_update_fn);
+ INIT_WORK(&(driver->diag_log_mask_update_work),
+ diag_log_mask_update_fn);
+ INIT_WORK(&(driver->diag_modem_mask_update_work),
+ diag_modem_mask_update_fn);
+ INIT_WORK(&(driver->diag_qdsp_mask_update_work),
+ diag_qdsp_mask_update_fn);
+ INIT_WORK(&(driver->diag_wcnss_mask_update_work),
+ diag_wcnss_mask_update_fn);
driver->legacy_ch = usb_diag_open(DIAG_LEGACY, driver,
diag_usb_legacy_notifier);
if (IS_ERR(driver->legacy_ch)) {
@@ -1440,11 +1704,17 @@
return;
err:
pr_err("diag: Could not initialize diag buffers");
+ kfree(driver->event_mask);
+ kfree(driver->log_mask);
+ kfree(driver->msg_mask);
kfree(driver->buf_in_1);
kfree(driver->buf_in_2);
kfree(driver->buf_in_qdsp_1);
kfree(driver->buf_in_qdsp_2);
kfree(driver->buf_in_wcnss);
+ kfree(driver->buf_msg_mask_update);
+ kfree(driver->buf_log_mask_update);
+ kfree(driver->buf_event_mask_update);
kfree(driver->usb_buf_out);
kfree(driver->hdlc_buf);
kfree(driver->msg_masks);
@@ -1482,11 +1752,17 @@
#endif
platform_driver_unregister(&msm_smd_ch1_driver);
platform_driver_unregister(&diag_smd_lite_driver);
+ kfree(driver->event_mask);
+ kfree(driver->log_mask);
+ kfree(driver->msg_mask);
kfree(driver->buf_in_1);
kfree(driver->buf_in_2);
kfree(driver->buf_in_qdsp_1);
kfree(driver->buf_in_qdsp_2);
kfree(driver->buf_in_wcnss);
+ kfree(driver->buf_msg_mask_update);
+ kfree(driver->buf_log_mask_update);
+ kfree(driver->buf_event_mask_update);
kfree(driver->usb_buf_out);
kfree(driver->hdlc_buf);
kfree(driver->msg_masks);
diff --git a/drivers/char/diag/diagfwd.h b/drivers/char/diag/diagfwd.h
index 6dacab7..9ef0199 100644
--- a/drivers/char/diag/diagfwd.h
+++ b/drivers/char/diag/diagfwd.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2008-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -28,6 +28,9 @@
int mask_request_validate(unsigned char mask_buf[]);
void diag_clear_reg(int);
int chk_apps_only(void);
+void diag_send_event_mask_update(smd_channel_t *, int num_bytes);
+void diag_send_msg_mask_update(smd_channel_t *);
+void diag_send_log_mask_update(smd_channel_t *);
/* State for diag forwarding */
#ifdef CONFIG_DIAG_OVER_USB
int diagfwd_connect(void);
@@ -35,5 +38,5 @@
#endif
extern int diag_debug_buf_idx;
extern unsigned char diag_debug_buf[1024];
-
+extern int diag_event_num_bytes;
#endif
diff --git a/drivers/char/diag/diagfwd_cntl.c b/drivers/char/diag/diagfwd_cntl.c
index 2c3dc54..01ed28d 100644
--- a/drivers/char/diag/diagfwd_cntl.c
+++ b/drivers/char/diag/diagfwd_cntl.c
@@ -36,6 +36,10 @@
else
pr_debug("diag: incomplete pkt on Modem CNTL ch\n");
break;
+ case SMD_EVENT_OPEN:
+ queue_work(driver->diag_cntl_wq,
+ &(driver->diag_modem_mask_update_work));
+ break;
}
}
@@ -56,6 +60,10 @@
else
pr_debug("diag: incomplete pkt on LPASS CNTL ch\n");
break;
+ case SMD_EVENT_OPEN:
+ queue_work(driver->diag_cntl_wq,
+ &(driver->diag_qdsp_mask_update_work));
+ break;
}
}
@@ -76,6 +84,10 @@
else
pr_debug("diag: incomplete pkt on WCNSS CNTL ch\n");
break;
+ case SMD_EVENT_OPEN:
+ queue_work(driver->diag_cntl_wq,
+ &(driver->diag_wcnss_mask_update_work));
+ break;
}
}
@@ -259,6 +271,7 @@
void diagfwd_cntl_init(void)
{
driver->polling_reg_flag = 0;
+ driver->diag_cntl_wq = create_singlethread_workqueue("diag_cntl_wq");
if (driver->buf_in_cntl == NULL) {
driver->buf_in_cntl = kzalloc(IN_BUF_SIZE, GFP_KERNEL);
if (driver->buf_in_cntl == NULL)
@@ -283,6 +296,8 @@
kfree(driver->buf_in_cntl);
kfree(driver->buf_in_qdsp_cntl);
kfree(driver->buf_in_wcnss_cntl);
+ if (driver->diag_cntl_wq)
+ destroy_workqueue(driver->diag_cntl_wq);
}
void diagfwd_cntl_exit(void)
@@ -293,6 +308,7 @@
driver->ch_cntl = 0;
driver->chqdsp_cntl = 0;
driver->ch_wcnss_cntl = 0;
+ destroy_workqueue(driver->diag_cntl_wq);
platform_driver_unregister(&msm_smd_ch1_cntl_driver);
platform_driver_unregister(&diag_smd_lite_cntl_driver);
diff --git a/drivers/char/diag/diagfwd_cntl.h b/drivers/char/diag/diagfwd_cntl.h
index a76d36d..ad1fec9 100644
--- a/drivers/char/diag/diagfwd_cntl.h
+++ b/drivers/char/diag/diagfwd_cntl.h
@@ -21,10 +21,6 @@
#define DIAG_CTRL_MSG_DIAGMODE 3
/* Diag data based on "light" diag mask */
#define DIAG_CTRL_MSG_DIAGDATA 4
-/* Deprecated */
-#define DIAG_CTRL_MSG_LOG_MASK 5
-#define DIAG_CTRL_MSG_EVENT_MASK 6
-#define DIAG_CTRL_MSG_F3_MASK 7
/* Send diag internal feature mask 'diag_int_feature_mask' */
#define DIAG_CTRL_MSG_FEATURE 8
/* Send Diag log mask for a particular equip id */
@@ -48,6 +44,39 @@
uint16_t port;
};
+struct diag_ctrl_event_mask {
+ uint32_t cmd_type;
+ uint32_t data_len;
+ uint8_t stream_id;
+ uint8_t status;
+ uint8_t event_config;
+ uint32_t event_mask_size;
+ /* Copy event mask here */
+} __packed;
+
+struct diag_ctrl_log_mask {
+ uint32_t cmd_type;
+ uint32_t data_len;
+ uint8_t stream_id;
+ uint8_t status;
+ uint8_t equip_id;
+ uint32_t num_items; /* Last log code for this equip_id */
+ uint32_t log_mask_size; /* Size of log mask stored in log_mask[] */
+ /* Copy log mask here */
+} __packed;
+
+struct diag_ctrl_msg_mask {
+ uint32_t cmd_type;
+ uint32_t data_len;
+ uint8_t stream_id;
+ uint8_t status;
+ uint8_t msg_mode;
+ uint16_t ssid_first; /* Start of range of supported SSIDs */
+ uint16_t ssid_last; /* Last SSID in range */
+ uint32_t msg_mask_size; /* ssid_last - ssid_first + 1 */
+ /* Copy msg mask here */
+} __packed;
+
void diagfwd_cntl_init(void);
void diagfwd_cntl_exit(void);
void diag_read_smd_cntl_work_fn(struct work_struct *);
diff --git a/drivers/char/diag/diagfwd_hsic.c b/drivers/char/diag/diagfwd_hsic.c
index ac5722f..b2080b3 100644
--- a/drivers/char/diag/diagfwd_hsic.c
+++ b/drivers/char/diag/diagfwd_hsic.c
@@ -102,14 +102,16 @@
driver->write_ptr_mdm);
}
} else {
- pr_err("DIAG in %s: actual_size: %d\n", __func__, actual_size);
+ pr_debug("%s: actual_size: %d\n", __func__, actual_size);
}
/*
* If for some reason there was no hsic data to write to the
* mdm channel, set up another read
*/
- if (!driver->in_busy_hsic_write_on_mdm)
+ if (!driver->in_busy_hsic_write_on_mdm &&
+ driver->usb_mdm_connected &&
+ !driver->hsic_suspend)
queue_work(driver->diag_hsic_wq, &driver->diag_read_hsic_work);
}
@@ -127,13 +129,34 @@
if (actual_size < 0)
pr_err("DIAG in %s: actual_size: %d\n", __func__, actual_size);
- queue_work(driver->diag_hsic_wq, &driver->diag_read_mdm_work);
+ if (driver->usb_mdm_connected)
+ queue_work(driver->diag_hsic_wq, &driver->diag_read_mdm_work);
+}
+
+static int diag_hsic_suspend(void *ctxt)
+{
+ if (driver->in_busy_hsic_write)
+ return -EBUSY;
+
+ driver->hsic_suspend = 1;
+
+ return 0;
+}
+
+static void diag_hsic_resume(void *ctxt)
+{
+ driver->hsic_suspend = 0;
+
+ if (!driver->in_busy_hsic_write_on_mdm && driver->usb_mdm_connected)
+ queue_work(driver->diag_hsic_wq, &driver->diag_read_hsic_work);
}
static struct diag_bridge_ops hsic_diag_bridge_ops = {
.ctxt = NULL,
.read_complete_cb = diag_hsic_read_complete_callback,
.write_complete_cb = diag_hsic_write_complete_callback,
+ .suspend = diag_hsic_suspend,
+ .resume = diag_hsic_resume,
};
static int diag_hsic_close(void)
@@ -177,11 +200,11 @@
pr_err("DIAG: HSIC channel open error: %d\n",
err);
} else {
- pr_info("DIAG: opened HSIC channel\n");
+ pr_debug("DIAG: opened HSIC channel\n");
driver->hsic_device_opened = 1;
}
} else {
- pr_info("DIAG: HSIC channel already open\n");
+ pr_debug("DIAG: HSIC channel already open\n");
}
/*
@@ -220,9 +243,7 @@
driver->in_busy_hsic_read = 1;
/* Turn off communication over usb mdm and hsic */
- driver->hsic_ch = 0;
-
- return 0;
+ return diag_hsic_close();
}
/*
@@ -311,10 +332,11 @@
diagfwd_connect_hsic();
break;
case USB_DIAG_DISCONNECT:
- diagfwd_disconnect_hsic();
+ queue_work(driver->diag_hsic_wq, &driver->diag_disconnect_work);
break;
case USB_DIAG_READ_DONE:
- diagfwd_read_complete_hsic(d_req);
+ queue_work(driver->diag_hsic_wq,
+ &driver->diag_usb_read_complete_work);
break;
case USB_DIAG_WRITE_DONE:
diagfwd_write_complete_hsic();
@@ -326,6 +348,16 @@
}
}
+static void diag_usb_read_complete_fn(struct work_struct *w)
+{
+ diagfwd_read_complete_hsic(driver->usb_read_mdm_ptr);
+}
+
+static void diag_disconnect_work_fn(struct work_struct *w)
+{
+ diagfwd_disconnect_hsic();
+}
+
static void diag_read_mdm_work_fn(struct work_struct *work)
{
if (!driver->hsic_ch) {
@@ -380,7 +412,6 @@
sizeof(struct diag_request), GFP_KERNEL);
if (driver->usb_read_mdm_ptr == NULL)
goto err;
- driver->diag_hsic_wq = create_singlethread_workqueue("diag_hsic_wq");
#ifdef CONFIG_DIAG_OVER_USB
INIT_WORK(&(driver->diag_read_mdm_work), diag_read_mdm_work_fn);
#endif
@@ -413,23 +444,22 @@
}
}
- /* The hsic (diag_bridge) platform device driver is enabled */
- err = diag_bridge_open(&hsic_diag_bridge_ops);
- if (err) {
- pr_err("DIAG could not open HSIC channel, err: %d\n", err);
- driver->hsic_device_opened = 0;
- return err;
- }
-
- pr_info("DIAG opened HSIC channel\n");
- driver->hsic_device_opened = 1;
-
/*
* The probe function was called after the usb was connected
* on the legacy channel. Communication over usb mdm and hsic
* needs to be turned on.
*/
- if (driver->usb_connected) {
+ if (driver->usb_mdm_connected) {
+ /* The hsic (diag_bridge) platform device driver is enabled */
+ err = diag_bridge_open(&hsic_diag_bridge_ops);
+ if (err) {
+ pr_err("DIAG could not open HSIC, err: %d\n", err);
+ driver->hsic_device_opened = 0;
+ return err;
+ }
+
+ pr_debug("DIAG opened HSIC channel\n");
+ driver->hsic_device_opened = 1;
driver->hsic_ch = 1;
driver->in_busy_hsic_write_on_mdm = 0;
driver->in_busy_hsic_read_on_mdm = 0;
@@ -448,7 +478,7 @@
static int diag_hsic_remove(struct platform_device *pdev)
{
- pr_info("DIAG: %s called\n", __func__);
+ pr_debug("DIAG: %s called\n", __func__);
diag_hsic_close();
return 0;
}
@@ -487,6 +517,11 @@
pr_debug("DIAG in %s\n", __func__);
+ driver->diag_hsic_wq = create_singlethread_workqueue("diag_hsic_wq");
+ INIT_WORK(&(driver->diag_disconnect_work), diag_disconnect_work_fn);
+ INIT_WORK(&(driver->diag_usb_read_complete_work),
+ diag_usb_read_complete_fn);
+
#ifdef CONFIG_DIAG_OVER_USB
driver->mdm_ch = usb_diag_open(DIAG_MDM, driver, diagfwd_hsic_notifier);
if (IS_ERR(driver->mdm_ch)) {
diff --git a/drivers/char/hw_random/msm_rng.c b/drivers/char/hw_random/msm_rng.c
index d72e9b6..d1a9fe6 100644
--- a/drivers/char/hw_random/msm_rng.c
+++ b/drivers/char/hw_random/msm_rng.c
@@ -242,9 +242,6 @@
static int __init msm_rng_init(void)
{
- if (cpu_is_apq8064())
- return -ENODEV;
-
return platform_driver_register(&rng_driver);
}
diff --git a/drivers/char/msm_rotator.c b/drivers/char/msm_rotator.c
index bd48925..3d9c9d1 100644
--- a/drivers/char/msm_rotator.c
+++ b/drivers/char/msm_rotator.c
@@ -749,7 +749,8 @@
}
static int get_img(struct msmfb_data *fbd, unsigned long *start,
- unsigned long *len, struct file **p_file, struct ion_handle **p_ihdl)
+ unsigned long *len, struct file **p_file, int *p_need,
+ struct ion_handle **p_ihdl)
{
int ret = 0;
#ifdef CONFIG_FB
@@ -760,6 +761,8 @@
unsigned long vstart;
#endif
+ *p_need = 0;
+
#ifdef CONFIG_FB
if (fbd->flags & MDP_MEMORY_ID_TYPE_FB) {
file = fget_light(fbd->memory_id, &put_needed);
@@ -770,8 +773,10 @@
fb_num = MINOR(file->f_dentry->d_inode->i_rdev);
if (get_fb_phys_info(start, len, fb_num))
ret = -1;
- else
+ else {
*p_file = file;
+ *p_need = put_needed;
+ }
} else
ret = -1;
if (ret)
@@ -822,6 +827,7 @@
struct file *srcp1_file = NULL, *dstp1_file = NULL;
struct ion_handle *srcp0_ihdl = NULL, *dstp0_ihdl = NULL;
struct ion_handle *srcp1_ihdl = NULL, *dstp1_ihdl = NULL;
+ int ps0_need, p_need;
unsigned int in_chroma_paddr = 0, out_chroma_paddr = 0;
unsigned int in_chroma2_paddr = 0;
struct msm_rotator_img_info *img_info;
@@ -872,8 +878,9 @@
goto do_rotate_unlock_mutex;
}
+
rc = get_img(&info.src, (unsigned long *)&in_paddr,
- (unsigned long *)&src_len, &srcp0_file, &srcp0_ihdl);
+ (unsigned long *)&src_len, &srcp0_file, &ps0_need, &srcp0_ihdl);
if (rc) {
pr_err("%s: in get_img() failed id=0x%08x\n",
DRIVER_NAME, info.src.memory_id);
@@ -881,7 +888,7 @@
}
rc = get_img(&info.dst, (unsigned long *)&out_paddr,
- (unsigned long *)&dst_len, &dstp0_file, &dstp0_ihdl);
+ (unsigned long *)&dst_len, &dstp0_file, &p_need, &dstp0_ihdl);
if (rc) {
pr_err("%s: out get_img() failed id=0x%08x\n",
DRIVER_NAME, info.dst.memory_id);
@@ -911,7 +918,7 @@
rc = get_img(&info.src_chroma,
(unsigned long *)&in_chroma_paddr,
- (unsigned long *)&src_len, &srcp1_file,
+ (unsigned long *)&src_len, &srcp1_file, &p_need,
&srcp1_ihdl);
if (rc) {
pr_err("%s: in chroma get_img() failed id=0x%08x\n",
@@ -921,7 +928,7 @@
rc = get_img(&info.dst_chroma,
(unsigned long *)&out_chroma_paddr,
- (unsigned long *)&dst_len, &dstp1_file,
+ (unsigned long *)&dst_len, &dstp1_file, &p_need,
&dstp1_ihdl);
if (rc) {
pr_err("%s: out chroma get_img() failed id=0x%08x\n",
@@ -1089,7 +1096,12 @@
put_img(dstp1_file, dstp1_ihdl);
put_img(srcp1_file, srcp1_ihdl);
put_img(dstp0_file, dstp0_ihdl);
- put_img(srcp0_file, srcp0_ihdl);
+
+ /* only source may use frame buffer */
+ if (info.src.flags & MDP_MEMORY_ID_TYPE_FB)
+ fput_light(srcp0_file, ps0_need);
+ else
+ put_img(srcp0_file, srcp0_ihdl);
mutex_unlock(&msm_rotator_dev->rotator_lock);
dev_dbg(msm_rotator_dev->device, "%s() returning rc = %d\n",
__func__, rc);
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index ff15497..36375c05 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c
@@ -273,8 +273,10 @@
trace_cpu_frequency(freqs->new, freqs->cpu);
srcu_notifier_call_chain(&cpufreq_transition_notifier_list,
CPUFREQ_POSTCHANGE, freqs);
- if (likely(policy) && likely(policy->cpu == freqs->cpu))
+ if (likely(policy) && likely(policy->cpu == freqs->cpu)) {
policy->cur = freqs->new;
+ sysfs_notify(&policy->kobj, NULL, "scaling_cur_freq");
+ }
break;
}
}
diff --git a/drivers/crypto/msm/qce40.c b/drivers/crypto/msm/qce40.c
index 5276bcc..0d3c4c3 100644
--- a/drivers/crypto/msm/qce40.c
+++ b/drivers/crypto/msm/qce40.c
@@ -155,10 +155,14 @@
ret = readl_relaxed(pce_dev->iobase + CRYPTO_CONFIG_REG);
if (ret) {
- val = (CRYPTO_REQ_SIZE_ENUM_64_BYTES <<
- CRYPTO_REQ_SIZE) |
- (CRYPTO_FIFO_ENUM_64_BYTES <<
- CRYPTO_FIFO_THRESHOLD);
+ val = BIT(CRYPTO_MASK_DOUT_INTR) |
+ BIT(CRYPTO_MASK_DIN_INTR) |
+ BIT(CRYPTO_MASK_OP_DONE_INTR) |
+ BIT(CRYPTO_MASK_ERR_INTR) |
+ (CRYPTO_REQ_SIZE_ENUM_64_BYTES <<
+ CRYPTO_REQ_SIZE) |
+ (CRYPTO_FIFO_ENUM_64_BYTES <<
+ CRYPTO_FIFO_THRESHOLD);
writel_relaxed(val, pce_dev->iobase +
CRYPTO_CONFIG_REG);
@@ -183,24 +187,6 @@
return 0;
};
-static void config_ce_engine(struct qce_device *pce_dev)
-{
- unsigned int val = 0;
- unsigned int ret = 0;
-
- /* Crypto config register returns a 0 when it is XPU protected. */
- ret = readl_relaxed(pce_dev->iobase + CRYPTO_CONFIG_REG);
-
- /* Configure the crypto register if it is not XPU protected. */
- if (ret) {
- val = BIT(CRYPTO_MASK_DOUT_INTR) |
- BIT(CRYPTO_MASK_DIN_INTR) |
- BIT(CRYPTO_MASK_OP_DONE_INTR) |
- BIT(CRYPTO_MASK_ERR_INTR);
-
- writel_relaxed(val, pce_dev->iobase + CRYPTO_CONFIG_REG);
- }
-}
static void _check_probe_done_call_back(struct msm_dmov_cmd *cmd_ptr,
unsigned int result, struct msm_dmov_errdata *err)
@@ -234,9 +220,6 @@
*/
mb();
- /* Configure the CE Engine */
- config_ce_engine(pce_dev);
-
/*
* Clear ACCESS_VIOL bit in CRYPTO_STATUS REGISTER
*/
@@ -2622,4 +2605,4 @@
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Mona Hossain <mhossain@codeaurora.org>");
MODULE_DESCRIPTION("Crypto Engine driver");
-MODULE_VERSION("2.15");
+MODULE_VERSION("2.16");
diff --git a/drivers/crypto/msm/qcedev.c b/drivers/crypto/msm/qcedev.c
index c1a65fc..fff494c 100644
--- a/drivers/crypto/msm/qcedev.c
+++ b/drivers/crypto/msm/qcedev.c
@@ -1,6 +1,6 @@
/* Qualcomm CE device driver.
*
- * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -172,7 +172,7 @@
#endif
}
-static int qcedev_ce_high_bw_req(struct qcedev_control *podev,
+static void qcedev_ce_high_bw_req(struct qcedev_control *podev,
bool high_bw_req)
{
int ret = 0;
@@ -180,18 +180,22 @@
mutex_lock(&sent_bw_req);
if (high_bw_req) {
if (podev->high_bw_req_count == 0)
- msm_bus_scale_client_update_request(
+ ret = msm_bus_scale_client_update_request(
podev->bus_scale_handle, 1);
+ if (ret)
+ pr_err("%s Unable to set to high bandwidth\n",
+ __func__);
podev->high_bw_req_count++;
} else {
if (podev->high_bw_req_count == 1)
- msm_bus_scale_client_update_request(
+ ret = msm_bus_scale_client_update_request(
podev->bus_scale_handle, 0);
+ if (ret)
+ pr_err("%s Unable to set to low bandwidth\n",
+ __func__);
podev->high_bw_req_count--;
}
mutex_unlock(&sent_bw_req);
-
- return ret;
}
@@ -331,7 +335,7 @@
handle->cntl = podev;
file->private_data = handle;
if (podev->platform_support.bus_scale_table != NULL)
- return qcedev_ce_high_bw_req(podev, true);
+ qcedev_ce_high_bw_req(podev, true);
return 0;
}
@@ -349,7 +353,7 @@
kzfree(handle);
file->private_data = NULL;
if (podev->platform_support.bus_scale_table != NULL)
- return qcedev_ce_high_bw_req(podev, false);
+ qcedev_ce_high_bw_req(podev, false);
return 0;
}
@@ -2218,7 +2222,7 @@
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Mona Hossain <mhossain@codeaurora.org>");
MODULE_DESCRIPTION("Qualcomm DEV Crypto driver");
-MODULE_VERSION("1.25");
+MODULE_VERSION("1.26");
module_init(qcedev_init);
module_exit(qcedev_exit);
diff --git a/drivers/crypto/msm/qcrypto.c b/drivers/crypto/msm/qcrypto.c
index 3fff05c..21c3aff 100644
--- a/drivers/crypto/msm/qcrypto.c
+++ b/drivers/crypto/msm/qcrypto.c
@@ -1,6 +1,6 @@
/* Qualcomm Crypto driver
*
- * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -329,7 +329,7 @@
}
}
-static int qcrypto_ce_high_bw_req(struct crypto_priv *cp, bool high_bw_req)
+static void qcrypto_ce_high_bw_req(struct crypto_priv *cp, bool high_bw_req)
{
int ret = 0;
@@ -338,16 +338,20 @@
if (cp->high_bw_req_count == 0)
ret = msm_bus_scale_client_update_request(
cp->bus_scale_handle, 1);
+ if (ret)
+ pr_err("%s Unable to set to high bandwidth\n",
+ __func__);
cp->high_bw_req_count++;
} else {
if (cp->high_bw_req_count == 1)
ret = msm_bus_scale_client_update_request(
cp->bus_scale_handle, 0);
+ if (ret)
+ pr_err("%s Unable to set to low bandwidth\n",
+ __func__);
cp->high_bw_req_count--;
}
mutex_unlock(&sent_bw_req);
-
- return ret;
}
static void _start_qcrypto_process(struct crypto_priv *cp);
@@ -403,7 +407,7 @@
/* random first IV */
get_random_bytes(ctx->iv, QCRYPTO_MAX_IV_LENGTH);
if (ctx->cp->platform_support.bus_scale_table != NULL)
- return qcrypto_ce_high_bw_req(ctx->cp, true);
+ qcrypto_ce_high_bw_req(ctx->cp, true);
return 0;
};
@@ -440,7 +444,7 @@
sha_ctx->ahash_req = NULL;
if (sha_ctx->cp->platform_support.bus_scale_table != NULL)
- return qcrypto_ce_high_bw_req(sha_ctx->cp, true);
+ qcrypto_ce_high_bw_req(sha_ctx->cp, true);
return 0;
};
@@ -3359,4 +3363,4 @@
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Mona Hossain <mhossain@codeaurora.org>");
MODULE_DESCRIPTION("Qualcomm Crypto driver");
-MODULE_VERSION("1.20");
+MODULE_VERSION("1.21");
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 8f3263e..8328ee2 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -477,4 +477,12 @@
This option enables support for on-chip GPIO found on Qualcomm PM8xxx
PMICs through RPC.
+config GPIO_QPNP
+ depends on ARCH_MSMCOPPER
+ depends on OF_SPMI
+ depends on MSM_QPNP_INT
+ tristate "Qualcomm QPNP GPIO support"
+ help
+ Say 'y' here to include support for the Qualcomm QPNP gpio
+ support. QPNP is a SPMI based PMIC implementation.
endif
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 83972f1..db19ac8 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -51,3 +51,4 @@
obj-$(CONFIG_GPIO_PM8XXX) += pm8xxx-gpio.o
obj-$(CONFIG_GPIO_PM8XXX_MPP) += pm8xxx-mpp.o
obj-$(CONFIG_GPIO_PM8XXX_RPC) += gpio-pm8xxx-rpc.o
+obj-$(CONFIG_GPIO_QPNP) += qpnp-gpio.o
diff --git a/drivers/gpio/qpnp-gpio.c b/drivers/gpio/qpnp-gpio.c
new file mode 100644
index 0000000..b09b040
--- /dev/null
+++ b/drivers/gpio/qpnp-gpio.c
@@ -0,0 +1,706 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/types.h>
+#include <linux/spmi.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/slab.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/of_irq.h>
+#include <linux/qpnp/gpio.h>
+
+#include <mach/qpnp.h>
+
+#define Q_REG_ADDR(q_spec, reg_index) \
+ ((q_spec)->offset + reg_index)
+
+#define Q_REG_STATUS1 0x8
+#define Q_NUM_CTL_REGS 5
+
+/* control register base address offsets */
+#define Q_REG_IO_CTL1 0x42
+#define Q_REG_INPUT_CTL1 0x43
+#define Q_REG_OUTPUT_CTL1 0x44
+#define Q_REG_OUTPUT_CTL2 0x45
+#define Q_REG_EN_CTL1 0x46
+
+/* control register regs array indices */
+#define Q_REG_I_IO_CTL1 0
+#define Q_REG_I_INPUT_CTL1 1
+#define Q_REG_I_OUTPUT_CTL1 2
+#define Q_REG_I_OUTPUT_CTL2 3
+#define Q_REG_I_EN_CTL1 4
+
+/* control register configuration */
+#define Q_REG_VIN_SHIFT 0
+#define Q_REG_VIN_MASK 0x7
+#define Q_REG_PULL_SHIFT 4
+#define Q_REG_PULL_MASK 0x70
+#define Q_REG_INPUT_EN_SHIFT 7
+#define Q_REG_INPUT_EN_MASK 0x80
+#define Q_REG_OUT_STRENGTH_SHIFT 0
+#define Q_REG_OUT_STRENGTH_MASK 0x3
+#define Q_REG_OUT_TYPE_SHIFT 6
+#define Q_REG_OUT_TYPE_MASK 0x40
+#define Q_REG_OUT_INVERT_SHIFT 0
+#define Q_REG_OUT_INVERT_MASK 0x1
+#define Q_REG_SRC_SEL_SHIFT 1
+#define Q_REG_SRC_SEL_MASK 0xE
+#define Q_REG_OUTPUT_EN_SHIFT 7
+#define Q_REG_OUTPUT_EN_MASK 0x80
+#define Q_REG_MASTER_EN_SHIFT 7
+#define Q_REG_MASTER_EN_MASK 0x80
+
+
+struct qpnp_gpio_spec {
+ uint8_t slave; /* 0-15 */
+ uint16_t offset; /* 0-255 */
+ uint32_t gpio_chip_idx; /* offset from gpio_chip base */
+ int irq; /* logical IRQ number */
+ u8 regs[Q_NUM_CTL_REGS]; /* Control regs */
+};
+
+struct qpnp_gpio_chip {
+ struct gpio_chip gpio_chip;
+ struct spmi_device *spmi;
+ struct qpnp_gpio_spec **pmic_gpios;
+ struct qpnp_gpio_spec **chip_gpios;
+ uint32_t pmic_gpio_lowest;
+ uint32_t pmic_gpio_highest;
+ struct device_node *int_ctrl;
+ struct list_head chip_list;
+};
+
+static LIST_HEAD(qpnp_gpio_chips);
+static DEFINE_MUTEX(qpnp_gpio_chips_lock);
+
+static inline void qpnp_pmic_gpio_set_spec(struct qpnp_gpio_chip *q_chip,
+ uint32_t pmic_gpio,
+ struct qpnp_gpio_spec *spec)
+{
+ q_chip->pmic_gpios[pmic_gpio - q_chip->pmic_gpio_lowest] = spec;
+}
+
+static inline struct qpnp_gpio_spec *qpnp_pmic_gpio_get_spec(
+ struct qpnp_gpio_chip *q_chip,
+ uint32_t pmic_gpio)
+{
+ if (pmic_gpio < q_chip->pmic_gpio_lowest ||
+ pmic_gpio > q_chip->pmic_gpio_highest)
+ return NULL;
+
+ return q_chip->pmic_gpios[pmic_gpio - q_chip->pmic_gpio_lowest];
+}
+
+static inline struct qpnp_gpio_spec *qpnp_chip_gpio_get_spec(
+ struct qpnp_gpio_chip *q_chip,
+ uint32_t chip_gpio)
+{
+ if (chip_gpio > q_chip->gpio_chip.ngpio)
+ return NULL;
+
+ return q_chip->chip_gpios[chip_gpio];
+}
+
+static inline void qpnp_chip_gpio_set_spec(struct qpnp_gpio_chip *q_chip,
+ uint32_t chip_gpio,
+ struct qpnp_gpio_spec *spec)
+{
+ q_chip->chip_gpios[chip_gpio] = spec;
+}
+
+int qpnp_gpio_config(int gpio, struct qpnp_gpio_cfg *param)
+{
+ int rc, chip_offset;
+ struct qpnp_gpio_chip *q_chip;
+ struct qpnp_gpio_spec *q_spec = NULL;
+ struct gpio_chip *gpio_chip;
+
+ if (param == NULL)
+ return -EINVAL;
+
+ mutex_lock(&qpnp_gpio_chips_lock);
+ list_for_each_entry(q_chip, &qpnp_gpio_chips, chip_list) {
+ gpio_chip = &q_chip->gpio_chip;
+ if (gpio >= gpio_chip->base
+ && gpio < gpio_chip->base + gpio_chip->ngpio) {
+ chip_offset = gpio - gpio_chip->base;
+ q_spec = qpnp_chip_gpio_get_spec(q_chip, chip_offset);
+ if (WARN_ON(!q_spec)) {
+ mutex_unlock(&qpnp_gpio_chips_lock);
+ return -ENODEV;
+ }
+ break;
+ }
+ }
+ mutex_unlock(&qpnp_gpio_chips_lock);
+ if (!q_spec) {
+ pr_err("gpio %d not handled by any pmic\n", gpio);
+ return -EINVAL;
+ }
+
+ q_spec->regs[Q_REG_I_IO_CTL1] = (param->vin_sel <<
+ Q_REG_VIN_SHIFT) & Q_REG_VIN_MASK;
+ q_spec->regs[Q_REG_I_IO_CTL1] |= (param->pull <<
+ Q_REG_PULL_SHIFT) & Q_REG_PULL_MASK;
+ q_spec->regs[Q_REG_I_INPUT_CTL1] = ((param->direction &
+ QPNP_GPIO_DIR_IN) ? ((1 << Q_REG_INPUT_EN_SHIFT)) : 0);
+
+ if (param->direction & QPNP_GPIO_DIR_OUT) {
+ q_spec->regs[Q_REG_I_OUTPUT_CTL1] = (param->out_strength
+ << Q_REG_OUT_STRENGTH_SHIFT) & Q_REG_OUT_STRENGTH_MASK;
+ q_spec->regs[Q_REG_I_OUTPUT_CTL1] |= (param->output_type
+ << Q_REG_OUT_TYPE_SHIFT) & Q_REG_OUT_TYPE_MASK;
+ } else {
+ q_spec->regs[Q_REG_I_OUTPUT_CTL1] = 0;
+ }
+
+ if (param->direction & QPNP_GPIO_DIR_OUT) {
+ q_spec->regs[Q_REG_I_OUTPUT_CTL2] = (param->inv_int_pol
+ << Q_REG_OUT_INVERT_SHIFT) & Q_REG_OUT_INVERT_MASK;
+ q_spec->regs[Q_REG_I_OUTPUT_CTL2] |= (param->src_select
+ << Q_REG_SRC_SEL_SHIFT) & Q_REG_SRC_SEL_MASK;
+ q_spec->regs[Q_REG_I_OUTPUT_CTL2] |= (1 <<
+ Q_REG_OUTPUT_EN_SHIFT) & Q_REG_OUTPUT_EN_MASK;
+ } else {
+ q_spec->regs[Q_REG_I_OUTPUT_CTL2] = 0;
+ }
+
+ q_spec->regs[Q_REG_I_EN_CTL1] = (param->master_en <<
+ Q_REG_MASTER_EN_SHIFT) & Q_REG_MASTER_EN_MASK;
+
+ rc = spmi_ext_register_writel(q_chip->spmi->ctrl, q_spec->slave,
+ Q_REG_ADDR(q_spec, Q_REG_IO_CTL1),
+ &q_spec->regs[Q_REG_I_IO_CTL1], Q_NUM_CTL_REGS);
+ if (rc)
+ dev_err(&q_chip->spmi->dev, "%s: unable to write master"
+ " enable\n", __func__);
+
+ return rc;
+}
+EXPORT_SYMBOL(qpnp_gpio_config);
+
+int qpnp_gpio_map_gpio(uint16_t slave_id, uint32_t pmic_gpio)
+{
+ struct qpnp_gpio_chip *q_chip;
+ struct qpnp_gpio_spec *q_spec = NULL;
+
+ mutex_lock(&qpnp_gpio_chips_lock);
+ list_for_each_entry(q_chip, &qpnp_gpio_chips, chip_list) {
+ if (q_chip->spmi->sid != slave_id)
+ continue;
+ if (q_chip->pmic_gpio_lowest <= pmic_gpio &&
+ q_chip->pmic_gpio_highest >= pmic_gpio) {
+ q_spec = qpnp_pmic_gpio_get_spec(q_chip, pmic_gpio);
+ mutex_unlock(&qpnp_gpio_chips_lock);
+ if (WARN_ON(!q_spec))
+ return -ENODEV;
+ return q_chip->gpio_chip.base + q_spec->gpio_chip_idx;
+ }
+ }
+ mutex_unlock(&qpnp_gpio_chips_lock);
+ return -EINVAL;
+}
+EXPORT_SYMBOL(qpnp_gpio_map_gpio);
+
+static int qpnp_gpio_to_irq(struct gpio_chip *gpio_chip, unsigned offset)
+{
+ struct qpnp_gpio_chip *q_chip = dev_get_drvdata(gpio_chip->dev);
+ struct qpnp_gpio_spec *q_spec;
+
+ q_spec = qpnp_chip_gpio_get_spec(q_chip, offset);
+ if (!q_spec)
+ return -EINVAL;
+
+ return q_spec->irq;
+}
+
+static int qpnp_gpio_get(struct gpio_chip *gpio_chip, unsigned offset)
+{
+ int rc, ret_val;
+ struct qpnp_gpio_chip *q_chip = dev_get_drvdata(gpio_chip->dev);
+ struct qpnp_gpio_spec *q_spec = NULL;
+ u8 buf[1];
+
+ if (WARN_ON(!q_chip))
+ return -ENODEV;
+
+ q_spec = qpnp_chip_gpio_get_spec(q_chip, offset);
+ if (WARN_ON(!q_spec))
+ return -ENODEV;
+
+ /* gpio val is from RT status iff input is enabled */
+ if (q_spec->regs[Q_REG_I_INPUT_CTL1] & Q_REG_INPUT_EN_MASK) {
+ /* INT_RT_STS */
+ rc = spmi_ext_register_readl(q_chip->spmi->ctrl, q_spec->slave,
+ Q_REG_ADDR(q_spec, Q_REG_STATUS1),
+ &buf[0], 1);
+ return buf[0];
+
+ } else {
+ ret_val = (q_spec->regs[Q_REG_I_OUTPUT_CTL2] &
+ Q_REG_OUT_INVERT_MASK) >> Q_REG_OUT_INVERT_SHIFT;
+ return ret_val;
+ }
+
+ return 0;
+}
+
+static int __qpnp_gpio_set(struct qpnp_gpio_chip *q_chip,
+ struct qpnp_gpio_spec *q_spec, int value)
+{
+ int rc;
+
+ if (!q_chip || !q_spec)
+ return -EINVAL;
+
+ q_spec->regs[Q_REG_I_OUTPUT_CTL2] &= ~(1 << Q_REG_OUT_INVERT_SHIFT);
+
+ if (value)
+ q_spec->regs[Q_REG_I_OUTPUT_CTL2] |=
+ (1 << Q_REG_OUT_INVERT_SHIFT);
+
+ rc = spmi_ext_register_writel(q_chip->spmi->ctrl, q_spec->slave,
+ Q_REG_ADDR(q_spec, Q_REG_OUTPUT_CTL2),
+ &q_spec->regs[Q_REG_I_OUTPUT_CTL2], 1);
+ if (rc)
+ dev_err(&q_chip->spmi->dev, "%s: spmi write failed\n",
+ __func__);
+ return rc;
+}
+
+
+static void qpnp_gpio_set(struct gpio_chip *gpio_chip,
+ unsigned offset, int value)
+{
+ struct qpnp_gpio_chip *q_chip = dev_get_drvdata(gpio_chip->dev);
+ struct qpnp_gpio_spec *q_spec;
+
+ if (WARN_ON(!q_chip))
+ return;
+
+ q_spec = qpnp_chip_gpio_get_spec(q_chip, offset);
+ if (WARN_ON(!q_spec))
+ return;
+
+ __qpnp_gpio_set(q_chip, q_spec, value);
+}
+
+static int qpnp_gpio_set_direction(struct qpnp_gpio_chip *q_chip,
+ struct qpnp_gpio_spec *q_spec, int direction)
+{
+ int rc;
+
+ if (!q_chip || !q_spec)
+ return -EINVAL;
+
+ if (direction & QPNP_GPIO_DIR_IN) {
+ q_spec->regs[Q_REG_I_INPUT_CTL1] |=
+ (1 << Q_REG_INPUT_EN_SHIFT);
+ q_spec->regs[Q_REG_I_OUTPUT_CTL2] &=
+ ~(1 << Q_REG_OUTPUT_EN_SHIFT);
+ } else {
+ q_spec->regs[Q_REG_I_INPUT_CTL1] &=
+ ~(1 << Q_REG_INPUT_EN_SHIFT);
+ q_spec->regs[Q_REG_I_OUTPUT_CTL2] |=
+ (1 << Q_REG_OUTPUT_EN_SHIFT);
+ }
+
+ rc = spmi_ext_register_writel(q_chip->spmi->ctrl, q_spec->slave,
+ Q_REG_ADDR(q_spec, Q_REG_INPUT_CTL1),
+ &q_spec->regs[Q_REG_I_INPUT_CTL1], 3);
+ return rc;
+}
+
+static int qpnp_gpio_direction_input(struct gpio_chip *gpio_chip,
+ unsigned offset)
+{
+ struct qpnp_gpio_chip *q_chip = dev_get_drvdata(gpio_chip->dev);
+ struct qpnp_gpio_spec *q_spec;
+
+ if (WARN_ON(!q_chip))
+ return -ENODEV;
+
+ q_spec = qpnp_chip_gpio_get_spec(q_chip, offset);
+ if (WARN_ON(!q_spec))
+ return -ENODEV;
+
+ return qpnp_gpio_set_direction(q_chip, q_spec, QPNP_GPIO_DIR_IN);
+}
+
+static int qpnp_gpio_direction_output(struct gpio_chip *gpio_chip,
+ unsigned offset,
+ int val)
+{
+ int rc;
+ struct qpnp_gpio_chip *q_chip = dev_get_drvdata(gpio_chip->dev);
+ struct qpnp_gpio_spec *q_spec;
+
+ if (WARN_ON(!q_chip))
+ return -ENODEV;
+
+ q_spec = qpnp_chip_gpio_get_spec(q_chip, offset);
+ if (WARN_ON(!q_spec))
+ return -ENODEV;
+
+ rc = __qpnp_gpio_set(q_chip, q_spec, val);
+ if (rc)
+ return rc;
+
+ rc = qpnp_gpio_set_direction(q_chip, q_spec, QPNP_GPIO_DIR_OUT);
+
+ return rc;
+}
+
+static int qpnp_gpio_of_gpio_xlate(struct gpio_chip *gpio_chip,
+ struct device_node *np,
+ const void *gpio_spec, u32 *flags)
+{
+ struct qpnp_gpio_chip *q_chip = dev_get_drvdata(gpio_chip->dev);
+ struct qpnp_gpio_spec *q_spec;
+ const __be32 *gpio = gpio_spec;
+ u32 n = be32_to_cpup(gpio);
+
+ if (WARN_ON(gpio_chip->of_gpio_n_cells < 2)) {
+ pr_err("%s: of_gpio_n_cells < 2\n", __func__);
+ return -EINVAL;
+ }
+
+ q_spec = qpnp_pmic_gpio_get_spec(q_chip, n);
+ if (!q_spec) {
+ pr_err("%s: no such PMIC gpio %u in device topology\n",
+ __func__, n);
+ return -EINVAL;
+ }
+
+ if (flags)
+ *flags = be32_to_cpu(gpio[1]);
+
+ return q_spec->gpio_chip_idx;
+}
+
+static int qpnp_gpio_config_default(struct spmi_device *spmi,
+ const __be32 *prop, int gpio)
+{
+ struct qpnp_gpio_cfg param;
+ int rc;
+
+ dev_dbg(&spmi->dev, "%s: p[0]: 0x%x p[1]: 0x%x p[2]: 0x%x p[3]:"
+ " 0x%x p[4]: 0x%x p[5]: 0x%x p[6]: 0x%x p[7]: 0x%x"
+ " p[8]: 0x%x\n", __func__,
+ be32_to_cpup(&prop[0]), be32_to_cpup(&prop[1]),
+ be32_to_cpup(&prop[2]), be32_to_cpup(&prop[3]),
+ be32_to_cpup(&prop[4]), be32_to_cpup(&prop[5]),
+ be32_to_cpup(&prop[6]), be32_to_cpup(&prop[7]),
+ be32_to_cpup(&prop[8]));
+
+ param.direction = be32_to_cpup(&prop[0]);
+ param.output_type = be32_to_cpup(&prop[1]);
+ param.output_value = be32_to_cpup(&prop[2]);
+ param.pull = be32_to_cpup(&prop[3]);
+ param.vin_sel = be32_to_cpup(&prop[4]);
+ param.out_strength = be32_to_cpup(&prop[5]);
+ param.src_select = be32_to_cpup(&prop[6]);
+ param.inv_int_pol = be32_to_cpup(&prop[7]);
+ param.master_en = be32_to_cpup(&prop[8]);
+
+ rc = qpnp_gpio_config(gpio, ¶m);
+ if (rc)
+ dev_err(&spmi->dev, "%s: unable to set default config for"
+ " gpio %d\n", __func__, gpio);
+ return rc;
+}
+
+static int qpnp_gpio_free_chip(struct qpnp_gpio_chip *q_chip)
+{
+ struct spmi_device *spmi = q_chip->spmi;
+ int rc, i;
+
+ if (q_chip->chip_gpios)
+ for (i = 0; i < spmi->num_dev_node; i++)
+ kfree(q_chip->chip_gpios[i]);
+
+ mutex_lock(&qpnp_gpio_chips_lock);
+ list_del(&q_chip->chip_list);
+ mutex_unlock(&qpnp_gpio_chips_lock);
+ rc = gpiochip_remove(&q_chip->gpio_chip);
+ if (rc)
+ dev_err(&q_chip->spmi->dev, "%s: unable to remove gpio\n",
+ __func__);
+ kfree(q_chip->chip_gpios);
+ kfree(q_chip->pmic_gpios);
+ kfree(q_chip);
+ return rc;
+}
+
+static int qpnp_gpio_probe(struct spmi_device *spmi)
+{
+ struct qpnp_gpio_chip *q_chip;
+ struct resource *res;
+ struct qpnp_gpio_spec *q_spec;
+ const __be32 *prop;
+ int i, rc, ret, gpio, len;
+ int lowest_gpio = INT_MAX, highest_gpio = INT_MIN;
+ u32 intspec[3];
+
+ q_chip = kzalloc(sizeof(*q_chip), GFP_KERNEL);
+ if (!q_chip) {
+ dev_err(&spmi->dev, "%s: Can't allocate gpio_chip\n",
+ __func__);
+ return -ENOMEM;
+ }
+ q_chip->spmi = spmi;
+ dev_set_drvdata(&spmi->dev, q_chip);
+
+ mutex_lock(&qpnp_gpio_chips_lock);
+ list_add(&q_chip->chip_list, &qpnp_gpio_chips);
+ mutex_unlock(&qpnp_gpio_chips_lock);
+
+ /* first scan through nodes to find the range required for allocation */
+ for (i = 0; i < spmi->num_dev_node; i++) {
+ prop = of_get_property(spmi->dev_node[i].of_node,
+ "qcom,qpnp-gpio-num", &len);
+ if (!prop) {
+ dev_err(&spmi->dev, "%s: unable to get"
+ " qcom,qpnp-gpio-num property\n", __func__);
+ ret = -EINVAL;
+ goto err_probe;
+ } else if (len != sizeof(__be32)) {
+ dev_err(&spmi->dev, "%s: Invalid qcom,qpnp-gpio-num"
+ " property\n", __func__);
+ ret = -EINVAL;
+ goto err_probe;
+ }
+
+ gpio = be32_to_cpup(prop);
+ if (gpio < lowest_gpio)
+ lowest_gpio = gpio;
+ if (gpio > highest_gpio)
+ highest_gpio = gpio;
+ }
+
+ if (highest_gpio < lowest_gpio) {
+ dev_err(&spmi->dev, "%s: no device nodes specified in"
+ " topology\n", __func__);
+ ret = -EINVAL;
+ goto err_probe;
+ } else if (lowest_gpio == 0) {
+ dev_err(&spmi->dev, "%s: 0 is not a valid PMIC GPIO\n",
+ __func__);
+ ret = -EINVAL;
+ goto err_probe;
+ }
+
+ q_chip->pmic_gpio_lowest = lowest_gpio;
+ q_chip->pmic_gpio_highest = highest_gpio;
+
+ /* allocate gpio lookup tables */
+ q_chip->pmic_gpios = kzalloc(sizeof(struct qpnp_gpio_spec *) *
+ highest_gpio - lowest_gpio + 1,
+ GFP_KERNEL);
+ q_chip->chip_gpios = kzalloc(sizeof(struct qpnp_gpio_spec *) *
+ spmi->num_dev_node, GFP_KERNEL);
+ if (!q_chip->pmic_gpios || !q_chip->chip_gpios) {
+ dev_err(&spmi->dev, "%s: unable to allocate memory\n",
+ __func__);
+ ret = -ENOMEM;
+ goto err_probe;
+ }
+
+ /* get interrupt controller device_node */
+ q_chip->int_ctrl = of_irq_find_parent(spmi->dev.of_node);
+ if (!q_chip->int_ctrl) {
+ dev_err(&spmi->dev, "%s: Can't find interrupt parent\n",
+ __func__);
+ ret = -EINVAL;
+ goto err_probe;
+ }
+
+ /* now scan through again and populate the lookup table */
+ for (i = 0; i < spmi->num_dev_node; i++) {
+ res = qpnp_get_resource(spmi, i, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(&spmi->dev, "%s: node %s is missing has no"
+ " base address definition\n",
+ __func__, spmi->dev_node[i].of_node->full_name);
+ }
+
+ prop = of_get_property(spmi->dev_node[i].of_node,
+ "qcom,qpnp-gpio-num", &len);
+ if (!prop) {
+ dev_err(&spmi->dev, "%s: unable to get"
+ " qcom,qpnp-gpio-num property\n", __func__);
+ ret = -EINVAL;
+ goto err_probe;
+ } else if (len != sizeof(__be32)) {
+ dev_err(&spmi->dev, "%s: Invalid qcom,qpnp-gpio-num"
+ " property\n", __func__);
+ ret = -EINVAL;
+ goto err_probe;
+ }
+ gpio = be32_to_cpup(prop);
+
+ q_spec = kzalloc(sizeof(struct qpnp_gpio_spec),
+ GFP_KERNEL);
+ if (!q_spec) {
+ dev_err(&spmi->dev, "%s: unable to allocate"
+ " memory\n",
+ __func__);
+ ret = -ENOMEM;
+ goto err_probe;
+ }
+
+ q_spec->slave = spmi->sid;
+ q_spec->offset = res->start;
+ q_spec->gpio_chip_idx = i;
+
+ /* call into irq_domain to get irq mapping */
+ intspec[0] = q_chip->spmi->sid;
+ intspec[1] = (q_spec->offset >> 8) & 0xFF;
+ intspec[2] = 0;
+ q_spec->irq = irq_create_of_mapping(q_chip->int_ctrl,
+ intspec, 3);
+ if (!q_spec->irq) {
+ dev_err(&spmi->dev, "%s: invalid irq for gpio"
+ " %u\n", __func__, gpio);
+ ret = -EINVAL;
+ goto err_probe;
+ }
+ /* initialize lookup table entries */
+ qpnp_pmic_gpio_set_spec(q_chip, gpio, q_spec);
+ qpnp_chip_gpio_set_spec(q_chip, i, q_spec);
+ }
+
+ q_chip->gpio_chip.base = -1;
+ q_chip->gpio_chip.ngpio = spmi->num_dev_node;
+ q_chip->gpio_chip.label = "qpnp-gpio";
+ q_chip->gpio_chip.direction_input = qpnp_gpio_direction_input;
+ q_chip->gpio_chip.direction_output = qpnp_gpio_direction_output;
+ q_chip->gpio_chip.to_irq = qpnp_gpio_to_irq;
+ q_chip->gpio_chip.get = qpnp_gpio_get;
+ q_chip->gpio_chip.set = qpnp_gpio_set;
+ q_chip->gpio_chip.dev = &spmi->dev;
+ q_chip->gpio_chip.of_xlate = qpnp_gpio_of_gpio_xlate;
+ q_chip->gpio_chip.of_gpio_n_cells = 2;
+ q_chip->gpio_chip.can_sleep = 0;
+
+ rc = gpiochip_add(&q_chip->gpio_chip);
+ if (rc) {
+ dev_err(&spmi->dev, "%s: Can't add gpio chip, rc = %d\n",
+ __func__, rc);
+ ret = rc;
+ goto err_probe;
+ }
+
+ /* now configure gpio defaults if they exist */
+ for (i = 0; i < spmi->num_dev_node; i++) {
+ q_spec = qpnp_chip_gpio_get_spec(q_chip, i);
+ if (WARN_ON(!q_spec))
+ return -ENODEV;
+
+ /* It's not an error to not config a default */
+ prop = of_get_property(spmi->dev_node[i].of_node,
+ "qcom,qpnp-gpio-cfg", &len);
+ /* 9 data values constitute one tuple */
+ if (prop && (len != (9 * sizeof(__be32)))) {
+ dev_err(&spmi->dev, "%s: invalid format for"
+ " qcom,qpnp-gpio-cfg property\n",
+ __func__);
+ ret = -EINVAL;
+ goto err_probe;
+ } else if (prop) {
+ rc = qpnp_gpio_config_default(spmi, prop,
+ q_chip->gpio_chip.base + i);
+ if (rc) {
+ ret = rc;
+ goto err_probe;
+ }
+ } else {
+ /* initialize with hardware defaults */
+ rc = spmi_ext_register_readl(
+ q_chip->spmi->ctrl, q_spec->slave,
+ Q_REG_ADDR(q_spec, Q_REG_IO_CTL1),
+ &q_spec->regs[Q_REG_I_IO_CTL1],
+ Q_NUM_CTL_REGS);
+ q_spec->regs[Q_REG_I_EN_CTL1] |=
+ (1 << Q_REG_MASTER_EN_SHIFT);
+ rc = spmi_ext_register_writel(
+ q_chip->spmi->ctrl, q_spec->slave,
+ Q_REG_ADDR(q_spec, Q_REG_EN_CTL1),
+ &q_spec->regs[Q_REG_EN_CTL1], 1);
+ if (rc) {
+ dev_err(&spmi->dev, "%s: spmi write"
+ " failed\n", __func__);
+ ret = rc;
+ goto err_probe;
+ }
+ }
+ }
+
+ dev_dbg(&spmi->dev, "%s: gpio_chip registered between %d-%u\n",
+ __func__, q_chip->gpio_chip.base,
+ (q_chip->gpio_chip.base + q_chip->gpio_chip.ngpio) - 1);
+ return 0;
+
+err_probe:
+ qpnp_gpio_free_chip(q_chip);
+ return ret;
+}
+
+static int qpnp_gpio_remove(struct spmi_device *spmi)
+{
+ struct qpnp_gpio_chip *q_chip = dev_get_drvdata(&spmi->dev);
+
+ return qpnp_gpio_free_chip(q_chip);
+}
+
+static struct of_device_id spmi_match_table[] = {
+ { .compatible = "qcom,qpnp-gpio",
+ },
+ {}
+};
+
+static const struct spmi_device_id qpnp_gpio_id[] = {
+ { "qcom,qpnp-gpio", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(spmi, qpnp_gpio_id);
+
+static struct spmi_driver qpnp_gpio_driver = {
+ .driver = {
+ .name = "qcom,qpnp-gpio",
+ .of_match_table = spmi_match_table,
+ },
+ .probe = qpnp_gpio_probe,
+ .remove = qpnp_gpio_remove,
+ .id_table = qpnp_gpio_id,
+};
+
+static int __init qpnp_gpio_init(void)
+{
+ return spmi_driver_register(&qpnp_gpio_driver);
+}
+
+static void __exit qpnp_gpio_exit(void)
+{
+}
+
+MODULE_AUTHOR(
+ "Michael Bohan <mbohan@codeaurora.org>");
+MODULE_DESCRIPTION("QPNP PMIC gpio driver");
+MODULE_LICENSE("GPLv2");
+
+module_init(qpnp_gpio_init);
+module_exit(qpnp_gpio_exit);
diff --git a/drivers/gpu/ion/ion.c b/drivers/gpu/ion/ion.c
index a6c36c8..0cec423 100644
--- a/drivers/gpu/ion/ion.c
+++ b/drivers/gpu/ion/ion.c
@@ -107,6 +107,8 @@
unsigned int iommu_map_cnt;
};
+static void ion_iommu_release(struct kref *kref);
+
static int ion_validate_buffer_flags(struct ion_buffer *buffer,
unsigned long flags)
{
@@ -235,11 +237,44 @@
return buffer;
}
+/**
+ * Check for delayed IOMMU unmapping. Also unmap any outstanding
+ * mappings which would otherwise have been leaked.
+ */
+static void ion_iommu_delayed_unmap(struct ion_buffer *buffer)
+{
+ struct ion_iommu_map *iommu_map;
+ struct rb_node *node;
+ const struct rb_root *rb = &(buffer->iommu_maps);
+ unsigned long ref_count;
+ unsigned int delayed_unmap;
+
+ mutex_lock(&buffer->lock);
+
+ while ((node = rb_first(rb)) != 0) {
+ iommu_map = rb_entry(node, struct ion_iommu_map, node);
+ ref_count = atomic_read(&iommu_map->ref.refcount);
+ delayed_unmap = iommu_map->flags & ION_IOMMU_UNMAP_DELAYED;
+
+ if ((delayed_unmap && ref_count > 1) || !delayed_unmap) {
+ pr_err("%s: Virtual memory address leak in domain %u, partition %u\n",
+ __func__, iommu_map->domain_info[DI_DOMAIN_NUM],
+ iommu_map->domain_info[DI_PARTITION_NUM]);
+ }
+ /* set ref count to 1 to force release */
+ kref_init(&iommu_map->ref);
+ kref_put(&iommu_map->ref, ion_iommu_release);
+ }
+
+ mutex_unlock(&buffer->lock);
+}
+
static void ion_buffer_destroy(struct kref *kref)
{
struct ion_buffer *buffer = container_of(kref, struct ion_buffer, ref);
struct ion_device *dev = buffer->dev;
+ ion_iommu_delayed_unmap(buffer);
buffer->heap->ops->free(buffer);
mutex_lock(&dev->lock);
rb_erase(&buffer->node, &dev->buffers);
@@ -562,7 +597,7 @@
}
EXPORT_SYMBOL(ion_map_kernel);
-static int __ion_iommu_map(struct ion_buffer *buffer,
+static struct ion_iommu_map *__ion_iommu_map(struct ion_buffer *buffer,
int domain_num, int partition_num, unsigned long align,
unsigned long iova_length, unsigned long flags,
unsigned long *iova)
@@ -573,7 +608,7 @@
data = kmalloc(sizeof(*data), GFP_ATOMIC);
if (!data)
- return -ENOMEM;
+ return ERR_PTR(-ENOMEM);
data->buffer = buffer;
iommu_map_domain(data) = domain_num;
@@ -594,25 +629,30 @@
ion_iommu_add(buffer, data);
- return 0;
+ return data;
out:
msm_free_iova_address(data->iova_addr, domain_num, partition_num,
buffer->size);
kfree(data);
- return ret;
+ return ERR_PTR(ret);
}
int ion_map_iommu(struct ion_client *client, struct ion_handle *handle,
int domain_num, int partition_num, unsigned long align,
unsigned long iova_length, unsigned long *iova,
unsigned long *buffer_size,
- unsigned long flags)
+ unsigned long flags, unsigned long iommu_flags)
{
struct ion_buffer *buffer;
struct ion_iommu_map *iommu_map;
int ret = 0;
+ if (ION_IS_CACHED(flags)) {
+ pr_err("%s: Cannot map iommu as cached.\n", __func__);
+ return -EINVAL;
+ }
+
mutex_lock(&client->lock);
if (!ion_handle_validate(client, handle)) {
pr_err("%s: invalid handle passed to map_kernel.\n",
@@ -631,11 +671,6 @@
goto out;
}
- if (ion_validate_buffer_flags(buffer, flags)) {
- ret = -EEXIST;
- goto out;
- }
-
/*
* If clients don't want a custom iova length, just use whatever
* the buffer size is
@@ -665,17 +700,30 @@
}
iommu_map = ion_iommu_lookup(buffer, domain_num, partition_num);
- if (_ion_map(&buffer->iommu_map_cnt, &handle->iommu_map_cnt) ||
- !iommu_map) {
- ret = __ion_iommu_map(buffer, domain_num, partition_num, align,
- iova_length, flags, iova);
- if (ret < 0)
+ _ion_map(&buffer->iommu_map_cnt, &handle->iommu_map_cnt);
+ if (!iommu_map) {
+ iommu_map = __ion_iommu_map(buffer, domain_num, partition_num,
+ align, iova_length, flags, iova);
+ if (IS_ERR_OR_NULL(iommu_map)) {
_ion_unmap(&buffer->iommu_map_cnt,
&handle->iommu_map_cnt);
+ } else {
+ iommu_map->flags = iommu_flags;
+
+ if (iommu_map->flags & ION_IOMMU_UNMAP_DELAYED)
+ kref_get(&iommu_map->ref);
+ }
} else {
- if (iommu_map->mapped_size != iova_length) {
+ if (iommu_map->flags != iommu_flags) {
+ pr_err("%s: handle %p is already mapped with iommu flags %lx, trying to map with flags %lx\n",
+ __func__, handle,
+ iommu_map->flags, iommu_flags);
+ _ion_unmap(&buffer->iommu_map_cnt,
+ &handle->iommu_map_cnt);
+ ret = -EINVAL;
+ } else if (iommu_map->mapped_size != iova_length) {
pr_err("%s: handle %p is already mapped with length"
- " %x, trying to map with length %lx\n",
+ " %x, trying to map with length %lx\n",
__func__, handle, iommu_map->mapped_size,
iova_length);
_ion_unmap(&buffer->iommu_map_cnt,
@@ -882,7 +930,7 @@
return ret;
}
-static int ion_do_cache_op(struct ion_client *client, struct ion_handle *handle,
+int ion_do_cache_op(struct ion_client *client, struct ion_handle *handle,
void *uaddr, unsigned long offset, unsigned long len,
unsigned int cmd)
{
diff --git a/drivers/gpu/ion/ion_carveout_heap.c b/drivers/gpu/ion/ion_carveout_heap.c
index ad0c7b1..347ab88 100644
--- a/drivers/gpu/ion/ion_carveout_heap.c
+++ b/drivers/gpu/ion/ion_carveout_heap.c
@@ -206,16 +206,13 @@
if (ion_carveout_request_region(carveout_heap))
return -EINVAL;
- if (ION_IS_CACHED(flags))
- ret_value = remap_pfn_range(vma, vma->vm_start,
- __phys_to_pfn(buffer->priv_phys) + vma->vm_pgoff,
- vma->vm_end - vma->vm_start,
- vma->vm_page_prot);
- else
- ret_value = remap_pfn_range(vma, vma->vm_start,
- __phys_to_pfn(buffer->priv_phys) + vma->vm_pgoff,
- vma->vm_end - vma->vm_start,
- pgprot_noncached(vma->vm_page_prot));
+ if (!ION_IS_CACHED(flags))
+ vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
+
+ ret_value = remap_pfn_range(vma, vma->vm_start,
+ __phys_to_pfn(buffer->priv_phys) + vma->vm_pgoff,
+ vma->vm_end - vma->vm_start,
+ vma->vm_page_prot);
if (ret_value)
ion_carveout_release_region(carveout_heap);
diff --git a/drivers/gpu/ion/ion_cp_heap.c b/drivers/gpu/ion/ion_cp_heap.c
index a6b0cf6..ff561dc 100644
--- a/drivers/gpu/ion/ion_cp_heap.c
+++ b/drivers/gpu/ion/ion_cp_heap.c
@@ -450,18 +450,14 @@
return -EINVAL;
}
- if (ION_IS_CACHED(flags))
- ret_value = remap_pfn_range(vma, vma->vm_start,
- __phys_to_pfn(buffer->priv_phys) +
- vma->vm_pgoff,
- vma->vm_end - vma->vm_start,
- vma->vm_page_prot);
- else
- ret_value = remap_pfn_range(vma, vma->vm_start,
- __phys_to_pfn(buffer->priv_phys) +
- vma->vm_pgoff,
- vma->vm_end - vma->vm_start,
- pgprot_noncached(vma->vm_page_prot));
+ if (!ION_IS_CACHED(flags))
+ vma->vm_page_prot = pgprot_writecombine(
+ vma->vm_page_prot);
+
+ ret_value = remap_pfn_range(vma, vma->vm_start,
+ __phys_to_pfn(buffer->priv_phys) + vma->vm_pgoff,
+ vma->vm_end - vma->vm_start,
+ vma->vm_page_prot);
if (ret_value)
ion_cp_release_region(cp_heap);
diff --git a/drivers/gpu/ion/ion_iommu_heap.c b/drivers/gpu/ion/ion_iommu_heap.c
index d37a811..e754496 100644
--- a/drivers/gpu/ion/ion_iommu_heap.c
+++ b/drivers/gpu/ion/ion_iommu_heap.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -131,22 +131,24 @@
{
struct ion_iommu_priv_data *data = buffer->priv_virt;
int i;
-
+ unsigned long curr_addr;
if (!data)
return -EINVAL;
if (!ION_IS_CACHED(flags))
- vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+ vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
- for (i = 0; i < data->nrpages; i++)
- if (vm_insert_page(vma, vma->vm_start + i * PAGE_SIZE,
- data->pages[i]))
+ curr_addr = vma->vm_start;
+ for (i = 0; i < data->nrpages && curr_addr < vma->vm_end; i++) {
+ if (vm_insert_page(vma, curr_addr, data->pages[i])) {
/*
* This will fail the mmap which will
* clean up the vma space properly.
*/
return -EINVAL;
-
+ }
+ curr_addr += PAGE_SIZE;
+ }
return 0;
}
@@ -253,6 +255,69 @@
return;
}
+static int ion_iommu_cache_ops(struct ion_heap *heap, struct ion_buffer *buffer,
+ void *vaddr, unsigned int offset, unsigned int length,
+ unsigned int cmd)
+{
+ unsigned long vstart, pstart;
+ void (*op)(unsigned long, unsigned long, unsigned long);
+ unsigned int i;
+ struct ion_iommu_priv_data *data = buffer->priv_virt;
+
+ if (!data)
+ return -ENOMEM;
+
+ switch (cmd) {
+ case ION_IOC_CLEAN_CACHES:
+ op = clean_caches;
+ break;
+ case ION_IOC_INV_CACHES:
+ op = invalidate_caches;
+ break;
+ case ION_IOC_CLEAN_INV_CACHES:
+ op = clean_and_invalidate_caches;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ vstart = (unsigned long) vaddr;
+ for (i = 0; i < data->nrpages; ++i, vstart += PAGE_SIZE) {
+ pstart = page_to_phys(data->pages[i]);
+ op(vstart, PAGE_SIZE, pstart);
+ }
+
+ return 0;
+}
+
+static struct scatterlist *ion_iommu_heap_map_dma(struct ion_heap *heap,
+ struct ion_buffer *buffer)
+{
+ struct scatterlist *sglist = NULL;
+ if (buffer->priv_virt) {
+ struct ion_iommu_priv_data *data = buffer->priv_virt;
+ unsigned int i;
+
+ if (!data->nrpages)
+ return NULL;
+
+ sglist = vmalloc(sizeof(*sglist) * data->nrpages);
+ if (!sglist)
+ return ERR_PTR(-ENOMEM);
+
+ sg_init_table(sglist, data->nrpages);
+ for (i = 0; i < data->nrpages; ++i)
+ sg_set_page(&sglist[i], data->pages[i], PAGE_SIZE, 0);
+ }
+ return sglist;
+}
+
+static void ion_iommu_heap_unmap_dma(struct ion_heap *heap,
+ struct ion_buffer *buffer)
+{
+ if (buffer->sglist)
+ vfree(buffer->sglist);
+}
static struct ion_heap_ops iommu_heap_ops = {
.allocate = ion_iommu_heap_allocate,
@@ -262,6 +327,9 @@
.unmap_kernel = ion_iommu_heap_unmap_kernel,
.map_iommu = ion_iommu_heap_map_iommu,
.unmap_iommu = ion_iommu_heap_unmap_iommu,
+ .cache_op = ion_iommu_cache_ops,
+ .map_dma = ion_iommu_heap_map_dma,
+ .unmap_dma = ion_iommu_heap_unmap_dma,
};
struct ion_heap *ion_iommu_heap_create(struct ion_platform_heap *heap_data)
diff --git a/drivers/gpu/ion/ion_priv.h b/drivers/gpu/ion/ion_priv.h
index 1d40aef..98e11cf 100644
--- a/drivers/gpu/ion/ion_priv.h
+++ b/drivers/gpu/ion/ion_priv.h
@@ -37,6 +37,12 @@
void *vaddr;
};
+enum {
+ DI_PARTITION_NUM = 0,
+ DI_DOMAIN_NUM = 1,
+ DI_MAX,
+};
+
/**
* struct ion_iommu_map - represents a mapping of an ion buffer to an iommu
* @iova_addr - iommu virtual address
@@ -47,6 +53,7 @@
* @ref - for reference counting this mapping
* @mapped_size - size of the iova space mapped
* (may not be the same as the buffer size)
+ * @flags - iommu domain/partition specific flags.
*
* Represents a mapping of one ion buffer to a particular iommu domain
* and address range. There may exist other mappings of this buffer in
@@ -57,12 +64,13 @@
unsigned long iova_addr;
struct rb_node node;
union {
- int domain_info[2];
+ int domain_info[DI_MAX];
uint64_t key;
};
struct ion_buffer *buffer;
struct kref ref;
int mapped_size;
+ unsigned long flags;
};
struct ion_buffer *ion_handle_buffer(struct ion_handle *handle);
@@ -271,4 +279,23 @@
void *ion_map_fmem_buffer(struct ion_buffer *buffer, unsigned long phys_base,
void *virt_base, unsigned long flags);
+/**
+ * ion_do_cache_op - do cache operations.
+ *
+ * @client - pointer to ION client.
+ * @handle - pointer to buffer handle.
+ * @uaddr - virtual address to operate on.
+ * @offset - offset from physical address.
+ * @len - Length of data to do cache operation on.
+ * @cmd - Cache operation to perform:
+ * ION_IOC_CLEAN_CACHES
+ * ION_IOC_INV_CACHES
+ * ION_IOC_CLEAN_INV_CACHES
+ *
+ * Returns 0 on success
+ */
+int ion_do_cache_op(struct ion_client *client, struct ion_handle *handle,
+ void *uaddr, unsigned long offset, unsigned long len,
+ unsigned int cmd);
+
#endif /* _ION_PRIV_H */
diff --git a/drivers/gpu/ion/msm/msm_ion.c b/drivers/gpu/ion/msm/msm_ion.c
index a81dbd3..203b41a 100644
--- a/drivers/gpu/ion/msm/msm_ion.c
+++ b/drivers/gpu/ion/msm/msm_ion.c
@@ -43,6 +43,13 @@
}
EXPORT_SYMBOL(msm_ion_unsecure_heap);
+int msm_ion_do_cache_op(struct ion_client *client, struct ion_handle *handle,
+ void *vaddr, unsigned long len, unsigned int cmd)
+{
+ return ion_do_cache_op(client, handle, vaddr, 0, len, cmd);
+}
+EXPORT_SYMBOL(msm_ion_do_cache_op);
+
static unsigned long msm_ion_get_base(unsigned long size, int memory_type,
unsigned int align)
{
diff --git a/drivers/gpu/msm/a3xx_reg.h b/drivers/gpu/msm/a3xx_reg.h
index 1806886..7e684c0 100644
--- a/drivers/gpu/msm/a3xx_reg.h
+++ b/drivers/gpu/msm/a3xx_reg.h
@@ -229,6 +229,19 @@
#define A3XX_VBIF_FIXED_SORT_EN 0x300C
#define A3XX_VBIF_FIXED_SORT_SEL0 0x300D
#define A3XX_VBIF_FIXED_SORT_SEL1 0x300E
+#define A3XX_VBIF_ABIT_SORT 0x301C
+#define A3XX_VBIF_ABIT_SORT_CONF 0x301D
+#define A3XX_VBIF_GATE_OFF_WRREQ_EN 0x302A
+#define A3XX_VBIF_IN_RD_LIM_CONF0 0x302C
+#define A3XX_VBIF_IN_RD_LIM_CONF1 0x302D
+#define A3XX_VBIF_IN_WR_LIM_CONF0 0x3030
+#define A3XX_VBIF_IN_WR_LIM_CONF1 0x3031
+#define A3XX_VBIF_OUT_RD_LIM_CONF0 0x3034
+#define A3XX_VBIF_OUT_WR_LIM_CONF0 0x3035
+#define A3XX_VBIF_DDR_OUT_MAX_BURST 0x3036
+#define A3XX_VBIF_ARB_CTL 0x303C
+#define A3XX_VBIF_OUT_AXI_AOOO_EN 0x305E
+#define A3XX_VBIF_OUT_AXI_AOOO 0x305F
/* Bit flags for RBBM_CTL */
#define RBBM_RBBM_CTL_RESET_PWR_CTR1 (1 << 1)
diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c
index 73d00b3..eb017de 100644
--- a/drivers/gpu/msm/adreno.c
+++ b/drivers/gpu/msm/adreno.c
@@ -136,6 +136,9 @@
{ ADRENO_REV_A200, 0, 2, ANY_ID, ANY_ID,
"yamato_pm4.fw", "yamato_pfp.fw", &adreno_a2xx_gpudev,
512, 384, 3},
+ { ADRENO_REV_A203, 0, 1, 1, ANY_ID,
+ "yamato_pm4.fw", "yamato_pfp.fw", &adreno_a2xx_gpudev,
+ 512, 384, 3},
{ ADRENO_REV_A205, 0, 1, 0, ANY_ID,
"yamato_pm4.fw", "yamato_pfp.fw", &adreno_a2xx_gpudev,
512, 384, 3},
@@ -400,11 +403,14 @@
/* 8x50 returns 0 for patch release, but it should be 1 */
/* 8960v3 returns 5 for patch release, but it should be 6 */
+ /* 8x25 returns 0 for minor id, but it should be 1 */
if (cpu_is_qsd8x50())
patchid = 1;
else if (cpu_is_msm8960() &&
SOCINFO_VERSION_MAJOR(soc_platform_version) == 3)
patchid = 6;
+ else if (cpu_is_msm8625() && minorid == 0)
+ minorid = 1;
chipid |= (minorid << 8) | patchid;
@@ -414,7 +420,7 @@
static unsigned int
adreno_getchipid(struct kgsl_device *device)
{
- if (cpu_is_apq8064())
+ if (cpu_is_apq8064() || cpu_is_msm8930())
return a3xx_getchipid(device);
else
return a2xx_getchipid(device);
@@ -604,6 +610,8 @@
unsigned int soptimestamp;
unsigned int eoptimestamp;
struct adreno_context *drawctxt;
+ struct kgsl_context *context;
+ int next = 0;
KGSL_DRV_ERR(device, "Starting recovery from 3D GPU hang....\n");
rb_buffer = vmalloc(rb->buffer_desc.size);
@@ -672,6 +680,24 @@
drawctxt->flags |= CTXT_FLAGS_GPU_HANG;
+ /*
+ * Set the reset status of all contexts to
+ * INNOCENT_CONTEXT_RESET_EXT except for the bad context
+ * since thats the guilty party
+ */
+ while ((context = idr_get_next(&device->context_idr, &next))) {
+ if (KGSL_CTX_STAT_GUILTY_CONTEXT_RESET_EXT !=
+ context->reset_status) {
+ if (context->devctxt != drawctxt)
+ context->reset_status =
+ KGSL_CTX_STAT_INNOCENT_CONTEXT_RESET_EXT;
+ else
+ context->reset_status =
+ KGSL_CTX_STAT_GUILTY_CONTEXT_RESET_EXT;
+ }
+ next = next + 1;
+ }
+
/* Restore valid commands in ringbuffer */
adreno_ringbuffer_restore(rb, rb_buffer, num_rb_contents);
rb->timestamp = timestamp;
@@ -967,8 +993,7 @@
if (!kgsl_mmu_pt_equal(priv->pagetable, pt_base))
continue;
spin_lock(&priv->mem_lock);
- entry = kgsl_sharedmem_find_region(priv, gpuaddr,
- sizeof(unsigned int));
+ entry = kgsl_sharedmem_find_region(priv, gpuaddr, size);
if (entry) {
result = &entry->memdesc;
spin_unlock(&priv->mem_lock);
@@ -1248,7 +1273,7 @@
default:
KGSL_DRV_INFO(dev_priv->device,
"invalid ioctl code %08x\n", cmd);
- result = -EINVAL;
+ result = -ENOIOCTLCMD;
break;
}
return result;
diff --git a/drivers/gpu/msm/adreno.h b/drivers/gpu/msm/adreno.h
index 9498b80..74f36c3 100644
--- a/drivers/gpu/msm/adreno.h
+++ b/drivers/gpu/msm/adreno.h
@@ -44,6 +44,7 @@
enum adreno_gpurev {
ADRENO_REV_UNKNOWN = 0,
ADRENO_REV_A200 = 200,
+ ADRENO_REV_A203 = 203,
ADRENO_REV_A205 = 205,
ADRENO_REV_A220 = 220,
ADRENO_REV_A225 = 225,
@@ -129,15 +130,19 @@
return (adreno_dev->gpurev == ADRENO_REV_A200);
}
+static inline int adreno_is_a203(struct adreno_device *adreno_dev)
+{
+ return (adreno_dev->gpurev == ADRENO_REV_A203);
+}
+
static inline int adreno_is_a205(struct adreno_device *adreno_dev)
{
- return (adreno_dev->gpurev == ADRENO_REV_A200);
+ return (adreno_dev->gpurev == ADRENO_REV_A205);
}
static inline int adreno_is_a20x(struct adreno_device *adreno_dev)
{
- return (adreno_dev->gpurev == ADRENO_REV_A200 ||
- adreno_dev->gpurev == ADRENO_REV_A205);
+ return (adreno_dev->gpurev <= 209);
}
static inline int adreno_is_a220(struct adreno_device *adreno_dev)
diff --git a/drivers/gpu/msm/adreno_a3xx.c b/drivers/gpu/msm/adreno_a3xx.c
index f68bc41..24e8efe 100644
--- a/drivers/gpu/msm/adreno_a3xx.c
+++ b/drivers/gpu/msm/adreno_a3xx.c
@@ -59,7 +59,9 @@
0x2640, 0x267e, 0x2680, 0x268b, 0x26c0, 0x26c0, 0x26c4, 0x26ce,
0x26d0, 0x26d8, 0x26df, 0x26e6, 0x26e8, 0x26e9, 0x26ec, 0x26ec,
0x26f0, 0x26f7, 0x26ff, 0x26ff, 0x2740, 0x2743, 0x2748, 0x2749,
- 0x2750, 0x2756, 0x2760, 0x2760,
+ 0x2750, 0x2756, 0x2760, 0x2760, 0x300C, 0x300E, 0x301C, 0x301D,
+ 0x302A, 0x302A, 0x302C, 0x302D, 0x3030, 0x3031, 0x3034, 0x3036,
+ 0x303C, 0x303C, 0x305E, 0x305F,
};
const unsigned int a3xx_registers_count = ARRAY_SIZE(a3xx_registers) / 2;
@@ -130,7 +132,7 @@
/* Use shadow RAM */
#define HLSQ_SHADOW_BASE (0x10000+SSIZE*2)
-#define REG_TO_MEM_LOOP_COUNT_SHIFT 15
+#define REG_TO_MEM_LOOP_COUNT_SHIFT 18
#define BUILD_PC_DRAW_INITIATOR(prim_type, source_select, index_size, \
vis_cull_mode) \
@@ -1109,11 +1111,13 @@
/* Constant save */
cmd = rmw_regtomem(cmd, A3XX_SP_VS_CTRL_REG1, 0x000003ff,
- 17, (HLSQ_SHADOW_BASE + 0x2000) / 4,
+ 2 + REG_TO_MEM_LOOP_COUNT_SHIFT,
+ (HLSQ_SHADOW_BASE + 0x2000) / 4,
drawctxt->constant_save_commands[1].gpuaddr);
cmd = rmw_regtomem(cmd, A3XX_SP_FS_CTRL_REG1, 0x000003ff,
- 17, (HLSQ_SHADOW_BASE + 0x2000 + SSIZE) / 4,
+ 2 + REG_TO_MEM_LOOP_COUNT_SHIFT,
+ (HLSQ_SHADOW_BASE + 0x2000 + SSIZE) / 4,
drawctxt->constant_save_commands[2].gpuaddr);
cmd = rmw_regtomem(cmd, A3XX_SP_FS_OBJ_OFFSET_REG, 0x00ff0000,
@@ -2546,14 +2550,29 @@
0x00000001);
msleep(20);
- /*
- * enable fixed master AXI port of 0x0 for all clients to keep
- * traffic from going to random places
- */
+ /* Set up 16 deep read/write request queues */
- adreno_regwrite(device, A3XX_VBIF_FIXED_SORT_EN, 0x0001003F);
- adreno_regwrite(device, A3XX_VBIF_FIXED_SORT_SEL0, 0x00000000);
- adreno_regwrite(device, A3XX_VBIF_FIXED_SORT_SEL1, 0x00000000);
+ adreno_regwrite(device, A3XX_VBIF_IN_RD_LIM_CONF0, 0x10101010);
+ adreno_regwrite(device, A3XX_VBIF_IN_RD_LIM_CONF1, 0x10101010);
+ adreno_regwrite(device, A3XX_VBIF_OUT_RD_LIM_CONF0, 0x10101010);
+ adreno_regwrite(device, A3XX_VBIF_OUT_WR_LIM_CONF0, 0x10101010);
+ adreno_regwrite(device, A3XX_VBIF_DDR_OUT_MAX_BURST, 0x00000303);
+ adreno_regwrite(device, A3XX_VBIF_IN_WR_LIM_CONF0, 0x10101010);
+ adreno_regwrite(device, A3XX_VBIF_IN_WR_LIM_CONF1, 0x10101010);
+
+ /* Enable WR-REQ */
+ adreno_regwrite(device, A3XX_VBIF_GATE_OFF_WRREQ_EN, 0x000000FF);
+
+ /* Set up round robin arbitration between both AXI ports */
+ adreno_regwrite(device, A3XX_VBIF_ARB_CTL, 0x00000030);
+
+ /* Set up AOOO */
+ adreno_regwrite(device, A3XX_VBIF_OUT_AXI_AOOO_EN, 0x0000003C);
+ adreno_regwrite(device, A3XX_VBIF_OUT_AXI_AOOO, 0x003C003C);
+
+ /* Enable 1K sort */
+ adreno_regwrite(device, A3XX_VBIF_ABIT_SORT, 0x000000FF);
+ adreno_regwrite(device, A3XX_VBIF_ABIT_SORT_CONF, 0x000000A4);
/* Make all blocks contribute to the GPU BUSY perf counter */
adreno_regwrite(device, A3XX_RBBM_GPU_BUSY_MASKED, 0xFFFFFFFF);
diff --git a/drivers/gpu/msm/adreno_debugfs.c b/drivers/gpu/msm/adreno_debugfs.c
index b53ca8f..68299cf 100644
--- a/drivers/gpu/msm/adreno_debugfs.c
+++ b/drivers/gpu/msm/adreno_debugfs.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2002,2008-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2002,2008-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -23,7 +23,8 @@
#include "a2xx_reg.h"
unsigned int kgsl_cff_dump_enable;
-int kgsl_pm_regs_enabled;
+int adreno_pm_regs_enabled;
+int adreno_pm_ib_enabled;
static struct dentry *pm_d_debugfs;
@@ -46,20 +47,37 @@
static int pm_regs_enabled_set(void *data, u64 val)
{
- kgsl_pm_regs_enabled = val ? 1 : 0;
+ adreno_pm_regs_enabled = val ? 1 : 0;
return 0;
}
static int pm_regs_enabled_get(void *data, u64 *val)
{
- *val = kgsl_pm_regs_enabled;
+ *val = adreno_pm_regs_enabled;
return 0;
}
+static int pm_ib_enabled_set(void *data, u64 val)
+{
+ adreno_pm_ib_enabled = val ? 1 : 0;
+ return 0;
+}
+
+static int pm_ib_enabled_get(void *data, u64 *val)
+{
+ *val = adreno_pm_ib_enabled;
+ return 0;
+}
+
+
DEFINE_SIMPLE_ATTRIBUTE(pm_regs_enabled_fops,
pm_regs_enabled_get,
pm_regs_enabled_set, "%llu\n");
+DEFINE_SIMPLE_ATTRIBUTE(pm_ib_enabled_fops,
+ pm_ib_enabled_get,
+ pm_ib_enabled_set, "%llu\n");
+
static int kgsl_cff_dump_enable_set(void *data, u64 val)
{
@@ -358,4 +376,6 @@
&pm_dump_fops);
debugfs_create_file("regs_enabled", 0644, pm_d_debugfs, device,
&pm_regs_enabled_fops);
+ debugfs_create_file("ib_enabled", 0644, pm_d_debugfs, device,
+ &pm_ib_enabled_fops);
}
diff --git a/drivers/gpu/msm/adreno_debugfs.h b/drivers/gpu/msm/adreno_debugfs.h
index 0356ac6..5f8d89a 100644
--- a/drivers/gpu/msm/adreno_debugfs.h
+++ b/drivers/gpu/msm/adreno_debugfs.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2002,2008-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2002,2008-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -17,11 +17,17 @@
int adreno_debugfs_init(struct kgsl_device *device);
-extern int kgsl_pm_regs_enabled;
+extern int adreno_pm_regs_enabled;
+extern int adreno_pm_ib_enabled;
-static inline int kgsl_pmregs_enabled(void)
+static inline int is_adreno_pm_regs_enabled(void)
{
- return kgsl_pm_regs_enabled;
+ return adreno_pm_regs_enabled;
+}
+
+static inline int is_adreno_pm_ib_enabled(void)
+{
+ return adreno_pm_ib_enabled;
}
#else
diff --git a/drivers/gpu/msm/adreno_pm4types.h b/drivers/gpu/msm/adreno_pm4types.h
index 1dffc32..75512d0 100644
--- a/drivers/gpu/msm/adreno_pm4types.h
+++ b/drivers/gpu/msm/adreno_pm4types.h
@@ -163,6 +163,13 @@
#define CP_LOAD_STATE 0x30 /* load high level sequencer command */
+/* Conditionally load a IB based on a flag */
+#define CP_COND_INDIRECT_BUFFER_PFE 0x3A /* prefetch enabled */
+#define CP_COND_INDIRECT_BUFFER_PFD 0x32 /* prefetch disabled */
+
+/* Load a buffer with pre-fetch enabled */
+#define CP_INDIRECT_BUFFER_PFE 0x3F
+
#define CP_LOADSTATE_DSTOFFSET_SHIFT 0x00000000
#define CP_LOADSTATE_STATESRC_SHIFT 0x00000010
#define CP_LOADSTATE_STATEBLOCKID_SHIFT 0x00000013
@@ -202,4 +209,14 @@
/* gmem command buffer length */
#define CP_REG(reg) ((0x4 << 16) | (SUBBLOCK_OFFSET(reg)))
+
+/* Return 1 if the command is an indirect buffer of any kind */
+static inline int adreno_cmd_is_ib(unsigned int cmd)
+{
+ return (cmd == cp_type3_packet(CP_INDIRECT_BUFFER_PFE, 2) ||
+ cmd == cp_type3_packet(CP_INDIRECT_BUFFER_PFD, 2) ||
+ cmd == cp_type3_packet(CP_COND_INDIRECT_BUFFER_PFE, 2) ||
+ cmd == cp_type3_packet(CP_COND_INDIRECT_BUFFER_PFD, 2));
+}
+
#endif /* __ADRENO_PM4TYPES_H */
diff --git a/drivers/gpu/msm/adreno_postmortem.c b/drivers/gpu/msm/adreno_postmortem.c
index 7902f30..e4bc470 100644
--- a/drivers/gpu/msm/adreno_postmortem.c
+++ b/drivers/gpu/msm/adreno_postmortem.c
@@ -201,7 +201,7 @@
for (i = 0; i+3 < ib1_size; ) {
value = ib1_addr[i++];
- if (value == cp_type3_packet(CP_INDIRECT_BUFFER_PFD, 2)) {
+ if (adreno_cmd_is_ib(value)) {
uint32_t ib2_base = ib1_addr[i++];
uint32_t ib2_size = ib1_addr[i++];
@@ -294,15 +294,6 @@
}
}
-static bool adreno_ib_dump_enabled(void)
-{
-#ifdef CONFIG_MSM_KGSL_PSTMRTMDMP_NO_IB_DUMP
- return 0;
-#else
- return 1;
-#endif
-}
-
struct log_field {
bool show;
const char *display;
@@ -778,7 +769,7 @@
i = 0;
for (read_idx = 0; read_idx < num_item; ) {
uint32_t this_cmd = rb_copy[read_idx++];
- if (this_cmd == cp_type3_packet(CP_INDIRECT_BUFFER_PFD, 2)) {
+ if (adreno_cmd_is_ib(this_cmd)) {
uint32_t ib_addr = rb_copy[read_idx++];
uint32_t ib_size = rb_copy[read_idx++];
dump_ib1(device, cur_pt_base, (read_idx-3)<<2, ib_addr,
@@ -817,12 +808,11 @@
cp_rb_base, cp_rb_rptr, cp_rb_wptr, read_idx);
adreno_dump_rb(device, rb_copy, num_item<<2, read_idx, rb_count);
- if (adreno_ib_dump_enabled()) {
+ if (is_adreno_pm_ib_enabled()) {
for (read_idx = NUM_DWORDS_OF_RINGBUFFER_HISTORY;
read_idx >= 0; --read_idx) {
uint32_t this_cmd = rb_copy[read_idx];
- if (this_cmd == cp_type3_packet(
- CP_INDIRECT_BUFFER_PFD, 2)) {
+ if (adreno_cmd_is_ib(this_cmd)) {
uint32_t ib_addr = rb_copy[read_idx+1];
uint32_t ib_size = rb_copy[read_idx+2];
if (ib_size && cp_ib1_base == ib_addr) {
@@ -849,16 +839,17 @@
}
/* Dump the registers if the user asked for it */
-
- if (adreno_is_a20x(adreno_dev))
- adreno_dump_regs(device, a200_registers,
- a200_registers_count);
- else if (adreno_is_a22x(adreno_dev))
- adreno_dump_regs(device, a220_registers,
- a220_registers_count);
- else if (adreno_is_a3xx(adreno_dev))
- adreno_dump_regs(device, a3xx_registers,
- a3xx_registers_count);
+ if (is_adreno_pm_regs_enabled()) {
+ if (adreno_is_a20x(adreno_dev))
+ adreno_dump_regs(device, a200_registers,
+ a200_registers_count);
+ else if (adreno_is_a22x(adreno_dev))
+ adreno_dump_regs(device, a220_registers,
+ a220_registers_count);
+ else if (adreno_is_a3xx(adreno_dev))
+ adreno_dump_regs(device, a3xx_registers,
+ a3xx_registers_count);
+ }
error_vfree:
vfree(rb_copy);
diff --git a/drivers/gpu/msm/adreno_snapshot.c b/drivers/gpu/msm/adreno_snapshot.c
index cc3f3e7..9836043 100644
--- a/drivers/gpu/msm/adreno_snapshot.c
+++ b/drivers/gpu/msm/adreno_snapshot.c
@@ -45,11 +45,19 @@
int index;
void *ptr;
- /* Go through the list and see that object has already been seen */
+ /*
+ * Sometimes IBs can be reused in the same dump. Because we parse from
+ * oldest to newest, if we come across an IB that has already been used,
+ * assume that it has been reused and update the list with the newest
+ * size.
+ */
+
for (index = 0; index < objbufptr; index++) {
if (objbuf[index].gpuaddr == gpuaddr &&
- objbuf[index].ptbase == ptbase)
- return;
+ objbuf[index].ptbase == ptbase) {
+ objbuf[index].dwords = dwords;
+ return;
+ }
}
if (objbufptr == SNAPSHOT_OBJ_BUFSIZE) {
@@ -77,6 +85,25 @@
objbuf[objbufptr++].ptr = ptr;
}
+/*
+ * Return a 1 if the specified object is already on the list of buffers
+ * to be dumped
+ */
+
+static int find_object(int type, unsigned int gpuaddr, unsigned int ptbase)
+{
+ int index;
+
+ for (index = 0; index < objbufptr; index++) {
+ if (objbuf[index].gpuaddr == gpuaddr &&
+ objbuf[index].ptbase == ptbase &&
+ objbuf[index].type == type)
+ return 1;
+ }
+
+ return 0;
+}
+
/* Snapshot the istore memory */
static int snapshot_istore(struct kgsl_device *device, void *snapshot,
int remain, void *priv)
@@ -113,6 +140,7 @@
unsigned int rbbase, ptbase, rptr, *rbptr;
int start, stop, index;
int numitems, size;
+ int parse_ibs = 0, ib_parse_start;
/* Get the GPU address of the ringbuffer */
kgsl_regread(device, REG_CP_RB_BASE, &rbbase);
@@ -158,9 +186,53 @@
header->rbsize = rb->sizedwords;
header->count = numitems;
- index = start;
+ /*
+ * We can only reliably dump IBs from the beginning of the context,
+ * and it turns out that for the vast majority of the time we really
+ * only care about the current context when it comes to diagnosing
+ * a hang. So, with an eye to limiting the buffer dumping to what is
+ * really useful find the beginning of the context and only dump
+ * IBs from that point
+ */
+
+ index = rptr;
+ ib_parse_start = start;
rbptr = rb->buffer_desc.hostptr;
+ while (index != start) {
+ index--;
+
+ if (index < 0) {
+ /*
+ * The marker we are looking for is 2 dwords long, so
+ * when wrapping, go back 2 from the end so we don't
+ * access out of range in the if statement below
+ */
+ index = rb->sizedwords - 2;
+
+ /*
+ * Account for the possibility that start might be at
+ * rb->sizedwords - 1
+ */
+
+ if (start == rb->sizedwords - 1)
+ break;
+ }
+
+ /*
+ * Look for a NOP packet with the context switch identifier in
+ * the second dword
+ */
+
+ if (rbptr[index] == cp_nop_packet(1) &&
+ rbptr[index + 1] == KGSL_CONTEXT_TO_MEM_IDENTIFIER) {
+ ib_parse_start = index;
+ break;
+ }
+ }
+
+ index = start;
+
/*
* Loop through the RB, copying the data and looking for indirect
* buffers and MMU pagetable changes
@@ -169,15 +241,18 @@
while (index != rb->wptr) {
*data = rbptr[index];
- if (rbptr[index] == cp_type3_packet(CP_INDIRECT_BUFFER_PFD, 2))
+ /* Only parse IBs between the context start and the rptr */
+
+ if (index == ib_parse_start)
+ parse_ibs = 1;
+
+ if (index == rptr)
+ parse_ibs = 0;
+
+ if (parse_ibs && adreno_cmd_is_ib(rbptr[index]))
push_object(device, SNAPSHOT_OBJ_TYPE_IB, ptbase,
rbptr[index + 1], rbptr[index + 2]);
- /*
- * FIXME: Handle upcoming MMU pagetable changes, but only
- * between the rptr and the wptr
- */
-
index = index + 1;
if (index == rb->sizedwords)
@@ -228,10 +303,9 @@
*dst = *src;
/* If another IB is discovered, then push it on the list too */
- if (*src == cp_type3_packet(CP_INDIRECT_BUFFER_PFD, 2)) {
+ if (adreno_cmd_is_ib(*src))
push_object(device, SNAPSHOT_OBJ_TYPE_IB, obj->ptbase,
*(src + 1), *(src + 2));
- }
src++;
dst++;
@@ -288,22 +362,45 @@
snapshot, remain, snapshot_rb, NULL);
/*
- * Make sure that the IBs described in the CP registers are on the
- * list of objects
+ * Make sure that the last IB1 that was being executed is dumped.
+ * Since this was the last IB1 that was processed, we should have
+ * already added it to the list during the ringbuffer parse but we
+ * want to be double plus sure.
*/
+
kgsl_regread(device, REG_CP_IB1_BASE, &ibbase);
kgsl_regread(device, REG_CP_IB1_BUFSZ, &ibsize);
- if (ibsize)
+ /*
+ * The problem is that IB size from the register is the unprocessed size
+ * of the buffer not the original size, so if we didn't catch this
+ * buffer being directly used in the RB, then we might not be able to
+ * dump the whle thing. Print a warning message so we can try to
+ * figure how often this really happens.
+ */
+
+ if (!find_object(SNAPSHOT_OBJ_TYPE_IB, ibbase, ptbase) && ibsize) {
push_object(device, SNAPSHOT_OBJ_TYPE_IB, ptbase,
ibbase, ibsize);
+ KGSL_DRV_ERR(device, "CP_IB1_BASE not found in the ringbuffer. "
+ "Dumping %x dwords of the buffer.\n", ibsize);
+ }
kgsl_regread(device, REG_CP_IB2_BASE, &ibbase);
kgsl_regread(device, REG_CP_IB2_BUFSZ, &ibsize);
- if (ibsize)
+ /*
+ * Add the last parsed IB2 to the list. The IB2 should be found as we
+ * parse the objects below, but we try to add it to the list first, so
+ * it too can be parsed. Don't print an error message in this case - if
+ * the IB2 is found during parsing, the list will be updated with the
+ * correct size.
+ */
+
+ if (!find_object(SNAPSHOT_OBJ_TYPE_IB, ibbase, ptbase) && ibsize) {
push_object(device, SNAPSHOT_OBJ_TYPE_IB, ptbase,
ibbase, ibsize);
+ }
/*
* Go through the list of found objects and dump each one. As the IBs
diff --git a/drivers/gpu/msm/kgsl.c b/drivers/gpu/msm/kgsl.c
index 9333dca..50a6fab 100644
--- a/drivers/gpu/msm/kgsl.c
+++ b/drivers/gpu/msm/kgsl.c
@@ -25,7 +25,6 @@
#include <linux/ashmem.h>
#include <linux/major.h>
#include <linux/ion.h>
-#include <mach/socinfo.h>
#include "kgsl.h"
#include "kgsl_debugfs.h"
@@ -789,6 +788,40 @@
break;
}
+ case KGSL_PROP_GPU_RESET_STAT:
+ {
+ /* Return reset status of given context and clear it */
+ uint32_t id;
+ struct kgsl_context *context;
+
+ if (param->sizebytes != sizeof(unsigned int)) {
+ result = -EINVAL;
+ break;
+ }
+ /* We expect the value passed in to contain the context id */
+ if (copy_from_user(&id, param->value,
+ sizeof(unsigned int))) {
+ result = -EFAULT;
+ break;
+ }
+ context = kgsl_find_context(dev_priv, id);
+ if (!context) {
+ result = -EINVAL;
+ break;
+ }
+ /*
+ * Copy the reset status to value which also serves as
+ * the out parameter
+ */
+ if (copy_to_user(param->value, &(context->reset_status),
+ sizeof(unsigned int))) {
+ result = -EFAULT;
+ break;
+ }
+ /* Clear reset status once its been queried */
+ context->reset_status = KGSL_CTX_STAT_NO_ERROR;
+ break;
+ }
default:
result = dev_priv->device->ftbl->getproperty(
dev_priv->device, param->type,
@@ -870,10 +903,6 @@
struct kgsl_ibdesc *ibdesc;
struct kgsl_context *context;
-#ifdef CONFIG_MSM_KGSL_DRM
- kgsl_gpu_mem_flush(DRM_KGSL_GEM_CACHE_OP_TO_DEV);
-#endif
-
context = kgsl_find_context(dev_priv, param->drawctxt_id);
if (context == NULL) {
result = -EINVAL;
@@ -961,10 +990,6 @@
kfree(ibdesc);
done:
-#ifdef CONFIG_MSM_KGSL_DRM
- kgsl_gpu_mem_flush(DRM_KGSL_GEM_CACHE_OP_FROM_DEV);
-#endif
-
return result;
}
@@ -990,6 +1015,7 @@
spin_lock(&entry->priv->mem_lock);
list_del(&entry->list);
spin_unlock(&entry->priv->mem_lock);
+ trace_kgsl_mem_timestamp_free(entry, timestamp);
kgsl_mem_entry_put(entry);
}
@@ -1000,12 +1026,18 @@
int result = 0;
struct kgsl_cmdstream_freememontimestamp *param = data;
struct kgsl_mem_entry *entry = NULL;
+ struct kgsl_device *device = dev_priv->device;
+ unsigned int cur;
spin_lock(&dev_priv->process_priv->mem_lock);
entry = kgsl_sharedmem_find(dev_priv->process_priv, param->gpuaddr);
spin_unlock(&dev_priv->process_priv->mem_lock);
if (entry) {
+ cur = device->ftbl->readtimestamp(device,
+ KGSL_TIMESTAMP_RETIRED);
+
+ trace_kgsl_mem_timestamp_queue(entry, cur);
result = kgsl_add_event(dev_priv->device, param->timestamp,
kgsl_freemem_event_cb, entry, dev_priv);
} else {
@@ -1084,6 +1116,7 @@
spin_unlock(&private->mem_lock);
if (entry) {
+ trace_kgsl_mem_free(entry);
kgsl_mem_entry_put(entry);
} else {
KGSL_CORE_ERR("invalid gpuaddr %08x\n", param->gpuaddr);
@@ -1184,6 +1217,7 @@
kgsl_mem_entry_attach_process(entry, private);
+ trace_kgsl_mem_alloc(entry);
/* Process specific statistics */
kgsl_process_add_stats(private, entry->memtype, len);
@@ -1618,6 +1652,7 @@
kgsl_process_add_stats(private, entry->memtype, param->len);
kgsl_mem_entry_attach_process(entry, private);
+ trace_kgsl_mem_map(entry, param->fd);
kgsl_check_idle(dev_priv->device);
return result;
@@ -1684,6 +1719,7 @@
param->gpuaddr = entry->memdesc.gpuaddr;
kgsl_process_add_stats(private, entry->memtype, param->size);
+ trace_kgsl_mem_alloc(entry);
} else
kfree(entry);
@@ -1930,7 +1966,7 @@
if (!func) {
KGSL_DRV_INFO(dev_priv->device,
"invalid ioctl code %08x\n", cmd);
- ret = -EINVAL;
+ ret = -ENOIOCTLCMD;
goto done;
}
lock = 1;
@@ -2102,8 +2138,8 @@
kgsl_cffdump_close(device->id);
kgsl_pwrctrl_uninit_sysfs(device);
- if (cpu_is_msm8x60())
- wake_lock_destroy(&device->idle_wakelock);
+ wake_lock_destroy(&device->idle_wakelock);
+ pm_qos_remove_request(&device->pm_qos_req_dma);
idr_destroy(&device->context_idr);
@@ -2194,9 +2230,9 @@
if (ret != 0)
goto err_close_mmu;
- if (cpu_is_msm8x60())
- wake_lock_init(&device->idle_wakelock,
- WAKE_LOCK_IDLE, device->name);
+ wake_lock_init(&device->idle_wakelock, WAKE_LOCK_IDLE, device->name);
+ pm_qos_add_request(&device->pm_qos_req_dma, PM_QOS_CPU_DMA_LATENCY,
+ PM_QOS_DEFAULT_VALUE);
idr_init(&device->context_idr);
diff --git a/drivers/gpu/msm/kgsl.h b/drivers/gpu/msm/kgsl.h
index 1135adb..b2fe095 100644
--- a/drivers/gpu/msm/kgsl.h
+++ b/drivers/gpu/msm/kgsl.h
@@ -160,7 +160,6 @@
#ifdef CONFIG_MSM_KGSL_DRM
extern int kgsl_drm_init(struct platform_device *dev);
extern void kgsl_drm_exit(void);
-extern void kgsl_gpu_mem_flush(int op);
#else
static inline int kgsl_drm_init(struct platform_device *dev)
{
@@ -199,7 +198,7 @@
if (ts_diff == 0)
return 0;
- return ((ts_diff > 0) || (ts_diff < -20000)) ? 1 : -1;
+ return ((ts_diff > 0) || (ts_diff < -25000)) ? 1 : -1;
}
static inline void
diff --git a/drivers/gpu/msm/kgsl_device.h b/drivers/gpu/msm/kgsl_device.h
index 2fb1e43..d7a25a1 100644
--- a/drivers/gpu/msm/kgsl_device.h
+++ b/drivers/gpu/msm/kgsl_device.h
@@ -15,6 +15,7 @@
#include <linux/idr.h>
#include <linux/wakelock.h>
+#include <linux/pm_qos_params.h>
#include <linux/earlysuspend.h>
#include "kgsl.h"
@@ -184,6 +185,7 @@
struct wake_lock idle_wakelock;
struct kgsl_pwrscale pwrscale;
struct kobject pwrscale_kobj;
+ struct pm_qos_request_list pm_qos_req_dma;
struct work_struct ts_expired_ws;
struct list_head events;
s64 on_time;
@@ -197,6 +199,11 @@
/* Pointer to the device specific context information */
void *devctxt;
+ /*
+ * Status indicating whether a gpu reset occurred and whether this
+ * context was responsible for causing it
+ */
+ unsigned int reset_status;
};
struct kgsl_process_private {
diff --git a/drivers/gpu/msm/kgsl_drm.c b/drivers/gpu/msm/kgsl_drm.c
index e3f6f3b..03f8c42 100644
--- a/drivers/gpu/msm/kgsl_drm.c
+++ b/drivers/gpu/msm/kgsl_drm.c
@@ -156,22 +156,6 @@
kgsl_cache_range_op(memdesc, cacheop);
}
-/* Flush all the memory mapped in the MMU */
-
-void kgsl_gpu_mem_flush(int op)
-{
- struct drm_kgsl_gem_object *entry;
-
- list_for_each_entry(entry, &kgsl_mem_list, list) {
- kgsl_gem_mem_flush(&entry->memdesc, entry->type, op);
- }
-
- /* Takes care of WT/WC case.
- * More useful when we go barrierless
- */
- dmb();
-}
-
/* TODO:
* Add vsync wait */
diff --git a/drivers/gpu/msm/kgsl_gpummu.c b/drivers/gpu/msm/kgsl_gpummu.c
index a16b954..97b5ef1 100644
--- a/drivers/gpu/msm/kgsl_gpummu.c
+++ b/drivers/gpu/msm/kgsl_gpummu.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -398,11 +398,11 @@
enum kgsl_deviceid id)
{
unsigned int result = 0;
- struct kgsl_gpummu_pt *gpummu_pt = (struct kgsl_gpummu_pt *)
- pt->priv;
+ struct kgsl_gpummu_pt *gpummu_pt;
if (pt == NULL)
return 0;
+ gpummu_pt = pt->priv;
spin_lock(&pt->lock);
if (gpummu_pt->tlb_flags && (1<<id)) {
diff --git a/drivers/gpu/msm/kgsl_iommu.c b/drivers/gpu/msm/kgsl_iommu.c
index e4e561c..194067b 100644
--- a/drivers/gpu/msm/kgsl_iommu.c
+++ b/drivers/gpu/msm/kgsl_iommu.c
@@ -24,11 +24,23 @@
#include "kgsl_mmu.h"
#include "kgsl_sharedmem.h"
+/*
+ * On APQ8064, KGSL can control a maximum of 4 IOMMU devices: 2 user and 2
+ * priv domains, 1 each for each of the AXI ports attached to the GPU. 8660
+ * and 8960 have only one AXI port, so maximum allowable IOMMU devices for those
+ * chips is 2.
+ */
+
+#define KGSL_IOMMU_MAX_DEV 4
+
+struct kgsl_iommu_device {
+ struct device *dev;
+ int attached;
+};
+
struct kgsl_iommu {
- struct device *iommu_user_dev;
- int iommu_user_dev_attached;
- struct device *iommu_priv_dev;
- int iommu_priv_dev_attached;
+ struct kgsl_iommu_device dev[KGSL_IOMMU_MAX_DEV];
+ int dev_count;
};
static int kgsl_iommu_pt_equal(struct kgsl_pagetable *pt,
@@ -58,89 +70,101 @@
{
struct iommu_domain *domain;
struct kgsl_iommu *iommu = mmu->priv;
+ int i;
BUG_ON(mmu->hwpagetable == NULL);
BUG_ON(mmu->hwpagetable->priv == NULL);
domain = mmu->hwpagetable->priv;
- if (iommu->iommu_user_dev_attached) {
- iommu_detach_device(domain, iommu->iommu_user_dev);
- iommu->iommu_user_dev_attached = 0;
+ for (i = 0; i < iommu->dev_count; i++) {
+ iommu_detach_device(domain, iommu->dev[i].dev);
+ iommu->dev[i].attached = 0;
KGSL_MEM_INFO(mmu->device,
- "iommu %p detached from user dev of MMU: %p\n",
- domain, mmu);
- }
- if (iommu->iommu_priv_dev_attached) {
- iommu_detach_device(domain, iommu->iommu_priv_dev);
- iommu->iommu_priv_dev_attached = 0;
- KGSL_MEM_INFO(mmu->device,
- "iommu %p detached from priv dev of MMU: %p\n",
- domain, mmu);
+ "iommu %p detached from user dev of MMU: %p\n",
+ domain, mmu);
}
}
static int kgsl_attach_pagetable_iommu_domain(struct kgsl_mmu *mmu)
{
struct iommu_domain *domain;
- int ret = 0;
struct kgsl_iommu *iommu = mmu->priv;
+ int i, ret = 0;
BUG_ON(mmu->hwpagetable == NULL);
BUG_ON(mmu->hwpagetable->priv == NULL);
domain = mmu->hwpagetable->priv;
- if (iommu->iommu_user_dev && !iommu->iommu_user_dev_attached) {
- ret = iommu_attach_device(domain, iommu->iommu_user_dev);
- if (ret) {
- KGSL_MEM_ERR(mmu->device,
- "Failed to attach device, err %d\n", ret);
- goto done;
- }
- iommu->iommu_user_dev_attached = 1;
- KGSL_MEM_INFO(mmu->device,
- "iommu %p attached to user dev of MMU: %p\n",
+ for (i = 0; i < iommu->dev_count; i++) {
+ if (iommu->dev[i].attached == 0) {
+ ret = iommu_attach_device(domain, iommu->dev[i].dev);
+ if (ret) {
+ KGSL_MEM_ERR(mmu->device,
+ "Failed to attach device, err %d\n",
+ ret);
+ goto done;
+ }
+
+ iommu->dev[i].attached = 1;
+ KGSL_MEM_INFO(mmu->device,
+ "iommu %p detached from user dev of MMU: %p\n",
domain, mmu);
- }
- if (iommu->iommu_priv_dev && !iommu->iommu_priv_dev_attached) {
- ret = iommu_attach_device(domain, iommu->iommu_priv_dev);
- if (ret) {
- KGSL_MEM_ERR(mmu->device,
- "Failed to attach device, err %d\n", ret);
- iommu_detach_device(domain, iommu->iommu_user_dev);
- iommu->iommu_user_dev_attached = 0;
- goto done;
}
- iommu->iommu_priv_dev_attached = 1;
- KGSL_MEM_INFO(mmu->device,
- "iommu %p attached to priv dev of MMU: %p\n",
- domain, mmu);
}
+
done:
return ret;
}
+static int _get_iommu_ctxs(struct kgsl_iommu *iommu, struct kgsl_device *device,
+ struct kgsl_device_iommu_data *data)
+{
+ int i;
+
+ for (i = 0; i < data->iommu_ctx_count; i++) {
+ if (iommu->dev_count >= KGSL_IOMMU_MAX_DEV) {
+ KGSL_CORE_ERR("Tried to attach too many IOMMU "
+ "devices\n");
+ return -ENOMEM;
+ }
+
+ if (!data->iommu_ctx_names[i])
+ continue;
+
+ iommu->dev[iommu->dev_count].dev =
+ msm_iommu_get_ctx(data->iommu_ctx_names[i]);
+ if (iommu->dev[iommu->dev_count].dev == NULL) {
+ KGSL_CORE_ERR("Failed to iommu dev handle for "
+ "device %s\n", data->iommu_ctx_names[i]);
+ return -EINVAL;
+ }
+
+ iommu->dev_count++;
+ }
+
+ return 0;
+}
+
static int kgsl_get_iommu_ctxt(struct kgsl_iommu *iommu,
struct kgsl_device *device)
{
- int status = 0;
struct platform_device *pdev =
container_of(device->parentdev, struct platform_device, dev);
struct kgsl_device_platform_data *pdata_dev = pdev->dev.platform_data;
- if (pdata_dev->iommu_user_ctx_name)
- iommu->iommu_user_dev = msm_iommu_get_ctx(
- pdata_dev->iommu_user_ctx_name);
- if (pdata_dev->iommu_priv_ctx_name)
- iommu->iommu_priv_dev = msm_iommu_get_ctx(
- pdata_dev->iommu_priv_ctx_name);
- if (!iommu->iommu_user_dev) {
- KGSL_CORE_ERR("Failed to get user iommu dev handle for "
- "device %s\n",
- pdata_dev->iommu_user_ctx_name);
- status = -EINVAL;
+ int i, ret = 0;
+
+ /* Go through the IOMMU data and attach all the domains */
+
+ for (i = 0; i < pdata_dev->iommu_count; i++) {
+ ret = _get_iommu_ctxs(iommu, device,
+ &pdata_dev->iommu_data[i]);
+ if (ret)
+ break;
}
- return status;
+
+ return ret;
}
static void kgsl_iommu_setstate(struct kgsl_device *device,
@@ -182,8 +206,6 @@
return -ENOMEM;
}
- iommu->iommu_priv_dev_attached = 0;
- iommu->iommu_user_dev_attached = 0;
status = kgsl_get_iommu_ctxt(iommu, device);
if (status) {
kfree(iommu);
diff --git a/drivers/gpu/msm/kgsl_pwrctrl.c b/drivers/gpu/msm/kgsl_pwrctrl.c
index b671f86..406d0c9 100644
--- a/drivers/gpu/msm/kgsl_pwrctrl.c
+++ b/drivers/gpu/msm/kgsl_pwrctrl.c
@@ -13,7 +13,6 @@
#include <linux/interrupt.h>
#include <mach/msm_iomap.h>
#include <mach/msm_bus.h>
-#include <mach/socinfo.h>
#include "kgsl.h"
#include "kgsl_pwrscale.h"
@@ -25,6 +24,7 @@
#define KGSL_PWRFLAGS_AXI_ON 2
#define KGSL_PWRFLAGS_IRQ_ON 3
+#define GPU_SWFI_LATENCY 3
#define UPDATE_BUSY_VAL 1000000
#define UPDATE_BUSY 50
@@ -284,7 +284,7 @@
DEVICE_ATTR(gpuclk, 0644, kgsl_pwrctrl_gpuclk_show, kgsl_pwrctrl_gpuclk_store);
DEVICE_ATTR(max_gpuclk, 0644, kgsl_pwrctrl_max_gpuclk_show,
kgsl_pwrctrl_max_gpuclk_store);
-DEVICE_ATTR(pwrnap, 0666, kgsl_pwrctrl_pwrnap_show, kgsl_pwrctrl_pwrnap_store);
+DEVICE_ATTR(pwrnap, 0664, kgsl_pwrctrl_pwrnap_show, kgsl_pwrctrl_pwrnap_store);
DEVICE_ATTR(idle_timer, 0644, kgsl_pwrctrl_idle_timer_show,
kgsl_pwrctrl_idle_timer_store);
DEVICE_ATTR(gpubusy, 0644, kgsl_pwrctrl_gpubusy_show,
@@ -743,8 +743,9 @@
_sleep_accounting(device);
kgsl_pwrctrl_clk(device, KGSL_PWRFLAGS_OFF);
kgsl_pwrctrl_set_state(device, KGSL_STATE_SLEEP);
- if (device->idle_wakelock.name)
- wake_unlock(&device->idle_wakelock);
+ wake_unlock(&device->idle_wakelock);
+ pm_qos_update_request(&device->pm_qos_req_dma,
+ PM_QOS_DEFAULT_VALUE);
break;
case KGSL_STATE_SLEEP:
case KGSL_STATE_SLUMBER:
@@ -847,9 +848,9 @@
/* Re-enable HW access */
mod_timer(&device->idle_timer,
jiffies + device->pwrctrl.interval_timeout);
-
- if (device->idle_wakelock.name)
- wake_lock(&device->idle_wakelock);
+ wake_lock(&device->idle_wakelock);
+ pm_qos_update_request(&device->pm_qos_req_dma,
+ GPU_SWFI_LATENCY);
case KGSL_STATE_ACTIVE:
break;
default:
diff --git a/drivers/gpu/msm/kgsl_pwrscale.c b/drivers/gpu/msm/kgsl_pwrscale.c
index 4c9a239..d0b2a41 100644
--- a/drivers/gpu/msm/kgsl_pwrscale.c
+++ b/drivers/gpu/msm/kgsl_pwrscale.c
@@ -90,7 +90,7 @@
return ret;
}
-PWRSCALE_ATTR(policy, 0666, pwrscale_policy_show, pwrscale_policy_store);
+PWRSCALE_ATTR(policy, 0664, pwrscale_policy_show, pwrscale_policy_store);
static ssize_t pwrscale_avail_policies_show(struct kgsl_device *device,
char *buf)
diff --git a/drivers/gpu/msm/kgsl_sharedmem.c b/drivers/gpu/msm/kgsl_sharedmem.c
index 389ed6d..f61a196 100644
--- a/drivers/gpu/msm/kgsl_sharedmem.c
+++ b/drivers/gpu/msm/kgsl_sharedmem.c
@@ -13,6 +13,8 @@
#include <linux/vmalloc.h>
#include <linux/memory_alloc.h>
#include <asm/cacheflush.h>
+#include <linux/slab.h>
+#include <linux/kmemleak.h>
#include "kgsl.h"
#include "kgsl_sharedmem.h"
@@ -150,7 +152,7 @@
#endif
MEM_ENTRY_STAT(KGSL_MEM_ENTRY_USER, user),
#ifdef CONFIG_ION
- MEM_ENTRY_STAT(KGSL_MEM_ENTRY_USER, ion),
+ MEM_ENTRY_STAT(KGSL_MEM_ENTRY_ION, ion),
#endif
};
@@ -427,6 +429,8 @@
goto done;
}
+ kmemleak_not_leak(memdesc->sg);
+
memdesc->sglen = sglen;
sg_init_table(memdesc->sg, sglen);
@@ -499,6 +503,8 @@
return -ENOMEM;
}
+ kmemleak_not_leak(ptr);
+
protflags = GSL_PT_PAGE_RV;
if (!(flags & KGSL_MEMFLAGS_GPUREADONLY))
protflags |= GSL_PT_PAGE_WV;
diff --git a/drivers/gpu/msm/kgsl_sharedmem.h b/drivers/gpu/msm/kgsl_sharedmem.h
index 67a1c2d..e54110d 100644
--- a/drivers/gpu/msm/kgsl_sharedmem.h
+++ b/drivers/gpu/msm/kgsl_sharedmem.h
@@ -17,6 +17,8 @@
#include <linux/dma-mapping.h>
#include <linux/vmalloc.h>
#include "kgsl_mmu.h"
+#include <linux/slab.h>
+#include <linux/kmemleak.h>
struct kgsl_device;
struct kgsl_process_private;
@@ -86,6 +88,8 @@
if (memdesc->sg == NULL)
return -ENOMEM;
+ kmemleak_not_leak(memdesc->sg);
+
memdesc->sglen = 1;
sg_init_table(memdesc->sg, 1);
sg_set_page(&memdesc->sg[0], page, size, 0);
diff --git a/drivers/gpu/msm/kgsl_snapshot.c b/drivers/gpu/msm/kgsl_snapshot.c
index de39ee4..93fdc08 100644
--- a/drivers/gpu/msm/kgsl_snapshot.c
+++ b/drivers/gpu/msm/kgsl_snapshot.c
@@ -10,7 +10,6 @@
* GNU General Public License for more details.
*/
-#include <linux/vmalloc.h>
#include <linux/time.h>
#include <linux/sysfs.h>
#include <linux/utsname.h>
@@ -299,6 +298,10 @@
/* Freeze the snapshot on a hang until it gets read */
device->snapshot_frozen = (hang) ? 1 : 0;
+ /* log buffer info to aid in ramdump recovery */
+ KGSL_DRV_ERR(device, "snapshot created at va %p pa %lx size %d\n",
+ device->snapshot, __pa(device->snapshot),
+ device->snapshot_size);
return 0;
}
EXPORT_SYMBOL(kgsl_device_snapshot);
@@ -448,7 +451,7 @@
int ret;
if (device->snapshot == NULL)
- device->snapshot = vmalloc(KGSL_SNAPSHOT_MEMSIZE);
+ device->snapshot = kzalloc(KGSL_SNAPSHOT_MEMSIZE, GFP_KERNEL);
if (device->snapshot == NULL)
return -ENOMEM;
@@ -491,7 +494,7 @@
kobject_put(&device->snapshot_kobj);
- vfree(device->snapshot);
+ kfree(device->snapshot);
device->snapshot = NULL;
device->snapshot_maxsize = 0;
diff --git a/drivers/gpu/msm/kgsl_trace.h b/drivers/gpu/msm/kgsl_trace.h
index 86a9adc..22bc576 100644
--- a/drivers/gpu/msm/kgsl_trace.h
+++ b/drivers/gpu/msm/kgsl_trace.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -257,6 +257,122 @@
TP_ARGS(device, state)
);
+TRACE_EVENT(kgsl_mem_alloc,
+
+ TP_PROTO(struct kgsl_mem_entry *mem_entry),
+
+ TP_ARGS(mem_entry),
+
+ TP_STRUCT__entry(
+ __field(unsigned int, gpuaddr)
+ __field(unsigned int, size)
+ ),
+
+ TP_fast_assign(
+ __entry->gpuaddr = mem_entry->memdesc.gpuaddr;
+ __entry->size = mem_entry->memdesc.size;
+ ),
+
+ TP_printk(
+ "gpuaddr=0x%08x size=%d",
+ __entry->gpuaddr, __entry->size
+ )
+);
+
+TRACE_EVENT(kgsl_mem_map,
+
+ TP_PROTO(struct kgsl_mem_entry *mem_entry, int fd),
+
+ TP_ARGS(mem_entry, fd),
+
+ TP_STRUCT__entry(
+ __field(unsigned int, gpuaddr)
+ __field(unsigned int, size)
+ __field(int, fd)
+ __field(int, type)
+ ),
+
+ TP_fast_assign(
+ __entry->gpuaddr = mem_entry->memdesc.gpuaddr;
+ __entry->size = mem_entry->memdesc.size;
+ __entry->fd = fd;
+ __entry->type = mem_entry->memtype;
+ ),
+
+ TP_printk(
+ "gpuaddr=0x%08x size=%d type=%d fd=%d",
+ __entry->gpuaddr, __entry->size,
+ __entry->type, __entry->fd
+ )
+);
+
+TRACE_EVENT(kgsl_mem_free,
+
+ TP_PROTO(struct kgsl_mem_entry *mem_entry),
+
+ TP_ARGS(mem_entry),
+
+ TP_STRUCT__entry(
+ __field(unsigned int, gpuaddr)
+ __field(unsigned int, size)
+ __field(int, type)
+ __field(int, fd)
+ ),
+
+ TP_fast_assign(
+ __entry->gpuaddr = mem_entry->memdesc.gpuaddr;
+ __entry->size = mem_entry->memdesc.size;
+ __entry->type = mem_entry->memtype;
+ ),
+
+ TP_printk(
+ "gpuaddr=0x%08x size=%d type=%d",
+ __entry->gpuaddr, __entry->size, __entry->type
+ )
+);
+
+DECLARE_EVENT_CLASS(kgsl_mem_timestamp_template,
+
+ TP_PROTO(struct kgsl_mem_entry *mem_entry, unsigned int curr_ts),
+
+ TP_ARGS(mem_entry, curr_ts),
+
+ TP_STRUCT__entry(
+ __field(unsigned int, gpuaddr)
+ __field(unsigned int, size)
+ __field(int, type)
+ __field(unsigned int, drawctxt_id)
+ __field(unsigned int, curr_ts)
+ __field(unsigned int, free_ts)
+ ),
+
+ TP_fast_assign(
+ __entry->gpuaddr = mem_entry->memdesc.gpuaddr;
+ __entry->size = mem_entry->memdesc.size;
+ __entry->drawctxt_id = 1337;
+ __entry->type = mem_entry->memtype;
+ __entry->curr_ts = curr_ts;
+ __entry->free_ts = mem_entry->free_timestamp;
+ ),
+
+ TP_printk(
+ "gpuaddr=0x%08x size=%d type=%d ctx=%u curr_ts=0x%08x free_ts=0x%08x",
+ __entry->gpuaddr, __entry->size, __entry->type,
+ __entry->drawctxt_id, __entry->curr_ts, __entry->free_ts
+ )
+);
+
+DEFINE_EVENT(kgsl_mem_timestamp_template, kgsl_mem_timestamp_queue,
+ TP_PROTO(struct kgsl_mem_entry *mem_entry, unsigned int curr_ts),
+ TP_ARGS(mem_entry, curr_ts)
+);
+
+DEFINE_EVENT(kgsl_mem_timestamp_template, kgsl_mem_timestamp_free,
+ TP_PROTO(struct kgsl_mem_entry *mem_entry, unsigned int curr_ts),
+ TP_ARGS(mem_entry, curr_ts)
+);
+
+
#endif /* _KGSL_TRACE_H */
/* This part must be outside protection */
diff --git a/drivers/gpu/msm/z180.c b/drivers/gpu/msm/z180.c
index cb3da90..6c43a75 100644
--- a/drivers/gpu/msm/z180.c
+++ b/drivers/gpu/msm/z180.c
@@ -339,13 +339,15 @@
*p++ = ADDR_VGV3_LAST << 24;
}
-static void z180_cmdstream_start(struct kgsl_device *device)
+static void z180_cmdstream_start(struct kgsl_device *device, int init_ram)
{
struct z180_device *z180_dev = Z180_DEVICE(device);
unsigned int cmd = VGV3_NEXTCMD_JUMP << VGV3_NEXTCMD_NEXTCMD_FSHIFT;
- z180_dev->timestamp = 0;
- z180_dev->current_timestamp = 0;
+ if (init_ram) {
+ z180_dev->timestamp = 0;
+ z180_dev->current_timestamp = 0;
+ }
addmarker(&z180_dev->ringbuffer, 0);
@@ -566,7 +568,7 @@
if (status)
goto error_clk_off;
- z180_cmdstream_start(device);
+ z180_cmdstream_start(device, init_ram);
mod_timer(&device->idle_timer, jiffies + FIRST_TIMEOUT);
kgsl_pwrctrl_irq(device, KGSL_PWRFLAGS_ON);
diff --git a/drivers/hwmon/msm_adc.c b/drivers/hwmon/msm_adc.c
index b8d581e..39bfc3a 100644
--- a/drivers/hwmon/msm_adc.c
+++ b/drivers/hwmon/msm_adc.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1380,7 +1380,7 @@
},
};
-static int msm_adc_probe(struct platform_device *pdev)
+static int __devinit msm_adc_probe(struct platform_device *pdev)
{
struct msm_adc_platform_data *pdata = pdev->dev.platform_data;
struct msm_adc_drv *msm_adc;
diff --git a/drivers/hwmon/pm8xxx-adc.c b/drivers/hwmon/pm8xxx-adc.c
index 5f8faee..0902c61 100644
--- a/drivers/hwmon/pm8xxx-adc.c
+++ b/drivers/hwmon/pm8xxx-adc.c
@@ -165,6 +165,7 @@
};
static struct pm8xxx_adc *pmic_adc;
+static struct regulator *pa_therm;
static struct pm8xxx_adc_scale_fn adc_scale_fn[] = {
[ADC_SCALE_DEFAULT] = {pm8xxx_adc_scale_default},
@@ -238,26 +239,21 @@
static int32_t pm8xxx_adc_patherm_power(bool on)
{
- static struct regulator *pa_therm;
- struct pm8xxx_adc *adc_pmic = pmic_adc;
int rc = 0;
- if (on) {
- pa_therm = regulator_get(adc_pmic->dev,
- "pa_therm");
- if (IS_ERR(pa_therm)) {
- rc = PTR_ERR(pa_therm);
- pr_err("failed to request pa_therm vreg "
- "with error %d\n", rc);
- return rc;
- }
+ if (!pa_therm) {
+ pr_err("pm8xxx adc pa_therm not valid\n");
+ return -EINVAL;
+ }
+
+ if (on) {
rc = regulator_set_voltage(pa_therm,
PM8XXX_ADC_PA_THERM_VREG_UV_MIN,
PM8XXX_ADC_PA_THERM_VREG_UV_MAX);
if (rc < 0) {
pr_err("failed to set the voltage for "
"pa_therm with error %d\n", rc);
- goto fail;
+ return rc;
}
rc = regulator_set_optimum_mode(pa_therm,
@@ -265,25 +261,25 @@
if (rc < 0) {
pr_err("failed to set optimum mode for "
"pa_therm with error %d\n", rc);
- goto fail;
+ return rc;
}
- if (regulator_enable(pa_therm)) {
- pr_err("failed to enable pa_therm vreg with "
- "error %d\n", rc);
- goto fail;
+ rc = regulator_enable(pa_therm);
+ if (rc < 0) {
+ pr_err("failed to enable pa_therm vreg "
+ "with error %d\n", rc);
+ return rc;
}
} else {
- if (pa_therm != NULL) {
- regulator_disable(pa_therm);
- regulator_put(pa_therm);
+ rc = regulator_disable(pa_therm);
+ if (rc < 0) {
+ pr_err("failed to disable pa_therm vreg "
+ "with error %d\n", rc);
+ return rc;
}
}
return rc;
-fail:
- regulator_put(pa_therm);
- return rc;
}
static int32_t pm8xxx_adc_channel_power_enable(uint32_t channel,
@@ -293,7 +289,7 @@
switch (channel)
case ADC_MPP_1_AMUX8:
- pm8xxx_adc_patherm_power(power_cntrl);
+ rc = pm8xxx_adc_patherm_power(power_cntrl);
return rc;
}
@@ -769,6 +765,9 @@
struct pm8xxx_adc *adc_pmic = pmic_adc;
int rc = 0;
+ if (!pm8xxx_adc_initialized)
+ return -ENODEV;
+
if (!adc_pmic->mpp_base) {
rc = -EINVAL;
pr_info("PM8xxx MPP base invalid with error %d\n", rc);
@@ -1138,6 +1137,10 @@
wake_lock_destroy(&adc_pmic->adc_wakelock);
platform_set_drvdata(pdev, NULL);
pmic_adc = NULL;
+ if (!pa_therm) {
+ regulator_put(pa_therm);
+ pa_therm = NULL;
+ }
for (i = 0; i < adc_pmic->adc_num_board_channel; i++)
device_remove_file(adc_pmic->dev,
&adc_pmic->sens_attr[i].dev_attr);
@@ -1252,6 +1255,13 @@
dev_err(&pdev->dev, "failed to initialize pm8xxx hwmon adc\n");
}
adc_pmic->hwmon = hwmon_device_register(adc_pmic->dev);
+
+ pa_therm = regulator_get(adc_pmic->dev, "pa_therm");
+ if (IS_ERR(pa_therm)) {
+ rc = PTR_ERR(pa_therm);
+ pr_err("failed to request pa_therm vreg with error %d\n", rc);
+ pa_therm = NULL;
+ }
return 0;
}
diff --git a/drivers/input/touchscreen/atmel_mxt_ts.c b/drivers/input/touchscreen/atmel_mxt_ts.c
index 40aae69..f5bfc7b 100644
--- a/drivers/input/touchscreen/atmel_mxt_ts.c
+++ b/drivers/input/touchscreen/atmel_mxt_ts.c
@@ -25,6 +25,7 @@
#include <linux/debugfs.h>
#include <linux/seq_file.h>
#include <linux/regulator/consumer.h>
+#include <linux/string.h>
#if defined(CONFIG_HAS_EARLYSUSPEND)
#include <linux/earlysuspend.h>
@@ -42,15 +43,32 @@
#define MXT_VER_21 21
#define MXT_VER_22 22
-/* Slave addresses */
-#define MXT_APP_LOW 0x4a
-#define MXT_APP_HIGH 0x4b
-#define MXT_BOOT_LOW 0x24
-#define MXT_BOOT_HIGH 0x25
+/* I2C slave address pairs */
+struct mxt_address_pair {
+ int bootloader;
+ int application;
+};
+
+static const struct mxt_address_pair mxt_slave_addresses[] = {
+ { 0x24, 0x4a },
+ { 0x25, 0x4b },
+ { 0x25, 0x4b },
+ { 0x26, 0x4c },
+ { 0x27, 0x4d },
+ { 0x34, 0x5a },
+ { 0x35, 0x5b },
+ { 0 },
+};
+
+enum mxt_device_state { INIT, APPMODE, BOOTLOADER };
/* Firmware */
#define MXT_FW_NAME "maxtouch.fw"
+/* Firmware frame size including frame data and CRC */
+#define MXT_SINGLE_FW_MAX_FRAME_SIZE 278
+#define MXT_CHIPSET_FW_MAX_FRAME_SIZE 534
+
/* Registers */
#define MXT_FAMILY_ID 0x00
#define MXT_VARIANT_ID 0x01
@@ -215,7 +233,7 @@
#define MXT_RESET_TIME 250 /* msec */
#define MXT_RESET_NOCHGREAD 400 /* msec */
-#define MXT_FWRESET_TIME 175 /* msec */
+#define MXT_FWRESET_TIME 1000 /* msec */
#define MXT_WAKE_TIME 25
@@ -231,6 +249,8 @@
#define MXT_FRAME_CRC_PASS 0x04
#define MXT_APP_CRC_FAIL 0x40 /* valid 7 8 bit only */
#define MXT_BOOT_STATUS_MASK 0x3f
+#define MXT_BOOT_EXTENDED_ID (1 << 5)
+#define MXT_BOOT_ID_MASK 0x1f
/* Touch status */
#define MXT_SUPPRESS (1 << 1)
@@ -299,6 +319,7 @@
struct input_dev *input_dev;
const struct mxt_platform_data *pdata;
const struct mxt_config_info *config_info;
+ enum mxt_device_state state;
struct mxt_object *object_table;
struct mxt_info info;
struct mxt_finger finger[MXT_MAX_FINGER];
@@ -323,6 +344,7 @@
u8 t15_min_reportid;
u8 curr_cfg_version;
int cfg_version_idx;
+ const char *fw_name;
};
static struct dentry *debug_base;
@@ -409,8 +431,116 @@
dev_dbg(dev, "checksum:\t0x%x\n", message->checksum);
}
+static int mxt_switch_to_bootloader_address(struct mxt_data *data)
+{
+ int i;
+ struct i2c_client *client = data->client;
+
+ if (data->state == BOOTLOADER) {
+ dev_err(&client->dev, "Already in BOOTLOADER state\n");
+ return -EINVAL;
+ }
+
+ for (i = 0; mxt_slave_addresses[i].application != 0; i++) {
+ if (mxt_slave_addresses[i].application == client->addr) {
+ dev_info(&client->dev, "Changing to bootloader address: "
+ "%02x -> %02x",
+ client->addr,
+ mxt_slave_addresses[i].bootloader);
+
+ client->addr = mxt_slave_addresses[i].bootloader;
+ data->state = BOOTLOADER;
+ return 0;
+ }
+ }
+
+ dev_err(&client->dev, "Address 0x%02x not found in address table",
+ client->addr);
+ return -EINVAL;
+}
+
+static int mxt_switch_to_appmode_address(struct mxt_data *data)
+{
+ int i;
+ struct i2c_client *client = data->client;
+
+ if (data->state == APPMODE) {
+ dev_err(&client->dev, "Already in APPMODE state\n");
+ return -EINVAL;
+ }
+
+ for (i = 0; mxt_slave_addresses[i].application != 0; i++) {
+ if (mxt_slave_addresses[i].bootloader == client->addr) {
+ dev_info(&client->dev,
+ "Changing to application mode address: "
+ "0x%02x -> 0x%02x",
+ client->addr,
+ mxt_slave_addresses[i].application);
+
+ client->addr = mxt_slave_addresses[i].application;
+ data->state = APPMODE;
+ return 0;
+ }
+ }
+
+ dev_err(&client->dev, "Address 0x%02x not found in address table",
+ client->addr);
+ return -EINVAL;
+}
+
+static int mxt_get_bootloader_version(struct i2c_client *client, u8 val)
+{
+ u8 buf[3];
+
+ if (val | MXT_BOOT_EXTENDED_ID) {
+ dev_dbg(&client->dev,
+ "Retrieving extended mode ID information");
+
+ if (i2c_master_recv(client, &buf[0], 3) != 3) {
+ dev_err(&client->dev, "%s: i2c recv failed\n",
+ __func__);
+ return -EIO;
+ }
+
+ dev_info(&client->dev, "Bootloader ID:%d Version:%d",
+ buf[1], buf[2]);
+
+ return buf[0];
+ } else {
+ dev_info(&client->dev, "Bootloader ID:%d",
+ val & MXT_BOOT_ID_MASK);
+
+ return val;
+ }
+}
+
+static int mxt_get_bootloader_id(struct i2c_client *client)
+{
+ u8 val;
+ u8 buf[3];
+
+ if (i2c_master_recv(client, &val, 1) != 1) {
+ dev_err(&client->dev, "%s: i2c recv failed\n", __func__);
+ return -EIO;
+ }
+
+ if (val | MXT_BOOT_EXTENDED_ID) {
+ if (i2c_master_recv(client, &buf[0], 3) != 3) {
+ dev_err(&client->dev, "%s: i2c recv failed\n",
+ __func__);
+ return -EIO;
+ }
+ return buf[1];
+ } else {
+ dev_info(&client->dev, "Bootloader ID:%d",
+ val & MXT_BOOT_ID_MASK);
+
+ return val & MXT_BOOT_ID_MASK;
+ }
+}
+
static int mxt_check_bootloader(struct i2c_client *client,
- unsigned int state)
+ unsigned int state)
{
u8 val;
@@ -422,19 +552,28 @@
switch (state) {
case MXT_WAITING_BOOTLOAD_CMD:
+ val = mxt_get_bootloader_version(client, val);
+ val &= ~MXT_BOOT_STATUS_MASK;
+ break;
case MXT_WAITING_FRAME_DATA:
+ case MXT_APP_CRC_FAIL:
val &= ~MXT_BOOT_STATUS_MASK;
break;
case MXT_FRAME_CRC_PASS:
if (val == MXT_FRAME_CRC_CHECK)
goto recheck;
+ if (val == MXT_FRAME_CRC_FAIL) {
+ dev_err(&client->dev, "Bootloader CRC fail\n");
+ return -EINVAL;
+ }
break;
default:
return -EINVAL;
}
if (val != state) {
- dev_err(&client->dev, "Unvalid bootloader mode state\n");
+ dev_err(&client->dev, "Invalid bootloader mode state %X\n",
+ val);
return -EINVAL;
}
@@ -457,7 +596,7 @@
}
static int mxt_fw_write(struct i2c_client *client,
- const u8 *data, unsigned int frame_size)
+ const u8 *data, unsigned int frame_size)
{
if (i2c_master_send(client, data, frame_size) != frame_size) {
dev_err(&client->dev, "%s: i2c send failed\n", __func__);
@@ -735,6 +874,11 @@
int id;
u8 reportid;
+ if (data->state != APPMODE) {
+ dev_err(dev, "Ignoring IRQ - not in APPMODE state\n");
+ return IRQ_HANDLED;
+ }
+
do {
if (mxt_read_message(data, &message)) {
dev_err(dev, "Failed to read message\n");
@@ -921,11 +1065,13 @@
if (data->curr_cfg_version == cfg_version ||
!version_match) {
data->config_info = cfg_info;
+ data->fw_name = pdata->config_array[i].fw_name;
return 0;
}
}
}
+ data->fw_name = NULL;
dev_info(&data->client->dev,
"Config not found: F: %d, V: %d, FW: %d.%d.%d, CFG: %d\n",
info->family_id, info->variant_id,
@@ -1003,8 +1149,30 @@
struct mxt_object *t15_object;
error = mxt_get_info(data);
- if (error)
- return error;
+ if (error) {
+ /* Try bootloader mode */
+ error = mxt_switch_to_bootloader_address(data);
+ if (error)
+ return error;
+
+ error = mxt_check_bootloader(client, MXT_APP_CRC_FAIL);
+ if (error)
+ return error;
+
+ dev_err(&client->dev, "Application CRC failure\n");
+ data->state = BOOTLOADER;
+
+ return 0;
+ }
+
+ dev_info(&client->dev,
+ "Family ID: %d Variant ID: %d Version: %d.%d "
+ "Build: 0x%02X Object Num: %d\n",
+ info->family_id, info->variant_id,
+ info->version >> 4, info->version & 0xf,
+ info->build, info->object_num);
+
+ data->state = APPMODE;
data->object_table = kcalloc(info->object_num,
sizeof(struct mxt_object),
@@ -1112,14 +1280,8 @@
info->matrix_ysize = val;
dev_info(&client->dev,
- "Family ID: %d Variant ID: %d Version: %d Build: %d\n",
- info->family_id, info->variant_id, info->version,
- info->build);
-
- dev_info(&client->dev,
- "Matrix X Size: %d Matrix Y Size: %d Object Num: %d\n",
- info->matrix_xsize, info->matrix_ysize,
- info->object_num);
+ "Matrix X Size: %d Matrix Y Size: %d\n",
+ info->matrix_xsize, info->matrix_ysize);
return 0;
@@ -1175,108 +1337,230 @@
return count;
}
+static int strtobyte(const char *data, u8 *value)
+{
+ char str[3];
+
+ str[0] = data[0];
+ str[1] = data[1];
+ str[2] = '\0';
+
+ return kstrtou8(str, 16, value);
+}
+
static int mxt_load_fw(struct device *dev, const char *fn)
{
struct mxt_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
const struct firmware *fw = NULL;
unsigned int frame_size;
+ unsigned int retry = 0;
unsigned int pos = 0;
- int ret;
+ int ret, i, max_frame_size;
+ u8 *frame;
- ret = request_firmware(&fw, fn, dev);
- if (ret) {
- dev_err(dev, "Unable to open firmware %s\n", fn);
- return ret;
+ switch (data->info.family_id) {
+ case MXT224_ID:
+ max_frame_size = MXT_SINGLE_FW_MAX_FRAME_SIZE;
+ break;
+ case MXT1386_ID:
+ max_frame_size = MXT_CHIPSET_FW_MAX_FRAME_SIZE;
+ break;
+ default:
+ return -EINVAL;
}
- /* Change to the bootloader mode */
- mxt_write_object(data, MXT_GEN_COMMAND_T6,
- MXT_COMMAND_RESET, MXT_BOOT_VALUE);
+ frame = kmalloc(max_frame_size, GFP_KERNEL);
+ if (!frame) {
+ dev_err(dev, "Unable to allocate memory for frame data\n");
+ return -ENOMEM;
+ }
- mxt_reset_delay(data);
+ ret = request_firmware(&fw, fn, dev);
+ if (ret < 0) {
+ dev_err(dev, "Unable to open firmware %s\n", fn);
+ goto free_frame;
+ }
- /* Change to slave address of bootloader */
- if (client->addr == MXT_APP_LOW)
- client->addr = MXT_BOOT_LOW;
- else
- client->addr = MXT_BOOT_HIGH;
+ if (data->state != BOOTLOADER) {
+ /* Change to the bootloader mode */
+ mxt_write_object(data, MXT_GEN_COMMAND_T6,
+ MXT_COMMAND_RESET, MXT_BOOT_VALUE);
+ mxt_reset_delay(data);
+
+ ret = mxt_switch_to_bootloader_address(data);
+ if (ret)
+ goto release_firmware;
+ }
ret = mxt_check_bootloader(client, MXT_WAITING_BOOTLOAD_CMD);
- if (ret)
- goto out;
+ if (ret) {
+ /* Bootloader may still be unlocked from previous update
+ * attempt */
+ ret = mxt_check_bootloader(client,
+ MXT_WAITING_FRAME_DATA);
- /* Unlock bootloader */
- mxt_unlock_bootloader(client);
+ if (ret)
+ goto return_to_app_mode;
+ } else {
+ dev_info(dev, "Unlocking bootloader\n");
+ /* Unlock bootloader */
+ mxt_unlock_bootloader(client);
+ }
while (pos < fw->size) {
ret = mxt_check_bootloader(client,
MXT_WAITING_FRAME_DATA);
if (ret)
- goto out;
+ goto release_firmware;
- frame_size = ((*(fw->data + pos) << 8) | *(fw->data + pos + 1));
+ /* Get frame length MSB */
+ ret = strtobyte(fw->data + pos, frame);
+ if (ret)
+ goto release_firmware;
+
+ /* Get frame length LSB */
+ ret = strtobyte(fw->data + pos + 2, frame + 1);
+ if (ret)
+ goto release_firmware;
+
+ frame_size = ((*frame << 8) | *(frame + 1));
/* We should add 2 at frame size as the the firmware data is not
* included the CRC bytes.
*/
frame_size += 2;
+ if (frame_size > max_frame_size) {
+ dev_err(dev, "Invalid frame size - %d\n", frame_size);
+ ret = -EINVAL;
+ goto release_firmware;
+ }
+
+ /* Convert frame data and CRC from hex to binary */
+ for (i = 2; i < frame_size; i++) {
+ ret = strtobyte(fw->data + pos + i * 2, frame + i);
+ if (ret)
+ goto release_firmware;
+ }
+
/* Write one frame to device */
- mxt_fw_write(client, fw->data + pos, frame_size);
+ mxt_fw_write(client, frame, frame_size);
ret = mxt_check_bootloader(client,
MXT_FRAME_CRC_PASS);
- if (ret)
- goto out;
+ if (ret) {
+ retry++;
- pos += frame_size;
+ /* Back off by 20ms per retry */
+ msleep(retry * 20);
- dev_dbg(dev, "Updated %d bytes / %zd bytes\n", pos, fw->size);
+ if (retry > 20)
+ goto release_firmware;
+ } else {
+ retry = 0;
+ pos += frame_size * 2;
+ dev_dbg(dev, "Updated %d/%zd bytes\n", pos, fw->size);
+ }
}
-out:
+return_to_app_mode:
+ mxt_switch_to_appmode_address(data);
+release_firmware:
release_firmware(fw);
-
- /* Change to slave address of application */
- if (client->addr == MXT_BOOT_LOW)
- client->addr = MXT_APP_LOW;
- else
- client->addr = MXT_APP_HIGH;
+free_frame:
+ kfree(frame);
return ret;
}
+static const char *
+mxt_search_fw_name(struct mxt_data *data, u8 bootldr_id)
+{
+ const struct mxt_platform_data *pdata = data->pdata;
+ const struct mxt_config_info *cfg_info;
+ const char *fw_name = NULL;
+ int i;
+
+ for (i = 0; i < pdata->config_array_size; i++) {
+ cfg_info = &pdata->config_array[i];
+ if (bootldr_id == cfg_info->bootldr_id && cfg_info->fw_name) {
+ data->config_info = cfg_info;
+ data->info.family_id = cfg_info->family_id;
+ fw_name = cfg_info->fw_name;
+ }
+ }
+
+ return fw_name;
+}
+
static ssize_t mxt_update_fw_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct mxt_data *data = dev_get_drvdata(dev);
int error;
+ const char *fw_name;
+ u8 bootldr_id;
+
+ /* If fw_name is set, then the existing firmware has an upgrade */
+ if (!data->fw_name) {
+ /*
+ * If the device boots up in the bootloader mode, check if
+ * there is a firmware to upgrade.
+ */
+ if (data->state == BOOTLOADER) {
+ bootldr_id = mxt_get_bootloader_id(data->client);
+ if (bootldr_id <= 0) {
+ dev_err(dev,
+ "Unable to retrieve bootloader id\n");
+ return -EINVAL;
+ }
+ fw_name = mxt_search_fw_name(data, bootldr_id);
+ if (fw_name == NULL) {
+ dev_err(dev,
+ "Unable to find fw from bootloader id\n");
+ return -EINVAL;
+ }
+ } else {
+ /* In APPMODE, if the f/w name does not exist, quit */
+ dev_err(dev,
+ "Firmware name not specified in platform data\n");
+ return -EINVAL;
+ }
+ } else {
+ fw_name = data->fw_name;
+ }
+
+ dev_info(dev, "Upgrading the firmware file to %s\n", fw_name);
disable_irq(data->irq);
- error = mxt_load_fw(dev, MXT_FW_NAME);
+ error = mxt_load_fw(dev, fw_name);
if (error) {
dev_err(dev, "The firmware update failed(%d)\n", error);
count = error;
} else {
- dev_dbg(dev, "The firmware update succeeded\n");
+ dev_info(dev, "The firmware update succeeded\n");
/* Wait for reset */
msleep(MXT_FWRESET_TIME);
+ data->state = INIT;
kfree(data->object_table);
data->object_table = NULL;
+ data->cfg_version_idx = 0;
mxt_initialize(data);
}
- enable_irq(data->irq);
+ if (data->state == APPMODE) {
+ enable_irq(data->irq);
- error = mxt_make_highchg(data);
- if (error)
- return error;
+ error = mxt_make_highchg(data);
+ if (error)
+ return error;
+ }
return count;
}
@@ -1345,10 +1629,12 @@
struct mxt_data *data = input_get_drvdata(dev);
int error;
- error = mxt_start(data);
- if (error < 0) {
- dev_err(&data->client->dev, "mxt_start failed in input_open\n");
- return error;
+ if (data->state == APPMODE) {
+ error = mxt_start(data);
+ if (error < 0) {
+ dev_err(&data->client->dev, "mxt_start failed in input_open\n");
+ return error;
+ }
}
return 0;
@@ -1359,10 +1645,11 @@
struct mxt_data *data = input_get_drvdata(dev);
int error;
- error = mxt_stop(data);
- if (error < 0)
- dev_err(&data->client->dev, "mxt_stop failed in input_close\n");
-
+ if (data->state == APPMODE) {
+ error = mxt_stop(data);
+ if (error < 0)
+ dev_err(&data->client->dev, "mxt_stop failed in input_close\n");
+ }
}
static int reg_set_optimum_mode_check(struct regulator *reg, int load_uA)
@@ -1818,6 +2105,7 @@
goto err_free_mem;
}
+ data->state = INIT;
input_dev->name = "atmel_mxt_ts";
input_dev->id.bustype = BUS_I2C;
input_dev->dev.parent = &client->dev;
@@ -1941,9 +2229,13 @@
goto err_free_object;
}
- error = mxt_make_highchg(data);
- if (error)
- goto err_free_irq;
+ if (data->state == APPMODE) {
+ error = mxt_make_highchg(data);
+ if (error) {
+ dev_err(&client->dev, "Failed to make high CHG\n");
+ goto err_free_irq;
+ }
+ }
error = input_register_device(input_dev);
if (error)
diff --git a/drivers/media/radio/radio-iris.c b/drivers/media/radio/radio-iris.c
index 476300c..793f063 100644
--- a/drivers/media/radio/radio-iris.c
+++ b/drivers/media/radio/radio-iris.c
@@ -2609,7 +2609,7 @@
} else
retval = -EINVAL;
-
+ break;
case V4L2_CID_PRIVATE_INTF_HIGH_THRESHOLD:
retval = hci_cmd(HCI_FM_GET_DET_CH_TH_CMD, radio->fm_hdev);
if (retval < 0) {
diff --git a/drivers/media/radio/radio-tavarua.c b/drivers/media/radio/radio-tavarua.c
index 1c4f616..5ec2932 100644
--- a/drivers/media/radio/radio-tavarua.c
+++ b/drivers/media/radio/radio-tavarua.c
@@ -2582,6 +2582,7 @@
{
struct tavarua_device *radio = video_get_drvdata(video_devdata(file));
int retval = 0;
+ int cnt = 0;
unsigned char xfr_buf[XFR_REG_NUM];
signed char cRmssiThreshold;
signed char ioc;
@@ -2712,6 +2713,69 @@
ctrl->value = GET_REG_FIELD(radio->registers[IOCTRL],
IOC_ANTENNA_OFFSET, IOC_ANTENNA_MASK);
break;
+ case V4L2_CID_PRIVATE_INTF_LOW_THRESHOLD:
+ size = 0x04;
+ xfr_buf[0] = (XFR_PEEK_MODE | (size << 1));
+ xfr_buf[1] = ON_CHANNEL_TH_MSB;
+ xfr_buf[2] = ON_CHANNEL_TH_LSB;
+ retval = tavarua_write_registers(radio, XFRCTRL, xfr_buf, 3);
+ if (retval < 0) {
+ pr_err("%s: Failed to write\n", __func__);
+ return retval;
+ }
+ /*Wait for the XFR interrupt */
+ msleep(TAVARUA_DELAY*10);
+ retval = tavarua_read_registers(radio, XFRDAT0, 4);
+ if (retval < 0) {
+ pr_err("%s: On Ch. DET: Read failure\n", __func__);
+ return retval;
+ }
+ for (cnt = 0; cnt < 4; cnt++)
+ FMDBG("On-Channel data set is : 0x%x\t",
+ (int)radio->registers[XFRDAT0+cnt]);
+
+ ctrl->value = LSH_DATA(radio->registers[XFRDAT0], 24) |
+ LSH_DATA(radio->registers[XFRDAT0+1], 16) |
+ LSH_DATA(radio->registers[XFRDAT0+2], 8) |
+ (radio->registers[XFRDAT0+3]);
+ FMDBG("The On Channel Threshold value is : 0x%x", ctrl->value);
+ break;
+ case V4L2_CID_PRIVATE_INTF_HIGH_THRESHOLD:
+ size = 0x04;
+ xfr_buf[0] = (XFR_PEEK_MODE | (size << 1));
+ xfr_buf[1] = OFF_CHANNEL_TH_MSB;
+ xfr_buf[2] = OFF_CHANNEL_TH_LSB;
+ retval = tavarua_write_registers(radio, XFRCTRL, xfr_buf, 3);
+ if (retval < 0) {
+ pr_err("%s: Failed to write\n", __func__);
+ return retval;
+ }
+ /*Wait for the XFR interrupt */
+ msleep(TAVARUA_DELAY*10);
+ retval = tavarua_read_registers(radio, XFRDAT0, 4);
+ if (retval < 0) {
+ pr_err("%s: Off Ch. DET: Read failure\n", __func__);
+ return retval;
+ }
+ for (cnt = 0; cnt < 4; cnt++)
+ FMDBG("Off-channel data set is : 0x%x\t",
+ (int)radio->registers[XFRDAT0+cnt]);
+
+ ctrl->value = LSH_DATA(radio->registers[XFRDAT0], 24) |
+ LSH_DATA(radio->registers[XFRDAT0+1], 16) |
+ LSH_DATA(radio->registers[XFRDAT0+2], 8) |
+ (radio->registers[XFRDAT0+3]);
+ FMDBG("The Off Channel Threshold value is : 0x%x", ctrl->value);
+ break;
+ /*
+ * These IOCTL's are place holders to keep the
+ * driver compatible with change in frame works for IRIS
+ */
+ case V4L2_CID_PRIVATE_SINR_THRESHOLD:
+ case V4L2_CID_PRIVATE_SINR_SAMPLES:
+ case V4L2_CID_PRIVATE_IRIS_GET_SINR:
+ retval = 0;
+ break;
default:
retval = -EINVAL;
}
@@ -3090,7 +3154,7 @@
SET_REG_FIELD(radio->registers[IOCTRL], ctrl->value,
IOC_ANTENNA_OFFSET, IOC_ANTENNA_MASK);
break;
- case V4L2_CID_PRIVATE_TAVARUA_ON_CHANNEL_THRESHOLD:
+ case V4L2_CID_PRIVATE_INTF_LOW_THRESHOLD:
size = 0x04;
/* Poking the value of ON Channel Threshold value */
xfr_buf[0] = (XFR_POKE_MODE | (size << 1));
@@ -3110,39 +3174,13 @@
retval = tavarua_write_registers(radio, XFRCTRL,
xfr_buf, size+3);
if (retval < 0) {
- FMDBG("Failed to write\n");
- return retval;
- }
- /*Wait for the XFR interrupt */
- msleep(TAVARUA_DELAY*15);
-
- for (cnt = 0; cnt < 5; cnt++) {
- xfr_buf[cnt] = 0;
- radio->registers[XFRDAT0+cnt] = 0x0;
- }
-
- /* Peeking Regs 0x88C2-0x88C4 */
- size = 0x04;
- xfr_buf[0] = (XFR_PEEK_MODE | (size << 1));
- xfr_buf[1] = ON_CHANNEL_TH_MSB;
- xfr_buf[2] = ON_CHANNEL_TH_LSB;
- retval = tavarua_write_registers(radio, XFRCTRL, xfr_buf, 3);
- if (retval < 0) {
pr_err("%s: Failed to write\n", __func__);
return retval;
}
/*Wait for the XFR interrupt */
msleep(TAVARUA_DELAY*10);
- retval = tavarua_read_registers(radio, XFRDAT0, 4);
- if (retval < 0) {
- pr_err("%s: On Ch. DET: Read failure\n", __func__);
- return retval;
- }
- for (cnt = 0; cnt < 4; cnt++)
- FMDBG("On-Channel data set is : 0x%x\t",
- (int)radio->registers[XFRDAT0+cnt]);
break;
- case V4L2_CID_PRIVATE_TAVARUA_OFF_CHANNEL_THRESHOLD:
+ case V4L2_CID_PRIVATE_INTF_HIGH_THRESHOLD:
size = 0x04;
/* Poking the value of OFF Channel Threshold value */
xfr_buf[0] = (XFR_POKE_MODE | (size << 1));
@@ -3167,32 +3205,6 @@
}
/*Wait for the XFR interrupt */
msleep(TAVARUA_DELAY*10);
-
- for (cnt = 0; cnt < 5; cnt++) {
- xfr_buf[cnt] = 0;
- radio->registers[XFRDAT0+cnt] = 0x0;
- }
-
- /* Peeking Regs 0x88C2-0x88C4 */
- size = 0x04;
- xfr_buf[0] = (XFR_PEEK_MODE | (size << 1));
- xfr_buf[1] = OFF_CHANNEL_TH_MSB;
- xfr_buf[2] = OFF_CHANNEL_TH_LSB;
- retval = tavarua_write_registers(radio, XFRCTRL, xfr_buf, 3);
- if (retval < 0) {
- pr_err("%s: Failed to write\n", __func__);
- return retval;
- }
- /*Wait for the XFR interrupt */
- msleep(TAVARUA_DELAY*10);
- retval = tavarua_read_registers(radio, XFRDAT0, 4);
- if (retval < 0) {
- pr_err("%s: Off Ch. DET: Read failure\n", __func__);
- return retval;
- }
- for (cnt = 0; cnt < 4; cnt++)
- FMDBG("Off-channel data set is : 0x%x\t",
- (int)radio->registers[XFRDAT0+cnt]);
break;
/* TX Controls */
@@ -3264,6 +3276,8 @@
case V4L2_CID_PRIVATE_RDS_GRP_COUNTERS:
case V4L2_CID_PRIVATE_SET_NOTCH_FILTER:
case V4L2_CID_PRIVATE_TAVARUA_DO_CALIBRATION:
+ case V4L2_CID_PRIVATE_SINR_THRESHOLD:
+ case V4L2_CID_PRIVATE_SINR_SAMPLES:
retval = 0;
break;
default:
diff --git a/drivers/media/video/msm/Kconfig b/drivers/media/video/msm/Kconfig
index e70a0a5..a4b4b0d 100644
--- a/drivers/media/video/msm/Kconfig
+++ b/drivers/media/video/msm/Kconfig
@@ -48,9 +48,16 @@
depends on MSM_CAMERA
---help---
OV 5M Bayer Sensor with AutoFocus
+
+config AD5046_ACT
+ bool "Lens actuator ad5046"
+ depends on MSM_CAMERA && OV5647
+ ---help---
+ ad5046 lens actuator driver for ov5647.
+ Say Y here if this is msm7627A variant platform.
config WEBCAM_OV7692_QRD
bool "Sensor OV7692 QRD(VGA YUV)"
- depends on MSM_CAMERA && ARCH_MSM7X27A && !MSM_CAMERA_V4L2
+ depends on MSM_CAMERA && ARCH_MSM7X27A
default n
---help---
Omni Vision VGA YUV Sensor for QRD Devices
diff --git a/drivers/media/video/msm/Makefile b/drivers/media/video/msm/Makefile
index 8703669..2843d30 100644
--- a/drivers/media/video/msm/Makefile
+++ b/drivers/media/video/msm/Makefile
@@ -39,15 +39,14 @@
obj-$(CONFIG_IMX074) += imx074.o imx074_reg.o
obj-$(CONFIG_MT9E013) += mt9e013.o mt9e013_reg.o
obj-$(CONFIG_WEBCAM_OV9726) += ov9726.o ov9726_reg.o
+ obj-$(CONFIG_OV5647) += ov5647.o ov5647_reg.o
obj-$(CONFIG_S5K4E1) += s5k4e1.o s5k4e1_reg.o
+ obj-$(CONFIG_WEBCAM_OV7692) += ov7692.o
+ obj-$(CONFIG_WEBCAM_OV7692_QRD) += ov7692_qrd.o
endif
obj-$(CONFIG_QS_S5K4E1) += qs_s5k4e1.o qs_s5k4e1_reg.o
obj-$(CONFIG_VB6801) += vb6801.o
obj-$(CONFIG_IMX072) += imx072.o imx072_reg.o
-obj-$(CONFIG_WEBCAM_OV9726) += ov9726.o ov9726_reg.o
-obj-$(CONFIG_OV5647) += ov5647.o ov5647_reg.o
-obj-$(CONFIG_WEBCAM_OV7692) += ov7692.o
-obj-$(CONFIG_WEBCAM_OV7692_QRD) += ov7692_qrd.o
obj-$(CONFIG_OV5640) += ov5640.o
obj-$(CONFIG_MT9D112) += mt9d112.o mt9d112_reg.o
diff --git a/drivers/media/video/msm/actuators/Makefile b/drivers/media/video/msm/actuators/Makefile
index f0a0c69..d492155 100644
--- a/drivers/media/video/msm/actuators/Makefile
+++ b/drivers/media/video/msm/actuators/Makefile
@@ -4,3 +4,4 @@
obj-$(CONFIG_MSM_ACTUATOR) += msm_actuator.o
obj-$(CONFIG_IMX074_ACT) += imx074_act.o
obj-$(CONFIG_DW9712_ACT) += dw9712_act.o
+obj-$(CONFIG_AD5046_ACT) += ad5046_act.o
diff --git a/drivers/media/video/msm/actuators/ad5046_act.c b/drivers/media/video/msm/actuators/ad5046_act.c
new file mode 100644
index 0000000..d99774b
--- /dev/null
+++ b/drivers/media/video/msm/actuators/ad5046_act.c
@@ -0,0 +1,315 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include "msm_actuator.h"
+#include "msm_camera_i2c.h"
+
+#define AD5046_TOTAL_STEPS_NEAR_TO_FAR 32
+static uint8_t mode_mask = 0x09;
+DEFINE_MUTEX(ad5046_act_mutex);
+static struct msm_actuator_ctrl_t ad5046_act_t;
+
+static struct region_params_t g_regions[] = {
+ /* step_bound[0] - macro side boundary
+ * step_bound[1] - infinity side boundary
+ */
+ /* Region 1 */
+ {
+ .step_bound = {AD5046_TOTAL_STEPS_NEAR_TO_FAR, 0},
+ .code_per_step = 2,
+ },
+};
+
+static uint16_t g_scenario[] = {
+ /* MOVE_NEAR and MOVE_FAR dir*/
+ AD5046_TOTAL_STEPS_NEAR_TO_FAR,
+};
+
+static int32_t ad5046_af_i2c_txdata(unsigned short saddr,
+ unsigned char *txdata, int length,
+ struct msm_actuator_ctrl_t *a_ctrl)
+{
+ struct i2c_msg msg[] = {
+ {
+ .addr = saddr,
+ .flags = 0,
+ .len = length,
+ .buf = txdata,
+ },
+ };
+ if (i2c_transfer(a_ctrl->i2c_client.client->adapter, msg, 1) < 0) {
+ pr_err("ad5046_af_i2c_txdata faild 0x%x\n", saddr);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int32_t ad5046_af_i2c_write_b_sensor(struct msm_actuator_ctrl_t *a_ctrl,
+ uint8_t waddr, uint8_t bdata)
+{
+ int32_t rc = -EFAULT;
+ unsigned char buf[2];
+
+ memset(buf, 0, sizeof(buf));
+ buf[0] = waddr;
+ buf[1] = bdata;
+ rc = ad5046_af_i2c_txdata(a_ctrl->i2c_addr, buf, 2, a_ctrl);
+ if (rc < 0)
+ pr_err("i2c_write_b failed, addr = 0x%x, val = 0x%x!\n",
+ waddr, bdata);
+
+ return rc;
+}
+
+static int32_t ad5046_wrapper_i2c_write(struct msm_actuator_ctrl_t *a_ctrl,
+ int16_t next_lens_position, void *params)
+{
+ uint8_t msb, lsb;
+
+ msb = (next_lens_position & 0xFF00) >> 8;
+ lsb = next_lens_position & 0xFF;
+ ad5046_af_i2c_write_b_sensor(a_ctrl, msb, lsb);
+
+ return 0;
+}
+
+int32_t msm_ad5046_act_move_focus(
+ struct msm_actuator_ctrl_t *a_ctrl,
+ int dir,
+ int32_t num_steps)
+{
+ int32_t rc = 0;
+ int8_t sign_dir = 0;
+ int16_t dest_step_pos = 0;
+ uint8_t code_val_msb, code_val_lsb;
+
+ CDBG("%s called, dir %d, num_steps %d\n",
+ __func__,
+ dir,
+ num_steps);
+
+ /* Determine sign direction */
+ if (dir == MOVE_NEAR)
+ sign_dir = 20;
+ else if (dir == MOVE_FAR)
+ sign_dir = -20;
+ else {
+ pr_err("Illegal focus direction\n");
+ rc = -EINVAL;
+ return rc;
+ }
+
+ /* Determine destination step position */
+ dest_step_pos = a_ctrl->curr_step_pos +
+ (sign_dir * num_steps);
+
+ if (dest_step_pos < 0)
+ dest_step_pos = 0;
+ else if (dest_step_pos > 1023)
+ dest_step_pos = 1023;
+
+ if (dest_step_pos == a_ctrl->curr_step_pos)
+ return rc;
+
+ a_ctrl->curr_step_pos = dest_step_pos;
+
+ code_val_msb = (uint8_t)((dest_step_pos & 0x03FF) >> 4);
+ code_val_lsb = (uint8_t)((dest_step_pos & 0x000F) << 4);
+ code_val_lsb |= mode_mask;
+
+ rc = ad5046_af_i2c_write_b_sensor(a_ctrl, code_val_msb, code_val_lsb);
+ /* DAC Setting */
+ if (rc != 0) {
+ CDBG(KERN_ERR "%s: WRITE ERROR lsb = 0x%x, msb = 0x%x",
+ __func__, code_val_lsb, code_val_msb);
+ } else {
+ CDBG(KERN_ERR "%s: Successful lsb = 0x%x, msb = 0x%x",
+ __func__, code_val_lsb, code_val_msb);
+ /* delay may set based on the steps moved
+ when I2C write successful */
+ msleep(100);
+ }
+ return 0;
+}
+
+static int32_t ad5046_set_default_focus(
+ struct msm_actuator_ctrl_t *a_ctrl)
+{
+ uint8_t code_val_msb = 0;
+ uint8_t code_val_lsb = 0;
+ int rc = 0;
+
+ CDBG("ad5046_set_default_focus called\n");
+
+ if (!a_ctrl->step_position_table)
+ a_ctrl->func_tbl.actuator_init_table(a_ctrl);
+
+ a_ctrl->curr_step_pos = 200;
+
+ code_val_msb = (a_ctrl->curr_step_pos & 0x03FF) >> 4;
+ code_val_lsb = (a_ctrl->curr_step_pos & 0x000F) << 4;
+ code_val_lsb |= mode_mask;
+
+ CDBG(KERN_ERR "ad5046_set_default_focus:lens pos = %d",
+ a_ctrl->curr_step_pos);
+ rc = ad5046_af_i2c_write_b_sensor(a_ctrl, code_val_msb, code_val_lsb);
+ /* DAC Setting */
+ if (rc != 0)
+ CDBG(KERN_ERR "%s: WRITE ERROR lsb = 0x%x, msb = 0x%x",
+ __func__, code_val_lsb, code_val_msb);
+ else
+ CDBG(KERN_ERR "%s: WRITE successful lsb = 0x%x, msb = 0x%x",
+ __func__, code_val_lsb, code_val_msb);
+
+ usleep_range(10000, 11000);
+ return 0;
+}
+
+static const struct i2c_device_id ad5046_act_i2c_id[] = {
+ {"ad5046_act", (kernel_ulong_t)&ad5046_act_t},
+ { }
+};
+
+static int ad5046_act_config(void __user *argp)
+{
+ LINFO("%s called\n", __func__);
+ return (int) msm_actuator_config(&ad5046_act_t, argp);
+}
+
+static int ad5046_i2c_add_driver_table(void)
+{
+ LINFO("%s called\n", __func__);
+ return (int) msm_actuator_init_table(&ad5046_act_t);
+}
+
+int32_t ad5046_act_i2c_probe(
+ struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ int32_t rc = 0;
+
+ rc = msm_actuator_i2c_probe(client, id);
+
+ msleep(50);
+
+ return rc;
+}
+static struct i2c_driver ad5046_act_i2c_driver = {
+ .id_table = ad5046_act_i2c_id,
+ .probe = ad5046_act_i2c_probe,
+ .remove = __exit_p(ad5046_act_i2c_remove),
+ .driver = {
+ .name = "ad5046_act",
+ },
+};
+
+static int __init ad5046_i2c_add_driver(void)
+{
+ int rc = 0;
+
+ LINFO("%s called :%x\n", __func__, ad5046_act_t.i2c_addr);
+ rc = i2c_add_driver(ad5046_act_t.i2c_driver);
+ LINFO("%s called:%d %x\n", __func__, rc, ad5046_act_t.i2c_addr);
+ return rc;
+}
+
+static struct v4l2_subdev_core_ops ad5046_act_subdev_core_ops;
+
+static struct v4l2_subdev_ops ad5046_act_subdev_ops = {
+ .core = &ad5046_act_subdev_core_ops,
+};
+
+static int32_t ad5046_act_create_subdevice(
+ void *board_info,
+ void *sdev)
+{
+ int rc = 0;
+
+ struct msm_actuator_info *ptr;
+ LINFO("%s called\n", __func__);
+
+ ptr = board_info;
+ ad5046_act_t.vcm_pwd = ptr->vcm_pwd;
+ ad5046_act_t.vcm_enable = ptr->vcm_enable;
+ LINFO("vcm info: %x %x\n", ad5046_act_t.vcm_pwd,
+ ad5046_act_t.vcm_enable);
+ if (ad5046_act_t.vcm_enable) {
+ rc = gpio_request(ad5046_act_t.vcm_pwd, "ov5647_af");
+ if (!rc) {
+ LINFO("Enable VCM PWD\n");
+ gpio_direction_output(ad5046_act_t.vcm_pwd, 1);
+ }
+ msleep(20);
+
+ }
+ return (int) msm_actuator_create_subdevice(&ad5046_act_t,
+ ptr->board_info,
+ (struct v4l2_subdev *)sdev);
+}
+
+static struct msm_actuator_ctrl_t ad5046_act_t = {
+ .i2c_driver = &ad5046_act_i2c_driver,
+ .i2c_addr = 0x18>>1,
+ .act_v4l2_subdev_ops = &ad5046_act_subdev_ops,
+ .actuator_ext_ctrl = {
+ .a_init_table = ad5046_i2c_add_driver_table,
+ .a_create_subdevice = ad5046_act_create_subdevice,
+ .a_config = ad5046_act_config,
+ },
+
+ .i2c_client = {
+ .addr_type = MSM_CAMERA_I2C_WORD_ADDR,
+ },
+
+ .set_info = {
+ .total_steps = AD5046_TOTAL_STEPS_NEAR_TO_FAR,
+ },
+
+ .curr_step_pos = 0,
+ .curr_region_index = 0,
+ .initial_code = 0x0,
+ .actuator_mutex = &ad5046_act_mutex,
+
+ .func_tbl = {
+ .actuator_init_table = msm_actuator_init_table,
+ .actuator_move_focus = msm_ad5046_act_move_focus,
+ .actuator_set_default_focus = ad5046_set_default_focus,
+ .actuator_i2c_write = ad5046_wrapper_i2c_write,
+ },
+
+ .get_info = {
+ .focal_length_num = 46,
+ .focal_length_den = 10,
+ .f_number_num = 265,
+ .f_number_den = 100,
+ .f_pix_num = 14,
+ .f_pix_den = 10,
+ .total_f_dist_num = 197681,
+ .total_f_dist_den = 1000,
+ },
+
+ /* Initialize scenario */
+ .ringing_scenario[MOVE_NEAR] = g_scenario,
+ .scenario_size[MOVE_NEAR] = ARRAY_SIZE(g_scenario),
+ .ringing_scenario[MOVE_FAR] = g_scenario,
+ .scenario_size[MOVE_FAR] = ARRAY_SIZE(g_scenario),
+
+ /* Initialize region params */
+ .region_params = g_regions,
+ .region_size = ARRAY_SIZE(g_regions),
+};
+
+subsys_initcall(ad5046_i2c_add_driver);
+MODULE_DESCRIPTION("AD5046 actuator");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/media/video/msm/actuators/dw9712_act.c b/drivers/media/video/msm/actuators/dw9712_act.c
index 562290f..546cffa 100644
--- a/drivers/media/video/msm/actuators/dw9712_act.c
+++ b/drivers/media/video/msm/actuators/dw9712_act.c
@@ -101,9 +101,9 @@
/* Determine sign direction */
if (dir == MOVE_NEAR)
- sign_dir = 1;
+ sign_dir = 16;
else if (dir == MOVE_FAR)
- sign_dir = -1;
+ sign_dir = -16;
else {
pr_err("Illegal focus direction\n");
rc = -EINVAL;
diff --git a/drivers/media/video/msm/actuators/imx074_act.c b/drivers/media/video/msm/actuators/imx074_act.c
index fab3a21..aa6f966 100644
--- a/drivers/media/video/msm/actuators/imx074_act.c
+++ b/drivers/media/video/msm/actuators/imx074_act.c
@@ -90,6 +90,42 @@
return rc;
}
+int32_t imx074_act_move_focus(
+ struct msm_actuator_ctrl_t *a_ctrl,
+ int dir,
+ int32_t num_steps)
+{
+ int32_t step_direction, dest_step_position, bit_mask;
+ int32_t rc = 0;
+
+ if (num_steps == 0)
+ return rc;
+
+ if (dir == MOVE_NEAR) {
+ step_direction = 1;
+ bit_mask = 0x80;
+ } else if (dir == MOVE_FAR) {
+ step_direction = -1;
+ bit_mask = 0x00;
+ } else {
+ CDBG("imx074_move_focus: Illegal focus direction");
+ return -EINVAL;
+ }
+ dest_step_position = a_ctrl->curr_step_pos +
+ (step_direction * num_steps);
+ if (dest_step_position < 0)
+ dest_step_position = 0;
+ else if (dest_step_position > IMX074_TOTAL_STEPS_NEAR_TO_FAR)
+ dest_step_position = IMX074_TOTAL_STEPS_NEAR_TO_FAR;
+
+ msm_camera_i2c_write(&a_ctrl->i2c_client,
+ 0x00,
+ ((num_steps * g_regions[0].code_per_step) | bit_mask),
+ MSM_CAMERA_I2C_BYTE_DATA);
+ a_ctrl->curr_step_pos = dest_step_position;
+ return rc;
+}
+
static int32_t imx074_set_default_focus(
struct msm_actuator_ctrl_t *a_ctrl)
{
@@ -228,7 +264,7 @@
.func_tbl = {
.actuator_init_table = msm_actuator_init_table,
- .actuator_move_focus = msm_actuator_move_focus,
+ .actuator_move_focus = imx074_act_move_focus,
.actuator_write_focus = imx074_act_write_focus,
.actuator_set_default_focus = imx074_set_default_focus,
.actuator_init_focus = imx074_act_init_focus,
@@ -244,6 +280,10 @@
.f_pix_den = 10,
.total_f_dist_num = 197681,
.total_f_dist_den = 1000,
+ .hor_view_angle_num = 548,
+ .hor_view_angle_den = 10,
+ .ver_view_angle_num = 425,
+ .ver_view_angle_den = 10,
},
/* Initialize scenario */
diff --git a/drivers/media/video/msm/csi/msm_csid.c b/drivers/media/video/msm/csi/msm_csid.c
index 7a0ee4d..d7abaa9 100644
--- a/drivers/media/video/msm/csi/msm_csid.c
+++ b/drivers/media/video/msm/csi/msm_csid.c
@@ -117,7 +117,8 @@
uint32_t irq;
struct csid_device *csid_dev = data;
irq = msm_io_r(csid_dev->base + CSID_IRQ_STATUS_ADDR);
- CDBG("%s CSID_IRQ_STATUS_ADDR = 0x%x\n", __func__, irq);
+ CDBG("%s CSID%d_IRQ_STATUS_ADDR = 0x%x\n",
+ __func__, csid_dev->pdev->id, irq);
msm_io_w(irq, csid_dev->base + CSID_IRQ_CLEAR_CMD_ADDR);
return IRQ_HANDLED;
}
@@ -138,6 +139,10 @@
{"csi_pclk", -1},
};
+static struct camera_vreg_t csid_vreg_info[] = {
+ {"mipi_csi_vdd", REG_LDO, 1200000, 1200000, 20000},
+};
+
static int msm_csid_init(struct v4l2_subdev *sd, uint32_t *csid_version)
{
int rc = 0;
@@ -155,20 +160,45 @@
return rc;
}
+ rc = msm_camera_config_vreg(&csid_dev->pdev->dev, csid_vreg_info,
+ ARRAY_SIZE(csid_vreg_info), &csid_dev->csi_vdd, 1);
+ if (rc < 0) {
+ pr_err("%s: regulator on failed\n", __func__);
+ goto vreg_config_failed;
+ }
+
+ rc = msm_camera_enable_vreg(&csid_dev->pdev->dev, csid_vreg_info,
+ ARRAY_SIZE(csid_vreg_info), &csid_dev->csi_vdd, 1);
+ if (rc < 0) {
+ pr_err("%s: regulator enable failed\n", __func__);
+ goto vreg_enable_failed;
+ }
+
rc = msm_cam_clk_enable(&csid_dev->pdev->dev, csid_clk_info,
csid_dev->csid_clk, ARRAY_SIZE(csid_clk_info), 1);
if (rc < 0) {
- iounmap(csid_dev->base);
- return rc;
+ pr_err("%s: regulator enable failed\n", __func__);
+ goto clk_enable_failed;
}
+ csid_dev->hw_version =
+ msm_io_r(csid_dev->base + CSID_HW_VERSION_ADDR);
+ *csid_version = csid_dev->hw_version;
+
#if DBG_CSID
enable_irq(csid_dev->irq->start);
#endif
-
- *csid_version = csid_dev->hw_version;
-
return 0;
+
+clk_enable_failed:
+ msm_camera_enable_vreg(&csid_dev->pdev->dev, csid_vreg_info,
+ ARRAY_SIZE(csid_vreg_info), &csid_dev->csi_vdd, 0);
+vreg_enable_failed:
+ msm_camera_config_vreg(&csid_dev->pdev->dev, csid_vreg_info,
+ ARRAY_SIZE(csid_vreg_info), &csid_dev->csi_vdd, 0);
+vreg_config_failed:
+ iounmap(csid_dev->base);
+ return rc;
}
static int msm_csid_release(struct v4l2_subdev *sd)
@@ -183,6 +213,12 @@
msm_cam_clk_enable(&csid_dev->pdev->dev, csid_clk_info,
csid_dev->csid_clk, ARRAY_SIZE(csid_clk_info), 0);
+ msm_camera_enable_vreg(&csid_dev->pdev->dev, csid_vreg_info,
+ ARRAY_SIZE(csid_vreg_info), &csid_dev->csi_vdd, 0);
+
+ msm_camera_config_vreg(&csid_dev->pdev->dev, csid_vreg_info,
+ ARRAY_SIZE(csid_vreg_info), &csid_dev->csi_vdd, 0);
+
iounmap(csid_dev->base);
return 0;
}
@@ -190,19 +226,27 @@
static long msm_csid_subdev_ioctl(struct v4l2_subdev *sd,
unsigned int cmd, void *arg)
{
+ int rc = -ENOIOCTLCMD;
struct csid_cfg_params cfg_params;
+ struct csid_device *csid_dev = v4l2_get_subdevdata(sd);
+ mutex_lock(&csid_dev->mutex);
switch (cmd) {
case VIDIOC_MSM_CSID_CFG:
cfg_params.subdev = sd;
cfg_params.parms = arg;
- return msm_csid_config((struct csid_cfg_params *)&cfg_params);
+ rc = msm_csid_config((struct csid_cfg_params *)&cfg_params);
+ break;
case VIDIOC_MSM_CSID_INIT:
- return msm_csid_init(sd, (uint32_t *)arg);
+ rc = msm_csid_init(sd, (uint32_t *)arg);
+ break;
case VIDIOC_MSM_CSID_RELEASE:
- return msm_csid_release(sd);
+ rc = msm_csid_release(sd);
+ break;
default:
- return -ENOIOCTLCMD;
+ pr_err("%s: command not found\n", __func__);
}
+ mutex_unlock(&csid_dev->mutex);
+ return rc;
}
static struct v4l2_subdev_core_ops msm_csid_subdev_core_ops = {
@@ -263,17 +307,6 @@
}
disable_irq(new_csid_dev->irq->start);
- new_csid_dev->base = ioremap(new_csid_dev->mem->start,
- resource_size(new_csid_dev->mem));
- if (!new_csid_dev->base) {
- rc = -ENOMEM;
- goto csid_no_resource;
- }
-
- new_csid_dev->hw_version =
- msm_io_r(new_csid_dev->base + CSID_HW_VERSION_ADDR);
- iounmap(new_csid_dev->base);
-
new_csid_dev->pdev = pdev;
return 0;
diff --git a/drivers/media/video/msm/csi/msm_csid.h b/drivers/media/video/msm/csi/msm_csid.h
index f90abf2..105cd49 100644
--- a/drivers/media/video/msm/csi/msm_csid.h
+++ b/drivers/media/video/msm/csi/msm_csid.h
@@ -23,6 +23,7 @@
struct resource *mem;
struct resource *irq;
struct resource *io;
+ struct regulator *csi_vdd;
void __iomem *base;
struct mutex mutex;
uint32_t hw_version;
diff --git a/drivers/media/video/msm/csi/msm_csiphy.c b/drivers/media/video/msm/csi/msm_csiphy.c
index 315cca7..a30dc29 100644
--- a/drivers/media/video/msm/csi/msm_csiphy.c
+++ b/drivers/media/video/msm/csi/msm_csiphy.c
@@ -108,19 +108,24 @@
struct csiphy_device *csiphy_dev = data;
irq = msm_io_r(csiphy_dev->base + MIPI_CSIPHY_INTERRUPT_STATUS0_ADDR);
msm_io_w(irq, csiphy_dev->base + MIPI_CSIPHY_INTERRUPT_CLEAR0_ADDR);
- CDBG("%s MIPI_CSIPHY_INTERRUPT_STATUS0 = 0x%x\n", __func__, irq);
+ CDBG("%s MIPI_CSIPHY%d_INTERRUPT_STATUS0 = 0x%x\n",
+ __func__, csiphy_dev->pdev->id, irq);
irq = msm_io_r(csiphy_dev->base + MIPI_CSIPHY_INTERRUPT_STATUS1_ADDR);
msm_io_w(irq, csiphy_dev->base + MIPI_CSIPHY_INTERRUPT_CLEAR1_ADDR);
- CDBG("%s MIPI_CSIPHY_INTERRUPT_STATUS1 = 0x%x\n", __func__, irq);
+ CDBG("%s MIPI_CSIPHY%d_INTERRUPT_STATUS1 = 0x%x\n",
+ __func__, csiphy_dev->pdev->id, irq);
irq = msm_io_r(csiphy_dev->base + MIPI_CSIPHY_INTERRUPT_STATUS2_ADDR);
msm_io_w(irq, csiphy_dev->base + MIPI_CSIPHY_INTERRUPT_CLEAR2_ADDR);
- CDBG("%s MIPI_CSIPHY_INTERRUPT_STATUS2 = 0x%x\n", __func__, irq);
+ CDBG("%s MIPI_CSIPHY%d_INTERRUPT_STATUS2 = 0x%x\n",
+ __func__, csiphy_dev->pdev->id, irq);
irq = msm_io_r(csiphy_dev->base + MIPI_CSIPHY_INTERRUPT_STATUS3_ADDR);
msm_io_w(irq, csiphy_dev->base + MIPI_CSIPHY_INTERRUPT_CLEAR3_ADDR);
- CDBG("%s MIPI_CSIPHY_INTERRUPT_STATUS3 = 0x%x\n", __func__, irq);
+ CDBG("%s MIPI_CSIPHY%d_INTERRUPT_STATUS3 = 0x%x\n",
+ __func__, csiphy_dev->pdev->id, irq);
irq = msm_io_r(csiphy_dev->base + MIPI_CSIPHY_INTERRUPT_STATUS4_ADDR);
msm_io_w(irq, csiphy_dev->base + MIPI_CSIPHY_INTERRUPT_CLEAR4_ADDR);
- CDBG("%s MIPI_CSIPHY_INTERRUPT_STATUS4 = 0x%x\n", __func__, irq);
+ CDBG("%s MIPI_CSIPHY%d_INTERRUPT_STATUS4 = 0x%x\n",
+ __func__, csiphy_dev->pdev->id, irq);
msm_io_w(0x1, csiphy_dev->base + 0x164);
msm_io_w(0x0, csiphy_dev->base + 0x164);
return IRQ_HANDLED;
@@ -184,12 +189,12 @@
msm_io_w(0x0, csiphy_dev->base + MIPI_CSIPHY_LNCK_CFG2_ADDR);
msm_io_w(0x0, csiphy_dev->base + MIPI_CSIPHY_GLBL_PWR_CFG_ADDR);
- msm_cam_clk_enable(&csiphy_dev->pdev->dev, csiphy_clk_info,
- csiphy_dev->csiphy_clk, ARRAY_SIZE(csiphy_clk_info), 0);
-
#if DBG_CSIPHY
disable_irq(csiphy_dev->irq->start);
#endif
+ msm_cam_clk_enable(&csiphy_dev->pdev->dev, csiphy_clk_info,
+ csiphy_dev->csiphy_clk, ARRAY_SIZE(csiphy_clk_info), 0);
+
iounmap(csiphy_dev->base);
return 0;
}
@@ -197,20 +202,28 @@
static long msm_csiphy_subdev_ioctl(struct v4l2_subdev *sd,
unsigned int cmd, void *arg)
{
+ int rc = -ENOIOCTLCMD;
struct csiphy_cfg_params cfg_params;
+ struct csiphy_device *csiphy_dev = v4l2_get_subdevdata(sd);
+ mutex_lock(&csiphy_dev->mutex);
switch (cmd) {
case VIDIOC_MSM_CSIPHY_CFG:
cfg_params.subdev = sd;
cfg_params.parms = arg;
- return msm_csiphy_config(
+ rc = msm_csiphy_config(
(struct csiphy_cfg_params *)&cfg_params);
+ break;
case VIDIOC_MSM_CSIPHY_INIT:
- return msm_csiphy_init(sd);
+ rc = msm_csiphy_init(sd);
+ break;
case VIDIOC_MSM_CSIPHY_RELEASE:
- return msm_csiphy_release(sd);
+ rc = msm_csiphy_release(sd);
+ break;
default:
- return -ENOIOCTLCMD;
+ pr_err("%s: command not found\n", __func__);
}
+ mutex_unlock(&csiphy_dev->mutex);
+ return rc;
}
static struct v4l2_subdev_core_ops msm_csiphy_subdev_core_ops = {
diff --git a/drivers/media/video/msm/csi/msm_ispif.c b/drivers/media/video/msm/csi/msm_ispif.c
index 86d62c9..f4dde2a 100644
--- a/drivers/media/video/msm/csi/msm_ispif.c
+++ b/drivers/media/video/msm/csi/msm_ispif.c
@@ -525,16 +525,16 @@
struct ispif_device *ispif =
(struct ispif_device *)v4l2_get_subdevdata(sd);
+ CDBG("%s, free_irq\n", __func__);
+ free_irq(ispif->irq->start, 0);
+ tasklet_kill(&ispif_tasklet);
+
if (ispif->csid_version == CSID_VERSION_V2)
msm_cam_clk_enable(&ispif->pdev->dev, ispif_clk_info,
ispif->ispif_clk, ARRAY_SIZE(ispif_clk_info), 0);
else
msm_cam_clk_enable(&ispif->pdev->dev, ispif_clk_info,
ispif->ispif_clk, 2, 0);
-
- CDBG("%s, free_irq\n", __func__);
- free_irq(ispif->irq->start, 0);
- tasklet_kill(&ispif_tasklet);
}
void msm_ispif_vfe_get_cid(uint8_t intftype, char *cids, int *num)
diff --git a/drivers/media/video/msm/gemini/msm_gemini_sync.c b/drivers/media/video/msm/gemini/msm_gemini_sync.c
index 0f0bd67..f035ad6 100644
--- a/drivers/media/video/msm/gemini/msm_gemini_sync.c
+++ b/drivers/media/video/msm/gemini/msm_gemini_sync.c
@@ -435,8 +435,11 @@
}
buf_cmd = buf_p->vbuf;
- msm_gemini_platform_p2v(buf_p->file, &buf_p->msm_buffer,
- &buf_p->handle);
+ if (pgmn_dev->op_mode == MSM_GEMINI_MODE_OFFLINE_ENCODE ||
+ pgmn_dev->op_mode == MSM_GEMINI_MODE_OFFLINE_ROTATION) {
+ msm_gemini_platform_p2v(buf_p->file, &buf_p->msm_buffer,
+ &buf_p->handle);
+ }
kfree(buf_p->subsystem_id);
kfree(buf_p);
@@ -484,16 +487,23 @@
kfree(buf_p);
return -ENOMEM;
}
+ if (pgmn_dev->op_mode == MSM_GEMINI_MODE_REALTIME_ENCODE) {
+ buf_p->y_buffer_addr = buf_cmd.y_off;
+ } else {
buf_p->y_buffer_addr = msm_gemini_platform_v2p(buf_cmd.fd,
buf_cmd.y_len + buf_cmd.cbcr_len, &buf_p->file,
&buf_p->msm_buffer, buf_p->subsystem_id, &buf_p->handle)
+ buf_cmd.offset;
+ }
buf_p->y_len = buf_cmd.y_len;
buf_p->cbcr_buffer_addr = buf_p->y_buffer_addr + buf_cmd.y_len;
buf_p->cbcr_len = buf_cmd.cbcr_len;
buf_p->num_of_mcu_rows = buf_cmd.num_of_mcu_rows;
+ GMN_DBG("%s: y_addr=%x,y_len=%x,cbcr_addr=%x,cbcr_len=%x\n", __func__,
+ buf_p->y_buffer_addr, buf_p->y_len, buf_p->cbcr_buffer_addr,
+ buf_p->cbcr_len);
if (!buf_p->y_buffer_addr || !buf_p->cbcr_buffer_addr) {
GMN_PR_ERR("%s:%d] v2p wrong\n", __func__, __LINE__);
diff --git a/drivers/media/video/msm/io/msm_io_util.c b/drivers/media/video/msm/io/msm_io_util.c
index 207f8be..a04d6fd 100644
--- a/drivers/media/video/msm/io/msm_io_util.c
+++ b/drivers/media/video/msm/io/msm_io_util.c
@@ -95,32 +95,33 @@
curr_vreg->reg_name);
if (IS_ERR(reg_ptr[i])) {
pr_err("%s: %s get failed\n",
- __func__,
- curr_vreg->reg_name);
+ __func__,
+ curr_vreg->reg_name);
reg_ptr[i] = NULL;
goto vreg_get_fail;
}
if (curr_vreg->type == REG_LDO) {
rc = regulator_set_voltage(
- reg_ptr[i],
- curr_vreg->min_voltage,
- curr_vreg->max_voltage);
+ reg_ptr[i],
+ curr_vreg->min_voltage,
+ curr_vreg->max_voltage);
if (rc < 0) {
- pr_err(
- "%s: %s set voltage failed\n",
- __func__,
- curr_vreg->reg_name);
+ pr_err("%s: %s set voltage failed\n",
+ __func__,
+ curr_vreg->reg_name);
goto vreg_set_voltage_fail;
}
- rc = regulator_set_optimum_mode(
- reg_ptr[i],
- curr_vreg->op_mode);
- if (rc < 0) {
- pr_err(
- "%s: %s set optimum mode failed\n",
- __func__,
- curr_vreg->reg_name);
- goto vreg_set_opt_mode_fail;
+ if (curr_vreg->op_mode) {
+ rc = regulator_set_optimum_mode(
+ reg_ptr[i],
+ curr_vreg->op_mode);
+ if (rc < 0) {
+ pr_err("%s: %s set optimum"
+ "mode failed\n",
+ __func__,
+ curr_vreg->reg_name);
+ goto vreg_set_opt_mode_fail;
+ }
}
}
}
@@ -129,11 +130,12 @@
curr_vreg = &cam_vreg[i];
if (reg_ptr[i]) {
if (curr_vreg->type == REG_LDO) {
- regulator_set_optimum_mode(
- reg_ptr[i], 0);
+ if (curr_vreg->op_mode)
+ regulator_set_optimum_mode(
+ reg_ptr[i], 0);
regulator_set_voltage(
- reg_ptr[i],
- 0, curr_vreg->max_voltage);
+ reg_ptr[i], 0, curr_vreg->
+ max_voltage);
}
regulator_put(reg_ptr[i]);
reg_ptr[i] = NULL;
@@ -171,13 +173,13 @@
for (i = 0; i < num_vreg; i++) {
if (IS_ERR(reg_ptr[i])) {
pr_err("%s: %s null regulator\n",
- __func__, cam_vreg[i].reg_name);
+ __func__, cam_vreg[i].reg_name);
goto disable_vreg;
}
rc = regulator_enable(reg_ptr[i]);
if (rc < 0) {
pr_err("%s: %s enable failed\n",
- __func__, cam_vreg[i].reg_name);
+ __func__, cam_vreg[i].reg_name);
goto disable_vreg;
}
}
@@ -194,6 +196,30 @@
return rc;
}
+static int config_gpio_table(struct msm_camera_gpio_conf *gpio)
+{
+ int rc = 0, i = 0;
+ uint32_t *table_on;
+ uint32_t *table_off;
+ uint32_t len;
+
+ table_on = gpio->camera_on_table;
+ table_off = gpio->camera_off_table;
+ len = gpio->camera_on_table_size;
+
+ for (i = 0; i < len; i++) {
+ rc = gpio_tlmm_config(table_on[i], GPIO_CFG_ENABLE);
+ if (rc) {
+ pr_err("%s not able to get gpio\n", __func__);
+ for (i--; i >= 0; i--)
+ gpio_tlmm_config(table_off[i],
+ GPIO_CFG_ENABLE);
+ break;
+ }
+ }
+ return rc;
+}
+
int msm_camera_request_gpio_table(struct msm_camera_sensor_info *sinfo,
int gpio_en)
{
@@ -201,38 +227,49 @@
struct msm_camera_gpio_conf *gpio_conf =
sinfo->sensor_platform_info->gpio_conf;
- if (gpio_conf->cam_gpio_req_tbl == NULL ||
- gpio_conf->cam_gpio_common_tbl == NULL) {
- pr_err("%s: NULL camera gpio table\n", __func__);
- return -EFAULT;
+ if (!gpio_conf->gpio_no_mux) {
+ if (gpio_conf->cam_gpio_req_tbl == NULL ||
+ gpio_conf->cam_gpio_common_tbl == NULL) {
+ pr_err("%s: NULL camera gpio table\n", __func__);
+ return -EFAULT;
+ }
}
+ if (gpio_conf->gpio_no_mux)
+ config_gpio_table(gpio_conf);
if (gpio_en) {
- if (gpio_conf->cam_gpiomux_conf_tbl != NULL) {
- msm_gpiomux_install(
- (struct msm_gpiomux_config *)gpio_conf->
- cam_gpiomux_conf_tbl,
- gpio_conf->cam_gpiomux_conf_tbl_size);
- }
- rc = gpio_request_array(gpio_conf->cam_gpio_common_tbl,
+ if (!gpio_conf->gpio_no_mux) {
+ if (gpio_conf->cam_gpiomux_conf_tbl != NULL) {
+ msm_gpiomux_install(
+ (struct msm_gpiomux_config *)
+ gpio_conf->cam_gpiomux_conf_tbl,
+ gpio_conf->cam_gpiomux_conf_tbl_size);
+ }
+ rc = gpio_request_array(gpio_conf->cam_gpio_common_tbl,
gpio_conf->cam_gpio_common_tbl_size);
- if (rc < 0) {
- pr_err("%s common gpio request failed\n", __func__);
- return rc;
+ if (rc < 0) {
+ pr_err("%s common gpio request failed\n"
+ , __func__);
+ return rc;
+ }
}
- rc = gpio_request_array(gpio_conf->cam_gpio_req_tbl,
+ if (gpio_conf->cam_gpio_req_tbl_size) {
+ rc = gpio_request_array(gpio_conf->cam_gpio_req_tbl,
gpio_conf->cam_gpio_req_tbl_size);
- if (rc < 0) {
- pr_err("%s camera gpio request failed\n", __func__);
- gpio_free_array(gpio_conf->cam_gpio_common_tbl,
- gpio_conf->cam_gpio_common_tbl_size);
- return rc;
+ if (rc < 0) {
+ pr_err("%s camera gpio"
+ "request failed\n", __func__);
+ gpio_free_array(gpio_conf->cam_gpio_common_tbl,
+ gpio_conf->cam_gpio_common_tbl_size);
+ return rc;
+ }
}
} else {
gpio_free_array(gpio_conf->cam_gpio_req_tbl,
gpio_conf->cam_gpio_req_tbl_size);
- gpio_free_array(gpio_conf->cam_gpio_common_tbl,
- gpio_conf->cam_gpio_common_tbl_size);
+ if (!gpio_conf->gpio_no_mux)
+ gpio_free_array(gpio_conf->cam_gpio_common_tbl,
+ gpio_conf->cam_gpio_common_tbl_size);
}
return rc;
}
@@ -252,7 +289,7 @@
usleep_range(gpio_conf->cam_gpio_set_tbl[i].delay,
gpio_conf->cam_gpio_set_tbl[i].delay + 1000);
}
- } else {
+ } else if (!gpio_conf->gpio_no_mux) {
for (i = gpio_conf->cam_gpio_set_tbl_size - 1; i >= 0; i--) {
if (gpio_conf->cam_gpio_set_tbl[i].flags)
gpio_set_value_cansleep(
diff --git a/drivers/media/video/msm/msm.c b/drivers/media/video/msm/msm.c
index 84d441d..a7f6a8c 100644
--- a/drivers/media/video/msm/msm.c
+++ b/drivers/media/video/msm/msm.c
@@ -163,6 +163,10 @@
if (!rc)
rc = -ETIMEDOUT;
if (rc < 0) {
+ rcmd = msm_dequeue(queue, list_control);
+ if (!rcmd)
+ free_qcmd(rcmd);
+ kfree(isp_event);
pr_err("%s: wait_event error %d\n", __func__, rc);
return rc;
}
@@ -518,6 +522,7 @@
ctrlcmd.value = (void *)ctrl_data;
memcpy(ctrlcmd.value, ctrl, ctrlcmd.length);
ctrlcmd.timeout_ms = 1000;
+ ctrlcmd.vnode_id = pcam->vnode_id;
ctrlcmd.config_ident = g_server_dev.config_info.config_dev_id[0];
/* send command to config thread in usersspace, and get return value */
@@ -543,6 +548,7 @@
ctrlcmd.value = (void *)ctrl_data;
memcpy(ctrlcmd.value, queryctrl, ctrlcmd.length);
ctrlcmd.timeout_ms = 1000;
+ ctrlcmd.vnode_id = pcam->vnode_id;
ctrlcmd.config_ident = g_server_dev.config_info.config_dev_id[0];
/* send command to config thread in userspace, and get return value */
@@ -943,7 +949,8 @@
not in use when we free the buffers */
mutex_lock(&pcam->vid_lock);
pcam_inst->streamon = 0;
- rc = msm_server_streamoff(pcam, pcam_inst->my_index);
+ if (g_server_dev.use_count > 0)
+ rc = msm_server_streamoff(pcam, pcam_inst->my_index);
mutex_unlock(&pcam->vid_lock);
if (rc < 0)
pr_err("%s: hw failed to stop streaming\n", __func__);
@@ -1448,6 +1455,7 @@
}
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
pcam->mctl.client = msm_ion_client_create(-1, "camera");
+ kref_init(&pcam->mctl.refcount);
#endif
/* Should be set to sensor ops if any but right now its OK!! */
if (!pcam->mctl.mctl_open) {
@@ -1502,6 +1510,7 @@
if (pcam->use_count == 1) {
+ msm_queue_init(&g_server_dev.ctrl_q, "control");
rc = msm_send_open_server(pcam->vnode_id);
if (rc < 0) {
mutex_unlock(&pcam->vid_lock);
@@ -1573,6 +1582,14 @@
return rc;
}
+void msm_release_ion_client(struct kref *ref)
+{
+ struct msm_cam_media_controller *mctl = container_of(ref,
+ struct msm_cam_media_controller, refcount);
+ pr_err("%s Calling ion_client_destroy ", __func__);
+ ion_client_destroy(mctl->client);
+}
+
static int msm_close(struct file *f)
{
int rc = 0;
@@ -1581,13 +1598,11 @@
pcam_inst = container_of(f->private_data,
struct msm_cam_v4l2_dev_inst, eventHandle);
pcam = pcam_inst->pcam;
- D("%s\n", __func__);
if (!pcam) {
pr_err("%s NULL pointer of camera device!\n", __func__);
return -EINVAL;
}
-
mutex_lock(&pcam->vid_lock);
pcam_inst->streamon = 0;
pcam->use_count--;
@@ -1610,17 +1625,21 @@
if (rc < 0)
pr_err("msm_cam_server_close_session fails %d\n", rc);
- rc = msm_send_close_server(pcam->vnode_id);
- if (rc < 0)
- pr_err("msm_send_close_server failed %d\n", rc);
+ if (g_server_dev.use_count > 0) {
+ rc = msm_send_close_server(pcam->vnode_id);
+ if (rc < 0)
+ pr_err("msm_send_close_server failed %d\n", rc);
+ }
if (pcam->mctl.mctl_release) {
rc = pcam->mctl.mctl_release(&(pcam->mctl));
if (rc < 0)
pr_err("mctl_release fails %d\n", rc);
}
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
- ion_client_destroy(pcam->mctl.client);
+ kref_put(&pcam->mctl.refcount, msm_release_ion_client);
#endif
+ if (g_server_dev.use_count == 0)
+ mutex_unlock(&g_server_dev.server_lock);
}
mutex_unlock(&pcam->vid_lock);
return rc;
@@ -1879,16 +1898,17 @@
{
int rc;
D("%s: open %s\n", __func__, fp->f_path.dentry->d_name.name);
-
+ mutex_lock(&g_server_dev.server_lock);
rc = nonseekable_open(inode, fp);
if (rc < 0) {
pr_err("%s: nonseekable_open error %d\n", __func__, rc);
+ mutex_unlock(&g_server_dev.server_lock);
return rc;
}
g_server_dev.use_count++;
if (g_server_dev.use_count == 1)
msm_queue_init(&g_server_dev.ctrl_q, "control");
-
+ mutex_unlock(&g_server_dev.server_lock);
return rc;
}
@@ -1909,6 +1929,29 @@
return rc;
}
+static int msm_close_server(struct inode *inode, struct file *fp)
+{
+ mutex_lock(&g_server_dev.server_lock);
+ if (g_server_dev.use_count > 0)
+ g_server_dev.use_count--;
+ mutex_unlock(&g_server_dev.server_lock);
+ if (g_server_dev.use_count == 0) {
+ if (g_server_dev.pcam_active) {
+ struct v4l2_event v4l2_ev;
+ mutex_lock(&g_server_dev.server_lock);
+
+ v4l2_ev.type = V4L2_EVENT_PRIVATE_START
+ + MSM_CAM_APP_NOTIFY_ERROR_EVENT;
+ ktime_get_ts(&v4l2_ev.timestamp);
+ v4l2_event_queue(
+ g_server_dev.pcam_active->pvdev, &v4l2_ev);
+ }
+ msm_queue_drain(&g_server_dev.ctrl_q, list_control);
+ }
+ return 0;
+}
+
+
static long msm_v4l2_evt_notify(struct msm_cam_media_controller *mctl,
unsigned int cmd, unsigned long evt)
{
@@ -2147,10 +2190,19 @@
spin_lock_init(&config_cam->p_mctl->sync.pmem_stats_spinlock);
config_cam->p_mctl->config_device = config_cam;
+ kref_get(&config_cam->p_mctl->refcount);
fp->private_data = config_cam;
return rc;
}
+static int msm_close_config(struct inode *node, struct file *f)
+{
+ struct msm_cam_config_dev *config_cam = f->private_data;
+ D("%s Decrementing ref count of config node ", __func__);
+ kref_put(&config_cam->p_mctl->refcount, msm_release_ion_client);
+ return 0;
+}
+
static struct v4l2_file_operations g_msm_fops = {
.owner = THIS_MODULE,
.open = msm_open,
@@ -2169,6 +2221,7 @@
.open = msm_open_server,
.poll = msm_poll_server,
.unlocked_ioctl = msm_ioctl_server,
+ .release = msm_close_server,
};
static const struct file_operations msm_fops_config = {
@@ -2177,6 +2230,7 @@
.poll = msm_poll_config,
.unlocked_ioctl = msm_ioctl_config,
.mmap = msm_mmap_config,
+ .release = msm_close_config,
};
int msm_setup_v4l2_event_queue(struct v4l2_fh *eventHandle,
@@ -2294,6 +2348,7 @@
return rc;
}
+ mutex_init(&g_server_dev.server_lock);
g_server_dev.pcam_active = NULL;
g_server_dev.camera_info.num_cameras = 0;
atomic_set(&g_server_dev.number_pcam_active, 0);
@@ -2337,6 +2392,13 @@
return rc;
}
+ strlcpy(pcam->mctl.media_dev.model, QCAMERA_NAME,
+ sizeof(pcam->mctl.media_dev.model));
+ pcam->mctl.media_dev.dev = &client->dev;
+ rc = media_device_register(&pcam->mctl.media_dev);
+ pvdev->v4l2_dev = &pcam->v4l2_dev;
+ pcam->v4l2_dev.mdev = &pcam->mctl.media_dev;
+
/* init video device's driver interface */
D("sensor name = %s, sizeof(pvdev->name)=%d\n",
pcam->mctl.sensor_sdev->name, sizeof(pvdev->name));
@@ -2351,6 +2413,10 @@
pvdev->minor = -1;
pvdev->vfl_type = 1;
+ media_entity_init(&pvdev->entity, 0, NULL, 0);
+ pvdev->entity.type = MEDIA_ENT_T_DEVNODE_V4L;
+ pvdev->entity.group_id = QCAMERA_VNODE_GROUP_ID;
+
/* register v4l2 video device to kernel as /dev/videoXX */
D("video_register_device\n");
rc = video_register_device(pvdev,
@@ -2360,6 +2426,7 @@
pr_err("%s: video_register_device failed\n", __func__);
goto reg_fail;
}
+ pvdev->entity.name = video_device_node_name(pvdev);
D("%s: video device registered as /dev/video%d\n",
__func__, pvdev->num);
@@ -2545,6 +2612,15 @@
g_server_dev.mctl_node_info.mctl_node_name
[g_server_dev.mctl_node_info.num_mctl_nodes]);
+ /*Temporary solution to store info in media device structure
+ until we can expand media device structure to support more
+ device info*/
+ snprintf(pcam->mctl.media_dev.serial,
+ sizeof(pcam->mctl.media_dev.serial),
+ "%s-%d-%d", QCAMERA_NAME,
+ sdata->sensor_platform_info->mount_angle,
+ sdata->camera_type);
+
g_server_dev.camera_info.num_cameras++;
g_server_dev.mctl_node_info.num_mctl_nodes++;
diff --git a/drivers/media/video/msm/msm.h b/drivers/media/video/msm/msm.h
index 55c0da1..dd65c01 100644
--- a/drivers/media/video/msm/msm.h
+++ b/drivers/media/video/msm/msm.h
@@ -218,6 +218,8 @@
/* most-frequently accessed manager object*/
struct msm_sync sync;
+ /*Media device node*/
+ struct media_device media_dev;
/* the following reflect the HW topology information*/
/*mandatory*/
@@ -239,6 +241,7 @@
struct pm_qos_request_list pm_qos_req_list;
struct msm_mctl_pp_info pp_info;
struct ion_client *client;
+ struct kref refcount;
/* VFE output mode.
* Used to interpret the Primary/Secondary messages
* to preview/video/main/thumbnail image types*/
@@ -409,6 +412,7 @@
struct msm_isp_ops *isp_subdev[MSM_MAX_CAMERA_CONFIGS];
/* info of MCTL nodes successfully probed*/
struct msm_mctl_node_info mctl_node_info;
+ struct mutex server_lock;
};
/* camera server related functions */
@@ -525,6 +529,7 @@
int image_mode, struct msm_frame_buffer *buf);
int msm_mctl_pp_mctl_divert_done(struct msm_cam_media_controller *p_mctl,
void __user *arg);
+void msm_release_ion_client(struct kref *ref);
#endif /* __KERNEL__ */
#endif /* _MSM_H */
diff --git a/drivers/media/video/msm/msm_io_7x27a_v4l2.c b/drivers/media/video/msm/msm_io_7x27a_v4l2.c
index bee9f49..63547c8 100644
--- a/drivers/media/video/msm/msm_io_7x27a_v4l2.c
+++ b/drivers/media/video/msm/msm_io_7x27a_v4l2.c
@@ -97,33 +97,6 @@
clk_set_rate(clk, rate);
}
-int msm_sensor_probe_on(struct device *dev)
-{
- int rc = 0;
- struct msm_camera_sensor_info *sinfo = dev->platform_data;
- struct msm_camera_device_platform_data *camdev = sinfo->pdata;
- camio_clk = camdev->ioclk;
-
- rc = camdev->camera_gpio_on();
- if (rc < 0)
- return rc;
-
- rc = msm_camio_clk_enable(CAMIO_CAM_MCLK_CLK);
- if (rc < 0)
- camdev->camera_gpio_off();
-
- return rc;
-}
-
-int msm_sensor_probe_off(struct device *dev)
-{
- struct msm_camera_sensor_info *sinfo = dev->platform_data;
- struct msm_camera_device_platform_data *camdev = sinfo->pdata;
-
- camdev->camera_gpio_off();
- return msm_camio_clk_disable(CAMIO_CAM_MCLK_CLK);
-}
-
void msm_camio_vfe_blk_reset(void)
{
uint32_t val;
@@ -152,28 +125,6 @@
usleep_range(10000, 11000);
}
-int msm_camio_probe_on(struct platform_device *pdev)
-{
- int rc = 0;
- const struct msm_camera_sensor_info *sinfo = pdev->dev.platform_data;
- struct msm_camera_device_platform_data *camdev = sinfo->pdata;
- camio_clk = camdev->ioclk;
-
- rc = camdev->camera_gpio_on();
- if (rc < 0)
- return rc;
- return msm_camio_clk_enable(CAMIO_CAM_MCLK_CLK);
-}
-
-int msm_camio_probe_off(struct platform_device *pdev)
-{
- const struct msm_camera_sensor_info *sinfo = pdev->dev.platform_data;
- struct msm_camera_device_platform_data *camdev = sinfo->pdata;
-
- camdev->camera_gpio_off();
- return msm_camio_clk_disable(CAMIO_CAM_MCLK_CLK);
-}
-
void msm_camio_set_perf_lvl(enum msm_bus_perf_setting perf_setting)
{
switch (perf_setting) {
diff --git a/drivers/media/video/msm/msm_io_8960.c b/drivers/media/video/msm/msm_io_8960.c
index ea969cf..9bfc239 100644
--- a/drivers/media/video/msm/msm_io_8960.c
+++ b/drivers/media/video/msm/msm_io_8960.c
@@ -117,7 +117,7 @@
case CAMIO_JPEG_CLK:
camio_jpeg_clk =
clk = clk_get(NULL, "ijpeg_clk");
- clk_set_rate(clk, 153600000);
+ clk_set_rate(clk, 228571000);
break;
case CAMIO_JPEG_PCLK:
@@ -191,6 +191,11 @@
if (rc < 0)
return rc;
rc = msm_camio_clk_disable(CAMIO_JPEG_CLK);
+ if (rc < 0)
+ return rc;
+ rc = msm_camio_clk_disable(CAMIO_IMEM_CLK);
+ if (rc < 0)
+ return rc;
if (fs_ijpeg) {
rc = regulator_disable(fs_ijpeg);
@@ -225,6 +230,10 @@
if (rc < 0)
return rc;
+ rc = msm_camio_clk_enable(CAMIO_IMEM_CLK);
+ if (rc < 0)
+ return rc;
+
CDBG("%s: exit %d\n", __func__, rc);
return rc;
}
diff --git a/drivers/media/video/msm/msm_isp.c b/drivers/media/video/msm/msm_isp.c
index fdd1f0e..3e2ddee 100644
--- a/drivers/media/video/msm/msm_isp.c
+++ b/drivers/media/video/msm/msm_isp.c
@@ -90,6 +90,7 @@
case VFE_OUTPUTS_MAIN_AND_VIDEO:
case VFE_OUTPUTS_MAIN_AND_THUMB:
case VFE_OUTPUTS_RAW:
+ case VFE_OUTPUTS_JPEG_AND_THUMB:
image_mode = MSM_V4L2_EXT_CAPTURE_MODE_MAIN;
break;
case VFE_OUTPUTS_THUMB_AND_MAIN:
@@ -123,6 +124,13 @@
case VFE_OUTPUTS_THUMB_AND_MAIN:
image_mode = MSM_V4L2_EXT_CAPTURE_MODE_MAIN;
break;
+ case VFE_OUTPUTS_JPEG_AND_THUMB:
+ image_mode = MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL;
+ break;
+ case VFE_OUTPUTS_PREVIEW:
+ case VFE_OUTPUTS_VIDEO:
+ image_mode = MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW;
+ break;
default:
image_mode = -1;
break;
@@ -200,16 +208,27 @@
rc = v4l2_subdev_call(sd, core, ioctl, 0, &vfe_params);
break;
case VFE_MSG_V32_JPEG_CAPTURE:
+ D("%s:VFE_MSG_V32_JPEG_CAPTURE vdata->type %d\n", __func__,
+ vdata->type);
free_buf.num_planes = 1;
- free_buf.ch_paddr[0] = IMEM_Y_OFFSET;
- free_buf.ch_paddr[1] = IMEM_CBCR_OFFSET;
+ free_buf.ch_paddr[0] = IMEM_Y_PING_OFFSET;
+ free_buf.ch_paddr[1] = IMEM_CBCR_PING_OFFSET;
cfgcmd.cmd_type = CMD_CONFIG_PING_ADDR;
cfgcmd.value = &vfe_id;
vfe_params.vfe_cfg = &cfgcmd;
vfe_params.data = (void *)&free_buf;
+ D("%s:VFE_MSG_V32_JPEG_CAPTURE y_ping=%x cbcr_ping=%x\n",
+ __func__, free_buf.ch_paddr[0], free_buf.ch_paddr[1]);
rc = v4l2_subdev_call(sd, core, ioctl, 0, &vfe_params);
/* Write the same buffer into PONG */
+ free_buf.ch_paddr[0] = IMEM_Y_PONG_OFFSET;
+ free_buf.ch_paddr[1] = IMEM_CBCR_PONG_OFFSET;
cfgcmd.cmd_type = CMD_CONFIG_PONG_ADDR;
+ cfgcmd.value = &vfe_id;
+ vfe_params.vfe_cfg = &cfgcmd;
+ vfe_params.data = (void *)&free_buf;
+ D("%s:VFE_MSG_V32_JPEG_CAPTURE y_pong=%x cbcr_pong=%x\n",
+ __func__, free_buf.ch_paddr[0], free_buf.ch_paddr[1]);
rc = v4l2_subdev_call(sd, core, ioctl, 0, &vfe_params);
break;
case VFE_MSG_OUTPUT_IRQ:
@@ -387,6 +406,8 @@
stats.cs.buff = stats.buffer;
stats.cs.fd = stats.fd;
break;
+ case MSG_ID_STATS_AWB_AEC:
+ break;
default:
pr_err("%s: Invalid msg type", __func__);
break;
@@ -707,6 +728,7 @@
case CMD_AXI_CFG_ZSL_ALL_CHNLS:
case CMD_RAW_PICT_AXI_CFG:
case CMD_AXI_CFG_PRIM:
+ case CMD_AXI_CFG_SEC:
case CMD_AXI_CFG_PRIM_ALL_CHNLS:
case CMD_AXI_CFG_PRIM|CMD_AXI_CFG_SEC:
case CMD_AXI_CFG_PRIM|CMD_AXI_CFG_SEC_ALL_CHNLS:
diff --git a/drivers/media/video/msm/msm_mctl.c b/drivers/media/video/msm/msm_mctl.c
index 54458d1..628fa62 100644
--- a/drivers/media/video/msm/msm_mctl.c
+++ b/drivers/media/video/msm/msm_mctl.c
@@ -177,7 +177,7 @@
int rc = 0;
struct msm_camsensor_info info;
struct msm_camera_sensor_info *sdata;
-
+ struct msm_cam_v4l2_device *pcam = sync->pcam_sync;
if (copy_from_user(&info,
arg,
sizeof(struct msm_camsensor_info))) {
@@ -191,7 +191,11 @@
memcpy(&info.name[0], sdata->sensor_name, MAX_SENSOR_NAME);
info.flash_enabled = sdata->flash_data->flash_type !=
MSM_CAMERA_FLASH_NONE;
-
+ info.pxlcode = pcam->usr_fmts[0].pxlcode;
+ info.flashtype = sdata->flash_type; /* two flash_types here? */
+ info.camera_type = sdata->camera_type;
+ info.sensor_type = 0; /* need to add YUV/SOC in probing */
+ info.mount_angle = sdata->sensor_platform_info->mount_angle;
/* copy back to user space */
if (copy_to_user((void *)arg,
&info,
@@ -199,7 +203,6 @@
ERR_COPY_TO_USER();
rc = -EFAULT;
}
-
return rc;
}
@@ -890,7 +893,7 @@
return rc;
}
pcam_inst->vbqueue_initialized = 0;
-
+ kref_get(&pcam->mctl.refcount);
f->private_data = &pcam_inst->eventHandle;
D("f->private_data = 0x%x, pcam = 0x%x\n",
@@ -961,6 +964,7 @@
v4l2_fh_exit(&pcam_inst->eventHandle);
kfree(pcam_inst);
+ kref_put(&pcam->mctl.refcount, msm_release_ion_client);
f->private_data = NULL;
mutex_unlock(&pcam->mctl_node.dev_lock);
D("%s : X ", __func__);
diff --git a/drivers/media/video/msm/msm_vfe32.c b/drivers/media/video/msm/msm_vfe32.c
index b539d19..f9c960a 100644
--- a/drivers/media/video/msm/msm_vfe32.c
+++ b/drivers/media/video/msm/msm_vfe32.c
@@ -868,6 +868,7 @@
irq_comp_mask = msm_io_r(vfe32_ctrl->vfebase + VFE_IRQ_COMP_MASK);
if (vfe32_ctrl->operation_mode == VFE_OUTPUTS_MAIN_AND_THUMB ||
+ vfe32_ctrl->operation_mode == VFE_OUTPUTS_JPEG_AND_THUMB ||
vfe32_ctrl->operation_mode == VFE_OUTPUTS_THUMB_AND_MAIN) {
if (vfe32_ctrl->outpath.output_mode &
VFE32_OUTPUT_MODE_PRIMARY) {
@@ -1297,8 +1298,6 @@
rc = vfe32_capture_raw(snapshot_cnt);
break;
case VFE_CMD_CAPTURE:
- CDBG("vfe32_proc_general: cmdID = %s op mode = %d\n",
- vfe32_general_cmd[cmd->id], vfe32_ctrl->operation_mode);
if (copy_from_user(&snapshot_cnt, (void __user *)(cmd->value),
sizeof(uint32_t))) {
rc = -EFAULT;
@@ -2960,13 +2959,14 @@
free_buf = vfe32_check_free_buffer(VFE_MSG_OUTPUT_IRQ,
VFE_MSG_OUTPUT_SECONDARY);
-
out_bool = ((vfe32_ctrl->operation_mode ==
VFE_OUTPUTS_THUMB_AND_MAIN ||
vfe32_ctrl->operation_mode ==
VFE_OUTPUTS_MAIN_AND_THUMB ||
vfe32_ctrl->operation_mode ==
- VFE_OUTPUTS_RAW) &&
+ VFE_OUTPUTS_RAW ||
+ vfe32_ctrl->operation_mode ==
+ VFE_OUTPUTS_JPEG_AND_THUMB) &&
(vfe32_ctrl->vfe_capture_count <= 1)) || free_buf;
if (out_bool) {
@@ -3003,7 +3003,9 @@
vfe32_ctrl->operation_mode ==
VFE_OUTPUTS_MAIN_AND_THUMB ||
vfe32_ctrl->operation_mode ==
- VFE_OUTPUTS_RAW)
+ VFE_OUTPUTS_RAW ||
+ vfe32_ctrl->operation_mode ==
+ VFE_OUTPUTS_JPEG_AND_THUMB)
vfe32_ctrl->outpath.out1.capture_cnt--;
vfe_send_outmsg(&vfe32_ctrl->subdev,
@@ -3947,6 +3949,9 @@
void msm_vfe_subdev_release(struct platform_device *pdev)
{
struct msm_sync *sync = vfe_syncdata;
+ CDBG("%s, free_irq\n", __func__);
+ disable_irq(vfe32_ctrl->vfeirq->start);
+ tasklet_kill(&vfe32_tasklet);
msm_cam_clk_enable(&vfe32_ctrl->pdev->dev, vfe32_clk_info,
vfe32_ctrl->vfe_clk, ARRAY_SIZE(vfe32_clk_info), 0);
if (vfe32_ctrl->fs_vfe) {
@@ -3954,9 +3959,6 @@
regulator_put(vfe32_ctrl->fs_vfe);
vfe32_ctrl->fs_vfe = NULL;
}
- CDBG("%s, free_irq\n", __func__);
- disable_irq(vfe32_ctrl->vfeirq->start);
- tasklet_kill(&vfe32_tasklet);
iounmap(vfe32_ctrl->vfebase);
if (atomic_read(&irq_cnt))
diff --git a/drivers/media/video/msm/msm_vfe7x27a_v4l2.c b/drivers/media/video/msm/msm_vfe7x27a_v4l2.c
index 638c51d..e1f4532 100644
--- a/drivers/media/video/msm/msm_vfe7x27a_v4l2.c
+++ b/drivers/media/video/msm/msm_vfe7x27a_v4l2.c
@@ -327,6 +327,9 @@
{VFE_CMD_SCALE_OUTPUT2_CONFIG, VFE_SCALE_OUTPUT2_CONFIG,
QDSP_SCALEQUEUE, "VFE_CMD_SCALE_OUTPUT2_CONFIG",
"VFE_SCALE_OUTPUT2_CONFIG"},
+ {VFE_CMD_CAPTURE_RAW, VFE_START, QDSP_CMDQUEUE,
+ "VFE_CMD_CAPTURE_RAW", "VFE_START"},
+ {VFE_CMD_RECONFIG_VFE, VFE_MAX, VFE_MAX},
};
@@ -400,9 +403,9 @@
unsigned char buf[256];
struct msm_free_buf *free_buf = NULL;
struct vfe_outputack fack;
+ int i;
CDBG("%s:id=%d\n", __func__, id);
-
if (id != VFE_ADSP_EVENT) {
data = kzalloc(len, GFP_KERNEL);
if (!data) {
@@ -434,8 +437,9 @@
cbcr_phy = outch->ping.ch_paddr[1];
CDBG("MSG_OUTPUT_S: %x %x\n",
(unsigned int)y_phy, (unsigned int)cbcr_phy);
- vfe_send_outmsg(&vfe2x_ctrl->subdev, MSG_ID_OUTPUT_S,
- y_phy, cbcr_phy);
+ vfe_send_outmsg(&vfe2x_ctrl->subdev,
+ MSG_ID_OUTPUT_PRIMARY,
+ y_phy, cbcr_phy);
break;
case MSG_OUTPUT_T:
outch = &vfe2x_ctrl->thumb;
@@ -443,7 +447,8 @@
cbcr_phy = outch->ping.ch_paddr[1];
CDBG("MSG_OUTPUT_T: %x %x\n",
(unsigned int)y_phy, (unsigned int)cbcr_phy);
- vfe_send_outmsg(&vfe2x_ctrl->subdev, MSG_ID_OUTPUT_T,
+ vfe_send_outmsg(&vfe2x_ctrl->subdev,
+ MSG_ID_OUTPUT_SECONDARY,
y_phy, cbcr_phy);
break;
case MSG_OUTPUT1:
@@ -454,7 +459,7 @@
} else {
free_buf = vfe2x_check_free_buffer(
VFE_MSG_OUTPUT_IRQ,
- VFE_MSG_OUTPUT_P);
+ VFE_MSG_OUTPUT_PRIMARY);
CDBG("free_buf = %x\n", (unsigned int) free_buf);
if (free_buf) {
fack.header = VFE_OUTPUT2_ACK;
@@ -489,7 +494,22 @@
CDBG("vfe_7x_convert, y_phy = 0x%x, cbcr_phy = 0x%x\n",
y_phy, cbcr_phy);
-
+ if (free_buf) {
+ for (i = 0; i < 3; i++) {
+ if (vfe2x_ctrl->free_buf.buf[i].
+ ch_paddr[0] == y_phy) {
+ vfe2x_ctrl->free_buf.
+ buf[i].ch_paddr[0] =
+ free_buf->ch_paddr[0];
+ vfe2x_ctrl->free_buf.
+ buf[i].ch_paddr[1] =
+ free_buf->ch_paddr[1];
+ break;
+ }
+ }
+ if (i == 3)
+ CDBG("Address doesnt match\n");
+ }
memcpy(((struct vfe_frame_extra *)extdata),
&((struct vfe_endframe *)data)->extra,
sizeof(struct vfe_frame_extra));
@@ -497,8 +517,8 @@
vfe2x_ctrl->vfeFrameId =
((struct vfe_frame_extra *)extdata)->frame_id;
vfe_send_outmsg(&vfe2x_ctrl->subdev,
- MSG_ID_OUTPUT_P,
- y_phy, cbcr_phy);
+ MSG_ID_OUTPUT_PRIMARY,
+ y_phy, cbcr_phy);
break;
case MSG_RESET_ACK:
case MSG_START_ACK:
@@ -509,11 +529,55 @@
vfe2x_send_isp_msg(vfe2x_ctrl, msgs_map[id].isp_id);
if (id == MSG_START_ACK)
vfe2x_ctrl->vfe_started = 1;
+ if (id == MSG_VFE_ERROR) {
+ uint16_t *ptr;
+ struct vfe_error_msg *VFE_ErrorMessageBuffer
+ = data;
+ ptr = data;
+ CDBG("Error: %x %x\n", ptr[0], ptr[1]);
+ CDBG("CAMIF_Error = %d\n",
+ VFE_ErrorMessageBuffer->camif_error);
+ CDBG("output1YBusOverflow = %d\n",
+ VFE_ErrorMessageBuffer->
+ output1ybusoverflow);
+ CDBG("output1CbCrBusOverflow = %d\n",
+ VFE_ErrorMessageBuffer->
+ output1cbcrbusoverflow);
+ CDBG("output2YBusOverflow = %d\n",
+ VFE_ErrorMessageBuffer->
+ output2ybusoverflow);
+ CDBG("output2CbCrBusOverflow = %d\n",
+ VFE_ErrorMessageBuffer->
+ output2cbcrbusoverflow);
+ CDBG("autofocusStatBusOverflow = %d\n",
+ VFE_ErrorMessageBuffer->
+ autofocusstatbusoverflow);
+ CDBG("WB_EXPStatBusOverflow = %d\n",
+ VFE_ErrorMessageBuffer->
+ wb_expstatbusoverflow);
+ CDBG("AXIError = %d\n",
+ VFE_ErrorMessageBuffer->
+ axierror);
+ CDBG("CAMIF_Staus = %d\n",
+ VFE_ErrorMessageBuffer->
+ camif_staus);
+ CDBG("pixel_count = %d\n",
+ VFE_ErrorMessageBuffer->
+ pixel_count);
+ CDBG("line_count = %d\n",
+ VFE_ErrorMessageBuffer->
+ line_count);
+ }
break;
case MSG_SOF:
vfe2x_ctrl->vfeFrameId++;
if (vfe2x_ctrl->vfeFrameId == 0)
vfe2x_ctrl->vfeFrameId = 1; /* wrapped back */
+ if ((op_mode & SNAPSHOT_MASK_MODE) && !raw_mode) {
+ pr_err("Ignore SOF for snapshot\n");
+ kfree(data);
+ return;
+ }
vfe2x_send_isp_msg(vfe2x_ctrl, MSG_ID_SOF_ACK);
if (raw_mode)
vfe2x_send_isp_msg(vfe2x_ctrl,
@@ -584,9 +648,13 @@
unsigned long *bptr;
int cnt;
int rc = 0;
+ int o_mode = 0;
+ if (op_mode & SNAPSHOT_MASK_MODE)
+ o_mode = SNAPSHOT_MASK_MODE;
- if (mode == OUTPUT_1) {
+ if (mode == OUTPUT_SEC) {
+ /* Thumbnail */
ao->output1buffer1_y_phy = ad->ping.ch_paddr[0];
ao->output1buffer1_cbcr_phy = ad->ping.ch_paddr[1];
ao->output1buffer2_y_phy = ad->pong.ch_paddr[0];
@@ -598,9 +666,8 @@
*bptr = ad->pong.ch_paddr[1];
bptr++;
}
- }
-
- if (mode == OUTPUT_2) {
+ } else if (mode == OUTPUT_PRIM && o_mode != SNAPSHOT_MASK_MODE) {
+ /* Preview */
ao->output2buffer1_y_phy = ad->ping.ch_paddr[0];
ao->output2buffer1_cbcr_phy = ad->ping.ch_paddr[1];
ao->output2buffer2_y_phy = ad->pong.ch_paddr[0];
@@ -614,9 +681,30 @@
*bptr = ad->pong.ch_paddr[1];
bptr++;
}
- }
-
- if (mode == OUTPUT_1_AND_2) {
+ CDBG("%x %x\n", (unsigned int)ao->output2buffer1_y_phy,
+ (unsigned int)ao->output2buffer1_cbcr_phy);
+ CDBG("%x %x\n", (unsigned int)ao->output2buffer2_y_phy,
+ (unsigned int)ao->output2buffer2_cbcr_phy);
+ CDBG("%x %x\n", (unsigned int)ao->output2buffer3_y_phy,
+ (unsigned int)ao->output2buffer3_cbcr_phy);
+ CDBG("%x %x\n", (unsigned int)ao->output2buffer4_y_phy,
+ (unsigned int)ao->output2buffer4_cbcr_phy);
+ CDBG("%x %x\n", (unsigned int)ao->output2buffer5_y_phy,
+ (unsigned int)ao->output2buffer5_cbcr_phy);
+ CDBG("%x %x\n", (unsigned int)ao->output2buffer6_y_phy,
+ (unsigned int)ao->output2buffer6_cbcr_phy);
+ CDBG("%x %x\n", (unsigned int)ao->output2buffer7_y_phy,
+ (unsigned int)ao->output2buffer7_cbcr_phy);
+ vfe2x_ctrl->free_buf.buf[0].ch_paddr[0] = ad->ping.ch_paddr[0];
+ vfe2x_ctrl->free_buf.buf[0].ch_paddr[1] = ad->ping.ch_paddr[1];
+ vfe2x_ctrl->free_buf.buf[1].ch_paddr[0] = ad->pong.ch_paddr[0];
+ vfe2x_ctrl->free_buf.buf[1].ch_paddr[1] = ad->pong.ch_paddr[1];
+ vfe2x_ctrl->free_buf.buf[2].ch_paddr[0] =
+ ad->free_buf.ch_paddr[0];
+ vfe2x_ctrl->free_buf.buf[2].ch_paddr[1] =
+ ad->free_buf.ch_paddr[1];
+ } else if (mode == OUTPUT_PRIM && o_mode == SNAPSHOT_MASK_MODE) {
+ vfe2x_ctrl->reconfig_vfe = 0;
if (raw_mode) {
ao->output2buffer1_y_phy = ad->ping.ch_paddr[0];
ao->output2buffer1_cbcr_phy = ad->ping.ch_paddr[0];
@@ -632,7 +720,7 @@
for (cnt = 0; cnt < 6; cnt++) {
*bptr = ad->pong.ch_paddr[0];
bptr++;
- *bptr = ad->pong.ch_paddr[0];
+ *bptr = ad->pong.ch_paddr[1];
bptr++;
}
}
@@ -664,12 +752,12 @@
vfe2x_subdev_notify(id, path);
if (op_mode & SNAPSHOT_MASK_MODE) {
- if (path == VFE_MSG_OUTPUT_S)
+ if (path == VFE_MSG_OUTPUT_PRIMARY)
outch = &vfe2x_ctrl->snap;
- else if (path == VFE_MSG_OUTPUT_T)
+ else if (path == VFE_MSG_OUTPUT_SECONDARY)
outch = &vfe2x_ctrl->thumb;
} else {
- if (path == VFE_MSG_OUTPUT_P)
+ if (path == VFE_MSG_OUTPUT_PRIMARY)
outch = &vfe2x_ctrl->prev;
}
if (outch->free_buf.ch_paddr[0])
@@ -684,15 +772,14 @@
int rc = 0;
vfe2x_subdev_notify(id, path);
-
CDBG("Opmode = %d\n", op_mode);
if (op_mode & SNAPSHOT_MASK_MODE) {
- if (path == VFE_MSG_OUTPUT_S)
+ if (path == VFE_MSG_OUTPUT_PRIMARY)
outch = &vfe2x_ctrl->snap;
- else if (path == VFE_MSG_OUTPUT_T)
+ else if (path == VFE_MSG_OUTPUT_SECONDARY)
outch = &vfe2x_ctrl->thumb;
} else {
- if (path == VFE_MSG_OUTPUT_P)
+ if (path == VFE_MSG_OUTPUT_PRIMARY)
outch = &vfe2x_ctrl->prev;
}
if (outch->ping.ch_paddr[0] && outch->pong.ch_paddr[0]) {
@@ -711,13 +798,14 @@
struct buf_info *ch = NULL;
CDBG("path = %d op_mode = %d\n", path, op_mode);
+ /* TODO: Remove Mode specific stuff */
if (op_mode & SNAPSHOT_MASK_MODE) {
- if (path == VFE_MSG_OUTPUT_T)
+ if (path == VFE_MSG_OUTPUT_SECONDARY)
ch = &vfe2x_ctrl->thumb;
- else if (path == VFE_MSG_OUTPUT_S)
+ else if (path == VFE_MSG_OUTPUT_PRIMARY)
ch = &vfe2x_ctrl->snap;
} else {
- if (path == VFE_MSG_OUTPUT_P)
+ if (path == VFE_MSG_OUTPUT_PRIMARY)
ch = &vfe2x_ctrl->prev;
}
@@ -777,11 +865,11 @@
if (op_mode & SNAPSHOT_MASK_MODE) {
free_buf = vfe2x_check_free_buffer(
VFE_MSG_OUTPUT_IRQ,
- VFE_MSG_OUTPUT_T);
+ VFE_MSG_OUTPUT_SECONDARY);
} else {
free_buf = vfe2x_check_free_buffer(
VFE_MSG_OUTPUT_IRQ,
- VFE_MSG_OUTPUT_P);
+ VFE_MSG_OUTPUT_PRIMARY);
if (free_buf) {
fack.header = VFE_OUTPUT2_ACK;
@@ -875,6 +963,7 @@
break;
case CMD_STATS_AF_ENABLE:
case CMD_STATS_AF_AXI_CFG: {
+ CDBG("CMD_STATS_AF_ENABLE CMD_STATS_AF_AXI_CFG\n");
axid = data;
if (!axid) {
rc = -EFAULT;
@@ -908,6 +997,7 @@
goto config_failure;
}
*(uint32_t *)sfcfg = header;
+ CDBG("Number of buffers = %d\n", axid->bufnum1);
if (axid->bufnum1 > 0) {
regptr = &axid->region[0];
@@ -973,6 +1063,11 @@
op_mode = vfe2x_ctrl->start_cmd.mode_of_operation;
return rc;
}
+ if (vfecmd.id == VFE_CMD_RECONFIG_VFE) {
+ CDBG("VFE is RECONFIGURED\n");
+ vfe2x_ctrl->reconfig_vfe = 1;
+ return 0;
+ }
if (vfecmd.length > 256 - 4) {
cmd_data_alloc =
cmd_data = kmalloc(vfecmd.length + 4, GFP_ATOMIC);
@@ -1002,13 +1097,12 @@
if (queue == QDSP_CMDQUEUE) {
switch (vfecmd.id) {
case VFE_CMD_RESET:
- msm_adsp_enable(qcam_mod);
- msm_adsp_enable(vfe_mod);
msm_camio_vfe_blk_reset();
vfestopped = 0;
break;
case VFE_CMD_START:
case VFE_CMD_CAPTURE:
+ case VFE_CMD_CAPTURE_RAW:
spin_lock_irqsave(&vfe2x_ctrl->table_lock,
flags);
if (!list_empty(&vfe2x_ctrl->table_q)) {
@@ -1041,8 +1135,60 @@
} /* QDSP_CMDQUEUE */
}
break;
- case CMD_AXI_CFG_PREVIEW: {
- CDBG("CMD_AXI_CFG_PREVIEW\n");
+ case CMD_AXI_CFG_SEC: {
+ CDBG("CMD_AXI_CFG_SEC\n");
+ raw_mode = 0;
+ axio = kmalloc(sizeof(struct axiout), GFP_ATOMIC);
+ if (!axio) {
+ pr_err("NULL axio\n");
+ rc = -ENOMEM;
+ goto config_failure;
+ }
+
+ if (copy_from_user((char *)axio + 4,
+ (void __user *)(vfecmd.value),
+ sizeof(struct axiout))) {
+ CDBG("copy_from_user failed\n");
+ rc = -EFAULT;
+ goto config_done;
+ }
+ if (op_mode & SNAPSHOT_MASK_MODE)
+ rc = vfe2x_configure_pingpong_buffers(
+ VFE_MSG_V2X_CAPTURE,
+ VFE_MSG_OUTPUT_SECONDARY);
+ else
+ rc = vfe2x_configure_pingpong_buffers(
+ VFE_MSG_V2X_PREVIEW,
+ VFE_MSG_OUTPUT_SECONDARY);
+ if (rc < 0) {
+ pr_err("%s error configuring pingpong buffers"
+ " for preview", __func__);
+ rc = -EINVAL;
+ goto config_done;
+ }
+
+ if (!(op_mode & SNAPSHOT_MASK_MODE))
+ free_buf = vfe2x_check_free_buffer(
+ VFE_MSG_OUTPUT_IRQ,
+ VFE_MSG_OUTPUT_SECONDARY);
+ header = cmds_map[vfecmd.id].vfe_id;
+ queue = cmds_map[vfecmd.id].queue;
+ if (header == -1 && queue == -1) {
+ rc = -EFAULT;
+ goto config_done;
+ }
+ *(uint32_t *)axio = header;
+ if (op_mode & SNAPSHOT_MASK_MODE)
+ vfe_7x_config_axi(OUTPUT_SEC,
+ &vfe2x_ctrl->thumb, axio);
+ else
+ vfe_7x_config_axi(OUTPUT_SEC,
+ &vfe2x_ctrl->video, axio);
+ cmd_data = axio;
+ }
+ break;
+ case CMD_AXI_CFG_PRIM: {
+ CDBG("CMD_AXI_CFG_PRIM : %d\n", op_mode);
raw_mode = 0;
axio = kmalloc(sizeof(struct axiout), GFP_ATOMIC);
if (!axio) {
@@ -1058,18 +1204,40 @@
rc = -EFAULT;
goto config_done;
}
- rc = vfe2x_configure_pingpong_buffers(VFE_MSG_V2X_PREVIEW,
- VFE_MSG_OUTPUT_P);
- if (rc < 0) {
- pr_err("%s error configuring pingpong buffers"
- " for preview", __func__);
- rc = -EINVAL;
- goto config_done;
- }
-
- free_buf = vfe2x_check_free_buffer(
+ if (!vfe2x_ctrl->reconfig_vfe) {
+ if (op_mode & SNAPSHOT_MASK_MODE)
+ rc = vfe2x_configure_pingpong_buffers(
+ VFE_MSG_V2X_CAPTURE,
+ VFE_MSG_OUTPUT_PRIMARY);
+ else
+ rc = vfe2x_configure_pingpong_buffers(
+ VFE_MSG_V2X_PREVIEW,
+ VFE_MSG_OUTPUT_PRIMARY);
+ if (rc < 0) {
+ pr_err("%s error configuring pingpong buffers"
+ " for preview", __func__);
+ rc = -EINVAL;
+ goto config_done;
+ }
+ if (!(op_mode & SNAPSHOT_MASK_MODE))
+ free_buf = vfe2x_check_free_buffer(
VFE_MSG_OUTPUT_IRQ,
- VFE_MSG_OUTPUT_P);
+ VFE_MSG_OUTPUT_PRIMARY);
+ } else {
+ vfe2x_ctrl->prev.ping.ch_paddr[0] =
+ vfe2x_ctrl->free_buf.buf[0].ch_paddr[0];
+ vfe2x_ctrl->prev.ping.ch_paddr[1] =
+ vfe2x_ctrl->free_buf.buf[0].ch_paddr[1];
+ vfe2x_ctrl->prev.pong.ch_paddr[0] =
+ vfe2x_ctrl->free_buf.buf[1].ch_paddr[0];
+ vfe2x_ctrl->prev.pong.ch_paddr[1] =
+ vfe2x_ctrl->free_buf.buf[1].ch_paddr[1];
+ vfe2x_ctrl->prev.free_buf.ch_paddr[0] =
+ vfe2x_ctrl->free_buf.buf[2].ch_paddr[0];
+ vfe2x_ctrl->prev.free_buf.ch_paddr[1] =
+ vfe2x_ctrl->free_buf.buf[2].ch_paddr[1];
+ vfe2x_ctrl->reconfig_vfe = 0;
+ }
header = cmds_map[vfecmd.id].vfe_id;
queue = cmds_map[vfecmd.id].queue;
if (header == -1 && queue == -1) {
@@ -1077,7 +1245,86 @@
goto config_done;
}
*(uint32_t *)axio = header;
- vfe_7x_config_axi(OUTPUT_2, &vfe2x_ctrl->prev, axio);
+ if (op_mode & SNAPSHOT_MASK_MODE)
+ vfe_7x_config_axi(OUTPUT_PRIM, &vfe2x_ctrl->snap, axio);
+ else
+ vfe_7x_config_axi(OUTPUT_PRIM, &vfe2x_ctrl->prev, axio);
+ cmd_data = axio;
+ }
+ break;
+ case CMD_AXI_CFG_SEC|CMD_AXI_CFG_PRIM: {
+ CDBG("CMD_AXI_CFG_SEC|PRIM\n");
+ raw_mode = 0;
+ axio = kmalloc(sizeof(struct axiout), GFP_ATOMIC);
+ if (!axio) {
+ pr_err("NULL axio\n");
+ rc = -ENOMEM;
+ goto config_failure;
+ }
+
+ if (copy_from_user((char *)axio + 4,
+ (void __user *)(vfecmd.value),
+ sizeof(struct axiout))) {
+ pr_err("copy_from_user failed\n");
+ rc = -EFAULT;
+ goto config_done;
+ }
+ if (op_mode & SNAPSHOT_MASK_MODE)
+ rc = vfe2x_configure_pingpong_buffers(
+ VFE_MSG_V2X_CAPTURE,
+ VFE_MSG_OUTPUT_SECONDARY);
+ else
+ rc = vfe2x_configure_pingpong_buffers(
+ VFE_MSG_V2X_PREVIEW,
+ VFE_MSG_OUTPUT_SECONDARY);
+ if (rc < 0) {
+ pr_err("%s error configuring pingpong buffers"
+ " for preview", __func__);
+ rc = -EINVAL;
+ goto config_done;
+ }
+
+ if (!(op_mode & SNAPSHOT_MASK_MODE))
+ free_buf = vfe2x_check_free_buffer(
+ VFE_MSG_OUTPUT_IRQ,
+ VFE_MSG_OUTPUT_SECONDARY);
+ header = cmds_map[vfecmd.id].vfe_id;
+ queue = cmds_map[vfecmd.id].queue;
+ if (header == -1 && queue == -1) {
+ rc = -EFAULT;
+ goto config_done;
+ }
+ *(uint32_t *)axio = header;
+ if (op_mode & SNAPSHOT_MASK_MODE)
+ vfe_7x_config_axi(OUTPUT_SEC, &vfe2x_ctrl->thumb, axio);
+ else
+ vfe_7x_config_axi(OUTPUT_SEC, &vfe2x_ctrl->prev, axio);
+
+ if (op_mode & SNAPSHOT_MASK_MODE)
+ rc = vfe2x_configure_pingpong_buffers(
+ VFE_MSG_V2X_CAPTURE,
+ VFE_MSG_OUTPUT_PRIMARY);
+ else
+ rc = vfe2x_configure_pingpong_buffers(
+ VFE_MSG_V2X_PREVIEW,
+ VFE_MSG_OUTPUT_PRIMARY);
+ if (rc < 0) {
+ pr_err("%s error configuring pingpong buffers"
+ " for preview", __func__);
+ rc = -EINVAL;
+ goto config_done;
+ }
+
+ if (!(op_mode & SNAPSHOT_MASK_MODE))
+ free_buf = vfe2x_check_free_buffer(
+ VFE_MSG_OUTPUT_IRQ,
+ VFE_MSG_OUTPUT_PRIMARY);
+ if (op_mode & SNAPSHOT_MASK_MODE)
+ vfe_7x_config_axi(OUTPUT_PRIM,
+ &vfe2x_ctrl->snap, axio);
+ else
+ vfe_7x_config_axi(OUTPUT_PRIM,
+ &vfe2x_ctrl->prev, axio);
cmd_data = axio;
}
break;
@@ -1099,7 +1346,7 @@
header = cmds_map[vfecmd.id].vfe_id;
queue = cmds_map[vfecmd.id].queue;
rc = vfe2x_configure_pingpong_buffers(VFE_MSG_V2X_CAPTURE,
- VFE_MSG_OUTPUT_S);
+ VFE_MSG_OUTPUT_PRIMARY);
if (rc < 0) {
pr_err("%s error configuring pingpong buffers"
" for preview", __func__);
@@ -1111,50 +1358,7 @@
goto config_done;
}
*(uint32_t *)axio = header;
- vfe_7x_config_axi(OUTPUT_1_AND_2, &vfe2x_ctrl->snap, axio);
- cmd_data = axio;
- }
- break;
- case CMD_AXI_CFG_SNAP: {
- raw_mode = 0;
- CDBG("CMD_AXI_CFG_SNAP :%d\n", op_mode);
- axio = kmalloc(sizeof(struct axiout), GFP_ATOMIC);
- if (!axio) {
- rc = -ENOMEM;
- goto config_failure;
- }
-
- if (copy_from_user((char *)axio + 4,
- (void __user *)(vfecmd.value),
- sizeof(struct axiout))) {
- rc = -EFAULT;
- goto config_done;
- }
- header = cmds_map[vfecmd.id].vfe_id;
- queue = cmds_map[vfecmd.id].queue;
- rc = vfe2x_configure_pingpong_buffers(VFE_MSG_V2X_CAPTURE,
- VFE_MSG_OUTPUT_S);
- if (rc < 0) {
- pr_err("%s error configuring pingpong buffers"
- " for preview", __func__);
- rc = -EINVAL;
- goto config_done;
- }
- if (header == -1 && queue == -1) {
- rc = -EFAULT;
- goto config_done;
- }
- *(uint32_t *)axio = header;
- vfe_7x_config_axi(OUTPUT_1_AND_2, &vfe2x_ctrl->snap, axio);
- rc = vfe2x_configure_pingpong_buffers(VFE_MSG_V2X_CAPTURE,
- VFE_MSG_OUTPUT_T);
- if (rc < 0) {
- pr_err("%s error configuring pingpong buffers"
- " for preview", __func__);
- rc = -EINVAL;
- goto config_done;
- }
- vfe_7x_config_axi(OUTPUT_1, &vfe2x_ctrl->thumb, axio);
+ vfe_7x_config_axi(OUTPUT_PRIM, &vfe2x_ctrl->snap, axio);
cmd_data = axio;
}
break;
@@ -1169,6 +1373,7 @@
CDBG("send adsp command = %d\n", *(uint32_t *)cmd_data);
if (queue == QDSP_TABLEQUEUE &&
vfe2x_ctrl->tableack_pending) {
+ CDBG("store table cmd\n");
table_pending = kzalloc(sizeof(struct table_cmd), GFP_ATOMIC);
if (!table_pending) {
rc = -ENOMEM;
@@ -1188,12 +1393,14 @@
spin_unlock_irqrestore(&vfe2x_ctrl->table_lock, flags);
} else {
if (queue == QDSP_TABLEQUEUE) {
+ CDBG("sending table cmd\n");
spin_lock_irqsave(&vfe2x_ctrl->table_lock, flags);
rc = msm_adsp_write(vfe_mod, queue,
cmd_data, vfecmd.length + 4);
vfe2x_ctrl->tableack_pending = 1;
spin_unlock_irqrestore(&vfe2x_ctrl->table_lock, flags);
} else {
+ CDBG("send n-table cmd\n");
if (*(uint32_t *)cmd_data == VFE_OUTPUT2_ACK) {
uint32_t *ptr = cmd_data;
CDBG("%x %x %x\n", ptr[0], ptr[1], ptr[2]);
@@ -1263,6 +1470,8 @@
rc = -EBUSY;
goto get_vfe_fail;
}
+ msm_adsp_enable(qcam_mod);
+ msm_adsp_enable(vfe_mod);
return 0;
get_vfe_fail:
@@ -1287,6 +1496,7 @@
void msm_vfe_subdev_release(struct platform_device *pdev)
{
+ CDBG("msm_cam_clk_enable: disable vfe_clk\n");
msm_cam_clk_enable(&vfe2x_ctrl->pdev->dev, vfe2x_clk_info,
vfe2x_ctrl->vfe_clk, ARRAY_SIZE(vfe2x_clk_info), 0);
vfe_syncdata = NULL;
diff --git a/drivers/media/video/msm/msm_vfe7x27a_v4l2.h b/drivers/media/video/msm/msm_vfe7x27a_v4l2.h
index 0f7fb60..90237bd 100644
--- a/drivers/media/video/msm/msm_vfe7x27a_v4l2.h
+++ b/drivers/media/video/msm/msm_vfe7x27a_v4l2.h
@@ -51,6 +51,10 @@
struct msm_free_buf free_buf;
} __packed;
+struct prev_free_buf_info {
+ struct msm_free_buf buf[3];
+};
+
struct vfe_cmd_start {
uint32_t input_source:1;
uint32_t mode_of_operation:1;
@@ -76,9 +80,11 @@
struct vfe2x_ctrl_type {
struct buf_info prev;
+ struct buf_info video;
struct buf_info snap;
struct buf_info raw;
struct buf_info thumb;
+ struct prev_free_buf_info free_buf;
spinlock_t table_lock;
struct list_head table_q;
@@ -97,6 +103,7 @@
struct platform_device *pdev;
struct clk *vfe_clk[3];
spinlock_t sd_notify_lock;
+ uint32_t reconfig_vfe;
} __packed;
struct vfe_frame_extra {
@@ -379,6 +386,21 @@
int state;
int timeout;
};
+struct vfe_error_msg {
+ unsigned int camif_error:1;
+ unsigned int output1ybusoverflow:1;
+ unsigned int output1cbcrbusoverflow:1;
+ unsigned int output2ybusoverflow:1;
+ unsigned int output2cbcrbusoverflow:1;
+ unsigned int autofocusstatbusoverflow:1;
+ unsigned int wb_expstatbusoverflow:1;
+ unsigned int axierror:1;
+ unsigned int /* reserved */ : 24;
+ unsigned int camif_staus:1;
+ unsigned int pixel_count:14;
+ unsigned int line_count:14;
+ unsigned int /*reserved */ : 3;
+} __packed;
static struct msm_free_buf *vfe2x_check_free_buffer(int id, int path);
diff --git a/drivers/media/video/msm/msm_vpe.c b/drivers/media/video/msm/msm_vpe.c
index 7186e58..5919553 100644
--- a/drivers/media/video/msm/msm_vpe.c
+++ b/drivers/media/video/msm/msm_vpe.c
@@ -529,14 +529,14 @@
}
spin_unlock_irqrestore(&vpe_ctrl->lock, flags);
+ disable_irq(vpe_ctrl->vpeirq->start);
+ tasklet_kill(&vpe_tasklet);
msm_cam_clk_enable(&vpe_ctrl->pdev->dev, vpe_clk_info,
vpe_ctrl->vpe_clk, ARRAY_SIZE(vpe_clk_info), 0);
regulator_disable(vpe_ctrl->fs_vpe);
regulator_put(vpe_ctrl->fs_vpe);
vpe_ctrl->fs_vpe = NULL;
- disable_irq(vpe_ctrl->vpeirq->start);
- tasklet_kill(&vpe_tasklet);
spin_lock_irqsave(&vpe_ctrl->lock, flags);
vpe_ctrl->state = VPE_STATE_IDLE;
spin_unlock_irqrestore(&vpe_ctrl->lock, flags);
diff --git a/drivers/media/video/msm/sensors/Makefile b/drivers/media/video/msm/sensors/Makefile
index 047226e..ef8993c 100644
--- a/drivers/media/video/msm/sensors/Makefile
+++ b/drivers/media/video/msm/sensors/Makefile
@@ -4,9 +4,11 @@
EXTRA_CFLAGS += -Idrivers/media/video/msm/csi
obj-$(CONFIG_MSM_CAMERA_SENSOR) += msm_sensor.o
obj-$(CONFIG_IMX074) += imx074_v4l2.o
-obj-$(CONFIG_MT9M114) += mt9m114_v4l2.o
obj-$(CONFIG_S5K3L1YX) += s5k3l1yx.o
obj-$(CONFIG_OV2720) += ov2720.o
+obj-$(CONFIG_MT9M114) += mt9m114_v4l2.o
obj-$(CONFIG_S5K4E1) += s5k4e1_v4l2.o
obj-$(CONFIG_MT9E013) += mt9e013_v4l2.o
obj-$(CONFIG_WEBCAM_OV9726) += ov9726_v4l2.o
+obj-$(CONFIG_WEBCAM_OV7692_QRD) += ov7692_qrd_v4l2.o
+obj-$(CONFIG_OV5647) += ov5647_v4l2.o
diff --git a/drivers/media/video/msm/sensors/msm_sensor.c b/drivers/media/video/msm/sensors/msm_sensor.c
index cade3d6..e40a528 100644
--- a/drivers/media/video/msm/sensors/msm_sensor.c
+++ b/drivers/media/video/msm/sensors/msm_sensor.c
@@ -173,6 +173,100 @@
return 0;
}
+int32_t msm_sensor_setting3(struct msm_sensor_ctrl_t *s_ctrl,
+ int update_type, int res)
+{
+ int32_t rc = 0;
+ static int csi_config;
+ if (update_type == MSM_SENSOR_REG_INIT) {
+ CDBG("Register INIT\n");
+ s_ctrl->curr_csi_params = NULL;
+ csi_config = 0;
+ msm_camera_i2c_write(
+ s_ctrl->sensor_i2c_client,
+ 0x0e, 0x08,
+ MSM_CAMERA_I2C_BYTE_DATA);
+ } else if (update_type == MSM_SENSOR_UPDATE_PERIODIC) {
+ CDBG("PERIODIC : %d\n", res);
+ if (res == 0)
+ return 0;
+ if (!csi_config) {
+ msm_sensor_write_conf_array(
+ s_ctrl->sensor_i2c_client,
+ s_ctrl->msm_sensor_reg->mode_settings, res);
+ msleep(30);
+ s_ctrl->curr_csic_params = s_ctrl->csic_params[res];
+ CDBG("CSI config in progress\n");
+ v4l2_subdev_notify(&s_ctrl->sensor_v4l2_subdev,
+ NOTIFY_CSIC_CFG,
+ s_ctrl->curr_csic_params);
+ CDBG("CSI config is done\n");
+ mb();
+ msleep(30);
+ msm_camera_i2c_write(
+ s_ctrl->sensor_i2c_client,
+ 0x0e, 0x00,
+ MSM_CAMERA_I2C_BYTE_DATA);
+ csi_config = 1;
+ }
+ msleep(50);
+ }
+ return rc;
+}
+
+int32_t msm_sensor_setting2(struct msm_sensor_ctrl_t *s_ctrl,
+ int update_type, int res)
+{
+ int32_t rc = 0;
+ static int csi_config;
+
+ s_ctrl->func_tbl->sensor_stop_stream(s_ctrl);
+ if (csi_config == 0 || res == 0)
+ msleep(66);
+ else
+ msleep(266);
+ if (update_type == MSM_SENSOR_REG_INIT) {
+ CDBG("Register INIT\n");
+ s_ctrl->curr_csi_params = NULL;
+ msm_camera_i2c_write(
+ s_ctrl->sensor_i2c_client,
+ 0x103, 0x1,
+ MSM_CAMERA_I2C_BYTE_DATA);
+ msm_sensor_enable_debugfs(s_ctrl);
+ msm_sensor_write_init_settings(s_ctrl);
+ csi_config = 0;
+ } else if (update_type == MSM_SENSOR_UPDATE_PERIODIC) {
+ CDBG("PERIODIC : %d\n", res);
+ msm_sensor_write_conf_array(
+ s_ctrl->sensor_i2c_client,
+ s_ctrl->msm_sensor_reg->mode_settings, res);
+ msleep(30);
+ if (!csi_config) {
+ s_ctrl->curr_csic_params = s_ctrl->csic_params[res];
+ CDBG("CSI config in progress\n");
+ v4l2_subdev_notify(&s_ctrl->sensor_v4l2_subdev,
+ NOTIFY_CSIC_CFG,
+ s_ctrl->curr_csic_params);
+ CDBG("CSI config is done\n");
+ mb();
+ msleep(30);
+ csi_config = 1;
+ msm_camera_i2c_write(
+ s_ctrl->sensor_i2c_client,
+ 0x100, 0x1,
+ MSM_CAMERA_I2C_BYTE_DATA);
+ }
+ msm_camera_i2c_write(
+ s_ctrl->sensor_i2c_client,
+ 0x4800, 0x4,
+ MSM_CAMERA_I2C_BYTE_DATA);
+ msleep(266);
+ s_ctrl->func_tbl->sensor_start_stream(s_ctrl);
+ msleep(50);
+ }
+ return rc;
+}
+
int32_t msm_sensor_setting1(struct msm_sensor_ctrl_t *s_ctrl,
int update_type, int res)
{
diff --git a/drivers/media/video/msm/sensors/msm_sensor.h b/drivers/media/video/msm/sensors/msm_sensor.h
index 2b1be1e..d1a6cee 100644
--- a/drivers/media/video/msm/sensors/msm_sensor.h
+++ b/drivers/media/video/msm/sensors/msm_sensor.h
@@ -226,6 +226,12 @@
int32_t msm_sensor_setting1(struct msm_sensor_ctrl_t *s_ctrl,
int update_type, int res);
+int32_t msm_sensor_setting2(struct msm_sensor_ctrl_t *s_ctrl,
+ int update_type, int res);
+
+int32_t msm_sensor_setting3(struct msm_sensor_ctrl_t *s_ctrl,
+ int update_type, int res);
+
int msm_sensor_enable_debugfs(struct msm_sensor_ctrl_t *s_ctrl);
long msm_sensor_subdev_ioctl(struct v4l2_subdev *sd,
@@ -233,6 +239,10 @@
struct msm_sensor_ctrl_t *get_sctrl(struct v4l2_subdev *sd);
+#if (defined CONFIG_WEBCAM_OV7692_QRD || defined CONFIG_OV5647)
+ extern int lcd_camera_power_onoff(int on);
+#endif
+
#define VIDIOC_MSM_SENSOR_CFG \
_IOWR('V', BASE_VIDIOC_PRIVATE + 10, void __user *)
diff --git a/drivers/media/video/msm/sensors/mt9e013_v4l2.c b/drivers/media/video/msm/sensors/mt9e013_v4l2.c
index 924cbc9..a6bc653 100644
--- a/drivers/media/video/msm/sensors/mt9e013_v4l2.c
+++ b/drivers/media/video/msm/sensors/mt9e013_v4l2.c
@@ -28,12 +28,6 @@
};
static struct msm_camera_i2c_reg_conf mt9e013_prev_settings[] = {
- {0x0300, 0x0004},/*VT_PIX_CLK_DIV*/
- {0x0302, 0x0001},/*VT_SYS_CLK_DIV*/
- {0x0304, 0x0002},/*PRE_PLL_CLK_DIV*/
- {0x0306, 0x003A},/*PLL_MULTIPLIER*/
- {0x0308, 0x000A},/*OP_PIX_CLK_DIV*/
- {0x030A, 0x0001},/*OP_SYS_CLK_DIV*/
/*Output Size (1632x1224)*/
{0x0344, 0x0008},/*X_ADDR_START*/
{0x0348, 0x0CC9},/*X_ADDR_END*/
@@ -56,12 +50,6 @@
};
static struct msm_camera_i2c_reg_conf mt9e013_snap_settings[] = {
- {0x0300, 0x0004},/*VT_PIX_CLK_DIV*/
- {0x0302, 0x0001},/*VT_SYS_CLK_DIV*/
- {0x0304, 0x0002},/*PRE_PLL_CLK_DIV*/
- {0x0306, 0x003A},/*PLL_MULTIPLIER*/
- {0x0308, 0x000A},/*OP_PIX_CLK_DIV*/
- {0x030A, 0x0001},/*OP_SYS_CLK_DIV*/
/*Output Size (3264x2448)*/
{0x0344, 0x0000},/*X_ADDR_START */
{0x0348, 0x0CCF},/*X_ADDR_END*/
@@ -172,14 +160,14 @@
{0x31B8, 0x0E3F},/*MIPI_TIMING_2*/
/*set data to RAW10 format*/
{0x0112, 0x0A0A},/*CCP_DATA_FORMAT*/
- {0x30F0, 0x8000},/*VCM CONTROL*/
+ {0x30F0, 0x800D},/*VCM CONTROL*/
{0x3044, 0x0590},
{0x306E, 0xFC80},
{0x30B2, 0xC000},
{0x30D6, 0x0800},
{0x316C, 0xB42F},
- {0x316E, 0x869C},
+ {0x316E, 0x869A},
{0x3170, 0x210E},
{0x317A, 0x010E},
{0x31E0, 0x1FB9},
@@ -188,17 +176,19 @@
{0x37C2, 0x0000},
{0x37C4, 0x0000},
{0x37C6, 0x0000},
+ {0x3E00, 0x0011},
{0x3E02, 0x8801},
- {0x3E04, 0x2301},
+ {0x3E04, 0x2801},
{0x3E06, 0x8449},
{0x3E08, 0x6841},
{0x3E0A, 0x400C},
{0x3E0C, 0x1001},
- {0x3E0E, 0x2103},
+ {0x3E0E, 0x2603},
{0x3E10, 0x4B41},
- {0x3E12, 0x4B26},
+ {0x3E12, 0x4B24},
+ {0x3E14, 0xA3CF},
{0x3E16, 0x8802},
- {0x3E18, 0x84FF},
+ {0x3E18, 0x8401},
{0x3E1A, 0x8601},
{0x3E1C, 0x8401},
{0x3E1E, 0x840A},
@@ -207,41 +197,56 @@
{0x3E24, 0x00FF},
{0x3E26, 0x0088},
{0x3E28, 0x2E8A},
+ {0x3E30, 0x0000},
{0x3E32, 0x8801},
- {0x3E34, 0x4024},
+ {0x3E34, 0x4029},
+ {0x3E36, 0x00FF},
{0x3E38, 0x8469},
- {0x3E3C, 0x2301},
- {0x3E3E, 0x3E25},
+ {0x3E3A, 0x00FF},
+ {0x3E3C, 0x2801},
+ {0x3E3E, 0x3E2A},
{0x3E40, 0x1C01},
- {0x3E42, 0x8486},
+ {0x3E42, 0xFF84},
{0x3E44, 0x8401},
- {0x3E46, 0x00FF},
+ {0x3E46, 0x0C01},
{0x3E48, 0x8401},
- {0x3E4A, 0x8601},
+ {0x3E4A, 0x00FF},
{0x3E4C, 0x8402},
- {0x3E4E, 0x00FF},
- {0x3E50, 0x6623},
+ {0x3E4E, 0x8984},
+ {0x3E50, 0x6628},
{0x3E52, 0x8340},
{0x3E54, 0x00FF},
{0x3E56, 0x4A42},
- {0x3E58, 0x2203},
- {0x3E5A, 0x674D},
- {0x3E5C, 0x3F25},
+ {0x3E58, 0x2703},
+ {0x3E5A, 0x6752},
+ {0x3E5C, 0x3F2A},
{0x3E5E, 0x846A},
{0x3E60, 0x4C01},
{0x3E62, 0x8401},
{0x3E66, 0x3901},
+ {0x3E90, 0x2C01},
+ {0x3E98, 0x2B02},
+ {0x3E92, 0x2A04},
+ {0x3E94, 0x2509},
+ {0x3E96, 0x0000},
+ {0x3E9A, 0x2905},
+ {0x3E9C, 0x00FF},
{0x3ECC, 0x00EB},
{0x3ED0, 0x1E24},
{0x3ED4, 0xAFC4},
{0x3ED6, 0x909B},
- {0x3ED8, 0x0006},
- {0x3EDA, 0xCFC6},
- {0x3EDC, 0x4FE4},
{0x3EE0, 0x2424},
{0x3EE2, 0x9797},
{0x3EE4, 0xC100},
- {0x3EE6, 0x0540}
+ {0x3EE6, 0x0540},
+ {0x3174, 0x8000},
+ /* PLL settings */
+ {0x0300, 0x0004},/*VT_PIX_CLK_DIV*/
+ {0x0302, 0x0001},/*VT_SYS_CLK_DIV*/
+ {0x0304, 0x0002},/*PRE_PLL_CLK_DIV*/
+ {0x0306, 0x003A},/*PLL_MULTIPLIER*/
+ {0x0308, 0x000A},/*OP_PIX_CLK_DIV*/
+ {0x030A, 0x0001},/*OP_SYS_CLK_DIV*/
};
static struct v4l2_subdev_info mt9e013_subdev_info[] = {
@@ -498,6 +503,7 @@
.sensor_v4l2_subdev_info_size = ARRAY_SIZE(mt9e013_subdev_info),
.sensor_v4l2_subdev_ops = &mt9e013_subdev_ops,
.func_tbl = &mt9e013_func_tbl,
+ .clk_rate = MSM_SENSOR_MCLK_24HZ,
};
module_init(msm_sensor_init_module);
diff --git a/drivers/media/video/msm/sensors/ov5647_v4l2.c b/drivers/media/video/msm/sensors/ov5647_v4l2.c
new file mode 100644
index 0000000..052305c
--- /dev/null
+++ b/drivers/media/video/msm/sensors/ov5647_v4l2.c
@@ -0,0 +1,634 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include "msm_sensor.h"
+#define SENSOR_NAME "ov5647"
+#define PLATFORM_DRIVER_NAME "msm_camera_ov5647"
+#define ov5647_obj ov5647_##obj
+
+static struct msm_sensor_ctrl_t ov5647_s_ctrl;
+
+DEFINE_MUTEX(ov5647_mut);
+
+
+
+static struct msm_camera_i2c_reg_conf ov5647_start_settings[] = {
+ {0x4202, 0x00}, /* streaming on */
+};
+
+static struct msm_camera_i2c_reg_conf ov5647_stop_settings[] = {
+ {0x4202, 0x0f}, /* streaming off*/
+};
+
+static struct msm_camera_i2c_reg_conf ov5647_groupon_settings[] = {
+ {0x0104, 0x01},
+};
+
+static struct msm_camera_i2c_reg_conf ov5647_groupoff_settings[] = {
+ {0x0104, 0x0},
+};
+
+static struct msm_camera_i2c_reg_conf ov5647_prev_settings[] = {
+ /*1280*960 Reference Setting 24M MCLK 2lane 280Mbps/lane 30fps
+ for back to preview*/
+ {0x3035, 0x21},
+ {0x3036, 0x37},
+ {0x3821, 0x07},
+ {0x3820, 0x41},
+ {0x3612, 0x09},
+ {0x3618, 0x00},
+ {0x380c, 0x07},
+ {0x380d, 0x68},
+ {0x380e, 0x03},
+ {0x380f, 0xd8},
+ {0x3814, 0x31},
+ {0x3815, 0x31},
+ {0x3709, 0x52},
+ {0x3808, 0x05},
+ {0x3809, 0x00},
+ {0x380a, 0x03},
+ {0x380b, 0xc0},
+ {0x3800, 0x00},
+ {0x3801, 0x18},
+ {0x3802, 0x00},
+ {0x3803, 0x0e},
+ {0x3804, 0x0a},
+ {0x3805, 0x27},
+ {0x3806, 0x07},
+ {0x3807, 0x95},
+ {0x4004, 0x02},
+};
+
+static struct msm_camera_i2c_reg_conf ov5647_snap_settings[] = {
+ /*2608*1952 Reference Setting 24M MCLK 2lane 280Mbps/lane 30fps*/
+ {0x3035, 0x21},
+ {0x3036, 0x4f},
+ {0x3821, 0x06},
+ {0x3820, 0x00},
+ {0x3612, 0x0b},
+ {0x3618, 0x04},
+ {0x380c, 0x0a},
+ {0x380d, 0x8c},
+ {0x380e, 0x07},
+ {0x380f, 0xb0},
+ {0x3814, 0x11},
+ {0x3815, 0x11},
+ {0x3709, 0x12},
+ {0x3808, 0x0a},
+ {0x3809, 0x30},
+ {0x380a, 0x07},
+ {0x380b, 0xa0},
+ {0x3800, 0x00},
+ {0x3801, 0x04},
+ {0x3802, 0x00},
+ {0x3803, 0x00},
+ {0x3804, 0x0a},
+ {0x3805, 0x3b},
+ {0x3806, 0x07},
+ {0x3807, 0xa3},
+ {0x4004, 0x04},
+};
+
+static struct msm_camera_i2c_reg_conf ov5647_recommend_settings[] = {
+ {0x3035, 0x11},
+ {0x303c, 0x11},
+ {0x370c, 0x03},
+ {0x5000, 0x06},
+ {0x5003, 0x08},
+ {0x5a00, 0x08},
+ {0x3000, 0xff},
+ {0x3001, 0xff},
+ {0x3002, 0xff},
+ {0x301d, 0xf0},
+ {0x3a18, 0x00},
+ {0x3a19, 0xf8},
+ {0x3c01, 0x80},
+ {0x3b07, 0x0c},
+ {0x3708, 0x64},
+ {0x3630, 0x2e},
+ {0x3632, 0xe2},
+ {0x3633, 0x23},
+ {0x3634, 0x44},
+ {0x3620, 0x64},
+ {0x3621, 0xe0},
+ {0x3600, 0x37},
+ {0x3704, 0xa0},
+ {0x3703, 0x5a},
+ {0x3715, 0x78},
+ {0x3717, 0x01},
+ {0x3731, 0x02},
+ {0x370b, 0x60},
+ {0x3705, 0x1a},
+ {0x3f05, 0x02},
+ {0x3f06, 0x10},
+ {0x3f01, 0x0a},
+ {0x3a08, 0x01},
+ {0x3a0f, 0x58},
+ {0x3a10, 0x50},
+ {0x3a1b, 0x58},
+ {0x3a1e, 0x50},
+ {0x3a11, 0x60},
+ {0x3a1f, 0x28},
+ {0x4001, 0x02},
+ {0x4000, 0x09},
+ {0x3000, 0x00},
+ {0x3001, 0x00},
+ {0x3002, 0x00},
+ {0x3017, 0xe0},
+ {0x301c, 0xfc},
+ {0x3636, 0x06},
+ {0x3016, 0x08},
+ {0x3827, 0xec},
+ {0x3018, 0x44},
+ {0x3035, 0x21},
+ {0x3106, 0xf5},
+ {0x3034, 0x18},
+ {0x301c, 0xf8},
+ /*lens setting*/
+ {0x5000, 0x86},
+ {0x5800, 0x11},
+ {0x5801, 0x0c},
+ {0x5802, 0x0a},
+ {0x5803, 0x0b},
+ {0x5804, 0x0d},
+ {0x5805, 0x13},
+ {0x5806, 0x09},
+ {0x5807, 0x05},
+ {0x5808, 0x03},
+ {0x5809, 0x03},
+ {0x580a, 0x06},
+ {0x580b, 0x08},
+ {0x580c, 0x05},
+ {0x580d, 0x01},
+ {0x580e, 0x00},
+ {0x580f, 0x00},
+ {0x5810, 0x02},
+ {0x5811, 0x06},
+ {0x5812, 0x05},
+ {0x5813, 0x01},
+ {0x5814, 0x00},
+ {0x5815, 0x00},
+ {0x5816, 0x02},
+ {0x5817, 0x06},
+ {0x5818, 0x09},
+ {0x5819, 0x05},
+ {0x581a, 0x04},
+ {0x581b, 0x04},
+ {0x581c, 0x06},
+ {0x581d, 0x09},
+ {0x581e, 0x11},
+ {0x581f, 0x0c},
+ {0x5820, 0x0b},
+ {0x5821, 0x0b},
+ {0x5822, 0x0d},
+ {0x5823, 0x13},
+ {0x5824, 0x22},
+ {0x5825, 0x26},
+ {0x5826, 0x26},
+ {0x5827, 0x24},
+ {0x5828, 0x24},
+ {0x5829, 0x24},
+ {0x582a, 0x22},
+ {0x582b, 0x20},
+ {0x582c, 0x22},
+ {0x582d, 0x26},
+ {0x582e, 0x22},
+ {0x582f, 0x22},
+ {0x5830, 0x42},
+ {0x5831, 0x22},
+ {0x5832, 0x02},
+ {0x5833, 0x24},
+ {0x5834, 0x22},
+ {0x5835, 0x22},
+ {0x5836, 0x22},
+ {0x5837, 0x26},
+ {0x5838, 0x42},
+ {0x5839, 0x26},
+ {0x583a, 0x06},
+ {0x583b, 0x26},
+ {0x583c, 0x24},
+ {0x583d, 0xce},
+ /* manual AWB,manual AE,close Lenc,open WBC*/
+ {0x3503, 0x03}, /*manual AE*/
+ {0x3501, 0x10},
+ {0x3502, 0x80},
+ {0x350a, 0x00},
+ {0x350b, 0x7f},
+ {0x5001, 0x01}, /*manual AWB*/
+ {0x5180, 0x08},
+ {0x5186, 0x04},
+ {0x5187, 0x00},
+ {0x5188, 0x04},
+ {0x5189, 0x00},
+ {0x518a, 0x04},
+ {0x518b, 0x00},
+ {0x5000, 0x06}, /*No lenc,WBC on*/
+};
+
+
+static struct msm_camera_i2c_conf_array ov5647_init_conf[] = {
+ {&ov5647_recommend_settings[0],
+ ARRAY_SIZE(ov5647_recommend_settings), 0, MSM_CAMERA_I2C_BYTE_DATA}
+};
+
+static struct msm_camera_i2c_conf_array ov5647_confs[] = {
+ {&ov5647_snap_settings[0],
+ ARRAY_SIZE(ov5647_snap_settings), 0, MSM_CAMERA_I2C_BYTE_DATA},
+ {&ov5647_prev_settings[0],
+ ARRAY_SIZE(ov5647_prev_settings), 0, MSM_CAMERA_I2C_BYTE_DATA},
+};
+
+static struct msm_camera_csi_params ov5647_csi_params = {
+ .data_format = CSI_8BIT,
+ .lane_cnt = 2,
+ .lane_assign = 0xe4,
+ .dpcm_scheme = 0,
+ .settle_cnt = 10,
+};
+
+static struct v4l2_subdev_info ov5647_subdev_info[] = {
+ {
+ .code = V4L2_MBUS_FMT_SBGGR10_1X10,
+ .colorspace = V4L2_COLORSPACE_JPEG,
+ .fmt = 1,
+ .order = 0,
+ },
+ /* more can be supported, to be added later */
+};
+
+static struct msm_sensor_output_info_t ov5647_dimensions[] = {
+ { /* For SNAPSHOT */
+ .x_output = 0xA30, /*2608*/ /*for 5Mp*/
+ .y_output = 0x7A0, /*1952*/
+ .line_length_pclk = 0xA8C,
+ .frame_length_lines = 0x7B0,
+ .vt_pixel_clk = 159408000,
+ .op_pixel_clk = 159408000,
+ .binning_factor = 0x0,
+ },
+ { /* For PREVIEW */
+ .x_output = 0x500, /*2608*/ /*for 5Mp*/
+ .y_output = 0x3C0, /*1952*/
+ .line_length_pclk = 0x768 * 2,
+ .frame_length_lines = 0x3D8,
+ .vt_pixel_clk = 159408000,
+ .op_pixel_clk = 159408000,
+ .binning_factor = 0x0,
+ },
+};
+
+static struct msm_sensor_output_reg_addr_t ov5647_reg_addr = {
+ .x_output = 0x3808,
+ .y_output = 0x380A,
+ .line_length_pclk = 0x380C,
+ .frame_length_lines = 0x380E,
+};
+
+static struct msm_camera_csi_params *ov5647_csi_params_array[] = {
+ &ov5647_csi_params,
+ &ov5647_csi_params,
+};
+
+static struct msm_sensor_id_info_t ov5647_id_info = {
+ .sensor_id_reg_addr = 0x300a,
+ .sensor_id = 0x5647,
+};
+
+static struct msm_sensor_exp_gain_info_t ov5647_exp_gain_info = {
+ .coarse_int_time_addr = 0x3500,
+ .global_gain_addr = 0x350A,
+ .vert_offset = 4,
+};
+
+void ov5647_sensor_reset_stream(struct msm_sensor_ctrl_t *s_ctrl)
+{
+ msm_camera_i2c_write(
+ s_ctrl->sensor_i2c_client,
+ 0x103, 0x1,
+ MSM_CAMERA_I2C_BYTE_DATA);
+}
+
+static int32_t ov5647_write_pict_exp_gain(struct msm_sensor_ctrl_t *s_ctrl,
+ uint16_t gain, uint32_t line)
+{
+
+ uint16_t max_line;
+ uint8_t gain_lsb, gain_hsb;
+ u8 intg_time_hsb, intg_time_msb, intg_time_lsb;
+
+ gain_lsb = (uint8_t) (gain);
+ gain_hsb = (uint8_t)((gain & 0x300)>>8);
+
+ CDBG(KERN_ERR "snapshot exposure seting 0x%x, 0x%x, %d"
+ , gain, line, line);
+
+ if (line > 1964) {
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->vert_offset,
+ (uint8_t)((line+4) >> 8),
+ MSM_CAMERA_I2C_BYTE_DATA);
+
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->vert_offset + 1,
+ (uint8_t)((line+4) & 0x00FF),
+ MSM_CAMERA_I2C_BYTE_DATA);
+
+ max_line = line + 4;
+ } else if (line > 1968) {
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->vert_offset,
+ (uint8_t)((line+4) >> 8),
+ MSM_CAMERA_I2C_BYTE_DATA);
+
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->vert_offset + 1,
+ (uint8_t)((line+4) & 0x00FF),
+ MSM_CAMERA_I2C_BYTE_DATA);
+ max_line = 1968;
+ }
+
+
+ line = line<<4;
+ /* ov5647 need this operation */
+ intg_time_hsb = (u8)(line>>16);
+ intg_time_msb = (u8) ((line & 0xFF00) >> 8);
+ intg_time_lsb = (u8) (line & 0x00FF);
+
+ /* FIXME for BLC trigger */
+ s_ctrl->func_tbl->sensor_group_hold_on(s_ctrl);
+
+ /* Coarse Integration Time */
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->coarse_int_time_addr,
+ intg_time_hsb,
+ MSM_CAMERA_I2C_BYTE_DATA);
+
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->coarse_int_time_addr + 1,
+ intg_time_msb,
+ MSM_CAMERA_I2C_BYTE_DATA);
+
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->coarse_int_time_addr + 2,
+ intg_time_lsb,
+ MSM_CAMERA_I2C_BYTE_DATA);
+
+ /* gain */
+
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->global_gain_addr,
+ gain_hsb,
+ MSM_CAMERA_I2C_BYTE_DATA);
+
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->global_gain_addr + 1,
+ gain_lsb-1,
+ MSM_CAMERA_I2C_BYTE_DATA);
+
+ /* Coarse Integration Time */
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->coarse_int_time_addr,
+ intg_time_hsb,
+ MSM_CAMERA_I2C_BYTE_DATA);
+
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->coarse_int_time_addr + 1,
+ intg_time_msb,
+ MSM_CAMERA_I2C_BYTE_DATA);
+
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->coarse_int_time_addr + 2,
+ intg_time_lsb,
+ MSM_CAMERA_I2C_BYTE_DATA);
+
+ /* gain */
+
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->global_gain_addr,
+ gain_hsb,
+ MSM_CAMERA_I2C_BYTE_DATA);
+
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->global_gain_addr + 1,
+ gain_lsb,
+ MSM_CAMERA_I2C_BYTE_DATA);
+
+
+ s_ctrl->func_tbl->sensor_group_hold_off(s_ctrl);
+ return 0;
+
+}
+
+
+static int32_t ov5647_write_prev_exp_gain(struct msm_sensor_ctrl_t *s_ctrl,
+ uint16_t gain, uint32_t line)
+{
+
+ uint16_t max_line;
+ u8 intg_time_hsb, intg_time_msb, intg_time_lsb;
+ uint8_t gain_lsb, gain_hsb;
+
+ pr_info(KERN_ERR "preview exposure setting 0x%x, 0x%x, %d",
+ gain, line, line);
+
+ gain_lsb = (uint8_t) (gain);
+ gain_hsb = (uint8_t)((gain & 0x300)>>8);
+ /* adjust frame rate */
+ if (line > 980) {
+
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->vert_offset,
+ (uint8_t)((line+4) >> 8),
+ MSM_CAMERA_I2C_BYTE_DATA);
+
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->vert_offset + 1,
+ (uint8_t)((line+4) & 0x00FF),
+ MSM_CAMERA_I2C_BYTE_DATA);
+ max_line = line + 4;
+ } else if (line > 984) {
+
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->vert_offset,
+ (uint8_t)(984 >> 8),
+ MSM_CAMERA_I2C_BYTE_DATA);
+
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->vert_offset + 1 ,
+ (uint8_t)(984 & 0x00FF),
+ MSM_CAMERA_I2C_BYTE_DATA);
+ max_line = 984;
+ }
+
+ line = line<<4;
+ /* ov5647 need this operation */
+ intg_time_hsb = (u8)(line>>16);
+ intg_time_msb = (u8) ((line & 0xFF00) >> 8);
+ intg_time_lsb = (u8) (line & 0x00FF);
+
+ s_ctrl->func_tbl->sensor_group_hold_on(s_ctrl);
+
+ /* Coarse Integration Time */
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->coarse_int_time_addr,
+ intg_time_hsb,
+ MSM_CAMERA_I2C_BYTE_DATA);
+
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->coarse_int_time_addr + 1,
+ intg_time_msb,
+ MSM_CAMERA_I2C_BYTE_DATA);
+
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->coarse_int_time_addr + 2,
+ intg_time_lsb,
+ MSM_CAMERA_I2C_BYTE_DATA);
+
+ /* gain */
+
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->global_gain_addr,
+ gain_hsb,
+ MSM_CAMERA_I2C_BYTE_DATA);
+
+ msm_camera_i2c_write(s_ctrl->sensor_i2c_client,
+ s_ctrl->sensor_exp_gain_info->global_gain_addr + 1,
+ gain_lsb,
+ MSM_CAMERA_I2C_BYTE_DATA);
+
+ s_ctrl->func_tbl->sensor_group_hold_off(s_ctrl);
+
+ return 0;
+}
+
+static const struct i2c_device_id ov5647_i2c_id[] = {
+ {SENSOR_NAME, (kernel_ulong_t)&ov5647_s_ctrl},
+ { }
+};
+
+static struct i2c_driver ov5647_i2c_driver = {
+ .id_table = ov5647_i2c_id,
+ .probe = msm_sensor_i2c_probe,
+ .driver = {
+ .name = SENSOR_NAME,
+ },
+};
+
+
+
+static struct msm_camera_i2c_client ov5647_sensor_i2c_client = {
+ .addr_type = MSM_CAMERA_I2C_WORD_ADDR,
+};
+
+static int __init msm_sensor_init_module(void)
+{
+ return i2c_add_driver(&ov5647_i2c_driver);
+}
+
+static struct v4l2_subdev_core_ops ov5647_subdev_core_ops = {
+ .ioctl = msm_sensor_subdev_ioctl,
+ .s_power = msm_sensor_power,
+};
+
+static struct v4l2_subdev_video_ops ov5647_subdev_video_ops = {
+ .enum_mbus_fmt = msm_sensor_v4l2_enum_fmt,
+};
+
+static struct v4l2_subdev_ops ov5647_subdev_ops = {
+ .core = &ov5647_subdev_core_ops,
+ .video = &ov5647_subdev_video_ops,
+};
+
+int32_t ov5647_sensor_power_up(struct msm_sensor_ctrl_t *s_ctrl)
+{
+ int32_t rc = 0;
+ struct msm_camera_sensor_info *info = NULL;
+
+ rc = msm_sensor_power_up(s_ctrl);
+ if (rc < 0) {
+ CDBG("%s: msm_sensor_power_up failed\n", __func__);
+ return rc;
+ }
+ info = s_ctrl->sensordata;
+
+ gpio_direction_output(info->sensor_pwd, 1);
+ gpio_direction_output(info->sensor_reset, 0);
+ usleep_range(1000, 1100);
+ /* turn on ldo and vreg */
+ if (info->pmic_gpio_enable)
+ lcd_camera_power_onoff(1);
+
+ gpio_direction_output(info->sensor_pwd, 0);
+ usleep_range(4000, 4100);
+ gpio_direction_output(info->sensor_reset, 1);
+ usleep_range(2000, 2100);
+
+ return rc;
+
+}
+static struct msm_sensor_fn_t ov5647_func_tbl = {
+ .sensor_start_stream = msm_sensor_start_stream,
+ .sensor_stop_stream = msm_sensor_stop_stream,
+ .sensor_group_hold_on = msm_sensor_group_hold_on,
+ .sensor_group_hold_off = msm_sensor_group_hold_off,
+ .sensor_set_fps = msm_sensor_set_fps,
+ .sensor_write_exp_gain = ov5647_write_prev_exp_gain,
+ .sensor_write_snapshot_exp_gain = ov5647_write_pict_exp_gain,
+ .sensor_setting = msm_sensor_setting2,
+ .sensor_set_sensor_mode = msm_sensor_set_sensor_mode,
+ .sensor_mode_init = msm_sensor_mode_init,
+ .sensor_get_output_info = msm_sensor_get_output_info,
+ .sensor_config = msm_sensor_config,
+ .sensor_power_up = ov5647_sensor_power_up,
+ .sensor_power_down = msm_sensor_power_down,
+};
+
+static struct msm_sensor_reg_t ov5647_regs = {
+ .default_data_type = MSM_CAMERA_I2C_BYTE_DATA,
+ .start_stream_conf = ov5647_start_settings,
+ .start_stream_conf_size = ARRAY_SIZE(ov5647_start_settings),
+ .stop_stream_conf = ov5647_stop_settings,
+ .stop_stream_conf_size = ARRAY_SIZE(ov5647_stop_settings),
+ .group_hold_on_conf = ov5647_groupon_settings,
+ .group_hold_on_conf_size = ARRAY_SIZE(ov5647_groupon_settings),
+ .group_hold_off_conf = ov5647_groupoff_settings,
+ .group_hold_off_conf_size =
+ ARRAY_SIZE(ov5647_groupoff_settings),
+ .init_settings = &ov5647_init_conf[0],
+ .init_size = ARRAY_SIZE(ov5647_init_conf),
+ .mode_settings = &ov5647_confs[0],
+ .output_settings = &ov5647_dimensions[0],
+ .num_conf = ARRAY_SIZE(ov5647_confs),
+};
+
+static struct msm_sensor_ctrl_t ov5647_s_ctrl = {
+ .msm_sensor_reg = &ov5647_regs,
+ .sensor_i2c_client = &ov5647_sensor_i2c_client,
+ .sensor_i2c_addr = 0x36 << 1 ,
+ .sensor_output_reg_addr = &ov5647_reg_addr,
+ .sensor_id_info = &ov5647_id_info,
+ .sensor_exp_gain_info = &ov5647_exp_gain_info,
+ .cam_mode = MSM_SENSOR_MODE_INVALID,
+ .csic_params = &ov5647_csi_params_array[0],
+ .msm_sensor_mutex = &ov5647_mut,
+ .sensor_i2c_driver = &ov5647_i2c_driver,
+ .sensor_v4l2_subdev_info = ov5647_subdev_info,
+ .sensor_v4l2_subdev_info_size = ARRAY_SIZE(ov5647_subdev_info),
+ .sensor_v4l2_subdev_ops = &ov5647_subdev_ops,
+ .func_tbl = &ov5647_func_tbl,
+ .clk_rate = MSM_SENSOR_MCLK_24HZ,
+};
+
+module_init(msm_sensor_init_module);
+MODULE_DESCRIPTION("Omnivision WXGA Bayer sensor driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/media/video/msm/sensors/ov7692_qrd_v4l2.c b/drivers/media/video/msm/sensors/ov7692_qrd_v4l2.c
new file mode 100644
index 0000000..f33d303
--- /dev/null
+++ b/drivers/media/video/msm/sensors/ov7692_qrd_v4l2.c
@@ -0,0 +1,695 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include "msm_sensor.h"
+#define SENSOR_NAME "ov7692"
+#define PLATFORM_DRIVER_NAME "msm_camera_ov7692"
+#define ov7692_obj ov7692_##obj
+#define MSB 1
+#define LSB 0
+
+DEFINE_MUTEX(ov7692_mut);
+static struct msm_sensor_ctrl_t ov7692_s_ctrl;
+
+static struct msm_camera_i2c_reg_conf ov7692_prev_settings[] = {
+ {0x12, 0x80},
+ {0x0e, 0x08},
+ {0x69, 0x52},
+ {0x1e, 0xb3},
+ {0x48, 0x42},
+ {0xff, 0x01},
+ {0xae, 0xa0},
+ {0xa8, 0x26},
+ {0xb4, 0xc0},
+ {0xb5, 0x40},
+ {0xff, 0x00},
+ {0x0c, 0x00},
+ {0x62, 0x10},
+ {0x12, 0x00},
+ {0x17, 0x65},
+ {0x18, 0xa4},
+ {0x19, 0x0a},
+ {0x1a, 0xf6},
+ {0x3e, 0x30},
+ {0x64, 0x0a},
+ {0xff, 0x01},
+ {0xb4, 0xc0},
+ {0xff, 0x00},
+ {0x67, 0x20},
+ {0x81, 0x3f},
+ {0xcc, 0x02},
+ {0xcd, 0x80},
+ {0xce, 0x01},
+ {0xcf, 0xe0},
+ {0xc8, 0x02},
+ {0xc9, 0x80},
+ {0xca, 0x01},
+ {0xcb, 0xe0},
+ {0xd0, 0x48},
+ {0x82, 0x03},
+ {0x70, 0x00},
+ {0x71, 0x34},
+ {0x74, 0x28},
+ {0x75, 0x98},
+ {0x76, 0x00},
+ {0x77, 0x64},
+ {0x78, 0x01},
+ {0x79, 0xc2},
+ {0x7a, 0x4e},
+ {0x7b, 0x1f},
+ {0x7c, 0x00},
+ {0x11, 0x00},
+ {0x20, 0x00},
+ {0x21, 0x23},
+ {0x50, 0x9a},
+ {0x51, 0x80},
+ {0x4c, 0x7d},
+ {0x85, 0x10},
+ {0x86, 0x00},
+ {0x87, 0x00},
+ {0x88, 0x00},
+ {0x89, 0x2a},
+ {0x8a, 0x26},
+ {0x8b, 0x22},
+ {0xbb, 0x7a},
+ {0xbc, 0x69},
+ {0xbd, 0x11},
+ {0xbe, 0x13},
+ {0xbf, 0x81},
+ {0xc0, 0x96},
+ {0xc1, 0x1e},
+ {0xb7, 0x05},
+ {0xb8, 0x09},
+ {0xb9, 0x00},
+ {0xba, 0x18},
+ {0x5a, 0x1f},
+ {0x5b, 0x9f},
+ {0x5c, 0x6a},
+ {0x5d, 0x42},
+ {0x24, 0x78},
+ {0x25, 0x68},
+ {0x26, 0xb3},
+ {0xa3, 0x0b},
+ {0xa4, 0x15},
+ {0xa5, 0x2a},
+ {0xa6, 0x51},
+ {0xa7, 0x63},
+ {0xa8, 0x74},
+ {0xa9, 0x83},
+ {0xaa, 0x91},
+ {0xab, 0x9e},
+ {0xac, 0xaa},
+ {0xad, 0xbe},
+ {0xae, 0xce},
+ {0xaf, 0xe5},
+ {0xb0, 0xf3},
+ {0xb1, 0xfb},
+ {0xb2, 0x06},
+ {0x8c, 0x5c},
+ {0x8d, 0x11},
+ {0x8e, 0x12},
+ {0x8f, 0x19},
+ {0x90, 0x50},
+ {0x91, 0x20},
+ {0x92, 0x96},
+ {0x93, 0x80},
+ {0x94, 0x13},
+ {0x95, 0x1b},
+ {0x96, 0xff},
+ {0x97, 0x00},
+ {0x98, 0x3d},
+ {0x99, 0x36},
+ {0x9a, 0x51},
+ {0x9b, 0x43},
+ {0x9c, 0xf0},
+ {0x9d, 0xf0},
+ {0x9e, 0xf0},
+ {0x9f, 0xff},
+ {0xa0, 0x68},
+ {0xa1, 0x62},
+ {0xa2, 0x0e},
+
+};
+
+static struct msm_camera_i2c_reg_conf ov7692_snap_settings[] = {
+ {0x12, 0x80},
+ {0x0e, 0x08},
+ {0x69, 0x52},
+ {0x1e, 0xb3},
+ {0x48, 0x42},
+ {0xff, 0x01},
+ {0xae, 0xa0},
+ {0xa8, 0x26},
+ {0xb4, 0xc0},
+ {0xb5, 0x40},
+ {0xff, 0x00},
+ {0x0c, 0x00},
+ {0x62, 0x10},
+ {0x12, 0x00},
+ {0x17, 0x65},
+ {0x18, 0xa4},
+ {0x19, 0x0a},
+ {0x1a, 0xf6},
+ {0x3e, 0x30},
+ {0x64, 0x0a},
+ {0xff, 0x01},
+ {0xb4, 0xc0},
+ {0xff, 0x00},
+ {0x67, 0x20},
+ {0x81, 0x3f},
+ {0xcc, 0x02},
+ {0xcd, 0x80},
+ {0xce, 0x01},
+ {0xcf, 0xe0},
+ {0xc8, 0x02},
+ {0xc9, 0x80},
+ {0xca, 0x01},
+ {0xcb, 0xe0},
+ {0xd0, 0x48},
+ {0x82, 0x03},
+ {0x70, 0x00},
+ {0x71, 0x34},
+ {0x74, 0x28},
+ {0x75, 0x98},
+ {0x76, 0x00},
+ {0x77, 0x64},
+ {0x78, 0x01},
+ {0x79, 0xc2},
+ {0x7a, 0x4e},
+ {0x7b, 0x1f},
+ {0x7c, 0x00},
+ {0x11, 0x00},
+ {0x20, 0x00},
+ {0x21, 0x23},
+ {0x50, 0x9a},
+ {0x51, 0x80},
+ {0x4c, 0x7d},
+ {0x85, 0x10},
+ {0x86, 0x00},
+ {0x87, 0x00},
+ {0x88, 0x00},
+ {0x89, 0x2a},
+ {0x8a, 0x26},
+ {0x8b, 0x22},
+ {0xbb, 0x7a},
+ {0xbc, 0x69},
+ {0xbd, 0x11},
+ {0xbe, 0x13},
+ {0xbf, 0x81},
+ {0xc0, 0x96},
+ {0xc1, 0x1e},
+ {0xb7, 0x05},
+ {0xb8, 0x09},
+ {0xb9, 0x00},
+ {0xba, 0x18},
+ {0x5a, 0x1f},
+ {0x5b, 0x9f},
+ {0x5c, 0x6a},
+ {0x5d, 0x42},
+ {0x24, 0x78},
+ {0x25, 0x68},
+ {0x26, 0xb3},
+ {0xa3, 0x0b},
+ {0xa4, 0x15},
+ {0xa5, 0x2a},
+ {0xa6, 0x51},
+ {0xa7, 0x63},
+ {0xa8, 0x74},
+ {0xa9, 0x83},
+ {0xaa, 0x91},
+ {0xab, 0x9e},
+ {0xac, 0xaa},
+ {0xad, 0xbe},
+ {0xae, 0xce},
+ {0xaf, 0xe5},
+ {0xb0, 0xf3},
+ {0xb1, 0xfb},
+ {0xb2, 0x06},
+ {0x8c, 0x5c},
+ {0x8d, 0x11},
+ {0x8e, 0x12},
+ {0x8f, 0x19},
+ {0x90, 0x50},
+ {0x91, 0x20},
+ {0x92, 0x96},
+ {0x93, 0x80},
+ {0x94, 0x13},
+ {0x95, 0x1b},
+ {0x96, 0xff},
+ {0x97, 0x00},
+ {0x98, 0x3d},
+ {0x99, 0x36},
+ {0x9a, 0x51},
+ {0x9b, 0x43},
+ {0x9c, 0xf0},
+ {0x9d, 0xf0},
+ {0x9e, 0xf0},
+ {0x9f, 0xff},
+ {0xa0, 0x68},
+ {0xa1, 0x62},
+ {0xa2, 0x0e},
+
+};
+
+static struct msm_camera_i2c_reg_conf ov7692_recommend_settings[] = {
+ {0x12, 0x80},
+ {0x0e, 0x08},
+ {0x69, 0x52},
+ {0x1e, 0xb3},
+ {0x48, 0x42},
+ {0xff, 0x01},
+ {0xae, 0xa0},
+ {0xa8, 0x26},
+ {0xb4, 0xc0},
+ {0xb5, 0x40},
+ {0xff, 0x00},
+ {0x0c, 0x00},
+ {0x62, 0x10},
+ {0x12, 0x00},
+ {0x17, 0x65},
+ {0x18, 0xa4},
+ {0x19, 0x0a},
+ {0x1a, 0xf6},
+ {0x3e, 0x30},
+ {0x64, 0x0a},
+ {0xff, 0x01},
+ {0xb4, 0xc0},
+ {0xff, 0x00},
+ {0x67, 0x20},
+ {0x81, 0x3f},
+ {0xcc, 0x02},
+ {0xcd, 0x80},
+ {0xce, 0x01},
+ {0xcf, 0xe0},
+ {0xc8, 0x02},
+ {0xc9, 0x80},
+ {0xca, 0x01},
+ {0xcb, 0xe0},
+ {0xd0, 0x48},
+ {0x82, 0x03},
+ {0x70, 0x00},
+ {0x71, 0x34},
+ {0x74, 0x28},
+ {0x75, 0x98},
+ {0x76, 0x00},
+ {0x77, 0x64},
+ {0x78, 0x01},
+ {0x79, 0xc2},
+ {0x7a, 0x4e},
+ {0x7b, 0x1f},
+ {0x7c, 0x00},
+ {0x11, 0x00},
+ {0x20, 0x00},
+ {0x21, 0x23},
+ {0x50, 0x9a},
+ {0x51, 0x80},
+ {0x4c, 0x7d},
+ {0x85, 0x10},
+ {0x86, 0x00},
+ {0x87, 0x00},
+ {0x88, 0x00},
+ {0x89, 0x2a},
+ {0x8a, 0x26},
+ {0x8b, 0x22},
+ {0xbb, 0x7a},
+ {0xbc, 0x69},
+ {0xbd, 0x11},
+ {0xbe, 0x13},
+ {0xbf, 0x81},
+ {0xc0, 0x96},
+ {0xc1, 0x1e},
+ {0xb7, 0x05},
+ {0xb8, 0x09},
+ {0xb9, 0x00},
+ {0xba, 0x18},
+ {0x5a, 0x1f},
+ {0x5b, 0x9f},
+ {0x5c, 0x6a},
+ {0x5d, 0x42},
+ {0x24, 0x78},
+ {0x25, 0x68},
+ {0x26, 0xb3},
+ {0xa3, 0x0b},
+ {0xa4, 0x15},
+ {0xa5, 0x2a},
+ {0xa6, 0x51},
+ {0xa7, 0x63},
+ {0xa8, 0x74},
+ {0xa9, 0x83},
+ {0xaa, 0x91},
+ {0xab, 0x9e},
+ {0xac, 0xaa},
+ {0xad, 0xbe},
+ {0xae, 0xce},
+ {0xaf, 0xe5},
+ {0xb0, 0xf3},
+ {0xb1, 0xfb},
+ {0xb2, 0x06},
+ {0x8c, 0x5c},
+ {0x8d, 0x11},
+ {0x8e, 0x12},
+ {0x8f, 0x19},
+ {0x90, 0x50},
+ {0x91, 0x20},
+ {0x92, 0x96},
+ {0x93, 0x80},
+ {0x94, 0x13},
+ {0x95, 0x1b},
+ {0x96, 0xff},
+ {0x97, 0x00},
+ {0x98, 0x3d},
+ {0x99, 0x36},
+ {0x9a, 0x51},
+ {0x9b, 0x43},
+ {0x9c, 0xf0},
+ {0x9d, 0xf0},
+ {0x9e, 0xf0},
+ {0x9f, 0xff},
+ {0xa0, 0x68},
+ {0xa1, 0x62},
+ {0xa2, 0x0e},
+
+};
+
+static struct v4l2_subdev_info ov7692_subdev_info[] = {
+ {
+ .code = V4L2_MBUS_FMT_YUYV8_2X8,
+ .colorspace = V4L2_COLORSPACE_JPEG,
+ .fmt = 1,
+ .order = 0,
+ },
+ /* more can be supported, to be added later */
+};
+
+
+static struct msm_camera_i2c_conf_array ov7692_init_conf[] = {
+ {&ov7692_recommend_settings[0],
+ ARRAY_SIZE(ov7692_recommend_settings), 0, MSM_CAMERA_I2C_BYTE_DATA}
+};
+
+static struct msm_camera_i2c_conf_array ov7692_confs[] = {
+ {&ov7692_snap_settings[0],
+ ARRAY_SIZE(ov7692_snap_settings), 0, MSM_CAMERA_I2C_BYTE_DATA},
+ {&ov7692_prev_settings[0],
+ ARRAY_SIZE(ov7692_prev_settings), 0, MSM_CAMERA_I2C_BYTE_DATA},
+};
+
+static struct msm_sensor_output_info_t ov7692_dimensions[] = {
+ {
+ .x_output = 0x280,
+ .y_output = 0x1E0,
+ .line_length_pclk = 0x290,
+ .frame_length_lines = 0x1EC,
+ .vt_pixel_clk = 9216000,
+ .op_pixel_clk = 9216000,
+ .binning_factor = 1,
+ },
+ {
+ .x_output = 0x280,
+ .y_output = 0x1E0,
+ .line_length_pclk = 0x290,
+ .frame_length_lines = 0x1EC,
+ .vt_pixel_clk = 9216000,
+ .op_pixel_clk = 9216000,
+ .binning_factor = 1,
+ },
+};
+
+
+static struct msm_camera_csi_params ov7692_csi_params = {
+ .data_format = CSI_8BIT,
+ .lane_cnt = 1,
+ .lane_assign = 0xe4,
+ .dpcm_scheme = 0,
+ .settle_cnt = 0x14,
+};
+
+static struct msm_camera_csi_params *ov7692_csi_params_array[] = {
+ &ov7692_csi_params,
+ &ov7692_csi_params,
+};
+
+static struct msm_sensor_output_reg_addr_t ov7692_reg_addr = {
+ .x_output = 0xCC,
+ .y_output = 0xCE,
+ .line_length_pclk = 0xC8,
+ .frame_length_lines = 0xCA,
+};
+
+static struct msm_sensor_id_info_t ov7692_id_info = {
+ .sensor_id_reg_addr = 0x0A,
+ .sensor_id = 0x7692,
+};
+
+static struct msm_sensor_exp_gain_info_t ov7692_exp_gain_info = {
+ .coarse_int_time_addr = 0x0202,
+ .global_gain_addr = 0x0204,
+ .vert_offset = 4,
+};
+
+static inline uint8_t ov7692_byte(uint16_t word, uint8_t offset)
+{
+ return word >> (offset * BITS_PER_BYTE);
+}
+
+
+static const struct i2c_device_id ov7692_i2c_id[] = {
+ {SENSOR_NAME, (kernel_ulong_t)&ov7692_s_ctrl},
+ { }
+};
+
+static struct i2c_driver ov7692_i2c_driver = {
+ .id_table = ov7692_i2c_id,
+ .probe = msm_sensor_i2c_probe,
+ .driver = {
+ .name = SENSOR_NAME,
+ },
+};
+
+static struct msm_camera_i2c_client ov7692_sensor_i2c_client = {
+ .addr_type = MSM_CAMERA_I2C_BYTE_ADDR,
+};
+
+static int __init msm_sensor_init_module(void)
+{
+ int rc = 0;
+ CDBG("OV7692\n");
+
+ rc = i2c_add_driver(&ov7692_i2c_driver);
+
+ return rc;
+}
+
+static struct v4l2_subdev_core_ops ov7692_subdev_core_ops = {
+ .ioctl = msm_sensor_subdev_ioctl,
+ .s_power = msm_sensor_power,
+};
+
+static struct v4l2_subdev_video_ops ov7692_subdev_video_ops = {
+ .enum_mbus_fmt = msm_sensor_v4l2_enum_fmt,
+};
+
+static struct v4l2_subdev_ops ov7692_subdev_ops = {
+ .core = &ov7692_subdev_core_ops,
+ .video = &ov7692_subdev_video_ops,
+};
+
+static int ov7692_pwdn_gpio;
+static int ov7692_reset_gpio;
+
+static int ov7692_probe_init_gpio(const struct msm_camera_sensor_info *data)
+{
+ int rc = 0;
+ CDBG("%s: entered\n", __func__);
+
+ ov7692_pwdn_gpio = data->sensor_pwd;
+ ov7692_reset_gpio = data->sensor_reset ;
+
+ CDBG("%s: pwdn_gpio:%d, reset_gpio:%d\n", __func__,
+ ov7692_pwdn_gpio, ov7692_reset_gpio);
+
+ if (data->sensor_reset_enable)
+ gpio_direction_output(data->sensor_reset, 1);
+
+ gpio_direction_output(data->sensor_pwd, 1);
+
+ return rc;
+
+}
+static void ov7692_power_on(void)
+{
+ CDBG("%s\n", __func__);
+ gpio_set_value(ov7692_pwdn_gpio, 0);
+}
+
+static void ov7692_power_down(void)
+{
+ CDBG("%s\n", __func__);
+ gpio_set_value(ov7692_pwdn_gpio, 1);
+}
+static int32_t ov7692_i2c_txdata(struct i2c_client *ov7692_client,
+ unsigned short saddr,
+ unsigned char *txdata, int length)
+{
+ struct i2c_msg msg[] = {
+ {
+ .addr = saddr,
+ .flags = 0,
+ .len = 2,
+ .buf = txdata,
+ },
+ };
+ if (i2c_transfer(ov7692_client->adapter, msg, 1) < 0) {
+ CDBG("ov7692_i2c_txdata faild 0x%x\n", ov7692_client->addr);
+ return -EIO;
+ }
+
+ return 0;
+}
+static int32_t ov7692_i2c_write_b_sensor(struct i2c_client *ov7692_client,
+ uint8_t waddr,
+ uint8_t bdata)
+{
+ int32_t rc = -EFAULT;
+ unsigned char buf[2];
+
+ memset(buf, 0, sizeof(buf));
+ buf[0] = waddr;
+ buf[1] = bdata;
+ CDBG("i2c_write_b addr = 0x%x, val = 0x%x\n", waddr, bdata);
+ rc = ov7692_i2c_txdata(ov7692_client, ov7692_client->addr >> 1, buf, 2);
+ if (rc < 0)
+ CDBG("i2c_write_b failed, addr = 0x%x, val = 0x%x!\n",
+ waddr, bdata);
+
+ return rc;
+}
+
+static void ov7692_sw_reset(struct msm_sensor_ctrl_t *s_ctrl)
+{
+
+ CDBG("%s\n", __func__);
+ ov7692_i2c_write_b_sensor(s_ctrl->sensor_i2c_client->client,
+ 0x12, 0x80);
+}
+
+static void ov7692_hw_reset(void)
+{
+ CDBG("--CAMERA-- %s ... (Start...)\n", __func__);
+ gpio_set_value(ov7692_reset_gpio, 1); /*reset camera reset pin*/
+ usleep_range(5000, 5100);
+ gpio_set_value(ov7692_reset_gpio, 0);
+ usleep_range(5000, 5100);
+ gpio_set_value(ov7692_reset_gpio, 1);
+ usleep_range(1000, 1100);
+ CDBG("--CAMERA-- %s ... (End...)\n", __func__);
+}
+
+
+
+int32_t ov7692_sensor_power_up(struct msm_sensor_ctrl_t *s_ctrl)
+{
+ int32_t rc = 0;
+ struct msm_camera_sensor_info *info = NULL;
+
+ CDBG("%s: %d\n", __func__, __LINE__);
+
+ rc = msm_sensor_power_up(s_ctrl);
+ if (rc < 0) {
+ CDBG("%s: msm_sensor_power_up failed\n", __func__);
+ return rc;
+ }
+ info = s_ctrl->sensordata;
+
+ rc = ov7692_probe_init_gpio(info);
+ if (rc < 0) {
+ CDBG("%s: gpio init failed\n", __func__);
+ goto power_up_fail;
+ }
+ /* turn on LDO for PVT */
+ if (info->pmic_gpio_enable)
+ lcd_camera_power_onoff(1);
+
+ ov7692_power_down();
+
+ usleep_range(5000, 5100);
+
+ ov7692_power_on();
+ usleep_range(5000, 5100);
+
+ if (info->sensor_reset_enable)
+ ov7692_hw_reset();
+ else
+ ov7692_sw_reset(s_ctrl);
+
+ return rc;
+
+power_up_fail:
+ CDBG("ov7692_sensor_power_up: OV7692 SENSOR POWER UP FAILS!\n");
+ if (info->pmic_gpio_enable)
+ lcd_camera_power_onoff(0);
+ return rc;
+
+
+}
+
+
+static struct msm_sensor_fn_t ov7692_func_tbl = {
+ .sensor_start_stream = msm_sensor_start_stream,
+ .sensor_stop_stream = msm_sensor_stop_stream,
+ .sensor_group_hold_on = msm_sensor_group_hold_on,
+ .sensor_group_hold_off = msm_sensor_group_hold_off,
+ .sensor_set_fps = msm_sensor_set_fps,
+ .sensor_setting = msm_sensor_setting3,
+ .sensor_set_sensor_mode = msm_sensor_set_sensor_mode,
+ .sensor_mode_init = msm_sensor_mode_init,
+ .sensor_get_output_info = msm_sensor_get_output_info,
+ .sensor_config = msm_sensor_config,
+ .sensor_power_up = ov7692_sensor_power_up,
+ .sensor_power_down = msm_sensor_power_down,
+};
+
+static struct msm_sensor_reg_t ov7692_regs = {
+ .default_data_type = MSM_CAMERA_I2C_BYTE_DATA,
+ .start_stream_conf_size = 0,
+ .stop_stream_conf_size = 0,
+ .group_hold_on_conf_size = 0,
+ .group_hold_off_conf_size = 0,
+ .init_settings = &ov7692_init_conf[0],
+ .init_size = ARRAY_SIZE(ov7692_init_conf),
+ .mode_settings = &ov7692_confs[0],
+ .output_settings = &ov7692_dimensions[0],
+ .num_conf = ARRAY_SIZE(ov7692_confs),
+};
+
+static struct msm_sensor_ctrl_t ov7692_s_ctrl = {
+ .msm_sensor_reg = &ov7692_regs,
+ .sensor_i2c_client = &ov7692_sensor_i2c_client,
+ .sensor_i2c_addr = 0x78,
+ .sensor_output_reg_addr = &ov7692_reg_addr,
+ .sensor_id_info = &ov7692_id_info,
+ .sensor_exp_gain_info = &ov7692_exp_gain_info,
+ .cam_mode = MSM_SENSOR_MODE_INVALID,
+ .csic_params = &ov7692_csi_params_array[0],
+ .msm_sensor_mutex = &ov7692_mut,
+ .sensor_i2c_driver = &ov7692_i2c_driver,
+ .sensor_v4l2_subdev_info = ov7692_subdev_info,
+ .sensor_v4l2_subdev_info_size = ARRAY_SIZE(ov7692_subdev_info),
+ .sensor_v4l2_subdev_ops = &ov7692_subdev_ops,
+ .func_tbl = &ov7692_func_tbl,
+ .clk_rate = MSM_SENSOR_MCLK_24HZ,
+};
+
+module_init(msm_sensor_init_module);
+MODULE_DESCRIPTION("Omni VGA YUV sensor driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/media/video/msm/sensors/ov9726_v4l2.c b/drivers/media/video/msm/sensors/ov9726_v4l2.c
index e345717..17291ff 100644
--- a/drivers/media/video/msm/sensors/ov9726_v4l2.c
+++ b/drivers/media/video/msm/sensors/ov9726_v4l2.c
@@ -271,6 +271,7 @@
.sensor_v4l2_subdev_info_size = ARRAY_SIZE(ov9726_subdev_info),
.sensor_v4l2_subdev_ops = &ov9726_subdev_ops,
.func_tbl = &ov9726_func_tbl,
+ .clk_rate = MSM_SENSOR_MCLK_24HZ,
};
module_init(msm_sensor_init_module);
diff --git a/drivers/media/video/msm/sensors/s5k3l1yx.c b/drivers/media/video/msm/sensors/s5k3l1yx.c
index 954dd2f..af68601 100644
--- a/drivers/media/video/msm/sensors/s5k3l1yx.c
+++ b/drivers/media/video/msm/sensors/s5k3l1yx.c
@@ -123,7 +123,7 @@
{0x0344, 0x01}, /* x_addr_start */
{0x0345, 0x20}, /* x_addr_start */
{0x0346, 0x02}, /* y_addr_start */
- {0x0347, 0x23}, /* y_addr_start */
+ {0x0347, 0x24}, /* y_addr_start */
{0x0348, 0x0E}, /* x_addr_end */
{0x0349, 0xA0}, /* x_addr_end */
{0x034A, 0x09}, /* y_addr_end */
@@ -160,7 +160,7 @@
{0x0344, 0x01}, /* x_addr_start */
{0x0345, 0x20}, /* x_addr_start */
{0x0346, 0x02}, /* y_addr_start */
- {0x0347, 0x23}, /* y_addr_start */
+ {0x0347, 0x24}, /* y_addr_start */
{0x0348, 0x0E}, /* x_addr_end */
{0x0349, 0xA0}, /* x_addr_end */
{0x034A, 0x09}, /* y_addr_end */
@@ -197,7 +197,7 @@
{0x0344, 0x01}, /* x_addr_start */
{0x0345, 0x20}, /* x_addr_start */
{0x0346, 0x02}, /* y_addr_start */
- {0x0347, 0x23}, /* y_addr_start */
+ {0x0347, 0x24}, /* y_addr_start */
{0x0348, 0x0E}, /* x_addr_end */
{0x0349, 0xA0}, /* x_addr_end */
{0x034A, 0x09}, /* y_addr_end */
diff --git a/drivers/media/video/msm/sensors/s5k4e1_v4l2.c b/drivers/media/video/msm/sensors/s5k4e1_v4l2.c
index 1f99119..699f0dd 100644
--- a/drivers/media/video/msm/sensors/s5k4e1_v4l2.c
+++ b/drivers/media/video/msm/sensors/s5k4e1_v4l2.c
@@ -196,8 +196,8 @@
.y_output = 0x7A8,
.line_length_pclk = 0xAB2,
.frame_length_lines = 0x7B4,
- .vt_pixel_clk = 816000000,
- .op_pixel_clk = 816000000,
+ .vt_pixel_clk = 81600000,
+ .op_pixel_clk = 81600000,
.binning_factor = 0,
},
{
@@ -205,8 +205,8 @@
.y_output = 0x3D4,
.line_length_pclk = 0xAB2,
.frame_length_lines = 0x3E0,
- .vt_pixel_clk = 816000000,
- .op_pixel_clk = 816000000,
+ .vt_pixel_clk = 81600000,
+ .op_pixel_clk = 81600000,
.binning_factor = 1,
},
};
@@ -349,8 +349,6 @@
gain = max_legal_gain;
}
- gain = 32;
- line = 1465;
pr_info("s5k4e1_write_exp_gain : gain = %d line = %d\n", gain, line);
line = (uint32_t) (line * s_ctrl->fps_divider);
fl_lines = s_ctrl->curr_frame_length_lines * s_ctrl->fps_divider / Q10;
@@ -494,6 +492,7 @@
.sensor_v4l2_subdev_info_size = ARRAY_SIZE(s5k4e1_subdev_info),
.sensor_v4l2_subdev_ops = &s5k4e1_subdev_ops,
.func_tbl = &s5k4e1_func_tbl,
+ .clk_rate = MSM_SENSOR_MCLK_24HZ,
};
module_init(msm_sensor_init_module);
diff --git a/drivers/media/video/msm/wfd/enc-subdev.c b/drivers/media/video/msm/wfd/enc-subdev.c
index e3d9d2d..1b19c99 100644
--- a/drivers/media/video/msm/wfd/enc-subdev.c
+++ b/drivers/media/video/msm/wfd/enc-subdev.c
@@ -334,16 +334,26 @@
struct vcd_buffer_requirement buf_req;
struct venc_inst *inst = sd->dev_priv;
struct video_client_ctx *client_ctx = &inst->venc_client;
+ int aligned_width, aligned_height;
if (!client_ctx) {
WFD_MSG_ERR("Invalid client context");
rc = -EINVAL;
goto err;
}
+ aligned_width = ALIGN(b->width, 16);
+ aligned_height = ALIGN(b->height, 16);
+
+ if (aligned_width != b->width) {
+ WFD_MSG_ERR("Width not 16 byte aligned\n");
+ rc = -EINVAL;
+ goto err;
+ }
+
buf_req.actual_count = b->count;
buf_req.min_count = b->count;
buf_req.max_count = b->count;
- buf_req.sz = (((b->height * b->width) + 2047) & (~2047))
- + (((b->height * b->width * 1/2) + 2047) & (~2047));
+ buf_req.sz = ALIGN(aligned_height * aligned_width, SZ_2K)
+ + ALIGN(aligned_height * aligned_width * 1/2, SZ_2K);
buf_req.align = 0;
inst->width = b->width;
inst->height = b->height;
@@ -699,7 +709,8 @@
}
static long venc_set_h264_intra_period(struct video_client_ctx *client_ctx,
- __s32 period) {
+ __s32 period)
+{
struct vcd_property_i_period vcd_property_i_period;
struct vcd_property_codec vcd_property_codec;
struct vcd_property_hdr vcd_property_hdr;
@@ -726,7 +737,7 @@
vcd_property_hdr.sz = sizeof(struct vcd_property_i_period);
vcd_property_i_period.p_frames = period - 1;
- vcd_property_i_period.b_frames = 1;
+ vcd_property_i_period.b_frames = 0;
rc = vcd_set_property(client_ctx->vcd_handle,
&vcd_property_hdr, &vcd_property_i_period);
@@ -740,6 +751,47 @@
return rc;
}
+static long venc_get_h264_intra_period(struct video_client_ctx *client_ctx,
+ __s32 *period)
+{
+ struct vcd_property_i_period vcd_property_i_period;
+ struct vcd_property_codec vcd_property_codec;
+ struct vcd_property_hdr vcd_property_hdr;
+ int rc = 0;
+
+ vcd_property_hdr.prop_id = VCD_I_CODEC;
+ vcd_property_hdr.sz = sizeof(struct vcd_property_codec);
+
+ rc = vcd_get_property(client_ctx->vcd_handle,
+ &vcd_property_hdr, &vcd_property_codec);
+
+ if (rc < 0) {
+ WFD_MSG_ERR("Error getting codec property\n");
+ goto err;
+ }
+
+ if (vcd_property_codec.codec != VCD_CODEC_H264) {
+ rc = -ENOTSUPP;
+ WFD_MSG_ERR("Control not supported for non H264 codec\n");
+ goto err;
+ }
+
+ vcd_property_hdr.prop_id = VCD_I_INTRA_PERIOD;
+ vcd_property_hdr.sz = sizeof(struct vcd_property_i_period);
+
+ rc = vcd_get_property(client_ctx->vcd_handle,
+ &vcd_property_hdr, &vcd_property_i_period);
+
+ if (rc < 0) {
+ WFD_MSG_ERR("Error getting intra period\n");
+ goto err;
+ }
+
+ *period = vcd_property_i_period.p_frames + 1;
+err:
+ return rc;
+}
+
static long venc_request_frame(struct video_client_ctx *client_ctx, __s32 type)
{
struct vcd_property_req_i_frame vcd_property_req_i_frame;
@@ -950,6 +1002,281 @@
return rc;
}
+static long venc_set_qp_value(struct video_client_ctx *client_ctx,
+ __s32 frametype, __s32 qp)
+{
+ struct vcd_property_hdr vcd_property_hdr;
+ struct vcd_property_session_qp vcd_property_session_qp;
+ int rc = 0;
+
+ if (!client_ctx) {
+ WFD_MSG_ERR("Invalid parameters\n");
+ return -EINVAL;
+ }
+
+ vcd_property_hdr.prop_id = VCD_I_SESSION_QP;
+ vcd_property_hdr.sz = sizeof(vcd_property_session_qp);
+
+ rc = vcd_get_property(client_ctx->vcd_handle, &vcd_property_hdr,
+ &vcd_property_session_qp);
+
+ if (rc) {
+ WFD_MSG_ERR("Failed to get session qp\n");
+ goto err;
+ }
+
+ switch (frametype) {
+ case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
+ vcd_property_session_qp.i_frame_qp = qp;
+ break;
+ case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
+ vcd_property_session_qp.p_frame_qp = qp;
+ break;
+ case V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP:
+ vcd_property_session_qp.b_frame_qp = qp;
+ break;
+ case V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP:
+ rc = -ENOTSUPP;
+ goto err;
+ default:
+ rc = -EINVAL;
+ goto err;
+ }
+
+
+ rc = vcd_set_property(client_ctx->vcd_handle, &vcd_property_hdr,
+ &vcd_property_session_qp);
+
+ if (rc) {
+ WFD_MSG_ERR("Failed to set session qp\n");
+ goto err;
+ }
+err:
+ return rc;
+}
+
+static long venc_get_qp_value(struct video_client_ctx *client_ctx,
+ __s32 frametype, __s32 *qp)
+{
+ struct vcd_property_hdr vcd_property_hdr;
+ struct vcd_property_session_qp vcd_property_session_qp;
+ int rc = 0;
+
+ if (!client_ctx) {
+ WFD_MSG_ERR("Invalid parameters\n");
+ return -EINVAL;
+ }
+
+ vcd_property_hdr.prop_id = VCD_I_SESSION_QP;
+ vcd_property_hdr.sz = sizeof(vcd_property_session_qp);
+
+ rc = vcd_get_property(client_ctx->vcd_handle, &vcd_property_hdr,
+ &vcd_property_session_qp);
+
+ if (rc) {
+ WFD_MSG_ERR("Failed to get session qp\n");
+ goto err;
+ }
+
+ switch (frametype) {
+ case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
+ *qp = vcd_property_session_qp.i_frame_qp;
+ break;
+ case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
+ *qp = vcd_property_session_qp.p_frame_qp;
+ break;
+ case V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP:
+ *qp = vcd_property_session_qp.b_frame_qp;
+ break;
+ default:
+ rc = -EINVAL;
+ goto err;
+ }
+
+err:
+ return rc;
+}
+
+static long venc_set_qp_range(struct video_client_ctx *client_ctx,
+ __s32 type, __s32 qp)
+{
+ struct vcd_property_hdr vcd_property_hdr;
+ struct vcd_property_qp_range vcd_property_qp_range;
+ int rc = 0;
+
+ if (!client_ctx) {
+ WFD_MSG_ERR("Invalid parameters\n");
+ return -EINVAL;
+ }
+
+ vcd_property_hdr.prop_id = VCD_I_QP_RANGE;
+ vcd_property_hdr.sz = sizeof(vcd_property_qp_range);
+
+ rc = vcd_get_property(client_ctx->vcd_handle, &vcd_property_hdr,
+ &vcd_property_qp_range);
+
+ if (rc) {
+ WFD_MSG_ERR("Failed to get qp range\n");
+ goto err;
+ }
+
+ switch (type) {
+ case V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP:
+ case V4L2_CID_MPEG_VIDEO_H263_MIN_QP:
+ case V4L2_CID_MPEG_VIDEO_H264_MIN_QP:
+ vcd_property_qp_range.min_qp = qp;
+ break;
+ case V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP:
+ case V4L2_CID_MPEG_VIDEO_H263_MAX_QP:
+ case V4L2_CID_MPEG_VIDEO_H264_MAX_QP:
+ vcd_property_qp_range.max_qp = qp;
+ break;
+ default:
+ rc = -EINVAL;
+ goto err;
+ }
+
+ rc = vcd_set_property(client_ctx->vcd_handle, &vcd_property_hdr,
+ &vcd_property_qp_range);
+
+ if (rc) {
+ WFD_MSG_ERR("Failed to set qp range\n");
+ goto err;
+ }
+err:
+ return rc;
+}
+
+static long venc_get_qp_range(struct video_client_ctx *client_ctx,
+ __s32 type, __s32 *qp)
+{
+ struct vcd_property_hdr vcd_property_hdr;
+ struct vcd_property_qp_range vcd_property_qp_range;
+ int rc = 0;
+
+ if (!client_ctx) {
+ WFD_MSG_ERR("Invalid parameters\n");
+ return -EINVAL;
+ }
+
+ vcd_property_hdr.prop_id = VCD_I_QP_RANGE;
+ vcd_property_hdr.sz = sizeof(vcd_property_qp_range);
+
+ rc = vcd_get_property(client_ctx->vcd_handle, &vcd_property_hdr,
+ &vcd_property_qp_range);
+
+ if (rc) {
+ WFD_MSG_ERR("Failed to get qp range\n");
+ goto err;
+ }
+
+ switch (type) {
+ case V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP:
+ case V4L2_CID_MPEG_VIDEO_H263_MIN_QP:
+ case V4L2_CID_MPEG_VIDEO_H264_MIN_QP:
+ *qp = vcd_property_qp_range.min_qp;
+ break;
+ case V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP:
+ case V4L2_CID_MPEG_VIDEO_H263_MAX_QP:
+ case V4L2_CID_MPEG_VIDEO_H264_MAX_QP:
+ *qp = vcd_property_qp_range.max_qp;
+ break;
+ default:
+ rc = -EINVAL;
+ goto err;
+ }
+
+ rc = vcd_set_property(client_ctx->vcd_handle, &vcd_property_hdr,
+ &vcd_property_qp_range);
+
+ if (rc) {
+ WFD_MSG_ERR("Failed to set qp range\n");
+ goto err;
+ }
+err:
+ return rc;
+}
+
+static long venc_set_header_mode(struct video_client_ctx *client_ctx,
+ __s32 mode)
+{
+ struct vcd_property_hdr vcd_property_hdr;
+ struct vcd_property_sps_pps_for_idr_enable sps_pps_for_idr_enable;
+ int rc = 0;
+
+ if (!client_ctx) {
+ WFD_MSG_ERR("Invalid parameters\n");
+ rc = -EINVAL;
+ goto err;
+ }
+
+ vcd_property_hdr.prop_id = VCD_I_ENABLE_SPS_PPS_FOR_IDR;
+ vcd_property_hdr.sz = sizeof(sps_pps_for_idr_enable);
+ switch (mode) {
+ case V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE:
+ sps_pps_for_idr_enable.sps_pps_for_idr_enable_flag = 0;
+ break;
+ case V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_I_FRAME:
+ sps_pps_for_idr_enable.sps_pps_for_idr_enable_flag = 1;
+ break;
+ case V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME:
+ default:
+ WFD_MSG_ERR("Video header mode %d not supported\n",
+ mode);
+ rc = -ENOTSUPP;
+ goto err;
+ }
+
+ rc = vcd_set_property(client_ctx->vcd_handle, &vcd_property_hdr,
+ &sps_pps_for_idr_enable);
+ if (rc) {
+ WFD_MSG_ERR("Failed to set enable_sps_pps_for_idr\n");
+ goto err;
+ }
+err:
+ return rc;
+}
+
+static long venc_get_header_mode(struct video_client_ctx *client_ctx,
+ __s32 *mode)
+{
+ struct vcd_property_hdr vcd_property_hdr;
+ struct vcd_property_sps_pps_for_idr_enable sps_pps_for_idr_enable;
+ int rc = 0;
+
+ if (!client_ctx) {
+ WFD_MSG_ERR("Invalid parameters\n");
+ rc = -EINVAL;
+ goto err;
+ }
+
+ vcd_property_hdr.prop_id = VCD_I_ENABLE_SPS_PPS_FOR_IDR;
+ vcd_property_hdr.sz = sizeof(sps_pps_for_idr_enable);
+ rc = vcd_get_property(client_ctx->vcd_handle, &vcd_property_hdr,
+ &sps_pps_for_idr_enable);
+ if (rc) {
+ WFD_MSG_ERR("Failed to get sps/pps for idr enable\n");
+ goto err;
+ }
+
+ *mode = sps_pps_for_idr_enable.sps_pps_for_idr_enable_flag ?
+ V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_I_FRAME :
+ V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE;
+err:
+ return rc;
+}
+
static long venc_alloc_input_buffer(struct v4l2_subdev *sd, void *arg)
{
struct mem_region *mregion = arg;
@@ -1220,6 +1547,28 @@
case V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE:
rc = venc_request_frame(client_ctx, ctrl->value);
break;
+ case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP:
+ rc = venc_set_qp_value(client_ctx, ctrl->id, ctrl->value);
+ break;
+ case V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP:
+ case V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP:
+ case V4L2_CID_MPEG_VIDEO_H263_MIN_QP:
+ case V4L2_CID_MPEG_VIDEO_H263_MAX_QP:
+ case V4L2_CID_MPEG_VIDEO_H264_MIN_QP:
+ case V4L2_CID_MPEG_VIDEO_H264_MAX_QP:
+ rc = venc_set_qp_range(client_ctx, ctrl->id, ctrl->value);
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
+ rc = venc_set_header_mode(client_ctx, ctrl->value);
+ break;
default:
WFD_MSG_ERR("Set property not suported: %d\n", ctrl->id);
rc = -ENOTSUPP;
@@ -1248,6 +1597,31 @@
case V4L2_CID_MPEG_VIDEO_H264_PROFILE:
rc = venc_get_codec_profile(client_ctx, ctrl->id, &ctrl->value);
break;
+ case V4L2_CID_MPEG_VIDEO_H264_I_PERIOD:
+ rc = venc_get_h264_intra_period(client_ctx, &ctrl->value);
+ break;
+ case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
+ case V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP:
+ rc = venc_get_qp_value(client_ctx, ctrl->id, &ctrl->value);
+ break;
+ case V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP:
+ case V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP:
+ case V4L2_CID_MPEG_VIDEO_H263_MIN_QP:
+ case V4L2_CID_MPEG_VIDEO_H263_MAX_QP:
+ case V4L2_CID_MPEG_VIDEO_H264_MIN_QP:
+ case V4L2_CID_MPEG_VIDEO_H264_MAX_QP:
+ rc = venc_get_qp_range(client_ctx, ctrl->id, &ctrl->value);
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
+ rc = venc_get_header_mode(client_ctx, &ctrl->value);
+ break;
default:
WFD_MSG_ERR("Get property not suported: %d\n", ctrl->id);
rc = -ENOTSUPP;
diff --git a/drivers/media/video/msm/wfd/vsg-subdev.c b/drivers/media/video/msm/wfd/vsg-subdev.c
index 53b6e20..8e385a4 100644
--- a/drivers/media/video/msm/wfd/vsg-subdev.c
+++ b/drivers/media/video/msm/wfd/vsg-subdev.c
@@ -76,10 +76,29 @@
}
}
+static void vsg_encode_helper_func(struct work_struct *task)
+{
+ struct vsg_encode_work *work =
+ container_of(task, struct vsg_encode_work, work);
+
+ /*
+ * Note: don't need to lock for context below as we only
+ * access fields that are "static".
+ */
+ int rc = vsg_encode_frame(work->context, work->buf);
+ if (rc < 0) {
+ mutex_lock(&work->context->mutex);
+ work->context->state = VSG_STATE_ERROR;
+ mutex_unlock(&work->context->mutex);
+ }
+ kfree(work);
+}
+
static void vsg_work_func(struct work_struct *task)
{
struct vsg_work *work =
container_of(task, struct vsg_work, work);
+ struct vsg_encode_work *encode_work;
struct vsg_context *context = work->context;
struct vsg_buf_info *buf_info = NULL, *temp = NULL;
int rc = 0;
@@ -88,8 +107,9 @@
if (list_empty(&context->free_queue.node)) {
WFD_MSG_DBG("%s: queue empty doing nothing\n", __func__);
goto err_skip_encode;
- } else if (context->stopped) {
- WFD_MSG_DBG("%s: vsg is stopped doing nothing\n", __func__);
+ } else if (context->state != VSG_STATE_STARTED) {
+ WFD_MSG_DBG("%s: vsg is stopped or in error state "
+ "doing nothing\n", __func__);
goto err_skip_encode;
}
@@ -114,18 +134,46 @@
}
}
- mutex_unlock(&context->mutex);
- rc = vsg_encode_frame(context, buf_info);
- if (rc < 0) {
- WFD_MSG_ERR("frame encode failed");
- goto err_encode_fail;
+ encode_work = kmalloc(sizeof(*encode_work), GFP_KERNEL);
+ encode_work->buf = buf_info;
+ encode_work->context = context;
+ INIT_WORK(&encode_work->work, vsg_encode_helper_func);
+ rc = queue_work(context->work_queue, &encode_work->work);
+ if (!rc) {
+ WFD_MSG_ERR("Queueing buffer for encode failed\n");
+ kfree(encode_work);
+ encode_work = NULL;
+ goto err_queue_encode_fail;
}
- mutex_lock(&context->mutex);
+
+ buf_info->flags |= VSG_BUF_BEING_ENCODED;
+ if (!(buf_info->flags & VSG_NEVER_SET_LAST_BUFFER)) {
+ bool is_same_buffer = context->last_buffer &&
+ mdp_buf_info_equals(
+ &context->last_buffer->mdp_buf_info,
+ &buf_info->mdp_buf_info);
+
+ if (!context->last_buffer || !is_same_buffer) {
+ struct vsg_buf_info *old_last_buffer =
+ context->last_buffer;
+ bool last_buf_with_us = old_last_buffer &&
+ !(old_last_buffer->flags &
+ VSG_BUF_BEING_ENCODED);
+
+ if (old_last_buffer && last_buf_with_us) {
+ vsg_release_input_buffer(context,
+ old_last_buffer);
+ kfree(old_last_buffer);
+ }
+
+ vsg_set_last_buffer(context, buf_info);
+ }
+ }
list_add_tail(&buf_info->node, &context->busy_queue.node);
err_skip_encode:
mutex_unlock(&context->mutex);
-err_encode_fail:
+err_queue_encode_fail:
kfree(work);
}
@@ -139,7 +187,7 @@
mutex_lock(&context->mutex);
- if (context->stopped)
+ if (context->state != VSG_STATE_STARTED)
goto err_locked;
if (list_empty(&context->free_queue.node)
@@ -256,7 +304,7 @@
context->last_buffer = context->regen_buffer = NULL;
context->send_regen_buffer = false;
context->mode = DEFAULT_MODE;
- context->stopped = false;
+ context->state = VSG_STATE_NONE;
mutex_init(&context->mutex);
sd->dev_priv = context;
@@ -287,6 +335,16 @@
}
context = (struct vsg_context *)sd->dev_priv;
+
+ if (context->state == VSG_STATE_STARTED) {
+ WFD_MSG_ERR("VSG not stopped, start not allowed\n");
+ return -EINPROGRESS;
+ } else if (context->state == VSG_STATE_ERROR) {
+ WFD_MSG_ERR("VSG in error state, not allowed to restart\n");
+ return -ENOTRECOVERABLE;
+ }
+
+ context->state = VSG_STATE_STARTED;
mod_timer(&context->threshold_timer, jiffies +
nsecs_to_jiffies(context->max_frame_interval));
return 0;
@@ -304,7 +362,7 @@
context = (struct vsg_context *)sd->dev_priv;
mutex_lock(&context->mutex);
- context->stopped = true;
+ context->state = VSG_STATE_STOPPED;
{ /*delete pending buffers as we're not going to encode them*/
struct list_head *pos, *next;
list_for_each_safe(pos, next, &context->free_queue.node) {
@@ -371,10 +429,10 @@
if (!is_last_buffer && !is_regen_buffer &&
!(temp->flags & VSG_NEVER_RELEASE)) {
vsg_release_input_buffer(context, temp);
+ kfree(temp);
}
list_del(&temp->node);
- kfree(temp);
}
}
@@ -436,27 +494,26 @@
WFD_MSG_DBG("Return frame with paddr %p\n",
(void *)buf_info->mdp_buf_info.paddr);
+ if (!expected_buffer) {
+ WFD_MSG_ERR("Unexpectedly received buffer from enc with "
+ "paddr %p\n", (void *)buf_info->mdp_buf_info.paddr);
+ goto return_ip_buf_bad_buf;
+ }
+
+ expected_buffer->flags &= ~VSG_BUF_BEING_ENCODED;
if (mdp_buf_info_equals(&expected_buffer->mdp_buf_info,
&buf_info->mdp_buf_info)) {
- list_del(&expected_buffer->node);
-
- if (!(expected_buffer->flags & VSG_NEVER_SET_LAST_BUFFER)) {
- bool is_same_buffer = context->last_buffer &&
- mdp_buf_info_equals(
+ bool is_same_buffer = context->last_buffer &&
+ mdp_buf_info_equals(
&context->last_buffer->mdp_buf_info,
&expected_buffer->mdp_buf_info);
- if (!context->last_buffer || !is_same_buffer) {
- struct vsg_buf_info *old_last_buffer =
- context->last_buffer;
- if (context->last_buffer)
- vsg_release_input_buffer(context,
- context->last_buffer);
- vsg_set_last_buffer(context, expected_buffer);
- kfree(old_last_buffer);
- }
- } else
- WFD_MSG_WARN("Couldn't set the last buffer\n");
+ list_del(&expected_buffer->node);
+ if (!is_same_buffer &&
+ !(expected_buffer->flags & VSG_NEVER_RELEASE)) {
+ vsg_release_input_buffer(context, expected_buffer);
+ kfree(expected_buffer);
+ }
} else {
WFD_MSG_ERR("Returned buffer %p is not latest buffer, "
"expected %p\n",
@@ -497,7 +554,7 @@
*regen_buffer = *buf_info;
regen_buffer->flags = VSG_NEVER_RELEASE | VSG_NEVER_SET_LAST_BUFFER;
context->regen_buffer = regen_buffer;
- WFD_MSG_ERR("setting buffer with paddr %p as scratch buffer\n",
+ WFD_MSG_DBG("setting buffer with paddr %p as scratch buffer\n",
(void *)regen_buffer->mdp_buf_info.paddr);
mutex_unlock(&context->mutex);
set_scratch_buf_err_bad_param:
diff --git a/drivers/media/video/msm/wfd/vsg-subdev.h b/drivers/media/video/msm/wfd/vsg-subdev.h
index 1db45e8..826105c 100644
--- a/drivers/media/video/msm/wfd/vsg-subdev.h
+++ b/drivers/media/video/msm/wfd/vsg-subdev.h
@@ -26,6 +26,7 @@
enum vsg_flags {
VSG_NEVER_RELEASE = 1<<0,
VSG_NEVER_SET_LAST_BUFFER = 1<<1,
+ VSG_BUF_BEING_ENCODED = 1<<2,
};
enum vsg_modes {
@@ -33,6 +34,13 @@
VSG_MODE_VFR,
};
+enum vsg_states {
+ VSG_STATE_NONE,
+ VSG_STATE_STARTED,
+ VSG_STATE_STOPPED,
+ VSG_STATE_ERROR
+};
+
struct vsg_buf_info {
struct mdp_buf_info mdp_buf_info;
struct timespec time;
@@ -58,7 +66,7 @@
struct vsg_buf_info *last_buffer, *regen_buffer;
bool send_regen_buffer;
int mode;
- bool stopped;
+ int state;
};
struct vsg_work {
@@ -66,6 +74,12 @@
struct work_struct work;
};
+struct vsg_encode_work {
+ struct vsg_buf_info *buf;
+ struct vsg_context *context;
+ struct work_struct work;
+};
+
#define VSG_OPEN _IO(VSG_MAGIC_IOCTL, 1)
#define VSG_CLOSE _IO(VSG_MAGIC_IOCTL, 2)
#define VSG_START _IO(VSG_MAGIC_IOCTL, 3)
diff --git a/drivers/media/video/msm/wfd/wfd-ioctl.c b/drivers/media/video/msm/wfd/wfd-ioctl.c
index ce81746..e38bb80 100644
--- a/drivers/media/video/msm/wfd/wfd-ioctl.c
+++ b/drivers/media/video/msm/wfd/wfd-ioctl.c
@@ -561,6 +561,11 @@
"V4L2_PIX_FMT_H264 are supported\n");
return -EINVAL;
}
+
+ if (fmt->fmt.pix.width % 16) {
+ WFD_MSG_ERR("Only 16 byte aligned widths are supported\n");
+ return -ENOTSUPP;
+ }
rc = v4l2_subdev_call(&wfd_dev->enc_sdev, core, ioctl, SET_FORMAT,
(void *)fmt);
if (rc) {
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 77ac845..54e1b9a 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -879,6 +879,16 @@
voltage leaves the accepatable range which then calls a notifier call
chain.
+config WCD9304_CODEC
+ tristate "WCD9304 Codec"
+ select SLIMBUS
+ select MFD_CORE
+ default n
+ help
+ Enables the WCD9304 core driver. The core driver provides
+ read/write capability to registers which are part of the
+ WCD9304 core and gives the ability to use the WCD9304 codec.
+
config WCD9310_CODEC
tristate "WCD9310 Codec"
select SLIMBUS
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index c8fcf5f..fd887ea 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -69,7 +69,8 @@
obj-$(CONFIG_MCP_UCB1200) += ucb1x00-core.o
obj-$(CONFIG_MCP_UCB1200_TS) += ucb1x00-ts.o
-obj-$(CONFIG_WCD9310_CODEC) += wcd9310-core.o wcd9310-irq.o wcd9310-slimslave.o
+obj-$(CONFIG_WCD9310_CODEC) += wcd9xxx-core.o wcd9xxx-irq.o wcd9xxx-slimslave.o
+obj-$(CONFIG_WCD9304_CODEC) += wcd9xxx-core.o wcd9xxx-irq.o wcd9xxx-slimslave.o
ifeq ($(CONFIG_SA1100_ASSABET),y)
obj-$(CONFIG_MCP_UCB1200) += ucb1x00-assabet.o
diff --git a/drivers/mfd/pm8921-core.c b/drivers/mfd/pm8921-core.c
index 6be3f2d..66b98a1 100644
--- a/drivers/mfd/pm8921-core.c
+++ b/drivers/mfd/pm8921-core.c
@@ -427,9 +427,26 @@
NCP("8921_ncp", 0x090),
};
+/*
+ * PM8917 adds 6 LDOs and a boost regulator beyond those available on PM8921.
+ * It also replaces SMPS 3 with FTSMPS 3. PM8917 does not have an NCP.
+ */
+static struct pm8xxx_vreg pm8917_regulator_data[] = {
+ /* name pc_name ctrl test hpm_min */
+ PLDO("8917_l30", "8917_l30_pc", 0x0A3, 0x0A4, LDO_150),
+ PLDO("8917_l31", "8917_l31_pc", 0x0A5, 0x0A6, LDO_150),
+ PLDO("8917_l32", "8917_l32_pc", 0x0A7, 0x0A8, LDO_150),
+ PLDO("8917_l33", "8917_l33_pc", 0x0C6, 0x0C7, LDO_150),
+ PLDO("8917_l34", "8917_l34_pc", 0x0D2, 0x0D3, LDO_150),
+ PLDO("8917_l35", "8917_l35_pc", 0x0D4, 0x0D5, LDO_300),
+
+ /* name ctrl */
+ BOOST("8917_boost", 0x04B),
+};
+
#define MAX_NAME_COMPARISON_LEN 32
-static int __devinit match_regulator(
+static int __devinit match_regulator(enum pm8xxx_version version,
struct pm8xxx_regulator_core_platform_data *core_data, char *name)
{
int found = 0;
@@ -452,6 +469,25 @@
break;
}
}
+ if (version == PM8XXX_VERSION_8917) {
+ for (i = 0; i < ARRAY_SIZE(pm8917_regulator_data); i++) {
+ if (pm8917_regulator_data[i].rdesc.name
+ && strncmp(pm8917_regulator_data[i].rdesc.name,
+ name, MAX_NAME_COMPARISON_LEN) == 0) {
+ core_data->is_pin_controlled = false;
+ core_data->vreg = &pm8917_regulator_data[i];
+ found = 1;
+ break;
+ } else if (pm8917_regulator_data[i].rdesc_pc.name
+ && strncmp(pm8917_regulator_data[i].rdesc_pc.name,
+ name, MAX_NAME_COMPARISON_LEN) == 0) {
+ core_data->is_pin_controlled = true;
+ core_data->vreg = &pm8917_regulator_data[i];
+ found = 1;
+ break;
+ }
+ }
+ }
if (!found)
pr_err("could not find a match for regulator: %s\n", name);
@@ -466,8 +502,11 @@
int ret = 0;
struct mfd_cell *mfd_regulators;
struct pm8xxx_regulator_core_platform_data *cdata;
+ enum pm8xxx_version version;
int i;
+ version = pm8xxx_get_version(pmic->dev);
+
/* Add one device for each regulator used by the board. */
mfd_regulators = kzalloc(sizeof(struct mfd_cell)
* (pdata->num_regulators), GFP_KERNEL);
@@ -488,6 +527,8 @@
}
for (i = 0; i < ARRAY_SIZE(regulator_data); i++)
mutex_init(®ulator_data[i].pc_lock);
+ for (i = 0; i < ARRAY_SIZE(pm8917_regulator_data); i++)
+ mutex_init(&pm8917_regulator_data[i].pc_lock);
for (i = 0; i < pdata->num_regulators; i++) {
if (!pdata->regulator_pdatas[i].init_data.constraints.name) {
@@ -495,7 +536,7 @@
ret = -EINVAL;
goto bail;
}
- if (!match_regulator(&cdata[i],
+ if (!match_regulator(version, &cdata[i],
pdata->regulator_pdatas[i].init_data.constraints.name)) {
ret = -ENODEV;
goto bail;
@@ -519,6 +560,8 @@
bail:
for (i = 0; i < ARRAY_SIZE(regulator_data); i++)
mutex_destroy(®ulator_data[i].pc_lock);
+ for (i = 0; i < ARRAY_SIZE(pm8917_regulator_data); i++)
+ mutex_destroy(&pm8917_regulator_data[i].pc_lock);
kfree(mfd_regulators);
kfree(cdata);
return ret;
@@ -711,6 +754,11 @@
}
if (version != PM8XXX_VERSION_8917) {
+ if (pdata->pwm_pdata) {
+ pwm_cell.platform_data = pdata->pwm_pdata;
+ pwm_cell.pdata_size =
+ sizeof(struct pm8xxx_pwm_platform_data);
+ }
ret = mfd_add_devices(pmic->dev, 0, &pwm_cell, 1, NULL, 0);
if (ret) {
pr_err("Failed to add pwm subdevice ret=%d\n", ret);
@@ -908,6 +956,9 @@
if (pmic->mfd_regulators) {
for (i = 0; i < ARRAY_SIZE(regulator_data); i++)
mutex_destroy(®ulator_data[i].pc_lock);
+ for (i = 0; i < ARRAY_SIZE(pm8917_regulator_data); i++)
+ mutex_destroy(
+ &pm8917_regulator_data[i].pc_lock);
}
kfree(pmic->mfd_regulators);
kfree(pmic->regulator_cdata);
diff --git a/drivers/mfd/pm8xxx-irq.c b/drivers/mfd/pm8xxx-irq.c
index 14c9ec4..ac39e80 100644
--- a/drivers/mfd/pm8xxx-irq.c
+++ b/drivers/mfd/pm8xxx-irq.c
@@ -102,6 +102,7 @@
goto bail;
}
+ cp &= ~PM_IRQF_WRITE;
rc = pm8xxx_writeb(chip->dev,
SSBI_REG_ADDR_IRQ_CONFIG(chip->base_addr), cp);
if (rc)
@@ -127,7 +128,10 @@
pr_err("Failed Selecting Block %d rc=%d\n", bp, rc);
goto bail;
}
-
+ /*
+ * Set the write bit here as this could be a unrequested irq
+ * whose PM_IRQF_WRITE bit is not set
+ */
cp |= PM_IRQF_WRITE;
rc = pm8xxx_writeb(chip->dev,
SSBI_REG_ADDR_IRQ_CONFIG(chip->base_addr), cp);
@@ -222,7 +226,7 @@
irq_bit = pmirq % 8;
if (chip->config[pmirq] == 0) {
- pr_warn("masking rouge irq=%d pmirq=%d\n", d->irq, pmirq);
+ pr_warn("masking rogue irq=%d pmirq=%d\n", d->irq, pmirq);
chip->config[pmirq] = irq_bit << PM_IRQF_BITS_SHIFT;
}
@@ -242,7 +246,7 @@
irq_bit = pmirq % 8;
if (chip->config[pmirq] == 0) {
- pr_warn("mask acking rouge irq=%d pmirq=%d\n", d->irq, pmirq);
+ pr_warn("mask acking rogue irq=%d pmirq=%d\n", d->irq, pmirq);
chip->config[pmirq] = irq_bit << PM_IRQF_BITS_SHIFT;
}
@@ -295,6 +299,12 @@
chip->config[pmirq] &= ~PM_IRQF_MASK_FE;
}
+ /*
+ * The PM_IRQF_WRITE flag serves as an indication that this interrupt
+ * been requested
+ */
+ chip->config[pmirq] |= PM_IRQF_WRITE;
+
config = chip->config[pmirq] | PM_IRQF_CLR;
return pm8xxx_write_config_irq(chip, block, config);
}
@@ -439,7 +449,7 @@
return chip;
}
-int __devexit pm8xxx_irq_exit(struct pm_irq_chip *chip)
+int pm8xxx_irq_exit(struct pm_irq_chip *chip)
{
irq_set_chained_handler(chip->devirq, NULL);
kfree(chip);
diff --git a/drivers/mfd/pm8xxx-pwm.c b/drivers/mfd/pm8xxx-pwm.c
index 05f02c4..022cfb6 100644
--- a/drivers/mfd/pm8xxx-pwm.c
+++ b/drivers/mfd/pm8xxx-pwm.c
@@ -64,6 +64,7 @@
#define SSBI_REG_ADDR_LPG_BANK_EN 0x144
#define SSBI_REG_ADDR_LPG_LUT_CFG0 0x145
#define SSBI_REG_ADDR_LPG_LUT_CFG1 0x146
+#define SSBI_REG_ADDR_LPG_TEST 0x147
/* LPG Control 0 */
#define PM8XXX_PWM_1KHZ_COUNT_MASK 0xF0
@@ -137,6 +138,10 @@
/* LPG LUT_CFG1 */
#define PM8XXX_PWM_LUT_READ 0x40
+/* TEST */
+#define PM8XXX_PWM_DTEST_MASK 0x38
+#define PM8XXX_PWM_DTEST_SHIFT 3
+#define PM8XXX_PWM_DTEST_BANK_MASK 0x07
/*
* PWM Frequency = Clock Frequency / (N * T)
@@ -200,6 +205,7 @@
int irq;
struct pm8xxx_pwm_chip *chip;
int bypass_lut;
+ int dtest_mode_supported;
};
struct pm8xxx_pwm_chip {
@@ -638,6 +644,28 @@
return rc;
}
+static int pm8xxx_pwm_set_dtest(struct pwm_device *pwm, int enable)
+{
+ int rc;
+ u8 reg;
+
+ reg = pwm->pwm_id & PM8XXX_PWM_DTEST_BANK_MASK;
+
+ if (enable) {
+ /* Observe LPG_OUT on DTEST1*/
+ reg |= (1 << PM8XXX_PWM_DTEST_SHIFT) &
+ PM8XXX_PWM_DTEST_MASK;
+ }
+
+ rc = pm8xxx_writeb(pwm->chip->dev->parent,
+ SSBI_REG_ADDR_LPG_TEST, reg);
+ if (rc)
+ pr_err("pm8xxx_write(DTEST=0x%x) failed: rc=%d\n",
+ reg, rc);
+
+ return rc;
+}
+
/* APIs */
/**
* pwm_request - request a PWM device
@@ -785,6 +813,8 @@
rc = -EINVAL;
} else {
if (pwm_chip->is_lpg_supported) {
+ if (pwm->dtest_mode_supported)
+ pm8xxx_pwm_set_dtest(pwm, 1);
rc = pm8xxx_pwm_bank_enable(pwm, 1);
pm8xxx_pwm_bank_sel(pwm);
pm8xxx_pwm_start(pwm, 1, 0);
@@ -811,6 +841,8 @@
mutex_lock(&pwm->chip->pwm_mutex);
if (pwm->in_use) {
if (pwm_chip->is_lpg_supported) {
+ if (pwm->dtest_mode_supported)
+ pm8xxx_pwm_set_dtest(pwm, 0);
pm8xxx_pwm_bank_sel(pwm);
pm8xxx_pwm_start(pwm, 0, 0);
pm8xxx_pwm_bank_enable(pwm, 0);
@@ -1030,11 +1062,17 @@
mutex_lock(&pwm->chip->pwm_mutex);
if (start) {
+ if (pwm->dtest_mode_supported)
+ pm8xxx_pwm_set_dtest(pwm, 1);
+
pm8xxx_pwm_bank_enable(pwm, 1);
pm8xxx_pwm_bank_sel(pwm);
pm8xxx_pwm_start(pwm, 1, 1);
} else {
+ if (pwm->dtest_mode_supported)
+ pm8xxx_pwm_set_dtest(pwm, 0);
+
pm8xxx_pwm_bank_sel(pwm);
pm8xxx_pwm_start(pwm, 0, 0);
@@ -1324,8 +1362,9 @@
static int __devinit pm8xxx_pwm_probe(struct platform_device *pdev)
{
+ const struct pm8xxx_pwm_platform_data *pdata = pdev->dev.platform_data;
struct pm8xxx_pwm_chip *chip;
- int i;
+ int i, dtest_channel;
enum pm8xxx_version version;
chip = kzalloc(sizeof *chip, GFP_KERNEL);
@@ -1334,6 +1373,11 @@
return -ENOMEM;
}
+ if (pdata != NULL)
+ dtest_channel = pdata->dtest_channel;
+ else
+ dtest_channel = -1;
+
mutex_init(&chip->pwm_mutex);
chip->dev = &pdev->dev;
@@ -1374,6 +1418,8 @@
for (i = 0; i < chip->pwm_channels; i++) {
chip->pwm_dev[i].pwm_id = i;
chip->pwm_dev[i].chip = chip;
+ if (i == dtest_channel)
+ chip->pwm_dev[i].dtest_mode_supported = 1;
}
platform_set_drvdata(pdev, chip);
diff --git a/drivers/mfd/pmic8901.c b/drivers/mfd/pmic8901.c
index 080a3e3..aec382a 100644
--- a/drivers/mfd/pmic8901.c
+++ b/drivers/mfd/pmic8901.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -270,7 +270,7 @@
return rc;
}
-static int pm8901_probe(struct platform_device *pdev)
+static int __devinit pm8901_probe(struct platform_device *pdev)
{
int rc;
struct pm8901_platform_data *pdata = pdev->dev.platform_data;
diff --git a/drivers/mfd/wcd9310-core.c b/drivers/mfd/wcd9310-core.c
deleted file mode 100644
index 56774e9..0000000
--- a/drivers/mfd/wcd9310-core.c
+++ /dev/null
@@ -1,1166 +0,0 @@
-/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/slab.h>
-#include <linux/mfd/core.h>
-#include <linux/mfd/wcd9310/wcd9310-slimslave.h>
-#include <linux/mfd/pm8xxx/pm8921.h>
-#include <linux/mfd/wcd9310/pdata.h>
-#include <linux/mfd/wcd9310/registers.h>
-#include <linux/delay.h>
-#include <linux/gpio.h>
-#include <linux/debugfs.h>
-#include <linux/regulator/consumer.h>
-#include <linux/i2c.h>
-#include <sound/soc.h>
-
-#define TABLA_SLIM_GLA_MAX_RETRIES 5
-#define TABLA_REGISTER_START_OFFSET 0x800
-#define TABLA_SLIM_RW_MAX_TRIES 3
-
-#define MAX_TABLA_DEVICE 4
-#define TABLA_I2C_MODE 0x03
-
-struct tabla_i2c {
- struct i2c_client *client;
- struct i2c_msg xfer_msg[2];
- struct mutex xfer_lock;
- int mod_id;
-};
-
-struct tabla_i2c tabla_modules[MAX_TABLA_DEVICE];
-static int tabla_intf;
-
-static int tabla_read(struct tabla *tabla, unsigned short reg,
- int bytes, void *dest, bool interface_reg)
-{
- int ret;
- u8 *buf = dest;
-
- if (bytes <= 0) {
- dev_err(tabla->dev, "Invalid byte read length %d\n", bytes);
- return -EINVAL;
- }
-
- ret = tabla->read_dev(tabla, reg, bytes, dest, interface_reg);
- if (ret < 0) {
- dev_err(tabla->dev, "Tabla read failed\n");
- return ret;
- } else
- dev_dbg(tabla->dev, "Read 0x%02x from R%d(0x%x)\n",
- *buf, reg, reg);
-
- return 0;
-}
-int tabla_reg_read(struct tabla *tabla, unsigned short reg)
-{
- u8 val;
- int ret;
-
- mutex_lock(&tabla->io_lock);
- ret = tabla_read(tabla, reg, 1, &val, false);
- mutex_unlock(&tabla->io_lock);
-
- if (ret < 0)
- return ret;
- else
- return val;
-}
-EXPORT_SYMBOL_GPL(tabla_reg_read);
-
-static int tabla_write(struct tabla *tabla, unsigned short reg,
- int bytes, void *src, bool interface_reg)
-{
- u8 *buf = src;
-
- if (bytes <= 0) {
- pr_err("%s: Error, invalid write length\n", __func__);
- return -EINVAL;
- }
-
- dev_dbg(tabla->dev, "Write %02x to R%d(0x%x)\n",
- *buf, reg, reg);
-
- return tabla->write_dev(tabla, reg, bytes, src, interface_reg);
-}
-
-int tabla_reg_write(struct tabla *tabla, unsigned short reg,
- u8 val)
-{
- int ret;
-
- mutex_lock(&tabla->io_lock);
- ret = tabla_write(tabla, reg, 1, &val, false);
- mutex_unlock(&tabla->io_lock);
-
- return ret;
-}
-EXPORT_SYMBOL_GPL(tabla_reg_write);
-
-static u8 tabla_pgd_la;
-static u8 tabla_inf_la;
-
-int tabla_get_logical_addresses(u8 *pgd_la, u8 *inf_la)
-{
- *pgd_la = tabla_pgd_la;
- *inf_la = tabla_inf_la;
- return 0;
-
-}
-EXPORT_SYMBOL_GPL(tabla_get_logical_addresses);
-
-int tabla_interface_reg_read(struct tabla *tabla, unsigned short reg)
-{
- u8 val;
- int ret;
-
- mutex_lock(&tabla->io_lock);
- ret = tabla_read(tabla, reg, 1, &val, true);
- mutex_unlock(&tabla->io_lock);
-
- if (ret < 0)
- return ret;
- else
- return val;
-}
-EXPORT_SYMBOL_GPL(tabla_interface_reg_read);
-
-int tabla_interface_reg_write(struct tabla *tabla, unsigned short reg,
- u8 val)
-{
- int ret;
-
- mutex_lock(&tabla->io_lock);
- ret = tabla_write(tabla, reg, 1, &val, true);
- mutex_unlock(&tabla->io_lock);
-
- return ret;
-}
-EXPORT_SYMBOL_GPL(tabla_interface_reg_write);
-
-int tabla_bulk_read(struct tabla *tabla, unsigned short reg,
- int count, u8 *buf)
-{
- int ret;
-
- mutex_lock(&tabla->io_lock);
-
- ret = tabla_read(tabla, reg, count, buf, false);
-
- mutex_unlock(&tabla->io_lock);
-
- return ret;
-}
-EXPORT_SYMBOL_GPL(tabla_bulk_read);
-
-int tabla_bulk_write(struct tabla *tabla, unsigned short reg,
- int count, u8 *buf)
-{
- int ret;
-
- mutex_lock(&tabla->io_lock);
-
- ret = tabla_write(tabla, reg, count, buf, false);
-
- mutex_unlock(&tabla->io_lock);
-
- return ret;
-}
-EXPORT_SYMBOL_GPL(tabla_bulk_write);
-
-static int tabla_slim_read_device(struct tabla *tabla, unsigned short reg,
- int bytes, void *dest, bool interface)
-{
- int ret;
- struct slim_ele_access msg;
- int slim_read_tries = TABLA_SLIM_RW_MAX_TRIES;
- msg.start_offset = TABLA_REGISTER_START_OFFSET + reg;
- msg.num_bytes = bytes;
- msg.comp = NULL;
-
- while (1) {
- mutex_lock(&tabla->xfer_lock);
- ret = slim_request_val_element(interface ?
- tabla->slim_slave : tabla->slim,
- &msg, dest, bytes);
- mutex_unlock(&tabla->xfer_lock);
- if (likely(ret == 0) || (--slim_read_tries == 0))
- break;
- usleep_range(5000, 5000);
- }
-
- if (ret)
- pr_err("%s: Error, Tabla read failed (%d)\n", __func__, ret);
-
- return ret;
-}
-/* Interface specifies whether the write is to the interface or general
- * registers.
- */
-static int tabla_slim_write_device(struct tabla *tabla, unsigned short reg,
- int bytes, void *src, bool interface)
-{
- int ret;
- struct slim_ele_access msg;
- int slim_write_tries = TABLA_SLIM_RW_MAX_TRIES;
- msg.start_offset = TABLA_REGISTER_START_OFFSET + reg;
- msg.num_bytes = bytes;
- msg.comp = NULL;
-
- while (1) {
- mutex_lock(&tabla->xfer_lock);
- ret = slim_change_val_element(interface ?
- tabla->slim_slave : tabla->slim,
- &msg, src, bytes);
- mutex_unlock(&tabla->xfer_lock);
- if (likely(ret == 0) || (--slim_write_tries == 0))
- break;
- usleep_range(5000, 5000);
- }
-
- if (ret)
- pr_err("%s: Error, Tabla write failed (%d)\n", __func__, ret);
-
- return ret;
-}
-
-static struct mfd_cell tabla_devs[] = {
- {
- .name = "tabla_codec",
- },
-};
-
-static struct mfd_cell tabla1x_devs[] = {
- {
- .name = "tabla1x_codec",
- },
-};
-
-static void tabla_bring_up(struct tabla *tabla)
-{
- tabla_reg_write(tabla, TABLA_A_LEAKAGE_CTL, 0x4);
- tabla_reg_write(tabla, TABLA_A_CDC_CTL, 0);
- usleep_range(5000, 5000);
- tabla_reg_write(tabla, TABLA_A_CDC_CTL, 3);
- tabla_reg_write(tabla, TABLA_A_LEAKAGE_CTL, 3);
-}
-
-static void tabla_bring_down(struct tabla *tabla)
-{
- tabla_reg_write(tabla, TABLA_A_LEAKAGE_CTL, 0x7);
- tabla_reg_write(tabla, TABLA_A_LEAKAGE_CTL, 0x6);
- tabla_reg_write(tabla, TABLA_A_LEAKAGE_CTL, 0xe);
- tabla_reg_write(tabla, TABLA_A_LEAKAGE_CTL, 0x8);
-}
-
-static int tabla_reset(struct tabla *tabla)
-{
- int ret;
- struct pm_gpio param = {
- .direction = PM_GPIO_DIR_OUT,
- .output_buffer = PM_GPIO_OUT_BUF_CMOS,
- .output_value = 1,
- .pull = PM_GPIO_PULL_NO,
- .vin_sel = PM_GPIO_VIN_S4,
- .out_strength = PM_GPIO_STRENGTH_MED,
- .function = PM_GPIO_FUNC_NORMAL,
- };
-
- if (tabla->reset_gpio) {
- ret = gpio_request(tabla->reset_gpio, "CDC_RESET");
- if (ret) {
- pr_err("%s: Failed to request gpio %d\n", __func__,
- tabla->reset_gpio);
- tabla->reset_gpio = 0;
- return ret;
- }
-
- ret = pm8xxx_gpio_config(tabla->reset_gpio, ¶m);
- if (ret)
- pr_err("%s: Failed to configure gpio\n", __func__);
-
- gpio_direction_output(tabla->reset_gpio, 1);
- msleep(20);
- gpio_direction_output(tabla->reset_gpio, 0);
- msleep(20);
- gpio_direction_output(tabla->reset_gpio, 1);
- msleep(20);
- }
- return 0;
-}
-
-static void tabla_free_reset(struct tabla *tabla)
-{
- if (tabla->reset_gpio) {
- gpio_free(tabla->reset_gpio);
- tabla->reset_gpio = 0;
- }
-}
-
-struct tabla_regulator {
- const char *name;
- int min_uV;
- int max_uV;
- int optimum_uA;
- struct regulator *regulator;
-};
-
-
-/*
- * format : TABLA_<POWER_SUPPLY_PIN_NAME>_CUR_MAX
- *
- * <POWER_SUPPLY_PIN_NAME> from Tabla objective spec
-*/
-
-#define TABLA_CDC_VDDA_CP_CUR_MAX 500000
-#define TABLA_CDC_VDDA_RX_CUR_MAX 20000
-#define TABLA_CDC_VDDA_TX_CUR_MAX 20000
-#define TABLA_VDDIO_CDC_CUR_MAX 5000
-
-#define TABLA_VDDD_CDC_D_CUR_MAX 5000
-#define TABLA_VDDD_CDC_A_CUR_MAX 5000
-
-static struct tabla_regulator tabla_regulators[] = {
- {
- .name = "CDC_VDD_CP",
- .min_uV = 1800000,
- .max_uV = 1800000,
- .optimum_uA = TABLA_CDC_VDDA_CP_CUR_MAX,
- },
- {
- .name = "CDC_VDDA_RX",
- .min_uV = 1800000,
- .max_uV = 1800000,
- .optimum_uA = TABLA_CDC_VDDA_RX_CUR_MAX,
- },
- {
- .name = "CDC_VDDA_TX",
- .min_uV = 1800000,
- .max_uV = 1800000,
- .optimum_uA = TABLA_CDC_VDDA_TX_CUR_MAX,
- },
- {
- .name = "VDDIO_CDC",
- .min_uV = 1800000,
- .max_uV = 1800000,
- .optimum_uA = TABLA_VDDIO_CDC_CUR_MAX,
- },
- {
- .name = "VDDD_CDC_D",
- .min_uV = 1225000,
- .max_uV = 1225000,
- .optimum_uA = TABLA_VDDD_CDC_D_CUR_MAX,
- },
- {
- .name = "CDC_VDDA_A_1P2V",
- .min_uV = 1225000,
- .max_uV = 1225000,
- .optimum_uA = TABLA_VDDD_CDC_A_CUR_MAX,
- },
-};
-
-static int tabla_device_init(struct tabla *tabla, int irq)
-{
- int ret;
- struct mfd_cell *tabla_dev;
- int tabla_dev_size;
-
- mutex_init(&tabla->io_lock);
- mutex_init(&tabla->xfer_lock);
-
- mutex_init(&tabla->pm_lock);
- tabla->wlock_holders = 0;
- tabla->pm_state = TABLA_PM_SLEEPABLE;
- init_waitqueue_head(&tabla->pm_wq);
- wake_lock_init(&tabla->wlock, WAKE_LOCK_IDLE, "wcd9310-irq");
-
- dev_set_drvdata(tabla->dev, tabla);
-
- tabla_bring_up(tabla);
-
- ret = tabla_irq_init(tabla);
- if (ret) {
- pr_err("IRQ initialization failed\n");
- goto err;
- }
- tabla->version = tabla_reg_read(tabla, TABLA_A_CHIP_VERSION) & 0x1F;
- pr_info("%s : Tabla version %u initialized\n",
- __func__, tabla->version);
-
- if (TABLA_IS_1_X(tabla->version)) {
- tabla_dev = tabla1x_devs;
- tabla_dev_size = ARRAY_SIZE(tabla1x_devs);
- } else {
- tabla_dev = tabla_devs;
- tabla_dev_size = ARRAY_SIZE(tabla_devs);
- }
- ret = mfd_add_devices(tabla->dev, -1,
- tabla_dev, tabla_dev_size,
- NULL, 0);
- if (ret != 0) {
- dev_err(tabla->dev, "Failed to add children: %d\n", ret);
- goto err_irq;
- }
-
- tabla->version = tabla_reg_read(tabla, TABLA_A_CHIP_VERSION) & 0x1F;
- pr_info("%s : Tabla version %u initialized\n",
- __func__, tabla->version);
-
- return ret;
-err_irq:
- tabla_irq_exit(tabla);
-err:
- tabla_bring_down(tabla);
- wake_lock_destroy(&tabla->wlock);
- mutex_destroy(&tabla->pm_lock);
- mutex_destroy(&tabla->io_lock);
- mutex_destroy(&tabla->xfer_lock);
- return ret;
-}
-
-static void tabla_device_exit(struct tabla *tabla)
-{
- tabla_irq_exit(tabla);
- tabla_bring_down(tabla);
- tabla_free_reset(tabla);
- mutex_destroy(&tabla->pm_lock);
- wake_lock_destroy(&tabla->wlock);
- mutex_destroy(&tabla->io_lock);
- mutex_destroy(&tabla->xfer_lock);
-}
-
-
-#ifdef CONFIG_DEBUG_FS
-struct tabla *debugTabla;
-
-static struct dentry *debugfs_tabla_dent;
-static struct dentry *debugfs_peek;
-static struct dentry *debugfs_poke;
-
-static unsigned char read_data;
-
-static int codec_debug_open(struct inode *inode, struct file *file)
-{
- file->private_data = inode->i_private;
- return 0;
-}
-
-static int get_parameters(char *buf, long int *param1, int num_of_par)
-{
- char *token;
- int base, cnt;
-
- token = strsep(&buf, " ");
-
- for (cnt = 0; cnt < num_of_par; cnt++) {
- if (token != NULL) {
- if ((token[1] == 'x') || (token[1] == 'X'))
- base = 16;
- else
- base = 10;
-
- if (strict_strtoul(token, base, ¶m1[cnt]) != 0)
- return -EINVAL;
-
- token = strsep(&buf, " ");
- } else
- return -EINVAL;
- }
- return 0;
-}
-
-static ssize_t codec_debug_read(struct file *file, char __user *ubuf,
- size_t count, loff_t *ppos)
-{
- char lbuf[8];
-
- snprintf(lbuf, sizeof(lbuf), "0x%x\n", read_data);
- return simple_read_from_buffer(ubuf, count, ppos, lbuf,
- strnlen(lbuf, 7));
-}
-
-
-static ssize_t codec_debug_write(struct file *filp,
- const char __user *ubuf, size_t cnt, loff_t *ppos)
-{
- char *access_str = filp->private_data;
- char lbuf[32];
- int rc;
- long int param[5];
-
- if (cnt > sizeof(lbuf) - 1)
- return -EINVAL;
-
- rc = copy_from_user(lbuf, ubuf, cnt);
- if (rc)
- return -EFAULT;
-
- lbuf[cnt] = '\0';
-
- if (!strncmp(access_str, "poke", 6)) {
- /* write */
- rc = get_parameters(lbuf, param, 2);
- if ((param[0] <= 0x3FF) && (param[1] <= 0xFF) &&
- (rc == 0))
- tabla_interface_reg_write(debugTabla, param[0],
- param[1]);
- else
- rc = -EINVAL;
- } else if (!strncmp(access_str, "peek", 6)) {
- /* read */
- rc = get_parameters(lbuf, param, 1);
- if ((param[0] <= 0x3FF) && (rc == 0))
- read_data = tabla_interface_reg_read(debugTabla,
- param[0]);
- else
- rc = -EINVAL;
- }
-
- if (rc == 0)
- rc = cnt;
- else
- pr_err("%s: rc = %d\n", __func__, rc);
-
- return rc;
-}
-
-static const struct file_operations codec_debug_ops = {
- .open = codec_debug_open,
- .write = codec_debug_write,
- .read = codec_debug_read
-};
-#endif
-
-static int tabla_enable_supplies(struct tabla *tabla)
-{
- int ret;
- int i;
-
- tabla->supplies = kzalloc(sizeof(struct regulator_bulk_data) *
- ARRAY_SIZE(tabla_regulators),
- GFP_KERNEL);
- if (!tabla->supplies) {
- ret = -ENOMEM;
- goto err;
- }
-
- for (i = 0; i < ARRAY_SIZE(tabla_regulators); i++)
- tabla->supplies[i].supply = tabla_regulators[i].name;
-
- ret = regulator_bulk_get(tabla->dev, ARRAY_SIZE(tabla_regulators),
- tabla->supplies);
- if (ret != 0) {
- dev_err(tabla->dev, "Failed to get supplies: err = %d\n", ret);
- goto err_supplies;
- }
-
- for (i = 0; i < ARRAY_SIZE(tabla_regulators); i++) {
- ret = regulator_set_voltage(tabla->supplies[i].consumer,
- tabla_regulators[i].min_uV, tabla_regulators[i].max_uV);
- if (ret) {
- pr_err("%s: Setting regulator voltage failed for "
- "regulator %s err = %d\n", __func__,
- tabla->supplies[i].supply, ret);
- goto err_get;
- }
-
- ret = regulator_set_optimum_mode(tabla->supplies[i].consumer,
- tabla_regulators[i].optimum_uA);
- if (ret < 0) {
- pr_err("%s: Setting regulator optimum mode failed for "
- "regulator %s err = %d\n", __func__,
- tabla->supplies[i].supply, ret);
- goto err_get;
- }
- }
-
- ret = regulator_bulk_enable(ARRAY_SIZE(tabla_regulators),
- tabla->supplies);
- if (ret != 0) {
- dev_err(tabla->dev, "Failed to enable supplies: err = %d\n",
- ret);
- goto err_configure;
- }
- return ret;
-
-err_configure:
- for (i = 0; i < ARRAY_SIZE(tabla_regulators); i++) {
- regulator_set_voltage(tabla->supplies[i].consumer, 0,
- tabla_regulators[i].max_uV);
- regulator_set_optimum_mode(tabla->supplies[i].consumer, 0);
- }
-err_get:
- regulator_bulk_free(ARRAY_SIZE(tabla_regulators), tabla->supplies);
-err_supplies:
- kfree(tabla->supplies);
-err:
- return ret;
-}
-
-static void tabla_disable_supplies(struct tabla *tabla)
-{
- int i;
-
- regulator_bulk_disable(ARRAY_SIZE(tabla_regulators),
- tabla->supplies);
- for (i = 0; i < ARRAY_SIZE(tabla_regulators); i++) {
- regulator_set_voltage(tabla->supplies[i].consumer, 0,
- tabla_regulators[i].max_uV);
- regulator_set_optimum_mode(tabla->supplies[i].consumer, 0);
- }
- regulator_bulk_free(ARRAY_SIZE(tabla_regulators), tabla->supplies);
- kfree(tabla->supplies);
-}
-
-int tabla_get_intf_type(void)
-{
- return tabla_intf;
-}
-EXPORT_SYMBOL_GPL(tabla_get_intf_type);
-
-struct tabla_i2c *get_i2c_tabla_device_info(u16 reg)
-{
- u16 mask = 0x0f00;
- int value = 0;
- struct tabla_i2c *tabla = NULL;
- value = ((reg & mask) >> 8) & 0x000f;
- switch (value) {
- case 0:
- tabla = &tabla_modules[0];
- break;
- case 1:
- tabla = &tabla_modules[1];
- break;
- case 2:
- tabla = &tabla_modules[2];
- break;
- case 3:
- tabla = &tabla_modules[3];
- break;
- default:
- break;
- }
- return tabla;
-}
-
-int tabla_i2c_write_device(u16 reg, u8 *value,
- u32 bytes)
-{
-
- struct i2c_msg *msg;
- int ret = 0;
- u8 reg_addr = 0;
- u8 data[bytes + 1];
- struct tabla_i2c *tabla;
-
- tabla = get_i2c_tabla_device_info(reg);
- if (tabla->client == NULL) {
- pr_err("failed to get device info\n");
- return -ENODEV;
- }
- reg_addr = (u8)reg;
- msg = &tabla->xfer_msg[0];
- msg->addr = tabla->client->addr;
- msg->len = bytes + 1;
- msg->flags = 0;
- data[0] = reg;
- data[1] = *value;
- msg->buf = data;
- ret = i2c_transfer(tabla->client->adapter, tabla->xfer_msg, 1);
- /* Try again if the write fails */
- if (ret != 1) {
- ret = i2c_transfer(tabla->client->adapter,
- tabla->xfer_msg, 1);
- if (ret != 1) {
- pr_err("failed to write the device\n");
- return ret;
- }
- }
- pr_debug("write sucess register = %x val = %x\n", reg, data[1]);
- return 0;
-}
-
-
-int tabla_i2c_read_device(unsigned short reg,
- int bytes, unsigned char *dest)
-{
- struct i2c_msg *msg;
- int ret = 0;
- u8 reg_addr = 0;
- struct tabla_i2c *tabla;
- u8 i = 0;
-
- tabla = get_i2c_tabla_device_info(reg);
- if (tabla->client == NULL) {
- pr_err("failed to get device info\n");
- return -ENODEV;
- }
- for (i = 0; i < bytes; i++) {
- reg_addr = (u8)reg++;
- msg = &tabla->xfer_msg[0];
- msg->addr = tabla->client->addr;
- msg->len = 1;
- msg->flags = 0;
- msg->buf = ®_addr;
-
- msg = &tabla->xfer_msg[1];
- msg->addr = tabla->client->addr;
- msg->len = 1;
- msg->flags = I2C_M_RD;
- msg->buf = dest++;
- ret = i2c_transfer(tabla->client->adapter, tabla->xfer_msg, 2);
-
- /* Try again if read fails first time */
- if (ret != 2) {
- ret = i2c_transfer(tabla->client->adapter,
- tabla->xfer_msg, 2);
- if (ret != 2) {
- pr_err("failed to read tabla register\n");
- return ret;
- }
- }
- }
- return 0;
-}
-
-int tabla_i2c_read(struct tabla *tabla, unsigned short reg,
- int bytes, void *dest, bool interface_reg)
-{
- return tabla_i2c_read_device(reg, bytes, dest);
-}
-
-int tabla_i2c_write(struct tabla *tabla, unsigned short reg,
- int bytes, void *src, bool interface_reg)
-{
- return tabla_i2c_write_device(reg, src, bytes);
-}
-
-static int __devinit tabla_i2c_probe(struct i2c_client *client,
- const struct i2c_device_id *id)
-{
- struct tabla *tabla;
- struct tabla_pdata *pdata = client->dev.platform_data;
- int val = 0;
- int ret = 0;
- static int device_id;
-
- if (device_id > 0) {
- tabla_modules[device_id++].client = client;
- pr_info("probe for other slaves devices of tabla\n");
- return ret;
- }
-
- tabla = kzalloc(sizeof(struct tabla), GFP_KERNEL);
- if (tabla == NULL) {
- pr_err("%s: error, allocation failed\n", __func__);
- ret = -ENOMEM;
- goto fail;
- }
-
- if (!pdata) {
- dev_dbg(&client->dev, "no platform data?\n");
- ret = -EINVAL;
- goto fail;
- }
- if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) {
- dev_dbg(&client->dev, "can't talk I2C?\n");
- ret = -EIO;
- goto fail;
- }
- tabla->dev = &client->dev;
- tabla->reset_gpio = pdata->reset_gpio;
-
- ret = tabla_enable_supplies(tabla);
- if (ret) {
- pr_err("%s: Fail to enable Tabla supplies\n", __func__);
- goto err_tabla;
- }
-
- usleep_range(5, 5);
- ret = tabla_reset(tabla);
- if (ret) {
- pr_err("%s: Resetting Tabla failed\n", __func__);
- goto err_supplies;
- }
- tabla_modules[device_id++].client = client;
-
- tabla->read_dev = tabla_i2c_read;
- tabla->write_dev = tabla_i2c_write;
- tabla->irq = pdata->irq;
- tabla->irq_base = pdata->irq_base;
-
- /*read the tabla status before initializing the device type*/
- ret = tabla_read(tabla, TABLA_A_CHIP_STATUS, 1, &val, 0);
- if ((ret < 0) || (val != TABLA_I2C_MODE)) {
- pr_err("failed to read the tabla status\n");
- goto err_device_init;
- }
-
- ret = tabla_device_init(tabla, tabla->irq);
- if (ret) {
- pr_err("%s: error, initializing device failed\n", __func__);
- goto err_device_init;
- }
- tabla_intf = TABLA_INTERFACE_TYPE_I2C;
-
- return ret;
-err_device_init:
- tabla_free_reset(tabla);
-err_supplies:
- tabla_disable_supplies(tabla);
-err_tabla:
- kfree(tabla);
-fail:
- return ret;
-}
-
-static int __devexit tabla_i2c_remove(struct i2c_client *client)
-{
- struct tabla *tabla;
-
- pr_debug("exit\n");
- tabla = dev_get_drvdata(&client->dev);
- tabla_device_exit(tabla);
- tabla_disable_supplies(tabla);
- kfree(tabla);
- return 0;
-}
-
-static int tabla_slim_probe(struct slim_device *slim)
-{
- struct tabla *tabla;
- struct tabla_pdata *pdata;
- int ret = 0;
- int sgla_retry_cnt;
-
- dev_info(&slim->dev, "Initialized slim device %s\n", slim->name);
- pdata = slim->dev.platform_data;
-
- if (!pdata) {
- dev_err(&slim->dev, "Error, no platform data\n");
- ret = -EINVAL;
- goto err;
- }
-
- tabla = kzalloc(sizeof(struct tabla), GFP_KERNEL);
- if (tabla == NULL) {
- pr_err("%s: error, allocation failed\n", __func__);
- ret = -ENOMEM;
- goto err;
- }
- if (!slim->ctrl) {
- pr_err("Error, no SLIMBUS control data\n");
- ret = -EINVAL;
- goto err_tabla;
- }
- tabla->slim = slim;
- slim_set_clientdata(slim, tabla);
- tabla->reset_gpio = pdata->reset_gpio;
- tabla->dev = &slim->dev;
-
- ret = tabla_enable_supplies(tabla);
- if (ret) {
- pr_err("%s: Fail to enable Tabla supplies\n", __func__);
- goto err_tabla;
- }
- usleep_range(5, 5);
-
- ret = tabla_reset(tabla);
- if (ret) {
- pr_err("%s: Resetting Tabla failed\n", __func__);
- goto err_supplies;
- }
-
- ret = slim_get_logical_addr(tabla->slim, tabla->slim->e_addr,
- ARRAY_SIZE(tabla->slim->e_addr), &tabla->slim->laddr);
- if (ret) {
- pr_err("fail to get slimbus logical address %d\n", ret);
- goto err_reset;
- }
- tabla->read_dev = tabla_slim_read_device;
- tabla->write_dev = tabla_slim_write_device;
- tabla->irq = pdata->irq;
- tabla->irq_base = pdata->irq_base;
- tabla_pgd_la = tabla->slim->laddr;
-
- if (pdata->num_irqs < TABLA_NUM_IRQS) {
- pr_err("%s: Error, not enough interrupt lines allocated\n",
- __func__);
- goto err_reset;
- }
-
- tabla->slim_slave = &pdata->slimbus_slave_device;
-
- ret = slim_add_device(slim->ctrl, tabla->slim_slave);
- if (ret) {
- pr_err("%s: error, adding SLIMBUS device failed\n", __func__);
- goto err_reset;
- }
-
- sgla_retry_cnt = 0;
-
- while (1) {
- ret = slim_get_logical_addr(tabla->slim_slave,
- tabla->slim_slave->e_addr,
- ARRAY_SIZE(tabla->slim_slave->e_addr),
- &tabla->slim_slave->laddr);
- if (ret) {
- if (sgla_retry_cnt++ < TABLA_SLIM_GLA_MAX_RETRIES) {
- /* Give SLIMBUS slave time to report present
- and be ready.
- */
- usleep_range(1000, 1000);
- pr_debug("%s: retry slim_get_logical_addr()\n",
- __func__);
- continue;
- }
- pr_err("fail to get slimbus slave logical address"
- " %d\n", ret);
- goto err_slim_add;
- }
- break;
- }
- tabla_inf_la = tabla->slim_slave->laddr;
- tabla_intf = TABLA_INTERFACE_TYPE_SLIMBUS;
-
- ret = tabla_device_init(tabla, tabla->irq);
- if (ret) {
- pr_err("%s: error, initializing device failed\n", __func__);
- goto err_slim_add;
- }
- tabla_init_slimslave(tabla, tabla_pgd_la);
-#ifdef CONFIG_DEBUG_FS
- debugTabla = tabla;
-
- debugfs_tabla_dent = debugfs_create_dir
- ("wcd9310_slimbus_interface_device", 0);
- if (!IS_ERR(debugfs_tabla_dent)) {
- debugfs_peek = debugfs_create_file("peek",
- S_IFREG | S_IRUGO, debugfs_tabla_dent,
- (void *) "peek", &codec_debug_ops);
-
- debugfs_poke = debugfs_create_file("poke",
- S_IFREG | S_IRUGO, debugfs_tabla_dent,
- (void *) "poke", &codec_debug_ops);
- }
-#endif
-
- return ret;
-
-err_slim_add:
- slim_remove_device(tabla->slim_slave);
-err_reset:
- tabla_free_reset(tabla);
-err_supplies:
- tabla_disable_supplies(tabla);
-err_tabla:
- kfree(tabla);
-err:
- return ret;
-}
-
-static int tabla_slim_remove(struct slim_device *pdev)
-{
- struct tabla *tabla;
-
-#ifdef CONFIG_DEBUG_FS
- debugfs_remove(debugfs_peek);
- debugfs_remove(debugfs_poke);
- debugfs_remove(debugfs_tabla_dent);
-#endif
-
- tabla = slim_get_devicedata(pdev);
- tabla_deinit_slimslave(tabla);
- tabla_device_exit(tabla);
- tabla_disable_supplies(tabla);
- slim_remove_device(tabla->slim_slave);
- kfree(tabla);
-
- return 0;
-}
-
-static int tabla_resume(struct tabla *tabla)
-{
- int ret = 0;
-
- pr_debug("%s: enter\n", __func__);
- mutex_lock(&tabla->pm_lock);
- if (tabla->pm_state == TABLA_PM_ASLEEP) {
- pr_debug("%s: resuming system, state %d, wlock %d\n", __func__,
- tabla->pm_state, tabla->wlock_holders);
- tabla->pm_state = TABLA_PM_SLEEPABLE;
- } else {
- pr_warn("%s: system is already awake, state %d wlock %d\n",
- __func__, tabla->pm_state, tabla->wlock_holders);
- }
- mutex_unlock(&tabla->pm_lock);
- wake_up_all(&tabla->pm_wq);
-
- return ret;
-}
-
-static int tabla_slim_resume(struct slim_device *sldev)
-{
- struct tabla *tabla = slim_get_devicedata(sldev);
- return tabla_resume(tabla);
-}
-
-static int tabla_i2c_resume(struct i2c_client *i2cdev)
-{
- struct tabla *tabla = dev_get_drvdata(&i2cdev->dev);
- return tabla_resume(tabla);
-}
-
-static int tabla_suspend(struct tabla *tabla, pm_message_t pmesg)
-{
- int ret = 0;
-
- pr_debug("%s: enter\n", __func__);
- /* wake_lock() can be called after this suspend chain call started.
- * thus suspend can be called while wlock is being held */
- mutex_lock(&tabla->pm_lock);
- if (tabla->pm_state == TABLA_PM_SLEEPABLE) {
- pr_debug("%s: suspending system, state %d, wlock %d\n",
- __func__, tabla->pm_state, tabla->wlock_holders);
- tabla->pm_state = TABLA_PM_ASLEEP;
- } else if (tabla->pm_state == TABLA_PM_AWAKE) {
- /* unlock to wait for pm_state == TABLA_PM_SLEEPABLE
- * then set to TABLA_PM_ASLEEP */
- pr_debug("%s: waiting to suspend system, state %d, wlock %d\n",
- __func__, tabla->pm_state, tabla->wlock_holders);
- mutex_unlock(&tabla->pm_lock);
- if (!(wait_event_timeout(tabla->pm_wq,
- tabla_pm_cmpxchg(tabla,
- TABLA_PM_SLEEPABLE,
- TABLA_PM_ASLEEP) ==
- TABLA_PM_SLEEPABLE,
- HZ))) {
- pr_debug("%s: suspend failed state %d, wlock %d\n",
- __func__, tabla->pm_state,
- tabla->wlock_holders);
- ret = -EBUSY;
- } else {
- pr_debug("%s: done, state %d, wlock %d\n", __func__,
- tabla->pm_state, tabla->wlock_holders);
- }
- mutex_lock(&tabla->pm_lock);
- } else if (tabla->pm_state == TABLA_PM_ASLEEP) {
- pr_warn("%s: system is already suspended, state %d, wlock %dn",
- __func__, tabla->pm_state, tabla->wlock_holders);
- }
- mutex_unlock(&tabla->pm_lock);
-
- return ret;
-}
-
-static int tabla_slim_suspend(struct slim_device *sldev, pm_message_t pmesg)
-{
- struct tabla *tabla = slim_get_devicedata(sldev);
- return tabla_suspend(tabla, pmesg);
-}
-
-static int tabla_i2c_suspend(struct i2c_client *i2cdev, pm_message_t pmesg)
-{
- struct tabla *tabla = dev_get_drvdata(&i2cdev->dev);
- return tabla_suspend(tabla, pmesg);
-}
-
-static const struct slim_device_id slimtest_id[] = {
- {"tabla-slim", 0},
- {}
-};
-
-static struct slim_driver tabla_slim_driver = {
- .driver = {
- .name = "tabla-slim",
- .owner = THIS_MODULE,
- },
- .probe = tabla_slim_probe,
- .remove = tabla_slim_remove,
- .id_table = slimtest_id,
- .resume = tabla_slim_resume,
- .suspend = tabla_slim_suspend,
-};
-
-static const struct slim_device_id slimtest2x_id[] = {
- {"tabla2x-slim", 0},
- {}
-};
-
-static struct slim_driver tabla2x_slim_driver = {
- .driver = {
- .name = "tabla2x-slim",
- .owner = THIS_MODULE,
- },
- .probe = tabla_slim_probe,
- .remove = tabla_slim_remove,
- .id_table = slimtest2x_id,
- .resume = tabla_slim_resume,
- .suspend = tabla_slim_suspend,
-};
-
-#define TABLA_I2C_TOP_LEVEL 0
-#define TABLA_I2C_ANALOG 1
-#define TABLA_I2C_DIGITAL_1 2
-#define TABLA_I2C_DIGITAL_2 3
-
-static struct i2c_device_id tabla_id_table[] = {
- {"tabla top level", TABLA_I2C_TOP_LEVEL},
- {"tabla analog", TABLA_I2C_TOP_LEVEL},
- {"tabla digital1", TABLA_I2C_TOP_LEVEL},
- {"tabla digital2", TABLA_I2C_TOP_LEVEL},
- {}
-};
-MODULE_DEVICE_TABLE(i2c, tabla_id_table);
-
-static struct i2c_driver tabla_i2c_driver = {
- .driver = {
- .owner = THIS_MODULE,
- .name = "tabla-i2c-core",
- },
- .id_table = tabla_id_table,
- .probe = tabla_i2c_probe,
- .remove = __devexit_p(tabla_i2c_remove),
- .resume = tabla_i2c_resume,
- .suspend = tabla_i2c_suspend,
-};
-
-static int __init tabla_init(void)
-{
- int ret1, ret2, ret3;
-
- ret1 = slim_driver_register(&tabla_slim_driver);
- if (ret1 != 0)
- pr_err("Failed to register tabla SB driver: %d\n", ret1);
-
- ret2 = slim_driver_register(&tabla2x_slim_driver);
- if (ret2 != 0)
- pr_err("Failed to register tabla2x SB driver: %d\n", ret2);
-
- ret3 = i2c_add_driver(&tabla_i2c_driver);
- if (ret3 != 0)
- pr_err("failed to add the I2C driver\n");
-
- return (ret1 && ret2 && ret3) ? -1 : 0;
-}
-module_init(tabla_init);
-
-static void __exit tabla_exit(void)
-{
-}
-module_exit(tabla_exit);
-
-MODULE_DESCRIPTION("Tabla core driver");
-MODULE_VERSION("1.0");
-MODULE_LICENSE("GPL v2");
diff --git a/drivers/mfd/wcd9310-irq.c b/drivers/mfd/wcd9310-irq.c
deleted file mode 100644
index c6a9c23..0000000
--- a/drivers/mfd/wcd9310-irq.c
+++ /dev/null
@@ -1,283 +0,0 @@
-/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#include <linux/bitops.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/irq.h>
-#include <linux/mfd/core.h>
-#include <linux/mfd/wcd9310/core.h>
-#include <linux/mfd/wcd9310/registers.h>
-#include <linux/interrupt.h>
-
-#define BYTE_BIT_MASK(nr) (1UL << ((nr) % BITS_PER_BYTE))
-#define BIT_BYTE(nr) ((nr) / BITS_PER_BYTE)
-
-struct tabla_irq {
- bool level;
-};
-
-static struct tabla_irq tabla_irqs[TABLA_NUM_IRQS] = {
- [0] = { .level = 1},
-/* All other tabla interrupts are edge triggered */
-};
-
-static inline int irq_to_tabla_irq(struct tabla *tabla, int irq)
-{
- return irq - tabla->irq_base;
-}
-
-static void tabla_irq_lock(struct irq_data *data)
-{
- struct tabla *tabla = irq_data_get_irq_chip_data(data);
- mutex_lock(&tabla->irq_lock);
-}
-
-static void tabla_irq_sync_unlock(struct irq_data *data)
-{
- struct tabla *tabla = irq_data_get_irq_chip_data(data);
- int i;
-
- for (i = 0; i < ARRAY_SIZE(tabla->irq_masks_cur); i++) {
- /* If there's been a change in the mask write it back
- * to the hardware.
- */
- if (tabla->irq_masks_cur[i] != tabla->irq_masks_cache[i]) {
- tabla->irq_masks_cache[i] = tabla->irq_masks_cur[i];
- tabla_reg_write(tabla, TABLA_A_INTR_MASK0+i,
- tabla->irq_masks_cur[i]);
- }
- }
-
- mutex_unlock(&tabla->irq_lock);
-}
-
-static void tabla_irq_enable(struct irq_data *data)
-{
- struct tabla *tabla = irq_data_get_irq_chip_data(data);
- int tabla_irq = irq_to_tabla_irq(tabla, data->irq);
- tabla->irq_masks_cur[BIT_BYTE(tabla_irq)] &=
- ~(BYTE_BIT_MASK(tabla_irq));
-}
-
-static void tabla_irq_disable(struct irq_data *data)
-{
- struct tabla *tabla = irq_data_get_irq_chip_data(data);
- int tabla_irq = irq_to_tabla_irq(tabla, data->irq);
- tabla->irq_masks_cur[BIT_BYTE(tabla_irq)] |= BYTE_BIT_MASK(tabla_irq);
-}
-
-static struct irq_chip tabla_irq_chip = {
- .name = "tabla",
- .irq_bus_lock = tabla_irq_lock,
- .irq_bus_sync_unlock = tabla_irq_sync_unlock,
- .irq_disable = tabla_irq_disable,
- .irq_enable = tabla_irq_enable,
-};
-
-enum tabla_pm_state tabla_pm_cmpxchg(struct tabla *tabla, enum tabla_pm_state o,
- enum tabla_pm_state n)
-{
- enum tabla_pm_state old;
- mutex_lock(&tabla->pm_lock);
- old = tabla->pm_state;
- if (old == o)
- tabla->pm_state = n;
- mutex_unlock(&tabla->pm_lock);
- return old;
-}
-EXPORT_SYMBOL_GPL(tabla_pm_cmpxchg);
-
-void tabla_lock_sleep(struct tabla *tabla)
-{
- enum tabla_pm_state os;
-
- /* tabla_{lock/unlock}_sleep will be called by tabla_irq_thread
- * and its subroutines only motly.
- * but btn0_lpress_fn is not tabla_irq_thread's subroutine and
- * it can race with tabla_irq_thread.
- * so need to embrace wlock_holders with mutex.
- */
- mutex_lock(&tabla->pm_lock);
- if (tabla->wlock_holders++ == 0)
- wake_lock(&tabla->wlock);
- mutex_unlock(&tabla->pm_lock);
- while (!wait_event_timeout(tabla->pm_wq,
- ((os = tabla_pm_cmpxchg(tabla, TABLA_PM_SLEEPABLE,
- TABLA_PM_AWAKE)) ==
- TABLA_PM_SLEEPABLE ||
- (os == TABLA_PM_AWAKE)),
- 5 * HZ)) {
- pr_err("%s: system didn't resume within 5000ms, state %d, "
- "wlock %d\n", __func__, tabla->pm_state,
- tabla->wlock_holders);
- WARN_ON_ONCE(1);
- }
- wake_up_all(&tabla->pm_wq);
-}
-EXPORT_SYMBOL_GPL(tabla_lock_sleep);
-
-void tabla_unlock_sleep(struct tabla *tabla)
-{
- mutex_lock(&tabla->pm_lock);
- if (--tabla->wlock_holders == 0) {
- tabla->pm_state = TABLA_PM_SLEEPABLE;
- wake_unlock(&tabla->wlock);
- }
- mutex_unlock(&tabla->pm_lock);
- wake_up_all(&tabla->pm_wq);
-}
-EXPORT_SYMBOL_GPL(tabla_unlock_sleep);
-
-static irqreturn_t tabla_irq_thread(int irq, void *data)
-{
- int ret;
- struct tabla *tabla = data;
- u8 status[TABLA_NUM_IRQ_REGS];
- unsigned int i;
-
- tabla_lock_sleep(tabla);
- ret = tabla_bulk_read(tabla, TABLA_A_INTR_STATUS0,
- TABLA_NUM_IRQ_REGS, status);
- if (ret < 0) {
- dev_err(tabla->dev, "Failed to read interrupt status: %d\n",
- ret);
- tabla_unlock_sleep(tabla);
- return IRQ_NONE;
- }
- /* Apply masking */
- for (i = 0; i < TABLA_NUM_IRQ_REGS; i++)
- status[i] &= ~tabla->irq_masks_cur[i];
-
- /* Find out which interrupt was triggered and call that interrupt's
- * handler function
- */
- for (i = 0; i < TABLA_NUM_IRQS; i++) {
- if (status[BIT_BYTE(i)] & BYTE_BIT_MASK(i)) {
- if ((i <= TABLA_IRQ_MBHC_INSERTION) &&
- (i >= TABLA_IRQ_MBHC_REMOVAL)) {
- tabla_reg_write(tabla, TABLA_A_INTR_CLEAR0 +
- BIT_BYTE(i), BYTE_BIT_MASK(i));
- if (tabla_get_intf_type() ==
- TABLA_INTERFACE_TYPE_I2C)
- tabla_reg_write(tabla,
- TABLA_A_INTR_MODE, 0x02);
- handle_nested_irq(tabla->irq_base + i);
- } else {
- handle_nested_irq(tabla->irq_base + i);
- tabla_reg_write(tabla, TABLA_A_INTR_CLEAR0 +
- BIT_BYTE(i), BYTE_BIT_MASK(i));
- if (tabla_get_intf_type() ==
- TABLA_INTERFACE_TYPE_I2C)
- tabla_reg_write(tabla,
- TABLA_A_INTR_MODE, 0x02);
- }
- break;
- }
- }
- tabla_unlock_sleep(tabla);
-
- return IRQ_HANDLED;
-}
-
-int tabla_irq_init(struct tabla *tabla)
-{
- int ret;
- unsigned int i, cur_irq;
-
- mutex_init(&tabla->irq_lock);
-
- if (!tabla->irq) {
- dev_warn(tabla->dev,
- "No interrupt specified, no interrupts\n");
- tabla->irq_base = 0;
- return 0;
- }
-
- if (!tabla->irq_base) {
- dev_err(tabla->dev,
- "No interrupt base specified, no interrupts\n");
- return 0;
- }
- /* Mask the individual interrupt sources */
- for (i = 0, cur_irq = tabla->irq_base; i < TABLA_NUM_IRQS; i++,
- cur_irq++) {
-
- irq_set_chip_data(cur_irq, tabla);
-
- if (tabla_irqs[i].level)
- irq_set_chip_and_handler(cur_irq, &tabla_irq_chip,
- handle_level_irq);
- else
- irq_set_chip_and_handler(cur_irq, &tabla_irq_chip,
- handle_edge_irq);
-
- irq_set_nested_thread(cur_irq, 1);
-
- /* ARM needs us to explicitly flag the IRQ as valid
- * and will set them noprobe when we do so. */
-#ifdef CONFIG_ARM
- set_irq_flags(cur_irq, IRQF_VALID);
-#else
- set_irq_noprobe(cur_irq);
-#endif
-
- tabla->irq_masks_cur[BIT_BYTE(i)] |= BYTE_BIT_MASK(i);
- tabla->irq_masks_cache[BIT_BYTE(i)] |= BYTE_BIT_MASK(i);
- tabla->irq_level[BIT_BYTE(i)] |= tabla_irqs[i].level <<
- (i % BITS_PER_BYTE);
- }
- for (i = 0; i < TABLA_NUM_IRQ_REGS; i++) {
- /* Initialize interrupt mask and level registers */
- tabla_reg_write(tabla, TABLA_A_INTR_LEVEL0 + i,
- tabla->irq_level[i]);
- tabla_reg_write(tabla, TABLA_A_INTR_MASK0 + i,
- tabla->irq_masks_cur[i]);
- }
-
- ret = request_threaded_irq(tabla->irq, NULL, tabla_irq_thread,
- IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
- "tabla", tabla);
- if (ret != 0)
- dev_err(tabla->dev, "Failed to request IRQ %d: %d\n",
- tabla->irq, ret);
- else {
- ret = enable_irq_wake(tabla->irq);
- if (ret == 0) {
- ret = device_init_wakeup(tabla->dev, 1);
- if (ret) {
- dev_err(tabla->dev, "Failed to init device"
- "wakeup : %d\n", ret);
- disable_irq_wake(tabla->irq);
- }
- } else
- dev_err(tabla->dev, "Failed to set wake interrupt on"
- " IRQ %d: %d\n", tabla->irq, ret);
- if (ret)
- free_irq(tabla->irq, tabla);
- }
-
- if (ret)
- mutex_destroy(&tabla->irq_lock);
-
- return ret;
-}
-
-void tabla_irq_exit(struct tabla *tabla)
-{
- if (tabla->irq) {
- disable_irq_wake(tabla->irq);
- free_irq(tabla->irq, tabla);
- device_init_wakeup(tabla->dev, 0);
- }
- mutex_destroy(&tabla->irq_lock);
-}
diff --git a/drivers/mfd/wcd9xxx-core.c b/drivers/mfd/wcd9xxx-core.c
new file mode 100644
index 0000000..59a4283
--- /dev/null
+++ b/drivers/mfd/wcd9xxx-core.c
@@ -0,0 +1,1126 @@
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/wcd9xxx/wcd9xxx-slimslave.h>
+#include <linux/mfd/wcd9xxx/core.h>
+#include <linux/mfd/wcd9xxx/pdata.h>
+#include <linux/mfd/wcd9xxx/wcd9xxx_registers.h>
+
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/debugfs.h>
+#include <linux/regulator/consumer.h>
+#include <linux/i2c.h>
+#include <sound/soc.h>
+
+#define WCD9XXX_SLIM_GLA_MAX_RETRIES 5
+#define WCD9XXX_REGISTER_START_OFFSET 0x800
+#define WCD9XXX_SLIM_RW_MAX_TRIES 3
+
+#define MAX_WCD9XXX_DEVICE 4
+#define WCD9XXX_I2C_MODE 0x03
+
+struct wcd9xxx_i2c {
+ struct i2c_client *client;
+ struct i2c_msg xfer_msg[2];
+ struct mutex xfer_lock;
+ int mod_id;
+};
+
+struct wcd9xxx_i2c wcd9xxx_modules[MAX_WCD9XXX_DEVICE];
+static int wcd9xxx_intf;
+
+static int wcd9xxx_read(struct wcd9xxx *wcd9xxx, unsigned short reg,
+ int bytes, void *dest, bool interface_reg)
+{
+ int ret;
+ u8 *buf = dest;
+
+ if (bytes <= 0) {
+ dev_err(wcd9xxx->dev, "Invalid byte read length %d\n", bytes);
+ return -EINVAL;
+ }
+
+ ret = wcd9xxx->read_dev(wcd9xxx, reg, bytes, dest, interface_reg);
+ if (ret < 0) {
+ dev_err(wcd9xxx->dev, "Codec read failed\n");
+ return ret;
+ } else
+ dev_dbg(wcd9xxx->dev, "Read 0x%02x from R%d(0x%x)\n",
+ *buf, reg, reg);
+
+ return 0;
+}
+int wcd9xxx_reg_read(struct wcd9xxx *wcd9xxx, unsigned short reg)
+{
+ u8 val;
+ int ret;
+
+ mutex_lock(&wcd9xxx->io_lock);
+ ret = wcd9xxx_read(wcd9xxx, reg, 1, &val, false);
+ mutex_unlock(&wcd9xxx->io_lock);
+
+ if (ret < 0)
+ return ret;
+ else
+ return val;
+}
+EXPORT_SYMBOL_GPL(wcd9xxx_reg_read);
+
+static int wcd9xxx_write(struct wcd9xxx *wcd9xxx, unsigned short reg,
+ int bytes, void *src, bool interface_reg)
+{
+ u8 *buf = src;
+
+ if (bytes <= 0) {
+ pr_err("%s: Error, invalid write length\n", __func__);
+ return -EINVAL;
+ }
+
+ dev_dbg(wcd9xxx->dev, "Write %02x to R%d(0x%x)\n",
+ *buf, reg, reg);
+
+ return wcd9xxx->write_dev(wcd9xxx, reg, bytes, src, interface_reg);
+}
+
+int wcd9xxx_reg_write(struct wcd9xxx *wcd9xxx, unsigned short reg,
+ u8 val)
+{
+ int ret;
+
+ mutex_lock(&wcd9xxx->io_lock);
+ ret = wcd9xxx_write(wcd9xxx, reg, 1, &val, false);
+ mutex_unlock(&wcd9xxx->io_lock);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(wcd9xxx_reg_write);
+
+static u8 wcd9xxx_pgd_la;
+static u8 wcd9xxx_inf_la;
+
+int wcd9xxx_interface_reg_read(struct wcd9xxx *wcd9xxx, unsigned short reg)
+{
+ u8 val;
+ int ret;
+
+ mutex_lock(&wcd9xxx->io_lock);
+ ret = wcd9xxx_read(wcd9xxx, reg, 1, &val, true);
+ mutex_unlock(&wcd9xxx->io_lock);
+
+ if (ret < 0)
+ return ret;
+ else
+ return val;
+}
+EXPORT_SYMBOL_GPL(wcd9xxx_interface_reg_read);
+
+int wcd9xxx_interface_reg_write(struct wcd9xxx *wcd9xxx, unsigned short reg,
+ u8 val)
+{
+ int ret;
+
+ mutex_lock(&wcd9xxx->io_lock);
+ ret = wcd9xxx_write(wcd9xxx, reg, 1, &val, true);
+ mutex_unlock(&wcd9xxx->io_lock);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(wcd9xxx_interface_reg_write);
+
+int wcd9xxx_bulk_read(struct wcd9xxx *wcd9xxx, unsigned short reg,
+ int count, u8 *buf)
+{
+ int ret;
+
+ mutex_lock(&wcd9xxx->io_lock);
+
+ ret = wcd9xxx_read(wcd9xxx, reg, count, buf, false);
+
+ mutex_unlock(&wcd9xxx->io_lock);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(wcd9xxx_bulk_read);
+
+int wcd9xxx_bulk_write(struct wcd9xxx *wcd9xxx, unsigned short reg,
+ int count, u8 *buf)
+{
+ int ret;
+
+ mutex_lock(&wcd9xxx->io_lock);
+
+ ret = wcd9xxx_write(wcd9xxx, reg, count, buf, false);
+
+ mutex_unlock(&wcd9xxx->io_lock);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(wcd9xxx_bulk_write);
+
+static int wcd9xxx_slim_read_device(struct wcd9xxx *wcd9xxx, unsigned short reg,
+ int bytes, void *dest, bool interface)
+{
+ int ret;
+ struct slim_ele_access msg;
+ int slim_read_tries = WCD9XXX_SLIM_RW_MAX_TRIES;
+ msg.start_offset = WCD9XXX_REGISTER_START_OFFSET + reg;
+ msg.num_bytes = bytes;
+ msg.comp = NULL;
+
+ while (1) {
+ mutex_lock(&wcd9xxx->xfer_lock);
+ ret = slim_request_val_element(interface ?
+ wcd9xxx->slim_slave : wcd9xxx->slim,
+ &msg, dest, bytes);
+ mutex_unlock(&wcd9xxx->xfer_lock);
+ if (likely(ret == 0) || (--slim_read_tries == 0))
+ break;
+ usleep_range(5000, 5000);
+ }
+
+ if (ret)
+ pr_err("%s: Error, Codec read failed (%d)\n", __func__, ret);
+
+ return ret;
+}
+/* Interface specifies whether the write is to the interface or general
+ * registers.
+ */
+static int wcd9xxx_slim_write_device(struct wcd9xxx *wcd9xxx,
+ unsigned short reg, int bytes, void *src, bool interface)
+{
+ int ret;
+ struct slim_ele_access msg;
+ int slim_write_tries = WCD9XXX_SLIM_RW_MAX_TRIES;
+ msg.start_offset = WCD9XXX_REGISTER_START_OFFSET + reg;
+ msg.num_bytes = bytes;
+ msg.comp = NULL;
+
+ while (1) {
+ mutex_lock(&wcd9xxx->xfer_lock);
+ ret = slim_change_val_element(interface ?
+ wcd9xxx->slim_slave : wcd9xxx->slim,
+ &msg, src, bytes);
+ mutex_unlock(&wcd9xxx->xfer_lock);
+ if (likely(ret == 0) || (--slim_write_tries == 0))
+ break;
+ usleep_range(5000, 5000);
+ }
+
+ if (ret)
+ pr_err("%s: Error, Codec write failed (%d)\n", __func__, ret);
+
+ return ret;
+}
+
+static struct mfd_cell tabla1x_devs[] = {
+ {
+ .name = "tabla1x_codec",
+ },
+};
+
+static struct mfd_cell tabla_devs[] = {
+ {
+ .name = "tabla_codec",
+ },
+};
+
+static struct mfd_cell sitar_devs[] = {
+ {
+ .name = "sitar_codec",
+ },
+};
+
+static void wcd9xxx_bring_up(struct wcd9xxx *wcd9xxx)
+{
+ wcd9xxx_reg_write(wcd9xxx, WCD9XXX_A_LEAKAGE_CTL, 0x4);
+ wcd9xxx_reg_write(wcd9xxx, WCD9XXX_A_CDC_CTL, 0);
+ usleep_range(5000, 5000);
+ wcd9xxx_reg_write(wcd9xxx, WCD9XXX_A_CDC_CTL, 3);
+ wcd9xxx_reg_write(wcd9xxx, WCD9XXX_A_LEAKAGE_CTL, 3);
+}
+
+static void wcd9xxx_bring_down(struct wcd9xxx *wcd9xxx)
+{
+ wcd9xxx_reg_write(wcd9xxx, WCD9XXX_A_LEAKAGE_CTL, 0x7);
+ wcd9xxx_reg_write(wcd9xxx, WCD9XXX_A_LEAKAGE_CTL, 0x6);
+ wcd9xxx_reg_write(wcd9xxx, WCD9XXX_A_LEAKAGE_CTL, 0xe);
+ wcd9xxx_reg_write(wcd9xxx, WCD9XXX_A_LEAKAGE_CTL, 0x8);
+}
+
+static int wcd9xxx_reset(struct wcd9xxx *wcd9xxx)
+{
+ int ret;
+
+ if (wcd9xxx->reset_gpio) {
+ ret = gpio_request(wcd9xxx->reset_gpio, "CDC_RESET");
+ if (ret) {
+ pr_err("%s: Failed to request gpio %d\n", __func__,
+ wcd9xxx->reset_gpio);
+ wcd9xxx->reset_gpio = 0;
+ return ret;
+ }
+
+ gpio_direction_output(wcd9xxx->reset_gpio, 1);
+ msleep(20);
+ gpio_direction_output(wcd9xxx->reset_gpio, 0);
+ msleep(20);
+ gpio_direction_output(wcd9xxx->reset_gpio, 1);
+ msleep(20);
+ }
+ return 0;
+}
+
+static void wcd9xxx_free_reset(struct wcd9xxx *wcd9xxx)
+{
+ if (wcd9xxx->reset_gpio) {
+ gpio_free(wcd9xxx->reset_gpio);
+ wcd9xxx->reset_gpio = 0;
+ }
+}
+
+static int wcd9xxx_device_init(struct wcd9xxx *wcd9xxx, int irq)
+{
+ int ret;
+ u8 idbyte_0, idbyte_1, idbyte_2, idbyte_3;
+ struct mfd_cell *wcd9xxx_dev = NULL;
+ int wcd9xxx_dev_size = 0;
+
+ mutex_init(&wcd9xxx->io_lock);
+ mutex_init(&wcd9xxx->xfer_lock);
+
+ mutex_init(&wcd9xxx->pm_lock);
+ wcd9xxx->wlock_holders = 0;
+ wcd9xxx->pm_state = WCD9XXX_PM_SLEEPABLE;
+ init_waitqueue_head(&wcd9xxx->pm_wq);
+ wake_lock_init(&wcd9xxx->wlock, WAKE_LOCK_IDLE, "wcd9310-irq");
+
+ dev_set_drvdata(wcd9xxx->dev, wcd9xxx);
+
+ wcd9xxx_bring_up(wcd9xxx);
+
+ ret = wcd9xxx_irq_init(wcd9xxx);
+ if (ret) {
+ pr_err("IRQ initialization failed\n");
+ goto err;
+ }
+
+ idbyte_0 = wcd9xxx_reg_read(wcd9xxx, WCD9XXX_A_CHIP_ID_BYTE_0);
+ idbyte_1 = wcd9xxx_reg_read(wcd9xxx, WCD9XXX_A_CHIP_ID_BYTE_1);
+ idbyte_2 = wcd9xxx_reg_read(wcd9xxx, WCD9XXX_A_CHIP_ID_BYTE_2);
+ idbyte_3 = wcd9xxx_reg_read(wcd9xxx, WCD9XXX_A_CHIP_ID_BYTE_3);
+
+ wcd9xxx->version = wcd9xxx_reg_read(wcd9xxx,
+ WCD9XXX_A_CHIP_VERSION) & 0x1F;
+ pr_info("%s : Codec version %u initialized\n",
+ __func__, wcd9xxx->version);
+ pr_info("idbyte_0[%08x] idbyte_1[%08x] idbyte_2[%08x] idbyte_3[%08x]\n",
+ idbyte_0, idbyte_1, idbyte_2, idbyte_3);
+
+ if (!strncmp(wcd9xxx->slim->name, "tabla", 5)) {
+ if (TABLA_IS_1_X(wcd9xxx->version)) {
+ wcd9xxx_dev = tabla1x_devs;
+ wcd9xxx_dev_size = ARRAY_SIZE(tabla1x_devs);
+ } else {
+ wcd9xxx_dev = tabla_devs;
+ wcd9xxx_dev_size = ARRAY_SIZE(tabla_devs);
+ }
+ } else {
+ wcd9xxx_dev = sitar_devs;
+ wcd9xxx_dev_size = ARRAY_SIZE(sitar_devs);
+ }
+
+ ret = mfd_add_devices(wcd9xxx->dev, -1,
+ wcd9xxx_dev, wcd9xxx_dev_size,
+ NULL, 0);
+ if (ret != 0) {
+ dev_err(wcd9xxx->dev, "Failed to add children: %d\n", ret);
+ goto err_irq;
+ }
+ return ret;
+err_irq:
+ wcd9xxx_irq_exit(wcd9xxx);
+err:
+ wcd9xxx_bring_down(wcd9xxx);
+ wake_lock_destroy(&wcd9xxx->wlock);
+ mutex_destroy(&wcd9xxx->pm_lock);
+ mutex_destroy(&wcd9xxx->io_lock);
+ mutex_destroy(&wcd9xxx->xfer_lock);
+ return ret;
+}
+
+static void wcd9xxx_device_exit(struct wcd9xxx *wcd9xxx)
+{
+ wcd9xxx_irq_exit(wcd9xxx);
+ wcd9xxx_bring_down(wcd9xxx);
+ wcd9xxx_free_reset(wcd9xxx);
+ mutex_destroy(&wcd9xxx->pm_lock);
+ wake_lock_destroy(&wcd9xxx->wlock);
+ mutex_destroy(&wcd9xxx->io_lock);
+ mutex_destroy(&wcd9xxx->xfer_lock);
+ slim_remove_device(wcd9xxx->slim_slave);
+ kfree(wcd9xxx);
+}
+
+
+#ifdef CONFIG_DEBUG_FS
+struct wcd9xxx *debugCodec;
+
+static struct dentry *debugfs_wcd9xxx_dent;
+static struct dentry *debugfs_peek;
+static struct dentry *debugfs_poke;
+
+static unsigned char read_data;
+
+static int codec_debug_open(struct inode *inode, struct file *file)
+{
+ file->private_data = inode->i_private;
+ return 0;
+}
+
+static int get_parameters(char *buf, long int *param1, int num_of_par)
+{
+ char *token;
+ int base, cnt;
+
+ token = strsep(&buf, " ");
+
+ for (cnt = 0; cnt < num_of_par; cnt++) {
+ if (token != NULL) {
+ if ((token[1] == 'x') || (token[1] == 'X'))
+ base = 16;
+ else
+ base = 10;
+
+ if (strict_strtoul(token, base, ¶m1[cnt]) != 0)
+ return -EINVAL;
+
+ token = strsep(&buf, " ");
+ } else
+ return -EINVAL;
+ }
+ return 0;
+}
+
+static ssize_t codec_debug_read(struct file *file, char __user *ubuf,
+ size_t count, loff_t *ppos)
+{
+ char lbuf[8];
+
+ snprintf(lbuf, sizeof(lbuf), "0x%x\n", read_data);
+ return simple_read_from_buffer(ubuf, count, ppos, lbuf,
+ strnlen(lbuf, 7));
+}
+
+
+static ssize_t codec_debug_write(struct file *filp,
+ const char __user *ubuf, size_t cnt, loff_t *ppos)
+{
+ char *access_str = filp->private_data;
+ char lbuf[32];
+ int rc;
+ long int param[5];
+
+ if (cnt > sizeof(lbuf) - 1)
+ return -EINVAL;
+
+ rc = copy_from_user(lbuf, ubuf, cnt);
+ if (rc)
+ return -EFAULT;
+
+ lbuf[cnt] = '\0';
+
+ if (!strncmp(access_str, "poke", 6)) {
+ /* write */
+ rc = get_parameters(lbuf, param, 2);
+ if ((param[0] <= 0x3FF) && (param[1] <= 0xFF) &&
+ (rc == 0))
+ wcd9xxx_interface_reg_write(debugCodec, param[0],
+ param[1]);
+ else
+ rc = -EINVAL;
+ } else if (!strncmp(access_str, "peek", 6)) {
+ /* read */
+ rc = get_parameters(lbuf, param, 1);
+ if ((param[0] <= 0x3FF) && (rc == 0))
+ read_data = wcd9xxx_interface_reg_read(debugCodec,
+ param[0]);
+ else
+ rc = -EINVAL;
+ }
+
+ if (rc == 0)
+ rc = cnt;
+ else
+ pr_err("%s: rc = %d\n", __func__, rc);
+
+ return rc;
+}
+
+static const struct file_operations codec_debug_ops = {
+ .open = codec_debug_open,
+ .write = codec_debug_write,
+ .read = codec_debug_read
+};
+#endif
+
+static int wcd9xxx_enable_supplies(struct wcd9xxx *wcd9xxx)
+{
+ int ret;
+ int i;
+ struct wcd9xxx_pdata *pdata = wcd9xxx->slim->dev.platform_data;
+
+ wcd9xxx->supplies = kzalloc(sizeof(struct regulator_bulk_data) *
+ ARRAY_SIZE(pdata->regulator),
+ GFP_KERNEL);
+ if (!wcd9xxx->supplies) {
+ ret = -ENOMEM;
+ goto err;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(pdata->regulator); i++)
+ wcd9xxx->supplies[i].supply = pdata->regulator[i].name;
+
+ ret = regulator_bulk_get(wcd9xxx->dev, ARRAY_SIZE(pdata->regulator),
+ wcd9xxx->supplies);
+ if (ret != 0) {
+ dev_err(wcd9xxx->dev, "Failed to get supplies: err = %d\n",
+ ret);
+ goto err_supplies;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(pdata->regulator); i++) {
+ ret = regulator_set_voltage(wcd9xxx->supplies[i].consumer,
+ pdata->regulator[i].min_uV, pdata->regulator[i].max_uV);
+ if (ret) {
+ pr_err("%s: Setting regulator voltage failed for "
+ "regulator %s err = %d\n", __func__,
+ wcd9xxx->supplies[i].supply, ret);
+ goto err_get;
+ }
+
+ ret = regulator_set_optimum_mode(wcd9xxx->supplies[i].consumer,
+ pdata->regulator[i].optimum_uA);
+ if (ret < 0) {
+ pr_err("%s: Setting regulator optimum mode failed for "
+ "regulator %s err = %d\n", __func__,
+ wcd9xxx->supplies[i].supply, ret);
+ goto err_get;
+ }
+ }
+
+ ret = regulator_bulk_enable(ARRAY_SIZE(pdata->regulator),
+ wcd9xxx->supplies);
+ if (ret != 0) {
+ dev_err(wcd9xxx->dev, "Failed to enable supplies: err = %d\n",
+ ret);
+ goto err_configure;
+ }
+ return ret;
+
+err_configure:
+ for (i = 0; i < ARRAY_SIZE(pdata->regulator); i++) {
+ regulator_set_voltage(wcd9xxx->supplies[i].consumer, 0,
+ pdata->regulator[i].max_uV);
+ regulator_set_optimum_mode(wcd9xxx->supplies[i].consumer, 0);
+ }
+err_get:
+ regulator_bulk_free(ARRAY_SIZE(pdata->regulator), wcd9xxx->supplies);
+err_supplies:
+ kfree(wcd9xxx->supplies);
+err:
+ return ret;
+}
+
+static void wcd9xxx_disable_supplies(struct wcd9xxx *wcd9xxx)
+{
+ int i;
+ struct wcd9xxx_pdata *pdata = wcd9xxx->slim->dev.platform_data;
+
+ regulator_bulk_disable(ARRAY_SIZE(pdata->regulator),
+ wcd9xxx->supplies);
+ for (i = 0; i < ARRAY_SIZE(pdata->regulator); i++) {
+ regulator_set_voltage(wcd9xxx->supplies[i].consumer, 0,
+ pdata->regulator[i].max_uV);
+ regulator_set_optimum_mode(wcd9xxx->supplies[i].consumer, 0);
+ }
+ regulator_bulk_free(ARRAY_SIZE(pdata->regulator), wcd9xxx->supplies);
+ kfree(wcd9xxx->supplies);
+}
+
+int wcd9xxx_get_intf_type(void)
+{
+ return wcd9xxx_intf;
+}
+EXPORT_SYMBOL_GPL(wcd9xxx_get_intf_type);
+
+struct wcd9xxx_i2c *get_i2c_wcd9xxx_device_info(u16 reg)
+{
+ u16 mask = 0x0f00;
+ int value = 0;
+ struct wcd9xxx_i2c *wcd9xxx = NULL;
+ value = ((reg & mask) >> 8) & 0x000f;
+ switch (value) {
+ case 0:
+ wcd9xxx = &wcd9xxx_modules[0];
+ break;
+ case 1:
+ wcd9xxx = &wcd9xxx_modules[1];
+ break;
+ case 2:
+ wcd9xxx = &wcd9xxx_modules[2];
+ break;
+ case 3:
+ wcd9xxx = &wcd9xxx_modules[3];
+ break;
+ default:
+ break;
+ }
+ return wcd9xxx;
+}
+
+int wcd9xxx_i2c_write_device(u16 reg, u8 *value,
+ u32 bytes)
+{
+
+ struct i2c_msg *msg;
+ int ret = 0;
+ u8 reg_addr = 0;
+ u8 data[bytes + 1];
+ struct wcd9xxx_i2c *wcd9xxx;
+
+ wcd9xxx = get_i2c_wcd9xxx_device_info(reg);
+ if (wcd9xxx == NULL || wcd9xxx->client == NULL) {
+ pr_err("failed to get device info\n");
+ return -ENODEV;
+ }
+ reg_addr = (u8)reg;
+ msg = &wcd9xxx->xfer_msg[0];
+ msg->addr = wcd9xxx->client->addr;
+ msg->len = bytes + 1;
+ msg->flags = 0;
+ data[0] = reg;
+ data[1] = *value;
+ msg->buf = data;
+ ret = i2c_transfer(wcd9xxx->client->adapter, wcd9xxx->xfer_msg, 1);
+ /* Try again if the write fails */
+ if (ret != 1) {
+ ret = i2c_transfer(wcd9xxx->client->adapter,
+ wcd9xxx->xfer_msg, 1);
+ if (ret != 1) {
+ pr_err("failed to write the device\n");
+ return ret;
+ }
+ }
+ pr_debug("write sucess register = %x val = %x\n", reg, data[1]);
+ return 0;
+}
+
+
+int wcd9xxx_i2c_read_device(unsigned short reg,
+ int bytes, unsigned char *dest)
+{
+ struct i2c_msg *msg;
+ int ret = 0;
+ u8 reg_addr = 0;
+ struct wcd9xxx_i2c *wcd9xxx;
+ u8 i = 0;
+
+ wcd9xxx = get_i2c_wcd9xxx_device_info(reg);
+ if (wcd9xxx == NULL || wcd9xxx->client == NULL) {
+ pr_err("failed to get device info\n");
+ return -ENODEV;
+ }
+ for (i = 0; i < bytes; i++) {
+ reg_addr = (u8)reg++;
+ msg = &wcd9xxx->xfer_msg[0];
+ msg->addr = wcd9xxx->client->addr;
+ msg->len = 1;
+ msg->flags = 0;
+ msg->buf = ®_addr;
+
+ msg = &wcd9xxx->xfer_msg[1];
+ msg->addr = wcd9xxx->client->addr;
+ msg->len = 1;
+ msg->flags = I2C_M_RD;
+ msg->buf = dest++;
+ ret = i2c_transfer(wcd9xxx->client->adapter,
+ wcd9xxx->xfer_msg, 2);
+
+ /* Try again if read fails first time */
+ if (ret != 2) {
+ ret = i2c_transfer(wcd9xxx->client->adapter,
+ wcd9xxx->xfer_msg, 2);
+ if (ret != 2) {
+ pr_err("failed to read wcd9xxx register\n");
+ return ret;
+ }
+ }
+ }
+ return 0;
+}
+
+int wcd9xxx_i2c_read(struct wcd9xxx *wcd9xxx, unsigned short reg,
+ int bytes, void *dest, bool interface_reg)
+{
+ return wcd9xxx_i2c_read_device(reg, bytes, dest);
+}
+
+int wcd9xxx_i2c_write(struct wcd9xxx *wcd9xxx, unsigned short reg,
+ int bytes, void *src, bool interface_reg)
+{
+ return wcd9xxx_i2c_write_device(reg, src, bytes);
+}
+
+static int __devinit wcd9xxx_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct wcd9xxx *wcd9xxx;
+ struct wcd9xxx_pdata *pdata = client->dev.platform_data;
+ int val = 0;
+ int ret = 0;
+ static int device_id;
+
+ if (device_id > 0) {
+ wcd9xxx_modules[device_id++].client = client;
+ pr_info("probe for other slaves devices of tabla\n");
+ return ret;
+ }
+
+ wcd9xxx = kzalloc(sizeof(struct wcd9xxx), GFP_KERNEL);
+ if (wcd9xxx == NULL) {
+ pr_err("%s: error, allocation failed\n", __func__);
+ ret = -ENOMEM;
+ goto fail;
+ }
+
+ if (!pdata) {
+ dev_dbg(&client->dev, "no platform data?\n");
+ ret = -EINVAL;
+ goto fail;
+ }
+ if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) {
+ dev_dbg(&client->dev, "can't talk I2C?\n");
+ ret = -EIO;
+ goto fail;
+ }
+ dev_set_drvdata(&client->dev, wcd9xxx);
+ wcd9xxx->dev = &client->dev;
+ wcd9xxx->reset_gpio = pdata->reset_gpio;
+
+ ret = wcd9xxx_enable_supplies(wcd9xxx);
+ if (ret) {
+ pr_err("%s: Fail to enable Codec supplies\n", __func__);
+ goto err_codec;
+ }
+
+ usleep_range(5, 5);
+ ret = wcd9xxx_reset(wcd9xxx);
+ if (ret) {
+ pr_err("%s: Resetting Codec failed\n", __func__);
+ goto err_supplies;
+ }
+ wcd9xxx_modules[device_id++].client = client;
+
+ wcd9xxx->read_dev = wcd9xxx_i2c_read;
+ wcd9xxx->write_dev = wcd9xxx_i2c_write;
+ wcd9xxx->irq = pdata->irq;
+ wcd9xxx->irq_base = pdata->irq_base;
+
+ /*read the tabla status before initializing the device type*/
+ ret = wcd9xxx_read(wcd9xxx, WCD9XXX_A_CHIP_STATUS, 1, &val, 0);
+ if ((ret < 0) || (val != WCD9XXX_I2C_MODE)) {
+ pr_err("failed to read the wcd9xxx status\n");
+ goto err_device_init;
+ }
+
+ ret = wcd9xxx_device_init(wcd9xxx, wcd9xxx->irq);
+ if (ret) {
+ pr_err("%s: error, initializing device failed\n", __func__);
+ goto err_device_init;
+ }
+ wcd9xxx_intf = WCD9XXX_INTERFACE_TYPE_I2C;
+
+ return ret;
+err_device_init:
+ wcd9xxx_free_reset(wcd9xxx);
+err_supplies:
+ wcd9xxx_disable_supplies(wcd9xxx);
+err_codec:
+ kfree(wcd9xxx);
+fail:
+ return ret;
+}
+
+static int __devexit wcd9xxx_i2c_remove(struct i2c_client *client)
+{
+ struct wcd9xxx *wcd9xxx;
+
+ pr_debug("exit\n");
+ wcd9xxx = dev_get_drvdata(&client->dev);
+ wcd9xxx_disable_supplies(wcd9xxx);
+ wcd9xxx_device_exit(wcd9xxx);
+ return 0;
+}
+
+static int wcd9xxx_slim_probe(struct slim_device *slim)
+{
+ struct wcd9xxx *wcd9xxx;
+ struct wcd9xxx_pdata *pdata;
+ int ret = 0;
+ int sgla_retry_cnt;
+
+ dev_info(&slim->dev, "Initialized slim device %s\n", slim->name);
+ pdata = slim->dev.platform_data;
+
+ if (!pdata) {
+ dev_err(&slim->dev, "Error, no platform data\n");
+ ret = -EINVAL;
+ goto err;
+ }
+
+ wcd9xxx = kzalloc(sizeof(struct wcd9xxx), GFP_KERNEL);
+ if (wcd9xxx == NULL) {
+ pr_err("%s: error, allocation failed\n", __func__);
+ ret = -ENOMEM;
+ goto err;
+ }
+ if (!slim->ctrl) {
+ pr_err("Error, no SLIMBUS control data\n");
+ ret = -EINVAL;
+ goto err_codec;
+ }
+ wcd9xxx->slim = slim;
+ slim_set_clientdata(slim, wcd9xxx);
+ wcd9xxx->reset_gpio = pdata->reset_gpio;
+ wcd9xxx->dev = &slim->dev;
+
+ ret = wcd9xxx_enable_supplies(wcd9xxx);
+ if (ret)
+ goto err_codec;
+ usleep_range(5, 5);
+
+ ret = wcd9xxx_reset(wcd9xxx);
+ if (ret) {
+ pr_err("%s: Resetting Codec failed\n", __func__);
+ goto err_supplies;
+ }
+
+ ret = slim_get_logical_addr(wcd9xxx->slim, wcd9xxx->slim->e_addr,
+ ARRAY_SIZE(wcd9xxx->slim->e_addr), &wcd9xxx->slim->laddr);
+ if (ret) {
+ pr_err("fail to get slimbus logical address %d\n", ret);
+ goto err_reset;
+ }
+ wcd9xxx->read_dev = wcd9xxx_slim_read_device;
+ wcd9xxx->write_dev = wcd9xxx_slim_write_device;
+ wcd9xxx->irq = pdata->irq;
+ wcd9xxx->irq_base = pdata->irq_base;
+ wcd9xxx_pgd_la = wcd9xxx->slim->laddr;
+
+ if (pdata->num_irqs < TABLA_NUM_IRQS) {
+ pr_err("%s: Error, not enough interrupt lines allocated\n",
+ __func__);
+ goto err_reset;
+ }
+
+ wcd9xxx->slim_slave = &pdata->slimbus_slave_device;
+
+ ret = slim_add_device(slim->ctrl, wcd9xxx->slim_slave);
+ if (ret) {
+ pr_err("%s: error, adding SLIMBUS device failed\n", __func__);
+ goto err_reset;
+ }
+
+ sgla_retry_cnt = 0;
+
+ while (1) {
+ ret = slim_get_logical_addr(wcd9xxx->slim_slave,
+ wcd9xxx->slim_slave->e_addr,
+ ARRAY_SIZE(wcd9xxx->slim_slave->e_addr),
+ &wcd9xxx->slim_slave->laddr);
+ if (ret) {
+ if (sgla_retry_cnt++ < WCD9XXX_SLIM_GLA_MAX_RETRIES) {
+ /* Give SLIMBUS slave time to report present
+ and be ready.
+ */
+ usleep_range(1000, 1000);
+ pr_debug("%s: retry slim_get_logical_addr()\n",
+ __func__);
+ continue;
+ }
+ pr_err("fail to get slimbus slave logical address"
+ " %d\n", ret);
+ goto err_slim_add;
+ }
+ break;
+ }
+ wcd9xxx_inf_la = wcd9xxx->slim_slave->laddr;
+ wcd9xxx_intf = WCD9XXX_INTERFACE_TYPE_SLIMBUS;
+
+ ret = wcd9xxx_device_init(wcd9xxx, wcd9xxx->irq);
+ if (ret) {
+ pr_err("%s: error, initializing device failed\n", __func__);
+ goto err_slim_add;
+ }
+ wcd9xxx_init_slimslave(wcd9xxx, wcd9xxx_pgd_la);
+#ifdef CONFIG_DEBUG_FS
+ debugCodec = wcd9xxx;
+
+ debugfs_wcd9xxx_dent = debugfs_create_dir
+ ("wcd9310_slimbus_interface_device", 0);
+ if (!IS_ERR(debugfs_wcd9xxx_dent)) {
+ debugfs_peek = debugfs_create_file("peek",
+ S_IFREG | S_IRUGO, debugfs_wcd9xxx_dent,
+ (void *) "peek", &codec_debug_ops);
+
+ debugfs_poke = debugfs_create_file("poke",
+ S_IFREG | S_IRUGO, debugfs_wcd9xxx_dent,
+ (void *) "poke", &codec_debug_ops);
+ }
+#endif
+
+ return ret;
+
+err_slim_add:
+ slim_remove_device(wcd9xxx->slim_slave);
+err_reset:
+ wcd9xxx_free_reset(wcd9xxx);
+err_supplies:
+ wcd9xxx_disable_supplies(wcd9xxx);
+err_codec:
+ kfree(wcd9xxx);
+err:
+ return ret;
+}
+static int wcd9xxx_slim_remove(struct slim_device *pdev)
+{
+ struct wcd9xxx *wcd9xxx;
+
+#ifdef CONFIG_DEBUG_FS
+ debugfs_remove(debugfs_peek);
+ debugfs_remove(debugfs_poke);
+ debugfs_remove(debugfs_wcd9xxx_dent);
+#endif
+ wcd9xxx = slim_get_devicedata(pdev);
+ wcd9xxx_deinit_slimslave(wcd9xxx);
+ slim_remove_device(wcd9xxx->slim_slave);
+ wcd9xxx_disable_supplies(wcd9xxx);
+ wcd9xxx_device_exit(wcd9xxx);
+ return 0;
+}
+
+static int wcd9xxx_resume(struct wcd9xxx *wcd9xxx)
+{
+ int ret = 0;
+
+ pr_debug("%s: enter\n", __func__);
+ mutex_lock(&wcd9xxx->pm_lock);
+ if (wcd9xxx->pm_state == WCD9XXX_PM_ASLEEP) {
+ pr_debug("%s: resuming system, state %d, wlock %d\n", __func__,
+ wcd9xxx->pm_state, wcd9xxx->wlock_holders);
+ wcd9xxx->pm_state = WCD9XXX_PM_SLEEPABLE;
+ } else {
+ pr_warn("%s: system is already awake, state %d wlock %d\n",
+ __func__, wcd9xxx->pm_state, wcd9xxx->wlock_holders);
+ }
+ mutex_unlock(&wcd9xxx->pm_lock);
+ wake_up_all(&wcd9xxx->pm_wq);
+
+ return ret;
+}
+
+static int wcd9xxx_slim_resume(struct slim_device *sldev)
+{
+ struct wcd9xxx *wcd9xxx = slim_get_devicedata(sldev);
+ return wcd9xxx_resume(wcd9xxx);
+}
+
+static int wcd9xxx_i2c_resume(struct i2c_client *i2cdev)
+{
+ struct wcd9xxx *wcd9xxx = dev_get_drvdata(&i2cdev->dev);
+ if (wcd9xxx)
+ return wcd9xxx_resume(wcd9xxx);
+ else
+ return 0;
+}
+
+static int wcd9xxx_suspend(struct wcd9xxx *wcd9xxx, pm_message_t pmesg)
+{
+ int ret = 0;
+
+ pr_debug("%s: enter\n", __func__);
+ /* wake_lock() can be called after this suspend chain call started.
+ * thus suspend can be called while wlock is being held */
+ mutex_lock(&wcd9xxx->pm_lock);
+ if (wcd9xxx->pm_state == WCD9XXX_PM_SLEEPABLE) {
+ pr_debug("%s: suspending system, state %d, wlock %d\n",
+ __func__, wcd9xxx->pm_state, wcd9xxx->wlock_holders);
+ wcd9xxx->pm_state = WCD9XXX_PM_ASLEEP;
+ } else if (wcd9xxx->pm_state == WCD9XXX_PM_AWAKE) {
+ /* unlock to wait for pm_state == WCD9XXX_PM_SLEEPABLE
+ * then set to WCD9XXX_PM_ASLEEP */
+ pr_debug("%s: waiting to suspend system, state %d, wlock %d\n",
+ __func__, wcd9xxx->pm_state, wcd9xxx->wlock_holders);
+ mutex_unlock(&wcd9xxx->pm_lock);
+ if (!(wait_event_timeout(wcd9xxx->pm_wq,
+ wcd9xxx_pm_cmpxchg(wcd9xxx,
+ WCD9XXX_PM_SLEEPABLE,
+ WCD9XXX_PM_ASLEEP) ==
+ WCD9XXX_PM_SLEEPABLE,
+ HZ))) {
+ pr_debug("%s: suspend failed state %d, wlock %d\n",
+ __func__, wcd9xxx->pm_state,
+ wcd9xxx->wlock_holders);
+ ret = -EBUSY;
+ } else {
+ pr_debug("%s: done, state %d, wlock %d\n", __func__,
+ wcd9xxx->pm_state, wcd9xxx->wlock_holders);
+ }
+ mutex_lock(&wcd9xxx->pm_lock);
+ } else if (wcd9xxx->pm_state == WCD9XXX_PM_ASLEEP) {
+ pr_warn("%s: system is already suspended, state %d, wlock %dn",
+ __func__, wcd9xxx->pm_state, wcd9xxx->wlock_holders);
+ }
+ mutex_unlock(&wcd9xxx->pm_lock);
+
+ return ret;
+}
+
+static int wcd9xxx_slim_suspend(struct slim_device *sldev, pm_message_t pmesg)
+{
+ struct wcd9xxx *wcd9xxx = slim_get_devicedata(sldev);
+ return wcd9xxx_suspend(wcd9xxx, pmesg);
+}
+
+static int wcd9xxx_i2c_suspend(struct i2c_client *i2cdev, pm_message_t pmesg)
+{
+ struct wcd9xxx *wcd9xxx = dev_get_drvdata(&i2cdev->dev);
+ if (wcd9xxx)
+ return wcd9xxx_suspend(wcd9xxx, pmesg);
+ else
+ return 0;
+}
+
+static const struct slim_device_id sitar_slimtest_id[] = {
+ {"sitar-slim", 0},
+ {}
+};
+static struct slim_driver sitar_slim_driver = {
+ .driver = {
+ .name = "sitar-slim",
+ .owner = THIS_MODULE,
+ },
+ .probe = wcd9xxx_slim_probe,
+ .remove = wcd9xxx_slim_remove,
+ .id_table = sitar_slimtest_id,
+ .resume = wcd9xxx_slim_resume,
+ .suspend = wcd9xxx_slim_suspend,
+};
+
+static const struct slim_device_id slimtest_id[] = {
+ {"tabla-slim", 0},
+ {}
+};
+
+static struct slim_driver tabla_slim_driver = {
+ .driver = {
+ .name = "tabla-slim",
+ .owner = THIS_MODULE,
+ },
+ .probe = wcd9xxx_slim_probe,
+ .remove = wcd9xxx_slim_remove,
+ .id_table = slimtest_id,
+ .resume = wcd9xxx_slim_resume,
+ .suspend = wcd9xxx_slim_suspend,
+};
+
+static const struct slim_device_id slimtest2x_id[] = {
+ {"tabla2x-slim", 0},
+ {}
+};
+
+static struct slim_driver tabla2x_slim_driver = {
+ .driver = {
+ .name = "tabla2x-slim",
+ .owner = THIS_MODULE,
+ },
+ .probe = wcd9xxx_slim_probe,
+ .remove = wcd9xxx_slim_remove,
+ .id_table = slimtest2x_id,
+ .resume = wcd9xxx_slim_resume,
+ .suspend = wcd9xxx_slim_suspend,
+};
+
+#define TABLA_I2C_TOP_LEVEL 0
+#define TABLA_I2C_ANALOG 1
+#define TABLA_I2C_DIGITAL_1 2
+#define TABLA_I2C_DIGITAL_2 3
+
+static struct i2c_device_id tabla_id_table[] = {
+ {"tabla top level", TABLA_I2C_TOP_LEVEL},
+ {"tabla analog", TABLA_I2C_TOP_LEVEL},
+ {"tabla digital1", TABLA_I2C_TOP_LEVEL},
+ {"tabla digital2", TABLA_I2C_TOP_LEVEL},
+ {}
+};
+MODULE_DEVICE_TABLE(i2c, tabla_id_table);
+
+static struct i2c_driver tabla_i2c_driver = {
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = "tabla-i2c-core",
+ },
+ .id_table = tabla_id_table,
+ .probe = wcd9xxx_i2c_probe,
+ .remove = __devexit_p(wcd9xxx_i2c_remove),
+ .resume = wcd9xxx_i2c_resume,
+ .suspend = wcd9xxx_i2c_suspend,
+};
+
+static int __init wcd9xxx_init(void)
+{
+ int ret1, ret2, ret3, ret4;
+
+ ret1 = slim_driver_register(&tabla_slim_driver);
+ if (ret1 != 0)
+ pr_err("Failed to register tabla SB driver: %d\n", ret1);
+
+ ret2 = slim_driver_register(&tabla2x_slim_driver);
+ if (ret2 != 0)
+ pr_err("Failed to register tabla2x SB driver: %d\n", ret2);
+
+ ret3 = i2c_add_driver(&tabla_i2c_driver);
+ if (ret3 != 0)
+ pr_err("failed to add the I2C driver\n");
+
+ ret4 = slim_driver_register(&sitar_slim_driver);
+ if (ret1 != 0)
+ pr_err("Failed to register sitar SB driver: %d\n", ret4);
+
+ return (ret1 && ret2 && ret3 && ret4) ? -1 : 0;
+}
+module_init(wcd9xxx_init);
+
+static void __exit wcd9xxx_exit(void)
+{
+}
+module_exit(wcd9xxx_exit);
+
+MODULE_DESCRIPTION("Codec core driver");
+MODULE_VERSION("1.0");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/mfd/wcd9xxx-irq.c b/drivers/mfd/wcd9xxx-irq.c
new file mode 100644
index 0000000..86c01ee
--- /dev/null
+++ b/drivers/mfd/wcd9xxx-irq.c
@@ -0,0 +1,286 @@
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include <linux/bitops.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/irq.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/wcd9xxx/core.h>
+#include <linux/mfd/wcd9xxx/wcd9xxx_registers.h>
+#include <linux/mfd/wcd9xxx/wcd9310_registers.h>
+#include <linux/interrupt.h>
+
+#define BYTE_BIT_MASK(nr) (1UL << ((nr) % BITS_PER_BYTE))
+#define BIT_BYTE(nr) ((nr) / BITS_PER_BYTE)
+
+struct wcd9xxx_irq {
+ bool level;
+};
+
+static struct wcd9xxx_irq wcd9xxx_irqs[TABLA_NUM_IRQS] = {
+ [0] = { .level = 1},
+/* All other wcd9xxx interrupts are edge triggered */
+};
+
+static inline int irq_to_wcd9xxx_irq(struct wcd9xxx *wcd9xxx, int irq)
+{
+ return irq - wcd9xxx->irq_base;
+}
+
+static void wcd9xxx_irq_lock(struct irq_data *data)
+{
+ struct wcd9xxx *wcd9xxx = irq_data_get_irq_chip_data(data);
+ mutex_lock(&wcd9xxx->irq_lock);
+}
+
+static void wcd9xxx_irq_sync_unlock(struct irq_data *data)
+{
+ struct wcd9xxx *wcd9xxx = irq_data_get_irq_chip_data(data);
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(wcd9xxx->irq_masks_cur); i++) {
+ /* If there's been a change in the mask write it back
+ * to the hardware.
+ */
+ if (wcd9xxx->irq_masks_cur[i] != wcd9xxx->irq_masks_cache[i]) {
+ wcd9xxx->irq_masks_cache[i] = wcd9xxx->irq_masks_cur[i];
+ wcd9xxx_reg_write(wcd9xxx, TABLA_A_INTR_MASK0+i,
+ wcd9xxx->irq_masks_cur[i]);
+ }
+ }
+
+ mutex_unlock(&wcd9xxx->irq_lock);
+}
+
+static void wcd9xxx_irq_enable(struct irq_data *data)
+{
+ struct wcd9xxx *wcd9xxx = irq_data_get_irq_chip_data(data);
+ int wcd9xxx_irq = irq_to_wcd9xxx_irq(wcd9xxx, data->irq);
+ wcd9xxx->irq_masks_cur[BIT_BYTE(wcd9xxx_irq)] &=
+ ~(BYTE_BIT_MASK(wcd9xxx_irq));
+}
+
+static void wcd9xxx_irq_disable(struct irq_data *data)
+{
+ struct wcd9xxx *wcd9xxx = irq_data_get_irq_chip_data(data);
+ int wcd9xxx_irq = irq_to_wcd9xxx_irq(wcd9xxx, data->irq);
+ wcd9xxx->irq_masks_cur[BIT_BYTE(wcd9xxx_irq)]
+ |= BYTE_BIT_MASK(wcd9xxx_irq);
+}
+
+static struct irq_chip wcd9xxx_irq_chip = {
+ .name = "wcd9xxx",
+ .irq_bus_lock = wcd9xxx_irq_lock,
+ .irq_bus_sync_unlock = wcd9xxx_irq_sync_unlock,
+ .irq_disable = wcd9xxx_irq_disable,
+ .irq_enable = wcd9xxx_irq_enable,
+};
+
+enum wcd9xxx_pm_state wcd9xxx_pm_cmpxchg(struct wcd9xxx *wcd9xxx,
+ enum wcd9xxx_pm_state o,
+ enum wcd9xxx_pm_state n)
+{
+ enum wcd9xxx_pm_state old;
+ mutex_lock(&wcd9xxx->pm_lock);
+ old = wcd9xxx->pm_state;
+ if (old == o)
+ wcd9xxx->pm_state = n;
+ mutex_unlock(&wcd9xxx->pm_lock);
+ return old;
+}
+EXPORT_SYMBOL_GPL(wcd9xxx_pm_cmpxchg);
+
+void wcd9xxx_lock_sleep(struct wcd9xxx *wcd9xxx)
+{
+ enum wcd9xxx_pm_state os;
+
+ /* wcd9xxx_{lock/unlock}_sleep will be called by wcd9xxx_irq_thread
+ * and its subroutines only motly.
+ * but btn0_lpress_fn is not wcd9xxx_irq_thread's subroutine and
+ * it can race with wcd9xxx_irq_thread.
+ * so need to embrace wlock_holders with mutex.
+ */
+ mutex_lock(&wcd9xxx->pm_lock);
+ if (wcd9xxx->wlock_holders++ == 0)
+ wake_lock(&wcd9xxx->wlock);
+ mutex_unlock(&wcd9xxx->pm_lock);
+ while (!wait_event_timeout(wcd9xxx->pm_wq,
+ ((os = wcd9xxx_pm_cmpxchg(wcd9xxx, WCD9XXX_PM_SLEEPABLE,
+ WCD9XXX_PM_AWAKE)) ==
+ WCD9XXX_PM_SLEEPABLE ||
+ (os == WCD9XXX_PM_AWAKE)),
+ 5 * HZ)) {
+ pr_err("%s: system didn't resume within 5000ms, state %d, "
+ "wlock %d\n", __func__, wcd9xxx->pm_state,
+ wcd9xxx->wlock_holders);
+ WARN_ON_ONCE(1);
+ }
+ wake_up_all(&wcd9xxx->pm_wq);
+}
+EXPORT_SYMBOL_GPL(wcd9xxx_lock_sleep);
+
+void wcd9xxx_unlock_sleep(struct wcd9xxx *wcd9xxx)
+{
+ mutex_lock(&wcd9xxx->pm_lock);
+ if (--wcd9xxx->wlock_holders == 0) {
+ wcd9xxx->pm_state = WCD9XXX_PM_SLEEPABLE;
+ wake_unlock(&wcd9xxx->wlock);
+ }
+ mutex_unlock(&wcd9xxx->pm_lock);
+ wake_up_all(&wcd9xxx->pm_wq);
+}
+EXPORT_SYMBOL_GPL(wcd9xxx_unlock_sleep);
+
+static irqreturn_t wcd9xxx_irq_thread(int irq, void *data)
+{
+ int ret;
+ struct wcd9xxx *wcd9xxx = data;
+ u8 status[WCD9XXX_NUM_IRQ_REGS];
+ unsigned int i;
+
+ wcd9xxx_lock_sleep(wcd9xxx);
+ ret = wcd9xxx_bulk_read(wcd9xxx, TABLA_A_INTR_STATUS0,
+ WCD9XXX_NUM_IRQ_REGS, status);
+ if (ret < 0) {
+ dev_err(wcd9xxx->dev, "Failed to read interrupt status: %d\n",
+ ret);
+ wcd9xxx_unlock_sleep(wcd9xxx);
+ return IRQ_NONE;
+ }
+ /* Apply masking */
+ for (i = 0; i < WCD9XXX_NUM_IRQ_REGS; i++)
+ status[i] &= ~wcd9xxx->irq_masks_cur[i];
+
+ /* Find out which interrupt was triggered and call that interrupt's
+ * handler function
+ */
+ for (i = 0; i < TABLA_NUM_IRQS; i++) {
+ if (status[BIT_BYTE(i)] & BYTE_BIT_MASK(i)) {
+ if ((i <= TABLA_IRQ_MBHC_INSERTION) &&
+ (i >= TABLA_IRQ_MBHC_REMOVAL)) {
+ wcd9xxx_reg_write(wcd9xxx, TABLA_A_INTR_CLEAR0 +
+ BIT_BYTE(i), BYTE_BIT_MASK(i));
+ if (wcd9xxx_get_intf_type() ==
+ WCD9XXX_INTERFACE_TYPE_I2C)
+ wcd9xxx_reg_write(wcd9xxx,
+ TABLA_A_INTR_MODE, 0x02);
+ handle_nested_irq(wcd9xxx->irq_base + i);
+ } else {
+ handle_nested_irq(wcd9xxx->irq_base + i);
+ wcd9xxx_reg_write(wcd9xxx, TABLA_A_INTR_CLEAR0 +
+ BIT_BYTE(i), BYTE_BIT_MASK(i));
+ if (wcd9xxx_get_intf_type() ==
+ WCD9XXX_INTERFACE_TYPE_I2C)
+ wcd9xxx_reg_write(wcd9xxx,
+ TABLA_A_INTR_MODE, 0x02);
+ }
+ break;
+ }
+ }
+ wcd9xxx_unlock_sleep(wcd9xxx);
+
+ return IRQ_HANDLED;
+}
+
+int wcd9xxx_irq_init(struct wcd9xxx *wcd9xxx)
+{
+ int ret;
+ unsigned int i, cur_irq;
+
+ mutex_init(&wcd9xxx->irq_lock);
+
+ if (!wcd9xxx->irq) {
+ dev_warn(wcd9xxx->dev,
+ "No interrupt specified, no interrupts\n");
+ wcd9xxx->irq_base = 0;
+ return 0;
+ }
+
+ if (!wcd9xxx->irq_base) {
+ dev_err(wcd9xxx->dev,
+ "No interrupt base specified, no interrupts\n");
+ return 0;
+ }
+ /* Mask the individual interrupt sources */
+ for (i = 0, cur_irq = wcd9xxx->irq_base; i < TABLA_NUM_IRQS; i++,
+ cur_irq++) {
+
+ irq_set_chip_data(cur_irq, wcd9xxx);
+
+ if (wcd9xxx_irqs[i].level)
+ irq_set_chip_and_handler(cur_irq, &wcd9xxx_irq_chip,
+ handle_level_irq);
+ else
+ irq_set_chip_and_handler(cur_irq, &wcd9xxx_irq_chip,
+ handle_edge_irq);
+
+ irq_set_nested_thread(cur_irq, 1);
+
+ /* ARM needs us to explicitly flag the IRQ as valid
+ * and will set them noprobe when we do so. */
+#ifdef CONFIG_ARM
+ set_irq_flags(cur_irq, IRQF_VALID);
+#else
+ set_irq_noprobe(cur_irq);
+#endif
+
+ wcd9xxx->irq_masks_cur[BIT_BYTE(i)] |= BYTE_BIT_MASK(i);
+ wcd9xxx->irq_masks_cache[BIT_BYTE(i)] |= BYTE_BIT_MASK(i);
+ wcd9xxx->irq_level[BIT_BYTE(i)] |= wcd9xxx_irqs[i].level <<
+ (i % BITS_PER_BYTE);
+ }
+ for (i = 0; i < WCD9XXX_NUM_IRQ_REGS; i++) {
+ /* Initialize interrupt mask and level registers */
+ wcd9xxx_reg_write(wcd9xxx, TABLA_A_INTR_LEVEL0 + i,
+ wcd9xxx->irq_level[i]);
+ wcd9xxx_reg_write(wcd9xxx, TABLA_A_INTR_MASK0 + i,
+ wcd9xxx->irq_masks_cur[i]);
+ }
+
+ ret = request_threaded_irq(wcd9xxx->irq, NULL, wcd9xxx_irq_thread,
+ IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
+ "wcd9xxx", wcd9xxx);
+ if (ret != 0)
+ dev_err(wcd9xxx->dev, "Failed to request IRQ %d: %d\n",
+ wcd9xxx->irq, ret);
+ else {
+ ret = enable_irq_wake(wcd9xxx->irq);
+ if (ret == 0) {
+ ret = device_init_wakeup(wcd9xxx->dev, 1);
+ if (ret) {
+ dev_err(wcd9xxx->dev, "Failed to init device"
+ "wakeup : %d\n", ret);
+ disable_irq_wake(wcd9xxx->irq);
+ }
+ } else
+ dev_err(wcd9xxx->dev, "Failed to set wake interrupt on"
+ " IRQ %d: %d\n", wcd9xxx->irq, ret);
+ if (ret)
+ free_irq(wcd9xxx->irq, wcd9xxx);
+ }
+
+ if (ret)
+ mutex_destroy(&wcd9xxx->irq_lock);
+
+ return ret;
+}
+
+void wcd9xxx_irq_exit(struct wcd9xxx *wcd9xxx)
+{
+ if (wcd9xxx->irq) {
+ disable_irq_wake(wcd9xxx->irq);
+ free_irq(wcd9xxx->irq, wcd9xxx);
+ device_init_wakeup(wcd9xxx->dev, 0);
+ }
+ mutex_destroy(&wcd9xxx->irq_lock);
+}
diff --git a/drivers/mfd/wcd9310-slimslave.c b/drivers/mfd/wcd9xxx-slimslave.c
similarity index 71%
rename from drivers/mfd/wcd9310-slimslave.c
rename to drivers/mfd/wcd9xxx-slimslave.c
index dd586fa..acef55e 100644
--- a/drivers/mfd/wcd9310-slimslave.c
+++ b/drivers/mfd/wcd9xxx-slimslave.c
@@ -11,45 +11,47 @@
*/
#include <linux/slab.h>
#include <linux/mutex.h>
-#include <linux/mfd/wcd9310/wcd9310-slimslave.h>
+#include <linux/mfd/wcd9xxx/wcd9xxx-slimslave.h>
-struct tabla_slim_sch_rx {
+struct wcd9xxx_slim_sch_rx {
u32 sph;
u32 ch_num;
u16 ch_h;
u16 grph;
};
-struct tabla_slim_sch_tx {
+struct wcd9xxx_slim_sch_tx {
u32 sph;
u32 ch_num;
u16 ch_h;
u16 grph;
};
-struct tabla_slim_sch {
- struct tabla_slim_sch_rx rx[SLIM_MAX_RX_PORTS];
- struct tabla_slim_sch_tx tx[SLIM_MAX_TX_PORTS];
+struct wcd9xxx_slim_sch {
+ struct wcd9xxx_slim_sch_rx rx[SLIM_MAX_RX_PORTS];
+ struct wcd9xxx_slim_sch_tx tx[SLIM_MAX_TX_PORTS];
};
-static struct tabla_slim_sch sh_ch;
+static struct wcd9xxx_slim_sch sh_ch;
-static int tabla_alloc_slim_sh_ch_rx(struct tabla *tabla, u8 tabla_pgd_la);
-static int tabla_alloc_slim_sh_ch_tx(struct tabla *tabla, u8 tabla_pgd_la);
-static int tabla_dealloc_slim_sh_ch_rx(struct tabla *tab);
-static int tabla_dealloc_slim_sh_ch_tx(struct tabla *tab);
+static int wcd9xxx_alloc_slim_sh_ch_rx(struct wcd9xxx *wcd9xxx,
+ u8 wcd9xxx_pgd_la);
+static int wcd9xxx_alloc_slim_sh_ch_tx(struct wcd9xxx *wcd9xxx,
+ u8 wcd9xxx_pgd_la);
+static int wcd9xxx_dealloc_slim_sh_ch_rx(struct wcd9xxx *wcd9xxx);
+static int wcd9xxx_dealloc_slim_sh_ch_tx(struct wcd9xxx *wcd9xxx);
-int tabla_init_slimslave(struct tabla *tabla, u8 tabla_pgd_la)
+int wcd9xxx_init_slimslave(struct wcd9xxx *wcd9xxx, u8 wcd9xxx_pgd_la)
{
int ret = 0;
- ret = tabla_alloc_slim_sh_ch_rx(tabla, tabla_pgd_la);
+ ret = wcd9xxx_alloc_slim_sh_ch_rx(wcd9xxx, wcd9xxx_pgd_la);
if (ret) {
pr_err("%s: Failed to alloc rx slimbus shared channels\n",
__func__);
goto rx_err;
}
- ret = tabla_alloc_slim_sh_ch_tx(tabla, tabla_pgd_la);
+ ret = wcd9xxx_alloc_slim_sh_ch_tx(wcd9xxx, wcd9xxx_pgd_la);
if (ret) {
pr_err("%s: Failed to alloc tx slimbus shared channels\n",
__func__);
@@ -57,21 +59,21 @@
}
return 0;
tx_err:
- tabla_dealloc_slim_sh_ch_rx(tabla);
+ wcd9xxx_dealloc_slim_sh_ch_rx(wcd9xxx);
rx_err:
return ret;
}
-int tabla_deinit_slimslave(struct tabla *tabla)
+int wcd9xxx_deinit_slimslave(struct wcd9xxx *wcd9xxx)
{
int ret = 0;
- ret = tabla_dealloc_slim_sh_ch_rx(tabla);
+ ret = wcd9xxx_dealloc_slim_sh_ch_rx(wcd9xxx);
if (ret < 0) {
pr_err("%s: fail to dealloc rx slim ports\n", __func__);
goto err;
}
- ret = tabla_dealloc_slim_sh_ch_tx(tabla);
+ ret = wcd9xxx_dealloc_slim_sh_ch_tx(wcd9xxx);
if (ret < 0) {
pr_err("%s: fail to dealloc tx slim ports\n", __func__);
goto err;
@@ -80,13 +82,13 @@
return ret;
}
-int tabla_get_channel(struct tabla *tabla,
+int wcd9xxx_get_channel(struct wcd9xxx *wcd9xxx,
unsigned int *rx_ch,
unsigned int *tx_ch)
{
int ch_idx = 0;
- struct tabla_slim_sch_rx *rx = sh_ch.rx;
- struct tabla_slim_sch_tx *tx = sh_ch.tx;
+ struct wcd9xxx_slim_sch_rx *rx = sh_ch.rx;
+ struct wcd9xxx_slim_sch_tx *tx = sh_ch.tx;
for (ch_idx = 0; ch_idx < SLIM_MAX_RX_PORTS; ch_idx++)
rx_ch[ch_idx] = rx[ch_idx].ch_num;
@@ -95,23 +97,23 @@
return 0;
}
-static int tabla_alloc_slim_sh_ch_rx(struct tabla *tabla, u8 tabla_pgd_la)
+static int wcd9xxx_alloc_slim_sh_ch_rx(struct wcd9xxx *wcd9xxx,
+ u8 wcd9xxx_pgd_la)
{
int ret = 0;
u8 ch_idx ;
u16 slave_port_id = 0;
- struct tabla_slim_sch_rx *rx = sh_ch.rx;
+ struct wcd9xxx_slim_sch_rx *rx = sh_ch.rx;
- /* DSP requires channel number to be between 128 and 255. For RX port
- * use channel numbers from 138 to 144, for TX port
- * use channel numbers from 128 to 137
+ /*
+ * DSP requires channel number to be between 128 and 255.
*/
- pr_debug("%s: pgd_la[%d]\n", __func__, tabla_pgd_la);
+ pr_debug("%s: pgd_la[%d]\n", __func__, wcd9xxx_pgd_la);
for (ch_idx = 0; ch_idx < SLIM_MAX_RX_PORTS; ch_idx++) {
slave_port_id = (ch_idx + 1 +
SB_PGD_OFFSET_OF_RX_SLAVE_DEV_PORTS);
rx[ch_idx].ch_num = slave_port_id + BASE_CH_NUM;
- ret = slim_get_slaveport(tabla_pgd_la, slave_port_id,
+ ret = slim_get_slaveport(wcd9xxx_pgd_la, slave_port_id,
&rx[ch_idx].sph, SLIM_SINK);
if (ret < 0) {
pr_err("%s: slave port failure id[%d] ret[%d]\n",
@@ -119,7 +121,7 @@
goto err;
}
- ret = slim_query_ch(tabla->slim, rx[ch_idx].ch_num,
+ ret = slim_query_ch(wcd9xxx->slim, rx[ch_idx].ch_num,
&rx[ch_idx].ch_h);
if (ret < 0) {
pr_err("%s: slim_query_ch failed ch-num[%d] ret[%d]\n",
@@ -131,14 +133,15 @@
return ret;
}
-static int tabla_alloc_slim_sh_ch_tx(struct tabla *tabla, u8 tabla_pgd_la)
+static int wcd9xxx_alloc_slim_sh_ch_tx(struct wcd9xxx *wcd9xxx,
+ u8 wcd9xxx_pgd_la)
{
int ret = 0;
u8 ch_idx ;
- struct tabla_slim_sch_tx *tx = sh_ch.tx;
+ struct wcd9xxx_slim_sch_tx *tx = sh_ch.tx;
u16 slave_port_id = 0;
- pr_debug("%s: pgd_la[%d]\n", __func__, tabla_pgd_la);
+ pr_err("%s: pgd_la[%d]\n", __func__, wcd9xxx_pgd_la);
/* DSP requires channel number to be between 128 and 255. For RX port
* use channel numbers from 138 to 144, for TX port
* use channel numbers from 128 to 137
@@ -146,14 +149,14 @@
for (ch_idx = 0; ch_idx < SLIM_MAX_TX_PORTS; ch_idx++) {
slave_port_id = ch_idx;
tx[ch_idx].ch_num = slave_port_id + BASE_CH_NUM;
- ret = slim_get_slaveport(tabla_pgd_la, slave_port_id,
+ ret = slim_get_slaveport(wcd9xxx_pgd_la, slave_port_id,
&tx[ch_idx].sph, SLIM_SRC);
if (ret < 0) {
pr_err("%s: slave port failure id[%d] ret[%d]\n",
__func__, slave_port_id, ret);
goto err;
}
- ret = slim_query_ch(tabla->slim, tx[ch_idx].ch_num,
+ ret = slim_query_ch(wcd9xxx->slim, tx[ch_idx].ch_num,
&tx[ch_idx].ch_h);
if (ret < 0) {
pr_err("%s: slim_query_ch failed ch-num[%d] ret[%d]\n",
@@ -165,14 +168,14 @@
return ret;
}
-static int tabla_dealloc_slim_sh_ch_rx(struct tabla *tab)
+static int wcd9xxx_dealloc_slim_sh_ch_rx(struct wcd9xxx *wcd9xxx)
{
int idx = 0;
int ret = 0;
- struct tabla_slim_sch_rx *rx = sh_ch.rx;
+ struct wcd9xxx_slim_sch_rx *rx = sh_ch.rx;
/* slim_dealloc_ch */
for (idx = 0; idx < SLIM_MAX_RX_PORTS; idx++) {
- ret = slim_dealloc_ch(tab->slim, rx[idx].ch_h);
+ ret = slim_dealloc_ch(wcd9xxx->slim, rx[idx].ch_h);
if (ret < 0) {
pr_err("%s: slim_dealloc_ch fail ret[%d] ch_h[%d]\n",
__func__, ret, rx[idx].ch_h);
@@ -182,14 +185,14 @@
return ret;
}
-static int tabla_dealloc_slim_sh_ch_tx(struct tabla *tab)
+static int wcd9xxx_dealloc_slim_sh_ch_tx(struct wcd9xxx *wcd9xxx)
{
int idx = 0;
int ret = 0;
- struct tabla_slim_sch_tx *tx = sh_ch.tx;
+ struct wcd9xxx_slim_sch_tx *tx = sh_ch.tx;
/* slim_dealloc_ch */
for (idx = 0; idx < SLIM_MAX_TX_PORTS; idx++) {
- ret = slim_dealloc_ch(tab->slim, tx[idx].ch_h);
+ ret = slim_dealloc_ch(wcd9xxx->slim, tx[idx].ch_h);
if (ret < 0) {
pr_err("%s: slim_dealloc_ch fail ret[%d] ch_h[%d]\n",
__func__, ret, tx[idx].ch_h);
@@ -200,7 +203,7 @@
}
/* Enable slimbus slave device for RX path */
-int tabla_cfg_slim_sch_rx(struct tabla *tab, unsigned int *ch_num,
+int wcd9xxx_cfg_slim_sch_rx(struct wcd9xxx *wcd9xxx, unsigned int *ch_num,
unsigned int ch_cnt, unsigned int rate)
{
u8 i = 0;
@@ -211,15 +214,15 @@
u8 payload_rx = 0, wm_payload = 0;
int ret, idx = 0;
unsigned short multi_chan_cfg_reg_addr;
- struct tabla_slim_sch_rx *rx = sh_ch.rx;
+ struct wcd9xxx_slim_sch_rx *rx = sh_ch.rx;
struct slim_ch prop;
/* Configure slave interface device */
- pr_debug("%s: ch_cnt[%d] rate=%d\n", __func__, ch_cnt, rate);
+ pr_err("%s: ch_cnt[%d] rate=%d\n", __func__, ch_cnt, rate);
for (i = 0; i < ch_cnt; i++) {
idx = (ch_num[i] - BASE_CH_NUM -
- SB_PGD_OFFSET_OF_RX_SLAVE_DEV_PORTS - 1);
+ SB_PGD_OFFSET_OF_RX_SLAVE_DEV_PORTS - 1);
ch_h[i] = rx[idx].ch_h;
sph[i] = rx[idx].sph;
slave_port_id = idx + 1;
@@ -236,7 +239,7 @@
*/
if ((slave_port_id >
SB_PGD_TX_PORT_MULTI_CHANNEL_1_END_PORT_ID) &&
- (slave_port_id <
+ (slave_port_id <=
SB_PGD_RX_PORT_MULTI_CHANNEL_0_END_PORT_ID)) {
payload_rx = payload_rx |
(1 <<
@@ -249,7 +252,8 @@
multi_chan_cfg_reg_addr =
SB_PGD_RX_PORT_MULTI_CHANNEL_0(slave_port_id);
/* write to interface device */
- ret = tabla_interface_reg_write(tab, multi_chan_cfg_reg_addr,
+ ret = wcd9xxx_interface_reg_write(wcd9xxx,
+ multi_chan_cfg_reg_addr,
payload_rx);
if (ret < 0) {
pr_err("%s:Intf-dev fail reg[%d] payload[%d] ret[%d]\n",
@@ -262,7 +266,7 @@
wm_payload = (SLAVE_PORT_WATER_MARK_VALUE <<
SLAVE_PORT_WATER_MARK_SHIFT) +
SLAVE_PORT_ENABLE;
- ret = tabla_interface_reg_write(tab,
+ ret = wcd9xxx_interface_reg_write(wcd9xxx,
SB_PGD_PORT_CFG_BYTE_ADDR(slave_port_id),
wm_payload);
if (ret < 0) {
@@ -279,7 +283,7 @@
prop.ratem = (rate/4000);
prop.sampleszbits = 16;
- ret = slim_define_ch(tab->slim, &prop, ch_h, ch_cnt,
+ ret = slim_define_ch(wcd9xxx->slim, &prop, ch_h, ch_cnt,
true, &grph);
if (ret < 0) {
pr_err("%s: slim_define_ch failed ret[%d]\n",
@@ -287,7 +291,7 @@
goto err;
}
for (i = 0; i < ch_cnt; i++) {
- ret = slim_connect_sink(tab->slim, &sph[i],
+ ret = slim_connect_sink(wcd9xxx->slim, &sph[i],
1, ch_h[i]);
if (ret < 0) {
pr_err("%s: slim_connect_sink failed ret[%d]\n",
@@ -296,7 +300,7 @@
}
}
/* slim_control_ch */
- ret = slim_control_ch(tab->slim, grph, SLIM_CH_ACTIVATE,
+ ret = slim_control_ch(wcd9xxx->slim, grph, SLIM_CH_ACTIVATE,
true);
if (ret < 0) {
pr_err("%s: slim_control_ch failed ret[%d]\n",
@@ -312,14 +316,14 @@
err_close_slim_sch:
/* release all acquired handles */
- tabla_close_slim_sch_rx(tab, ch_num, ch_cnt);
+ wcd9xxx_close_slim_sch_rx(wcd9xxx, ch_num, ch_cnt);
err:
return ret;
}
-EXPORT_SYMBOL_GPL(tabla_cfg_slim_sch_rx);
+EXPORT_SYMBOL_GPL(wcd9xxx_cfg_slim_sch_rx);
/* Enable slimbus slave device for RX path */
-int tabla_cfg_slim_sch_tx(struct tabla *tab, unsigned int *ch_num,
+int wcd9xxx_cfg_slim_sch_tx(struct wcd9xxx *wcd9xxx, unsigned int *ch_num,
unsigned int ch_cnt, unsigned int rate)
{
u8 i = 0;
@@ -331,7 +335,7 @@
int ret = 0;
unsigned short multi_chan_cfg_reg_addr;
- struct tabla_slim_sch_tx *tx = sh_ch.tx;
+ struct wcd9xxx_slim_sch_tx *tx = sh_ch.tx;
struct slim_ch prop;
pr_debug("%s: ch_cnt[%d] rate[%d]\n", __func__, ch_cnt, rate);
@@ -366,7 +370,8 @@
multi_chan_cfg_reg_addr =
SB_PGD_TX_PORT_MULTI_CHANNEL_0(slave_port_id);
/* write to interface device */
- ret = tabla_interface_reg_write(tab, multi_chan_cfg_reg_addr,
+ ret = wcd9xxx_interface_reg_write(wcd9xxx,
+ multi_chan_cfg_reg_addr,
payload_tx_0);
if (ret < 0) {
pr_err("%s:Intf-dev fail reg[%d] payload[%d] ret[%d]\n",
@@ -378,7 +383,8 @@
multi_chan_cfg_reg_addr =
SB_PGD_TX_PORT_MULTI_CHANNEL_1(slave_port_id);
/* ports 8,9 */
- ret = tabla_interface_reg_write(tab, multi_chan_cfg_reg_addr,
+ ret = wcd9xxx_interface_reg_write(wcd9xxx,
+ multi_chan_cfg_reg_addr,
payload_tx_1);
if (ret < 0) {
pr_err("%s:Intf-dev fail reg[%d] payload[%d] ret[%d]\n",
@@ -391,7 +397,7 @@
wm_payload = (SLAVE_PORT_WATER_MARK_VALUE <<
SLAVE_PORT_WATER_MARK_SHIFT) +
SLAVE_PORT_ENABLE;
- ret = tabla_interface_reg_write(tab,
+ ret = wcd9xxx_interface_reg_write(wcd9xxx,
SB_PGD_PORT_CFG_BYTE_ADDR(slave_port_id),
wm_payload);
if (ret < 0) {
@@ -408,7 +414,7 @@
prop.auxf = SLIM_CH_AUXF_NOT_APPLICABLE;
prop.ratem = (rate/4000);
prop.sampleszbits = 16;
- ret = slim_define_ch(tab->slim, &prop, ch_h, ch_cnt,
+ ret = slim_define_ch(wcd9xxx->slim, &prop, ch_h, ch_cnt,
true, &grph);
if (ret < 0) {
pr_err("%s: slim_define_ch failed ret[%d]\n",
@@ -416,7 +422,7 @@
goto err;
}
for (i = 0; i < ch_cnt; i++) {
- ret = slim_connect_src(tab->slim, sph[i],
+ ret = slim_connect_src(wcd9xxx->slim, sph[i],
ch_h[i]);
if (ret < 0) {
pr_err("%s: slim_connect_src failed ret[%d]\n",
@@ -425,7 +431,7 @@
}
}
/* slim_control_ch */
- ret = slim_control_ch(tab->slim, grph, SLIM_CH_ACTIVATE,
+ ret = slim_control_ch(wcd9xxx->slim, grph, SLIM_CH_ACTIVATE,
true);
if (ret < 0) {
pr_err("%s: slim_control_ch failed ret[%d]\n",
@@ -439,21 +445,21 @@
return 0;
err:
/* release all acquired handles */
- tabla_close_slim_sch_tx(tab, ch_num, ch_cnt);
+ wcd9xxx_close_slim_sch_tx(wcd9xxx, ch_num, ch_cnt);
return ret;
}
-EXPORT_SYMBOL_GPL(tabla_cfg_slim_sch_tx);
+EXPORT_SYMBOL_GPL(wcd9xxx_cfg_slim_sch_tx);
-int tabla_close_slim_sch_rx(struct tabla *tab, unsigned int *ch_num,
+int wcd9xxx_close_slim_sch_rx(struct wcd9xxx *wcd9xxx, unsigned int *ch_num,
unsigned int ch_cnt)
{
u16 grph = 0;
u32 sph[SLIM_MAX_RX_PORTS] = {0};
int i = 0 , idx = 0;
int ret = 0;
- struct tabla_slim_sch_rx *rx = sh_ch.rx;
+ struct wcd9xxx_slim_sch_rx *rx = sh_ch.rx;
- pr_debug("%s: ch_cnt[%d]\n", __func__, ch_cnt);
+ pr_err("%s: ch_cnt[%d]\n", __func__, ch_cnt);
for (i = 0; i < ch_cnt; i++) {
idx = (ch_num[i] - BASE_CH_NUM -
SB_PGD_OFFSET_OF_RX_SLAVE_DEV_PORTS - 1);
@@ -462,13 +468,13 @@
}
/* slim_disconnect_port */
- ret = slim_disconnect_ports(tab->slim, sph, ch_cnt);
+ ret = slim_disconnect_ports(wcd9xxx->slim, sph, ch_cnt);
if (ret < 0) {
pr_err("%s: slim_disconnect_ports failed ret[%d]\n",
__func__, ret);
}
/* slim_control_ch (REMOVE) */
- ret = slim_control_ch(tab->slim, grph, SLIM_CH_REMOVE, true);
+ ret = slim_control_ch(wcd9xxx->slim, grph, SLIM_CH_REMOVE, true);
if (ret < 0) {
pr_err("%s: slim_control_ch failed ret[%d]\n",
__func__, ret);
@@ -482,31 +488,31 @@
err:
return ret;
}
-EXPORT_SYMBOL_GPL(tabla_close_slim_sch_rx);
+EXPORT_SYMBOL_GPL(wcd9xxx_close_slim_sch_rx);
-int tabla_close_slim_sch_tx(struct tabla *tab, unsigned int *ch_num,
+int wcd9xxx_close_slim_sch_tx(struct wcd9xxx *wcd9xxx, unsigned int *ch_num,
unsigned int ch_cnt)
{
u16 grph = 0;
u32 sph[SLIM_MAX_TX_PORTS] = {0};
int ret = 0;
int i = 0 , idx = 0;
- struct tabla_slim_sch_tx *tx = sh_ch.tx;
+ struct wcd9xxx_slim_sch_tx *tx = sh_ch.tx;
- pr_debug("%s: ch_cnt[%d]\n", __func__, ch_cnt);
+ pr_err("%s: ch_cnt[%d]\n", __func__, ch_cnt);
for (i = 0; i < ch_cnt; i++) {
idx = (ch_num[i] - BASE_CH_NUM);
sph[i] = tx[idx].sph;
grph = tx[idx].grph;
}
/* slim_disconnect_port */
- ret = slim_disconnect_ports(tab->slim, sph, ch_cnt);
+ ret = slim_disconnect_ports(wcd9xxx->slim, sph, ch_cnt);
if (ret < 0) {
pr_err("%s: slim_disconnect_ports failed ret[%d]\n",
__func__, ret);
}
/* slim_control_ch (REMOVE) */
- ret = slim_control_ch(tab->slim, grph, SLIM_CH_REMOVE, true);
+ ret = slim_control_ch(wcd9xxx->slim, grph, SLIM_CH_REMOVE, true);
if (ret < 0) {
pr_err("%s: slim_control_ch failed ret[%d]\n",
__func__, ret);
@@ -519,4 +525,4 @@
err:
return ret;
}
-EXPORT_SYMBOL_GPL(tabla_close_slim_sch_tx);
+EXPORT_SYMBOL_GPL(wcd9xxx_close_slim_sch_tx);
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 43eb169..0066cd8 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -627,6 +627,13 @@
TrustZone Operating Environment (TZBSP) using Secure Channel
Manager (SCM) interface.
+config QSEECOM
+ tristate "Qualcomm Secure Execution Communicator driver"
+ help
+ Provides a communication interface between userspace and
+ Qualcomm Secure Execution Environment (QSEE) using Secure Channel
+ Manager (SCM) interface.
+
config QFP_FUSE
tristate "QFPROM Fuse Read/Write support"
help
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 6b5fdcc..fb78f4e 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -64,4 +64,5 @@
+= msm_migrate_pages.o
obj-$(CONFIG_PMIC8058_XOADC) += pmic8058-xoadc.o
obj-$(CONFIG_TZCOM) += tzcom.o
+obj-$(CONFIG_QSEECOM) += qseecom.o
obj-$(CONFIG_QFP_FUSE) += qfp_fuse.o
diff --git a/drivers/misc/qseecom.c b/drivers/misc/qseecom.c
new file mode 100644
index 0000000..495a986
--- /dev/null
+++ b/drivers/misc/qseecom.c
@@ -0,0 +1,1499 @@
+/* Qualcomm Secure Execution Environment Communicator (QSEECOM) driver
+ *
+ * Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#define pr_fmt(fmt) "QSEECOM: %s: " fmt, __func__
+
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/platform_device.h>
+#include <linux/debugfs.h>
+#include <linux/cdev.h>
+#include <linux/uaccess.h>
+#include <linux/sched.h>
+#include <linux/list.h>
+#include <linux/mutex.h>
+#include <linux/io.h>
+#include <linux/ion.h>
+#include <linux/types.h>
+#include <linux/clk.h>
+#include <linux/qseecom.h>
+#include <mach/msm_bus.h>
+#include <mach/msm_bus_board.h>
+#include <mach/scm.h>
+#include <mach/peripheral-loader.h>
+#include "qseecom_legacy.h"
+
+#define QSEECOM_DEV "qseecom"
+#define QSEOS_VERSION_13 0x13
+#define QSEOS_VERSION_14 0x14
+#define QSEOS_CHECK_VERSION_CMD 0x00001803;
+
+enum qseecom_command_scm_resp_type {
+ QSEOS_APP_ID = 0xEE01,
+ QSEOS_LISTENER_ID
+};
+
+enum qseecom_qceos_cmd_id {
+ QSEOS_APP_START_COMMAND = 0x01,
+ QSEOS_APP_SHUTDOWN_COMMAND,
+ QSEOS_APP_LOOKUP_COMMAND,
+ QSEOS_REGISTER_LISTENER,
+ QSEOS_DEREGISTER_LISTENER,
+ QSEOS_CLIENT_SEND_DATA_COMMAND,
+ QSEOS_LISTENER_DATA_RSP_COMMAND,
+ QSEOS_CMD_MAX = 0xEFFFFFFF
+};
+
+enum qseecom_qceos_cmd_status {
+ QSEOS_RESULT_SUCCESS = 0,
+ QSEOS_RESULT_INCOMPLETE,
+ QSEOS_RESULT_FAILURE = 0xFFFFFFFF
+};
+
+__packed struct qseecom_check_app_ireq {
+ uint32_t qsee_cmd_id;
+ char app_name[MAX_APP_NAME_SIZE];
+};
+
+__packed struct qseecom_load_app_ireq {
+ uint32_t qsee_cmd_id;
+ uint32_t mdt_len; /* Length of the mdt file */
+ uint32_t img_len; /* Length of .bxx and .mdt files */
+ uint32_t phy_addr; /* phy addr of the start of image */
+ char app_name[MAX_APP_NAME_SIZE]; /* application name*/
+};
+
+__packed struct qseecom_unload_app_ireq {
+ uint32_t qsee_cmd_id;
+ uint32_t app_id;
+};
+
+__packed struct qseecom_register_listener_ireq {
+ uint32_t qsee_cmd_id;
+ uint32_t listener_id;
+ void *sb_ptr;
+ uint32_t sb_len;
+};
+
+__packed struct qseecom_unregister_listener_ireq {
+ uint32_t qsee_cmd_id;
+ uint32_t listener_id;
+};
+
+__packed struct qseecom_client_send_data_ireq {
+ uint32_t qsee_cmd_id;
+ uint32_t app_id;
+ void *req_ptr;
+ uint32_t req_len;
+ void *rsp_ptr; /* First 4 bytes should always be the return status */
+ uint32_t rsp_len;
+};
+
+/* send_data resp */
+__packed struct qseecom_client_listener_data_irsp {
+ uint32_t qsee_cmd_id;
+ uint32_t listener_id;
+};
+
+/*
+ * struct qseecom_command_scm_resp - qseecom response buffer
+ * @cmd_status: value from enum tz_sched_cmd_status
+ * @sb_in_rsp_addr: points to physical location of response
+ * buffer
+ * @sb_in_rsp_len: length of command response
+ */
+__packed struct qseecom_command_scm_resp {
+ uint32_t result;
+ enum qseecom_command_scm_resp_type resp_type;
+ unsigned int data;
+};
+
+static struct class *driver_class;
+static dev_t qseecom_device_no;
+static struct cdev qseecom_cdev;
+
+/* Data structures used in legacy support */
+static void *pil;
+static uint32_t pil_ref_cnt;
+static DEFINE_MUTEX(pil_access_lock);
+
+static DEFINE_MUTEX(send_msg_lock);
+static DEFINE_MUTEX(qsee_bw_mutex);
+static DEFINE_MUTEX(app_access_lock);
+
+static int qsee_bw_count;
+static struct clk *qseecom_bus_clk;
+static uint32_t qsee_perf_client;
+
+struct qseecom_registered_listener_list {
+ struct list_head list;
+ struct qseecom_register_listener_req svc;
+ u8 *sb_reg_req;
+ u8 *sb_virt;
+ s32 sb_phys;
+ size_t sb_length;
+ struct ion_handle *ihandle; /* Retrieve phy addr */
+
+ wait_queue_head_t rcv_req_wq;
+ int rcv_req_flag;
+};
+
+struct qseecom_registered_app_list {
+ struct list_head list;
+ u32 app_id;
+ u32 ref_cnt;
+};
+
+struct qseecom_control {
+ struct ion_client *ion_clnt; /* Ion client */
+ struct list_head registered_listener_list_head;
+ spinlock_t registered_listener_list_lock;
+
+ struct list_head registered_app_list_head;
+ spinlock_t registered_app_list_lock;
+
+ wait_queue_head_t send_resp_wq;
+ int send_resp_flag;
+
+ uint32_t qseos_version;
+};
+
+struct qseecom_client_handle {
+ u32 app_id;
+ u8 *sb_virt;
+ s32 sb_phys;
+ uint32_t user_virt_sb_base;
+ size_t sb_length;
+ struct ion_handle *ihandle; /* Retrieve phy addr */
+};
+
+struct qseecom_listener_handle {
+ u32 id;
+};
+
+static struct qseecom_control qseecom;
+
+struct qseecom_dev_handle {
+ bool service;
+ union {
+ struct qseecom_client_handle client;
+ struct qseecom_listener_handle listener;
+ };
+ bool released;
+ int abort;
+ wait_queue_head_t abort_wq;
+ atomic_t ioctl_count;
+};
+
+static int __qseecom_is_svc_unique(struct qseecom_dev_handle *data,
+ struct qseecom_register_listener_req *svc)
+{
+ struct qseecom_registered_listener_list *ptr;
+ int unique = 1;
+ unsigned long flags;
+
+ spin_lock_irqsave(&qseecom.registered_listener_list_lock, flags);
+ list_for_each_entry(ptr, &qseecom.registered_listener_list_head, list) {
+ if (ptr->svc.listener_id == svc->listener_id) {
+ pr_err("Service id: %u is already registered\n",
+ ptr->svc.listener_id);
+ unique = 0;
+ break;
+ }
+ }
+ spin_unlock_irqrestore(&qseecom.registered_listener_list_lock, flags);
+ return unique;
+}
+
+static struct qseecom_registered_listener_list *__qseecom_find_svc(
+ int32_t listener_id)
+{
+ struct qseecom_registered_listener_list *entry = NULL;
+ unsigned long flags;
+
+ spin_lock_irqsave(&qseecom.registered_listener_list_lock, flags);
+ list_for_each_entry(entry, &qseecom.registered_listener_list_head, list)
+ {
+ if (entry->svc.listener_id == listener_id)
+ break;
+ }
+ spin_unlock_irqrestore(&qseecom.registered_listener_list_lock, flags);
+ return entry;
+}
+
+static int __qseecom_set_sb_memory(struct qseecom_registered_listener_list *svc,
+ struct qseecom_dev_handle *handle,
+ struct qseecom_register_listener_req *listener)
+{
+ int ret = 0;
+ unsigned int flags = 0;
+ struct qseecom_register_listener_ireq req;
+ struct qseecom_command_scm_resp resp;
+ ion_phys_addr_t pa;
+
+ /* Get the handle of the shared fd */
+ svc->ihandle = ion_import_fd(qseecom.ion_clnt, listener->ifd_data_fd);
+ if (svc->ihandle == NULL) {
+ pr_err("Ion client could not retrieve the handle\n");
+ return -ENOMEM;
+ }
+
+ /* Get the physical address of the ION BUF */
+ ret = ion_phys(qseecom.ion_clnt, svc->ihandle, &pa, &svc->sb_length);
+
+ /* Populate the structure for sending scm call to load image */
+ svc->sb_virt = (char *) ion_map_kernel(qseecom.ion_clnt,
+ svc->ihandle, flags);
+ svc->sb_phys = pa;
+
+ if (qseecom.qseos_version == QSEOS_VERSION_14) {
+ req.qsee_cmd_id = QSEOS_REGISTER_LISTENER;
+ req.listener_id = svc->svc.listener_id;
+ req.sb_len = svc->sb_length;
+ req.sb_ptr = (void *)svc->sb_phys;
+
+ resp.result = QSEOS_RESULT_INCOMPLETE;
+
+ ret = scm_call(SCM_SVC_TZSCHEDULER, 1, &req,
+ sizeof(req), &resp, sizeof(resp));
+ if (ret) {
+ pr_err("qseecom_scm_call failed with err: %d\n", ret);
+ return -EINVAL;
+ }
+
+ if (resp.result != QSEOS_RESULT_SUCCESS) {
+ pr_err("Error SB registration req: resp.result = %d\n",
+ resp.result);
+ return -EPERM;
+ }
+ } else {
+ struct qseecom_command cmd;
+ struct qseecom_response resp;
+ struct qse_pr_init_sb_req_s sb_init_req;
+ struct qse_pr_init_sb_rsp_s sb_init_rsp;
+
+ svc->sb_reg_req = kzalloc((sizeof(sb_init_req) +
+ sizeof(sb_init_rsp)), GFP_KERNEL);
+
+ sb_init_req.pr_cmd = TZ_SCHED_CMD_ID_REGISTER_LISTENER;
+ sb_init_req.listener_id = svc->svc.listener_id;
+ sb_init_req.sb_len = svc->sb_length;
+ sb_init_req.sb_ptr = svc->sb_phys;
+
+ memcpy(svc->sb_reg_req, &sb_init_req, sizeof(sb_init_req));
+
+ /* It will always be a new cmd from this method */
+ cmd.cmd_type = TZ_SCHED_CMD_NEW;
+ cmd.sb_in_cmd_addr = (u8 *)(virt_to_phys(svc->sb_reg_req));
+ cmd.sb_in_cmd_len = sizeof(sb_init_req);
+
+ resp.cmd_status = TZ_SCHED_STATUS_INCOMPLETE;
+
+ ret = scm_call(SCM_SVC_TZSCHEDULER, 1, &cmd, sizeof(cmd)
+ , &resp, sizeof(resp));
+
+ if (ret) {
+ pr_err("qseecom_scm_call failed with err: %d\n", ret);
+ return -EINVAL;
+ }
+
+ if (resp.cmd_status != TZ_SCHED_STATUS_COMPLETE) {
+ pr_err("SB registration fail resp.cmd_status %d\n",
+ resp.cmd_status);
+ return -EINVAL;
+ }
+ memset(svc->sb_virt, 0, svc->sb_length);
+ }
+ return 0;
+}
+
+static int qseecom_register_listener(struct qseecom_dev_handle *data,
+ void __user *argp)
+{
+ int ret = 0;
+ unsigned long flags;
+ struct qseecom_register_listener_req rcvd_lstnr;
+ struct qseecom_registered_listener_list *new_entry;
+
+ ret = copy_from_user(&rcvd_lstnr, argp, sizeof(rcvd_lstnr));
+ if (ret) {
+ pr_err("copy_from_user failed\n");
+ return ret;
+ }
+ data->listener.id = 0;
+ data->service = true;
+ if (!__qseecom_is_svc_unique(data, &rcvd_lstnr)) {
+ pr_err("Service is not unique and is already registered\n");
+ data->released = true;
+ return -EBUSY;
+ }
+
+ new_entry = kmalloc(sizeof(*new_entry), GFP_KERNEL);
+ if (!new_entry) {
+ pr_err("kmalloc failed\n");
+ return -ENOMEM;
+ }
+ memcpy(&new_entry->svc, &rcvd_lstnr, sizeof(rcvd_lstnr));
+ new_entry->rcv_req_flag = 0;
+
+ new_entry->svc.listener_id = rcvd_lstnr.listener_id;
+ new_entry->sb_length = rcvd_lstnr.sb_size;
+ if (__qseecom_set_sb_memory(new_entry, data, &rcvd_lstnr)) {
+ pr_err("qseecom_set_sb_memoryfailed\n");
+ kzfree(new_entry);
+ return -ENOMEM;
+ }
+
+ data->listener.id = rcvd_lstnr.listener_id;
+ init_waitqueue_head(&new_entry->rcv_req_wq);
+
+ spin_lock_irqsave(&qseecom.registered_listener_list_lock, flags);
+ list_add_tail(&new_entry->list, &qseecom.registered_listener_list_head);
+ spin_unlock_irqrestore(&qseecom.registered_listener_list_lock, flags);
+
+ return ret;
+}
+
+static int qseecom_unregister_listener(struct qseecom_dev_handle *data)
+{
+ int ret = 0;
+ unsigned long flags;
+ uint32_t unmap_mem = 0;
+ struct qseecom_register_listener_ireq req;
+ struct qseecom_registered_listener_list *ptr_svc = NULL;
+ struct qseecom_command_scm_resp resp;
+ struct ion_handle *ihandle = NULL; /* Retrieve phy addr */
+
+ if (qseecom.qseos_version == QSEOS_VERSION_14) {
+ req.qsee_cmd_id = QSEOS_DEREGISTER_LISTENER;
+ req.listener_id = data->listener.id;
+ resp.result = QSEOS_RESULT_INCOMPLETE;
+
+ ret = scm_call(SCM_SVC_TZSCHEDULER, 1, &req,
+ sizeof(req), &resp, sizeof(resp));
+ if (ret) {
+ pr_err("qseecom_scm_call failed with err: %d\n", ret);
+ return ret;
+ }
+
+ if (resp.result != QSEOS_RESULT_SUCCESS) {
+ pr_err("SB deregistartion: result=%d\n", resp.result);
+ return -EPERM;
+ }
+ } else {
+ struct qse_pr_init_sb_req_s sb_init_req;
+ struct qseecom_command cmd;
+ struct qseecom_response resp;
+ struct qseecom_registered_listener_list *svc;
+
+ svc = __qseecom_find_svc(data->listener.id);
+ sb_init_req.pr_cmd = TZ_SCHED_CMD_ID_REGISTER_LISTENER;
+ sb_init_req.listener_id = data->listener.id;
+ sb_init_req.sb_len = 0;
+ sb_init_req.sb_ptr = 0;
+
+ memcpy(svc->sb_reg_req, &sb_init_req, sizeof(sb_init_req));
+
+ /* It will always be a new cmd from this method */
+ cmd.cmd_type = TZ_SCHED_CMD_NEW;
+ cmd.sb_in_cmd_addr = (u8 *)(virt_to_phys(svc->sb_reg_req));
+ cmd.sb_in_cmd_len = sizeof(sb_init_req);
+ resp.cmd_status = TZ_SCHED_STATUS_INCOMPLETE;
+
+ ret = scm_call(SCM_SVC_TZSCHEDULER, 1, &cmd, sizeof(cmd),
+ &resp, sizeof(resp));
+ if (ret) {
+ pr_err("qseecom_scm_call failed with err: %d\n", ret);
+ return ret;
+ }
+ kzfree(svc->sb_reg_req);
+ if (resp.cmd_status != TZ_SCHED_STATUS_COMPLETE) {
+ pr_err("Error with SB initialization\n");
+ return -EPERM;
+ }
+ }
+ data->abort = 1;
+ spin_lock_irqsave(&qseecom.registered_listener_list_lock, flags);
+ list_for_each_entry(ptr_svc, &qseecom.registered_listener_list_head,
+ list) {
+ if (ptr_svc->svc.listener_id == data->listener.id) {
+ wake_up_all(&ptr_svc->rcv_req_wq);
+ break;
+ }
+ }
+ spin_unlock_irqrestore(&qseecom.registered_listener_list_lock, flags);
+
+ while (atomic_read(&data->ioctl_count) > 1) {
+ if (wait_event_interruptible(data->abort_wq,
+ atomic_read(&data->ioctl_count) <= 1)) {
+ pr_err("Interrupted from abort\n");
+ ret = -ERESTARTSYS;
+ break;
+ }
+ }
+
+ spin_lock_irqsave(&qseecom.registered_listener_list_lock, flags);
+ list_for_each_entry(ptr_svc,
+ &qseecom.registered_listener_list_head,
+ list)
+ {
+ if (ptr_svc->svc.listener_id == data->listener.id) {
+ if (ptr_svc->sb_virt) {
+ unmap_mem = 1;
+ ihandle = ptr_svc->ihandle;
+ }
+ list_del(&ptr_svc->list);
+ kzfree(ptr_svc);
+ break;
+ }
+ }
+ spin_unlock_irqrestore(&qseecom.registered_listener_list_lock, flags);
+
+ /* Unmap the memory */
+ if (unmap_mem) {
+ if (!IS_ERR_OR_NULL(ihandle)) {
+ ion_unmap_kernel(qseecom.ion_clnt, ihandle);
+ ion_free(qseecom.ion_clnt, ihandle);
+ }
+ }
+ data->released = true;
+ return ret;
+}
+
+static int qseecom_set_client_mem_param(struct qseecom_dev_handle *data,
+ void __user *argp)
+{
+ ion_phys_addr_t pa;
+ int32_t ret;
+ unsigned int flags = 0;
+ struct qseecom_set_sb_mem_param_req req;
+ uint32_t len;
+
+ /* Copy the relevant information needed for loading the image */
+ if (__copy_from_user(&req, (void __user *)argp, sizeof(req)))
+ return -EFAULT;
+
+ if (qseecom.qseos_version == QSEOS_VERSION_13) {
+ long pil_error;
+ mutex_lock(&pil_access_lock);
+ if (pil_ref_cnt == 0) {
+ pil = pil_get("tzapps");
+ if (IS_ERR(pil)) {
+ pr_err("Playready PIL image load failed\n");
+ pil_error = PTR_ERR(pil);
+ pil = NULL;
+ pr_debug("tzapps image load FAILED\n");
+ mutex_unlock(&pil_access_lock);
+ return pil_error;
+ }
+ }
+ pil_ref_cnt++;
+ mutex_unlock(&pil_access_lock);
+ }
+ /* Get the handle of the shared fd */
+ data->client.ihandle = ion_import_fd(qseecom.ion_clnt, req.ifd_data_fd);
+ if (IS_ERR_OR_NULL(data->client.ihandle)) {
+ pr_err("Ion client could not retrieve the handle\n");
+ return -ENOMEM;
+ }
+ /* Get the physical address of the ION BUF */
+ ret = ion_phys(qseecom.ion_clnt, data->client.ihandle, &pa, &len);
+ /* Populate the structure for sending scm call to load image */
+ data->client.sb_virt = (char *) ion_map_kernel(qseecom.ion_clnt,
+ data->client.ihandle,
+ flags);
+ data->client.sb_phys = pa;
+ data->client.sb_length = req.sb_len;
+ data->client.user_virt_sb_base = req.virt_sb_base;
+ return 0;
+}
+
+
+static int __qseecom_listener_has_sent_rsp(struct qseecom_dev_handle *data)
+{
+ int ret;
+ ret = (qseecom.send_resp_flag != 0);
+ return ret || data->abort;
+}
+
+static int __qseecom_process_incomplete_cmd(struct qseecom_dev_handle *data,
+ struct qseecom_command_scm_resp *resp)
+{
+ int ret = 0;
+ uint32_t lstnr;
+ unsigned long flags;
+ struct qseecom_client_listener_data_irsp send_data_rsp;
+ struct qseecom_registered_listener_list *ptr_svc = NULL;
+
+
+ while (resp->result == QSEOS_RESULT_INCOMPLETE) {
+ lstnr = resp->data;
+ /*
+ * Wake up blocking lsitener service with the lstnr id
+ */
+ spin_lock_irqsave(&qseecom.registered_listener_list_lock,
+ flags);
+ list_for_each_entry(ptr_svc,
+ &qseecom.registered_listener_list_head, list) {
+ if (ptr_svc->svc.listener_id == lstnr) {
+ ptr_svc->rcv_req_flag = 1;
+ wake_up_interruptible(&ptr_svc->rcv_req_wq);
+ break;
+ }
+ }
+ spin_unlock_irqrestore(&qseecom.registered_listener_list_lock,
+ flags);
+ if (ptr_svc->svc.listener_id != lstnr) {
+ pr_warning("Service requested for does on exist\n");
+ return -ERESTARTSYS;
+ }
+ pr_debug("waking up rcv_req_wq and "
+ "waiting for send_resp_wq\n");
+ if (wait_event_interruptible(qseecom.send_resp_wq,
+ __qseecom_listener_has_sent_rsp(data))) {
+ pr_warning("Interrupted: exiting send_cmd loop\n");
+ return -ERESTARTSYS;
+ }
+
+ if (data->abort) {
+ pr_err("Aborting driver\n");
+ return -ENODEV;
+ }
+ qseecom.send_resp_flag = 0;
+ send_data_rsp.qsee_cmd_id = QSEOS_LISTENER_DATA_RSP_COMMAND;
+ send_data_rsp.listener_id = lstnr ;
+
+ ret = scm_call(SCM_SVC_TZSCHEDULER, 1,
+ (const void *)&send_data_rsp,
+ sizeof(send_data_rsp), resp,
+ sizeof(*resp));
+ if (ret) {
+ pr_err("qseecom_scm_call failed with err: %d\n", ret);
+ return ret;
+ }
+ }
+ return ret;
+}
+
+static int qseecom_load_app(struct qseecom_dev_handle *data, void __user *argp)
+{
+ struct qseecom_registered_app_list *entry = NULL;
+ unsigned long flags = 0;
+ u32 app_id = 0;
+ struct ion_handle *ihandle; /* Ion handle */
+ struct qseecom_load_img_req load_img_req;
+ int32_t ret;
+ ion_phys_addr_t pa = 0;
+ uint32_t len;
+ struct qseecom_command_scm_resp resp;
+ struct qseecom_check_app_ireq req;
+ /* Copy the relevant information needed for loading the image */
+ if (__copy_from_user(&load_img_req,
+ (void __user *)argp,
+ sizeof(struct qseecom_load_img_req))) {
+ pr_err("copy_from_user failed\n");
+ return -EFAULT;
+ }
+
+ req.qsee_cmd_id = QSEOS_APP_LOOKUP_COMMAND;
+ memcpy(req.app_name, load_img_req.img_name, MAX_APP_NAME_SIZE);
+
+ /* SCM_CALL to check if app_id for the mentioned app exists */
+ ret = scm_call(SCM_SVC_TZSCHEDULER, 1, &req,
+ sizeof(struct qseecom_check_app_ireq),
+ &resp, sizeof(resp));
+
+ if (resp.result == QSEOS_RESULT_FAILURE)
+ app_id = 0;
+ else
+ app_id = resp.data;
+
+ if (app_id) {
+ pr_warn("App id already exists\n");
+ spin_lock_irqsave(&qseecom.registered_app_list_lock, flags);
+ list_for_each_entry(entry,
+ &qseecom.registered_app_list_head, list){
+ if (entry->app_id == app_id) {
+ entry->ref_cnt++;
+ break;
+ }
+ }
+ spin_unlock_irqrestore(
+ &qseecom.registered_app_list_lock, flags);
+ } else {
+ struct qseecom_load_app_ireq load_req;
+
+ pr_warn("App id does not exist\n");
+ /* Get the handle of the shared fd */
+ ihandle = ion_import_fd(qseecom.ion_clnt,
+ load_img_req.ifd_data_fd);
+ if (IS_ERR_OR_NULL(ihandle)) {
+ pr_err("Ion client could not retrieve the handle\n");
+ return -ENOMEM;
+ }
+
+ /* Get the physical address of the ION BUF */
+ ret = ion_phys(qseecom.ion_clnt, ihandle, &pa, &len);
+
+ /* Populate the structure for sending scm call to load image */
+ load_req.qsee_cmd_id = QSEOS_APP_START_COMMAND;
+ load_req.mdt_len = load_img_req.mdt_len;
+ load_req.img_len = load_img_req.img_len;
+ load_req.phy_addr = pa;
+
+ /* SCM_CALL to load the app and get the app_id back */
+ ret = scm_call(SCM_SVC_TZSCHEDULER, 1, &load_req,
+ sizeof(struct qseecom_load_app_ireq),
+ &resp, sizeof(resp));
+
+ if (resp.result == QSEOS_RESULT_INCOMPLETE) {
+ ret = __qseecom_process_incomplete_cmd(data, &resp);
+ if (ret) {
+ pr_err("process_incomplete_cmd failed err: %d\n",
+ ret);
+ if (!IS_ERR_OR_NULL(ihandle))
+ ion_free(qseecom.ion_clnt, ihandle);
+ return ret;
+ }
+ }
+ if (resp.result != QSEOS_RESULT_SUCCESS) {
+ pr_err("scm_call failed resp.result != QSEOS_RESULT_SUCCESS\n");
+ if (!IS_ERR_OR_NULL(ihandle))
+ ion_free(qseecom.ion_clnt, ihandle);
+ return -EFAULT;
+ }
+
+ app_id = resp.data;
+
+ entry = kmalloc(sizeof(*entry), GFP_KERNEL);
+ if (!entry) {
+ pr_err("kmalloc failed\n");
+ return -ENOMEM;
+ }
+ entry->app_id = app_id;
+ entry->ref_cnt = 1;
+
+ /* Deallocate the handle */
+ if (!IS_ERR_OR_NULL(ihandle))
+ ion_free(qseecom.ion_clnt, ihandle);
+
+ spin_lock_irqsave(&qseecom.registered_app_list_lock, flags);
+ list_add_tail(&entry->list, &qseecom.registered_app_list_head);
+ spin_unlock_irqrestore(&qseecom.registered_app_list_lock,
+ flags);
+ }
+ data->client.app_id = app_id;
+ load_img_req.app_id = app_id;
+ if (copy_to_user(argp, &load_img_req, sizeof(load_img_req))) {
+ pr_err("copy_to_user failed\n");
+ kzfree(entry);
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int __qseecom_cleanup_app(struct qseecom_dev_handle *data)
+{
+ wake_up_all(&qseecom.send_resp_wq);
+ while (atomic_read(&data->ioctl_count) > 1) {
+ if (wait_event_interruptible(data->abort_wq,
+ atomic_read(&data->ioctl_count) <= 1)) {
+ pr_err("Interrupted from abort\n");
+ return -ERESTARTSYS;
+ break;
+ }
+ }
+ /* Set unload app */
+ return 1;
+}
+
+static int qseecom_unload_app(struct qseecom_dev_handle *data)
+{
+ unsigned long flags;
+ int ret = 0;
+ struct qseecom_command_scm_resp resp;
+ struct qseecom_registered_app_list *ptr_app;
+ uint32_t unload = 0;
+
+ if (qseecom.qseos_version == QSEOS_VERSION_14) {
+ spin_lock_irqsave(&qseecom.registered_app_list_lock, flags);
+ list_for_each_entry(ptr_app, &qseecom.registered_app_list_head,
+ list) {
+ if (ptr_app->app_id == data->client.app_id) {
+ if (ptr_app->ref_cnt == 1) {
+ unload = __qseecom_cleanup_app(data);
+ list_del(&ptr_app->list);
+ kzfree(ptr_app);
+ break;
+ } else {
+ ptr_app->ref_cnt--;
+ data->released = true;
+ break;
+ }
+ }
+ }
+ spin_unlock_irqrestore(&qseecom.registered_app_list_lock,
+ flags);
+ }
+ if (!IS_ERR_OR_NULL(data->client.ihandle)) {
+ ion_unmap_kernel(qseecom.ion_clnt, data->client.ihandle);
+ ion_free(qseecom.ion_clnt, data->client.ihandle);
+ }
+
+ if ((unload) && (qseecom.qseos_version == QSEOS_VERSION_14)) {
+ struct qseecom_unload_app_ireq req;
+
+ /* Populate the structure for sending scm call to load image */
+ req.qsee_cmd_id = QSEOS_APP_SHUTDOWN_COMMAND;
+ req.app_id = data->client.app_id;
+
+ /* SCM_CALL to unload the app */
+ ret = scm_call(SCM_SVC_TZSCHEDULER, 1, &req,
+ sizeof(struct qseecom_unload_app_ireq),
+ &resp, sizeof(resp));
+ if (ret) {
+ pr_err("Fail to unload APP\n");
+ return -EFAULT;
+ }
+ if (resp.result == QSEOS_RESULT_INCOMPLETE) {
+ ret = __qseecom_process_incomplete_cmd(data, &resp);
+ if (ret) {
+ pr_err("process_incomplete_cmd fail err: %d\n",
+ ret);
+ return ret;
+ }
+ }
+ }
+
+ if (qseecom.qseos_version == QSEOS_VERSION_13) {
+ data->abort = 1;
+ wake_up_all(&qseecom.send_resp_wq);
+ while (atomic_read(&data->ioctl_count) > 0) {
+ if (wait_event_interruptible(data->abort_wq,
+ atomic_read(&data->ioctl_count) <= 0)) {
+ pr_err("Interrupted from abort\n");
+ ret = -ERESTARTSYS;
+ break;
+ }
+ }
+ mutex_lock(&pil_access_lock);
+ if (pil_ref_cnt == 1)
+ pil_put(pil);
+ pil_ref_cnt--;
+ mutex_unlock(&pil_access_lock);
+ }
+ data->released = true;
+ return ret;
+}
+
+static uint32_t __qseecom_uvirt_to_kphys(struct qseecom_dev_handle *data,
+ uint32_t virt)
+{
+ return data->client.sb_phys + (virt - data->client.user_virt_sb_base);
+}
+
+static int __qseecom_send_cmd_legacy(struct qseecom_dev_handle *data,
+ struct qseecom_send_cmd_req *req)
+{
+ int ret = 0;
+ unsigned long flags;
+ u32 reqd_len_sb_in = 0;
+ struct qseecom_command cmd;
+ struct qseecom_response resp;
+
+
+ if (req->cmd_req_buf == NULL || req->resp_buf == NULL) {
+ pr_err("cmd buffer or response buffer is null\n");
+ return -EINVAL;
+ }
+
+ if (req->cmd_req_len <= 0 ||
+ req->resp_len <= 0 ||
+ req->cmd_req_len > data->client.sb_length ||
+ req->resp_len > data->client.sb_length) {
+ pr_err("cmd buffer length or "
+ "response buffer length not valid\n");
+ return -EINVAL;
+ }
+
+ reqd_len_sb_in = req->cmd_req_len + req->resp_len;
+ if (reqd_len_sb_in > data->client.sb_length) {
+ pr_debug("Not enough memory to fit cmd_buf and "
+ "resp_buf. Required: %u, Available: %u\n",
+ reqd_len_sb_in, data->client.sb_length);
+ return -ENOMEM;
+ }
+ cmd.cmd_type = TZ_SCHED_CMD_NEW;
+ cmd.sb_in_cmd_addr = (u8 *) data->client.sb_phys;
+ cmd.sb_in_cmd_len = req->cmd_req_len;
+
+ resp.cmd_status = TZ_SCHED_STATUS_INCOMPLETE;
+ resp.sb_in_rsp_addr = (u8 *)data->client.sb_phys + req->cmd_req_len;
+ resp.sb_in_rsp_len = req->resp_len;
+
+ ret = scm_call(SCM_SVC_TZSCHEDULER, 1, (const void *)&cmd,
+ sizeof(cmd), &resp, sizeof(resp));
+
+ if (ret) {
+ pr_err("qseecom_scm_call_legacy failed with err: %d\n", ret);
+ return ret;
+ }
+
+ while (resp.cmd_status != TZ_SCHED_STATUS_COMPLETE) {
+ /*
+ * If cmd is incomplete, get the callback cmd out from SB out
+ * and put it on the list
+ */
+ struct qseecom_registered_listener_list *ptr_svc = NULL;
+ /*
+ * We don't know which service can handle the command. so we
+ * wake up all blocking services and let them figure out if
+ * they can handle the given command.
+ */
+ spin_lock_irqsave(&qseecom.registered_listener_list_lock,
+ flags);
+ list_for_each_entry(ptr_svc,
+ &qseecom.registered_listener_list_head, list) {
+ ptr_svc->rcv_req_flag = 1;
+ wake_up_interruptible(&ptr_svc->rcv_req_wq);
+ }
+ spin_unlock_irqrestore(&qseecom.registered_listener_list_lock,
+ flags);
+
+ pr_debug("waking up rcv_req_wq and "
+ "waiting for send_resp_wq\n");
+ if (wait_event_interruptible(qseecom.send_resp_wq,
+ __qseecom_listener_has_sent_rsp(data))) {
+ pr_warning("qseecom Interrupted: exiting send_cmd loop\n");
+ return -ERESTARTSYS;
+ }
+
+ if (data->abort) {
+ pr_err("Aborting driver\n");
+ return -ENODEV;
+ }
+ qseecom.send_resp_flag = 0;
+ cmd.cmd_type = TZ_SCHED_CMD_PENDING;
+ ret = scm_call(SCM_SVC_TZSCHEDULER, 1, (const void *)&cmd,
+ sizeof(cmd), &resp, sizeof(resp));
+ if (ret) {
+ pr_err("qseecom_scm_call failed with err: %d\n", ret);
+ return ret;
+ }
+ }
+ return ret;
+}
+
+static int __qseecom_send_cmd(struct qseecom_dev_handle *data,
+ struct qseecom_send_cmd_req *req)
+{
+ int ret = 0;
+ u32 reqd_len_sb_in = 0;
+ struct qseecom_client_send_data_ireq send_data_req;
+ struct qseecom_command_scm_resp resp;
+
+ if (req->cmd_req_buf == NULL || req->resp_buf == NULL) {
+ pr_err("cmd buffer or response buffer is null\n");
+ return -EINVAL;
+ }
+
+ if (req->cmd_req_len <= 0 ||
+ req->resp_len <= 0 ||
+ req->cmd_req_len > data->client.sb_length ||
+ req->resp_len > data->client.sb_length) {
+ pr_err("cmd buffer length or "
+ "response buffer length not valid\n");
+ return -EINVAL;
+ }
+
+ reqd_len_sb_in = req->cmd_req_len + req->resp_len;
+ if (reqd_len_sb_in > data->client.sb_length) {
+ pr_debug("Not enough memory to fit cmd_buf and "
+ "resp_buf. Required: %u, Available: %u\n",
+ reqd_len_sb_in, data->client.sb_length);
+ return -ENOMEM;
+ }
+
+ send_data_req.qsee_cmd_id = QSEOS_CLIENT_SEND_DATA_COMMAND;
+ send_data_req.app_id = data->client.app_id;
+ send_data_req.req_ptr = (void *)(__qseecom_uvirt_to_kphys(data,
+ (uint32_t)req->cmd_req_buf));
+ send_data_req.req_len = req->cmd_req_len;
+ send_data_req.rsp_ptr = (void *)(__qseecom_uvirt_to_kphys(data,
+ (uint32_t)req->resp_buf));
+ send_data_req.rsp_len = req->resp_len;
+
+ ret = scm_call(SCM_SVC_TZSCHEDULER, 1, (const void *) &send_data_req,
+ sizeof(send_data_req),
+ &resp, sizeof(resp));
+ if (ret) {
+ pr_err("qseecom_scm_call failed with err: %d\n", ret);
+ return ret;
+ }
+
+ if (resp.result == QSEOS_RESULT_INCOMPLETE) {
+ ret = __qseecom_process_incomplete_cmd(data, &resp);
+ if (ret) {
+ pr_err("process_incomplete_cmd failed err: %d\n", ret);
+ return ret;
+ }
+ }
+ return ret;
+}
+
+
+static int qseecom_send_cmd(struct qseecom_dev_handle *data, void __user *argp)
+{
+ int ret = 0;
+ struct qseecom_send_cmd_req req;
+
+ ret = copy_from_user(&req, argp, sizeof(req));
+ if (ret) {
+ pr_err("copy_from_user failed\n");
+ return ret;
+ }
+ if (qseecom.qseos_version == QSEOS_VERSION_14)
+ ret = __qseecom_send_cmd(data, &req);
+ else
+ ret = __qseecom_send_cmd_legacy(data, &req);
+ if (ret)
+ return ret;
+
+ pr_debug("sending cmd_req->rsp size: %u, ptr: 0x%p\n",
+ req.resp_len, req.resp_buf);
+ return ret;
+}
+
+static int __qseecom_send_cmd_req_clean_up(
+ struct qseecom_send_modfd_cmd_req *req)
+{
+ char *field;
+ uint32_t *update;
+ int ret = 0;
+ int i = 0;
+
+ for (i = 0; i < MAX_ION_FD; i++) {
+ if (req->ifd_data[i].fd != 0) {
+ field = (char *)req->cmd_req_buf +
+ req->ifd_data[i].cmd_buf_offset;
+ update = (uint32_t *) field;
+ *update = 0;
+ }
+ }
+ return ret;
+}
+
+static int __qseecom_update_with_phy_addr(
+ struct qseecom_send_modfd_cmd_req *req)
+{
+ struct ion_handle *ihandle;
+ char *field;
+ uint32_t *update;
+ ion_phys_addr_t pa;
+ int ret = 0;
+ int i = 0;
+ uint32_t length;
+
+ for (i = 0; i < MAX_ION_FD; i++) {
+ if (req->ifd_data[i].fd != 0) {
+ /* Get the handle of the shared fd */
+ ihandle = ion_import_fd(qseecom.ion_clnt,
+ req->ifd_data[i].fd);
+ if (IS_ERR_OR_NULL(ihandle)) {
+ pr_err("Ion client can't retrieve the handle\n");
+ return -ENOMEM;
+ }
+ field = (char *) req->cmd_req_buf +
+ req->ifd_data[i].cmd_buf_offset;
+ update = (uint32_t *) field;
+
+ /* Populate the cmd data structure with the phys_addr */
+ ret = ion_phys(qseecom.ion_clnt, ihandle, &pa, &length);
+ if (ret)
+ return -ENOMEM;
+
+ *update = (uint32_t)pa;
+ /* Deallocate the handle */
+ if (!IS_ERR_OR_NULL(ihandle))
+ ion_free(qseecom.ion_clnt, ihandle);
+ }
+ }
+ return ret;
+}
+
+static int qseecom_send_modfd_cmd(struct qseecom_dev_handle *data,
+ void __user *argp)
+{
+ int ret = 0;
+ struct qseecom_send_modfd_cmd_req req;
+ struct qseecom_send_cmd_req send_cmd_req;
+
+ ret = copy_from_user(&req, argp, sizeof(req));
+ if (ret) {
+ pr_err("copy_from_user failed\n");
+ return ret;
+ }
+ send_cmd_req.cmd_req_buf = req.cmd_req_buf;
+ send_cmd_req.cmd_req_len = req.cmd_req_len;
+ send_cmd_req.resp_buf = req.resp_buf;
+ send_cmd_req.resp_len = req.resp_len;
+
+ ret = __qseecom_update_with_phy_addr(&req);
+ if (ret)
+ return ret;
+ if (qseecom.qseos_version == QSEOS_VERSION_14)
+ ret = __qseecom_send_cmd(data, &send_cmd_req);
+ else
+ ret = __qseecom_send_cmd_legacy(data, &send_cmd_req);
+ __qseecom_send_cmd_req_clean_up(&req);
+
+ if (ret)
+ return ret;
+
+ pr_debug("sending cmd_req->rsp size: %u, ptr: 0x%p\n",
+ req.resp_len, req.resp_buf);
+ return ret;
+}
+
+static int __qseecom_listener_has_rcvd_req(struct qseecom_dev_handle *data,
+ struct qseecom_registered_listener_list *svc)
+{
+ int ret;
+ ret = (svc->rcv_req_flag != 0);
+ return ret || data->abort;
+}
+
+static int qseecom_receive_req(struct qseecom_dev_handle *data)
+{
+ int ret = 0;
+ struct qseecom_registered_listener_list *this_lstnr;
+
+ this_lstnr = __qseecom_find_svc(data->listener.id);
+ while (1) {
+ if (wait_event_interruptible(this_lstnr->rcv_req_wq,
+ __qseecom_listener_has_rcvd_req(data,
+ this_lstnr))) {
+ pr_warning("Interrupted: exiting wait_rcv_req loop\n");
+ /* woken up for different reason */
+ return -ERESTARTSYS;
+ }
+
+ if (data->abort) {
+ pr_err("Aborting driver!\n");
+ return -ENODEV;
+ }
+ this_lstnr->rcv_req_flag = 0;
+ if (qseecom.qseos_version == QSEOS_VERSION_13) {
+ if (*((uint32_t *)this_lstnr->sb_virt) != 0)
+ break;
+ } else {
+ break;
+ }
+ }
+ return ret;
+}
+
+static int qseecom_send_resp(void)
+{
+ qseecom.send_resp_flag = 1;
+ wake_up_interruptible(&qseecom.send_resp_wq);
+ return 0;
+}
+
+static int qseecom_get_qseos_version(struct qseecom_dev_handle *data,
+ void __user *argp)
+{
+ struct qseecom_qseos_version_req req;
+
+ if (copy_from_user(&req, argp, sizeof(req))) {
+ pr_err("copy_from_user failed");
+ return -EINVAL;
+ }
+ req.qseos_version = qseecom.qseos_version;
+ if (copy_to_user(argp, &req, sizeof(req))) {
+ pr_err("copy_to_user failed");
+ return -EINVAL;
+ }
+ return 0;
+}
+
+static int qsee_vote_for_clock(void)
+{
+ int ret = 0;
+
+ if (!qsee_perf_client)
+ return -EINVAL;
+
+ /* Check if the clk is valid */
+ if (IS_ERR_OR_NULL(qseecom_bus_clk))
+ return -EINVAL;
+
+ mutex_lock(&qsee_bw_mutex);
+ if (!qsee_bw_count) {
+ ret = msm_bus_scale_client_update_request(
+ qsee_perf_client, 1);
+ if (ret) {
+ pr_err("Bandwidth request failed (%d)\n", ret);
+ } else {
+ ret = clk_enable(qseecom_bus_clk);
+ if (ret)
+ pr_err("Clock enable failed\n");
+ }
+ }
+ if (ret)
+ msm_bus_scale_client_update_request(qsee_perf_client, 0);
+ else
+ qsee_bw_count++;
+
+ mutex_unlock(&qsee_bw_mutex);
+ return ret;
+}
+
+static void qsee_disable_clock_vote(void)
+{
+
+ if (!qsee_perf_client)
+ return;
+
+ /* Check if the clk is valid */
+ if (IS_ERR_OR_NULL(qseecom_bus_clk))
+ return;
+
+ mutex_lock(&qsee_bw_mutex);
+ if (qsee_bw_count > 0) {
+ if (qsee_bw_count-- == 1) {
+ msm_bus_scale_client_update_request(qsee_perf_client,
+ 0);
+ clk_disable(qseecom_bus_clk);
+ }
+ }
+ mutex_unlock(&qsee_bw_mutex);
+}
+
+
+static long qseecom_ioctl(struct file *file, unsigned cmd,
+ unsigned long arg)
+{
+ int ret = 0;
+ struct qseecom_dev_handle *data = file->private_data;
+ void __user *argp = (void __user *) arg;
+
+ if (data->abort) {
+ pr_err("Aborting qseecom driver\n");
+ return -ENODEV;
+ }
+
+ switch (cmd) {
+ case QSEECOM_IOCTL_REGISTER_LISTENER_REQ: {
+ pr_debug("ioctl register_listener_req()\n");
+ atomic_inc(&data->ioctl_count);
+ ret = qseecom_register_listener(data, argp);
+ atomic_dec(&data->ioctl_count);
+ wake_up_all(&data->abort_wq);
+ if (ret)
+ pr_err("failed qseecom_register_listener: %d\n", ret);
+ break;
+ }
+ case QSEECOM_IOCTL_UNREGISTER_LISTENER_REQ: {
+ pr_debug("ioctl unregister_listener_req()\n");
+ atomic_inc(&data->ioctl_count);
+ ret = qseecom_unregister_listener(data);
+ atomic_dec(&data->ioctl_count);
+ wake_up_all(&data->abort_wq);
+ if (ret)
+ pr_err("failed qseecom_unregister_listener: %d\n", ret);
+ break;
+ }
+ case QSEECOM_IOCTL_SEND_CMD_REQ: {
+ /* Only one client allowed here at a time */
+ mutex_lock(&send_msg_lock);
+ atomic_inc(&data->ioctl_count);
+ ret = qseecom_send_cmd(data, argp);
+ atomic_dec(&data->ioctl_count);
+ wake_up_all(&data->abort_wq);
+ mutex_unlock(&send_msg_lock);
+ if (ret)
+ pr_err("failed qseecom_send_cmd: %d\n", ret);
+ break;
+ }
+ case QSEECOM_IOCTL_SEND_MODFD_CMD_REQ: {
+ /* Only one client allowed here at a time */
+ mutex_lock(&send_msg_lock);
+ atomic_inc(&data->ioctl_count);
+ ret = qseecom_send_modfd_cmd(data, argp);
+ atomic_dec(&data->ioctl_count);
+ wake_up_all(&data->abort_wq);
+ mutex_unlock(&send_msg_lock);
+ if (ret)
+ pr_err("failed qseecom_send_cmd: %d\n", ret);
+ break;
+ }
+ case QSEECOM_IOCTL_RECEIVE_REQ: {
+ atomic_inc(&data->ioctl_count);
+ ret = qseecom_receive_req(data);
+ atomic_dec(&data->ioctl_count);
+ wake_up_all(&data->abort_wq);
+ if (ret)
+ pr_err("failed qseecom_receive_req: %d\n", ret);
+ break;
+ }
+ case QSEECOM_IOCTL_SEND_RESP_REQ: {
+ atomic_inc(&data->ioctl_count);
+ ret = qseecom_send_resp();
+ atomic_dec(&data->ioctl_count);
+ wake_up_all(&data->abort_wq);
+ if (ret)
+ pr_err("failed qseecom_send_resp: %d\n", ret);
+ break;
+ }
+ case QSEECOM_IOCTL_SET_MEM_PARAM_REQ: {
+ ret = qseecom_set_client_mem_param(data, argp);
+ if (ret)
+ pr_err("failed Qqseecom_set_mem_param request: %d\n",
+ ret);
+ break;
+ }
+ case QSEECOM_IOCTL_LOAD_APP_REQ: {
+ mutex_lock(&app_access_lock);
+ atomic_inc(&data->ioctl_count);
+ ret = qseecom_load_app(data, argp);
+ atomic_dec(&data->ioctl_count);
+ mutex_unlock(&app_access_lock);
+ if (ret)
+ pr_err("failed load_app request: %d\n", ret);
+ break;
+ }
+ case QSEECOM_IOCTL_UNLOAD_APP_REQ: {
+ mutex_lock(&app_access_lock);
+ atomic_inc(&data->ioctl_count);
+ ret = qseecom_unload_app(data);
+ atomic_dec(&data->ioctl_count);
+ mutex_unlock(&app_access_lock);
+ if (ret)
+ pr_err("failed unload_app request: %d\n", ret);
+ break;
+ }
+ case QSEECOM_IOCTL_GET_QSEOS_VERSION_REQ: {
+ atomic_inc(&data->ioctl_count);
+ ret = qseecom_get_qseos_version(data, argp);
+ if (ret)
+ pr_err("qseecom_get_qseos_version: %d\n", ret);
+ atomic_dec(&data->ioctl_count);
+ break;
+ }
+ case QSEECOM_IOCTL_PERF_ENABLE_REQ:{
+ atomic_inc(&data->ioctl_count);
+ ret = qsee_vote_for_clock();
+ if (ret)
+ pr_err("Failed to vote for clock%d\n", ret);
+ atomic_dec(&data->ioctl_count);
+ break;
+ }
+ case QSEECOM_IOCTL_PERF_DISABLE_REQ:{
+ atomic_inc(&data->ioctl_count);
+ qsee_disable_clock_vote();
+ atomic_dec(&data->ioctl_count);
+ break;
+ }
+ default:
+ return -EINVAL;
+ }
+ return ret;
+}
+
+static int qseecom_open(struct inode *inode, struct file *file)
+{
+ int ret = 0;
+ struct qseecom_dev_handle *data;
+
+ data = kzalloc(sizeof(*data), GFP_KERNEL);
+ if (!data) {
+ pr_err("kmalloc failed\n");
+ return -ENOMEM;
+ }
+ file->private_data = data;
+ data->abort = 0;
+ data->service = false;
+ data->released = false;
+ init_waitqueue_head(&data->abort_wq);
+ atomic_set(&data->ioctl_count, 0);
+ return ret;
+}
+
+static int qseecom_release(struct inode *inode, struct file *file)
+{
+ struct qseecom_dev_handle *data = file->private_data;
+ int ret = 0;
+
+ if (data->released == false) {
+ pr_warn("data->released == false\n");
+ if (data->service)
+ ret = qseecom_unregister_listener(data);
+ else
+ ret = qseecom_unload_app(data);
+ if (ret) {
+ pr_err("Close failed\n");
+ return ret;
+ }
+ }
+ kfree(data);
+ qsee_disable_clock_vote();
+
+ return ret;
+}
+
+/* qseecom bus scaling */
+static struct msm_bus_paths qsee_bw_table[] = {
+ {
+ .vectors = (struct msm_bus_vectors[]){
+ {
+ .src = MSM_BUS_MASTER_SPS,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ },
+ },
+ .num_paths = 1,
+ },
+ {
+ .vectors = (struct msm_bus_vectors[]){
+ {
+ .src = MSM_BUS_MASTER_SPS,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ib = (492 * 8) * 1000000UL,
+ .ab = (492 * 8) * 100000UL,
+ },
+ },
+ .num_paths = 1,
+ },
+};
+
+static struct msm_bus_scale_pdata qsee_bus_pdata = {
+ .usecase = qsee_bw_table,
+ .num_usecases = ARRAY_SIZE(qsee_bw_table),
+ .name = "qsee",
+};
+
+static const struct file_operations qseecom_fops = {
+ .owner = THIS_MODULE,
+ .unlocked_ioctl = qseecom_ioctl,
+ .open = qseecom_open,
+ .release = qseecom_release
+};
+
+static int __init qseecom_init(void)
+{
+ int rc;
+ struct device *class_dev;
+ char qsee_not_legacy = 0;
+ uint32_t system_call_id = QSEOS_CHECK_VERSION_CMD;
+
+ rc = alloc_chrdev_region(&qseecom_device_no, 0, 1, QSEECOM_DEV);
+ if (rc < 0) {
+ pr_err("alloc_chrdev_region failed %d\n", rc);
+ return rc;
+ }
+
+ driver_class = class_create(THIS_MODULE, QSEECOM_DEV);
+ if (IS_ERR(driver_class)) {
+ rc = -ENOMEM;
+ pr_err("class_create failed %d\n", rc);
+ goto unregister_chrdev_region;
+ }
+
+ class_dev = device_create(driver_class, NULL, qseecom_device_no, NULL,
+ QSEECOM_DEV);
+ if (!class_dev) {
+ pr_err("class_device_create failed %d\n", rc);
+ rc = -ENOMEM;
+ goto class_destroy;
+ }
+
+ cdev_init(&qseecom_cdev, &qseecom_fops);
+ qseecom_cdev.owner = THIS_MODULE;
+
+ rc = cdev_add(&qseecom_cdev, MKDEV(MAJOR(qseecom_device_no), 0), 1);
+ if (rc < 0) {
+ pr_err("cdev_add failed %d\n", rc);
+ goto err;
+ }
+
+ INIT_LIST_HEAD(&qseecom.registered_listener_list_head);
+ spin_lock_init(&qseecom.registered_listener_list_lock);
+ INIT_LIST_HEAD(&qseecom.registered_app_list_head);
+ spin_lock_init(&qseecom.registered_app_list_lock);
+ init_waitqueue_head(&qseecom.send_resp_wq);
+ qseecom.send_resp_flag = 0;
+
+ rc = scm_call(6, 1, &system_call_id, sizeof(system_call_id),
+ &qsee_not_legacy, sizeof(qsee_not_legacy));
+ if (rc) {
+ pr_err("Failed to retrieve QSEE version information %d\n", rc);
+ goto err;
+ }
+ if (qsee_not_legacy)
+ qseecom.qseos_version = QSEOS_VERSION_14;
+ else {
+ qseecom.qseos_version = QSEOS_VERSION_13;
+ pil = NULL;
+ pil_ref_cnt = 0;
+ }
+ /* Create ION msm client */
+ qseecom.ion_clnt = msm_ion_client_create(0x03, "qseecom-kernel");
+ if (qseecom.ion_clnt == NULL) {
+ pr_err("Ion client cannot be created\n");
+ rc = -ENOMEM;
+ goto err;
+ }
+
+ /* register client for bus scaling */
+ qsee_perf_client = msm_bus_scale_register_client(
+ &qsee_bus_pdata);
+ if (!qsee_perf_client) {
+ pr_err("Unable to register bus client\n");
+
+ qseecom_bus_clk = clk_get(class_dev, "qseecom");
+ if (IS_ERR(qseecom_bus_clk)) {
+ qseecom_bus_clk = NULL;
+ } else if (qseecom_bus_clk != NULL) {
+ pr_debug("Enabled DFAB clock");
+ clk_set_rate(qseecom_bus_clk, 64000000);
+ }
+ }
+ return 0;
+
+err:
+ device_destroy(driver_class, qseecom_device_no);
+class_destroy:
+ class_destroy(driver_class);
+unregister_chrdev_region:
+ unregister_chrdev_region(qseecom_device_no, 1);
+ return rc;
+}
+
+static void __exit qseecom_exit(void)
+{
+ clk_put(qseecom_bus_clk);
+
+ device_destroy(driver_class, qseecom_device_no);
+ class_destroy(driver_class);
+ unregister_chrdev_region(qseecom_device_no, 1);
+ ion_client_destroy(qseecom.ion_clnt);
+}
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Qualcomm Secure Execution Environment Communicator");
+
+module_init(qseecom_init);
+module_exit(qseecom_exit);
diff --git a/drivers/misc/qseecom_legacy.h b/drivers/misc/qseecom_legacy.h
new file mode 100644
index 0000000..66f87e9
--- /dev/null
+++ b/drivers/misc/qseecom_legacy.h
@@ -0,0 +1,79 @@
+/* Qualcomm Secure Execution Environment Communicator (QSEECOM) driver
+ *
+ * Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __QSEECOM_LEGACY_H_
+#define __QSEECOM_LEGACY_H_
+
+#include <linux/types.h>
+
+#define TZ_SCHED_CMD_ID_REGISTER_LISTENER 0x04
+
+enum tz_sched_cmd_type {
+ TZ_SCHED_CMD_INVALID = 0,
+ TZ_SCHED_CMD_NEW, /* New TZ Scheduler Command */
+ TZ_SCHED_CMD_PENDING, /* Pending cmd...sched will restore stack */
+ TZ_SCHED_CMD_COMPLETE, /* TZ sched command is complete */
+ TZ_SCHED_CMD_MAX = 0x7FFFFFFF
+};
+
+enum tz_sched_cmd_status {
+ TZ_SCHED_STATUS_INCOMPLETE = 0,
+ TZ_SCHED_STATUS_COMPLETE,
+ TZ_SCHED_STATUS_MAX = 0x7FFFFFFF
+};
+/* Command structure for initializing shared buffers */
+__packed struct qse_pr_init_sb_req_s {
+ /* First 4 bytes should always be command id */
+ uint32_t pr_cmd;
+ /* Pointer to the physical location of sb buffer */
+ uint32_t sb_ptr;
+ /* length of shared buffer */
+ uint32_t sb_len;
+ uint32_t listener_id;
+};
+
+__packed struct qse_pr_init_sb_rsp_s {
+ /* First 4 bytes should always be command id */
+ uint32_t pr_cmd;
+ /* Return code, 0 for success, Approp error code otherwise */
+ int32_t ret;
+};
+
+/*
+ * struct QSEECom_command - QSECom command buffer
+ * @cmd_type: value from enum tz_sched_cmd_type
+ * @sb_in_cmd_addr: points to physical location of command
+ * buffer
+ * @sb_in_cmd_len: length of command buffer
+ */
+__packed struct qseecom_command {
+ uint32_t cmd_type;
+ uint8_t *sb_in_cmd_addr;
+ uint32_t sb_in_cmd_len;
+};
+
+/*
+ * struct QSEECom_response - QSECom response buffer
+ * @cmd_status: value from enum tz_sched_cmd_status
+ * @sb_in_rsp_addr: points to physical location of response
+ * buffer
+ * @sb_in_rsp_len: length of command response
+ */
+__packed struct qseecom_response {
+ uint32_t cmd_status;
+ uint8_t *sb_in_rsp_addr;
+ uint32_t sb_in_rsp_len;
+};
+
+#endif /* __QSEECOM_LEGACY_H_ */
diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c
index 48f3f2d..4634e75 100644
--- a/drivers/mmc/card/block.c
+++ b/drivers/mmc/card/block.c
@@ -94,6 +94,11 @@
unsigned int read_only;
unsigned int part_type;
unsigned int name_idx;
+ unsigned int reset_done;
+#define MMC_BLK_READ BIT(0)
+#define MMC_BLK_WRITE BIT(1)
+#define MMC_BLK_DISCARD BIT(2)
+#define MMC_BLK_SECDISCARD BIT(3)
/*
* Only set in main mmc_blk_data associated
@@ -106,6 +111,16 @@
static DEFINE_MUTEX(open_lock);
+enum mmc_blk_status {
+ MMC_BLK_SUCCESS = 0,
+ MMC_BLK_PARTIAL,
+ MMC_BLK_CMD_ERR,
+ MMC_BLK_RETRY,
+ MMC_BLK_ABORT,
+ MMC_BLK_DATA_ERR,
+ MMC_BLK_ECC_ERR,
+};
+
module_param(perdev_minors, int, 0444);
MODULE_PARM_DESC(perdev_minors, "Minors numbers to allocate per device");
@@ -277,7 +292,7 @@
struct mmc_card *card;
struct mmc_command cmd = {0};
struct mmc_data data = {0};
- struct mmc_request mrq = {0};
+ struct mmc_request mrq = {NULL};
struct scatterlist sg;
int err;
@@ -423,32 +438,29 @@
#endif
};
-struct mmc_blk_request {
- struct mmc_request mrq;
- struct mmc_command sbc;
- struct mmc_command cmd;
- struct mmc_command stop;
- struct mmc_data data;
-};
-
static inline int mmc_blk_part_switch(struct mmc_card *card,
struct mmc_blk_data *md)
{
int ret;
struct mmc_blk_data *main_md = mmc_get_drvdata(card);
+
if (main_md->part_curr == md->part_type)
return 0;
if (mmc_card_mmc(card)) {
- card->ext_csd.part_config &= ~EXT_CSD_PART_CONFIG_ACC_MASK;
- card->ext_csd.part_config |= md->part_type;
+ u8 part_config = card->ext_csd.part_config;
+
+ part_config &= ~EXT_CSD_PART_CONFIG_ACC_MASK;
+ part_config |= md->part_type;
ret = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
- EXT_CSD_PART_CONFIG, card->ext_csd.part_config,
+ EXT_CSD_PART_CONFIG, part_config,
card->ext_csd.part_time);
if (ret)
return ret;
-}
+
+ card->ext_csd.part_config = part_config;
+ }
main_md->part_curr = md->part_type;
return 0;
@@ -460,7 +472,7 @@
u32 result;
__be32 *blocks;
- struct mmc_request mrq = {0};
+ struct mmc_request mrq = {NULL};
struct mmc_command cmd = {0};
struct mmc_data data = {0};
unsigned int timeout_us;
@@ -615,7 +627,7 @@
* Otherwise we don't understand what happened, so abort.
*/
static int mmc_blk_cmd_recovery(struct mmc_card *card, struct request *req,
- struct mmc_blk_request *brq)
+ struct mmc_blk_request *brq, int *ecc_err)
{
bool prev_cmd_status_valid = true;
u32 status, stop_status = 0;
@@ -647,6 +659,12 @@
return ERR_ABORT;
}
+ /* Flag ECC errors */
+ if ((status & R1_CARD_ECC_FAILED) ||
+ (brq->stop.resp[0] & R1_CARD_ECC_FAILED) ||
+ (brq->cmd.resp[0] & R1_CARD_ECC_FAILED))
+ *ecc_err = 1;
+
/*
* Check the current card state. If it is in some data transfer
* mode, tell it to stop (and hopefully transition back to TRAN.)
@@ -664,6 +682,8 @@
*/
if (err)
return ERR_ABORT;
+ if (stop_status & R1_CARD_ECC_FAILED)
+ *ecc_err = 1;
}
/* Check for set block count errors */
@@ -676,6 +696,10 @@
return mmc_blk_cmd_error(req, "r/w cmd", brq->cmd.error,
prev_cmd_status_valid, status);
+ /* Data errors */
+ if (!brq->stop.error)
+ return ERR_CONTINUE;
+
/* Now for stop errors. These aren't fatal to the transfer. */
pr_err("%s: error %d sending stop command, original cmd response %#x, card status %#x\n",
req->rq_disk->disk_name, brq->stop.error,
@@ -692,12 +716,45 @@
return ERR_CONTINUE;
}
+static int mmc_blk_reset(struct mmc_blk_data *md, struct mmc_host *host,
+ int type)
+{
+ int err;
+
+ if (md->reset_done & type)
+ return -EEXIST;
+
+ md->reset_done |= type;
+ err = mmc_hw_reset(host);
+ /* Ensure we switch back to the correct partition */
+ if (err != -EOPNOTSUPP) {
+ struct mmc_blk_data *main_md = mmc_get_drvdata(host->card);
+ int part_err;
+
+ main_md->part_curr = main_md->part_type;
+ part_err = mmc_blk_part_switch(host->card, md);
+ if (part_err) {
+ /*
+ * We have failed to get back into the correct
+ * partition, so we need to abort the whole request.
+ */
+ return -ENODEV;
+ }
+ }
+ return err;
+}
+
+static inline void mmc_blk_reset_success(struct mmc_blk_data *md, int type)
+{
+ md->reset_done &= ~type;
+}
+
static int mmc_blk_issue_discard_rq(struct mmc_queue *mq, struct request *req)
{
struct mmc_blk_data *md = mq->data;
struct mmc_card *card = md->queue.card;
unsigned int from, nr, arg;
- int err = 0;
+ int err = 0, type = MMC_BLK_DISCARD;
if (!mmc_can_erase(card)) {
err = -EOPNOTSUPP;
@@ -707,11 +764,13 @@
from = blk_rq_pos(req);
nr = blk_rq_sectors(req);
- if (mmc_can_trim(card))
+ if (mmc_can_discard(card))
+ arg = MMC_DISCARD_ARG;
+ else if (mmc_can_trim(card))
arg = MMC_TRIM_ARG;
else
arg = MMC_ERASE_ARG;
-
+retry:
if (card->quirks & MMC_QUIRK_INAND_CMD38) {
err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
INAND_CMD38_ARG_EXT_CSD,
@@ -724,6 +783,10 @@
}
err = mmc_erase(card, from, nr, arg);
out:
+ if (err == -EIO && !mmc_blk_reset(md, card->host, type))
+ goto retry;
+ if (!err)
+ mmc_blk_reset_success(md, type);
spin_lock_irq(&md->lock);
__blk_end_request(req, err, blk_rq_bytes(req));
spin_unlock_irq(&md->lock);
@@ -737,13 +800,20 @@
struct mmc_blk_data *md = mq->data;
struct mmc_card *card = md->queue.card;
unsigned int from, nr, arg;
- int err = 0;
+ int err = 0, type = MMC_BLK_SECDISCARD;
- if (!mmc_can_secure_erase_trim(card)) {
+ if (!(mmc_can_secure_erase_trim(card) || mmc_can_sanitize(card))) {
err = -EOPNOTSUPP;
goto out;
}
+ /* The sanitize operation is supported at v4.5 only */
+ if (mmc_can_sanitize(card)) {
+ err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
+ EXT_CSD_SANITIZE_START, 1, 0);
+ goto out;
+ }
+
from = blk_rq_pos(req);
nr = blk_rq_sectors(req);
@@ -751,7 +821,7 @@
arg = MMC_SECURE_TRIM1_ARG;
else
arg = MMC_SECURE_ERASE_ARG;
-
+retry:
if (card->quirks & MMC_QUIRK_INAND_CMD38) {
err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
INAND_CMD38_ARG_EXT_CSD,
@@ -775,6 +845,10 @@
err = mmc_erase(card, from, nr, MMC_SECURE_TRIM2_ARG);
}
out:
+ if (err == -EIO && !mmc_blk_reset(md, card->host, type))
+ goto retry;
+ if (!err)
+ mmc_blk_reset_success(md, type);
spin_lock_irq(&md->lock);
__blk_end_request(req, err, blk_rq_bytes(req));
spin_unlock_irq(&md->lock);
@@ -785,16 +859,18 @@
static int mmc_blk_issue_flush(struct mmc_queue *mq, struct request *req)
{
struct mmc_blk_data *md = mq->data;
+ struct mmc_card *card = md->queue.card;
+ int ret = 0;
- /*
- * No-op, only service this because we need REQ_FUA for reliable
- * writes.
- */
+ ret = mmc_flush_cache(card);
+ if (ret)
+ ret = -EIO;
+
spin_lock_irq(&md->lock);
- __blk_end_request_all(req, 0);
+ __blk_end_request_all(req, ret);
spin_unlock_irq(&md->lock);
- return 1;
+ return ret ? 0 : 1;
}
/*
@@ -828,12 +904,106 @@
R1_CC_ERROR | /* Card controller error */ \
R1_ERROR) /* General/unknown error */
-static int mmc_blk_issue_rw_rq(struct mmc_queue *mq, struct request *req)
+static int mmc_blk_err_check(struct mmc_card *card,
+ struct mmc_async_req *areq)
{
+ struct mmc_queue_req *mq_mrq = container_of(areq, struct mmc_queue_req,
+ mmc_active);
+ struct mmc_blk_request *brq = &mq_mrq->brq;
+ struct request *req = mq_mrq->req;
+ int ecc_err = 0;
+
+ /*
+ * sbc.error indicates a problem with the set block count
+ * command. No data will have been transferred.
+ *
+ * cmd.error indicates a problem with the r/w command. No
+ * data will have been transferred.
+ *
+ * stop.error indicates a problem with the stop command. Data
+ * may have been transferred, or may still be transferring.
+ */
+ if (brq->sbc.error || brq->cmd.error || brq->stop.error ||
+ brq->data.error) {
+ switch (mmc_blk_cmd_recovery(card, req, brq, &ecc_err)) {
+ case ERR_RETRY:
+ return MMC_BLK_RETRY;
+ case ERR_ABORT:
+ case ERR_NOMEDIUM:
+ return MMC_BLK_ABORT;
+ case ERR_CONTINUE:
+ break;
+ }
+ }
+
+ /*
+ * Check for errors relating to the execution of the
+ * initial command - such as address errors. No data
+ * has been transferred.
+ */
+ if (brq->cmd.resp[0] & CMD_ERRORS) {
+ pr_err("%s: r/w command failed, status = %#x\n",
+ req->rq_disk->disk_name, brq->cmd.resp[0]);
+ return MMC_BLK_ABORT;
+ }
+
+ /*
+ * Everything else is either success, or a data error of some
+ * kind. If it was a write, we may have transitioned to
+ * program mode, which we have to wait for it to complete.
+ */
+ if (!mmc_host_is_spi(card->host) && rq_data_dir(req) != READ) {
+ u32 status;
+ do {
+ int err = get_card_status(card, &status, 5);
+ if (err) {
+ printk(KERN_ERR "%s: error %d requesting status\n",
+ req->rq_disk->disk_name, err);
+ return MMC_BLK_CMD_ERR;
+ }
+ /*
+ * Some cards mishandle the status bits,
+ * so make sure to check both the busy
+ * indication and the card state.
+ */
+ } while (!(status & R1_READY_FOR_DATA) ||
+ (R1_CURRENT_STATE(status) == R1_STATE_PRG));
+ }
+
+ if (brq->data.error) {
+ pr_err("%s: error %d transferring data, sector %u, nr %u, cmd response %#x, card status %#x\n",
+ req->rq_disk->disk_name, brq->data.error,
+ (unsigned)blk_rq_pos(req),
+ (unsigned)blk_rq_sectors(req),
+ brq->cmd.resp[0], brq->stop.resp[0]);
+
+ if (rq_data_dir(req) == READ) {
+ if (ecc_err)
+ return MMC_BLK_ECC_ERR;
+ return MMC_BLK_DATA_ERR;
+ } else {
+ return MMC_BLK_CMD_ERR;
+ }
+ }
+
+ if (!brq->data.bytes_xfered)
+ return MMC_BLK_RETRY;
+
+ if (blk_rq_bytes(req) != brq->data.bytes_xfered)
+ return MMC_BLK_PARTIAL;
+
+ return MMC_BLK_SUCCESS;
+}
+
+static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq,
+ struct mmc_card *card,
+ int disable_multi,
+ struct mmc_queue *mq)
+{
+ u32 readcmd, writecmd;
+ struct mmc_blk_request *brq = &mqrq->brq;
+ struct request *req = mqrq->req;
struct mmc_blk_data *md = mq->data;
- struct mmc_card *card = md->queue.card;
- struct mmc_blk_request brq;
- int ret = 1, disable_multi = 0, retry = 0;
/*
* Reliable writes are used to implement Forced Unit Access and
@@ -844,225 +1014,135 @@
(rq_data_dir(req) == WRITE) &&
(md->flags & MMC_BLK_REL_WR);
- do {
- u32 readcmd, writecmd;
+ memset(brq, 0, sizeof(struct mmc_blk_request));
+ brq->mrq.cmd = &brq->cmd;
+ brq->mrq.data = &brq->data;
- memset(&brq, 0, sizeof(struct mmc_blk_request));
- brq.mrq.cmd = &brq.cmd;
- brq.mrq.data = &brq.data;
+ brq->cmd.arg = blk_rq_pos(req);
+ if (!mmc_card_blockaddr(card))
+ brq->cmd.arg <<= 9;
+ brq->cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC;
+ brq->data.blksz = 512;
+ brq->stop.opcode = MMC_STOP_TRANSMISSION;
+ brq->stop.arg = 0;
+ brq->stop.flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC;
+ brq->data.blocks = blk_rq_sectors(req);
- brq.cmd.arg = blk_rq_pos(req);
- if (!mmc_card_blockaddr(card))
- brq.cmd.arg <<= 9;
- brq.cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC;
- brq.data.blksz = 512;
- brq.stop.opcode = MMC_STOP_TRANSMISSION;
- brq.stop.arg = 0;
- brq.stop.flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC;
- brq.data.blocks = blk_rq_sectors(req);
+ /*
+ * The block layer doesn't support all sector count
+ * restrictions, so we need to be prepared for too big
+ * requests.
+ */
+ if (brq->data.blocks > card->host->max_blk_count)
+ brq->data.blocks = card->host->max_blk_count;
+ if (brq->data.blocks > 1) {
/*
- * The block layer doesn't support all sector count
- * restrictions, so we need to be prepared for too big
- * requests.
+ * After a read error, we redo the request one sector
+ * at a time in order to accurately determine which
+ * sectors can be read successfully.
*/
- if (brq.data.blocks > card->host->max_blk_count)
- brq.data.blocks = card->host->max_blk_count;
+ if (disable_multi)
+ brq->data.blocks = 1;
- /*
- * After a read error, we redo the request one sector at a time
- * in order to accurately determine which sectors can be read
- * successfully.
+ /* Some controllers can't do multiblock reads due to hw bugs */
+ if (card->host->caps2 & MMC_CAP2_NO_MULTI_READ &&
+ rq_data_dir(req) == READ)
+ brq->data.blocks = 1;
+ }
+
+ if (brq->data.blocks > 1 || do_rel_wr) {
+ /* SPI multiblock writes terminate using a special
+ * token, not a STOP_TRANSMISSION request.
*/
- if (disable_multi && brq.data.blocks > 1)
- brq.data.blocks = 1;
+ if (!mmc_host_is_spi(card->host) ||
+ rq_data_dir(req) == READ)
+ brq->mrq.stop = &brq->stop;
+ readcmd = MMC_READ_MULTIPLE_BLOCK;
+ writecmd = MMC_WRITE_MULTIPLE_BLOCK;
+ } else {
+ brq->mrq.stop = NULL;
+ readcmd = MMC_READ_SINGLE_BLOCK;
+ writecmd = MMC_WRITE_BLOCK;
+ }
+ if (rq_data_dir(req) == READ) {
+ brq->cmd.opcode = readcmd;
+ brq->data.flags |= MMC_DATA_READ;
+ } else {
+ brq->cmd.opcode = writecmd;
+ brq->data.flags |= MMC_DATA_WRITE;
+ }
- if (brq.data.blocks > 1 || do_rel_wr) {
- /* SPI multiblock writes terminate using a special
- * token, not a STOP_TRANSMISSION request.
- */
- if (!mmc_host_is_spi(card->host) ||
- rq_data_dir(req) == READ)
- brq.mrq.stop = &brq.stop;
- readcmd = MMC_READ_MULTIPLE_BLOCK;
- writecmd = MMC_WRITE_MULTIPLE_BLOCK;
- } else {
- brq.mrq.stop = NULL;
- readcmd = MMC_READ_SINGLE_BLOCK;
- writecmd = MMC_WRITE_BLOCK;
- }
- if (rq_data_dir(req) == READ) {
- brq.cmd.opcode = readcmd;
- brq.data.flags |= MMC_DATA_READ;
- } else {
- brq.cmd.opcode = writecmd;
- brq.data.flags |= MMC_DATA_WRITE;
- }
+ if (do_rel_wr)
+ mmc_apply_rel_rw(brq, card, req);
- if (do_rel_wr)
- mmc_apply_rel_rw(&brq, card, req);
+ /*
+ * Pre-defined multi-block transfers are preferable to
+ * open ended-ones (and necessary for reliable writes).
+ * However, it is not sufficient to just send CMD23,
+ * and avoid the final CMD12, as on an error condition
+ * CMD12 (stop) needs to be sent anyway. This, coupled
+ * with Auto-CMD23 enhancements provided by some
+ * hosts, means that the complexity of dealing
+ * with this is best left to the host. If CMD23 is
+ * supported by card and host, we'll fill sbc in and let
+ * the host deal with handling it correctly. This means
+ * that for hosts that don't expose MMC_CAP_CMD23, no
+ * change of behavior will be observed.
+ *
+ * N.B: Some MMC cards experience perf degradation.
+ * We'll avoid using CMD23-bounded multiblock writes for
+ * these, while retaining features like reliable writes.
+ */
- /*
- * Pre-defined multi-block transfers are preferable to
- * open ended-ones (and necessary for reliable writes).
- * However, it is not sufficient to just send CMD23,
- * and avoid the final CMD12, as on an error condition
- * CMD12 (stop) needs to be sent anyway. This, coupled
- * with Auto-CMD23 enhancements provided by some
- * hosts, means that the complexity of dealing
- * with this is best left to the host. If CMD23 is
- * supported by card and host, we'll fill sbc in and let
- * the host deal with handling it correctly. This means
- * that for hosts that don't expose MMC_CAP_CMD23, no
- * change of behavior will be observed.
- *
- * N.B: Some MMC cards experience perf degradation.
- * We'll avoid using CMD23-bounded multiblock writes for
- * these, while retaining features like reliable writes.
- */
+ if ((md->flags & MMC_BLK_CMD23) &&
+ mmc_op_multi(brq->cmd.opcode) &&
+ (do_rel_wr || !(card->quirks & MMC_QUIRK_BLK_NO_CMD23))) {
+ brq->sbc.opcode = MMC_SET_BLOCK_COUNT;
+ brq->sbc.arg = brq->data.blocks |
+ (do_rel_wr ? (1 << 31) : 0);
+ brq->sbc.flags = MMC_RSP_R1 | MMC_CMD_AC;
+ brq->mrq.sbc = &brq->sbc;
+ }
- if ((md->flags & MMC_BLK_CMD23) &&
- mmc_op_multi(brq.cmd.opcode) &&
- (do_rel_wr || !(card->quirks & MMC_QUIRK_BLK_NO_CMD23))) {
- brq.sbc.opcode = MMC_SET_BLOCK_COUNT;
- brq.sbc.arg = brq.data.blocks |
- (do_rel_wr ? (1 << 31) : 0);
- brq.sbc.flags = MMC_RSP_R1 | MMC_CMD_AC;
- brq.mrq.sbc = &brq.sbc;
- }
+ mmc_set_data_timeout(&brq->data, card);
- mmc_set_data_timeout(&brq.data, card);
+ brq->data.sg = mqrq->sg;
+ brq->data.sg_len = mmc_queue_map_sg(mq, mqrq);
- brq.data.sg = mq->sg;
- brq.data.sg_len = mmc_queue_map_sg(mq);
+ /*
+ * Adjust the sg list so it is the same size as the
+ * request.
+ */
+ if (brq->data.blocks != blk_rq_sectors(req)) {
+ int i, data_size = brq->data.blocks << 9;
+ struct scatterlist *sg;
- /*
- * Adjust the sg list so it is the same size as the
- * request.
- */
- if (brq.data.blocks != blk_rq_sectors(req)) {
- int i, data_size = brq.data.blocks << 9;
- struct scatterlist *sg;
-
- for_each_sg(brq.data.sg, sg, brq.data.sg_len, i) {
- data_size -= sg->length;
- if (data_size <= 0) {
- sg->length += data_size;
- i++;
- break;
- }
- }
- brq.data.sg_len = i;
- }
-
- mmc_queue_bounce_pre(mq);
-
- mmc_wait_for_req(card->host, &brq.mrq);
-
- mmc_queue_bounce_post(mq);
-
- /*
- * sbc.error indicates a problem with the set block count
- * command. No data will have been transferred.
- *
- * cmd.error indicates a problem with the r/w command. No
- * data will have been transferred.
- *
- * stop.error indicates a problem with the stop command. Data
- * may have been transferred, or may still be transferring.
- */
- if (brq.sbc.error || brq.cmd.error || brq.stop.error) {
- switch (mmc_blk_cmd_recovery(card, req, &brq)) {
- case ERR_RETRY:
- if (retry++ < 5)
- continue;
- case ERR_ABORT:
- case ERR_NOMEDIUM:
- goto cmd_abort;
- case ERR_CONTINUE:
+ for_each_sg(brq->data.sg, sg, brq->data.sg_len, i) {
+ data_size -= sg->length;
+ if (data_size <= 0) {
+ sg->length += data_size;
+ i++;
break;
}
}
+ brq->data.sg_len = i;
+ }
- /*
- * Check for errors relating to the execution of the
- * initial command - such as address errors. No data
- * has been transferred.
- */
- if (brq.cmd.resp[0] & CMD_ERRORS) {
- pr_err("%s: r/w command failed, status = %#x\n",
- req->rq_disk->disk_name, brq.cmd.resp[0]);
- goto cmd_abort;
- }
+ mqrq->mmc_active.mrq = &brq->mrq;
+ mqrq->mmc_active.err_check = mmc_blk_err_check;
- /*
- * Everything else is either success, or a data error of some
- * kind. If it was a write, we may have transitioned to
- * program mode, which we have to wait for it to complete.
- */
- if (!mmc_host_is_spi(card->host) && rq_data_dir(req) != READ) {
- u32 status;
- do {
- int err = get_card_status(card, &status, 5);
- if (err) {
- printk(KERN_ERR "%s: error %d requesting status\n",
- req->rq_disk->disk_name, err);
- goto cmd_err;
- }
- /*
- * Some cards mishandle the status bits,
- * so make sure to check both the busy
- * indication and the card state.
- */
- } while (!(status & R1_READY_FOR_DATA) ||
- (R1_CURRENT_STATE(status) == R1_STATE_PRG));
- }
+ mmc_queue_bounce_pre(mqrq);
+}
- if (brq.data.error) {
- pr_err("%s: error %d transferring data, sector %u, nr %u, cmd response %#x, card status %#x\n",
- req->rq_disk->disk_name, brq.data.error,
- (unsigned)blk_rq_pos(req),
- (unsigned)blk_rq_sectors(req),
- brq.cmd.resp[0], brq.stop.resp[0]);
-
- if (rq_data_dir(req) == READ) {
- if (brq.data.blocks > 1) {
- /* Redo read one sector at a time */
- pr_warning("%s: retrying using single block read\n",
- req->rq_disk->disk_name);
- disable_multi = 1;
- continue;
- }
-
- /*
- * After an error, we redo I/O one sector at a
- * time, so we only reach here after trying to
- * read a single sector.
- */
- spin_lock_irq(&md->lock);
- ret = __blk_end_request(req, -EIO, brq.data.blksz);
- spin_unlock_irq(&md->lock);
- continue;
- } else {
- goto cmd_err;
- }
- }
-
- /*
- * A block was successfully transferred.
- */
- spin_lock_irq(&md->lock);
- ret = __blk_end_request(req, 0, brq.data.bytes_xfered);
- spin_unlock_irq(&md->lock);
- } while (ret);
-
- return 1;
-
- cmd_err:
- /*
- * If this is an SD card and we're writing, we can first
- * mark the known good sectors as ok.
- *
+static int mmc_blk_cmd_err(struct mmc_blk_data *md, struct mmc_card *card,
+ struct mmc_blk_request *brq, struct request *req,
+ int ret)
+{
+ /*
+ * If this is an SD card and we're writing, we can first
+ * mark the known good sectors as ok.
+ *
* If the card is not SD, we can still ok written sectors
* as reported by the controller (which might be less than
* the real number of written sectors, but never more).
@@ -1078,9 +1158,122 @@
}
} else {
spin_lock_irq(&md->lock);
- ret = __blk_end_request(req, 0, brq.data.bytes_xfered);
+ ret = __blk_end_request(req, 0, brq->data.bytes_xfered);
spin_unlock_irq(&md->lock);
}
+ return ret;
+}
+
+static int mmc_blk_issue_rw_rq(struct mmc_queue *mq, struct request *rqc)
+{
+ struct mmc_blk_data *md = mq->data;
+ struct mmc_card *card = md->queue.card;
+ struct mmc_blk_request *brq = &mq->mqrq_cur->brq;
+ int ret = 1, disable_multi = 0, retry = 0, type;
+ enum mmc_blk_status status;
+ struct mmc_queue_req *mq_rq;
+ struct request *req;
+ struct mmc_async_req *areq;
+
+ if (!rqc && !mq->mqrq_prev->req)
+ return 0;
+
+ do {
+ if (rqc) {
+ mmc_blk_rw_rq_prep(mq->mqrq_cur, card, 0, mq);
+ areq = &mq->mqrq_cur->mmc_active;
+ } else
+ areq = NULL;
+ areq = mmc_start_req(card->host, areq, (int *) &status);
+ if (!areq)
+ return 0;
+
+ mq_rq = container_of(areq, struct mmc_queue_req, mmc_active);
+ brq = &mq_rq->brq;
+ req = mq_rq->req;
+ type = rq_data_dir(req) == READ ? MMC_BLK_READ : MMC_BLK_WRITE;
+ mmc_queue_bounce_post(mq_rq);
+
+ switch (status) {
+ case MMC_BLK_SUCCESS:
+ case MMC_BLK_PARTIAL:
+ /*
+ * A block was successfully transferred.
+ */
+ mmc_blk_reset_success(md, type);
+ spin_lock_irq(&md->lock);
+ ret = __blk_end_request(req, 0,
+ brq->data.bytes_xfered);
+ spin_unlock_irq(&md->lock);
+ /*
+ * If the blk_end_request function returns non-zero even
+ * though all data has been transferred and no errors
+ * were returned by the host controller, it's a bug.
+ */
+ if (status == MMC_BLK_SUCCESS && ret) {
+ printk(KERN_ERR "%s BUG rq_tot %d d_xfer %d\n",
+ __func__, blk_rq_bytes(req),
+ brq->data.bytes_xfered);
+ rqc = NULL;
+ goto cmd_abort;
+ }
+ break;
+ case MMC_BLK_CMD_ERR:
+ ret = mmc_blk_cmd_err(md, card, brq, req, ret);
+ if (!mmc_blk_reset(md, card->host, type))
+ break;
+ goto cmd_abort;
+ case MMC_BLK_RETRY:
+ if (retry++ < 5)
+ break;
+ /* Fall through */
+ case MMC_BLK_ABORT:
+ if (!mmc_blk_reset(md, card->host, type))
+ break;
+ goto cmd_abort;
+ case MMC_BLK_DATA_ERR: {
+ int err;
+
+ err = mmc_blk_reset(md, card->host, type);
+ if (!err)
+ break;
+ if (err == -ENODEV)
+ goto cmd_abort;
+ /* Fall through */
+ }
+ case MMC_BLK_ECC_ERR:
+ if (brq->data.blocks > 1) {
+ /* Redo read one sector at a time */
+ pr_warning("%s: retrying using single block read\n",
+ req->rq_disk->disk_name);
+ disable_multi = 1;
+ break;
+ }
+ /*
+ * After an error, we redo I/O one sector at a
+ * time, so we only reach here after trying to
+ * read a single sector.
+ */
+ spin_lock_irq(&md->lock);
+ ret = __blk_end_request(req, -EIO,
+ brq->data.blksz);
+ spin_unlock_irq(&md->lock);
+ if (!ret)
+ goto start_new_req;
+ break;
+ }
+
+ if (ret) {
+ /*
+ * In case of a incomplete request
+ * prepare it again and resend.
+ */
+ mmc_blk_rw_rq_prep(mq_rq, card, disable_multi, mq);
+ mmc_start_req(card->host, &mq_rq->mmc_active, NULL);
+ }
+ } while (ret);
+
+ return 1;
cmd_abort:
spin_lock_irq(&md->lock);
@@ -1090,6 +1283,12 @@
ret = __blk_end_request(req, -EIO, blk_rq_cur_bytes(req));
spin_unlock_irq(&md->lock);
+ start_new_req:
+ if (rqc) {
+ mmc_blk_rw_rq_prep(mq->mqrq_cur, card, 0, mq);
+ mmc_start_req(card->host, &mq->mqrq_cur->mmc_active, NULL);
+ }
+
return 0;
}
@@ -1109,26 +1308,42 @@
}
#endif
- mmc_claim_host(card->host);
+ if (req && !mq->mqrq_prev->req)
+ /* claim host only for the first request */
+ mmc_claim_host(card->host);
+
ret = mmc_blk_part_switch(card, md);
if (ret) {
+ if (req) {
+ spin_lock_irq(&md->lock);
+ __blk_end_request_all(req, -EIO);
+ spin_unlock_irq(&md->lock);
+ }
ret = 0;
goto out;
}
- if (req->cmd_flags & REQ_DISCARD) {
+ if (req && req->cmd_flags & REQ_DISCARD) {
+ /* complete ongoing async transfer before issuing discard */
+ if (card->host->areq)
+ mmc_blk_issue_rw_rq(mq, NULL);
if (req->cmd_flags & REQ_SECURE)
ret = mmc_blk_issue_secdiscard_rq(mq, req);
else
ret = mmc_blk_issue_discard_rq(mq, req);
- } else if (req->cmd_flags & REQ_FLUSH) {
+ } else if (req && req->cmd_flags & REQ_FLUSH) {
+ /* complete ongoing async transfer before issuing flush */
+ if (card->host->areq)
+ mmc_blk_issue_rw_rq(mq, NULL);
ret = mmc_blk_issue_flush(mq, req);
} else {
ret = mmc_blk_issue_rw_rq(mq, req);
}
out:
- mmc_release_host(card->host);
+ if (!req)
+ /* release host only when there are no more requests */
+ mmc_release_host(card->host);
return ret;
}
diff --git a/drivers/mmc/card/mmc_test.c b/drivers/mmc/card/mmc_test.c
index 233cdfa..a2b005e 100644
--- a/drivers/mmc/card/mmc_test.c
+++ b/drivers/mmc/card/mmc_test.c
@@ -22,6 +22,7 @@
#include <linux/debugfs.h>
#include <linux/uaccess.h>
#include <linux/seq_file.h>
+#include <linux/module.h>
#define RESULT_OK 0
#define RESULT_FAIL 1
@@ -148,6 +149,27 @@
struct mmc_test_general_result *gr;
};
+enum mmc_test_prep_media {
+ MMC_TEST_PREP_NONE = 0,
+ MMC_TEST_PREP_WRITE_FULL = 1 << 0,
+ MMC_TEST_PREP_ERASE = 1 << 1,
+};
+
+struct mmc_test_multiple_rw {
+ unsigned int *sg_len;
+ unsigned int *bs;
+ unsigned int len;
+ unsigned int size;
+ bool do_write;
+ bool do_nonblock_req;
+ enum mmc_test_prep_media prepare;
+};
+
+struct mmc_test_async_req {
+ struct mmc_async_req areq;
+ struct mmc_test_card *test;
+};
+
/*******************************************************************/
/* General helper functions */
/*******************************************************************/
@@ -203,7 +225,7 @@
static int mmc_test_busy(struct mmc_command *cmd)
{
return !(cmd->resp[0] & R1_READY_FOR_DATA) ||
- (R1_CURRENT_STATE(cmd->resp[0]) == 7);
+ (R1_CURRENT_STATE(cmd->resp[0]) == R1_STATE_PRG);
}
/*
@@ -367,21 +389,26 @@
* Map memory into a scatterlist. Optionally allow the same memory to be
* mapped more than once.
*/
-static int mmc_test_map_sg(struct mmc_test_mem *mem, unsigned long sz,
+static int mmc_test_map_sg(struct mmc_test_mem *mem, unsigned long size,
struct scatterlist *sglist, int repeat,
unsigned int max_segs, unsigned int max_seg_sz,
- unsigned int *sg_len)
+ unsigned int *sg_len, int min_sg_len)
{
struct scatterlist *sg = NULL;
unsigned int i;
+ unsigned long sz = size;
sg_init_table(sglist, max_segs);
+ if (min_sg_len > max_segs)
+ min_sg_len = max_segs;
*sg_len = 0;
do {
for (i = 0; i < mem->cnt; i++) {
unsigned long len = PAGE_SIZE << mem->arr[i].order;
+ if (min_sg_len && (size / min_sg_len < len))
+ len = ALIGN(size / min_sg_len, 512);
if (len > sz)
len = sz;
if (len > max_seg_sz)
@@ -554,11 +581,12 @@
printk(KERN_INFO "%s: Transfer of %u x %u sectors (%u x %u%s KiB) took "
"%lu.%09lu seconds (%u kB/s, %u KiB/s, "
- "%u.%02u IOPS)\n",
+ "%u.%02u IOPS, sg_len %d)\n",
mmc_hostname(test->card->host), count, sectors, count,
sectors >> 1, (sectors & 1 ? ".5" : ""),
(unsigned long)ts.tv_sec, (unsigned long)ts.tv_nsec,
- rate / 1000, rate / 1024, iops / 100, iops % 100);
+ rate / 1000, rate / 1024, iops / 100, iops % 100,
+ test->area.sg_len);
mmc_test_save_transfer_result(test, count, sectors, ts, rate, iops);
}
@@ -661,7 +689,7 @@
* Checks that a normal transfer didn't have any errors
*/
static int mmc_test_check_result(struct mmc_test_card *test,
- struct mmc_request *mrq)
+ struct mmc_request *mrq)
{
int ret;
@@ -685,6 +713,17 @@
return ret;
}
+static int mmc_test_check_result_async(struct mmc_card *card,
+ struct mmc_async_req *areq)
+{
+ struct mmc_test_async_req *test_async =
+ container_of(areq, struct mmc_test_async_req, areq);
+
+ mmc_test_wait_busy(test_async->test);
+
+ return mmc_test_check_result(test_async->test, areq->mrq);
+}
+
/*
* Checks that a "short transfer" behaved as expected
*/
@@ -720,6 +759,85 @@
}
/*
+ * Tests nonblock transfer with certain parameters
+ */
+static void mmc_test_nonblock_reset(struct mmc_request *mrq,
+ struct mmc_command *cmd,
+ struct mmc_command *stop,
+ struct mmc_data *data)
+{
+ memset(mrq, 0, sizeof(struct mmc_request));
+ memset(cmd, 0, sizeof(struct mmc_command));
+ memset(data, 0, sizeof(struct mmc_data));
+ memset(stop, 0, sizeof(struct mmc_command));
+
+ mrq->cmd = cmd;
+ mrq->data = data;
+ mrq->stop = stop;
+}
+static int mmc_test_nonblock_transfer(struct mmc_test_card *test,
+ struct scatterlist *sg, unsigned sg_len,
+ unsigned dev_addr, unsigned blocks,
+ unsigned blksz, int write, int count)
+{
+ struct mmc_request mrq1;
+ struct mmc_command cmd1;
+ struct mmc_command stop1;
+ struct mmc_data data1;
+
+ struct mmc_request mrq2;
+ struct mmc_command cmd2;
+ struct mmc_command stop2;
+ struct mmc_data data2;
+
+ struct mmc_test_async_req test_areq[2];
+ struct mmc_async_req *done_areq;
+ struct mmc_async_req *cur_areq = &test_areq[0].areq;
+ struct mmc_async_req *other_areq = &test_areq[1].areq;
+ int i;
+ int ret;
+
+ test_areq[0].test = test;
+ test_areq[1].test = test;
+
+ mmc_test_nonblock_reset(&mrq1, &cmd1, &stop1, &data1);
+ mmc_test_nonblock_reset(&mrq2, &cmd2, &stop2, &data2);
+
+ cur_areq->mrq = &mrq1;
+ cur_areq->err_check = mmc_test_check_result_async;
+ other_areq->mrq = &mrq2;
+ other_areq->err_check = mmc_test_check_result_async;
+
+ for (i = 0; i < count; i++) {
+ mmc_test_prepare_mrq(test, cur_areq->mrq, sg, sg_len, dev_addr,
+ blocks, blksz, write);
+ done_areq = mmc_start_req(test->card->host, cur_areq, &ret);
+
+ if (ret || (!done_areq && i > 0))
+ goto err;
+
+ if (done_areq) {
+ if (done_areq->mrq == &mrq2)
+ mmc_test_nonblock_reset(&mrq2, &cmd2,
+ &stop2, &data2);
+ else
+ mmc_test_nonblock_reset(&mrq1, &cmd1,
+ &stop1, &data1);
+ }
+ done_areq = cur_areq;
+ cur_areq = other_areq;
+ other_areq = done_areq;
+ dev_addr += blocks;
+ }
+
+ done_areq = mmc_start_req(test->card->host, NULL, &ret);
+
+ return ret;
+err:
+ return ret;
+}
+
+/*
* Tests a basic transfer with certain parameters
*/
static int mmc_test_simple_transfer(struct mmc_test_card *test,
@@ -1302,7 +1420,7 @@
* Map sz bytes so that it can be transferred.
*/
static int mmc_test_area_map(struct mmc_test_card *test, unsigned long sz,
- int max_scatter)
+ int max_scatter, int min_sg_len)
{
struct mmc_test_area *t = &test->area;
int err;
@@ -1315,7 +1433,7 @@
&t->sg_len);
} else {
err = mmc_test_map_sg(t->mem, sz, t->sg, 1, t->max_segs,
- t->max_seg_sz, &t->sg_len);
+ t->max_seg_sz, &t->sg_len, min_sg_len);
}
if (err)
printk(KERN_INFO "%s: Failed to map sg list\n",
@@ -1336,14 +1454,17 @@
}
/*
- * Map and transfer bytes.
+ * Map and transfer bytes for multiple transfers.
*/
-static int mmc_test_area_io(struct mmc_test_card *test, unsigned long sz,
- unsigned int dev_addr, int write, int max_scatter,
- int timed)
+static int mmc_test_area_io_seq(struct mmc_test_card *test, unsigned long sz,
+ unsigned int dev_addr, int write,
+ int max_scatter, int timed, int count,
+ bool nonblock, int min_sg_len)
{
struct timespec ts1, ts2;
- int ret;
+ int ret = 0;
+ int i;
+ struct mmc_test_area *t = &test->area;
/*
* In the case of a maximally scattered transfer, the maximum transfer
@@ -1361,14 +1482,21 @@
sz = max_tfr;
}
- ret = mmc_test_area_map(test, sz, max_scatter);
+ ret = mmc_test_area_map(test, sz, max_scatter, min_sg_len);
if (ret)
return ret;
if (timed)
getnstimeofday(&ts1);
+ if (nonblock)
+ ret = mmc_test_nonblock_transfer(test, t->sg, t->sg_len,
+ dev_addr, t->blocks, 512, write, count);
+ else
+ for (i = 0; i < count && ret == 0; i++) {
+ ret = mmc_test_area_transfer(test, dev_addr, write);
+ dev_addr += sz >> 9;
+ }
- ret = mmc_test_area_transfer(test, dev_addr, write);
if (ret)
return ret;
@@ -1376,11 +1504,19 @@
getnstimeofday(&ts2);
if (timed)
- mmc_test_print_rate(test, sz, &ts1, &ts2);
+ mmc_test_print_avg_rate(test, sz, count, &ts1, &ts2);
return 0;
}
+static int mmc_test_area_io(struct mmc_test_card *test, unsigned long sz,
+ unsigned int dev_addr, int write, int max_scatter,
+ int timed)
+{
+ return mmc_test_area_io_seq(test, sz, dev_addr, write, max_scatter,
+ timed, 1, false, 0);
+}
+
/*
* Write the test area entirely.
*/
@@ -1954,6 +2090,270 @@
return mmc_test_large_seq_perf(test, 1);
}
+static int mmc_test_rw_multiple(struct mmc_test_card *test,
+ struct mmc_test_multiple_rw *tdata,
+ unsigned int reqsize, unsigned int size,
+ int min_sg_len)
+{
+ unsigned int dev_addr;
+ struct mmc_test_area *t = &test->area;
+ int ret = 0;
+
+ /* Set up test area */
+ if (size > mmc_test_capacity(test->card) / 2 * 512)
+ size = mmc_test_capacity(test->card) / 2 * 512;
+ if (reqsize > t->max_tfr)
+ reqsize = t->max_tfr;
+ dev_addr = mmc_test_capacity(test->card) / 4;
+ if ((dev_addr & 0xffff0000))
+ dev_addr &= 0xffff0000; /* Round to 64MiB boundary */
+ else
+ dev_addr &= 0xfffff800; /* Round to 1MiB boundary */
+ if (!dev_addr)
+ goto err;
+
+ if (reqsize > size)
+ return 0;
+
+ /* prepare test area */
+ if (mmc_can_erase(test->card) &&
+ tdata->prepare & MMC_TEST_PREP_ERASE) {
+ ret = mmc_erase(test->card, dev_addr,
+ size / 512, MMC_SECURE_ERASE_ARG);
+ if (ret)
+ ret = mmc_erase(test->card, dev_addr,
+ size / 512, MMC_ERASE_ARG);
+ if (ret)
+ goto err;
+ }
+
+ /* Run test */
+ ret = mmc_test_area_io_seq(test, reqsize, dev_addr,
+ tdata->do_write, 0, 1, size / reqsize,
+ tdata->do_nonblock_req, min_sg_len);
+ if (ret)
+ goto err;
+
+ return ret;
+ err:
+ printk(KERN_INFO "[%s] error\n", __func__);
+ return ret;
+}
+
+static int mmc_test_rw_multiple_size(struct mmc_test_card *test,
+ struct mmc_test_multiple_rw *rw)
+{
+ int ret = 0;
+ int i;
+ void *pre_req = test->card->host->ops->pre_req;
+ void *post_req = test->card->host->ops->post_req;
+
+ if (rw->do_nonblock_req &&
+ ((!pre_req && post_req) || (pre_req && !post_req))) {
+ printk(KERN_INFO "error: only one of pre/post is defined\n");
+ return -EINVAL;
+ }
+
+ for (i = 0 ; i < rw->len && ret == 0; i++) {
+ ret = mmc_test_rw_multiple(test, rw, rw->bs[i], rw->size, 0);
+ if (ret)
+ break;
+ }
+ return ret;
+}
+
+static int mmc_test_rw_multiple_sg_len(struct mmc_test_card *test,
+ struct mmc_test_multiple_rw *rw)
+{
+ int ret = 0;
+ int i;
+
+ for (i = 0 ; i < rw->len && ret == 0; i++) {
+ ret = mmc_test_rw_multiple(test, rw, 512*1024, rw->size,
+ rw->sg_len[i]);
+ if (ret)
+ break;
+ }
+ return ret;
+}
+
+/*
+ * Multiple blocking write 4k to 4 MB chunks
+ */
+static int mmc_test_profile_mult_write_blocking_perf(struct mmc_test_card *test)
+{
+ unsigned int bs[] = {1 << 12, 1 << 13, 1 << 14, 1 << 15, 1 << 16,
+ 1 << 17, 1 << 18, 1 << 19, 1 << 20, 1 << 22};
+ struct mmc_test_multiple_rw test_data = {
+ .bs = bs,
+ .size = TEST_AREA_MAX_SIZE,
+ .len = ARRAY_SIZE(bs),
+ .do_write = true,
+ .do_nonblock_req = false,
+ .prepare = MMC_TEST_PREP_ERASE,
+ };
+
+ return mmc_test_rw_multiple_size(test, &test_data);
+};
+
+/*
+ * Multiple non-blocking write 4k to 4 MB chunks
+ */
+static int mmc_test_profile_mult_write_nonblock_perf(struct mmc_test_card *test)
+{
+ unsigned int bs[] = {1 << 12, 1 << 13, 1 << 14, 1 << 15, 1 << 16,
+ 1 << 17, 1 << 18, 1 << 19, 1 << 20, 1 << 22};
+ struct mmc_test_multiple_rw test_data = {
+ .bs = bs,
+ .size = TEST_AREA_MAX_SIZE,
+ .len = ARRAY_SIZE(bs),
+ .do_write = true,
+ .do_nonblock_req = true,
+ .prepare = MMC_TEST_PREP_ERASE,
+ };
+
+ return mmc_test_rw_multiple_size(test, &test_data);
+}
+
+/*
+ * Multiple blocking read 4k to 4 MB chunks
+ */
+static int mmc_test_profile_mult_read_blocking_perf(struct mmc_test_card *test)
+{
+ unsigned int bs[] = {1 << 12, 1 << 13, 1 << 14, 1 << 15, 1 << 16,
+ 1 << 17, 1 << 18, 1 << 19, 1 << 20, 1 << 22};
+ struct mmc_test_multiple_rw test_data = {
+ .bs = bs,
+ .size = TEST_AREA_MAX_SIZE,
+ .len = ARRAY_SIZE(bs),
+ .do_write = false,
+ .do_nonblock_req = false,
+ .prepare = MMC_TEST_PREP_NONE,
+ };
+
+ return mmc_test_rw_multiple_size(test, &test_data);
+}
+
+/*
+ * Multiple non-blocking read 4k to 4 MB chunks
+ */
+static int mmc_test_profile_mult_read_nonblock_perf(struct mmc_test_card *test)
+{
+ unsigned int bs[] = {1 << 12, 1 << 13, 1 << 14, 1 << 15, 1 << 16,
+ 1 << 17, 1 << 18, 1 << 19, 1 << 20, 1 << 22};
+ struct mmc_test_multiple_rw test_data = {
+ .bs = bs,
+ .size = TEST_AREA_MAX_SIZE,
+ .len = ARRAY_SIZE(bs),
+ .do_write = false,
+ .do_nonblock_req = true,
+ .prepare = MMC_TEST_PREP_NONE,
+ };
+
+ return mmc_test_rw_multiple_size(test, &test_data);
+}
+
+/*
+ * Multiple blocking write 1 to 512 sg elements
+ */
+static int mmc_test_profile_sglen_wr_blocking_perf(struct mmc_test_card *test)
+{
+ unsigned int sg_len[] = {1, 1 << 3, 1 << 4, 1 << 5, 1 << 6,
+ 1 << 7, 1 << 8, 1 << 9};
+ struct mmc_test_multiple_rw test_data = {
+ .sg_len = sg_len,
+ .size = TEST_AREA_MAX_SIZE,
+ .len = ARRAY_SIZE(sg_len),
+ .do_write = true,
+ .do_nonblock_req = false,
+ .prepare = MMC_TEST_PREP_ERASE,
+ };
+
+ return mmc_test_rw_multiple_sg_len(test, &test_data);
+};
+
+/*
+ * Multiple non-blocking write 1 to 512 sg elements
+ */
+static int mmc_test_profile_sglen_wr_nonblock_perf(struct mmc_test_card *test)
+{
+ unsigned int sg_len[] = {1, 1 << 3, 1 << 4, 1 << 5, 1 << 6,
+ 1 << 7, 1 << 8, 1 << 9};
+ struct mmc_test_multiple_rw test_data = {
+ .sg_len = sg_len,
+ .size = TEST_AREA_MAX_SIZE,
+ .len = ARRAY_SIZE(sg_len),
+ .do_write = true,
+ .do_nonblock_req = true,
+ .prepare = MMC_TEST_PREP_ERASE,
+ };
+
+ return mmc_test_rw_multiple_sg_len(test, &test_data);
+}
+
+/*
+ * Multiple blocking read 1 to 512 sg elements
+ */
+static int mmc_test_profile_sglen_r_blocking_perf(struct mmc_test_card *test)
+{
+ unsigned int sg_len[] = {1, 1 << 3, 1 << 4, 1 << 5, 1 << 6,
+ 1 << 7, 1 << 8, 1 << 9};
+ struct mmc_test_multiple_rw test_data = {
+ .sg_len = sg_len,
+ .size = TEST_AREA_MAX_SIZE,
+ .len = ARRAY_SIZE(sg_len),
+ .do_write = false,
+ .do_nonblock_req = false,
+ .prepare = MMC_TEST_PREP_NONE,
+ };
+
+ return mmc_test_rw_multiple_sg_len(test, &test_data);
+}
+
+/*
+ * Multiple non-blocking read 1 to 512 sg elements
+ */
+static int mmc_test_profile_sglen_r_nonblock_perf(struct mmc_test_card *test)
+{
+ unsigned int sg_len[] = {1, 1 << 3, 1 << 4, 1 << 5, 1 << 6,
+ 1 << 7, 1 << 8, 1 << 9};
+ struct mmc_test_multiple_rw test_data = {
+ .sg_len = sg_len,
+ .size = TEST_AREA_MAX_SIZE,
+ .len = ARRAY_SIZE(sg_len),
+ .do_write = false,
+ .do_nonblock_req = true,
+ .prepare = MMC_TEST_PREP_NONE,
+ };
+
+ return mmc_test_rw_multiple_sg_len(test, &test_data);
+}
+
+/*
+ * eMMC hardware reset.
+ */
+static int mmc_test_hw_reset(struct mmc_test_card *test)
+{
+ struct mmc_card *card = test->card;
+ struct mmc_host *host = card->host;
+ int err;
+
+ err = mmc_hw_reset_check(host);
+ if (!err)
+ return RESULT_OK;
+
+ if (err == -ENOSYS)
+ return RESULT_FAIL;
+
+ if (err != -EOPNOTSUPP)
+ return err;
+
+ if (!mmc_can_reset(card))
+ return RESULT_UNSUP_CARD;
+
+ return RESULT_UNSUP_HOST;
+}
+
static const struct mmc_test_case mmc_test_cases[] = {
{
.name = "Basic write (no data verification)",
@@ -2221,6 +2621,66 @@
.cleanup = mmc_test_area_cleanup,
},
+ {
+ .name = "Write performance with blocking req 4k to 4MB",
+ .prepare = mmc_test_area_prepare,
+ .run = mmc_test_profile_mult_write_blocking_perf,
+ .cleanup = mmc_test_area_cleanup,
+ },
+
+ {
+ .name = "Write performance with non-blocking req 4k to 4MB",
+ .prepare = mmc_test_area_prepare,
+ .run = mmc_test_profile_mult_write_nonblock_perf,
+ .cleanup = mmc_test_area_cleanup,
+ },
+
+ {
+ .name = "Read performance with blocking req 4k to 4MB",
+ .prepare = mmc_test_area_prepare,
+ .run = mmc_test_profile_mult_read_blocking_perf,
+ .cleanup = mmc_test_area_cleanup,
+ },
+
+ {
+ .name = "Read performance with non-blocking req 4k to 4MB",
+ .prepare = mmc_test_area_prepare,
+ .run = mmc_test_profile_mult_read_nonblock_perf,
+ .cleanup = mmc_test_area_cleanup,
+ },
+
+ {
+ .name = "Write performance blocking req 1 to 512 sg elems",
+ .prepare = mmc_test_area_prepare,
+ .run = mmc_test_profile_sglen_wr_blocking_perf,
+ .cleanup = mmc_test_area_cleanup,
+ },
+
+ {
+ .name = "Write performance non-blocking req 1 to 512 sg elems",
+ .prepare = mmc_test_area_prepare,
+ .run = mmc_test_profile_sglen_wr_nonblock_perf,
+ .cleanup = mmc_test_area_cleanup,
+ },
+
+ {
+ .name = "Read performance blocking req 1 to 512 sg elems",
+ .prepare = mmc_test_area_prepare,
+ .run = mmc_test_profile_sglen_r_blocking_perf,
+ .cleanup = mmc_test_area_cleanup,
+ },
+
+ {
+ .name = "Read performance non-blocking req 1 to 512 sg elems",
+ .prepare = mmc_test_area_prepare,
+ .run = mmc_test_profile_sglen_r_nonblock_perf,
+ .cleanup = mmc_test_area_cleanup,
+ },
+
+ {
+ .name = "eMMC hardware reset",
+ .run = mmc_test_hw_reset,
+ },
};
static DEFINE_MUTEX(mmc_test_lock);
@@ -2445,6 +2905,32 @@
.release = single_release,
};
+static int mtf_testlist_show(struct seq_file *sf, void *data)
+{
+ int i;
+
+ mutex_lock(&mmc_test_lock);
+
+ for (i = 0; i < ARRAY_SIZE(mmc_test_cases); i++)
+ seq_printf(sf, "%d:\t%s\n", i+1, mmc_test_cases[i].name);
+
+ mutex_unlock(&mmc_test_lock);
+
+ return 0;
+}
+
+static int mtf_testlist_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, mtf_testlist_show, inode->i_private);
+}
+
+static const struct file_operations mmc_test_fops_testlist = {
+ .open = mtf_testlist_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
static void mmc_test_free_file_test(struct mmc_card *card)
{
struct mmc_test_dbgfs_file *df, *dfs;
@@ -2476,7 +2962,18 @@
if (IS_ERR_OR_NULL(file)) {
dev_err(&card->dev,
- "Can't create file. Perhaps debugfs is disabled.\n");
+ "Can't create test. Perhaps debugfs is disabled.\n");
+ ret = -ENODEV;
+ goto err;
+ }
+
+ if (card->debugfs_root)
+ file = debugfs_create_file("testlist", S_IRUGO,
+ card->debugfs_root, card, &mmc_test_fops_testlist);
+
+ if (IS_ERR_OR_NULL(file)) {
+ dev_err(&card->dev,
+ "Can't create testlist. Perhaps debugfs is disabled.\n");
ret = -ENODEV;
goto err;
}
diff --git a/drivers/mmc/card/queue.c b/drivers/mmc/card/queue.c
index b2fb161..73f63c9 100644
--- a/drivers/mmc/card/queue.c
+++ b/drivers/mmc/card/queue.c
@@ -53,26 +53,23 @@
struct request_queue *q = mq->queue;
struct request *req;
-#ifdef CONFIG_MMC_PERF_PROFILING
- ktime_t start, diff;
- struct mmc_host *host = mq->card->host;
- unsigned long bytes_xfer;
-#endif
-
-
current->flags |= PF_MEMALLOC;
down(&mq->thread_sem);
do {
+ struct mmc_queue_req *tmp;
req = NULL; /* Must be set to NULL at each iteration */
spin_lock_irq(q->queue_lock);
set_current_state(TASK_INTERRUPTIBLE);
req = blk_fetch_request(q);
- mq->req = req;
+ mq->mqrq_cur->req = req;
spin_unlock_irq(q->queue_lock);
- if (!req) {
+ if (req || mq->mqrq_prev->req) {
+ set_current_state(TASK_RUNNING);
+ mq->issue_fn(mq, req);
+ } else {
if (kthread_should_stop()) {
set_current_state(TASK_RUNNING);
break;
@@ -80,30 +77,14 @@
up(&mq->thread_sem);
schedule();
down(&mq->thread_sem);
- continue;
}
- set_current_state(TASK_RUNNING);
-#ifdef CONFIG_MMC_PERF_PROFILING
- bytes_xfer = blk_rq_bytes(req);
- if (rq_data_dir(req) == READ) {
- start = ktime_get();
- mq->issue_fn(mq, req);
- diff = ktime_sub(ktime_get(), start);
- host->perf.rbytes_mmcq += bytes_xfer;
- host->perf.rtime_mmcq =
- ktime_add(host->perf.rtime_mmcq, diff);
- } else {
- start = ktime_get();
- mq->issue_fn(mq, req);
- diff = ktime_sub(ktime_get(), start);
- host->perf.wbytes_mmcq += bytes_xfer;
- host->perf.wtime_mmcq =
- ktime_add(host->perf.wtime_mmcq, diff);
- }
-#else
- mq->issue_fn(mq, req);
-#endif
+ /* Current request becomes previous request and vice versa. */
+ mq->mqrq_prev->brq.mrq.data = NULL;
+ mq->mqrq_prev->req = NULL;
+ tmp = mq->mqrq_prev;
+ mq->mqrq_prev = mq->mqrq_cur;
+ mq->mqrq_cur = tmp;
} while (1);
up(&mq->thread_sem);
@@ -129,10 +110,46 @@
return;
}
- if (!mq->req)
+ if (!mq->mqrq_cur->req && !mq->mqrq_prev->req)
wake_up_process(mq->thread);
}
+struct scatterlist *mmc_alloc_sg(int sg_len, int *err)
+{
+ struct scatterlist *sg;
+
+ sg = kmalloc(sizeof(struct scatterlist)*sg_len, GFP_KERNEL);
+ if (!sg)
+ *err = -ENOMEM;
+ else {
+ *err = 0;
+ sg_init_table(sg, sg_len);
+ }
+
+ return sg;
+}
+
+static void mmc_queue_setup_discard(struct request_queue *q,
+ struct mmc_card *card)
+{
+ unsigned max_discard;
+
+ max_discard = mmc_calc_max_discard(card);
+ if (!max_discard)
+ return;
+
+ queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, q);
+ q->limits.max_discard_sectors = max_discard;
+ if (card->erased_byte == 0)
+ q->limits.discard_zeroes_data = 1;
+ q->limits.discard_granularity = card->pref_erase << 9;
+ /* granularity must not be greater than max. discard */
+ if (card->pref_erase > max_discard)
+ q->limits.discard_granularity = 0;
+ if (mmc_can_secure_erase_trim(card) || mmc_can_sanitize(card))
+ queue_flag_set_unlocked(QUEUE_FLAG_SECDISCARD, q);
+}
+
/**
* mmc_init_queue - initialise a queue structure.
* @mq: mmc queue
@@ -148,6 +165,8 @@
struct mmc_host *host = card->host;
u64 limit = BLK_BOUNCE_HIGH;
int ret;
+ struct mmc_queue_req *mqrq_cur = &mq->mqrq[0];
+ struct mmc_queue_req *mqrq_prev = &mq->mqrq[1];
if (mmc_dev(host)->dma_mask && *mmc_dev(host)->dma_mask)
limit = *mmc_dev(host)->dma_mask;
@@ -157,21 +176,16 @@
if (!mq->queue)
return -ENOMEM;
+ memset(&mq->mqrq_cur, 0, sizeof(mq->mqrq_cur));
+ memset(&mq->mqrq_prev, 0, sizeof(mq->mqrq_prev));
+ mq->mqrq_cur = mqrq_cur;
+ mq->mqrq_prev = mqrq_prev;
mq->queue->queuedata = mq;
- mq->req = NULL;
blk_queue_prep_rq(mq->queue, mmc_prep_request);
queue_flag_set_unlocked(QUEUE_FLAG_NONROT, mq->queue);
- if (mmc_can_erase(card)) {
- queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, mq->queue);
- mq->queue->limits.max_discard_sectors = UINT_MAX;
- if (card->erased_byte == 0)
- mq->queue->limits.discard_zeroes_data = 1;
- mq->queue->limits.discard_granularity = card->pref_erase << 9;
- if (mmc_can_secure_erase_trim(card))
- queue_flag_set_unlocked(QUEUE_FLAG_SECDISCARD,
- mq->queue);
- }
+ if (mmc_can_erase(card))
+ mmc_queue_setup_discard(mq->queue, card);
#ifdef CONFIG_MMC_BLOCK_BOUNCE
if (host->max_segs == 1) {
@@ -187,53 +201,64 @@
bouncesz = host->max_blk_count * 512;
if (bouncesz > 512) {
- mq->bounce_buf = kmalloc(bouncesz, GFP_KERNEL);
- if (!mq->bounce_buf) {
+ mqrq_cur->bounce_buf = kmalloc(bouncesz, GFP_KERNEL);
+ if (!mqrq_cur->bounce_buf) {
printk(KERN_WARNING "%s: unable to "
- "allocate bounce buffer\n",
+ "allocate bounce cur buffer\n",
mmc_card_name(card));
}
+ mqrq_prev->bounce_buf = kmalloc(bouncesz, GFP_KERNEL);
+ if (!mqrq_prev->bounce_buf) {
+ printk(KERN_WARNING "%s: unable to "
+ "allocate bounce prev buffer\n",
+ mmc_card_name(card));
+ kfree(mqrq_cur->bounce_buf);
+ mqrq_cur->bounce_buf = NULL;
+ }
}
- if (mq->bounce_buf) {
+ if (mqrq_cur->bounce_buf && mqrq_prev->bounce_buf) {
blk_queue_bounce_limit(mq->queue, BLK_BOUNCE_ANY);
blk_queue_max_hw_sectors(mq->queue, bouncesz / 512);
blk_queue_max_segments(mq->queue, bouncesz / 512);
blk_queue_max_segment_size(mq->queue, bouncesz);
- mq->sg = kmalloc(sizeof(struct scatterlist),
- GFP_KERNEL);
- if (!mq->sg) {
- ret = -ENOMEM;
+ mqrq_cur->sg = mmc_alloc_sg(1, &ret);
+ if (ret)
goto cleanup_queue;
- }
- sg_init_table(mq->sg, 1);
- mq->bounce_sg = kmalloc(sizeof(struct scatterlist) *
- bouncesz / 512, GFP_KERNEL);
- if (!mq->bounce_sg) {
- ret = -ENOMEM;
+ mqrq_cur->bounce_sg =
+ mmc_alloc_sg(bouncesz / 512, &ret);
+ if (ret)
goto cleanup_queue;
- }
- sg_init_table(mq->bounce_sg, bouncesz / 512);
+
+ mqrq_prev->sg = mmc_alloc_sg(1, &ret);
+ if (ret)
+ goto cleanup_queue;
+
+ mqrq_prev->bounce_sg =
+ mmc_alloc_sg(bouncesz / 512, &ret);
+ if (ret)
+ goto cleanup_queue;
}
}
#endif
- if (!mq->bounce_buf) {
+ if (!mqrq_cur->bounce_buf && !mqrq_prev->bounce_buf) {
blk_queue_bounce_limit(mq->queue, limit);
blk_queue_max_hw_sectors(mq->queue,
min(host->max_blk_count, host->max_req_size / 512));
blk_queue_max_segments(mq->queue, host->max_segs);
blk_queue_max_segment_size(mq->queue, host->max_seg_size);
- mq->sg = kmalloc(sizeof(struct scatterlist) *
- host->max_segs, GFP_KERNEL);
- if (!mq->sg) {
- ret = -ENOMEM;
+ mqrq_cur->sg = mmc_alloc_sg(host->max_segs, &ret);
+ if (ret)
goto cleanup_queue;
- }
- sg_init_table(mq->sg, host->max_segs);
+
+
+ mqrq_prev->sg = mmc_alloc_sg(host->max_segs, &ret);
+ if (ret)
+ goto cleanup_queue;
}
sema_init(&mq->thread_sem, 1);
@@ -248,16 +273,22 @@
return 0;
free_bounce_sg:
- if (mq->bounce_sg)
- kfree(mq->bounce_sg);
- mq->bounce_sg = NULL;
+ kfree(mqrq_cur->bounce_sg);
+ mqrq_cur->bounce_sg = NULL;
+ kfree(mqrq_prev->bounce_sg);
+ mqrq_prev->bounce_sg = NULL;
+
cleanup_queue:
- if (mq->sg)
- kfree(mq->sg);
- mq->sg = NULL;
- if (mq->bounce_buf)
- kfree(mq->bounce_buf);
- mq->bounce_buf = NULL;
+ kfree(mqrq_cur->sg);
+ mqrq_cur->sg = NULL;
+ kfree(mqrq_cur->bounce_buf);
+ mqrq_cur->bounce_buf = NULL;
+
+ kfree(mqrq_prev->sg);
+ mqrq_prev->sg = NULL;
+ kfree(mqrq_prev->bounce_buf);
+ mqrq_prev->bounce_buf = NULL;
+
blk_cleanup_queue(mq->queue);
return ret;
}
@@ -266,6 +297,8 @@
{
struct request_queue *q = mq->queue;
unsigned long flags;
+ struct mmc_queue_req *mqrq_cur = mq->mqrq_cur;
+ struct mmc_queue_req *mqrq_prev = mq->mqrq_prev;
/* Make sure the queue isn't suspended, as that will deadlock */
mmc_queue_resume(mq);
@@ -279,16 +312,23 @@
blk_start_queue(q);
spin_unlock_irqrestore(q->queue_lock, flags);
- if (mq->bounce_sg)
- kfree(mq->bounce_sg);
- mq->bounce_sg = NULL;
+ kfree(mqrq_cur->bounce_sg);
+ mqrq_cur->bounce_sg = NULL;
- kfree(mq->sg);
- mq->sg = NULL;
+ kfree(mqrq_cur->sg);
+ mqrq_cur->sg = NULL;
- if (mq->bounce_buf)
- kfree(mq->bounce_buf);
- mq->bounce_buf = NULL;
+ kfree(mqrq_cur->bounce_buf);
+ mqrq_cur->bounce_buf = NULL;
+
+ kfree(mqrq_prev->bounce_sg);
+ mqrq_prev->bounce_sg = NULL;
+
+ kfree(mqrq_prev->sg);
+ mqrq_prev->sg = NULL;
+
+ kfree(mqrq_prev->bounce_buf);
+ mqrq_prev->bounce_buf = NULL;
mq->card = NULL;
}
@@ -341,27 +381,27 @@
/*
* Prepare the sg list(s) to be handed of to the host driver
*/
-unsigned int mmc_queue_map_sg(struct mmc_queue *mq)
+unsigned int mmc_queue_map_sg(struct mmc_queue *mq, struct mmc_queue_req *mqrq)
{
unsigned int sg_len;
size_t buflen;
struct scatterlist *sg;
int i;
- if (!mq->bounce_buf)
- return blk_rq_map_sg(mq->queue, mq->req, mq->sg);
+ if (!mqrq->bounce_buf)
+ return blk_rq_map_sg(mq->queue, mqrq->req, mqrq->sg);
- BUG_ON(!mq->bounce_sg);
+ BUG_ON(!mqrq->bounce_sg);
- sg_len = blk_rq_map_sg(mq->queue, mq->req, mq->bounce_sg);
+ sg_len = blk_rq_map_sg(mq->queue, mqrq->req, mqrq->bounce_sg);
- mq->bounce_sg_len = sg_len;
+ mqrq->bounce_sg_len = sg_len;
buflen = 0;
- for_each_sg(mq->bounce_sg, sg, sg_len, i)
+ for_each_sg(mqrq->bounce_sg, sg, sg_len, i)
buflen += sg->length;
- sg_init_one(mq->sg, mq->bounce_buf, buflen);
+ sg_init_one(mqrq->sg, mqrq->bounce_buf, buflen);
return 1;
}
@@ -370,31 +410,30 @@
* If writing, bounce the data to the buffer before the request
* is sent to the host driver
*/
-void mmc_queue_bounce_pre(struct mmc_queue *mq)
+void mmc_queue_bounce_pre(struct mmc_queue_req *mqrq)
{
- if (!mq->bounce_buf)
+ if (!mqrq->bounce_buf)
return;
- if (rq_data_dir(mq->req) != WRITE)
+ if (rq_data_dir(mqrq->req) != WRITE)
return;
- sg_copy_to_buffer(mq->bounce_sg, mq->bounce_sg_len,
- mq->bounce_buf, mq->sg[0].length);
+ sg_copy_to_buffer(mqrq->bounce_sg, mqrq->bounce_sg_len,
+ mqrq->bounce_buf, mqrq->sg[0].length);
}
/*
* If reading, bounce the data from the buffer after the request
* has been handled by the host driver
*/
-void mmc_queue_bounce_post(struct mmc_queue *mq)
+void mmc_queue_bounce_post(struct mmc_queue_req *mqrq)
{
- if (!mq->bounce_buf)
+ if (!mqrq->bounce_buf)
return;
- if (rq_data_dir(mq->req) != READ)
+ if (rq_data_dir(mqrq->req) != READ)
return;
- sg_copy_from_buffer(mq->bounce_sg, mq->bounce_sg_len,
- mq->bounce_buf, mq->sg[0].length);
+ sg_copy_from_buffer(mqrq->bounce_sg, mqrq->bounce_sg_len,
+ mqrq->bounce_buf, mqrq->sg[0].length);
}
-
diff --git a/drivers/mmc/card/queue.h b/drivers/mmc/card/queue.h
index 6223ef8..d2a1eb4 100644
--- a/drivers/mmc/card/queue.h
+++ b/drivers/mmc/card/queue.h
@@ -4,19 +4,35 @@
struct request;
struct task_struct;
+struct mmc_blk_request {
+ struct mmc_request mrq;
+ struct mmc_command sbc;
+ struct mmc_command cmd;
+ struct mmc_command stop;
+ struct mmc_data data;
+};
+
+struct mmc_queue_req {
+ struct request *req;
+ struct mmc_blk_request brq;
+ struct scatterlist *sg;
+ char *bounce_buf;
+ struct scatterlist *bounce_sg;
+ unsigned int bounce_sg_len;
+ struct mmc_async_req mmc_active;
+};
+
struct mmc_queue {
struct mmc_card *card;
struct task_struct *thread;
struct semaphore thread_sem;
unsigned int flags;
- struct request *req;
int (*issue_fn)(struct mmc_queue *, struct request *);
void *data;
struct request_queue *queue;
- struct scatterlist *sg;
- char *bounce_buf;
- struct scatterlist *bounce_sg;
- unsigned int bounce_sg_len;
+ struct mmc_queue_req mqrq[2];
+ struct mmc_queue_req *mqrq_cur;
+ struct mmc_queue_req *mqrq_prev;
};
extern int mmc_init_queue(struct mmc_queue *, struct mmc_card *, spinlock_t *,
@@ -25,8 +41,9 @@
extern void mmc_queue_suspend(struct mmc_queue *);
extern void mmc_queue_resume(struct mmc_queue *);
-extern unsigned int mmc_queue_map_sg(struct mmc_queue *);
-extern void mmc_queue_bounce_pre(struct mmc_queue *);
-extern void mmc_queue_bounce_post(struct mmc_queue *);
+extern unsigned int mmc_queue_map_sg(struct mmc_queue *,
+ struct mmc_queue_req *);
+extern void mmc_queue_bounce_pre(struct mmc_queue_req *);
+extern void mmc_queue_bounce_post(struct mmc_queue_req *);
#endif
diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c
index 03be6d0..122ffb5 100644
--- a/drivers/mmc/core/bus.c
+++ b/drivers/mmc/core/bus.c
@@ -299,10 +299,11 @@
mmc_card_ddr_mode(card) ? "DDR " : "",
type);
} else {
- printk(KERN_INFO "%s: new %s%s%s card at address %04x\n",
+ pr_info("%s: new %s%s%s%s card at address %04x\n",
mmc_hostname(card->host),
mmc_sd_card_uhs(card) ? "ultra high speed " :
(mmc_card_highspeed(card) ? "high speed " : ""),
+ (mmc_card_hs200(card) ? "HS200 " : ""),
mmc_card_ddr_mode(card) ? "DDR " : "",
type, card->rca);
}
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 51434b6..1eb9d5f 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -106,12 +106,12 @@
}
if (err && cmd->retries && !mmc_card_removed(host->card)) {
- pr_debug("%s: req failed (CMD%u): %d, retrying...\n",
- mmc_hostname(host), cmd->opcode, err);
-
- cmd->retries--;
- cmd->error = 0;
- host->ops->request(host, mrq);
+ /*
+ * Request starter must handle retries - see
+ * mmc_wait_for_req_done().
+ */
+ if (mrq->done)
+ mrq->done(mrq);
} else {
led_trigger_event(host->led, LED_OFF);
@@ -220,9 +220,123 @@
static void mmc_wait_done(struct mmc_request *mrq)
{
- complete(mrq->done_data);
+ complete(&mrq->completion);
}
+static void __mmc_start_req(struct mmc_host *host, struct mmc_request *mrq)
+{
+ init_completion(&mrq->completion);
+ mrq->done = mmc_wait_done;
+ mmc_start_request(host, mrq);
+}
+
+static void mmc_wait_for_req_done(struct mmc_host *host,
+ struct mmc_request *mrq)
+{
+ struct mmc_command *cmd;
+
+ while (1) {
+ wait_for_completion(&mrq->completion);
+
+ cmd = mrq->cmd;
+ if (!cmd->error || !cmd->retries)
+ break;
+
+ pr_debug("%s: req failed (CMD%u): %d, retrying...\n",
+ mmc_hostname(host), cmd->opcode, cmd->error);
+ cmd->retries--;
+ cmd->error = 0;
+ host->ops->request(host, mrq);
+ }
+}
+
+/**
+ * mmc_pre_req - Prepare for a new request
+ * @host: MMC host to prepare command
+ * @mrq: MMC request to prepare for
+ * @is_first_req: true if there is no previous started request
+ * that may run in parellel to this call, otherwise false
+ *
+ * mmc_pre_req() is called in prior to mmc_start_req() to let
+ * host prepare for the new request. Preparation of a request may be
+ * performed while another request is running on the host.
+ */
+static void mmc_pre_req(struct mmc_host *host, struct mmc_request *mrq,
+ bool is_first_req)
+{
+ if (host->ops->pre_req)
+ host->ops->pre_req(host, mrq, is_first_req);
+}
+
+/**
+ * mmc_post_req - Post process a completed request
+ * @host: MMC host to post process command
+ * @mrq: MMC request to post process for
+ * @err: Error, if non zero, clean up any resources made in pre_req
+ *
+ * Let the host post process a completed request. Post processing of
+ * a request may be performed while another reuqest is running.
+ */
+static void mmc_post_req(struct mmc_host *host, struct mmc_request *mrq,
+ int err)
+{
+ if (host->ops->post_req)
+ host->ops->post_req(host, mrq, err);
+}
+
+/**
+ * mmc_start_req - start a non-blocking request
+ * @host: MMC host to start command
+ * @areq: async request to start
+ * @error: out parameter returns 0 for success, otherwise non zero
+ *
+ * Start a new MMC custom command request for a host.
+ * If there is on ongoing async request wait for completion
+ * of that request and start the new one and return.
+ * Does not wait for the new request to complete.
+ *
+ * Returns the completed request, NULL in case of none completed.
+ * Wait for the an ongoing request (previoulsy started) to complete and
+ * return the completed request. If there is no ongoing request, NULL
+ * is returned without waiting. NULL is not an error condition.
+ */
+struct mmc_async_req *mmc_start_req(struct mmc_host *host,
+ struct mmc_async_req *areq, int *error)
+{
+ int err = 0;
+ struct mmc_async_req *data = host->areq;
+
+ /* Prepare a new request */
+ if (areq)
+ mmc_pre_req(host, areq->mrq, !host->areq);
+
+ if (host->areq) {
+ mmc_wait_for_req_done(host, host->areq->mrq);
+ err = host->areq->err_check(host->card, host->areq);
+ if (err) {
+ mmc_post_req(host, host->areq->mrq, 0);
+ if (areq)
+ mmc_post_req(host, areq->mrq, -EINVAL);
+
+ host->areq = NULL;
+ goto out;
+ }
+ }
+
+ if (areq)
+ __mmc_start_req(host, areq->mrq);
+
+ if (host->areq)
+ mmc_post_req(host, host->areq->mrq, 0);
+
+ host->areq = areq;
+ out:
+ if (error)
+ *error = err;
+ return data;
+}
+EXPORT_SYMBOL(mmc_start_req);
+
/**
* mmc_wait_for_req - start a request and wait for completion
* @host: MMC host to start command
@@ -234,21 +348,67 @@
*/
void mmc_wait_for_req(struct mmc_host *host, struct mmc_request *mrq)
{
- DECLARE_COMPLETION_ONSTACK(complete);
+ __mmc_start_req(host, mrq);
+ mmc_wait_for_req_done(host, mrq);
+}
+EXPORT_SYMBOL(mmc_wait_for_req);
- mrq->done_data = &complete;
- mrq->done = mmc_wait_done;
- if (mmc_card_removed(host->card)) {
- mrq->cmd->error = -ENOMEDIUM;
- return;
+/**
+ * mmc_interrupt_hpi - Issue for High priority Interrupt
+ * @card: the MMC card associated with the HPI transfer
+ *
+ * Issued High Priority Interrupt, and check for card status
+ * util out-of prg-state.
+ */
+int mmc_interrupt_hpi(struct mmc_card *card)
+{
+ int err;
+ u32 status;
+
+ BUG_ON(!card);
+
+ if (!card->ext_csd.hpi_en) {
+ pr_info("%s: HPI enable bit unset\n", mmc_hostname(card->host));
+ return 1;
}
- mmc_start_request(host, mrq);
+ mmc_claim_host(card->host);
+ err = mmc_send_status(card, &status);
+ if (err) {
+ pr_err("%s: Get card status fail\n", mmc_hostname(card->host));
+ goto out;
+ }
- wait_for_completion_io(&complete);
+ /*
+ * If the card status is in PRG-state, we can send the HPI command.
+ */
+ if (R1_CURRENT_STATE(status) == R1_STATE_PRG) {
+ do {
+ /*
+ * We don't know when the HPI command will finish
+ * processing, so we need to resend HPI until out
+ * of prg-state, and keep checking the card status
+ * with SEND_STATUS. If a timeout error occurs when
+ * sending the HPI command, we are already out of
+ * prg-state.
+ */
+ err = mmc_send_hpi_cmd(card, &status);
+ if (err)
+ pr_debug("%s: abort HPI (%d error)\n",
+ mmc_hostname(card->host), err);
+
+ err = mmc_send_status(card, &status);
+ if (err)
+ break;
+ } while (R1_CURRENT_STATE(status) == R1_STATE_PRG);
+ } else
+ pr_debug("%s: Left prg-state\n", mmc_hostname(card->host));
+
+out:
+ mmc_release_host(card->host);
+ return err;
}
-
-EXPORT_SYMBOL(mmc_wait_for_req);
+EXPORT_SYMBOL(mmc_interrupt_hpi);
/**
* mmc_wait_for_cmd - start a command and wait for completion
@@ -262,7 +422,7 @@
*/
int mmc_wait_for_cmd(struct mmc_host *host, struct mmc_command *cmd, int retries)
{
- struct mmc_request mrq = {0};
+ struct mmc_request mrq = {NULL};
WARN_ON(!host->claimed);
@@ -1035,6 +1195,46 @@
mmc_host_clk_release(host);
}
+static void mmc_poweroff_notify(struct mmc_host *host)
+{
+ struct mmc_card *card;
+ unsigned int timeout;
+ unsigned int notify_type = EXT_CSD_NO_POWER_NOTIFICATION;
+ int err = 0;
+
+ card = host->card;
+
+ /*
+ * Send power notify command only if card
+ * is mmc and notify state is powered ON
+ */
+ if (card && mmc_card_mmc(card) &&
+ (card->poweroff_notify_state == MMC_POWERED_ON)) {
+
+ if (host->power_notify_type == MMC_HOST_PW_NOTIFY_SHORT) {
+ notify_type = EXT_CSD_POWER_OFF_SHORT;
+ timeout = card->ext_csd.generic_cmd6_time;
+ card->poweroff_notify_state = MMC_POWEROFF_SHORT;
+ } else {
+ notify_type = EXT_CSD_POWER_OFF_LONG;
+ timeout = card->ext_csd.power_off_longtime;
+ card->poweroff_notify_state = MMC_POWEROFF_LONG;
+ }
+
+ err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
+ EXT_CSD_POWER_OFF_NOTIFICATION,
+ notify_type, timeout);
+
+ if (err && err != -EBADMSG)
+ pr_err("Device failed to respond within %d poweroff "
+ "time. Forcefully powering down the device\n",
+ timeout);
+
+ /* Set the card state to no notification after the poweroff */
+ card->poweroff_notify_state = MMC_NO_POWER_NOTIFICATION;
+ }
+}
+
/*
* Apply power to the MMC stack. This is a two-stage process.
* First, we enable power to the card without the clock running.
@@ -1091,13 +1291,15 @@
mmc_host_clk_release(host);
}
-static void mmc_power_off(struct mmc_host *host)
+void mmc_power_off(struct mmc_host *host)
{
mmc_host_clk_hold(host);
host->ios.clock = 0;
host->ios.vdd = 0;
+ mmc_poweroff_notify(host);
+
/*
* Reset ocr mask to be the highest possible voltage supported for
* this mmc host. This value will be used at next power up.
@@ -1452,7 +1654,7 @@
if (err) {
printk(KERN_ERR "mmc_erase: group start error %d, "
"status %#x\n", err, cmd.resp[0]);
- err = -EINVAL;
+ err = -EIO;
goto out;
}
@@ -1467,7 +1669,7 @@
if (err) {
printk(KERN_ERR "mmc_erase: group end error %d, status %#x\n",
err, cmd.resp[0]);
- err = -EINVAL;
+ err = -EIO;
goto out;
}
@@ -1501,7 +1703,7 @@
goto out;
}
} while (!(cmd.resp[0] & R1_READY_FOR_DATA) ||
- R1_CURRENT_STATE(cmd.resp[0]) == 7);
+ R1_CURRENT_STATE(cmd.resp[0]) == R1_STATE_PRG);
out:
return err;
}
@@ -1586,10 +1788,32 @@
{
if (card->ext_csd.sec_feature_support & EXT_CSD_SEC_GB_CL_EN)
return 1;
+ if (mmc_can_discard(card))
+ return 1;
return 0;
}
EXPORT_SYMBOL(mmc_can_trim);
+int mmc_can_discard(struct mmc_card *card)
+{
+ /*
+ * As there's no way to detect the discard support bit at v4.5
+ * use the s/w feature support filed.
+ */
+ if (card->ext_csd.feature_support & MMC_DISCARD_FEATURE)
+ return 1;
+ return 0;
+}
+EXPORT_SYMBOL(mmc_can_discard);
+
+int mmc_can_sanitize(struct mmc_card *card)
+{
+ if (card->ext_csd.sec_feature_support & EXT_CSD_SEC_SANITIZE)
+ return 1;
+ return 0;
+}
+EXPORT_SYMBOL(mmc_can_sanitize);
+
int mmc_can_secure_erase_trim(struct mmc_card *card)
{
if (card->ext_csd.sec_feature_support & EXT_CSD_SEC_ER_EN)
@@ -1609,6 +1833,82 @@
}
EXPORT_SYMBOL(mmc_erase_group_aligned);
+static unsigned int mmc_do_calc_max_discard(struct mmc_card *card,
+ unsigned int arg)
+{
+ struct mmc_host *host = card->host;
+ unsigned int max_discard, x, y, qty = 0, max_qty, timeout;
+ unsigned int last_timeout = 0;
+
+ if (card->erase_shift)
+ max_qty = UINT_MAX >> card->erase_shift;
+ else if (mmc_card_sd(card))
+ max_qty = UINT_MAX;
+ else
+ max_qty = UINT_MAX / card->erase_size;
+
+ /* Find the largest qty with an OK timeout */
+ do {
+ y = 0;
+ for (x = 1; x && x <= max_qty && max_qty - x >= qty; x <<= 1) {
+ timeout = mmc_erase_timeout(card, arg, qty + x);
+ if (timeout > host->max_discard_to)
+ break;
+ if (timeout < last_timeout)
+ break;
+ last_timeout = timeout;
+ y = x;
+ }
+ qty += y;
+ } while (y);
+
+ if (!qty)
+ return 0;
+
+ if (qty == 1)
+ return 1;
+
+ /* Convert qty to sectors */
+ if (card->erase_shift)
+ max_discard = --qty << card->erase_shift;
+ else if (mmc_card_sd(card))
+ max_discard = qty;
+ else
+ max_discard = --qty * card->erase_size;
+
+ return max_discard;
+}
+
+unsigned int mmc_calc_max_discard(struct mmc_card *card)
+{
+ struct mmc_host *host = card->host;
+ unsigned int max_discard, max_trim;
+
+ if (!host->max_discard_to)
+ return UINT_MAX;
+
+ /*
+ * Without erase_group_def set, MMC erase timeout depends on clock
+ * frequence which can change. In that case, the best choice is
+ * just the preferred erase size.
+ */
+ if (mmc_card_mmc(card) && !(card->ext_csd.erase_group_def & 1))
+ return card->pref_erase;
+
+ max_discard = mmc_do_calc_max_discard(card, MMC_ERASE_ARG);
+ if (mmc_can_trim(card)) {
+ max_trim = mmc_do_calc_max_discard(card, MMC_TRIM_ARG);
+ if (max_trim < max_discard)
+ max_discard = max_trim;
+ } else if (max_discard < card->erase_size) {
+ max_discard = 0;
+ }
+ pr_debug("%s: calculated max. discard sectors %u for timeout %u ms\n",
+ mmc_hostname(host), max_discard, host->max_discard_to);
+ return max_discard;
+}
+EXPORT_SYMBOL(mmc_calc_max_discard);
+
int mmc_set_blocklen(struct mmc_card *card, unsigned int blocklen)
{
struct mmc_command cmd = {0};
@@ -1623,6 +1923,94 @@
}
EXPORT_SYMBOL(mmc_set_blocklen);
+static void mmc_hw_reset_for_init(struct mmc_host *host)
+{
+ if (!(host->caps & MMC_CAP_HW_RESET) || !host->ops->hw_reset)
+ return;
+ mmc_host_clk_hold(host);
+ host->ops->hw_reset(host);
+ mmc_host_clk_release(host);
+}
+
+int mmc_can_reset(struct mmc_card *card)
+{
+ u8 rst_n_function;
+
+ if (!mmc_card_mmc(card))
+ return 0;
+ rst_n_function = card->ext_csd.rst_n_function;
+ if ((rst_n_function & EXT_CSD_RST_N_EN_MASK) != EXT_CSD_RST_N_ENABLED)
+ return 0;
+ return 1;
+}
+EXPORT_SYMBOL(mmc_can_reset);
+
+static int mmc_do_hw_reset(struct mmc_host *host, int check)
+{
+ struct mmc_card *card = host->card;
+
+ if (!host->bus_ops->power_restore)
+ return -EOPNOTSUPP;
+
+ if (!(host->caps & MMC_CAP_HW_RESET) || !host->ops->hw_reset)
+ return -EOPNOTSUPP;
+
+ if (!card)
+ return -EINVAL;
+
+ if (!mmc_can_reset(card))
+ return -EOPNOTSUPP;
+
+ mmc_host_clk_hold(host);
+ mmc_set_clock(host, host->f_init);
+
+ host->ops->hw_reset(host);
+
+ /* If the reset has happened, then a status command will fail */
+ if (check) {
+ struct mmc_command cmd = {0};
+ int err;
+
+ cmd.opcode = MMC_SEND_STATUS;
+ if (!mmc_host_is_spi(card->host))
+ cmd.arg = card->rca << 16;
+ cmd.flags = MMC_RSP_SPI_R2 | MMC_RSP_R1 | MMC_CMD_AC;
+ err = mmc_wait_for_cmd(card->host, &cmd, 0);
+ if (!err) {
+ mmc_host_clk_release(host);
+ return -ENOSYS;
+ }
+ }
+
+ host->card->state &= ~(MMC_STATE_HIGHSPEED | MMC_STATE_HIGHSPEED_DDR);
+ if (mmc_host_is_spi(host)) {
+ host->ios.chip_select = MMC_CS_HIGH;
+ host->ios.bus_mode = MMC_BUSMODE_PUSHPULL;
+ } else {
+ host->ios.chip_select = MMC_CS_DONTCARE;
+ host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN;
+ }
+ host->ios.bus_width = MMC_BUS_WIDTH_1;
+ host->ios.timing = MMC_TIMING_LEGACY;
+ mmc_set_ios(host);
+
+ mmc_host_clk_release(host);
+
+ return host->bus_ops->power_restore(host);
+}
+
+int mmc_hw_reset(struct mmc_host *host)
+{
+ return mmc_do_hw_reset(host, 0);
+}
+EXPORT_SYMBOL(mmc_hw_reset);
+
+int mmc_hw_reset_check(struct mmc_host *host)
+{
+ return mmc_do_hw_reset(host, 1);
+}
+EXPORT_SYMBOL(mmc_hw_reset_check);
+
static int mmc_rescan_try_freq(struct mmc_host *host, unsigned freq)
{
host->f_init = freq;
@@ -1634,6 +2022,12 @@
mmc_power_up(host);
/*
+ * Some eMMCs (with VCCQ always on) may not be reset after power up, so
+ * do a hardware reset if possible.
+ */
+ mmc_hw_reset_for_init(host);
+
+ /*
* sdio_reset sends CMD52 to reset card. Since we do not know
* if the card is being re-initialized, just send it. CMD52
* should be ignored by SD/eMMC cards.
@@ -1870,7 +2264,7 @@
mmc_bus_get(host);
- if (host->bus_ops && !host->bus_dead && host->bus_ops->awake)
+ if (host->bus_ops && !host->bus_dead && host->bus_ops->sleep)
err = host->bus_ops->sleep(host);
mmc_bus_put(host);
@@ -1889,6 +2283,65 @@
}
EXPORT_SYMBOL(mmc_card_can_sleep);
+/*
+ * Flush the cache to the non-volatile storage.
+ */
+int mmc_flush_cache(struct mmc_card *card)
+{
+ struct mmc_host *host = card->host;
+ int err = 0;
+
+ if (!(host->caps2 & MMC_CAP2_CACHE_CTRL))
+ return err;
+
+ if (mmc_card_mmc(card) &&
+ (card->ext_csd.cache_size > 0) &&
+ (card->ext_csd.cache_ctrl & 1)) {
+ err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
+ EXT_CSD_FLUSH_CACHE, 1, 0);
+ if (err)
+ pr_err("%s: cache flush error %d\n",
+ mmc_hostname(card->host), err);
+ }
+
+ return err;
+}
+EXPORT_SYMBOL(mmc_flush_cache);
+
+/*
+ * Turn the cache ON/OFF.
+ * Turning the cache OFF shall trigger flushing of the data
+ * to the non-volatile storage.
+ */
+int mmc_cache_ctrl(struct mmc_host *host, u8 enable)
+{
+ struct mmc_card *card = host->card;
+ int err = 0;
+
+ if (!(host->caps2 & MMC_CAP2_CACHE_CTRL) ||
+ mmc_card_is_removable(host))
+ return err;
+
+ if (card && mmc_card_mmc(card) &&
+ (card->ext_csd.cache_size > 0)) {
+ enable = !!enable;
+
+ if (card->ext_csd.cache_ctrl ^ enable)
+ err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
+ EXT_CSD_CACHE_CTRL, enable, 0);
+ if (err)
+ pr_err("%s: cache %s error %d\n",
+ mmc_hostname(card->host),
+ enable ? "on" : "off",
+ err);
+ else
+ card->ext_csd.cache_ctrl = enable;
+ }
+
+ return err;
+}
+EXPORT_SYMBOL(mmc_cache_ctrl);
+
#ifdef CONFIG_PM
/**
@@ -1907,6 +2360,9 @@
if (cancel_delayed_work(&host->detect))
wake_unlock(&host->detect_wake_lock);
mmc_flush_scheduled_work();
+ err = mmc_cache_ctrl(host, 0);
+ if (err)
+ goto out;
mmc_bus_get(host);
if (host->bus_ops && !host->bus_dead) {
@@ -1928,8 +2384,15 @@
err = -EBUSY;
if (!err) {
- if (host->bus_ops->suspend)
+ if (host->bus_ops->suspend) {
+ /*
+ * For eMMC 4.5 device send notify command
+ * before sleep, because in sleep state eMMC 4.5
+ * devices respond to only RESET and AWAKE cmd
+ */
+ mmc_poweroff_notify(host);
err = host->bus_ops->suspend(host);
+ }
if (!(host->card && mmc_card_sdio(host->card)))
mmc_do_release_host(host);
@@ -1954,6 +2417,7 @@
if (!err && !mmc_card_keep_power(host))
mmc_power_off(host);
+out:
return err;
}
@@ -2029,6 +2493,7 @@
break;
}
host->rescan_disable = 1;
+ host->power_notify_type = MMC_HOST_PW_NOTIFY_SHORT;
spin_unlock_irqrestore(&host->lock, flags);
if (cancel_delayed_work_sync(&host->detect))
wake_unlock(&host->detect_wake_lock);
@@ -2056,6 +2521,7 @@
break;
}
host->rescan_disable = 0;
+ host->power_notify_type = MMC_HOST_PW_NOTIFY_LONG;
spin_unlock_irqrestore(&host->lock, flags);
mmc_detect_change(host, 0);
diff --git a/drivers/mmc/core/debugfs.c b/drivers/mmc/core/debugfs.c
index 998797e..c1b0405 100644
--- a/drivers/mmc/core/debugfs.c
+++ b/drivers/mmc/core/debugfs.c
@@ -113,6 +113,9 @@
case MMC_TIMING_SD_HS:
str = "sd high-speed";
break;
+ case MMC_TIMING_MMC_HS200:
+ str = "mmc high-speed SDR200";
+ break;
default:
str = "invalid";
break;
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index 79d6e97..b7b899e 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -259,7 +259,7 @@
}
card->ext_csd.rev = ext_csd[EXT_CSD_REV];
- if (card->ext_csd.rev > 5) {
+ if (card->ext_csd.rev > 6) {
printk(KERN_ERR "%s: unrecognised EXT_CSD revision %d\n",
mmc_hostname(card->host), card->ext_csd.rev);
err = -EINVAL;
@@ -283,6 +283,27 @@
}
card->ext_csd.raw_card_type = ext_csd[EXT_CSD_CARD_TYPE];
switch (ext_csd[EXT_CSD_CARD_TYPE] & EXT_CSD_CARD_TYPE_MASK) {
+ case EXT_CSD_CARD_TYPE_SDR_ALL:
+ case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_8V:
+ case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_2V:
+ case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_52:
+ card->ext_csd.hs_max_dtr = 200000000;
+ card->ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_200;
+ break;
+ case EXT_CSD_CARD_TYPE_SDR_1_2V_ALL:
+ case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_8V:
+ case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_2V:
+ case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_52:
+ card->ext_csd.hs_max_dtr = 200000000;
+ card->ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_1_2V;
+ break;
+ case EXT_CSD_CARD_TYPE_SDR_1_8V_ALL:
+ case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_8V:
+ case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_2V:
+ case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_52:
+ card->ext_csd.hs_max_dtr = 200000000;
+ card->ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_1_8V;
+ break;
case EXT_CSD_CARD_TYPE_DDR_52 | EXT_CSD_CARD_TYPE_52 |
EXT_CSD_CARD_TYPE_26:
card->ext_csd.hs_max_dtr = 52000000;
@@ -359,6 +380,7 @@
* card has the Enhanced area enabled. If so, export enhanced
* area offset and size to user by adding sysfs interface.
*/
+ card->ext_csd.raw_partition_support = ext_csd[EXT_CSD_PARTITION_SUPPORT];
if ((ext_csd[EXT_CSD_PARTITION_SUPPORT] & 0x2) &&
(ext_csd[EXT_CSD_PARTITION_ATTRIBUTE] & 0x1)) {
u8 hc_erase_grp_sz =
@@ -402,14 +424,48 @@
ext_csd[EXT_CSD_TRIM_MULT];
}
- if (card->ext_csd.rev >= 5)
- card->ext_csd.rel_param = ext_csd[EXT_CSD_WR_REL_PARAM];
+ if (card->ext_csd.rev >= 5) {
+ /* check whether the eMMC card supports HPI */
+ if (ext_csd[EXT_CSD_HPI_FEATURES] & 0x1) {
+ card->ext_csd.hpi = 1;
+ if (ext_csd[EXT_CSD_HPI_FEATURES] & 0x2)
+ card->ext_csd.hpi_cmd = MMC_STOP_TRANSMISSION;
+ else
+ card->ext_csd.hpi_cmd = MMC_SEND_STATUS;
+ /*
+ * Indicate the maximum timeout to close
+ * a command interrupted by HPI
+ */
+ card->ext_csd.out_of_int_time =
+ ext_csd[EXT_CSD_OUT_OF_INTERRUPT_TIME] * 10;
+ }
+ card->ext_csd.rel_param = ext_csd[EXT_CSD_WR_REL_PARAM];
+ card->ext_csd.rst_n_function = ext_csd[EXT_CSD_RST_N_FUNCTION];
+ }
+
+ card->ext_csd.raw_erased_mem_count = ext_csd[EXT_CSD_ERASED_MEM_CONT];
if (ext_csd[EXT_CSD_ERASED_MEM_CONT])
card->erased_byte = 0xFF;
else
card->erased_byte = 0x0;
+ /* eMMC v4.5 or later */
+ if (card->ext_csd.rev >= 6) {
+ card->ext_csd.feature_support |= MMC_DISCARD_FEATURE;
+
+ card->ext_csd.generic_cmd6_time = 10 *
+ ext_csd[EXT_CSD_GENERIC_CMD6_TIME];
+ card->ext_csd.power_off_longtime = 10 *
+ ext_csd[EXT_CSD_POWER_OFF_LONG_TIME];
+
+ card->ext_csd.cache_size =
+ ext_csd[EXT_CSD_CACHE_SIZE + 0] << 0 |
+ ext_csd[EXT_CSD_CACHE_SIZE + 1] << 8 |
+ ext_csd[EXT_CSD_CACHE_SIZE + 2] << 16 |
+ ext_csd[EXT_CSD_CACHE_SIZE + 3] << 24;
+ }
+
out:
return err;
}
@@ -530,6 +586,159 @@
};
/*
+ * Select the PowerClass for the current bus width
+ * If power class is defined for 4/8 bit bus in the
+ * extended CSD register, select it by executing the
+ * mmc_switch command.
+ */
+static int mmc_select_powerclass(struct mmc_card *card,
+ unsigned int bus_width, u8 *ext_csd)
+{
+ int err = 0;
+ unsigned int pwrclass_val;
+ unsigned int index = 0;
+ struct mmc_host *host;
+
+ BUG_ON(!card);
+
+ host = card->host;
+ BUG_ON(!host);
+
+ if (ext_csd == NULL)
+ return 0;
+
+ /* Power class selection is supported for versions >= 4.0 */
+ if (card->csd.mmca_vsn < CSD_SPEC_VER_4)
+ return 0;
+
+ /* Power class values are defined only for 4/8 bit bus */
+ if (bus_width == EXT_CSD_BUS_WIDTH_1)
+ return 0;
+
+ switch (1 << host->ios.vdd) {
+ case MMC_VDD_165_195:
+ if (host->ios.clock <= 26000000)
+ index = EXT_CSD_PWR_CL_26_195;
+ else if (host->ios.clock <= 52000000)
+ index = (bus_width <= EXT_CSD_BUS_WIDTH_8) ?
+ EXT_CSD_PWR_CL_52_195 :
+ EXT_CSD_PWR_CL_DDR_52_195;
+ else if (host->ios.clock <= 200000000)
+ index = EXT_CSD_PWR_CL_200_195;
+ break;
+ case MMC_VDD_32_33:
+ case MMC_VDD_33_34:
+ case MMC_VDD_34_35:
+ case MMC_VDD_35_36:
+ if (host->ios.clock <= 26000000)
+ index = EXT_CSD_PWR_CL_26_360;
+ else if (host->ios.clock <= 52000000)
+ index = (bus_width <= EXT_CSD_BUS_WIDTH_8) ?
+ EXT_CSD_PWR_CL_52_360 :
+ EXT_CSD_PWR_CL_DDR_52_360;
+ else if (host->ios.clock <= 200000000)
+ index = EXT_CSD_PWR_CL_200_360;
+ break;
+ default:
+ pr_warning("%s: Voltage range not supported "
+ "for power class.\n", mmc_hostname(host));
+ return -EINVAL;
+ }
+
+ pwrclass_val = ext_csd[index];
+
+ if (bus_width & (EXT_CSD_BUS_WIDTH_8 | EXT_CSD_DDR_BUS_WIDTH_8))
+ pwrclass_val = (pwrclass_val & EXT_CSD_PWR_CL_8BIT_MASK) >>
+ EXT_CSD_PWR_CL_8BIT_SHIFT;
+ else
+ pwrclass_val = (pwrclass_val & EXT_CSD_PWR_CL_4BIT_MASK) >>
+ EXT_CSD_PWR_CL_4BIT_SHIFT;
+
+ /* If the power class is different from the default value */
+ if (pwrclass_val > 0) {
+ err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
+ EXT_CSD_POWER_CLASS,
+ pwrclass_val,
+ card->ext_csd.generic_cmd6_time);
+ }
+
+ return err;
+}
+
+/*
+ * Selects the desired buswidth and switch to the HS200 mode
+ * if bus width set without error
+ */
+static int mmc_select_hs200(struct mmc_card *card)
+{
+ int idx, err = 0;
+ struct mmc_host *host;
+ static unsigned ext_csd_bits[] = {
+ EXT_CSD_BUS_WIDTH_4,
+ EXT_CSD_BUS_WIDTH_8,
+ };
+ static unsigned bus_widths[] = {
+ MMC_BUS_WIDTH_4,
+ MMC_BUS_WIDTH_8,
+ };
+
+ BUG_ON(!card);
+
+ host = card->host;
+
+ if (card->ext_csd.card_type & EXT_CSD_CARD_TYPE_SDR_1_2V &&
+ host->caps2 & MMC_CAP2_HS200_1_2V_SDR)
+ if (mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120, 0))
+ err = mmc_set_signal_voltage(host,
+ MMC_SIGNAL_VOLTAGE_180, 0);
+
+ /* If fails try again during next card power cycle */
+ if (err)
+ goto err;
+
+ idx = (host->caps & MMC_CAP_8_BIT_DATA) ? 1 : 0;
+
+ /*
+ * Unlike SD, MMC cards dont have a configuration register to notify
+ * supported bus width. So bus test command should be run to identify
+ * the supported bus width or compare the ext csd values of current
+ * bus width and ext csd values of 1 bit mode read earlier.
+ */
+ for (; idx >= 0; idx--) {
+
+ /*
+ * Host is capable of 8bit transfer, then switch
+ * the device to work in 8bit transfer mode. If the
+ * mmc switch command returns error then switch to
+ * 4bit transfer mode. On success set the corresponding
+ * bus width on the host.
+ */
+ err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
+ EXT_CSD_BUS_WIDTH,
+ ext_csd_bits[idx],
+ card->ext_csd.generic_cmd6_time);
+ if (err)
+ continue;
+
+ mmc_set_bus_width(card->host, bus_widths[idx]);
+
+ if (!(host->caps & MMC_CAP_BUS_WIDTH_TEST))
+ err = mmc_compare_ext_csds(card, bus_widths[idx]);
+ else
+ err = mmc_bus_test(card, bus_widths[idx]);
+ if (!err)
+ break;
+ }
+
+ /* switch to HS200 mode if bus width set successfully */
+ if (!err)
+ err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
+ EXT_CSD_HS_TIMING, 2, 0);
+err:
+ return err;
+}
+
+/*
* Handle the detection and initialisation of a card.
*
* In the case of a resume, "oldcard" will contain the card
@@ -671,7 +880,8 @@
*/
if (card->ext_csd.enhanced_area_en) {
err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
- EXT_CSD_ERASE_GROUP_DEF, 1, 0);
+ EXT_CSD_ERASE_GROUP_DEF, 1,
+ card->ext_csd.generic_cmd6_time);
if (err && err != -EBADMSG)
goto free_card;
@@ -709,12 +919,39 @@
}
/*
+ * If the host supports the power_off_notify capability then
+ * set the notification byte in the ext_csd register of device
+ */
+ if ((host->caps2 & MMC_CAP2_POWEROFF_NOTIFY) &&
+ (card->ext_csd.rev >= 6)) {
+ err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
+ EXT_CSD_POWER_OFF_NOTIFICATION,
+ EXT_CSD_POWER_ON,
+ card->ext_csd.generic_cmd6_time);
+ if (err && err != -EBADMSG)
+ goto free_card;
+
+ /*
+ * The err can be -EBADMSG or 0,
+ * so check for success and update the flag
+ */
+ if (!err)
+ card->poweroff_notify_state = MMC_POWERED_ON;
+ }
+
+ /*
* Activate high speed (if supported)
*/
- if ((card->ext_csd.hs_max_dtr != 0) &&
- (host->caps & MMC_CAP_MMC_HIGHSPEED)) {
- err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
- EXT_CSD_HS_TIMING, 1, 0);
+ if (card->ext_csd.hs_max_dtr != 0) {
+ err = 0;
+ if (card->ext_csd.hs_max_dtr > 52000000 &&
+ host->caps2 & MMC_CAP2_HS200)
+ err = mmc_select_hs200(card);
+ else if (host->caps & MMC_CAP_MMC_HIGHSPEED)
+ err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
+ EXT_CSD_HS_TIMING, 1,
+ card->ext_csd.generic_cmd6_time);
+
if (err && err != -EBADMSG)
goto free_card;
@@ -723,8 +960,15 @@
mmc_hostname(card->host));
err = 0;
} else {
- mmc_card_set_highspeed(card);
- mmc_set_timing(card->host, MMC_TIMING_MMC_HS);
+ if (card->ext_csd.hs_max_dtr > 52000000 &&
+ host->caps2 & MMC_CAP2_HS200) {
+ mmc_card_set_hs200(card);
+ mmc_set_timing(card->host,
+ MMC_TIMING_MMC_HS200);
+ } else {
+ mmc_card_set_highspeed(card);
+ mmc_set_timing(card->host, MMC_TIMING_MMC_HS);
+ }
}
}
@@ -733,7 +977,7 @@
*/
max_dtr = (unsigned int)-1;
- if (mmc_card_highspeed(card)) {
+ if (mmc_card_highspeed(card) || mmc_card_hs200(card)) {
if (max_dtr > card->ext_csd.hs_max_dtr)
max_dtr = card->ext_csd.hs_max_dtr;
} else if (max_dtr > card->csd.max_dtr) {
@@ -759,9 +1003,51 @@
}
/*
+ * Indicate HS200 SDR mode (if supported).
+ */
+ if (mmc_card_hs200(card)) {
+ u32 ext_csd_bits;
+ u32 bus_width = card->host->ios.bus_width;
+
+ /*
+ * For devices supporting HS200 mode, the bus width has
+ * to be set before executing the tuning function. If
+ * set before tuning, then device will respond with CRC
+ * errors for responses on CMD line. So for HS200 the
+ * sequence will be
+ * 1. set bus width 4bit / 8 bit (1 bit not supported)
+ * 2. switch to HS200 mode
+ * 3. set the clock to > 52Mhz <=200MHz and
+ * 4. execute tuning for HS200
+ */
+ if ((host->caps2 & MMC_CAP2_HS200) &&
+ card->host->ops->execute_tuning) {
+ mmc_host_clk_hold(card->host);
+ err = card->host->ops->execute_tuning(card->host,
+ MMC_SEND_TUNING_BLOCK_HS200);
+ mmc_host_clk_release(card->host);
+ }
+ if (err) {
+ pr_warning("%s: tuning execution failed\n",
+ mmc_hostname(card->host));
+ goto err;
+ }
+
+ ext_csd_bits = (bus_width == MMC_BUS_WIDTH_8) ?
+ EXT_CSD_BUS_WIDTH_8 : EXT_CSD_BUS_WIDTH_4;
+ err = mmc_select_powerclass(card, ext_csd_bits, ext_csd);
+ if (err) {
+ pr_err("%s: power class selection to bus width %d failed\n",
+ mmc_hostname(card->host), 1 << bus_width);
+ goto err;
+ }
+ }
+
+ /*
* Activate wide bus and DDR (if supported).
*/
- if ((card->csd.mmca_vsn >= CSD_SPEC_VER_4) &&
+ if (!mmc_card_hs200(card) &&
+ (card->csd.mmca_vsn >= CSD_SPEC_VER_4) &&
(host->caps & (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA))) {
static unsigned ext_csd_bits[][2] = {
{ EXT_CSD_BUS_WIDTH_8, EXT_CSD_DDR_BUS_WIDTH_8 },
@@ -783,10 +1069,18 @@
bus_width = bus_widths[idx];
if (bus_width == MMC_BUS_WIDTH_1)
ddr = 0; /* no DDR for 1-bit width */
+ err = mmc_select_powerclass(card, ext_csd_bits[idx][0],
+ ext_csd);
+ if (err)
+ pr_err("%s: power class selection to "
+ "bus width %d failed\n",
+ mmc_hostname(card->host),
+ 1 << bus_width);
+
err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
EXT_CSD_BUS_WIDTH,
ext_csd_bits[idx][0],
- 0);
+ card->ext_csd.generic_cmd6_time);
if (!err) {
mmc_set_bus_width(card->host, bus_width);
@@ -806,10 +1100,18 @@
}
if (!err && ddr) {
+ err = mmc_select_powerclass(card, ext_csd_bits[idx][1],
+ ext_csd);
+ if (err)
+ pr_err("%s: power class selection to "
+ "bus width %d ddr %d failed\n",
+ mmc_hostname(card->host),
+ 1 << bus_width, ddr);
+
err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
EXT_CSD_BUS_WIDTH,
ext_csd_bits[idx][1],
- 0);
+ card->ext_csd.generic_cmd6_time);
}
if (err) {
printk(KERN_WARNING "%s: switch to bus width %d ddr %d "
@@ -843,6 +1145,40 @@
}
}
+ /*
+ * Enable HPI feature (if supported)
+ */
+ if (card->ext_csd.hpi) {
+ err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
+ EXT_CSD_HPI_MGMT, 1,
+ card->ext_csd.generic_cmd6_time);
+ if (err && err != -EBADMSG)
+ goto free_card;
+ if (err) {
+ pr_warning("%s: Enabling HPI failed\n",
+ mmc_hostname(card->host));
+ err = 0;
+ } else
+ card->ext_csd.hpi_en = 1;
+ }
+
+ /*
+ * If cache size is higher than 0, this indicates
+ * the existence of cache and it can be turned on.
+ */
+ if ((host->caps2 & MMC_CAP2_CACHE_CTRL) &&
+ card->ext_csd.cache_size > 0) {
+ err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
+ EXT_CSD_CACHE_CTRL, 1, 0);
+ if (err && err != -EBADMSG)
+ goto free_card;
+
+ /*
+ * Only if no error, cache is turned on successfully.
+ */
+ card->ext_csd.cache_ctrl = err ? 0 : 1;
+ }
+
if (!oldcard)
host->card = card;
diff --git a/drivers/mmc/core/mmc_ops.c b/drivers/mmc/core/mmc_ops.c
index 2e39d2c..2438176 100644
--- a/drivers/mmc/core/mmc_ops.c
+++ b/drivers/mmc/core/mmc_ops.c
@@ -233,7 +233,7 @@
mmc_send_cxd_data(struct mmc_card *card, struct mmc_host *host,
u32 opcode, void *buf, unsigned len)
{
- struct mmc_request mrq = {0};
+ struct mmc_request mrq = {NULL};
struct mmc_command cmd = {0};
struct mmc_data data = {0};
struct scatterlist sg;
@@ -408,7 +408,7 @@
break;
if (mmc_host_is_spi(card->host))
break;
- } while (R1_CURRENT_STATE(status) == 7);
+ } while (R1_CURRENT_STATE(status) == R1_STATE_PRG);
if (mmc_host_is_spi(card->host)) {
if (status & R1_SPI_ILLEGAL_COMMAND)
@@ -455,7 +455,7 @@
mmc_send_bus_test(struct mmc_card *card, struct mmc_host *host, u8 opcode,
u8 len)
{
- struct mmc_request mrq = {0};
+ struct mmc_request mrq = {NULL};
struct mmc_command cmd = {0};
struct mmc_data data = {0};
struct scatterlist sg;
@@ -551,3 +551,34 @@
err = mmc_send_bus_test(card, card->host, MMC_BUS_TEST_R, width);
return err;
}
+
+int mmc_send_hpi_cmd(struct mmc_card *card, u32 *status)
+{
+ struct mmc_command cmd = {0};
+ unsigned int opcode;
+ unsigned int flags;
+ int err;
+
+ opcode = card->ext_csd.hpi_cmd;
+ if (opcode == MMC_STOP_TRANSMISSION)
+ flags = MMC_RSP_R1 | MMC_CMD_AC;
+ else if (opcode == MMC_SEND_STATUS)
+ flags = MMC_RSP_R1 | MMC_CMD_AC;
+
+ cmd.opcode = opcode;
+ cmd.arg = card->rca << 16 | 1;
+ cmd.flags = flags;
+ cmd.cmd_timeout_ms = card->ext_csd.out_of_int_time;
+
+ err = mmc_wait_for_cmd(card->host, &cmd, 0);
+ if (err) {
+ pr_warn("%s: error %d interrupting operation. "
+ "HPI command response %#x\n", mmc_hostname(card->host),
+ err, cmd.resp[0]);
+ return err;
+ }
+ if (status)
+ *status = cmd.resp[0];
+
+ return 0;
+}
diff --git a/drivers/mmc/core/mmc_ops.h b/drivers/mmc/core/mmc_ops.h
index 9276946..3dd8941 100644
--- a/drivers/mmc/core/mmc_ops.h
+++ b/drivers/mmc/core/mmc_ops.h
@@ -26,6 +26,7 @@
int mmc_spi_set_crc(struct mmc_host *host, int use_crc);
int mmc_card_sleepawake(struct mmc_host *host, int sleep);
int mmc_bus_test(struct mmc_card *card, u8 bus_width);
+int mmc_send_hpi_cmd(struct mmc_card *card, u32 *status);
#endif
diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c
index 6522efb..cd0eb4e 100644
--- a/drivers/mmc/core/sd.c
+++ b/drivers/mmc/core/sd.c
@@ -651,7 +651,8 @@
/* SPI mode doesn't define CMD19 */
if (!mmc_host_is_spi(card->host) && card->host->ops->execute_tuning) {
mmc_host_clk_hold(card->host);
- err = card->host->ops->execute_tuning(card->host);
+ err = card->host->ops->execute_tuning(card->host,
+ MMC_SEND_TUNING_BLOCK);
mmc_host_clk_release(card->host);
}
diff --git a/drivers/mmc/core/sd_ops.c b/drivers/mmc/core/sd_ops.c
index 021fed1..46a7854 100644
--- a/drivers/mmc/core/sd_ops.c
+++ b/drivers/mmc/core/sd_ops.c
@@ -67,7 +67,7 @@
int mmc_wait_for_app_cmd(struct mmc_host *host, struct mmc_card *card,
struct mmc_command *cmd, int retries)
{
- struct mmc_request mrq = {0};
+ struct mmc_request mrq = {NULL};
int i, err;
@@ -244,7 +244,7 @@
int mmc_app_send_scr(struct mmc_card *card, u32 *scr)
{
int err;
- struct mmc_request mrq = {0};
+ struct mmc_request mrq = {NULL};
struct mmc_command cmd = {0};
struct mmc_data data = {0};
struct scatterlist sg;
@@ -303,7 +303,7 @@
int mmc_sd_switch(struct mmc_card *card, int mode, int group,
u8 value, u8 *resp)
{
- struct mmc_request mrq = {0};
+ struct mmc_request mrq = {NULL};
struct mmc_command cmd = {0};
struct mmc_data data = {0};
struct scatterlist sg;
@@ -348,7 +348,7 @@
int mmc_app_sd_status(struct mmc_card *card, void *ssr)
{
int err;
- struct mmc_request mrq = {0};
+ struct mmc_request mrq = {NULL};
struct mmc_command cmd = {0};
struct mmc_data data = {0};
struct scatterlist sg;
diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c
index 8ac2e59..1d6cf1d 100644
--- a/drivers/mmc/core/sdio.c
+++ b/drivers/mmc/core/sdio.c
@@ -14,6 +14,7 @@
#include <linux/mmc/host.h>
#include <linux/mmc/card.h>
+#include <linux/mmc/mmc.h>
#include <linux/mmc/sdio.h>
#include <linux/mmc/sdio_func.h>
#include <linux/mmc/sdio_ids.h>
diff --git a/drivers/mmc/core/sdio_ops.c b/drivers/mmc/core/sdio_ops.c
index f087d87..4addbe9 100644
--- a/drivers/mmc/core/sdio_ops.c
+++ b/drivers/mmc/core/sdio_ops.c
@@ -121,7 +121,7 @@
int mmc_io_rw_extended(struct mmc_card *card, int write, unsigned fn,
unsigned addr, int incr_addr, u8 *buf, unsigned blocks, unsigned blksz)
{
- struct mmc_request mrq = {0};
+ struct mmc_request mrq = {NULL};
struct mmc_command cmd = {0};
struct mmc_data data = {0};
struct scatterlist sg;
diff --git a/drivers/mmc/host/mmc_spi.c b/drivers/mmc/host/mmc_spi.c
index 7c1e16a..92946b8 100644
--- a/drivers/mmc/host/mmc_spi.c
+++ b/drivers/mmc/host/mmc_spi.c
@@ -27,6 +27,7 @@
#include <linux/sched.h>
#include <linux/delay.h>
#include <linux/slab.h>
+#include <linux/module.h>
#include <linux/bio.h>
#include <linux/dma-mapping.h>
#include <linux/crc7.h>
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
index e364eac..69921b1 100644
--- a/drivers/mmc/host/msm_sdcc.c
+++ b/drivers/mmc/host/msm_sdcc.c
@@ -134,6 +134,8 @@
u32 c);
static inline void msmsdcc_delay(struct msmsdcc_host *host);
static void msmsdcc_dump_sdcc_state(struct msmsdcc_host *host);
+static void msmsdcc_sg_start(struct msmsdcc_host *host);
+static int msmsdcc_vreg_reset(struct msmsdcc_host *host);
static inline unsigned short msmsdcc_get_nr_sg(struct msmsdcc_host *host)
{
@@ -1076,21 +1078,15 @@
/* Is data transfer in PIO mode required? */
if (!(datactrl & MCI_DPSM_DMAENABLE)) {
- unsigned int sg_miter_flags = SG_MITER_ATOMIC;
-
if (data->flags & MMC_DATA_READ) {
- sg_miter_flags |= SG_MITER_TO_SG;
pio_irqmask = MCI_RXFIFOHALFFULLMASK;
if (host->curr.xfer_remain < MCI_FIFOSIZE)
pio_irqmask |= MCI_RXDATAAVLBLMASK;
- } else {
- sg_miter_flags |= SG_MITER_FROM_SG;
+ } else
pio_irqmask = MCI_TXFIFOHALFEMPTYMASK |
MCI_TXFIFOEMPTYMASK;
- }
- sg_miter_start(&host->sg_miter, data->sg, data->sg_len,
- sg_miter_flags);
+ msmsdcc_sg_start(host);
}
if (data->flags & MMC_DATA_READ)
@@ -1250,6 +1246,144 @@
return ptr - buffer;
}
+/*
+ * Copy up to a word (4 bytes) between a scatterlist
+ * and a temporary bounce buffer when the word lies across
+ * two pages. The temporary buffer can then be read to/
+ * written from the FIFO once.
+ */
+static void _msmsdcc_sg_consume_word(struct msmsdcc_host *host)
+{
+ struct msmsdcc_pio_data *pio = &host->pio;
+ unsigned int bytes_avail;
+
+ if (host->curr.data->flags & MMC_DATA_READ)
+ memcpy(pio->sg_miter.addr, pio->bounce_buf,
+ pio->bounce_buf_len);
+ else
+ memcpy(pio->bounce_buf, pio->sg_miter.addr,
+ pio->bounce_buf_len);
+
+ while (pio->bounce_buf_len != 4) {
+ if (!sg_miter_next(&pio->sg_miter))
+ break;
+ bytes_avail = min_t(unsigned int, pio->sg_miter.length,
+ 4 - pio->bounce_buf_len);
+ if (host->curr.data->flags & MMC_DATA_READ)
+ memcpy(pio->sg_miter.addr,
+ &pio->bounce_buf[pio->bounce_buf_len],
+ bytes_avail);
+ else
+ memcpy(&pio->bounce_buf[pio->bounce_buf_len],
+ pio->sg_miter.addr, bytes_avail);
+
+ pio->sg_miter.consumed = bytes_avail;
+ pio->bounce_buf_len += bytes_avail;
+ }
+}
+
+/*
+ * Use sg_miter_next to return as many 4-byte aligned
+ * chunks as possible, using a temporary 4 byte buffer
+ * for alignment if necessary
+ */
+static int msmsdcc_sg_next(struct msmsdcc_host *host, char **buf, int *len)
+{
+ struct msmsdcc_pio_data *pio = &host->pio;
+ unsigned int length, rlength;
+ char *buffer;
+
+ if (!sg_miter_next(&pio->sg_miter))
+ return 0;
+
+ buffer = pio->sg_miter.addr;
+ length = pio->sg_miter.length;
+
+ if (length < host->curr.xfer_remain) {
+ rlength = round_down(length, 4);
+ if (rlength) {
+ /*
+ * We have a 4-byte aligned chunk.
+ * The rounding will be reflected by
+ * a call to msmsdcc_sg_consumed
+ */
+ length = rlength;
+ goto sg_next_end;
+ }
+ /*
+ * We have a length less than 4 bytes. Check to
+ * see if more buffer is available, and combine
+ * to make 4 bytes if possible.
+ */
+ pio->bounce_buf_len = length;
+ memset(pio->bounce_buf, 0, 4);
+
+ /*
+ * On a read, get 4 bytes from FIFO, and distribute
+ * (4-bouce_buf_len) bytes into consecutive
+ * sgl buffers when msmsdcc_sg_consumed is called
+ */
+ if (host->curr.data->flags & MMC_DATA_READ) {
+ buffer = pio->bounce_buf;
+ length = 4;
+ goto sg_next_end;
+ } else {
+ _msmsdcc_sg_consume_word(host);
+ buffer = pio->bounce_buf;
+ length = pio->bounce_buf_len;
+ }
+ }
+
+sg_next_end:
+ *buf = buffer;
+ *len = length;
+ return 1;
+}
+
+/*
+ * Update sg_miter.consumed based on how many bytes were
+ * consumed. If the bounce buffer was used to read from FIFO,
+ * redistribute into sgls.
+ */
+static void msmsdcc_sg_consumed(struct msmsdcc_host *host,
+ unsigned int length)
+{
+ struct msmsdcc_pio_data *pio = &host->pio;
+
+ if (host->curr.data->flags & MMC_DATA_READ) {
+ if (length > pio->sg_miter.consumed)
+ /*
+ * consumed 4 bytes, but sgl
+ * describes < 4 bytes
+ */
+ _msmsdcc_sg_consume_word(host);
+ else
+ pio->sg_miter.consumed = length;
+ } else
+ if (length < pio->sg_miter.consumed)
+ pio->sg_miter.consumed = length;
+}
+
+static void msmsdcc_sg_start(struct msmsdcc_host *host)
+{
+ unsigned int sg_miter_flags = SG_MITER_ATOMIC;
+
+ host->pio.bounce_buf_len = 0;
+
+ if (host->curr.data->flags & MMC_DATA_READ)
+ sg_miter_flags |= SG_MITER_TO_SG;
+ else
+ sg_miter_flags |= SG_MITER_FROM_SG;
+
+ sg_miter_start(&host->pio.sg_miter, host->curr.data->sg,
+ host->curr.data->sg_len, sg_miter_flags);
+}
+
+static void msmsdcc_sg_stop(struct msmsdcc_host *host)
+{
+ sg_miter_stop(&host->pio.sg_miter);
+}
+
static irqreturn_t
msmsdcc_pio_irq(int irq, void *dev_id)
{
@@ -1257,6 +1391,8 @@
void __iomem *base = host->base;
uint32_t status;
unsigned long flags;
+ unsigned int remain;
+ char *buffer;
spin_lock(&host->lock);
@@ -1267,45 +1403,43 @@
spin_unlock(&host->lock);
return IRQ_NONE;
}
-
#if IRQ_DEBUG
msmsdcc_print_status(host, "irq1-r", status);
#endif
local_irq_save(flags);
- while (sg_miter_next(&host->sg_miter)) {
-
- unsigned int remain, len;
- char *buffer;
+ do {
+ unsigned int len;
if (!(status & (MCI_TXFIFOHALFEMPTY | MCI_TXFIFOEMPTY
| MCI_RXDATAAVLBL)))
break;
- buffer = host->sg_miter.addr;
- remain = host->sg_miter.length;
+ if (!msmsdcc_sg_next(host, &buffer, &remain))
+ break;
len = 0;
if (status & MCI_RXACTIVE)
len = msmsdcc_pio_read(host, buffer, remain);
if (status & MCI_TXACTIVE)
len = msmsdcc_pio_write(host, buffer, remain);
+
/* len might have aligned to 32bits above */
if (len > remain)
len = remain;
- host->sg_miter.consumed = len;
host->curr.xfer_remain -= len;
host->curr.data_xfered += len;
remain -= len;
+ msmsdcc_sg_consumed(host, len);
if (remain) /* Done with this page? */
break; /* Nope */
status = readl_relaxed(base + MMCISTATUS);
- }
+ } while (1);
- sg_miter_stop(&host->sg_miter);
+ msmsdcc_sg_stop(host);
local_irq_restore(flags);
if (status & MCI_RXACTIVE && host->curr.xfer_remain < MCI_FIFOSIZE) {
@@ -1835,6 +1969,10 @@
if (rc)
goto vccq_reg_deinit;
}
+ rc = msmsdcc_vreg_reset(host);
+ if (rc)
+ pr_err("msmsdcc.%d vreg reset failed (%d)\n",
+ host->pdev_id, rc);
goto out;
} else {
/* Deregister all regulators from regulator framework */
@@ -1943,6 +2081,21 @@
return rc;
}
+/*
+ * Reset vreg by ensuring it is off during probe. A call
+ * to enable vreg is needed to balance disable vreg
+ */
+static int msmsdcc_vreg_reset(struct msmsdcc_host *host)
+{
+ int rc;
+
+ rc = msmsdcc_setup_vreg(host, 1);
+ if (rc)
+ return rc;
+ rc = msmsdcc_setup_vreg(host, 0);
+ return rc;
+}
+
static int msmsdcc_set_vddp_level(struct msmsdcc_host *host, int level)
{
int rc = 0;
@@ -2877,15 +3030,22 @@
* Select the 3/4 of the range and configure the DLL with the
* selected DLL clock output phase.
*/
-static u8 find_most_appropriate_phase(struct msmsdcc_host *host,
+static int find_most_appropriate_phase(struct msmsdcc_host *host,
u8 *phase_table, u8 total_phases)
{
- u8 ret, ranges[16][16] = { {0}, {0} };
+ int ret;
+ u8 ranges[16][16] = { {0}, {0} };
u8 phases_per_row[16] = {0};
int row_index = 0, col_index = 0, selected_row_index = 0, curr_max = 0;
int i, cnt, phase_0_raw_index = 0, phase_15_raw_index = 0;
bool phase_0_found = false, phase_15_found = false;
+ if (total_phases > 16) {
+ pr_err("%s: %s: invalid argument: total_phases=%d\n",
+ mmc_hostname(host->mmc), __func__, total_phases);
+ return -EINVAL;
+ }
+
for (cnt = 0; cnt < total_phases; cnt++) {
ranges[row_index][col_index] = phase_table[cnt];
phases_per_row[row_index] += 1;
@@ -2943,12 +3103,12 @@
}
i = ((curr_max * 3) / 4) - 1;
- ret = ranges[selected_row_index][i];
+ ret = (int)ranges[selected_row_index][i];
return ret;
}
-static int msmsdcc_execute_tuning(struct mmc_host *mmc)
+static int msmsdcc_execute_tuning(struct mmc_host *mmc, u32 opcode)
{
int rc = 0;
struct msmsdcc_host *host = mmc_priv(mmc);
@@ -3022,8 +3182,13 @@
} while (++phase < 16);
if (tuned_phase_cnt) {
- phase = find_most_appropriate_phase(host, tuned_phases,
+ rc = find_most_appropriate_phase(host, tuned_phases,
tuned_phase_cnt);
+ if (rc < 0)
+ goto kfree;
+ else
+ phase = (u8)rc;
+
/*
* Finally set the selected phase in delay
* line hw block.
diff --git a/drivers/mmc/host/msm_sdcc.h b/drivers/mmc/host/msm_sdcc.h
index 319d721..8a728f2 100644
--- a/drivers/mmc/host/msm_sdcc.h
+++ b/drivers/mmc/host/msm_sdcc.h
@@ -281,9 +281,10 @@
};
struct msmsdcc_pio_data {
- struct scatterlist *sg;
- unsigned int sg_len;
- unsigned int sg_off;
+ struct sg_mapping_iter sg_miter;
+ char bounce_buf[4];
+ /* valid bytes in bounce_buf */
+ int bounce_buf_len;
};
struct msmsdcc_curr_req {
@@ -361,7 +362,7 @@
struct msmsdcc_sps_data sps;
bool is_dma_mode;
bool is_sps_mode;
- struct sg_mapping_iter sg_miter;
+ struct msmsdcc_pio_data pio;
#ifdef CONFIG_HAS_EARLYSUSPEND
struct early_suspend early_suspend;
diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c
index d513d47..99b449d 100644
--- a/drivers/mmc/host/mxs-mmc.c
+++ b/drivers/mmc/host/mxs-mmc.c
@@ -37,6 +37,7 @@
#include <linux/mmc/sdio.h>
#include <linux/gpio.h>
#include <linux/regulator/consumer.h>
+#include <linux/module.h>
#include <mach/mxs.h>
#include <mach/common.h>
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index ba40d6d..6be0a24 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -15,6 +15,7 @@
#include <linux/io.h>
#include <linux/delay.h>
+#include <linux/module.h>
#include <linux/mmc/host.h>
#include "sdhci-of.h"
#include "sdhci.h"
diff --git a/drivers/mmc/host/sdhci-of-hlwd.c b/drivers/mmc/host/sdhci-of-hlwd.c
index 68ddb75..aaea044 100644
--- a/drivers/mmc/host/sdhci-of-hlwd.c
+++ b/drivers/mmc/host/sdhci-of-hlwd.c
@@ -20,6 +20,7 @@
*/
#include <linux/delay.h>
+#include <linux/module.h>
#include <linux/mmc/host.h>
#include "sdhci-of.h"
#include "sdhci.h"
diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c
index 936bbca..67c8709 100644
--- a/drivers/mmc/host/sdhci-pci.c
+++ b/drivers/mmc/host/sdhci-pci.c
@@ -14,6 +14,7 @@
#include <linux/delay.h>
#include <linux/highmem.h>
+#include <linux/module.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
#include <linux/slab.h>
diff --git a/drivers/mmc/host/sdhci-spear.c b/drivers/mmc/host/sdhci-spear.c
index 60a4c97..a152b5c 100644
--- a/drivers/mmc/host/sdhci-spear.c
+++ b/drivers/mmc/host/sdhci-spear.c
@@ -17,6 +17,7 @@
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/highmem.h>
+#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/platform_device.h>
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 343c97e..bb1ae46 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -20,6 +20,7 @@
#include <linux/gpio.h>
#include <linux/mmc/card.h>
#include <linux/mmc/host.h>
+#include <linux/module.h>
#include <mach/gpio.h>
#include <mach/sdhci.h>
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index aad27c8..9cf813e 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -16,6 +16,7 @@
#include <linux/delay.h>
#include <linux/highmem.h>
#include <linux/io.h>
+#include <linux/module.h>
#include <linux/dma-mapping.h>
#include <linux/slab.h>
#include <linux/scatterlist.h>
@@ -2558,6 +2559,15 @@
if (caps[1] & SDHCI_DRIVER_TYPE_D)
mmc->caps |= MMC_CAP_DRIVER_TYPE_D;
+ /*
+ * If Power Off Notify capability is enabled by the host,
+ * set notify to short power off notify timeout value.
+ */
+ if (mmc->caps2 & MMC_CAP2_POWEROFF_NOTIFY)
+ mmc->power_notify_type = MMC_HOST_PW_NOTIFY_SHORT;
+ else
+ mmc->power_notify_type = MMC_HOST_PW_NOTIFY_NONE;
+
/* Initial value for re-tuning timer count */
host->tuning_count = (caps[1] & SDHCI_RETUNING_TIMER_COUNT_MASK) >>
SDHCI_RETUNING_TIMER_COUNT_SHIFT;
diff --git a/drivers/mmc/host/sdricoh_cs.c b/drivers/mmc/host/sdricoh_cs.c
index 496b7ef..7009f17 100644
--- a/drivers/mmc/host/sdricoh_cs.c
+++ b/drivers/mmc/host/sdricoh_cs.c
@@ -26,6 +26,7 @@
*/
#include <linux/delay.h>
#include <linux/highmem.h>
+#include <linux/module.h>
#include <linux/pci.h>
#include <linux/ioport.h>
#include <linux/scatterlist.h>
diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
index 14f8edb..51b68cc 100644
--- a/drivers/mmc/host/sh_mmcif.c
+++ b/drivers/mmc/host/sh_mmcif.c
@@ -31,6 +31,7 @@
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/spinlock.h>
+#include <linux/module.h>
#define DRIVER_NAME "sh_mmcif"
#define DRIVER_VERSION "2010-04-28"
diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/sh_mobile_sdhi.c
index ce500f0..f5ce77b 100644
--- a/drivers/mmc/host/sh_mobile_sdhi.c
+++ b/drivers/mmc/host/sh_mobile_sdhi.c
@@ -21,6 +21,7 @@
#include <linux/kernel.h>
#include <linux/clk.h>
#include <linux/slab.h>
+#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/mmc/host.h>
#include <linux/mmc/sh_mobile_sdhi.h>
diff --git a/drivers/mmc/host/tifm_sd.c b/drivers/mmc/host/tifm_sd.c
index 457c26e..90c6b1b 100644
--- a/drivers/mmc/host/tifm_sd.c
+++ b/drivers/mmc/host/tifm_sd.c
@@ -16,6 +16,7 @@
#include <linux/mmc/host.h>
#include <linux/highmem.h>
#include <linux/scatterlist.h>
+#include <linux/module.h>
#include <asm/io.h>
#define DRIVER_NAME "tifm_sd"
diff --git a/drivers/mmc/host/via-sdmmc.c b/drivers/mmc/host/via-sdmmc.c
index 4dfe2c0..faf3594 100644
--- a/drivers/mmc/host/via-sdmmc.c
+++ b/drivers/mmc/host/via-sdmmc.c
@@ -9,6 +9,7 @@
*/
#include <linux/pci.h>
+#include <linux/module.h>
#include <linux/dma-mapping.h>
#include <linux/highmem.h>
#include <linux/delay.h>
diff --git a/drivers/mtd/devices/msm_nand.c b/drivers/mtd/devices/msm_nand.c
index 5ced423..2479a11 100644
--- a/drivers/mtd/devices/msm_nand.c
+++ b/drivers/mtd/devices/msm_nand.c
@@ -1,6 +1,6 @@
/*
* Copyright (C) 2007 Google, Inc.
- * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2008-2012, Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -6718,7 +6718,7 @@
supported_flash.pagesize = 1024 << (devcfg & 0x3);
supported_flash.blksize = (64 * 1024) <<
((devcfg >> 4) & 0x3);
- supported_flash.oobsize = (8 << ((devcfg >> 2) & 1)) *
+ supported_flash.oobsize = (8 << ((devcfg >> 2) & 0x3)) *
(supported_flash.pagesize >> 9);
} else {
supported_flash.flash_id = flash_id;
diff --git a/drivers/net/usb/rmnet_usb_ctrl.c b/drivers/net/usb/rmnet_usb_ctrl.c
index b693b18..ebd58ab 100644
--- a/drivers/net/usb/rmnet_usb_ctrl.c
+++ b/drivers/net/usb/rmnet_usb_ctrl.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -66,7 +66,7 @@
return snprintf(buf, PAGE_SIZE, "%u\n", dev->mdm_wait_timeout);
}
-static DEVICE_ATTR(modem_wait, 0666, modem_wait_show, modem_wait_store);
+static DEVICE_ATTR(modem_wait, 0664, modem_wait_show, modem_wait_store);
static int ctl_msg_dbg_mask;
module_param_named(dump_ctrl_msg, ctl_msg_dbg_mask, int,
@@ -264,19 +264,10 @@
{
int retval = 0;
- retval = usb_autopm_get_interface(dev->intf);
- if (retval < 0) {
- dev_err(dev->devicep, "%s Resumption fail\n", __func__);
- goto done_nopm;
- }
-
retval = usb_submit_urb(dev->inturb, GFP_KERNEL);
if (retval < 0)
dev_err(dev->devicep, "%s Intr submit %d\n", __func__, retval);
- usb_autopm_put_interface(dev->intf);
-
-done_nopm:
return retval;
}
@@ -342,35 +333,19 @@
}
static int rmnet_usb_ctrl_write_cmd(struct rmnet_ctrl_dev *dev)
{
- int retval = 0;
struct usb_device *udev;
if (!is_dev_connected(dev))
return -ENODEV;
udev = interface_to_usbdev(dev->intf);
- retval = usb_autopm_get_interface(dev->intf);
- if (retval < 0) {
- dev_err(dev->devicep, "%s: Unable to resume interface: %d\n",
- __func__, retval);
-
- /*
- * Revisit if (retval == -EPERM)
- * rmnet_usb_suspend(dev->intf, PMSG_SUSPEND);
- */
-
- return retval;
- }
dev->set_ctrl_line_state_cnt++;
- retval = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
+ return usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
USB_CDC_REQ_SET_CONTROL_LINE_STATE,
(USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_INTERFACE),
dev->cbits_tomdm,
dev->intf->cur_altsetting->desc.bInterfaceNumber,
NULL, 0, USB_CTRL_SET_TIMEOUT);
- usb_autopm_put_interface(dev->intf);
-
- return retval;
}
static void ctrl_write_callback(struct urb *urb)
@@ -428,7 +403,7 @@
(unsigned char *)out_ctlreq, (void *)buf, size,
ctrl_write_callback, dev);
- result = usb_autopm_get_interface_async(dev->intf);
+ result = usb_autopm_get_interface(dev->intf);
if (result < 0) {
dev_err(dev->devicep, "%s: Unable to resume interface: %d\n",
__func__, result);
@@ -450,7 +425,7 @@
dev_err(dev->devicep, "%s: Submit URB error %d\n",
__func__, result);
dev->snd_encap_cmd_cnt--;
- usb_autopm_put_interface_async(dev->intf);
+ usb_autopm_put_interface(dev->intf);
usb_unanchor_urb(sndurb);
usb_free_urb(sndurb);
kfree(out_ctlreq);
@@ -573,7 +548,7 @@
ctrl_read:
if (!is_dev_connected(dev)) {
- dev_err(dev->devicep, "%s: Device not connected\n",
+ dev_dbg(dev->devicep, "%s: Device not connected\n",
__func__);
return -ENETRESET;
}
@@ -662,6 +637,8 @@
static int rmnet_ctrl_tiocmset(struct rmnet_ctrl_dev *dev, unsigned int set,
unsigned int clear)
{
+ int retval;
+
mutex_lock(&dev->dev_lock);
if (set & TIOCM_DTR)
dev->cbits_tomdm |= ACM_CTRL_DTR;
@@ -681,7 +658,17 @@
mutex_unlock(&dev->dev_lock);
- return rmnet_usb_ctrl_write_cmd(dev);
+ retval = usb_autopm_get_interface(dev->intf);
+ if (retval < 0) {
+ dev_err(dev->devicep, "%s: Unable to resume interface: %d\n",
+ __func__, retval);
+ return retval;
+ }
+
+ retval = rmnet_usb_ctrl_write_cmd(dev);
+
+ usb_autopm_put_interface(dev->intf);
+ return retval;
}
static int rmnet_ctrl_tiocmget(struct rmnet_ctrl_dev *dev)
@@ -774,6 +761,10 @@
dev->tx_ctrl_err_cnt = 0;
dev->set_ctrl_line_state_cnt = 0;
+ ret = rmnet_usb_ctrl_write_cmd(dev);
+ if (ret < 0)
+ return ret;
+
dev->inturb = usb_alloc_urb(0, GFP_KERNEL);
if (!dev->inturb) {
dev_err(dev->devicep, "Error allocating int urb\n");
@@ -799,19 +790,15 @@
dev->intf->cur_altsetting->desc.bInterfaceNumber;
dev->in_ctlreq->wLength = cpu_to_le16(DEFAULT_READ_URB_LENGTH);
- interval =
- max((int)int_in->desc.bInterval,
- (udev->speed == USB_SPEED_HIGH) ? HS_INTERVAL : FS_LS_INTERVAL);
+ interval = max((int)int_in->desc.bInterval,
+ (udev->speed == USB_SPEED_HIGH) ? HS_INTERVAL
+ : FS_LS_INTERVAL);
usb_fill_int_urb(dev->inturb, udev,
dev->int_pipe,
dev->intbuf, wMaxPacketSize,
notification_available_cb, dev, interval);
- ret = rmnet_usb_ctrl_write_cmd(dev);
- if (ret < 0)
- return ret;
-
return rmnet_usb_ctrl_start_rx(dev);
}
@@ -828,6 +815,8 @@
dev->intf = NULL;
mutex_unlock(&dev->dev_lock);
+ wake_up(&dev->read_wait_queue);
+
usb_free_urb(dev->inturb);
dev->inturb = NULL;
diff --git a/drivers/net/usb/rmnet_usb_data.c b/drivers/net/usb/rmnet_usb_data.c
index ffdfce1..ae3f934 100644
--- a/drivers/net/usb/rmnet_usb_data.c
+++ b/drivers/net/usb/rmnet_usb_data.c
@@ -148,7 +148,6 @@
retval = usbnet_resume(iface);
if (!retval) {
-
if (oldstate & PM_EVENT_SUSPEND)
retval = rmnet_usb_ctrl_start(dev);
}
@@ -260,6 +259,12 @@
return 1;
}
+static int rmnet_usb_manage_power(struct usbnet *dev, int on)
+{
+ dev->intf->needs_remote_wakeup = on;
+ return 0;
+}
+
static int rmnet_change_mtu(struct net_device *dev, int new_mtu)
{
if (0 > new_mtu || RMNET_DATA_LEN < new_mtu)
@@ -461,6 +466,11 @@
status = rmnet_usb_ctrl_probe(iface, unet->status,
(struct rmnet_ctrl_dev *)unet->data[1]);
+ if (status)
+ goto out;
+
+ /* allow modem to wake up suspended system */
+ device_set_wakeup_enable(&udev->dev, 1);
out:
return status;
}
@@ -472,6 +482,7 @@
struct rmnet_ctrl_dev *dev;
udev = interface_to_usbdev(intf);
+ device_set_wakeup_enable(&udev->dev, 0);
unet = usb_get_intfdata(intf);
if (!unet) {
@@ -494,12 +505,14 @@
/*bit position represents interface number*/
#define PID9034_IFACE_MASK 0xF0
#define PID9048_IFACE_MASK 0x1E0
+#define PID904C_IFACE_MASK 0x1C0
static const struct driver_info rmnet_info_pid9034 = {
.description = "RmNET net device",
.bind = rmnet_usb_bind,
.tx_fixup = rmnet_usb_tx_fixup,
.rx_fixup = rmnet_usb_rx_fixup,
+ .manage_power = rmnet_usb_manage_power,
.data = PID9034_IFACE_MASK,
};
@@ -508,9 +521,19 @@
.bind = rmnet_usb_bind,
.tx_fixup = rmnet_usb_tx_fixup,
.rx_fixup = rmnet_usb_rx_fixup,
+ .manage_power = rmnet_usb_manage_power,
.data = PID9048_IFACE_MASK,
};
+static const struct driver_info rmnet_info_pid904c = {
+ .description = "RmNET net device",
+ .bind = rmnet_usb_bind,
+ .tx_fixup = rmnet_usb_tx_fixup,
+ .rx_fixup = rmnet_usb_rx_fixup,
+ .manage_power = rmnet_usb_manage_power,
+ .data = PID904C_IFACE_MASK,
+};
+
static const struct usb_device_id vidpids[] = {
{
USB_DEVICE(0x05c6, 0x9034), /* MDM9x15*/
@@ -520,6 +543,10 @@
USB_DEVICE(0x05c6, 0x9048), /* MDM9x15*/
.driver_info = (unsigned long)&rmnet_info_pid9048,
},
+ {
+ USB_DEVICE(0x05c6, 0x904c), /* MDM9x15*/
+ .driver_info = (unsigned long)&rmnet_info_pid904c,
+ },
{ }, /* Terminating entry */
};
diff --git a/drivers/net/usb/usbnet.c b/drivers/net/usb/usbnet.c
index c3a756d..2620108 100644
--- a/drivers/net/usb/usbnet.c
+++ b/drivers/net/usb/usbnet.c
@@ -35,6 +35,7 @@
#include <linux/module.h>
#include <linux/init.h>
+#include <linux/if_arp.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/ctype.h>
@@ -332,7 +333,9 @@
usb_free_urb (urb);
return -ENOMEM;
}
- skb_reserve (skb, NET_IP_ALIGN);
+
+ if (dev->net->type != ARPHRD_RAWIP)
+ skb_reserve(skb, NET_IP_ALIGN);
entry = (struct skb_data *) skb->cb;
entry->urb = urb;
diff --git a/drivers/net/wireless/libra/libra_sdioif.c b/drivers/net/wireless/libra/libra_sdioif.c
index 3955642..3421f84 100644
--- a/drivers/net/wireless/libra/libra_sdioif.c
+++ b/drivers/net/wireless/libra/libra_sdioif.c
@@ -29,6 +29,37 @@
static suspend_handler_t *libra_suspend_hldr;
static resume_handler_t *libra_resume_hldr;
+int libra_enable_sdio_irq_in_chip(struct sdio_func *func, u8 enable)
+{
+ unsigned char reg = 0;
+ int err = 0;
+
+ sdio_claim_host(func);
+
+ /* Read the value into reg */
+ libra_sdiocmd52(func, SDIO_CCCR_IENx, ®, 0, &err);
+ if (err)
+ printk(KERN_ERR "%s: Could not read SDIO_CCCR_IENx register "
+ "err=%d\n", __func__, err);
+
+ if (libra_mmc_host) {
+ if (enable) {
+ reg |= 1 << func->num;
+ reg |= 1;
+ } else {
+ reg &= ~(1 << func->num);
+ }
+ libra_sdiocmd52(func, SDIO_CCCR_IENx, ®, 1, &err);
+ if (err)
+ printk(KERN_ERR "%s: Could not enable/disable irq "
+ "err=%d\n", __func__, err);
+ }
+ sdio_release_host(func);
+
+ return err;
+}
+EXPORT_SYMBOL(libra_enable_sdio_irq_in_chip);
+
/**
* libra_sdio_configure() - Function to configure the SDIO device param
* @libra_sdio_rxhandler Rx handler
@@ -89,6 +120,8 @@
goto cfg_error;
}
+ libra_enable_sdio_irq_in_chip(func, 0);
+
sdio_release_host(func);
return 0;
diff --git a/drivers/net/wireless/libra/qcomwlan_pwrif.c b/drivers/net/wireless/libra/qcomwlan_pwrif.c
index 6a0c78f..94ea0b3 100644
--- a/drivers/net/wireless/libra/qcomwlan_pwrif.c
+++ b/drivers/net/wireless/libra/qcomwlan_pwrif.c
@@ -154,7 +154,7 @@
/* WLAN VREG settings */
for (i = 0; i < ARRAY_SIZE(vregs_qwlan_name); i++) {
- if (vregs_qwlan[i] == NULL) {
+ if (on && !wlan_on) {
vregs_qwlan[i] = regulator_get(NULL,
vregs_qwlan_name[i]);
if (IS_ERR(vregs_qwlan[i])) {
@@ -187,8 +187,7 @@
goto vreg_fail;
}
}
- }
- if (on && !wlan_on) {
+
if (vregs_qwlan_peek_current[i]) {
rc = regulator_set_optimum_mode(vregs_qwlan[i],
vregs_qwlan_peek_current[i]);
diff --git a/drivers/net/wireless/wcnss/wcnss_riva.c b/drivers/net/wireless/wcnss/wcnss_riva.c
index 0939dd8..23365ff 100644
--- a/drivers/net/wireless/wcnss/wcnss_riva.c
+++ b/drivers/net/wireless/wcnss/wcnss_riva.c
@@ -61,7 +61,6 @@
};
static struct vregs_info iris_vregs[] = {
- {"iris_vddio", VREG_NULL_CONFIG, 1800000, 0, 1800000, 4000, NULL},
{"iris_vddxo", VREG_NULL_CONFIG, 1800000, 0, 1800000, 10000, NULL},
{"iris_vddrfa", VREG_NULL_CONFIG, 1300000, 0, 1300000, 100000, NULL},
{"iris_vddpa", VREG_NULL_CONFIG, 2900000, 0, 3000000, 515000, NULL},
diff --git a/drivers/of/of_spmi.c b/drivers/of/of_spmi.c
index 9f2a396..112497c 100644
--- a/drivers/of/of_spmi.c
+++ b/drivers/of/of_spmi.c
@@ -18,63 +18,167 @@
#include <linux/of_spmi.h>
#include <linux/slab.h>
#include <linux/module.h>
+#include <linux/types.h>
-/**
- * Allocate resources for a child of a spmi-container node.
+struct of_spmi_dev_info {
+ struct spmi_controller *ctrl;
+ struct spmi_boardinfo b_info;
+};
+
+struct of_spmi_res_info {
+ struct device_node *node;
+ uint32_t num_reg;
+ uint32_t num_irq;
+};
+
+/*
+ * Initialize r_info structure for safe usage
*/
-static int of_spmi_allocate_resources(struct spmi_controller *ctrl,
- struct spmi_boardinfo *info,
- struct device_node *node,
- uint32_t num_reg)
+static inline void of_spmi_init_resource(struct of_spmi_res_info *r_info,
+ struct device_node *node)
{
- int i, num_irq = 0;
+ r_info->node = node;
+ r_info->num_reg = 0;
+ r_info->num_irq = 0;
+}
+
+/*
+ * Allocate dev_node array for spmi_device
+ */
+static inline int of_spmi_alloc_device_store(struct of_spmi_dev_info *d_info,
+ uint32_t num_dev_node)
+{
+ d_info->b_info.num_dev_node = num_dev_node;
+ d_info->b_info.dev_node = kzalloc(sizeof(struct spmi_resource) *
+ num_dev_node, GFP_KERNEL);
+ if (!d_info->b_info.dev_node)
+ return -ENOMEM;
+
+ return 0;
+}
+
+/*
+ * Calculate the number of resources to allocate
+ *
+ * The caller is responsible for initializing the of_spmi_res_info structure.
+ */
+static void of_spmi_sum_node_resources(struct of_spmi_res_info *r_info,
+ bool has_reg)
+{
+ struct of_irq oirq;
uint64_t size;
uint32_t flags;
+ int i = 0;
+
+ while (of_irq_map_one(r_info->node, i, &oirq) == 0)
+ i++;
+
+ r_info->num_irq += i;
+
+ if (!has_reg)
+ return;
+
+ /*
+ * We can't use of_address_to_resource here since it includes
+ * address translation; and address translation assumes that no
+ * parent buses have a size-cell of 0. But SPMI does have a
+ * size-cell of 0.
+ */
+ i = 0;
+ while (of_get_address(r_info->node, i, &size, &flags) != NULL)
+ i++;
+
+ r_info->num_reg += i;
+}
+
+/*
+ * free spmi_resource for the spmi_device
+ */
+static void of_spmi_free_device_resources(struct of_spmi_dev_info *d_info)
+{
+ int i;
+
+ for (i = 0; i < d_info->b_info.num_dev_node; i++)
+ kfree(d_info->b_info.dev_node[i].resource);
+
+ kfree(d_info->b_info.dev_node);
+}
+
+/*
+ * Gather node resources and populate
+ */
+static void of_spmi_populate_node_resources(struct of_spmi_dev_info *d_info,
+ struct of_spmi_res_info *r_info,
+ int idx)
+
+{
+ uint32_t num_irq = r_info->num_irq, num_reg = r_info->num_reg;
+ int i;
struct resource *res;
const __be32 *addrp;
- struct of_irq oirq;
+ uint64_t size;
+ uint32_t flags;
- while (of_irq_map_one(node, num_irq, &oirq) == 0)
- num_irq++;
+ res = d_info->b_info.dev_node[idx].resource;
+ d_info->b_info.dev_node[idx].of_node = r_info->node;
- if (num_irq || num_reg) {
- res = kzalloc(sizeof(*res) * (num_irq + num_reg), GFP_KERNEL);
- if (!res)
- return -ENOMEM;
-
- info->num_resources = num_reg + num_irq;
- info->resource = res;
+ if ((num_irq || num_reg) && (res != NULL)) {
for (i = 0; i < num_reg; i++, res++) {
/* Addresses are always 16 bits */
- addrp = of_get_address(node, i, &size, &flags);
+ addrp = of_get_address(r_info->node, i, &size, &flags);
BUG_ON(!addrp);
res->start = be32_to_cpup(addrp);
res->end = res->start + size - 1;
res->flags = flags;
}
- WARN_ON(of_irq_to_resource_table(node, res, num_irq) !=
+ WARN_ON(of_irq_to_resource_table(r_info->node, res, num_irq) !=
num_irq);
}
+}
+
+/*
+ * Allocate enough memory to handle the resources associated with the
+ * device_node. The number of device nodes included in this allocation
+ * depends on whether the spmi-dev-container flag is specified or not.
+ */
+static int of_spmi_allocate_node_resources(struct of_spmi_dev_info *d_info,
+ struct of_spmi_res_info *r_info,
+ uint32_t idx)
+{
+ uint32_t num_irq = r_info->num_irq, num_reg = r_info->num_reg;
+ struct resource *res = NULL;
+
+ if (num_irq || num_reg) {
+ res = kzalloc(sizeof(*res) * (num_irq + num_reg), GFP_KERNEL);
+ if (!res)
+ return -ENOMEM;
+ }
+ d_info->b_info.dev_node[idx].num_resources = num_reg + num_irq;
+ d_info->b_info.dev_node[idx].resource = res;
return 0;
}
-static int of_spmi_create_device(struct spmi_controller *ctrl,
- struct spmi_boardinfo *info,
- struct device_node *node)
+/*
+ * create a single spmi_device
+ */
+static int of_spmi_create_device(struct of_spmi_dev_info *d_info,
+ struct device_node *node)
{
+ struct spmi_controller *ctrl = d_info->ctrl;
+ struct spmi_boardinfo *b_info = &d_info->b_info;
void *result;
int rc;
- rc = of_modalias_node(node, info->name, sizeof(info->name));
+ rc = of_modalias_node(node, b_info->name, sizeof(b_info->name));
if (rc < 0) {
dev_err(&ctrl->dev, "of_spmi modalias failure on %s\n",
node->full_name);
return rc;
}
- info->of_node = of_node_get(node);
- result = spmi_new_device(ctrl, info);
+ b_info->of_node = of_node_get(node);
+ result = spmi_new_device(ctrl, b_info);
if (result == NULL) {
dev_err(&ctrl->dev, "of_spmi: Failure registering %s\n",
@@ -86,70 +190,208 @@
return 0;
}
-static void of_spmi_walk_container_children(struct spmi_controller *ctrl,
- struct spmi_boardinfo *info,
- struct device_node *container)
+/*
+ * Walks all children of a node containing the spmi-dev-container
+ * binding. This special type of spmi_device can include resources
+ * from more than one device node.
+ */
+static void of_spmi_walk_dev_container(struct of_spmi_dev_info *d_info,
+ struct device_node *container)
{
+ struct of_spmi_res_info r_info = {};
+ struct spmi_controller *ctrl = d_info->ctrl;
struct device_node *node;
- uint64_t size;
- uint32_t flags, num_reg = 0;
+ int rc, i, num_dev_node = 0;
+
+ /* first count the total number of device_nodes */
+ for_each_child_of_node(container, node)
+ num_dev_node++;
+
+ rc = of_spmi_alloc_device_store(d_info, num_dev_node);
+ if (rc) {
+ dev_err(&ctrl->dev, "%s: unable to allocate"
+ " device resources\n", __func__);
+ return;
+ }
+
+ /* allocate resources per device_node */
+ i = 0;
+ for_each_child_of_node(container, node) {
+ of_spmi_init_resource(&r_info, node);
+ of_spmi_sum_node_resources(&r_info, 1);
+ rc = of_spmi_allocate_node_resources(d_info, &r_info, i);
+ if (rc) {
+ dev_err(&ctrl->dev, "%s: unable to allocate"
+ " resources\n", __func__);
+ of_spmi_free_device_resources(d_info);
+ return;
+ }
+ i++;
+ }
+
+ /**
+ * Now we need to cycle through again and actually populate
+ * the resources for each node.
+ */
+ i = 0;
+ for_each_child_of_node(container, node) {
+ of_spmi_init_resource(&r_info, node);
+ of_spmi_sum_node_resources(&r_info, 1);
+ of_spmi_populate_node_resources(d_info, &r_info, i);
+ i++;
+ }
+
+ rc = of_spmi_create_device(d_info, container);
+ if (rc) {
+ dev_err(&ctrl->dev, "%s: unable to create device for"
+ " node %s\n", __func__, container->full_name);
+ of_spmi_free_device_resources(d_info);
+ return;
+ }
+}
+
+/*
+ * Walks all children of a node containing the spmi-slave-container
+ * binding. This indicates that all spmi_devices created from this
+ * point all share the same slave_id.
+ */
+static void of_spmi_walk_slave_container(struct of_spmi_dev_info *d_info,
+ struct device_node *container)
+{
+ struct spmi_controller *ctrl = d_info->ctrl;
+ struct device_node *node;
int rc;
for_each_child_of_node(container, node) {
- /*
- * We can't use of_address_to_resource here since it includes
- * address translation; and address translation assumes that no
- * parent buses have a size-cell of 0. But SPMI does have a
- * size-cell of 0.
- */
- while (of_get_address(node, num_reg, &size, &flags) != NULL)
- num_reg++;
+ struct of_spmi_res_info r_info;
- rc = of_spmi_allocate_resources(ctrl, info, node, num_reg);
+ /**
+ * Check to see if this node contains children which
+ * should be all created as the same spmi_device.
+ */
+ if (of_get_property(node, "spmi-dev-container", NULL)) {
+ of_spmi_walk_dev_container(d_info, node);
+ continue;
+ }
+
+ rc = of_spmi_alloc_device_store(d_info, 1);
+ if (rc) {
+ dev_err(&ctrl->dev, "%s: unable to allocate"
+ " device resources\n", __func__);
+ goto slave_err;
+ }
+
+ of_spmi_init_resource(&r_info, node);
+ of_spmi_sum_node_resources(&r_info, 1);
+
+ rc = of_spmi_allocate_node_resources(d_info, &r_info, 0);
if (rc) {
dev_err(&ctrl->dev, "%s: unable to allocate"
" resources\n", __func__);
- return;
+ goto slave_err;
}
- rc = of_spmi_create_device(ctrl, info, node);
+
+ of_spmi_populate_node_resources(d_info, &r_info, 0);
+
+ rc = of_spmi_create_device(d_info, node);
if (rc) {
dev_err(&ctrl->dev, "%s: unable to create device for"
" node %s\n", __func__, node->full_name);
- return;
+ goto slave_err;
}
}
+ return;
+
+slave_err:
+ of_spmi_free_device_resources(d_info);
}
int of_spmi_register_devices(struct spmi_controller *ctrl)
{
- struct device_node *node;
+ struct device_node *node = ctrl->dev.of_node;
/* Only register child devices if the ctrl has a node pointer set */
- if (!ctrl->dev.of_node)
+ if (!node)
return -ENODEV;
+ if (of_get_property(node, "spmi-slave-container", NULL)) {
+ dev_err(&ctrl->dev, "%s: structural error: spmi-slave-container"
+ " is prohibited at the root level\n", __func__);
+ return -EINVAL;
+ } else if (of_get_property(node, "spmi-dev-container", NULL)) {
+ dev_err(&ctrl->dev, "%s: structural error: spmi-dev-container"
+ " is prohibited at the root level\n", __func__);
+ return -EINVAL;
+ }
+
+ /**
+ * Make best effort to launch as many nodes as possible. If there are
+ * syntax errors, we will simply ignore that subtree and keep going.
+ */
for_each_child_of_node(ctrl->dev.of_node, node) {
- struct spmi_boardinfo info = {};
+ struct of_spmi_dev_info d_info = {};
const __be32 *slave_id;
- int len, rc;
+ int len, rc, have_dev_container = 0;
slave_id = of_get_property(node, "reg", &len);
if (!slave_id) {
- dev_err(&ctrl->dev, "of_spmi: invalid sid "
- "on %s\n", node->full_name);
+ dev_err(&ctrl->dev, "%s: invalid sid "
+ "on %s\n", __func__, node->full_name);
continue;
}
- info.slave_id = be32_to_cpup(slave_id);
+ d_info.b_info.slave_id = be32_to_cpup(slave_id);
+ d_info.ctrl = ctrl;
- if (of_get_property(node, "spmi-dev-container", NULL)) {
- of_spmi_walk_container_children(ctrl, &info, node);
- continue;
+ if (of_get_property(node, "spmi-dev-container", NULL))
+ have_dev_container = 1;
+ if (of_get_property(node, "spmi-slave-container", NULL)) {
+ if (have_dev_container)
+ of_spmi_walk_dev_container(&d_info, node);
+ else
+ of_spmi_walk_slave_container(&d_info, node);
} else {
- rc = of_spmi_allocate_resources(ctrl, &info, node, 0);
- if (rc)
+ struct of_spmi_res_info r_info;
+
+ /**
+ * A dev container at the second level without a slave
+ * container is considered an error.
+ */
+ if (have_dev_container) {
+ dev_err(&ctrl->dev, "%s: structural error,"
+ " node %s has spmi-dev-container without"
+ " specifying spmi-slave-container\n",
+ __func__, node->full_name);
continue;
- of_spmi_create_device(ctrl, &info, node);
+ }
+
+ rc = of_spmi_alloc_device_store(&d_info, 1);
+ if (rc) {
+ dev_err(&ctrl->dev, "%s: unable to allocate"
+ " device resources\n", __func__);
+ continue;
+ }
+
+ of_spmi_init_resource(&r_info, node);
+ of_spmi_sum_node_resources(&r_info, 0);
+ rc = of_spmi_allocate_node_resources(&d_info,
+ &r_info, 0);
+ if (rc) {
+ dev_err(&ctrl->dev, "%s: unable to allocate"
+ " resources\n", __func__);
+ of_spmi_free_device_resources(&d_info);
+ continue;
+ }
+
+ of_spmi_populate_node_resources(&d_info, &r_info, 0);
+
+ rc = of_spmi_create_device(&d_info, node);
+ if (rc) {
+ dev_err(&ctrl->dev, "%s: unable to create"
+ " device\n", __func__);
+ of_spmi_free_device_resources(&d_info);
+ continue;
+ }
}
}
diff --git a/drivers/platform/msm/sps/bam.c b/drivers/platform/msm/sps/bam.c
index 4279603..edef402 100644
--- a/drivers/platform/msm/sps/bam.c
+++ b/drivers/platform/msm/sps/bam.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -20,6 +20,7 @@
#include "bam.h"
#include "sps_bam.h"
+#include "spsi.h"
/**
* Valid BAM Hardware version.
@@ -740,8 +741,11 @@
return -ENODEV;
}
- if (num_pipes > BAM_MAX_PIPES)
+ if (num_pipes > BAM_MAX_PIPES) {
+ SPS_ERR("sps:bam 0x%x(va) the number of pipes is more than "
+ "the maximum number allowed.", (u32) base);
return -ENODEV;
+ }
for (pipe = 0, mask = 1; pipe < num_pipes; pipe++, mask <<= 1)
if ((mask & pipe_mask) != 0)
@@ -764,8 +768,11 @@
{
u32 ver = 0;
- if (!bam_read_reg_field(base, CTRL, BAM_EN))
+ if (!bam_read_reg_field(base, CTRL, BAM_EN)) {
+ SPS_ERR("sps:%s:bam 0x%x(va) is not enabled.\n",
+ __func__, (u32) base);
return -ENODEV;
+ }
ver = bam_read_reg(base, REVISION) & BAM_REVISION;
@@ -778,8 +785,8 @@
/* Check BAM version */
if ((ver < BAM_MIN_VERSION) || (ver > BAM_MAX_VERSION)) {
- SPS_ERR("sps:bam 0x%x(va) Invalid BAM version 0x%x.\n",
- (u32) base, ver);
+ SPS_ERR("sps:%s:bam 0x%x(va) Invalid BAM version 0x%x.\n",
+ __func__, (u32) base, ver);
return -ENODEV;
}
@@ -866,7 +873,7 @@
bam_write_reg(base, P_EVNT_DEST_ADDR(pipe), peer_dest_addr);
- SPS_DBG("sps:bam=0x%x(va).pipe=%d.peer_bam=0x%x."
+ SPS_DBG2("sps:bam=0x%x(va).pipe=%d.peer_bam=0x%x."
"peer_pipe=%d.\n",
(u32) base, pipe,
(u32) param->peer_phys_addr,
@@ -1051,3 +1058,206 @@
{
return bam_read_reg(base, P_TIMER(pipe));
}
+
+#ifdef CONFIG_DEBUG_FS
+/* output the content of BAM-level registers */
+void print_bam_reg(void *virt_addr)
+{
+ int i, n;
+ u32 *bam = (u32 *) virt_addr;
+ u32 ctrl;
+ u32 ver;
+ u32 pipes;
+
+ if (bam == NULL)
+ return;
+
+#ifdef CONFIG_SPS_SUPPORT_NDP_BAM
+ ctrl = bam[0x0 / 4];
+ ver = bam[0x4 / 4];
+ pipes = bam[0x3c / 4];
+#else
+ ctrl = bam[0xf80 / 4];
+ ver = bam[0xf84 / 4];
+ pipes = bam[0xfbc / 4];
+#endif
+
+ SPS_INFO("\nsps:----- Content of BAM-level registers <begin> -----\n");
+
+ SPS_INFO("BAM_CTRL: 0x%x.\n", ctrl);
+ SPS_INFO("BAM_REVISION: 0x%x.\n", ver);
+ SPS_INFO("NUM_PIPES: 0x%x.\n", pipes);
+
+#ifdef CONFIG_SPS_SUPPORT_NDP_BAM
+ for (i = 0x0; i < 0x80; i += 0x10)
+#else
+ for (i = 0xf80; i < 0x1000; i += 0x10)
+#endif
+ SPS_INFO("bam addr 0x%x: 0x%x,0x%x,0x%x,0x%x.\n", i,
+ bam[i / 4], bam[(i / 4) + 1],
+ bam[(i / 4) + 2], bam[(i / 4) + 3]);
+
+#ifdef CONFIG_SPS_SUPPORT_NDP_BAM
+ for (i = 0x800, n = 0; n++ < 8; i += 0x80)
+#else
+ for (i = 0x1800, n = 0; n++ < 4; i += 0x80)
+#endif
+ SPS_INFO("bam addr 0x%x: 0x%x,0x%x,0x%x,0x%x.\n", i,
+ bam[i / 4], bam[(i / 4) + 1],
+ bam[(i / 4) + 2], bam[(i / 4) + 3]);
+
+ SPS_INFO("\nsps:----- Content of BAM-level registers <end> -----\n");
+}
+
+/* output the content of BAM pipe registers */
+void print_bam_pipe_reg(void *virt_addr, u32 pipe_index)
+{
+ int i;
+ u32 *bam = (u32 *) virt_addr;
+ u32 pipe = pipe_index;
+
+ if (bam == NULL)
+ return;
+
+ SPS_INFO("\nsps:----- Content of Pipe %d registers <begin> -----\n",
+ pipe);
+
+ SPS_INFO("-- Pipe Management Registers --\n");
+
+#ifdef CONFIG_SPS_SUPPORT_NDP_BAM
+ for (i = 0x1000 + 0x1000 * pipe; i < 0x1000 + 0x1000 * pipe + 0x80;
+ i += 0x10)
+#else
+ for (i = 0x0000 + 0x80 * pipe; i < 0x0000 + 0x80 * (pipe + 1);
+ i += 0x10)
+#endif
+ SPS_INFO("bam addr 0x%x: 0x%x,0x%x,0x%x,0x%x.\n", i,
+ bam[i / 4], bam[(i / 4) + 1],
+ bam[(i / 4) + 2], bam[(i / 4) + 3]);
+
+ SPS_INFO("-- Pipe Configuration and Internal State Registers --\n");
+
+#ifdef CONFIG_SPS_SUPPORT_NDP_BAM
+ for (i = 0x1800 + 0x1000 * pipe; i < 0x1800 + 0x1000 * pipe + 0x40;
+ i += 0x10)
+#else
+ for (i = 0x1000 + 0x40 * pipe; i < 0x1000 + 0x40 * (pipe + 1);
+ i += 0x10)
+#endif
+ SPS_INFO("bam addr 0x%x: 0x%x,0x%x,0x%x,0x%x.\n", i,
+ bam[i / 4], bam[(i / 4) + 1],
+ bam[(i / 4) + 2], bam[(i / 4) + 3]);
+
+ SPS_INFO("\nsps:----- Content of Pipe %d registers <end> -----\n",
+ pipe);
+}
+
+/* output the content of selected BAM-level registers */
+void print_bam_selected_reg(void *virt_addr)
+{
+ void *base = virt_addr;
+
+ if (base == NULL)
+ return;
+
+ SPS_INFO("\nsps:----- Content of BAM-level registers <begin> -----\n");
+
+ SPS_INFO("BAM_CTRL: 0x%x\n"
+ "BAM_REVISION: 0x%x\n"
+ "BAM_NUM_EES: %d\n"
+#ifdef CONFIG_SPS_SUPPORT_NDP_BAM
+ "BAM_CMD_DESC_EN: 0x%x\n"
+#endif
+ "BAM_NUM_PIPES: %d\n"
+ "BAM_DESC_CNT_TRSHLD: 0x%x (%d)\n"
+ "BAM_IRQ_SRCS: 0x%x\n"
+ "BAM_IRQ_SRCS_MSK: 0x%x\n"
+ "BAM_EE: %d\n"
+ "BAM_CNFG_BITS: 0x%x\n",
+ bam_read_reg(base, CTRL),
+ bam_read_reg_field(base, REVISION, BAM_REVISION),
+ bam_read_reg_field(base, REVISION, BAM_NUM_EES),
+#ifdef CONFIG_SPS_SUPPORT_NDP_BAM
+ bam_read_reg_field(base, REVISION, BAM_CMD_DESC_EN),
+#endif
+ bam_read_reg_field(base, NUM_PIPES, BAM_NUM_PIPES),
+ bam_read_reg_field(base, DESC_CNT_TRSHLD, BAM_DESC_CNT_TRSHLD),
+ bam_read_reg_field(base, DESC_CNT_TRSHLD, BAM_DESC_CNT_TRSHLD),
+ bam_read_reg(base, IRQ_SRCS),
+ bam_read_reg(base, IRQ_SRCS_MSK),
+ bam_read_reg_field(base, TRUST_REG, BAM_EE),
+ bam_read_reg(base, CNFG_BITS));
+
+ SPS_INFO("\nsps:----- Content of BAM-level registers <end> -----\n");
+}
+
+/* output the content of selected BAM pipe registers */
+void print_bam_pipe_selected_reg(void *virt_addr, u32 pipe_index)
+{
+ void *base = virt_addr;
+ u32 pipe = pipe_index;
+
+ if (base == NULL)
+ return;
+
+ SPS_INFO("\nsps:----- Registers of Pipe %d -----\n", pipe);
+
+ SPS_INFO("BAM_P_CTRL: 0x%x\n"
+ "BAM_P_SYS_MODE: %d\n"
+ "BAM_P_DIRECTION: %d\n"
+#ifdef CONFIG_SPS_SUPPORT_NDP_BAM
+ "BAM_P_LOCK_GROUP: 0x%x (%d)\n"
+#endif
+ "BAM_P_EE: %d\n"
+ "BAM_P_IRQ_STTS: 0x%x\n"
+ "BAM_P_IRQ_STTS_P_TRNSFR_END_IRQ: 0x%x\n"
+ "BAM_P_IRQ_STTS_P_PRCSD_DESC_IRQ: 0x%x\n"
+ "BAM_P_IRQ_EN: %d\n"
+ "BAM_P_PRDCR_SDBNDn_BAM_P_BYTES_FREE: 0x%x (%d)\n"
+ "BAM_P_CNSMR_SDBNDn_BAM_P_BYTES_AVAIL: 0x%x (%d)\n"
+ "BAM_P_SW_DESC_OFST: 0x%x\n"
+ "BAM_P_DESC_FIFO_PEER_OFST: 0x%x\n"
+ "BAM_P_EVNT_DEST_ADDR: 0x%x\n"
+ "BAM_P_DESC_FIFO_ADDR: 0x%x\n"
+ "BAM_P_DESC_FIFO_SIZE: 0x%x (%d)\n"
+ "BAM_P_DATA_FIFO_ADDR: 0x%x\n"
+ "BAM_P_DATA_FIFO_SIZE: 0x%x (%d)\n"
+ "BAM_P_EVNT_GEN_TRSHLD: 0x%x (%d)\n",
+ bam_read_reg(base, P_CTRL(pipe)),
+ bam_read_reg_field(base, P_CTRL(pipe), P_SYS_MODE),
+ bam_read_reg_field(base, P_CTRL(pipe), P_DIRECTION),
+#ifdef CONFIG_SPS_SUPPORT_NDP_BAM
+ bam_read_reg_field(base, P_CTRL(pipe), P_LOCK_GROUP),
+ bam_read_reg_field(base, P_CTRL(pipe), P_LOCK_GROUP),
+#endif
+ bam_read_reg_field(base, P_TRUST_REG(pipe), BAM_P_EE),
+ bam_read_reg(base, P_IRQ_STTS(pipe)),
+ bam_read_reg_field(base, P_IRQ_STTS(pipe),
+ P_IRQ_STTS_P_TRNSFR_END_IRQ),
+ bam_read_reg_field(base, P_IRQ_STTS(pipe),
+ P_IRQ_STTS_P_PRCSD_DESC_IRQ),
+ bam_read_reg(base, P_IRQ_EN(pipe)),
+ bam_read_reg_field(base, P_PRDCR_SDBND(pipe),
+ P_PRDCR_SDBNDn_BAM_P_BYTES_FREE),
+ bam_read_reg_field(base, P_PRDCR_SDBND(pipe),
+ P_PRDCR_SDBNDn_BAM_P_BYTES_FREE),
+ bam_read_reg_field(base, P_CNSMR_SDBND(pipe),
+ P_CNSMR_SDBNDn_BAM_P_BYTES_AVAIL),
+ bam_read_reg_field(base, P_CNSMR_SDBND(pipe),
+ P_CNSMR_SDBNDn_BAM_P_BYTES_AVAIL),
+ bam_read_reg_field(base, P_SW_OFSTS(pipe), SW_DESC_OFST),
+ bam_read_reg_field(base, P_EVNT_REG(pipe),
+ P_DESC_FIFO_PEER_OFST),
+ bam_read_reg(base, P_EVNT_DEST_ADDR(pipe)),
+ bam_read_reg(base, P_DESC_FIFO_ADDR(pipe)),
+ bam_read_reg_field(base, P_FIFO_SIZES(pipe), P_DESC_FIFO_SIZE),
+ bam_read_reg_field(base, P_FIFO_SIZES(pipe), P_DESC_FIFO_SIZE),
+ bam_read_reg(base, P_DATA_FIFO_ADDR(pipe)),
+ bam_read_reg_field(base, P_FIFO_SIZES(pipe), P_DATA_FIFO_SIZE),
+ bam_read_reg_field(base, P_FIFO_SIZES(pipe), P_DATA_FIFO_SIZE),
+ bam_read_reg_field(base, P_EVNT_GEN_TRSHLD(pipe),
+ P_EVNT_GEN_TRSHLD_P_TRSHLD),
+ bam_read_reg_field(base, P_EVNT_GEN_TRSHLD(pipe),
+ P_EVNT_GEN_TRSHLD_P_TRSHLD));
+}
+#endif
diff --git a/drivers/platform/msm/sps/sps.c b/drivers/platform/msm/sps/sps.c
index c17da9b..b876d2d 100644
--- a/drivers/platform/msm/sps/sps.c
+++ b/drivers/platform/msm/sps/sps.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -82,18 +82,31 @@
static void sps_device_de_init(void);
#ifdef CONFIG_DEBUG_FS
-#define MAX_OUTPUT_MAGIC_NUM 777
-u32 sps_debugfs_enabled;
-u32 detailed_debug_on;
+u8 debugfs_record_enabled;
+u8 logging_option;
+u8 debug_level_option;
+u8 print_limit_option;
+u8 reg_dump_option;
+
static char *debugfs_buf;
-static int debugfs_buf_size;
-static int debugfs_buf_used;
+static u32 debugfs_buf_size;
+static u32 debugfs_buf_used;
static int wraparound;
+struct dentry *dent;
+struct dentry *dfile_info;
+struct dentry *dfile_logging_option;
+struct dentry *dfile_debug_level_option;
+struct dentry *dfile_print_limit_option;
+struct dentry *dfile_reg_dump_option;
+struct dentry *dfile_bam_addr;
+
+static struct sps_bam *phy2bam(u32 phys_addr);
+
/* record debug info for debugfs */
void sps_debugfs_record(const char *msg)
{
- if (sps_debugfs_enabled) {
+ if (debugfs_record_enabled) {
if (debugfs_buf_used + MAX_MSG_LEN >= debugfs_buf_size) {
debugfs_buf_used = 0;
wraparound = true;
@@ -112,30 +125,33 @@
static ssize_t sps_read_info(struct file *file, char __user *ubuf,
size_t count, loff_t *ppos)
{
- int ret;
+ int ret = 0;
int size;
- if (wraparound)
- size = debugfs_buf_size - MAX_MSG_LEN;
- else
- size = debugfs_buf_used;
+ if (debugfs_record_enabled) {
+ if (wraparound)
+ size = debugfs_buf_size - MAX_MSG_LEN;
+ else
+ size = debugfs_buf_used;
- ret = simple_read_from_buffer(ubuf, count, ppos,
- debugfs_buf, size);
+ ret = simple_read_from_buffer(ubuf, count, ppos,
+ debugfs_buf, size);
+ }
return ret;
}
/*
* set the buffer size (in KB) for debug info
- * if input is 0, then stop recording debug info into buffer
*/
static ssize_t sps_set_info(struct file *file, const char __user *buf,
size_t count, loff_t *ppos)
{
unsigned long missing;
- static char str[5];
- int i, buf_size_kb = 0;
+ char str[MAX_MSG_LEN];
+ int i;
+ u32 buf_size_kb = 0;
+ u32 new_buf_size;
memset(str, 0, sizeof(str));
missing = copy_from_user(str, buf, sizeof(str));
@@ -145,37 +161,53 @@
for (i = 0; i < sizeof(str) && (str[i] >= '0') && (str[i] <= '9'); ++i)
buf_size_kb = (buf_size_kb * 10) + (str[i] - '0');
- pr_info("sps:debugfs buffer size is %dKB\n", buf_size_kb);
+ pr_info("sps:debugfs: input buffer size is %dKB\n", buf_size_kb);
- if (sps_debugfs_enabled && (buf_size_kb == 0)) {
- sps_debugfs_enabled = false;
- detailed_debug_on = false;
- kfree(debugfs_buf);
- debugfs_buf = NULL;
- debugfs_buf_used = 0;
- debugfs_buf_size = 0;
- wraparound = false;
- } else if (!sps_debugfs_enabled && (buf_size_kb > 0)) {
- debugfs_buf_size = buf_size_kb * SZ_1K;
+ if ((logging_option == 0) || (logging_option == 2)) {
+ pr_info("sps:debugfs: need to first turn on recording.\n");
+ return -EFAULT;
+ }
- debugfs_buf = kzalloc(sizeof(char) * debugfs_buf_size,
- GFP_KERNEL);
- if (!debugfs_buf) {
- debugfs_buf_size = 0;
- pr_err("sps:fail to allocate memory for debug_fs.\n");
- return -ENOMEM;
+ if (buf_size_kb < 1) {
+ pr_info("sps:debugfs: buffer size should be "
+ "no less than 1KB.\n");
+ return -EFAULT;
+ }
+
+ new_buf_size = buf_size_kb * SZ_1K;
+
+ if (debugfs_record_enabled) {
+ if (debugfs_buf_size == new_buf_size) {
+ /* need do nothing */
+ pr_info("sps:debugfs: input buffer size "
+ "is the same as before.\n");
+ return count;
+ } else {
+ /* release the current buffer */
+ debugfs_record_enabled = false;
+ debugfs_buf_used = 0;
+ wraparound = false;
+ kfree(debugfs_buf);
+ debugfs_buf = NULL;
}
+ }
- if (buf_size_kb == MAX_OUTPUT_MAGIC_NUM)
- detailed_debug_on = true;
- sps_debugfs_enabled = true;
- debugfs_buf_used = 0;
- wraparound = false;
- } else if (sps_debugfs_enabled && (buf_size_kb > 0))
- pr_info("sps:should disable debugfs before change "
- "buffer size.\n");
+ /* allocate new buffer */
+ debugfs_buf_size = new_buf_size;
- return sps_debugfs_enabled;
+ debugfs_buf = kzalloc(sizeof(char) * debugfs_buf_size,
+ GFP_KERNEL);
+ if (!debugfs_buf) {
+ debugfs_buf_size = 0;
+ pr_err("sps:fail to allocate memory for debug_fs.\n");
+ return -ENOMEM;
+ }
+
+ debugfs_buf_used = 0;
+ wraparound = false;
+ debugfs_record_enabled = true;
+
+ return count;
}
const struct file_operations sps_info_ops = {
@@ -183,12 +215,136 @@
.write = sps_set_info,
};
-struct dentry *dent;
-struct dentry *dfile;
+/* return the current logging option to userspace */
+static ssize_t sps_read_logging_option(struct file *file, char __user *ubuf,
+ size_t count, loff_t *ppos)
+{
+ char value[MAX_MSG_LEN];
+ int nbytes;
+
+ nbytes = snprintf(value, MAX_MSG_LEN, "%d\n", logging_option);
+
+ return simple_read_from_buffer(ubuf, count, ppos, value, nbytes);
+}
+
+/*
+ * set the logging option
+ */
+static ssize_t sps_set_logging_option(struct file *file, const char __user *buf,
+ size_t count, loff_t *ppos)
+{
+ unsigned long missing;
+ char str[MAX_MSG_LEN];
+ int i;
+ u8 option = 0;
+
+ memset(str, 0, sizeof(str));
+ missing = copy_from_user(str, buf, sizeof(str));
+ if (missing)
+ return -EFAULT;
+
+ for (i = 0; i < sizeof(str) && (str[i] >= '0') && (str[i] <= '9'); ++i)
+ option = (option * 10) + (str[i] - '0');
+
+ pr_info("sps:debugfs: try to change logging option to %d\n", option);
+
+ if (option > 3) {
+ pr_err("sps:debugfs: invalid logging option:%d\n", option);
+ return count;
+ }
+
+ if (((option == 0) || (option == 2)) &&
+ ((logging_option == 1) || (logging_option == 3))) {
+ debugfs_record_enabled = false;
+ kfree(debugfs_buf);
+ debugfs_buf = NULL;
+ debugfs_buf_used = 0;
+ debugfs_buf_size = 0;
+ wraparound = false;
+ }
+
+ logging_option = option;
+
+ return count;
+}
+
+const struct file_operations sps_logging_option_ops = {
+ .read = sps_read_logging_option,
+ .write = sps_set_logging_option,
+};
+
+/*
+ * input the bam physical address
+ */
+static ssize_t sps_set_bam_addr(struct file *file, const char __user *buf,
+ size_t count, loff_t *ppos)
+{
+ unsigned long missing;
+ char str[MAX_MSG_LEN];
+ u32 i;
+ u32 bam_addr = 0;
+ struct sps_bam *bam;
+ u32 num_pipes = 0;
+ void *vir_addr;
+
+ memset(str, 0, sizeof(str));
+ missing = copy_from_user(str, buf, sizeof(str));
+ if (missing)
+ return -EFAULT;
+
+ for (i = 0; i < sizeof(str) && (str[i] >= '0') && (str[i] <= '9'); ++i)
+ bam_addr = (bam_addr * 10) + (str[i] - '0');
+
+ pr_info("sps:debugfs:input BAM physical address:0x%x\n", bam_addr);
+
+ bam = phy2bam(bam_addr);
+
+ if (bam == NULL) {
+ pr_err("sps:debugfs:BAM 0x%x is not registered.", bam_addr);
+ return count;
+ } else {
+ vir_addr = bam->base;
+ num_pipes = bam->props.num_pipes;
+ }
+
+ switch (reg_dump_option) {
+ case 1: /* output all registers of this BAM */
+ print_bam_reg(vir_addr);
+ for (i = 0; i < num_pipes; i++)
+ print_bam_pipe_reg(vir_addr, i);
+ break;
+ case 2: /* output BAM-level registers */
+ print_bam_reg(vir_addr);
+ break;
+ case 3: /* output selected BAM-level registers */
+ print_bam_selected_reg(vir_addr);
+ break;
+ case 4: /* output selected registers of all pipes */
+ for (i = 0; i < num_pipes; i++)
+ print_bam_pipe_selected_reg(vir_addr, i);
+ break;
+ case 5: /* output selected registers of some pipes */
+ print_bam_pipe_selected_reg(vir_addr, 4);
+ print_bam_pipe_selected_reg(vir_addr, 5);
+ break;
+ default:
+ pr_info("sps:no dump option is chosen yet.");
+ }
+
+ return count;
+}
+
+const struct file_operations sps_bam_addr_ops = {
+ .write = sps_set_bam_addr,
+};
+
static void sps_debugfs_init(void)
{
- sps_debugfs_enabled = false;
- detailed_debug_on = false;
+ debugfs_record_enabled = false;
+ logging_option = 0;
+ debug_level_option = 0;
+ print_limit_option = 0;
+ reg_dump_option = 0;
debugfs_buf_size = 0;
debugfs_buf_used = 0;
wraparound = false;
@@ -199,19 +355,83 @@
return;
}
- dfile = debugfs_create_file("info", 0444, dent, 0,
+ dfile_info = debugfs_create_file("info", 0666, dent, 0,
&sps_info_ops);
- if (!dfile || IS_ERR(dfile)) {
- pr_err("sps:fail to create the file for debug_fs.\n");
- debugfs_remove(dent);
- return;
+ if (!dfile_info || IS_ERR(dfile_info)) {
+ pr_err("sps:fail to create the file for debug_fs info.\n");
+ goto info_err;
}
+
+ dfile_logging_option = debugfs_create_file("logging_option", 0666,
+ dent, 0, &sps_logging_option_ops);
+ if (!dfile_logging_option || IS_ERR(dfile_logging_option)) {
+ pr_err("sps:fail to create the file for debug_fs "
+ "logging_option.\n");
+ goto logging_option_err;
+ }
+
+ dfile_debug_level_option = debugfs_create_u8("debug_level_option",
+ 0666, dent, &debug_level_option);
+ if (!dfile_debug_level_option || IS_ERR(dfile_debug_level_option)) {
+ pr_err("sps:fail to create the file for debug_fs "
+ "debug_level_option.\n");
+ goto debug_level_option_err;
+ }
+
+ dfile_print_limit_option = debugfs_create_u8("print_limit_option",
+ 0666, dent, &print_limit_option);
+ if (!dfile_print_limit_option || IS_ERR(dfile_print_limit_option)) {
+ pr_err("sps:fail to create the file for debug_fs "
+ "print_limit_option.\n");
+ goto print_limit_option_err;
+ }
+
+ dfile_reg_dump_option = debugfs_create_u8("reg_dump_option", 0666,
+ dent, ®_dump_option);
+ if (!dfile_reg_dump_option || IS_ERR(dfile_reg_dump_option)) {
+ pr_err("sps:fail to create the file for debug_fs "
+ "reg_dump_option.\n");
+ goto reg_dump_option_err;
+ }
+
+ dfile_bam_addr = debugfs_create_file("bam_addr", 0666,
+ dent, 0, &sps_bam_addr_ops);
+ if (!dfile_bam_addr || IS_ERR(dfile_bam_addr)) {
+ pr_err("sps:fail to create the file for debug_fs "
+ "bam_addr.\n");
+ goto bam_addr_err;
+ }
+
+ return;
+
+bam_addr_err:
+ debugfs_remove(dfile_reg_dump_option);
+reg_dump_option_err:
+ debugfs_remove(dfile_print_limit_option);
+print_limit_option_err:
+ debugfs_remove(dfile_debug_level_option);
+debug_level_option_err:
+ debugfs_remove(dfile_logging_option);
+logging_option_err:
+ debugfs_remove(dfile_info);
+info_err:
+ debugfs_remove(dent);
}
static void sps_debugfs_exit(void)
{
- if (dfile)
- debugfs_remove(dfile);
+ if (dfile_info)
+ debugfs_remove(dfile_info);
+ if (dfile_logging_option)
+ debugfs_remove(dfile_logging_option);
+ if (dfile_debug_level_option)
+ debugfs_remove(dfile_debug_level_option);
+ if (dfile_print_limit_option)
+ debugfs_remove(dfile_print_limit_option);
+ if (dfile_reg_dump_option)
+ debugfs_remove(dfile_reg_dump_option);
+ if (dfile_bam_addr)
+ debugfs_remove(dfile_bam_addr);
if (dent)
debugfs_remove(dent);
kfree(debugfs_buf);
@@ -235,13 +455,13 @@
struct sps_bam_props bamdma_props = {0};
#endif
- SPS_DBG("sps_device_init");
+ SPS_DBG("sps:sps_device_init");
success = false;
result = sps_mem_init(sps->pipemem_phys_base, sps->pipemem_size);
if (result) {
- SPS_ERR("SPS memory init failed");
+ SPS_ERR("sps:SPS memory init failed");
goto exit_err;
}
@@ -249,13 +469,13 @@
mutex_init(&sps->lock);
if (sps_rm_init(&sps->connection_ctrl, sps->options)) {
- SPS_ERR("Failed to init SPS resource manager");
+ SPS_ERR("sps:Fail to init SPS resource manager");
goto exit_err;
}
result = sps_bam_driver_init(sps->options);
if (result) {
- SPS_ERR("SPS BAM driver init failed");
+ SPS_ERR("sps:SPS BAM driver init failed");
goto exit_err;
}
@@ -266,11 +486,11 @@
sps->bamdma_bam_size);
if (!bamdma_props.virt_addr) {
- SPS_ERR("sps:Failed to IO map BAM-DMA BAM registers.\n");
+ SPS_ERR("sps:Fail to IO map BAM-DMA BAM registers.\n");
goto exit_err;
}
- SPS_DBG("sps:bamdma_bam.phys=0x%x.virt=0x%x.",
+ SPS_DBG2("sps:bamdma_bam.phys=0x%x.virt=0x%x.",
bamdma_props.phys_addr,
(u32) bamdma_props.virt_addr);
@@ -280,11 +500,11 @@
sps->bamdma_dma_size);
if (!bamdma_props.periph_virt_addr) {
- SPS_ERR("sps:Failed to IO map BAM-DMA peripheral reg.\n");
+ SPS_ERR("sps:Fail to IO map BAM-DMA peripheral reg.\n");
goto exit_err;
}
- SPS_DBG("sps:bamdma_dma.phys=0x%x.virt=0x%x.",
+ SPS_DBG2("sps:bamdma_dma.phys=0x%x.virt=0x%x.",
bamdma_props.periph_phys_addr,
(u32) bamdma_props.periph_virt_addr);
@@ -298,14 +518,14 @@
result = sps_dma_init(&bamdma_props);
if (result) {
- SPS_ERR("SPS BAM DMA driver init failed");
+ SPS_ERR("sps:SPS BAM DMA driver init failed");
goto exit_err;
}
#endif /* CONFIG_SPS_SUPPORT_BAMDMA */
result = sps_map_init(NULL, sps->options);
if (result) {
- SPS_ERR("SPS connection mapping init failed");
+ SPS_ERR("sps:SPS connection mapping init failed");
goto exit_err;
}
@@ -331,7 +551,7 @@
*/
static void sps_device_de_init(void)
{
- SPS_DBG("%s.", __func__);
+ SPS_DBG2("sps:%s.", __func__);
if (sps != NULL) {
#ifdef CONFIG_SPS_SUPPORT_BAMDMA
@@ -339,7 +559,7 @@
#endif
/* Are there any remaining BAM registrations? */
if (!list_empty(&sps->bams_q))
- SPS_ERR("SPS de-init: BAMs are still registered");
+ SPS_ERR("sps:SPS de-init: BAMs are still registered");
sps_map_de_init();
@@ -390,7 +610,7 @@
static int sps_client_de_init(struct sps_pipe *client)
{
if (client->client_state != SPS_STATE_DISCONNECT) {
- SPS_ERR("De-init client in connected state: 0x%x",
+ SPS_ERR("sps:De-init client in connected state: 0x%x",
client->client_state);
return SPS_ERROR;
}
@@ -449,7 +669,7 @@
}
}
- SPS_INFO("sps: BAM device 0x%x is not registered yet.\n", phys_addr);
+ SPS_ERR("sps: BAM device 0x%x is not registered yet.\n", phys_addr);
return -ENODEV;
}
@@ -472,14 +692,16 @@
int sps_setup_bam2bam_fifo(struct sps_mem_buffer *mem_buffer,
u32 addr, u32 size, int use_offset)
{
- if ((mem_buffer == NULL) || (size == 0))
+ if ((mem_buffer == NULL) || (size == 0)) {
+ SPS_ERR("sps:invalid buffer address or size.");
return SPS_ERROR;
+ }
if (use_offset) {
if ((addr + size) <= sps->pipemem_size)
mem_buffer->phys_base = sps->pipemem_phys_base + addr;
else {
- SPS_ERR("sps: requested mem is out of "
+ SPS_ERR("sps:requested mem is out of "
"pipe mem range.\n");
return SPS_ERROR;
}
@@ -489,7 +711,7 @@
+ sps->pipemem_size))
mem_buffer->phys_base = addr;
else {
- SPS_ERR("sps: requested mem is out of "
+ SPS_ERR("sps:requested mem is out of "
"pipe mem range.\n");
return SPS_ERROR;
}
@@ -527,7 +749,7 @@
return bam;
}
- SPS_ERR("Can't find BAM device for handle 0x%x.", h);
+ SPS_ERR("sps:Can't find BAM device for handle 0x%x.", h);
return NULL;
}
@@ -549,7 +771,7 @@
bam = pipe->bam;
if (bam == NULL) {
- SPS_ERR("Connection not in connected state");
+ SPS_ERR("sps:Connection is not in connected state.");
return NULL;
}
@@ -559,7 +781,7 @@
pipe_index = pipe->pipe_index;
if (pipe_index >= bam->props.num_pipes ||
pipe != bam->pipes[pipe_index]) {
- SPS_ERR("Client not owner of BAM 0x%x pipe: %d (max %d)",
+ SPS_ERR("sps:Client not owner of BAM 0x%x pipe: %d (max %d)",
bam->props.phys_addr, pipe_index,
bam->props.num_pipes);
spin_unlock_irqrestore(&bam->connection_lock,
@@ -598,7 +820,7 @@
return -ENODEV;
if (!sps->is_ready) {
- SPS_ERR("sps_connect.sps driver not ready.\n");
+ SPS_ERR("sps:sps_connect:sps driver is not ready.\n");
return -EAGAIN;
}
@@ -614,12 +836,12 @@
bam = sps_h2bam(dev);
if (bam == NULL) {
- SPS_ERR("Invalid BAM device handle: 0x%x", dev);
+ SPS_ERR("sps:Invalid BAM device handle: 0x%x", dev);
result = SPS_ERROR;
goto exit_err;
}
- SPS_DBG("sps_connect: bam 0x%x src 0x%x dest 0x%x mode %s",
+ SPS_DBG2("sps:sps_connect: bam 0x%x src 0x%x dest 0x%x mode %s",
BAM_ID(bam),
connect->source,
connect->destination,
@@ -674,14 +896,18 @@
struct sps_bam *bam;
int result;
- if (pipe == NULL)
+ if (pipe == NULL) {
+ SPS_ERR("sps:Invalid pipe.");
return SPS_ERROR;
+ }
bam = pipe->bam;
- if (bam == NULL)
+ if (bam == NULL) {
+ SPS_ERR("sps:BAM device of this pipe is NULL.");
return SPS_ERROR;
+ }
- SPS_DBG("sps_disconnect: bam 0x%x src 0x%x dest 0x%x mode %s",
+ SPS_DBG2("sps:sps_disconnect: bam 0x%x src 0x%x dest 0x%x mode %s",
BAM_ID(bam),
pipe->connect.source,
pipe->connect.destination,
@@ -695,7 +921,7 @@
check = pipe->map->client_dest;
if (check != pipe) {
- SPS_ERR("Client context is corrupt");
+ SPS_ERR("sps:Client context is corrupt");
goto exit_err;
}
@@ -725,13 +951,13 @@
struct sps_bam *bam;
int result;
- SPS_DBG("%s.", __func__);
+ SPS_DBG2("sps:%s.", __func__);
if (sps == NULL)
return -ENODEV;
if (!sps->is_ready) {
- SPS_ERR("sps_connect.sps driver not ready.\n");
+ SPS_ERR("sps:sps_connect:sps driver not ready.\n");
return -EAGAIN;
}
@@ -742,7 +968,7 @@
result = sps_bam_pipe_reg_event(bam, pipe->pipe_index, reg);
sps_bam_unlock(bam);
if (result)
- SPS_ERR("Failed to register event for BAM 0x%x pipe %d",
+ SPS_ERR("sps:Fail to register event for BAM 0x%x pipe %d",
pipe->bam->props.phys_addr, pipe->pipe_index);
return result;
@@ -759,7 +985,7 @@
struct sps_bam *bam;
int result;
- SPS_DBG("%s.", __func__);
+ SPS_DBG2("sps:%s.", __func__);
bam = sps_bam_lock(pipe);
if (bam == NULL)
@@ -783,7 +1009,7 @@
struct sps_bam *bam;
int result;
- SPS_DBG("%s.", __func__);
+ SPS_DBG2("sps:%s.", __func__);
bam = sps_bam_lock(pipe);
if (bam == NULL)
@@ -807,7 +1033,7 @@
struct sps_bam *bam;
int result;
- SPS_DBG("%s.", __func__);
+ SPS_DBG("sps:%s.", __func__);
bam = sps_bam_lock(pipe);
if (bam == NULL)
@@ -832,7 +1058,7 @@
struct sps_bam *bam;
int result;
- SPS_DBG("%s.", __func__);
+ SPS_DBG("sps:%s.", __func__);
bam = sps_bam_lock(pipe);
if (bam == NULL)
@@ -857,7 +1083,7 @@
struct sps_bam *bam;
int result;
- SPS_DBG("%s.", __func__);
+ SPS_DBG("sps:%s.", __func__);
bam = sps_bam_lock(pipe);
if (bam == NULL)
@@ -880,7 +1106,7 @@
struct sps_bam *bam;
int result;
- SPS_DBG("%s.", __func__);
+ SPS_DBG("sps:%s.", __func__);
bam = sps_bam_lock(pipe);
if (bam == NULL)
@@ -903,7 +1129,7 @@
struct sps_bam *bam;
int result;
- SPS_DBG("%s.", __func__);
+ SPS_DBG("sps:%s.", __func__);
bam = sps_bam_lock(pipe);
if (bam == NULL)
@@ -925,13 +1151,13 @@
struct sps_bam *bam;
int result;
- SPS_DBG("%s: dev = 0x%x", __func__, dev);
+ SPS_DBG2("sps:%s: dev = 0x%x", __func__, dev);
mutex_lock(&sps->lock);
/* Search for the target BAM device */
bam = sps_h2bam(dev);
if (bam == NULL) {
- SPS_ERR("Invalid BAM device handle: 0x%x", dev);
+ SPS_ERR("sps:Invalid BAM device handle: 0x%x", dev);
result = SPS_ERROR;
goto exit_err;
}
@@ -940,7 +1166,7 @@
result = sps_bam_reset(bam);
mutex_unlock(&bam->lock);
if (result) {
- SPS_ERR("Failed to reset BAM device: 0x%x", dev);
+ SPS_ERR("sps:Fail to reset BAM device: 0x%x", dev);
goto exit_err;
}
@@ -960,7 +1186,7 @@
struct sps_pipe *pipe = h;
if (config == NULL) {
- SPS_ERR("Config pointer is NULL");
+ SPS_ERR("sps:Config pointer is NULL");
return SPS_ERROR;
}
@@ -981,7 +1207,7 @@
struct sps_bam *bam;
int result;
- SPS_DBG("%s.", __func__);
+ SPS_DBG("sps:%s.", __func__);
bam = sps_bam_lock(pipe);
if (bam == NULL)
@@ -1009,7 +1235,7 @@
int result;
if (owner != SPS_OWNER_REMOTE) {
- SPS_ERR("Unsupported ownership state: %d", owner);
+ SPS_ERR("sps:Unsupported ownership state: %d", owner);
return SPS_ERROR;
}
@@ -1053,16 +1279,20 @@
return -ENODEV;
if (!sps->is_ready) {
- SPS_ERR("sps_alloc_mem.sps driver not ready.\n");
+ SPS_ERR("sps:sps_alloc_mem:sps driver is not ready.");
return -EAGAIN;
}
- if (mem_buffer == NULL || mem_buffer->size == 0)
+ if (mem_buffer == NULL || mem_buffer->size == 0) {
+ SPS_ERR("sps:invalid memory buffer address or size");
return SPS_ERROR;
+ }
mem_buffer->phys_base = sps_mem_alloc_io(mem_buffer->size);
- if (mem_buffer->phys_base == SPS_ADDR_INVALID)
+ if (mem_buffer->phys_base == SPS_ADDR_INVALID) {
+ SPS_ERR("sps:invalid address of allocated memory");
return SPS_ERROR;
+ }
mem_buffer->base = spsi_get_mem_ptr(mem_buffer->phys_base);
@@ -1076,8 +1306,10 @@
*/
int sps_free_mem(struct sps_pipe *h, struct sps_mem_buffer *mem_buffer)
{
- if (mem_buffer == NULL || mem_buffer->phys_base == SPS_ADDR_INVALID)
+ if (mem_buffer == NULL || mem_buffer->phys_base == SPS_ADDR_INVALID) {
+ SPS_ERR("sps:invalid memory to free");
return SPS_ERROR;
+ }
sps_mem_free_io(mem_buffer->phys_base, mem_buffer->size);
@@ -1103,7 +1335,7 @@
/* BAM-DMA is registered internally during power-up */
if ((!sps->is_ready) && !(bam_props->options & SPS_BAM_OPT_BAMDMA)) {
- SPS_ERR("sps_register_bam_device.sps driver not ready.\n");
+ SPS_ERR("sps:sps_register_bam_device:sps driver not ready.\n");
return -EAGAIN;
}
@@ -1114,7 +1346,7 @@
manage = bam_props->manage & SPS_BAM_MGR_ACCESS_MASK;
if (manage != SPS_BAM_MGR_NONE) {
if (bam_props->virt_addr == NULL && bam_props->virt_size == 0) {
- SPS_ERR("Invalid properties for BAM: %x",
+ SPS_ERR("sps:Invalid properties for BAM: %x",
bam_props->phys_addr);
return SPS_ERROR;
}
@@ -1122,8 +1354,8 @@
if ((bam_props->manage & SPS_BAM_MGR_DEVICE_REMOTE) == 0) {
/* BAM global is configured by local processor */
if (bam_props->summing_threshold == 0) {
- SPS_ERR("Invalid device ctrl properties for BAM: %x",
- bam_props->phys_addr);
+ SPS_ERR("sps:Invalid device ctrl properties for "
+ "BAM: %x", bam_props->phys_addr);
return SPS_ERROR;
}
}
@@ -1139,7 +1371,8 @@
bam = phy2bam(bam_props->phys_addr);
if (bam != NULL) {
mutex_unlock(&sps->lock);
- SPS_ERR("BAM already registered: %x", bam->props.phys_addr);
+ SPS_ERR("sps:BAM is already registered: %x",
+ bam->props.phys_addr);
result = -EEXIST;
bam = NULL; /* Avoid error clean-up kfree(bam) */
goto exit_err;
@@ -1151,7 +1384,7 @@
/* Map the memory region */
virt_addr = ioremap(bam_props->phys_addr, bam_props->virt_size);
if (virt_addr == NULL) {
- SPS_ERR("Unable to map BAM IO memory: %x %x",
+ SPS_ERR("sps:Unable to map BAM IO mem:0x%x size:0x%x",
bam_props->phys_addr, bam_props->virt_size);
goto exit_err;
}
@@ -1159,7 +1392,7 @@
bam = kzalloc(sizeof(*bam), GFP_KERNEL);
if (bam == NULL) {
- SPS_ERR("Unable to allocate BAM device state: size 0x%x",
+ SPS_ERR("sps:Unable to allocate BAM device state: size 0x%x",
sizeof(*bam));
goto exit_err;
}
@@ -1181,7 +1414,7 @@
* to a non-zero value to insure EE zero globals are not
* modified.
*/
- SPS_INFO("Setting EE for BAM %x to non-zero",
+ SPS_DBG2("sps:Setting EE for BAM %x to non-zero",
bam_props->phys_addr);
bam->props.ee = 1;
}
@@ -1189,7 +1422,7 @@
ok = sps_bam_device_init(bam);
mutex_unlock(&bam->lock);
if (ok) {
- SPS_ERR("Failed to init BAM device: phys 0x%0x",
+ SPS_ERR("sps:Fail to init BAM device: phys 0x%0x",
bam->props.phys_addr);
goto exit_err;
}
@@ -1218,14 +1451,14 @@
if (sps_dma_device_init((u32) bam)) {
bam->props.options &= ~SPS_BAM_OPT_BAMDMA;
sps_deregister_bam_device((u32) bam);
- SPS_ERR("Failed to init BAM-DMA device: BAM phys 0x%0x",
+ SPS_ERR("sps:Fail to init BAM-DMA BAM: phys 0x%0x",
bam->props.phys_addr);
return SPS_ERROR;
}
}
#endif /* CONFIG_SPS_SUPPORT_BAMDMA */
- SPS_DBG("SPS registered BAM: phys 0x%x.", bam->props.phys_addr);
+ SPS_INFO("sps:BAM 0x%x is registered.", bam->props.phys_addr);
return 0;
}
@@ -1240,10 +1473,12 @@
struct sps_bam *bam;
bam = sps_h2bam(dev_handle);
- if (bam == NULL)
+ if (bam == NULL) {
+ SPS_ERR("sps:did not find a BAM for this handle");
return SPS_ERROR;
+ }
- SPS_DBG("SPS deregister BAM: phys 0x%x.", bam->props.phys_addr);
+ SPS_DBG2("sps:SPS deregister BAM: phys 0x%x.", bam->props.phys_addr);
/* If this BAM is attached to a BAM-DMA, init the BAM-DMA device */
#ifdef CONFIG_SPS_SUPPORT_BAMDMA
@@ -1283,10 +1518,12 @@
struct sps_bam *bam;
int result;
- if (h == NULL || iovec == NULL)
+ if (h == NULL || iovec == NULL) {
+ SPS_ERR("sps:invalid pipe or iovec");
return SPS_ERROR;
+ }
- SPS_DBG("%s.", __func__);
+ SPS_DBG("sps:%s.", __func__);
bam = sps_bam_lock(pipe);
if (bam == NULL)
@@ -1312,10 +1549,12 @@
struct sps_bam *bam;
int result;
- SPS_DBG("%s.", __func__);
+ SPS_DBG("sps:%s.", __func__);
- if (h == NULL || timer_ctrl == NULL)
+ if (h == NULL || timer_ctrl == NULL) {
+ SPS_ERR("sps:invalid pipe or timer ctrl");
return SPS_ERROR;
+ }
bam = sps_bam_lock(pipe);
if (bam == NULL)
@@ -1340,7 +1579,7 @@
ctx = kzalloc(sizeof(struct sps_pipe), GFP_KERNEL);
if (ctx == NULL) {
- SPS_ERR("Allocate pipe context fail.");
+ SPS_ERR("sps:Fail to allocate pipe context.");
return NULL;
}
@@ -1439,9 +1678,10 @@
if (of_property_read_u32((&pdev->dev)->of_node,
"qcom,bam-dma-res-pipes",
- &sps->bamdma_restricted_pipes))
+ &sps->bamdma_restricted_pipes)) {
+ SPS_ERR("sps:Fail to get restricted bamdma pipes.\n");
return -EINVAL;
- else
+ } else
SPS_DBG("sps:bamdma_restricted_pipes=0x%x.",
sps->bamdma_restricted_pipes);
@@ -1489,17 +1729,19 @@
SPS_DBG("sps:msm_sps_probe.");
if (pdev->dev.of_node) {
- SPS_DBG("sps:get data from device tree.");
- ret = get_device_tree_data(pdev);
-
+ if (get_device_tree_data(pdev)) {
+ SPS_ERR("sps:Fail to get data from device tree.");
+ return -ENODEV;
+ } else
+ SPS_DBG("sps:get data from device tree.");
} else {
- SPS_DBG("sps:get platform data.");
- ret = get_platform_data(pdev);
+ if (get_platform_data(pdev)) {
+ SPS_ERR("sps:Fail to get platform data.");
+ return -ENODEV;
+ } else
+ SPS_DBG("sps:get platform data.");
}
- if (ret)
- return -ENODEV;
-
/* Create Device */
sps->dev_class = class_create(THIS_MODULE, SPS_DRV_NAME);
@@ -1574,7 +1816,7 @@
#endif
sps->is_ready = true;
- SPS_INFO("sps is ready.");
+ SPS_INFO("sps:sps is ready.");
return 0;
clk_err:
@@ -1590,7 +1832,7 @@
static int __devexit msm_sps_remove(struct platform_device *pdev)
{
- SPS_DBG("%s.", __func__);
+ SPS_DBG("sps:%s.", __func__);
device_destroy(sps->dev_class, sps->dev_num);
unregister_chrdev_region(sps->dev_num, 1);
@@ -1631,7 +1873,7 @@
sps_debugfs_init();
#endif
- SPS_DBG("%s.", __func__);
+ SPS_DBG("sps:%s.", __func__);
/* Allocate the SPS driver state struct */
sps = kzalloc(sizeof(*sps), GFP_KERNEL);
@@ -1650,7 +1892,7 @@
*/
static void __exit sps_exit(void)
{
- SPS_DBG("%s.", __func__);
+ SPS_DBG("sps:%s.", __func__);
platform_driver_unregister(&msm_sps_driver);
diff --git a/drivers/platform/msm/sps/sps_bam.c b/drivers/platform/msm/sps/sps_bam.c
index cb5a0ee..e48f59b 100644
--- a/drivers/platform/msm/sps/sps_bam.c
+++ b/drivers/platform/msm/sps/sps_bam.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -102,7 +102,7 @@
for (n = 0; n < ARRAY_SIZE(opt_event_table); n++) {
if ((u32)opt_event_table[n].option !=
(u32)opt_event_table[n].pipe_irq) {
- SPS_ERR("SPS_O 0x%x != HAL IRQ 0x%x",
+ SPS_ERR("sps:SPS_O 0x%x != HAL IRQ 0x%x",
opt_event_table[n].option,
opt_event_table[n].pipe_irq);
return SPS_ERROR;
@@ -138,7 +138,7 @@
dev->props.ee,
mask);
- SPS_DBG("sps:bam_isr:bam=0x%x;source=0x%x;mask=0x%x.",
+ SPS_DBG1("sps:bam_isr:bam=0x%x;source=0x%x;mask=0x%x.",
BAM_ID(dev), source, mask);
/* Mask any non-local source */
@@ -146,6 +146,9 @@
} else {
/* If MTIs are used, must poll each active pipe */
source = dev->pipe_active_mask;
+
+ SPS_DBG1("sps:bam_isr for MTI:bam=0x%x;source=0x%x.",
+ BAM_ID(dev), source);
}
/* Process active pipe sources */
@@ -164,7 +167,7 @@
/* Process any inactive pipe sources */
if (source) {
- SPS_ERR("IRQ from BAM 0x%x inactive pipe(s) 0x%x",
+ SPS_ERR("sps:IRQ from BAM 0x%x inactive pipe(s) 0x%x",
BAM_ID(dev), source);
dev->irq_from_disabled_pipe++;
}
@@ -191,7 +194,7 @@
/* Is there any access to this BAM? */
if ((dev->props.manage & SPS_BAM_MGR_ACCESS_MASK) == SPS_BAM_MGR_NONE) {
- SPS_ERR("No local access to BAM 0x%x", BAM_ID(dev));
+ SPS_ERR("sps:No local access to BAM 0x%x", BAM_ID(dev));
return SPS_ERROR;
}
@@ -209,7 +212,7 @@
IRQF_TRIGGER_HIGH, "sps", dev);
if (result) {
- SPS_ERR("Failed to register BAM 0x%x IRQ %d",
+ SPS_ERR("sps:Failed to register BAM 0x%x IRQ %d",
BAM_ID(dev), dev->props.irq);
return SPS_ERROR;
}
@@ -223,11 +226,14 @@
result = enable_irq_wake(dev->props.irq);
if (result) {
- SPS_ERR("Failed to enable wakeup irq "
+ SPS_ERR("sps:Fail to enable wakeup irq "
"BAM 0x%x IRQ %d",
BAM_ID(dev), dev->props.irq);
return SPS_ERROR;
- }
+ } else
+ SPS_DBG2("sps:Enable wakeup irq for "
+ "BAM 0x%x IRQ %d",
+ BAM_ID(dev), dev->props.irq);
}
}
@@ -245,7 +251,7 @@
rc = bam_check(dev->base, &dev->version, &num_pipes);
if (rc) {
- SPS_ERR("Failed to init BAM 0x%x IRQ %d",
+ SPS_ERR("sps:Fail to init BAM 0x%x IRQ %d",
BAM_ID(dev), dev->props.irq);
return SPS_ERROR;
}
@@ -264,7 +270,7 @@
* must use MTI. Thus, force EE index to a non-zero value to
* insure that EE zero globals can't be modified.
*/
- SPS_ERR("sps: EE for satellite BAM must be set to non-zero");
+ SPS_ERR("sps:EE for satellite BAM must be set to non-zero.");
return SPS_ERROR;
}
@@ -278,7 +284,7 @@
MTIenabled) {
if (dev->props.irq_gen_addr == 0 ||
dev->props.irq_gen_addr == SPS_ADDR_INVALID) {
- SPS_ERR("MTI destination address not specified "
+ SPS_ERR("sps:MTI destination address not specified "
"for BAM 0x%x", BAM_ID(dev));
return SPS_ERROR;
}
@@ -287,13 +293,14 @@
if (num_pipes) {
dev->props.num_pipes = num_pipes;
- SPS_DBG("BAM 0x%x number of pipes reported by hw: %d",
+ SPS_DBG1("sps:BAM 0x%x number of pipes reported by hw: %d",
BAM_ID(dev), dev->props.num_pipes);
}
/* Check EE index */
if (!MTIenabled && dev->props.ee >= SPS_BAM_NUM_EES) {
- SPS_ERR("Invalid EE BAM 0x%x: %d", BAM_ID(dev), dev->props.ee);
+ SPS_ERR("sps:Invalid EE BAM 0x%x: %d", BAM_ID(dev),
+ dev->props.ee);
return SPS_ERROR;
}
@@ -305,7 +312,7 @@
struct sps_bam_sec_config_props *p_sec =
dev->props.p_sec_config_props;
if (p_sec == NULL) {
- SPS_ERR("EE config table is not specified for "
+ SPS_ERR("sps:EE config table is not specified for "
"BAM 0x%x", BAM_ID(dev));
return SPS_ERROR;
}
@@ -333,7 +340,7 @@
for (i = n + 1; i < SPS_BAM_NUM_EES; i++) {
if ((p_sec->ees[n].pipe_mask &
p_sec->ees[i].pipe_mask) != 0) {
- SPS_ERR("Overlapping pipe "
+ SPS_ERR("sps:Overlapping pipe "
"assignments for BAM "
"0x%x: EEs %d and %d",
BAM_ID(dev), n, i);
@@ -385,7 +392,7 @@
}
dev->state |= BAM_STATE_ENABLED;
- SPS_DBG("BAM 0x%x enabled: ver: %d, number of pipes: %d",
+ SPS_DBG2("sps:BAM 0x%x enabled: ver: %d, number of pipes: %d",
BAM_ID(dev), dev->version, dev->props.num_pipes);
return 0;
}
@@ -401,7 +408,7 @@
/* Is there any access to this BAM? */
if ((dev->props.manage & SPS_BAM_MGR_ACCESS_MASK) == SPS_BAM_MGR_NONE) {
- SPS_ERR("No local access to BAM 0x%x", BAM_ID(dev));
+ SPS_ERR("sps:No local access to BAM 0x%x", BAM_ID(dev));
return SPS_ERROR;
}
@@ -425,7 +432,7 @@
dev->state &= ~BAM_STATE_ENABLED;
- SPS_DBG("BAM 0x%x disabled", BAM_ID(dev));
+ SPS_DBG2("sps:BAM 0x%x disabled", BAM_ID(dev));
return 0;
}
@@ -436,7 +443,7 @@
int sps_bam_device_init(struct sps_bam *dev)
{
if (dev->props.virt_addr == NULL) {
- SPS_ERR("NULL BAM virtual address");
+ SPS_ERR("sps:NULL BAM virtual address");
return SPS_ERROR;
}
dev->base = (void *) dev->props.virt_addr;
@@ -444,7 +451,7 @@
if (dev->props.num_pipes == 0) {
/* Assume max number of pipes until BAM registers can be read */
dev->props.num_pipes = BAM_MAX_PIPES;
- SPS_DBG("BAM 0x%x: assuming max number of pipes: %d",
+ SPS_DBG2("sps:BAM 0x%x: assuming max number of pipes: %d",
BAM_ID(dev), dev->props.num_pipes);
}
@@ -459,10 +466,13 @@
spin_lock_init(&dev->connection_lock);
if ((dev->props.options & SPS_BAM_OPT_ENABLE_AT_BOOT))
- if (sps_bam_enable(dev))
+ if (sps_bam_enable(dev)) {
+ SPS_ERR("sps:Fail to enable bam device");
return SPS_ERROR;
+ }
- SPS_DBG("BAM device: phys 0x%x IRQ %d", BAM_ID(dev), dev->props.irq);
+ SPS_DBG2("sps:BAM device: phys 0x%x IRQ %d",
+ BAM_ID(dev), dev->props.irq);
return 0;
}
@@ -475,7 +485,7 @@
{
int result;
- SPS_DBG("BAM device DEINIT: phys 0x%x IRQ %d",
+ SPS_DBG2("sps:BAM device DEINIT: phys 0x%x IRQ %d",
BAM_ID(dev), dev->props.irq);
result = sps_bam_disable(dev);
@@ -493,7 +503,7 @@
u32 pipe_index;
int result;
- SPS_DBG("BAM device RESET: phys 0x%x IRQ %d",
+ SPS_DBG2("sps:BAM device RESET: phys 0x%x IRQ %d",
BAM_ID(dev), dev->props.irq);
/* If BAM is enabled, then disable */
@@ -504,7 +514,7 @@
pipe_index++) {
pipe = dev->pipes[pipe_index];
if (BAM_PIPE_IS_ASSIGNED(pipe)) {
- SPS_ERR("BAM device 0x%x RESET failed: "
+ SPS_ERR("sps:BAM device 0x%x RESET failed: "
"pipe %d in use",
BAM_ID(dev), pipe_index);
result = SPS_ERROR;
@@ -557,8 +567,8 @@
if (pipe_index == SPS_BAM_PIPE_INVALID) {
/* Allocate a pipe from the BAM */
if ((dev->props.manage & SPS_BAM_MGR_PIPE_NO_ALLOC)) {
- SPS_ERR("Restricted from allocating pipes on BAM 0x%x",
- BAM_ID(dev));
+ SPS_ERR("sps:Restricted from allocating pipes "
+ "on BAM 0x%x", BAM_ID(dev));
return SPS_BAM_PIPE_INVALID;
}
for (pipe_index = 0, pipe_mask = 1;
@@ -571,24 +581,24 @@
break; /* Found an available pipe */
}
if (pipe_index >= dev->props.num_pipes) {
- SPS_ERR("Failed to allocate pipe on BAM 0x%x",
+ SPS_ERR("sps:Fail to allocate pipe on BAM 0x%x",
BAM_ID(dev));
return SPS_BAM_PIPE_INVALID;
}
} else {
/* Check that client-specified pipe is available */
if (pipe_index >= dev->props.num_pipes) {
- SPS_ERR("Invalid pipe %d for allocate on BAM 0x%x",
+ SPS_ERR("sps:Invalid pipe %d for allocate on BAM 0x%x",
pipe_index, BAM_ID(dev));
return SPS_BAM_PIPE_INVALID;
}
if ((dev->props.restricted_pipes & (1UL << pipe_index))) {
- SPS_ERR("BAM 0x%x pipe %d is not local",
+ SPS_ERR("sps:BAM 0x%x pipe %d is not local",
BAM_ID(dev), pipe_index);
return SPS_BAM_PIPE_INVALID;
}
if (dev->pipes[pipe_index] != NULL) {
- SPS_ERR("Pipe %d already allocated on BAM 0x%x",
+ SPS_ERR("sps:Pipe %d already allocated on BAM 0x%x",
pipe_index, BAM_ID(dev));
return SPS_BAM_PIPE_INVALID;
}
@@ -609,7 +619,8 @@
struct sps_pipe *pipe;
if (pipe_index >= dev->props.num_pipes) {
- SPS_ERR("Invalid BAM 0x%x pipe: %d", BAM_ID(dev), pipe_index);
+ SPS_ERR("sps:Invalid BAM 0x%x pipe: %d", BAM_ID(dev),
+ pipe_index);
return;
}
@@ -619,8 +630,8 @@
/* Is the pipe currently allocated? */
if (pipe == NULL) {
- SPS_ERR("Attempt to free unallocated pipe %d on BAM 0x%x",
- pipe_index, BAM_ID(dev));
+ SPS_ERR("sps:Attempt to free unallocated pipe %d on "
+ "BAM 0x%x", pipe_index, BAM_ID(dev));
return;
}
@@ -631,7 +642,7 @@
if (!list_empty(&pipe->sys.events_q)) {
struct sps_q_event *sps_event;
- SPS_ERR("Disconnect BAM 0x%x pipe %d with events pending",
+ SPS_ERR("sps:Disconnect BAM 0x%x pipe %d with events pending",
BAM_ID(dev), pipe_index);
sps_event = list_entry((&pipe->sys.events_q)->next,
@@ -695,7 +706,8 @@
dev = map_pipe->bam;
pipe_index = map_pipe->pipe_index;
if (pipe_index >= dev->props.num_pipes) {
- SPS_ERR("Invalid BAM 0x%x pipe: %d", BAM_ID(dev), pipe_index);
+ SPS_ERR("sps:Invalid BAM 0x%x pipe: %d", BAM_ID(dev),
+ pipe_index);
return SPS_ERROR;
}
hw_params.event_threshold = (u16) map_pipe->event_threshold;
@@ -704,14 +716,14 @@
/* Verify that control of this pipe is allowed */
if ((dev->props.manage & SPS_BAM_MGR_PIPE_NO_CTRL) ||
(dev->props.restricted_pipes & (1UL << pipe_index))) {
- SPS_ERR("BAM 0x%x pipe %d is not local",
+ SPS_ERR("sps:BAM 0x%x pipe %d is not local",
BAM_ID(dev), pipe_index);
return SPS_ERROR;
}
/* Control without configuration permission is not supported yet */
if ((dev->props.manage & SPS_BAM_MGR_PIPE_NO_CONFIG)) {
- SPS_ERR("BAM 0x%x pipe %d remote config is not supported",
+ SPS_ERR("sps:BAM 0x%x pipe %d remote config is not supported",
BAM_ID(dev), pipe_index);
return SPS_ERROR;
}
@@ -729,8 +741,8 @@
if (map->desc.phys_base == SPS_ADDR_INVALID ||
map->data.phys_base == SPS_ADDR_INVALID ||
map->desc.size == 0 || map->data.size == 0) {
- SPS_ERR("FIFO buffers are not allocated for BAM 0x%x "
- "pipe %d", BAM_ID(dev), pipe_index);
+ SPS_ERR("sps:FIFO buffers are not allocated for BAM "
+ "0x%x pipe %d.", BAM_ID(dev), pipe_index);
return SPS_ERROR;
}
hw_params.data_base = map->data.phys_base;
@@ -754,7 +766,7 @@
/* Get virtual address for descriptor FIFO */
if (map->desc.phys_base != SPS_ADDR_INVALID) {
if (map->desc.size < (2 * sizeof(struct sps_iovec))) {
- SPS_ERR("Invalid descriptor FIFO size "
+ SPS_ERR("sps:Invalid descriptor FIFO size "
"for BAM 0x%x pipe %d: %d",
BAM_ID(dev), pipe_index, map->desc.size);
return SPS_ERROR;
@@ -788,19 +800,19 @@
/* Check pipe allocation */
if (dev->pipes[pipe_index] != BAM_PIPE_UNASSIGNED) {
- SPS_ERR("Invalid pipe %d on BAM 0x%x for connect",
+ SPS_ERR("sps:Invalid pipe %d on BAM 0x%x for connect",
pipe_index, BAM_ID(dev));
goto exit_err;
}
if (bam_pipe_is_enabled(dev->base, pipe_index)) {
- SPS_ERR("BAM 0x%x pipe %d sharing violation",
+ SPS_ERR("sps:BAM 0x%x pipe %d sharing violation",
BAM_ID(dev), pipe_index);
goto exit_err;
}
if (bam_pipe_init(dev->base, pipe_index, &hw_params, dev->props.ee)) {
- SPS_ERR("BAM 0x%x pipe %d init error",
+ SPS_ERR("sps:BAM 0x%x pipe %d init error",
BAM_ID(dev), pipe_index);
goto exit_err;
}
@@ -870,7 +882,8 @@
int result;
if (pipe_index >= dev->props.num_pipes) {
- SPS_ERR("Invalid BAM 0x%x pipe: %d", BAM_ID(dev), pipe_index);
+ SPS_ERR("sps:Invalid BAM 0x%x pipe: %d", BAM_ID(dev),
+ pipe_index);
return SPS_ERROR;
}
@@ -895,7 +908,7 @@
}
if (result)
- SPS_ERR("BAM 0x%x pipe %d already disconnected",
+ SPS_ERR("sps:BAM 0x%x pipe %d already disconnected",
BAM_ID(dev), pipe_index);
return result;
@@ -938,7 +951,7 @@
irq_enable = BAM_DISABLE;
pipe->polled = true;
if (poll == 0 && pipe->irq_mask)
- SPS_INFO("BAM 0x%x pipe %d forced to use polling",
+ SPS_DBG2("sps:BAM 0x%x pipe %d forced to use polling",
BAM_ID(dev), pipe_index);
}
if ((pipe->state & BAM_STATE_MTI) == 0)
@@ -984,7 +997,7 @@
if (pipe->sys.desc_wr_count > 0 &&
(no_queue != pipe->sys.no_queue
|| ack_xfers != pipe->sys.ack_xfers)) {
- SPS_ERR("Queue/ack mode change after transfer: "
+ SPS_ERR("sps:Queue/ack mode change after transfer: "
"BAM 0x%x pipe %d opt 0x%x",
BAM_ID(dev), pipe_index, options);
return SPS_ERROR;
@@ -994,7 +1007,7 @@
/* Is client setting invalid options for a BAM-to-BAM connection? */
if ((pipe->state & BAM_STATE_BAM2BAM) &&
(options & BAM2BAM_O_INVALID)) {
- SPS_ERR("Invalid option for BAM-to-BAM: BAM 0x%x pipe %d "
+ SPS_ERR("sps:Invalid option for BAM-to-BAM: BAM 0x%x pipe %d "
"opt 0x%x", BAM_ID(dev), pipe_index, options);
return SPS_ERROR;
}
@@ -1008,7 +1021,7 @@
kzalloc(pipe->desc_size + size, GFP_KERNEL);
if (pipe->sys.desc_cache == NULL) {
/*** MUST BE LAST POINT OF FAILURE (see below) *****/
- SPS_ERR("Desc cache error: BAM 0x%x pipe %d: %d",
+ SPS_ERR("sps:Desc cache error: BAM 0x%x pipe %d: %d",
BAM_ID(dev), pipe_index,
pipe->desc_size + size);
return SPS_ERROR;
@@ -1079,7 +1092,7 @@
if (pipe->sys.no_queue && reg->xfer_done != NULL &&
reg->mode != SPS_TRIGGER_CALLBACK) {
- SPS_ERR("Only callback events support for NO_Q: "
+ SPS_ERR("sps:Only callback events support for NO_Q: "
"BAM 0x%x pipe %d mode %d",
BAM_ID(dev), pipe_index, reg->mode);
return SPS_ERROR;
@@ -1094,7 +1107,7 @@
index = SPS_EVENT_INDEX(opt_event_table[n].event_id);
if (index < 0)
- SPS_ERR("Negative event index: "
+ SPS_ERR("sps:Negative event index: "
"BAM 0x%x pipe %d mode %d",
BAM_ID(dev), pipe_index, reg->mode);
else {
@@ -1124,7 +1137,7 @@
/* Is this a BAM-to-BAM or satellite connection? */
if ((pipe->state & (BAM_STATE_BAM2BAM | BAM_STATE_REMOTE))) {
- SPS_ERR("Transfer on BAM-to-BAM: BAM 0x%x pipe %d",
+ SPS_ERR("sps:Transfer on BAM-to-BAM: BAM 0x%x pipe %d",
BAM_ID(dev), pipe_index);
return SPS_ERROR;
}
@@ -1134,7 +1147,7 @@
* SPS_O_NO_Q option.
*/
if (pipe->sys.no_queue && user != NULL) {
- SPS_ERR("User pointer arg non-NULL: BAM 0x%x pipe %d",
+ SPS_ERR("sps:User pointer arg non-NULL: BAM 0x%x pipe %d",
BAM_ID(dev), pipe_index);
return SPS_ERROR;
}
@@ -1153,13 +1166,13 @@
if (!pipe->sys.ack_xfers && pipe->polled) {
pipe_handler_eot(dev, pipe);
if (next_write == pipe->sys.acked_offset) {
- SPS_DBG("Descriptor FIFO is full for "
- "BAM 0x%x pipe %d",
+ SPS_DBG2("sps:Descriptor FIFO is full for BAM "
+ "0x%x pipe %d after pipe_handler_eot",
BAM_ID(dev), pipe_index);
return SPS_ERROR;
}
} else {
- SPS_DBG("Descriptor FIFO is full for "
+ SPS_DBG2("sps:Descriptor FIFO is full for "
"BAM 0x%x pipe %d", BAM_ID(dev), pipe_index);
return SPS_ERROR;
}
@@ -1236,14 +1249,14 @@
int result;
if (transfer->iovec_count == 0) {
- SPS_ERR("iovec count zero: BAM 0x%x pipe %d",
+ SPS_ERR("sps:iovec count zero: BAM 0x%x pipe %d",
BAM_ID(dev), pipe_index);
return SPS_ERROR;
}
sps_bam_get_free_count(dev, pipe_index, &count);
if (count < transfer->iovec_count) {
- SPS_ERR("Insufficient free desc: BAM 0x%x pipe %d: %d",
+ SPS_ERR("sps:Insufficient free desc: BAM 0x%x pipe %d: %d",
BAM_ID(dev), pipe_index, count);
return SPS_ERROR;
}
@@ -1669,7 +1682,7 @@
struct sps_q_event *event_queue;
if (pipe->sys.no_queue) {
- SPS_ERR("Invalid connection for event: "
+ SPS_ERR("sps:Invalid connection for event: "
"BAM 0x%x pipe %d context 0x%x",
BAM_ID(dev), pipe_index, (u32) pipe);
notify->event_id = SPS_EVENT_INVALID;
@@ -1774,7 +1787,7 @@
/* Is this a satellite connection? */
if ((pipe->state & BAM_STATE_REMOTE)) {
- SPS_ERR("Is empty on remote: BAM 0x%x pipe %d",
+ SPS_ERR("sps:Is empty on remote: BAM 0x%x pipe %d",
BAM_ID(dev), pipe_index);
return SPS_ERROR;
}
@@ -1813,8 +1826,8 @@
/* Is this a BAM-to-BAM or satellite connection? */
if ((pipe->state & (BAM_STATE_BAM2BAM | BAM_STATE_REMOTE))) {
- SPS_ERR("Free count on BAM-to-BAM or remote: BAM 0x%x pipe %d",
- BAM_ID(dev), pipe_index);
+ SPS_ERR("sps:Free count on BAM-to-BAM or remote: BAM "
+ "0x%x pipe %d", BAM_ID(dev), pipe_index);
*count = 0;
return SPS_ERROR;
}
@@ -1849,14 +1862,14 @@
*/
if ((dev->props.manage & SPS_BAM_MGR_MULTI_EE) == 0 ||
(dev->props.manage & SPS_BAM_MGR_DEVICE_REMOTE)) {
- SPS_ERR("Cannot grant satellite control to BAM 0x%x pipe %d",
- BAM_ID(dev), pipe_index);
+ SPS_ERR("sps:Cannot grant satellite control to BAM 0x%x "
+ "pipe %d", BAM_ID(dev), pipe_index);
return SPS_ERROR;
}
/* Is this pipe locally controlled? */
if ((dev->pipe_active_mask & (1UL << pipe_index)) == 0) {
- SPS_ERR("BAM 0x%x pipe %d not local and active",
+ SPS_ERR("sps:BAM 0x%x pipe %d not local and active",
BAM_ID(dev), pipe_index);
return SPS_ERROR;
}
@@ -1904,7 +1917,7 @@
/* Is this pipe locally controlled? */
if ((dev->pipe_active_mask & (1UL << pipe_index)) == 0) {
- SPS_ERR("BAM 0x%x pipe %d not local and active",
+ SPS_ERR("sps:BAM 0x%x pipe %d not local and active",
BAM_ID(dev), pipe_index);
return SPS_ERROR;
}
diff --git a/drivers/platform/msm/sps/sps_bam.h b/drivers/platform/msm/sps/sps_bam.h
index 3af891e..70e7898 100644
--- a/drivers/platform/msm/sps/sps_bam.h
+++ b/drivers/platform/msm/sps/sps_bam.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -26,7 +26,6 @@
#include "spsi.h"
-#define BAM_MAX_PIPES 31
#define BAM_HANDLE_INVALID 0
enum bam_irq {
diff --git a/drivers/platform/msm/sps/sps_dma.c b/drivers/platform/msm/sps/sps_dma.c
index 48c7ffd..bfb5981 100644
--- a/drivers/platform/msm/sps/sps_dma.c
+++ b/drivers/platform/msm/sps/sps_dma.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -65,7 +65,7 @@
static inline void dma_write_reg(void *base, u32 offset, u32 val)
{
iowrite32(val, base + offset);
- SPS_DBG("bamdma: write reg 0x%x w_val 0x%x.", offset, val);
+ SPS_DBG("sps:bamdma: write reg 0x%x w_val 0x%x.", offset, val);
}
/**
@@ -86,7 +86,7 @@
tmp &= ~mask; /* clear written bits */
val = tmp | (val << shift);
iowrite32(val, base + offset);
- SPS_DBG("bamdma: write reg 0x%x w_val 0x%x.", offset, val);
+ SPS_DBG("sps:bamdma: write reg 0x%x w_val 0x%x.", offset, val);
}
/* Round max number of pipes to nearest multiple of 2 */
@@ -210,7 +210,8 @@
/* Enable BAM device */
if (sps_bam_enable(dev->bam)) {
- SPS_ERR("Failed to enable BAM DMA's BAM: %x", dev->phys_addr);
+ SPS_ERR("sps:Failed to enable BAM DMA's BAM: %x",
+ dev->phys_addr);
return SPS_ERROR;
}
@@ -243,7 +244,7 @@
}
if (pipe_index < dev->num_pipes) {
- SPS_ERR("Failed to disable BAM-DMA %x: channels are active",
+ SPS_ERR("sps:Fail to disable BAM-DMA %x:channels are active",
dev->phys_addr);
return SPS_ERROR;
}
@@ -252,7 +253,7 @@
/* Disable BAM device */
if (sps_bam_disable(dev->bam)) {
- SPS_ERR("Failed to disable BAM-DMA %x BAM", dev->phys_addr);
+ SPS_ERR("sps:Fail to disable BAM-DMA BAM:%x", dev->phys_addr);
return SPS_ERROR;
}
@@ -280,7 +281,7 @@
/* Find a free BAM-DMA device slot */
dev = NULL;
if (bam_dma_dev[0].bam != NULL) {
- SPS_ERR("BAM-DMA BAM device already initialized.");
+ SPS_ERR("sps:BAM-DMA BAM device is already initialized.");
goto exit_err;
} else {
dev = &bam_dma_dev[0];
@@ -292,7 +293,8 @@
dev->bam = sps_h2bam(h);
if (dev->bam == NULL) {
- SPS_ERR("BAM-DMA BAM device is not found from the handle.");
+ SPS_ERR("sps:BAM-DMA BAM device is not found "
+ "from the handle.");
goto exit_err;
}
@@ -304,7 +306,7 @@
dev->virtual_mapped = false;
} else {
if (props->periph_virt_size == 0) {
- SPS_ERR("Unable to map BAM DMA IO memory: %x %x",
+ SPS_ERR("sps:Unable to map BAM DMA IO memory: %x %x",
dev->phys_addr, props->periph_virt_size);
goto exit_err;
}
@@ -312,7 +314,7 @@
dev->virt_addr = ioremap(dev->phys_addr,
props->periph_virt_size);
if (dev->virt_addr == NULL) {
- SPS_ERR("Unable to map BAM DMA IO memory: %x %x",
+ SPS_ERR("sps:Unable to map BAM DMA IO memory: %x %x",
dev->phys_addr, props->periph_virt_size);
goto exit_err;
}
@@ -322,11 +324,11 @@
/* Is the BAM-DMA device locally controlled? */
if ((props->manage & SPS_BAM_MGR_DEVICE_REMOTE) == 0) {
- SPS_DBG("BAM-DMA is controlled locally: %x",
+ SPS_DBG2("sps:BAM-DMA is controlled locally: %x",
dev->phys_addr);
dev->local = true;
} else {
- SPS_DBG("BAM-DMA is controlled remotely: %x",
+ SPS_DBG2("sps:BAM-DMA is controlled remotely: %x",
dev->phys_addr);
dev->local = false;
}
@@ -379,7 +381,7 @@
dev = sps_dma_find_device(h);
if (dev == NULL) {
- SPS_ERR("BAM-DMA: not registered: %x", h);
+ SPS_ERR("sps:BAM-DMA: not registered: %x", h);
result = SPS_ERROR;
goto exit_err;
}
@@ -387,14 +389,15 @@
/* Check for channel leaks */
for (chan = 0; chan < dev->num_pipes / 2; chan++) {
if (dev->chans[chan].state != DMA_CHAN_STATE_FREE) {
- SPS_ERR("BAM-DMA: channel not free: %d", chan);
+ SPS_ERR("sps:BAM-DMA: channel not free: %d", chan);
result = SPS_ERROR;
dev->chans[chan].state = DMA_CHAN_STATE_FREE;
}
}
for (pipe_index = 0; pipe_index < dev->num_pipes; pipe_index++) {
if (dev->pipes[pipe_index] != PIPE_INACTIVE) {
- SPS_ERR("BAM-DMA: pipe not inactive: %d", pipe_index);
+ SPS_ERR("sps:BAM-DMA: pipe not inactive: %d",
+ pipe_index);
result = SPS_ERROR;
dev->pipes[pipe_index] = PIPE_INACTIVE;
}
@@ -446,7 +449,7 @@
bam_reg = bam_props;
if ((bam_props->options & SPS_BAM_OPT_BAMDMA) &&
(bam_props->manage & SPS_BAM_MGR_MULTI_EE) == 0) {
- SPS_DBG("Setting multi-EE options for BAM-DMA: %x",
+ SPS_DBG("sps:Setting multi-EE options for BAM-DMA: %x",
bam_props->phys_addr);
props = *bam_props;
props.manage |= SPS_BAM_MGR_MULTI_EE;
@@ -455,7 +458,7 @@
/* Register the BAM */
if (sps_register_bam_device(bam_reg, &h)) {
- SPS_ERR("Failed to register BAM-DMA BAM device: "
+ SPS_ERR("sps:Fail to register BAM-DMA BAM device: "
"phys 0x%0x", bam_props->phys_addr);
return SPS_ERROR;
}
@@ -465,11 +468,12 @@
bam_handles[num_bams] = h;
num_bams++;
} else {
- SPS_ERR("BAM-DMA: BAM limit exceeded: %d", num_bams);
+ SPS_ERR("sps:BAM-DMA: BAM limit exceeded: %d",
+ num_bams);
return SPS_ERROR;
}
} else {
- SPS_ERR("BAM-DMA phys_addr is zero.");
+ SPS_ERR("sps:BAM-DMA phys_addr is zero.");
return SPS_ERROR;
}
@@ -510,7 +514,7 @@
int result = SPS_ERROR;
if (alloc == NULL || chan_info == NULL) {
- SPS_ERR("sps_alloc_dma_chan. invalid parameters");
+ SPS_ERR("sps:sps_alloc_dma_chan. invalid parameters");
return SPS_ERROR;
}
@@ -529,7 +533,7 @@
weight = alloc->priority;
if ((u32)alloc->priority > (u32)BAM_DMA_WEIGHT_HIGH) {
- SPS_ERR("BAM-DMA: invalid priority: %x", alloc->priority);
+ SPS_ERR("sps:BAM-DMA: invalid priority: %x", alloc->priority);
return SPS_ERROR;
}
@@ -537,7 +541,7 @@
dev = sps_dma_find_device(alloc->dev);
if (dev == NULL) {
- SPS_ERR("BAM-DMA: invalid BAM handle: %x", alloc->dev);
+ SPS_ERR("sps:BAM-DMA: invalid BAM handle: %x", alloc->dev);
goto exit_err;
}
@@ -548,7 +552,8 @@
/* Just check pipes for safety */
if (dev->pipes[pipe_index] != PIPE_INACTIVE ||
dev->pipes[pipe_index + 1] != PIPE_INACTIVE) {
- SPS_ERR("BAM-DMA: channel %d state error:%d %d",
+ SPS_ERR("sps:BAM-DMA: channel %d state "
+ "error:%d %d",
pipe_index / 2, dev->pipes[pipe_index],
dev->pipes[pipe_index + 1]);
goto exit_err;
@@ -558,7 +563,7 @@
}
if (pipe_index >= dev->num_pipes) {
- SPS_ERR("BAM-DMA: no free channel. num_pipes = %d",
+ SPS_ERR("sps:BAM-DMA: no free channel. num_pipes = %d",
dev->num_pipes);
goto exit_err;
}
@@ -572,7 +577,7 @@
chan->priority = alloc->priority;
chan->weight = weight;
- SPS_DBG("sps_alloc_dma_chan. pipe %d.\n", pipe_index);
+ SPS_DBG2("sps:sps_alloc_dma_chan. pipe %d.\n", pipe_index);
/* Report allocated pipes to client */
chan_info->dev = dev->h;
@@ -600,7 +605,7 @@
int result = 0;
if (chan == NULL) {
- SPS_ERR("sps_free_dma_chan. chan is NULL");
+ SPS_ERR("sps:sps_free_dma_chan. chan is NULL");
return SPS_ERROR;
}
@@ -608,7 +613,7 @@
dev = sps_dma_find_device(chan->dev);
if (dev == NULL) {
- SPS_ERR("BAM-DMA: invalid BAM handle: %x", chan->dev);
+ SPS_ERR("sps:BAM-DMA: invalid BAM handle: %x", chan->dev);
result = SPS_ERROR;
goto exit_err;
}
@@ -617,8 +622,8 @@
pipe_index = chan->dest_pipe_index;
if (pipe_index >= dev->num_pipes || ((pipe_index & 1)) ||
(pipe_index + 1) != chan->src_pipe_index) {
- SPS_ERR("sps_free_dma_chan. Invalid pipe indices");
- SPS_DBG("num_pipes=%d.dest=%d.src=%d.",
+ SPS_ERR("sps:sps_free_dma_chan. Invalid pipe indices."
+ "num_pipes=%d.dest=%d.src=%d.",
dev->num_pipes,
chan->dest_pipe_index,
chan->src_pipe_index);
@@ -630,7 +635,7 @@
if (dev->chans[pipe_index / 2].state != DMA_CHAN_STATE_ALLOC_EXT ||
dev->pipes[pipe_index] != PIPE_INACTIVE ||
dev->pipes[pipe_index + 1] != PIPE_INACTIVE) {
- SPS_ERR("BAM-DMA: attempt to free active chan %d: %d %d",
+ SPS_ERR("sps:BAM-DMA: attempt to free active chan %d: %d %d",
pipe_index / 2, dev->pipes[pipe_index],
dev->pipes[pipe_index + 1]);
result = SPS_ERROR;
@@ -695,14 +700,14 @@
int result = SPS_ERROR;
if (bam == NULL) {
- SPS_ERR("BAM context is NULL");
+ SPS_ERR("sps:BAM context is NULL");
return SPS_ERROR;
}
/* Check pipe direction */
if ((DMA_PIPE_IS_DEST(pipe_index) && dir != SPS_MODE_DEST) ||
(DMA_PIPE_IS_SRC(pipe_index) && dir != SPS_MODE_SRC)) {
- SPS_ERR("BAM-DMA: wrong direction for BAM %x pipe %d",
+ SPS_ERR("sps:BAM-DMA: wrong direction for BAM %x pipe %d",
bam->props.phys_addr, pipe_index);
return SPS_ERROR;
}
@@ -711,17 +716,17 @@
dev = sps_dma_find_device((u32) bam);
if (dev == NULL) {
- SPS_ERR("BAM-DMA: invalid BAM: %x",
+ SPS_ERR("sps:BAM-DMA: invalid BAM: %x",
bam->props.phys_addr);
goto exit_err;
}
if (pipe_index >= dev->num_pipes) {
- SPS_ERR("BAM-DMA: BAM %x invalid pipe: %d",
+ SPS_ERR("sps:BAM-DMA: BAM %x invalid pipe: %d",
bam->props.phys_addr, pipe_index);
goto exit_err;
}
if (dev->pipes[pipe_index] != PIPE_INACTIVE) {
- SPS_ERR("BAM-DMA: BAM %x pipe %d already active",
+ SPS_ERR("sps:BAM-DMA: BAM %x pipe %d already active",
bam->props.phys_addr, pipe_index);
goto exit_err;
}
@@ -756,22 +761,22 @@
u32 channel;
int result = SPS_ERROR;
- SPS_DBG("sps_dma_pipe_enable.pipe %d", pipe_index);
+ SPS_DBG2("sps:sps_dma_pipe_enable.pipe %d", pipe_index);
mutex_lock(&bam_dma_lock);
dev = sps_dma_find_device((u32) bam);
if (dev == NULL) {
- SPS_ERR("BAM-DMA: invalid BAM");
+ SPS_ERR("sps:BAM-DMA: invalid BAM");
goto exit_err;
}
if (pipe_index >= dev->num_pipes) {
- SPS_ERR("BAM-DMA: BAM %x invalid pipe: %d",
+ SPS_ERR("sps:BAM-DMA: BAM %x invalid pipe: %d",
bam->props.phys_addr, pipe_index);
goto exit_err;
}
if (dev->pipes[pipe_index] != PIPE_ACTIVE) {
- SPS_ERR("BAM-DMA: BAM %x pipe %d not active",
+ SPS_ERR("sps:BAM-DMA: BAM %x pipe %d not active",
bam->props.phys_addr, pipe_index);
goto exit_err;
}
@@ -836,7 +841,7 @@
if (dev->pipes[pipe_index] != PIPE_ACTIVE)
return SPS_ERROR; /* Pipe is not active */
- SPS_DBG("BAM-DMA: deactivate pipe %d", pipe_index);
+ SPS_DBG2("sps:BAM-DMA: deactivate pipe %d", pipe_index);
/* Mark pipe inactive */
dev->pipes[pipe_index] = PIPE_INACTIVE;
@@ -873,7 +878,7 @@
dev = sps_dma_find_device((u32) bam);
if (dev == NULL) {
- SPS_ERR("BAM-DMA: invalid BAM");
+ SPS_ERR("sps:BAM-DMA: invalid BAM");
result = SPS_ERROR;
goto exit_err;
}
diff --git a/drivers/platform/msm/sps/sps_map.c b/drivers/platform/msm/sps/sps_map.c
index 16d5065..d98a8b1 100644
--- a/drivers/platform/msm/sps/sps_map.c
+++ b/drivers/platform/msm/sps/sps_map.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -50,7 +50,7 @@
maps->src.periph_phy_addr == SPS_ADDR_INVALID)
break;
- SPS_DBG("SPS driver: %d mappings", sps_maps.num_maps);
+ SPS_DBG("sps: %d mappings", sps_maps.num_maps);
return 0;
}
@@ -96,7 +96,7 @@
*/
desc = spsi_get_mem_ptr(map->desc_base);
if (desc == NULL) {
- SPS_ERR("Cannot get virt addr for I/O buffer: 0x%x",
+ SPS_ERR("sps:Cannot get virt addr for I/O buffer: 0x%x",
map->desc_base);
return SPS_ERROR;
}
@@ -104,7 +104,7 @@
if (map->data_size > 0 && map->data_base != SPS_ADDR_INVALID) {
data = spsi_get_mem_ptr(map->data_base);
if (data == NULL) {
- SPS_ERR("Cannot get virt addr for I/O buffer: 0x%x",
+ SPS_ERR("sps:Can't get virt addr for I/O buffer: 0x%x",
map->data_base);
return SPS_ERROR;
}
diff --git a/drivers/platform/msm/sps/sps_mem.c b/drivers/platform/msm/sps/sps_mem.c
index 358dbd3..1b19b12 100644
--- a/drivers/platform/msm/sps/sps_mem.c
+++ b/drivers/platform/msm/sps/sps_mem.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -74,7 +74,7 @@
return SPS_ADDR_INVALID;
}
- SPS_DBG("sps:sps_mem_alloc_io.phys=0x%x.virt=0x%x.size=0x%x.",
+ SPS_DBG2("sps:sps_mem_alloc_io.phys=0x%x.virt=0x%x.size=0x%x.",
phys_addr, virt_addr, bytes);
return phys_addr;
@@ -91,7 +91,7 @@
iomem_offset = phys_addr - iomem_phys;
virt_addr = (u32) iomem_virt + iomem_offset;
- SPS_DBG("sps:sps_mem_free_io.phys=0x%x.virt=0x%x.size=0x%x.",
+ SPS_DBG2("sps:sps_mem_free_io.phys=0x%x.virt=0x%x.size=0x%x.",
phys_addr, virt_addr, bytes);
gen_pool_free(pool, virt_addr, bytes);
diff --git a/drivers/platform/msm/sps/sps_rm.c b/drivers/platform/msm/sps/sps_rm.c
index ac1f4d1..75194e0 100644
--- a/drivers/platform/msm/sps/sps_rm.c
+++ b/drivers/platform/msm/sps/sps_rm.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -70,7 +70,7 @@
map->refs--;
if (map->refs <= 0) {
if (map->client_src != NULL || map->client_dest != NULL)
- SPS_ERR("Failed to allocate connection struct");
+ SPS_ERR("sps:Failed to allocate connection struct");
list_del(&map->list);
kfree(map);
@@ -179,14 +179,17 @@
/* Check ownership and BAM */
if ((cfg->mode == SPS_MODE_SRC && map->client_src != NULL) ||
- (cfg->mode != SPS_MODE_SRC && map->client_dest != NULL))
- /* The end point is already connected */
+ (cfg->mode != SPS_MODE_SRC && map->client_dest != NULL)) {
+ SPS_ERR("sps:The end point is already connected.\n");
return SPS_ERROR;
+ }
/* Check whether this end point is a BAM (not memory) */
if ((cfg->mode == SPS_MODE_SRC && map->src.bam == NULL) ||
- (cfg->mode != SPS_MODE_SRC && map->dest.bam == NULL))
+ (cfg->mode != SPS_MODE_SRC && map->dest.bam == NULL)) {
+ SPS_ERR("sps:The end point is empty.\n");
return SPS_ERROR;
+ }
/* Record the connection assignment */
if (cfg->mode == SPS_MODE_SRC) {
@@ -355,7 +358,7 @@
/* Allocate new connection */
map = kzalloc(sizeof(*map), GFP_KERNEL);
if (map == NULL) {
- SPS_ERR("Failed to allocate connection struct");
+ SPS_ERR("sps:Failed to allocate connection struct");
return NULL;
}
@@ -369,7 +372,7 @@
map->src.bam = sps_h2bam(map->src.dev);
if (map->src.bam == NULL) {
if (map->src.dev != SPS_DEV_HANDLE_MEM) {
- SPS_ERR("Invalid BAM handle: 0x%x", map->src.dev);
+ SPS_ERR("sps:Invalid BAM handle: 0x%x", map->src.dev);
goto exit_err;
}
map->src.pipe_index = SPS_BAM_PIPE_INVALID;
@@ -377,7 +380,7 @@
map->dest.bam = sps_h2bam(map->dest.dev);
if (map->dest.bam == NULL) {
if (map->dest.dev != SPS_DEV_HANDLE_MEM) {
- SPS_ERR("Invalid BAM handle: 0x%x", map->dest.dev);
+ SPS_ERR("sps:Invalid BAM handle: 0x%x", map->dest.dev);
goto exit_err;
}
map->dest.pipe_index = SPS_BAM_PIPE_INVALID;
@@ -386,7 +389,7 @@
/* Check the BAM device for the pipe */
if ((dir == SPS_MODE_SRC && map->src.bam == NULL) ||
(dir != SPS_MODE_SRC && map->dest.bam == NULL)) {
- SPS_ERR("Invalid BAM endpt: dir %d src 0x%x dest 0x%x",
+ SPS_ERR("sps:Invalid BAM endpt: dir %d src 0x%x dest 0x%x",
dir, map->src.dev, map->dest.dev);
goto exit_err;
}
@@ -409,7 +412,7 @@
rc = sps_dma_pipe_alloc(bam, map->src.pipe_index,
SPS_MODE_SRC);
if (rc) {
- SPS_ERR("Failed to alloc BAM-DMA pipe: %d",
+ SPS_ERR("sps:Failed to alloc BAM-DMA pipe: %d",
map->src.pipe_index);
goto exit_err;
}
@@ -436,7 +439,7 @@
rc = sps_dma_pipe_alloc(bam, map->dest.pipe_index,
SPS_MODE_DEST);
if (rc) {
- SPS_ERR("Failed to alloc BAM-DMA pipe: %d",
+ SPS_ERR("sps:Failed to alloc BAM-DMA pipe: %d",
map->dest.pipe_index);
goto exit_err;
}
@@ -474,12 +477,12 @@
map->data.size = 0;
}
if (map->desc.size > SPSRM_MAX_DESC_FIFO_SIZE) {
- SPS_ERR("Invalid desc FIFO size: 0x%x", map->desc.size);
+ SPS_ERR("sps:Invalid desc FIFO size: 0x%x", map->desc.size);
goto exit_err;
}
if (map->src.bam != NULL && map->dest.bam != NULL &&
map->data.size > SPSRM_MAX_DATA_FIFO_SIZE) {
- SPS_ERR("Invalid data FIFO size: 0x%x", map->data.size);
+ SPS_ERR("sps:Invalid data FIFO size: 0x%x", map->data.size);
goto exit_err;
}
@@ -487,14 +490,14 @@
if (map->desc.size && map->desc.phys_base == SPS_ADDR_INVALID) {
map->alloc_desc_base = sps_mem_alloc_io(map->desc.size);
if (map->alloc_desc_base == SPS_ADDR_INVALID) {
- SPS_ERR("I/O memory allocation failure: 0x%x",
+ SPS_ERR("sps:I/O memory allocation failure:0x%x",
map->desc.size);
goto exit_err;
}
map->desc.phys_base = map->alloc_desc_base;
map->desc.base = spsi_get_mem_ptr(map->desc.phys_base);
if (map->desc.base == NULL) {
- SPS_ERR("Cannot get virt addr for I/O buffer: 0x%x",
+ SPS_ERR("sps:Cannot get virt addr for I/O buffer:0x%x",
map->desc.phys_base);
goto exit_err;
}
@@ -504,22 +507,24 @@
if (map->data.size && map->data.phys_base == SPS_ADDR_INVALID) {
map->alloc_data_base = sps_mem_alloc_io(map->data.size);
if (map->alloc_data_base == SPS_ADDR_INVALID) {
- SPS_ERR("I/O memory allocation failure: 0x%x",
+ SPS_ERR("sps:I/O memory allocation failure:0x%x",
map->data.size);
goto exit_err;
}
map->data.phys_base = map->alloc_data_base;
map->data.base = spsi_get_mem_ptr(map->data.phys_base);
if (map->data.base == NULL) {
- SPS_ERR("Cannot get virt addr for I/O buffer: 0x%x",
+ SPS_ERR("sps:Cannot get virt addr for I/O buffer:0x%x",
map->data.phys_base);
goto exit_err;
}
}
/* Attempt to assign this connection to the client */
- if (sps_rm_assign(pipe, map))
+ if (sps_rm_assign(pipe, map)) {
+ SPS_ERR("sps:failed to assign a connection to the client.\n");
goto exit_err;
+ }
/* Initialization was successful */
success = true;
@@ -611,7 +616,7 @@
*/
if (pipe->connect.config != SPS_CONFIG_DEFAULT) {
if (sps_map_find(&pipe->connect)) {
- SPS_ERR("Failed to find connection mapping");
+ SPS_ERR("sps:Failed to find connection mapping");
return SPS_ERROR;
}
}
@@ -619,7 +624,7 @@
mutex_lock(&sps_rm->lock);
/* Check client state */
if (IS_SPS_STATE_OK(pipe)) {
- SPS_ERR("Client connection already allocated");
+ SPS_ERR("sps:Client connection already allocated");
goto exit_err;
}
@@ -636,7 +641,7 @@
if (map == NULL) {
map = sps_rm_create(pipe);
if (map == NULL) {
- SPS_ERR("Failed to allocate connection");
+ SPS_ERR("sps:Failed to allocate connection");
goto exit_err;
}
list_add_tail(&map->list, &sps_rm->connections_q);
@@ -692,8 +697,12 @@
/* Allocate the pipe */
if (pipe->client_state == SPS_STATE_DISCONNECT &&
state == SPS_STATE_ALLOCATE) {
- if (sps_rm_alloc(pipe))
+ if (sps_rm_alloc(pipe)) {
+ SPS_ERR("sps:Fail to allocate resource for"
+ " BAM 0x%x pipe %d",
+ (u32) pipe->bam, pipe->pipe_index);
return SPS_ERROR;
+ }
}
/* Configure the pipe */
@@ -710,7 +719,7 @@
}
result = sps_bam_pipe_connect(pipe, ¶ms);
if (result) {
- SPS_ERR("Failed to connect BAM 0x%x pipe %d",
+ SPS_ERR("sps:Failed to connect BAM 0x%x pipe %d",
(u32) pipe->bam, pipe->pipe_index);
return SPS_ERROR;
}
@@ -733,7 +742,7 @@
|| (pipe->connect.options & SPS_O_AUTO_ENABLE))) {
result = sps_bam_pipe_enable(pipe->bam, pipe->pipe_index);
if (result) {
- SPS_ERR("Failed to set BAM 0x%x pipe %d flow on",
+ SPS_ERR("sps:Failed to set BAM 0x%x pipe %d flow on",
pipe->bam->props.phys_addr,
pipe->pipe_index);
return SPS_ERROR;
@@ -746,8 +755,8 @@
result = sps_dma_pipe_enable(pipe->bam,
pipe->pipe_index);
if (result) {
- SPS_ERR("Failed to activate BAM-DMA pipe: %d",
- pipe->pipe_index);
+ SPS_ERR("sps:Failed to activate BAM-DMA"
+ " pipe: %d", pipe->pipe_index);
return SPS_ERROR;
}
}
@@ -760,7 +769,7 @@
(state == SPS_STATE_DISABLE || state == SPS_STATE_DISCONNECT)) {
result = sps_bam_pipe_disable(pipe->bam, pipe->pipe_index);
if (result) {
- SPS_ERR("Failed to set BAM 0x%x pipe %d flow off",
+ SPS_ERR("sps:Failed to set BAM 0x%x pipe %d flow off",
pipe->bam->props.phys_addr,
pipe->pipe_index);
return SPS_ERROR;
@@ -782,7 +791,7 @@
result = sps_bam_pipe_disconnect(pipe->bam, pipe_index);
if (result) {
- SPS_ERR("Failed to disconnect BAM 0x%x pipe %d",
+ SPS_ERR("sps:Failed to disconnect BAM 0x%x pipe %d",
pipe->bam->props.phys_addr,
pipe->pipe_index);
return SPS_ERROR;
diff --git a/drivers/platform/msm/sps/spsi.h b/drivers/platform/msm/sps/spsi.h
index 4de70ab..4126999 100644
--- a/drivers/platform/msm/sps/spsi.h
+++ b/drivers/platform/msm/sps/spsi.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -21,11 +21,14 @@
#include <linux/list.h> /* list_head */
#include <linux/kernel.h> /* pr_info() */
#include <linux/compiler.h>
+#include <linux/ratelimit.h>
#include <mach/sps.h>
#include "sps_map.h"
+#define BAM_MAX_PIPES 31
+
/* Adjust for offset of struct sps_q_event */
#define SPS_EVENT_INDEX(e) ((e) - 1)
#define SPS_ERROR -1
@@ -34,33 +37,85 @@
#define BAM_ID(dev) ((dev)->props.phys_addr)
#ifdef CONFIG_DEBUG_FS
-extern u32 sps_debugfs_enabled;
-extern u32 detailed_debug_on;
+extern u8 debugfs_record_enabled;
+extern u8 logging_option;
+extern u8 debug_level_option;
+extern u8 print_limit_option;
+
#define MAX_MSG_LEN 80
#define SPS_DEBUGFS(msg, args...) do { \
- char buf[MAX_MSG_LEN]; \
- snprintf(buf, MAX_MSG_LEN, msg"\n", ##args); \
- sps_debugfs_record(buf); \
- } while (0)
+ char buf[MAX_MSG_LEN]; \
+ snprintf(buf, MAX_MSG_LEN, msg"\n", ##args); \
+ sps_debugfs_record(buf); \
+ } while (0)
#define SPS_ERR(msg, args...) do { \
+ if (unlikely(print_limit_option > 2)) \
+ pr_err_ratelimited(msg, ##args); \
+ else \
pr_err(msg, ##args); \
- if (unlikely(sps_debugfs_enabled)) \
- SPS_DEBUGFS(msg, ##args); \
- } while (0)
+ if (unlikely(debugfs_record_enabled)) \
+ SPS_DEBUGFS(msg, ##args); \
+ } while (0)
#define SPS_INFO(msg, args...) do { \
+ if (unlikely(print_limit_option > 1)) \
+ pr_info_ratelimited(msg, ##args); \
+ else \
pr_info(msg, ##args); \
- if (unlikely(sps_debugfs_enabled)) \
- SPS_DEBUGFS(msg, ##args); \
- } while (0)
+ if (unlikely(debugfs_record_enabled)) \
+ SPS_DEBUGFS(msg, ##args); \
+ } while (0)
#define SPS_DBG(msg, args...) do { \
- if (unlikely(detailed_debug_on)) \
- pr_info(msg, ##args); \
+ if ((unlikely(logging_option > 1)) \
+ && (unlikely(debug_level_option > 3))) {\
+ if (unlikely(print_limit_option > 0)) \
+ pr_info_ratelimited(msg, ##args); \
else \
- pr_debug(msg, ##args); \
- if (unlikely(sps_debugfs_enabled)) \
- SPS_DEBUGFS(msg, ##args); \
- } while (0)
+ pr_info(msg, ##args); \
+ } else \
+ pr_debug(msg, ##args); \
+ if (unlikely(debugfs_record_enabled)) \
+ SPS_DEBUGFS(msg, ##args); \
+ } while (0)
+#define SPS_DBG1(msg, args...) do { \
+ if ((unlikely(logging_option > 1)) \
+ && (unlikely(debug_level_option > 2))) {\
+ if (unlikely(print_limit_option > 0)) \
+ pr_info_ratelimited(msg, ##args); \
+ else \
+ pr_info(msg, ##args); \
+ } else \
+ pr_debug(msg, ##args); \
+ if (unlikely(debugfs_record_enabled)) \
+ SPS_DEBUGFS(msg, ##args); \
+ } while (0)
+#define SPS_DBG2(msg, args...) do { \
+ if ((unlikely(logging_option > 1)) \
+ && (unlikely(debug_level_option > 1))) {\
+ if (unlikely(print_limit_option > 0)) \
+ pr_info_ratelimited(msg, ##args); \
+ else \
+ pr_info(msg, ##args); \
+ } else \
+ pr_debug(msg, ##args); \
+ if (unlikely(debugfs_record_enabled)) \
+ SPS_DEBUGFS(msg, ##args); \
+ } while (0)
+#define SPS_DBG3(msg, args...) do { \
+ if ((unlikely(logging_option > 1)) \
+ && (unlikely(debug_level_option > 0))) {\
+ if (unlikely(print_limit_option > 0)) \
+ pr_info_ratelimited(msg, ##args); \
+ else \
+ pr_info(msg, ##args); \
+ } else \
+ pr_debug(msg, ##args); \
+ if (unlikely(debugfs_record_enabled)) \
+ SPS_DEBUGFS(msg, ##args); \
+ } while (0)
#else
+#define SPS_DBG3(x...) pr_debug(x)
+#define SPS_DBG2(x...) pr_debug(x)
+#define SPS_DBG1(x...) pr_debug(x)
#define SPS_DBG(x...) pr_debug(x)
#define SPS_INFO(x...) pr_info(x)
#define SPS_ERR(x...) pr_err(x)
@@ -121,6 +176,18 @@
#ifdef CONFIG_DEBUG_FS
/* record debug info for debugfs */
void sps_debugfs_record(const char *);
+
+/* output the content of BAM-level registers */
+void print_bam_reg(void *);
+
+/* output the content of BAM pipe registers */
+void print_bam_pipe_reg(void *, u32);
+
+/* output the content of selected BAM-level registers */
+void print_bam_selected_reg(void *);
+
+/* output the content of selected BAM pipe registers */
+void print_bam_pipe_selected_reg(void *, u32);
#endif
/**
diff --git a/drivers/power/pm8921-bms.c b/drivers/power/pm8921-bms.c
index 93de829..819aa2e 100644
--- a/drivers/power/pm8921-bms.c
+++ b/drivers/power/pm8921-bms.c
@@ -16,6 +16,7 @@
#include <linux/moduleparam.h>
#include <linux/platform_device.h>
#include <linux/errno.h>
+#include <linux/power_supply.h>
#include <linux/mfd/pm8xxx/pm8921-bms.h>
#include <linux/mfd/pm8xxx/core.h>
#include <linux/mfd/pm8xxx/pm8xxx-adc.h>
@@ -25,10 +26,13 @@
#include <linux/debugfs.h>
#include <linux/slab.h>
#include <linux/delay.h>
+#include <linux/mutex.h>
#define BMS_CONTROL 0x224
+#define BMS_S1_DELAY 0x225
#define BMS_OUTPUT0 0x230
#define BMS_OUTPUT1 0x231
+#define BMS_TOLERANCES 0x232
#define BMS_TEST1 0x237
#define ADC_ARB_SECP_CNTRL 0x190
@@ -87,6 +91,8 @@
struct delayed_work calib_ccadc_work;
unsigned int calib_delay_ms;
unsigned int revision;
+ unsigned int xoadc_v0625_usb_present;
+ unsigned int xoadc_v0625_usb_absent;
unsigned int xoadc_v0625;
unsigned int xoadc_v125;
unsigned int batt_temp_channel;
@@ -96,13 +102,13 @@
unsigned int batt_id_channel;
unsigned int pmic_bms_irq[PM_BMS_MAX_INTS];
DECLARE_BITMAP(enabled_irqs, PM_BMS_MAX_INTS);
- spinlock_t bms_output_lock;
+ struct mutex bms_output_lock;
spinlock_t bms_100_lock;
struct single_row_lut *adjusted_fcc_temp_lut;
unsigned int charging_began;
unsigned int start_percent;
unsigned int end_percent;
-
+ enum battery_type batt_type;
uint16_t ocv_reading_at_100;
int cc_reading_at_100;
int max_voltage_uv;
@@ -114,6 +120,9 @@
#define DEFAULT_OCV_MICROVOLTS 3900000
#define DEFAULT_CHARGE_CYCLES 0
+static int last_usb_cal_delta_uv = 1800;
+module_param(last_usb_cal_delta_uv, int, 0644);
+
static int last_chargecycles = DEFAULT_CHARGE_CYCLES;
static int last_charge_increase;
module_param(last_chargecycles, int, 0644);
@@ -299,6 +308,23 @@
return 0;
}
+static int usb_chg_plugged_in(void)
+{
+ union power_supply_propval ret = {0,};
+ static struct power_supply *psy;
+
+ if (psy == NULL) {
+ psy = power_supply_get_by_name("usb");
+ if (psy == NULL)
+ return 0;
+ }
+
+ if (psy->get_property(psy, POWER_SUPPLY_PROP_ONLINE, &ret))
+ return 0;
+
+ return ret.intval;
+}
+
#define HOLD_OREG_DATA BIT(1)
static int pm_bms_lock_output_data(struct pm8921_bms_chip *chip)
{
@@ -352,14 +378,6 @@
return -EINVAL;
}
- /* make sure the bms registers are locked */
- rc = pm8xxx_readb(chip->dev->parent, BMS_CONTROL, ®);
- if (rc) {
- pr_err("fail to read BMS_OUTPUT0 for type %d rc = %d\n",
- type, rc);
- return rc;
- }
-
rc = pm_bms_masked_write(chip, BMS_CONTROL, SELECT_OUTPUT_DATA,
type << SELECT_OUTPUT_TYPE_SHIFT);
if (rc) {
@@ -401,18 +419,32 @@
#define XOADC_CALIB_UV 625000
#define VBATT_MUL_FACTOR 3
static int adjust_xo_vbatt_reading(struct pm8921_bms_chip *chip,
- unsigned int uv)
+ int usb_chg, unsigned int uv)
{
- u64 numerator, denominator;
+ s64 numerator, denominator;
+ int local_delta;
if (uv == 0)
return 0;
- numerator = ((u64)uv - chip->xoadc_v0625) * XOADC_CALIB_UV;
- denominator = chip->xoadc_v125 - chip->xoadc_v0625;
+ /* dont adjust if not calibrated */
+ if (chip->xoadc_v0625 == 0 || chip->xoadc_v125 == 0) {
+ pr_debug("No cal yet return %d\n", VBATT_MUL_FACTOR * uv);
+ return VBATT_MUL_FACTOR * uv;
+ }
+
+ if (usb_chg)
+ local_delta = last_usb_cal_delta_uv;
+ else
+ local_delta = 0;
+
+ pr_debug("using delta = %d\n", local_delta);
+ numerator = ((s64)uv - chip->xoadc_v0625 - local_delta)
+ * XOADC_CALIB_UV;
+ denominator = (s64)chip->xoadc_v125 - chip->xoadc_v0625 - local_delta;
if (denominator == 0)
return uv * VBATT_MUL_FACTOR;
- return (XOADC_CALIB_UV + div_u64(numerator, denominator))
+ return (XOADC_CALIB_UV + local_delta + div_s64(numerator, denominator))
* VBATT_MUL_FACTOR;
}
@@ -479,11 +511,12 @@
}
static int convert_vbatt_raw_to_uv(struct pm8921_bms_chip *chip,
+ int usb_chg,
uint16_t reading, int *result)
{
*result = xoadc_reading_to_microvolt(reading);
pr_debug("raw = %04x vbatt = %u\n", reading, *result);
- *result = adjust_xo_vbatt_reading(chip, *result);
+ *result = adjust_xo_vbatt_reading(chip, usb_chg, *result);
pr_debug("after adj vbatt = %u\n", *result);
return 0;
}
@@ -774,12 +807,61 @@
return 100;
}
+#define BMS_MODE_BIT BIT(6)
+#define EN_VBAT_BIT BIT(5)
+#define OVERRIDE_MODE_DELAY_MS 20
+int pm8921_bms_get_simultaneous_battery_voltage_and_current(int *ibat_ua,
+ int *vbat_uv)
+{
+ int16_t vsense_raw;
+ int16_t vbat_raw;
+ int vsense_uv;
+ int usb_chg;
+
+ if (the_chip == NULL) {
+ pr_err("Called to early\n");
+ return -EINVAL;
+ }
+
+ mutex_lock(&the_chip->bms_output_lock);
+
+ pm8xxx_writeb(the_chip->dev->parent, BMS_S1_DELAY, 0x00);
+ pm_bms_masked_write(the_chip, BMS_CONTROL,
+ BMS_MODE_BIT | EN_VBAT_BIT, BMS_MODE_BIT | EN_VBAT_BIT);
+
+ msleep(OVERRIDE_MODE_DELAY_MS);
+
+ pm_bms_lock_output_data(the_chip);
+ pm_bms_read_output_data(the_chip, VSENSE_AVG, &vsense_raw);
+ pm_bms_read_output_data(the_chip, VBATT_AVG, &vbat_raw);
+ pm_bms_unlock_output_data(the_chip);
+ pm_bms_masked_write(the_chip, BMS_CONTROL,
+ BMS_MODE_BIT | EN_VBAT_BIT, 0);
+
+ pm8xxx_writeb(the_chip->dev->parent, BMS_S1_DELAY, 0x0B);
+
+ mutex_unlock(&the_chip->bms_output_lock);
+
+ usb_chg = usb_chg_plugged_in();
+
+ convert_vbatt_raw_to_uv(the_chip, usb_chg, vbat_raw, vbat_uv);
+ convert_vsense_to_uv(the_chip, vsense_raw, &vsense_uv);
+ *ibat_ua = vsense_uv * 1000 / (int)the_chip->r_sense;
+
+ pr_debug("vsense_raw = 0x%x vbat_raw = 0x%x"
+ " ibat_ua = %d vbat_uv = %d\n",
+ (uint16_t)vsense_raw, (uint16_t)vbat_raw,
+ *ibat_ua, *vbat_uv);
+ return 0;
+}
+EXPORT_SYMBOL(pm8921_bms_get_simultaneous_battery_voltage_and_current);
+
static int read_soc_params_raw(struct pm8921_bms_chip *chip,
struct pm8921_soc_params *raw)
{
- unsigned long flags;
+ int usb_chg;
- spin_lock_irqsave(&chip->bms_output_lock, flags);
+ mutex_lock(&chip->bms_output_lock);
pm_bms_lock_output_data(chip);
pm_bms_read_output_data(chip,
@@ -793,20 +875,33 @@
read_cc(chip, &raw->cc);
pm_bms_unlock_output_data(chip);
- spin_unlock_irqrestore(&chip->bms_output_lock, flags);
+ mutex_unlock(&chip->bms_output_lock);
- convert_vbatt_raw_to_uv(chip,
+ usb_chg = usb_chg_plugged_in();
+ convert_vbatt_raw_to_uv(chip, usb_chg,
raw->vbatt_for_rbatt_raw, &raw->vbatt_for_rbatt_uv);
- convert_vbatt_raw_to_uv(chip,
+ convert_vbatt_raw_to_uv(chip, usb_chg,
raw->ocv_for_rbatt_raw, &raw->ocv_for_rbatt_uv);
- convert_vbatt_raw_to_uv(chip,
+ convert_vbatt_raw_to_uv(chip, usb_chg,
raw->last_good_ocv_raw, &raw->last_good_ocv_uv);
- convert_vsense_to_uv(chip,
+ convert_vbatt_raw_to_uv(chip, usb_chg,
raw->vsense_for_rbatt_raw, &raw->vsense_for_rbatt_uv);
if (raw->last_good_ocv_uv)
last_ocv_uv = raw->last_good_ocv_uv;
+ pr_debug("0p625 = %duV\n", chip->xoadc_v0625);
+ pr_debug("1p25 = %duV\n", chip->xoadc_v125);
+
+ pr_debug("vbatt_for_rbatt_raw = 0x%x, vbatt_for_rbatt= %duV\n",
+ raw->vbatt_for_rbatt_raw, raw->vbatt_for_rbatt_uv);
+ pr_debug("ocv_for_rbatt_raw = 0x%x, ocv_for_rbatt= %duV\n",
+ raw->ocv_for_rbatt_raw, raw->ocv_for_rbatt_uv);
+ pr_debug("vsense_for_rbatt_raw = 0x%x, vsense_for_rbatt= %duV\n",
+ raw->vsense_for_rbatt_raw, raw->vsense_for_rbatt_uv);
+ pr_debug("last_good_ocv_raw= 0x%x, last_good_ocv_uv= %duV\n",
+ raw->last_good_ocv_raw, raw->last_good_ocv_uv);
+ pr_debug("cc_raw= 0x%x\n", raw->cc);
return 0;
}
@@ -815,9 +910,9 @@
{
unsigned int r_batt;
- if (raw->ocv_for_rbatt_uv == 0
- || raw->ocv_for_rbatt_uv == raw->vbatt_for_rbatt_uv
- || raw->vsense_for_rbatt_raw == 0) {
+ if (raw->ocv_for_rbatt_uv <= 0
+ || raw->ocv_for_rbatt_uv <= raw->vbatt_for_rbatt_uv
+ || raw->vsense_for_rbatt_raw <= 0) {
pr_debug("rbatt readings unavailable ocv = %d, vbatt = %d,"
"vsen = %d\n",
raw->ocv_for_rbatt_uv,
@@ -1076,8 +1171,14 @@
- unusable_charge_uah;
pr_debug("RUC = %duAh\n", remaining_usable_charge_uah);
- soc = (remaining_usable_charge_uah * 100)
- / (fcc_uah - unusable_charge_uah);
+ if (fcc_uah - unusable_charge_uah <= 0) {
+ pr_warn("FCC = %duAh, UUC = %duAh forcing soc = 0\n",
+ fcc_uah, unusable_charge_uah);
+ soc = 0;
+ } else {
+ soc = (remaining_usable_charge_uah * 100)
+ / (fcc_uah - unusable_charge_uah);
+ }
if (soc > 100)
soc = 100;
@@ -1123,11 +1224,13 @@
return soc;
}
-
+#define MIN_DELTA_625_UV 1000
static void calib_hkadc(struct pm8921_bms_chip *chip)
{
int voltage, rc;
struct pm8xxx_adc_chan_result result;
+ int usb_chg;
+ int this_delta;
rc = pm8xxx_adc_read(the_chip->ref1p25v_channel, &result);
if (rc) {
@@ -1147,10 +1250,30 @@
return;
}
voltage = xoadc_reading_to_microvolt(result.adc_code);
- pr_debug("result 0.625V = 0x%x, voltage = %duV adc_meas = %lld\n",
- result.adc_code, voltage, result.measurement);
+
+ usb_chg = usb_chg_plugged_in();
+ pr_debug("result 0.625V = 0x%x, voltage = %duV adc_meas = %lld "
+ "usb_chg = %d\n",
+ result.adc_code, voltage, result.measurement,
+ usb_chg);
+
+ if (usb_chg)
+ chip->xoadc_v0625_usb_present = voltage;
+ else
+ chip->xoadc_v0625_usb_absent = voltage;
chip->xoadc_v0625 = voltage;
+ if (chip->xoadc_v0625_usb_present && chip->xoadc_v0625_usb_absent) {
+ this_delta = chip->xoadc_v0625_usb_present
+ - chip->xoadc_v0625_usb_absent;
+ pr_debug("this_delta= %duV\n", this_delta);
+ if (this_delta > MIN_DELTA_625_UV)
+ last_usb_cal_delta_uv = this_delta;
+ pr_debug("625V_present= %d, 625V_absent= %d, delta = %duV\n",
+ chip->xoadc_v0625_usb_present,
+ chip->xoadc_v0625_usb_absent,
+ last_usb_cal_delta_uv);
+ }
}
static void calibrate_hkadc_work(struct work_struct *work)
@@ -1161,12 +1284,18 @@
calib_hkadc(chip);
}
+void pm8921_bms_calibrate_hkadc(void)
+{
+ schedule_work(&the_chip->calib_hkadc_work);
+}
+
static void calibrate_ccadc_work(struct work_struct *work)
{
struct pm8921_bms_chip *chip = container_of(work,
struct pm8921_bms_chip, calib_ccadc_work.work);
pm8xxx_calib_ccadc();
+ calib_hkadc(chip);
schedule_delayed_work(&chip->calib_ccadc_work,
round_jiffies_relative(msecs_to_jiffies
(chip->calib_delay_ms)));
@@ -1175,14 +1304,13 @@
int pm8921_bms_get_vsense_avg(int *result)
{
int rc = -EINVAL;
- unsigned long flags;
if (the_chip) {
- spin_lock_irqsave(&the_chip->bms_output_lock, flags);
+ mutex_lock(&the_chip->bms_output_lock);
pm_bms_lock_output_data(the_chip);
rc = read_vsense_avg(the_chip, result);
pm_bms_unlock_output_data(the_chip);
- spin_unlock_irqrestore(&the_chip->bms_output_lock, flags);
+ mutex_unlock(&the_chip->bms_output_lock);
}
pr_err("called before initialization\n");
@@ -1192,7 +1320,6 @@
int pm8921_bms_get_battery_current(int *result_ua)
{
- unsigned long flags;
int vsense;
if (!the_chip) {
@@ -1204,15 +1331,15 @@
return -EINVAL;
}
- spin_lock_irqsave(&the_chip->bms_output_lock, flags);
+ mutex_lock(&the_chip->bms_output_lock);
pm_bms_lock_output_data(the_chip);
read_vsense_avg(the_chip, &vsense);
pm_bms_unlock_output_data(the_chip);
- spin_unlock_irqrestore(&the_chip->bms_output_lock, flags);
- pr_debug("vsense=%d\n", vsense);
+ mutex_unlock(&the_chip->bms_output_lock);
+ pr_debug("vsense=%duV\n", vsense);
/* cast for signed division */
*result_ua = vsense * 1000 / (int)the_chip->r_sense;
-
+ pr_debug("ibat=%duA\n", *result_ua);
return 0;
}
EXPORT_SYMBOL(pm8921_bms_get_battery_current);
@@ -1268,6 +1395,10 @@
}
EXPORT_SYMBOL_GPL(pm8921_bms_get_fcc);
+#define IBAT_TOL_MASK 0x0F
+#define OCV_TOL_MASK 0xF0
+#define IBAT_TOL_DEFAULT 0x03
+#define IBAT_TOL_NOCHG 0x0F
void pm8921_bms_charging_began(void)
{
int batt_temp, rc;
@@ -1291,7 +1422,8 @@
bms_start_percent = the_chip->start_percent;
bms_start_ocv_uv = raw.last_good_ocv_uv;
calculate_cc_uah(the_chip, raw.cc, &bms_start_cc_uah);
-
+ pm_bms_masked_write(the_chip, BMS_TOLERANCES,
+ IBAT_TOL_MASK, IBAT_TOL_DEFAULT);
pr_debug("start_percent = %u%%\n", the_chip->start_percent);
}
EXPORT_SYMBOL_GPL(pm8921_bms_charging_began);
@@ -1373,6 +1505,8 @@
last_chargecycles);
the_chip->start_percent = -EINVAL;
the_chip->end_percent = -EINVAL;
+ pm_bms_masked_write(the_chip, BMS_TOLERANCES,
+ IBAT_TOL_MASK, IBAT_TOL_NOCHG);
}
EXPORT_SYMBOL_GPL(pm8921_bms_charging_end);
@@ -1514,6 +1648,9 @@
BMS_CONTROL, rc);
}
+ /* The charger will call start charge later if usb is present */
+ pm_bms_masked_write(chip, BMS_TOLERANCES,
+ IBAT_TOL_MASK, IBAT_TOL_NOCHG);
return 0;
}
@@ -1521,6 +1658,7 @@
{
int ocv_uv, rc;
int16_t ocv_raw;
+ int usb_chg;
/*
* Check if a ocv is available in bms hw,
@@ -1529,7 +1667,8 @@
*/
ocv_uv = 0;
pm_bms_read_output_data(chip, LAST_GOOD_OCV_VALUE, &ocv_raw);
- rc = convert_vbatt_raw_to_uv(chip, ocv_raw, &ocv_uv);
+ usb_chg = usb_chg_plugged_in();
+ rc = convert_vbatt_raw_to_uv(chip, usb_chg, ocv_raw, &ocv_uv);
if (rc || ocv_uv == 0) {
rc = adc_based_ocv(chip, &ocv_uv);
if (rc) {
@@ -1554,47 +1693,70 @@
}
pr_debug("batt_id phy = %lld meas = 0x%llx\n", result.physical,
result.measurement);
- return result.physical;
+ return result.adc_code;
}
-#define PALLADIUM_ID_MIN 2500
-#define PALLADIUM_ID_MAX 4000
+#define PALLADIUM_ID_MIN 0x7F40
+#define PALLADIUM_ID_MAX 0x7F5A
+#define DESAY_5200_ID_MIN 0x7F7F
+#define DESAY_5200_ID_MAX 0x802F
static int set_battery_data(struct pm8921_bms_chip *chip)
{
int64_t battery_id;
- battery_id = read_battery_id(chip);
+ if (chip->batt_type == BATT_DESAY)
+ goto desay;
+ else if (chip->batt_type == BATT_PALLADIUM)
+ goto palladium;
+ battery_id = read_battery_id(chip);
if (battery_id < 0) {
pr_err("cannot read battery id err = %lld\n", battery_id);
return battery_id;
}
if (is_between(PALLADIUM_ID_MIN, PALLADIUM_ID_MAX, battery_id)) {
- chip->fcc = palladium_1500_data.fcc;
- chip->fcc_temp_lut = palladium_1500_data.fcc_temp_lut;
- chip->fcc_sf_lut = palladium_1500_data.fcc_sf_lut;
- chip->pc_temp_ocv_lut = palladium_1500_data.pc_temp_ocv_lut;
- chip->pc_sf_lut = palladium_1500_data.pc_sf_lut;
- return 0;
+ goto palladium;
+ } else if (is_between(DESAY_5200_ID_MIN, DESAY_5200_ID_MAX,
+ battery_id)) {
+ goto desay;
} else {
- pr_warn("invalid battery id, palladium 1500 assumed\n");
+ goto unknown;
+ }
+
+palladium:
chip->fcc = palladium_1500_data.fcc;
chip->fcc_temp_lut = palladium_1500_data.fcc_temp_lut;
chip->fcc_sf_lut = palladium_1500_data.fcc_sf_lut;
chip->pc_temp_ocv_lut = palladium_1500_data.pc_temp_ocv_lut;
chip->pc_sf_lut = palladium_1500_data.pc_sf_lut;
return 0;
- }
+desay:
+ chip->fcc = desay_5200_data.fcc;
+ chip->fcc_temp_lut = desay_5200_data.fcc_temp_lut;
+ chip->fcc_sf_lut = desay_5200_data.fcc_sf_lut;
+ chip->pc_temp_ocv_lut = desay_5200_data.pc_temp_ocv_lut;
+ chip->pc_sf_lut = desay_5200_data.pc_sf_lut;
+ return 0;
+unknown:
+ pr_warn("invalid battery id, palladium 1500 assumed batt_id %llx\n",
+ battery_id);
+ chip->fcc = palladium_1500_data.fcc;
+ chip->fcc_temp_lut = palladium_1500_data.fcc_temp_lut;
+ chip->fcc_sf_lut = palladium_1500_data.fcc_sf_lut;
+ chip->pc_temp_ocv_lut = palladium_1500_data.pc_temp_ocv_lut;
+ chip->pc_sf_lut = palladium_1500_data.pc_sf_lut;
+ return 0;
}
-enum {
+enum bms_request_operation {
CALC_RBATT,
CALC_FCC,
CALC_PC,
CALC_SOC,
CALIB_HKADC,
CALIB_CCADC,
+ GET_VBAT_VSENSE_SIMULTANEOUS,
};
static int test_batt_temp = 5;
@@ -1645,6 +1807,7 @@
{
int param = (int)data;
int ret = 0;
+ int ibat_ua, vbat_uv;
struct pm8921_soc_params raw;
read_soc_params_raw(the_chip, &raw);
@@ -1678,6 +1841,13 @@
*val = 0;
pm8xxx_calib_ccadc();
break;
+ case GET_VBAT_VSENSE_SIMULTANEOUS:
+ /* reading this will call simultaneous vbat and vsense */
+ *val =
+ pm8921_bms_get_simultaneous_battery_voltage_and_current(
+ &ibat_ua,
+ &vbat_uv);
+ break;
default:
ret = -EINVAL;
}
@@ -1821,6 +1991,9 @@
debugfs_create_file("calib_ccadc", 0644, chip->dent,
(void *)CALIB_CCADC, &calc_fops);
+ debugfs_create_file("simultaneous", 0644, chip->dent,
+ (void *)GET_VBAT_VSENSE_SIMULTANEOUS, &calc_fops);
+
for (i = 0; i < ARRAY_SIZE(bms_irq_data); i++) {
if (chip->pmic_bms_irq[bms_irq_data[i].irq_id])
debugfs_create_file(bms_irq_data[i].name, 0444,
@@ -1848,7 +2021,7 @@
pr_err("Cannot allocate pm_bms_chip\n");
return -ENOMEM;
}
- spin_lock_init(&chip->bms_output_lock);
+ mutex_init(&chip->bms_output_lock);
spin_lock_init(&chip->bms_100_lock);
chip->dev = &pdev->dev;
chip->r_sense = pdata->r_sense;
@@ -1856,6 +2029,7 @@
chip->v_failure = pdata->v_failure;
chip->calib_delay_ms = pdata->calib_delay_ms;
chip->max_voltage_uv = pdata->max_voltage_uv;
+ chip->batt_type = pdata->battery_type;
chip->start_percent = -EINVAL;
chip->end_percent = -EINVAL;
rc = set_battery_data(chip);
diff --git a/drivers/power/pm8921-charger.c b/drivers/power/pm8921-charger.c
index aca724a..78757f9 100644
--- a/drivers/power/pm8921-charger.c
+++ b/drivers/power/pm8921-charger.c
@@ -256,9 +256,9 @@
int thermal_levels;
struct delayed_work update_heartbeat_work;
struct delayed_work eoc_work;
- struct delayed_work unplug_wrkarnd_restore_work;
+ struct work_struct unplug_ovp_fet_open_work;
struct delayed_work unplug_check_work;
- struct wake_lock unplug_wrkarnd_restore_wake_lock;
+ struct wake_lock unplug_ovp_fet_open_wake_lock;
struct wake_lock eoc_wake_lock;
enum pm8921_chg_cold_thr cold_thr;
enum pm8921_chg_hot_thr hot_thr;
@@ -415,25 +415,37 @@
disable ? CHG_CHARGE_DIS_BIT : 0);
}
+static int pm_is_chg_charge_dis(struct pm8921_chg_chip *chip)
+{
+ u8 temp;
+
+ pm8xxx_readb(chip->dev->parent, CHG_CNTRL, &temp);
+ return temp & CHG_CHARGE_DIS_BIT;
+}
#define PM8921_CHG_V_MIN_MV 3240
#define PM8921_CHG_V_STEP_MV 20
-#define PM8921_CHG_V_STEP_10_MV_BIT BIT(7)
+#define PM8921_CHG_V_STEP_10MV_OFFSET_BIT BIT(7)
#define PM8921_CHG_VDDMAX_MAX 4500
#define PM8921_CHG_VDDMAX_MIN 3400
#define PM8921_CHG_V_MASK 0x7F
static int __pm_chg_vddmax_set(struct pm8921_chg_chip *chip, int voltage)
{
- int remainder, voltage_20_step;
+ int remainder;
u8 temp = 0;
- voltage_20_step = voltage;
- remainder = voltage % 20;
- if (remainder >= 10) {
- voltage_20_step += 10;
- temp = PM8921_CHG_V_STEP_10_MV_BIT;
+ if (voltage < PM8921_CHG_VDDMAX_MIN
+ || voltage > PM8921_CHG_VDDMAX_MAX) {
+ pr_err("bad mV=%d asked to set\n", voltage);
+ return -EINVAL;
}
- temp |= (voltage_20_step - PM8921_CHG_V_MIN_MV) / PM8921_CHG_V_STEP_MV;
+ temp = (voltage - PM8921_CHG_V_MIN_MV) / PM8921_CHG_V_STEP_MV;
+
+ remainder = voltage % 20;
+ if (remainder >= 10) {
+ temp |= PM8921_CHG_V_STEP_10MV_OFFSET_BIT;
+ }
+
pr_debug("voltage=%d setting %02x\n", voltage, temp);
return pm8xxx_writeb(chip->dev->parent, CHG_VDD_MAX, temp);
}
@@ -449,10 +461,10 @@
*voltage = 0;
return rc;
}
- temp &= PM8921_CHG_V_MASK;
- *voltage = (int)temp * PM8921_CHG_V_STEP_MV + PM8921_CHG_V_MIN_MV;
- if (temp & PM8921_CHG_V_STEP_10_MV_BIT)
- *voltage = *voltage - 10;
+ *voltage = (int)(temp & PM8921_CHG_V_MASK) * PM8921_CHG_V_STEP_MV
+ + PM8921_CHG_V_MIN_MV;
+ if (temp & PM8921_CHG_V_STEP_10MV_OFFSET_BIT)
+ *voltage = *voltage + 10;
return 0;
}
@@ -841,6 +853,56 @@
temp);
}
+static void disable_input_voltage_regulation(struct pm8921_chg_chip *chip)
+{
+ u8 temp;
+ int rc;
+
+ rc = pm8xxx_writeb(chip->dev->parent, CHG_BUCK_CTRL_TEST3, 0x70);
+ if (rc) {
+ pr_err("Failed to write 0x70 to CTRL_TEST3 rc = %d\n", rc);
+ return;
+ }
+ rc = pm8xxx_readb(chip->dev->parent, CHG_BUCK_CTRL_TEST3, &temp);
+ if (rc) {
+ pr_err("Failed to read CTRL_TEST3 rc = %d\n", rc);
+ return;
+ }
+ /* set the input voltage disable bit and the write bit */
+ temp |= 0x81;
+ rc = pm8xxx_writeb(chip->dev->parent, CHG_BUCK_CTRL_TEST3, temp);
+ if (rc) {
+ pr_err("Failed to write 0x%x to CTRL_TEST3 rc=%d\n", temp, rc);
+ return;
+ }
+}
+
+static void enable_input_voltage_regulation(struct pm8921_chg_chip *chip)
+{
+ u8 temp;
+ int rc;
+
+ rc = pm8xxx_writeb(chip->dev->parent, CHG_BUCK_CTRL_TEST3, 0x70);
+ if (rc) {
+ pr_err("Failed to write 0x70 to CTRL_TEST3 rc = %d\n", rc);
+ return;
+ }
+ rc = pm8xxx_readb(chip->dev->parent, CHG_BUCK_CTRL_TEST3, &temp);
+ if (rc) {
+ pr_err("Failed to read CTRL_TEST3 rc = %d\n", rc);
+ return;
+ }
+ /* unset the input voltage disable bit */
+ temp &= 0xFE;
+ /* set the write bit */
+ temp |= 0x80;
+ rc = pm8xxx_writeb(chip->dev->parent, CHG_BUCK_CTRL_TEST3, temp);
+ if (rc) {
+ pr_err("Failed to write 0x%x to CTRL_TEST3 rc=%d\n", temp, rc);
+ return;
+ }
+}
+
static int64_t read_battery_id(struct pm8921_chg_chip *chip)
{
int rc;
@@ -989,7 +1051,13 @@
}
}
-static enum power_supply_property pm_power_props[] = {
+static enum power_supply_property pm_power_props_usb[] = {
+ POWER_SUPPLY_PROP_PRESENT,
+ POWER_SUPPLY_PROP_ONLINE,
+ POWER_SUPPLY_PROP_CURRENT_MAX,
+};
+
+static enum power_supply_property pm_power_props_mains[] = {
POWER_SUPPLY_PROP_PRESENT,
POWER_SUPPLY_PROP_ONLINE,
};
@@ -999,7 +1067,53 @@
};
#define USB_WALL_THRESHOLD_MA 500
-static int pm_power_get_property(struct power_supply *psy,
+static int pm_power_get_property_mains(struct power_supply *psy,
+ enum power_supply_property psp,
+ union power_supply_propval *val)
+{
+ int current_max;
+
+ /* Check if called before init */
+ if (!the_chip)
+ return -EINVAL;
+
+ switch (psp) {
+ case POWER_SUPPLY_PROP_PRESENT:
+ case POWER_SUPPLY_PROP_ONLINE:
+ val->intval = 0;
+ if (charging_disabled)
+ return 0;
+
+ /* check external charger first before the dc path */
+ if (is_ext_charging(the_chip)) {
+ val->intval = 1;
+ return 0;
+ }
+
+ if (pm_is_chg_charge_dis(the_chip)) {
+ val->intval = 0;
+ return 0;
+ }
+
+ if (the_chip->dc_present) {
+ val->intval = 1;
+ return 0;
+ }
+
+ /* USB with max current greater than 500 mA connected */
+ pm_chg_iusbmax_get(the_chip, ¤t_max);
+ if (current_max > USB_WALL_THRESHOLD_MA)
+ val->intval = is_usb_chg_plugged_in(the_chip);
+ return 0;
+
+ break;
+ default:
+ return -EINVAL;
+ }
+ return 0;
+}
+
+static int pm_power_get_property_usb(struct power_supply *psy,
enum power_supply_property psp,
union power_supply_propval *val)
{
@@ -1011,8 +1125,12 @@
switch (psp) {
case POWER_SUPPLY_PROP_CURRENT_MAX:
- pm_chg_iusbmax_get(the_chip, ¤t_max);
- val->intval = current_max;
+ if (pm_is_chg_charge_dis(the_chip)) {
+ val->intval = 0;
+ } else {
+ pm_chg_iusbmax_get(the_chip, ¤t_max);
+ val->intval = current_max;
+ }
break;
case POWER_SUPPLY_PROP_PRESENT:
case POWER_SUPPLY_PROP_ONLINE:
@@ -1020,6 +1138,13 @@
if (charging_disabled)
return 0;
+ /*
+ * if drawing any current from usb is disabled behave
+ * as if no usb cable is connected
+ */
+ if (pm_is_chg_charge_dis(the_chip))
+ return 0;
+
/* USB charging */
if (psy->type == POWER_SUPPLY_TYPE_USB ||
psy->type == POWER_SUPPLY_TYPE_USB_DCP ||
@@ -1028,22 +1153,6 @@
val->intval = is_usb_chg_plugged_in(the_chip);
return 0;
}
-
- /* DC charging */
- if (psy->type == POWER_SUPPLY_TYPE_MAINS) {
- /* external charger is connected */
- if (the_chip->dc_present || is_ext_charging(the_chip)) {
- val->intval = 1;
- return 0;
- }
- /* USB with max current greater than 500 mA connected */
- pm_chg_iusbmax_get(the_chip, ¤t_max);
- if (current_max > USB_WALL_THRESHOLD_MA)
- val->intval = is_usb_chg_plugged_in(the_chip);
- return 0;
- }
-
- pr_err("Unkown POWER_SUPPLY_TYPE %d\n", psy->type);
break;
default:
return -EINVAL;
@@ -1612,6 +1721,7 @@
{
int usb_present;
+ pm_chg_failed_clear(chip, 1);
usb_present = is_usb_chg_plugged_in(chip);
if (chip->usb_present ^ usb_present) {
notify_usb_of_the_plugin_event(usb_present);
@@ -1623,7 +1733,11 @@
schedule_delayed_work(&chip->unplug_check_work,
round_jiffies_relative(msecs_to_jiffies
(UNPLUG_CHECK_WAIT_PERIOD_MS)));
+ pm8921_chg_enable_irq(chip, CHG_GONE_IRQ);
+ } else {
+ pm8921_chg_disable_irq(chip, CHG_GONE_IRQ);
}
+ enable_input_voltage_regulation(chip);
bms_notify_check(chip);
}
@@ -1702,26 +1816,94 @@
wake_lock(&chip->eoc_wake_lock);
}
-#define WRITE_BANK_4 0xC0
-static void unplug_wrkarnd_restore_worker(struct work_struct *work)
+static void turn_off_usb_ovp_fet(struct pm8921_chg_chip *chip)
{
u8 temp;
int rc;
- struct delayed_work *dwork = to_delayed_work(work);
- struct pm8921_chg_chip *chip = container_of(dwork,
- struct pm8921_chg_chip,
- unplug_wrkarnd_restore_work);
- pr_debug("restoring vin_min to %d mV\n", chip->vin_min);
- rc = pm_chg_vinmin_set(the_chip, chip->vin_min);
-
- temp = WRITE_BANK_4 | 0xA;
- rc = pm8xxx_writeb(chip->dev->parent, CHG_BUCK_CTRL_TEST3, temp);
+ rc = pm8xxx_writeb(chip->dev->parent, USB_OVP_TEST, 0x30);
if (rc) {
- pr_err("Error %d writing %d to addr %d\n", rc,
- temp, CHG_BUCK_CTRL_TEST3);
+ pr_err("Failed to write 0x30 to USB_OVP_TEST rc = %d\n", rc);
+ return;
}
- wake_unlock(&chip->unplug_wrkarnd_restore_wake_lock);
+ rc = pm8xxx_readb(chip->dev->parent, USB_OVP_TEST, &temp);
+ if (rc) {
+ pr_err("Failed to read from USB_OVP_TEST rc = %d\n", rc);
+ return;
+ }
+ /* set ovp fet disable bit and the write bit */
+ temp |= 0x81;
+ rc = pm8xxx_writeb(chip->dev->parent, USB_OVP_TEST, temp);
+ if (rc) {
+ pr_err("Failed to write 0x%x USB_OVP_TEST rc=%d\n", temp, rc);
+ return;
+ }
+}
+
+static void turn_on_usb_ovp_fet(struct pm8921_chg_chip *chip)
+{
+ u8 temp;
+ int rc;
+
+ rc = pm8xxx_writeb(chip->dev->parent, USB_OVP_TEST, 0x30);
+ if (rc) {
+ pr_err("Failed to write 0x30 to USB_OVP_TEST rc = %d\n", rc);
+ return;
+ }
+ rc = pm8xxx_readb(chip->dev->parent, USB_OVP_TEST, &temp);
+ if (rc) {
+ pr_err("Failed to read from USB_OVP_TEST rc = %d\n", rc);
+ return;
+ }
+ /* unset ovp fet disable bit and set the write bit */
+ temp &= 0xFE;
+ temp |= 0x80;
+ rc = pm8xxx_writeb(chip->dev->parent, USB_OVP_TEST, temp);
+ if (rc) {
+ pr_err("Failed to write 0x%x to USB_OVP_TEST rc = %d\n",
+ temp, rc);
+ return;
+ }
+}
+
+static int param_open_ovp_counter = 10;
+module_param(param_open_ovp_counter, int, 0644);
+
+#define WRITE_BANK_4 0xC0
+#define USB_OVP_DEBOUNCE_TIME 0x06
+static void unplug_ovp_fet_open_worker(struct work_struct *work)
+{
+ struct pm8921_chg_chip *chip = container_of(work,
+ struct pm8921_chg_chip,
+ unplug_ovp_fet_open_work);
+ int chg_gone, usb_chg_plugged_in;
+ int count = 0;
+
+ while (count++ < param_open_ovp_counter) {
+ pm_chg_masked_write(chip, USB_OVP_CONTROL,
+ USB_OVP_DEBOUNCE_TIME, 0x0);
+ usleep(10);
+ usb_chg_plugged_in = is_usb_chg_plugged_in(chip);
+ chg_gone = pm_chg_get_rt_status(chip, CHG_GONE_IRQ);
+ pr_debug("OVP FET count = %d chg_gone=%d, usb_valid = %d\n",
+ count, chg_gone, usb_chg_plugged_in);
+
+ /* note usb_chg_plugged_in=0 => chg_gone=1 */
+ if (chg_gone == 1 && usb_chg_plugged_in == 1) {
+ pr_debug("since chg_gone = 1 dis ovp_fet for 20msec\n");
+ turn_off_usb_ovp_fet(chip);
+
+ msleep(20);
+
+ turn_on_usb_ovp_fet(chip);
+ } else {
+ pm_chg_masked_write(chip, USB_OVP_CONTROL,
+ USB_OVP_DEBOUNCE_TIME, 0x1);
+ pr_debug("Exit count=%d chg_gone=%d, usb_valid=%d\n",
+ count, chg_gone, usb_chg_plugged_in);
+ return;
+ }
+ }
}
static irqreturn_t usbin_valid_irq_handler(int irq, void *data)
{
@@ -1799,8 +1981,7 @@
static irqreturn_t vcp_irq_handler(int irq, void *data)
{
- pr_warning("VCP triggered BATDET forced on\n");
- pr_debug("state_changed_to=%d\n", pm_chg_get_fsm_state(data));
+ pr_debug("fsm_state=%d\n", pm_chg_get_fsm_state(data));
return IRQ_HANDLED;
}
@@ -1867,6 +2048,29 @@
return IRQ_HANDLED;
}
+static int param_vin_disable_counter = 5;
+module_param(param_vin_disable_counter, int, 0644);
+
+static void attempt_reverse_boost_fix(struct pm8921_chg_chip *chip,
+ int count, int usb_ma)
+{
+ pm8921_charger_vbus_draw(500);
+ pr_debug("count = %d iusb=500mA\n", count);
+ disable_input_voltage_regulation(chip);
+ pr_debug("count = %d disable_input_regulation\n", count);
+
+ msleep(20);
+
+ pr_debug("count = %d end sleep 20ms chg_gone=%d, usb_valid = %d\n",
+ count,
+ pm_chg_get_rt_status(chip, CHG_GONE_IRQ),
+ is_usb_chg_plugged_in(chip));
+ pr_debug("count = %d restoring input regulation and usb_ma = %d\n",
+ count, usb_ma);
+ enable_input_voltage_regulation(chip);
+ pm8921_charger_vbus_draw(usb_ma);
+}
+
#define VIN_ACTIVE_BIT BIT(0)
#define UNPLUG_WRKARND_RESTORE_WAIT_PERIOD_US 200
#define VIN_MIN_INCREASE_MV 100
@@ -1877,6 +2081,8 @@
struct pm8921_chg_chip, unplug_check_work);
u8 reg_loop;
int ibat, usb_chg_plugged_in;
+ int usb_ma;
+ int chg_gone = 0;
usb_chg_plugged_in = is_usb_chg_plugged_in(chip);
if (!usb_chg_plugged_in) {
@@ -1888,8 +2094,25 @@
);
return;
}
+
+ pm_chg_iusbmax_get(chip, &usb_ma);
+ if (usb_ma == 500) {
+ pr_debug("Stopping Unplug Check Worker since USB == 500mA\n");
+ disable_input_voltage_regulation(chip);
+ return;
+ }
+
+ if (usb_ma <= 100) {
+ pr_debug(
+ "Unenumerated yet or suspended usb_ma = %d skipping\n",
+ usb_ma);
+ goto check_again_later;
+ }
+ if (pm8921_chg_is_enabled(chip, CHG_GONE_IRQ))
+ pr_debug("chg gone irq is enabled\n");
+
reg_loop = pm_chg_get_regulation_loop(chip);
- pr_debug("reg_loop=0x%x\n", reg_loop);
+ pr_debug("reg_loop=0x%x usb_ma = %d\n", reg_loop, usb_ma);
if (reg_loop & VIN_ACTIVE_BIT) {
ibat = get_prop_batt_current(chip);
@@ -1897,28 +2120,28 @@
pr_debug("ibat = %d fsm = %d reg_loop = 0x%x\n",
ibat, pm_chg_get_fsm_state(chip), reg_loop);
if (ibat > 0) {
- int err;
- u8 temp;
+ int count = 0;
- temp = WRITE_BANK_4 | 0xE;
- err = pm8xxx_writeb(chip->dev->parent,
- CHG_BUCK_CTRL_TEST3, temp);
- if (err) {
- pr_err("Error %d writing %d to addr %d\n", err,
- temp, CHG_BUCK_CTRL_TEST3);
+ while (count++ < param_vin_disable_counter
+ && usb_chg_plugged_in == 1) {
+ attempt_reverse_boost_fix(chip, count, usb_ma);
+ usb_chg_plugged_in
+ = is_usb_chg_plugged_in(chip);
}
-
- pm_chg_vinmin_set(chip,
- chip->vin_min + VIN_MIN_INCREASE_MV);
-
- wake_lock(&chip->unplug_wrkarnd_restore_wake_lock);
- schedule_delayed_work(
- &chip->unplug_wrkarnd_restore_work,
- round_jiffies_relative(usecs_to_jiffies
- (UNPLUG_WRKARND_RESTORE_WAIT_PERIOD_US)));
}
}
+ usb_chg_plugged_in = is_usb_chg_plugged_in(chip);
+ chg_gone = pm_chg_get_rt_status(chip, CHG_GONE_IRQ);
+
+ if (chg_gone == 1 && usb_chg_plugged_in == 1) {
+ /* run the worker directly */
+ pr_debug(" ver5 step: chg_gone=%d, usb_valid = %d\n",
+ chg_gone, usb_chg_plugged_in);
+ schedule_work(&chip->unplug_ovp_fet_open_work);
+ }
+
+check_again_later:
schedule_delayed_work(&chip->unplug_check_work,
round_jiffies_relative(msecs_to_jiffies
(UNPLUG_CHECK_WAIT_PERIOD_MS)));
@@ -2008,6 +2231,13 @@
static irqreturn_t chg_gone_irq_handler(int irq, void *data)
{
struct pm8921_chg_chip *chip = data;
+ int chg_gone, usb_chg_plugged_in;
+
+ usb_chg_plugged_in = is_usb_chg_plugged_in(chip);
+ chg_gone = pm_chg_get_rt_status(chip, CHG_GONE_IRQ);
+
+ pr_debug("chg_gone=%d, usb_valid = %d\n", chg_gone, usb_chg_plugged_in);
+ schedule_work(&chip->unplug_ovp_fet_open_work);
pr_debug("Chg gone fsm_state=%d\n", pm_chg_get_fsm_state(data));
power_supply_changed(&chip->batt_psy);
@@ -2153,6 +2383,7 @@
struct pm8921_chg_chip *chip = container_of(dwork,
struct pm8921_chg_chip, update_heartbeat_work);
+ pm_chg_failed_clear(chip, 1);
power_supply_changed(&chip->batt_psy);
schedule_delayed_work(&chip->update_heartbeat_work,
round_jiffies_relative(msecs_to_jiffies
@@ -2281,7 +2512,10 @@
struct pm8921_chg_chip *chip = container_of(dwork,
struct pm8921_chg_chip, eoc_work);
static int count;
- int end = is_charging_finished(chip);
+ int end;
+
+ pm_chg_failed_clear(chip, 1);
+ end = is_charging_finished(chip);
if (end == CHG_NOT_IN_PROGRESS) {
/* enable fastchg irq */
@@ -2540,6 +2774,7 @@
schedule_delayed_work(&chip->unplug_check_work,
round_jiffies_relative(msecs_to_jiffies
(UNPLUG_CHECK_WAIT_PERIOD_MS)));
+ pm8921_chg_enable_irq(chip, CHG_GONE_IRQ);
}
pm8921_chg_enable_irq(chip, DCIN_VALID_IRQ);
@@ -2621,7 +2856,8 @@
CHG_IRQ(CHGHOT_IRQ, IRQF_TRIGGER_RISING, chghot_irq_handler),
CHG_IRQ(BATTTEMP_COLD_IRQ, IRQF_TRIGGER_RISING,
batttemp_cold_irq_handler),
- CHG_IRQ(CHG_GONE_IRQ, IRQF_TRIGGER_RISING, chg_gone_irq_handler),
+ CHG_IRQ(CHG_GONE_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+ chg_gone_irq_handler),
CHG_IRQ(BAT_TEMP_OK_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
bat_temp_ok_irq_handler),
CHG_IRQ(COARSE_DET_LOW_IRQ, IRQF_TRIGGER_RISING,
@@ -3280,17 +3516,17 @@
chip->usb_psy.type = POWER_SUPPLY_TYPE_USB,
chip->usb_psy.supplied_to = pm_power_supplied_to,
chip->usb_psy.num_supplicants = ARRAY_SIZE(pm_power_supplied_to),
- chip->usb_psy.properties = pm_power_props,
- chip->usb_psy.num_properties = ARRAY_SIZE(pm_power_props),
- chip->usb_psy.get_property = pm_power_get_property,
+ chip->usb_psy.properties = pm_power_props_usb,
+ chip->usb_psy.num_properties = ARRAY_SIZE(pm_power_props_usb),
+ chip->usb_psy.get_property = pm_power_get_property_usb,
chip->dc_psy.name = "pm8921-dc",
chip->dc_psy.type = POWER_SUPPLY_TYPE_MAINS,
chip->dc_psy.supplied_to = pm_power_supplied_to,
chip->dc_psy.num_supplicants = ARRAY_SIZE(pm_power_supplied_to),
- chip->dc_psy.properties = pm_power_props,
- chip->dc_psy.num_properties = ARRAY_SIZE(pm_power_props),
- chip->dc_psy.get_property = pm_power_get_property,
+ chip->dc_psy.properties = pm_power_props_mains,
+ chip->dc_psy.num_properties = ARRAY_SIZE(pm_power_props_mains),
+ chip->dc_psy.get_property = pm_power_get_property_mains,
chip->batt_psy.name = "battery",
chip->batt_psy.type = POWER_SUPPLY_TYPE_BATTERY,
@@ -3320,11 +3556,11 @@
the_chip = chip;
wake_lock_init(&chip->eoc_wake_lock, WAKE_LOCK_SUSPEND, "pm8921_eoc");
- wake_lock_init(&chip->unplug_wrkarnd_restore_wake_lock,
+ wake_lock_init(&chip->unplug_ovp_fet_open_wake_lock,
WAKE_LOCK_SUSPEND, "pm8921_unplug_wrkarnd");
INIT_DELAYED_WORK(&chip->eoc_work, eoc_worker);
- INIT_DELAYED_WORK(&chip->unplug_wrkarnd_restore_work,
- unplug_wrkarnd_restore_worker);
+ INIT_WORK(&chip->unplug_ovp_fet_open_work,
+ unplug_ovp_fet_open_worker);
INIT_DELAYED_WORK(&chip->unplug_check_work, unplug_check_worker);
rc = request_irqs(chip, pdev);
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 49e0d0e..fb1a99f 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -344,5 +344,14 @@
chip. It is only supposed to be used when Linux on application
processor is the master in control of XO buffers.
+config REGULATOR_STUB
+ tristate "Stub Regulator"
+ help
+ This driver adds stub regulator support. The driver is absent of any
+ real hardware based implementation. It allows for clients to register
+ their regulator device constraints and use all of the standard
+ regulator interfaces. This is useful for bringing up new platforms
+ when the real hardware based implementation may not be yet available.
+ Clients can use the real regulator device names with proper
+ constraint checking while the real driver is being developed.
endif
-
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 5318cff..74b1f71 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -48,5 +48,6 @@
obj-$(CONFIG_REGULATOR_GPIO) += gpio-regulator.o
obj-$(CONFIG_REGULATOR_PM8058_XO) += pm8058-xo.o
obj-$(CONFIG_REGULATOR_PM8XXX) += pm8xxx-regulator.o
+obj-$(CONFIG_REGULATOR_STUB) += stub-regulator.o
ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG
diff --git a/drivers/regulator/pm8xxx-regulator.c b/drivers/regulator/pm8xxx-regulator.c
index fa17449..fd691f0 100644
--- a/drivers/regulator/pm8xxx-regulator.c
+++ b/drivers/regulator/pm8xxx-regulator.c
@@ -3105,7 +3105,7 @@
if (vreg->rdesc.name == NULL) {
pr_err("regulator name missing\n");
return -EINVAL;
- } else if (vreg->type < 0 || vreg->type > PM8XXX_REGULATOR_TYPE_MAX) {
+ } else if (vreg->type < 0 || vreg->type >= PM8XXX_REGULATOR_TYPE_MAX) {
pr_err("%s: regulator type=%d is invalid\n", vreg->rdesc.name,
vreg->type);
return -EINVAL;
diff --git a/drivers/regulator/stub-regulator.c b/drivers/regulator/stub-regulator.c
new file mode 100644
index 0000000..afac80a
--- /dev/null
+++ b/drivers/regulator/stub-regulator.c
@@ -0,0 +1,232 @@
+/*
+ * Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#define pr_fmt(fmt) "%s: " fmt, __func__
+
+#include <linux/module.h>
+#include <linux/err.h>
+#include <linux/kernel.h>
+#include <linux/regulator/driver.h>
+#include <linux/regulator/stub-regulator.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/types.h>
+
+#define STUB_REGULATOR_MAX_NAME 40
+
+struct regulator_stub {
+ struct regulator_desc rdesc;
+ struct regulator_dev *rdev;
+ int voltage;
+ bool enabled;
+ int mode;
+ int hpm_min_load;
+ int system_uA;
+ char name[STUB_REGULATOR_MAX_NAME];
+};
+
+static int regulator_stub_set_voltage(struct regulator_dev *rdev, int min_uV,
+ int max_uV, unsigned *selector)
+{
+ struct regulator_stub *vreg_priv = rdev_get_drvdata(rdev);
+ vreg_priv->voltage = min_uV;
+ return 0;
+}
+
+static int regulator_stub_get_voltage(struct regulator_dev *rdev)
+{
+ struct regulator_stub *vreg_priv = rdev_get_drvdata(rdev);
+ return vreg_priv->voltage;
+}
+
+static int regulator_stub_list_voltage(struct regulator_dev *rdev,
+ unsigned selector)
+{
+ struct regulation_constraints *constraints = rdev->constraints;
+
+ if (selector >= 2)
+ return -EINVAL;
+ else if (selector == 0)
+ return constraints->min_uV;
+ else
+ return constraints->max_uV;
+}
+
+static unsigned int regulator_stub_get_mode(struct regulator_dev *rdev)
+{
+ struct regulator_stub *vreg_priv = rdev_get_drvdata(rdev);
+ return vreg_priv->mode;
+}
+
+static int regulator_stub_set_mode(struct regulator_dev *rdev,
+ unsigned int mode)
+{
+ struct regulator_stub *vreg_priv = rdev_get_drvdata(rdev);
+
+ if (mode != REGULATOR_MODE_NORMAL && mode != REGULATOR_MODE_IDLE) {
+ dev_err(&rdev->dev, "%s: invalid mode requested %u\n",
+ __func__, mode);
+ return -EINVAL;
+ }
+ vreg_priv->mode = mode;
+ return 0;
+}
+
+static unsigned int regulator_stub_get_optimum_mode(struct regulator_dev *rdev,
+ int input_uV, int output_uV, int load_uA)
+{
+ struct regulator_stub *vreg_priv = rdev_get_drvdata(rdev);
+ unsigned int mode;
+
+ if (load_uA + vreg_priv->system_uA >= vreg_priv->hpm_min_load)
+ mode = REGULATOR_MODE_NORMAL;
+ else
+ mode = REGULATOR_MODE_IDLE;
+
+ return mode;
+}
+
+static int regulator_stub_enable(struct regulator_dev *rdev)
+{
+ struct regulator_stub *vreg_priv = rdev_get_drvdata(rdev);
+ vreg_priv->enabled = true;
+ return 0;
+}
+
+static int regulator_stub_disable(struct regulator_dev *rdev)
+{
+ struct regulator_stub *vreg_priv = rdev_get_drvdata(rdev);
+ vreg_priv->enabled = false;
+ return 0;
+}
+
+static int regulator_stub_is_enabled(struct regulator_dev *rdev)
+{
+ struct regulator_stub *vreg_priv = rdev_get_drvdata(rdev);
+ return vreg_priv->enabled;
+}
+
+/* Real regulator operations. */
+static struct regulator_ops regulator_stub_ops = {
+ .enable = regulator_stub_enable,
+ .disable = regulator_stub_disable,
+ .is_enabled = regulator_stub_is_enabled,
+ .set_voltage = regulator_stub_set_voltage,
+ .get_voltage = regulator_stub_get_voltage,
+ .list_voltage = regulator_stub_list_voltage,
+ .set_mode = regulator_stub_set_mode,
+ .get_mode = regulator_stub_get_mode,
+ .get_optimum_mode = regulator_stub_get_optimum_mode,
+};
+
+static void regulator_stub_cleanup(struct regulator_stub *vreg_priv)
+{
+ if (vreg_priv && vreg_priv->rdev)
+ regulator_unregister(vreg_priv->rdev);
+ kfree(vreg_priv);
+}
+
+static int __devinit regulator_stub_probe(struct platform_device *pdev)
+{
+ struct stub_regulator_pdata *vreg_pdata;
+ struct regulator_desc *rdesc;
+ struct regulator_stub *vreg_priv;
+ int rc;
+
+ vreg_pdata = pdev->dev.platform_data;
+ if (!vreg_pdata) {
+ dev_err(&pdev->dev, "%s: no platform data\n", __func__);
+ return -EINVAL;
+ }
+
+ vreg_priv = kzalloc(sizeof(*vreg_priv), GFP_KERNEL);
+ if (!vreg_priv) {
+ dev_err(&pdev->dev, "%s: Unable to allocate memory\n",
+ __func__);
+ return -ENOMEM;
+ }
+ dev_set_drvdata(&pdev->dev, vreg_priv);
+
+ rdesc = &vreg_priv->rdesc;
+ strncpy(vreg_priv->name, vreg_pdata->init_data.constraints.name,
+ STUB_REGULATOR_MAX_NAME);
+ rdesc->name = vreg_priv->name;
+ rdesc->ops = ®ulator_stub_ops;
+
+ /*
+ * Ensure that voltage set points are handled correctly for regulators
+ * which have a specified voltage constraint range, as well as those
+ * that do not.
+ */
+ if (vreg_pdata->init_data.constraints.min_uV == 0 &&
+ vreg_pdata->init_data.constraints.max_uV == 0)
+ rdesc->n_voltages = 0;
+ else
+ rdesc->n_voltages = 2;
+
+ rdesc->id = pdev->id;
+ rdesc->owner = THIS_MODULE;
+ rdesc->type = REGULATOR_VOLTAGE;
+ vreg_priv->system_uA = vreg_pdata->system_uA;
+ vreg_priv->hpm_min_load = vreg_pdata->hpm_min_load;
+
+ vreg_priv->rdev = regulator_register(rdesc, &pdev->dev,
+ &(vreg_pdata->init_data), vreg_priv);
+ if (IS_ERR(vreg_priv->rdev)) {
+ rc = PTR_ERR(vreg_priv->rdev);
+ vreg_priv->rdev = NULL;
+ dev_err(&pdev->dev, "%s: regulator_register failed\n",
+ __func__);
+ goto err_probe;
+ }
+
+ return 0;
+
+err_probe:
+ regulator_stub_cleanup(vreg_priv);
+ return rc;
+}
+
+static int __devexit regulator_stub_remove(struct platform_device *pdev)
+{
+ struct regulator_stub *vreg_priv = dev_get_drvdata(&pdev->dev);
+
+ regulator_stub_cleanup(vreg_priv);
+ return 0;
+}
+
+static struct platform_driver regulator_stub_driver = {
+ .probe = regulator_stub_probe,
+ .remove = __devexit_p(regulator_stub_remove),
+ .driver = {
+ .name = STUB_REGULATOR_DRIVER_NAME,
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init regulator_stub_init(void)
+{
+ return platform_driver_register(®ulator_stub_driver);
+}
+postcore_initcall(regulator_stub_init);
+
+static void __exit regulator_stub_exit(void)
+{
+ platform_driver_unregister(®ulator_stub_driver);
+}
+module_exit(regulator_stub_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("stub regulator driver");
+MODULE_VERSION("1.0");
+MODULE_ALIAS("platform: " STUB_REGULATOR_DRIVER_NAME);
diff --git a/drivers/slimbus/slim-msm-ctrl.c b/drivers/slimbus/slim-msm-ctrl.c
index d053cd6..2aab31e 100644
--- a/drivers/slimbus/slim-msm-ctrl.c
+++ b/drivers/slimbus/slim-msm-ctrl.c
@@ -821,7 +821,7 @@
timeout = wait_for_completion_timeout(&dev->reconf, HZ);
dev->reconf_busy = false;
if (timeout) {
- clk_disable(dev->rclk);
+ clk_disable_unprepare(dev->rclk);
disable_irq(dev->irq);
}
}
@@ -880,7 +880,7 @@
{
struct msm_slim_ctrl *dev = slim_get_ctrldata(ctrl);
enable_irq(dev->irq);
- clk_enable(dev->rclk);
+ clk_prepare_enable(dev->rclk);
writel_relaxed(1, dev->base + FRM_WAKEUP);
/* Make sure framer wakeup write goes through before exiting function */
mb();
@@ -1171,6 +1171,27 @@
}
slim_assign_laddr(&dev->ctrl, e_addr, 6, &laddr);
sat->satcl.laddr = laddr;
+ /*
+ * Since capability message is already sent, present
+ * message will indicate subsystem hosting this
+ * satellite has restarted.
+ * Remove all active channels of this satellite
+ * when this is detected
+ */
+ if (sat->sent_capability) {
+ for (i = 0; i < sat->nsatch; i++) {
+ enum slim_ch_state chs =
+ slim_get_ch_state(&sat->satcl,
+ sat->satch[i].chanh);
+ pr_err("Slim-SSR, sat:%d, rm chan:%d",
+ laddr,
+ sat->satch[i].chan);
+ if (chs == SLIM_CH_ACTIVE)
+ slim_control_ch(&sat->satcl,
+ sat->satch[i].chanh,
+ SLIM_CH_REMOVE, true);
+ }
+ }
} else if (mt != SLIM_MSG_MT_CORE &&
mc != SLIM_MSG_MC_REPORT_PRESENT) {
satv = msm_slim_get_ctrl(dev);
@@ -1539,6 +1560,10 @@
struct sps_register_event sps_error_event; /* SPS_ERROR */
struct sps_register_event sps_descr_event; /* DESCR_DONE */
+ init_completion(notify);
+ if (!dev->use_rx_msgqs)
+ goto rx_thread_create;
+
/* Allocate the endpoint */
ret = msm_slim_init_endpoint(dev, endpoint);
if (ret) {
@@ -1620,12 +1645,17 @@
}
}
+rx_thread_create:
/* Fire up the Rx message queue thread */
dev->rx_msgq_thread = kthread_run(msm_slim_rx_msgq_thread, dev,
MSM_SLIM_NAME "_rx_msgq_thread");
if (!dev->rx_msgq_thread) {
dev_err(dev->dev, "Failed to start Rx message queue thread\n");
- ret = -EIO;
+ /* Tear-down BAMs or return? */
+ if (!dev->use_rx_msgqs)
+ return -EIO;
+ else
+ ret = -EIO;
} else
return 0;
@@ -1641,6 +1671,7 @@
alloc_descr_failed:
msm_slim_free_endpoint(endpoint);
sps_init_endpoint_failed:
+ dev->use_rx_msgqs = 0;
return ret;
}
@@ -1669,6 +1700,9 @@
},
};
+ if (!dev->use_rx_msgqs)
+ goto init_rx_msgq;
+
bam_props.ee = dev->ee;
bam_props.virt_addr = dev->bam.base;
bam_props.phys_addr = bam_mem->start;
@@ -1693,22 +1727,21 @@
/* Register the BAM device with the SPS driver */
ret = sps_register_bam_device(&bam_props, &bam_handle);
if (ret) {
- dev_err(dev->dev, "sps_register_bam_device failed 0x%x\n", ret);
- return ret;
+ dev_err(dev->dev, "disabling BAM: reg-bam failed 0x%x\n", ret);
+ dev->use_rx_msgqs = 0;
+ goto init_rx_msgq;
}
dev->bam.hdl = bam_handle;
dev_dbg(dev->dev, "SLIM BAM registered, handle = 0x%x\n", bam_handle);
+init_rx_msgq:
ret = msm_slim_init_rx_msgq(dev);
- if (ret) {
+ if (ret)
dev_err(dev->dev, "msm_slim_init_rx_msgq failed 0x%x\n", ret);
- goto rx_msgq_init_failed;
+ if (!dev->use_rx_msgqs && bam_handle) {
+ sps_deregister_bam_device(bam_handle);
+ dev->bam.hdl = 0L;
}
-
- return 0;
-rx_msgq_init_failed:
- sps_deregister_bam_device(bam_handle);
- dev->bam.hdl = 0L;
return ret;
}
@@ -1726,8 +1759,8 @@
sps_disconnect(endpoint->sps);
msm_slim_sps_mem_free(dev, descr);
msm_slim_free_endpoint(endpoint);
+ sps_deregister_bam_device(dev->bam.hdl);
}
- sps_deregister_bam_device(dev->bam.hdl);
}
static void msm_slim_prg_slew(struct platform_device *pdev,
@@ -1892,7 +1925,7 @@
goto err_clk_get_failed;
}
clk_set_rate(dev->rclk, SLIM_ROOT_FREQ);
- clk_enable(dev->rclk);
+ clk_prepare_enable(dev->rclk);
/* Component register initialization */
writel_relaxed(1, dev->base + COMP_CFG);
diff --git a/drivers/slimbus/slimbus.c b/drivers/slimbus/slimbus.c
index 6733396..cc008ab 100644
--- a/drivers/slimbus/slimbus.c
+++ b/drivers/slimbus/slimbus.c
@@ -2730,15 +2730,19 @@
* -EXFULL is returned if there is no space in TDM to reserve the bandwidth.
* -EISCONN/-ENOTCONN is returned if the channel is already connected or not
* yet defined.
+ * -EINVAL is returned if individual control of a grouped-channel is attempted.
*/
int slim_control_ch(struct slim_device *sb, u16 chanh,
enum slim_ch_control chctrl, bool commit)
{
struct slim_controller *ctrl = sb->ctrl;
- struct slim_ich *slc;
int ret = 0;
/* Get rid of the group flag in MSB if any */
u8 chan = SLIM_HDL_TO_CHIDX(chanh);
+ struct slim_ich *slc = &ctrl->chans[chan];
+ if (!(slc->nextgrp & SLIM_START_GRP))
+ return -EINVAL;
+
mutex_lock(&sb->sldev_reconf);
mutex_lock(&ctrl->m_ctrl);
do {
diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig
index 648d2e9..6d12c7e 100644
--- a/drivers/spmi/Kconfig
+++ b/drivers/spmi/Kconfig
@@ -19,4 +19,19 @@
This is required for communicating with Qualcomm PMICs and
other devices that have the SPMI interface.
+config MSM_QPNP
+ depends on ARCH_MSMCOPPER
+ depends on OF_SPMI
+ bool "MSM QPNP"
+ help
+ Say 'y' here to include support for the Qualcomm QPNP
+
+config MSM_QPNP_INT
+ depends on SPARSE_IRQ
+ depends on ARCH_MSMCOPPER
+ depends on OF_SPMI
+ bool "MSM QPNP INT"
+ help
+ Say 'y' here to include support for the Qualcomm QPNP interrupt
+ support. QPNP is a SPMI based PMIC implementation.
endif
diff --git a/drivers/spmi/Makefile b/drivers/spmi/Makefile
index 8406134..d59a610 100644
--- a/drivers/spmi/Makefile
+++ b/drivers/spmi/Makefile
@@ -3,3 +3,5 @@
#
obj-$(CONFIG_SPMI) += spmi.o
obj-$(CONFIG_SPMI_MSM_PMIC_ARB) += spmi-pmic-arb.o
+obj-$(CONFIG_MSM_QPNP) += qpnp.o
+obj-$(CONFIG_MSM_QPNP_INT) += qpnp-int.o
diff --git a/drivers/spmi/qpnp-int.c b/drivers/spmi/qpnp-int.c
new file mode 100644
index 0000000..2998c01
--- /dev/null
+++ b/drivers/spmi/qpnp-int.c
@@ -0,0 +1,510 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#define pr_fmt(fmt) "%s: " fmt, __func__
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/err.h>
+#include <linux/module.h>
+#include <linux/list.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/irqdomain.h>
+#include <linux/interrupt.h>
+#include <linux/spmi.h>
+#include <linux/radix-tree.h>
+#include <linux/slab.h>
+#include <linux/printk.h>
+
+#include <asm/irq.h>
+#include <asm/mach/irq.h>
+#include <mach/qpnp-int.h>
+
+#define QPNPINT_MAX_BUSSES 1
+
+/* 16 slave_ids, 256 per_ids per slave, and 8 ints per per_id */
+#define QPNPINT_NR_IRQS (16 * 256 * 8)
+
+enum qpnpint_regs {
+ QPNPINT_REG_RT_STS = 0x10,
+ QPNPINT_REG_SET_TYPE = 0x11,
+ QPNPINT_REG_POLARITY_HIGH = 0x12,
+ QPNPINT_REG_POLARITY_LOW = 0x13,
+ QPNPINT_REG_LATCHED_CLR = 0x14,
+ QPNPINT_REG_EN_SET = 0x15,
+ QPNPINT_REG_EN_CLR = 0x16,
+ QPNPINT_REG_LATCHED_STS = 0x18,
+};
+
+struct q_perip_data {
+ uint8_t type; /* bitmap */
+ uint8_t pol_high; /* bitmap */
+ uint8_t pol_low; /* bitmap */
+ uint8_t int_en; /* bitmap */
+ uint8_t use_count;
+};
+
+struct q_irq_data {
+ uint32_t priv_d; /* data to optimize arbiter interactions */
+ struct q_chip_data *chip_d;
+ struct q_perip_data *per_d;
+ uint8_t mask_shift;
+ uint8_t spmi_slave;
+ uint16_t spmi_offset;
+};
+
+struct q_chip_data {
+ int bus_nr;
+ struct irq_domain domain;
+ struct qpnp_local_int cb;
+ struct spmi_controller *spmi_ctrl;
+ struct radix_tree_root per_tree;
+};
+
+static struct q_chip_data chip_data[QPNPINT_MAX_BUSSES] __read_mostly;
+
+/**
+ * qpnpint_encode_hwirq - translate between qpnp_irq_spec and
+ * hwirq representation.
+ *
+ * slave_offset = (addr->slave * 256 * 8);
+ * perip_offset = slave_offset + (addr->perip * 8);
+ * return perip_offset + addr->irq;
+ */
+static inline int qpnpint_encode_hwirq(struct qpnp_irq_spec *spec)
+{
+ uint32_t hwirq;
+
+ if (spec->slave > 15 || spec->irq > 7)
+ return -EINVAL;
+
+ hwirq = (spec->slave << 11);
+ hwirq |= (spec->per << 3);
+ hwirq |= spec->irq;
+
+ return hwirq;
+}
+/**
+ * qpnpint_decode_hwirq - translate between hwirq and
+ * qpnp_irq_spec representation.
+ */
+static inline int qpnpint_decode_hwirq(unsigned long hwirq,
+ struct qpnp_irq_spec *spec)
+{
+ if (hwirq > 65535)
+ return -EINVAL;
+
+ spec->slave = (hwirq >> 11) & 0xF;
+ spec->per = (hwirq >> 3) & 0xFF;
+ spec->irq = hwirq & 0x7;
+ return 0;
+}
+
+static int qpnpint_spmi_write(struct q_irq_data *irq_d, uint8_t reg,
+ void *buf, uint32_t len)
+{
+ struct q_chip_data *chip_d = irq_d->chip_d;
+ int rc;
+
+ if (!chip_d->spmi_ctrl)
+ return -ENODEV;
+
+ rc = spmi_ext_register_writel(chip_d->spmi_ctrl, irq_d->spmi_slave,
+ irq_d->spmi_offset + reg, buf, len);
+ return rc;
+}
+
+static void qpnpint_irq_mask(struct irq_data *d)
+{
+ struct q_irq_data *irq_d = irq_data_get_irq_chip_data(d);
+ struct q_chip_data *chip_d = irq_d->chip_d;
+ struct q_perip_data *per_d = irq_d->per_d;
+ struct qpnp_irq_spec q_spec;
+ int rc;
+
+ pr_debug("hwirq %lu irq: %d\n", d->hwirq, d->irq);
+
+ if (chip_d->cb.mask) {
+ rc = qpnpint_decode_hwirq(d->hwirq, &q_spec);
+ if (rc)
+ pr_err("%s: decode failed on hwirq %lu\n",
+ __func__, d->hwirq);
+ else
+ chip_d->cb.mask(chip_d->spmi_ctrl, &q_spec,
+ irq_d->priv_d);
+ }
+
+ per_d->int_en &= ~irq_d->mask_shift;
+
+ rc = qpnpint_spmi_write(irq_d, QPNPINT_REG_EN_CLR,
+ (u8 *)&irq_d->mask_shift, 1);
+ if (rc)
+ pr_err("%s: spmi failure on irq %d\n",
+ __func__, d->irq);
+}
+
+static void qpnpint_irq_mask_ack(struct irq_data *d)
+{
+ struct q_irq_data *irq_d = irq_data_get_irq_chip_data(d);
+ struct q_chip_data *chip_d = irq_d->chip_d;
+ struct q_perip_data *per_d = irq_d->per_d;
+ struct qpnp_irq_spec q_spec;
+ int rc;
+
+ pr_debug("hwirq %lu irq: %d mask: 0x%x\n", d->hwirq, d->irq,
+ irq_d->mask_shift);
+
+ if (chip_d->cb.mask) {
+ rc = qpnpint_decode_hwirq(d->hwirq, &q_spec);
+ if (rc)
+ pr_err("%s: decode failed on hwirq %lu\n",
+ __func__, d->hwirq);
+ else
+ chip_d->cb.mask(chip_d->spmi_ctrl, &q_spec,
+ irq_d->priv_d);
+ }
+
+ per_d->int_en &= ~irq_d->mask_shift;
+
+ rc = qpnpint_spmi_write(irq_d, QPNPINT_REG_EN_CLR,
+ &irq_d->mask_shift, 1);
+ if (rc)
+ pr_err("%s: spmi failure on irq %d\n",
+ __func__, d->irq);
+
+ rc = qpnpint_spmi_write(irq_d, QPNPINT_REG_LATCHED_CLR,
+ &irq_d->mask_shift, 1);
+ if (rc)
+ pr_err("%s: spmi failure on irq %d\n",
+ __func__, d->irq);
+}
+
+static void qpnpint_irq_unmask(struct irq_data *d)
+{
+ struct q_irq_data *irq_d = irq_data_get_irq_chip_data(d);
+ struct q_chip_data *chip_d = irq_d->chip_d;
+ struct q_perip_data *per_d = irq_d->per_d;
+ struct qpnp_irq_spec q_spec;
+ int rc;
+
+ pr_debug("hwirq %lu irq: %d\n", d->hwirq, d->irq);
+
+ if (chip_d->cb.unmask) {
+ rc = qpnpint_decode_hwirq(d->hwirq, &q_spec);
+ if (rc)
+ pr_err("%s: decode failed on hwirq %lu\n",
+ __func__, d->hwirq);
+ else
+ chip_d->cb.unmask(chip_d->spmi_ctrl, &q_spec,
+ irq_d->priv_d);
+ }
+
+ per_d->int_en |= irq_d->mask_shift;
+ rc = qpnpint_spmi_write(irq_d, QPNPINT_REG_EN_SET,
+ &irq_d->mask_shift, 1);
+ if (rc)
+ pr_err("%s: spmi failure on irq %d\n",
+ __func__, d->irq);
+}
+
+static int qpnpint_irq_set_type(struct irq_data *d, unsigned int flow_type)
+{
+ struct q_irq_data *irq_d = irq_data_get_irq_chip_data(d);
+ struct q_perip_data *per_d = irq_d->per_d;
+ int rc;
+ u8 buf[3];
+
+ pr_debug("hwirq %lu irq: %d flow: 0x%x\n", d->hwirq,
+ d->irq, flow_type);
+
+ per_d->pol_high &= ~irq_d->mask_shift;
+ per_d->pol_low &= ~irq_d->mask_shift;
+ if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
+ per_d->type |= irq_d->mask_shift; /* edge trig */
+ if (flow_type & IRQF_TRIGGER_RISING)
+ per_d->pol_high |= irq_d->mask_shift;
+ if (flow_type & IRQF_TRIGGER_FALLING)
+ per_d->pol_low |= irq_d->mask_shift;
+ } else {
+ if ((flow_type & IRQF_TRIGGER_HIGH) &&
+ (flow_type & IRQF_TRIGGER_LOW))
+ return -EINVAL;
+ per_d->type &= ~irq_d->mask_shift; /* level trig */
+ if (flow_type & IRQF_TRIGGER_HIGH)
+ per_d->pol_high |= irq_d->mask_shift;
+ else
+ per_d->pol_high &= ~irq_d->mask_shift;
+ }
+
+ buf[0] = per_d->type;
+ buf[1] = per_d->pol_high;
+ buf[2] = per_d->pol_low;
+
+ rc = qpnpint_spmi_write(irq_d, QPNPINT_REG_SET_TYPE, &buf, 3);
+ if (rc)
+ pr_err("%s: spmi failure on irq %d\n",
+ __func__, d->irq);
+ return rc;
+}
+
+static struct irq_chip qpnpint_chip = {
+ .name = "qpnp-int",
+ .irq_mask = qpnpint_irq_mask,
+ .irq_mask_ack = qpnpint_irq_mask_ack,
+ .irq_unmask = qpnpint_irq_unmask,
+ .irq_set_type = qpnpint_irq_set_type,
+};
+
+static int qpnpint_init_irq_data(struct q_chip_data *chip_d,
+ struct q_irq_data *irq_d,
+ unsigned long hwirq)
+{
+ struct qpnp_irq_spec q_spec;
+ int rc;
+
+ irq_d->mask_shift = 1 << (hwirq & 0x7);
+ rc = qpnpint_decode_hwirq(hwirq, &q_spec);
+ if (rc < 0)
+ return rc;
+ irq_d->spmi_slave = q_spec.slave;
+ irq_d->spmi_offset = q_spec.per << 8;
+ irq_d->per_d->use_count++;
+ irq_d->chip_d = chip_d;
+
+ if (chip_d->cb.register_priv_data)
+ rc = chip_d->cb.register_priv_data(chip_d->spmi_ctrl, &q_spec,
+ &irq_d->priv_d);
+ return rc;
+}
+
+static struct q_irq_data *qpnpint_alloc_irq_data(
+ struct q_chip_data *chip_d,
+ unsigned long hwirq)
+{
+ struct q_irq_data *irq_d;
+ struct q_perip_data *per_d;
+
+ irq_d = kzalloc(sizeof(struct q_irq_data), GFP_KERNEL);
+ if (!irq_d)
+ return ERR_PTR(-ENOMEM);
+
+ /**
+ * The Peripheral Tree is keyed from the slave + per_id. We're
+ * ignoring the irq bits here since this peripheral structure
+ * should be common for all irqs on the same peripheral.
+ */
+ per_d = radix_tree_lookup(&chip_d->per_tree, (hwirq & ~0x7));
+ if (!per_d) {
+ per_d = kzalloc(sizeof(struct q_perip_data), GFP_KERNEL);
+ if (!per_d)
+ return ERR_PTR(-ENOMEM);
+ radix_tree_insert(&chip_d->per_tree,
+ (hwirq & ~0x7), per_d);
+ }
+ irq_d->per_d = per_d;
+
+ return irq_d;
+}
+
+static int qpnpint_register_int(uint32_t busno, unsigned long hwirq)
+{
+ int irq, rc;
+ struct irq_domain *domain;
+ struct q_irq_data *irq_d;
+
+ pr_debug("busno = %u hwirq = %lu\n", busno, hwirq);
+
+ if (hwirq < 0 || hwirq >= 32768) {
+ pr_err("%s: hwirq %lu out of qpnp interrupt bounds\n",
+ __func__, hwirq);
+ return -EINVAL;
+ }
+
+ if (busno < 0 || busno > QPNPINT_MAX_BUSSES) {
+ pr_err("%s: invalid bus number %d\n", __func__, busno);
+ return -EINVAL;
+ }
+
+ domain = &chip_data[busno].domain;
+ irq = irq_domain_to_irq(domain, hwirq);
+
+ rc = irq_alloc_desc_at(irq, numa_node_id());
+ if (rc < 0) {
+ if (rc != -EEXIST)
+ pr_err("%s: failed to alloc irq at %d with "
+ "rc %d\n", __func__, irq, rc);
+ return rc;
+ }
+ irq_d = qpnpint_alloc_irq_data(&chip_data[busno], hwirq);
+ if (IS_ERR(irq_d)) {
+ pr_err("%s: failed to alloc irq data %d with "
+ "rc %d\n", __func__, irq, rc);
+ rc = PTR_ERR(irq_d);
+ goto register_err_cleanup;
+ }
+ rc = qpnpint_init_irq_data(&chip_data[busno], irq_d, hwirq);
+ if (rc) {
+ pr_err("%s: failed to init irq data %d with "
+ "rc %d\n", __func__, irq, rc);
+ goto register_err_cleanup;
+ }
+
+ irq_domain_register_irq(domain, hwirq);
+
+ irq_set_chip_and_handler(irq,
+ &qpnpint_chip,
+ handle_level_irq);
+ irq_set_chip_data(irq, irq_d);
+#ifdef CONFIG_ARM
+ set_irq_flags(irq, IRQF_VALID);
+#else
+ irq_set_noprobe(irq);
+#endif
+ return 0;
+
+register_err_cleanup:
+ irq_free_desc(irq);
+ if (!IS_ERR(irq_d)) {
+ if (irq_d->per_d->use_count == 1)
+ kfree(irq_d->per_d);
+ else
+ irq_d->per_d->use_count--;
+ kfree(irq_d);
+ }
+ return rc;
+}
+
+static int qpnpint_irq_domain_dt_translate(struct irq_domain *d,
+ struct device_node *controller,
+ const u32 *intspec, unsigned int intsize,
+ unsigned long *out_hwirq,
+ unsigned int *out_type)
+{
+ struct qpnp_irq_spec addr;
+ struct q_chip_data *chip_d = d->priv;
+ int ret;
+
+ pr_debug("%s: intspec[0] 0x%x intspec[1] 0x%x intspec[2] 0x%x\n",
+ __func__, intspec[0], intspec[1], intspec[2]);
+
+ if (d->of_node != controller)
+ return -EINVAL;
+ if (intsize != 3)
+ return -EINVAL;
+
+ addr.irq = intspec[2] & 0x7;
+ addr.per = intspec[1] & 0xFF;
+ addr.slave = intspec[0] & 0xF;
+
+ ret = qpnpint_encode_hwirq(&addr);
+ if (ret < 0) {
+ pr_err("%s: invalid intspec\n", __func__);
+ return ret;
+ }
+ *out_hwirq = ret;
+ *out_type = IRQ_TYPE_NONE;
+
+ /**
+ * Register the interrupt if it's not already registered.
+ * This implies that mapping a qpnp interrupt allocates
+ * resources.
+ */
+ ret = qpnpint_register_int(chip_d->bus_nr, *out_hwirq);
+ if (ret && ret != -EEXIST) {
+ pr_err("%s: Cannot register hwirq %lu\n", __func__, *out_hwirq);
+ return ret;
+ }
+
+ return 0;
+}
+
+const struct irq_domain_ops qpnpint_irq_domain_ops = {
+ .dt_translate = qpnpint_irq_domain_dt_translate,
+};
+
+int qpnpint_register_controller(unsigned int busno,
+ struct qpnp_local_int *li_cb)
+{
+ if (busno >= QPNPINT_MAX_BUSSES)
+ return -EINVAL;
+ chip_data[busno].cb = *li_cb;
+ chip_data[busno].spmi_ctrl = spmi_busnum_to_ctrl(busno);
+ if (!chip_data[busno].spmi_ctrl)
+ return -ENOENT;
+
+ return 0;
+}
+EXPORT_SYMBOL(qpnpint_register_controller);
+
+int qpnpint_handle_irq(struct spmi_controller *spmi_ctrl,
+ struct qpnp_irq_spec *spec)
+{
+ struct irq_domain *domain;
+ unsigned long hwirq, busno;
+ int irq;
+
+ pr_debug("spec slave = %u per = %u irq = %u\n",
+ spec->slave, spec->per, spec->irq);
+
+ if (!spec || !spmi_ctrl)
+ return -EINVAL;
+
+ busno = spmi_ctrl->nr;
+ if (busno >= QPNPINT_MAX_BUSSES)
+ return -EINVAL;
+
+ hwirq = qpnpint_encode_hwirq(spec);
+ if (hwirq < 0) {
+ pr_err("%s: invalid irq spec passed\n", __func__);
+ return -EINVAL;
+ }
+
+ domain = &chip_data[busno].domain;
+ irq = irq_domain_to_irq(domain, hwirq);
+
+ generic_handle_irq(irq);
+
+ return 0;
+}
+EXPORT_SYMBOL(qpnpint_handle_irq);
+
+/**
+ * This assumes that there's a relationship between the order of the interrupt
+ * controllers specified to of_irq_match() is the SPMI device topology. If
+ * this ever turns out to be a bad assumption, then of_irq_init_cb_t should
+ * be modified to pass a parameter to this function.
+ */
+static int qpnpint_cnt __initdata;
+
+int __init qpnpint_of_init(struct device_node *node, struct device_node *parent)
+{
+ struct q_chip_data *chip_d = &chip_data[qpnpint_cnt];
+ struct irq_domain *domain = &chip_d->domain;
+
+ INIT_RADIX_TREE(&chip_d->per_tree, GFP_ATOMIC);
+
+ domain->irq_base = irq_domain_find_free_range(0, QPNPINT_NR_IRQS);
+ domain->nr_irq = QPNPINT_NR_IRQS;
+ domain->of_node = of_node_get(node);
+ domain->priv = chip_d;
+ domain->ops = &qpnpint_irq_domain_ops;
+ irq_domain_add(domain);
+
+ pr_info("irq_base = %d\n", domain->irq_base);
+
+ qpnpint_cnt++;
+
+ return 0;
+}
+EXPORT_SYMBOL(qpnpint_of_init);
diff --git a/drivers/spmi/qpnp.c b/drivers/spmi/qpnp.c
new file mode 100644
index 0000000..ddf9000
--- /dev/null
+++ b/drivers/spmi/qpnp.c
@@ -0,0 +1,55 @@
+/* Copyright (c) 2002-3 Patrick Mochel
+ * Copyright (c) 2002-3 Open Source Development Labs
+ * Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Resource handling based on platform.c.
+ */
+
+#include <mach/qpnp.h>
+
+/**
+ * qpnp_get_resource - get a resource for a device
+ * @dev: qpnp device
+ * @type: resource type
+ * @num: resource index
+ */
+struct resource *qpnp_get_resource(struct spmi_device *dev,
+ unsigned int node_idx, unsigned int type,
+ unsigned int res_num)
+{
+ int i;
+
+ for (i = 0; i < dev->dev_node[node_idx].num_resources; i++) {
+ struct resource *r = &dev->dev_node[node_idx].resource[i];
+
+ if (type == resource_type(r) && res_num-- == 0)
+ return r;
+ }
+ return NULL;
+}
+EXPORT_SYMBOL_GPL(qpnp_get_resource);
+
+/**
+ * qpnp_get_irq - get an IRQ for a device
+ * @dev: qpnp device
+ * @num: IRQ number index
+ */
+int qpnp_get_irq(struct spmi_device *dev, unsigned int node_idx,
+ unsigned int res_num)
+{
+ struct resource *r = qpnp_get_resource(dev, node_idx,
+ IORESOURCE_IRQ, res_num);
+
+ return r ? r->start : -ENXIO;
+}
+EXPORT_SYMBOL_GPL(qpnp_get_irq);
+
diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
index e5a9d40..632db71 100644
--- a/drivers/spmi/spmi-pmic-arb.c
+++ b/drivers/spmi/spmi-pmic-arb.c
@@ -78,8 +78,14 @@
#define PMIC_ARB_MAX_PERIPHS 256
#define PMIC_ARB_PERIPH_ID_VALID (1 << 15)
#define PMIC_ARB_TIMEOUT_US 100
-#define PMIC_ARB_APID_MASK 0xFF
-#define PMIC_ARB_PPID_MASK 0xFFF
+
+#define PMIC_ARB_APID_MASK 0xFF
+#define PMIC_ARB_PPID_MASK 0xFFF
+/* extract PPID and APID from interrupt map in .dts config file format */
+#define PMIC_ARB_DEV_TRE_2_PPID(MAP_COMPRS_VAL) \
+ ((MAP_COMPRS_VAL) >> (20))
+#define PMIC_ARB_DEV_TRE_2_APID(MAP_COMPRS_VAL) \
+ ((MAP_COMPRS_VAL) & PMIC_ARB_APID_MASK)
/**
* base - base address of the PMIC Arbiter core registers.
@@ -504,7 +510,7 @@
int ret;
int map_size;
u32 *map_data;
- const int map_width = 2 * sizeof(*map_data);
+ const int map_width = sizeof(*map_data);
const struct device_node *of_node = pdev->dev.of_node;
/* Get size of the mapping table (in bytes) */
@@ -514,8 +520,7 @@
}
/* Map size can't exceed the maximum number of peripherals */
- if (map_size == 0 || map_size % map_width ||
- map_size > map_width * PMIC_ARB_MAX_PERIPHS) {
+ if (map_size == 0 || map_size > map_width * PMIC_ARB_MAX_PERIPHS) {
dev_err(&pdev->dev, "map size of %d is not valid\n", map_size);
return -ENODEV;
}
@@ -538,20 +543,9 @@
/* Build the mapping table from the data */
for (i = 0; i < map_size/sizeof(u32);) {
- u32 ppid = map_data[i++];
- u32 apid = map_data[i++];
-
- if (apid > PMIC_ARB_APID_MASK) {
- ret = -ENODEV;
- dev_err(&pdev->dev, "invalid APID: 0x%x\n", apid);
- goto err;
- }
-
- if (ppid > PMIC_ARB_PPID_MASK) {
- ret = -ENODEV;
- dev_err(&pdev->dev, "invalid PPID: 0x%x\n", ppid);
- goto err;
- }
+ u32 map_compressed_val = map_data[i++];
+ u32 ppid = PMIC_ARB_DEV_TRE_2_PPID(map_compressed_val) ;
+ u32 apid = PMIC_ARB_DEV_TRE_2_APID(map_compressed_val) ;
if (pmic_arb->periph_id_map[apid] & PMIC_ARB_PERIPH_ID_VALID)
dev_warn(&pdev->dev, "duplicate APID 0x%x\n", apid);
diff --git a/drivers/spmi/spmi.c b/drivers/spmi/spmi.c
index 2842cd8..20a290a 100644
--- a/drivers/spmi/spmi.c
+++ b/drivers/spmi/spmi.c
@@ -233,9 +233,9 @@
spmidev->name = info->name;
spmidev->sid = info->slave_id;
spmidev->dev.of_node = info->of_node;
- spmidev->resource = info->resource;
- spmidev->num_resources = info->num_resources;
spmidev->dev.platform_data = (void *)info->platform_data;
+ spmidev->num_dev_node = info->num_dev_node;
+ spmidev->dev_node = info->dev_node;
rc = spmi_add_device(spmidev);
if (rc < 0) {
diff --git a/drivers/staging/android/ram_console.c b/drivers/staging/android/ram_console.c
index cb42d89..93730ae 100644
--- a/drivers/staging/android/ram_console.c
+++ b/drivers/staging/android/ram_console.c
@@ -155,7 +155,7 @@
ram_console.flags &= ~CON_ENABLED;
}
-static void __init
+static void __devinit
ram_console_save_old(struct ram_console_buffer *buffer, const char *bootinfo,
char *dest)
{
@@ -239,7 +239,7 @@
}
}
-static int __init ram_console_init(struct ram_console_buffer *buffer,
+static int __devinit ram_console_init(struct ram_console_buffer *buffer,
size_t buffer_size, const char *bootinfo,
char *old_buf)
{
@@ -336,7 +336,7 @@
ram_console_old_log_init_buffer);
}
#else
-static int ram_console_driver_probe(struct platform_device *pdev)
+static int __devinit ram_console_driver_probe(struct platform_device *pdev)
{
struct resource *res = pdev->resource;
size_t start;
diff --git a/drivers/staging/westbridge/astoria/gadget/cyasgadget.c b/drivers/staging/westbridge/astoria/gadget/cyasgadget.c
index be851ca..2ec93d2 100644
--- a/drivers/staging/westbridge/astoria/gadget/cyasgadget.c
+++ b/drivers/staging/westbridge/astoria/gadget/cyasgadget.c
@@ -1595,12 +1595,18 @@
return 0;
}
+static int cyasgadget_start(struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *));
+static int cyasgadget_stop(struct usb_gadget_driver *driver);
+
static const struct usb_gadget_ops cyasgadget_ops = {
.get_frame = cyasgadget_get_frame,
.wakeup = cyasgadget_wakeup,
.set_selfpowered = cyasgadget_set_selfpowered,
.pullup = cyasgadget_pullup,
.ioctl = cyasgadget_ioctl,
+ .start = cyasgadget_start,
+ .stop = cyasgadget_stop,
};
@@ -1883,7 +1889,7 @@
* disconnect is reported. then a host may connect again, or
* the driver might get unbound.
*/
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int cyasgadget_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
cyasgadget *dev = cy_as_gadget_controller;
@@ -1938,7 +1944,6 @@
return 0;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
static void cyasgadget_nuke(
cyasgadget_ep *an_ep
@@ -2011,7 +2016,7 @@
#endif
}
-int usb_gadget_unregister_driver(
+static int cyasgadget_stop(
struct usb_gadget_driver *driver
)
{
@@ -2040,7 +2045,6 @@
return 0;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
static void cyas_gadget_release(
struct device *_dev
@@ -2071,6 +2075,7 @@
#endif
return;
}
+ usb_del_gadget_udc(&cy_as_dev->gadget);
if (cy_as_dev->driver) {
/* should have been done already by driver model core */
@@ -2131,6 +2136,19 @@
/* We are done now */
cy_as_gadget_controller = cy_as_dev;
+
+ /*
+ * We actually want to use "cy_as_dev->gadget.dev.parent", but we just
+ * don't have a parent in this driver implementation. Therefore, in
+ * order to still allow calling to usb_add_gadget_udc, we send for now
+ * &cy_as_dev->gadget.dev, so the parent of the udc-core will be
+ * actually the usb_gadget it holds.
+ */
+ retval = usb_add_gadget_udc(&cy_as_dev->gadget.dev, &cy_as_dev->gadget);
+ if (retval)
+ goto done;
+
+
return 0;
/*
diff --git a/drivers/thermal/msm8960_tsens.c b/drivers/thermal/msm8960_tsens.c
index 0e279b8..c38b279 100644
--- a/drivers/thermal/msm8960_tsens.c
+++ b/drivers/thermal/msm8960_tsens.c
@@ -920,7 +920,7 @@
}
for (i = 0; i < tmdev->tsens_num_sensor; i++) {
- char name[17];
+ char name[18];
snprintf(name, sizeof(name), "tsens_tz_sensor%d", i);
tmdev->sensor[i].mode = THERMAL_DEVICE_ENABLED;
tmdev->sensor[i].sensor_num = i;
diff --git a/drivers/thermal/msm_thermal.c b/drivers/thermal/msm_thermal.c
index ef28844..c6ba24e 100644
--- a/drivers/thermal/msm_thermal.c
+++ b/drivers/thermal/msm_thermal.c
@@ -18,6 +18,7 @@
#include <linux/mutex.h>
#include <linux/msm_tsens.h>
#include <linux/workqueue.h>
+#include <linux/cpu.h>
#define DEF_TEMP_SENSOR 0
#define DEF_THERMAL_CHECK_MS 1000
@@ -34,13 +35,11 @@
module_param(allowed_max_freq, int, 0);
module_param(check_interval_ms, int, 0);
-static DEFINE_PER_CPU(struct cpufreq_policy*, policy);
-static struct mutex policy_mutex;
static struct delayed_work check_temp_work;
-static int update_cpu_max_freq(int cpu, int max_freq)
+static int update_cpu_max_freq(struct cpufreq_policy *cpu_policy,
+ int cpu, int max_freq)
{
- struct cpufreq_policy *cpu_policy = per_cpu(policy, cpu);
int ret = 0;
if (!cpu_policy)
@@ -68,7 +67,6 @@
int cpu = 0;
int ret = 0;
- mutex_lock(&policy_mutex);
tsens_dev.sensor_num = DEF_TEMP_SENSOR;
ret = tsens_get_temp(&tsens_dev, &temp);
if (ret) {
@@ -78,70 +76,57 @@
}
for_each_possible_cpu(cpu) {
- cpu_policy = per_cpu(policy, cpu);
+ update_policy = 0;
+ cpu_policy = cpufreq_cpu_get(cpu);
if (!cpu_policy) {
- pr_debug("msm_thermal: No CPUFreq policy found for "
- "cpu %d\n", cpu);
+ pr_debug("msm_thermal: NULL policy on cpu %d\n", cpu);
continue;
}
if (temp >= allowed_max_high) {
if (cpu_policy->max > allowed_max_freq) {
update_policy = 1;
max_freq = allowed_max_freq;
+ } else {
+ pr_debug("msm_thermal: policy max for cpu %d "
+ "already < allowed_max_freq\n", cpu);
}
} else if (temp < allowed_max_low) {
if (cpu_policy->max < cpu_policy->cpuinfo.max_freq) {
max_freq = cpu_policy->cpuinfo.max_freq;
update_policy = 1;
+ } else {
+ pr_debug("msm_thermal: policy max for cpu %d "
+ "already at max allowed\n", cpu);
}
}
if (update_policy)
- update_cpu_max_freq(cpu, max_freq);
+ update_cpu_max_freq(cpu_policy, cpu, max_freq);
+
+ cpufreq_cpu_put(cpu_policy);
}
reschedule:
if (enabled)
schedule_delayed_work(&check_temp_work,
msecs_to_jiffies(check_interval_ms));
-
- mutex_unlock(&policy_mutex);
}
-static int msm_thermal_notifier(struct notifier_block *nb,
- unsigned long event, void *data)
-{
- if (event == CPUFREQ_START) {
- struct cpufreq_policy *cpu_policy = data;
- mutex_lock(&policy_mutex);
- per_cpu(policy, cpu_policy->cpu) = cpu_policy;
- mutex_unlock(&policy_mutex);
- }
-
- return 0;
-}
-
-static struct notifier_block msm_thermal_notifier_block = {
- .notifier_call = msm_thermal_notifier,
-};
-
static void disable_msm_thermal(void)
{
int cpu = 0;
struct cpufreq_policy *cpu_policy = NULL;
- cpufreq_unregister_notifier(&msm_thermal_notifier_block,
- CPUFREQ_POLICY_NOTIFIER);
- cancel_delayed_work(&check_temp_work);
-
- mutex_lock(&policy_mutex);
for_each_possible_cpu(cpu) {
- cpu_policy = per_cpu(policy, cpu);
- if (cpu_policy &&
- cpu_policy->max < cpu_policy->cpuinfo.max_freq)
- update_cpu_max_freq(cpu, cpu_policy->cpuinfo.max_freq);
+ cpu_policy = cpufreq_cpu_get(cpu);
+ if (cpu_policy) {
+ if (cpu_policy->max < cpu_policy->cpuinfo.max_freq)
+ update_cpu_max_freq(cpu_policy, cpu,
+ cpu_policy->
+ cpuinfo.max_freq);
+ cpufreq_cpu_put(cpu_policy);
+ }
}
- mutex_unlock(&policy_mutex);
}
static int set_enabled(const char *val, const struct kernel_param *kp)
@@ -172,12 +157,8 @@
int ret = 0;
enabled = 1;
- mutex_init(&policy_mutex);
INIT_DELAYED_WORK(&check_temp_work, check_temp);
- ret = cpufreq_register_notifier(&msm_thermal_notifier_block,
- CPUFREQ_POLICY_NOTIFIER);
-
schedule_delayed_work(&check_temp_work, 0);
return ret;
diff --git a/drivers/tty/serial/msm_serial_hs_hwreg.h b/drivers/tty/serial/msm_serial_hs_hwreg.h
index fa7d518..780a3c2 100644
--- a/drivers/tty/serial/msm_serial_hs_hwreg.h
+++ b/drivers/tty/serial/msm_serial_hs_hwreg.h
@@ -51,7 +51,9 @@
UARTDM_NCF_TX,
UARTDM_DMEN,
UARTDM_BCR,
- UARTDM_LAST
+ UARTDM_TXFS,
+ UARTDM_RXFS,
+ UARTDM_LAST,
};
#define UARTDM_MR1_ADDR 0x0
@@ -118,6 +120,7 @@
#define UARTDM_ISR_ADDR 0x14
#define UARTDM_RX_TOTAL_SNAP_ADDR 0x38
+#define UARTDM_TXFS_ADDR 0x4C
#define UARTDM_RXFS_ADDR 0x50
/* Register field Mask Mapping */
diff --git a/drivers/tty/serial/msm_serial_hs_lite.c b/drivers/tty/serial/msm_serial_hs_lite.c
index f49769d..9a8d552 100644
--- a/drivers/tty/serial/msm_serial_hs_lite.c
+++ b/drivers/tty/serial/msm_serial_hs_lite.c
@@ -61,6 +61,7 @@
int is_uartdm;
unsigned int old_snap_state;
unsigned int ver_id;
+ int tx_timeout;
};
#define UARTDM_VERSION_11_13 0
@@ -89,6 +90,8 @@
[UARTDM_DMRX] = UARTDM_DMRX_ADDR,
[UARTDM_NCF_TX] = UARTDM_NCF_TX_ADDR,
[UARTDM_DMEN] = UARTDM_DMEN_ADDR,
+ [UARTDM_TXFS] = UARTDM_TXFS_ADDR,
+ [UARTDM_RXFS] = UARTDM_RXFS_ADDR,
},
[UARTDM_VERSION_14] = {
[UARTDM_MR1] = 0x0,
@@ -108,6 +111,8 @@
[UARTDM_DMRX] = 0x34,
[UARTDM_NCF_TX] = 0x40,
[UARTDM_DMEN] = 0x3c,
+ [UARTDM_TXFS] = 0x4c,
+ [UARTDM_RXFS] = 0x50,
},
};
@@ -119,6 +124,7 @@
};
static struct dentry *debug_base;
static inline void wait_for_xmitr(struct uart_port *port, int bits);
+static int get_console_state(struct uart_port *port);
static inline void msm_hsl_write(struct uart_port *port,
unsigned int val, unsigned int off)
{
@@ -611,6 +617,9 @@
break;
}
+ /* Set timeout to be ~100x the character transmit time */
+ msm_hsl_port->tx_timeout = 1000000000 / baud;
+
vid = msm_hsl_port->ver_id;
msm_hsl_write(port, baud_code, regmap[vid][UARTDM_CSR]);
@@ -639,7 +648,7 @@
/* enable TX & RX */
msm_hsl_write(port, data, regmap[vid][UARTDM_CR]);
- msm_hsl_write(port, RESET_STALE_INT, UARTDM_CR_ADDR);
+ msm_hsl_write(port, RESET_STALE_INT, regmap[vid][UARTDM_CR]);
/* turn on RX and CTS interrupts */
msm_hsl_port->imr = UARTDM_ISR_RXSTALE_BMSK
| UARTDM_ISR_DELTA_CTS_BMSK | UARTDM_ISR_RXLEV_BMSK;
@@ -1041,12 +1050,51 @@
return &msm_hsl_uart_ports[line].uart;
}
+static unsigned int msm_hsl_console_state[8];
+
+static void dump_hsl_regs(struct uart_port *port)
+{
+ struct msm_hsl_port *msm_hsl_port = UART_TO_MSM(port);
+ unsigned int vid = msm_hsl_port->ver_id;
+ unsigned int sr, isr, mr1, mr2, ncf, txfs, rxfs, con_state;
+
+ sr = msm_hsl_read(port, regmap[vid][UARTDM_SR]);
+ isr = msm_hsl_read(port, regmap[vid][UARTDM_ISR]);
+ mr1 = msm_hsl_read(port, regmap[vid][UARTDM_MR1]);
+ mr2 = msm_hsl_read(port, regmap[vid][UARTDM_MR2]);
+ ncf = msm_hsl_read(port, regmap[vid][UARTDM_NCF_TX]);
+ txfs = msm_hsl_read(port, regmap[vid][UARTDM_TXFS]);
+ rxfs = msm_hsl_read(port, regmap[vid][UARTDM_RXFS]);
+ con_state = get_console_state(port);
+
+ msm_hsl_console_state[0] = sr;
+ msm_hsl_console_state[1] = isr;
+ msm_hsl_console_state[2] = mr1;
+ msm_hsl_console_state[3] = mr2;
+ msm_hsl_console_state[4] = ncf;
+ msm_hsl_console_state[5] = txfs;
+ msm_hsl_console_state[6] = rxfs;
+ msm_hsl_console_state[7] = con_state;
+
+ pr_info("%s(): Timeout: %d uS\n", __func__, msm_hsl_port->tx_timeout);
+ pr_info("%s(): SR: %08x\n", __func__, sr);
+ pr_info("%s(): ISR: %08x\n", __func__, isr);
+ pr_info("%s(): MR1: %08x\n", __func__, mr1);
+ pr_info("%s(): MR2: %08x\n", __func__, mr2);
+ pr_info("%s(): NCF: %08x\n", __func__, ncf);
+ pr_info("%s(): TXFS: %08x\n", __func__, txfs);
+ pr_info("%s(): RXFS: %08x\n", __func__, rxfs);
+ pr_info("%s(): Console state: %d\n", __func__, con_state);
+}
+
/*
* Wait for transmitter & holding register to empty
* Derived from wait_for_xmitr in 8250 serial driver by Russell King */
void wait_for_xmitr(struct uart_port *port, int bits)
{
- unsigned int vid = UART_TO_MSM(port)->ver_id;
+ struct msm_hsl_port *msm_hsl_port = UART_TO_MSM(port);
+ unsigned int vid = msm_hsl_port->ver_id;
+ int count = 0;
if (!(msm_hsl_read(port, regmap[vid][UARTDM_SR]) &
UARTDM_SR_TXEMT_BMSK)) {
@@ -1055,6 +1103,10 @@
udelay(1);
touch_nmi_watchdog();
cpu_relax();
+ if (++count == msm_hsl_port->tx_timeout) {
+ dump_hsl_regs(port);
+ panic("MSM HSL wait_for_xmitr is stuck!");
+ }
}
msm_hsl_write(port, CLEAR_TX_READY, regmap[vid][UARTDM_CR]);
}
@@ -1067,13 +1119,12 @@
wait_for_xmitr(port, UARTDM_ISR_TX_READY_BMSK);
msm_hsl_write(port, 1, regmap[vid][UARTDM_NCF_TX]);
-
- while (!(msm_hsl_read(port, regmap[vid][UARTDM_SR]) &
- UARTDM_SR_TXRDY_BMSK)) {
- udelay(1);
- touch_nmi_watchdog();
- }
-
+ /*
+ * Dummy read to add 1 AHB clock delay to fix UART hardware bug.
+ * Bug: Delay required on TX-transfer-init. after writing to
+ * NO_CHARS_FOR_TX register.
+ */
+ msm_hsl_read(port, regmap[vid][UARTDM_SR]);
msm_hsl_write(port, ch, regmap[vid][UARTDM_TF]);
}
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 48f1781..288b570 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -110,6 +110,8 @@
source "drivers/usb/core/Kconfig"
+source "drivers/usb/dwc3/Kconfig"
+
source "drivers/usb/mon/Kconfig"
source "drivers/usb/wusbcore/Kconfig"
diff --git a/drivers/usb/Makefile b/drivers/usb/Makefile
index ef69048..0fd0bbd 100644
--- a/drivers/usb/Makefile
+++ b/drivers/usb/Makefile
@@ -6,6 +6,8 @@
obj-$(CONFIG_USB) += core/
+obj-$(CONFIG_USB_DWC3) += dwc3/
+
obj-$(CONFIG_USB_MON) += mon/
obj-$(CONFIG_USB_OTG_UTILS) += otg/
diff --git a/drivers/usb/core/driver.c b/drivers/usb/core/driver.c
index 97c5690..5cd6bb1 100644
--- a/drivers/usb/core/driver.c
+++ b/drivers/usb/core/driver.c
@@ -1285,10 +1285,20 @@
struct usb_bus *bus =
container_of(work, struct usb_bus, hnp_polling.work);
struct usb_device *udev = bus->root_hub->children[bus->otg_port - 1];
- u8 *status = kmalloc(sizeof(*status), GFP_KERNEL);
+ u8 *status = NULL;
+ /*
+ * The OTG-B device must hand back the host role to OTG PET
+ * within 100 msec irrespective of host_request flag.
+ */
+ if (bus->quick_hnp) {
+ bus->quick_hnp = 0;
+ goto start_hnp;
+ }
+
+ status = kmalloc(sizeof(*status), GFP_KERNEL);
if (!status)
- return;
+ goto reschedule;
ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
USB_REQ_GET_STATUS, USB_DIR_IN | USB_RECIP_DEVICE,
@@ -1300,17 +1310,20 @@
goto out;
}
- /* Spec says host must suspend the bus with in 2 sec. */
- if (*status & (1 << HOST_REQUEST_FLAG)) {
- do_unbind_rebind(udev, DO_UNBIND);
- udev->do_remote_wakeup = device_may_wakeup(&udev->dev);
- ret = usb_suspend_both(udev, PMSG_USER_SUSPEND);
- if (ret)
- dev_info(&udev->dev, "suspend failed\n");
- } else {
- schedule_delayed_work(&bus->hnp_polling,
- msecs_to_jiffies(THOST_REQ_POLL));
- }
+ if (!(*status & (1 << HOST_REQUEST_FLAG)))
+ goto reschedule;
+
+start_hnp:
+ do_unbind_rebind(udev, DO_UNBIND);
+ udev->do_remote_wakeup = device_may_wakeup(&udev->dev);
+ ret = usb_suspend_both(udev, PMSG_USER_SUSPEND);
+ if (ret)
+ dev_info(&udev->dev, "suspend failed\n");
+ goto out;
+
+reschedule:
+ schedule_delayed_work(&bus->hnp_polling,
+ msecs_to_jiffies(THOST_REQ_POLL));
out:
kfree(status);
}
diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index 5442297..7347c3d 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -1690,7 +1690,7 @@
#ifdef CONFIG_USB_OTG
if (udev->bus->hnp_support && udev->portnum == udev->bus->otg_port) {
- cancel_delayed_work(&udev->bus->hnp_polling);
+ cancel_delayed_work_sync(&udev->bus->hnp_polling);
udev->bus->hnp_support = 0;
}
#endif
@@ -1778,6 +1778,7 @@
int err = 0;
#ifdef CONFIG_USB_OTG
+ bool old_otg = false;
/*
* OTG-aware devices on OTG-capable root hubs may be able to use SRP,
* to wake us after we've powered off VBUS; and HNP, switching roles
@@ -1811,7 +1812,10 @@
* compliant to revision 2.0 or subsequent
* versions.
*/
- if (le16_to_cpu(desc->bcdOTG) >= 0x0200)
+
+ if ((le16_to_cpu(desc->bLength) ==
+ USB_DT_OTG_SIZE) &&
+ le16_to_cpu(desc->bcdOTG) >= 0x0200)
goto out;
/* Legacy B-device i.e compliant to spec
@@ -1819,6 +1823,7 @@
* a_hnp_support or b_hnp_enable before
* selecting configuration.
*/
+ old_otg = true;
/* enable HNP before suspend, it's simpler */
err = usb_control_msg(udev,
@@ -1839,6 +1844,14 @@
}
}
out:
+ if ((udev->quirks & USB_QUIRK_OTG_PET)) {
+ if (le16_to_cpu(udev->descriptor.bcdDevice) &
+ OTG_TTST_VBUS_OFF)
+ udev->bus->otg_vbus_off = 1;
+ if (udev->bus->is_b_host || old_otg)
+ udev->bus->quick_hnp = 1;
+ }
+
if (!is_targeted(udev)) {
otg_send_event(OTG_EVENT_DEV_NOT_SUPPORTED);
@@ -1859,8 +1872,12 @@
* re-armed if device returns STALL. B-Host also perform
* HNP polling.
*/
- schedule_delayed_work(&udev->bus->hnp_polling,
- msecs_to_jiffies(THOST_REQ_POLL));
+ if (udev->bus->quick_hnp)
+ schedule_delayed_work(&udev->bus->hnp_polling,
+ msecs_to_jiffies(OTG_TTST_SUSP));
+ else
+ schedule_delayed_work(&udev->bus->hnp_polling,
+ msecs_to_jiffies(THOST_REQ_POLL));
}
#endif
return err;
diff --git a/drivers/usb/core/otg_whitelist.h b/drivers/usb/core/otg_whitelist.h
index cec4167..7bb6747 100644
--- a/drivers/usb/core/otg_whitelist.h
+++ b/drivers/usb/core/otg_whitelist.h
@@ -59,6 +59,11 @@
le16_to_cpu(dev->descriptor.idProduct) == 0xbadd))
return 0;
+ /* OTG PET device is always targeted (see OTG 2.0 ECN 6.4.2) */
+ if ((le16_to_cpu(dev->descriptor.idVendor) == 0x1a0a &&
+ le16_to_cpu(dev->descriptor.idProduct) == 0x0200))
+ return 1;
+
/* NOTE: can't use usb_match_id() since interface caches
* aren't set up yet. this is cut/paste from that code.
*/
diff --git a/drivers/usb/core/quirks.c b/drivers/usb/core/quirks.c
index 81ce6a8..d5a29b3 100644
--- a/drivers/usb/core/quirks.c
+++ b/drivers/usb/core/quirks.c
@@ -96,6 +96,9 @@
/* INTEL VALUE SSD */
{ USB_DEVICE(0x8086, 0xf1a5), .driver_info = USB_QUIRK_RESET_RESUME },
+ /* Protocol and OTG Electrical Test Device */
+ { USB_DEVICE(0x1a0a, 0x0200), .driver_info = USB_QUIRK_OTG_PET },
+
{ } /* terminating entry must be last */
};
diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
new file mode 100644
index 0000000..3c1d67d
--- /dev/null
+++ b/drivers/usb/dwc3/Kconfig
@@ -0,0 +1,25 @@
+config USB_DWC3
+ tristate "DesignWare USB3 DRD Core Support"
+ depends on (USB || USB_GADGET)
+ select USB_OTG_UTILS
+ help
+ Say Y or M here if your system has a Dual Role SuperSpeed
+ USB controller based on the DesignWare USB3 IP Core.
+
+ If you choose to build this driver is a dynamically linked
+ module, the module will be called dwc3.ko.
+
+if USB_DWC3
+
+config USB_DWC3_DEBUG
+ bool "Enable Debugging Messages"
+ help
+ Say Y here to enable debugging messages on DWC3 Driver.
+
+config USB_DWC3_VERBOSE
+ bool "Enable Verbose Debugging Messages"
+ depends on USB_DWC3_DEBUG
+ help
+ Say Y here to enable verbose debugging messages on DWC3 Driver.
+
+endif
diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
new file mode 100644
index 0000000..593d1db
--- /dev/null
+++ b/drivers/usb/dwc3/Makefile
@@ -0,0 +1,36 @@
+ccflags-$(CONFIG_USB_DWC3_DEBUG) := -DDEBUG
+ccflags-$(CONFIG_USB_DWC3_VERBOSE) += -DVERBOSE_DEBUG
+
+obj-$(CONFIG_USB_DWC3) += dwc3.o
+
+dwc3-y := core.o
+
+ifneq ($(CONFIG_USB_GADGET_DWC3),)
+ dwc3-y += gadget.o ep0.o
+endif
+
+ifneq ($(CONFIG_DEBUG_FS),)
+ dwc3-y += debugfs.o
+endif
+
+##
+# Platform-specific glue layers go here
+#
+# NOTICE: Make sure your glue layer doesn't depend on anything
+# which is arch-specific and that it compiles on all situations.
+#
+# We want to keep this requirement in order to be able to compile
+# the entire driver (with all its glue layers) on several architectures
+# and make sure it compiles fine. This will also help with allmodconfig
+# and allyesconfig builds.
+#
+# The only exception is the PCI glue layer, but that's only because
+# PCI doesn't provide nops if CONFIG_PCI isn't enabled.
+##
+
+obj-$(CONFIG_USB_DWC3) += dwc3-omap.o
+
+ifneq ($(CONFIG_PCI),)
+ obj-$(CONFIG_USB_DWC3) += dwc3-pci.o
+endif
+
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
new file mode 100644
index 0000000..717ebc9
--- /dev/null
+++ b/drivers/usb/dwc3/core.c
@@ -0,0 +1,484 @@
+/**
+ * core.c - DesignWare USB3 DRD Controller Core file
+ *
+ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Authors: Felipe Balbi <balbi@ti.com>,
+ * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2, as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/io.h>
+#include <linux/list.h>
+#include <linux/delay.h>
+#include <linux/dma-mapping.h>
+
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+#include <linux/module.h>
+
+#include "core.h"
+#include "gadget.h"
+#include "io.h"
+
+#include "debug.h"
+
+/**
+ * dwc3_core_soft_reset - Issues core soft reset and PHY reset
+ * @dwc: pointer to our context structure
+ */
+static void dwc3_core_soft_reset(struct dwc3 *dwc)
+{
+ u32 reg;
+
+ /* Before Resetting PHY, put Core in Reset */
+ reg = dwc3_readl(dwc->regs, DWC3_GCTL);
+ reg |= DWC3_GCTL_CORESOFTRESET;
+ dwc3_writel(dwc->regs, DWC3_GCTL, reg);
+
+ /* Assert USB3 PHY reset */
+ reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
+ reg |= DWC3_GUSB3PIPECTL_PHYSOFTRST;
+ dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
+
+ /* Assert USB2 PHY reset */
+ reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
+ reg |= DWC3_GUSB2PHYCFG_PHYSOFTRST;
+ dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
+
+ mdelay(100);
+
+ /* Clear USB3 PHY reset */
+ reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
+ reg &= ~DWC3_GUSB3PIPECTL_PHYSOFTRST;
+ dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
+
+ /* Clear USB2 PHY reset */
+ reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
+ reg &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST;
+ dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
+
+ /* After PHYs are stable we can take Core out of reset state */
+ reg = dwc3_readl(dwc->regs, DWC3_GCTL);
+ reg &= ~DWC3_GCTL_CORESOFTRESET;
+ dwc3_writel(dwc->regs, DWC3_GCTL, reg);
+}
+
+/**
+ * dwc3_free_one_event_buffer - Frees one event buffer
+ * @dwc: Pointer to our controller context structure
+ * @evt: Pointer to event buffer to be freed
+ */
+static void dwc3_free_one_event_buffer(struct dwc3 *dwc,
+ struct dwc3_event_buffer *evt)
+{
+ dma_free_coherent(dwc->dev, evt->length, evt->buf, evt->dma);
+ kfree(evt);
+}
+
+/**
+ * dwc3_alloc_one_event_buffer - Allocated one event buffer structure
+ * @dwc: Pointer to our controller context structure
+ * @length: size of the event buffer
+ *
+ * Returns a pointer to the allocated event buffer structure on succes
+ * otherwise ERR_PTR(errno).
+ */
+static struct dwc3_event_buffer *__devinit
+dwc3_alloc_one_event_buffer(struct dwc3 *dwc, unsigned length)
+{
+ struct dwc3_event_buffer *evt;
+
+ evt = kzalloc(sizeof(*evt), GFP_KERNEL);
+ if (!evt)
+ return ERR_PTR(-ENOMEM);
+
+ evt->dwc = dwc;
+ evt->length = length;
+ evt->buf = dma_alloc_coherent(dwc->dev, length,
+ &evt->dma, GFP_KERNEL);
+ if (!evt->buf) {
+ kfree(evt);
+ return ERR_PTR(-ENOMEM);
+ }
+
+ return evt;
+}
+
+/**
+ * dwc3_free_event_buffers - frees all allocated event buffers
+ * @dwc: Pointer to our controller context structure
+ */
+static void dwc3_free_event_buffers(struct dwc3 *dwc)
+{
+ struct dwc3_event_buffer *evt;
+ int i;
+
+ for (i = 0; i < DWC3_EVENT_BUFFERS_NUM; i++) {
+ evt = dwc->ev_buffs[i];
+ if (evt) {
+ dwc3_free_one_event_buffer(dwc, evt);
+ dwc->ev_buffs[i] = NULL;
+ }
+ }
+}
+
+/**
+ * dwc3_alloc_event_buffers - Allocates @num event buffers of size @length
+ * @dwc: Pointer to out controller context structure
+ * @num: number of event buffers to allocate
+ * @length: size of event buffer
+ *
+ * Returns 0 on success otherwise negative errno. In error the case, dwc
+ * may contain some buffers allocated but not all which were requested.
+ */
+static int __devinit dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned num,
+ unsigned length)
+{
+ int i;
+
+ for (i = 0; i < num; i++) {
+ struct dwc3_event_buffer *evt;
+
+ evt = dwc3_alloc_one_event_buffer(dwc, length);
+ if (IS_ERR(evt)) {
+ dev_err(dwc->dev, "can't allocate event buffer\n");
+ return PTR_ERR(evt);
+ }
+ dwc->ev_buffs[i] = evt;
+ }
+
+ return 0;
+}
+
+/**
+ * dwc3_event_buffers_setup - setup our allocated event buffers
+ * @dwc: Pointer to out controller context structure
+ *
+ * Returns 0 on success otherwise negative errno.
+ */
+static int __devinit dwc3_event_buffers_setup(struct dwc3 *dwc)
+{
+ struct dwc3_event_buffer *evt;
+ int n;
+
+ for (n = 0; n < DWC3_EVENT_BUFFERS_NUM; n++) {
+ evt = dwc->ev_buffs[n];
+ dev_dbg(dwc->dev, "Event buf %p dma %08llx length %d\n",
+ evt->buf, (unsigned long long) evt->dma,
+ evt->length);
+
+ dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(n),
+ lower_32_bits(evt->dma));
+ dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(n),
+ upper_32_bits(evt->dma));
+ dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(n),
+ evt->length & 0xffff);
+ dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(n), 0);
+ }
+
+ return 0;
+}
+
+static void dwc3_event_buffers_cleanup(struct dwc3 *dwc)
+{
+ struct dwc3_event_buffer *evt;
+ int n;
+
+ for (n = 0; n < DWC3_EVENT_BUFFERS_NUM; n++) {
+ evt = dwc->ev_buffs[n];
+ dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(n), 0);
+ dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(n), 0);
+ dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(n), 0);
+ dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(n), 0);
+ }
+}
+
+static void __devinit dwc3_cache_hwparams(struct dwc3 *dwc)
+{
+ struct dwc3_hwparams *parms = &dwc->hwparams;
+
+ parms->hwparams0 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS0);
+ parms->hwparams1 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS1);
+ parms->hwparams2 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS2);
+ parms->hwparams3 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS3);
+ parms->hwparams4 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS4);
+ parms->hwparams5 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS5);
+ parms->hwparams6 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS6);
+ parms->hwparams7 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS7);
+ parms->hwparams8 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS8);
+}
+
+/**
+ * dwc3_core_init - Low-level initialization of DWC3 Core
+ * @dwc: Pointer to our controller context structure
+ *
+ * Returns 0 on success otherwise negative errno.
+ */
+static int __devinit dwc3_core_init(struct dwc3 *dwc)
+{
+ unsigned long timeout;
+ u32 reg;
+ int ret;
+
+ reg = dwc3_readl(dwc->regs, DWC3_GSNPSID);
+ /* This should read as U3 followed by revision number */
+ if ((reg & DWC3_GSNPSID_MASK) != 0x55330000) {
+ dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core\n");
+ ret = -ENODEV;
+ goto err0;
+ }
+ dwc->revision = reg & DWC3_GSNPSREV_MASK;
+
+ dwc3_core_soft_reset(dwc);
+
+ /* issue device SoftReset too */
+ timeout = jiffies + msecs_to_jiffies(500);
+ dwc3_writel(dwc->regs, DWC3_DCTL, DWC3_DCTL_CSFTRST);
+ do {
+ reg = dwc3_readl(dwc->regs, DWC3_DCTL);
+ if (!(reg & DWC3_DCTL_CSFTRST))
+ break;
+
+ if (time_after(jiffies, timeout)) {
+ dev_err(dwc->dev, "Reset Timed Out\n");
+ ret = -ETIMEDOUT;
+ goto err0;
+ }
+
+ cpu_relax();
+ } while (true);
+
+ ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_NUM,
+ DWC3_EVENT_BUFFERS_SIZE);
+ if (ret) {
+ dev_err(dwc->dev, "failed to allocate event buffers\n");
+ ret = -ENOMEM;
+ goto err1;
+ }
+
+ ret = dwc3_event_buffers_setup(dwc);
+ if (ret) {
+ dev_err(dwc->dev, "failed to setup event buffers\n");
+ goto err1;
+ }
+
+ dwc3_cache_hwparams(dwc);
+
+ return 0;
+
+err1:
+ dwc3_free_event_buffers(dwc);
+
+err0:
+ return ret;
+}
+
+static void dwc3_core_exit(struct dwc3 *dwc)
+{
+ dwc3_event_buffers_cleanup(dwc);
+ dwc3_free_event_buffers(dwc);
+}
+
+#define DWC3_ALIGN_MASK (16 - 1)
+
+static int __devinit dwc3_probe(struct platform_device *pdev)
+{
+ const struct platform_device_id *id = platform_get_device_id(pdev);
+ struct resource *res;
+ struct dwc3 *dwc;
+ void __iomem *regs;
+ unsigned int features = id->driver_data;
+ int ret = -ENOMEM;
+ int irq;
+ void *mem;
+
+ mem = kzalloc(sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL);
+ if (!mem) {
+ dev_err(&pdev->dev, "not enough memory\n");
+ goto err0;
+ }
+ dwc = PTR_ALIGN(mem, DWC3_ALIGN_MASK + 1);
+ dwc->mem = mem;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(&pdev->dev, "missing resource\n");
+ goto err1;
+ }
+
+ res = request_mem_region(res->start, resource_size(res),
+ dev_name(&pdev->dev));
+ if (!res) {
+ dev_err(&pdev->dev, "can't request mem region\n");
+ goto err1;
+ }
+
+ regs = ioremap(res->start, resource_size(res));
+ if (!regs) {
+ dev_err(&pdev->dev, "ioremap failed\n");
+ goto err2;
+ }
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0) {
+ dev_err(&pdev->dev, "missing IRQ\n");
+ goto err3;
+ }
+
+ spin_lock_init(&dwc->lock);
+ platform_set_drvdata(pdev, dwc);
+
+ dwc->regs = regs;
+ dwc->regs_size = resource_size(res);
+ dwc->dev = &pdev->dev;
+ dwc->irq = irq;
+
+ pm_runtime_enable(&pdev->dev);
+ pm_runtime_get_sync(&pdev->dev);
+ pm_runtime_forbid(&pdev->dev);
+
+ ret = dwc3_core_init(dwc);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to initialize core\n");
+ goto err3;
+ }
+
+ if (features & DWC3_HAS_PERIPHERAL) {
+ ret = dwc3_gadget_init(dwc);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to initialized gadget\n");
+ goto err4;
+ }
+ }
+
+ ret = dwc3_debugfs_init(dwc);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to initialize debugfs\n");
+ goto err5;
+ }
+
+ pm_runtime_allow(&pdev->dev);
+
+ return 0;
+
+err5:
+ if (features & DWC3_HAS_PERIPHERAL)
+ dwc3_gadget_exit(dwc);
+
+err4:
+ dwc3_core_exit(dwc);
+
+err3:
+ iounmap(regs);
+
+err2:
+ release_mem_region(res->start, resource_size(res));
+
+err1:
+ kfree(dwc->mem);
+
+err0:
+ return ret;
+}
+
+static int __devexit dwc3_remove(struct platform_device *pdev)
+{
+ const struct platform_device_id *id = platform_get_device_id(pdev);
+ struct dwc3 *dwc = platform_get_drvdata(pdev);
+ struct resource *res;
+ unsigned int features = id->driver_data;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+
+ pm_runtime_put(&pdev->dev);
+ pm_runtime_disable(&pdev->dev);
+
+ dwc3_debugfs_exit(dwc);
+
+ if (features & DWC3_HAS_PERIPHERAL)
+ dwc3_gadget_exit(dwc);
+
+ dwc3_core_exit(dwc);
+ release_mem_region(res->start, resource_size(res));
+ iounmap(dwc->regs);
+ kfree(dwc->mem);
+
+ return 0;
+}
+
+static const struct platform_device_id dwc3_id_table[] __devinitconst = {
+ {
+ .name = "dwc3-omap",
+ .driver_data = (DWC3_HAS_PERIPHERAL
+ | DWC3_HAS_XHCI
+ | DWC3_HAS_OTG),
+ },
+ {
+ .name = "dwc3-pci",
+ .driver_data = DWC3_HAS_PERIPHERAL,
+ },
+ { }, /* Terminating Entry */
+};
+MODULE_DEVICE_TABLE(platform, dwc3_id_table);
+
+static struct platform_driver dwc3_driver = {
+ .probe = dwc3_probe,
+ .remove = __devexit_p(dwc3_remove),
+ .driver = {
+ .name = "dwc3",
+ },
+ .id_table = dwc3_id_table,
+};
+
+MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
+MODULE_LICENSE("Dual BSD/GPL");
+MODULE_DESCRIPTION("DesignWare USB3 DRD Controller Driver");
+
+static int __devinit dwc3_init(void)
+{
+ return platform_driver_register(&dwc3_driver);
+}
+module_init(dwc3_init);
+
+static void __exit dwc3_exit(void)
+{
+ platform_driver_unregister(&dwc3_driver);
+}
+module_exit(dwc3_exit);
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
new file mode 100644
index 0000000..29a8e16
--- /dev/null
+++ b/drivers/usb/dwc3/core.h
@@ -0,0 +1,768 @@
+/**
+ * core.h - DesignWare USB3 DRD Core Header
+ *
+ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Authors: Felipe Balbi <balbi@ti.com>,
+ * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2, as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __DRIVERS_USB_DWC3_CORE_H
+#define __DRIVERS_USB_DWC3_CORE_H
+
+#include <linux/device.h>
+#include <linux/spinlock.h>
+#include <linux/list.h>
+#include <linux/dma-mapping.h>
+#include <linux/mm.h>
+#include <linux/debugfs.h>
+
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+
+/* Global constants */
+#define DWC3_ENDPOINTS_NUM 32
+
+#define DWC3_EVENT_BUFFERS_NUM 2
+#define DWC3_EVENT_BUFFERS_SIZE PAGE_SIZE
+#define DWC3_EVENT_TYPE_MASK 0xfe
+
+#define DWC3_EVENT_TYPE_DEV 0
+#define DWC3_EVENT_TYPE_CARKIT 3
+#define DWC3_EVENT_TYPE_I2C 4
+
+#define DWC3_DEVICE_EVENT_DISCONNECT 0
+#define DWC3_DEVICE_EVENT_RESET 1
+#define DWC3_DEVICE_EVENT_CONNECT_DONE 2
+#define DWC3_DEVICE_EVENT_LINK_STATUS_CHANGE 3
+#define DWC3_DEVICE_EVENT_WAKEUP 4
+#define DWC3_DEVICE_EVENT_EOPF 6
+#define DWC3_DEVICE_EVENT_SOF 7
+#define DWC3_DEVICE_EVENT_ERRATIC_ERROR 9
+#define DWC3_DEVICE_EVENT_CMD_CMPL 10
+#define DWC3_DEVICE_EVENT_OVERFLOW 11
+
+#define DWC3_GEVNTCOUNT_MASK 0xfffc
+#define DWC3_GSNPSID_MASK 0xffff0000
+#define DWC3_GSNPSREV_MASK 0xffff
+
+/* Global Registers */
+#define DWC3_GSBUSCFG0 0xc100
+#define DWC3_GSBUSCFG1 0xc104
+#define DWC3_GTXTHRCFG 0xc108
+#define DWC3_GRXTHRCFG 0xc10c
+#define DWC3_GCTL 0xc110
+#define DWC3_GEVTEN 0xc114
+#define DWC3_GSTS 0xc118
+#define DWC3_GSNPSID 0xc120
+#define DWC3_GGPIO 0xc124
+#define DWC3_GUID 0xc128
+#define DWC3_GUCTL 0xc12c
+#define DWC3_GBUSERRADDR0 0xc130
+#define DWC3_GBUSERRADDR1 0xc134
+#define DWC3_GPRTBIMAP0 0xc138
+#define DWC3_GPRTBIMAP1 0xc13c
+#define DWC3_GHWPARAMS0 0xc140
+#define DWC3_GHWPARAMS1 0xc144
+#define DWC3_GHWPARAMS2 0xc148
+#define DWC3_GHWPARAMS3 0xc14c
+#define DWC3_GHWPARAMS4 0xc150
+#define DWC3_GHWPARAMS5 0xc154
+#define DWC3_GHWPARAMS6 0xc158
+#define DWC3_GHWPARAMS7 0xc15c
+#define DWC3_GDBGFIFOSPACE 0xc160
+#define DWC3_GDBGLTSSM 0xc164
+#define DWC3_GPRTBIMAP_HS0 0xc180
+#define DWC3_GPRTBIMAP_HS1 0xc184
+#define DWC3_GPRTBIMAP_FS0 0xc188
+#define DWC3_GPRTBIMAP_FS1 0xc18c
+
+#define DWC3_GUSB2PHYCFG(n) (0xc200 + (n * 0x04))
+#define DWC3_GUSB2I2CCTL(n) (0xc240 + (n * 0x04))
+
+#define DWC3_GUSB2PHYACC(n) (0xc280 + (n * 0x04))
+
+#define DWC3_GUSB3PIPECTL(n) (0xc2c0 + (n * 0x04))
+
+#define DWC3_GTXFIFOSIZ(n) (0xc300 + (n * 0x04))
+#define DWC3_GRXFIFOSIZ(n) (0xc380 + (n * 0x04))
+
+#define DWC3_GEVNTADRLO(n) (0xc400 + (n * 0x10))
+#define DWC3_GEVNTADRHI(n) (0xc404 + (n * 0x10))
+#define DWC3_GEVNTSIZ(n) (0xc408 + (n * 0x10))
+#define DWC3_GEVNTCOUNT(n) (0xc40c + (n * 0x10))
+
+#define DWC3_GHWPARAMS8 0xc600
+
+/* Device Registers */
+#define DWC3_DCFG 0xc700
+#define DWC3_DCTL 0xc704
+#define DWC3_DEVTEN 0xc708
+#define DWC3_DSTS 0xc70c
+#define DWC3_DGCMDPAR 0xc710
+#define DWC3_DGCMD 0xc714
+#define DWC3_DALEPENA 0xc720
+#define DWC3_DEPCMDPAR2(n) (0xc800 + (n * 0x10))
+#define DWC3_DEPCMDPAR1(n) (0xc804 + (n * 0x10))
+#define DWC3_DEPCMDPAR0(n) (0xc808 + (n * 0x10))
+#define DWC3_DEPCMD(n) (0xc80c + (n * 0x10))
+
+/* OTG Registers */
+#define DWC3_OCFG 0xcc00
+#define DWC3_OCTL 0xcc04
+#define DWC3_OEVTEN 0xcc08
+#define DWC3_OSTS 0xcc0C
+
+/* Bit fields */
+
+/* Global Configuration Register */
+#define DWC3_GCTL_PWRDNSCALE(n) (n << 19)
+#define DWC3_GCTL_U2RSTECN (1 << 16)
+#define DWC3_GCTL_RAMCLKSEL(x) ((x & DWC3_GCTL_CLK_MASK) << 6)
+#define DWC3_GCTL_CLK_BUS (0)
+#define DWC3_GCTL_CLK_PIPE (1)
+#define DWC3_GCTL_CLK_PIPEHALF (2)
+#define DWC3_GCTL_CLK_MASK (3)
+
+#define DWC3_GCTL_PRTCAPDIR(n) (n << 12)
+#define DWC3_GCTL_PRTCAP_HOST 1
+#define DWC3_GCTL_PRTCAP_DEVICE 2
+#define DWC3_GCTL_PRTCAP_OTG 3
+
+#define DWC3_GCTL_CORESOFTRESET (1 << 11)
+#define DWC3_GCTL_SCALEDOWN(n) (n << 4)
+#define DWC3_GCTL_DISSCRAMBLE (1 << 3)
+#define DWC3_GCTL_DSBLCLKGTNG (1 << 0)
+
+/* Global USB2 PHY Configuration Register */
+#define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31)
+#define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6)
+
+/* Global USB3 PIPE Control Register */
+#define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31)
+#define DWC3_GUSB3PIPECTL_SUSPHY (1 << 17)
+
+/* Global HWPARAMS1 Register */
+#define DWC3_GHWPARAMS1_EN_PWROPT(n) ((n & (3 << 24)) >> 24)
+#define DWC3_GHWPARAMS1_EN_PWROPT_NO 0
+#define DWC3_GHWPARAMS1_EN_PWROPT_CLK 1
+
+/* Device Configuration Register */
+#define DWC3_DCFG_DEVADDR(addr) ((addr) << 3)
+#define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f)
+
+#define DWC3_DCFG_SPEED_MASK (7 << 0)
+#define DWC3_DCFG_SUPERSPEED (4 << 0)
+#define DWC3_DCFG_HIGHSPEED (0 << 0)
+#define DWC3_DCFG_FULLSPEED2 (1 << 0)
+#define DWC3_DCFG_LOWSPEED (2 << 0)
+#define DWC3_DCFG_FULLSPEED1 (3 << 0)
+
+/* Device Control Register */
+#define DWC3_DCTL_RUN_STOP (1 << 31)
+#define DWC3_DCTL_CSFTRST (1 << 30)
+#define DWC3_DCTL_LSFTRST (1 << 29)
+
+#define DWC3_DCTL_HIRD_THRES_MASK (0x1f << 24)
+#define DWC3_DCTL_HIRD_THRES(n) (((n) & DWC3_DCTL_HIRD_THRES_MASK) >> 24)
+
+#define DWC3_DCTL_APPL1RES (1 << 23)
+
+#define DWC3_DCTL_INITU2ENA (1 << 12)
+#define DWC3_DCTL_ACCEPTU2ENA (1 << 11)
+#define DWC3_DCTL_INITU1ENA (1 << 10)
+#define DWC3_DCTL_ACCEPTU1ENA (1 << 9)
+#define DWC3_DCTL_TSTCTRL_MASK (0xf << 1)
+
+#define DWC3_DCTL_ULSTCHNGREQ_MASK (0x0f << 5)
+#define DWC3_DCTL_ULSTCHNGREQ(n) (((n) << 5) & DWC3_DCTL_ULSTCHNGREQ_MASK)
+
+#define DWC3_DCTL_ULSTCHNG_NO_ACTION (DWC3_DCTL_ULSTCHNGREQ(0))
+#define DWC3_DCTL_ULSTCHNG_SS_DISABLED (DWC3_DCTL_ULSTCHNGREQ(4))
+#define DWC3_DCTL_ULSTCHNG_RX_DETECT (DWC3_DCTL_ULSTCHNGREQ(5))
+#define DWC3_DCTL_ULSTCHNG_SS_INACTIVE (DWC3_DCTL_ULSTCHNGREQ(6))
+#define DWC3_DCTL_ULSTCHNG_RECOVERY (DWC3_DCTL_ULSTCHNGREQ(8))
+#define DWC3_DCTL_ULSTCHNG_COMPLIANCE (DWC3_DCTL_ULSTCHNGREQ(10))
+#define DWC3_DCTL_ULSTCHNG_LOOPBACK (DWC3_DCTL_ULSTCHNGREQ(11))
+
+/* Device Event Enable Register */
+#define DWC3_DEVTEN_VNDRDEVTSTRCVEDEN (1 << 12)
+#define DWC3_DEVTEN_EVNTOVERFLOWEN (1 << 11)
+#define DWC3_DEVTEN_CMDCMPLTEN (1 << 10)
+#define DWC3_DEVTEN_ERRTICERREN (1 << 9)
+#define DWC3_DEVTEN_SOFEN (1 << 7)
+#define DWC3_DEVTEN_EOPFEN (1 << 6)
+#define DWC3_DEVTEN_WKUPEVTEN (1 << 4)
+#define DWC3_DEVTEN_ULSTCNGEN (1 << 3)
+#define DWC3_DEVTEN_CONNECTDONEEN (1 << 2)
+#define DWC3_DEVTEN_USBRSTEN (1 << 1)
+#define DWC3_DEVTEN_DISCONNEVTEN (1 << 0)
+
+/* Device Status Register */
+#define DWC3_DSTS_PWRUPREQ (1 << 24)
+#define DWC3_DSTS_COREIDLE (1 << 23)
+#define DWC3_DSTS_DEVCTRLHLT (1 << 22)
+
+#define DWC3_DSTS_USBLNKST_MASK (0x0f << 18)
+#define DWC3_DSTS_USBLNKST(n) (((n) & DWC3_DSTS_USBLNKST_MASK) >> 18)
+
+#define DWC3_DSTS_RXFIFOEMPTY (1 << 17)
+
+#define DWC3_DSTS_SOFFN_MASK (0x3ff << 3)
+#define DWC3_DSTS_SOFFN(n) (((n) & DWC3_DSTS_SOFFN_MASK) >> 3)
+
+#define DWC3_DSTS_CONNECTSPD (7 << 0)
+
+#define DWC3_DSTS_SUPERSPEED (4 << 0)
+#define DWC3_DSTS_HIGHSPEED (0 << 0)
+#define DWC3_DSTS_FULLSPEED2 (1 << 0)
+#define DWC3_DSTS_LOWSPEED (2 << 0)
+#define DWC3_DSTS_FULLSPEED1 (3 << 0)
+
+/* Device Generic Command Register */
+#define DWC3_DGCMD_SET_LMP 0x01
+#define DWC3_DGCMD_SET_PERIODIC_PAR 0x02
+#define DWC3_DGCMD_XMIT_FUNCTION 0x03
+#define DWC3_DGCMD_SELECTED_FIFO_FLUSH 0x09
+#define DWC3_DGCMD_ALL_FIFO_FLUSH 0x0a
+#define DWC3_DGCMD_SET_ENDPOINT_NRDY 0x0c
+#define DWC3_DGCMD_RUN_SOC_BUS_LOOPBACK 0x10
+
+/* Device Endpoint Command Register */
+#define DWC3_DEPCMD_PARAM_SHIFT 16
+#define DWC3_DEPCMD_PARAM(x) (x << DWC3_DEPCMD_PARAM_SHIFT)
+#define DWC3_DEPCMD_GET_RSC_IDX(x) ((x >> DWC3_DEPCMD_PARAM_SHIFT) & 0x7f)
+#define DWC3_DEPCMD_STATUS_MASK (0x0f << 12)
+#define DWC3_DEPCMD_STATUS(x) ((x & DWC3_DEPCMD_STATUS_MASK) >> 12)
+#define DWC3_DEPCMD_HIPRI_FORCERM (1 << 11)
+#define DWC3_DEPCMD_CMDACT (1 << 10)
+#define DWC3_DEPCMD_CMDIOC (1 << 8)
+
+#define DWC3_DEPCMD_DEPSTARTCFG (0x09 << 0)
+#define DWC3_DEPCMD_ENDTRANSFER (0x08 << 0)
+#define DWC3_DEPCMD_UPDATETRANSFER (0x07 << 0)
+#define DWC3_DEPCMD_STARTTRANSFER (0x06 << 0)
+#define DWC3_DEPCMD_CLEARSTALL (0x05 << 0)
+#define DWC3_DEPCMD_SETSTALL (0x04 << 0)
+#define DWC3_DEPCMD_GETSEQNUMBER (0x03 << 0)
+#define DWC3_DEPCMD_SETTRANSFRESOURCE (0x02 << 0)
+#define DWC3_DEPCMD_SETEPCONFIG (0x01 << 0)
+
+/* The EP number goes 0..31 so ep0 is always out and ep1 is always in */
+#define DWC3_DALEPENA_EP(n) (1 << n)
+
+#define DWC3_DEPCMD_TYPE_CONTROL 0
+#define DWC3_DEPCMD_TYPE_ISOC 1
+#define DWC3_DEPCMD_TYPE_BULK 2
+#define DWC3_DEPCMD_TYPE_INTR 3
+
+/* Structures */
+
+struct dwc3_trb_hw;
+
+/**
+ * struct dwc3_event_buffer - Software event buffer representation
+ * @list: a list of event buffers
+ * @buf: _THE_ buffer
+ * @length: size of this buffer
+ * @dma: dma_addr_t
+ * @dwc: pointer to DWC controller
+ */
+struct dwc3_event_buffer {
+ void *buf;
+ unsigned length;
+ unsigned int lpos;
+
+ dma_addr_t dma;
+
+ struct dwc3 *dwc;
+};
+
+#define DWC3_EP_FLAG_STALLED (1 << 0)
+#define DWC3_EP_FLAG_WEDGED (1 << 1)
+
+#define DWC3_EP_DIRECTION_TX true
+#define DWC3_EP_DIRECTION_RX false
+
+#define DWC3_TRB_NUM 32
+#define DWC3_TRB_MASK (DWC3_TRB_NUM - 1)
+
+/**
+ * struct dwc3_ep - device side endpoint representation
+ * @endpoint: usb endpoint
+ * @request_list: list of requests for this endpoint
+ * @req_queued: list of requests on this ep which have TRBs setup
+ * @trb_pool: array of transaction buffers
+ * @trb_pool_dma: dma address of @trb_pool
+ * @free_slot: next slot which is going to be used
+ * @busy_slot: first slot which is owned by HW
+ * @desc: usb_endpoint_descriptor pointer
+ * @dwc: pointer to DWC controller
+ * @flags: endpoint flags (wedged, stalled, ...)
+ * @current_trb: index of current used trb
+ * @number: endpoint number (1 - 15)
+ * @type: set to bmAttributes & USB_ENDPOINT_XFERTYPE_MASK
+ * @res_trans_idx: Resource transfer index
+ * @interval: the intervall on which the ISOC transfer is started
+ * @name: a human readable name e.g. ep1out-bulk
+ * @direction: true for TX, false for RX
+ * @stream_capable: true when streams are enabled
+ */
+struct dwc3_ep {
+ struct usb_ep endpoint;
+ struct list_head request_list;
+ struct list_head req_queued;
+
+ struct dwc3_trb_hw *trb_pool;
+ dma_addr_t trb_pool_dma;
+ u32 free_slot;
+ u32 busy_slot;
+ const struct usb_endpoint_descriptor *desc;
+ struct dwc3 *dwc;
+
+ unsigned flags;
+#define DWC3_EP_ENABLED (1 << 0)
+#define DWC3_EP_STALL (1 << 1)
+#define DWC3_EP_WEDGE (1 << 2)
+#define DWC3_EP_BUSY (1 << 4)
+#define DWC3_EP_PENDING_REQUEST (1 << 5)
+
+ /* This last one is specific to EP0 */
+#define DWC3_EP0_DIR_IN (1 << 31)
+
+ unsigned current_trb;
+
+ u8 number;
+ u8 type;
+ u8 res_trans_idx;
+ u32 interval;
+
+ char name[20];
+
+ unsigned direction:1;
+ unsigned stream_capable:1;
+};
+
+enum dwc3_phy {
+ DWC3_PHY_UNKNOWN = 0,
+ DWC3_PHY_USB3,
+ DWC3_PHY_USB2,
+};
+
+enum dwc3_ep0_next {
+ DWC3_EP0_UNKNOWN = 0,
+ DWC3_EP0_COMPLETE,
+ DWC3_EP0_NRDY_SETUP,
+ DWC3_EP0_NRDY_DATA,
+ DWC3_EP0_NRDY_STATUS,
+};
+
+enum dwc3_ep0_state {
+ EP0_UNCONNECTED = 0,
+ EP0_SETUP_PHASE,
+ EP0_DATA_PHASE,
+ EP0_STATUS_PHASE,
+};
+
+enum dwc3_link_state {
+ /* In SuperSpeed */
+ DWC3_LINK_STATE_U0 = 0x00, /* in HS, means ON */
+ DWC3_LINK_STATE_U1 = 0x01,
+ DWC3_LINK_STATE_U2 = 0x02, /* in HS, means SLEEP */
+ DWC3_LINK_STATE_U3 = 0x03, /* in HS, means SUSPEND */
+ DWC3_LINK_STATE_SS_DIS = 0x04,
+ DWC3_LINK_STATE_RX_DET = 0x05, /* in HS, means Early Suspend */
+ DWC3_LINK_STATE_SS_INACT = 0x06,
+ DWC3_LINK_STATE_POLL = 0x07,
+ DWC3_LINK_STATE_RECOV = 0x08,
+ DWC3_LINK_STATE_HRESET = 0x09,
+ DWC3_LINK_STATE_CMPLY = 0x0a,
+ DWC3_LINK_STATE_LPBK = 0x0b,
+ DWC3_LINK_STATE_MASK = 0x0f,
+};
+
+enum dwc3_device_state {
+ DWC3_DEFAULT_STATE,
+ DWC3_ADDRESS_STATE,
+ DWC3_CONFIGURED_STATE,
+};
+
+/**
+ * struct dwc3_trb - transfer request block
+ * @bpl: lower 32bit of the buffer
+ * @bph: higher 32bit of the buffer
+ * @length: buffer size (up to 16mb - 1)
+ * @pcm1: packet count m1
+ * @trbsts: trb status
+ * 0 = ok
+ * 1 = missed isoc
+ * 2 = setup pending
+ * @hwo: hardware owner of descriptor
+ * @lst: last trb
+ * @chn: chain buffers
+ * @csp: continue on short packets (only supported on isoc eps)
+ * @trbctl: trb control
+ * 1 = normal
+ * 2 = control-setup
+ * 3 = control-status-2
+ * 4 = control-status-3
+ * 5 = control-data (first trb of data stage)
+ * 6 = isochronous-first (first trb of service interval)
+ * 7 = isochronous
+ * 8 = link trb
+ * others = reserved
+ * @isp_imi: interrupt on short packet / interrupt on missed isoc
+ * @ioc: interrupt on complete
+ * @sid_sofn: Stream ID / SOF Number
+ */
+struct dwc3_trb {
+ u64 bplh;
+
+ union {
+ struct {
+ u32 length:24;
+ u32 pcm1:2;
+ u32 reserved27_26:2;
+ u32 trbsts:4;
+#define DWC3_TRB_STS_OKAY 0
+#define DWC3_TRB_STS_MISSED_ISOC 1
+#define DWC3_TRB_STS_SETUP_PENDING 2
+ };
+ u32 len_pcm;
+ };
+
+ union {
+ struct {
+ u32 hwo:1;
+ u32 lst:1;
+ u32 chn:1;
+ u32 csp:1;
+ u32 trbctl:6;
+ u32 isp_imi:1;
+ u32 ioc:1;
+ u32 reserved13_12:2;
+ u32 sid_sofn:16;
+ u32 reserved31_30:2;
+ };
+ u32 control;
+ };
+} __packed;
+
+/**
+ * struct dwc3_trb_hw - transfer request block (hw format)
+ * @bpl: DW0-3
+ * @bph: DW4-7
+ * @size: DW8-B
+ * @trl: DWC-F
+ */
+struct dwc3_trb_hw {
+ __le32 bpl;
+ __le32 bph;
+ __le32 size;
+ __le32 ctrl;
+} __packed;
+
+static inline void dwc3_trb_to_hw(struct dwc3_trb *nat, struct dwc3_trb_hw *hw)
+{
+ hw->bpl = cpu_to_le32(lower_32_bits(nat->bplh));
+ hw->bph = cpu_to_le32(upper_32_bits(nat->bplh));
+ hw->size = cpu_to_le32p(&nat->len_pcm);
+ /* HWO is written last */
+ hw->ctrl = cpu_to_le32p(&nat->control);
+}
+
+static inline void dwc3_trb_to_nat(struct dwc3_trb_hw *hw, struct dwc3_trb *nat)
+{
+ u64 bplh;
+
+ bplh = le32_to_cpup(&hw->bpl);
+ bplh |= (u64) le32_to_cpup(&hw->bph) << 32;
+ nat->bplh = bplh;
+
+ nat->len_pcm = le32_to_cpup(&hw->size);
+ nat->control = le32_to_cpup(&hw->ctrl);
+}
+
+/**
+ * dwc3_hwparams - copy of HWPARAMS registers
+ * @hwparams0 - GHWPARAMS0
+ * @hwparams1 - GHWPARAMS1
+ * @hwparams2 - GHWPARAMS2
+ * @hwparams3 - GHWPARAMS3
+ * @hwparams4 - GHWPARAMS4
+ * @hwparams5 - GHWPARAMS5
+ * @hwparams6 - GHWPARAMS6
+ * @hwparams7 - GHWPARAMS7
+ * @hwparams8 - GHWPARAMS8
+ */
+struct dwc3_hwparams {
+ u32 hwparams0;
+ u32 hwparams1;
+ u32 hwparams2;
+ u32 hwparams3;
+ u32 hwparams4;
+ u32 hwparams5;
+ u32 hwparams6;
+ u32 hwparams7;
+ u32 hwparams8;
+};
+
+/**
+ * struct dwc3 - representation of our controller
+ * @ctrl_req: usb control request which is used for ep0
+ * @ep0_trb: trb which is used for the ctrl_req
+ * @ep0_bounce: bounce buffer for ep0
+ * @setup_buf: used while precessing STD USB requests
+ * @ctrl_req_addr: dma address of ctrl_req
+ * @ep0_trb: dma address of ep0_trb
+ * @ep0_usb_req: dummy req used while handling STD USB requests
+ * @setup_buf_addr: dma address of setup_buf
+ * @ep0_bounce_addr: dma address of ep0_bounce
+ * @lock: for synchronizing
+ * @dev: pointer to our struct device
+ * @event_buffer_list: a list of event buffers
+ * @gadget: device side representation of the peripheral controller
+ * @gadget_driver: pointer to the gadget driver
+ * @regs: base address for our registers
+ * @regs_size: address space size
+ * @irq: IRQ number
+ * @revision: revision register contents
+ * @is_selfpowered: true when we are selfpowered
+ * @three_stage_setup: set if we perform a three phase setup
+ * @ep0_status_pending: ep0 status response without a req is pending
+ * @ep0_bounced: true when we used bounce buffer
+ * @ep0_expect_in: true when we expect a DATA IN transfer
+ * @start_config_issued: true when StartConfig command has been issued
+ * @ep0_next_event: hold the next expected event
+ * @ep0state: state of endpoint zero
+ * @link_state: link state
+ * @speed: device speed (super, high, full, low)
+ * @mem: points to start of memory which is used for this struct.
+ * @hwparams: copy of hwparams registers
+ * @root: debugfs root folder pointer
+ */
+struct dwc3 {
+ struct usb_ctrlrequest *ctrl_req;
+ struct dwc3_trb_hw *ep0_trb;
+ void *ep0_bounce;
+ u8 *setup_buf;
+ dma_addr_t ctrl_req_addr;
+ dma_addr_t ep0_trb_addr;
+ dma_addr_t setup_buf_addr;
+ dma_addr_t ep0_bounce_addr;
+ struct usb_request ep0_usb_req;
+ /* device lock */
+ spinlock_t lock;
+ struct device *dev;
+
+ struct dwc3_event_buffer *ev_buffs[DWC3_EVENT_BUFFERS_NUM];
+ struct dwc3_ep *eps[DWC3_ENDPOINTS_NUM];
+
+ struct usb_gadget gadget;
+ struct usb_gadget_driver *gadget_driver;
+
+ void __iomem *regs;
+ size_t regs_size;
+
+ int irq;
+
+ u32 revision;
+
+#define DWC3_REVISION_173A 0x5533173a
+#define DWC3_REVISION_175A 0x5533175a
+#define DWC3_REVISION_180A 0x5533180a
+#define DWC3_REVISION_183A 0x5533183a
+#define DWC3_REVISION_185A 0x5533185a
+#define DWC3_REVISION_188A 0x5533188a
+#define DWC3_REVISION_190A 0x5533190a
+
+ unsigned is_selfpowered:1;
+ unsigned three_stage_setup:1;
+ unsigned ep0_status_pending:1;
+ unsigned ep0_bounced:1;
+ unsigned ep0_expect_in:1;
+ unsigned start_config_issued:1;
+
+ enum dwc3_ep0_next ep0_next_event;
+ enum dwc3_ep0_state ep0state;
+ enum dwc3_link_state link_state;
+ enum dwc3_device_state dev_state;
+
+ u8 speed;
+ void *mem;
+
+ struct dwc3_hwparams hwparams;
+ struct dentry *root;
+};
+
+/* -------------------------------------------------------------------------- */
+
+#define DWC3_TRBSTS_OK 0
+#define DWC3_TRBSTS_MISSED_ISOC 1
+#define DWC3_TRBSTS_SETUP_PENDING 2
+
+#define DWC3_TRBCTL_NORMAL 1
+#define DWC3_TRBCTL_CONTROL_SETUP 2
+#define DWC3_TRBCTL_CONTROL_STATUS2 3
+#define DWC3_TRBCTL_CONTROL_STATUS3 4
+#define DWC3_TRBCTL_CONTROL_DATA 5
+#define DWC3_TRBCTL_ISOCHRONOUS_FIRST 6
+#define DWC3_TRBCTL_ISOCHRONOUS 7
+#define DWC3_TRBCTL_LINK_TRB 8
+
+/* -------------------------------------------------------------------------- */
+
+struct dwc3_event_type {
+ u32 is_devspec:1;
+ u32 type:6;
+ u32 reserved8_31:25;
+} __packed;
+
+#define DWC3_DEPEVT_XFERCOMPLETE 0x01
+#define DWC3_DEPEVT_XFERINPROGRESS 0x02
+#define DWC3_DEPEVT_XFERNOTREADY 0x03
+#define DWC3_DEPEVT_RXTXFIFOEVT 0x04
+#define DWC3_DEPEVT_STREAMEVT 0x06
+#define DWC3_DEPEVT_EPCMDCMPLT 0x07
+
+/**
+ * struct dwc3_event_depvt - Device Endpoint Events
+ * @one_bit: indicates this is an endpoint event (not used)
+ * @endpoint_number: number of the endpoint
+ * @endpoint_event: The event we have:
+ * 0x00 - Reserved
+ * 0x01 - XferComplete
+ * 0x02 - XferInProgress
+ * 0x03 - XferNotReady
+ * 0x04 - RxTxFifoEvt (IN->Underrun, OUT->Overrun)
+ * 0x05 - Reserved
+ * 0x06 - StreamEvt
+ * 0x07 - EPCmdCmplt
+ * @reserved11_10: Reserved, don't use.
+ * @status: Indicates the status of the event. Refer to databook for
+ * more information.
+ * @parameters: Parameters of the current event. Refer to databook for
+ * more information.
+ */
+struct dwc3_event_depevt {
+ u32 one_bit:1;
+ u32 endpoint_number:5;
+ u32 endpoint_event:4;
+ u32 reserved11_10:2;
+ u32 status:4;
+#define DEPEVT_STATUS_BUSERR (1 << 0)
+#define DEPEVT_STATUS_SHORT (1 << 1)
+#define DEPEVT_STATUS_IOC (1 << 2)
+#define DEPEVT_STATUS_LST (1 << 3)
+
+/* Stream event only */
+#define DEPEVT_STREAMEVT_FOUND 1
+#define DEPEVT_STREAMEVT_NOTFOUND 2
+
+/* Control-only Status */
+#define DEPEVT_STATUS_CONTROL_SETUP 0
+#define DEPEVT_STATUS_CONTROL_DATA 1
+#define DEPEVT_STATUS_CONTROL_STATUS 2
+
+ u32 parameters:16;
+} __packed;
+
+/**
+ * struct dwc3_event_devt - Device Events
+ * @one_bit: indicates this is a non-endpoint event (not used)
+ * @device_event: indicates it's a device event. Should read as 0x00
+ * @type: indicates the type of device event.
+ * 0 - DisconnEvt
+ * 1 - USBRst
+ * 2 - ConnectDone
+ * 3 - ULStChng
+ * 4 - WkUpEvt
+ * 5 - Reserved
+ * 6 - EOPF
+ * 7 - SOF
+ * 8 - Reserved
+ * 9 - ErrticErr
+ * 10 - CmdCmplt
+ * 11 - EvntOverflow
+ * 12 - VndrDevTstRcved
+ * @reserved15_12: Reserved, not used
+ * @event_info: Information about this event
+ * @reserved31_24: Reserved, not used
+ */
+struct dwc3_event_devt {
+ u32 one_bit:1;
+ u32 device_event:7;
+ u32 type:4;
+ u32 reserved15_12:4;
+ u32 event_info:8;
+ u32 reserved31_24:8;
+} __packed;
+
+/**
+ * struct dwc3_event_gevt - Other Core Events
+ * @one_bit: indicates this is a non-endpoint event (not used)
+ * @device_event: indicates it's (0x03) Carkit or (0x04) I2C event.
+ * @phy_port_number: self-explanatory
+ * @reserved31_12: Reserved, not used.
+ */
+struct dwc3_event_gevt {
+ u32 one_bit:1;
+ u32 device_event:7;
+ u32 phy_port_number:4;
+ u32 reserved31_12:20;
+} __packed;
+
+/**
+ * union dwc3_event - representation of Event Buffer contents
+ * @raw: raw 32-bit event
+ * @type: the type of the event
+ * @depevt: Device Endpoint Event
+ * @devt: Device Event
+ * @gevt: Global Event
+ */
+union dwc3_event {
+ u32 raw;
+ struct dwc3_event_type type;
+ struct dwc3_event_depevt depevt;
+ struct dwc3_event_devt devt;
+ struct dwc3_event_gevt gevt;
+};
+
+/*
+ * DWC3 Features to be used as Driver Data
+ */
+
+#define DWC3_HAS_PERIPHERAL BIT(0)
+#define DWC3_HAS_XHCI BIT(1)
+#define DWC3_HAS_OTG BIT(3)
+
+#endif /* __DRIVERS_USB_DWC3_CORE_H */
diff --git a/drivers/usb/dwc3/debug.h b/drivers/usb/dwc3/debug.h
new file mode 100644
index 0000000..5894ee8
--- /dev/null
+++ b/drivers/usb/dwc3/debug.h
@@ -0,0 +1,50 @@
+/**
+ * debug.h - DesignWare USB3 DRD Controller Debug Header
+ *
+ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Authors: Felipe Balbi <balbi@ti.com>,
+ * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2, as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "core.h"
+
+#ifdef CONFIG_DEBUG_FS
+extern int dwc3_debugfs_init(struct dwc3 *);
+extern void dwc3_debugfs_exit(struct dwc3 *);
+#else
+static inline int dwc3_debugfs_init(struct dwc3 *d)
+{ return 0; }
+static inline void dwc3_debugfs_exit(struct dwc3 *d)
+{ }
+#endif
+
diff --git a/drivers/usb/dwc3/debugfs.c b/drivers/usb/dwc3/debugfs.c
new file mode 100644
index 0000000..da1ad77
--- /dev/null
+++ b/drivers/usb/dwc3/debugfs.c
@@ -0,0 +1,441 @@
+/**
+ * debugfs.c - DesignWare USB3 DRD Controller DebugFS file
+ *
+ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Authors: Felipe Balbi <balbi@ti.com>,
+ * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2, as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/ptrace.h>
+#include <linux/types.h>
+#include <linux/spinlock.h>
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
+#include <linux/delay.h>
+
+#include <asm/uaccess.h>
+
+#include "core.h"
+#include "gadget.h"
+#include "io.h"
+
+struct dwc3_register {
+ const char *name;
+ u32 offset;
+};
+
+#define dump_register(nm) \
+{ \
+ .name = __stringify(nm), \
+ .offset = DWC3_ ##nm, \
+}
+
+static const struct dwc3_register dwc3_regs[] = {
+ dump_register(GSBUSCFG0),
+ dump_register(GSBUSCFG1),
+ dump_register(GTXTHRCFG),
+ dump_register(GRXTHRCFG),
+ dump_register(GCTL),
+ dump_register(GEVTEN),
+ dump_register(GSTS),
+ dump_register(GSNPSID),
+ dump_register(GGPIO),
+ dump_register(GUID),
+ dump_register(GUCTL),
+ dump_register(GBUSERRADDR0),
+ dump_register(GBUSERRADDR1),
+ dump_register(GPRTBIMAP0),
+ dump_register(GPRTBIMAP1),
+ dump_register(GHWPARAMS0),
+ dump_register(GHWPARAMS1),
+ dump_register(GHWPARAMS2),
+ dump_register(GHWPARAMS3),
+ dump_register(GHWPARAMS4),
+ dump_register(GHWPARAMS5),
+ dump_register(GHWPARAMS6),
+ dump_register(GHWPARAMS7),
+ dump_register(GDBGFIFOSPACE),
+ dump_register(GDBGLTSSM),
+ dump_register(GPRTBIMAP_HS0),
+ dump_register(GPRTBIMAP_HS1),
+ dump_register(GPRTBIMAP_FS0),
+ dump_register(GPRTBIMAP_FS1),
+
+ dump_register(GUSB2PHYCFG(0)),
+ dump_register(GUSB2PHYCFG(1)),
+ dump_register(GUSB2PHYCFG(2)),
+ dump_register(GUSB2PHYCFG(3)),
+ dump_register(GUSB2PHYCFG(4)),
+ dump_register(GUSB2PHYCFG(5)),
+ dump_register(GUSB2PHYCFG(6)),
+ dump_register(GUSB2PHYCFG(7)),
+ dump_register(GUSB2PHYCFG(8)),
+ dump_register(GUSB2PHYCFG(9)),
+ dump_register(GUSB2PHYCFG(10)),
+ dump_register(GUSB2PHYCFG(11)),
+ dump_register(GUSB2PHYCFG(12)),
+ dump_register(GUSB2PHYCFG(13)),
+ dump_register(GUSB2PHYCFG(14)),
+ dump_register(GUSB2PHYCFG(15)),
+
+ dump_register(GUSB2I2CCTL(0)),
+ dump_register(GUSB2I2CCTL(1)),
+ dump_register(GUSB2I2CCTL(2)),
+ dump_register(GUSB2I2CCTL(3)),
+ dump_register(GUSB2I2CCTL(4)),
+ dump_register(GUSB2I2CCTL(5)),
+ dump_register(GUSB2I2CCTL(6)),
+ dump_register(GUSB2I2CCTL(7)),
+ dump_register(GUSB2I2CCTL(8)),
+ dump_register(GUSB2I2CCTL(9)),
+ dump_register(GUSB2I2CCTL(10)),
+ dump_register(GUSB2I2CCTL(11)),
+ dump_register(GUSB2I2CCTL(12)),
+ dump_register(GUSB2I2CCTL(13)),
+ dump_register(GUSB2I2CCTL(14)),
+ dump_register(GUSB2I2CCTL(15)),
+
+ dump_register(GUSB2PHYACC(0)),
+ dump_register(GUSB2PHYACC(1)),
+ dump_register(GUSB2PHYACC(2)),
+ dump_register(GUSB2PHYACC(3)),
+ dump_register(GUSB2PHYACC(4)),
+ dump_register(GUSB2PHYACC(5)),
+ dump_register(GUSB2PHYACC(6)),
+ dump_register(GUSB2PHYACC(7)),
+ dump_register(GUSB2PHYACC(8)),
+ dump_register(GUSB2PHYACC(9)),
+ dump_register(GUSB2PHYACC(10)),
+ dump_register(GUSB2PHYACC(11)),
+ dump_register(GUSB2PHYACC(12)),
+ dump_register(GUSB2PHYACC(13)),
+ dump_register(GUSB2PHYACC(14)),
+ dump_register(GUSB2PHYACC(15)),
+
+ dump_register(GUSB3PIPECTL(0)),
+ dump_register(GUSB3PIPECTL(1)),
+ dump_register(GUSB3PIPECTL(2)),
+ dump_register(GUSB3PIPECTL(3)),
+ dump_register(GUSB3PIPECTL(4)),
+ dump_register(GUSB3PIPECTL(5)),
+ dump_register(GUSB3PIPECTL(6)),
+ dump_register(GUSB3PIPECTL(7)),
+ dump_register(GUSB3PIPECTL(8)),
+ dump_register(GUSB3PIPECTL(9)),
+ dump_register(GUSB3PIPECTL(10)),
+ dump_register(GUSB3PIPECTL(11)),
+ dump_register(GUSB3PIPECTL(12)),
+ dump_register(GUSB3PIPECTL(13)),
+ dump_register(GUSB3PIPECTL(14)),
+ dump_register(GUSB3PIPECTL(15)),
+
+ dump_register(GTXFIFOSIZ(0)),
+ dump_register(GTXFIFOSIZ(1)),
+ dump_register(GTXFIFOSIZ(2)),
+ dump_register(GTXFIFOSIZ(3)),
+ dump_register(GTXFIFOSIZ(4)),
+ dump_register(GTXFIFOSIZ(5)),
+ dump_register(GTXFIFOSIZ(6)),
+ dump_register(GTXFIFOSIZ(7)),
+ dump_register(GTXFIFOSIZ(8)),
+ dump_register(GTXFIFOSIZ(9)),
+ dump_register(GTXFIFOSIZ(10)),
+ dump_register(GTXFIFOSIZ(11)),
+ dump_register(GTXFIFOSIZ(12)),
+ dump_register(GTXFIFOSIZ(13)),
+ dump_register(GTXFIFOSIZ(14)),
+ dump_register(GTXFIFOSIZ(15)),
+ dump_register(GTXFIFOSIZ(16)),
+ dump_register(GTXFIFOSIZ(17)),
+ dump_register(GTXFIFOSIZ(18)),
+ dump_register(GTXFIFOSIZ(19)),
+ dump_register(GTXFIFOSIZ(20)),
+ dump_register(GTXFIFOSIZ(21)),
+ dump_register(GTXFIFOSIZ(22)),
+ dump_register(GTXFIFOSIZ(23)),
+ dump_register(GTXFIFOSIZ(24)),
+ dump_register(GTXFIFOSIZ(25)),
+ dump_register(GTXFIFOSIZ(26)),
+ dump_register(GTXFIFOSIZ(27)),
+ dump_register(GTXFIFOSIZ(28)),
+ dump_register(GTXFIFOSIZ(29)),
+ dump_register(GTXFIFOSIZ(30)),
+ dump_register(GTXFIFOSIZ(31)),
+
+ dump_register(GRXFIFOSIZ(0)),
+ dump_register(GRXFIFOSIZ(1)),
+ dump_register(GRXFIFOSIZ(2)),
+ dump_register(GRXFIFOSIZ(3)),
+ dump_register(GRXFIFOSIZ(4)),
+ dump_register(GRXFIFOSIZ(5)),
+ dump_register(GRXFIFOSIZ(6)),
+ dump_register(GRXFIFOSIZ(7)),
+ dump_register(GRXFIFOSIZ(8)),
+ dump_register(GRXFIFOSIZ(9)),
+ dump_register(GRXFIFOSIZ(10)),
+ dump_register(GRXFIFOSIZ(11)),
+ dump_register(GRXFIFOSIZ(12)),
+ dump_register(GRXFIFOSIZ(13)),
+ dump_register(GRXFIFOSIZ(14)),
+ dump_register(GRXFIFOSIZ(15)),
+ dump_register(GRXFIFOSIZ(16)),
+ dump_register(GRXFIFOSIZ(17)),
+ dump_register(GRXFIFOSIZ(18)),
+ dump_register(GRXFIFOSIZ(19)),
+ dump_register(GRXFIFOSIZ(20)),
+ dump_register(GRXFIFOSIZ(21)),
+ dump_register(GRXFIFOSIZ(22)),
+ dump_register(GRXFIFOSIZ(23)),
+ dump_register(GRXFIFOSIZ(24)),
+ dump_register(GRXFIFOSIZ(25)),
+ dump_register(GRXFIFOSIZ(26)),
+ dump_register(GRXFIFOSIZ(27)),
+ dump_register(GRXFIFOSIZ(28)),
+ dump_register(GRXFIFOSIZ(29)),
+ dump_register(GRXFIFOSIZ(30)),
+ dump_register(GRXFIFOSIZ(31)),
+
+ dump_register(GEVNTADRLO(0)),
+ dump_register(GEVNTADRHI(0)),
+ dump_register(GEVNTSIZ(0)),
+ dump_register(GEVNTCOUNT(0)),
+
+ dump_register(GHWPARAMS8),
+ dump_register(DCFG),
+ dump_register(DCTL),
+ dump_register(DEVTEN),
+ dump_register(DSTS),
+ dump_register(DGCMDPAR),
+ dump_register(DGCMD),
+ dump_register(DALEPENA),
+
+ dump_register(DEPCMDPAR2(0)),
+ dump_register(DEPCMDPAR2(1)),
+ dump_register(DEPCMDPAR2(2)),
+ dump_register(DEPCMDPAR2(3)),
+ dump_register(DEPCMDPAR2(4)),
+ dump_register(DEPCMDPAR2(5)),
+ dump_register(DEPCMDPAR2(6)),
+ dump_register(DEPCMDPAR2(7)),
+ dump_register(DEPCMDPAR2(8)),
+ dump_register(DEPCMDPAR2(9)),
+ dump_register(DEPCMDPAR2(10)),
+ dump_register(DEPCMDPAR2(11)),
+ dump_register(DEPCMDPAR2(12)),
+ dump_register(DEPCMDPAR2(13)),
+ dump_register(DEPCMDPAR2(14)),
+ dump_register(DEPCMDPAR2(15)),
+ dump_register(DEPCMDPAR2(16)),
+ dump_register(DEPCMDPAR2(17)),
+ dump_register(DEPCMDPAR2(18)),
+ dump_register(DEPCMDPAR2(19)),
+ dump_register(DEPCMDPAR2(20)),
+ dump_register(DEPCMDPAR2(21)),
+ dump_register(DEPCMDPAR2(22)),
+ dump_register(DEPCMDPAR2(23)),
+ dump_register(DEPCMDPAR2(24)),
+ dump_register(DEPCMDPAR2(25)),
+ dump_register(DEPCMDPAR2(26)),
+ dump_register(DEPCMDPAR2(27)),
+ dump_register(DEPCMDPAR2(28)),
+ dump_register(DEPCMDPAR2(29)),
+ dump_register(DEPCMDPAR2(30)),
+ dump_register(DEPCMDPAR2(31)),
+
+ dump_register(DEPCMDPAR1(0)),
+ dump_register(DEPCMDPAR1(1)),
+ dump_register(DEPCMDPAR1(2)),
+ dump_register(DEPCMDPAR1(3)),
+ dump_register(DEPCMDPAR1(4)),
+ dump_register(DEPCMDPAR1(5)),
+ dump_register(DEPCMDPAR1(6)),
+ dump_register(DEPCMDPAR1(7)),
+ dump_register(DEPCMDPAR1(8)),
+ dump_register(DEPCMDPAR1(9)),
+ dump_register(DEPCMDPAR1(10)),
+ dump_register(DEPCMDPAR1(11)),
+ dump_register(DEPCMDPAR1(12)),
+ dump_register(DEPCMDPAR1(13)),
+ dump_register(DEPCMDPAR1(14)),
+ dump_register(DEPCMDPAR1(15)),
+ dump_register(DEPCMDPAR1(16)),
+ dump_register(DEPCMDPAR1(17)),
+ dump_register(DEPCMDPAR1(18)),
+ dump_register(DEPCMDPAR1(19)),
+ dump_register(DEPCMDPAR1(20)),
+ dump_register(DEPCMDPAR1(21)),
+ dump_register(DEPCMDPAR1(22)),
+ dump_register(DEPCMDPAR1(23)),
+ dump_register(DEPCMDPAR1(24)),
+ dump_register(DEPCMDPAR1(25)),
+ dump_register(DEPCMDPAR1(26)),
+ dump_register(DEPCMDPAR1(27)),
+ dump_register(DEPCMDPAR1(28)),
+ dump_register(DEPCMDPAR1(29)),
+ dump_register(DEPCMDPAR1(30)),
+ dump_register(DEPCMDPAR1(31)),
+
+ dump_register(DEPCMDPAR0(0)),
+ dump_register(DEPCMDPAR0(1)),
+ dump_register(DEPCMDPAR0(2)),
+ dump_register(DEPCMDPAR0(3)),
+ dump_register(DEPCMDPAR0(4)),
+ dump_register(DEPCMDPAR0(5)),
+ dump_register(DEPCMDPAR0(6)),
+ dump_register(DEPCMDPAR0(7)),
+ dump_register(DEPCMDPAR0(8)),
+ dump_register(DEPCMDPAR0(9)),
+ dump_register(DEPCMDPAR0(10)),
+ dump_register(DEPCMDPAR0(11)),
+ dump_register(DEPCMDPAR0(12)),
+ dump_register(DEPCMDPAR0(13)),
+ dump_register(DEPCMDPAR0(14)),
+ dump_register(DEPCMDPAR0(15)),
+ dump_register(DEPCMDPAR0(16)),
+ dump_register(DEPCMDPAR0(17)),
+ dump_register(DEPCMDPAR0(18)),
+ dump_register(DEPCMDPAR0(19)),
+ dump_register(DEPCMDPAR0(20)),
+ dump_register(DEPCMDPAR0(21)),
+ dump_register(DEPCMDPAR0(22)),
+ dump_register(DEPCMDPAR0(23)),
+ dump_register(DEPCMDPAR0(24)),
+ dump_register(DEPCMDPAR0(25)),
+ dump_register(DEPCMDPAR0(26)),
+ dump_register(DEPCMDPAR0(27)),
+ dump_register(DEPCMDPAR0(28)),
+ dump_register(DEPCMDPAR0(29)),
+ dump_register(DEPCMDPAR0(30)),
+ dump_register(DEPCMDPAR0(31)),
+
+ dump_register(DEPCMD(0)),
+ dump_register(DEPCMD(1)),
+ dump_register(DEPCMD(2)),
+ dump_register(DEPCMD(3)),
+ dump_register(DEPCMD(4)),
+ dump_register(DEPCMD(5)),
+ dump_register(DEPCMD(6)),
+ dump_register(DEPCMD(7)),
+ dump_register(DEPCMD(8)),
+ dump_register(DEPCMD(9)),
+ dump_register(DEPCMD(10)),
+ dump_register(DEPCMD(11)),
+ dump_register(DEPCMD(12)),
+ dump_register(DEPCMD(13)),
+ dump_register(DEPCMD(14)),
+ dump_register(DEPCMD(15)),
+ dump_register(DEPCMD(16)),
+ dump_register(DEPCMD(17)),
+ dump_register(DEPCMD(18)),
+ dump_register(DEPCMD(19)),
+ dump_register(DEPCMD(20)),
+ dump_register(DEPCMD(21)),
+ dump_register(DEPCMD(22)),
+ dump_register(DEPCMD(23)),
+ dump_register(DEPCMD(24)),
+ dump_register(DEPCMD(25)),
+ dump_register(DEPCMD(26)),
+ dump_register(DEPCMD(27)),
+ dump_register(DEPCMD(28)),
+ dump_register(DEPCMD(29)),
+ dump_register(DEPCMD(30)),
+ dump_register(DEPCMD(31)),
+
+ dump_register(OCFG),
+ dump_register(OCTL),
+ dump_register(OEVTEN),
+ dump_register(OSTS),
+};
+
+static int dwc3_regdump_show(struct seq_file *s, void *unused)
+{
+ struct dwc3 *dwc = s->private;
+ int i;
+
+ seq_printf(s, "DesignWare USB3 Core Register Dump\n");
+
+ for (i = 0; i < ARRAY_SIZE(dwc3_regs); i++) {
+ seq_printf(s, "%-20s : %08x\n", dwc3_regs[i].name,
+ dwc3_readl(dwc->regs, dwc3_regs[i].offset));
+ }
+
+ return 0;
+}
+
+static int dwc3_regdump_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, dwc3_regdump_show, inode->i_private);
+}
+
+static const struct file_operations dwc3_regdump_fops = {
+ .open = dwc3_regdump_open,
+ .read = seq_read,
+ .release = single_release,
+};
+
+int __devinit dwc3_debugfs_init(struct dwc3 *dwc)
+{
+ struct dentry *root;
+ struct dentry *file;
+ int ret;
+
+ root = debugfs_create_dir(dev_name(dwc->dev), NULL);
+ if (IS_ERR(root)){
+ ret = PTR_ERR(root);
+ goto err0;
+ }
+
+ dwc->root = root;
+
+ file = debugfs_create_file("regdump", S_IRUGO, root, dwc,
+ &dwc3_regdump_fops);
+ if (IS_ERR(file)) {
+ ret = PTR_ERR(file);
+ goto err1;
+ }
+ return 0;
+
+err1:
+ debugfs_remove_recursive(root);
+
+err0:
+ return ret;
+}
+
+void __devexit dwc3_debugfs_exit(struct dwc3 *dwc)
+{
+ debugfs_remove_recursive(dwc->root);
+ dwc->root = NULL;
+}
diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c
new file mode 100644
index 0000000..062552b
--- /dev/null
+++ b/drivers/usb/dwc3/dwc3-omap.c
@@ -0,0 +1,401 @@
+/**
+ * dwc3-omap.c - OMAP Specific Glue layer
+ *
+ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Authors: Felipe Balbi <balbi@ti.com>,
+ * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2, as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/spinlock.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/dwc3-omap.h>
+#include <linux/dma-mapping.h>
+#include <linux/ioport.h>
+#include <linux/io.h>
+#include <linux/module.h>
+
+#include "io.h"
+
+/*
+ * All these registers belong to OMAP's Wrapper around the
+ * DesignWare USB3 Core.
+ */
+
+#define USBOTGSS_REVISION 0x0000
+#define USBOTGSS_SYSCONFIG 0x0010
+#define USBOTGSS_IRQ_EOI 0x0020
+#define USBOTGSS_IRQSTATUS_RAW_0 0x0024
+#define USBOTGSS_IRQSTATUS_0 0x0028
+#define USBOTGSS_IRQENABLE_SET_0 0x002c
+#define USBOTGSS_IRQENABLE_CLR_0 0x0030
+#define USBOTGSS_IRQSTATUS_RAW_1 0x0034
+#define USBOTGSS_IRQSTATUS_1 0x0038
+#define USBOTGSS_IRQENABLE_SET_1 0x003c
+#define USBOTGSS_IRQENABLE_CLR_1 0x0040
+#define USBOTGSS_UTMI_OTG_CTRL 0x0080
+#define USBOTGSS_UTMI_OTG_STATUS 0x0084
+#define USBOTGSS_MMRAM_OFFSET 0x0100
+#define USBOTGSS_FLADJ 0x0104
+#define USBOTGSS_DEBUG_CFG 0x0108
+#define USBOTGSS_DEBUG_DATA 0x010c
+
+/* SYSCONFIG REGISTER */
+#define USBOTGSS_SYSCONFIG_DMADISABLE (1 << 16)
+#define USBOTGSS_SYSCONFIG_STANDBYMODE(x) ((x) << 4)
+
+#define USBOTGSS_STANDBYMODE_FORCE_STANDBY 0
+#define USBOTGSS_STANDBYMODE_NO_STANDBY 1
+#define USBOTGSS_STANDBYMODE_SMART_STANDBY 2
+#define USBOTGSS_STANDBYMODE_SMART_WAKEUP 3
+
+#define USBOTGSS_STANDBYMODE_MASK (0x03 << 4)
+
+#define USBOTGSS_SYSCONFIG_IDLEMODE(x) ((x) << 2)
+
+#define USBOTGSS_IDLEMODE_FORCE_IDLE 0
+#define USBOTGSS_IDLEMODE_NO_IDLE 1
+#define USBOTGSS_IDLEMODE_SMART_IDLE 2
+#define USBOTGSS_IDLEMODE_SMART_WAKEUP 3
+
+#define USBOTGSS_IDLEMODE_MASK (0x03 << 2)
+
+/* IRQ_EOI REGISTER */
+#define USBOTGSS_IRQ_EOI_LINE_NUMBER (1 << 0)
+
+/* IRQS0 BITS */
+#define USBOTGSS_IRQO_COREIRQ_ST (1 << 0)
+
+/* IRQ1 BITS */
+#define USBOTGSS_IRQ1_DMADISABLECLR (1 << 17)
+#define USBOTGSS_IRQ1_OEVT (1 << 16)
+#define USBOTGSS_IRQ1_DRVVBUS_RISE (1 << 13)
+#define USBOTGSS_IRQ1_CHRGVBUS_RISE (1 << 12)
+#define USBOTGSS_IRQ1_DISCHRGVBUS_RISE (1 << 11)
+#define USBOTGSS_IRQ1_IDPULLUP_RISE (1 << 8)
+#define USBOTGSS_IRQ1_DRVVBUS_FALL (1 << 5)
+#define USBOTGSS_IRQ1_CHRGVBUS_FALL (1 << 4)
+#define USBOTGSS_IRQ1_DISCHRGVBUS_FALL (1 << 3)
+#define USBOTGSS_IRQ1_IDPULLUP_FALL (1 << 0)
+
+/* UTMI_OTG_CTRL REGISTER */
+#define USBOTGSS_UTMI_OTG_CTRL_DRVVBUS (1 << 5)
+#define USBOTGSS_UTMI_OTG_CTRL_CHRGVBUS (1 << 4)
+#define USBOTGSS_UTMI_OTG_CTRL_DISCHRGVBUS (1 << 3)
+#define USBOTGSS_UTMI_OTG_CTRL_IDPULLUP (1 << 0)
+
+/* UTMI_OTG_STATUS REGISTER */
+#define USBOTGSS_UTMI_OTG_STATUS_SW_MODE (1 << 31)
+#define USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT (1 << 9)
+#define USBOTGSS_UTMI_OTG_STATUS_TXBITSTUFFENABLE (1 << 8)
+#define USBOTGSS_UTMI_OTG_STATUS_IDDIG (1 << 4)
+#define USBOTGSS_UTMI_OTG_STATUS_SESSEND (1 << 3)
+#define USBOTGSS_UTMI_OTG_STATUS_SESSVALID (1 << 2)
+#define USBOTGSS_UTMI_OTG_STATUS_VBUSVALID (1 << 1)
+
+struct dwc3_omap {
+ /* device lock */
+ spinlock_t lock;
+
+ struct platform_device *dwc3;
+ struct device *dev;
+
+ int irq;
+ void __iomem *base;
+
+ void *context;
+ u32 resource_size;
+
+ u32 dma_status:1;
+};
+
+static irqreturn_t dwc3_omap_interrupt(int irq, void *_omap)
+{
+ struct dwc3_omap *omap = _omap;
+ u32 reg;
+
+ spin_lock(&omap->lock);
+
+ reg = dwc3_readl(omap->base, USBOTGSS_IRQSTATUS_1);
+
+ if (reg & USBOTGSS_IRQ1_DMADISABLECLR) {
+ dev_dbg(omap->dev, "DMA Disable was Cleared\n");
+ omap->dma_status = false;
+ }
+
+ if (reg & USBOTGSS_IRQ1_OEVT)
+ dev_dbg(omap->dev, "OTG Event\n");
+
+ if (reg & USBOTGSS_IRQ1_DRVVBUS_RISE)
+ dev_dbg(omap->dev, "DRVVBUS Rise\n");
+
+ if (reg & USBOTGSS_IRQ1_CHRGVBUS_RISE)
+ dev_dbg(omap->dev, "CHRGVBUS Rise\n");
+
+ if (reg & USBOTGSS_IRQ1_DISCHRGVBUS_RISE)
+ dev_dbg(omap->dev, "DISCHRGVBUS Rise\n");
+
+ if (reg & USBOTGSS_IRQ1_IDPULLUP_RISE)
+ dev_dbg(omap->dev, "IDPULLUP Rise\n");
+
+ if (reg & USBOTGSS_IRQ1_DRVVBUS_FALL)
+ dev_dbg(omap->dev, "DRVVBUS Fall\n");
+
+ if (reg & USBOTGSS_IRQ1_CHRGVBUS_FALL)
+ dev_dbg(omap->dev, "CHRGVBUS Fall\n");
+
+ if (reg & USBOTGSS_IRQ1_DISCHRGVBUS_FALL)
+ dev_dbg(omap->dev, "DISCHRGVBUS Fall\n");
+
+ if (reg & USBOTGSS_IRQ1_IDPULLUP_FALL)
+ dev_dbg(omap->dev, "IDPULLUP Fall\n");
+
+ dwc3_writel(omap->base, USBOTGSS_IRQSTATUS_1, reg);
+
+ reg = dwc3_readl(omap->base, USBOTGSS_IRQSTATUS_0);
+ dwc3_writel(omap->base, USBOTGSS_IRQSTATUS_0, reg);
+
+ spin_unlock(&omap->lock);
+
+ return IRQ_HANDLED;
+}
+
+static int __devinit dwc3_omap_probe(struct platform_device *pdev)
+{
+ struct dwc3_omap_data *pdata = pdev->dev.platform_data;
+ struct platform_device *dwc3;
+ struct dwc3_omap *omap;
+ struct resource *res;
+
+ int ret = -ENOMEM;
+ int irq;
+
+ u32 reg;
+
+ void __iomem *base;
+ void *context;
+
+ omap = kzalloc(sizeof(*omap), GFP_KERNEL);
+ if (!omap) {
+ dev_err(&pdev->dev, "not enough memory\n");
+ goto err0;
+ }
+
+ platform_set_drvdata(pdev, omap);
+
+ irq = platform_get_irq(pdev, 1);
+ if (irq < 0) {
+ dev_err(&pdev->dev, "missing IRQ resource\n");
+ ret = -EINVAL;
+ goto err1;
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ if (!res) {
+ dev_err(&pdev->dev, "missing memory base resource\n");
+ ret = -EINVAL;
+ goto err1;
+ }
+
+ base = ioremap_nocache(res->start, resource_size(res));
+ if (!base) {
+ dev_err(&pdev->dev, "ioremap failed\n");
+ goto err1;
+ }
+
+ dwc3 = platform_device_alloc("dwc3-omap", -1);
+ if (!dwc3) {
+ dev_err(&pdev->dev, "couldn't allocate dwc3 device\n");
+ goto err2;
+ }
+
+ context = kzalloc(resource_size(res), GFP_KERNEL);
+ if (!context) {
+ dev_err(&pdev->dev, "couldn't allocate dwc3 context memory\n");
+ goto err3;
+ }
+
+ spin_lock_init(&omap->lock);
+ dma_set_coherent_mask(&dwc3->dev, pdev->dev.coherent_dma_mask);
+
+ dwc3->dev.parent = &pdev->dev;
+ dwc3->dev.dma_mask = pdev->dev.dma_mask;
+ dwc3->dev.dma_parms = pdev->dev.dma_parms;
+ omap->resource_size = resource_size(res);
+ omap->context = context;
+ omap->dev = &pdev->dev;
+ omap->irq = irq;
+ omap->base = base;
+ omap->dwc3 = dwc3;
+
+ reg = dwc3_readl(omap->base, USBOTGSS_UTMI_OTG_STATUS);
+
+ if (!pdata) {
+ dev_dbg(&pdev->dev, "missing platform data\n");
+ } else {
+ switch (pdata->utmi_mode) {
+ case DWC3_OMAP_UTMI_MODE_SW:
+ reg |= USBOTGSS_UTMI_OTG_STATUS_SW_MODE;
+ break;
+ case DWC3_OMAP_UTMI_MODE_HW:
+ reg &= ~USBOTGSS_UTMI_OTG_STATUS_SW_MODE;
+ break;
+ default:
+ dev_dbg(&pdev->dev, "UNKNOWN utmi mode %d\n",
+ pdata->utmi_mode);
+ }
+ }
+
+ dwc3_writel(omap->base, USBOTGSS_UTMI_OTG_STATUS, reg);
+
+ /* check the DMA Status */
+ reg = dwc3_readl(omap->base, USBOTGSS_SYSCONFIG);
+ omap->dma_status = !!(reg & USBOTGSS_SYSCONFIG_DMADISABLE);
+
+ /* Set No-Idle and No-Standby */
+ reg &= ~(USBOTGSS_STANDBYMODE_MASK
+ | USBOTGSS_IDLEMODE_MASK);
+
+ reg |= (USBOTGSS_SYSCONFIG_STANDBYMODE(USBOTGSS_STANDBYMODE_NO_STANDBY)
+ | USBOTGSS_SYSCONFIG_IDLEMODE(USBOTGSS_IDLEMODE_NO_IDLE));
+
+ dwc3_writel(omap->base, USBOTGSS_SYSCONFIG, reg);
+
+ ret = request_irq(omap->irq, dwc3_omap_interrupt, 0,
+ "dwc3-omap", omap);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to request IRQ #%d --> %d\n",
+ omap->irq, ret);
+ goto err4;
+ }
+
+ /* enable all IRQs */
+ reg = USBOTGSS_IRQO_COREIRQ_ST;
+ dwc3_writel(omap->base, USBOTGSS_IRQENABLE_SET_0, reg);
+
+ reg = (USBOTGSS_IRQ1_OEVT |
+ USBOTGSS_IRQ1_DRVVBUS_RISE |
+ USBOTGSS_IRQ1_CHRGVBUS_RISE |
+ USBOTGSS_IRQ1_DISCHRGVBUS_RISE |
+ USBOTGSS_IRQ1_IDPULLUP_RISE |
+ USBOTGSS_IRQ1_DRVVBUS_FALL |
+ USBOTGSS_IRQ1_CHRGVBUS_FALL |
+ USBOTGSS_IRQ1_DISCHRGVBUS_FALL |
+ USBOTGSS_IRQ1_IDPULLUP_FALL);
+
+ dwc3_writel(omap->base, USBOTGSS_IRQENABLE_SET_1, reg);
+
+ ret = platform_device_add_resources(dwc3, pdev->resource,
+ pdev->num_resources);
+ if (ret) {
+ dev_err(&pdev->dev, "couldn't add resources to dwc3 device\n");
+ goto err5;
+ }
+
+ ret = platform_device_add(dwc3);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to register dwc3 device\n");
+ goto err5;
+ }
+
+ return 0;
+
+err5:
+ free_irq(omap->irq, omap);
+
+err4:
+ kfree(omap->context);
+
+err3:
+ platform_device_put(dwc3);
+
+err2:
+ iounmap(base);
+
+err1:
+ kfree(omap);
+
+err0:
+ return ret;
+}
+
+static int __devexit dwc3_omap_remove(struct platform_device *pdev)
+{
+ struct dwc3_omap *omap = platform_get_drvdata(pdev);
+
+ platform_device_unregister(omap->dwc3);
+
+ free_irq(omap->irq, omap);
+ iounmap(omap->base);
+
+ kfree(omap->context);
+ kfree(omap);
+
+ return 0;
+}
+
+static const struct of_device_id of_dwc3_matach[] = {
+ {
+ "ti,dwc3",
+ },
+ { },
+};
+MODULE_DEVICE_TABLE(of, of_dwc3_matach);
+
+static struct platform_driver dwc3_omap_driver = {
+ .probe = dwc3_omap_probe,
+ .remove = __devexit_p(dwc3_omap_remove),
+ .driver = {
+ .name = "omap-dwc3",
+ .of_match_table = of_dwc3_matach,
+ },
+};
+
+MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
+MODULE_LICENSE("Dual BSD/GPL");
+MODULE_DESCRIPTION("DesignWare USB3 OMAP Glue Layer");
+
+static int __devinit dwc3_omap_init(void)
+{
+ return platform_driver_register(&dwc3_omap_driver);
+}
+module_init(dwc3_omap_init);
+
+static void __exit dwc3_omap_exit(void)
+{
+ platform_driver_unregister(&dwc3_omap_driver);
+}
+module_exit(dwc3_omap_exit);
diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c
new file mode 100644
index 0000000..f77c000
--- /dev/null
+++ b/drivers/usb/dwc3/dwc3-pci.c
@@ -0,0 +1,219 @@
+/**
+ * dwc3-pci.c - PCI Specific glue layer
+ *
+ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Authors: Felipe Balbi <balbi@ti.com>,
+ * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2, as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/pci.h>
+#include <linux/platform_device.h>
+
+/* FIXME define these in <linux/pci_ids.h> */
+#define PCI_VENDOR_ID_SYNOPSYS 0x16c3
+#define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd
+
+#define DWC3_PCI_DEVS_POSSIBLE 32
+
+struct dwc3_pci {
+ struct device *dev;
+ struct platform_device *dwc3;
+};
+
+static DECLARE_BITMAP(dwc3_pci_devs, DWC3_PCI_DEVS_POSSIBLE);
+
+static int dwc3_pci_get_device_id(struct dwc3_pci *glue)
+{
+ int id;
+
+again:
+ id = find_first_zero_bit(dwc3_pci_devs, DWC3_PCI_DEVS_POSSIBLE);
+ if (id < DWC3_PCI_DEVS_POSSIBLE) {
+ int old;
+
+ old = test_and_set_bit(id, dwc3_pci_devs);
+ if (old)
+ goto again;
+ } else {
+ dev_err(glue->dev, "no space for new device\n");
+ id = -ENOMEM;
+ }
+
+ return 0;
+}
+
+static void dwc3_pci_put_device_id(struct dwc3_pci *glue, int id)
+{
+ int ret;
+
+ if (id < 0)
+ return;
+
+ ret = test_bit(id, dwc3_pci_devs);
+ WARN(!ret, "Device: %s\nID %d not in use\n",
+ dev_driver_string(glue->dev), id);
+ clear_bit(id, dwc3_pci_devs);
+}
+
+static int __devinit dwc3_pci_probe(struct pci_dev *pci,
+ const struct pci_device_id *id)
+{
+ struct resource res[2];
+ struct platform_device *dwc3;
+ struct dwc3_pci *glue;
+ int ret = -ENOMEM;
+ int devid;
+
+ glue = kzalloc(sizeof(*glue), GFP_KERNEL);
+ if (!glue) {
+ dev_err(&pci->dev, "not enough memory\n");
+ goto err0;
+ }
+
+ glue->dev = &pci->dev;
+
+ ret = pci_enable_device(pci);
+ if (ret) {
+ dev_err(&pci->dev, "failed to enable pci device\n");
+ goto err1;
+ }
+
+ pci_set_power_state(pci, PCI_D0);
+ pci_set_master(pci);
+
+ devid = dwc3_pci_get_device_id(glue);
+ if (devid < 0)
+ goto err2;
+
+ dwc3 = platform_device_alloc("dwc3-pci", devid);
+ if (!dwc3) {
+ dev_err(&pci->dev, "couldn't allocate dwc3 device\n");
+ goto err3;
+ }
+
+ memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
+
+ res[0].start = pci_resource_start(pci, 0);
+ res[0].end = pci_resource_end(pci, 0);
+ res[0].name = "dwc_usb3";
+ res[0].flags = IORESOURCE_MEM;
+
+ res[1].start = pci->irq;
+ res[1].name = "dwc_usb3";
+ res[1].flags = IORESOURCE_IRQ;
+
+ ret = platform_device_add_resources(dwc3, res, ARRAY_SIZE(res));
+ if (ret) {
+ dev_err(&pci->dev, "couldn't add resources to dwc3 device\n");
+ goto err4;
+ }
+
+ pci_set_drvdata(pci, glue);
+
+ dma_set_coherent_mask(&dwc3->dev, pci->dev.coherent_dma_mask);
+
+ dwc3->dev.dma_mask = pci->dev.dma_mask;
+ dwc3->dev.dma_parms = pci->dev.dma_parms;
+ dwc3->dev.parent = &pci->dev;
+ glue->dwc3 = dwc3;
+
+ ret = platform_device_add(dwc3);
+ if (ret) {
+ dev_err(&pci->dev, "failed to register dwc3 device\n");
+ goto err4;
+ }
+
+ return 0;
+
+err4:
+ pci_set_drvdata(pci, NULL);
+ platform_device_put(dwc3);
+
+err3:
+ dwc3_pci_put_device_id(glue, devid);
+
+err2:
+ pci_disable_device(pci);
+
+err1:
+ kfree(pci);
+
+err0:
+ return ret;
+}
+
+static void __devexit dwc3_pci_remove(struct pci_dev *pci)
+{
+ struct dwc3_pci *glue = pci_get_drvdata(pci);
+
+ dwc3_pci_put_device_id(glue, glue->dwc3->id);
+ platform_device_unregister(glue->dwc3);
+ pci_set_drvdata(pci, NULL);
+ pci_disable_device(pci);
+ kfree(glue);
+}
+
+static DEFINE_PCI_DEVICE_TABLE(dwc3_pci_id_table) = {
+ {
+ PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
+ PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3),
+ },
+ { } /* Terminating Entry */
+};
+MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
+
+static struct pci_driver dwc3_pci_driver = {
+ .name = "pci-dwc3",
+ .id_table = dwc3_pci_id_table,
+ .probe = dwc3_pci_probe,
+ .remove = __devexit_p(dwc3_pci_remove),
+};
+
+MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
+MODULE_LICENSE("Dual BSD/GPL");
+MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
+
+static int __devinit dwc3_pci_init(void)
+{
+ return pci_register_driver(&dwc3_pci_driver);
+}
+module_init(dwc3_pci_init);
+
+static void __exit dwc3_pci_exit(void)
+{
+ pci_unregister_driver(&dwc3_pci_driver);
+}
+module_exit(dwc3_pci_exit);
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
new file mode 100644
index 0000000..69a4e43
--- /dev/null
+++ b/drivers/usb/dwc3/ep0.c
@@ -0,0 +1,804 @@
+/**
+ * ep0.c - DesignWare USB3 DRD Controller Endpoint 0 Handling
+ *
+ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Authors: Felipe Balbi <balbi@ti.com>,
+ * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2, as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/list.h>
+#include <linux/dma-mapping.h>
+
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+
+#include "core.h"
+#include "gadget.h"
+#include "io.h"
+
+static void dwc3_ep0_inspect_setup(struct dwc3 *dwc,
+ const struct dwc3_event_depevt *event);
+
+static const char *dwc3_ep0_state_string(enum dwc3_ep0_state state)
+{
+ switch (state) {
+ case EP0_UNCONNECTED:
+ return "Unconnected";
+ case EP0_SETUP_PHASE:
+ return "Setup Phase";
+ case EP0_DATA_PHASE:
+ return "Data Phase";
+ case EP0_STATUS_PHASE:
+ return "Status Phase";
+ default:
+ return "UNKNOWN";
+ }
+}
+
+static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma,
+ u32 len, u32 type)
+{
+ struct dwc3_gadget_ep_cmd_params params;
+ struct dwc3_trb_hw *trb_hw;
+ struct dwc3_trb trb;
+ struct dwc3_ep *dep;
+
+ int ret;
+
+ dep = dwc->eps[epnum];
+ if (dep->flags & DWC3_EP_BUSY) {
+ dev_vdbg(dwc->dev, "%s: still busy\n", dep->name);
+ return 0;
+ }
+
+ trb_hw = dwc->ep0_trb;
+ memset(&trb, 0, sizeof(trb));
+
+ trb.trbctl = type;
+ trb.bplh = buf_dma;
+ trb.length = len;
+
+ trb.hwo = 1;
+ trb.lst = 1;
+ trb.ioc = 1;
+ trb.isp_imi = 1;
+
+ dwc3_trb_to_hw(&trb, trb_hw);
+
+ memset(¶ms, 0, sizeof(params));
+ params.param0 = upper_32_bits(dwc->ep0_trb_addr);
+ params.param1 = lower_32_bits(dwc->ep0_trb_addr);
+
+ ret = dwc3_send_gadget_ep_cmd(dwc, dep->number,
+ DWC3_DEPCMD_STARTTRANSFER, ¶ms);
+ if (ret < 0) {
+ dev_dbg(dwc->dev, "failed to send STARTTRANSFER command\n");
+ return ret;
+ }
+
+ dep->flags |= DWC3_EP_BUSY;
+ dep->res_trans_idx = dwc3_gadget_ep_get_transfer_index(dwc,
+ dep->number);
+
+ dwc->ep0_next_event = DWC3_EP0_COMPLETE;
+
+ return 0;
+}
+
+static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep,
+ struct dwc3_request *req)
+{
+ int ret = 0;
+
+ req->request.actual = 0;
+ req->request.status = -EINPROGRESS;
+ req->epnum = dep->number;
+
+ list_add_tail(&req->list, &dep->request_list);
+
+ /*
+ * Gadget driver might not be quick enough to queue a request
+ * before we get a Transfer Not Ready event on this endpoint.
+ *
+ * In that case, we will set DWC3_EP_PENDING_REQUEST. When that
+ * flag is set, it's telling us that as soon as Gadget queues the
+ * required request, we should kick the transfer here because the
+ * IRQ we were waiting for is long gone.
+ */
+ if (dep->flags & DWC3_EP_PENDING_REQUEST) {
+ struct dwc3 *dwc = dep->dwc;
+ unsigned direction;
+ u32 type;
+
+ direction = !!(dep->flags & DWC3_EP0_DIR_IN);
+
+ if (dwc->ep0state == EP0_STATUS_PHASE) {
+ type = dwc->three_stage_setup
+ ? DWC3_TRBCTL_CONTROL_STATUS3
+ : DWC3_TRBCTL_CONTROL_STATUS2;
+ } else if (dwc->ep0state == EP0_DATA_PHASE) {
+ type = DWC3_TRBCTL_CONTROL_DATA;
+ } else {
+ /* should never happen */
+ WARN_ON(1);
+ return 0;
+ }
+
+ ret = dwc3_ep0_start_trans(dwc, direction,
+ req->request.dma, req->request.length, type);
+ dep->flags &= ~(DWC3_EP_PENDING_REQUEST |
+ DWC3_EP0_DIR_IN);
+ }
+
+ return ret;
+}
+
+int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request,
+ gfp_t gfp_flags)
+{
+ struct dwc3_request *req = to_dwc3_request(request);
+ struct dwc3_ep *dep = to_dwc3_ep(ep);
+ struct dwc3 *dwc = dep->dwc;
+
+ unsigned long flags;
+
+ int ret;
+
+ spin_lock_irqsave(&dwc->lock, flags);
+ if (!dep->desc) {
+ dev_dbg(dwc->dev, "trying to queue request %p to disabled %s\n",
+ request, dep->name);
+ ret = -ESHUTDOWN;
+ goto out;
+ }
+
+ /* we share one TRB for ep0/1 */
+ if (!list_empty(&dwc->eps[0]->request_list) ||
+ !list_empty(&dwc->eps[1]->request_list) ||
+ dwc->ep0_status_pending) {
+ ret = -EBUSY;
+ goto out;
+ }
+
+ dev_vdbg(dwc->dev, "queueing request %p to %s length %d, state '%s'\n",
+ request, dep->name, request->length,
+ dwc3_ep0_state_string(dwc->ep0state));
+
+ ret = __dwc3_gadget_ep0_queue(dep, req);
+
+out:
+ spin_unlock_irqrestore(&dwc->lock, flags);
+
+ return ret;
+}
+
+static void dwc3_ep0_stall_and_restart(struct dwc3 *dwc)
+{
+ struct dwc3_ep *dep = dwc->eps[0];
+
+ /* stall is always issued on EP0 */
+ __dwc3_gadget_ep_set_halt(dwc->eps[0], 1);
+ dwc->eps[0]->flags = DWC3_EP_ENABLED;
+
+ if (!list_empty(&dep->request_list)) {
+ struct dwc3_request *req;
+
+ req = next_request(&dep->request_list);
+ dwc3_gadget_giveback(dep, req, -ECONNRESET);
+ }
+
+ dwc->ep0state = EP0_SETUP_PHASE;
+ dwc3_ep0_out_start(dwc);
+}
+
+void dwc3_ep0_out_start(struct dwc3 *dwc)
+{
+ int ret;
+
+ ret = dwc3_ep0_start_trans(dwc, 0, dwc->ctrl_req_addr, 8,
+ DWC3_TRBCTL_CONTROL_SETUP);
+ WARN_ON(ret < 0);
+}
+
+static struct dwc3_ep *dwc3_wIndex_to_dep(struct dwc3 *dwc, __le16 wIndex_le)
+{
+ struct dwc3_ep *dep;
+ u32 windex = le16_to_cpu(wIndex_le);
+ u32 epnum;
+
+ epnum = (windex & USB_ENDPOINT_NUMBER_MASK) << 1;
+ if ((windex & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN)
+ epnum |= 1;
+
+ dep = dwc->eps[epnum];
+ if (dep->flags & DWC3_EP_ENABLED)
+ return dep;
+
+ return NULL;
+}
+
+static void dwc3_ep0_send_status_response(struct dwc3 *dwc)
+{
+ dwc3_ep0_start_trans(dwc, 1, dwc->setup_buf_addr,
+ dwc->ep0_usb_req.length,
+ DWC3_TRBCTL_CONTROL_DATA);
+}
+
+/*
+ * ch 9.4.5
+ */
+static int dwc3_ep0_handle_status(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
+{
+ struct dwc3_ep *dep;
+ u32 recip;
+ u16 usb_status = 0;
+ __le16 *response_pkt;
+
+ recip = ctrl->bRequestType & USB_RECIP_MASK;
+ switch (recip) {
+ case USB_RECIP_DEVICE:
+ /*
+ * We are self-powered. U1/U2/LTM will be set later
+ * once we handle this states. RemoteWakeup is 0 on SS
+ */
+ usb_status |= dwc->is_selfpowered << USB_DEVICE_SELF_POWERED;
+ break;
+
+ case USB_RECIP_INTERFACE:
+ /*
+ * Function Remote Wake Capable D0
+ * Function Remote Wakeup D1
+ */
+ break;
+
+ case USB_RECIP_ENDPOINT:
+ dep = dwc3_wIndex_to_dep(dwc, ctrl->wIndex);
+ if (!dep)
+ return -EINVAL;
+
+ if (dep->flags & DWC3_EP_STALL)
+ usb_status = 1 << USB_ENDPOINT_HALT;
+ break;
+ default:
+ return -EINVAL;
+ };
+
+ response_pkt = (__le16 *) dwc->setup_buf;
+ *response_pkt = cpu_to_le16(usb_status);
+ dwc->ep0_usb_req.length = sizeof(*response_pkt);
+ dwc->ep0_status_pending = 1;
+
+ return 0;
+}
+
+static int dwc3_ep0_handle_feature(struct dwc3 *dwc,
+ struct usb_ctrlrequest *ctrl, int set)
+{
+ struct dwc3_ep *dep;
+ u32 recip;
+ u32 wValue;
+ u32 wIndex;
+ u32 reg;
+ int ret;
+ u32 mode;
+
+ wValue = le16_to_cpu(ctrl->wValue);
+ wIndex = le16_to_cpu(ctrl->wIndex);
+ recip = ctrl->bRequestType & USB_RECIP_MASK;
+ switch (recip) {
+ case USB_RECIP_DEVICE:
+
+ /*
+ * 9.4.1 says only only for SS, in AddressState only for
+ * default control pipe
+ */
+ switch (wValue) {
+ case USB_DEVICE_U1_ENABLE:
+ case USB_DEVICE_U2_ENABLE:
+ case USB_DEVICE_LTM_ENABLE:
+ if (dwc->dev_state != DWC3_CONFIGURED_STATE)
+ return -EINVAL;
+ if (dwc->speed != DWC3_DSTS_SUPERSPEED)
+ return -EINVAL;
+ }
+
+ /* XXX add U[12] & LTM */
+ switch (wValue) {
+ case USB_DEVICE_REMOTE_WAKEUP:
+ break;
+ case USB_DEVICE_U1_ENABLE:
+ break;
+ case USB_DEVICE_U2_ENABLE:
+ break;
+ case USB_DEVICE_LTM_ENABLE:
+ break;
+
+ case USB_DEVICE_TEST_MODE:
+ if ((wIndex & 0xff) != 0)
+ return -EINVAL;
+ if (!set)
+ return -EINVAL;
+
+ mode = wIndex >> 8;
+ reg = dwc3_readl(dwc->regs, DWC3_DCTL);
+ reg &= ~DWC3_DCTL_TSTCTRL_MASK;
+
+ switch (mode) {
+ case TEST_J:
+ case TEST_K:
+ case TEST_SE0_NAK:
+ case TEST_PACKET:
+ case TEST_FORCE_EN:
+ reg |= mode << 1;
+ break;
+ default:
+ return -EINVAL;
+ }
+ dwc3_writel(dwc->regs, DWC3_DCTL, reg);
+ break;
+ default:
+ return -EINVAL;
+ }
+ break;
+
+ case USB_RECIP_INTERFACE:
+ switch (wValue) {
+ case USB_INTRF_FUNC_SUSPEND:
+ if (wIndex & USB_INTRF_FUNC_SUSPEND_LP)
+ /* XXX enable Low power suspend */
+ ;
+ if (wIndex & USB_INTRF_FUNC_SUSPEND_RW)
+ /* XXX enable remote wakeup */
+ ;
+ break;
+ default:
+ return -EINVAL;
+ }
+ break;
+
+ case USB_RECIP_ENDPOINT:
+ switch (wValue) {
+ case USB_ENDPOINT_HALT:
+
+ dep = dwc3_wIndex_to_dep(dwc, ctrl->wIndex);
+ if (!dep)
+ return -EINVAL;
+ ret = __dwc3_gadget_ep_set_halt(dep, set);
+ if (ret)
+ return -EINVAL;
+ break;
+ default:
+ return -EINVAL;
+ }
+ break;
+
+ default:
+ return -EINVAL;
+ };
+
+ return 0;
+}
+
+static int dwc3_ep0_set_address(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
+{
+ u32 addr;
+ u32 reg;
+
+ addr = le16_to_cpu(ctrl->wValue);
+ if (addr > 127)
+ return -EINVAL;
+
+ reg = dwc3_readl(dwc->regs, DWC3_DCFG);
+ reg &= ~(DWC3_DCFG_DEVADDR_MASK);
+ reg |= DWC3_DCFG_DEVADDR(addr);
+ dwc3_writel(dwc->regs, DWC3_DCFG, reg);
+
+ if (addr)
+ dwc->dev_state = DWC3_ADDRESS_STATE;
+ else
+ dwc->dev_state = DWC3_DEFAULT_STATE;
+
+ return 0;
+}
+
+static int dwc3_ep0_delegate_req(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
+{
+ int ret;
+
+ spin_unlock(&dwc->lock);
+ ret = dwc->gadget_driver->setup(&dwc->gadget, ctrl);
+ spin_lock(&dwc->lock);
+ return ret;
+}
+
+static int dwc3_ep0_set_config(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
+{
+ u32 cfg;
+ int ret;
+
+ dwc->start_config_issued = false;
+ cfg = le16_to_cpu(ctrl->wValue);
+
+ switch (dwc->dev_state) {
+ case DWC3_DEFAULT_STATE:
+ return -EINVAL;
+ break;
+
+ case DWC3_ADDRESS_STATE:
+ ret = dwc3_ep0_delegate_req(dwc, ctrl);
+ /* if the cfg matches and the cfg is non zero */
+ if (!ret && cfg)
+ dwc->dev_state = DWC3_CONFIGURED_STATE;
+ break;
+
+ case DWC3_CONFIGURED_STATE:
+ ret = dwc3_ep0_delegate_req(dwc, ctrl);
+ if (!cfg)
+ dwc->dev_state = DWC3_ADDRESS_STATE;
+ break;
+ }
+ return 0;
+}
+
+static int dwc3_ep0_std_request(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
+{
+ int ret;
+
+ switch (ctrl->bRequest) {
+ case USB_REQ_GET_STATUS:
+ dev_vdbg(dwc->dev, "USB_REQ_GET_STATUS\n");
+ ret = dwc3_ep0_handle_status(dwc, ctrl);
+ break;
+ case USB_REQ_CLEAR_FEATURE:
+ dev_vdbg(dwc->dev, "USB_REQ_CLEAR_FEATURE\n");
+ ret = dwc3_ep0_handle_feature(dwc, ctrl, 0);
+ break;
+ case USB_REQ_SET_FEATURE:
+ dev_vdbg(dwc->dev, "USB_REQ_SET_FEATURE\n");
+ ret = dwc3_ep0_handle_feature(dwc, ctrl, 1);
+ break;
+ case USB_REQ_SET_ADDRESS:
+ dev_vdbg(dwc->dev, "USB_REQ_SET_ADDRESS\n");
+ ret = dwc3_ep0_set_address(dwc, ctrl);
+ break;
+ case USB_REQ_SET_CONFIGURATION:
+ dev_vdbg(dwc->dev, "USB_REQ_SET_CONFIGURATION\n");
+ ret = dwc3_ep0_set_config(dwc, ctrl);
+ break;
+ default:
+ dev_vdbg(dwc->dev, "Forwarding to gadget driver\n");
+ ret = dwc3_ep0_delegate_req(dwc, ctrl);
+ break;
+ };
+
+ return ret;
+}
+
+static void dwc3_ep0_inspect_setup(struct dwc3 *dwc,
+ const struct dwc3_event_depevt *event)
+{
+ struct usb_ctrlrequest *ctrl = dwc->ctrl_req;
+ int ret;
+ u32 len;
+
+ if (!dwc->gadget_driver)
+ goto err;
+
+ len = le16_to_cpu(ctrl->wLength);
+ if (!len) {
+ dwc->three_stage_setup = false;
+ dwc->ep0_expect_in = false;
+ dwc->ep0_next_event = DWC3_EP0_NRDY_STATUS;
+ } else {
+ dwc->three_stage_setup = true;
+ dwc->ep0_expect_in = !!(ctrl->bRequestType & USB_DIR_IN);
+ dwc->ep0_next_event = DWC3_EP0_NRDY_DATA;
+ }
+
+ if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD)
+ ret = dwc3_ep0_std_request(dwc, ctrl);
+ else
+ ret = dwc3_ep0_delegate_req(dwc, ctrl);
+
+ if (ret >= 0)
+ return;
+
+err:
+ dwc3_ep0_stall_and_restart(dwc);
+}
+
+static void dwc3_ep0_complete_data(struct dwc3 *dwc,
+ const struct dwc3_event_depevt *event)
+{
+ struct dwc3_request *r = NULL;
+ struct usb_request *ur;
+ struct dwc3_trb trb;
+ struct dwc3_ep *dep;
+ u32 transferred;
+ u8 epnum;
+
+ epnum = event->endpoint_number;
+ dep = dwc->eps[epnum];
+
+ dwc->ep0_next_event = DWC3_EP0_NRDY_STATUS;
+
+ if (!dwc->ep0_status_pending) {
+ r = next_request(&dwc->eps[0]->request_list);
+ ur = &r->request;
+ } else {
+ ur = &dwc->ep0_usb_req;
+ dwc->ep0_status_pending = 0;
+ }
+
+ dwc3_trb_to_nat(dwc->ep0_trb, &trb);
+
+ if (dwc->ep0_bounced) {
+ struct dwc3_ep *ep0 = dwc->eps[0];
+
+ transferred = min_t(u32, ur->length,
+ ep0->endpoint.maxpacket - trb.length);
+ memcpy(ur->buf, dwc->ep0_bounce, transferred);
+ dwc->ep0_bounced = false;
+ } else {
+ transferred = ur->length - trb.length;
+ ur->actual += transferred;
+ }
+
+ if ((epnum & 1) && ur->actual < ur->length) {
+ /* for some reason we did not get everything out */
+
+ dwc3_ep0_stall_and_restart(dwc);
+ } else {
+ /*
+ * handle the case where we have to send a zero packet. This
+ * seems to be case when req.length > maxpacket. Could it be?
+ */
+ if (r)
+ dwc3_gadget_giveback(dep, r, 0);
+ }
+}
+
+static void dwc3_ep0_complete_req(struct dwc3 *dwc,
+ const struct dwc3_event_depevt *event)
+{
+ struct dwc3_request *r;
+ struct dwc3_ep *dep;
+
+ dep = dwc->eps[0];
+
+ if (!list_empty(&dep->request_list)) {
+ r = next_request(&dep->request_list);
+
+ dwc3_gadget_giveback(dep, r, 0);
+ }
+
+ dwc->ep0state = EP0_SETUP_PHASE;
+ dwc3_ep0_out_start(dwc);
+}
+
+static void dwc3_ep0_xfer_complete(struct dwc3 *dwc,
+ const struct dwc3_event_depevt *event)
+{
+ struct dwc3_ep *dep = dwc->eps[event->endpoint_number];
+
+ dep->flags &= ~DWC3_EP_BUSY;
+
+ switch (dwc->ep0state) {
+ case EP0_SETUP_PHASE:
+ dev_vdbg(dwc->dev, "Inspecting Setup Bytes\n");
+ dwc3_ep0_inspect_setup(dwc, event);
+ break;
+
+ case EP0_DATA_PHASE:
+ dev_vdbg(dwc->dev, "Data Phase\n");
+ dwc3_ep0_complete_data(dwc, event);
+ break;
+
+ case EP0_STATUS_PHASE:
+ dev_vdbg(dwc->dev, "Status Phase\n");
+ dwc3_ep0_complete_req(dwc, event);
+ break;
+ default:
+ WARN(true, "UNKNOWN ep0state %d\n", dwc->ep0state);
+ }
+}
+
+static void dwc3_ep0_do_control_setup(struct dwc3 *dwc,
+ const struct dwc3_event_depevt *event)
+{
+ dwc->ep0state = EP0_SETUP_PHASE;
+ dwc3_ep0_out_start(dwc);
+}
+
+static void dwc3_ep0_do_control_data(struct dwc3 *dwc,
+ const struct dwc3_event_depevt *event)
+{
+ struct dwc3_ep *dep;
+ struct dwc3_request *req;
+ int ret;
+
+ dep = dwc->eps[0];
+ dwc->ep0state = EP0_DATA_PHASE;
+
+ if (dwc->ep0_status_pending) {
+ dwc3_ep0_send_status_response(dwc);
+ return;
+ }
+
+ if (list_empty(&dep->request_list)) {
+ dev_vdbg(dwc->dev, "pending request for EP0 Data phase\n");
+ dep->flags |= DWC3_EP_PENDING_REQUEST;
+
+ if (event->endpoint_number)
+ dep->flags |= DWC3_EP0_DIR_IN;
+ return;
+ }
+
+ req = next_request(&dep->request_list);
+ req->direction = !!event->endpoint_number;
+
+ dwc->ep0state = EP0_DATA_PHASE;
+ if (req->request.length == 0) {
+ ret = dwc3_ep0_start_trans(dwc, event->endpoint_number,
+ dwc->ctrl_req_addr, 0,
+ DWC3_TRBCTL_CONTROL_DATA);
+ } else if ((req->request.length % dep->endpoint.maxpacket)
+ && (event->endpoint_number == 0)) {
+ dwc3_map_buffer_to_dma(req);
+
+ WARN_ON(req->request.length > dep->endpoint.maxpacket);
+
+ dwc->ep0_bounced = true;
+
+ /*
+ * REVISIT in case request length is bigger than EP0
+ * wMaxPacketSize, we will need two chained TRBs to handle
+ * the transfer.
+ */
+ ret = dwc3_ep0_start_trans(dwc, event->endpoint_number,
+ dwc->ep0_bounce_addr, dep->endpoint.maxpacket,
+ DWC3_TRBCTL_CONTROL_DATA);
+ } else {
+ dwc3_map_buffer_to_dma(req);
+
+ ret = dwc3_ep0_start_trans(dwc, event->endpoint_number,
+ req->request.dma, req->request.length,
+ DWC3_TRBCTL_CONTROL_DATA);
+ }
+
+ WARN_ON(ret < 0);
+}
+
+static void dwc3_ep0_do_control_status(struct dwc3 *dwc,
+ const struct dwc3_event_depevt *event)
+{
+ u32 type;
+ int ret;
+
+ dwc->ep0state = EP0_STATUS_PHASE;
+
+ type = dwc->three_stage_setup ? DWC3_TRBCTL_CONTROL_STATUS3
+ : DWC3_TRBCTL_CONTROL_STATUS2;
+
+ ret = dwc3_ep0_start_trans(dwc, event->endpoint_number,
+ dwc->ctrl_req_addr, 0, type);
+
+ WARN_ON(ret < 0);
+}
+
+static void dwc3_ep0_xfernotready(struct dwc3 *dwc,
+ const struct dwc3_event_depevt *event)
+{
+ switch (event->status) {
+ case DEPEVT_STATUS_CONTROL_SETUP:
+ dev_vdbg(dwc->dev, "Control Setup\n");
+ dwc3_ep0_do_control_setup(dwc, event);
+ break;
+
+ case DEPEVT_STATUS_CONTROL_DATA:
+ dev_vdbg(dwc->dev, "Control Data\n");
+
+ if (dwc->ep0_next_event != DWC3_EP0_NRDY_DATA) {
+ dev_vdbg(dwc->dev, "Expected %d got %d\n",
+ dwc->ep0_next_event,
+ DWC3_EP0_NRDY_DATA);
+
+ dwc3_ep0_stall_and_restart(dwc);
+ return;
+ }
+
+ /*
+ * One of the possible error cases is when Host _does_
+ * request for Data Phase, but it does so on the wrong
+ * direction.
+ *
+ * Here, we already know ep0_next_event is DATA (see above),
+ * so we only need to check for direction.
+ */
+ if (dwc->ep0_expect_in != event->endpoint_number) {
+ dev_vdbg(dwc->dev, "Wrong direction for Data phase\n");
+ dwc3_ep0_stall_and_restart(dwc);
+ return;
+ }
+
+ dwc3_ep0_do_control_data(dwc, event);
+ break;
+
+ case DEPEVT_STATUS_CONTROL_STATUS:
+ dev_vdbg(dwc->dev, "Control Status\n");
+
+ if (dwc->ep0_next_event != DWC3_EP0_NRDY_STATUS) {
+ dev_vdbg(dwc->dev, "Expected %d got %d\n",
+ dwc->ep0_next_event,
+ DWC3_EP0_NRDY_STATUS);
+
+ dwc3_ep0_stall_and_restart(dwc);
+ return;
+ }
+ dwc3_ep0_do_control_status(dwc, event);
+ }
+}
+
+void dwc3_ep0_interrupt(struct dwc3 *dwc,
+ const const struct dwc3_event_depevt *event)
+{
+ u8 epnum = event->endpoint_number;
+
+ dev_dbg(dwc->dev, "%s while ep%d%s in state '%s'\n",
+ dwc3_ep_event_string(event->endpoint_event),
+ epnum >> 1, (epnum & 1) ? "in" : "out",
+ dwc3_ep0_state_string(dwc->ep0state));
+
+ switch (event->endpoint_event) {
+ case DWC3_DEPEVT_XFERCOMPLETE:
+ dwc3_ep0_xfer_complete(dwc, event);
+ break;
+
+ case DWC3_DEPEVT_XFERNOTREADY:
+ dwc3_ep0_xfernotready(dwc, event);
+ break;
+
+ case DWC3_DEPEVT_XFERINPROGRESS:
+ case DWC3_DEPEVT_RXTXFIFOEVT:
+ case DWC3_DEPEVT_STREAMEVT:
+ case DWC3_DEPEVT_EPCMDCMPLT:
+ break;
+ }
+}
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
new file mode 100644
index 0000000..fa824cf
--- /dev/null
+++ b/drivers/usb/dwc3/gadget.c
@@ -0,0 +1,2104 @@
+/**
+ * gadget.c - DesignWare USB3 DRD Controller Gadget Framework Link
+ *
+ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Authors: Felipe Balbi <balbi@ti.com>,
+ * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2, as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/list.h>
+#include <linux/dma-mapping.h>
+
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+
+#include "core.h"
+#include "gadget.h"
+#include "io.h"
+
+#define DMA_ADDR_INVALID (~(dma_addr_t)0)
+
+void dwc3_map_buffer_to_dma(struct dwc3_request *req)
+{
+ struct dwc3 *dwc = req->dep->dwc;
+
+ if (req->request.length == 0) {
+ /* req->request.dma = dwc->setup_buf_addr; */
+ return;
+ }
+
+ if (req->request.dma == DMA_ADDR_INVALID) {
+ req->request.dma = dma_map_single(dwc->dev, req->request.buf,
+ req->request.length, req->direction
+ ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
+ req->mapped = true;
+ }
+}
+
+void dwc3_unmap_buffer_from_dma(struct dwc3_request *req)
+{
+ struct dwc3 *dwc = req->dep->dwc;
+
+ if (req->request.length == 0) {
+ req->request.dma = DMA_ADDR_INVALID;
+ return;
+ }
+
+ if (req->mapped) {
+ dma_unmap_single(dwc->dev, req->request.dma,
+ req->request.length, req->direction
+ ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
+ req->mapped = 0;
+ req->request.dma = DMA_ADDR_INVALID;
+ }
+}
+
+void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
+ int status)
+{
+ struct dwc3 *dwc = dep->dwc;
+
+ if (req->queued) {
+ dep->busy_slot++;
+ /*
+ * Skip LINK TRB. We can't use req->trb and check for
+ * DWC3_TRBCTL_LINK_TRB because it points the TRB we just
+ * completed (not the LINK TRB).
+ */
+ if (((dep->busy_slot & DWC3_TRB_MASK) == DWC3_TRB_NUM - 1) &&
+ usb_endpoint_xfer_isoc(dep->desc))
+ dep->busy_slot++;
+ }
+ list_del(&req->list);
+
+ if (req->request.status == -EINPROGRESS)
+ req->request.status = status;
+
+ dwc3_unmap_buffer_from_dma(req);
+
+ dev_dbg(dwc->dev, "request %p from %s completed %d/%d ===> %d\n",
+ req, dep->name, req->request.actual,
+ req->request.length, status);
+
+ spin_unlock(&dwc->lock);
+ req->request.complete(&req->dep->endpoint, &req->request);
+ spin_lock(&dwc->lock);
+}
+
+static const char *dwc3_gadget_ep_cmd_string(u8 cmd)
+{
+ switch (cmd) {
+ case DWC3_DEPCMD_DEPSTARTCFG:
+ return "Start New Configuration";
+ case DWC3_DEPCMD_ENDTRANSFER:
+ return "End Transfer";
+ case DWC3_DEPCMD_UPDATETRANSFER:
+ return "Update Transfer";
+ case DWC3_DEPCMD_STARTTRANSFER:
+ return "Start Transfer";
+ case DWC3_DEPCMD_CLEARSTALL:
+ return "Clear Stall";
+ case DWC3_DEPCMD_SETSTALL:
+ return "Set Stall";
+ case DWC3_DEPCMD_GETSEQNUMBER:
+ return "Get Data Sequence Number";
+ case DWC3_DEPCMD_SETTRANSFRESOURCE:
+ return "Set Endpoint Transfer Resource";
+ case DWC3_DEPCMD_SETEPCONFIG:
+ return "Set Endpoint Configuration";
+ default:
+ return "UNKNOWN command";
+ }
+}
+
+int dwc3_send_gadget_ep_cmd(struct dwc3 *dwc, unsigned ep,
+ unsigned cmd, struct dwc3_gadget_ep_cmd_params *params)
+{
+ struct dwc3_ep *dep = dwc->eps[ep];
+ u32 timeout = 500;
+ u32 reg;
+
+ dev_vdbg(dwc->dev, "%s: cmd '%s' params %08x %08x %08x\n",
+ dep->name,
+ dwc3_gadget_ep_cmd_string(cmd), params->param0,
+ params->param1, params->param2);
+
+ dwc3_writel(dwc->regs, DWC3_DEPCMDPAR0(ep), params->param0);
+ dwc3_writel(dwc->regs, DWC3_DEPCMDPAR1(ep), params->param1);
+ dwc3_writel(dwc->regs, DWC3_DEPCMDPAR2(ep), params->param2);
+
+ dwc3_writel(dwc->regs, DWC3_DEPCMD(ep), cmd | DWC3_DEPCMD_CMDACT);
+ do {
+ reg = dwc3_readl(dwc->regs, DWC3_DEPCMD(ep));
+ if (!(reg & DWC3_DEPCMD_CMDACT)) {
+ dev_vdbg(dwc->dev, "Command Complete --> %d\n",
+ DWC3_DEPCMD_STATUS(reg));
+ return 0;
+ }
+
+ /*
+ * We can't sleep here, because it is also called from
+ * interrupt context.
+ */
+ timeout--;
+ if (!timeout)
+ return -ETIMEDOUT;
+
+ udelay(1);
+ } while (1);
+}
+
+static dma_addr_t dwc3_trb_dma_offset(struct dwc3_ep *dep,
+ struct dwc3_trb_hw *trb)
+{
+ u32 offset = (char *) trb - (char *) dep->trb_pool;
+
+ return dep->trb_pool_dma + offset;
+}
+
+static int dwc3_alloc_trb_pool(struct dwc3_ep *dep)
+{
+ struct dwc3 *dwc = dep->dwc;
+
+ if (dep->trb_pool)
+ return 0;
+
+ if (dep->number == 0 || dep->number == 1)
+ return 0;
+
+ dep->trb_pool = dma_alloc_coherent(dwc->dev,
+ sizeof(struct dwc3_trb) * DWC3_TRB_NUM,
+ &dep->trb_pool_dma, GFP_KERNEL);
+ if (!dep->trb_pool) {
+ dev_err(dep->dwc->dev, "failed to allocate trb pool for %s\n",
+ dep->name);
+ return -ENOMEM;
+ }
+
+ return 0;
+}
+
+static void dwc3_free_trb_pool(struct dwc3_ep *dep)
+{
+ struct dwc3 *dwc = dep->dwc;
+
+ dma_free_coherent(dwc->dev, sizeof(struct dwc3_trb) * DWC3_TRB_NUM,
+ dep->trb_pool, dep->trb_pool_dma);
+
+ dep->trb_pool = NULL;
+ dep->trb_pool_dma = 0;
+}
+
+static int dwc3_gadget_start_config(struct dwc3 *dwc, struct dwc3_ep *dep)
+{
+ struct dwc3_gadget_ep_cmd_params params;
+ u32 cmd;
+
+ memset(¶ms, 0x00, sizeof(params));
+
+ if (dep->number != 1) {
+ cmd = DWC3_DEPCMD_DEPSTARTCFG;
+ /* XferRscIdx == 0 for ep0 and 2 for the remaining */
+ if (dep->number > 1) {
+ if (dwc->start_config_issued)
+ return 0;
+ dwc->start_config_issued = true;
+ cmd |= DWC3_DEPCMD_PARAM(2);
+ }
+
+ return dwc3_send_gadget_ep_cmd(dwc, 0, cmd, ¶ms);
+ }
+
+ return 0;
+}
+
+static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep,
+ const struct usb_endpoint_descriptor *desc)
+{
+ struct dwc3_gadget_ep_cmd_params params;
+
+ memset(¶ms, 0x00, sizeof(params));
+
+ params.param0 = DWC3_DEPCFG_EP_TYPE(usb_endpoint_type(desc))
+ | DWC3_DEPCFG_MAX_PACKET_SIZE(usb_endpoint_maxp(desc))
+ | DWC3_DEPCFG_BURST_SIZE(dep->endpoint.maxburst);
+
+ params.param1 = DWC3_DEPCFG_XFER_COMPLETE_EN
+ | DWC3_DEPCFG_XFER_NOT_READY_EN;
+
+ if (usb_endpoint_xfer_bulk(desc) && dep->endpoint.max_streams) {
+ params.param1 |= DWC3_DEPCFG_STREAM_CAPABLE
+ | DWC3_DEPCFG_STREAM_EVENT_EN;
+ dep->stream_capable = true;
+ }
+
+ if (usb_endpoint_xfer_isoc(desc))
+ params.param1 |= DWC3_DEPCFG_XFER_IN_PROGRESS_EN;
+
+ /*
+ * We are doing 1:1 mapping for endpoints, meaning
+ * Physical Endpoints 2 maps to Logical Endpoint 2 and
+ * so on. We consider the direction bit as part of the physical
+ * endpoint number. So USB endpoint 0x81 is 0x03.
+ */
+ params.param1 |= DWC3_DEPCFG_EP_NUMBER(dep->number);
+
+ /*
+ * We must use the lower 16 TX FIFOs even though
+ * HW might have more
+ */
+ if (dep->direction)
+ params.param0 |= DWC3_DEPCFG_FIFO_NUMBER(dep->number >> 1);
+
+ if (desc->bInterval) {
+ params.param1 |= DWC3_DEPCFG_BINTERVAL_M1(desc->bInterval - 1);
+ dep->interval = 1 << (desc->bInterval - 1);
+ }
+
+ return dwc3_send_gadget_ep_cmd(dwc, dep->number,
+ DWC3_DEPCMD_SETEPCONFIG, ¶ms);
+}
+
+static int dwc3_gadget_set_xfer_resource(struct dwc3 *dwc, struct dwc3_ep *dep)
+{
+ struct dwc3_gadget_ep_cmd_params params;
+
+ memset(¶ms, 0x00, sizeof(params));
+
+ params.param0 = DWC3_DEPXFERCFG_NUM_XFER_RES(1);
+
+ return dwc3_send_gadget_ep_cmd(dwc, dep->number,
+ DWC3_DEPCMD_SETTRANSFRESOURCE, ¶ms);
+}
+
+/**
+ * __dwc3_gadget_ep_enable - Initializes a HW endpoint
+ * @dep: endpoint to be initialized
+ * @desc: USB Endpoint Descriptor
+ *
+ * Caller should take care of locking
+ */
+static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep,
+ const struct usb_endpoint_descriptor *desc)
+{
+ struct dwc3 *dwc = dep->dwc;
+ u32 reg;
+ int ret = -ENOMEM;
+
+ if (!(dep->flags & DWC3_EP_ENABLED)) {
+ ret = dwc3_gadget_start_config(dwc, dep);
+ if (ret)
+ return ret;
+ }
+
+ ret = dwc3_gadget_set_ep_config(dwc, dep, desc);
+ if (ret)
+ return ret;
+
+ if (!(dep->flags & DWC3_EP_ENABLED)) {
+ struct dwc3_trb_hw *trb_st_hw;
+ struct dwc3_trb_hw *trb_link_hw;
+ struct dwc3_trb trb_link;
+
+ ret = dwc3_gadget_set_xfer_resource(dwc, dep);
+ if (ret)
+ return ret;
+
+ dep->desc = desc;
+ dep->type = usb_endpoint_type(desc);
+ dep->flags |= DWC3_EP_ENABLED;
+
+ reg = dwc3_readl(dwc->regs, DWC3_DALEPENA);
+ reg |= DWC3_DALEPENA_EP(dep->number);
+ dwc3_writel(dwc->regs, DWC3_DALEPENA, reg);
+
+ if (!usb_endpoint_xfer_isoc(desc))
+ return 0;
+
+ memset(&trb_link, 0, sizeof(trb_link));
+
+ /* Link TRB for ISOC. The HWO but is never reset */
+ trb_st_hw = &dep->trb_pool[0];
+
+ trb_link.bplh = dwc3_trb_dma_offset(dep, trb_st_hw);
+ trb_link.trbctl = DWC3_TRBCTL_LINK_TRB;
+ trb_link.hwo = true;
+
+ trb_link_hw = &dep->trb_pool[DWC3_TRB_NUM - 1];
+ dwc3_trb_to_hw(&trb_link, trb_link_hw);
+ }
+
+ return 0;
+}
+
+static void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum);
+static void dwc3_remove_requests(struct dwc3 *dwc, struct dwc3_ep *dep)
+{
+ struct dwc3_request *req;
+
+ if (!list_empty(&dep->req_queued))
+ dwc3_stop_active_transfer(dwc, dep->number);
+
+ while (!list_empty(&dep->request_list)) {
+ req = next_request(&dep->request_list);
+
+ dwc3_gadget_giveback(dep, req, -ESHUTDOWN);
+ }
+}
+
+/**
+ * __dwc3_gadget_ep_disable - Disables a HW endpoint
+ * @dep: the endpoint to disable
+ *
+ * This function also removes requests which are currently processed ny the
+ * hardware and those which are not yet scheduled.
+ * Caller should take care of locking.
+ */
+static int __dwc3_gadget_ep_disable(struct dwc3_ep *dep)
+{
+ struct dwc3 *dwc = dep->dwc;
+ u32 reg;
+
+ dwc3_remove_requests(dwc, dep);
+
+ reg = dwc3_readl(dwc->regs, DWC3_DALEPENA);
+ reg &= ~DWC3_DALEPENA_EP(dep->number);
+ dwc3_writel(dwc->regs, DWC3_DALEPENA, reg);
+
+ dep->stream_capable = false;
+ dep->desc = NULL;
+ dep->type = 0;
+ dep->flags = 0;
+
+ return 0;
+}
+
+/* -------------------------------------------------------------------------- */
+
+static int dwc3_gadget_ep0_enable(struct usb_ep *ep,
+ const struct usb_endpoint_descriptor *desc)
+{
+ return -EINVAL;
+}
+
+static int dwc3_gadget_ep0_disable(struct usb_ep *ep)
+{
+ return -EINVAL;
+}
+
+/* -------------------------------------------------------------------------- */
+
+static int dwc3_gadget_ep_enable(struct usb_ep *ep,
+ const struct usb_endpoint_descriptor *desc)
+{
+ struct dwc3_ep *dep;
+ struct dwc3 *dwc;
+ unsigned long flags;
+ int ret;
+
+ if (!ep || !desc || desc->bDescriptorType != USB_DT_ENDPOINT) {
+ pr_debug("dwc3: invalid parameters\n");
+ return -EINVAL;
+ }
+
+ if (!desc->wMaxPacketSize) {
+ pr_debug("dwc3: missing wMaxPacketSize\n");
+ return -EINVAL;
+ }
+
+ dep = to_dwc3_ep(ep);
+ dwc = dep->dwc;
+
+ switch (usb_endpoint_type(desc)) {
+ case USB_ENDPOINT_XFER_CONTROL:
+ strncat(dep->name, "-control", sizeof(dep->name));
+ break;
+ case USB_ENDPOINT_XFER_ISOC:
+ strncat(dep->name, "-isoc", sizeof(dep->name));
+ break;
+ case USB_ENDPOINT_XFER_BULK:
+ strncat(dep->name, "-bulk", sizeof(dep->name));
+ break;
+ case USB_ENDPOINT_XFER_INT:
+ strncat(dep->name, "-int", sizeof(dep->name));
+ break;
+ default:
+ dev_err(dwc->dev, "invalid endpoint transfer type\n");
+ }
+
+ if (dep->flags & DWC3_EP_ENABLED) {
+ dev_WARN_ONCE(dwc->dev, true, "%s is already enabled\n",
+ dep->name);
+ return 0;
+ }
+
+ dev_vdbg(dwc->dev, "Enabling %s\n", dep->name);
+
+ spin_lock_irqsave(&dwc->lock, flags);
+ ret = __dwc3_gadget_ep_enable(dep, desc);
+ spin_unlock_irqrestore(&dwc->lock, flags);
+
+ return ret;
+}
+
+static int dwc3_gadget_ep_disable(struct usb_ep *ep)
+{
+ struct dwc3_ep *dep;
+ struct dwc3 *dwc;
+ unsigned long flags;
+ int ret;
+
+ if (!ep) {
+ pr_debug("dwc3: invalid parameters\n");
+ return -EINVAL;
+ }
+
+ dep = to_dwc3_ep(ep);
+ dwc = dep->dwc;
+
+ if (!(dep->flags & DWC3_EP_ENABLED)) {
+ dev_WARN_ONCE(dwc->dev, true, "%s is already disabled\n",
+ dep->name);
+ return 0;
+ }
+
+ snprintf(dep->name, sizeof(dep->name), "ep%d%s",
+ dep->number >> 1,
+ (dep->number & 1) ? "in" : "out");
+
+ spin_lock_irqsave(&dwc->lock, flags);
+ ret = __dwc3_gadget_ep_disable(dep);
+ spin_unlock_irqrestore(&dwc->lock, flags);
+
+ return ret;
+}
+
+static struct usb_request *dwc3_gadget_ep_alloc_request(struct usb_ep *ep,
+ gfp_t gfp_flags)
+{
+ struct dwc3_request *req;
+ struct dwc3_ep *dep = to_dwc3_ep(ep);
+ struct dwc3 *dwc = dep->dwc;
+
+ req = kzalloc(sizeof(*req), gfp_flags);
+ if (!req) {
+ dev_err(dwc->dev, "not enough memory\n");
+ return NULL;
+ }
+
+ req->epnum = dep->number;
+ req->dep = dep;
+ req->request.dma = DMA_ADDR_INVALID;
+
+ return &req->request;
+}
+
+static void dwc3_gadget_ep_free_request(struct usb_ep *ep,
+ struct usb_request *request)
+{
+ struct dwc3_request *req = to_dwc3_request(request);
+
+ kfree(req);
+}
+
+/*
+ * dwc3_prepare_trbs - setup TRBs from requests
+ * @dep: endpoint for which requests are being prepared
+ * @starting: true if the endpoint is idle and no requests are queued.
+ *
+ * The functions goes through the requests list and setups TRBs for the
+ * transfers. The functions returns once there are not more TRBs available or
+ * it run out of requests.
+ */
+static struct dwc3_request *dwc3_prepare_trbs(struct dwc3_ep *dep,
+ bool starting)
+{
+ struct dwc3_request *req, *n, *ret = NULL;
+ struct dwc3_trb_hw *trb_hw;
+ struct dwc3_trb trb;
+ u32 trbs_left;
+
+ BUILD_BUG_ON_NOT_POWER_OF_2(DWC3_TRB_NUM);
+
+ /* the first request must not be queued */
+ trbs_left = (dep->busy_slot - dep->free_slot) & DWC3_TRB_MASK;
+ /*
+ * if busy & slot are equal than it is either full or empty. If we are
+ * starting to proceed requests then we are empty. Otherwise we ar
+ * full and don't do anything
+ */
+ if (!trbs_left) {
+ if (!starting)
+ return NULL;
+ trbs_left = DWC3_TRB_NUM;
+ /*
+ * In case we start from scratch, we queue the ISOC requests
+ * starting from slot 1. This is done because we use ring
+ * buffer and have no LST bit to stop us. Instead, we place
+ * IOC bit TRB_NUM/4. We try to avoid to having an interrupt
+ * after the first request so we start at slot 1 and have
+ * 7 requests proceed before we hit the first IOC.
+ * Other transfer types don't use the ring buffer and are
+ * processed from the first TRB until the last one. Since we
+ * don't wrap around we have to start at the beginning.
+ */
+ if (usb_endpoint_xfer_isoc(dep->desc)) {
+ dep->busy_slot = 1;
+ dep->free_slot = 1;
+ } else {
+ dep->busy_slot = 0;
+ dep->free_slot = 0;
+ }
+ }
+
+ /* The last TRB is a link TRB, not used for xfer */
+ if ((trbs_left <= 1) && usb_endpoint_xfer_isoc(dep->desc))
+ return NULL;
+
+ list_for_each_entry_safe(req, n, &dep->request_list, list) {
+ unsigned int last_one = 0;
+ unsigned int cur_slot;
+
+ trb_hw = &dep->trb_pool[dep->free_slot & DWC3_TRB_MASK];
+ cur_slot = dep->free_slot;
+ dep->free_slot++;
+
+ /* Skip the LINK-TRB on ISOC */
+ if (((cur_slot & DWC3_TRB_MASK) == DWC3_TRB_NUM - 1) &&
+ usb_endpoint_xfer_isoc(dep->desc))
+ continue;
+
+ dwc3_gadget_move_request_queued(req);
+ memset(&trb, 0, sizeof(trb));
+ trbs_left--;
+
+ /* Is our TRB pool empty? */
+ if (!trbs_left)
+ last_one = 1;
+ /* Is this the last request? */
+ if (list_empty(&dep->request_list))
+ last_one = 1;
+
+ /*
+ * FIXME we shouldn't need to set LST bit always but we are
+ * facing some weird problem with the Hardware where it doesn't
+ * complete even though it has been previously started.
+ *
+ * While we're debugging the problem, as a workaround to
+ * multiple TRBs handling, use only one TRB at a time.
+ */
+ last_one = 1;
+
+ req->trb = trb_hw;
+ if (!ret)
+ ret = req;
+
+ trb.bplh = req->request.dma;
+
+ if (usb_endpoint_xfer_isoc(dep->desc)) {
+ trb.isp_imi = true;
+ trb.csp = true;
+ } else {
+ trb.lst = last_one;
+ }
+
+ if (usb_endpoint_xfer_bulk(dep->desc) && dep->stream_capable)
+ trb.sid_sofn = req->request.stream_id;
+
+ switch (usb_endpoint_type(dep->desc)) {
+ case USB_ENDPOINT_XFER_CONTROL:
+ trb.trbctl = DWC3_TRBCTL_CONTROL_SETUP;
+ break;
+
+ case USB_ENDPOINT_XFER_ISOC:
+ trb.trbctl = DWC3_TRBCTL_ISOCHRONOUS_FIRST;
+
+ /* IOC every DWC3_TRB_NUM / 4 so we can refill */
+ if (!(cur_slot % (DWC3_TRB_NUM / 4)))
+ trb.ioc = last_one;
+ break;
+
+ case USB_ENDPOINT_XFER_BULK:
+ case USB_ENDPOINT_XFER_INT:
+ trb.trbctl = DWC3_TRBCTL_NORMAL;
+ break;
+ default:
+ /*
+ * This is only possible with faulty memory because we
+ * checked it already :)
+ */
+ BUG();
+ }
+
+ trb.length = req->request.length;
+ trb.hwo = true;
+
+ dwc3_trb_to_hw(&trb, trb_hw);
+ req->trb_dma = dwc3_trb_dma_offset(dep, trb_hw);
+
+ if (last_one)
+ break;
+ }
+
+ return ret;
+}
+
+static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param,
+ int start_new)
+{
+ struct dwc3_gadget_ep_cmd_params params;
+ struct dwc3_request *req;
+ struct dwc3 *dwc = dep->dwc;
+ int ret;
+ u32 cmd;
+
+ if (start_new && (dep->flags & DWC3_EP_BUSY)) {
+ dev_vdbg(dwc->dev, "%s: endpoint busy\n", dep->name);
+ return -EBUSY;
+ }
+ dep->flags &= ~DWC3_EP_PENDING_REQUEST;
+
+ /*
+ * If we are getting here after a short-out-packet we don't enqueue any
+ * new requests as we try to set the IOC bit only on the last request.
+ */
+ if (start_new) {
+ if (list_empty(&dep->req_queued))
+ dwc3_prepare_trbs(dep, start_new);
+
+ /* req points to the first request which will be sent */
+ req = next_request(&dep->req_queued);
+ } else {
+ /*
+ * req points to the first request where HWO changed
+ * from 0 to 1
+ */
+ req = dwc3_prepare_trbs(dep, start_new);
+ }
+ if (!req) {
+ dep->flags |= DWC3_EP_PENDING_REQUEST;
+ return 0;
+ }
+
+ memset(¶ms, 0, sizeof(params));
+ params.param0 = upper_32_bits(req->trb_dma);
+ params.param1 = lower_32_bits(req->trb_dma);
+
+ if (start_new)
+ cmd = DWC3_DEPCMD_STARTTRANSFER;
+ else
+ cmd = DWC3_DEPCMD_UPDATETRANSFER;
+
+ cmd |= DWC3_DEPCMD_PARAM(cmd_param);
+ ret = dwc3_send_gadget_ep_cmd(dwc, dep->number, cmd, ¶ms);
+ if (ret < 0) {
+ dev_dbg(dwc->dev, "failed to send STARTTRANSFER command\n");
+
+ /*
+ * FIXME we need to iterate over the list of requests
+ * here and stop, unmap, free and del each of the linked
+ * requests instead of we do now.
+ */
+ dwc3_unmap_buffer_from_dma(req);
+ list_del(&req->list);
+ return ret;
+ }
+
+ dep->flags |= DWC3_EP_BUSY;
+ dep->res_trans_idx = dwc3_gadget_ep_get_transfer_index(dwc,
+ dep->number);
+ if (!dep->res_trans_idx)
+ printk_once(KERN_ERR "%s() res_trans_idx is invalid\n", __func__);
+ return 0;
+}
+
+static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
+{
+ req->request.actual = 0;
+ req->request.status = -EINPROGRESS;
+ req->direction = dep->direction;
+ req->epnum = dep->number;
+
+ /*
+ * We only add to our list of requests now and
+ * start consuming the list once we get XferNotReady
+ * IRQ.
+ *
+ * That way, we avoid doing anything that we don't need
+ * to do now and defer it until the point we receive a
+ * particular token from the Host side.
+ *
+ * This will also avoid Host cancelling URBs due to too
+ * many NACKs.
+ */
+ dwc3_map_buffer_to_dma(req);
+ list_add_tail(&req->list, &dep->request_list);
+
+ /*
+ * There is one special case: XferNotReady with
+ * empty list of requests. We need to kick the
+ * transfer here in that situation, otherwise
+ * we will be NAKing forever.
+ *
+ * If we get XferNotReady before gadget driver
+ * has a chance to queue a request, we will ACK
+ * the IRQ but won't be able to receive the data
+ * until the next request is queued. The following
+ * code is handling exactly that.
+ */
+ if (dep->flags & DWC3_EP_PENDING_REQUEST) {
+ int ret;
+ int start_trans;
+
+ start_trans = 1;
+ if (usb_endpoint_xfer_isoc(dep->endpoint.desc) &&
+ dep->flags & DWC3_EP_BUSY)
+ start_trans = 0;
+
+ ret = __dwc3_gadget_kick_transfer(dep, 0, start_trans);
+ if (ret && ret != -EBUSY) {
+ struct dwc3 *dwc = dep->dwc;
+
+ dev_dbg(dwc->dev, "%s: failed to kick transfers\n",
+ dep->name);
+ }
+ };
+
+ return 0;
+}
+
+static int dwc3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request,
+ gfp_t gfp_flags)
+{
+ struct dwc3_request *req = to_dwc3_request(request);
+ struct dwc3_ep *dep = to_dwc3_ep(ep);
+ struct dwc3 *dwc = dep->dwc;
+
+ unsigned long flags;
+
+ int ret;
+
+ if (!dep->desc) {
+ dev_dbg(dwc->dev, "trying to queue request %p to disabled %s\n",
+ request, ep->name);
+ return -ESHUTDOWN;
+ }
+
+ dev_vdbg(dwc->dev, "queing request %p to %s length %d\n",
+ request, ep->name, request->length);
+
+ spin_lock_irqsave(&dwc->lock, flags);
+ ret = __dwc3_gadget_ep_queue(dep, req);
+ spin_unlock_irqrestore(&dwc->lock, flags);
+
+ return ret;
+}
+
+static int dwc3_gadget_ep_dequeue(struct usb_ep *ep,
+ struct usb_request *request)
+{
+ struct dwc3_request *req = to_dwc3_request(request);
+ struct dwc3_request *r = NULL;
+
+ struct dwc3_ep *dep = to_dwc3_ep(ep);
+ struct dwc3 *dwc = dep->dwc;
+
+ unsigned long flags;
+ int ret = 0;
+
+ spin_lock_irqsave(&dwc->lock, flags);
+
+ list_for_each_entry(r, &dep->request_list, list) {
+ if (r == req)
+ break;
+ }
+
+ if (r != req) {
+ list_for_each_entry(r, &dep->req_queued, list) {
+ if (r == req)
+ break;
+ }
+ if (r == req) {
+ /* wait until it is processed */
+ dwc3_stop_active_transfer(dwc, dep->number);
+ goto out0;
+ }
+ dev_err(dwc->dev, "request %p was not queued to %s\n",
+ request, ep->name);
+ ret = -EINVAL;
+ goto out0;
+ }
+
+ /* giveback the request */
+ dwc3_gadget_giveback(dep, req, -ECONNRESET);
+
+out0:
+ spin_unlock_irqrestore(&dwc->lock, flags);
+
+ return ret;
+}
+
+int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value)
+{
+ struct dwc3_gadget_ep_cmd_params params;
+ struct dwc3 *dwc = dep->dwc;
+ int ret;
+
+ memset(¶ms, 0x00, sizeof(params));
+
+ if (value) {
+ if (dep->number == 0 || dep->number == 1) {
+ /*
+ * Whenever EP0 is stalled, we will restart
+ * the state machine, thus moving back to
+ * Setup Phase
+ */
+ dwc->ep0state = EP0_SETUP_PHASE;
+ }
+
+ ret = dwc3_send_gadget_ep_cmd(dwc, dep->number,
+ DWC3_DEPCMD_SETSTALL, ¶ms);
+ if (ret)
+ dev_err(dwc->dev, "failed to %s STALL on %s\n",
+ value ? "set" : "clear",
+ dep->name);
+ else
+ dep->flags |= DWC3_EP_STALL;
+ } else {
+ if (dep->flags & DWC3_EP_WEDGE)
+ return 0;
+
+ ret = dwc3_send_gadget_ep_cmd(dwc, dep->number,
+ DWC3_DEPCMD_CLEARSTALL, ¶ms);
+ if (ret)
+ dev_err(dwc->dev, "failed to %s STALL on %s\n",
+ value ? "set" : "clear",
+ dep->name);
+ else
+ dep->flags &= ~DWC3_EP_STALL;
+ }
+
+ return ret;
+}
+
+static int dwc3_gadget_ep_set_halt(struct usb_ep *ep, int value)
+{
+ struct dwc3_ep *dep = to_dwc3_ep(ep);
+ struct dwc3 *dwc = dep->dwc;
+
+ unsigned long flags;
+
+ int ret;
+
+ spin_lock_irqsave(&dwc->lock, flags);
+
+ if (usb_endpoint_xfer_isoc(dep->desc)) {
+ dev_err(dwc->dev, "%s is of Isochronous type\n", dep->name);
+ ret = -EINVAL;
+ goto out;
+ }
+
+ ret = __dwc3_gadget_ep_set_halt(dep, value);
+out:
+ spin_unlock_irqrestore(&dwc->lock, flags);
+
+ return ret;
+}
+
+static int dwc3_gadget_ep_set_wedge(struct usb_ep *ep)
+{
+ struct dwc3_ep *dep = to_dwc3_ep(ep);
+
+ dep->flags |= DWC3_EP_WEDGE;
+
+ return dwc3_gadget_ep_set_halt(ep, 1);
+}
+
+/* -------------------------------------------------------------------------- */
+
+static struct usb_endpoint_descriptor dwc3_gadget_ep0_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+ .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
+};
+
+static const struct usb_ep_ops dwc3_gadget_ep0_ops = {
+ .enable = dwc3_gadget_ep0_enable,
+ .disable = dwc3_gadget_ep0_disable,
+ .alloc_request = dwc3_gadget_ep_alloc_request,
+ .free_request = dwc3_gadget_ep_free_request,
+ .queue = dwc3_gadget_ep0_queue,
+ .dequeue = dwc3_gadget_ep_dequeue,
+ .set_halt = dwc3_gadget_ep_set_halt,
+ .set_wedge = dwc3_gadget_ep_set_wedge,
+};
+
+static const struct usb_ep_ops dwc3_gadget_ep_ops = {
+ .enable = dwc3_gadget_ep_enable,
+ .disable = dwc3_gadget_ep_disable,
+ .alloc_request = dwc3_gadget_ep_alloc_request,
+ .free_request = dwc3_gadget_ep_free_request,
+ .queue = dwc3_gadget_ep_queue,
+ .dequeue = dwc3_gadget_ep_dequeue,
+ .set_halt = dwc3_gadget_ep_set_halt,
+ .set_wedge = dwc3_gadget_ep_set_wedge,
+};
+
+/* -------------------------------------------------------------------------- */
+
+static int dwc3_gadget_get_frame(struct usb_gadget *g)
+{
+ struct dwc3 *dwc = gadget_to_dwc(g);
+ u32 reg;
+
+ reg = dwc3_readl(dwc->regs, DWC3_DSTS);
+ return DWC3_DSTS_SOFFN(reg);
+}
+
+static int dwc3_gadget_wakeup(struct usb_gadget *g)
+{
+ struct dwc3 *dwc = gadget_to_dwc(g);
+
+ unsigned long timeout;
+ unsigned long flags;
+
+ u32 reg;
+
+ int ret = 0;
+
+ u8 link_state;
+ u8 speed;
+
+ spin_lock_irqsave(&dwc->lock, flags);
+
+ /*
+ * According to the Databook Remote wakeup request should
+ * be issued only when the device is in early suspend state.
+ *
+ * We can check that via USB Link State bits in DSTS register.
+ */
+ reg = dwc3_readl(dwc->regs, DWC3_DSTS);
+
+ speed = reg & DWC3_DSTS_CONNECTSPD;
+ if (speed == DWC3_DSTS_SUPERSPEED) {
+ dev_dbg(dwc->dev, "no wakeup on SuperSpeed\n");
+ ret = -EINVAL;
+ goto out;
+ }
+
+ link_state = DWC3_DSTS_USBLNKST(reg);
+
+ switch (link_state) {
+ case DWC3_LINK_STATE_RX_DET: /* in HS, means Early Suspend */
+ case DWC3_LINK_STATE_U3: /* in HS, means SUSPEND */
+ break;
+ default:
+ dev_dbg(dwc->dev, "can't wakeup from link state %d\n",
+ link_state);
+ ret = -EINVAL;
+ goto out;
+ }
+
+ reg = dwc3_readl(dwc->regs, DWC3_DCTL);
+
+ /*
+ * Switch link state to Recovery. In HS/FS/LS this means
+ * RemoteWakeup Request
+ */
+ reg |= DWC3_DCTL_ULSTCHNG_RECOVERY;
+ dwc3_writel(dwc->regs, DWC3_DCTL, reg);
+
+ /* wait for at least 2000us */
+ usleep_range(2000, 2500);
+
+ /* write zeroes to Link Change Request */
+ reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK;
+ dwc3_writel(dwc->regs, DWC3_DCTL, reg);
+
+ /* pool until Link State change to ON */
+ timeout = jiffies + msecs_to_jiffies(100);
+
+ while (!(time_after(jiffies, timeout))) {
+ reg = dwc3_readl(dwc->regs, DWC3_DSTS);
+
+ /* in HS, means ON */
+ if (DWC3_DSTS_USBLNKST(reg) == DWC3_LINK_STATE_U0)
+ break;
+ }
+
+ if (DWC3_DSTS_USBLNKST(reg) != DWC3_LINK_STATE_U0) {
+ dev_err(dwc->dev, "failed to send remote wakeup\n");
+ ret = -EINVAL;
+ }
+
+out:
+ spin_unlock_irqrestore(&dwc->lock, flags);
+
+ return ret;
+}
+
+static int dwc3_gadget_set_selfpowered(struct usb_gadget *g,
+ int is_selfpowered)
+{
+ struct dwc3 *dwc = gadget_to_dwc(g);
+
+ dwc->is_selfpowered = !!is_selfpowered;
+
+ return 0;
+}
+
+static void dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on)
+{
+ u32 reg;
+ u32 timeout = 500;
+
+ reg = dwc3_readl(dwc->regs, DWC3_DCTL);
+ if (is_on)
+ reg |= DWC3_DCTL_RUN_STOP;
+ else
+ reg &= ~DWC3_DCTL_RUN_STOP;
+
+ dwc3_writel(dwc->regs, DWC3_DCTL, reg);
+
+ do {
+ reg = dwc3_readl(dwc->regs, DWC3_DSTS);
+ if (is_on) {
+ if (!(reg & DWC3_DSTS_DEVCTRLHLT))
+ break;
+ } else {
+ if (reg & DWC3_DSTS_DEVCTRLHLT)
+ break;
+ }
+ timeout--;
+ if (!timeout)
+ break;
+ udelay(1);
+ } while (1);
+
+ dev_vdbg(dwc->dev, "gadget %s data soft-%s\n",
+ dwc->gadget_driver
+ ? dwc->gadget_driver->function : "no-function",
+ is_on ? "connect" : "disconnect");
+}
+
+static int dwc3_gadget_pullup(struct usb_gadget *g, int is_on)
+{
+ struct dwc3 *dwc = gadget_to_dwc(g);
+ unsigned long flags;
+
+ is_on = !!is_on;
+
+ spin_lock_irqsave(&dwc->lock, flags);
+ dwc3_gadget_run_stop(dwc, is_on);
+ spin_unlock_irqrestore(&dwc->lock, flags);
+
+ return 0;
+}
+
+static int dwc3_gadget_start(struct usb_gadget *g,
+ struct usb_gadget_driver *driver)
+{
+ struct dwc3 *dwc = gadget_to_dwc(g);
+ struct dwc3_ep *dep;
+ unsigned long flags;
+ int ret = 0;
+ u32 reg;
+
+ spin_lock_irqsave(&dwc->lock, flags);
+
+ if (dwc->gadget_driver) {
+ dev_err(dwc->dev, "%s is already bound to %s\n",
+ dwc->gadget.name,
+ dwc->gadget_driver->driver.name);
+ ret = -EBUSY;
+ goto err0;
+ }
+
+ dwc->gadget_driver = driver;
+ dwc->gadget.dev.driver = &driver->driver;
+
+ reg = dwc3_readl(dwc->regs, DWC3_GCTL);
+
+ reg &= ~DWC3_GCTL_SCALEDOWN(3);
+ reg &= ~DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG);
+ reg &= ~DWC3_GCTL_DISSCRAMBLE;
+ reg |= DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_DEVICE);
+
+ switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams0)) {
+ case DWC3_GHWPARAMS1_EN_PWROPT_CLK:
+ reg &= ~DWC3_GCTL_DSBLCLKGTNG;
+ break;
+ default:
+ dev_dbg(dwc->dev, "No power optimization available\n");
+ }
+
+ /*
+ * WORKAROUND: DWC3 revisions <1.90a have a bug
+ * when The device fails to connect at SuperSpeed
+ * and falls back to high-speed mode which causes
+ * the device to enter in a Connect/Disconnect loop
+ */
+ if (dwc->revision < DWC3_REVISION_190A)
+ reg |= DWC3_GCTL_U2RSTECN;
+
+ dwc3_writel(dwc->regs, DWC3_GCTL, reg);
+
+ reg = dwc3_readl(dwc->regs, DWC3_DCFG);
+ reg &= ~(DWC3_DCFG_SPEED_MASK);
+ reg |= DWC3_DCFG_SUPERSPEED;
+ dwc3_writel(dwc->regs, DWC3_DCFG, reg);
+
+ dwc->start_config_issued = false;
+
+ /* Start with SuperSpeed Default */
+ dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
+
+ dep = dwc->eps[0];
+ ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc);
+ if (ret) {
+ dev_err(dwc->dev, "failed to enable %s\n", dep->name);
+ goto err0;
+ }
+
+ dep = dwc->eps[1];
+ ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc);
+ if (ret) {
+ dev_err(dwc->dev, "failed to enable %s\n", dep->name);
+ goto err1;
+ }
+
+ /* begin to receive SETUP packets */
+ dwc->ep0state = EP0_SETUP_PHASE;
+ dwc3_ep0_out_start(dwc);
+
+ spin_unlock_irqrestore(&dwc->lock, flags);
+
+ return 0;
+
+err1:
+ __dwc3_gadget_ep_disable(dwc->eps[0]);
+
+err0:
+ spin_unlock_irqrestore(&dwc->lock, flags);
+
+ return ret;
+}
+
+static int dwc3_gadget_stop(struct usb_gadget *g,
+ struct usb_gadget_driver *driver)
+{
+ struct dwc3 *dwc = gadget_to_dwc(g);
+ unsigned long flags;
+
+ spin_lock_irqsave(&dwc->lock, flags);
+
+ __dwc3_gadget_ep_disable(dwc->eps[0]);
+ __dwc3_gadget_ep_disable(dwc->eps[1]);
+
+ dwc->gadget_driver = NULL;
+ dwc->gadget.dev.driver = NULL;
+
+ spin_unlock_irqrestore(&dwc->lock, flags);
+
+ return 0;
+}
+static const struct usb_gadget_ops dwc3_gadget_ops = {
+ .get_frame = dwc3_gadget_get_frame,
+ .wakeup = dwc3_gadget_wakeup,
+ .set_selfpowered = dwc3_gadget_set_selfpowered,
+ .pullup = dwc3_gadget_pullup,
+ .udc_start = dwc3_gadget_start,
+ .udc_stop = dwc3_gadget_stop,
+};
+
+/* -------------------------------------------------------------------------- */
+
+static int __devinit dwc3_gadget_init_endpoints(struct dwc3 *dwc)
+{
+ struct dwc3_ep *dep;
+ u8 epnum;
+
+ INIT_LIST_HEAD(&dwc->gadget.ep_list);
+
+ for (epnum = 0; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
+ dep = kzalloc(sizeof(*dep), GFP_KERNEL);
+ if (!dep) {
+ dev_err(dwc->dev, "can't allocate endpoint %d\n",
+ epnum);
+ return -ENOMEM;
+ }
+
+ dep->dwc = dwc;
+ dep->number = epnum;
+ dwc->eps[epnum] = dep;
+
+ snprintf(dep->name, sizeof(dep->name), "ep%d%s", epnum >> 1,
+ (epnum & 1) ? "in" : "out");
+ dep->endpoint.name = dep->name;
+ dep->direction = (epnum & 1);
+
+ if (epnum == 0 || epnum == 1) {
+ dep->endpoint.maxpacket = 512;
+ dep->endpoint.ops = &dwc3_gadget_ep0_ops;
+ if (!epnum)
+ dwc->gadget.ep0 = &dep->endpoint;
+ } else {
+ int ret;
+
+ dep->endpoint.maxpacket = 1024;
+ dep->endpoint.ops = &dwc3_gadget_ep_ops;
+ list_add_tail(&dep->endpoint.ep_list,
+ &dwc->gadget.ep_list);
+
+ ret = dwc3_alloc_trb_pool(dep);
+ if (ret) {
+ dev_err(dwc->dev, "%s: failed to allocate TRB pool\n", dep->name);
+ return ret;
+ }
+ }
+ INIT_LIST_HEAD(&dep->request_list);
+ INIT_LIST_HEAD(&dep->req_queued);
+ }
+
+ return 0;
+}
+
+static void dwc3_gadget_free_endpoints(struct dwc3 *dwc)
+{
+ struct dwc3_ep *dep;
+ u8 epnum;
+
+ for (epnum = 0; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
+ dep = dwc->eps[epnum];
+ dwc3_free_trb_pool(dep);
+
+ if (epnum != 0 && epnum != 1)
+ list_del(&dep->endpoint.ep_list);
+
+ kfree(dep);
+ }
+}
+
+static void dwc3_gadget_release(struct device *dev)
+{
+ dev_dbg(dev, "%s\n", __func__);
+}
+
+/* -------------------------------------------------------------------------- */
+static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
+ const struct dwc3_event_depevt *event, int status)
+{
+ struct dwc3_request *req;
+ struct dwc3_trb trb;
+ unsigned int count;
+ unsigned int s_pkt = 0;
+
+ do {
+ req = next_request(&dep->req_queued);
+ if (!req)
+ break;
+
+ dwc3_trb_to_nat(req->trb, &trb);
+
+ if (trb.hwo && status != -ESHUTDOWN)
+ /*
+ * We continue despite the error. There is not much we
+ * can do. If we don't clean in up we loop for ever. If
+ * we skip the TRB than it gets overwritten reused after
+ * a while since we use them in a ring buffer. a BUG()
+ * would help. Lets hope that if this occures, someone
+ * fixes the root cause instead of looking away :)
+ */
+ dev_err(dwc->dev, "%s's TRB (%p) still owned by HW\n",
+ dep->name, req->trb);
+ count = trb.length;
+
+ if (dep->direction) {
+ if (count) {
+ dev_err(dwc->dev, "incomplete IN transfer %s\n",
+ dep->name);
+ status = -ECONNRESET;
+ }
+ } else {
+ if (count && (event->status & DEPEVT_STATUS_SHORT))
+ s_pkt = 1;
+ }
+
+ /*
+ * We assume here we will always receive the entire data block
+ * which we should receive. Meaning, if we program RX to
+ * receive 4K but we receive only 2K, we assume that's all we
+ * should receive and we simply bounce the request back to the
+ * gadget driver for further processing.
+ */
+ req->request.actual += req->request.length - count;
+ dwc3_gadget_giveback(dep, req, status);
+ if (s_pkt)
+ break;
+ if ((event->status & DEPEVT_STATUS_LST) && trb.lst)
+ break;
+ if ((event->status & DEPEVT_STATUS_IOC) && trb.ioc)
+ break;
+ } while (1);
+
+ if ((event->status & DEPEVT_STATUS_IOC) && trb.ioc)
+ return 0;
+ return 1;
+}
+
+static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc,
+ struct dwc3_ep *dep, const struct dwc3_event_depevt *event,
+ int start_new)
+{
+ unsigned status = 0;
+ int clean_busy;
+
+ if (event->status & DEPEVT_STATUS_BUSERR)
+ status = -ECONNRESET;
+
+ clean_busy = dwc3_cleanup_done_reqs(dwc, dep, event, status);
+ if (clean_busy) {
+ dep->flags &= ~DWC3_EP_BUSY;
+ dep->res_trans_idx = 0;
+ }
+}
+
+static void dwc3_gadget_start_isoc(struct dwc3 *dwc,
+ struct dwc3_ep *dep, const struct dwc3_event_depevt *event)
+{
+ u32 uf;
+
+ if (list_empty(&dep->request_list)) {
+ dev_vdbg(dwc->dev, "ISOC ep %s run out for requests.\n",
+ dep->name);
+ return;
+ }
+
+ if (event->parameters) {
+ u32 mask;
+
+ mask = ~(dep->interval - 1);
+ uf = event->parameters & mask;
+ /* 4 micro frames in the future */
+ uf += dep->interval * 4;
+ } else {
+ uf = 0;
+ }
+
+ __dwc3_gadget_kick_transfer(dep, uf, 1);
+}
+
+static void dwc3_process_ep_cmd_complete(struct dwc3_ep *dep,
+ const struct dwc3_event_depevt *event)
+{
+ struct dwc3 *dwc = dep->dwc;
+ struct dwc3_event_depevt mod_ev = *event;
+
+ /*
+ * We were asked to remove one requests. It is possible that this
+ * request and a few other were started together and have the same
+ * transfer index. Since we stopped the complete endpoint we don't
+ * know how many requests were already completed (and not yet)
+ * reported and how could be done (later). We purge them all until
+ * the end of the list.
+ */
+ mod_ev.status = DEPEVT_STATUS_LST;
+ dwc3_cleanup_done_reqs(dwc, dep, &mod_ev, -ESHUTDOWN);
+ dep->flags &= ~DWC3_EP_BUSY;
+ /* pending requets are ignored and are queued on XferNotReady */
+}
+
+static void dwc3_ep_cmd_compl(struct dwc3_ep *dep,
+ const struct dwc3_event_depevt *event)
+{
+ u32 param = event->parameters;
+ u32 cmd_type = (param >> 8) & ((1 << 5) - 1);
+
+ switch (cmd_type) {
+ case DWC3_DEPCMD_ENDTRANSFER:
+ dwc3_process_ep_cmd_complete(dep, event);
+ break;
+ case DWC3_DEPCMD_STARTTRANSFER:
+ dep->res_trans_idx = param & 0x7f;
+ break;
+ default:
+ printk(KERN_ERR "%s() unknown /unexpected type: %d\n",
+ __func__, cmd_type);
+ break;
+ };
+}
+
+static void dwc3_endpoint_interrupt(struct dwc3 *dwc,
+ const struct dwc3_event_depevt *event)
+{
+ struct dwc3_ep *dep;
+ u8 epnum = event->endpoint_number;
+
+ dep = dwc->eps[epnum];
+
+ dev_vdbg(dwc->dev, "%s: %s\n", dep->name,
+ dwc3_ep_event_string(event->endpoint_event));
+
+ if (epnum == 0 || epnum == 1) {
+ dwc3_ep0_interrupt(dwc, event);
+ return;
+ }
+
+ switch (event->endpoint_event) {
+ case DWC3_DEPEVT_XFERCOMPLETE:
+ if (usb_endpoint_xfer_isoc(dep->desc)) {
+ dev_dbg(dwc->dev, "%s is an Isochronous endpoint\n",
+ dep->name);
+ return;
+ }
+
+ dwc3_endpoint_transfer_complete(dwc, dep, event, 1);
+ break;
+ case DWC3_DEPEVT_XFERINPROGRESS:
+ if (!usb_endpoint_xfer_isoc(dep->desc)) {
+ dev_dbg(dwc->dev, "%s is not an Isochronous endpoint\n",
+ dep->name);
+ return;
+ }
+
+ dwc3_endpoint_transfer_complete(dwc, dep, event, 0);
+ break;
+ case DWC3_DEPEVT_XFERNOTREADY:
+ if (usb_endpoint_xfer_isoc(dep->desc)) {
+ dwc3_gadget_start_isoc(dwc, dep, event);
+ } else {
+ int ret;
+
+ dev_vdbg(dwc->dev, "%s: reason %s\n",
+ dep->name, event->status
+ ? "Transfer Active"
+ : "Transfer Not Active");
+
+ ret = __dwc3_gadget_kick_transfer(dep, 0, 1);
+ if (!ret || ret == -EBUSY)
+ return;
+
+ dev_dbg(dwc->dev, "%s: failed to kick transfers\n",
+ dep->name);
+ }
+
+ break;
+ case DWC3_DEPEVT_STREAMEVT:
+ if (!usb_endpoint_xfer_bulk(dep->desc)) {
+ dev_err(dwc->dev, "Stream event for non-Bulk %s\n",
+ dep->name);
+ return;
+ }
+
+ switch (event->status) {
+ case DEPEVT_STREAMEVT_FOUND:
+ dev_vdbg(dwc->dev, "Stream %d found and started\n",
+ event->parameters);
+
+ break;
+ case DEPEVT_STREAMEVT_NOTFOUND:
+ /* FALLTHROUGH */
+ default:
+ dev_dbg(dwc->dev, "Couldn't find suitable stream\n");
+ }
+ break;
+ case DWC3_DEPEVT_RXTXFIFOEVT:
+ dev_dbg(dwc->dev, "%s FIFO Overrun\n", dep->name);
+ break;
+ case DWC3_DEPEVT_EPCMDCMPLT:
+ dwc3_ep_cmd_compl(dep, event);
+ break;
+ }
+}
+
+static void dwc3_disconnect_gadget(struct dwc3 *dwc)
+{
+ if (dwc->gadget_driver && dwc->gadget_driver->disconnect) {
+ spin_unlock(&dwc->lock);
+ dwc->gadget_driver->disconnect(&dwc->gadget);
+ spin_lock(&dwc->lock);
+ }
+}
+
+static void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum)
+{
+ struct dwc3_ep *dep;
+ struct dwc3_gadget_ep_cmd_params params;
+ u32 cmd;
+ int ret;
+
+ dep = dwc->eps[epnum];
+
+ WARN_ON(!dep->res_trans_idx);
+ if (dep->res_trans_idx) {
+ cmd = DWC3_DEPCMD_ENDTRANSFER;
+ cmd |= DWC3_DEPCMD_HIPRI_FORCERM | DWC3_DEPCMD_CMDIOC;
+ cmd |= DWC3_DEPCMD_PARAM(dep->res_trans_idx);
+ memset(¶ms, 0, sizeof(params));
+ ret = dwc3_send_gadget_ep_cmd(dwc, dep->number, cmd, ¶ms);
+ WARN_ON_ONCE(ret);
+ dep->res_trans_idx = 0;
+ }
+}
+
+static void dwc3_stop_active_transfers(struct dwc3 *dwc)
+{
+ u32 epnum;
+
+ for (epnum = 2; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
+ struct dwc3_ep *dep;
+
+ dep = dwc->eps[epnum];
+ if (!(dep->flags & DWC3_EP_ENABLED))
+ continue;
+
+ dwc3_remove_requests(dwc, dep);
+ }
+}
+
+static void dwc3_clear_stall_all_ep(struct dwc3 *dwc)
+{
+ u32 epnum;
+
+ for (epnum = 1; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
+ struct dwc3_ep *dep;
+ struct dwc3_gadget_ep_cmd_params params;
+ int ret;
+
+ dep = dwc->eps[epnum];
+
+ if (!(dep->flags & DWC3_EP_STALL))
+ continue;
+
+ dep->flags &= ~DWC3_EP_STALL;
+
+ memset(¶ms, 0, sizeof(params));
+ ret = dwc3_send_gadget_ep_cmd(dwc, dep->number,
+ DWC3_DEPCMD_CLEARSTALL, ¶ms);
+ WARN_ON_ONCE(ret);
+ }
+}
+
+static void dwc3_gadget_disconnect_interrupt(struct dwc3 *dwc)
+{
+ dev_vdbg(dwc->dev, "%s\n", __func__);
+#if 0
+ XXX
+ U1/U2 is powersave optimization. Skip it for now. Anyway we need to
+ enable it before we can disable it.
+
+ reg = dwc3_readl(dwc->regs, DWC3_DCTL);
+ reg &= ~DWC3_DCTL_INITU1ENA;
+ dwc3_writel(dwc->regs, DWC3_DCTL, reg);
+
+ reg &= ~DWC3_DCTL_INITU2ENA;
+ dwc3_writel(dwc->regs, DWC3_DCTL, reg);
+#endif
+
+ dwc3_stop_active_transfers(dwc);
+ dwc3_disconnect_gadget(dwc);
+ dwc->start_config_issued = false;
+
+ dwc->gadget.speed = USB_SPEED_UNKNOWN;
+}
+
+static void dwc3_gadget_usb3_phy_power(struct dwc3 *dwc, int on)
+{
+ u32 reg;
+
+ reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
+
+ if (on)
+ reg &= ~DWC3_GUSB3PIPECTL_SUSPHY;
+ else
+ reg |= DWC3_GUSB3PIPECTL_SUSPHY;
+
+ dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
+}
+
+static void dwc3_gadget_usb2_phy_power(struct dwc3 *dwc, int on)
+{
+ u32 reg;
+
+ reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
+
+ if (on)
+ reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
+ else
+ reg |= DWC3_GUSB2PHYCFG_SUSPHY;
+
+ dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
+}
+
+static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc)
+{
+ u32 reg;
+
+ dev_vdbg(dwc->dev, "%s\n", __func__);
+
+ /* Enable PHYs */
+ dwc3_gadget_usb2_phy_power(dwc, true);
+ dwc3_gadget_usb3_phy_power(dwc, true);
+
+ if (dwc->gadget.speed != USB_SPEED_UNKNOWN)
+ dwc3_disconnect_gadget(dwc);
+
+ reg = dwc3_readl(dwc->regs, DWC3_DCTL);
+ reg &= ~DWC3_DCTL_TSTCTRL_MASK;
+ dwc3_writel(dwc->regs, DWC3_DCTL, reg);
+
+ dwc3_stop_active_transfers(dwc);
+ dwc3_clear_stall_all_ep(dwc);
+ dwc->start_config_issued = false;
+
+ /* Reset device address to zero */
+ reg = dwc3_readl(dwc->regs, DWC3_DCFG);
+ reg &= ~(DWC3_DCFG_DEVADDR_MASK);
+ dwc3_writel(dwc->regs, DWC3_DCFG, reg);
+}
+
+static void dwc3_update_ram_clk_sel(struct dwc3 *dwc, u32 speed)
+{
+ u32 reg;
+ u32 usb30_clock = DWC3_GCTL_CLK_BUS;
+
+ /*
+ * We change the clock only at SS but I dunno why I would want to do
+ * this. Maybe it becomes part of the power saving plan.
+ */
+
+ if (speed != DWC3_DSTS_SUPERSPEED)
+ return;
+
+ /*
+ * RAMClkSel is reset to 0 after USB reset, so it must be reprogrammed
+ * each time on Connect Done.
+ */
+ if (!usb30_clock)
+ return;
+
+ reg = dwc3_readl(dwc->regs, DWC3_GCTL);
+ reg |= DWC3_GCTL_RAMCLKSEL(usb30_clock);
+ dwc3_writel(dwc->regs, DWC3_GCTL, reg);
+}
+
+static void dwc3_gadget_disable_phy(struct dwc3 *dwc, u8 speed)
+{
+ switch (speed) {
+ case USB_SPEED_SUPER:
+ dwc3_gadget_usb2_phy_power(dwc, false);
+ break;
+ case USB_SPEED_HIGH:
+ case USB_SPEED_FULL:
+ case USB_SPEED_LOW:
+ dwc3_gadget_usb3_phy_power(dwc, false);
+ break;
+ }
+}
+
+static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
+{
+ struct dwc3_gadget_ep_cmd_params params;
+ struct dwc3_ep *dep;
+ int ret;
+ u32 reg;
+ u8 speed;
+
+ dev_vdbg(dwc->dev, "%s\n", __func__);
+
+ memset(¶ms, 0x00, sizeof(params));
+
+ reg = dwc3_readl(dwc->regs, DWC3_DSTS);
+ speed = reg & DWC3_DSTS_CONNECTSPD;
+ dwc->speed = speed;
+
+ dwc3_update_ram_clk_sel(dwc, speed);
+
+ switch (speed) {
+ case DWC3_DCFG_SUPERSPEED:
+ dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
+ dwc->gadget.ep0->maxpacket = 512;
+ dwc->gadget.speed = USB_SPEED_SUPER;
+ break;
+ case DWC3_DCFG_HIGHSPEED:
+ dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(64);
+ dwc->gadget.ep0->maxpacket = 64;
+ dwc->gadget.speed = USB_SPEED_HIGH;
+ break;
+ case DWC3_DCFG_FULLSPEED2:
+ case DWC3_DCFG_FULLSPEED1:
+ dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(64);
+ dwc->gadget.ep0->maxpacket = 64;
+ dwc->gadget.speed = USB_SPEED_FULL;
+ break;
+ case DWC3_DCFG_LOWSPEED:
+ dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(8);
+ dwc->gadget.ep0->maxpacket = 8;
+ dwc->gadget.speed = USB_SPEED_LOW;
+ break;
+ }
+
+ /* Disable unneded PHY */
+ dwc3_gadget_disable_phy(dwc, dwc->gadget.speed);
+
+ dep = dwc->eps[0];
+ ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc);
+ if (ret) {
+ dev_err(dwc->dev, "failed to enable %s\n", dep->name);
+ return;
+ }
+
+ dep = dwc->eps[1];
+ ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc);
+ if (ret) {
+ dev_err(dwc->dev, "failed to enable %s\n", dep->name);
+ return;
+ }
+
+ /*
+ * Configure PHY via GUSB3PIPECTLn if required.
+ *
+ * Update GTXFIFOSIZn
+ *
+ * In both cases reset values should be sufficient.
+ */
+}
+
+static void dwc3_gadget_wakeup_interrupt(struct dwc3 *dwc)
+{
+ dev_vdbg(dwc->dev, "%s\n", __func__);
+
+ /*
+ * TODO take core out of low power mode when that's
+ * implemented.
+ */
+
+ dwc->gadget_driver->resume(&dwc->gadget);
+}
+
+static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc,
+ unsigned int evtinfo)
+{
+ /* The fith bit says SuperSpeed yes or no. */
+ dwc->link_state = evtinfo & DWC3_LINK_STATE_MASK;
+
+ dev_vdbg(dwc->dev, "%s link %d\n", __func__, dwc->link_state);
+}
+
+static void dwc3_gadget_interrupt(struct dwc3 *dwc,
+ const struct dwc3_event_devt *event)
+{
+ switch (event->type) {
+ case DWC3_DEVICE_EVENT_DISCONNECT:
+ dwc3_gadget_disconnect_interrupt(dwc);
+ break;
+ case DWC3_DEVICE_EVENT_RESET:
+ dwc3_gadget_reset_interrupt(dwc);
+ break;
+ case DWC3_DEVICE_EVENT_CONNECT_DONE:
+ dwc3_gadget_conndone_interrupt(dwc);
+ break;
+ case DWC3_DEVICE_EVENT_WAKEUP:
+ dwc3_gadget_wakeup_interrupt(dwc);
+ break;
+ case DWC3_DEVICE_EVENT_LINK_STATUS_CHANGE:
+ dwc3_gadget_linksts_change_interrupt(dwc, event->event_info);
+ break;
+ case DWC3_DEVICE_EVENT_EOPF:
+ dev_vdbg(dwc->dev, "End of Periodic Frame\n");
+ break;
+ case DWC3_DEVICE_EVENT_SOF:
+ dev_vdbg(dwc->dev, "Start of Periodic Frame\n");
+ break;
+ case DWC3_DEVICE_EVENT_ERRATIC_ERROR:
+ dev_vdbg(dwc->dev, "Erratic Error\n");
+ break;
+ case DWC3_DEVICE_EVENT_CMD_CMPL:
+ dev_vdbg(dwc->dev, "Command Complete\n");
+ break;
+ case DWC3_DEVICE_EVENT_OVERFLOW:
+ dev_vdbg(dwc->dev, "Overflow\n");
+ break;
+ default:
+ dev_dbg(dwc->dev, "UNKNOWN IRQ %d\n", event->type);
+ }
+}
+
+static void dwc3_process_event_entry(struct dwc3 *dwc,
+ const union dwc3_event *event)
+{
+ /* Endpoint IRQ, handle it and return early */
+ if (event->type.is_devspec == 0) {
+ /* depevt */
+ return dwc3_endpoint_interrupt(dwc, &event->depevt);
+ }
+
+ switch (event->type.type) {
+ case DWC3_EVENT_TYPE_DEV:
+ dwc3_gadget_interrupt(dwc, &event->devt);
+ break;
+ /* REVISIT what to do with Carkit and I2C events ? */
+ default:
+ dev_err(dwc->dev, "UNKNOWN IRQ type %d\n", event->raw);
+ }
+}
+
+static irqreturn_t dwc3_process_event_buf(struct dwc3 *dwc, u32 buf)
+{
+ struct dwc3_event_buffer *evt;
+ int left;
+ u32 count;
+
+ count = dwc3_readl(dwc->regs, DWC3_GEVNTCOUNT(buf));
+ count &= DWC3_GEVNTCOUNT_MASK;
+ if (!count)
+ return IRQ_NONE;
+
+ evt = dwc->ev_buffs[buf];
+ left = count;
+
+ while (left > 0) {
+ union dwc3_event event;
+
+ memcpy(&event.raw, (evt->buf + evt->lpos), sizeof(event.raw));
+ dwc3_process_event_entry(dwc, &event);
+ /*
+ * XXX we wrap around correctly to the next entry as almost all
+ * entries are 4 bytes in size. There is one entry which has 12
+ * bytes which is a regular entry followed by 8 bytes data. ATM
+ * I don't know how things are organized if were get next to the
+ * a boundary so I worry about that once we try to handle that.
+ */
+ evt->lpos = (evt->lpos + 4) % DWC3_EVENT_BUFFERS_SIZE;
+ left -= 4;
+
+ dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(buf), 4);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t dwc3_interrupt(int irq, void *_dwc)
+{
+ struct dwc3 *dwc = _dwc;
+ int i;
+ irqreturn_t ret = IRQ_NONE;
+
+ spin_lock(&dwc->lock);
+
+ for (i = 0; i < DWC3_EVENT_BUFFERS_NUM; i++) {
+ irqreturn_t status;
+
+ status = dwc3_process_event_buf(dwc, i);
+ if (status == IRQ_HANDLED)
+ ret = status;
+ }
+
+ spin_unlock(&dwc->lock);
+
+ return ret;
+}
+
+/**
+ * dwc3_gadget_init - Initializes gadget related registers
+ * @dwc: Pointer to out controller context structure
+ *
+ * Returns 0 on success otherwise negative errno.
+ */
+int __devinit dwc3_gadget_init(struct dwc3 *dwc)
+{
+ u32 reg;
+ int ret;
+ int irq;
+
+ dwc->ctrl_req = dma_alloc_coherent(dwc->dev, sizeof(*dwc->ctrl_req),
+ &dwc->ctrl_req_addr, GFP_KERNEL);
+ if (!dwc->ctrl_req) {
+ dev_err(dwc->dev, "failed to allocate ctrl request\n");
+ ret = -ENOMEM;
+ goto err0;
+ }
+
+ dwc->ep0_trb = dma_alloc_coherent(dwc->dev, sizeof(*dwc->ep0_trb),
+ &dwc->ep0_trb_addr, GFP_KERNEL);
+ if (!dwc->ep0_trb) {
+ dev_err(dwc->dev, "failed to allocate ep0 trb\n");
+ ret = -ENOMEM;
+ goto err1;
+ }
+
+ dwc->setup_buf = dma_alloc_coherent(dwc->dev,
+ sizeof(*dwc->setup_buf) * 2,
+ &dwc->setup_buf_addr, GFP_KERNEL);
+ if (!dwc->setup_buf) {
+ dev_err(dwc->dev, "failed to allocate setup buffer\n");
+ ret = -ENOMEM;
+ goto err2;
+ }
+
+ dwc->ep0_bounce = dma_alloc_coherent(dwc->dev,
+ 512, &dwc->ep0_bounce_addr, GFP_KERNEL);
+ if (!dwc->ep0_bounce) {
+ dev_err(dwc->dev, "failed to allocate ep0 bounce buffer\n");
+ ret = -ENOMEM;
+ goto err3;
+ }
+
+ dev_set_name(&dwc->gadget.dev, "gadget");
+
+ dwc->gadget.ops = &dwc3_gadget_ops;
+ dwc->gadget.is_dualspeed = true;
+ dwc->gadget.speed = USB_SPEED_UNKNOWN;
+ dwc->gadget.dev.parent = dwc->dev;
+
+ dma_set_coherent_mask(&dwc->gadget.dev, dwc->dev->coherent_dma_mask);
+
+ dwc->gadget.dev.dma_parms = dwc->dev->dma_parms;
+ dwc->gadget.dev.dma_mask = dwc->dev->dma_mask;
+ dwc->gadget.dev.release = dwc3_gadget_release;
+ dwc->gadget.name = "dwc3-gadget";
+
+ /*
+ * REVISIT: Here we should clear all pending IRQs to be
+ * sure we're starting from a well known location.
+ */
+
+ ret = dwc3_gadget_init_endpoints(dwc);
+ if (ret)
+ goto err4;
+
+ irq = platform_get_irq(to_platform_device(dwc->dev), 0);
+
+ ret = request_irq(irq, dwc3_interrupt, IRQF_SHARED,
+ "dwc3", dwc);
+ if (ret) {
+ dev_err(dwc->dev, "failed to request irq #%d --> %d\n",
+ irq, ret);
+ goto err5;
+ }
+
+ /* Enable all but Start and End of Frame IRQs */
+ reg = (DWC3_DEVTEN_VNDRDEVTSTRCVEDEN |
+ DWC3_DEVTEN_EVNTOVERFLOWEN |
+ DWC3_DEVTEN_CMDCMPLTEN |
+ DWC3_DEVTEN_ERRTICERREN |
+ DWC3_DEVTEN_WKUPEVTEN |
+ DWC3_DEVTEN_ULSTCNGEN |
+ DWC3_DEVTEN_CONNECTDONEEN |
+ DWC3_DEVTEN_USBRSTEN |
+ DWC3_DEVTEN_DISCONNEVTEN);
+ dwc3_writel(dwc->regs, DWC3_DEVTEN, reg);
+
+ ret = device_register(&dwc->gadget.dev);
+ if (ret) {
+ dev_err(dwc->dev, "failed to register gadget device\n");
+ put_device(&dwc->gadget.dev);
+ goto err6;
+ }
+
+ ret = usb_add_gadget_udc(dwc->dev, &dwc->gadget);
+ if (ret) {
+ dev_err(dwc->dev, "failed to register udc\n");
+ goto err7;
+ }
+
+ return 0;
+
+err7:
+ device_unregister(&dwc->gadget.dev);
+
+err6:
+ dwc3_writel(dwc->regs, DWC3_DEVTEN, 0x00);
+ free_irq(irq, dwc);
+
+err5:
+ dwc3_gadget_free_endpoints(dwc);
+
+err4:
+ dma_free_coherent(dwc->dev, 512, dwc->ep0_bounce,
+ dwc->ep0_bounce_addr);
+
+err3:
+ dma_free_coherent(dwc->dev, sizeof(*dwc->setup_buf) * 2,
+ dwc->setup_buf, dwc->setup_buf_addr);
+
+err2:
+ dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb),
+ dwc->ep0_trb, dwc->ep0_trb_addr);
+
+err1:
+ dma_free_coherent(dwc->dev, sizeof(*dwc->ctrl_req),
+ dwc->ctrl_req, dwc->ctrl_req_addr);
+
+err0:
+ return ret;
+}
+
+void dwc3_gadget_exit(struct dwc3 *dwc)
+{
+ int irq;
+ int i;
+
+ usb_del_gadget_udc(&dwc->gadget);
+ irq = platform_get_irq(to_platform_device(dwc->dev), 0);
+
+ dwc3_writel(dwc->regs, DWC3_DEVTEN, 0x00);
+ free_irq(irq, dwc);
+
+ for (i = 0; i < ARRAY_SIZE(dwc->eps); i++)
+ __dwc3_gadget_ep_disable(dwc->eps[i]);
+
+ dwc3_gadget_free_endpoints(dwc);
+
+ dma_free_coherent(dwc->dev, 512, dwc->ep0_bounce,
+ dwc->ep0_bounce_addr);
+
+ dma_free_coherent(dwc->dev, sizeof(*dwc->setup_buf) * 2,
+ dwc->setup_buf, dwc->setup_buf_addr);
+
+ dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb),
+ dwc->ep0_trb, dwc->ep0_trb_addr);
+
+ dma_free_coherent(dwc->dev, sizeof(*dwc->ctrl_req),
+ dwc->ctrl_req, dwc->ctrl_req_addr);
+
+ device_unregister(&dwc->gadget.dev);
+}
diff --git a/drivers/usb/dwc3/gadget.h b/drivers/usb/dwc3/gadget.h
new file mode 100644
index 0000000..71145a4
--- /dev/null
+++ b/drivers/usb/dwc3/gadget.h
@@ -0,0 +1,211 @@
+/**
+ * gadget.h - DesignWare USB3 DRD Gadget Header
+ *
+ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Authors: Felipe Balbi <balbi@ti.com>,
+ * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2, as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __DRIVERS_USB_DWC3_GADGET_H
+#define __DRIVERS_USB_DWC3_GADGET_H
+
+#include <linux/list.h>
+#include <linux/usb/gadget.h>
+#include "io.h"
+
+struct dwc3;
+#define to_dwc3_ep(ep) (container_of(ep, struct dwc3_ep, endpoint))
+#define gadget_to_dwc(g) (container_of(g, struct dwc3, gadget))
+
+/* DEPCFG parameter 1 */
+#define DWC3_DEPCFG_INT_NUM(n) ((n) << 0)
+#define DWC3_DEPCFG_XFER_COMPLETE_EN (1 << 8)
+#define DWC3_DEPCFG_XFER_IN_PROGRESS_EN (1 << 9)
+#define DWC3_DEPCFG_XFER_NOT_READY_EN (1 << 10)
+#define DWC3_DEPCFG_FIFO_ERROR_EN (1 << 11)
+#define DWC3_DEPCFG_STREAM_EVENT_EN (1 << 13)
+#define DWC3_DEPCFG_BINTERVAL_M1(n) ((n) << 16)
+#define DWC3_DEPCFG_STREAM_CAPABLE (1 << 24)
+#define DWC3_DEPCFG_EP_NUMBER(n) ((n) << 25)
+#define DWC3_DEPCFG_BULK_BASED (1 << 30)
+#define DWC3_DEPCFG_FIFO_BASED (1 << 31)
+
+/* DEPCFG parameter 0 */
+#define DWC3_DEPCFG_EP_TYPE(n) ((n) << 1)
+#define DWC3_DEPCFG_MAX_PACKET_SIZE(n) ((n) << 3)
+#define DWC3_DEPCFG_FIFO_NUMBER(n) ((n) << 17)
+#define DWC3_DEPCFG_BURST_SIZE(n) ((n) << 22)
+#define DWC3_DEPCFG_DATA_SEQ_NUM(n) ((n) << 26)
+#define DWC3_DEPCFG_IGN_SEQ_NUM (1 << 31)
+
+/* DEPXFERCFG parameter 0 */
+#define DWC3_DEPXFERCFG_NUM_XFER_RES(n) ((n) & 0xffff)
+
+struct dwc3_gadget_ep_cmd_params {
+ u32 param2;
+ u32 param1;
+ u32 param0;
+};
+
+/* -------------------------------------------------------------------------- */
+
+struct dwc3_request {
+ struct usb_request request;
+ struct list_head list;
+ struct dwc3_ep *dep;
+
+ u8 epnum;
+ struct dwc3_trb_hw *trb;
+ dma_addr_t trb_dma;
+
+ unsigned direction:1;
+ unsigned mapped:1;
+ unsigned queued:1;
+};
+#define to_dwc3_request(r) (container_of(r, struct dwc3_request, request))
+
+static inline struct dwc3_request *next_request(struct list_head *list)
+{
+ if (list_empty(list))
+ return NULL;
+
+ return list_first_entry(list, struct dwc3_request, list);
+}
+
+static inline void dwc3_gadget_move_request_queued(struct dwc3_request *req)
+{
+ struct dwc3_ep *dep = req->dep;
+
+ req->queued = true;
+ list_move_tail(&req->list, &dep->req_queued);
+}
+
+#if defined(CONFIG_USB_GADGET_DWC3) || defined(CONFIG_USB_GADGET_DWC3_MODULE)
+int dwc3_gadget_init(struct dwc3 *dwc);
+void dwc3_gadget_exit(struct dwc3 *dwc);
+#else
+static inline int dwc3_gadget_init(struct dwc3 *dwc) { return 0; }
+static inline void dwc3_gadget_exit(struct dwc3 *dwc) { }
+static inline int dwc3_send_gadget_ep_cmd(struct dwc3 *dwc, unsigned ep,
+ unsigned cmd, struct dwc3_gadget_ep_cmd_params *params)
+{
+ return 0;
+}
+#endif
+
+void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
+ int status);
+
+void dwc3_ep0_interrupt(struct dwc3 *dwc, const struct dwc3_event_depevt *event);
+void dwc3_ep0_out_start(struct dwc3 *dwc);
+int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request,
+ gfp_t gfp_flags);
+int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value);
+int dwc3_send_gadget_ep_cmd(struct dwc3 *dwc, unsigned ep,
+ unsigned cmd, struct dwc3_gadget_ep_cmd_params *params);
+void dwc3_map_buffer_to_dma(struct dwc3_request *req);
+void dwc3_unmap_buffer_from_dma(struct dwc3_request *req);
+
+/**
+ * dwc3_gadget_ep_get_transfer_index - Gets transfer index from HW
+ * @dwc: DesignWare USB3 Pointer
+ * @number: DWC endpoint number
+ *
+ * Caller should take care of locking
+ */
+static inline u32 dwc3_gadget_ep_get_transfer_index(struct dwc3 *dwc, u8 number)
+{
+ u32 res_id;
+
+ res_id = dwc3_readl(dwc->regs, DWC3_DEPCMD(number));
+
+ return DWC3_DEPCMD_GET_RSC_IDX(res_id);
+}
+
+/**
+ * dwc3_gadget_event_string - returns event name
+ * @event: the event code
+ */
+static inline const char *dwc3_gadget_event_string(u8 event)
+{
+ switch (event) {
+ case DWC3_DEVICE_EVENT_DISCONNECT:
+ return "Disconnect";
+ case DWC3_DEVICE_EVENT_RESET:
+ return "Reset";
+ case DWC3_DEVICE_EVENT_CONNECT_DONE:
+ return "Connection Done";
+ case DWC3_DEVICE_EVENT_LINK_STATUS_CHANGE:
+ return "Link Status Change";
+ case DWC3_DEVICE_EVENT_WAKEUP:
+ return "WakeUp";
+ case DWC3_DEVICE_EVENT_EOPF:
+ return "End-Of-Frame";
+ case DWC3_DEVICE_EVENT_SOF:
+ return "Start-Of-Frame";
+ case DWC3_DEVICE_EVENT_ERRATIC_ERROR:
+ return "Erratic Error";
+ case DWC3_DEVICE_EVENT_CMD_CMPL:
+ return "Command Complete";
+ case DWC3_DEVICE_EVENT_OVERFLOW:
+ return "Overflow";
+ }
+
+ return "UNKNOWN";
+}
+
+/**
+ * dwc3_ep_event_string - returns event name
+ * @event: then event code
+ */
+static inline const char *dwc3_ep_event_string(u8 event)
+{
+ switch (event) {
+ case DWC3_DEPEVT_XFERCOMPLETE:
+ return "Transfer Complete";
+ case DWC3_DEPEVT_XFERINPROGRESS:
+ return "Transfer In-Progress";
+ case DWC3_DEPEVT_XFERNOTREADY:
+ return "Transfer Not Ready";
+ case DWC3_DEPEVT_RXTXFIFOEVT:
+ return "FIFO";
+ case DWC3_DEPEVT_STREAMEVT:
+ return "Stream";
+ case DWC3_DEPEVT_EPCMDCMPLT:
+ return "Endpoint Command Complete";
+ }
+
+ return "UNKNOWN";
+}
+
+#endif /* __DRIVERS_USB_DWC3_GADGET_H */
diff --git a/drivers/usb/dwc3/io.h b/drivers/usb/dwc3/io.h
new file mode 100644
index 0000000..bc957db
--- /dev/null
+++ b/drivers/usb/dwc3/io.h
@@ -0,0 +1,54 @@
+/**
+ * io.h - DesignWare USB3 DRD IO Header
+ *
+ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Authors: Felipe Balbi <balbi@ti.com>,
+ * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2, as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __DRIVERS_USB_DWC3_IO_H
+#define __DRIVERS_USB_DWC3_IO_H
+
+#include <asm/io.h>
+
+static inline u32 dwc3_readl(void __iomem *base, u32 offset)
+{
+ return readl(base + offset);
+}
+
+static inline void dwc3_writel(void __iomem *base, u32 offset, u32 value)
+{
+ writel(value, base + offset);
+}
+
+#endif /* __DRIVERS_USB_DWC3_IO_H */
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 97e7aa4..092e115 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -386,6 +386,18 @@
default USB_GADGET
select USB_GADGET_SELECTED
+config USB_GADGET_DWC3
+ tristate "DesignWare USB3.0 (DRD) Controller"
+ depends on USB_DWC3
+ select USB_GADGET_DUALSPEED
+ select USB_GADGET_SUPERSPEED
+ help
+ DesignWare USB3.0 controller is a SuperSpeed USB3.0 Controller
+ which can be configured for peripheral-only, host-only, hub-only
+ and Dual-Role operation. This Controller was first integrated into
+ the OMAP5 series of processors. More information about the OMAP5
+ version of this controller, refer to http://www.ti.com/omap5.
+
#
# Controllers available in both integrated and discrete versions
#
@@ -673,6 +685,12 @@
bool
depends on USB_GADGET
+# Selected by UDC drivers that support super-speed opperation
+config USB_GADGET_SUPERSPEED
+ bool
+ depends on USB_GADGET
+ depends on USB_GADGET_DUALSPEED
+
#
# USB Gadget Drivers
#
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 141f649..655a7ee 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -3,6 +3,7 @@
#
ccflags-$(CONFIG_USB_GADGET_DEBUG) := -DDEBUG
+obj-$(CONFIG_USB_GADGET) += udc-core.o
obj-$(CONFIG_USB_DUMMY_HCD) += dummy_hcd.o
obj-$(CONFIG_USB_NET2280) += net2280.o
obj-$(CONFIG_USB_AMD5536UDC) += amd5536udc.o
diff --git a/drivers/usb/gadget/amd5536udc.c b/drivers/usb/gadget/amd5536udc.c
index 95e8138..70f2b37 100644
--- a/drivers/usb/gadget/amd5536udc.c
+++ b/drivers/usb/gadget/amd5536udc.c
@@ -1438,10 +1438,15 @@
return 0;
}
+static int amd5536_start(struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *));
+static int amd5536_stop(struct usb_gadget_driver *driver);
/* gadget operations */
static const struct usb_gadget_ops udc_ops = {
.wakeup = udc_wakeup,
.get_frame = udc_get_frame,
+ .start = amd5536_start,
+ .stop = amd5536_stop,
};
/* Setups endpoint parameters, adds endpoints to linked list */
@@ -1955,7 +1960,7 @@
}
/* Called by gadget driver to register itself */
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int amd5536_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct udc *dev = udc;
@@ -2002,7 +2007,6 @@
return 0;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
/* shutdown requests and disconnect from gadget */
static void
@@ -2027,7 +2031,7 @@
}
/* Called by gadget driver to unregister itself */
-int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+static int amd5536_stop(struct usb_gadget_driver *driver)
{
struct udc *dev = udc;
unsigned long flags;
@@ -2057,8 +2061,6 @@
return 0;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
-
/* Clear pending NAK bits */
static void udc_process_cnak_queue(struct udc *dev)
@@ -3134,6 +3136,7 @@
dev = pci_get_drvdata(pdev);
+ usb_del_gadget_udc(&udc->gadget);
/* gadget driver must not be registered */
BUG_ON(dev->driver != NULL);
@@ -3382,8 +3385,13 @@
"driver version: %s(for Geode5536 B1)\n", tmp);
udc = dev;
+ retval = usb_add_gadget_udc(&udc->pdev->dev, &dev->gadget);
+ if (retval)
+ goto finished;
+
retval = device_register(&dev->gadget.dev);
if (retval) {
+ usb_del_gadget_udc(&dev->gadget);
put_device(&dev->gadget.dev);
goto finished;
}
diff --git a/drivers/usb/gadget/android.c b/drivers/usb/gadget/android.c
index c0c6c1e..91c3123 100644
--- a/drivers/usb/gadget/android.c
+++ b/drivers/usb/gadget/android.c
@@ -164,6 +164,18 @@
.bNumConfigurations = 1,
};
+static struct usb_otg_descriptor otg_descriptor = {
+ .bLength = sizeof otg_descriptor,
+ .bDescriptorType = USB_DT_OTG,
+ .bmAttributes = USB_OTG_SRP | USB_OTG_HNP,
+ .bcdOTG = __constant_cpu_to_le16(0x0200),
+};
+
+static const struct usb_descriptor_header *otg_desc[] = {
+ (struct usb_descriptor_header *) &otg_descriptor,
+ NULL,
+};
+
static struct usb_configuration android_config_driver = {
.label = "android",
.unbind = android_unbind_config,
@@ -1352,6 +1364,9 @@
strings_dev[STRING_SERIAL_IDX].id = id;
device_desc.iSerialNumber = id;
+ if (gadget_is_otg(cdev->gadget))
+ android_config_driver.descriptors = otg_desc;
+
gcnum = usb_gadget_controller_number(gadget);
if (gcnum >= 0)
device_desc.bcdDevice = cpu_to_le16(0x0200 + gcnum);
@@ -1388,6 +1403,7 @@
.dev = &device_desc,
.strings = dev_strings,
.unbind = android_usb_unbind,
+ .max_speed = USB_SPEED_SUPER
};
static int
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index f4690ff..98cbc06 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -985,12 +985,18 @@
return 0;
}
+static int at91_start(struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *));
+static int at91_stop(struct usb_gadget_driver *driver);
+
static const struct usb_gadget_ops at91_udc_ops = {
.get_frame = at91_get_frame,
.wakeup = at91_wakeup,
.set_selfpowered = at91_set_selfpowered,
.vbus_session = at91_vbus_session,
.pullup = at91_pullup,
+ .start = at91_start,
+ .stop = at91_stop,
/*
* VBUS-powered devices may also also want to support bigger
@@ -1628,7 +1634,7 @@
schedule_work(&udc->vbus_timer_work);
}
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int at91_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct at91_udc *udc = &controller;
@@ -1672,9 +1678,8 @@
DBG("bound to %s\n", driver->driver.name);
return 0;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
-int usb_gadget_unregister_driver (struct usb_gadget_driver *driver)
+static int at91_stop(struct usb_gadget_driver *driver)
{
struct at91_udc *udc = &controller;
unsigned long flags;
@@ -1696,7 +1701,6 @@
DBG("unbound from %s\n", driver->driver.name);
return 0;
}
-EXPORT_SYMBOL (usb_gadget_unregister_driver);
/*-------------------------------------------------------------------------*/
@@ -1854,13 +1858,18 @@
DBG("no VBUS detection, assuming always-on\n");
udc->vbus = 1;
}
+ retval = usb_add_gadget_udc(dev, &udc->gadget);
+ if (retval)
+ goto fail4;
dev_set_drvdata(dev, udc);
device_init_wakeup(dev, 1);
create_debug_file(udc);
INFO("%s version %s\n", driver_name, DRIVER_VERSION);
return 0;
-
+fail4:
+ if (udc->board.vbus_pin > 0 && !udc->board.vbus_polled)
+ free_irq(udc->board.vbus_pin, udc);
fail3:
if (udc->board.vbus_pin > 0)
gpio_free(udc->board.vbus_pin);
@@ -1887,6 +1896,7 @@
DBG("remove\n");
+ usb_del_gadget_udc(&udc->gadget);
if (udc->driver)
return -EBUSY;
diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
index db1a659..e6b970a 100644
--- a/drivers/usb/gadget/atmel_usba_udc.c
+++ b/drivers/usb/gadget/atmel_usba_udc.c
@@ -1007,10 +1007,16 @@
return 0;
}
+static int atmel_usba_start(struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *));
+static int atmel_usba_stop(struct usb_gadget_driver *driver);
+
static const struct usb_gadget_ops usba_udc_ops = {
.get_frame = usba_udc_get_frame,
.wakeup = usba_udc_wakeup,
.set_selfpowered = usba_udc_set_selfpowered,
+ .start = atmel_usba_start,
+ .stop = atmel_usba_stop,
};
static struct usb_endpoint_descriptor usba_ep0_desc = {
@@ -1789,7 +1795,7 @@
return IRQ_HANDLED;
}
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int atmel_usba_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct usba_udc *udc = &the_udc;
@@ -1842,9 +1848,8 @@
udc->gadget.dev.driver = NULL;
return ret;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
-int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+static int atmel_usba_stop(struct usb_gadget_driver *driver)
{
struct usba_udc *udc = &the_udc;
unsigned long flags;
@@ -1880,7 +1885,6 @@
return 0;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
static int __init usba_udc_probe(struct platform_device *pdev)
{
@@ -2021,12 +2025,24 @@
}
}
+ ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
+ if (ret)
+ goto err_add_udc;
+
usba_init_debugfs(udc);
for (i = 1; i < pdata->num_ep; i++)
usba_ep_init_debugfs(udc, &usba_ep[i]);
return 0;
+err_add_udc:
+ if (gpio_is_valid(pdata->vbus_pin)) {
+ free_irq(gpio_to_irq(udc->vbus_pin), udc);
+ gpio_free(udc->vbus_pin);
+ }
+
+ device_unregister(&udc->gadget.dev);
+
err_device_add:
free_irq(irq, udc);
err_request_irq:
@@ -2053,6 +2069,8 @@
udc = platform_get_drvdata(pdev);
+ usb_del_gadget_udc(&udc->gadget);
+
for (i = 1; i < pdata->num_ep; i++)
usba_ep_cleanup_debugfs(&usba_ep[i]);
usba_cleanup_debugfs(udc);
diff --git a/drivers/usb/gadget/audio.c b/drivers/usb/gadget/audio.c
index 93b999e..9d89ae47 100644
--- a/drivers/usb/gadget/audio.c
+++ b/drivers/usb/gadget/audio.c
@@ -165,6 +165,7 @@
.name = "g_audio",
.dev = &device_desc,
.strings = audio_strings,
+ .max_speed = USB_SPEED_HIGH,
.unbind = __exit_p(audio_unbind),
};
diff --git a/drivers/usb/gadget/cdc2.c b/drivers/usb/gadget/cdc2.c
index 2720ab0..b1c1afb 100644
--- a/drivers/usb/gadget/cdc2.c
+++ b/drivers/usb/gadget/cdc2.c
@@ -244,6 +244,7 @@
.name = "g_cdc",
.dev = &device_desc,
.strings = dev_strings,
+ .max_speed = USB_SPEED_HIGH,
.unbind = __exit_p(cdc_unbind),
};
diff --git a/drivers/usb/gadget/ci13xxx_msm.c b/drivers/usb/gadget/ci13xxx_msm.c
index c893889..fac777c 100644
--- a/drivers/usb/gadget/ci13xxx_msm.c
+++ b/drivers/usb/gadget/ci13xxx_msm.c
@@ -47,8 +47,8 @@
.flags = CI13XXX_REGS_SHARED |
CI13XXX_REQUIRE_TRANSCEIVER |
CI13XXX_PULLUP_ON_VBUS |
- CI13XXX_DISABLE_STREAMING |
- CI13XXX_ZERO_ITC,
+ CI13XXX_ZERO_ITC |
+ CI13XXX_IS_OTG,
.notify_event = ci13xxx_msm_notify_event,
};
diff --git a/drivers/usb/gadget/ci13xxx_udc.c b/drivers/usb/gadget/ci13xxx_udc.c
index ff4bbad..b64a38a 100644
--- a/drivers/usb/gadget/ci13xxx_udc.c
+++ b/drivers/usb/gadget/ci13xxx_udc.c
@@ -1918,6 +1918,11 @@
udc->configured = 0;
spin_unlock_irqrestore(udc->lock, flags);
+ gadget->b_hnp_enable = 0;
+ gadget->a_hnp_support = 0;
+ gadget->host_request = 0;
+ gadget->otg_srp_reqd = 0;
+
/* flush all endpoints */
gadget_for_each_ep(ep, gadget) {
usb_ep_fifo_flush(ep);
@@ -2046,8 +2051,15 @@
}
if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
- /* Assume that device is bus powered for now. */
- *((u16 *)req->buf) = _udc->remote_wakeup << 1;
+ if (setup->wIndex == OTG_STATUS_SELECTOR) {
+ *((u8 *)req->buf) = _udc->gadget.host_request <<
+ HOST_REQUEST_FLAG;
+ req->length = 1;
+ } else {
+ /* Assume that device is bus powered for now. */
+ *((u16 *)req->buf) = _udc->remote_wakeup << 1;
+ }
+ /* TODO: D1 - Remote Wakeup; D0 - Self Powered */
retval = 0;
} else if ((setup->bRequestType & USB_RECIP_MASK) \
== USB_RECIP_ENDPOINT) {
@@ -2297,8 +2309,7 @@
type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
type != (USB_DIR_IN|USB_RECIP_INTERFACE))
goto delegate;
- if (le16_to_cpu(req.wLength) != 2 ||
- le16_to_cpu(req.wValue) != 0)
+ if (le16_to_cpu(req.wValue) != 0)
break;
err = isr_get_status_response(udc, &req);
break;
@@ -2342,6 +2353,16 @@
udc->remote_wakeup = 1;
err = isr_setup_status_phase(udc);
break;
+ case USB_DEVICE_B_HNP_ENABLE:
+ udc->gadget.b_hnp_enable = 1;
+ err = isr_setup_status_phase(udc);
+ break;
+ case USB_DEVICE_A_HNP_SUPPORT:
+ udc->gadget.a_hnp_support = 1;
+ err = isr_setup_status_phase(udc);
+ break;
+ case USB_DEVICE_A_ALT_HNP_SUPPORT:
+ break;
case USB_DEVICE_TEST_MODE:
tmode = le16_to_cpu(req.wIndex) >> 8;
switch (tmode) {
@@ -2354,11 +2375,21 @@
err = isr_setup_status_phase(
udc);
break;
+ case TEST_OTG_SRP_REQD:
+ udc->gadget.otg_srp_reqd = 1;
+ err = isr_setup_status_phase(
+ udc);
+ break;
+ case TEST_OTG_HNP_REQD:
+ udc->gadget.host_request = 1;
+ err = isr_setup_status_phase(
+ udc);
+ break;
default:
break;
}
default:
- goto delegate;
+ break;
}
} else {
goto delegate;
@@ -2485,6 +2516,7 @@
} while (mEp->dir != direction);
mEp->desc = NULL;
+ mEp->ep.desc = NULL;
spin_unlock_irqrestore(mEp->lock, flags);
return retval;
@@ -2857,7 +2889,9 @@
return 0;
}
-
+static int ci13xxx_start(struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *));
+static int ci13xxx_stop(struct usb_gadget_driver *driver);
/**
* Device operations part of the API to the USB controller hardware,
* which don't involve endpoints (or i/o)
@@ -2868,17 +2902,19 @@
.wakeup = ci13xxx_wakeup,
.vbus_draw = ci13xxx_vbus_draw,
.pullup = ci13xxx_pullup,
+ .start = ci13xxx_start,
+ .stop = ci13xxx_stop,
};
/**
- * usb_gadget_probe_driver: register a gadget driver
+ * ci13xxx_start: register a gadget driver
* @driver: the driver being registered
* @bind: the driver's bind callback
*
- * Check usb_gadget_probe_driver() at <linux/usb/gadget.h> for details.
+ * Check ci13xxx_start() at <linux/usb/gadget.h> for details.
* Interrupts are enabled here.
*/
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int ci13xxx_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct ci13xxx *udc = _udc;
@@ -2960,10 +2996,12 @@
if (retval)
goto done;
spin_unlock_irqrestore(udc->lock, flags);
- retval = usb_ep_enable(&udc->ep0out.ep, &ctrl_endpt_out_desc);
+ udc->ep0out.ep.desc = &ctrl_endpt_out_desc;
+ retval = usb_ep_enable(&udc->ep0out.ep);
if (retval)
return retval;
- retval = usb_ep_enable(&udc->ep0in.ep, &ctrl_endpt_in_desc);
+ udc->ep0in.ep.desc = &ctrl_endpt_in_desc;
+ retval = usb_ep_enable(&udc->ep0in.ep);
if (retval)
return retval;
spin_lock_irqsave(udc->lock, flags);
@@ -3008,14 +3046,13 @@
pm_runtime_put_sync(&udc->gadget.dev);
return retval;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
/**
- * usb_gadget_unregister_driver: unregister a gadget driver
+ * ci13xxx_stop: unregister a gadget driver
*
* Check usb_gadget_unregister_driver() at "usb_gadget.h" for details
*/
-int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+static int ci13xxx_stop(struct usb_gadget_driver *driver)
{
struct ci13xxx *udc = _udc;
unsigned long i, flags;
@@ -3074,7 +3111,6 @@
return 0;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
/******************************************************************************
* BUS block
@@ -3201,7 +3237,10 @@
udc->gadget.ops = &usb_gadget_ops;
udc->gadget.speed = USB_SPEED_UNKNOWN;
udc->gadget.is_dualspeed = 1;
- udc->gadget.is_otg = 0;
+ if (udc->udc_driver->flags & CI13XXX_IS_OTG)
+ udc->gadget.is_otg = 1;
+ else
+ udc->gadget.is_otg = 0;
udc->gadget.name = driver->name;
INIT_LIST_HEAD(&udc->gadget.ep_list);
@@ -3249,12 +3288,23 @@
if (retval)
goto remove_dbg;
}
+
+ retval = usb_add_gadget_udc(dev, &udc->gadget);
+ if (retval)
+ goto remove_trans;
+
pm_runtime_no_callbacks(&udc->gadget.dev);
pm_runtime_enable(&udc->gadget.dev);
_udc = udc;
return retval;
+remove_trans:
+ if (udc->transceiver) {
+ otg_set_peripheral(udc->transceiver, &udc->gadget);
+ otg_put_transceiver(udc->transceiver);
+ }
+
err("error = %i", retval);
remove_dbg:
#ifdef CONFIG_USB_GADGET_DEBUG_FILES
@@ -3284,6 +3334,7 @@
err("EINVAL");
return;
}
+ usb_del_gadget_udc(&udc->gadget);
if (udc->transceiver) {
otg_set_peripheral(udc->transceiver, &udc->gadget);
diff --git a/drivers/usb/gadget/ci13xxx_udc.h b/drivers/usb/gadget/ci13xxx_udc.h
index fce611a..13b54c7 100644
--- a/drivers/usb/gadget/ci13xxx_udc.h
+++ b/drivers/usb/gadget/ci13xxx_udc.h
@@ -125,6 +125,7 @@
#define CI13XXX_PULLUP_ON_VBUS BIT(2)
#define CI13XXX_DISABLE_STREAMING BIT(3)
#define CI13XXX_ZERO_ITC BIT(4)
+#define CI13XXX_IS_OTG BIT(5)
#define CI13XXX_CONTROLLER_RESET_EVENT 0
#define CI13XXX_CONTROLLER_CONNECT_EVENT 1
diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index 4c33695..c9d9c07 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -27,7 +27,7 @@
#include <linux/utsname.h>
#include <linux/usb/composite.h>
-
+#include <asm/unaligned.h>
/*
* The code in this file is utility code, used to build a gadget driver
@@ -74,6 +74,130 @@
static char composite_manufacturer[50];
/*-------------------------------------------------------------------------*/
+/**
+ * next_ep_desc() - advance to the next EP descriptor
+ * @t: currect pointer within descriptor array
+ *
+ * Return: next EP descriptor or NULL
+ *
+ * Iterate over @t until either EP descriptor found or
+ * NULL (that indicates end of list) encountered
+ */
+static struct usb_descriptor_header**
+next_ep_desc(struct usb_descriptor_header **t)
+{
+ for (; *t; t++) {
+ if ((*t)->bDescriptorType == USB_DT_ENDPOINT)
+ return t;
+ }
+ return NULL;
+}
+
+/*
+ * for_each_ep_desc()- iterate over endpoint descriptors in the
+ * descriptors list
+ * @start: pointer within descriptor array.
+ * @ep_desc: endpoint descriptor to use as the loop cursor
+ */
+#define for_each_ep_desc(start, ep_desc) \
+ for (ep_desc = next_ep_desc(start); \
+ ep_desc; ep_desc = next_ep_desc(ep_desc+1))
+
+/**
+ * config_ep_by_speed() - configures the given endpoint
+ * according to gadget speed.
+ * @g: pointer to the gadget
+ * @f: usb function
+ * @_ep: the endpoint to configure
+ *
+ * Return: error code, 0 on success
+ *
+ * This function chooses the right descriptors for a given
+ * endpoint according to gadget speed and saves it in the
+ * endpoint desc field. If the endpoint already has a descriptor
+ * assigned to it - overwrites it with currently corresponding
+ * descriptor. The endpoint maxpacket field is updated according
+ * to the chosen descriptor.
+ * Note: the supplied function should hold all the descriptors
+ * for supported speeds
+ */
+int config_ep_by_speed(struct usb_gadget *g,
+ struct usb_function *f,
+ struct usb_ep *_ep)
+{
+ struct usb_endpoint_descriptor *chosen_desc = NULL;
+ struct usb_descriptor_header **speed_desc = NULL;
+
+ struct usb_ss_ep_comp_descriptor *comp_desc = NULL;
+ int want_comp_desc = 0;
+
+ struct usb_descriptor_header **d_spd; /* cursor for speed desc */
+
+ if (!g || !f || !_ep)
+ return -EIO;
+
+ /* select desired speed */
+ switch (g->speed) {
+ case USB_SPEED_SUPER:
+ if (gadget_is_superspeed(g)) {
+ speed_desc = f->ss_descriptors;
+ want_comp_desc = 1;
+ break;
+ }
+ /* else: Fall trough */
+ case USB_SPEED_HIGH:
+ if (gadget_is_dualspeed(g)) {
+ speed_desc = f->hs_descriptors;
+ break;
+ }
+ /* else: fall through */
+ default:
+ speed_desc = f->descriptors;
+ }
+ /* find descriptors */
+ for_each_ep_desc(speed_desc, d_spd) {
+ chosen_desc = (struct usb_endpoint_descriptor *)*d_spd;
+ if (chosen_desc->bEndpointAddress == _ep->address)
+ goto ep_found;
+ }
+ return -EIO;
+
+ep_found:
+ /* commit results */
+ _ep->maxpacket = le16_to_cpu(chosen_desc->wMaxPacketSize);
+ _ep->desc = chosen_desc;
+ _ep->comp_desc = NULL;
+ _ep->maxburst = 0;
+ _ep->mult = 0;
+ if (!want_comp_desc)
+ return 0;
+
+ /*
+ * Companion descriptor should follow EP descriptor
+ * USB 3.0 spec, #9.6.7
+ */
+ comp_desc = (struct usb_ss_ep_comp_descriptor *)*(++d_spd);
+ if (!comp_desc ||
+ (comp_desc->bDescriptorType != USB_DT_SS_ENDPOINT_COMP))
+ return -EIO;
+ _ep->comp_desc = comp_desc;
+ if (g->speed == USB_SPEED_SUPER) {
+ switch (usb_endpoint_type(_ep->desc)) {
+ case USB_ENDPOINT_XFER_BULK:
+ case USB_ENDPOINT_XFER_INT:
+ _ep->maxburst = comp_desc->bMaxBurst;
+ break;
+ case USB_ENDPOINT_XFER_ISOC:
+ /* mult: bits 1:0 of bmAttributes */
+ _ep->mult = comp_desc->bmAttributes & 0x3;
+ break;
+ default:
+ /* Do nothing for control endpoints */
+ break;
+ }
+ }
+ return 0;
+}
/**
* usb_add_function() - add a function to a configuration
@@ -123,6 +247,8 @@
config->fullspeed = true;
if (!config->highspeed && function->hs_descriptors)
config->highspeed = true;
+ if (!config->superspeed && function->ss_descriptors)
+ config->superspeed = true;
done:
if (value)
@@ -266,10 +392,17 @@
list_for_each_entry(f, &config->functions, list) {
struct usb_descriptor_header **descriptors;
- if (speed == USB_SPEED_HIGH)
+ switch (speed) {
+ case USB_SPEED_SUPER:
+ descriptors = f->ss_descriptors;
+ break;
+ case USB_SPEED_HIGH:
descriptors = f->hs_descriptors;
- else
+ break;
+ default:
descriptors = f->descriptors;
+ }
+
if (!descriptors)
continue;
status = usb_descriptor_fillbuf(next, len,
@@ -292,9 +425,10 @@
u8 type = w_value >> 8;
enum usb_device_speed speed = USB_SPEED_UNKNOWN;
- if (gadget_is_dualspeed(gadget)) {
- int hs = 0;
-
+ if (gadget->speed == USB_SPEED_SUPER)
+ speed = gadget->speed;
+ else if (gadget_is_dualspeed(gadget)) {
+ int hs = 0;
if (gadget->speed == USB_SPEED_HIGH)
hs = 1;
if (type == USB_DT_OTHER_SPEED_CONFIG)
@@ -308,13 +442,20 @@
w_value &= 0xff;
list_for_each_entry(c, &cdev->configs, list) {
/* ignore configs that won't work at this speed */
- if (speed == USB_SPEED_HIGH) {
+ switch (speed) {
+ case USB_SPEED_SUPER:
+ if (!c->superspeed)
+ continue;
+ break;
+ case USB_SPEED_HIGH:
if (!c->highspeed)
continue;
- } else {
+ break;
+ default:
if (!c->fullspeed)
continue;
}
+
if (w_value == 0)
return config_buf(c, speed, cdev->req->buf, type);
w_value--;
@@ -328,16 +469,22 @@
struct usb_configuration *c;
unsigned count = 0;
int hs = 0;
+ int ss = 0;
if (gadget_is_dualspeed(gadget)) {
if (gadget->speed == USB_SPEED_HIGH)
hs = 1;
+ if (gadget->speed == USB_SPEED_SUPER)
+ ss = 1;
if (type == USB_DT_DEVICE_QUALIFIER)
hs = !hs;
}
list_for_each_entry(c, &cdev->configs, list) {
/* ignore configs that won't work at this speed */
- if (hs) {
+ if (ss) {
+ if (!c->superspeed)
+ continue;
+ } else if (hs) {
if (!c->highspeed)
continue;
} else {
@@ -349,6 +496,71 @@
return count;
}
+/**
+ * bos_desc() - prepares the BOS descriptor.
+ * @cdev: pointer to usb_composite device to generate the bos
+ * descriptor for
+ *
+ * This function generates the BOS (Binary Device Object)
+ * descriptor and its device capabilities descriptors. The BOS
+ * descriptor should be supported by a SuperSpeed device.
+ */
+static int bos_desc(struct usb_composite_dev *cdev)
+{
+ struct usb_ext_cap_descriptor *usb_ext;
+ struct usb_ss_cap_descriptor *ss_cap;
+ struct usb_dcd_config_params dcd_config_params;
+ struct usb_bos_descriptor *bos = cdev->req->buf;
+
+ bos->bLength = USB_DT_BOS_SIZE;
+ bos->bDescriptorType = USB_DT_BOS;
+
+ bos->wTotalLength = cpu_to_le16(USB_DT_BOS_SIZE);
+ bos->bNumDeviceCaps = 0;
+
+ /*
+ * A SuperSpeed device shall include the USB2.0 extension descriptor
+ * and shall support LPM when operating in USB2.0 HS mode.
+ */
+ usb_ext = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
+ bos->bNumDeviceCaps++;
+ le16_add_cpu(&bos->wTotalLength, USB_DT_USB_EXT_CAP_SIZE);
+ usb_ext->bLength = USB_DT_USB_EXT_CAP_SIZE;
+ usb_ext->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
+ usb_ext->bDevCapabilityType = USB_CAP_TYPE_EXT;
+ usb_ext->bmAttributes = cpu_to_le32(USB_LPM_SUPPORT);
+
+ /*
+ * The Superspeed USB Capability descriptor shall be implemented by all
+ * SuperSpeed devices.
+ */
+ ss_cap = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
+ bos->bNumDeviceCaps++;
+ le16_add_cpu(&bos->wTotalLength, USB_DT_USB_SS_CAP_SIZE);
+ ss_cap->bLength = USB_DT_USB_SS_CAP_SIZE;
+ ss_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
+ ss_cap->bDevCapabilityType = USB_SS_CAP_TYPE;
+ ss_cap->bmAttributes = 0; /* LTM is not supported yet */
+ ss_cap->wSpeedSupported = cpu_to_le16(USB_LOW_SPEED_OPERATION |
+ USB_FULL_SPEED_OPERATION |
+ USB_HIGH_SPEED_OPERATION |
+ USB_5GBPS_OPERATION);
+ ss_cap->bFunctionalitySupport = USB_LOW_SPEED_OPERATION;
+
+ /* Get Controller configuration */
+ if (cdev->gadget->ops->get_config_params)
+ cdev->gadget->ops->get_config_params(&dcd_config_params);
+ else {
+ dcd_config_params.bU1devExitLat = USB_DEFAULT_U1_DEV_EXIT_LAT;
+ dcd_config_params.bU2DevExitLat =
+ cpu_to_le16(USB_DEFAULT_U2_DEV_EXIT_LAT);
+ }
+ ss_cap->bU1devExitLat = dcd_config_params.bU1devExitLat;
+ ss_cap->bU2DevExitLat = dcd_config_params.bU2DevExitLat;
+
+ return le16_to_cpu(bos->wTotalLength);
+}
+
static void device_qual(struct usb_composite_dev *cdev)
{
struct usb_qualifier_descriptor *qual = cdev->req->buf;
@@ -361,7 +573,7 @@
qual->bDeviceSubClass = cdev->desc.bDeviceSubClass;
qual->bDeviceProtocol = cdev->desc.bDeviceProtocol;
/* ASSUME same EP0 fifo size at both speeds */
- qual->bMaxPacketSize0 = cdev->desc.bMaxPacketSize0;
+ qual->bMaxPacketSize0 = cdev->gadget->ep0->maxpacket;
qual->bNumConfigurations = count_configs(cdev, USB_DT_DEVICE_QUALIFIER);
qual->bRESERVED = 0;
}
@@ -392,28 +604,46 @@
unsigned power = gadget_is_otg(gadget) ? 8 : 100;
int tmp;
- if (cdev->config)
- reset_config(cdev);
-
if (number) {
list_for_each_entry(c, &cdev->configs, list) {
if (c->bConfigurationValue == number) {
+ /*
+ * We disable the FDs of the previous
+ * configuration only if the new configuration
+ * is a valid one
+ */
+ if (cdev->config)
+ reset_config(cdev);
result = 0;
break;
}
}
if (result < 0)
goto done;
- } else
+ } else { /* Zero configuration value - need to reset the config */
+ if (cdev->config)
+ reset_config(cdev);
result = 0;
+ }
INFO(cdev, "%s speed config #%d: %s\n",
({ char *speed;
switch (gadget->speed) {
- case USB_SPEED_LOW: speed = "low"; break;
- case USB_SPEED_FULL: speed = "full"; break;
- case USB_SPEED_HIGH: speed = "high"; break;
- default: speed = "?"; break;
+ case USB_SPEED_LOW:
+ speed = "low";
+ break;
+ case USB_SPEED_FULL:
+ speed = "full";
+ break;
+ case USB_SPEED_HIGH:
+ speed = "high";
+ break;
+ case USB_SPEED_SUPER:
+ speed = "super";
+ break;
+ default:
+ speed = "?";
+ break;
} ; speed; }), number, c ? c->label : "unconfigured");
if (!c)
@@ -435,10 +665,16 @@
* function's setup callback instead of the current
* configuration's setup callback.
*/
- if (gadget->speed == USB_SPEED_HIGH)
+ switch (gadget->speed) {
+ case USB_SPEED_SUPER:
+ descriptors = f->ss_descriptors;
+ break;
+ case USB_SPEED_HIGH:
descriptors = f->hs_descriptors;
- else
+ break;
+ default:
descriptors = f->descriptors;
+ }
for (; *descriptors; ++descriptors) {
struct usb_endpoint_descriptor *ep;
@@ -533,8 +769,9 @@
} else {
unsigned i;
- DBG(cdev, "cfg %d/%p speeds:%s%s\n",
+ DBG(cdev, "cfg %d/%p speeds:%s%s%s\n",
config->bConfigurationValue, config,
+ config->superspeed ? " super" : "",
config->highspeed ? " high" : "",
config->fullspeed
? (gadget_is_dualspeed(cdev->gadget)
@@ -852,12 +1089,14 @@
struct usb_composite_dev *cdev = get_gadget_data(gadget);
struct usb_request *req = cdev->req;
int value = -EOPNOTSUPP;
+ int status = 0;
u16 w_index = le16_to_cpu(ctrl->wIndex);
u8 intf = w_index & 0xFF;
u16 w_value = le16_to_cpu(ctrl->wValue);
u16 w_length = le16_to_cpu(ctrl->wLength);
struct usb_function *f = NULL;
u8 endp;
+ struct usb_configuration *c;
if (w_length > USB_BUFSIZ)
@@ -883,18 +1122,29 @@
case USB_DT_DEVICE:
cdev->desc.bNumConfigurations =
count_configs(cdev, USB_DT_DEVICE);
+ cdev->desc.bMaxPacketSize0 =
+ cdev->gadget->ep0->maxpacket;
+ if (gadget_is_superspeed(gadget)) {
+ if (gadget->speed >= USB_SPEED_SUPER)
+ cdev->desc.bcdUSB = cpu_to_le16(0x0300);
+ else
+ cdev->desc.bcdUSB = cpu_to_le16(0x0210);
+ }
+
value = min(w_length, (u16) sizeof cdev->desc);
memcpy(req->buf, &cdev->desc, value);
break;
case USB_DT_DEVICE_QUALIFIER:
- if (!gadget_is_dualspeed(gadget))
+ if (!gadget_is_dualspeed(gadget) ||
+ gadget->speed >= USB_SPEED_SUPER)
break;
device_qual(cdev);
value = min_t(int, w_length,
sizeof(struct usb_qualifier_descriptor));
break;
case USB_DT_OTHER_SPEED_CONFIG:
- if (!gadget_is_dualspeed(gadget))
+ if (!gadget_is_dualspeed(gadget) ||
+ gadget->speed >= USB_SPEED_SUPER)
break;
/* FALLTHROUGH */
case USB_DT_CONFIG:
@@ -902,12 +1152,28 @@
if (value >= 0)
value = min(w_length, (u16) value);
break;
+ case USB_DT_OTG:
+ if (!gadget_is_otg(gadget))
+ break;
+ c = list_first_entry(&cdev->configs,
+ struct usb_configuration, list);
+ if (c && c->descriptors)
+ value = usb_find_descriptor_fillbuf(req->buf,
+ USB_BUFSIZ, c->descriptors,
+ USB_DT_OTG);
+ break;
case USB_DT_STRING:
value = get_string(cdev, req->buf,
w_index, w_value & 0xff);
if (value >= 0)
value = min(w_length, (u16) value);
break;
+ case USB_DT_BOS:
+ if (gadget_is_superspeed(gadget)) {
+ value = bos_desc(cdev);
+ value = min(w_length, (u16) value);
+ }
+ break;
}
break;
@@ -975,6 +1241,61 @@
*((u8 *)req->buf) = value;
value = min(w_length, (u16) 1);
break;
+
+ /*
+ * USB 3.0 additions:
+ * Function driver should handle get_status request. If such cb
+ * wasn't supplied we respond with default value = 0
+ * Note: function driver should supply such cb only for the first
+ * interface of the function
+ */
+ case USB_REQ_GET_STATUS:
+ if (!gadget_is_superspeed(gadget))
+ goto unknown;
+ if (ctrl->bRequestType != (USB_DIR_IN | USB_RECIP_INTERFACE))
+ goto unknown;
+ value = 2; /* This is the length of the get_status reply */
+ put_unaligned_le16(0, req->buf);
+ if (!cdev->config || intf >= MAX_CONFIG_INTERFACES)
+ break;
+ f = cdev->config->interface[intf];
+ if (!f)
+ break;
+ status = f->get_status ? f->get_status(f) : 0;
+ if (status < 0)
+ break;
+ put_unaligned_le16(status & 0x0000ffff, req->buf);
+ break;
+ /*
+ * Function drivers should handle SetFeature/ClearFeature
+ * (FUNCTION_SUSPEND) request. function_suspend cb should be supplied
+ * only for the first interface of the function
+ */
+ case USB_REQ_CLEAR_FEATURE:
+ case USB_REQ_SET_FEATURE:
+ if (!gadget_is_superspeed(gadget))
+ goto unknown;
+ if (ctrl->bRequestType != (USB_DIR_OUT | USB_RECIP_INTERFACE))
+ goto unknown;
+ switch (w_value) {
+ case USB_INTRF_FUNC_SUSPEND:
+ if (!cdev->config || intf >= MAX_CONFIG_INTERFACES)
+ break;
+ f = cdev->config->interface[intf];
+ if (!f)
+ break;
+ value = 0;
+ if (f->func_suspend)
+ value = f->func_suspend(f, w_index >> 8);
+ if (value < 0) {
+ ERROR(cdev,
+ "func_suspend() returned error %d\n",
+ value);
+ value = 0;
+ }
+ break;
+ }
+ break;
default:
unknown:
VDBG(cdev,
@@ -1166,7 +1487,6 @@
goto fail;
cdev->desc = *composite->dev;
- cdev->desc.bMaxPacketSize0 = gadget->ep0->maxpacket;
/* standardized runtime overrides for device ID data */
if (idVendor)
@@ -1273,7 +1593,11 @@
/*-------------------------------------------------------------------------*/
static struct usb_gadget_driver composite_driver = {
+#ifdef CONFIG_USB_GADGET_SUPERSPEED
+ .speed = USB_SPEED_SUPER,
+#else
.speed = USB_SPEED_HIGH,
+#endif
.unbind = composite_unbind,
@@ -1319,6 +1643,8 @@
driver->iProduct = driver->name;
composite_driver.function = (char *) driver->name;
composite_driver.driver.name = driver->name;
+ composite_driver.speed = min((u8)composite_driver.speed,
+ (u8)driver->max_speed);
composite = driver;
composite_gadget_bind = bind;
diff --git a/drivers/usb/gadget/config.c b/drivers/usb/gadget/config.c
index 09084fd..870e662 100644
--- a/drivers/usb/gadget/config.c
+++ b/drivers/usb/gadget/config.c
@@ -28,6 +28,40 @@
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
+/**
+ * usb_find_descriptor_fillbuf - fill buffer with the requested descriptor
+ * @buf: Buffer to be filled
+ * @buflen: Size of buf
+ * @src: Array of descriptor pointers, terminated by null pointer.
+ * @desc_type: bDescriptorType field of the requested descriptor.
+ *
+ * Copies the requested descriptor into the buffer, returning the length
+ * or a negative error code if it is not found or can't be copied. Useful
+ * when DT_OTG descriptor is requested.
+ */
+int
+usb_find_descriptor_fillbuf(void *buf, unsigned buflen,
+ const struct usb_descriptor_header **src, u8 desc_type)
+{
+ if (!src)
+ return -EINVAL;
+
+ for (; NULL != *src; src++) {
+ unsigned len;
+
+ if ((*src)->bDescriptorType != desc_type)
+ continue;
+
+ len = (*src)->bLength;
+ if (len > buflen)
+ return -EINVAL;
+
+ memcpy(buf, *src, len);
+ return len;
+ }
+
+ return -ENOENT;
+}
/**
* usb_descriptor_fillbuf - fill buffer with descriptors
@@ -164,29 +198,3 @@
return ret;
}
-
-/**
- * usb_find_endpoint - find a copy of an endpoint descriptor
- * @src: original vector of descriptors
- * @copy: copy of @src
- * @match: endpoint descriptor found in @src
- *
- * This returns the copy of the @match descriptor made for @copy. Its
- * intended use is to help remembering the endpoint descriptor to use
- * when enabling a given endpoint.
- */
-struct usb_endpoint_descriptor *
-usb_find_endpoint(
- struct usb_descriptor_header **src,
- struct usb_descriptor_header **copy,
- struct usb_endpoint_descriptor *match
-)
-{
- while (*src) {
- if (*src == (void *) match)
- return (void *)*copy;
- src++;
- copy++;
- }
- return NULL;
-}
diff --git a/drivers/usb/gadget/dbgp.c b/drivers/usb/gadget/dbgp.c
index dbe92ee..8beefdd 100644
--- a/drivers/usb/gadget/dbgp.c
+++ b/drivers/usb/gadget/dbgp.c
@@ -173,7 +173,9 @@
static int __enable_ep(struct usb_ep *ep, struct usb_endpoint_descriptor *desc)
{
- int err = usb_ep_enable(ep, desc);
+ int err;
+ ep->desc = desc;
+ err = usb_ep_enable(ep);
ep->driver_data = dbgp.gadget;
return err;
}
@@ -268,8 +270,8 @@
dbgp.serial->in = dbgp.i_ep;
dbgp.serial->out = dbgp.o_ep;
- dbgp.serial->in_desc = &i_desc;
- dbgp.serial->out_desc = &o_desc;
+ dbgp.serial->in->desc = &i_desc;
+ dbgp.serial->out->desc = &o_desc;
if (gserial_setup(gadget, 1) < 0) {
stp = 3;
@@ -312,7 +314,6 @@
dbgp.req->length = DBGP_REQ_EP0_LEN;
gadget->ep0->driver_data = gadget;
- device_desc.bMaxPacketSize0 = gadget->ep0->maxpacket;
#ifdef CONFIG_USB_G_DBGP_SERIAL
dbgp.serial = kzalloc(sizeof(struct gserial), GFP_KERNEL);
@@ -363,6 +364,7 @@
dev_dbg(&dbgp.gadget->dev, "setup: desc device\n");
len = sizeof device_desc;
data = &device_desc;
+ device_desc.bMaxPacketSize0 = gadget->ep0->maxpacket;
break;
case USB_DT_DEBUG:
dev_dbg(&dbgp.gadget->dev, "setup: desc debug\n");
diff --git a/drivers/usb/gadget/dummy_hcd.c b/drivers/usb/gadget/dummy_hcd.c
index d3dcabc..cbcb4c7 100644
--- a/drivers/usb/gadget/dummy_hcd.c
+++ b/drivers/usb/gadget/dummy_hcd.c
@@ -425,10 +425,18 @@
(desc->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
({ char *val;
switch (desc->bmAttributes & 0x03) {
- case USB_ENDPOINT_XFER_BULK: val = "bulk"; break;
- case USB_ENDPOINT_XFER_ISOC: val = "iso"; break;
- case USB_ENDPOINT_XFER_INT: val = "intr"; break;
- default: val = "ctrl"; break;
+ case USB_ENDPOINT_XFER_BULK:
+ val = "bulk";
+ break;
+ case USB_ENDPOINT_XFER_ISOC:
+ val = "iso";
+ break;
+ case USB_ENDPOINT_XFER_INT:
+ val = "intr";
+ break;
+ default:
+ val = "ctrl";
+ break;
}; val; }),
max);
@@ -710,11 +718,17 @@
return 0;
}
+static int dummy_udc_start(struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *));
+static int dummy_udc_stop(struct usb_gadget_driver *driver);
+
static const struct usb_gadget_ops dummy_ops = {
.get_frame = dummy_g_get_frame,
.wakeup = dummy_wakeup,
.set_selfpowered = dummy_set_selfpowered,
.pullup = dummy_pullup,
+ .start = dummy_udc_start,
+ .stop = dummy_udc_stop,
};
/*-------------------------------------------------------------------------*/
@@ -747,8 +761,7 @@
* for each driver that registers: just add to a big root hub.
*/
-int
-usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int dummy_udc_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct dummy *dum = the_controller;
@@ -812,10 +825,8 @@
usb_hcd_poll_rh_status (dummy_to_hcd (dum));
return 0;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
-int
-usb_gadget_unregister_driver (struct usb_gadget_driver *driver)
+static int dummy_udc_stop(struct usb_gadget_driver *driver)
{
struct dummy *dum = the_controller;
unsigned long flags;
@@ -845,7 +856,6 @@
usb_hcd_poll_rh_status (dummy_to_hcd (dum));
return 0;
}
-EXPORT_SYMBOL (usb_gadget_unregister_driver);
#undef is_enabled
@@ -892,11 +902,20 @@
return rc;
}
+ rc = usb_add_gadget_udc(&pdev->dev, &dum->gadget);
+ if (rc < 0)
+ goto err_udc;
+
rc = device_create_file (&dum->gadget.dev, &dev_attr_function);
if (rc < 0)
- device_unregister (&dum->gadget.dev);
- else
- platform_set_drvdata(pdev, dum);
+ goto err_dev;
+ platform_set_drvdata(pdev, dum);
+ return rc;
+
+err_dev:
+ usb_del_gadget_udc(&dum->gadget);
+err_udc:
+ device_unregister(&dum->gadget.dev);
return rc;
}
@@ -904,6 +923,7 @@
{
struct dummy *dum = platform_get_drvdata (pdev);
+ usb_del_gadget_udc(&dum->gadget);
platform_set_drvdata (pdev, NULL);
device_remove_file (&dum->gadget.dev, &dev_attr_function);
device_unregister (&dum->gadget.dev);
@@ -1786,18 +1806,34 @@
urb,
({ char *s;
switch (urb->dev->speed) {
- case USB_SPEED_LOW: s = "ls"; break;
- case USB_SPEED_FULL: s = "fs"; break;
- case USB_SPEED_HIGH: s = "hs"; break;
- default: s = "?"; break;
+ case USB_SPEED_LOW:
+ s = "ls";
+ break;
+ case USB_SPEED_FULL:
+ s = "fs";
+ break;
+ case USB_SPEED_HIGH:
+ s = "hs";
+ break;
+ default:
+ s = "?";
+ break;
}; s; }),
ep, ep ? (usb_pipein (urb->pipe) ? "in" : "out") : "",
({ char *s; \
switch (usb_pipetype (urb->pipe)) { \
- case PIPE_CONTROL: s = ""; break; \
- case PIPE_BULK: s = "-bulk"; break; \
- case PIPE_INTERRUPT: s = "-int"; break; \
- default: s = "-iso"; break; \
+ case PIPE_CONTROL: \
+ s = ""; \
+ break; \
+ case PIPE_BULK: \
+ s = "-bulk"; \
+ break; \
+ case PIPE_INTERRUPT: \
+ s = "-int"; \
+ break; \
+ default: \
+ s = "-iso"; \
+ break; \
}; s;}),
urb->actual_length, urb->transfer_buffer_length);
}
@@ -1863,7 +1899,6 @@
dum = hcd_to_dummy (hcd);
device_remove_file (dummy_dev(dum), &dev_attr_urbs);
- usb_gadget_unregister_driver (dum->driver);
dev_info (dummy_dev(dum), "stopped\n");
}
diff --git a/drivers/usb/gadget/epautoconf.c b/drivers/usb/gadget/epautoconf.c
index 9b7360f..2fcfb9b 100644
--- a/drivers/usb/gadget/epautoconf.c
+++ b/drivers/usb/gadget/epautoconf.c
@@ -63,13 +63,16 @@
ep_matches (
struct usb_gadget *gadget,
struct usb_ep *ep,
- struct usb_endpoint_descriptor *desc
+ struct usb_endpoint_descriptor *desc,
+ struct usb_ss_ep_comp_descriptor *ep_comp
)
{
u8 type;
const char *tmp;
u16 max;
+ int num_req_streams = 0;
+
/* endpoint already claimed? */
if (NULL != ep->driver_data)
return 0;
@@ -129,6 +132,19 @@
}
/*
+ * Get the number of required streams from the EP companion
+ * descriptor and see if the EP matches it
+ */
+ if (usb_endpoint_xfer_bulk(desc)) {
+ if (ep_comp) {
+ num_req_streams = ep_comp->bmAttributes & 0x1f;
+ if (num_req_streams > ep->max_streams)
+ return 0;
+ }
+
+ }
+
+ /*
* If the protocol driver hasn't yet decided on wMaxPacketSize
* and wants to know the maximum possible, provide the info.
*/
@@ -142,13 +158,13 @@
max = 0x7ff & le16_to_cpu(desc->wMaxPacketSize);
switch (type) {
case USB_ENDPOINT_XFER_INT:
- /* INT: limit 64 bytes full speed, 1024 high speed */
+ /* INT: limit 64 bytes full speed, 1024 high/super speed */
if (!gadget->is_dualspeed && max > 64)
return 0;
/* FALLTHROUGH */
case USB_ENDPOINT_XFER_ISOC:
- /* ISO: limit 1023 bytes full speed, 1024 high speed */
+ /* ISO: limit 1023 bytes full speed, 1024 high/super speed */
if (ep->maxpacket < max)
return 0;
if (!gadget->is_dualspeed && max > 1023)
@@ -183,7 +199,7 @@
}
/* report (variable) full speed bulk maxpacket */
- if (USB_ENDPOINT_XFER_BULK == type) {
+ if ((USB_ENDPOINT_XFER_BULK == type) && !ep_comp) {
int size = ep->maxpacket;
/* min() doesn't work on bitfields with gcc-3.5 */
@@ -191,6 +207,7 @@
size = 64;
desc->wMaxPacketSize = cpu_to_le16(size);
}
+ ep->address = desc->bEndpointAddress;
return 1;
}
@@ -207,7 +224,120 @@
}
/**
- * usb_ep_autoconfig - choose an endpoint matching the descriptor
+ * usb_ep_autoconfig_ss() - choose an endpoint matching the ep
+ * descriptor and ep companion descriptor
+ * @gadget: The device to which the endpoint must belong.
+ * @desc: Endpoint descriptor, with endpoint direction and transfer mode
+ * initialized. For periodic transfers, the maximum packet
+ * size must also be initialized. This is modified on
+ * success.
+ * @ep_comp: Endpoint companion descriptor, with the required
+ * number of streams. Will be modified when the chosen EP
+ * supports a different number of streams.
+ *
+ * This routine replaces the usb_ep_autoconfig when needed
+ * superspeed enhancments. If such enhancemnets are required,
+ * the FD should call usb_ep_autoconfig_ss directly and provide
+ * the additional ep_comp parameter.
+ *
+ * By choosing an endpoint to use with the specified descriptor,
+ * this routine simplifies writing gadget drivers that work with
+ * multiple USB device controllers. The endpoint would be
+ * passed later to usb_ep_enable(), along with some descriptor.
+ *
+ * That second descriptor won't always be the same as the first one.
+ * For example, isochronous endpoints can be autoconfigured for high
+ * bandwidth, and then used in several lower bandwidth altsettings.
+ * Also, high and full speed descriptors will be different.
+ *
+ * Be sure to examine and test the results of autoconfiguration
+ * on your hardware. This code may not make the best choices
+ * about how to use the USB controller, and it can't know all
+ * the restrictions that may apply. Some combinations of driver
+ * and hardware won't be able to autoconfigure.
+ *
+ * On success, this returns an un-claimed usb_ep, and modifies the endpoint
+ * descriptor bEndpointAddress. For bulk endpoints, the wMaxPacket value
+ * is initialized as if the endpoint were used at full speed and
+ * the bmAttribute field in the ep companion descriptor is
+ * updated with the assigned number of streams if it is
+ * different from the original value. To prevent the endpoint
+ * from being returned by a later autoconfig call, claim it by
+ * assigning ep->driver_data to some non-null value.
+ *
+ * On failure, this returns a null endpoint descriptor.
+ */
+struct usb_ep *usb_ep_autoconfig_ss(
+ struct usb_gadget *gadget,
+ struct usb_endpoint_descriptor *desc,
+ struct usb_ss_ep_comp_descriptor *ep_comp
+)
+{
+ struct usb_ep *ep;
+ u8 type;
+
+ type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
+
+ /* First, apply chip-specific "best usage" knowledge.
+ * This might make a good usb_gadget_ops hook ...
+ */
+ if (gadget_is_net2280 (gadget) && type == USB_ENDPOINT_XFER_INT) {
+ /* ep-e, ep-f are PIO with only 64 byte fifos */
+ ep = find_ep (gadget, "ep-e");
+ if (ep && ep_matches(gadget, ep, desc, ep_comp))
+ return ep;
+ ep = find_ep (gadget, "ep-f");
+ if (ep && ep_matches(gadget, ep, desc, ep_comp))
+ return ep;
+
+ } else if (gadget_is_goku (gadget)) {
+ if (USB_ENDPOINT_XFER_INT == type) {
+ /* single buffering is enough */
+ ep = find_ep(gadget, "ep3-bulk");
+ if (ep && ep_matches(gadget, ep, desc, ep_comp))
+ return ep;
+ } else if (USB_ENDPOINT_XFER_BULK == type
+ && (USB_DIR_IN & desc->bEndpointAddress)) {
+ /* DMA may be available */
+ ep = find_ep(gadget, "ep2-bulk");
+ if (ep && ep_matches(gadget, ep, desc,
+ ep_comp))
+ return ep;
+ }
+
+#ifdef CONFIG_BLACKFIN
+ } else if (gadget_is_musbhdrc(gadget)) {
+ if ((USB_ENDPOINT_XFER_BULK == type) ||
+ (USB_ENDPOINT_XFER_ISOC == type)) {
+ if (USB_DIR_IN & desc->bEndpointAddress)
+ ep = find_ep (gadget, "ep5in");
+ else
+ ep = find_ep (gadget, "ep6out");
+ } else if (USB_ENDPOINT_XFER_INT == type) {
+ if (USB_DIR_IN & desc->bEndpointAddress)
+ ep = find_ep(gadget, "ep1in");
+ else
+ ep = find_ep(gadget, "ep2out");
+ } else
+ ep = NULL;
+ if (ep && ep_matches(gadget, ep, desc, ep_comp))
+ return ep;
+#endif
+ }
+
+ /* Second, look at endpoints until an unclaimed one looks usable */
+ list_for_each_entry (ep, &gadget->ep_list, ep_list) {
+ if (ep_matches(gadget, ep, desc, ep_comp))
+ return ep;
+ }
+
+ /* Fail */
+ return NULL;
+}
+
+/**
+ * usb_ep_autoconfig() - choose an endpoint matching the
+ * descriptor
* @gadget: The device to which the endpoint must belong.
* @desc: Endpoint descriptor, with endpoint direction and transfer mode
* initialized. For periodic transfers, the maximum packet
@@ -236,72 +366,15 @@
*
* On failure, this returns a null endpoint descriptor.
*/
-struct usb_ep *usb_ep_autoconfig (
+struct usb_ep *usb_ep_autoconfig(
struct usb_gadget *gadget,
struct usb_endpoint_descriptor *desc
)
{
- struct usb_ep *ep;
- u8 type;
-
- type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
-
- /* First, apply chip-specific "best usage" knowledge.
- * This might make a good usb_gadget_ops hook ...
- */
- if (gadget_is_net2280 (gadget) && type == USB_ENDPOINT_XFER_INT) {
- /* ep-e, ep-f are PIO with only 64 byte fifos */
- ep = find_ep (gadget, "ep-e");
- if (ep && ep_matches (gadget, ep, desc))
- return ep;
- ep = find_ep (gadget, "ep-f");
- if (ep && ep_matches (gadget, ep, desc))
- return ep;
-
- } else if (gadget_is_goku (gadget)) {
- if (USB_ENDPOINT_XFER_INT == type) {
- /* single buffering is enough */
- ep = find_ep (gadget, "ep3-bulk");
- if (ep && ep_matches (gadget, ep, desc))
- return ep;
- } else if (USB_ENDPOINT_XFER_BULK == type
- && (USB_DIR_IN & desc->bEndpointAddress)) {
- /* DMA may be available */
- ep = find_ep (gadget, "ep2-bulk");
- if (ep && ep_matches (gadget, ep, desc))
- return ep;
- }
-
-#ifdef CONFIG_BLACKFIN
- } else if (gadget_is_musbhdrc(gadget)) {
- if ((USB_ENDPOINT_XFER_BULK == type) ||
- (USB_ENDPOINT_XFER_ISOC == type)) {
- if (USB_DIR_IN & desc->bEndpointAddress)
- ep = find_ep (gadget, "ep5in");
- else
- ep = find_ep (gadget, "ep6out");
- } else if (USB_ENDPOINT_XFER_INT == type) {
- if (USB_DIR_IN & desc->bEndpointAddress)
- ep = find_ep(gadget, "ep1in");
- else
- ep = find_ep(gadget, "ep2out");
- } else
- ep = NULL;
- if (ep && ep_matches (gadget, ep, desc))
- return ep;
-#endif
- }
-
- /* Second, look at endpoints until an unclaimed one looks usable */
- list_for_each_entry (ep, &gadget->ep_list, ep_list) {
- if (ep_matches (gadget, ep, desc))
- return ep;
- }
-
- /* Fail */
- return NULL;
+ return usb_ep_autoconfig_ss(gadget, desc, NULL);
}
+
/**
* usb_ep_autoconfig_reset - reset endpoint autoconfig state
* @gadget: device for which autoconfig state will be reset
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c
index 1690c9d..ac41858 100644
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -401,6 +401,7 @@
.name = "g_ether",
.dev = &device_desc,
.strings = dev_strings,
+ .max_speed = USB_SPEED_HIGH,
.unbind = __exit_p(eth_unbind),
};
diff --git a/drivers/usb/gadget/f_accessory.c b/drivers/usb/gadget/f_accessory.c
index 05e65e5..0187b69 100644
--- a/drivers/usb/gadget/f_accessory.c
+++ b/drivers/usb/gadget/f_accessory.c
@@ -686,17 +686,33 @@
int ret;
DBG(cdev, "acc_function_set_alt intf: %d alt: %d\n", intf, alt);
- ret = usb_ep_enable(dev->ep_in,
- ep_choose(cdev->gadget,
- &acc_highspeed_in_desc,
- &acc_fullspeed_in_desc));
- if (ret)
- return ret;
- ret = usb_ep_enable(dev->ep_out,
- ep_choose(cdev->gadget,
- &acc_highspeed_out_desc,
- &acc_fullspeed_out_desc));
+
+ ret = config_ep_by_speed(cdev->gadget, f, dev->ep_in);
if (ret) {
+ dev->ep_in->desc = NULL;
+ ERROR(cdev, "config_ep_by_speed failes for ep %s, result %d\n",
+ dev->ep_in->name, ret);
+ return ret;
+ }
+ ret = usb_ep_enable(dev->ep_in);
+ if (ret) {
+ ERROR(cdev, "failed to enable ep %s, result %d\n",
+ dev->ep_in->name, ret);
+ return ret;
+ }
+
+ ret = config_ep_by_speed(cdev->gadget, f, dev->ep_out);
+ if (ret) {
+ dev->ep_out->desc = NULL;
+ ERROR(cdev, "config_ep_by_speed failes for ep %s, result %d\n",
+ dev->ep_out->name, ret);
+ usb_ep_disable(dev->ep_in);
+ return ret;
+ }
+ ret = usb_ep_enable(dev->ep_out);
+ if (ret) {
+ ERROR(cdev, "failed to enable ep %s, result %d\n",
+ dev->ep_out->name, ret);
usb_ep_disable(dev->ep_in);
return ret;
}
diff --git a/drivers/usb/gadget/f_acm.c b/drivers/usb/gadget/f_acm.c
index 380ef87..8e542a4 100644
--- a/drivers/usb/gadget/f_acm.c
+++ b/drivers/usb/gadget/f_acm.c
@@ -42,12 +42,6 @@
* descriptors (roughly equivalent to CDC Unions) may sometimes help.
*/
-struct acm_ep_descs {
- struct usb_endpoint_descriptor *in;
- struct usb_endpoint_descriptor *out;
- struct usb_endpoint_descriptor *notify;
-};
-
struct f_acm {
struct gserial port;
u8 ctrl_id, data_id;
@@ -62,11 +56,7 @@
*/
spinlock_t lock;
- struct acm_ep_descs fs;
- struct acm_ep_descs hs;
-
struct usb_ep *notify;
- struct usb_endpoint_descriptor *notify_desc;
struct usb_request *notify_req;
struct usb_cdc_line_coding port_line_coding; /* 8-N-1 etc */
@@ -497,10 +487,10 @@
} else {
VDBG(cdev, "init acm ctrl interface %d\n", intf);
}
- acm->notify_desc = ep_choose(cdev->gadget,
- acm->hs.notify,
- acm->fs.notify);
- usb_ep_enable(acm->notify, acm->notify_desc);
+ if (config_ep_by_speed(cdev->gadget, f, acm->notify))
+ return -EINVAL;
+
+ usb_ep_enable(acm->notify);
acm->notify->driver_data = acm;
} else if (intf == acm->data_id) {
@@ -510,10 +500,15 @@
} else {
DBG(cdev, "activate acm ttyGS%d\n", acm->port_num);
}
- acm->port.in_desc = ep_choose(cdev->gadget,
- acm->hs.in, acm->fs.in);
- acm->port.out_desc = ep_choose(cdev->gadget,
- acm->hs.out, acm->fs.out);
+ if (config_ep_by_speed(cdev->gadget, f,
+ acm->port.in) ||
+ config_ep_by_speed(cdev->gadget, f,
+ acm->port.out)) {
+ acm->port.in->desc = NULL;
+ acm->port.out->desc = NULL;
+ return -EINVAL;
+ }
+
acm_port_connect(acm);
} else
@@ -729,18 +724,11 @@
acm->notify_req->complete = acm_cdc_notify_complete;
acm->notify_req->context = acm;
- /* copy descriptors, and track endpoint copies */
+ /* copy descriptors */
f->descriptors = usb_copy_descriptors(acm_fs_function);
if (!f->descriptors)
goto fail;
- acm->fs.in = usb_find_endpoint(acm_fs_function,
- f->descriptors, &acm_fs_in_desc);
- acm->fs.out = usb_find_endpoint(acm_fs_function,
- f->descriptors, &acm_fs_out_desc);
- acm->fs.notify = usb_find_endpoint(acm_fs_function,
- f->descriptors, &acm_fs_notify_desc);
-
/* support all relevant hardware speeds... we expect that when
* hardware is dual speed, all bulk-capable endpoints work at
* both speeds
@@ -753,17 +741,10 @@
acm_hs_notify_desc.bEndpointAddress =
acm_fs_notify_desc.bEndpointAddress;
- /* copy descriptors, and track endpoint copies */
+ /* copy descriptors */
f->hs_descriptors = usb_copy_descriptors(acm_hs_function);
if (!f->hs_descriptors)
goto fail;
-
- acm->hs.in = usb_find_endpoint(acm_hs_function,
- f->hs_descriptors, &acm_hs_in_desc);
- acm->hs.out = usb_find_endpoint(acm_hs_function,
- f->hs_descriptors, &acm_hs_out_desc);
- acm->hs.notify = usb_find_endpoint(acm_hs_function,
- f->hs_descriptors, &acm_hs_notify_desc);
}
DBG(cdev, "acm ttyGS%d: %s speed IN/%s OUT/%s NOTIFY/%s\n",
diff --git a/drivers/usb/gadget/f_adb.c b/drivers/usb/gadget/f_adb.c
index cae0136..0cf6d48 100644
--- a/drivers/usb/gadget/f_adb.c
+++ b/drivers/usb/gadget/f_adb.c
@@ -510,17 +510,33 @@
int ret;
DBG(cdev, "adb_function_set_alt intf: %d alt: %d\n", intf, alt);
- ret = usb_ep_enable(dev->ep_in,
- ep_choose(cdev->gadget,
- &adb_highspeed_in_desc,
- &adb_fullspeed_in_desc));
- if (ret)
- return ret;
- ret = usb_ep_enable(dev->ep_out,
- ep_choose(cdev->gadget,
- &adb_highspeed_out_desc,
- &adb_fullspeed_out_desc));
+
+ ret = config_ep_by_speed(cdev->gadget, f, dev->ep_in);
if (ret) {
+ dev->ep_in->desc = NULL;
+ ERROR(cdev, "config_ep_by_speed failes for ep %s, result %d\n",
+ dev->ep_in->name, ret);
+ return ret;
+ }
+ ret = usb_ep_enable(dev->ep_in);
+ if (ret) {
+ ERROR(cdev, "failed to enable ep %s, result %d\n",
+ dev->ep_in->name, ret);
+ return ret;
+ }
+
+ ret = config_ep_by_speed(cdev->gadget, f, dev->ep_out);
+ if (ret) {
+ dev->ep_out->desc = NULL;
+ ERROR(cdev, "config_ep_by_speed failes for ep %s, result %d\n",
+ dev->ep_out->name, ret);
+ usb_ep_disable(dev->ep_in);
+ return ret;
+ }
+ ret = usb_ep_enable(dev->ep_out);
+ if (ret) {
+ ERROR(cdev, "failed to enable ep %s, result %d\n",
+ dev->ep_out->name, ret);
usb_ep_disable(dev->ep_in);
return ret;
}
diff --git a/drivers/usb/gadget/f_audio.c b/drivers/usb/gadget/f_audio.c
index 8ee330a..02a0270 100644
--- a/drivers/usb/gadget/f_audio.c
+++ b/drivers/usb/gadget/f_audio.c
@@ -279,7 +279,6 @@
/* endpoints handle full and/or high speeds */
struct usb_ep *out_ep;
- struct usb_endpoint_descriptor *out_desc;
spinlock_t lock;
struct f_audio_buf *copy_buf;
@@ -575,7 +574,7 @@
if (intf == 1) {
if (alt == 1) {
- usb_ep_enable(out_ep, audio->out_desc);
+ usb_ep_enable(out_ep);
out_ep->driver_data = audio;
audio->copy_buf = f_audio_buffer_alloc(audio_buf_size);
if (IS_ERR(audio->copy_buf))
@@ -677,6 +676,7 @@
if (!ep)
goto fail;
audio->out_ep = ep;
+ audio->out_ep->desc = &as_out_ep_desc;
ep->driver_data = cdev; /* claim */
status = -ENOMEM;
@@ -776,7 +776,6 @@
audio->card.func.set_alt = f_audio_set_alt;
audio->card.func.setup = f_audio_setup;
audio->card.func.disable = f_audio_disable;
- audio->out_desc = &as_out_ep_desc;
control_selector_init(audio);
diff --git a/drivers/usb/gadget/f_ccid.c b/drivers/usb/gadget/f_ccid.c
index a11f439..c8f144a 100644
--- a/drivers/usb/gadget/f_ccid.c
+++ b/drivers/usb/gadget/f_ccid.c
@@ -33,12 +33,6 @@
/* number of tx requests to allocate */
#define TX_REQ_MAX 4
-struct ccid_descs {
- struct usb_endpoint_descriptor *in;
- struct usb_endpoint_descriptor *out;
- struct usb_endpoint_descriptor *notify;
-};
-
struct ccid_ctrl_dev {
atomic_t opened;
struct list_head tx_q;
@@ -64,16 +58,10 @@
int ifc_id;
spinlock_t lock;
atomic_t online;
- /* usb descriptors */
- struct ccid_descs fs;
- struct ccid_descs hs;
/* usb eps*/
struct usb_ep *notify;
struct usb_ep *in;
struct usb_ep *out;
- struct usb_endpoint_descriptor *in_desc;
- struct usb_endpoint_descriptor *out_desc;
- struct usb_endpoint_descriptor *notify_desc;
struct usb_request *notify_req;
struct ccid_ctrl_dev ctrl_dev;
struct ccid_bulk_dev bulk_dev;
@@ -436,10 +424,14 @@
}
/* choose the descriptors and enable endpoints */
- ccid_dev->notify_desc = ep_choose(cdev->gadget,
- ccid_dev->hs.notify,
- ccid_dev->fs.notify);
- ret = usb_ep_enable(ccid_dev->notify, ccid_dev->notify_desc);
+ ret = config_ep_by_speed(cdev->gadget, f, ccid_dev->notify);
+ if (ret) {
+ ccid_dev->notify->desc = NULL;
+ pr_err("%s: config_ep_by_speed failed for ep#%s, err#%d\n",
+ __func__, ccid_dev->notify->name, ret);
+ goto free_bulk_in;
+ }
+ ret = usb_ep_enable(ccid_dev->notify);
if (ret) {
pr_err("%s: usb ep#%s enable failed, err#%d\n",
__func__, ccid_dev->notify->name, ret);
@@ -447,18 +439,28 @@
}
ccid_dev->notify->driver_data = ccid_dev;
- ccid_dev->in_desc = ep_choose(cdev->gadget,
- ccid_dev->hs.in, ccid_dev->fs.in);
- ret = usb_ep_enable(ccid_dev->in, ccid_dev->in_desc);
+ ret = config_ep_by_speed(cdev->gadget, f, ccid_dev->in);
+ if (ret) {
+ ccid_dev->in->desc = NULL;
+ pr_err("%s: config_ep_by_speed failed for ep#%s, err#%d\n",
+ __func__, ccid_dev->in->name, ret);
+ goto disable_ep_notify;
+ }
+ ret = usb_ep_enable(ccid_dev->in);
if (ret) {
pr_err("%s: usb ep#%s enable failed, err#%d\n",
__func__, ccid_dev->in->name, ret);
goto disable_ep_notify;
}
- ccid_dev->out_desc = ep_choose(cdev->gadget,
- ccid_dev->hs.out, ccid_dev->fs.out);
- ret = usb_ep_enable(ccid_dev->out, ccid_dev->out_desc);
+ ret = config_ep_by_speed(cdev->gadget, f, ccid_dev->out);
+ if (ret) {
+ ccid_dev->out->desc = NULL;
+ pr_err("%s: config_ep_by_speed failed for ep#%s, err#%d\n",
+ __func__, ccid_dev->out->name, ret);
+ goto disable_ep_in;
+ }
+ ret = usb_ep_enable(ccid_dev->out);
if (ret) {
pr_err("%s: usb ep#%s enable failed, err#%d\n",
__func__, ccid_dev->out->name, ret);
@@ -538,16 +540,6 @@
if (!f->descriptors)
goto ep_auto_out_fail;
- ccid_dev->fs.in = usb_find_endpoint(ccid_fs_descs,
- f->descriptors,
- &ccid_fs_in_desc);
- ccid_dev->fs.out = usb_find_endpoint(ccid_fs_descs,
- f->descriptors,
- &ccid_fs_out_desc);
- ccid_dev->fs.notify = usb_find_endpoint(ccid_fs_descs,
- f->descriptors,
- &ccid_fs_notify_desc);
-
if (gadget_is_dualspeed(cdev->gadget)) {
ccid_hs_in_desc.bEndpointAddress =
ccid_fs_in_desc.bEndpointAddress;
@@ -560,13 +552,6 @@
f->hs_descriptors = usb_copy_descriptors(ccid_hs_descs);
if (!f->hs_descriptors)
goto ep_auto_out_fail;
-
- ccid_dev->hs.in = usb_find_endpoint(ccid_hs_descs,
- f->hs_descriptors, &ccid_hs_in_desc);
- ccid_dev->hs.out = usb_find_endpoint(ccid_hs_descs,
- f->hs_descriptors, &ccid_hs_out_desc);
- ccid_dev->hs.notify = usb_find_endpoint(ccid_hs_descs,
- f->hs_descriptors, &ccid_hs_notify_desc);
}
pr_debug("%s: CCID %s Speed, IN:%s OUT:%s\n", __func__,
diff --git a/drivers/usb/gadget/f_diag.c b/drivers/usb/gadget/f_diag.c
index 987ae65..c4c7941 100644
--- a/drivers/usb/gadget/f_diag.c
+++ b/drivers/usb/gadget/f_diag.c
@@ -108,8 +108,6 @@
struct usb_function function;
struct usb_ep *out;
struct usb_ep *in;
- struct usb_endpoint_descriptor *in_desc;
- struct usb_endpoint_descriptor *out_desc;
struct list_head read_pool;
struct list_head write_pool;
struct work_struct config_work;
@@ -514,21 +512,22 @@
unsigned long flags;
int rc = 0;
- dev->in_desc = ep_choose(cdev->gadget,
- (struct usb_endpoint_descriptor *)f->hs_descriptors[1],
- (struct usb_endpoint_descriptor *)f->descriptors[1]);
- dev->out_desc = ep_choose(cdev->gadget,
- (struct usb_endpoint_descriptor *)f->hs_descriptors[2],
- (struct usb_endpoint_descriptor *)f->descriptors[2]);
+ if (config_ep_by_speed(cdev->gadget, f, dev->in) ||
+ config_ep_by_speed(cdev->gadget, f, dev->out)) {
+ dev->in->desc = NULL;
+ dev->out->desc = NULL;
+ return -EINVAL;
+ }
+
dev->in->driver_data = dev;
- rc = usb_ep_enable(dev->in, dev->in_desc);
+ rc = usb_ep_enable(dev->in);
if (rc) {
ERROR(dev->cdev, "can't enable %s, result %d\n",
dev->in->name, rc);
return rc;
}
dev->out->driver_data = dev;
- rc = usb_ep_enable(dev->out, dev->out_desc);
+ rc = usb_ep_enable(dev->out);
if (rc) {
ERROR(dev->cdev, "can't enable %s, result %d\n",
dev->out->name, rc);
@@ -630,7 +629,7 @@
/* claim the channel for this USB interface */
_ch->priv_usb = dev;
- dev->update_pid_and_serial_num = update_pid;
+ dev->update_pid_and_serial_num = update_pid;
dev->cdev = c->cdev;
dev->function.name = _ch->name;
dev->function.descriptors = fs_diag_desc;
diff --git a/drivers/usb/gadget/f_ecm.c b/drivers/usb/gadget/f_ecm.c
index 544257a..ddedbc83 100644
--- a/drivers/usb/gadget/f_ecm.c
+++ b/drivers/usb/gadget/f_ecm.c
@@ -46,11 +46,6 @@
* and also means that a get_alt() method is required.
*/
-struct ecm_ep_descs {
- struct usb_endpoint_descriptor *in;
- struct usb_endpoint_descriptor *out;
- struct usb_endpoint_descriptor *notify;
-};
enum ecm_notify_state {
ECM_NOTIFY_NONE, /* don't notify */
@@ -64,11 +59,7 @@
char ethaddr[14];
- struct ecm_ep_descs fs;
- struct ecm_ep_descs hs;
-
struct usb_ep *notify;
- struct usb_endpoint_descriptor *notify_desc;
struct usb_request *notify_req;
u8 notify_state;
bool is_open;
@@ -464,13 +455,13 @@
if (ecm->notify->driver_data) {
VDBG(cdev, "reset ecm control %d\n", intf);
usb_ep_disable(ecm->notify);
- } else {
- VDBG(cdev, "init ecm ctrl %d\n", intf);
- ecm->notify_desc = ep_choose(cdev->gadget,
- ecm->hs.notify,
- ecm->fs.notify);
}
- usb_ep_enable(ecm->notify, ecm->notify_desc);
+ if (!(ecm->notify->desc)) {
+ VDBG(cdev, "init ecm ctrl %d\n", intf);
+ if (config_ep_by_speed(cdev->gadget, f, ecm->notify))
+ goto fail;
+ }
+ usb_ep_enable(ecm->notify);
ecm->notify->driver_data = ecm;
/* Data interface has two altsettings, 0 and 1 */
@@ -483,12 +474,17 @@
gether_disconnect(&ecm->port);
}
- if (!ecm->port.in) {
+ if (!ecm->port.in_ep->desc ||
+ !ecm->port.out_ep->desc) {
DBG(cdev, "init ecm\n");
- ecm->port.in = ep_choose(cdev->gadget,
- ecm->hs.in, ecm->fs.in);
- ecm->port.out = ep_choose(cdev->gadget,
- ecm->hs.out, ecm->fs.out);
+ if (config_ep_by_speed(cdev->gadget, f,
+ ecm->port.in_ep) ||
+ config_ep_by_speed(cdev->gadget, f,
+ ecm->port.out_ep)) {
+ ecm->port.in_ep->desc = NULL;
+ ecm->port.out_ep->desc = NULL;
+ goto fail;
+ }
}
/* CDC Ethernet only sends data in non-default altsettings.
@@ -549,7 +545,7 @@
if (ecm->notify->driver_data) {
usb_ep_disable(ecm->notify);
ecm->notify->driver_data = NULL;
- ecm->notify_desc = NULL;
+ ecm->notify->desc = NULL;
}
}
@@ -665,13 +661,6 @@
if (!f->descriptors)
goto fail;
- ecm->fs.in = usb_find_endpoint(ecm_fs_function,
- f->descriptors, &fs_ecm_in_desc);
- ecm->fs.out = usb_find_endpoint(ecm_fs_function,
- f->descriptors, &fs_ecm_out_desc);
- ecm->fs.notify = usb_find_endpoint(ecm_fs_function,
- f->descriptors, &fs_ecm_notify_desc);
-
/* support all relevant hardware speeds... we expect that when
* hardware is dual speed, all bulk-capable endpoints work at
* both speeds
@@ -688,13 +677,6 @@
f->hs_descriptors = usb_copy_descriptors(ecm_hs_function);
if (!f->hs_descriptors)
goto fail;
-
- ecm->hs.in = usb_find_endpoint(ecm_hs_function,
- f->hs_descriptors, &hs_ecm_in_desc);
- ecm->hs.out = usb_find_endpoint(ecm_hs_function,
- f->hs_descriptors, &hs_ecm_out_desc);
- ecm->hs.notify = usb_find_endpoint(ecm_hs_function,
- f->hs_descriptors, &hs_ecm_notify_desc);
}
/* NOTE: all that is done without knowing or caring about
@@ -723,9 +705,9 @@
/* we might as well release our claims on endpoints */
if (ecm->notify)
ecm->notify->driver_data = NULL;
- if (ecm->port.out)
+ if (ecm->port.out_ep->desc)
ecm->port.out_ep->driver_data = NULL;
- if (ecm->port.in)
+ if (ecm->port.in_ep->desc)
ecm->port.in_ep->driver_data = NULL;
ERROR(cdev, "%s: can't bind, err %d\n", f->name, status);
diff --git a/drivers/usb/gadget/f_eem.c b/drivers/usb/gadget/f_eem.c
index b3c3042..3e41274 100644
--- a/drivers/usb/gadget/f_eem.c
+++ b/drivers/usb/gadget/f_eem.c
@@ -35,17 +35,9 @@
* Ethernet link.
*/
-struct eem_ep_descs {
- struct usb_endpoint_descriptor *in;
- struct usb_endpoint_descriptor *out;
-};
-
struct f_eem {
struct gether port;
u8 ctrl_id;
-
- struct eem_ep_descs fs;
- struct eem_ep_descs hs;
};
static inline struct f_eem *func_to_eem(struct usb_function *f)
@@ -176,12 +168,16 @@
gether_disconnect(&eem->port);
}
- if (!eem->port.in) {
+ if (!eem->port.in_ep->desc || !eem->port.out_ep->desc) {
DBG(cdev, "init eem\n");
- eem->port.in = ep_choose(cdev->gadget,
- eem->hs.in, eem->fs.in);
- eem->port.out = ep_choose(cdev->gadget,
- eem->hs.out, eem->fs.out);
+ if (config_ep_by_speed(cdev->gadget, f,
+ eem->port.in_ep) ||
+ config_ep_by_speed(cdev->gadget, f,
+ eem->port.out_ep)) {
+ eem->port.in_ep->desc = NULL;
+ eem->port.out_ep->desc = NULL;
+ goto fail;
+ }
}
/* zlps should not occur because zero-length EEM packets
@@ -253,11 +249,6 @@
if (!f->descriptors)
goto fail;
- eem->fs.in = usb_find_endpoint(eem_fs_function,
- f->descriptors, &eem_fs_in_desc);
- eem->fs.out = usb_find_endpoint(eem_fs_function,
- f->descriptors, &eem_fs_out_desc);
-
/* support all relevant hardware speeds... we expect that when
* hardware is dual speed, all bulk-capable endpoints work at
* both speeds
@@ -272,11 +263,6 @@
f->hs_descriptors = usb_copy_descriptors(eem_hs_function);
if (!f->hs_descriptors)
goto fail;
-
- eem->hs.in = usb_find_endpoint(eem_hs_function,
- f->hs_descriptors, &eem_hs_in_desc);
- eem->hs.out = usb_find_endpoint(eem_hs_function,
- f->hs_descriptors, &eem_hs_out_desc);
}
DBG(cdev, "CDC Ethernet (EEM): %s speed IN/%s OUT/%s\n",
@@ -289,9 +275,9 @@
usb_free_descriptors(f->descriptors);
/* we might as well release our claims on endpoints */
- if (eem->port.out)
+ if (eem->port.out_ep->desc)
eem->port.out_ep->driver_data = NULL;
- if (eem->port.in)
+ if (eem->port.in_ep->desc)
eem->port.in_ep->driver_data = NULL;
ERROR(cdev, "%s: can't bind, err %d\n", f->name, status);
diff --git a/drivers/usb/gadget/f_fs.c b/drivers/usb/gadget/f_fs.c
index 19fffcc..c161a9a 100644
--- a/drivers/usb/gadget/f_fs.c
+++ b/drivers/usb/gadget/f_fs.c
@@ -1544,7 +1544,8 @@
ds = ep->descs[ep->descs[1] ? 1 : 0];
ep->ep->driver_data = ep;
- ret = usb_ep_enable(ep->ep, ds);
+ ep->ep->desc = ds;
+ ret = usb_ep_enable(ep->ep);
if (likely(!ret)) {
epfile->ep = ep;
epfile->in = usb_endpoint_dir_in(ds);
diff --git a/drivers/usb/gadget/f_hid.c b/drivers/usb/gadget/f_hid.c
index 598e7e2..403a48b 100644
--- a/drivers/usb/gadget/f_hid.c
+++ b/drivers/usb/gadget/f_hid.c
@@ -59,8 +59,6 @@
struct cdev cdev;
struct usb_function func;
struct usb_ep *in_ep;
- struct usb_endpoint_descriptor *fs_in_ep_desc;
- struct usb_endpoint_descriptor *hs_in_ep_desc;
};
static inline struct f_hidg *func_to_hidg(struct usb_function *f)
@@ -416,7 +414,6 @@
{
struct usb_composite_dev *cdev = f->config->cdev;
struct f_hidg *hidg = func_to_hidg(f);
- const struct usb_endpoint_descriptor *ep_desc;
int status = 0;
VDBG(cdev, "hidg_set_alt intf:%d alt:%d\n", intf, alt);
@@ -426,9 +423,13 @@
if (hidg->in_ep->driver_data != NULL)
usb_ep_disable(hidg->in_ep);
- ep_desc = ep_choose(f->config->cdev->gadget,
- hidg->hs_in_ep_desc, hidg->fs_in_ep_desc);
- status = usb_ep_enable(hidg->in_ep, ep_desc);
+ status = config_ep_by_speed(f->config->cdev->gadget, f,
+ hidg->in_ep);
+ if (status) {
+ ERROR(cdev, "config_ep_by_speed FAILED!\n");
+ goto fail;
+ }
+ status = usb_ep_enable(hidg->in_ep);
if (status < 0) {
ERROR(cdev, "Enable endpoint FAILED!\n");
goto fail;
@@ -498,21 +499,12 @@
if (!f->descriptors)
goto fail;
- hidg->fs_in_ep_desc = usb_find_endpoint(hidg_fs_descriptors,
- f->descriptors,
- &hidg_fs_in_ep_desc);
-
if (gadget_is_dualspeed(c->cdev->gadget)) {
hidg_hs_in_ep_desc.bEndpointAddress =
hidg_fs_in_ep_desc.bEndpointAddress;
f->hs_descriptors = usb_copy_descriptors(hidg_hs_descriptors);
if (!f->hs_descriptors)
goto fail;
- hidg->hs_in_ep_desc = usb_find_endpoint(hidg_hs_descriptors,
- f->hs_descriptors,
- &hidg_hs_in_ep_desc);
- } else {
- hidg->hs_in_ep_desc = NULL;
}
mutex_init(&hidg->lock);
diff --git a/drivers/usb/gadget/f_loopback.c b/drivers/usb/gadget/f_loopback.c
index b37960f..3756326 100644
--- a/drivers/usb/gadget/f_loopback.c
+++ b/drivers/usb/gadget/f_loopback.c
@@ -250,26 +250,27 @@
enable_loopback(struct usb_composite_dev *cdev, struct f_loopback *loop)
{
int result = 0;
- const struct usb_endpoint_descriptor *src, *sink;
struct usb_ep *ep;
struct usb_request *req;
unsigned i;
- src = ep_choose(cdev->gadget,
- &hs_loop_source_desc, &fs_loop_source_desc);
- sink = ep_choose(cdev->gadget,
- &hs_loop_sink_desc, &fs_loop_sink_desc);
-
/* one endpoint writes data back IN to the host */
ep = loop->in_ep;
- result = usb_ep_enable(ep, src);
+ result = config_ep_by_speed(cdev->gadget, &(loop->function), ep);
+ if (result)
+ return result;
+ result = usb_ep_enable(ep);
if (result < 0)
return result;
ep->driver_data = loop;
/* one endpoint just reads OUT packets */
ep = loop->out_ep;
- result = usb_ep_enable(ep, sink);
+ result = config_ep_by_speed(cdev->gadget, &(loop->function), ep);
+ if (result)
+ goto fail0;
+
+ result = usb_ep_enable(ep);
if (result < 0) {
fail0:
ep = loop->in_ep;
diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c
index 55d9a307..3d35c78 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -112,8 +112,7 @@
* is not loaded (an empty string as "filename" in the fsg_config
* structure causes error). The CD-ROM emulation includes a single
* data track and no audio tracks; hence there need be only one
- * backing file per LUN. Note also that the CD-ROM block length is
- * set to 512 rather than the more common value 2048.
+ * backing file per LUN.
*
*
* MSF includes support for module parameters. If gadget using it
@@ -749,7 +748,6 @@
u32 amount_left;
loff_t file_offset, file_offset_tmp;
unsigned int amount;
- unsigned int partial_page;
ssize_t nread;
#ifdef CONFIG_USB_MSC_PROFILING
ktime_t start, diff;
@@ -778,7 +776,7 @@
curlun->sense_data = SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
return -EINVAL;
}
- file_offset = ((loff_t) lba) << 9;
+ file_offset = ((loff_t) lba) << curlun->blkbits;
/* Carry out the file reads */
amount_left = common->data_size_from_cmnd;
@@ -791,18 +789,10 @@
* Try to read the remaining amount.
* But don't read more than the buffer size.
* And don't try to read past the end of the file.
- * Finally, if we're not at a page boundary, don't read past
- * the next page.
- * If this means reading 0 then we were asked to read past
- * the end of file.
*/
amount = min(amount_left, FSG_BUFLEN);
amount = min((loff_t)amount,
curlun->file_length - file_offset);
- partial_page = file_offset & (PAGE_CACHE_SIZE - 1);
- if (partial_page > 0)
- amount = min(amount, (unsigned int)PAGE_CACHE_SIZE -
- partial_page);
/* Wait for the next buffer to become available */
bh = common->next_buffhd_to_fill;
@@ -819,7 +809,8 @@
if (amount == 0) {
curlun->sense_data =
SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
- curlun->sense_data_info = file_offset >> 9;
+ curlun->sense_data_info =
+ file_offset >> curlun->blkbits;
curlun->info_valid = 1;
bh->inreq->length = 0;
bh->state = BUF_STATE_FULL;
@@ -851,18 +842,25 @@
} else if (nread < amount) {
LDBG(curlun, "partial file read: %d/%u\n",
(int)nread, amount);
- nread -= (nread & 511); /* Round down to a block */
+ nread = round_down(nread, curlun->blksize);
}
file_offset += nread;
amount_left -= nread;
common->residue -= nread;
+
+ /*
+ * Except at the end of the transfer, nread will be
+ * equal to the buffer size, which is divisible by the
+ * bulk-in maxpacket size.
+ */
bh->inreq->length = nread;
bh->state = BUF_STATE_FULL;
/* If an error occurred, report it and its position */
if (nread < amount) {
curlun->sense_data = SS_UNRECOVERED_READ_ERROR;
- curlun->sense_data_info = file_offset >> 9;
+ curlun->sense_data_info =
+ file_offset >> curlun->blkbits;
curlun->info_valid = 1;
break;
}
@@ -893,7 +891,6 @@
u32 amount_left_to_req, amount_left_to_write;
loff_t usb_offset, file_offset, file_offset_tmp;
unsigned int amount;
- unsigned int partial_page;
ssize_t nwritten;
int rc;
@@ -944,7 +941,7 @@
/* Carry out the file writes */
get_some_more = 1;
- file_offset = usb_offset = ((loff_t) lba) << 9;
+ file_offset = usb_offset = ((loff_t) lba) << curlun->blkbits;
amount_left_to_req = common->data_size_from_cmnd;
amount_left_to_write = common->data_size_from_cmnd;
@@ -956,41 +953,21 @@
/*
* Figure out how much we want to get:
- * Try to get the remaining amount.
- * But don't get more than the buffer size.
- * And don't try to go past the end of the file.
- * If we're not at a page boundary,
- * don't go past the next page.
- * If this means getting 0, then we were asked
- * to write past the end of file.
- * Finally, round down to a block boundary.
+ * Try to get the remaining amount,
+ * but not more than the buffer size.
*/
amount = min(amount_left_to_req, FSG_BUFLEN);
- amount = min((loff_t)amount,
- curlun->file_length - usb_offset);
- partial_page = usb_offset & (PAGE_CACHE_SIZE - 1);
- if (partial_page > 0)
- amount = min(amount,
- (unsigned int)PAGE_CACHE_SIZE - partial_page);
- if (amount == 0) {
+ /* Beyond the end of the backing file? */
+ if (usb_offset >= curlun->file_length) {
get_some_more = 0;
curlun->sense_data =
SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
- curlun->sense_data_info = usb_offset >> 9;
+ curlun->sense_data_info =
+ usb_offset >> curlun->blkbits;
curlun->info_valid = 1;
continue;
}
- amount -= amount & 511;
- if (amount == 0) {
-
- /*
- * Why were we were asked to transfer a
- * partial block?
- */
- get_some_more = 0;
- continue;
- }
/* Get the next buffer */
usb_offset += amount;
@@ -1000,12 +977,11 @@
get_some_more = 0;
/*
- * amount is always divisible by 512, hence by
- * the bulk-out maxpacket size
+ * Except at the end of the transfer, amount will be
+ * equal to the buffer size, which is divisible by
+ * the bulk-out maxpacket size.
*/
- bh->outreq->length = amount;
- bh->bulk_out_intended_length = amount;
- bh->outreq->short_not_ok = 1;
+ set_bulk_out_req_length(common, bh, amount);
if (!start_out_transfer(common, bh))
/* Dunno what to do if common->fsg is NULL */
return -EIO;
@@ -1035,7 +1011,8 @@
/* Did something go wrong with the transfer? */
if (bh->outreq->status != 0) {
curlun->sense_data = SS_COMMUNICATION_FAILURE;
- curlun->sense_data_info = file_offset >> 9;
+ curlun->sense_data_info =
+ file_offset >> curlun->blkbits;
curlun->info_valid = 1;
break;
}
@@ -1049,6 +1026,16 @@
amount = curlun->file_length - file_offset;
}
+ /* Don't accept excess data. The spec doesn't say
+ * what to do in this case. We'll ignore the error.
+ */
+ amount = min(amount, bh->bulk_out_intended_length);
+
+ /* Don't write a partial block */
+ amount = round_down(amount, curlun->blksize);
+ if (amount == 0)
+ goto empty_write;
+
/* Perform the write */
file_offset_tmp = file_offset;
#ifdef CONFIG_USB_MSC_PROFILING
@@ -1075,8 +1062,7 @@
} else if (nwritten < amount) {
LDBG(curlun, "partial file write: %d/%u\n",
(int)nwritten, amount);
- nwritten -= (nwritten & 511);
- /* Round down to a block */
+ nwritten = round_down(nwritten, curlun->blksize);
}
file_offset += nwritten;
amount_left_to_write -= nwritten;
@@ -1085,7 +1071,8 @@
/* If an error occurred, report it and its position */
if (nwritten < amount) {
curlun->sense_data = SS_WRITE_ERROR;
- curlun->sense_data_info = file_offset >> 9;
+ curlun->sense_data_info =
+ file_offset >> curlun->blkbits;
curlun->info_valid = 1;
#ifdef CONFIG_USB_CSW_HACK
write_error_after_csw_sent = 1;
@@ -1117,8 +1104,10 @@
}
}
#endif
+
+ empty_write:
/* Did the host decide to stop early? */
- if (bh->outreq->actual != bh->outreq->length) {
+ if (bh->outreq->actual < bh->bulk_out_intended_length) {
common->short_packet_received = 1;
break;
}
@@ -1198,8 +1187,8 @@
return -EIO; /* No default reply */
/* Prepare to carry out the file verify */
- amount_left = verification_length << 9;
- file_offset = ((loff_t) lba) << 9;
+ amount_left = verification_length << curlun->blkbits;
+ file_offset = ((loff_t) lba) << curlun->blkbits;
/* Write out all the dirty buffers before invalidating them */
fsg_lun_fsync_sub(curlun);
@@ -1217,8 +1206,6 @@
* Try to read the remaining amount, but not more than
* the buffer size.
* And don't try to read past the end of the file.
- * If this means reading 0 then we were asked to read
- * past the end of file.
*/
amount = min(amount_left, FSG_BUFLEN);
amount = min((loff_t)amount,
@@ -1226,7 +1213,8 @@
if (amount == 0) {
curlun->sense_data =
SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
- curlun->sense_data_info = file_offset >> 9;
+ curlun->sense_data_info =
+ file_offset >> curlun->blkbits;
curlun->info_valid = 1;
break;
}
@@ -1248,11 +1236,12 @@
} else if (nread < amount) {
LDBG(curlun, "partial file verify: %d/%u\n",
(int)nread, amount);
- nread -= nread & 511; /* Round down to a sector */
+ nread = round_down(nread, curlun->blksize);
}
if (nread == 0) {
curlun->sense_data = SS_UNRECOVERED_READ_ERROR;
- curlun->sense_data_info = file_offset >> 9;
+ curlun->sense_data_info =
+ file_offset >> curlun->blkbits;
curlun->info_valid = 1;
break;
}
@@ -1358,7 +1347,7 @@
put_unaligned_be32(curlun->num_sectors - 1, &buf[0]);
/* Max logical block */
- put_unaligned_be32(512, &buf[4]); /* Block length */
+ put_unaligned_be32(curlun->blksize, &buf[4]);/* Block length */
return 8;
}
@@ -1595,7 +1584,7 @@
put_unaligned_be32(curlun->num_sectors, &buf[0]);
/* Number of blocks */
- put_unaligned_be32(512, &buf[4]); /* Block length */
+ put_unaligned_be32(curlun->blksize, &buf[4]);/* Block length */
buf[4] = 0x02; /* Current capacity */
return 12;
}
@@ -1675,7 +1664,7 @@
common->next_buffhd_to_drain = bh->next;
/* A short packet or an error ends everything */
- if (bh->outreq->actual != bh->outreq->length ||
+ if (bh->outreq->actual < bh->bulk_out_intended_length ||
bh->outreq->status != 0) {
raise_exception(common,
FSG_STATE_ABORT_BULK_OUT);
@@ -1691,12 +1680,11 @@
amount = min(common->usb_amount_left, FSG_BUFLEN);
/*
- * amount is always divisible by 512, hence by
+ * Except at the end of the transfer, amount will be
+ * equal to the buffer size, which is divisible by
* the bulk-out maxpacket size.
*/
- bh->outreq->length = amount;
- bh->bulk_out_intended_length = amount;
- bh->outreq->short_not_ok = 1;
+ set_bulk_out_req_length(common, bh, amount);
if (!start_out_transfer(common, bh))
/* Dunno what to do if common->fsg is NULL */
return -EIO;
@@ -2103,7 +2091,8 @@
case READ_6:
i = common->cmnd[4];
- common->data_size_from_cmnd = (i == 0 ? 256 : i) << 9;
+ common->data_size_from_cmnd = (i == 0 ? 256 : i) <<
+ common->curlun->blkbits;
reply = check_command(common, 6, DATA_DIR_TO_HOST,
(7<<1) | (1<<4), 1,
"READ(6)");
@@ -2113,7 +2102,8 @@
case READ_10:
common->data_size_from_cmnd =
- get_unaligned_be16(&common->cmnd[7]) << 9;
+ get_unaligned_be16(&common->cmnd[7]) <<
+ common->curlun->blkbits;
reply = check_command(common, 10, DATA_DIR_TO_HOST,
(1<<1) | (0xf<<2) | (3<<7), 1,
"READ(10)");
@@ -2123,7 +2113,8 @@
case READ_12:
common->data_size_from_cmnd =
- get_unaligned_be32(&common->cmnd[6]) << 9;
+ get_unaligned_be32(&common->cmnd[6]) <<
+ common->curlun->blkbits;
reply = check_command(common, 12, DATA_DIR_TO_HOST,
(1<<1) | (0xf<<2) | (0xf<<6), 1,
"READ(12)");
@@ -2223,7 +2214,8 @@
case WRITE_6:
i = common->cmnd[4];
- common->data_size_from_cmnd = (i == 0 ? 256 : i) << 9;
+ common->data_size_from_cmnd = (i == 0 ? 256 : i) <<
+ common->curlun->blkbits;
reply = check_command(common, 6, DATA_DIR_FROM_HOST,
(7<<1) | (1<<4), 1,
"WRITE(6)");
@@ -2233,7 +2225,8 @@
case WRITE_10:
common->data_size_from_cmnd =
- get_unaligned_be16(&common->cmnd[7]) << 9;
+ get_unaligned_be16(&common->cmnd[7]) <<
+ common->curlun->blkbits;
reply = check_command(common, 10, DATA_DIR_FROM_HOST,
(1<<1) | (0xf<<2) | (3<<7), 1,
"WRITE(10)");
@@ -2243,7 +2236,8 @@
case WRITE_12:
common->data_size_from_cmnd =
- get_unaligned_be32(&common->cmnd[6]) << 9;
+ get_unaligned_be32(&common->cmnd[6]) <<
+ common->curlun->blkbits;
reply = check_command(common, 12, DATA_DIR_FROM_HOST,
(1<<1) | (0xf<<2) | (0xf<<6), 1,
"WRITE(12)");
@@ -2378,7 +2372,6 @@
/* Queue a request to read a Bulk-only CBW */
set_bulk_out_req_length(common, bh, USB_BULK_CB_WRAP_LEN);
- bh->outreq->short_not_ok = 1;
if (!start_out_transfer(common, bh))
/* Don't know what to do if common->fsg is NULL */
return -EIO;
@@ -2405,18 +2398,6 @@
/*-------------------------------------------------------------------------*/
-static int enable_endpoint(struct fsg_common *common, struct usb_ep *ep,
- const struct usb_endpoint_descriptor *d)
-{
- int rc;
-
- ep->driver_data = common;
- rc = usb_ep_enable(ep, d);
- if (rc)
- ERROR(common, "can't enable %s, result %d\n", ep->name, rc);
- return rc;
-}
-
static int alloc_request(struct fsg_common *common, struct usb_ep *ep,
struct usb_request **preq)
{
@@ -2466,7 +2447,6 @@
common->fsg = new_fsg;
fsg = common->fsg;
-
/* Allocate the requests */
for (i = 0; i < FSG_NUM_BUFFERS; ++i) {
struct fsg_buffhd *bh = &common->buffhds[i];
@@ -2496,31 +2476,37 @@
{
struct fsg_dev *fsg = fsg_from_func(f);
struct fsg_common *common = fsg->common;
- const struct usb_endpoint_descriptor *d;
int rc;
/* Enable the endpoints */
- d = fsg_ep_desc(common->gadget,
- &fsg_fs_bulk_in_desc, &fsg_hs_bulk_in_desc);
- rc = enable_endpoint(common, fsg->bulk_in, d);
+ rc = config_ep_by_speed(common->gadget, &(fsg->function), fsg->bulk_in);
if (rc)
return rc;
+ rc = usb_ep_enable(fsg->bulk_in);
+ if (rc)
+ return rc;
+ fsg->bulk_in->driver_data = common;
fsg->bulk_in_enabled = 1;
- d = fsg_ep_desc(common->gadget,
- &fsg_fs_bulk_out_desc, &fsg_hs_bulk_out_desc);
- rc = enable_endpoint(common, fsg->bulk_out, d);
- if (rc) {
- usb_ep_disable(fsg->bulk_in);
- fsg->bulk_in_enabled = 0;
- return rc;
- }
+ rc = config_ep_by_speed(common->gadget, &(fsg->function),
+ fsg->bulk_out);
+ if (rc)
+ goto reset_bulk_int;
+ rc = usb_ep_enable(fsg->bulk_out);
+ if (rc)
+ goto reset_bulk_int;
+ fsg->bulk_out->driver_data = common;
fsg->bulk_out_enabled = 1;
- common->bulk_out_maxpacket = le16_to_cpu(d->wMaxPacketSize);
+ common->bulk_out_maxpacket = le16_to_cpu(fsg->bulk_in->desc->wMaxPacketSize);
clear_bit(IGNORE_BULK_OUT, &fsg->atomic_bitflags);
fsg->common->new_fsg = fsg;
raise_exception(fsg->common, FSG_STATE_CONFIG_CHANGE);
return USB_GADGET_DELAYED_STATUS;
+
+reset_bulk_int:
+ usb_ep_disable(fsg->bulk_in);
+ fsg->bulk_in_enabled = 0;
+ return rc;
}
static void fsg_disable(struct usb_function *f)
@@ -3087,6 +3073,7 @@
fsg_common_put(common);
usb_free_descriptors(fsg->function.descriptors);
usb_free_descriptors(fsg->function.hs_descriptors);
+ usb_free_descriptors(fsg->function.ss_descriptors);
kfree(fsg);
}
@@ -3137,6 +3124,28 @@
}
}
+ if (gadget_is_superspeed(gadget)) {
+ unsigned max_burst;
+
+ /* Calculate bMaxBurst, we know packet size is 1024 */
+ max_burst = min_t(unsigned, FSG_BUFLEN / 1024, 15);
+
+ fsg_ss_bulk_in_desc.bEndpointAddress =
+ fsg_fs_bulk_in_desc.bEndpointAddress;
+ fsg_ss_bulk_in_comp_desc.bMaxBurst = max_burst;
+
+ fsg_ss_bulk_out_desc.bEndpointAddress =
+ fsg_fs_bulk_out_desc.bEndpointAddress;
+ fsg_ss_bulk_out_comp_desc.bMaxBurst = max_burst;
+
+ f->ss_descriptors = usb_copy_descriptors(fsg_ss_function);
+ if (unlikely(!f->ss_descriptors)) {
+ usb_free_descriptors(f->hs_descriptors);
+ usb_free_descriptors(f->descriptors);
+ return -ENOMEM;
+ }
+ }
+
return 0;
autoconf_fail:
diff --git a/drivers/usb/gadget/f_mtp.c b/drivers/usb/gadget/f_mtp.c
index 2829231..c85d499 100644
--- a/drivers/usb/gadget/f_mtp.c
+++ b/drivers/usb/gadget/f_mtp.c
@@ -410,15 +410,6 @@
ep->driver_data = dev; /* claim the endpoint */
dev->ep_out = ep;
- ep = usb_ep_autoconfig(cdev->gadget, out_desc);
- if (!ep) {
- DBG(cdev, "usb_ep_autoconfig for ep_out failed\n");
- return -ENODEV;
- }
- DBG(cdev, "usb_ep_autoconfig for mtp ep_out got %s\n", ep->name);
- ep->driver_data = dev; /* claim the endpoint */
- dev->ep_out = ep;
-
ep = usb_ep_autoconfig(cdev->gadget, intr_desc);
if (!ep) {
DBG(cdev, "usb_ep_autoconfig for ep_intr failed\n");
@@ -1132,21 +1123,38 @@
int ret;
DBG(cdev, "mtp_function_set_alt intf: %d alt: %d\n", intf, alt);
- ret = usb_ep_enable(dev->ep_in,
- ep_choose(cdev->gadget,
- &mtp_highspeed_in_desc,
- &mtp_fullspeed_in_desc));
- if (ret)
- return ret;
- ret = usb_ep_enable(dev->ep_out,
- ep_choose(cdev->gadget,
- &mtp_highspeed_out_desc,
- &mtp_fullspeed_out_desc));
+
+ ret = config_ep_by_speed(cdev->gadget, f, dev->ep_in);
if (ret) {
+ dev->ep_in->desc = NULL;
+ ERROR(cdev, "config_ep_by_speed failes for ep %s, result %d\n",
+ dev->ep_in->name, ret);
+ return ret;
+ }
+ ret = usb_ep_enable(dev->ep_in);
+ if (ret) {
+ ERROR(cdev, "failed to enable ep %s, result %d\n",
+ dev->ep_in->name, ret);
+ return ret;
+ }
+
+ ret = config_ep_by_speed(cdev->gadget, f, dev->ep_out);
+ if (ret) {
+ dev->ep_out->desc = NULL;
+ ERROR(cdev, "config_ep_by_speed failes for ep %s, result %d\n",
+ dev->ep_out->name, ret);
usb_ep_disable(dev->ep_in);
return ret;
}
- ret = usb_ep_enable(dev->ep_intr, &mtp_intr_desc);
+ ret = usb_ep_enable(dev->ep_out);
+ if (ret) {
+ ERROR(cdev, "failed to enable ep %s, result %d\n",
+ dev->ep_out->name, ret);
+ usb_ep_disable(dev->ep_in);
+ return ret;
+ }
+ dev->ep_intr->desc = &mtp_intr_desc;
+ ret = usb_ep_enable(dev->ep_intr);
if (ret) {
usb_ep_disable(dev->ep_out);
usb_ep_disable(dev->ep_in);
diff --git a/drivers/usb/gadget/f_ncm.c b/drivers/usb/gadget/f_ncm.c
index 86902a6..ae69ed7 100644
--- a/drivers/usb/gadget/f_ncm.c
+++ b/drivers/usb/gadget/f_ncm.c
@@ -48,12 +48,6 @@
#define NCM_NDP_HDR_CRC 0x01000000
#define NCM_NDP_HDR_NOCRC 0x00000000
-struct ncm_ep_descs {
- struct usb_endpoint_descriptor *in;
- struct usb_endpoint_descriptor *out;
- struct usb_endpoint_descriptor *notify;
-};
-
enum ncm_notify_state {
NCM_NOTIFY_NONE, /* don't notify */
NCM_NOTIFY_CONNECT, /* issue CONNECT next */
@@ -66,11 +60,7 @@
char ethaddr[14];
- struct ncm_ep_descs fs;
- struct ncm_ep_descs hs;
-
struct usb_ep *notify;
- struct usb_endpoint_descriptor *notify_desc;
struct usb_request *notify_req;
u8 notify_state;
bool is_open;
@@ -802,13 +792,14 @@
if (ncm->notify->driver_data) {
DBG(cdev, "reset ncm control %d\n", intf);
usb_ep_disable(ncm->notify);
- } else {
- DBG(cdev, "init ncm ctrl %d\n", intf);
- ncm->notify_desc = ep_choose(cdev->gadget,
- ncm->hs.notify,
- ncm->fs.notify);
}
- usb_ep_enable(ncm->notify, ncm->notify_desc);
+
+ if (!(ncm->notify->desc)) {
+ DBG(cdev, "init ncm ctrl %d\n", intf);
+ if (config_ep_by_speed(cdev->gadget, f, ncm->notify))
+ goto fail;
+ }
+ usb_ep_enable(ncm->notify);
ncm->notify->driver_data = ncm;
/* Data interface has two altsettings, 0 and 1 */
@@ -829,14 +820,17 @@
if (alt == 1) {
struct net_device *net;
- if (!ncm->port.in) {
+ if (!ncm->port.in_ep->desc ||
+ !ncm->port.out_ep->desc) {
DBG(cdev, "init ncm\n");
- ncm->port.in = ep_choose(cdev->gadget,
- ncm->hs.in,
- ncm->fs.in);
- ncm->port.out = ep_choose(cdev->gadget,
- ncm->hs.out,
- ncm->fs.out);
+ if (config_ep_by_speed(cdev->gadget, f,
+ ncm->port.in_ep) ||
+ config_ep_by_speed(cdev->gadget, f,
+ ncm->port.out_ep)) {
+ ncm->port.in_ep->desc = NULL;
+ ncm->port.out_ep->desc = NULL;
+ goto fail;
+ }
}
/* TODO */
@@ -1111,7 +1105,7 @@
if (ncm->notify->driver_data) {
usb_ep_disable(ncm->notify);
ncm->notify->driver_data = NULL;
- ncm->notify_desc = NULL;
+ ncm->notify->desc = NULL;
}
}
@@ -1228,13 +1222,6 @@
if (!f->descriptors)
goto fail;
- ncm->fs.in = usb_find_endpoint(ncm_fs_function,
- f->descriptors, &fs_ncm_in_desc);
- ncm->fs.out = usb_find_endpoint(ncm_fs_function,
- f->descriptors, &fs_ncm_out_desc);
- ncm->fs.notify = usb_find_endpoint(ncm_fs_function,
- f->descriptors, &fs_ncm_notify_desc);
-
/*
* support all relevant hardware speeds... we expect that when
* hardware is dual speed, all bulk-capable endpoints work at
@@ -1252,13 +1239,6 @@
f->hs_descriptors = usb_copy_descriptors(ncm_hs_function);
if (!f->hs_descriptors)
goto fail;
-
- ncm->hs.in = usb_find_endpoint(ncm_hs_function,
- f->hs_descriptors, &hs_ncm_in_desc);
- ncm->hs.out = usb_find_endpoint(ncm_hs_function,
- f->hs_descriptors, &hs_ncm_out_desc);
- ncm->hs.notify = usb_find_endpoint(ncm_hs_function,
- f->hs_descriptors, &hs_ncm_notify_desc);
}
/*
@@ -1288,9 +1268,9 @@
/* we might as well release our claims on endpoints */
if (ncm->notify)
ncm->notify->driver_data = NULL;
- if (ncm->port.out)
+ if (ncm->port.out_ep->desc)
ncm->port.out_ep->driver_data = NULL;
- if (ncm->port.in)
+ if (ncm->port.in_ep->desc)
ncm->port.in_ep->driver_data = NULL;
ERROR(cdev, "%s: can't bind, err %d\n", f->name, status);
diff --git a/drivers/usb/gadget/f_obex.c b/drivers/usb/gadget/f_obex.c
index 8f8c643..394502a 100644
--- a/drivers/usb/gadget/f_obex.c
+++ b/drivers/usb/gadget/f_obex.c
@@ -39,20 +39,12 @@
* ready to handle the commands.
*/
-struct obex_ep_descs {
- struct usb_endpoint_descriptor *obex_in;
- struct usb_endpoint_descriptor *obex_out;
-};
-
struct f_obex {
struct gserial port;
u8 ctrl_id;
u8 data_id;
u8 port_num;
u8 can_activate;
-
- struct obex_ep_descs fs;
- struct obex_ep_descs hs;
};
static inline struct f_obex *func_to_obex(struct usb_function *f)
@@ -227,12 +219,16 @@
gserial_disconnect(&obex->port);
}
- if (!obex->port.in_desc) {
+ if (!obex->port.in->desc || !obex->port.out->desc) {
DBG(cdev, "init obex ttyGS%d\n", obex->port_num);
- obex->port.in_desc = ep_choose(cdev->gadget,
- obex->hs.obex_in, obex->fs.obex_in);
- obex->port.out_desc = ep_choose(cdev->gadget,
- obex->hs.obex_out, obex->fs.obex_out);
+ if (config_ep_by_speed(cdev->gadget, f,
+ obex->port.in) ||
+ config_ep_by_speed(cdev->gadget, f,
+ obex->port.out)) {
+ obex->port.out->desc = NULL;
+ obex->port.in->desc = NULL;
+ goto fail;
+ }
}
if (alt == 1) {
@@ -346,11 +342,6 @@
/* copy descriptors, and track endpoint copies */
f->descriptors = usb_copy_descriptors(fs_function);
- obex->fs.obex_in = usb_find_endpoint(fs_function,
- f->descriptors, &obex_fs_ep_in_desc);
- obex->fs.obex_out = usb_find_endpoint(fs_function,
- f->descriptors, &obex_fs_ep_out_desc);
-
/* support all relevant hardware speeds... we expect that when
* hardware is dual speed, all bulk-capable endpoints work at
* both speeds
@@ -364,11 +355,6 @@
/* copy descriptors, and track endpoint copies */
f->hs_descriptors = usb_copy_descriptors(hs_function);
-
- obex->hs.obex_in = usb_find_endpoint(hs_function,
- f->hs_descriptors, &obex_hs_ep_in_desc);
- obex->hs.obex_out = usb_find_endpoint(hs_function,
- f->hs_descriptors, &obex_hs_ep_out_desc);
}
/* Avoid letting this gadget enumerate until the userspace
diff --git a/drivers/usb/gadget/f_phonet.c b/drivers/usb/gadget/f_phonet.c
index 5e14950..0d6d260 100644
--- a/drivers/usb/gadget/f_phonet.c
+++ b/drivers/usb/gadget/f_phonet.c
@@ -427,17 +427,16 @@
spin_lock(&port->lock);
__pn_reset(f);
if (alt == 1) {
- struct usb_endpoint_descriptor *out, *in;
int i;
- out = ep_choose(gadget,
- &pn_hs_sink_desc,
- &pn_fs_sink_desc);
- in = ep_choose(gadget,
- &pn_hs_source_desc,
- &pn_fs_source_desc);
- usb_ep_enable(fp->out_ep, out);
- usb_ep_enable(fp->in_ep, in);
+ if (config_ep_by_speed(gadget, f, fp->in_ep) ||
+ config_ep_by_speed(gadget, f, fp->out_ep)) {
+ fp->in_ep->desc = NULL;
+ fp->out_ep->desc = NULL;
+ return -EINVAL;
+ }
+ usb_ep_enable(fp->out_ep);
+ usb_ep_enable(fp->in_ep);
port->usb = fp;
fp->out_ep->driver_data = fp;
diff --git a/drivers/usb/gadget/f_rmnet.c b/drivers/usb/gadget/f_rmnet.c
index d846c4e..cc26c85 100644
--- a/drivers/usb/gadget/f_rmnet.c
+++ b/drivers/usb/gadget/f_rmnet.c
@@ -25,11 +25,6 @@
#define RMNET_NOTIFY_INTERVAL 5
#define RMNET_MAX_NOTIFY_SIZE sizeof(struct usb_cdc_notification)
-struct rmnet_descs {
- struct usb_endpoint_descriptor *in;
- struct usb_endpoint_descriptor *out;
- struct usb_endpoint_descriptor *notify;
-};
#define ACM_CTRL_DTR (1 << 0)
@@ -46,13 +41,8 @@
spinlock_t lock;
- /* usb descriptors */
- struct rmnet_descs fs;
- struct rmnet_descs hs;
-
/* usb eps*/
struct usb_ep *notify;
- struct usb_endpoint_descriptor *notify_desc;
struct usb_request *notify_req;
/* control info */
@@ -481,10 +471,16 @@
pr_debug("%s: reset port:%d\n", __func__, dev->port_num);
usb_ep_disable(dev->notify);
}
- dev->notify_desc = ep_choose(cdev->gadget,
- dev->hs.notify,
- dev->fs.notify);
- ret = usb_ep_enable(dev->notify, dev->notify_desc);
+
+ ret = config_ep_by_speed(cdev->gadget, f, dev->notify);
+ if (ret) {
+ dev->notify->desc = NULL;
+ ERROR(cdev, "config_ep_by_speed failes for ep %s, result %d\n",
+ dev->notify->name, ret);
+ return ret;
+ }
+ ret = usb_ep_enable(dev->notify);
+
if (ret) {
pr_err("%s: usb ep#%s enable failed, err#%d\n",
__func__, dev->notify->name, ret);
@@ -497,10 +493,12 @@
gport_rmnet_disconnect(dev);
}
- dev->port.in_desc = ep_choose(cdev->gadget,
- dev->hs.in, dev->fs.in);
- dev->port.out_desc = ep_choose(cdev->gadget,
- dev->hs.out, dev->fs.out);
+ if (config_ep_by_speed(cdev->gadget, f, dev->port.in) ||
+ config_ep_by_speed(cdev->gadget, f, dev->port.out)) {
+ dev->port.in->desc = NULL;
+ dev->port.out->desc = NULL;
+ return -EINVAL;
+ }
ret = gport_rmnet_connect(dev);
@@ -854,16 +852,6 @@
if (!f->descriptors)
goto fail;
- dev->fs.in = usb_find_endpoint(rmnet_fs_function,
- f->descriptors,
- &rmnet_fs_in_desc);
- dev->fs.out = usb_find_endpoint(rmnet_fs_function,
- f->descriptors,
- &rmnet_fs_out_desc);
- dev->fs.notify = usb_find_endpoint(rmnet_fs_function,
- f->descriptors,
- &rmnet_fs_notify_desc);
-
if (gadget_is_dualspeed(cdev->gadget)) {
rmnet_hs_in_desc.bEndpointAddress =
rmnet_fs_in_desc.bEndpointAddress;
@@ -877,13 +865,6 @@
if (!f->hs_descriptors)
goto fail;
-
- dev->hs.in = usb_find_endpoint(rmnet_hs_function,
- f->hs_descriptors, &rmnet_hs_in_desc);
- dev->hs.out = usb_find_endpoint(rmnet_hs_function,
- f->hs_descriptors, &rmnet_hs_out_desc);
- dev->hs.notify = usb_find_endpoint(rmnet_hs_function,
- f->hs_descriptors, &rmnet_hs_notify_desc);
}
pr_info("%s: RmNet(%d) %s Speed, IN:%s OUT:%s\n",
diff --git a/drivers/usb/gadget/f_rmnet_sdio.c b/drivers/usb/gadget/f_rmnet_sdio.c
index f63d939..8019356 100644
--- a/drivers/usb/gadget/f_rmnet_sdio.c
+++ b/drivers/usb/gadget/f_rmnet_sdio.c
@@ -1255,17 +1255,58 @@
struct usb_composite_dev *cdev = dev->cdev;
int ret = 0;
+ /* Enable epin */
dev->epin->driver_data = dev;
- usb_ep_enable(dev->epin, ep_choose(cdev->gadget,
- &rmnet_sdio_hs_in_desc,
- &rmnet_sdio_fs_in_desc));
+ ret = config_ep_by_speed(cdev->gadget, f, dev->epin);
+ if (ret) {
+ dev->epin->desc = NULL;
+ ERROR(cdev, "config_ep_by_speed failes for ep %s, result %d\n",
+ dev->epin->name, ret);
+ return ret;
+ }
+ ret = usb_ep_enable(dev->epin);
+ if (ret) {
+ ERROR(cdev, "can't enable %s, result %d\n",
+ dev->epin->name, ret);
+ return ret;
+ }
+
+ /* Enable epout */
dev->epout->driver_data = dev;
- usb_ep_enable(dev->epout, ep_choose(cdev->gadget,
- &rmnet_sdio_hs_out_desc,
- &rmnet_sdio_fs_out_desc));
- usb_ep_enable(dev->epnotify, ep_choose(cdev->gadget,
- &rmnet_sdio_hs_notify_desc,
- &rmnet_sdio_fs_notify_desc));
+ ret = config_ep_by_speed(cdev->gadget, f, dev->epout);
+ if (ret) {
+ dev->epout->desc = NULL;
+ ERROR(cdev, "config_ep_by_speed failes for ep %s, result %d\n",
+ dev->epout->name, ret);
+ usb_ep_disable(dev->epin);
+ return ret;
+ }
+ ret = usb_ep_enable(dev->epout);
+ if (ret) {
+ ERROR(cdev, "can't enable %s, result %d\n",
+ dev->epout->name, ret);
+ usb_ep_disable(dev->epin);
+ return ret;
+ }
+
+ /* Enable epnotify */
+ ret = config_ep_by_speed(cdev->gadget, f, dev->epnotify);
+ if (ret) {
+ dev->epnotify->desc = NULL;
+ ERROR(cdev, "config_ep_by_speed failes for ep %s, result %d\n",
+ dev->epnotify->name, ret);
+ usb_ep_disable(dev->epin);
+ usb_ep_disable(dev->epout);
+ return ret;
+ }
+ ret = usb_ep_enable(dev->epnotify);
+ if (ret) {
+ ERROR(cdev, "can't enable %s, result %d\n",
+ dev->epnotify->name, ret);
+ usb_ep_disable(dev->epin);
+ usb_ep_disable(dev->epout);
+ return ret;
+ }
/* allocate notification */
dev->notify_req = rmnet_sdio_alloc_req(dev->epnotify,
diff --git a/drivers/usb/gadget/f_rmnet_smd.c b/drivers/usb/gadget/f_rmnet_smd.c
index 2049dc0..b71f646 100644
--- a/drivers/usb/gadget/f_rmnet_smd.c
+++ b/drivers/usb/gadget/f_rmnet_smd.c
@@ -956,17 +956,32 @@
struct usb_composite_dev *cdev = dev->cdev;
int ret = 0;
- ret = usb_ep_enable(dev->epin, ep_choose(cdev->gadget,
- &rmnet_smd_hs_in_desc,
- &rmnet_smd_fs_in_desc));
+ /* Enable epin endpoint */
+ ret = config_ep_by_speed(cdev->gadget, f, dev->epin);
+ if (ret) {
+ dev->epin->desc = NULL;
+ ERROR(cdev, "config_ep_by_speed failed for ep %s, result %d\n",
+ dev->epin->name, ret);
+ return ret;
+ }
+ ret = usb_ep_enable(dev->epin);
if (ret) {
ERROR(cdev, "can't enable %s, result %d\n",
dev->epin->name, ret);
return ret;
}
- ret = usb_ep_enable(dev->epout, ep_choose(cdev->gadget,
- &rmnet_smd_hs_out_desc,
- &rmnet_smd_fs_out_desc));
+
+ /* Enable epout endpoint */
+ ret = config_ep_by_speed(cdev->gadget, f, dev->epout);
+ if (ret) {
+ dev->epout->desc = NULL;
+ ERROR(cdev, "config_ep_by_speed failed for ep %s, result %d\n",
+ dev->epout->name, ret);
+ usb_ep_disable(dev->epin);
+ return ret;
+ }
+ ret = usb_ep_enable(dev->epout);
+
if (ret) {
ERROR(cdev, "can't enable %s, result %d\n",
dev->epout->name, ret);
@@ -974,9 +989,17 @@
return ret;
}
- ret = usb_ep_enable(dev->epnotify, ep_choose(cdev->gadget,
- &rmnet_smd_hs_notify_desc,
- &rmnet_smd_fs_notify_desc));
+ /* Enable epnotify endpoint */
+ ret = config_ep_by_speed(cdev->gadget, f, dev->epnotify);
+ if (ret) {
+ dev->epnotify->desc = NULL;
+ ERROR(cdev, "config_ep_by_speed failed for ep %s, result %d\n",
+ dev->epnotify->name, ret);
+ usb_ep_disable(dev->epin);
+ usb_ep_disable(dev->epout);
+ return ret;
+ }
+ ret = usb_ep_enable(dev->epnotify);
if (ret) {
ERROR(cdev, "can't enable %s, result %d\n",
dev->epnotify->name, ret);
diff --git a/drivers/usb/gadget/f_rmnet_smd_sdio.c b/drivers/usb/gadget/f_rmnet_smd_sdio.c
index e39125d..175afe3 100644
--- a/drivers/usb/gadget/f_rmnet_smd_sdio.c
+++ b/drivers/usb/gadget/f_rmnet_smd_sdio.c
@@ -1354,6 +1354,7 @@
function);
struct rmnet_mux_sdio_dev *sdio_dev = &dev->sdio_dev;
struct usb_composite_dev *cdev = dev->cdev;
+ int ret = 0;
/* allocate notification */
dev->notify_req = rmnet_mux_alloc_req(dev->epnotify,
@@ -1365,18 +1366,59 @@
dev->notify_req->complete = rmnet_mux_notify_complete;
dev->notify_req->context = dev;
dev->notify_req->length = RMNET_MUX_SDIO_MAX_NFY_SZE;
- usb_ep_enable(dev->epnotify, ep_choose(cdev->gadget,
- &rmnet_mux_hs_notify_desc,
- &rmnet_mux_fs_notify_desc));
+ /* Enable epin */
dev->epin->driver_data = dev;
- usb_ep_enable(dev->epin, ep_choose(cdev->gadget,
- &rmnet_mux_hs_in_desc,
- &rmnet_mux_fs_in_desc));
+ ret = config_ep_by_speed(cdev->gadget, f, dev->epin);
+ if (ret) {
+ dev->epin->desc = NULL;
+ ERROR(cdev, "config_ep_by_speed failes for ep %s, result %d\n",
+ dev->epin->name, ret);
+ return ret;
+ }
+ ret = usb_ep_enable(dev->epin);
+ if (ret) {
+ ERROR(cdev, "can't enable %s, result %d\n",
+ dev->epin->name, ret);
+ return ret;
+ }
+
+ /* Enable epout */
dev->epout->driver_data = dev;
- usb_ep_enable(dev->epout, ep_choose(cdev->gadget,
- &rmnet_mux_hs_out_desc,
- &rmnet_mux_fs_out_desc));
+ ret = config_ep_by_speed(cdev->gadget, f, dev->epout);
+ if (ret) {
+ dev->epout->desc = NULL;
+ ERROR(cdev, "config_ep_by_speed failes for ep %s, result %d\n",
+ dev->epout->name, ret);
+ usb_ep_disable(dev->epin);
+ return ret;
+ }
+ ret = usb_ep_enable(dev->epout);
+ if (ret) {
+ ERROR(cdev, "can't enable %s, result %d\n",
+ dev->epout->name, ret);
+ usb_ep_disable(dev->epin);
+ return ret;
+ }
+
+ /* Enable epnotify */
+ ret = config_ep_by_speed(cdev->gadget, f, dev->epnotify);
+ if (ret) {
+ dev->epnotify->desc = NULL;
+ ERROR(cdev, "config_ep_by_speed failes for ep %s, result %d\n",
+ dev->epnotify->name, ret);
+ usb_ep_disable(dev->epin);
+ usb_ep_disable(dev->epout);
+ return ret;
+ }
+ ret = usb_ep_enable(dev->epnotify);
+ if (ret) {
+ ERROR(cdev, "can't enable %s, result %d\n",
+ dev->epnotify->name, ret);
+ usb_ep_disable(dev->epin);
+ usb_ep_disable(dev->epout);
+ return ret;
+ }
dev->dpkts_tolaptop = 0;
dev->cpkts_tolaptop = 0;
diff --git a/drivers/usb/gadget/f_rndis.c b/drivers/usb/gadget/f_rndis.c
index d03b11b..4a74dcf 100644
--- a/drivers/usb/gadget/f_rndis.c
+++ b/drivers/usb/gadget/f_rndis.c
@@ -76,12 +76,6 @@
* - MS-Windows drivers sometimes emit undocumented requests.
*/
-struct rndis_ep_descs {
- struct usb_endpoint_descriptor *in;
- struct usb_endpoint_descriptor *out;
- struct usb_endpoint_descriptor *notify;
-};
-
struct f_rndis {
struct gether port;
u8 ctrl_id, data_id;
@@ -90,12 +84,7 @@
const char *manufacturer;
int config;
-
- struct rndis_ep_descs fs;
- struct rndis_ep_descs hs;
-
struct usb_ep *notify;
- struct usb_endpoint_descriptor *notify_desc;
struct usb_request *notify_req;
atomic_t notify_count;
};
@@ -486,13 +475,13 @@
if (rndis->notify->driver_data) {
VDBG(cdev, "reset rndis control %d\n", intf);
usb_ep_disable(rndis->notify);
- } else {
- VDBG(cdev, "init rndis ctrl %d\n", intf);
}
- rndis->notify_desc = ep_choose(cdev->gadget,
- rndis->hs.notify,
- rndis->fs.notify);
- usb_ep_enable(rndis->notify, rndis->notify_desc);
+ if (!rndis->notify->desc) {
+ VDBG(cdev, "init rndis ctrl %d\n", intf);
+ if (config_ep_by_speed(cdev->gadget, f, rndis->notify))
+ goto fail;
+ }
+ usb_ep_enable(rndis->notify);
rndis->notify->driver_data = rndis;
} else if (intf == rndis->data_id) {
@@ -503,13 +492,17 @@
gether_disconnect(&rndis->port);
}
- if (!rndis->port.in) {
+ if (!rndis->port.in_ep->desc || !rndis->port.out_ep->desc) {
DBG(cdev, "init rndis\n");
+ if (config_ep_by_speed(cdev->gadget, f,
+ rndis->port.in_ep) ||
+ config_ep_by_speed(cdev->gadget, f,
+ rndis->port.out_ep)) {
+ rndis->port.in_ep->desc = NULL;
+ rndis->port.out_ep->desc = NULL;
+ goto fail;
+ }
}
- rndis->port.in = ep_choose(cdev->gadget,
- rndis->hs.in, rndis->fs.in);
- rndis->port.out = ep_choose(cdev->gadget,
- rndis->hs.out, rndis->fs.out);
/* Avoid ZLPs; they can be troublesome. */
rndis->port.is_zlp_ok = false;
@@ -664,13 +657,6 @@
if (!f->descriptors)
goto fail;
- rndis->fs.in = usb_find_endpoint(eth_fs_function,
- f->descriptors, &fs_in_desc);
- rndis->fs.out = usb_find_endpoint(eth_fs_function,
- f->descriptors, &fs_out_desc);
- rndis->fs.notify = usb_find_endpoint(eth_fs_function,
- f->descriptors, &fs_notify_desc);
-
/* support all relevant hardware speeds... we expect that when
* hardware is dual speed, all bulk-capable endpoints work at
* both speeds
@@ -688,13 +674,6 @@
if (!f->hs_descriptors)
goto fail;
-
- rndis->hs.in = usb_find_endpoint(eth_hs_function,
- f->hs_descriptors, &hs_in_desc);
- rndis->hs.out = usb_find_endpoint(eth_hs_function,
- f->hs_descriptors, &hs_out_desc);
- rndis->hs.notify = usb_find_endpoint(eth_hs_function,
- f->hs_descriptors, &hs_notify_desc);
}
rndis->port.open = rndis_open;
@@ -737,9 +716,9 @@
/* we might as well release our claims on endpoints */
if (rndis->notify)
rndis->notify->driver_data = NULL;
- if (rndis->port.out)
+ if (rndis->port.out_ep->desc)
rndis->port.out_ep->driver_data = NULL;
- if (rndis->port.in)
+ if (rndis->port.in_ep->desc)
rndis->port.in_ep->driver_data = NULL;
ERROR(cdev, "%s: can't bind, err %d\n", f->name, status);
diff --git a/drivers/usb/gadget/f_serial.c b/drivers/usb/gadget/f_serial.c
index de8c8ed..8d9f090 100644
--- a/drivers/usb/gadget/f_serial.c
+++ b/drivers/usb/gadget/f_serial.c
@@ -29,21 +29,12 @@
*/
#define GSERIAL_NO_PORTS 2
-struct gser_descs {
- struct usb_endpoint_descriptor *in;
- struct usb_endpoint_descriptor *out;
-#ifdef CONFIG_MODEM_SUPPORT
- struct usb_endpoint_descriptor *notify;
-#endif
-};
struct f_gser {
struct gserial port;
u8 data_id;
u8 port_num;
- struct gser_descs fs;
- struct gser_descs hs;
u8 online;
enum transport_type transport;
@@ -51,7 +42,6 @@
u8 pending;
spinlock_t lock;
struct usb_ep *notify;
- struct usb_endpoint_descriptor *notify_desc;
struct usb_request *notify_req;
struct usb_cdc_line_coding port_line_coding;
@@ -478,10 +468,15 @@
DBG(cdev, "reset generic ctl ttyGS%d\n", gser->port_num);
usb_ep_disable(gser->notify);
}
- gser->notify_desc = ep_choose(cdev->gadget,
- gser->hs.notify,
- gser->fs.notify);
- rc = usb_ep_enable(gser->notify, gser->notify_desc);
+
+ if (!gser->notify->desc) {
+ if (config_ep_by_speed(cdev->gadget, f, gser->notify)) {
+ gser->notify->desc = NULL;
+ return -EINVAL;
+ }
+ }
+ rc = usb_ep_enable(gser->notify);
+
if (rc) {
ERROR(cdev, "can't enable %s, result %d\n",
gser->notify->name, rc);
@@ -493,13 +488,16 @@
if (gser->port.in->driver_data) {
DBG(cdev, "reset generic data ttyGS%d\n", gser->port_num);
gport_disconnect(gser);
- } else {
- DBG(cdev, "activate generic data ttyGS%d\n", gser->port_num);
}
- gser->port.in_desc = ep_choose(cdev->gadget,
- gser->hs.in, gser->fs.in);
- gser->port.out_desc = ep_choose(cdev->gadget,
- gser->hs.out, gser->fs.out);
+ if (!gser->port.in->desc || !gser->port.out->desc) {
+ DBG(cdev, "activate generic ttyGS%d\n", gser->port_num);
+ if (config_ep_by_speed(cdev->gadget, f, gser->port.in) ||
+ config_ep_by_speed(cdev->gadget, f, gser->port.out)) {
+ gser->port.in->desc = NULL;
+ gser->port.out->desc = NULL;
+ return -EINVAL;
+ }
+ }
gport_connect(gser);
@@ -744,16 +742,6 @@
if (!f->descriptors)
goto fail;
- gser->fs.in = usb_find_endpoint(gser_fs_function,
- f->descriptors, &gser_fs_in_desc);
- gser->fs.out = usb_find_endpoint(gser_fs_function,
- f->descriptors, &gser_fs_out_desc);
-#ifdef CONFIG_MODEM_SUPPORT
- gser->fs.notify = usb_find_endpoint(gser_fs_function,
- f->descriptors, &gser_fs_notify_desc);
-#endif
-
-
/* support all relevant hardware speeds... we expect that when
* hardware is dual speed, all bulk-capable endpoints work at
* both speeds
@@ -774,14 +762,6 @@
if (!f->hs_descriptors)
goto fail;
- gser->hs.in = usb_find_endpoint(gser_hs_function,
- f->hs_descriptors, &gser_hs_in_desc);
- gser->hs.out = usb_find_endpoint(gser_hs_function,
- f->hs_descriptors, &gser_hs_out_desc);
-#ifdef CONFIG_MODEM_SUPPORT
- gser->hs.notify = usb_find_endpoint(gser_hs_function,
- f->hs_descriptors, &gser_hs_notify_desc);
-#endif
}
DBG(cdev, "generic ttyGS%d: %s speed IN/%s OUT/%s\n",
diff --git a/drivers/usb/gadget/f_sourcesink.c b/drivers/usb/gadget/f_sourcesink.c
index e403a53..caf2f95 100644
--- a/drivers/usb/gadget/f_sourcesink.c
+++ b/drivers/usb/gadget/f_sourcesink.c
@@ -343,15 +343,14 @@
enable_source_sink(struct usb_composite_dev *cdev, struct f_sourcesink *ss)
{
int result = 0;
- const struct usb_endpoint_descriptor *src, *sink;
struct usb_ep *ep;
- src = ep_choose(cdev->gadget, &hs_source_desc, &fs_source_desc);
- sink = ep_choose(cdev->gadget, &hs_sink_desc, &fs_sink_desc);
-
/* one endpoint writes (sources) zeroes IN (to the host) */
ep = ss->in_ep;
- result = usb_ep_enable(ep, src);
+ result = config_ep_by_speed(cdev->gadget, &(ss->function), ep);
+ if (result)
+ return result;
+ result = usb_ep_enable(ep);
if (result < 0)
return result;
ep->driver_data = ss;
@@ -367,7 +366,10 @@
/* one endpoint reads (sinks) anything OUT (from the host) */
ep = ss->out_ep;
- result = usb_ep_enable(ep, sink);
+ result = config_ep_by_speed(cdev->gadget, &(ss->function), ep);
+ if (result)
+ goto fail;
+ result = usb_ep_enable(ep);
if (result < 0)
goto fail;
ep->driver_data = ss;
diff --git a/drivers/usb/gadget/f_subset.c b/drivers/usb/gadget/f_subset.c
index 8675ca4..93bf676 100644
--- a/drivers/usb/gadget/f_subset.c
+++ b/drivers/usb/gadget/f_subset.c
@@ -57,18 +57,10 @@
* caring about specific product and vendor IDs.
*/
-struct geth_descs {
- struct usb_endpoint_descriptor *in;
- struct usb_endpoint_descriptor *out;
-};
-
struct f_gether {
struct gether port;
char ethaddr[14];
-
- struct geth_descs fs;
- struct geth_descs hs;
};
static inline struct f_gether *func_to_geth(struct usb_function *f)
@@ -243,10 +235,12 @@
}
DBG(cdev, "init + activate cdc subset\n");
- geth->port.in = ep_choose(cdev->gadget,
- geth->hs.in, geth->fs.in);
- geth->port.out = ep_choose(cdev->gadget,
- geth->hs.out, geth->fs.out);
+ if (config_ep_by_speed(cdev->gadget, f, geth->port.in_ep) ||
+ config_ep_by_speed(cdev->gadget, f, geth->port.out_ep)) {
+ geth->port.in_ep->desc = NULL;
+ geth->port.out_ep->desc = NULL;
+ return -EINVAL;
+ }
net = gether_connect(&geth->port);
return IS_ERR(net) ? PTR_ERR(net) : 0;
@@ -297,12 +291,6 @@
/* copy descriptors, and track endpoint copies */
f->descriptors = usb_copy_descriptors(fs_eth_function);
- geth->fs.in = usb_find_endpoint(fs_eth_function,
- f->descriptors, &fs_subset_in_desc);
- geth->fs.out = usb_find_endpoint(fs_eth_function,
- f->descriptors, &fs_subset_out_desc);
-
-
/* support all relevant hardware speeds... we expect that when
* hardware is dual speed, all bulk-capable endpoints work at
* both speeds
@@ -315,11 +303,6 @@
/* copy descriptors, and track endpoint copies */
f->hs_descriptors = usb_copy_descriptors(hs_eth_function);
-
- geth->hs.in = usb_find_endpoint(hs_eth_function,
- f->hs_descriptors, &hs_subset_in_desc);
- geth->hs.out = usb_find_endpoint(hs_eth_function,
- f->hs_descriptors, &hs_subset_out_desc);
}
/* NOTE: all that is done without knowing or caring about
@@ -334,9 +317,9 @@
fail:
/* we might as well release our claims on endpoints */
- if (geth->port.out)
+ if (geth->port.out_ep->desc)
geth->port.out_ep->driver_data = NULL;
- if (geth->port.in)
+ if (geth->port.in_ep->desc)
geth->port.in_ep->driver_data = NULL;
ERROR(cdev, "%s: can't bind, err %d\n", f->name, status);
diff --git a/drivers/usb/gadget/f_uvc.c b/drivers/usb/gadget/f_uvc.c
index be446b7..df74d03 100644
--- a/drivers/usb/gadget/f_uvc.c
+++ b/drivers/usb/gadget/f_uvc.c
@@ -262,8 +262,10 @@
if (uvc->state != UVC_STATE_CONNECTED)
return 0;
- if (uvc->video.ep)
- usb_ep_enable(uvc->video.ep, &uvc_streaming_ep);
+ if (uvc->video.ep) {
+ uvc->video.ep->desc = &uvc_streaming_ep;
+ usb_ep_enable(uvc->video.ep);
+ }
memset(&v4l2_event, 0, sizeof(v4l2_event));
v4l2_event.type = UVC_EVENT_STREAMON;
diff --git a/drivers/usb/gadget/file_storage.c b/drivers/usb/gadget/file_storage.c
index 0360f56..b17ecd8 100644
--- a/drivers/usb/gadget/file_storage.c
+++ b/drivers/usb/gadget/file_storage.c
@@ -69,8 +69,7 @@
* each LUN would be settable independently as a disk drive or a CD-ROM
* drive, but currently all LUNs have to be the same type. The CD-ROM
* emulation includes a single data track and no audio tracks; hence there
- * need be only one backing file per LUN. Note also that the CD-ROM block
- * length is set to 512 rather than the more common value 2048.
+ * need be only one backing file per LUN.
*
* Requirements are modest; only a bulk-in and a bulk-out endpoint are
* needed (an interrupt-out endpoint is also needed for CBI). The memory
@@ -533,6 +532,18 @@
/*-------------------------------------------------------------------------*/
+/* Maxpacket and other transfer characteristics vary by speed. */
+static struct usb_endpoint_descriptor *
+fsg_ep_desc(struct usb_gadget *g, struct usb_endpoint_descriptor *fs,
+ struct usb_endpoint_descriptor *hs)
+{
+ if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH)
+ return hs;
+ return fs;
+}
+
+/*-------------------------------------------------------------------------*/
+
/*
* DESCRIPTORS ... most are static, but strings and (full) configuration
* descriptors are built on demand. Also the (static) config and interface
@@ -586,7 +597,19 @@
.bNumConfigurations = 1,
};
+static int populate_bos(struct fsg_dev *fsg, u8 *buf)
+{
+ memcpy(buf, &fsg_bos_desc, USB_DT_BOS_SIZE);
+ buf += USB_DT_BOS_SIZE;
+ memcpy(buf, &fsg_ext_cap_desc, USB_DT_USB_EXT_CAP_SIZE);
+ buf += USB_DT_USB_EXT_CAP_SIZE;
+
+ memcpy(buf, &fsg_ss_cap_desc, USB_DT_USB_SS_CAP_SIZE);
+
+ return USB_DT_BOS_SIZE + USB_DT_USB_SS_CAP_SIZE
+ + USB_DT_USB_EXT_CAP_SIZE;
+}
/*
* Config descriptors must agree with the code that sets configurations
@@ -929,20 +952,28 @@
case USB_DT_DEVICE:
VDBG(fsg, "get device descriptor\n");
+ device_desc.bMaxPacketSize0 = fsg->ep0->maxpacket;
value = sizeof device_desc;
memcpy(req->buf, &device_desc, value);
break;
case USB_DT_DEVICE_QUALIFIER:
VDBG(fsg, "get device qualifier\n");
- if (!gadget_is_dualspeed(fsg->gadget))
+ if (!gadget_is_dualspeed(fsg->gadget) ||
+ fsg->gadget->speed == USB_SPEED_SUPER)
break;
+ /*
+ * Assume ep0 uses the same maxpacket value for both
+ * speeds
+ */
+ dev_qualifier.bMaxPacketSize0 = fsg->ep0->maxpacket;
value = sizeof dev_qualifier;
memcpy(req->buf, &dev_qualifier, value);
break;
case USB_DT_OTHER_SPEED_CONFIG:
VDBG(fsg, "get other-speed config descriptor\n");
- if (!gadget_is_dualspeed(fsg->gadget))
+ if (!gadget_is_dualspeed(fsg->gadget) ||
+ fsg->gadget->speed == USB_SPEED_SUPER)
break;
goto get_config;
case USB_DT_CONFIG:
@@ -961,7 +992,15 @@
value = usb_gadget_get_string(&fsg_stringtab,
w_value & 0xff, req->buf);
break;
+
+ case USB_DT_BOS:
+ VDBG(fsg, "get bos descriptor\n");
+
+ if (gadget_is_superspeed(fsg->gadget))
+ value = populate_bos(fsg, req->buf);
+ break;
}
+
break;
/* One config, two speeds */
@@ -1130,7 +1169,6 @@
u32 amount_left;
loff_t file_offset, file_offset_tmp;
unsigned int amount;
- unsigned int partial_page;
ssize_t nread;
/* Get the starting Logical Block Address and check that it's
@@ -1152,7 +1190,7 @@
curlun->sense_data = SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
return -EINVAL;
}
- file_offset = ((loff_t) lba) << 9;
+ file_offset = ((loff_t) lba) << curlun->blkbits;
/* Carry out the file reads */
amount_left = fsg->data_size_from_cmnd;
@@ -1165,17 +1203,10 @@
* Try to read the remaining amount.
* But don't read more than the buffer size.
* And don't try to read past the end of the file.
- * Finally, if we're not at a page boundary, don't read past
- * the next page.
- * If this means reading 0 then we were asked to read past
- * the end of file. */
+ */
amount = min((unsigned int) amount_left, mod_data.buflen);
amount = min((loff_t) amount,
curlun->file_length - file_offset);
- partial_page = file_offset & (PAGE_CACHE_SIZE - 1);
- if (partial_page > 0)
- amount = min(amount, (unsigned int) PAGE_CACHE_SIZE -
- partial_page);
/* Wait for the next buffer to become available */
bh = fsg->next_buffhd_to_fill;
@@ -1190,7 +1221,7 @@
if (amount == 0) {
curlun->sense_data =
SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
- curlun->sense_data_info = file_offset >> 9;
+ curlun->sense_data_info = file_offset >> curlun->blkbits;
curlun->info_valid = 1;
bh->inreq->length = 0;
bh->state = BUF_STATE_FULL;
@@ -1215,18 +1246,23 @@
} else if (nread < amount) {
LDBG(curlun, "partial file read: %d/%u\n",
(int) nread, amount);
- nread -= (nread & 511); // Round down to a block
+ nread = round_down(nread, curlun->blksize);
}
file_offset += nread;
amount_left -= nread;
fsg->residue -= nread;
+
+ /* Except at the end of the transfer, nread will be
+ * equal to the buffer size, which is divisible by the
+ * bulk-in maxpacket size.
+ */
bh->inreq->length = nread;
bh->state = BUF_STATE_FULL;
/* If an error occurred, report it and its position */
if (nread < amount) {
curlun->sense_data = SS_UNRECOVERED_READ_ERROR;
- curlun->sense_data_info = file_offset >> 9;
+ curlun->sense_data_info = file_offset >> curlun->blkbits;
curlun->info_valid = 1;
break;
}
@@ -1256,7 +1292,6 @@
u32 amount_left_to_req, amount_left_to_write;
loff_t usb_offset, file_offset, file_offset_tmp;
unsigned int amount;
- unsigned int partial_page;
ssize_t nwritten;
int rc;
@@ -1297,7 +1332,7 @@
/* Carry out the file writes */
get_some_more = 1;
- file_offset = usb_offset = ((loff_t) lba) << 9;
+ file_offset = usb_offset = ((loff_t) lba) << curlun->blkbits;
amount_left_to_req = amount_left_to_write = fsg->data_size_from_cmnd;
while (amount_left_to_write > 0) {
@@ -1307,38 +1342,20 @@
if (bh->state == BUF_STATE_EMPTY && get_some_more) {
/* Figure out how much we want to get:
- * Try to get the remaining amount.
- * But don't get more than the buffer size.
- * And don't try to go past the end of the file.
- * If we're not at a page boundary,
- * don't go past the next page.
- * If this means getting 0, then we were asked
- * to write past the end of file.
- * Finally, round down to a block boundary. */
+ * Try to get the remaining amount,
+ * but not more than the buffer size.
+ */
amount = min(amount_left_to_req, mod_data.buflen);
- amount = min((loff_t) amount, curlun->file_length -
- usb_offset);
- partial_page = usb_offset & (PAGE_CACHE_SIZE - 1);
- if (partial_page > 0)
- amount = min(amount,
- (unsigned int) PAGE_CACHE_SIZE - partial_page);
- if (amount == 0) {
+ /* Beyond the end of the backing file? */
+ if (usb_offset >= curlun->file_length) {
get_some_more = 0;
curlun->sense_data =
SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
- curlun->sense_data_info = usb_offset >> 9;
+ curlun->sense_data_info = usb_offset >> curlun->blkbits;
curlun->info_valid = 1;
continue;
}
- amount -= (amount & 511);
- if (amount == 0) {
-
- /* Why were we were asked to transfer a
- * partial block? */
- get_some_more = 0;
- continue;
- }
/* Get the next buffer */
usb_offset += amount;
@@ -1347,11 +1364,11 @@
if (amount_left_to_req == 0)
get_some_more = 0;
- /* amount is always divisible by 512, hence by
- * the bulk-out maxpacket size */
- bh->outreq->length = bh->bulk_out_intended_length =
- amount;
- bh->outreq->short_not_ok = 1;
+ /* Except at the end of the transfer, amount will be
+ * equal to the buffer size, which is divisible by
+ * the bulk-out maxpacket size.
+ */
+ set_bulk_out_req_length(fsg, bh, amount);
start_transfer(fsg, fsg->bulk_out, bh->outreq,
&bh->outreq_busy, &bh->state);
fsg->next_buffhd_to_fill = bh->next;
@@ -1370,7 +1387,7 @@
/* Did something go wrong with the transfer? */
if (bh->outreq->status != 0) {
curlun->sense_data = SS_COMMUNICATION_FAILURE;
- curlun->sense_data_info = file_offset >> 9;
+ curlun->sense_data_info = file_offset >> curlun->blkbits;
curlun->info_valid = 1;
break;
}
@@ -1384,6 +1401,16 @@
amount = curlun->file_length - file_offset;
}
+ /* Don't accept excess data. The spec doesn't say
+ * what to do in this case. We'll ignore the error.
+ */
+ amount = min(amount, bh->bulk_out_intended_length);
+
+ /* Don't write a partial block */
+ amount = round_down(amount, curlun->blksize);
+ if (amount == 0)
+ goto empty_write;
+
/* Perform the write */
file_offset_tmp = file_offset;
nwritten = vfs_write(curlun->filp,
@@ -1402,8 +1429,7 @@
} else if (nwritten < amount) {
LDBG(curlun, "partial file write: %d/%u\n",
(int) nwritten, amount);
- nwritten -= (nwritten & 511);
- // Round down to a block
+ nwritten = round_down(nwritten, curlun->blksize);
}
file_offset += nwritten;
amount_left_to_write -= nwritten;
@@ -1412,13 +1438,14 @@
/* If an error occurred, report it and its position */
if (nwritten < amount) {
curlun->sense_data = SS_WRITE_ERROR;
- curlun->sense_data_info = file_offset >> 9;
+ curlun->sense_data_info = file_offset >> curlun->blkbits;
curlun->info_valid = 1;
break;
}
+ empty_write:
/* Did the host decide to stop early? */
- if (bh->outreq->actual != bh->outreq->length) {
+ if (bh->outreq->actual < bh->bulk_out_intended_length) {
fsg->short_packet_received = 1;
break;
}
@@ -1494,8 +1521,8 @@
return -EIO; // No default reply
/* Prepare to carry out the file verify */
- amount_left = verification_length << 9;
- file_offset = ((loff_t) lba) << 9;
+ amount_left = verification_length << curlun->blkbits;
+ file_offset = ((loff_t) lba) << curlun->blkbits;
/* Write out all the dirty buffers before invalidating them */
fsg_lun_fsync_sub(curlun);
@@ -1513,15 +1540,14 @@
* Try to read the remaining amount, but not more than
* the buffer size.
* And don't try to read past the end of the file.
- * If this means reading 0 then we were asked to read
- * past the end of file. */
+ */
amount = min((unsigned int) amount_left, mod_data.buflen);
amount = min((loff_t) amount,
curlun->file_length - file_offset);
if (amount == 0) {
curlun->sense_data =
SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
- curlun->sense_data_info = file_offset >> 9;
+ curlun->sense_data_info = file_offset >> curlun->blkbits;
curlun->info_valid = 1;
break;
}
@@ -1544,11 +1570,11 @@
} else if (nread < amount) {
LDBG(curlun, "partial file verify: %d/%u\n",
(int) nread, amount);
- nread -= (nread & 511); // Round down to a sector
+ nread = round_down(nread, curlun->blksize);
}
if (nread == 0) {
curlun->sense_data = SS_UNRECOVERED_READ_ERROR;
- curlun->sense_data_info = file_offset >> 9;
+ curlun->sense_data_info = file_offset >> curlun->blkbits;
curlun->info_valid = 1;
break;
}
@@ -1662,7 +1688,7 @@
put_unaligned_be32(curlun->num_sectors - 1, &buf[0]);
/* Max logical block */
- put_unaligned_be32(512, &buf[4]); /* Block length */
+ put_unaligned_be32(curlun->blksize, &buf[4]); /* Block length */
return 8;
}
@@ -1884,7 +1910,7 @@
put_unaligned_be32(curlun->num_sectors, &buf[0]);
/* Number of blocks */
- put_unaligned_be32(512, &buf[4]); /* Block length */
+ put_unaligned_be32(curlun->blksize, &buf[4]); /* Block length */
buf[4] = 0x02; /* Current capacity */
return 12;
}
@@ -1963,7 +1989,7 @@
fsg->next_buffhd_to_drain = bh->next;
/* A short packet or an error ends everything */
- if (bh->outreq->actual != bh->outreq->length ||
+ if (bh->outreq->actual < bh->bulk_out_intended_length ||
bh->outreq->status != 0) {
raise_exception(fsg, FSG_STATE_ABORT_BULK_OUT);
return -EINTR;
@@ -1977,11 +2003,11 @@
amount = min(fsg->usb_amount_left,
(u32) mod_data.buflen);
- /* amount is always divisible by 512, hence by
- * the bulk-out maxpacket size */
- bh->outreq->length = bh->bulk_out_intended_length =
- amount;
- bh->outreq->short_not_ok = 1;
+ /* Except at the end of the transfer, amount will be
+ * equal to the buffer size, which is divisible by
+ * the bulk-out maxpacket size.
+ */
+ set_bulk_out_req_length(fsg, bh, amount);
start_transfer(fsg, fsg->bulk_out, bh->outreq,
&bh->outreq_busy, &bh->state);
fsg->next_buffhd_to_fill = bh->next;
@@ -2409,7 +2435,7 @@
case READ_6:
i = fsg->cmnd[4];
- fsg->data_size_from_cmnd = (i == 0 ? 256 : i) << 9;
+ fsg->data_size_from_cmnd = (i == 0 ? 256 : i) << fsg->curlun->blkbits;
if ((reply = check_command(fsg, 6, DATA_DIR_TO_HOST,
(7<<1) | (1<<4), 1,
"READ(6)")) == 0)
@@ -2418,7 +2444,7 @@
case READ_10:
fsg->data_size_from_cmnd =
- get_unaligned_be16(&fsg->cmnd[7]) << 9;
+ get_unaligned_be16(&fsg->cmnd[7]) << fsg->curlun->blkbits;
if ((reply = check_command(fsg, 10, DATA_DIR_TO_HOST,
(1<<1) | (0xf<<2) | (3<<7), 1,
"READ(10)")) == 0)
@@ -2427,7 +2453,7 @@
case READ_12:
fsg->data_size_from_cmnd =
- get_unaligned_be32(&fsg->cmnd[6]) << 9;
+ get_unaligned_be32(&fsg->cmnd[6]) << fsg->curlun->blkbits;
if ((reply = check_command(fsg, 12, DATA_DIR_TO_HOST,
(1<<1) | (0xf<<2) | (0xf<<6), 1,
"READ(12)")) == 0)
@@ -2513,7 +2539,7 @@
case WRITE_6:
i = fsg->cmnd[4];
- fsg->data_size_from_cmnd = (i == 0 ? 256 : i) << 9;
+ fsg->data_size_from_cmnd = (i == 0 ? 256 : i) << fsg->curlun->blkbits;
if ((reply = check_command(fsg, 6, DATA_DIR_FROM_HOST,
(7<<1) | (1<<4), 1,
"WRITE(6)")) == 0)
@@ -2522,7 +2548,7 @@
case WRITE_10:
fsg->data_size_from_cmnd =
- get_unaligned_be16(&fsg->cmnd[7]) << 9;
+ get_unaligned_be16(&fsg->cmnd[7]) << fsg->curlun->blkbits;
if ((reply = check_command(fsg, 10, DATA_DIR_FROM_HOST,
(1<<1) | (0xf<<2) | (3<<7), 1,
"WRITE(10)")) == 0)
@@ -2531,7 +2557,7 @@
case WRITE_12:
fsg->data_size_from_cmnd =
- get_unaligned_be32(&fsg->cmnd[6]) << 9;
+ get_unaligned_be32(&fsg->cmnd[6]) << fsg->curlun->blkbits;
if ((reply = check_command(fsg, 12, DATA_DIR_FROM_HOST,
(1<<1) | (0xf<<2) | (0xf<<6), 1,
"WRITE(12)")) == 0)
@@ -2660,7 +2686,6 @@
/* Queue a request to read a Bulk-only CBW */
set_bulk_out_req_length(fsg, bh, USB_BULK_CB_WRAP_LEN);
- bh->outreq->short_not_ok = 1;
start_transfer(fsg, fsg->bulk_out, bh->outreq,
&bh->outreq_busy, &bh->state);
@@ -2713,7 +2738,8 @@
int rc;
ep->driver_data = fsg;
- rc = usb_ep_enable(ep, d);
+ ep->desc = d;
+ rc = usb_ep_enable(ep);
if (rc)
ERROR(fsg, "can't enable %s, result %d\n", ep->name, rc);
return rc;
@@ -2784,13 +2810,15 @@
/* Enable the endpoints */
d = fsg_ep_desc(fsg->gadget,
- &fsg_fs_bulk_in_desc, &fsg_hs_bulk_in_desc);
+ &fsg_fs_bulk_in_desc, &fsg_hs_bulk_in_desc,
+ &fsg_ss_bulk_in_desc);
if ((rc = enable_endpoint(fsg, fsg->bulk_in, d)) != 0)
goto reset;
fsg->bulk_in_enabled = 1;
d = fsg_ep_desc(fsg->gadget,
- &fsg_fs_bulk_out_desc, &fsg_hs_bulk_out_desc);
+ &fsg_fs_bulk_out_desc, &fsg_hs_bulk_out_desc,
+ &fsg_ss_bulk_out_desc);
if ((rc = enable_endpoint(fsg, fsg->bulk_out, d)) != 0)
goto reset;
fsg->bulk_out_enabled = 1;
@@ -2799,7 +2827,8 @@
if (transport_is_cbi()) {
d = fsg_ep_desc(fsg->gadget,
- &fsg_fs_intr_in_desc, &fsg_hs_intr_in_desc);
+ &fsg_fs_intr_in_desc, &fsg_hs_intr_in_desc,
+ &fsg_ss_intr_in_desc);
if ((rc = enable_endpoint(fsg, fsg->intr_in, d)) != 0)
goto reset;
fsg->intr_in_enabled = 1;
@@ -3416,7 +3445,6 @@
}
/* Fix up the descriptors */
- device_desc.bMaxPacketSize0 = fsg->ep0->maxpacket;
device_desc.idVendor = cpu_to_le16(mod_data.vendor);
device_desc.idProduct = cpu_to_le16(mod_data.product);
device_desc.bcdDevice = cpu_to_le16(mod_data.release);
@@ -3430,9 +3458,6 @@
if (gadget_is_dualspeed(gadget)) {
fsg_hs_function[i + FSG_HS_FUNCTION_PRE_EP_ENTRIES] = NULL;
- /* Assume ep0 uses the same maxpacket value for both speeds */
- dev_qualifier.bMaxPacketSize0 = fsg->ep0->maxpacket;
-
/* Assume endpoint addresses are the same for both speeds */
fsg_hs_bulk_in_desc.bEndpointAddress =
fsg_fs_bulk_in_desc.bEndpointAddress;
@@ -3442,6 +3467,24 @@
fsg_fs_intr_in_desc.bEndpointAddress;
}
+ if (gadget_is_superspeed(gadget)) {
+ unsigned max_burst;
+
+ fsg_ss_function[i + FSG_SS_FUNCTION_PRE_EP_ENTRIES] = NULL;
+
+ /* Calculate bMaxBurst, we know packet size is 1024 */
+ max_burst = min_t(unsigned, mod_data.buflen / 1024, 15);
+
+ /* Assume endpoint addresses are the same for both speeds */
+ fsg_ss_bulk_in_desc.bEndpointAddress =
+ fsg_fs_bulk_in_desc.bEndpointAddress;
+ fsg_ss_bulk_in_comp_desc.bMaxBurst = max_burst;
+
+ fsg_ss_bulk_out_desc.bEndpointAddress =
+ fsg_fs_bulk_out_desc.bEndpointAddress;
+ fsg_ss_bulk_out_comp_desc.bMaxBurst = max_burst;
+ }
+
if (gadget_is_otg(gadget))
fsg_otg_desc.bmAttributes |= USB_OTG_HNP;
@@ -3556,11 +3599,7 @@
/*-------------------------------------------------------------------------*/
static struct usb_gadget_driver fsg_driver = {
-#ifdef CONFIG_USB_GADGET_DUALSPEED
- .speed = USB_SPEED_HIGH,
-#else
- .speed = USB_SPEED_FULL,
-#endif
+ .speed = USB_SPEED_SUPER,
.function = (char *) fsg_string_product,
.unbind = fsg_unbind,
.disconnect = fsg_disconnect,
diff --git a/drivers/usb/gadget/fsl_qe_udc.c b/drivers/usb/gadget/fsl_qe_udc.c
index 3a68e09..3bf872e 100644
--- a/drivers/usb/gadget/fsl_qe_udc.c
+++ b/drivers/usb/gadget/fsl_qe_udc.c
@@ -1927,6 +1927,10 @@
return -ENOTSUPP;
}
+static int fsl_qe_start(struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *));
+static int fsl_qe_stop(struct usb_gadget_driver *driver);
+
/* defined in usb_gadget.h */
static struct usb_gadget_ops qe_gadget_ops = {
.get_frame = qe_get_frame,
@@ -1935,6 +1939,8 @@
.vbus_session = qe_vbus_session,
.vbus_draw = qe_vbus_draw,
.pullup = qe_pullup,
+ .start = fsl_qe_start,
+ .stop = fsl_qe_stop,
};
/*-------------------------------------------------------------------------
@@ -2320,7 +2326,7 @@
/*-------------------------------------------------------------------------
Gadget driver probe and unregister.
--------------------------------------------------------------------------*/
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int fsl_qe_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
int retval;
@@ -2369,9 +2375,8 @@
udc_controller->gadget.name, driver->driver.name);
return 0;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
-int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+static int fsl_qe_stop(struct usb_gadget_driver *driver)
{
struct qe_ep *loop_ep;
unsigned long flags;
@@ -2411,7 +2416,6 @@
driver->driver.name);
return 0;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
/* udc structure's alloc and setup, include ep-param alloc */
static struct qe_udc __devinit *qe_udc_config(struct platform_device *ofdev)
@@ -2662,11 +2666,17 @@
if (ret)
goto err6;
+ ret = usb_add_gadget_udc(&ofdev->dev, &udc_controller->gadget);
+ if (ret)
+ goto err7;
+
dev_info(udc_controller->dev,
"%s USB controller initialized as device\n",
(udc_controller->soc_type == PORT_QE) ? "QE" : "CPM");
return 0;
+err7:
+ device_unregister(&udc_controller->gadget.dev);
err6:
free_irq(udc_controller->usb_irq, udc_controller);
err5:
@@ -2721,6 +2731,8 @@
if (!udc_controller)
return -ENODEV;
+ usb_del_gadget_udc(&udc_controller->gadget);
+
udc_controller->done = &done;
tasklet_disable(&udc_controller->rx_tasklet);
diff --git a/drivers/usb/gadget/fsl_udc_core.c b/drivers/usb/gadget/fsl_udc_core.c
index 4e48331..4763cc3 100644
--- a/drivers/usb/gadget/fsl_udc_core.c
+++ b/drivers/usb/gadget/fsl_udc_core.c
@@ -1244,6 +1244,9 @@
return 0;
}
+static int fsl_start(struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *));
+static int fsl_stop(struct usb_gadget_driver *driver);
/* defined in gadget.h */
static struct usb_gadget_ops fsl_gadget_ops = {
.get_frame = fsl_get_frame,
@@ -1252,6 +1255,8 @@
.vbus_session = fsl_vbus_session,
.vbus_draw = fsl_vbus_draw,
.pullup = fsl_pullup,
+ .start = fsl_start,
+ .stop = fsl_stop,
};
/* Set protocol stall on ep0, protocol stall will automatically be cleared
@@ -1927,7 +1932,7 @@
* Hook to gadget drivers
* Called by initialization code of gadget drivers
*----------------------------------------------------------------*/
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int fsl_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
int retval = -ENODEV;
@@ -1995,10 +2000,9 @@
retval);
return retval;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
/* Disconnect from gadget driver */
-int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+static int fsl_stop(struct usb_gadget_driver *driver)
{
struct fsl_ep *loop_ep;
unsigned long flags;
@@ -2041,7 +2045,6 @@
driver->driver.name);
return 0;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
/*-------------------------------------------------------------------------
PROC File System Support
@@ -2590,9 +2593,16 @@
ret = -ENOMEM;
goto err_unregister;
}
+
+ ret = usb_add_gadget_udc(&pdev->dev, &udc_controller->gadget);
+ if (ret)
+ goto err_del_udc;
+
create_proc_file();
return 0;
+err_del_udc:
+ dma_pool_destroy(udc_controller->td_pool);
err_unregister:
device_unregister(&udc_controller->gadget.dev);
err_free_irq:
@@ -2624,6 +2634,8 @@
if (!udc_controller)
return -ENODEV;
+
+ usb_del_gadget_udc(&udc_controller->gadget);
udc_controller->done = &done;
fsl_udc_clk_release();
diff --git a/drivers/usb/gadget/fusb300_udc.c b/drivers/usb/gadget/fusb300_udc.c
index 763d462..9cf53c6 100644
--- a/drivers/usb/gadget/fusb300_udc.c
+++ b/drivers/usb/gadget/fusb300_udc.c
@@ -1500,7 +1500,7 @@
/*------------------------------------------------------------------------*/
static struct fusb300 *the_controller;
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int fusb300_udc_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct fusb300 *fusb300 = the_controller;
@@ -1544,9 +1544,8 @@
return retval;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
-int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+static int fusb300_udc_stop(struct usb_gadget_driver *driver)
{
struct fusb300 *fusb300 = the_controller;
@@ -1562,7 +1561,6 @@
return 0;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
/*--------------------------------------------------------------------------*/
static int fusb300_udc_pullup(struct usb_gadget *_gadget, int is_active)
@@ -1572,12 +1570,15 @@
static struct usb_gadget_ops fusb300_gadget_ops = {
.pullup = fusb300_udc_pullup,
+ .start = fusb300_udc_start,
+ .stop = fusb300_udc_stop,
};
static int __exit fusb300_remove(struct platform_device *pdev)
{
struct fusb300 *fusb300 = dev_get_drvdata(&pdev->dev);
+ usb_del_gadget_udc(&fusb300->gadget);
iounmap(fusb300->reg);
free_irq(platform_get_irq(pdev, 0), fusb300);
@@ -1702,9 +1703,15 @@
goto clean_up3;
init_controller(fusb300);
+ ret = usb_add_gadget_udc(&pdev->dev, &fusb300->gadget);
+ if (ret)
+ goto err_add_udc;
+
dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
return 0;
+err_add_udc:
+ fusb300_free_request(&fusb300->ep[0]->ep, fusb300->ep0_req);
clean_up3:
free_irq(ires->start, fusb300);
diff --git a/drivers/usb/gadget/g_ffs.c b/drivers/usb/gadget/g_ffs.c
index ebf6970..704c280 100644
--- a/drivers/usb/gadget/g_ffs.c
+++ b/drivers/usb/gadget/g_ffs.c
@@ -162,6 +162,7 @@
.name = DRIVER_NAME,
.dev = &gfs_dev_desc,
.strings = gfs_dev_strings,
+ .max_speed = USB_SPEED_HIGH,
.unbind = gfs_unbind,
.iProduct = DRIVER_DESC,
};
diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h
index da312d4..7a9d57d 100644
--- a/drivers/usb/gadget/gadget_chips.h
+++ b/drivers/usb/gadget/gadget_chips.h
@@ -120,6 +120,12 @@
#define gadget_is_ci13xxx_pci(g) 0
#endif
+#ifdef CONFIG_USB_GADGET_DWC3
+#define gadget_is_dwc3(g) (!strcmp("dwc3-gadget", (g)->name))
+#else
+#define gadget_is_dwc3(g) 0
+#endif
+
#ifdef CONFIG_USB_GADGET_MSM_72K
#define gadget_is_msm72k(g) !strcmp("msm72k_udc", (g)->name)
#else
@@ -240,6 +246,8 @@
return 0x31;
else if (gadget_is_ci13xxx_msm_hsic(gadget))
return 0x32;
+ else if (gadget_is_dwc3(gadget))
+ return 0x33;
return -ENOENT;
}
diff --git a/drivers/usb/gadget/gmidi.c b/drivers/usb/gadget/gmidi.c
index 47b86b9..8b9220e 100644
--- a/drivers/usb/gadget/gmidi.c
+++ b/drivers/usb/gadget/gmidi.c
@@ -537,14 +537,16 @@
struct usb_ep *ep;
unsigned i;
- err = usb_ep_enable(dev->in_ep, &bulk_in_desc);
+ dev->in_ep->desc = &bulk_in_desc;
+ err = usb_ep_enable(dev->in_ep);
if (err) {
ERROR(dev, "can't start %s: %d\n", dev->in_ep->name, err);
goto fail;
}
dev->in_ep->driver_data = dev;
- err = usb_ep_enable(dev->out_ep, &bulk_out_desc);
+ dev->out_ep->desc = &bulk_out_desc;
+ err = usb_ep_enable(dev->out_ep);
if (err) {
ERROR(dev, "can't start %s: %d\n", dev->out_ep->name, err);
goto fail;
@@ -693,6 +695,7 @@
switch (w_value >> 8) {
case USB_DT_DEVICE:
+ device_desc.bMaxPacketSize0 = gadget->ep0->maxpacket;
value = min(w_length, (u16) sizeof(device_desc));
memcpy(req->buf, &device_desc, value);
break;
@@ -1247,8 +1250,6 @@
dev->req->complete = gmidi_setup_complete;
- device_desc.bMaxPacketSize0 = gadget->ep0->maxpacket;
-
gadget->ep0->driver_data = dev;
INFO(dev, "%s, version: " DRIVER_VERSION "\n", longname);
diff --git a/drivers/usb/gadget/goku_udc.c b/drivers/usb/gadget/goku_udc.c
index bf6e11c..7f87805 100644
--- a/drivers/usb/gadget/goku_udc.c
+++ b/drivers/usb/gadget/goku_udc.c
@@ -996,8 +996,14 @@
return -EOPNOTSUPP;
}
+static int goku_start(struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *));
+static int goku_stop(struct usb_gadget_driver *driver);
+
static const struct usb_gadget_ops goku_ops = {
.get_frame = goku_get_frame,
+ .start = goku_start,
+ .stop = goku_stop,
// no remote wakeup
// not selfpowered
};
@@ -1344,7 +1350,7 @@
* disconnect is reported. then a host may connect again, or
* the driver might get unbound.
*/
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int goku_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct goku_udc *dev = the_controller;
@@ -1382,7 +1388,6 @@
DBG(dev, "registered gadget driver '%s'\n", driver->driver.name);
return 0;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
static void
stop_activity(struct goku_udc *dev, struct usb_gadget_driver *driver)
@@ -1408,7 +1413,7 @@
udc_enable(dev);
}
-int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+static int goku_stop(struct usb_gadget_driver *driver)
{
struct goku_udc *dev = the_controller;
unsigned long flags;
@@ -1429,8 +1434,6 @@
DBG(dev, "unregistered driver '%s'\n", driver->driver.name);
return 0;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
-
/*-------------------------------------------------------------------------*/
@@ -1730,6 +1733,8 @@
DBG(dev, "%s\n", __func__);
+ usb_del_gadget_udc(&dev->gadget);
+
BUG_ON(dev->driver);
#ifdef CONFIG_USB_GADGET_DEBUG_FILES
@@ -1854,6 +1859,10 @@
goto err;
}
dev->registered = 1;
+ retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget);
+ if (retval)
+ goto err;
+
return 0;
err:
diff --git a/drivers/usb/gadget/hid.c b/drivers/usb/gadget/hid.c
index 2523e54..9fb5750 100644
--- a/drivers/usb/gadget/hid.c
+++ b/drivers/usb/gadget/hid.c
@@ -255,6 +255,7 @@
.name = "g_hid",
.dev = &device_desc,
.strings = dev_strings,
+ .max_speed = USB_SPEED_HIGH,
.unbind = __exit_p(hid_unbind),
};
diff --git a/drivers/usb/gadget/imx_udc.c b/drivers/usb/gadget/imx_udc.c
index ade4006..692fd9b 100644
--- a/drivers/usb/gadget/imx_udc.c
+++ b/drivers/usb/gadget/imx_udc.c
@@ -1237,9 +1237,14 @@
*******************************************************************************
*/
+static int imx_udc_start(struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *));
+static int imx_udc_stop(struct usb_gadget_driver *driver);
static const struct usb_gadget_ops imx_udc_ops = {
.get_frame = imx_udc_get_frame,
.wakeup = imx_udc_wakeup,
+ .start = imx_udc_start,
+ .stop = imx_udc_stop,
};
static struct imx_udc_struct controller = {
@@ -1324,7 +1329,7 @@
* USB gadget driver functions
*******************************************************************************
*/
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int imx_udc_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct imx_udc_struct *imx_usb = &controller;
@@ -1368,9 +1373,8 @@
imx_usb->gadget.dev.driver = NULL;
return retval;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
-int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+static int imx_udc_stop(struct usb_gadget_driver *driver)
{
struct imx_udc_struct *imx_usb = &controller;
@@ -1394,7 +1398,6 @@
return 0;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
/*******************************************************************************
* Module functions
@@ -1504,8 +1507,14 @@
imx_usb->timer.function = handle_config;
imx_usb->timer.data = (unsigned long)imx_usb;
- return 0;
+ ret = usb_add_gadget_udc(&pdev->dev, &imx_usb->gadget);
+ if (ret)
+ goto fail4;
+ return 0;
+fail4:
+ for (i = 0; i < IMX_USB_NB_EP + 1; i++)
+ free_irq(imx_usb->usbd_int[i], imx_usb);
fail3:
clk_put(clk);
clk_disable(clk);
@@ -1525,6 +1534,7 @@
struct imxusb_platform_data *pdata = pdev->dev.platform_data;
int i;
+ usb_del_gadget_udc(&imx_usb->gadget);
imx_udc_disable(imx_usb);
del_timer(&imx_usb->timer);
diff --git a/drivers/usb/gadget/inode.c b/drivers/usb/gadget/inode.c
index a56876a..1b24099 100644
--- a/drivers/usb/gadget/inode.c
+++ b/drivers/usb/gadget/inode.c
@@ -832,14 +832,16 @@
switch (data->dev->gadget->speed) {
case USB_SPEED_LOW:
case USB_SPEED_FULL:
- value = usb_ep_enable (ep, &data->desc);
+ ep->desc = &data->desc;
+ value = usb_ep_enable(ep);
if (value == 0)
data->state = STATE_EP_ENABLED;
break;
#ifdef CONFIG_USB_GADGET_DUALSPEED
case USB_SPEED_HIGH:
/* fails if caller didn't provide that descriptor... */
- value = usb_ep_enable (ep, &data->hs_desc);
+ ep->desc = &data->hs_desc;
+ value = usb_ep_enable(ep);
if (value == 0)
data->state = STATE_EP_ENABLED;
break;
@@ -1345,7 +1347,7 @@
qual.bDeviceProtocol = desc->bDeviceProtocol;
/* assumes ep0 uses the same value for both speeds ... */
- qual.bMaxPacketSize0 = desc->bMaxPacketSize0;
+ qual.bMaxPacketSize0 = dev->gadget->ep0->maxpacket;
qual.bNumConfigurations = 1;
qual.bRESERVED = 0;
@@ -1402,7 +1404,6 @@
}
dev->state = STATE_DEV_CONNECTED;
- dev->dev->bMaxPacketSize0 = gadget->ep0->maxpacket;
INFO (dev, "connected\n");
event = next_event (dev, GADGETFS_CONNECT);
@@ -1430,6 +1431,7 @@
case USB_DT_DEVICE:
value = min (w_length, (u16) sizeof *dev->dev);
+ dev->dev->bMaxPacketSize0 = dev->gadget->ep0->maxpacket;
req->buf = dev->dev;
break;
#ifdef CONFIG_USB_GADGET_DUALSPEED
@@ -1710,7 +1712,6 @@
set_gadget_data (gadget, dev);
dev->gadget = gadget;
gadget->ep0->driver_data = dev;
- dev->dev->bMaxPacketSize0 = gadget->ep0->maxpacket;
/* preallocate control response and buffer */
dev->req = usb_ep_alloc_request (gadget->ep0, GFP_KERNEL);
diff --git a/drivers/usb/gadget/langwell_udc.c b/drivers/usb/gadget/langwell_udc.c
index 9cee88a..d8403ae 100644
--- a/drivers/usb/gadget/langwell_udc.c
+++ b/drivers/usb/gadget/langwell_udc.c
@@ -1321,7 +1321,9 @@
return 0;
}
-
+static int langwell_start(struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *));
+static int langwell_stop(struct usb_gadget_driver *driver);
/* device controller usb_gadget_ops structure */
static const struct usb_gadget_ops langwell_ops = {
@@ -1342,6 +1344,9 @@
/* D+ pullup, software-controlled connect/disconnect to USB host */
.pullup = langwell_pullup,
+
+ .start = langwell_start,
+ .stop = langwell_stop,
};
@@ -1852,7 +1857,7 @@
* the driver might get unbound.
*/
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int langwell_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct langwell_udc *dev = the_controller;
@@ -1914,11 +1919,9 @@
dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
return retval;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
-
/* unregister gadget driver */
-int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+static int langwell_stop(struct usb_gadget_driver *driver)
{
struct langwell_udc *dev = the_controller;
unsigned long flags;
@@ -1965,8 +1968,6 @@
dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
return 0;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
-
/*-------------------------------------------------------------------------*/
@@ -3373,6 +3374,10 @@
if (retval)
goto error;
+ retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget);
+ if (retval)
+ goto error;
+
retval = device_create_file(&pdev->dev, &dev_attr_langwell_udc);
if (retval)
goto error;
@@ -3403,6 +3408,7 @@
dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
+ usb_del_gadget_udc(&dev->gadget);
/* disable interrupt and set controller to stop state */
langwell_udc_stop(dev);
diff --git a/drivers/usb/gadget/m66592-udc.c b/drivers/usb/gadget/m66592-udc.c
index 084aa08..11d3782 100644
--- a/drivers/usb/gadget/m66592-udc.c
+++ b/drivers/usb/gadget/m66592-udc.c
@@ -1454,7 +1454,7 @@
/*-------------------------------------------------------------------------*/
static struct m66592 *the_controller;
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int m66592_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct m66592 *m66592 = the_controller;
@@ -1506,9 +1506,8 @@
return retval;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
-int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+static int m66592_stop(struct usb_gadget_driver *driver)
{
struct m66592 *m66592 = the_controller;
unsigned long flags;
@@ -1533,7 +1532,6 @@
m66592->driver = NULL;
return 0;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
/*-------------------------------------------------------------------------*/
static int m66592_get_frame(struct usb_gadget *_gadget)
@@ -1544,12 +1542,16 @@
static struct usb_gadget_ops m66592_gadget_ops = {
.get_frame = m66592_get_frame,
+ .start = m66592_start,
+ .stop = m66592_stop,
};
static int __exit m66592_remove(struct platform_device *pdev)
{
struct m66592 *m66592 = dev_get_drvdata(&pdev->dev);
+ usb_del_gadget_udc(&m66592->gadget);
+
del_timer_sync(&m66592->timer);
iounmap(m66592->reg);
free_irq(platform_get_irq(pdev, 0), m66592);
@@ -1691,9 +1693,16 @@
init_controller(m66592);
+ ret = usb_add_gadget_udc(&pdev->dev, &m66592->gadget);
+ if (ret)
+ goto err_add_udc;
+
dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
return 0;
+err_add_udc:
+ m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req);
+
clean_up3:
#ifdef CONFIG_HAVE_CLK
if (m66592->pdata->on_chip) {
diff --git a/drivers/usb/gadget/mass_storage.c b/drivers/usb/gadget/mass_storage.c
index 0182242..1b2d135 100644
--- a/drivers/usb/gadget/mass_storage.c
+++ b/drivers/usb/gadget/mass_storage.c
@@ -169,6 +169,7 @@
.name = "g_mass_storage",
.dev = &msg_device_desc,
.iProduct = DRIVER_DESC,
+ .max_speed = USB_SPEED_SUPER,
.needs_serial = 1,
};
diff --git a/drivers/usb/gadget/msm72k_udc.c b/drivers/usb/gadget/msm72k_udc.c
index ea62262..28e217b 100644
--- a/drivers/usb/gadget/msm72k_udc.c
+++ b/drivers/usb/gadget/msm72k_udc.c
@@ -1453,7 +1453,10 @@
static int usb_free(struct usb_info *ui, int ret)
{
- dev_dbg(&ui->pdev->dev, "usb_free(%d)\n", ret);
+ if (ret)
+ dev_dbg(&ui->pdev->dev, "usb_free(%d)\n", ret);
+
+ usb_del_gadget_udc(&ui->gadget);
if (ui->xceiv)
otg_put_transceiver(ui->xceiv);
@@ -2385,6 +2388,11 @@
}
+static int msm72k_gadget_start(struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *));
+static int msm72k_gadget_stop(struct usb_gadget_driver *driver);
+
+
static const struct usb_gadget_ops msm72k_ops = {
.get_frame = msm72k_get_frame,
.vbus_session = msm72k_udc_vbus_session,
@@ -2392,6 +2400,8 @@
.pullup = msm72k_pullup,
.wakeup = msm72k_wakeup,
.set_selfpowered = msm72k_set_selfpowered,
+ .start = msm72k_gadget_start,
+ .stop = msm72k_gadget_stop
};
static void usb_do_remote_wakeup(struct work_struct *w)
@@ -2585,6 +2595,10 @@
ui->gadget.is_otg = 1;
#endif
+ retval = usb_add_gadget_udc(&pdev->dev, &ui->gadget);
+ if (retval)
+ return usb_free(ui, retval);
+
ui->sdev.name = DRIVER_NAME;
ui->sdev.print_name = print_switch_name;
ui->sdev.print_state = print_switch_state;
@@ -2629,7 +2643,7 @@
return 0;
}
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int msm72k_gadget_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct usb_info *ui = the_usb_info;
@@ -2715,9 +2729,8 @@
ui->gadget.dev.driver = NULL;
return retval;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
-int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+static int msm72k_gadget_stop(struct usb_gadget_driver *driver)
{
struct usb_info *dev = the_usb_info;
@@ -2754,7 +2767,6 @@
"unregistered gadget driver '%s'\n", driver->driver.name);
return 0;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
static int msm72k_udc_runtime_suspend(struct device *dev)
@@ -2781,8 +2793,16 @@
.runtime_idle = msm72k_udc_runtime_idle
};
+static int __exit msm72k_remove(struct platform_device *pdev)
+{
+ struct usb_info *ui = container_of(&pdev, struct usb_info, pdev);
+
+ return usb_free(ui, 0);
+}
+
static struct platform_driver usb_driver = {
.probe = msm72k_probe,
+ .remove = msm72k_remove,
.driver = { .name = "msm_hsusb",
.pm = &msm72k_udc_dev_pm_ops, },
};
diff --git a/drivers/usb/gadget/multi.c b/drivers/usb/gadget/multi.c
index d9feced..8c7b747 100644
--- a/drivers/usb/gadget/multi.c
+++ b/drivers/usb/gadget/multi.c
@@ -351,6 +351,7 @@
.name = "g_multi",
.dev = &device_desc,
.strings = dev_strings,
+ .max_speed = USB_SPEED_HIGH,
.unbind = __exit_p(multi_unbind),
.iProduct = DRIVER_DESC,
.needs_serial = 1,
diff --git a/drivers/usb/gadget/mv_udc_core.c b/drivers/usb/gadget/mv_udc_core.c
index b1a8146..6adf38c 100644
--- a/drivers/usb/gadget/mv_udc_core.c
+++ b/drivers/usb/gadget/mv_udc_core.c
@@ -1128,6 +1128,9 @@
return 0;
}
+static int mv_udc_start(struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *));
+static int mv_udc_stop(struct usb_gadget_driver *driver);
/* device controller usb_gadget_ops structure */
static const struct usb_gadget_ops mv_ops = {
@@ -1139,6 +1142,8 @@
/* D+ pullup, software-controlled connect/disconnect to USB host */
.pullup = mv_udc_pullup,
+ .start = mv_udc_start,
+ .stop = mv_udc_stop,
};
static void mv_udc_testmode(struct mv_udc *udc, u16 index, bool enter)
@@ -1230,7 +1235,7 @@
}
}
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int mv_udc_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct mv_udc *udc = the_controller;
@@ -1270,9 +1275,8 @@
return 0;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
-int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+static int mv_udc_stop(struct usb_gadget_driver *driver)
{
struct mv_udc *udc = the_controller;
unsigned long flags;
@@ -1296,7 +1300,6 @@
return 0;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
static int
udc_prime_status(struct mv_udc *udc, u8 direction, u16 status, bool empty)
@@ -1880,9 +1883,10 @@
static int mv_udc_remove(struct platform_device *dev)
{
struct mv_udc *udc = the_controller;
-
DECLARE_COMPLETION(done);
+ usb_del_gadget_udc(&udc->gadget);
+
udc->done = &done;
/* free memory allocated in probe */
@@ -2074,11 +2078,12 @@
the_controller = udc;
- goto out;
+ retval = usb_add_gadget_udc(&dev->dev, &udc->gadget);
+ if (!retval)
+ return retval;
error:
if (udc)
mv_udc_remove(udc->dev);
-out:
return retval;
}
diff --git a/drivers/usb/gadget/ncm.c b/drivers/usb/gadget/ncm.c
index 99c179a..62ee508 100644
--- a/drivers/usb/gadget/ncm.c
+++ b/drivers/usb/gadget/ncm.c
@@ -228,6 +228,7 @@
.name = "g_ncm",
.dev = &device_desc,
.strings = dev_strings,
+ .max_speed = USB_SPEED_HIGH,
.unbind = __exit_p(gncm_unbind),
};
diff --git a/drivers/usb/gadget/net2280.c b/drivers/usb/gadget/net2280.c
index 476d88e..1e6ea6f 100644
--- a/drivers/usb/gadget/net2280.c
+++ b/drivers/usb/gadget/net2280.c
@@ -1410,11 +1410,17 @@
return 0;
}
+static int net2280_start(struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *));
+static int net2280_stop(struct usb_gadget_driver *driver);
+
static const struct usb_gadget_ops net2280_ops = {
.get_frame = net2280_get_frame,
.wakeup = net2280_wakeup,
.set_selfpowered = net2280_set_selfpowered,
.pullup = net2280_pullup,
+ .start = net2280_start,
+ .stop = net2280_stop,
};
/*-------------------------------------------------------------------------*/
@@ -1930,7 +1936,7 @@
* disconnect is reported. then a host may connect again, or
* the driver might get unbound.
*/
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int net2280_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct net2280 *dev = the_controller;
@@ -1994,7 +2000,6 @@
dev->driver = NULL;
return retval;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
static void
stop_activity (struct net2280 *dev, struct usb_gadget_driver *driver)
@@ -2022,7 +2027,7 @@
usb_reinit (dev);
}
-int usb_gadget_unregister_driver (struct usb_gadget_driver *driver)
+static int net2280_stop(struct usb_gadget_driver *driver)
{
struct net2280 *dev = the_controller;
unsigned long flags;
@@ -2049,8 +2054,6 @@
DEBUG (dev, "unregistered driver '%s'\n", driver->driver.name);
return 0;
}
-EXPORT_SYMBOL (usb_gadget_unregister_driver);
-
/*-------------------------------------------------------------------------*/
@@ -2732,6 +2735,8 @@
{
struct net2280 *dev = pci_get_drvdata (pdev);
+ usb_del_gadget_udc(&dev->gadget);
+
BUG_ON(dev->driver);
/* then clean up the resources we allocated during probe() */
@@ -2916,6 +2921,9 @@
retval = device_create_file (&pdev->dev, &dev_attr_registers);
if (retval) goto done;
+ retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget);
+ if (retval)
+ goto done;
return 0;
done:
diff --git a/drivers/usb/gadget/nokia.c b/drivers/usb/gadget/nokia.c
index 55ca63a..c7fb772 100644
--- a/drivers/usb/gadget/nokia.c
+++ b/drivers/usb/gadget/nokia.c
@@ -241,6 +241,7 @@
.name = "g_nokia",
.dev = &device_desc,
.strings = dev_strings,
+ .max_speed = USB_SPEED_HIGH,
.unbind = __exit_p(nokia_unbind),
};
diff --git a/drivers/usb/gadget/omap_udc.c b/drivers/usb/gadget/omap_udc.c
index 82fd249..740c7da 100644
--- a/drivers/usb/gadget/omap_udc.c
+++ b/drivers/usb/gadget/omap_udc.c
@@ -1375,6 +1375,10 @@
return 0;
}
+static int omap_udc_start(struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *));
+static int omap_udc_stop(struct usb_gadget_driver *driver);
+
static struct usb_gadget_ops omap_gadget_ops = {
.get_frame = omap_get_frame,
.wakeup = omap_wakeup,
@@ -1382,6 +1386,8 @@
.vbus_session = omap_vbus_session,
.vbus_draw = omap_vbus_draw,
.pullup = omap_pullup,
+ .start = omap_udc_start,
+ .stop = omap_udc_stop,
};
/*-------------------------------------------------------------------------*/
@@ -2102,7 +2108,7 @@
);
}
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int omap_udc_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
int status = -ENODEV;
@@ -2186,9 +2192,8 @@
omap_udc_enable_clock(0);
return status;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
-int usb_gadget_unregister_driver (struct usb_gadget_driver *driver)
+static int omap_udc_stop(struct usb_gadget_driver *driver)
{
unsigned long flags;
int status = -ENODEV;
@@ -2222,8 +2227,6 @@
DBG("unregistered driver '%s'\n", driver->driver.name);
return status;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
-
/*-------------------------------------------------------------------------*/
@@ -2991,9 +2994,16 @@
create_proc_file();
status = device_add(&udc->gadget.dev);
+ if (status)
+ goto cleanup4;
+
+ status = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
if (!status)
return status;
/* If fail, fall through */
+cleanup4:
+ remove_proc_file();
+
#ifdef USE_ISO
cleanup3:
free_irq(pdev->resource[2].start, udc);
@@ -3029,6 +3039,8 @@
if (!udc)
return -ENODEV;
+
+ usb_del_gadget_udc(&udc->gadget);
if (udc->driver)
return -EBUSY;
diff --git a/drivers/usb/gadget/pch_udc.c b/drivers/usb/gadget/pch_udc.c
index 68dbcc3..f96615a 100644
--- a/drivers/usb/gadget/pch_udc.c
+++ b/drivers/usb/gadget/pch_udc.c
@@ -1176,6 +1176,9 @@
return -EOPNOTSUPP;
}
+static int pch_udc_start(struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *));
+static int pch_udc_stop(struct usb_gadget_driver *driver);
static const struct usb_gadget_ops pch_udc_ops = {
.get_frame = pch_udc_pcd_get_frame,
.wakeup = pch_udc_pcd_wakeup,
@@ -1183,6 +1186,8 @@
.pullup = pch_udc_pcd_pullup,
.vbus_session = pch_udc_pcd_vbus_session,
.vbus_draw = pch_udc_pcd_vbus_draw,
+ .start = pch_udc_start,
+ .stop = pch_udc_stop,
};
/**
@@ -2690,7 +2695,7 @@
return 0;
}
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int pch_udc_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct pch_udc_dev *dev = pch_udc;
@@ -2733,9 +2738,8 @@
dev->connected = 1;
return 0;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
-int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+static int pch_udc_stop(struct usb_gadget_driver *driver)
{
struct pch_udc_dev *dev = pch_udc;
@@ -2761,7 +2765,6 @@
pch_udc_set_disconnect(dev);
return 0;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
static void pch_udc_shutdown(struct pci_dev *pdev)
{
@@ -2778,6 +2781,8 @@
{
struct pch_udc_dev *dev = pci_get_drvdata(pdev);
+ usb_del_gadget_udc(&dev->gadget);
+
/* gadget driver must not be registered */
if (dev->driver)
dev_err(&pdev->dev,
@@ -2953,6 +2958,9 @@
/* Put the device in disconnected state till a driver is bound */
pch_udc_set_disconnect(dev);
+ retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget);
+ if (retval)
+ goto finished;
return 0;
finished:
diff --git a/drivers/usb/gadget/printer.c b/drivers/usb/gadget/printer.c
index 271ef94..d5df8dd 100644
--- a/drivers/usb/gadget/printer.c
+++ b/drivers/usb/gadget/printer.c
@@ -89,8 +89,7 @@
u8 config;
s8 interface;
struct usb_ep *in_ep, *out_ep;
- const struct usb_endpoint_descriptor
- *in, *out;
+
struct list_head rx_reqs; /* List of free RX structs */
struct list_head rx_reqs_active; /* List of Active RX xfers */
struct list_head rx_buffers; /* List of completed xfers */
@@ -895,19 +894,20 @@
{
int result = 0;
- dev->in = ep_desc(dev->gadget, &hs_ep_in_desc, &fs_ep_in_desc);
+ dev->in_ep->desc = ep_desc(dev->gadget, &hs_ep_in_desc, &fs_ep_in_desc);
dev->in_ep->driver_data = dev;
- dev->out = ep_desc(dev->gadget, &hs_ep_out_desc, &fs_ep_out_desc);
+ dev->out_ep->desc = ep_desc(dev->gadget, &hs_ep_out_desc,
+ &fs_ep_out_desc);
dev->out_ep->driver_data = dev;
- result = usb_ep_enable(dev->in_ep, dev->in);
+ result = usb_ep_enable(dev->in_ep);
if (result != 0) {
DBG(dev, "enable %s --> %d\n", dev->in_ep->name, result);
goto done;
}
- result = usb_ep_enable(dev->out_ep, dev->out);
+ result = usb_ep_enable(dev->out_ep);
if (result != 0) {
DBG(dev, "enable %s --> %d\n", dev->in_ep->name, result);
goto done;
@@ -918,8 +918,8 @@
if (result != 0) {
(void) usb_ep_disable(dev->in_ep);
(void) usb_ep_disable(dev->out_ep);
- dev->in = NULL;
- dev->out = NULL;
+ dev->in_ep->desc = NULL;
+ dev->out_ep->desc = NULL;
}
/* caller is responsible for cleanup on error */
@@ -933,12 +933,14 @@
DBG(dev, "%s\n", __func__);
- if (dev->in)
+ if (dev->in_ep->desc)
usb_ep_disable(dev->in_ep);
- if (dev->out)
+ if (dev->out_ep->desc)
usb_ep_disable(dev->out_ep);
+ dev->in_ep->desc = NULL;
+ dev->out_ep->desc = NULL;
dev->interface = -1;
}
@@ -1104,9 +1106,9 @@
list_add(&req->list, &dev->tx_reqs);
}
- if (usb_ep_enable(dev->in_ep, dev->in))
+ if (usb_ep_enable(dev->in_ep))
DBG(dev, "Failed to enable USB in_ep\n");
- if (usb_ep_enable(dev->out_ep, dev->out))
+ if (usb_ep_enable(dev->out_ep))
DBG(dev, "Failed to enable USB out_ep\n");
wake_up_interruptible(&dev->rx_wait);
@@ -1146,6 +1148,8 @@
switch (wValue >> 8) {
case USB_DT_DEVICE:
+ device_desc.bMaxPacketSize0 =
+ gadget->ep0->maxpacket;
value = min(wLength, (u16) sizeof device_desc);
memcpy(req->buf, &device_desc, value);
break;
@@ -1153,6 +1157,12 @@
case USB_DT_DEVICE_QUALIFIER:
if (!gadget->is_dualspeed)
break;
+ /*
+ * assumes ep0 uses the same value for both
+ * speeds
+ */
+ dev_qualifier.bMaxPacketSize0 =
+ gadget->ep0->maxpacket;
value = min(wLength,
(u16) sizeof dev_qualifier);
memcpy(req->buf, &dev_qualifier, value);
@@ -1448,15 +1458,11 @@
out_ep->driver_data = out_ep; /* claim */
#ifdef CONFIG_USB_GADGET_DUALSPEED
- /* assumes ep0 uses the same value for both speeds ... */
- dev_qualifier.bMaxPacketSize0 = device_desc.bMaxPacketSize0;
-
- /* and that all endpoints are dual-speed */
+ /* assumes that all endpoints are dual-speed */
hs_ep_in_desc.bEndpointAddress = fs_ep_in_desc.bEndpointAddress;
hs_ep_out_desc.bEndpointAddress = fs_ep_out_desc.bEndpointAddress;
#endif /* DUALSPEED */
- device_desc.bMaxPacketSize0 = gadget->ep0->maxpacket;
usb_gadget_set_selfpowered(gadget);
if (gadget->is_otg) {
diff --git a/drivers/usb/gadget/pxa25x_udc.c b/drivers/usb/gadget/pxa25x_udc.c
index 7745454..e4e59b4 100644
--- a/drivers/usb/gadget/pxa25x_udc.c
+++ b/drivers/usb/gadget/pxa25x_udc.c
@@ -1011,12 +1011,18 @@
return -EOPNOTSUPP;
}
+static int pxa25x_start(struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *));
+static int pxa25x_stop(struct usb_gadget_driver *driver);
+
static const struct usb_gadget_ops pxa25x_udc_ops = {
.get_frame = pxa25x_udc_get_frame,
.wakeup = pxa25x_udc_wakeup,
.vbus_session = pxa25x_udc_vbus_session,
.pullup = pxa25x_udc_pullup,
.vbus_draw = pxa25x_udc_vbus_draw,
+ .start = pxa25x_start,
+ .stop = pxa25x_stop,
};
/*-------------------------------------------------------------------------*/
@@ -1263,7 +1269,7 @@
* disconnect is reported. then a host may connect again, or
* the driver might get unbound.
*/
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int pxa25x_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct pxa25x_udc *dev = the_controller;
@@ -1322,7 +1328,6 @@
bind_fail:
return retval;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
static void
stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)
@@ -1351,7 +1356,7 @@
udc_reinit(dev);
}
-int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+static int pxa25x_stop(struct usb_gadget_driver *driver)
{
struct pxa25x_udc *dev = the_controller;
@@ -1379,8 +1384,6 @@
dump_state(dev);
return 0;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
-
/*-------------------------------------------------------------------------*/
@@ -2231,8 +2234,11 @@
#endif
create_debug_files(dev);
- return 0;
+ retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget);
+ if (!retval)
+ return retval;
+ remove_debug_files(dev);
#ifdef CONFIG_ARCH_LUBBOCK
lubbock_fail0:
free_irq(LUBBOCK_USB_DISC_IRQ, dev);
@@ -2261,6 +2267,7 @@
{
struct pxa25x_udc *dev = platform_get_drvdata(pdev);
+ usb_del_gadget_udc(&dev->gadget);
if (dev->driver)
return -EBUSY;
diff --git a/drivers/usb/gadget/pxa27x_udc.c b/drivers/usb/gadget/pxa27x_udc.c
index 5760769..85b68c7 100644
--- a/drivers/usb/gadget/pxa27x_udc.c
+++ b/drivers/usb/gadget/pxa27x_udc.c
@@ -1680,12 +1680,18 @@
return -EOPNOTSUPP;
}
+static int pxa27x_udc_start(struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *));
+static int pxa27x_udc_stop(struct usb_gadget_driver *driver);
+
static const struct usb_gadget_ops pxa_udc_ops = {
.get_frame = pxa_udc_get_frame,
.wakeup = pxa_udc_wakeup,
.pullup = pxa_udc_pullup,
.vbus_session = pxa_udc_vbus_session,
.vbus_draw = pxa_udc_vbus_draw,
+ .start = pxa27x_udc_start,
+ .stop = pxa27x_udc_stop,
};
/**
@@ -1791,7 +1797,7 @@
}
/**
- * usb_gadget_probe_driver - Register gadget driver
+ * pxa27x_start - Register gadget driver
* @driver: gadget driver
* @bind: bind function
*
@@ -1805,7 +1811,7 @@
*
* Returns 0 if no error, -EINVAL, -ENODEV, -EBUSY otherwise
*/
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int pxa27x_udc_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct pxa_udc *udc = the_controller;
@@ -1860,8 +1866,6 @@
udc->gadget.dev.driver = NULL;
return retval;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
-
/**
* stop_activity - Stops udc endpoints
@@ -1888,12 +1892,12 @@
}
/**
- * usb_gadget_unregister_driver - Unregister the gadget driver
+ * pxa27x_udc_stop - Unregister the gadget driver
* @driver: gadget driver
*
* Returns 0 if no error, -ENODEV, -EINVAL otherwise
*/
-int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+static int pxa27x_udc_stop(struct usb_gadget_driver *driver)
{
struct pxa_udc *udc = the_controller;
@@ -1917,7 +1921,6 @@
return otg_set_peripheral(udc->transceiver, NULL);
return 0;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
/**
* handle_ep0_ctrl_req - handle control endpoint control request
@@ -2516,9 +2519,14 @@
driver_name, IRQ_USB, retval);
goto err_irq;
}
+ retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
+ if (retval)
+ goto err_add_udc;
pxa_init_debugfs(udc);
return 0;
+err_add_udc:
+ free_irq(udc->irq, udc);
err_irq:
iounmap(udc->regs);
err_map:
@@ -2537,6 +2545,7 @@
struct pxa_udc *udc = platform_get_drvdata(_dev);
int gpio = udc->mach->gpio_pullup;
+ usb_del_gadget_udc(&udc->gadget);
usb_gadget_unregister_driver(udc->driver);
free_irq(udc->irq, udc);
pxa_cleanup_debugfs(udc);
diff --git a/drivers/usb/gadget/r8a66597-udc.c b/drivers/usb/gadget/r8a66597-udc.c
index 6dcc1f6..51b655f 100644
--- a/drivers/usb/gadget/r8a66597-udc.c
+++ b/drivers/usb/gadget/r8a66597-udc.c
@@ -1410,7 +1410,7 @@
/*-------------------------------------------------------------------------*/
static struct r8a66597 *the_controller;
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int r8a66597_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct r8a66597 *r8a66597 = the_controller;
@@ -1462,9 +1462,8 @@
return retval;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
-int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+static int r8a66597_stop(struct usb_gadget_driver *driver)
{
struct r8a66597 *r8a66597 = the_controller;
unsigned long flags;
@@ -1488,7 +1487,6 @@
r8a66597->driver = NULL;
return 0;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
/*-------------------------------------------------------------------------*/
static int r8a66597_get_frame(struct usb_gadget *_gadget)
@@ -1499,12 +1497,15 @@
static struct usb_gadget_ops r8a66597_gadget_ops = {
.get_frame = r8a66597_get_frame,
+ .start = r8a66597_start,
+ .stop = r8a66597_stop,
};
static int __exit r8a66597_remove(struct platform_device *pdev)
{
struct r8a66597 *r8a66597 = dev_get_drvdata(&pdev->dev);
+ usb_del_gadget_udc(&r8a66597->gadget);
del_timer_sync(&r8a66597->timer);
iounmap(r8a66597->reg);
free_irq(platform_get_irq(pdev, 0), r8a66597);
@@ -1647,9 +1648,15 @@
init_controller(r8a66597);
+ ret = usb_add_gadget_udc(&pdev->dev, &r8a66597->gadget);
+ if (ret)
+ goto err_add_udc;
+
dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
return 0;
+err_add_udc:
+ r8a66597_free_request(&r8a66597->ep[0].ep, r8a66597->ep0_req);
clean_up3:
free_irq(irq, r8a66597);
clean_up2:
diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c
index 0dfee28..8bdee67 100644
--- a/drivers/usb/gadget/s3c-hsotg.c
+++ b/drivers/usb/gadget/s3c-hsotg.c
@@ -2574,7 +2574,7 @@
return 0;
}
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int s3c_hsotg_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct s3c_hsotg *hsotg = our_hsotg;
@@ -2745,9 +2745,8 @@
hsotg->gadget.dev.driver = NULL;
return ret;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
-int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+static int s3c_hsotg_stop(struct usb_gadget_driver *driver)
{
struct s3c_hsotg *hsotg = our_hsotg;
int ep;
@@ -2775,7 +2774,6 @@
return 0;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
static int s3c_hsotg_gadget_getframe(struct usb_gadget *gadget)
{
@@ -2784,6 +2782,8 @@
static struct usb_gadget_ops s3c_hsotg_gadget_ops = {
.get_frame = s3c_hsotg_gadget_getframe,
+ .start = s3c_hsotg_start,
+ .stop = s3c_hsotg_stop,
};
/**
@@ -3403,6 +3403,10 @@
for (epnum = 0; epnum < S3C_HSOTG_EPS; epnum++)
s3c_hsotg_initep(hsotg, &hsotg->eps[epnum], epnum);
+ ret = usb_add_gadget_udc(&pdev->dev, &hsotg->gadget);
+ if (ret)
+ goto err_add_udc;
+
s3c_hsotg_create_debug(hsotg);
s3c_hsotg_dump(hsotg);
@@ -3410,6 +3414,11 @@
our_hsotg = hsotg;
return 0;
+err_add_udc:
+ s3c_hsotg_gate(pdev, false);
+ clk_disable(hsotg->clk);
+ clk_put(hsotg->clk);
+
err_regs:
iounmap(hsotg->regs);
@@ -3427,6 +3436,8 @@
{
struct s3c_hsotg *hsotg = platform_get_drvdata(pdev);
+ usb_del_gadget_udc(&hsotg->gadget);
+
s3c_hsotg_delete_debug(hsotg);
usb_gadget_unregister_driver(hsotg->driver);
diff --git a/drivers/usb/gadget/s3c-hsudc.c b/drivers/usb/gadget/s3c-hsudc.c
index d5e3e1e..dc9f428 100644
--- a/drivers/usb/gadget/s3c-hsudc.c
+++ b/drivers/usb/gadget/s3c-hsudc.c
@@ -1133,7 +1133,7 @@
return IRQ_HANDLED;
}
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int s3c_hsudc_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct s3c_hsudc *hsudc = the_controller;
@@ -1181,9 +1181,8 @@
return 0;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
-int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+static int s3c_hsudc_stop(struct usb_gadget_driver *driver)
{
struct s3c_hsudc *hsudc = the_controller;
unsigned long flags;
@@ -1210,7 +1209,6 @@
driver->driver.name);
return 0;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
static inline u32 s3c_hsudc_read_frameno(struct s3c_hsudc *hsudc)
{
@@ -1224,6 +1222,8 @@
static struct usb_gadget_ops s3c_hsudc_gadget_ops = {
.get_frame = s3c_hsudc_gadget_getframe,
+ .start = s3c_hsudc_start,
+ .stop = s3c_hsudc_stop,
};
static int s3c_hsudc_probe(struct platform_device *pdev)
@@ -1311,7 +1311,15 @@
disable_irq(hsudc->irq);
local_irq_enable();
+
+ ret = usb_add_gadget_udc(&pdev->dev, &hsudc->gadget);
+ if (ret)
+ goto err_add_udc;
+
return 0;
+err_add_udc:
+ clk_disable(hsudc->uclk);
+ clk_put(hsudc->uclk);
err_clk:
free_irq(hsudc->irq, hsudc);
err_irq:
diff --git a/drivers/usb/gadget/s3c2410_udc.c b/drivers/usb/gadget/s3c2410_udc.c
index 100f263..1c19cd3 100644
--- a/drivers/usb/gadget/s3c2410_udc.c
+++ b/drivers/usb/gadget/s3c2410_udc.c
@@ -1552,6 +1552,10 @@
return -ENOTSUPP;
}
+static int s3c2410_udc_start(struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *));
+static int s3c2410_udc_stop(struct usb_gadget_driver *driver);
+
static const struct usb_gadget_ops s3c2410_ops = {
.get_frame = s3c2410_udc_get_frame,
.wakeup = s3c2410_udc_wakeup,
@@ -1559,6 +1563,8 @@
.pullup = s3c2410_udc_pullup,
.vbus_session = s3c2410_udc_vbus_session,
.vbus_draw = s3c2410_vbus_draw,
+ .start = s3c2410_udc_start,
+ .stop = s3c2410_udc_stop,
};
static void s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd)
@@ -1672,10 +1678,7 @@
s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
}
-/*
- * usb_gadget_probe_driver
- */
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int s3c2410_udc_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct s3c2410_udc *udc = the_controller;
@@ -1730,12 +1733,8 @@
udc->gadget.dev.driver = NULL;
return retval;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
-/*
- * usb_gadget_unregister_driver
- */
-int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+static int s3c2410_udc_stop(struct usb_gadget_driver *driver)
{
struct s3c2410_udc *udc = the_controller;
@@ -1955,6 +1954,10 @@
goto err_vbus_irq;
}
+ retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
+ if (retval)
+ goto err_add_udc;
+
if (s3c2410_udc_debugfs_root) {
udc->regs_info = debugfs_create_file("registers", S_IRUGO,
s3c2410_udc_debugfs_root,
@@ -1967,6 +1970,10 @@
return 0;
+err_add_udc:
+ if (udc_info && !udc_info->udc_command &&
+ gpio_is_valid(udc_info->pullup_pin))
+ gpio_free(udc_info->pullup_pin);
err_vbus_irq:
if (udc_info && udc_info->vbus_pin > 0)
free_irq(gpio_to_irq(udc_info->vbus_pin), udc);
@@ -1992,6 +1999,8 @@
unsigned int irq;
dev_dbg(&pdev->dev, "%s()\n", __func__);
+
+ usb_del_gadget_udc(&udc->gadget);
if (udc->driver)
return -EBUSY;
@@ -2105,8 +2114,6 @@
debugfs_remove(s3c2410_udc_debugfs_root);
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
-
module_init(udc_init);
module_exit(udc_exit);
diff --git a/drivers/usb/gadget/serial.c b/drivers/usb/gadget/serial.c
index 1ac57a9..ed1b816 100644
--- a/drivers/usb/gadget/serial.c
+++ b/drivers/usb/gadget/serial.c
@@ -242,6 +242,7 @@
.name = "g_serial",
.dev = &device_desc,
.strings = dev_strings,
+ .max_speed = USB_SPEED_HIGH,
};
static int __init init(void)
diff --git a/drivers/usb/gadget/storage_common.c b/drivers/usb/gadget/storage_common.c
index 1505967..43a54f1 100644
--- a/drivers/usb/gadget/storage_common.c
+++ b/drivers/usb/gadget/storage_common.c
@@ -247,6 +247,8 @@
u32 sense_data_info;
u32 unit_attention_data;
+ unsigned int blkbits; /* Bits of logical block size of bound block device */
+ unsigned int blksize; /* logical block size of bound block device */
struct device dev;
#ifdef CONFIG_USB_MSC_PROFILING
spinlock_t lock;
@@ -509,12 +511,128 @@
NULL,
};
+static struct usb_endpoint_descriptor
+fsg_ss_bulk_in_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+
+ /* bEndpointAddress copied from fs_bulk_in_desc during fsg_bind() */
+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
+ .wMaxPacketSize = cpu_to_le16(1024),
+};
+
+static struct usb_ss_ep_comp_descriptor fsg_ss_bulk_in_comp_desc = {
+ .bLength = sizeof(fsg_ss_bulk_in_comp_desc),
+ .bDescriptorType = USB_DT_SS_ENDPOINT_COMP,
+
+ /*.bMaxBurst = DYNAMIC, */
+};
+
+static struct usb_endpoint_descriptor
+fsg_ss_bulk_out_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+
+ /* bEndpointAddress copied from fs_bulk_out_desc during fsg_bind() */
+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
+ .wMaxPacketSize = cpu_to_le16(1024),
+};
+
+static struct usb_ss_ep_comp_descriptor fsg_ss_bulk_out_comp_desc = {
+ .bLength = sizeof(fsg_ss_bulk_in_comp_desc),
+ .bDescriptorType = USB_DT_SS_ENDPOINT_COMP,
+
+ /*.bMaxBurst = DYNAMIC, */
+};
+
+#ifndef FSG_NO_INTR_EP
+
+static struct usb_endpoint_descriptor
+fsg_ss_intr_in_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+
+ /* bEndpointAddress copied from fs_intr_in_desc during fsg_bind() */
+ .bmAttributes = USB_ENDPOINT_XFER_INT,
+ .wMaxPacketSize = cpu_to_le16(2),
+ .bInterval = 9, /* 2**(9-1) = 256 uframes -> 32 ms */
+};
+
+static struct usb_ss_ep_comp_descriptor fsg_ss_intr_in_comp_desc = {
+ .bLength = sizeof(fsg_ss_bulk_in_comp_desc),
+ .bDescriptorType = USB_DT_SS_ENDPOINT_COMP,
+
+ .wBytesPerInterval = cpu_to_le16(2),
+};
+
+#ifndef FSG_NO_OTG
+# define FSG_SS_FUNCTION_PRE_EP_ENTRIES 2
+#else
+# define FSG_SS_FUNCTION_PRE_EP_ENTRIES 1
+#endif
+
+#endif
+
+static __maybe_unused struct usb_ext_cap_descriptor fsg_ext_cap_desc = {
+ .bLength = USB_DT_USB_EXT_CAP_SIZE,
+ .bDescriptorType = USB_DT_DEVICE_CAPABILITY,
+ .bDevCapabilityType = USB_CAP_TYPE_EXT,
+
+ .bmAttributes = cpu_to_le32(USB_LPM_SUPPORT),
+};
+
+static __maybe_unused struct usb_ss_cap_descriptor fsg_ss_cap_desc = {
+ .bLength = USB_DT_USB_SS_CAP_SIZE,
+ .bDescriptorType = USB_DT_DEVICE_CAPABILITY,
+ .bDevCapabilityType = USB_SS_CAP_TYPE,
+
+ /* .bmAttributes = LTM is not supported yet */
+
+ .wSpeedSupported = cpu_to_le16(USB_LOW_SPEED_OPERATION
+ | USB_FULL_SPEED_OPERATION
+ | USB_HIGH_SPEED_OPERATION
+ | USB_5GBPS_OPERATION),
+ .bFunctionalitySupport = USB_LOW_SPEED_OPERATION,
+ .bU1devExitLat = USB_DEFAULT_U1_DEV_EXIT_LAT,
+ .bU2DevExitLat = USB_DEFAULT_U2_DEV_EXIT_LAT,
+};
+
+static __maybe_unused struct usb_bos_descriptor fsg_bos_desc = {
+ .bLength = USB_DT_BOS_SIZE,
+ .bDescriptorType = USB_DT_BOS,
+
+ .wTotalLength = USB_DT_BOS_SIZE
+ + USB_DT_USB_EXT_CAP_SIZE
+ + USB_DT_USB_SS_CAP_SIZE,
+
+ .bNumDeviceCaps = 2,
+};
+
+static struct usb_descriptor_header *fsg_ss_function[] = {
+#ifndef FSG_NO_OTG
+ (struct usb_descriptor_header *) &fsg_otg_desc,
+#endif
+ (struct usb_descriptor_header *) &fsg_intf_desc,
+ (struct usb_descriptor_header *) &fsg_ss_bulk_in_desc,
+ (struct usb_descriptor_header *) &fsg_ss_bulk_in_comp_desc,
+ (struct usb_descriptor_header *) &fsg_ss_bulk_out_desc,
+ (struct usb_descriptor_header *) &fsg_ss_bulk_out_comp_desc,
+#ifndef FSG_NO_INTR_EP
+ (struct usb_descriptor_header *) &fsg_ss_intr_in_desc,
+ (struct usb_descriptor_header *) &fsg_ss_intr_in_comp_desc,
+#endif
+ NULL,
+};
+
/* Maxpacket and other transfer characteristics vary by speed. */
-static struct usb_endpoint_descriptor *
+static __maybe_unused struct usb_endpoint_descriptor *
fsg_ep_desc(struct usb_gadget *g, struct usb_endpoint_descriptor *fs,
- struct usb_endpoint_descriptor *hs)
+ struct usb_endpoint_descriptor *hs,
+ struct usb_endpoint_descriptor *ss)
{
- if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH)
+ if (gadget_is_superspeed(g) && g->speed == USB_SPEED_SUPER)
+ return ss;
+ else if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH)
return hs;
return fs;
}
@@ -596,13 +714,24 @@
rc = (int) size;
goto out;
}
- num_sectors = size >> 9; /* File size in 512-byte blocks */
+
+ if (curlun->cdrom) {
+ curlun->blksize = 2048;
+ curlun->blkbits = 11;
+ } else if (inode->i_bdev) {
+ curlun->blksize = bdev_logical_block_size(inode->i_bdev);
+ curlun->blkbits = blksize_bits(curlun->blksize);
+ } else {
+ curlun->blksize = 512;
+ curlun->blkbits = 9;
+ }
+
+ num_sectors = size >> curlun->blkbits; /* File size in logic-block-size blocks */
min_sectors = 1;
if (curlun->cdrom) {
- num_sectors &= ~3; /* Reduce to a multiple of 2048 */
- min_sectors = 300*4; /* Smallest track is 300 frames */
- if (num_sectors >= 256*60*75*4) {
- num_sectors = (256*60*75 - 1) * 4;
+ min_sectors = 300; /* Smallest track is 300 frames */
+ if (num_sectors >= 256*60*75) {
+ num_sectors = 256*60*75 - 1;
LINFO(curlun, "file too big: %s\n", filename);
LINFO(curlun, "using only first %d blocks\n",
(int) num_sectors);
diff --git a/drivers/usb/gadget/u_bam.c b/drivers/usb/gadget/u_bam.c
index 6299cdd..36270d4 100644
--- a/drivers/usb/gadget/u_bam.c
+++ b/drivers/usb/gadget/u_bam.c
@@ -704,7 +704,7 @@
int ret;
unsigned long flags;
- ret = usb_ep_enable(port->gr->in, port->gr->in_desc);
+ ret = usb_ep_enable(port->gr->in);
if (ret) {
pr_err("%s: usb_ep_enable failed eptype:IN ep:%p",
__func__, port->gr->in);
@@ -712,7 +712,7 @@
}
port->gr->in->driver_data = port;
- ret = usb_ep_enable(port->gr->out, port->gr->out_desc);
+ ret = usb_ep_enable(port->gr->out);
if (ret) {
pr_err("%s: usb_ep_enable failed eptype:OUT ep:%p",
__func__, port->gr->out);
@@ -1125,7 +1125,7 @@
d = &port->data_ch;
if (trans == USB_GADGET_XPORT_BAM) {
- ret = usb_ep_enable(gr->in, gr->in_desc);
+ ret = usb_ep_enable(gr->in);
if (ret) {
pr_err("%s: usb_ep_enable failed eptype:IN ep:%p",
__func__, gr->in);
@@ -1133,7 +1133,7 @@
}
gr->in->driver_data = port;
- ret = usb_ep_enable(gr->out, gr->out_desc);
+ ret = usb_ep_enable(gr->out);
if (ret) {
pr_err("%s: usb_ep_enable failed eptype:OUT ep:%p",
__func__, gr->out);
diff --git a/drivers/usb/gadget/u_data_hsic.c b/drivers/usb/gadget/u_data_hsic.c
index 818e2a6..abf147a 100644
--- a/drivers/usb/gadget/u_data_hsic.c
+++ b/drivers/usb/gadget/u_data_hsic.c
@@ -754,8 +754,6 @@
struct gdata_port *port;
struct gserial *gser;
struct grmnet *gr;
- struct usb_endpoint_descriptor *in_desc;
- struct usb_endpoint_descriptor *out_desc;
unsigned long flags;
int ret = 0;
@@ -788,8 +786,6 @@
port->rx_q_size = ghsic_data_serial_rx_q_size;
gser->in->driver_data = port;
gser->out->driver_data = port;
- in_desc = gser->in_desc;
- out_desc = gser->out_desc;
} else {
gr = gptr;
@@ -805,18 +801,16 @@
port->rx_q_size = ghsic_data_rmnet_rx_q_size;
gr->in->driver_data = port;
gr->out->driver_data = port;
- in_desc = gr->in_desc;
- out_desc = gr->out_desc;
}
- ret = usb_ep_enable(port->in, in_desc);
+ ret = usb_ep_enable(port->in);
if (ret) {
pr_err("%s: usb_ep_enable failed eptype:IN ep:%p",
__func__, port->in);
goto fail;
}
- ret = usb_ep_enable(port->out, out_desc);
+ ret = usb_ep_enable(port->out);
if (ret) {
pr_err("%s: usb_ep_enable failed eptype:OUT ep:%p",
__func__, port->out);
diff --git a/drivers/usb/gadget/u_ether.c b/drivers/usb/gadget/u_ether.c
index b5a30fe..19ad77f 100644
--- a/drivers/usb/gadget/u_ether.c
+++ b/drivers/usb/gadget/u_ether.c
@@ -67,7 +67,7 @@
spinlock_t req_lock; /* guard {rx,tx}_reqs */
struct list_head tx_reqs, rx_reqs;
- atomic_t tx_qlen;
+ unsigned tx_qlen;
struct sk_buff_head rx_frames;
@@ -484,7 +484,6 @@
spin_unlock(&dev->req_lock);
dev_kfree_skb_any(skb);
- atomic_dec(&dev->tx_qlen);
if (netif_carrier_ok(dev->net))
netif_wake_queue(dev->net);
}
@@ -599,10 +598,18 @@
req->length = length;
/* throttle highspeed IRQ rate back slightly */
- if (gadget_is_dualspeed(dev->gadget))
- req->no_interrupt = (dev->gadget->speed == USB_SPEED_HIGH)
- ? ((atomic_read(&dev->tx_qlen) % qmult) != 0)
- : 0;
+ if (gadget_is_dualspeed(dev->gadget) &&
+ (dev->gadget->speed == USB_SPEED_HIGH)) {
+ dev->tx_qlen++;
+ if (dev->tx_qlen == qmult) {
+ req->no_interrupt = 0;
+ dev->tx_qlen = 0;
+ } else {
+ req->no_interrupt = 1;
+ }
+ } else {
+ req->no_interrupt = 0;
+ }
retval = usb_ep_queue(in, req, GFP_ATOMIC);
switch (retval) {
@@ -611,7 +618,6 @@
break;
case 0:
net->trans_start = jiffies;
- atomic_inc(&dev->tx_qlen);
}
if (retval) {
@@ -637,7 +643,7 @@
rx_fill(dev, gfp_flags);
/* and open the tx floodgates */
- atomic_set(&dev->tx_qlen, 0);
+ dev->tx_qlen = 0;
netif_wake_queue(dev->net);
}
@@ -693,8 +699,8 @@
usb_ep_disable(link->out_ep);
if (netif_carrier_ok(net)) {
DBG(dev, "host still using in/out endpoints\n");
- usb_ep_enable(link->in_ep, link->in);
- usb_ep_enable(link->out_ep, link->out);
+ usb_ep_enable(link->in_ep);
+ usb_ep_enable(link->out_ep);
}
}
spin_unlock_irqrestore(&dev->lock, flags);
@@ -891,7 +897,7 @@
return ERR_PTR(-EINVAL);
link->in_ep->driver_data = dev;
- result = usb_ep_enable(link->in_ep, link->in);
+ result = usb_ep_enable(link->in_ep);
if (result != 0) {
DBG(dev, "enable %s --> %d\n",
link->in_ep->name, result);
@@ -899,7 +905,7 @@
}
link->out_ep->driver_data = dev;
- result = usb_ep_enable(link->out_ep, link->out);
+ result = usb_ep_enable(link->out_ep);
if (result != 0) {
DBG(dev, "enable %s --> %d\n",
link->out_ep->name, result);
@@ -988,7 +994,7 @@
}
spin_unlock(&dev->req_lock);
link->in_ep->driver_data = NULL;
- link->in = NULL;
+ link->in_ep->desc = NULL;
usb_ep_disable(link->out_ep);
spin_lock(&dev->req_lock);
@@ -1003,7 +1009,7 @@
}
spin_unlock(&dev->req_lock);
link->out_ep->driver_data = NULL;
- link->out = NULL;
+ link->out_ep->desc = NULL;
/* finish forgetting about this USB link episode */
dev->header_len = 0;
diff --git a/drivers/usb/gadget/u_ether.h b/drivers/usb/gadget/u_ether.h
index 64b65f9..4677241 100644
--- a/drivers/usb/gadget/u_ether.h
+++ b/drivers/usb/gadget/u_ether.h
@@ -52,10 +52,6 @@
struct usb_ep *in_ep;
struct usb_ep *out_ep;
- /* descriptors match device speed at gether_connect() time */
- struct usb_endpoint_descriptor *in;
- struct usb_endpoint_descriptor *out;
-
bool is_zlp_ok;
u16 cdc_filter;
diff --git a/drivers/usb/gadget/u_rmnet.h b/drivers/usb/gadget/u_rmnet.h
index fd1e124..386101c 100644
--- a/drivers/usb/gadget/u_rmnet.h
+++ b/drivers/usb/gadget/u_rmnet.h
@@ -29,8 +29,6 @@
struct usb_ep *in;
struct usb_ep *out;
- struct usb_endpoint_descriptor *in_desc;
- struct usb_endpoint_descriptor *out_desc;
/* to usb host, aka laptop, windows pc etc. Will
* be filled by usb driver of rmnet functionality
diff --git a/drivers/usb/gadget/u_sdio.c b/drivers/usb/gadget/u_sdio.c
index 9bd4370..14dc73a 100644
--- a/drivers/usb/gadget/u_sdio.c
+++ b/drivers/usb/gadget/u_sdio.c
@@ -931,7 +931,7 @@
gser->notify_modem = gsdio_ctrl_notify_modem;
spin_unlock_irqrestore(&port->port_lock, flags);
- ret = usb_ep_enable(gser->in, gser->in_desc);
+ ret = usb_ep_enable(gser->in);
if (ret) {
pr_err("%s: failed to enable in ep w/ err:%d\n",
__func__, ret);
@@ -940,7 +940,7 @@
}
gser->in->driver_data = port;
- ret = usb_ep_enable(gser->out, gser->out_desc);
+ ret = usb_ep_enable(gser->out);
if (ret) {
pr_err("%s: failed to enable in ep w/ err:%d\n",
__func__, ret);
diff --git a/drivers/usb/gadget/u_serial.c b/drivers/usb/gadget/u_serial.c
index ca5f11b..10a255d 100644
--- a/drivers/usb/gadget/u_serial.c
+++ b/drivers/usb/gadget/u_serial.c
@@ -1524,12 +1524,12 @@
port = ports[port_num].port;
/* activate the endpoints */
- status = usb_ep_enable(gser->in, gser->in_desc);
+ status = usb_ep_enable(gser->in);
if (status < 0)
return status;
gser->in->driver_data = port;
- status = usb_ep_enable(gser->out, gser->out_desc);
+ status = usb_ep_enable(gser->out);
if (status < 0)
goto fail_out;
gser->out->driver_data = port;
diff --git a/drivers/usb/gadget/u_serial.h b/drivers/usb/gadget/u_serial.h
index c937006..dadc507 100644
--- a/drivers/usb/gadget/u_serial.h
+++ b/drivers/usb/gadget/u_serial.h
@@ -35,8 +35,6 @@
struct usb_ep *in;
struct usb_ep *out;
- struct usb_endpoint_descriptor *in_desc;
- struct usb_endpoint_descriptor *out_desc;
/* REVISIT avoid this CDC-ACM support harder ... */
struct usb_cdc_line_coding port_line_coding; /* 9600-8-N-1 etc */
diff --git a/drivers/usb/gadget/u_smd.c b/drivers/usb/gadget/u_smd.c
index 95adf5d..0e9ad48 100644
--- a/drivers/usb/gadget/u_smd.c
+++ b/drivers/usb/gadget/u_smd.c
@@ -660,7 +660,7 @@
port->nbytes_tolaptop = 0;
spin_unlock_irqrestore(&port->port_lock, flags);
- ret = usb_ep_enable(gser->in, gser->in_desc);
+ ret = usb_ep_enable(gser->in);
if (ret) {
pr_err("%s: usb_ep_enable failed eptype:IN ep:%p",
__func__, gser->in);
@@ -669,7 +669,7 @@
}
gser->in->driver_data = port;
- ret = usb_ep_enable(gser->out, gser->out_desc);
+ ret = usb_ep_enable(gser->out);
if (ret) {
pr_err("%s: usb_ep_enable failed eptype:OUT ep:%p",
__func__, gser->out);
diff --git a/drivers/usb/gadget/udc-core.c b/drivers/usb/gadget/udc-core.c
new file mode 100644
index 0000000..2f77e46
--- /dev/null
+++ b/drivers/usb/gadget/udc-core.c
@@ -0,0 +1,485 @@
+/**
+ * udc.c - Core UDC Framework
+ *
+ * Copyright (C) 2010 Texas Instruments
+ * Author: Felipe Balbi <balbi@ti.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/list.h>
+#include <linux/err.h>
+
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+
+/**
+ * struct usb_udc - describes one usb device controller
+ * @driver - the gadget driver pointer. For use by the class code
+ * @dev - the child device to the actual controller
+ * @gadget - the gadget. For use by the class code
+ * @list - for use by the udc class driver
+ *
+ * This represents the internal data structure which is used by the UDC-class
+ * to hold information about udc driver and gadget together.
+ */
+struct usb_udc {
+ struct usb_gadget_driver *driver;
+ struct usb_gadget *gadget;
+ struct device dev;
+ struct list_head list;
+};
+
+static struct class *udc_class;
+static struct device_type udc_device_type;
+static LIST_HEAD(udc_list);
+static DEFINE_MUTEX(udc_lock);
+
+/* ------------------------------------------------------------------------- */
+
+/**
+ * usb_gadget_start - tells usb device controller to start up
+ * @gadget: The gadget we want to get started
+ * @driver: The driver we want to bind to @gadget
+ * @bind: The bind function for @driver
+ *
+ * This call is issued by the UDC Class driver when it's about
+ * to register a gadget driver to the device controller, before
+ * calling gadget driver's bind() method.
+ *
+ * It allows the controller to be powered off until strictly
+ * necessary to have it powered on.
+ *
+ * Returns zero on success, else negative errno.
+ */
+static inline int usb_gadget_start(struct usb_gadget *gadget,
+ struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *))
+{
+ return gadget->ops->start(driver, bind);
+}
+
+/**
+ * usb_gadget_udc_start - tells usb device controller to start up
+ * @gadget: The gadget we want to get started
+ * @driver: The driver we want to bind to @gadget
+ *
+ * This call is issued by the UDC Class driver when it's about
+ * to register a gadget driver to the device controller, before
+ * calling gadget driver's bind() method.
+ *
+ * It allows the controller to be powered off until strictly
+ * necessary to have it powered on.
+ *
+ * Returns zero on success, else negative errno.
+ */
+static inline int usb_gadget_udc_start(struct usb_gadget *gadget,
+ struct usb_gadget_driver *driver)
+{
+ return gadget->ops->udc_start(gadget, driver);
+}
+
+/**
+ * usb_gadget_stop - tells usb device controller we don't need it anymore
+ * @gadget: The device we want to stop activity
+ * @driver: The driver to unbind from @gadget
+ *
+ * This call is issued by the UDC Class driver after calling
+ * gadget driver's unbind() method.
+ *
+ * The details are implementation specific, but it can go as
+ * far as powering off UDC completely and disable its data
+ * line pullups.
+ */
+static inline void usb_gadget_stop(struct usb_gadget *gadget,
+ struct usb_gadget_driver *driver)
+{
+ gadget->ops->stop(driver);
+}
+
+/**
+ * usb_gadget_udc_stop - tells usb device controller we don't need it anymore
+ * @gadget: The device we want to stop activity
+ * @driver: The driver to unbind from @gadget
+ *
+ * This call is issued by the UDC Class driver after calling
+ * gadget driver's unbind() method.
+ *
+ * The details are implementation specific, but it can go as
+ * far as powering off UDC completely and disable its data
+ * line pullups.
+ */
+static inline void usb_gadget_udc_stop(struct usb_gadget *gadget,
+ struct usb_gadget_driver *driver)
+{
+ gadget->ops->udc_stop(gadget, driver);
+}
+
+/**
+ * usb_udc_release - release the usb_udc struct
+ * @dev: the dev member within usb_udc
+ *
+ * This is called by driver's core in order to free memory once the last
+ * reference is released.
+ */
+static void usb_udc_release(struct device *dev)
+{
+ struct usb_udc *udc;
+
+ udc = container_of(dev, struct usb_udc, dev);
+ dev_dbg(dev, "releasing '%s'\n", dev_name(dev));
+ kfree(udc);
+}
+
+/**
+ * usb_add_gadget_udc - adds a new gadget to the udc class driver list
+ * @parent: the parent device to this udc. Usually the controller
+ * driver's device.
+ * @gadget: the gadget to be added to the list
+ *
+ * Returns zero on success, negative errno otherwise.
+ */
+int usb_add_gadget_udc(struct device *parent, struct usb_gadget *gadget)
+{
+ struct usb_udc *udc;
+ int ret = -ENOMEM;
+
+ udc = kzalloc(sizeof(*udc), GFP_KERNEL);
+ if (!udc)
+ goto err1;
+
+ device_initialize(&udc->dev);
+ udc->dev.release = usb_udc_release;
+ udc->dev.class = udc_class;
+ udc->dev.parent = parent;
+ ret = dev_set_name(&udc->dev, "%s", kobject_name(&parent->kobj));
+ if (ret)
+ goto err2;
+
+ udc->gadget = gadget;
+
+ mutex_lock(&udc_lock);
+ list_add_tail(&udc->list, &udc_list);
+
+ ret = device_add(&udc->dev);
+ if (ret)
+ goto err3;
+
+ mutex_unlock(&udc_lock);
+
+ return 0;
+err3:
+ list_del(&udc->list);
+ mutex_unlock(&udc_lock);
+
+err2:
+ put_device(&udc->dev);
+
+err1:
+ return ret;
+}
+EXPORT_SYMBOL_GPL(usb_add_gadget_udc);
+
+static int udc_is_newstyle(struct usb_udc *udc)
+{
+ if (udc->gadget->ops->udc_start && udc->gadget->ops->udc_stop)
+ return 1;
+ return 0;
+}
+
+
+static void usb_gadget_remove_driver(struct usb_udc *udc)
+{
+ dev_dbg(&udc->dev, "unregistering UDC driver [%s]\n",
+ udc->gadget->name);
+
+ kobject_uevent(&udc->dev.kobj, KOBJ_CHANGE);
+
+ if (udc_is_newstyle(udc)) {
+ udc->driver->disconnect(udc->gadget);
+ udc->driver->unbind(udc->gadget);
+ usb_gadget_udc_stop(udc->gadget, udc->driver);
+ usb_gadget_disconnect(udc->gadget);
+ } else {
+ usb_gadget_stop(udc->gadget, udc->driver);
+ }
+
+ udc->driver = NULL;
+ udc->dev.driver = NULL;
+}
+
+/**
+ * usb_del_gadget_udc - deletes @udc from udc_list
+ * @gadget: the gadget to be removed.
+ *
+ * This, will call usb_gadget_unregister_driver() if
+ * the @udc is still busy.
+ */
+void usb_del_gadget_udc(struct usb_gadget *gadget)
+{
+ struct usb_udc *udc = NULL;
+
+ mutex_lock(&udc_lock);
+ list_for_each_entry(udc, &udc_list, list)
+ if (udc->gadget == gadget)
+ goto found;
+
+ dev_err(gadget->dev.parent, "gadget not registered.\n");
+ mutex_unlock(&udc_lock);
+
+ return;
+
+found:
+ dev_vdbg(gadget->dev.parent, "unregistering gadget\n");
+
+ list_del(&udc->list);
+ mutex_unlock(&udc_lock);
+
+ if (udc->driver)
+ usb_gadget_remove_driver(udc);
+
+ kobject_uevent(&udc->dev.kobj, KOBJ_REMOVE);
+ device_unregister(&udc->dev);
+}
+EXPORT_SYMBOL_GPL(usb_del_gadget_udc);
+
+/* ------------------------------------------------------------------------- */
+
+int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *))
+{
+ struct usb_udc *udc = NULL;
+ int ret;
+
+ if (!driver || !bind || !driver->setup)
+ return -EINVAL;
+
+ mutex_lock(&udc_lock);
+ list_for_each_entry(udc, &udc_list, list) {
+ /* For now we take the first one */
+ if (!udc->driver)
+ goto found;
+ }
+
+ pr_debug("couldn't find an available UDC\n");
+ mutex_unlock(&udc_lock);
+ return -ENODEV;
+
+found:
+ dev_dbg(&udc->dev, "registering UDC driver [%s]\n",
+ driver->function);
+
+ udc->driver = driver;
+ udc->dev.driver = &driver->driver;
+
+ if (udc_is_newstyle(udc)) {
+ ret = bind(udc->gadget);
+ if (ret)
+ goto err1;
+ ret = usb_gadget_udc_start(udc->gadget, driver);
+ if (ret) {
+ driver->unbind(udc->gadget);
+ goto err1;
+ }
+ usb_gadget_connect(udc->gadget);
+ } else {
+
+ ret = usb_gadget_start(udc->gadget, driver, bind);
+ if (ret)
+ goto err1;
+
+ }
+
+ kobject_uevent(&udc->dev.kobj, KOBJ_CHANGE);
+ mutex_unlock(&udc_lock);
+ return 0;
+
+err1:
+ dev_err(&udc->dev, "failed to start %s: %d\n",
+ udc->driver->function, ret);
+ udc->driver = NULL;
+ udc->dev.driver = NULL;
+ mutex_unlock(&udc_lock);
+ return ret;
+}
+EXPORT_SYMBOL_GPL(usb_gadget_probe_driver);
+
+int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+{
+ struct usb_udc *udc = NULL;
+ int ret = -ENODEV;
+
+ if (!driver || !driver->unbind)
+ return -EINVAL;
+
+ mutex_lock(&udc_lock);
+ list_for_each_entry(udc, &udc_list, list)
+ if (udc->driver == driver) {
+ usb_gadget_remove_driver(udc);
+ ret = 0;
+ break;
+ }
+
+ mutex_unlock(&udc_lock);
+ return ret;
+}
+EXPORT_SYMBOL_GPL(usb_gadget_unregister_driver);
+
+/* ------------------------------------------------------------------------- */
+
+static ssize_t usb_udc_srp_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t n)
+{
+ struct usb_udc *udc = dev_get_drvdata(dev);
+
+ if (sysfs_streq(buf, "1"))
+ usb_gadget_wakeup(udc->gadget);
+
+ return n;
+}
+static DEVICE_ATTR(srp, S_IWUSR, NULL, usb_udc_srp_store);
+
+static ssize_t usb_udc_softconn_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t n)
+{
+ struct usb_udc *udc = dev_get_drvdata(dev);
+
+ if (sysfs_streq(buf, "connect")) {
+ usb_gadget_connect(udc->gadget);
+ } else if (sysfs_streq(buf, "disconnect")) {
+ usb_gadget_disconnect(udc->gadget);
+ } else {
+ dev_err(dev, "unsupported command '%s'\n", buf);
+ return -EINVAL;
+ }
+
+ return n;
+}
+static DEVICE_ATTR(soft_connect, S_IWUSR, NULL, usb_udc_softconn_store);
+
+static ssize_t usb_udc_speed_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct usb_udc *udc = dev_get_drvdata(dev);
+ struct usb_gadget *gadget = udc->gadget;
+
+ switch (gadget->speed) {
+ case USB_SPEED_LOW:
+ return snprintf(buf, PAGE_SIZE, "low-speed\n");
+ case USB_SPEED_FULL:
+ return snprintf(buf, PAGE_SIZE, "full-speed\n");
+ case USB_SPEED_HIGH:
+ return snprintf(buf, PAGE_SIZE, "high-speed\n");
+ case USB_SPEED_WIRELESS:
+ return snprintf(buf, PAGE_SIZE, "wireless\n");
+ case USB_SPEED_SUPER:
+ return snprintf(buf, PAGE_SIZE, "super-speed\n");
+ case USB_SPEED_UNKNOWN: /* FALLTHROUGH */
+ default:
+ return snprintf(buf, PAGE_SIZE, "UNKNOWN\n");
+ }
+}
+static DEVICE_ATTR(speed, S_IRUSR, usb_udc_speed_show, NULL);
+
+#define USB_UDC_ATTR(name) \
+ssize_t usb_udc_##name##_show(struct device *dev, \
+ struct device_attribute *attr, char *buf) \
+{ \
+ struct usb_udc *udc = dev_get_drvdata(dev); \
+ struct usb_gadget *gadget = udc->gadget; \
+ \
+ return snprintf(buf, PAGE_SIZE, "%d\n", gadget->name); \
+} \
+static DEVICE_ATTR(name, S_IRUSR, usb_udc_##name##_show, NULL)
+
+static USB_UDC_ATTR(is_dualspeed);
+static USB_UDC_ATTR(is_otg);
+static USB_UDC_ATTR(is_a_peripheral);
+static USB_UDC_ATTR(b_hnp_enable);
+static USB_UDC_ATTR(a_hnp_support);
+static USB_UDC_ATTR(a_alt_hnp_support);
+
+static struct attribute *usb_udc_attrs[] = {
+ &dev_attr_srp.attr,
+ &dev_attr_soft_connect.attr,
+ &dev_attr_speed.attr,
+
+ &dev_attr_is_dualspeed.attr,
+ &dev_attr_is_otg.attr,
+ &dev_attr_is_a_peripheral.attr,
+ &dev_attr_b_hnp_enable.attr,
+ &dev_attr_a_hnp_support.attr,
+ &dev_attr_a_alt_hnp_support.attr,
+ NULL,
+};
+
+static const struct attribute_group usb_udc_attr_group = {
+ .attrs = usb_udc_attrs,
+};
+
+static const struct attribute_group *usb_udc_attr_groups[] = {
+ &usb_udc_attr_group,
+ NULL,
+};
+
+static int usb_udc_uevent(struct device *dev, struct kobj_uevent_env *env)
+{
+ struct usb_udc *udc = container_of(dev, struct usb_udc, dev);
+ int ret;
+
+ ret = add_uevent_var(env, "USB_UDC_NAME=%s", udc->gadget->name);
+ if (ret) {
+ dev_err(dev, "failed to add uevent USB_UDC_NAME\n");
+ return ret;
+ }
+
+ if (udc->driver) {
+ ret = add_uevent_var(env, "USB_UDC_DRIVER=%s",
+ udc->driver->function);
+ if (ret) {
+ dev_err(dev, "failed to add uevent USB_UDC_DRIVER\n");
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static int __init usb_udc_init(void)
+{
+ udc_class = class_create(THIS_MODULE, "udc");
+ if (IS_ERR(udc_class)) {
+ pr_err("failed to create udc class --> %ld\n",
+ PTR_ERR(udc_class));
+ return PTR_ERR(udc_class);
+ }
+
+ udc_class->dev_uevent = usb_udc_uevent;
+ udc_device_type.groups = usb_udc_attr_groups;
+
+ return 0;
+}
+subsys_initcall(usb_udc_init);
+
+static void __exit usb_udc_exit(void)
+{
+ class_destroy(udc_class);
+}
+module_exit(usb_udc_exit);
+
+MODULE_DESCRIPTION("UDC Framework");
+MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/usb/gadget/webcam.c b/drivers/usb/gadget/webcam.c
index a5a0fdb..df6882d 100644
--- a/drivers/usb/gadget/webcam.c
+++ b/drivers/usb/gadget/webcam.c
@@ -373,6 +373,7 @@
.name = "g_webcam",
.dev = &webcam_device_descriptor,
.strings = webcam_device_strings,
+ .max_speed = USB_SPEED_HIGH,
.unbind = webcam_unbind,
};
diff --git a/drivers/usb/gadget/zero.c b/drivers/usb/gadget/zero.c
index 6d16db9..af7e7c3 100644
--- a/drivers/usb/gadget/zero.c
+++ b/drivers/usb/gadget/zero.c
@@ -340,6 +340,7 @@
.name = "zero",
.dev = &device_desc,
.strings = dev_strings,
+ .max_speed = USB_SPEED_HIGH,
.unbind = zero_unbind,
.suspend = zero_suspend,
.resume = zero_resume,
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index ece6785..bda6745 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -189,6 +189,13 @@
for chip-to-chip interconnect (having maximum circuit length of
10cm) as it removes the analog transceivers.
+config USB_EHCI_MSM_HOST4
+ bool "Support for MSM on-chip EHCI USB controller# 4"
+ depends on USB_EHCI_HCD && ARCH_MSM && ARCH_APQ8064
+ ---help---
+ Enables support for the EHCI Compliant USB Host controller# 4
+ present on the Qualcomm chipsets.
+
config USB_EHCI_TEGRA
boolean "NVIDIA Tegra HCD support"
depends on USB_EHCI_HCD && ARCH_TEGRA
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index dc11eaf..97b0a2e 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -1274,6 +1274,7 @@
#ifdef CONFIG_USB_EHCI_MSM
#include "ehci-msm.c"
+#include "ehci-msm2.c"
#define PLATFORM_DRIVER_PRESENT
#endif
@@ -1391,7 +1392,11 @@
#endif
#ifdef CONFIG_USB_EHCI_MSM_HSIC
- &ehci_msm_hsic_driver
+ &ehci_msm_hsic_driver,
+#endif
+
+#ifdef CONFIG_USB_EHCI_MSM
+ &ehci_msm2_driver,
#endif
};
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
index d438555..657bc42 100644
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -1203,10 +1203,9 @@
ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
#ifdef CONFIG_USB_OTG
if (hcd->self.otg_port == (wIndex + 1) &&
- hcd->self.b_hnp_enable &&
- ehci->start_hnp) {
+ hcd->self.b_hnp_enable) {
set_bit(wIndex, &ehci->suspended_ports);
- ehci->start_hnp(ehci);
+ otg_start_hnp(ehci->transceiver);
break;
}
#endif
diff --git a/drivers/usb/host/ehci-msm-hsic.c b/drivers/usb/host/ehci-msm-hsic.c
index d64f223..795e7a8 100644
--- a/drivers/usb/host/ehci-msm-hsic.c
+++ b/drivers/usb/host/ehci-msm-hsic.c
@@ -24,6 +24,7 @@
#include <linux/platform_device.h>
#include <linux/clk.h>
+#include <linux/irq.h>
#include <linux/err.h>
#include <linux/wakelock.h>
#include <linux/pm_runtime.h>
@@ -53,6 +54,7 @@
struct msm_xo_voter *xo_handle;
struct wake_lock wlock;
int peripheral_status_irq;
+ int wakeup_irq;
};
static inline struct msm_hsic_hcd *hcd_to_hsic(struct usb_hcd *hcd)
@@ -712,10 +714,12 @@
return 0;
put_clocks:
- clk_disable_unprepare(mehci->core_clk);
- clk_disable_unprepare(mehci->phy_clk);
- clk_disable_unprepare(mehci->cal_clk);
- clk_disable_unprepare(mehci->ahb_clk);
+ if (!atomic_read(&mehci->in_lpm)) {
+ clk_disable_unprepare(mehci->core_clk);
+ clk_disable_unprepare(mehci->phy_clk);
+ clk_disable_unprepare(mehci->cal_clk);
+ clk_disable_unprepare(mehci->ahb_clk);
+ }
clk_put(mehci->ahb_clk);
put_cal_clk:
clk_put(mehci->cal_clk);
@@ -732,7 +736,7 @@
{
struct msm_hsic_hcd *mehci = dev_id;
- pr_debug("%s: mechi:%p dev_id:%p\n", __func__, mehci, dev_id);
+ pr_debug("%s: mehci:%p dev_id:%p\n", __func__, mehci, dev_id);
if (mehci)
msm_hsic_config_gpios(mehci, 0);
@@ -740,6 +744,16 @@
return IRQ_HANDLED;
}
+static irqreturn_t msm_hsic_wakeup_irq(int irq, void *data)
+{
+ struct msm_hsic_hcd *mehci = data;
+
+ dev_dbg(mehci->dev, "%s: hsic remote wakeup interrupt\n", __func__);
+
+ return IRQ_HANDLED;
+}
+
+
static int __devinit ehci_hsic_msm_probe(struct platform_device *pdev)
{
struct usb_hcd *hcd;
@@ -854,6 +868,24 @@
__func__, mehci->peripheral_status_irq, ret);
}
+ /* configure wakeup irq */
+ ret = platform_get_irq(pdev, 2);
+ if (ret > 0) {
+ mehci->wakeup_irq = ret;
+ dev_dbg(&pdev->dev, "wakeup_irq: %d\n", mehci->wakeup_irq);
+ ret = request_irq(mehci->wakeup_irq, msm_hsic_wakeup_irq,
+ IRQF_TRIGGER_LOW,
+ "msm_hsic_wakeup", mehci);
+ if (!ret) {
+ disable_irq_nosync(mehci->wakeup_irq);
+ enable_irq_wake(mehci->wakeup_irq);
+ } else {
+ dev_err(&pdev->dev, "request_irq(%d) failed: %d\n",
+ mehci->wakeup_irq, ret);
+ mehci->wakeup_irq = 0;
+ }
+ }
+
/*
* This pdev->dev is assigned parent of root-hub by USB core,
* hence, runtime framework automatically calls this driver's
@@ -891,9 +923,12 @@
if (mehci->peripheral_status_irq)
free_irq(mehci->peripheral_status_irq, mehci);
+ if (mehci->wakeup_irq) {
+ disable_irq_wake(mehci->wakeup_irq);
+ free_irq(mehci->wakeup_irq, mehci);
+ }
device_init_wakeup(&pdev->dev, 0);
- pm_runtime_disable(&pdev->dev);
pm_runtime_set_suspended(&pdev->dev);
usb_remove_hcd(hcd);
diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c
index f45f257..5649fd0 100644
--- a/drivers/usb/host/ehci-msm.c
+++ b/drivers/usb/host/ehci-msm.c
@@ -176,6 +176,7 @@
goto put_transceiver;
}
+ hcd_to_ehci(hcd)->transceiver = otg;
device_init_wakeup(&pdev->dev, 1);
pm_runtime_enable(&pdev->dev);
@@ -199,6 +200,7 @@
pm_runtime_disable(&pdev->dev);
pm_runtime_set_suspended(&pdev->dev);
+ hcd_to_ehci(hcd)->transceiver = NULL;
otg_set_host(otg, NULL);
otg_put_transceiver(otg);
diff --git a/drivers/usb/host/ehci-msm2.c b/drivers/usb/host/ehci-msm2.c
new file mode 100644
index 0000000..4318efb
--- /dev/null
+++ b/drivers/usb/host/ehci-msm2.c
@@ -0,0 +1,1057 @@
+/* ehci-msm2.c - HSUSB Host Controller Driver Implementation
+ *
+ * Copyright (c) 2008-2012, Code Aurora Forum. All rights reserved.
+ *
+ * Partly derived from ehci-fsl.c and ehci-hcd.c
+ * Copyright (c) 2000-2004 by David Brownell
+ * Copyright (c) 2005 MontaVista Software
+ *
+ * All source code in this file is licensed under the following license except
+ * where indicated.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can find it at http://www.fsf.org
+ */
+
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/wakelock.h>
+#include <linux/pm_runtime.h>
+#include <linux/regulator/consumer.h>
+
+#include <linux/usb/ulpi.h>
+#include <linux/usb/msm_hsusb_hw.h>
+#include <linux/usb/msm_hsusb.h>
+#include <mach/clk.h>
+#include <mach/msm_iomap.h>
+
+#define MSM_USB_BASE (hcd->regs)
+
+struct msm_hcd {
+ struct ehci_hcd ehci;
+ struct device *dev;
+ struct clk *iface_clk;
+ struct clk *core_clk;
+ struct clk *alt_core_clk;
+ struct regulator *hsusb_vddcx;
+ struct regulator *hsusb_3p3;
+ struct regulator *hsusb_1p8;
+ struct regulator *vbus;
+ bool async_int;
+ bool vbus_on;
+ atomic_t in_lpm;
+ struct wake_lock wlock;
+};
+
+static inline struct msm_hcd *hcd_to_mhcd(struct usb_hcd *hcd)
+{
+ return (struct msm_hcd *) (hcd->hcd_priv);
+}
+
+static inline struct usb_hcd *mhcd_to_hcd(struct msm_hcd *mhcd)
+{
+ return container_of((void *) mhcd, struct usb_hcd, hcd_priv);
+}
+
+#define HSUSB_PHY_3P3_VOL_MIN 3050000 /* uV */
+#define HSUSB_PHY_3P3_VOL_MAX 3300000 /* uV */
+#define HSUSB_PHY_3P3_HPM_LOAD 50000 /* uA */
+
+#define HSUSB_PHY_1P8_VOL_MIN 1800000 /* uV */
+#define HSUSB_PHY_1P8_VOL_MAX 1800000 /* uV */
+#define HSUSB_PHY_1P8_HPM_LOAD 50000 /* uA */
+
+#define HSUSB_PHY_VDD_DIG_VOL_MIN 1045000 /* uV */
+#define HSUSB_PHY_VDD_DIG_VOL_MAX 1320000 /* uV */
+#define HSUSB_PHY_VDD_DIG_LOAD 49360 /* uA */
+
+static int msm_ehci_init_vddcx(struct msm_hcd *mhcd, int init)
+{
+ int ret = 0;
+
+ if (!init)
+ goto disable_reg;
+
+ mhcd->hsusb_vddcx = regulator_get(mhcd->dev, "HSUSB_VDDCX");
+ if (IS_ERR(mhcd->hsusb_vddcx)) {
+ dev_err(mhcd->dev, "unable to get ehci vddcx\n");
+ return PTR_ERR(mhcd->hsusb_vddcx);
+ }
+
+ ret = regulator_set_voltage(mhcd->hsusb_vddcx,
+ HSUSB_PHY_VDD_DIG_VOL_MIN,
+ HSUSB_PHY_VDD_DIG_VOL_MAX);
+ if (ret) {
+ dev_err(mhcd->dev, "unable to set the voltage"
+ "for ehci vddcx\n");
+ goto reg_set_voltage_err;
+ }
+
+ ret = regulator_set_optimum_mode(mhcd->hsusb_vddcx,
+ HSUSB_PHY_VDD_DIG_LOAD);
+ if (ret < 0) {
+ dev_err(mhcd->dev, "%s: Unable to set optimum mode of the"
+ " regulator: VDDCX\n", __func__);
+ goto reg_optimum_mode_err;
+ }
+
+ ret = regulator_enable(mhcd->hsusb_vddcx);
+ if (ret) {
+ dev_err(mhcd->dev, "unable to enable ehci vddcx\n");
+ goto reg_enable_err;
+ }
+
+ return 0;
+
+disable_reg:
+ regulator_disable(mhcd->hsusb_vddcx);
+reg_enable_err:
+ regulator_set_optimum_mode(mhcd->hsusb_vddcx, 0);
+reg_optimum_mode_err:
+ regulator_set_voltage(mhcd->hsusb_vddcx, 0,
+ HSUSB_PHY_VDD_DIG_VOL_MIN);
+reg_set_voltage_err:
+ regulator_put(mhcd->hsusb_vddcx);
+
+ return ret;
+
+}
+
+static int msm_ehci_ldo_init(struct msm_hcd *mhcd, int init)
+{
+ int rc = 0;
+
+ if (!init)
+ goto put_1p8;
+
+ mhcd->hsusb_3p3 = regulator_get(mhcd->dev, "HSUSB_3p3");
+ if (IS_ERR(mhcd->hsusb_3p3)) {
+ dev_err(mhcd->dev, "unable to get hsusb 3p3\n");
+ return PTR_ERR(mhcd->hsusb_3p3);
+ }
+
+ rc = regulator_set_voltage(mhcd->hsusb_3p3,
+ HSUSB_PHY_3P3_VOL_MIN, HSUSB_PHY_3P3_VOL_MAX);
+ if (rc) {
+ dev_err(mhcd->dev, "unable to set voltage level for"
+ "hsusb 3p3\n");
+ goto put_3p3;
+ }
+ mhcd->hsusb_1p8 = regulator_get(mhcd->dev, "HSUSB_1p8");
+ if (IS_ERR(mhcd->hsusb_1p8)) {
+ dev_err(mhcd->dev, "unable to get hsusb 1p8\n");
+ rc = PTR_ERR(mhcd->hsusb_1p8);
+ goto put_3p3_lpm;
+ }
+ rc = regulator_set_voltage(mhcd->hsusb_1p8,
+ HSUSB_PHY_1P8_VOL_MIN, HSUSB_PHY_1P8_VOL_MAX);
+ if (rc) {
+ dev_err(mhcd->dev, "unable to set voltage level for"
+ "hsusb 1p8\n");
+ goto put_1p8;
+ }
+
+ return 0;
+
+put_1p8:
+ regulator_set_voltage(mhcd->hsusb_1p8, 0, HSUSB_PHY_1P8_VOL_MAX);
+ regulator_put(mhcd->hsusb_1p8);
+put_3p3_lpm:
+ regulator_set_voltage(mhcd->hsusb_3p3, 0, HSUSB_PHY_3P3_VOL_MAX);
+put_3p3:
+ regulator_put(mhcd->hsusb_3p3);
+
+ return rc;
+}
+
+#ifdef CONFIG_PM_SLEEP
+#define HSUSB_PHY_SUSP_DIG_VOL_P50 500000
+#define HSUSB_PHY_SUSP_DIG_VOL_P75 750000
+static int msm_ehci_config_vddcx(struct msm_hcd *mhcd, int high)
+{
+ struct msm_usb_host_platform_data *pdata;
+ int max_vol = HSUSB_PHY_VDD_DIG_VOL_MAX;
+ int min_vol;
+ int ret;
+
+ pdata = mhcd->dev->platform_data;
+
+ if (high)
+ min_vol = HSUSB_PHY_VDD_DIG_VOL_MIN;
+ else if (pdata && pdata->dock_connect_irq &&
+ !irq_read_line(pdata->dock_connect_irq))
+ min_vol = HSUSB_PHY_SUSP_DIG_VOL_P75;
+ else
+ min_vol = HSUSB_PHY_SUSP_DIG_VOL_P50;
+
+ ret = regulator_set_voltage(mhcd->hsusb_vddcx, min_vol, max_vol);
+ if (ret) {
+ dev_err(mhcd->dev, "%s: unable to set the voltage of regulator"
+ " HSUSB_VDDCX\n", __func__);
+ return ret;
+ }
+
+ dev_dbg(mhcd->dev, "%s: min_vol:%d max_vol:%d\n", __func__, min_vol,
+ max_vol);
+
+ return ret;
+}
+#else
+static int msm_ehci_config_vddcx(struct msm_hcd *mhcd, int high)
+{
+ return 0;
+}
+#endif
+
+static void msm_ehci_vbus_power(struct msm_hcd *mhcd, bool on)
+{
+ int ret;
+
+ if (!mhcd->vbus) {
+ pr_err("vbus is NULL.");
+ return;
+ }
+
+ if (mhcd->vbus_on == on)
+ return;
+
+ if (on) {
+ ret = regulator_enable(mhcd->vbus);
+ if (ret) {
+ pr_err("unable to enable vbus\n");
+ return;
+ }
+ mhcd->vbus_on = true;
+ } else {
+ ret = regulator_disable(mhcd->vbus);
+ if (ret) {
+ pr_err("unable to disable vbus\n");
+ return;
+ }
+ mhcd->vbus_on = false;
+ }
+}
+
+static irqreturn_t msm_ehci_dock_connect_irq(int irq, void *data)
+{
+ const struct msm_usb_host_platform_data *pdata;
+ struct msm_hcd *mhcd = data;
+ struct usb_hcd *hcd = mhcd_to_hcd(mhcd);
+
+ pdata = mhcd->dev->platform_data;
+
+ if (atomic_read(&mhcd->in_lpm))
+ usb_hcd_resume_root_hub(hcd);
+
+ if (irq_read_line(pdata->dock_connect_irq)) {
+ dev_dbg(mhcd->dev, "%s:Dock removed disable vbus\n", __func__);
+ msm_ehci_vbus_power(mhcd, 0);
+ } else {
+ dev_dbg(mhcd->dev, "%s:Dock connected enable vbus\n", __func__);
+ msm_ehci_vbus_power(mhcd, 1);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static int msm_ehci_init_vbus(struct msm_hcd *mhcd, int init)
+{
+ int rc = 0;
+ struct usb_hcd *hcd = mhcd_to_hcd(mhcd);
+ const struct msm_usb_host_platform_data *pdata;
+
+ pdata = mhcd->dev->platform_data;
+
+ if (!init) {
+ regulator_put(mhcd->vbus);
+ if (pdata && pdata->dock_connect_irq)
+ free_irq(pdata->dock_connect_irq, mhcd);
+ return rc;
+ }
+
+ mhcd->vbus = regulator_get(mhcd->dev, "vbus");
+ if (IS_ERR(mhcd->vbus)) {
+ pr_err("Unable to get vbus\n");
+ return -ENODEV;
+ }
+
+ if (pdata) {
+ hcd->power_budget = pdata->power_budget;
+
+ if (pdata->dock_connect_irq) {
+ rc = request_threaded_irq(pdata->dock_connect_irq, NULL,
+ msm_ehci_dock_connect_irq,
+ IRQF_TRIGGER_FALLING |
+ IRQF_TRIGGER_RISING |
+ IRQF_ONESHOT, "msm_ehci_host", mhcd);
+ if (!rc)
+ enable_irq_wake(pdata->dock_connect_irq);
+ }
+ }
+ return rc;
+}
+
+static int msm_ehci_ldo_enable(struct msm_hcd *mhcd, int on)
+{
+ int ret = 0;
+
+ if (IS_ERR(mhcd->hsusb_1p8)) {
+ dev_err(mhcd->dev, "%s: HSUSB_1p8 is not initialized\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ if (IS_ERR(mhcd->hsusb_3p3)) {
+ dev_err(mhcd->dev, "%s: HSUSB_3p3 is not initialized\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ if (on) {
+ ret = regulator_set_optimum_mode(mhcd->hsusb_1p8,
+ HSUSB_PHY_1P8_HPM_LOAD);
+ if (ret < 0) {
+ dev_err(mhcd->dev, "%s: Unable to set HPM of the"
+ " regulator: HSUSB_1p8\n", __func__);
+ return ret;
+ }
+
+ ret = regulator_enable(mhcd->hsusb_1p8);
+ if (ret) {
+ dev_err(mhcd->dev, "%s: unable to enable the hsusb"
+ " 1p8\n", __func__);
+ regulator_set_optimum_mode(mhcd->hsusb_1p8, 0);
+ return ret;
+ }
+
+ ret = regulator_set_optimum_mode(mhcd->hsusb_3p3,
+ HSUSB_PHY_3P3_HPM_LOAD);
+ if (ret < 0) {
+ dev_err(mhcd->dev, "%s: Unable to set HPM of the "
+ "regulator: HSUSB_3p3\n", __func__);
+ regulator_set_optimum_mode(mhcd->hsusb_1p8, 0);
+ regulator_disable(mhcd->hsusb_1p8);
+ return ret;
+ }
+
+ ret = regulator_enable(mhcd->hsusb_3p3);
+ if (ret) {
+ dev_err(mhcd->dev, "%s: unable to enable the "
+ "hsusb 3p3\n", __func__);
+ regulator_set_optimum_mode(mhcd->hsusb_3p3, 0);
+ regulator_set_optimum_mode(mhcd->hsusb_1p8, 0);
+ regulator_disable(mhcd->hsusb_1p8);
+ return ret;
+ }
+
+ } else {
+ ret = regulator_disable(mhcd->hsusb_1p8);
+ if (ret) {
+ dev_err(mhcd->dev, "%s: unable to disable the "
+ "hsusb 1p8\n", __func__);
+ return ret;
+ }
+
+ ret = regulator_set_optimum_mode(mhcd->hsusb_1p8, 0);
+ if (ret < 0)
+ dev_err(mhcd->dev, "%s: Unable to set LPM of the "
+ "regulator: HSUSB_1p8\n", __func__);
+
+ ret = regulator_disable(mhcd->hsusb_3p3);
+ if (ret) {
+ dev_err(mhcd->dev, "%s: unable to disable the "
+ "hsusb 3p3\n", __func__);
+ return ret;
+ }
+ ret = regulator_set_optimum_mode(mhcd->hsusb_3p3, 0);
+ if (ret < 0)
+ dev_err(mhcd->dev, "%s: Unable to set LPM of the "
+ "regulator: HSUSB_3p3\n", __func__);
+ }
+
+ dev_dbg(mhcd->dev, "reg (%s)\n", on ? "HPM" : "LPM");
+
+ return ret < 0 ? ret : 0;
+}
+
+
+#define ULPI_IO_TIMEOUT_USECS (10 * 1000)
+static int msm_ulpi_read(struct msm_hcd *mhcd, u32 reg)
+{
+ struct usb_hcd *hcd = mhcd_to_hcd(mhcd);
+ unsigned long timeout;
+
+ /* initiate read operation */
+ writel_relaxed(ULPI_RUN | ULPI_READ | ULPI_ADDR(reg),
+ USB_ULPI_VIEWPORT);
+
+ /* wait for completion */
+ timeout = jiffies + usecs_to_jiffies(ULPI_IO_TIMEOUT_USECS);
+ while (readl_relaxed(USB_ULPI_VIEWPORT) & ULPI_RUN) {
+ if (time_after(jiffies, timeout)) {
+ dev_err(mhcd->dev, "msm_ulpi_read: timeout %08x\n",
+ readl_relaxed(USB_ULPI_VIEWPORT));
+ return -ETIMEDOUT;
+ }
+ udelay(1);
+ }
+
+ return ULPI_DATA_READ(readl_relaxed(USB_ULPI_VIEWPORT));
+}
+
+
+static int msm_ulpi_write(struct msm_hcd *mhcd, u32 val, u32 reg)
+{
+ struct usb_hcd *hcd = mhcd_to_hcd(mhcd);
+ unsigned long timeout;
+
+ /* initiate write operation */
+ writel_relaxed(ULPI_RUN | ULPI_WRITE |
+ ULPI_ADDR(reg) | ULPI_DATA(val),
+ USB_ULPI_VIEWPORT);
+
+ /* wait for completion */
+ timeout = jiffies + usecs_to_jiffies(ULPI_IO_TIMEOUT_USECS);
+ while (readl_relaxed(USB_ULPI_VIEWPORT) & ULPI_RUN) {
+ if (time_after(jiffies, timeout)) {
+ dev_err(mhcd->dev, "msm_ulpi_write: timeout\n");
+ return -ETIMEDOUT;
+ }
+ udelay(1);
+ }
+
+ return 0;
+}
+
+static int msm_ehci_link_clk_reset(struct msm_hcd *mhcd, bool assert)
+{
+ int ret;
+
+ if (assert) {
+ ret = clk_reset(mhcd->alt_core_clk, CLK_RESET_ASSERT);
+ if (ret)
+ dev_err(mhcd->dev, "usb alt_core_clk assert failed\n");
+ } else {
+ ret = clk_reset(mhcd->alt_core_clk, CLK_RESET_DEASSERT);
+ if (ret)
+ dev_err(mhcd->dev, "usb alt_core_clk deassert failed\n");
+ }
+
+ return ret;
+}
+
+static int msm_ehci_phy_reset(struct msm_hcd *mhcd)
+{
+ struct usb_hcd *hcd = mhcd_to_hcd(mhcd);
+ u32 val;
+ int ret;
+ int retries;
+
+ ret = msm_ehci_link_clk_reset(mhcd, 1);
+ if (ret)
+ return ret;
+
+ udelay(1);
+
+ ret = msm_ehci_link_clk_reset(mhcd, 0);
+ if (ret)
+ return ret;
+
+ val = readl_relaxed(USB_PORTSC) & ~PORTSC_PTS_MASK;
+ writel_relaxed(val | PORTSC_PTS_ULPI, USB_PORTSC);
+
+ for (retries = 3; retries > 0; retries--) {
+ ret = msm_ulpi_write(mhcd, ULPI_FUNC_CTRL_SUSPENDM,
+ ULPI_CLR(ULPI_FUNC_CTRL));
+ if (!ret)
+ break;
+ }
+ if (!retries)
+ return -ETIMEDOUT;
+
+ /* Wakeup the PHY with a reg-access for calibration */
+ for (retries = 3; retries > 0; retries--) {
+ ret = msm_ulpi_read(mhcd, ULPI_DEBUG);
+ if (ret != -ETIMEDOUT)
+ break;
+ }
+ if (!retries)
+ return -ETIMEDOUT;
+
+ dev_info(mhcd->dev, "phy_reset: success\n");
+
+ return 0;
+}
+
+#define LINK_RESET_TIMEOUT_USEC (250 * 1000)
+static int msm_hsusb_reset(struct msm_hcd *mhcd)
+{
+ struct usb_hcd *hcd = mhcd_to_hcd(mhcd);
+ unsigned long timeout;
+ int ret;
+
+ clk_prepare_enable(mhcd->alt_core_clk);
+ ret = msm_ehci_phy_reset(mhcd);
+ if (ret) {
+ dev_err(mhcd->dev, "phy_reset failed\n");
+ return ret;
+ }
+
+ writel_relaxed(USBCMD_RESET, USB_USBCMD);
+
+ timeout = jiffies + usecs_to_jiffies(LINK_RESET_TIMEOUT_USEC);
+ while (readl_relaxed(USB_USBCMD) & USBCMD_RESET) {
+ if (time_after(jiffies, timeout))
+ return -ETIMEDOUT;
+ udelay(1);
+ }
+
+ /* select ULPI phy */
+ writel_relaxed(0x80000000, USB_PORTSC);
+
+ msleep(100);
+
+ writel_relaxed(0x0, USB_AHBBURST);
+ writel_relaxed(0x00, USB_AHBMODE);
+
+ /* Ensure that RESET operation is completed before turning off clock */
+ mb();
+ clk_disable_unprepare(mhcd->alt_core_clk);
+
+ /*rising edge interrupts with Dp rise and fall enabled*/
+ msm_ulpi_write(mhcd, ULPI_INT_DP, ULPI_USB_INT_EN_RISE);
+ msm_ulpi_write(mhcd, ULPI_INT_DP, ULPI_USB_INT_EN_FALL);
+
+ /*Clear the PHY interrupts by reading the PHY interrupt latch register*/
+ msm_ulpi_read(mhcd, ULPI_USB_INT_LATCH);
+
+ return 0;
+}
+
+#define PHY_SUSPEND_TIMEOUT_USEC (500 * 1000)
+#define PHY_RESUME_TIMEOUT_USEC (100 * 1000)
+
+#ifdef CONFIG_PM_SLEEP
+static int msm_ehci_suspend(struct msm_hcd *mhcd)
+{
+ struct usb_hcd *hcd = mhcd_to_hcd(mhcd);
+ unsigned long timeout;
+ u32 portsc;
+
+ if (atomic_read(&mhcd->in_lpm)) {
+ dev_dbg(mhcd->dev, "%s called in lpm\n", __func__);
+ return 0;
+ }
+
+ disable_irq(hcd->irq);
+
+ /* Set the PHCD bit, only if it is not set by the controller.
+ * PHY may take some time or even fail to enter into low power
+ * mode (LPM). Hence poll for 500 msec and reset the PHY and link
+ * in failure case.
+ */
+ portsc = readl_relaxed(USB_PORTSC);
+ if (!(portsc & PORTSC_PHCD)) {
+ writel_relaxed(portsc | PORTSC_PHCD,
+ USB_PORTSC);
+
+ timeout = jiffies + usecs_to_jiffies(PHY_SUSPEND_TIMEOUT_USEC);
+ while (!(readl_relaxed(USB_PORTSC) & PORTSC_PHCD)) {
+ if (time_after(jiffies, timeout)) {
+ dev_err(mhcd->dev, "Unable to suspend PHY\n");
+ msm_hsusb_reset(mhcd);
+ break;
+ }
+ udelay(1);
+ }
+ }
+
+ /*
+ * PHY has capability to generate interrupt asynchronously in low
+ * power mode (LPM). This interrupt is level triggered. So USB IRQ
+ * line must be disabled till async interrupt enable bit is cleared
+ * in USBCMD register. Assert STP (ULPI interface STOP signal) to
+ * block data communication from PHY.
+ */
+ writel_relaxed(readl_relaxed(USB_USBCMD) | ASYNC_INTR_CTRL |
+ ULPI_STP_CTRL, USB_USBCMD);
+
+ /*
+ * Ensure that hardware is put in low power mode before
+ * clocks are turned OFF and VDD is allowed to minimize.
+ */
+ mb();
+
+ clk_disable_unprepare(mhcd->iface_clk);
+ clk_disable_unprepare(mhcd->core_clk);
+
+ msm_ehci_config_vddcx(mhcd, 0);
+
+ atomic_set(&mhcd->in_lpm, 1);
+ enable_irq(hcd->irq);
+ wake_unlock(&mhcd->wlock);
+
+ dev_info(mhcd->dev, "EHCI USB in low power mode\n");
+
+ return 0;
+}
+
+static int msm_ehci_resume(struct msm_hcd *mhcd)
+{
+ struct usb_hcd *hcd = mhcd_to_hcd(mhcd);
+ unsigned long timeout;
+ unsigned temp;
+
+ if (!atomic_read(&mhcd->in_lpm)) {
+ dev_dbg(mhcd->dev, "%s called in !in_lpm\n", __func__);
+ return 0;
+ }
+
+ wake_lock(&mhcd->wlock);
+
+ clk_prepare_enable(mhcd->core_clk);
+ clk_prepare_enable(mhcd->iface_clk);
+
+ msm_ehci_config_vddcx(mhcd, 1);
+
+ temp = readl_relaxed(USB_USBCMD);
+ temp &= ~ASYNC_INTR_CTRL;
+ temp &= ~ULPI_STP_CTRL;
+ writel_relaxed(temp, USB_USBCMD);
+
+ if (!(readl_relaxed(USB_PORTSC) & PORTSC_PHCD))
+ goto skip_phy_resume;
+
+ temp = readl_relaxed(USB_PORTSC) & ~PORTSC_PHCD;
+ writel_relaxed(temp, USB_PORTSC);
+
+ timeout = jiffies + usecs_to_jiffies(PHY_RESUME_TIMEOUT_USEC);
+ while ((readl_relaxed(USB_PORTSC) & PORTSC_PHCD) ||
+ !(readl_relaxed(USB_ULPI_VIEWPORT) & ULPI_SYNC_STATE)) {
+ if (time_after(jiffies, timeout)) {
+ /*This is a fatal error. Reset the link and PHY*/
+ dev_err(mhcd->dev, "Unable to resume USB. Resetting the h/w\n");
+ msm_hsusb_reset(mhcd);
+ break;
+ }
+ udelay(1);
+ }
+
+skip_phy_resume:
+
+ atomic_set(&mhcd->in_lpm, 0);
+
+ if (mhcd->async_int) {
+ mhcd->async_int = false;
+ pm_runtime_put_noidle(mhcd->dev);
+ enable_irq(hcd->irq);
+ }
+
+ dev_info(mhcd->dev, "EHCI USB exited from low power mode\n");
+
+ return 0;
+}
+#endif
+
+static irqreturn_t msm_ehci_irq(struct usb_hcd *hcd)
+{
+ struct msm_hcd *mhcd = hcd_to_mhcd(hcd);
+
+ if (atomic_read(&mhcd->in_lpm)) {
+ disable_irq_nosync(hcd->irq);
+ mhcd->async_int = true;
+ pm_runtime_get(mhcd->dev);
+ return IRQ_HANDLED;
+ }
+
+ return ehci_irq(hcd);
+}
+
+static int msm_ehci_reset(struct usb_hcd *hcd)
+{
+ struct ehci_hcd *ehci = hcd_to_ehci(hcd);
+ int retval;
+
+ ehci->caps = USB_CAPLENGTH;
+ ehci->regs = USB_CAPLENGTH +
+ HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
+ dbg_hcs_params(ehci, "reset");
+ dbg_hcc_params(ehci, "reset");
+
+ /* cache the data to minimize the chip reads*/
+ ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
+
+ hcd->has_tt = 1;
+ ehci->sbrn = HCD_USB2;
+
+ retval = ehci_halt(ehci);
+ if (retval)
+ return retval;
+
+ /* data structure init */
+ retval = ehci_init(hcd);
+ if (retval)
+ return retval;
+
+ retval = ehci_reset(ehci);
+ if (retval)
+ return retval;
+
+ /* bursts of unspecified length. */
+ writel_relaxed(0, USB_AHBBURST);
+ /* Use the AHB transactor */
+ writel_relaxed(0, USB_AHBMODE);
+ /* Disable streaming mode and select host mode */
+ writel_relaxed(0x13, USB_USBMODE);
+
+ ehci_port_power(ehci, 1);
+ return 0;
+}
+
+static struct hc_driver msm_hc2_driver = {
+ .description = hcd_name,
+ .product_desc = "Qualcomm EHCI Host Controller",
+ .hcd_priv_size = sizeof(struct msm_hcd),
+
+ /*
+ * generic hardware linkage
+ */
+ .irq = msm_ehci_irq,
+ .flags = HCD_USB2 | HCD_MEMORY,
+
+ .reset = msm_ehci_reset,
+ .start = ehci_run,
+
+ .stop = ehci_stop,
+ .shutdown = ehci_shutdown,
+
+ /*
+ * managing i/o requests and associated device resources
+ */
+ .urb_enqueue = ehci_urb_enqueue,
+ .urb_dequeue = ehci_urb_dequeue,
+ .endpoint_disable = ehci_endpoint_disable,
+ .endpoint_reset = ehci_endpoint_reset,
+ .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
+
+ /*
+ * scheduling support
+ */
+ .get_frame_number = ehci_get_frame,
+
+ /*
+ * root hub support
+ */
+ .hub_status_data = ehci_hub_status_data,
+ .hub_control = ehci_hub_control,
+ .relinquish_port = ehci_relinquish_port,
+ .port_handed_over = ehci_port_handed_over,
+
+ /*
+ * PM support
+ */
+ .bus_suspend = ehci_bus_suspend,
+ .bus_resume = ehci_bus_resume,
+};
+
+static int msm_ehci_init_clocks(struct msm_hcd *mhcd, u32 init)
+{
+ int ret = 0;
+
+ if (!init)
+ goto put_clocks;
+
+ /* 60MHz alt_core_clk is for LINK to be used during PHY RESET */
+ mhcd->alt_core_clk = clk_get(mhcd->dev, "alt_core_clk");
+ if (IS_ERR(mhcd->alt_core_clk)) {
+ dev_err(mhcd->dev, "failed to get alt_core_clk\n");
+ ret = PTR_ERR(mhcd->alt_core_clk);
+ return ret;
+ }
+ clk_set_rate(mhcd->alt_core_clk, 60000000);
+
+ /* iface_clk is required for data transfers */
+ mhcd->iface_clk = clk_get(mhcd->dev, "iface_clk");
+ if (IS_ERR(mhcd->iface_clk)) {
+ dev_err(mhcd->dev, "failed to get iface_clk\n");
+ ret = PTR_ERR(mhcd->iface_clk);
+ goto put_alt_core_clk;
+ }
+
+ /* Link's protocol engine is based on pclk which must
+ * be running >55Mhz and frequency should also not change.
+ * Hence, vote for maximum clk frequency on its source
+ */
+ mhcd->core_clk = clk_get(mhcd->dev, "core_clk");
+ if (IS_ERR(mhcd->core_clk)) {
+ dev_err(mhcd->dev, "failed to get core_clk\n");
+ ret = PTR_ERR(mhcd->core_clk);
+ goto put_iface_clk;
+ }
+ clk_set_rate(mhcd->core_clk, INT_MAX);
+
+ clk_prepare_enable(mhcd->core_clk);
+ clk_prepare_enable(mhcd->iface_clk);
+
+ return 0;
+
+put_clocks:
+ clk_disable_unprepare(mhcd->iface_clk);
+ clk_disable_unprepare(mhcd->core_clk);
+ clk_put(mhcd->core_clk);
+put_iface_clk:
+ clk_put(mhcd->iface_clk);
+put_alt_core_clk:
+ clk_put(mhcd->alt_core_clk);
+
+ return ret;
+}
+
+static int __devinit ehci_msm2_probe(struct platform_device *pdev)
+{
+ struct usb_hcd *hcd;
+ struct resource *res;
+ struct msm_hcd *mhcd;
+ const struct msm_usb_host_platform_data *pdata;
+ int ret;
+
+ dev_dbg(&pdev->dev, "ehci_msm2 probe\n");
+
+ hcd = usb_create_hcd(&msm_hc2_driver, &pdev->dev,
+ dev_name(&pdev->dev));
+ if (!hcd) {
+ dev_err(&pdev->dev, "Unable to create HCD\n");
+ return -ENOMEM;
+ }
+
+ hcd->irq = platform_get_irq(pdev, 0);
+ if (hcd->irq < 0) {
+ dev_err(&pdev->dev, "Unable to get IRQ resource\n");
+ ret = hcd->irq;
+ goto put_hcd;
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(&pdev->dev, "Unable to get memory resource\n");
+ ret = -ENODEV;
+ goto put_hcd;
+ }
+
+ hcd->rsrc_start = res->start;
+ hcd->rsrc_len = resource_size(res);
+ hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
+ if (!hcd->regs) {
+ dev_err(&pdev->dev, "ioremap failed\n");
+ ret = -ENOMEM;
+ goto put_hcd;
+ }
+
+ mhcd = hcd_to_mhcd(hcd);
+ mhcd->dev = &pdev->dev;
+
+ ret = msm_ehci_init_clocks(mhcd, 1);
+ if (ret) {
+ dev_err(&pdev->dev, "unable to initialize clocks\n");
+ ret = -ENODEV;
+ goto unmap;
+ }
+
+ ret = msm_ehci_init_vddcx(mhcd, 1);
+ if (ret) {
+ dev_err(&pdev->dev, "unable to initialize VDDCX\n");
+ ret = -ENODEV;
+ goto deinit_clocks;
+ }
+
+ ret = msm_ehci_config_vddcx(mhcd, 1);
+ if (ret) {
+ dev_err(&pdev->dev, "hsusb vddcx configuration failed\n");
+ goto deinit_vddcx;
+ }
+
+ ret = msm_ehci_ldo_init(mhcd, 1);
+ if (ret) {
+ dev_err(&pdev->dev, "hsusb vreg configuration failed\n");
+ goto deinit_vddcx;
+ }
+
+ ret = msm_ehci_ldo_enable(mhcd, 1);
+ if (ret) {
+ dev_err(&pdev->dev, "hsusb vreg enable failed\n");
+ goto deinit_ldo;
+ }
+
+ ret = msm_ehci_init_vbus(mhcd, 1);
+ if (ret) {
+ dev_err(&pdev->dev, "unable to get vbus\n");
+ goto disable_ldo;
+ }
+
+ ret = msm_hsusb_reset(mhcd);
+ if (ret) {
+ dev_err(&pdev->dev, "hsusb PHY initialization failed\n");
+ goto vbus_deinit;
+ }
+
+ ret = usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
+ if (ret) {
+ dev_err(&pdev->dev, "unable to register HCD\n");
+ goto vbus_deinit;
+ }
+
+ pdata = mhcd->dev->platform_data;
+ if (pdata && (!pdata->dock_connect_irq ||
+ !irq_read_line(pdata->dock_connect_irq)))
+ msm_ehci_vbus_power(mhcd, 1);
+
+ device_init_wakeup(&pdev->dev, 1);
+ wake_lock_init(&mhcd->wlock, WAKE_LOCK_SUSPEND, dev_name(&pdev->dev));
+ wake_lock(&mhcd->wlock);
+ /*
+ * This pdev->dev is assigned parent of root-hub by USB core,
+ * hence, runtime framework automatically calls this driver's
+ * runtime APIs based on root-hub's state.
+ */
+ pm_runtime_set_active(&pdev->dev);
+ pm_runtime_enable(&pdev->dev);
+
+ return 0;
+
+vbus_deinit:
+ msm_ehci_init_vbus(mhcd, 0);
+disable_ldo:
+ msm_ehci_ldo_enable(mhcd, 0);
+deinit_ldo:
+ msm_ehci_ldo_init(mhcd, 0);
+deinit_vddcx:
+ msm_ehci_init_vddcx(mhcd, 0);
+deinit_clocks:
+ msm_ehci_init_clocks(mhcd, 0);
+unmap:
+ iounmap(hcd->regs);
+put_hcd:
+ usb_put_hcd(hcd);
+
+ return ret;
+}
+
+static int __devexit ehci_msm2_remove(struct platform_device *pdev)
+{
+ struct usb_hcd *hcd = platform_get_drvdata(pdev);
+ struct msm_hcd *mhcd = hcd_to_mhcd(hcd);
+
+ device_init_wakeup(&pdev->dev, 0);
+ pm_runtime_disable(&pdev->dev);
+ pm_runtime_set_suspended(&pdev->dev);
+
+ usb_remove_hcd(hcd);
+
+ msm_ehci_vbus_power(mhcd, 0);
+ msm_ehci_init_vbus(mhcd, 0);
+ msm_ehci_ldo_enable(mhcd, 0);
+ msm_ehci_ldo_init(mhcd, 0);
+ msm_ehci_init_vddcx(mhcd, 0);
+
+ msm_ehci_init_clocks(mhcd, 0);
+ wake_lock_destroy(&mhcd->wlock);
+ iounmap(hcd->regs);
+ usb_put_hcd(hcd);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int ehci_msm2_pm_suspend(struct device *dev)
+{
+ struct usb_hcd *hcd = dev_get_drvdata(dev);
+ struct msm_hcd *mhcd = hcd_to_mhcd(hcd);
+
+ dev_dbg(dev, "ehci-msm2 PM suspend\n");
+
+ if (device_may_wakeup(dev))
+ enable_irq_wake(hcd->irq);
+
+ return msm_ehci_suspend(mhcd);
+
+}
+
+static int ehci_msm2_pm_resume(struct device *dev)
+{
+ int ret;
+ struct usb_hcd *hcd = dev_get_drvdata(dev);
+ struct msm_hcd *mhcd = hcd_to_mhcd(hcd);
+
+ dev_dbg(dev, "ehci-msm2 PM resume\n");
+
+ if (device_may_wakeup(dev))
+ disable_irq_wake(hcd->irq);
+
+ ret = msm_ehci_resume(mhcd);
+ if (ret)
+ return ret;
+
+ /* Bring the device to full powered state upon system resume */
+ pm_runtime_disable(dev);
+ pm_runtime_set_active(dev);
+ pm_runtime_enable(dev);
+
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_PM_RUNTIME
+static int ehci_msm2_runtime_idle(struct device *dev)
+{
+ dev_dbg(dev, "EHCI runtime idle\n");
+
+ return 0;
+}
+
+static int ehci_msm2_runtime_suspend(struct device *dev)
+{
+ struct usb_hcd *hcd = dev_get_drvdata(dev);
+ struct msm_hcd *mhcd = hcd_to_mhcd(hcd);
+
+ dev_dbg(dev, "EHCI runtime suspend\n");
+ return msm_ehci_suspend(mhcd);
+}
+
+static int ehci_msm2_runtime_resume(struct device *dev)
+{
+ struct usb_hcd *hcd = dev_get_drvdata(dev);
+ struct msm_hcd *mhcd = hcd_to_mhcd(hcd);
+
+ dev_dbg(dev, "EHCI runtime resume\n");
+ return msm_ehci_resume(mhcd);
+}
+#endif
+
+#ifdef CONFIG_PM
+static const struct dev_pm_ops ehci_msm2_dev_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(ehci_msm2_pm_suspend, ehci_msm2_pm_resume)
+ SET_RUNTIME_PM_OPS(ehci_msm2_runtime_suspend, ehci_msm2_runtime_resume,
+ ehci_msm2_runtime_idle)
+};
+#endif
+
+static struct platform_driver ehci_msm2_driver = {
+ .probe = ehci_msm2_probe,
+ .remove = __devexit_p(ehci_msm2_remove),
+ .driver = {
+ .name = "msm_ehci_host",
+#ifdef CONFIG_PM
+ .pm = &ehci_msm2_dev_pm_ops,
+#endif
+ },
+};
diff --git a/drivers/usb/host/ehci-msm72k.c b/drivers/usb/host/ehci-msm72k.c
index b3939ef..bf2cbd1 100644
--- a/drivers/usb/host/ehci-msm72k.c
+++ b/drivers/usb/host/ehci-msm72k.c
@@ -605,19 +605,6 @@
return retval;
}
-#ifdef CONFIG_USB_OTG
-static void ehci_msm_start_hnp(struct ehci_hcd *ehci)
-{
- struct usb_hcd *hcd = ehci_to_hcd(ehci);
- struct msmusb_hcd *mhcd = hcd_to_mhcd(hcd);
-
- /* OTG driver handles HNP */
- otg_start_hnp(mhcd->xceiv);
-}
-#else
-#define ehci_msm_start_hnp NULL
-#endif
-
static int msm_xusb_init_host(struct platform_device *pdev,
struct msmusb_hcd *mhcd)
{
@@ -645,9 +632,9 @@
otg = container_of(mhcd->xceiv, struct msm_otg, otg);
hcd->regs = otg->regs;
otg->start_host = msm_hsusb_start_host;
- ehci->start_hnp = ehci_msm_start_hnp;
ret = otg_set_host(mhcd->xceiv, &hcd->self);
+ ehci->transceiver = mhcd->xceiv;
break;
case USB_PHY_SERIAL_PMIC:
hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
@@ -753,6 +740,7 @@
case USB_PHY_INTEGRATED:
if (pdata->vbus_init)
pdata->vbus_init(0);
+ hcd_to_ehci(hcd)->transceiver = NULL;
otg_set_host(mhcd->xceiv, NULL);
otg_put_transceiver(mhcd->xceiv);
cancel_work_sync(&mhcd->otg_work);
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index 05c7faf..2c4f291 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -124,8 +124,6 @@
ktime_t last_periodic_enable;
u32 command;
- void (*start_hnp)(struct ehci_hcd *ehci);
-
/* SILICON QUIRKS */
unsigned no_selective_suspend:1;
unsigned has_fsl_port_bug:1; /* FreeScale */
diff --git a/drivers/usb/misc/diag_bridge.c b/drivers/usb/misc/diag_bridge.c
index aab5b98..9794918 100644
--- a/drivers/usb/misc/diag_bridge.c
+++ b/drivers/usb/misc/diag_bridge.c
@@ -82,6 +82,7 @@
urb->status, urb->actual_length);
if (urb->status == -EPROTO) {
+ dev_err(&dev->udev->dev, "%s: proto error\n", __func__);
/* save error so that subsequent read/write returns ESHUTDOWN */
dev->err = urb->status;
return;
@@ -119,27 +120,36 @@
if (dev->err)
return -ESHUTDOWN;
- urb = usb_alloc_urb(0, GFP_ATOMIC);
+ urb = usb_alloc_urb(0, GFP_KERNEL);
if (!urb) {
dev_err(&dev->udev->dev, "unable to allocate urb\n");
return -ENOMEM;
}
+ ret = usb_autopm_get_interface(dev->ifc);
+ if (ret < 0) {
+ dev_err(&dev->udev->dev, "autopm_get failed:%d\n", ret);
+ usb_free_urb(urb);
+ return ret;
+ }
+
pipe = usb_rcvbulkpipe(dev->udev, dev->in_epAddr);
usb_fill_bulk_urb(urb, dev->udev, pipe, data, size,
diag_bridge_read_cb, dev);
usb_anchor_urb(urb, &dev->submitted);
dev->pending_reads++;
- ret = usb_submit_urb(urb, GFP_ATOMIC);
+ ret = usb_submit_urb(urb, GFP_KERNEL);
if (ret) {
dev_err(&dev->udev->dev, "submitting urb failed err:%d\n", ret);
dev->pending_reads--;
usb_unanchor_urb(urb);
usb_free_urb(urb);
+ usb_autopm_put_interface(dev->ifc);
return ret;
}
+ usb_autopm_put_interface(dev->ifc);
usb_free_urb(urb);
return 0;
@@ -153,7 +163,10 @@
dev_dbg(&dev->udev->dev, "%s:\n", __func__);
+ usb_autopm_put_interface_async(dev->ifc);
+
if (urb->status == -EPROTO) {
+ dev_err(&dev->udev->dev, "%s: proto error\n", __func__);
/* save error so that subsequent read/write returns ESHUTDOWN */
dev->err = urb->status;
return;
@@ -191,24 +204,32 @@
if (dev->err)
return -ESHUTDOWN;
- urb = usb_alloc_urb(0, GFP_ATOMIC);
+ urb = usb_alloc_urb(0, GFP_KERNEL);
if (!urb) {
err("unable to allocate urb");
return -ENOMEM;
}
+ ret = usb_autopm_get_interface(dev->ifc);
+ if (ret < 0) {
+ dev_err(&dev->udev->dev, "autopm_get failed:%d\n", ret);
+ usb_free_urb(urb);
+ return ret;
+ }
+
pipe = usb_sndbulkpipe(dev->udev, dev->out_epAddr);
usb_fill_bulk_urb(urb, dev->udev, pipe, data, size,
diag_bridge_write_cb, dev);
usb_anchor_urb(urb, &dev->submitted);
dev->pending_writes++;
- ret = usb_submit_urb(urb, GFP_ATOMIC);
+ ret = usb_submit_urb(urb, GFP_KERNEL);
if (ret) {
dev_err(&dev->udev->dev, "submitting urb failed err:%d\n", ret);
dev->pending_writes--;
usb_unanchor_urb(urb);
usb_free_urb(urb);
+ usb_autopm_put_interface(dev->ifc);
return ret;
}
@@ -381,6 +402,37 @@
usb_set_intfdata(ifc, NULL);
}
+static int diag_bridge_suspend(struct usb_interface *ifc, pm_message_t message)
+{
+ struct diag_bridge *dev = usb_get_intfdata(ifc);
+ struct diag_bridge_ops *cbs = dev->ops;
+ int ret = 0;
+
+ if (cbs && cbs->suspend) {
+ ret = cbs->suspend(cbs->ctxt);
+ if (ret) {
+ dev_dbg(&dev->udev->dev,
+ "%s: diag veto'd suspend\n", __func__);
+ return ret;
+ }
+
+ usb_kill_anchored_urbs(&dev->submitted);
+ }
+
+ return ret;
+}
+
+static int diag_bridge_resume(struct usb_interface *ifc)
+{
+ struct diag_bridge *dev = usb_get_intfdata(ifc);
+ struct diag_bridge_ops *cbs = dev->ops;
+
+
+ if (cbs && cbs->resume)
+ cbs->resume(cbs->ctxt);
+
+ return 0;
+}
#define VALID_INTERFACE_NUM 0
static const struct usb_device_id diag_bridge_ids[] = {
@@ -390,6 +442,8 @@
.driver_info = VALID_INTERFACE_NUM, },
{ USB_DEVICE(0x5c6, 0x9048),
.driver_info = VALID_INTERFACE_NUM, },
+ { USB_DEVICE(0x5c6, 0x904C),
+ .driver_info = VALID_INTERFACE_NUM, },
{} /* terminating entry */
};
@@ -399,7 +453,10 @@
.name = "diag_bridge",
.probe = diag_bridge_probe,
.disconnect = diag_bridge_disconnect,
+ .suspend = diag_bridge_suspend,
+ .resume = diag_bridge_resume,
.id_table = diag_bridge_ids,
+ .supports_autosuspend = 1,
};
static int __init diag_bridge_init(void)
@@ -408,8 +465,7 @@
ret = usb_register(&diag_bridge_driver);
if (ret) {
- err("%s: unable to register diag driver",
- __func__);
+ err("%s: unable to register diag driver", __func__);
return ret;
}
diff --git a/drivers/usb/misc/mdm_ctrl_bridge.c b/drivers/usb/misc/mdm_ctrl_bridge.c
index 584503a..c23c7b1 100644
--- a/drivers/usb/misc/mdm_ctrl_bridge.c
+++ b/drivers/usb/misc/mdm_ctrl_bridge.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -38,8 +38,9 @@
#define ACM_CTRL_DTR (1 << 0)
#define DEFAULT_READ_URB_LENGTH 4096
-struct ctrl_bridge {
+#define SUSPENDED BIT(0)
+struct ctrl_bridge {
struct usb_device *udev;
struct usb_interface *intf;
@@ -51,11 +52,14 @@
void *readbuf;
struct usb_anchor tx_submitted;
+ struct usb_anchor tx_deferred;
struct usb_ctrlrequest *in_ctlreq;
struct bridge *brdg;
struct platform_device *pdev;
+ unsigned long flags;
+
/* input control lines (DSR, CTS, CD, RI) */
unsigned int cbits_tohost;
@@ -68,7 +72,6 @@
unsigned int resp_avail;
unsigned int set_ctrl_line_sts;
unsigned int notify_ser_state;
-
};
static struct ctrl_bridge *__dev[MAX_BRIDGE_DEVICES];
@@ -157,11 +160,14 @@
if (resubmit_urb) {
/*re- submit int urb to check response available*/
+ usb_anchor_urb(dev->inturb, &dev->tx_submitted);
status = usb_submit_urb(dev->inturb, GFP_ATOMIC);
- if (status)
+ if (status) {
dev_err(&udev->dev,
"%s: Error re-submitting Int URB %d\n",
__func__, status);
+ usb_unanchor_urb(dev->inturb);
+ }
}
}
@@ -210,11 +216,13 @@
DEFAULT_READ_URB_LENGTH,
resp_avail_cb, dev);
+ usb_anchor_urb(dev->readurb, &dev->tx_submitted);
status = usb_submit_urb(dev->readurb, GFP_ATOMIC);
if (status) {
dev_err(&udev->dev,
"%s: Error submitting Read URB %d\n",
__func__, status);
+ usb_unanchor_urb(dev->readurb);
goto resubmit_int_urb;
}
return;
@@ -238,52 +246,42 @@
}
resubmit_int_urb:
+ usb_anchor_urb(urb, &dev->tx_submitted);
status = usb_submit_urb(urb, GFP_ATOMIC);
- if (status)
+ if (status) {
dev_err(&udev->dev, "%s: Error re-submitting Int URB %d\n",
__func__, status);
+ usb_unanchor_urb(urb);
+ }
}
int ctrl_bridge_start_read(struct ctrl_bridge *dev)
{
- int retval = 0;
- struct usb_device *udev;
+ int retval = 0;
- udev = interface_to_usbdev(dev->intf);
-
- retval = usb_autopm_get_interface_async(dev->intf);
- if (retval < 0) {
- dev_err(&udev->dev, "%s resumption fail\n", __func__);
- goto done_nopm;
+ if (!dev->inturb) {
+ dev_err(&dev->udev->dev, "%s: inturb is NULL\n", __func__);
+ return -ENODEV;
}
- retval = usb_submit_urb(dev->inturb, GFP_KERNEL);
- if (retval < 0)
- dev_err(&udev->dev, "%s intr submit %d\n", __func__, retval);
+ if (!dev->inturb->anchor) {
+ usb_anchor_urb(dev->inturb, &dev->tx_submitted);
+ retval = usb_submit_urb(dev->inturb, GFP_KERNEL);
+ if (retval < 0) {
+ dev_err(&dev->udev->dev,
+ "%s error submitting int urb %d\n",
+ __func__, retval);
+ usb_unanchor_urb(dev->inturb);
+ }
+ }
- usb_autopm_put_interface_async(dev->intf);
-done_nopm:
return retval;
}
-static int ctrl_bridge_stop_read(struct ctrl_bridge *dev)
-{
- if (dev->readurb) {
- dev_dbg(&dev->udev->dev, "killing rcv urb\n");
- usb_unlink_urb(dev->readurb);
- }
-
- if (dev->inturb) {
- dev_dbg(&dev->udev->dev, "killing int urb\n");
- usb_unlink_urb(dev->inturb);
- }
-
- return 0;
-}
-
int ctrl_bridge_open(struct bridge *brdg)
{
struct ctrl_bridge *dev;
+ int ret;
if (!brdg) {
err("bridge is null\n");
@@ -306,7 +304,16 @@
dev->set_ctrl_line_sts = 0;
dev->notify_ser_state = 0;
- return ctrl_bridge_start_read(dev);
+ ret = usb_autopm_get_interface(dev->intf);
+ if (ret < 0) {
+ dev_err(&dev->udev->dev, "%s autopm_get fail: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = ctrl_bridge_start_read(dev);
+ usb_autopm_put_interface(dev->intf);
+ return ret;
}
EXPORT_SYMBOL(ctrl_bridge_open);
@@ -325,7 +332,6 @@
ctrl_bridge_set_cbits(dev->brdg->ch_id, 0);
usb_unlink_anchored_urbs(&dev->tx_submitted);
- ctrl_bridge_stop_read(dev);
dev->brdg = NULL;
}
@@ -423,6 +429,11 @@
goto free_ctrlreq;
}
+ if (test_bit(SUSPENDED, &dev->flags)) {
+ usb_anchor_urb(writeurb, &dev->tx_deferred);
+ goto deferred;
+ }
+
usb_anchor_urb(writeurb, &dev->tx_submitted);
result = usb_submit_urb(writeurb, GFP_ATOMIC);
if (result < 0) {
@@ -431,7 +442,7 @@
usb_autopm_put_interface_async(dev->intf);
goto unanchor_urb;
}
-
+deferred:
return size;
unanchor_urb:
@@ -458,14 +469,16 @@
if (!dev)
return -ENODEV;
+ set_bit(SUSPENDED, &dev->flags);
usb_kill_anchored_urbs(&dev->tx_submitted);
- return ctrl_bridge_stop_read(dev);
+ return 0;
}
int ctrl_bridge_resume(unsigned int id)
{
struct ctrl_bridge *dev;
+ struct urb *urb;
if (id >= MAX_BRIDGE_DEVICES)
return -EINVAL;
@@ -474,7 +487,28 @@
if (!dev)
return -ENODEV;
- return ctrl_bridge_start_read(dev);
+ if (!test_and_clear_bit(SUSPENDED, &dev->flags))
+ return 0;
+
+ /* submit pending write requests */
+ while ((urb = usb_get_from_anchor(&dev->tx_deferred))) {
+ int ret;
+ usb_anchor_urb(urb, &dev->tx_submitted);
+ ret = usb_submit_urb(urb, GFP_ATOMIC);
+ if (ret < 0) {
+ usb_unanchor_urb(urb);
+ kfree(urb->setup_packet);
+ kfree(urb->transfer_buffer);
+ usb_free_urb(urb);
+ usb_autopm_put_interface_async(dev->intf);
+ }
+ }
+
+ /* if the bridge is open, resume reading */
+ if (dev->brdg)
+ return ctrl_bridge_start_read(dev);
+
+ return 0;
}
#if defined(CONFIG_DEBUG_FS)
@@ -505,7 +539,8 @@
"set ctrlline sts cnt: %u\n"
"notify ser state cnt: %u\n"
"cbits_tomdm: %d\n"
- "cbits_tohost: %d\n",
+ "cbits_tohost: %d\n"
+ "suspended: %d\n",
dev->pdev->name, dev,
dev->snd_encap_cmd,
dev->get_encap_res,
@@ -513,8 +548,8 @@
dev->set_ctrl_line_sts,
dev->notify_ser_state,
dev->cbits_tomdm,
- dev->cbits_tohost);
-
+ dev->cbits_tohost,
+ test_bit(SUSPENDED, &dev->flags));
}
ret = simple_read_from_buffer(ubuf, count, ppos, buf, temp);
@@ -608,6 +643,7 @@
dev->intf = ifc;
init_usb_anchor(&dev->tx_submitted);
+ init_usb_anchor(&dev->tx_deferred);
/*use max pkt size from ep desc*/
ep = &dev->intf->cur_altsetting->endpoint[0].desc;
diff --git a/drivers/usb/misc/mdm_data_bridge.c b/drivers/usb/misc/mdm_data_bridge.c
index 687c8c5..cce819f 100644
--- a/drivers/usb/misc/mdm_data_bridge.c
+++ b/drivers/usb/misc/mdm_data_bridge.c
@@ -61,6 +61,8 @@
struct data_bridge {
struct usb_interface *intf;
struct usb_device *udev;
+ int id;
+
unsigned int bulk_in;
unsigned int bulk_out;
int err;
@@ -543,6 +545,9 @@
struct urb *urb;
int retval;
+ if (!test_and_clear_bit(SUSPENDED, &dev->flags))
+ return 0;
+
while ((urb = usb_get_from_anchor(&dev->delayed))) {
usb_anchor_urb(urb, &dev->tx_active);
atomic_inc(&dev->pending_txurbs);
@@ -559,8 +564,6 @@
dev->txurb_drp_cnt--;
}
- clear_bit(SUSPENDED, &dev->flags);
-
if (dev->brdg)
queue_work(dev->wq, &dev->process_rx_w);
@@ -572,16 +575,16 @@
int retval = 0;
int oldstate;
struct data_bridge *dev = usb_get_intfdata(iface);
- struct bridge *brdg = dev->brdg;
oldstate = iface->dev.power.power_state.event;
iface->dev.power.power_state.event = PM_EVENT_ON;
- retval = data_bridge_resume(dev);
- if (!retval) {
- if (oldstate & PM_EVENT_SUSPEND && brdg)
- retval = ctrl_bridge_resume(brdg->ch_id);
+ if (oldstate & PM_EVENT_SUSPEND) {
+ retval = data_bridge_resume(dev);
+ if (!retval)
+ retval = ctrl_bridge_resume(dev->id);
}
+
return retval;
}
@@ -603,19 +606,13 @@
{
int retval;
struct data_bridge *dev = usb_get_intfdata(intf);
- struct bridge *brdg = dev->brdg;
retval = data_bridge_suspend(dev, message);
if (!retval) {
- if (message.event & PM_EVENT_SUSPEND) {
- if (brdg)
- retval = ctrl_bridge_suspend(brdg->ch_id);
- intf->dev.power.power_state.event = message.event;
- }
- } else {
- dev_dbg(&dev->udev->dev, "%s: device is busy,cannot suspend\n",
- __func__);
+ retval = ctrl_bridge_suspend(dev->id);
+ intf->dev.power.power_state.event = message.event;
}
+
return retval;
}
@@ -646,7 +643,7 @@
skb_queue_head_init(&dev->rx_done);
dev->wq = bridge_wq;
-
+ dev->id = id;
dev->udev = interface_to_usbdev(iface);
dev->intf = iface;
@@ -1016,6 +1013,7 @@
#define PID9001_IFACE_MASK 0xC
#define PID9034_IFACE_MASK 0xC
#define PID9048_IFACE_MASK 0x18
+#define PID904C_IFACE_MASK 0x28
static const struct usb_device_id bridge_ids[] = {
{ USB_DEVICE(0x5c6, 0x9001),
@@ -1027,6 +1025,9 @@
{ USB_DEVICE(0x5c6, 0x9048),
.driver_info = PID9048_IFACE_MASK,
},
+ { USB_DEVICE(0x5c6, 0x904c),
+ .driver_info = PID904C_IFACE_MASK,
+ },
{ } /* Terminating entry */
};
diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c
index 548338c..784910a 100644
--- a/drivers/usb/musb/musb_gadget.c
+++ b/drivers/usb/musb/musb_gadget.c
@@ -1715,6 +1715,10 @@
return 0;
}
+static int musb_gadget_start(struct usb_gadget_driver *driver,
+ int (*bind)(struct usb_gadget *));
+static int musb_gadget_stop(struct usb_gadget_driver *driver);
+
static const struct usb_gadget_ops musb_gadget_operations = {
.get_frame = musb_gadget_get_frame,
.wakeup = musb_gadget_wakeup,
@@ -1722,6 +1726,8 @@
/* .vbus_session = musb_gadget_vbus_session, */
.vbus_draw = musb_gadget_vbus_draw,
.pullup = musb_gadget_pullup,
+ .start = musb_gadget_start,
+ .stop = musb_gadget_stop,
};
/* ----------------------------------------------------------------------- */
@@ -1846,7 +1852,16 @@
if (status != 0) {
put_device(&musb->g.dev);
the_gadget = NULL;
+ return status;
}
+ status = usb_add_gadget_udc(musb->controller, &musb->g);
+ if (status)
+ goto err;
+
+ return 0;
+err:
+ device_unregister(&musb->g.dev);
+ the_gadget = NULL;
return status;
}
@@ -1855,6 +1870,7 @@
if (musb != the_gadget)
return;
+ usb_del_gadget_udc(&musb->g);
device_unregister(&musb->g.dev);
the_gadget = NULL;
}
@@ -1871,7 +1887,7 @@
* @param bind the driver's bind function
* @return <0 if error, 0 if everything is fine
*/
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int musb_gadget_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct musb *musb = the_gadget;
@@ -1973,7 +1989,6 @@
err0:
return retval;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
static void stop_activity(struct musb *musb, struct usb_gadget_driver *driver)
{
@@ -2023,7 +2038,7 @@
*
* @param driver the gadget driver to unregister
*/
-int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+static int musb_gadget_stop(struct usb_gadget_driver *driver)
{
struct musb *musb = the_gadget;
unsigned long flags;
@@ -2082,8 +2097,6 @@
return 0;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
-
/* ----------------------------------------------------------------------- */
diff --git a/drivers/usb/otg/msm_otg.c b/drivers/usb/otg/msm_otg.c
index 6964835..7ee02df 100644
--- a/drivers/usb/otg/msm_otg.c
+++ b/drivers/usb/otg/msm_otg.c
@@ -33,6 +33,7 @@
#include <linux/usb/ulpi.h>
#include <linux/usb/gadget.h>
#include <linux/usb/hcd.h>
+#include <linux/usb/quirks.h>
#include <linux/usb/msm_hsusb.h>
#include <linux/usb/msm_hsusb_hw.h>
#include <linux/regulator/consumer.h>
@@ -49,8 +50,8 @@
#define DRIVER_NAME "msm_otg"
#define ID_TIMER_FREQ (jiffies + msecs_to_jiffies(2000))
+#define ID_TIMER_INITIAL_FREQ (jiffies + msecs_to_jiffies(1000))
#define ULPI_IO_TIMEOUT_USEC (10 * 1000)
-
#define USB_PHY_3P3_VOL_MIN 3050000 /* uV */
#define USB_PHY_3P3_VOL_MAX 3300000 /* uV */
#define USB_PHY_3P3_HPM_LOAD 50000 /* uA */
@@ -67,6 +68,7 @@
static DECLARE_COMPLETION(pmic_vbus_init);
static struct msm_otg *the_msm_otg;
static bool debug_aca_enabled;
+static bool debug_bus_voting_enabled;
/* Prevent idle power collapse(pc) while operating in peripheral mode */
static void otg_pm_qos_update_latency(struct msm_otg *dev, int vote)
@@ -580,25 +582,190 @@
return 0;
}
+static const char *timer_string(int bit)
+{
+ switch (bit) {
+ case A_WAIT_VRISE: return "a_wait_vrise";
+ case A_WAIT_VFALL: return "a_wait_vfall";
+ case B_SRP_FAIL: return "b_srp_fail";
+ case A_WAIT_BCON: return "a_wait_bcon";
+ case A_AIDL_BDIS: return "a_aidl_bdis";
+ case A_BIDL_ADIS: return "a_bidl_adis";
+ case B_ASE0_BRST: return "b_ase0_brst";
+ case A_TST_MAINT: return "a_tst_maint";
+ case B_TST_SRP: return "b_tst_srp";
+ case B_TST_CONFIG: return "b_tst_config";
+ default: return "UNDEFINED";
+ }
+}
+
+static enum hrtimer_restart msm_otg_timer_func(struct hrtimer *hrtimer)
+{
+ struct msm_otg *motg = container_of(hrtimer, struct msm_otg, timer);
+
+ switch (motg->active_tmout) {
+ case A_WAIT_VRISE:
+ /* TODO: use vbus_vld interrupt */
+ set_bit(A_VBUS_VLD, &motg->inputs);
+ break;
+ case A_TST_MAINT:
+ /* OTG PET: End session after TA_TST_MAINT */
+ set_bit(A_BUS_DROP, &motg->inputs);
+ break;
+ case B_TST_SRP:
+ /*
+ * OTG PET: Initiate SRP after TB_TST_SRP of
+ * previous session end.
+ */
+ set_bit(B_BUS_REQ, &motg->inputs);
+ break;
+ case B_TST_CONFIG:
+ clear_bit(A_CONN, &motg->inputs);
+ break;
+ default:
+ set_bit(motg->active_tmout, &motg->tmouts);
+ }
+
+ pr_debug("expired %s timer\n", timer_string(motg->active_tmout));
+ queue_work(system_nrt_wq, &motg->sm_work);
+ return HRTIMER_NORESTART;
+}
+
+static void msm_otg_del_timer(struct msm_otg *motg)
+{
+ int bit = motg->active_tmout;
+
+ pr_debug("deleting %s timer. remaining %lld msec\n", timer_string(bit),
+ div_s64(ktime_to_us(hrtimer_get_remaining(
+ &motg->timer)), 1000));
+ hrtimer_cancel(&motg->timer);
+ clear_bit(bit, &motg->tmouts);
+}
+
+static void msm_otg_start_timer(struct msm_otg *motg, int time, int bit)
+{
+ clear_bit(bit, &motg->tmouts);
+ motg->active_tmout = bit;
+ pr_debug("starting %s timer\n", timer_string(bit));
+ hrtimer_start(&motg->timer,
+ ktime_set(time / 1000, (time % 1000) * 1000000),
+ HRTIMER_MODE_REL);
+}
+
+static void msm_otg_init_timer(struct msm_otg *motg)
+{
+ hrtimer_init(&motg->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+ motg->timer.function = msm_otg_timer_func;
+}
+
+static int msm_otg_start_hnp(struct otg_transceiver *otg)
+{
+ struct msm_otg *motg = container_of(otg, struct msm_otg, otg);
+
+ if (otg->state != OTG_STATE_A_HOST) {
+ pr_err("HNP can not be initiated in %s state\n",
+ otg_state_string(otg->state));
+ return -EINVAL;
+ }
+
+ pr_debug("A-Host: HNP initiated\n");
+ clear_bit(A_BUS_REQ, &motg->inputs);
+ queue_work(system_nrt_wq, &motg->sm_work);
+ return 0;
+}
+
+static int msm_otg_start_srp(struct otg_transceiver *otg)
+{
+ struct msm_otg *motg = container_of(otg, struct msm_otg, otg);
+ u32 val;
+ int ret = 0;
+
+ if (otg->state != OTG_STATE_B_IDLE) {
+ pr_err("SRP can not be initiated in %s state\n",
+ otg_state_string(otg->state));
+ ret = -EINVAL;
+ goto out;
+ }
+
+ if ((jiffies - motg->b_last_se0_sess) < msecs_to_jiffies(TB_SRP_INIT)) {
+ pr_debug("initial conditions of SRP are not met. Try again"
+ "after some time\n");
+ ret = -EAGAIN;
+ goto out;
+ }
+
+ pr_debug("B-Device SRP started\n");
+
+ /*
+ * PHY won't pull D+ high unless it detects Vbus valid.
+ * Since by definition, SRP is only done when Vbus is not valid,
+ * software work-around needs to be used to spoof the PHY into
+ * thinking it is valid. This can be done using the VBUSVLDEXTSEL and
+ * VBUSVLDEXT register bits.
+ */
+ ulpi_write(otg, 0x03, 0x97);
+ /*
+ * Harware auto assist data pulsing: Data pulse is given
+ * for 7msec; wait for vbus
+ */
+ val = readl_relaxed(USB_OTGSC);
+ writel_relaxed((val & ~OTGSC_INTSTS_MASK) | OTGSC_HADP, USB_OTGSC);
+
+ /* VBUS plusing is obsoleted in OTG 2.0 supplement */
+out:
+ return ret;
+}
+
+static void msm_otg_host_hnp_enable(struct otg_transceiver *otg, bool enable)
+{
+ struct usb_hcd *hcd = bus_to_hcd(otg->host);
+ struct usb_device *rhub = otg->host->root_hub;
+
+ if (enable) {
+ pm_runtime_disable(&rhub->dev);
+ rhub->state = USB_STATE_NOTATTACHED;
+ hcd->driver->bus_suspend(hcd);
+ clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
+ } else {
+ usb_remove_hcd(hcd);
+ msm_otg_reset(otg);
+ usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
+ }
+}
+
static int msm_otg_set_suspend(struct otg_transceiver *otg, int suspend)
{
struct msm_otg *motg = container_of(otg, struct msm_otg, otg);
- /*
- * Allow bus suspend only for host mode. Device mode bus suspend
- * is not implemented yet.
- */
- if (!test_bit(ID, &motg->inputs) || test_bit(ID_A, &motg->inputs)) {
- /*
- * ID_GND --> ID_A transition can not be detected in LPM.
- * Disallow host bus suspend when ACA is enabled.
- */
- if (suspend && !aca_enabled())
- pm_runtime_put(otg->dev);
- else
- pm_runtime_resume(otg->dev);
- }
+ if (aca_enabled() || (test_bit(ID, &motg->inputs) &&
+ !test_bit(ID_A, &motg->inputs)))
+ return 0;
+ if (suspend) {
+ switch (otg->state) {
+ case OTG_STATE_A_WAIT_BCON:
+ if (TA_WAIT_BCON > 0)
+ break;
+ /* fall through */
+ case OTG_STATE_A_HOST:
+ pr_debug("host bus suspend\n");
+ clear_bit(A_BUS_REQ, &motg->inputs);
+ queue_work(system_nrt_wq, &motg->sm_work);
+ break;
+ default:
+ break;
+ }
+ } else {
+ switch (otg->state) {
+ case OTG_STATE_A_SUSPEND:
+ /* Remote wakeup or resume */
+ set_bit(A_BUS_REQ, &motg->inputs);
+ otg->state = OTG_STATE_A_HOST;
+ break;
+ default:
+ break;
+ }
+ }
return 0;
}
@@ -904,6 +1071,11 @@
static void msm_otg_notify_charger(struct msm_otg *motg, unsigned mA)
{
+ struct usb_gadget *g = motg->otg.gadget;
+
+ if (g && g->is_a_peripheral)
+ return;
+
if ((motg->chg_type == USB_ACA_DOCK_CHARGER ||
motg->chg_type == USB_ACA_A_CHARGER ||
motg->chg_type == USB_ACA_B_CHARGER ||
@@ -986,11 +1158,9 @@
unsigned long action, void *priv)
{
struct msm_otg *motg = container_of(self, struct msm_otg, usbdev_nb);
+ struct otg_transceiver *otg = &motg->otg;
struct usb_device *udev = priv;
- if (!aca_enabled())
- goto out;
-
if (action == USB_BUS_ADD || action == USB_BUS_REMOVE)
goto out;
@@ -1007,17 +1177,47 @@
switch (action) {
case USB_DEVICE_ADD:
- usb_disable_autosuspend(udev);
+ if (aca_enabled())
+ usb_disable_autosuspend(udev);
+ if (otg->state == OTG_STATE_A_WAIT_BCON) {
+ pr_debug("B_CONN set\n");
+ set_bit(B_CONN, &motg->inputs);
+ msm_otg_del_timer(motg);
+ otg->state = OTG_STATE_A_HOST;
+ /*
+ * OTG PET: A-device must end session within
+ * 10 sec after PET enumeration.
+ */
+ if (udev->quirks & USB_QUIRK_OTG_PET)
+ msm_otg_start_timer(motg, TA_TST_MAINT,
+ A_TST_MAINT);
+ }
/* fall through */
case USB_DEVICE_CONFIG:
if (udev->actconfig)
motg->mA_port = udev->actconfig->desc.bMaxPower * 2;
else
motg->mA_port = IUNIT;
+ if (otg->state == OTG_STATE_B_HOST)
+ msm_otg_del_timer(motg);
break;
case USB_DEVICE_REMOVE:
- motg->mA_port = IUNIT;
- break;
+ if ((otg->state == OTG_STATE_A_HOST) ||
+ (otg->state == OTG_STATE_A_SUSPEND)) {
+ pr_debug("B_CONN clear\n");
+ clear_bit(B_CONN, &motg->inputs);
+ /*
+ * OTG PET: A-device must end session after
+ * PET disconnection if it is enumerated
+ * with bcdDevice[0] = 1. USB core sets
+ * bus->otg_vbus_off for us. clear it here.
+ */
+ if (udev->bus->otg_vbus_off) {
+ udev->bus->otg_vbus_off = 0;
+ set_bit(A_BUS_DROP, &motg->inputs);
+ }
+ queue_work(system_nrt_wq, &motg->sm_work);
+ }
default:
break;
}
@@ -1100,7 +1300,7 @@
msm_hsusb_vbus_power(motg, 0);
otg->host = NULL;
otg->state = OTG_STATE_UNDEFINED;
- schedule_work(&motg->sm_work);
+ queue_work(system_nrt_wq, &motg->sm_work);
} else {
otg->host = NULL;
}
@@ -1114,6 +1314,9 @@
hcd = bus_to_hcd(host);
hcd->power_budget = motg->pdata->power_budget;
+#ifdef CONFIG_USB_OTG
+ host->otg_port = 1;
+#endif
motg->usbdev_nb.notifier_call = msm_otg_usbdev_notify;
usb_register_notify(&motg->usbdev_nb);
otg->host = host;
@@ -1125,7 +1328,7 @@
*/
if (motg->pdata->mode == USB_HOST || otg->gadget) {
pm_runtime_get_sync(otg->dev);
- schedule_work(&motg->sm_work);
+ queue_work(system_nrt_wq, &motg->sm_work);
}
return 0;
@@ -1155,7 +1358,7 @@
*/
otg_pm_qos_update_latency(motg, 1);
/* Configure BUS performance parameters for MAX bandwidth */
- if (motg->bus_perf_client) {
+ if (motg->bus_perf_client && debug_bus_voting_enabled) {
ret = msm_bus_scale_client_update_request(
motg->bus_perf_client, 1);
if (ret)
@@ -1201,7 +1404,7 @@
msm_otg_start_peripheral(otg, 0);
otg->gadget = NULL;
otg->state = OTG_STATE_UNDEFINED;
- schedule_work(&motg->sm_work);
+ queue_work(system_nrt_wq, &motg->sm_work);
} else {
otg->gadget = NULL;
}
@@ -1217,7 +1420,7 @@
*/
if (motg->pdata->mode == USB_PERIPHERAL || otg->host) {
pm_runtime_get_sync(otg->dev);
- schedule_work(&motg->sm_work);
+ queue_work(system_nrt_wq, &motg->sm_work);
}
return 0;
@@ -1379,6 +1582,7 @@
static void msm_otg_id_timer_func(unsigned long data)
{
struct msm_otg *motg = (struct msm_otg *) data;
+ struct otg_transceiver *otg = &motg->otg;
if (!aca_enabled())
return;
@@ -1388,11 +1592,15 @@
return;
}
+ if (otg->state == OTG_STATE_A_SUSPEND)
+ goto out;
+
if (msm_chg_check_aca_intr(motg)) {
dev_dbg(motg->otg.dev, "timer: aca work\n");
- schedule_work(&motg->sm_work);
+ queue_work(system_nrt_wq, &motg->sm_work);
}
+out:
if (!test_bit(ID, &motg->inputs) || test_bit(ID_A, &motg->inputs))
mod_timer(&motg->id_timer, ID_TIMER_FREQ);
}
@@ -1733,16 +1941,22 @@
case USB_CHG_STATE_DETECTED:
msm_chg_block_off(motg);
msm_chg_enable_aca_det(motg);
+ /*
+ * Spurious interrupt is seen after enabling ACA detection
+ * due to which charger detection fails in case of PET.
+ * Add delay of 100 microsec to avoid that.
+ */
+ udelay(100);
msm_chg_enable_aca_intr(motg);
dev_dbg(otg->dev, "chg_type = %s\n",
chg_to_string(motg->chg_type));
- schedule_work(&motg->sm_work);
+ queue_work(system_nrt_wq, &motg->sm_work);
return;
default:
return;
}
- schedule_delayed_work(&motg->chg_work, delay);
+ queue_delayed_work(system_nrt_wq, &motg->chg_work, delay);
}
/*
@@ -1770,10 +1984,12 @@
clear_bit(B_SESS_VLD, &motg->inputs);
}
} else if (pdata->otg_control == OTG_PHY_CONTROL) {
- if (otgsc & OTGSC_ID)
+ if (otgsc & OTGSC_ID) {
set_bit(ID, &motg->inputs);
- else
+ } else {
clear_bit(ID, &motg->inputs);
+ set_bit(A_BUS_REQ, &motg->inputs);
+ }
if (otgsc & OTGSC_BSV)
set_bit(B_SESS_VLD, &motg->inputs);
else
@@ -1819,11 +2035,12 @@
{
struct msm_otg *motg = container_of(w, struct msm_otg, sm_work);
struct otg_transceiver *otg = &motg->otg;
+ bool work = 0, srp_reqd;
pm_runtime_resume(otg->dev);
+ pr_debug("%s work\n", otg_state_string(otg->state));
switch (otg->state) {
case OTG_STATE_UNDEFINED:
- dev_dbg(otg->dev, "OTG_STATE_UNDEFINED state\n");
msm_otg_reset(otg);
msm_otg_init_sm(motg);
otg->state = OTG_STATE_B_IDLE;
@@ -1835,31 +2052,15 @@
}
/* FALL THROUGH */
case OTG_STATE_B_IDLE:
- dev_dbg(otg->dev, "OTG_STATE_B_IDLE state\n");
if ((!test_bit(ID, &motg->inputs) ||
test_bit(ID_A, &motg->inputs)) && otg->host) {
- if (motg->chg_type == USB_ACA_DOCK_CHARGER)
- msm_otg_notify_charger(motg,
- IDEV_ACA_CHG_MAX);
- else if (test_bit(ID_A, &motg->inputs))
- msm_otg_notify_charger(motg,
- IDEV_ACA_CHG_MAX - IUNIT);
- else
- msm_hsusb_vbus_power(motg, 1);
- msm_otg_start_host(otg, 1);
- /*
- * Link can not generate PHY_ALT interrupt
- * in host mode when no device is attached
- * to the port. It is also observed PHY_ALT
- * interrupt missing upon Micro-A cable disconnect.
- * Hence disable PHY_ALT interrupt and perform
- * polling to detect RID change.
- */
- msm_chg_enable_aca_det(motg);
- msm_chg_disable_aca_intr(motg);
- mod_timer(&motg->id_timer, ID_TIMER_FREQ);
- otg->state = OTG_STATE_A_HOST;
+ pr_debug("!id || id_A\n");
+ clear_bit(B_BUS_REQ, &motg->inputs);
+ set_bit(A_BUS_REQ, &motg->inputs);
+ otg->state = OTG_STATE_A_IDLE;
+ work = 1;
} else if (test_bit(B_SESS_VLD, &motg->inputs)) {
+ pr_debug("b_sess_vld\n");
switch (motg->chg_state) {
case USB_CHG_STATE_UNDEFINED:
msm_chg_detect_work(&motg->chg_work.work);
@@ -1905,7 +2106,18 @@
default:
break;
}
+ } else if (test_bit(B_BUS_REQ, &motg->inputs)) {
+ pr_debug("b_sess_end && b_bus_req\n");
+ if (msm_otg_start_srp(otg) < 0) {
+ clear_bit(B_BUS_REQ, &motg->inputs);
+ work = 1;
+ break;
+ }
+ otg->state = OTG_STATE_B_SRP_INIT;
+ msm_otg_start_timer(motg, TB_SRP_FAIL, B_SRP_FAIL);
+ break;
} else {
+ pr_debug("chg_work cancel");
cancel_delayed_work_sync(&motg->chg_work);
msm_otg_notify_charger(motg, 0);
motg->chg_state = USB_CHG_STATE_UNDEFINED;
@@ -1915,64 +2127,451 @@
pm_runtime_suspend(otg->dev);
}
break;
- case OTG_STATE_B_PERIPHERAL:
- dev_dbg(otg->dev, "OTG_STATE_B_PERIPHERAL state\n");
- if (!test_bit(B_SESS_VLD, &motg->inputs) ||
- !test_bit(ID, &motg->inputs) ||
- !test_bit(ID_C, &motg->inputs)) {
- msm_otg_start_peripheral(otg, 0);
+ case OTG_STATE_B_SRP_INIT:
+ if (!test_bit(ID, &motg->inputs) ||
+ test_bit(ID_A, &motg->inputs) ||
+ test_bit(ID_C, &motg->inputs) ||
+ (test_bit(B_SESS_VLD, &motg->inputs) &&
+ !test_bit(ID_B, &motg->inputs))) {
+ pr_debug("!id || id_a/c || b_sess_vld+!id_b\n");
+ msm_otg_del_timer(motg);
otg->state = OTG_STATE_B_IDLE;
- schedule_work(w);
+ /*
+ * clear VBUSVLDEXTSEL and VBUSVLDEXT register
+ * bits after SRP initiation.
+ */
+ ulpi_write(otg, 0x0, 0x98);
+ work = 1;
+ } else if (test_bit(B_SRP_FAIL, &motg->tmouts)) {
+ pr_debug("b_srp_fail\n");
+ pr_info("A-device did not respond to SRP\n");
+ clear_bit(B_BUS_REQ, &motg->inputs);
+ clear_bit(B_SRP_FAIL, &motg->tmouts);
+ otg_send_event(OTG_EVENT_NO_RESP_FOR_SRP);
+ ulpi_write(otg, 0x0, 0x98);
+ otg->state = OTG_STATE_B_IDLE;
+ motg->b_last_se0_sess = jiffies;
+ work = 1;
+ }
+ break;
+ case OTG_STATE_B_PERIPHERAL:
+ if (!test_bit(ID, &motg->inputs) ||
+ test_bit(ID_A, &motg->inputs) ||
+ test_bit(ID_B, &motg->inputs) ||
+ !test_bit(B_SESS_VLD, &motg->inputs)) {
+ pr_debug("!id || id_a/b || !b_sess_vld\n");
+ msm_otg_notify_charger(motg, 0);
+ srp_reqd = otg->gadget->otg_srp_reqd;
+ msm_otg_start_peripheral(otg, 0);
+ motg->chg_state = USB_CHG_STATE_UNDEFINED;
+ motg->chg_type = USB_INVALID_CHARGER;
+ if (test_bit(ID_B, &motg->inputs))
+ clear_bit(ID_B, &motg->inputs);
+ clear_bit(B_BUS_REQ, &motg->inputs);
+ otg->state = OTG_STATE_B_IDLE;
+ motg->b_last_se0_sess = jiffies;
+ if (srp_reqd)
+ msm_otg_start_timer(motg,
+ TB_TST_SRP, B_TST_SRP);
+ else
+ work = 1;
+ } else if (test_bit(B_BUS_REQ, &motg->inputs) &&
+ otg->gadget->b_hnp_enable &&
+ test_bit(A_BUS_SUSPEND, &motg->inputs)) {
+ pr_debug("b_bus_req && b_hnp_en && a_bus_suspend\n");
+ msm_otg_start_timer(motg, TB_ASE0_BRST, B_ASE0_BRST);
+ /* D+ pullup should not be disconnected within 4msec
+ * after A device suspends the bus. Otherwise PET will
+ * fail the compliance test.
+ */
+ udelay(1000);
+ msm_otg_start_peripheral(otg, 0);
+ otg->state = OTG_STATE_B_WAIT_ACON;
+ /*
+ * start HCD even before A-device enable
+ * pull-up to meet HNP timings.
+ */
+ otg->host->is_b_host = 1;
+ msm_otg_start_host(otg, 1);
} else if (test_bit(ID_C, &motg->inputs)) {
msm_otg_notify_charger(motg, IDEV_ACA_CHG_MAX);
}
break;
- case OTG_STATE_A_HOST:
- dev_dbg(otg->dev, "OTG_STATE_A_HOST state\n");
- if (test_bit(ID, &motg->inputs) &&
- !test_bit(ID_A, &motg->inputs)) {
- msm_otg_start_host(otg, 0);
- msm_hsusb_vbus_power(motg, 0);
- msleep(100); /* TA_WAIT_VFALL */
+ case OTG_STATE_B_WAIT_ACON:
+ if (!test_bit(ID, &motg->inputs) ||
+ test_bit(ID_A, &motg->inputs) ||
+ test_bit(ID_B, &motg->inputs) ||
+ !test_bit(B_SESS_VLD, &motg->inputs)) {
+ pr_debug("!id || id_a/b || !b_sess_vld\n");
+ msm_otg_del_timer(motg);
/*
- * Exit point of host mode.
- *
- * 1. Micro-A cable disconnect: Just schedule
- * the work. PHY is reset in B_IDLE and LPM
- * is allowed.
- * 2. ID_GND --> ID_B: No need to reset the PHY.
- * HCD core clears all PORTSC bits and initializes
- * the controller to host mode in remove_hcd.
- * Restore PORTSC transceiver select bits (ULPI)
- * and reset the controller to change MODE bits.
- * PHY_ALT interrupt can not occur in host mode.
+ * A-device is physically disconnected during
+ * HNP. Remove HCD.
*/
- del_timer_sync(&motg->id_timer);
- if (motg->chg_state != USB_CHG_STATE_UNDEFINED) {
- msm_otg_link_reset(motg);
- msm_chg_enable_aca_intr(motg);
- }
+ msm_otg_start_host(otg, 0);
+ otg->host->is_b_host = 0;
+
+ clear_bit(B_BUS_REQ, &motg->inputs);
+ clear_bit(A_BUS_SUSPEND, &motg->inputs);
+ motg->b_last_se0_sess = jiffies;
otg->state = OTG_STATE_B_IDLE;
- schedule_work(w);
+ msm_otg_reset(otg);
+ work = 1;
+ } else if (test_bit(A_CONN, &motg->inputs)) {
+ pr_debug("a_conn\n");
+ clear_bit(A_BUS_SUSPEND, &motg->inputs);
+ otg->state = OTG_STATE_B_HOST;
+ /*
+ * PET disconnects D+ pullup after reset is generated
+ * by B device in B_HOST role which is not detected by
+ * B device. As workaorund , start timer of 300msec
+ * and stop timer if A device is enumerated else clear
+ * A_CONN.
+ */
+ msm_otg_start_timer(motg, TB_TST_CONFIG,
+ B_TST_CONFIG);
+ } else if (test_bit(B_ASE0_BRST, &motg->tmouts)) {
+ pr_debug("b_ase0_brst_tmout\n");
+ pr_info("B HNP fail:No response from A device\n");
+ msm_otg_start_host(otg, 0);
+ msm_otg_reset(otg);
+ otg->host->is_b_host = 0;
+ clear_bit(B_ASE0_BRST, &motg->tmouts);
+ clear_bit(A_BUS_SUSPEND, &motg->inputs);
+ clear_bit(B_BUS_REQ, &motg->inputs);
+ otg_send_event(OTG_EVENT_HNP_FAILED);
+ otg->state = OTG_STATE_B_IDLE;
+ work = 1;
+ } else if (test_bit(ID_C, &motg->inputs)) {
+ msm_otg_notify_charger(motg, IDEV_ACA_CHG_MAX);
+ }
+ break;
+ case OTG_STATE_B_HOST:
+ if (!test_bit(B_BUS_REQ, &motg->inputs) ||
+ !test_bit(A_CONN, &motg->inputs) ||
+ !test_bit(B_SESS_VLD, &motg->inputs)) {
+ pr_debug("!b_bus_req || !a_conn || !b_sess_vld\n");
+ clear_bit(A_CONN, &motg->inputs);
+ clear_bit(B_BUS_REQ, &motg->inputs);
+ msm_otg_start_host(otg, 0);
+ otg->host->is_b_host = 0;
+ otg->state = OTG_STATE_B_IDLE;
+ msm_otg_reset(otg);
+ work = 1;
+ } else if (test_bit(ID_C, &motg->inputs)) {
+ msm_otg_notify_charger(motg, IDEV_ACA_CHG_MAX);
+ }
+ break;
+ case OTG_STATE_A_IDLE:
+ otg->default_a = 1;
+ if (test_bit(ID, &motg->inputs) &&
+ !test_bit(ID_A, &motg->inputs)) {
+ pr_debug("id && !id_a\n");
+ otg->default_a = 0;
+ clear_bit(A_BUS_DROP, &motg->inputs);
+ otg->state = OTG_STATE_B_IDLE;
+ del_timer_sync(&motg->id_timer);
+ msm_otg_link_reset(motg);
+ msm_chg_enable_aca_intr(motg);
+ msm_otg_notify_charger(motg, 0);
+ work = 1;
+ } else if (!test_bit(A_BUS_DROP, &motg->inputs) &&
+ (test_bit(A_SRP_DET, &motg->inputs) ||
+ test_bit(A_BUS_REQ, &motg->inputs))) {
+ pr_debug("!a_bus_drop && (a_srp_det || a_bus_req)\n");
+
+ clear_bit(A_SRP_DET, &motg->inputs);
+ /* Disable SRP detection */
+ writel_relaxed((readl_relaxed(USB_OTGSC) &
+ ~OTGSC_INTSTS_MASK) &
+ ~OTGSC_DPIE, USB_OTGSC);
+
+ otg->state = OTG_STATE_A_WAIT_VRISE;
+ /* VBUS should not be supplied before end of SRP pulse
+ * generated by PET, if not complaince test fail.
+ */
+ usleep_range(10000, 12000);
+ /* ACA: ID_A: Stop charging untill enumeration */
+ if (test_bit(ID_A, &motg->inputs))
+ msm_otg_notify_charger(motg, 0);
+ else
+ msm_hsusb_vbus_power(motg, 1);
+ msm_otg_start_timer(motg, TA_WAIT_VRISE, A_WAIT_VRISE);
+ } else {
+ pr_debug("No session requested\n");
+ clear_bit(A_BUS_DROP, &motg->inputs);
+ if (test_bit(ID_A, &motg->inputs)) {
+ msm_otg_notify_charger(motg,
+ IDEV_ACA_CHG_MAX);
+ } else if (!test_bit(ID, &motg->inputs)) {
+ msm_otg_notify_charger(motg, 0);
+ /*
+ * A-device is not providing power on VBUS.
+ * Enable SRP detection.
+ */
+ writel_relaxed(0x13, USB_USBMODE);
+ writel_relaxed((readl_relaxed(USB_OTGSC) &
+ ~OTGSC_INTSTS_MASK) |
+ OTGSC_DPIE, USB_OTGSC);
+ mb();
+ }
+ }
+ break;
+ case OTG_STATE_A_WAIT_VRISE:
+ if ((test_bit(ID, &motg->inputs) &&
+ !test_bit(ID_A, &motg->inputs)) ||
+ test_bit(A_BUS_DROP, &motg->inputs) ||
+ test_bit(A_WAIT_VRISE, &motg->tmouts)) {
+ pr_debug("id || a_bus_drop || a_wait_vrise_tmout\n");
+ clear_bit(A_BUS_REQ, &motg->inputs);
+ msm_otg_del_timer(motg);
+ msm_hsusb_vbus_power(motg, 0);
+ otg->state = OTG_STATE_A_WAIT_VFALL;
+ msm_otg_start_timer(motg, TA_WAIT_VFALL, A_WAIT_VFALL);
+ } else if (test_bit(A_VBUS_VLD, &motg->inputs)) {
+ pr_debug("a_vbus_vld\n");
+ otg->state = OTG_STATE_A_WAIT_BCON;
+ if (TA_WAIT_BCON > 0)
+ msm_otg_start_timer(motg, TA_WAIT_BCON,
+ A_WAIT_BCON);
+ msm_otg_start_host(otg, 1);
+ msm_chg_enable_aca_det(motg);
+ msm_chg_disable_aca_intr(motg);
+ mod_timer(&motg->id_timer, ID_TIMER_INITIAL_FREQ);
+ if (msm_chg_check_aca_intr(motg))
+ work = 1;
+ }
+ break;
+ case OTG_STATE_A_WAIT_BCON:
+ if ((test_bit(ID, &motg->inputs) &&
+ !test_bit(ID_A, &motg->inputs)) ||
+ test_bit(A_BUS_DROP, &motg->inputs) ||
+ test_bit(A_WAIT_BCON, &motg->tmouts)) {
+ pr_debug("(id && id_a/b/c) || a_bus_drop ||"
+ "a_wait_bcon_tmout\n");
+ if (test_bit(A_WAIT_BCON, &motg->tmouts)) {
+ pr_info("Device No Response\n");
+ otg_send_event(OTG_EVENT_DEV_CONN_TMOUT);
+ }
+ msm_otg_del_timer(motg);
+ clear_bit(A_BUS_REQ, &motg->inputs);
+ clear_bit(B_CONN, &motg->inputs);
+ msm_otg_start_host(otg, 0);
+ /*
+ * ACA: ID_A with NO accessory, just the A plug is
+ * attached to ACA: Use IDCHG_MAX for charging
+ */
+ if (test_bit(ID_A, &motg->inputs))
+ msm_otg_notify_charger(motg, IDEV_CHG_MIN);
+ else
+ msm_hsusb_vbus_power(motg, 0);
+ otg->state = OTG_STATE_A_WAIT_VFALL;
+ msm_otg_start_timer(motg, TA_WAIT_VFALL, A_WAIT_VFALL);
+ } else if (!test_bit(A_VBUS_VLD, &motg->inputs)) {
+ pr_debug("!a_vbus_vld\n");
+ clear_bit(B_CONN, &motg->inputs);
+ msm_otg_del_timer(motg);
+ msm_otg_start_host(otg, 0);
+ otg->state = OTG_STATE_A_VBUS_ERR;
+ msm_otg_reset(otg);
+ } else if (test_bit(ID_A, &motg->inputs)) {
+ msm_hsusb_vbus_power(motg, 0);
+ } else if (!test_bit(A_BUS_REQ, &motg->inputs)) {
+ /*
+ * If TA_WAIT_BCON is infinite, we don;t
+ * turn off VBUS. Enter low power mode.
+ */
+ if (TA_WAIT_BCON < 0)
+ pm_runtime_put_sync(otg->dev);
+ } else if (!test_bit(ID, &motg->inputs)) {
+ msm_hsusb_vbus_power(motg, 1);
+ }
+ break;
+ case OTG_STATE_A_HOST:
+ if ((test_bit(ID, &motg->inputs) &&
+ !test_bit(ID_A, &motg->inputs)) ||
+ test_bit(A_BUS_DROP, &motg->inputs)) {
+ pr_debug("id_a/b/c || a_bus_drop\n");
+ clear_bit(B_CONN, &motg->inputs);
+ clear_bit(A_BUS_REQ, &motg->inputs);
+ msm_otg_del_timer(motg);
+ otg->state = OTG_STATE_A_WAIT_VFALL;
+ msm_otg_start_host(otg, 0);
+ if (!test_bit(ID_A, &motg->inputs))
+ msm_hsusb_vbus_power(motg, 0);
+ msm_otg_start_timer(motg, TA_WAIT_VFALL, A_WAIT_VFALL);
+ } else if (!test_bit(A_VBUS_VLD, &motg->inputs)) {
+ pr_debug("!a_vbus_vld\n");
+ clear_bit(B_CONN, &motg->inputs);
+ msm_otg_del_timer(motg);
+ otg->state = OTG_STATE_A_VBUS_ERR;
+ msm_otg_start_host(otg, 0);
+ msm_otg_reset(otg);
+ } else if (!test_bit(A_BUS_REQ, &motg->inputs)) {
+ /*
+ * a_bus_req is de-asserted when root hub is
+ * suspended or HNP is in progress.
+ */
+ pr_debug("!a_bus_req\n");
+ msm_otg_del_timer(motg);
+ otg->state = OTG_STATE_A_SUSPEND;
+ if (otg->host->b_hnp_enable)
+ msm_otg_start_timer(motg, TA_AIDL_BDIS,
+ A_AIDL_BDIS);
+ else
+ pm_runtime_put_sync(otg->dev);
+ } else if (!test_bit(B_CONN, &motg->inputs)) {
+ pr_debug("!b_conn\n");
+ msm_otg_del_timer(motg);
+ otg->state = OTG_STATE_A_WAIT_BCON;
+ if (TA_WAIT_BCON > 0)
+ msm_otg_start_timer(motg, TA_WAIT_BCON,
+ A_WAIT_BCON);
+ if (msm_chg_check_aca_intr(motg))
+ work = 1;
+ } else if (test_bit(ID_A, &motg->inputs)) {
+ msm_otg_del_timer(motg);
+ msm_hsusb_vbus_power(motg, 0);
+ if (motg->chg_type == USB_ACA_DOCK_CHARGER)
+ msm_otg_notify_charger(motg,
+ IDEV_ACA_CHG_MAX);
+ else
+ msm_otg_notify_charger(motg,
+ IDEV_CHG_MIN - motg->mA_port);
+ } else if (!test_bit(ID, &motg->inputs)) {
+ motg->chg_state = USB_CHG_STATE_UNDEFINED;
+ motg->chg_type = USB_INVALID_CHARGER;
+ msm_otg_notify_charger(motg, 0);
+ msm_hsusb_vbus_power(motg, 1);
+ }
+ break;
+ case OTG_STATE_A_SUSPEND:
+ if ((test_bit(ID, &motg->inputs) &&
+ !test_bit(ID_A, &motg->inputs)) ||
+ test_bit(A_BUS_DROP, &motg->inputs) ||
+ test_bit(A_AIDL_BDIS, &motg->tmouts)) {
+ pr_debug("id_a/b/c || a_bus_drop ||"
+ "a_aidl_bdis_tmout\n");
+ msm_otg_del_timer(motg);
+ clear_bit(B_CONN, &motg->inputs);
+ otg->state = OTG_STATE_A_WAIT_VFALL;
+ msm_otg_start_host(otg, 0);
+ msm_otg_reset(otg);
+ if (!test_bit(ID_A, &motg->inputs))
+ msm_hsusb_vbus_power(motg, 0);
+ msm_otg_start_timer(motg, TA_WAIT_VFALL, A_WAIT_VFALL);
+ } else if (!test_bit(A_VBUS_VLD, &motg->inputs)) {
+ pr_debug("!a_vbus_vld\n");
+ msm_otg_del_timer(motg);
+ clear_bit(B_CONN, &motg->inputs);
+ otg->state = OTG_STATE_A_VBUS_ERR;
+ msm_otg_start_host(otg, 0);
+ msm_otg_reset(otg);
+ } else if (!test_bit(B_CONN, &motg->inputs) &&
+ otg->host->b_hnp_enable) {
+ pr_debug("!b_conn && b_hnp_enable");
+ otg->state = OTG_STATE_A_PERIPHERAL;
+ msm_otg_host_hnp_enable(otg, 1);
+ otg->gadget->is_a_peripheral = 1;
+ msm_otg_start_peripheral(otg, 1);
+ } else if (!test_bit(B_CONN, &motg->inputs) &&
+ !otg->host->b_hnp_enable) {
+ pr_debug("!b_conn && !b_hnp_enable");
+ /*
+ * bus request is dropped during suspend.
+ * acquire again for next device.
+ */
+ set_bit(A_BUS_REQ, &motg->inputs);
+ otg->state = OTG_STATE_A_WAIT_BCON;
+ if (TA_WAIT_BCON > 0)
+ msm_otg_start_timer(motg, TA_WAIT_BCON,
+ A_WAIT_BCON);
} else if (test_bit(ID_A, &motg->inputs)) {
msm_hsusb_vbus_power(motg, 0);
msm_otg_notify_charger(motg,
- IDEV_ACA_CHG_MAX - motg->mA_port);
+ IDEV_CHG_MIN - motg->mA_port);
} else if (!test_bit(ID, &motg->inputs)) {
msm_otg_notify_charger(motg, 0);
msm_hsusb_vbus_power(motg, 1);
}
break;
+ case OTG_STATE_A_PERIPHERAL:
+ if ((test_bit(ID, &motg->inputs) &&
+ !test_bit(ID_A, &motg->inputs)) ||
+ test_bit(A_BUS_DROP, &motg->inputs)) {
+ pr_debug("id _f/b/c || a_bus_drop\n");
+ /* Clear BIDL_ADIS timer */
+ msm_otg_del_timer(motg);
+ otg->state = OTG_STATE_A_WAIT_VFALL;
+ msm_otg_start_peripheral(otg, 0);
+ otg->gadget->is_a_peripheral = 0;
+ msm_otg_start_host(otg, 0);
+ msm_otg_reset(otg);
+ if (!test_bit(ID_A, &motg->inputs))
+ msm_hsusb_vbus_power(motg, 0);
+ msm_otg_start_timer(motg, TA_WAIT_VFALL, A_WAIT_VFALL);
+ } else if (!test_bit(A_VBUS_VLD, &motg->inputs)) {
+ pr_debug("!a_vbus_vld\n");
+ /* Clear BIDL_ADIS timer */
+ msm_otg_del_timer(motg);
+ otg->state = OTG_STATE_A_VBUS_ERR;
+ msm_otg_start_peripheral(otg, 0);
+ otg->gadget->is_a_peripheral = 0;
+ msm_otg_start_host(otg, 0);
+ } else if (test_bit(A_BIDL_ADIS, &motg->tmouts)) {
+ pr_debug("a_bidl_adis_tmout\n");
+ msm_otg_start_peripheral(otg, 0);
+ otg->gadget->is_a_peripheral = 0;
+ otg->state = OTG_STATE_A_WAIT_BCON;
+ set_bit(A_BUS_REQ, &motg->inputs);
+ msm_otg_host_hnp_enable(otg, 0);
+ if (TA_WAIT_BCON > 0)
+ msm_otg_start_timer(motg, TA_WAIT_BCON,
+ A_WAIT_BCON);
+ } else if (test_bit(ID_A, &motg->inputs)) {
+ msm_hsusb_vbus_power(motg, 0);
+ msm_otg_notify_charger(motg,
+ IDEV_CHG_MIN - motg->mA_port);
+ } else if (!test_bit(ID, &motg->inputs)) {
+ msm_otg_notify_charger(motg, 0);
+ msm_hsusb_vbus_power(motg, 1);
+ }
+ break;
+ case OTG_STATE_A_WAIT_VFALL:
+ if (test_bit(A_WAIT_VFALL, &motg->tmouts)) {
+ clear_bit(A_VBUS_VLD, &motg->inputs);
+ otg->state = OTG_STATE_A_IDLE;
+ work = 1;
+ }
+ break;
+ case OTG_STATE_A_VBUS_ERR:
+ if ((test_bit(ID, &motg->inputs) &&
+ !test_bit(ID_A, &motg->inputs)) ||
+ test_bit(A_BUS_DROP, &motg->inputs) ||
+ test_bit(A_CLR_ERR, &motg->inputs)) {
+ otg->state = OTG_STATE_A_WAIT_VFALL;
+ if (!test_bit(ID_A, &motg->inputs))
+ msm_hsusb_vbus_power(motg, 0);
+ msm_otg_start_timer(motg, TA_WAIT_VFALL, A_WAIT_VFALL);
+ motg->chg_state = USB_CHG_STATE_UNDEFINED;
+ motg->chg_type = USB_INVALID_CHARGER;
+ msm_otg_notify_charger(motg, 0);
+ }
+ break;
default:
break;
}
+ if (work)
+ queue_work(system_nrt_wq, &motg->sm_work);
}
static irqreturn_t msm_otg_irq(int irq, void *data)
{
struct msm_otg *motg = data;
struct otg_transceiver *otg = &motg->otg;
- u32 otgsc = 0, usbsts;
+ u32 otgsc = 0, usbsts, pc;
+ bool work = 0;
+ irqreturn_t ret = IRQ_HANDLED;
if (atomic_read(&motg->in_lpm)) {
pr_debug("OTG IRQ: in LPM\n");
@@ -1983,44 +2582,144 @@
}
usbsts = readl(USB_USBSTS);
- if ((usbsts & PHY_ALT_INT)) {
- dev_dbg(otg->dev, "PHY_ALT interrupt\n");
- writel(PHY_ALT_INT, USB_USBSTS);
- if (msm_chg_check_aca_intr(motg)) {
- dev_dbg(otg->dev, "ACA work from IRQ\n");
- schedule_work(&motg->sm_work);
- }
- return IRQ_HANDLED;
- }
-
otgsc = readl(USB_OTGSC);
- if (!(otgsc & (OTGSC_IDIS | OTGSC_BSVIS)))
+
+ if (!(otgsc & OTG_OTGSTS_MASK) && !(usbsts & OTG_USBSTS_MASK))
return IRQ_NONE;
if ((otgsc & OTGSC_IDIS) && (otgsc & OTGSC_IDIE)) {
if (otgsc & OTGSC_ID) {
- dev_dbg(otg->dev, "ID set\n");
+ pr_debug("Id set\n");
set_bit(ID, &motg->inputs);
} else {
- dev_dbg(otg->dev, "ID clear\n");
+ pr_debug("Id clear\n");
+ /*
+ * Assert a_bus_req to supply power on
+ * VBUS when Micro/Mini-A cable is connected
+ * with out user intervention.
+ */
+ set_bit(A_BUS_REQ, &motg->inputs);
clear_bit(ID, &motg->inputs);
msm_chg_enable_aca_det(motg);
}
- schedule_work(&motg->sm_work);
- } else if ((otgsc & OTGSC_BSVIS) && (otgsc & OTGSC_BSVIE)) {
+ writel_relaxed(otgsc, USB_OTGSC);
+ work = 1;
+ } else if (otgsc & OTGSC_DPIS) {
+ pr_debug("DPIS detected\n");
+ writel_relaxed(otgsc, USB_OTGSC);
+ set_bit(A_SRP_DET, &motg->inputs);
+ set_bit(A_BUS_REQ, &motg->inputs);
+ work = 1;
+ } else if (otgsc & OTGSC_BSVIS) {
+ writel_relaxed(otgsc, USB_OTGSC);
+ /*
+ * BSV interrupt comes when operating as an A-device
+ * (VBUS on/off).
+ * But, handle BSV when charger is removed from ACA in ID_A
+ */
+ if ((otg->state >= OTG_STATE_A_IDLE) &&
+ !test_bit(ID_A, &motg->inputs))
+ return IRQ_HANDLED;
if (otgsc & OTGSC_BSV) {
- dev_dbg(otg->dev, "BSV set\n");
+ pr_debug("BSV set\n");
set_bit(B_SESS_VLD, &motg->inputs);
} else {
- dev_dbg(otg->dev, "BSV clear\n");
+ pr_debug("BSV clear\n");
clear_bit(B_SESS_VLD, &motg->inputs);
msm_chg_check_aca_intr(motg);
}
- schedule_work(&motg->sm_work);
+ work = 1;
+ } else if (usbsts & STS_PCI) {
+ pc = readl_relaxed(USB_PORTSC);
+ pr_debug("portsc = %x\n", pc);
+ ret = IRQ_NONE;
+ /*
+ * HCD Acks PCI interrupt. We use this to switch
+ * between different OTG states.
+ */
+ work = 1;
+ switch (otg->state) {
+ case OTG_STATE_A_SUSPEND:
+ if (otg->host->b_hnp_enable && (pc & PORTSC_CSC) &&
+ !(pc & PORTSC_CCS)) {
+ pr_debug("B_CONN clear\n");
+ clear_bit(B_CONN, &motg->inputs);
+ msm_otg_del_timer(motg);
+ }
+ break;
+ case OTG_STATE_A_PERIPHERAL:
+ /*
+ * A-peripheral observed activity on bus.
+ * clear A_BIDL_ADIS timer.
+ */
+ msm_otg_del_timer(motg);
+ work = 0;
+ break;
+ case OTG_STATE_B_WAIT_ACON:
+ if ((pc & PORTSC_CSC) && (pc & PORTSC_CCS)) {
+ pr_debug("A_CONN set\n");
+ set_bit(A_CONN, &motg->inputs);
+ /* Clear ASE0_BRST timer */
+ msm_otg_del_timer(motg);
+ }
+ break;
+ case OTG_STATE_B_HOST:
+ if ((pc & PORTSC_CSC) && !(pc & PORTSC_CCS)) {
+ pr_debug("A_CONN clear\n");
+ clear_bit(A_CONN, &motg->inputs);
+ msm_otg_del_timer(motg);
+ }
+ break;
+ case OTG_STATE_A_WAIT_BCON:
+ if (TA_WAIT_BCON < 0)
+ set_bit(A_BUS_REQ, &motg->inputs);
+ default:
+ work = 0;
+ break;
+ }
+ } else if (usbsts & STS_URI) {
+ ret = IRQ_NONE;
+ switch (otg->state) {
+ case OTG_STATE_A_PERIPHERAL:
+ /*
+ * A-peripheral observed activity on bus.
+ * clear A_BIDL_ADIS timer.
+ */
+ msm_otg_del_timer(motg);
+ work = 0;
+ break;
+ default:
+ work = 0;
+ break;
+ }
+ } else if (usbsts & STS_SLI) {
+ ret = IRQ_NONE;
+ work = 0;
+ switch (otg->state) {
+ case OTG_STATE_B_PERIPHERAL:
+ if (otg->gadget->b_hnp_enable) {
+ set_bit(A_BUS_SUSPEND, &motg->inputs);
+ set_bit(B_BUS_REQ, &motg->inputs);
+ work = 1;
+ }
+ break;
+ case OTG_STATE_A_PERIPHERAL:
+ msm_otg_start_timer(motg, TA_BIDL_ADIS,
+ A_BIDL_ADIS);
+ break;
+ default:
+ break;
+ }
+ } else if ((usbsts & PHY_ALT_INT)) {
+ writel_relaxed(PHY_ALT_INT, USB_USBSTS);
+ if (msm_chg_check_aca_intr(motg))
+ work = 1;
+ ret = IRQ_HANDLED;
}
+ if (work)
+ queue_work(system_nrt_wq, &motg->sm_work);
- writel(otgsc, USB_OTGSC);
- return IRQ_HANDLED;
+ return ret;
}
static void msm_otg_set_vbus_state(int online)
@@ -2043,7 +2742,7 @@
return;
}
- schedule_work(&motg->sm_work);
+ queue_work(system_nrt_wq, &motg->sm_work);
}
static irqreturn_t msm_pmic_id_irq(int irq, void *data)
@@ -2059,10 +2758,11 @@
} else {
pr_debug("PMIC: ID clear\n");
clear_bit(ID, &motg->inputs);
+ set_bit(A_BUS_REQ, &motg->inputs);
}
if (motg->otg.state != OTG_STATE_UNDEFINED)
- schedule_work(&motg->sm_work);
+ queue_work(system_nrt_wq, &motg->sm_work);
return IRQ_HANDLED;
}
@@ -2158,7 +2858,7 @@
}
pm_runtime_resume(otg->dev);
- schedule_work(&motg->sm_work);
+ queue_work(system_nrt_wq, &motg->sm_work);
out:
return status;
}
@@ -2232,13 +2932,64 @@
.release = single_release,
};
+static int msm_otg_bus_show(struct seq_file *s, void *unused)
+{
+ if (debug_bus_voting_enabled)
+ seq_printf(s, "enabled\n");
+ else
+ seq_printf(s, "disabled\n");
+
+ return 0;
+}
+
+static int msm_otg_bus_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, msm_otg_bus_show, inode->i_private);
+}
+
+static ssize_t msm_otg_bus_write(struct file *file, const char __user *ubuf,
+ size_t count, loff_t *ppos)
+{
+ char buf[8];
+ int ret;
+ struct seq_file *s = file->private_data;
+ struct msm_otg *motg = s->private;
+
+ memset(buf, 0x00, sizeof(buf));
+
+ if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
+ return -EFAULT;
+
+ if (!strncmp(buf, "enable", 6)) {
+ /* Do not vote here. Let OTG statemachine decide when to vote */
+ debug_bus_voting_enabled = true;
+ } else {
+ debug_bus_voting_enabled = false;
+ if (motg->bus_perf_client) {
+ ret = msm_bus_scale_client_update_request(
+ motg->bus_perf_client, 0);
+ if (ret)
+ dev_err(motg->otg.dev, "%s: Failed to devote "
+ "for bus bw %d\n", __func__, ret);
+ }
+ }
+
+ return count;
+}
+
+const struct file_operations msm_otg_bus_fops = {
+ .open = msm_otg_bus_open,
+ .read = seq_read,
+ .write = msm_otg_bus_write,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
static struct dentry *msm_otg_dbg_root;
-static struct dentry *msm_otg_dbg_mode;
-static struct dentry *msm_otg_chg_type;
-static struct dentry *msm_otg_dbg_aca;
static int msm_otg_debugfs_init(struct msm_otg *motg)
{
+ struct dentry *msm_otg_dentry;
msm_otg_dbg_root = debugfs_create_dir("msm_otg", NULL);
@@ -2248,35 +2999,43 @@
if (motg->pdata->mode == USB_OTG &&
motg->pdata->otg_control == OTG_USER_CONTROL) {
- msm_otg_dbg_mode = debugfs_create_file("mode", S_IRUGO |
+ msm_otg_dentry = debugfs_create_file("mode", S_IRUGO |
S_IWUSR, msm_otg_dbg_root, motg,
&msm_otg_mode_fops);
- if (!msm_otg_dbg_mode) {
+ if (!msm_otg_dentry) {
debugfs_remove(msm_otg_dbg_root);
msm_otg_dbg_root = NULL;
return -ENODEV;
}
}
- msm_otg_chg_type = debugfs_create_file("chg_type", S_IRUGO,
+ msm_otg_dentry = debugfs_create_file("chg_type", S_IRUGO,
msm_otg_dbg_root, motg,
&msm_otg_chg_fops);
- if (!msm_otg_chg_type) {
+ if (!msm_otg_dentry) {
debugfs_remove_recursive(msm_otg_dbg_root);
return -ENODEV;
}
- msm_otg_dbg_aca = debugfs_create_file("aca", S_IRUGO | S_IWUSR,
+ msm_otg_dentry = debugfs_create_file("aca", S_IRUGO | S_IWUSR,
msm_otg_dbg_root, motg,
&msm_otg_aca_fops);
- if (!msm_otg_dbg_aca) {
+ if (!msm_otg_dentry) {
debugfs_remove_recursive(msm_otg_dbg_root);
return -ENODEV;
}
+ msm_otg_dentry = debugfs_create_file("bus_voting", S_IRUGO | S_IWUSR,
+ msm_otg_dbg_root, motg,
+ &msm_otg_bus_fops);
+
+ if (!msm_otg_dentry) {
+ debugfs_remove_recursive(msm_otg_dbg_root);
+ return -ENODEV;
+ }
return 0;
}
@@ -2562,6 +3321,7 @@
mb();
wake_lock_init(&motg->wlock, WAKE_LOCK_SUSPEND, "msm_otg");
+ msm_otg_init_timer(motg);
INIT_WORK(&motg->sm_work, msm_otg_sm_work);
INIT_DELAYED_WORK(&motg->chg_work, msm_chg_detect_work);
setup_timer(&motg->id_timer, msm_otg_id_timer_func,
@@ -2577,6 +3337,8 @@
otg->set_host = msm_otg_set_host;
otg->set_peripheral = msm_otg_set_peripheral;
otg->set_power = msm_otg_set_power;
+ otg->start_hnp = msm_otg_start_hnp;
+ otg->start_srp = msm_otg_start_srp;
otg->set_suspend = msm_otg_set_suspend;
otg->io_ops = &msm_otg_io_ops;
@@ -2642,6 +3404,8 @@
if (!motg->bus_perf_client)
dev_err(motg->otg.dev, "%s: Failed to register BUS "
"scaling client!!\n", __func__);
+ else
+ debug_bus_voting_enabled = true;
}
return 0;
diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c
index 547486c..486d129 100644
--- a/drivers/usb/renesas_usbhs/mod_gadget.c
+++ b/drivers/usb/renesas_usbhs/mod_gadget.c
@@ -1179,7 +1179,7 @@
*
*/
struct usbhsg_gpriv *the_controller;
-int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+static int usbhsg_gadget_start(struct usb_gadget_driver *driver,
int (*bind)(struct usb_gadget *))
{
struct usbhsg_gpriv *gpriv = the_controller;
@@ -1229,9 +1229,8 @@
return ret;
}
-EXPORT_SYMBOL(usb_gadget_probe_driver);
-int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+static int usbhsg_gadget_stop(struct usb_gadget_driver *driver)
{
struct usbhsg_gpriv *gpriv = the_controller;
struct usbhs_priv *priv;
@@ -1260,7 +1259,6 @@
return 0;
}
-EXPORT_SYMBOL(usb_gadget_unregister_driver);
/*
* usb gadget ops
@@ -1275,6 +1273,8 @@
static struct usb_gadget_ops usbhsg_gadget_ops = {
.get_frame = usbhsg_get_frame,
+ .start = usbhsg_gadget_start,
+ .stop = usbhsg_gadget_stop,
};
static int usbhsg_start(struct usbhs_priv *priv)
@@ -1294,6 +1294,7 @@
struct device *dev = usbhs_priv_to_dev(priv);
int pipe_size = usbhs_get_dparam(priv, pipe_size);
int i;
+ int ret;
gpriv = kzalloc(sizeof(struct usbhsg_gpriv), GFP_KERNEL);
if (!gpriv) {
@@ -1304,6 +1305,7 @@
uep = kzalloc(sizeof(struct usbhsg_uep) * pipe_size, GFP_KERNEL);
if (!uep) {
dev_err(dev, "Could not allocate ep\n");
+ ret = -ENOMEM;
goto usbhs_mod_gadget_probe_err_gpriv;
}
@@ -1366,20 +1368,28 @@
the_controller = gpriv;
+ ret = usb_add_gadget_udc(dev, &gpriv->gadget);
+ if (ret)
+ goto err_add_udc;
+
+
dev_info(dev, "gadget probed\n");
return 0;
+err_add_udc:
+ kfree(gpriv->uep);
usbhs_mod_gadget_probe_err_gpriv:
kfree(gpriv);
- return -ENOMEM;
+ return ret;
}
void __devexit usbhs_mod_gadget_remove(struct usbhs_priv *priv)
{
struct usbhsg_gpriv *gpriv = usbhsg_priv_to_gpriv(priv);
+ usb_del_gadget_udc(&gpriv->gadget);
kfree(gpriv->uep);
kfree(gpriv);
}
diff --git a/drivers/usb/serial/Kconfig b/drivers/usb/serial/Kconfig
index b71e309..caa5fda 100644
--- a/drivers/usb/serial/Kconfig
+++ b/drivers/usb/serial/Kconfig
@@ -651,6 +651,15 @@
To compile this driver as a module, choose M here: the
module will be called ssu100.
+config USB_SERIAL_CSVT
+ tristate "USB serial driver for Circuit-Switched Video Telephony"
+ help
+ Say Y here if you want to use usb serial driver for Circuit-Switched
+ Video Telephony
+
+ To compile this driver as a module, choose M here: the
+ module will be called csvt.
+
config USB_SERIAL_DEBUG
tristate "USB Debugging Device"
help
diff --git a/drivers/usb/serial/Makefile b/drivers/usb/serial/Makefile
index 9e536ee..2d085b2 100644
--- a/drivers/usb/serial/Makefile
+++ b/drivers/usb/serial/Makefile
@@ -60,3 +60,4 @@
obj-$(CONFIG_USB_SERIAL_XIRCOM) += keyspan_pda.o
obj-$(CONFIG_USB_SERIAL_VIVOPAY_SERIAL) += vivopay-serial.o
obj-$(CONFIG_USB_SERIAL_ZIO) += zio.o
+obj-$(CONFIG_USB_SERIAL_CSVT) += csvt.o
diff --git a/drivers/usb/serial/csvt.c b/drivers/usb/serial/csvt.c
new file mode 100644
index 0000000..28eba8a
--- /dev/null
+++ b/drivers/usb/serial/csvt.c
@@ -0,0 +1,446 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/slab.h>
+#include <linux/tty.h>
+#include <linux/serial.h>
+#include <linux/tty_flip.h>
+#include <linux/uaccess.h>
+#include <linux/usb.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/cdc.h>
+#include <linux/usb/serial.h>
+#include <asm/unaligned.h>
+
+
+/* output control lines*/
+#define CSVT_CTRL_DTR 0x01
+#define CSVT_CTRL_RTS 0x02
+
+/* input control lines*/
+#define CSVT_CTRL_CTS 0x01
+#define CSVT_CTRL_DSR 0x02
+#define CSVT_CTRL_RI 0x04
+#define CSVT_CTRL_CD 0x08
+
+static int debug;
+module_param(debug, int, S_IRUGO | S_IWUSR);
+
+struct csvt_ctrl_dev {
+ struct mutex dev_lock;
+
+ /* input control lines (DSR, CTS, CD, RI) */
+ unsigned int cbits_tolocal;
+
+ /* output control lines (DTR, RTS) */
+ unsigned int cbits_tomdm;
+};
+
+static const struct usb_device_id id_table[] = {
+ { USB_DEVICE_AND_INTERFACE_INFO(0x05c6 , 0x904c, 0xff, 0xfe, 0xff)},
+ {}, /* terminating entry */
+};
+MODULE_DEVICE_TABLE(usb, id_table);
+
+static struct usb_driver csvt_driver = {
+ .name = "qc_csvt",
+ .probe = usb_serial_probe,
+ .disconnect = usb_serial_disconnect,
+ .id_table = id_table,
+ .suspend = usb_serial_suspend,
+ .resume = usb_serial_resume,
+ .supports_autosuspend = true,
+};
+
+#define CSVT_IFC_NUM 4
+
+static int csvt_probe(struct usb_serial *serial, const struct usb_device_id *id)
+{
+ struct usb_host_interface *intf =
+ serial->interface->cur_altsetting;
+
+ pr_debug("%s:\n", __func__);
+
+ if (intf->desc.bInterfaceNumber != CSVT_IFC_NUM)
+ return -ENODEV;
+
+ usb_enable_autosuspend(serial->dev);
+
+ return 0;
+}
+
+static int csvt_ctrl_write_cmd(struct csvt_ctrl_dev *dev,
+ struct usb_serial_port *port)
+{
+ struct usb_device *udev = port->serial->dev;
+ struct usb_interface *iface = port->serial->interface;
+ unsigned int iface_num;
+ int retval = 0;
+
+ retval = usb_autopm_get_interface(iface);
+ if (retval < 0) {
+ dev_err(&port->dev, "%s: Unable to resume interface: %d\n",
+ __func__, retval);
+ return retval;
+ }
+
+ dev_dbg(&port->dev, "%s: cbits to mdm 0x%x\n", __func__,
+ dev->cbits_tomdm);
+
+ iface_num = iface->cur_altsetting->desc.bInterfaceNumber;
+
+ retval = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
+ USB_CDC_REQ_SET_CONTROL_LINE_STATE,
+ (USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_INTERFACE),
+ dev->cbits_tomdm,
+ iface_num,
+ NULL, 0, USB_CTRL_SET_TIMEOUT);
+ usb_autopm_put_interface(iface);
+
+ return retval;
+}
+
+static void csvt_ctrl_dtr_rts(struct usb_serial_port *port, int on)
+{
+ struct csvt_ctrl_dev *dev = usb_get_serial_port_data(port);
+
+ if (!dev)
+ return;
+
+ dev_dbg(&port->dev, "%s", __func__);
+
+ mutex_lock(&dev->dev_lock);
+ if (on) {
+ dev->cbits_tomdm |= CSVT_CTRL_DTR;
+ dev->cbits_tomdm |= CSVT_CTRL_RTS;
+ } else {
+ dev->cbits_tomdm &= ~CSVT_CTRL_DTR;
+ dev->cbits_tomdm &= ~CSVT_CTRL_RTS;
+ }
+ mutex_unlock(&dev->dev_lock);
+
+ csvt_ctrl_write_cmd(dev, port);
+}
+
+static int get_serial_info(struct usb_serial_port *port,
+ struct serial_struct __user *retinfo)
+{
+ struct serial_struct tmp;
+
+ if (!retinfo)
+ return -EFAULT;
+
+ memset(&tmp, 0, sizeof(tmp));
+ tmp.line = port->serial->minor;
+ tmp.port = port->number;
+ tmp.baud_base = tty_get_baud_rate(port->port.tty);
+ tmp.close_delay = port->port.close_delay / 10;
+ tmp.closing_wait =
+ port->port.closing_wait == ASYNC_CLOSING_WAIT_NONE ?
+ ASYNC_CLOSING_WAIT_NONE :
+ port->port.closing_wait / 10;
+
+ if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
+ return -EFAULT;
+ return 0;
+}
+
+static int set_serial_info(struct usb_serial_port *port,
+ struct serial_struct __user *newinfo)
+{
+ struct serial_struct new_serial;
+ unsigned int closing_wait;
+ unsigned int close_delay;
+ int retval = 0;
+
+ if (copy_from_user(&new_serial, newinfo, sizeof(new_serial)))
+ return -EFAULT;
+
+ close_delay = new_serial.close_delay * 10;
+ closing_wait = new_serial.closing_wait == ASYNC_CLOSING_WAIT_NONE ?
+ ASYNC_CLOSING_WAIT_NONE : new_serial.closing_wait * 10;
+
+ mutex_lock(&port->port.mutex);
+
+ if (!capable(CAP_SYS_ADMIN)) {
+ if ((close_delay != port->port.close_delay) ||
+ (closing_wait != port->port.closing_wait))
+ retval = -EPERM;
+ else
+ retval = -EOPNOTSUPP;
+ } else {
+ port->port.close_delay = close_delay;
+ port->port.closing_wait = closing_wait;
+ }
+
+ mutex_unlock(&port->port.mutex);
+ return retval;
+}
+
+static int csvt_ctrl_ioctl(struct tty_struct *tty, unsigned int cmd,
+ unsigned long arg)
+{
+ struct usb_serial_port *port = tty->driver_data;
+
+ dev_dbg(&port->dev, "%s cmd 0x%04x", __func__, cmd);
+
+ switch (cmd) {
+ case TIOCGSERIAL:
+ return get_serial_info(port,
+ (struct serial_struct __user *) arg);
+ case TIOCSSERIAL:
+ return set_serial_info(port,
+ (struct serial_struct __user *) arg);
+ default:
+ break;
+ }
+
+ dev_err(&port->dev, "%s arg not supported", __func__);
+
+ return -ENOIOCTLCMD;
+}
+
+static int csvt_ctrl_tiocmget(struct tty_struct *tty)
+{
+ struct usb_serial_port *port = tty->driver_data;
+ struct csvt_ctrl_dev *dev = usb_get_serial_port_data(port);
+ unsigned int control_state = 0;
+
+ if (!dev)
+ return -ENODEV;
+
+ mutex_lock(&dev->dev_lock);
+ control_state = (dev->cbits_tomdm & CSVT_CTRL_DTR ? TIOCM_DTR : 0) |
+ (dev->cbits_tomdm & CSVT_CTRL_RTS ? TIOCM_RTS : 0) |
+ (dev->cbits_tolocal & CSVT_CTRL_DSR ? TIOCM_DSR : 0) |
+ (dev->cbits_tolocal & CSVT_CTRL_RI ? TIOCM_RI : 0) |
+ (dev->cbits_tolocal & CSVT_CTRL_CD ? TIOCM_CD : 0) |
+ (dev->cbits_tolocal & CSVT_CTRL_CTS ? TIOCM_CTS : 0);
+ mutex_unlock(&dev->dev_lock);
+
+ dev_dbg(&port->dev, "%s -- %x", __func__, control_state);
+
+ return control_state;
+}
+
+static int csvt_ctrl_tiocmset(struct tty_struct *tty,
+ unsigned int set, unsigned int clear)
+{
+ struct usb_serial_port *port = tty->driver_data;
+ struct csvt_ctrl_dev *dev = usb_get_serial_port_data(port);
+
+ if (!dev)
+ return -ENODEV;
+
+ dev_dbg(&port->dev, "%s\n", __func__);
+
+ mutex_lock(&dev->dev_lock);
+ if (set & CSVT_CTRL_DTR)
+ dev->cbits_tomdm |= TIOCM_DTR;
+ if (set & CSVT_CTRL_RTS)
+ dev->cbits_tomdm |= TIOCM_RTS;
+
+ if (clear & CSVT_CTRL_DTR)
+ dev->cbits_tomdm &= ~TIOCM_DTR;
+ if (clear & CSVT_CTRL_RTS)
+ dev->cbits_tomdm &= ~TIOCM_RTS;
+ mutex_unlock(&dev->dev_lock);
+
+ return csvt_ctrl_write_cmd(dev, port);
+}
+
+static void csvt_ctrl_set_termios(struct tty_struct *tty,
+ struct usb_serial_port *port,
+ struct ktermios *old_termios)
+{
+ struct csvt_ctrl_dev *dev = usb_get_serial_port_data(port);
+
+ if (!dev)
+ return;
+
+ dev_dbg(&port->dev, "%s", __func__);
+
+ /* Doesn't support option setting */
+ tty_termios_copy_hw(tty->termios, old_termios);
+
+ csvt_ctrl_write_cmd(dev, port);
+}
+
+static void csvt_ctrl_int_cb(struct urb *urb)
+{
+ int status;
+ struct usb_cdc_notification *ctrl;
+ struct usb_serial_port *port = urb->context;
+ struct csvt_ctrl_dev *dev;
+ unsigned int ctrl_bits;
+ unsigned char *data;
+
+ switch (urb->status) {
+ case 0:
+ /*success*/
+ break;
+ case -ESHUTDOWN:
+ case -ENOENT:
+ case -ECONNRESET:
+ case -EPROTO:
+ /* unplug */
+ return;
+ case -EPIPE:
+ dev_err(&port->dev, "%s: stall on int endpoint\n", __func__);
+ /* TBD : halt to be cleared in work */
+ case -EOVERFLOW:
+ default:
+ pr_debug_ratelimited("%s: non zero urb status = %d\n",
+ __func__, urb->status);
+ goto resubmit_int_urb;
+ }
+
+ dev = usb_get_serial_port_data(port);
+ if (!dev)
+ return;
+
+ ctrl = urb->transfer_buffer;
+ data = (unsigned char *)(ctrl + 1);
+
+ usb_serial_debug_data(debug, &port->dev, __func__,
+ urb->actual_length, data);
+
+ switch (ctrl->bNotificationType) {
+ case USB_CDC_NOTIFY_NETWORK_CONNECTION:
+ dev_dbg(&port->dev, "%s network\n", ctrl->wValue ?
+ "connected to" : "disconnected from");
+ break;
+ case USB_CDC_NOTIFY_SERIAL_STATE:
+ ctrl_bits = get_unaligned_le16(data);
+ dev_dbg(&port->dev, "serial state: %d\n", ctrl_bits);
+ dev->cbits_tolocal = ctrl_bits;
+ break;
+ default:
+ dev_err(&port->dev, "%s: unknown notification %d received:"
+ "index %d len %d data0 %d data1 %d",
+ __func__, ctrl->bNotificationType, ctrl->wIndex,
+ ctrl->wLength, data[0], data[1]);
+ }
+
+resubmit_int_urb:
+ status = usb_submit_urb(urb, GFP_ATOMIC);
+ if (status)
+ dev_err(&port->dev, "%s: Error re-submitting Int URB %d\n",
+ __func__, status);
+
+}
+
+static int csvt_ctrl_open(struct tty_struct *tty,
+ struct usb_serial_port *port)
+{
+ int retval;
+
+ dev_dbg(&port->dev, "%s port %d", __func__, port->number);
+
+ retval = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL);
+ if (retval) {
+ dev_err(&port->dev, "usb_submit_urb(read int) failed\n");
+ return retval;
+ }
+
+ retval = usb_serial_generic_open(tty, port);
+ if (retval)
+ usb_kill_urb(port->interrupt_in_urb);
+
+ return retval;
+}
+
+static void csvt_ctrl_close(struct usb_serial_port *port)
+{
+ dev_dbg(&port->dev, "%s port %d", __func__, port->number);
+
+ usb_serial_generic_close(port);
+ usb_kill_urb(port->interrupt_in_urb);
+}
+
+static int csvt_ctrl_attach(struct usb_serial *serial)
+{
+ struct csvt_ctrl_dev *dev;
+
+ dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+ if (!dev)
+ return -ENOMEM;
+
+ mutex_init(&dev->dev_lock);
+ usb_set_serial_port_data(serial->port[0], dev);
+
+ return 0;
+}
+
+static void csvt_ctrl_release(struct usb_serial *serial)
+{
+ struct usb_serial_port *port = serial->port[0];
+ struct csvt_ctrl_dev *dev = usb_get_serial_port_data(port);
+
+ dev_dbg(&port->dev, "%s", __func__);
+
+ kfree(dev);
+ usb_set_serial_port_data(port, NULL);
+}
+
+static struct usb_serial_driver csvt_device = {
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = "qc_csvt",
+ },
+ .description = "qc_csvt",
+ .id_table = id_table,
+ .usb_driver = &csvt_driver,
+ .num_ports = 1,
+ .open = csvt_ctrl_open,
+ .close = csvt_ctrl_close,
+ .probe = csvt_probe,
+ .dtr_rts = csvt_ctrl_dtr_rts,
+ .tiocmget = csvt_ctrl_tiocmget,
+ .tiocmset = csvt_ctrl_tiocmset,
+ .ioctl = csvt_ctrl_ioctl,
+ .set_termios = csvt_ctrl_set_termios,
+ .read_int_callback = csvt_ctrl_int_cb,
+ .attach = csvt_ctrl_attach,
+ .release = csvt_ctrl_release,
+};
+
+static int __init csvt_init(void)
+{
+ int retval;
+
+ retval = usb_serial_register(&csvt_device);
+ if (retval) {
+ err("%s: usb serial register failed\n", __func__);
+ return retval;
+ }
+
+ retval = usb_register(&csvt_driver);
+ if (retval) {
+ usb_serial_deregister(&csvt_device);
+ err("%s: usb register failed\n", __func__);
+ return retval;
+ }
+
+ return 0;
+}
+
+static void __exit csvt_exit(void)
+{
+ usb_deregister(&csvt_driver);
+ usb_serial_deregister(&csvt_device);
+}
+
+module_init(csvt_init);
+module_exit(csvt_exit);
+
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/usb/serial/qcserial.c b/drivers/usb/serial/qcserial.c
index b29a974..ef022c1 100644
--- a/drivers/usb/serial/qcserial.c
+++ b/drivers/usb/serial/qcserial.c
@@ -1,7 +1,7 @@
/*
* Qualcomm Serial USB driver
*
- * Copyright (c) 2008 QUALCOMM Incorporated.
+ * Copyright (c) 2008, 2012 Code Aurora Forum. All rights reserved.
* Copyright (c) 2009 Greg Kroah-Hartman <gregkh@suse.de>
* Copyright (c) 2009 Novell Inc.
*
@@ -82,7 +82,8 @@
{USB_DEVICE(0x16d8, 0x8002)}, /* CMDTech Gobi 2000 Modem device (VU922) */
{USB_DEVICE(0x05c6, 0x9204)}, /* Gobi 2000 QDL device */
{USB_DEVICE(0x05c6, 0x9205)}, /* Gobi 2000 Modem device */
- {USB_DEVICE(0x05c6, 0x9048)},
+ {USB_DEVICE(0x05c6, 0x9048)}, /* MDM9x15 device */
+ {USB_DEVICE(0x05c6, 0x904C)}, /* MDM9x15 device */
{ } /* Terminating entry */
};
MODULE_DEVICE_TABLE(usb, id_table);
diff --git a/drivers/video/msm/Kconfig b/drivers/video/msm/Kconfig
index 0110df9..a064d11 100644
--- a/drivers/video/msm/Kconfig
+++ b/drivers/video/msm/Kconfig
@@ -178,6 +178,15 @@
bool
select FB_MSM_MIPI_DSI
+config FB_MSM_MIPI_DSI_ORISE
+ bool
+ select FB_MSM_MIPI_DSI
+ default n
+
+config FB_MSM_MIPI_DSI_NT35516
+ bool
+ select FB_MSM_MIPI_DSI
+
config FB_MSM_MIPI_DSI_TC358764_DSI2LVDS
bool
select FB_MSM_MIPI_DSI
@@ -285,6 +294,16 @@
select FB_MSM_MIPI_DSI_NOVATEK
default n
+config FB_MSM_MIPI_ORISE_VIDEO_720P_PT
+ bool
+ select FB_MSM_MIPI_DSI_ORISE
+ default n
+
+config FB_MSM_MIPI_ORISE_CMD_720P_PT
+ bool
+ select FB_MSM_MIPI_DSI_ORISE
+ default n
+
config FB_MSM_MIPI_RENESAS_VIDEO_FWVGA_PT
bool
select FB_MSM_MIPI_DSI_RENESAS
@@ -305,6 +324,17 @@
select FB_MSM_MIPI_DSI_NT35510
default n
+config FB_MSM_MIPI_NT35516_VIDEO_QHD_PT
+ bool
+ select FB_MSM_MIPI_DSI_NT35516
+ default n
+
+config FB_MSM_MIPI_NT35516_CMD_QHD_PT
+ bool
+ select FB_MSM_MIPI_DSI_NT35516
+ default n
+
+
config FB_MSM_MIPI_CHIMEI_WXGA
bool "LVDS Chimei WXGA Panel using Toshiba MIPI DSI-to-LVDS bridge."
select FB_MSM_MIPI_DSI_TC358764_DSI2LVDS
@@ -459,6 +489,10 @@
select FB_MSM_MIPI_NOVATEK_CMD_QHD_PT
select FB_MSM_MIPI_NT35510_VIDEO_WVGA_PT
select FB_MSM_MIPI_NT35510_CMD_WVGA_PT
+ select FB_MSM_MIPI_ORISE_VIDEO_720P_PT
+ select FB_MSM_MIPI_ORISE_CMD_720P_PT
+ select FB_MSM_MIPI_NT35516_VIDEO_QHD_PT
+ select FB_MSM_MIPI_NT35516_CMD_QHD_PT
select FB_MSM_MIPI_SIMULATOR_VIDEO
select FB_MSM_MIPI_CHIMEI_WXGA
select FB_MSM_MIPI_CHIMEI_WUXGA
@@ -497,6 +531,8 @@
select FB_MSM_MIPI_NOVATEK_CMD_QHD_PT
select FB_MSM_MIPI_NT35510_VIDEO_WVGA_PT
select FB_MSM_MIPI_NT35510_CMD_WVGA_PT
+ select FB_MSM_MIPI_NT35516_VIDEO_QHD_PT
+ select FM_MSM_MIPI_NT35516_CMD_QHD_PT
select FB_MSM_MIPI_SIMULATOR_VIDEO
---help---
Support for LCDC + MIPI panel auto detect
@@ -514,6 +550,8 @@
select FB_MSM_MIPI_NOVATEK_CMD_QHD_PT
select FB_MSM_MIPI_NT35510_VIDEO_WVGA_PT
select FB_MSM_MIPI_NT35510_CMD_WVGA_PT
+ select FB_MSM_MIPI_ORISE_VIDEO_720P_PT
+ select FB_MSM_MIPI_ORISE_CMD_720P_PT
select FB_MSM_MIPI_SIMULATOR_VIDEO
select FB_MSM_MIPI_CHIMEI_WXGA
select FB_MSM_MIPI_CHIMEI_WUXGA
@@ -570,6 +608,14 @@
bool "MIPI NOVATEK CMD QHD PT Panel"
select FB_MSM_MIPI_NOVATEK_CMD_QHD_PT
+config FB_MSM_MIPI_ORISE_VIDEO_720P_PT_PANEL
+ bool "MIPI ORISE VIDEO 720P PT Panel"
+ select FB_MSM_MIPI_ORISE_VIDEO_720P_PT
+
+config FB_MSM_MIPI_ORISE_CMD_720P_PT_PANEL
+ bool "MIPI ORISE CMD 720P PT Panel"
+ select FB_MSM_MIPI_ORISE_CMD_720P_PT
+
config FB_MSM_MIPI_RENESAS_VIDEO_FWVGA_PT_PANEL
bool "MIPI Renesas Video FWVGA PT Panel"
select FB_MSM_MIPI_RENESAS_VIDEO_FWVGA_PT
@@ -598,6 +644,14 @@
bool "MIPI NT35510 Command WVGA PT Panel"
select FB_MSM_MIPI_NT35510_CMD_WVGA_PT
+config FB_MSM_MIPI_NT35516_VIDEO_QHD_PT_PANEL
+ bool "MIPI NT35516 Video qHD PT Panel"
+ select FB_MSM_MIPI_NT35516_VIDEO_QHD_PT
+
+config FB_MSM_MIPI_NT35516_CMD_QHD_PT_PANEL
+ bool "MIPI NT35516 Command qHD PT Panel"
+ select FB_MSM_MIPI_NT35516_CMD_QHD_PT
+
config FB_MSM_MIPI_SIMULATOR_VIDEO_PANEL
bool "MIPI Simulator Video Panel"
select FB_MSM_MIPI_SIMULATOR_VIDEO
@@ -609,6 +663,7 @@
Support for EBI2 TMD QVGA (240x320) and Epson QCIF (176x220) panel
config FB_MSM_HDMI_AS_PRIMARY
+ depends on FB_MSM_HDMI_COMMON
bool "Use HDMI as primary panel"
---help---
Support for using HDMI as primary
diff --git a/drivers/video/msm/Makefile b/drivers/video/msm/Makefile
index 2bdab74..aabe490 100644
--- a/drivers/video/msm/Makefile
+++ b/drivers/video/msm/Makefile
@@ -74,9 +74,11 @@
# MIPI manufacture
obj-$(CONFIG_FB_MSM_MIPI_DSI_TOSHIBA) += mipi_toshiba.o
obj-$(CONFIG_FB_MSM_MIPI_DSI_NOVATEK) += mipi_novatek.o
+obj-$(CONFIG_FB_MSM_MIPI_DSI_ORISE) += mipi_orise.o
obj-$(CONFIG_FB_MSM_MIPI_DSI_RENESAS) += mipi_renesas.o
obj-$(CONFIG_FB_MSM_MIPI_DSI_TRULY) += mipi_truly.o
obj-$(CONFIG_FB_MSM_MIPI_DSI_NT35510) += mipi_NT35510.o
+obj-$(CONFIG_FB_MSM_MIPI_DSI_NT35516) += mipi_truly_tft540960_1_e.o
obj-$(CONFIG_FB_MSM_MIPI_DSI_SIMULATOR) += mipi_simulator.o
# MIPI Bridge
@@ -116,8 +118,10 @@
ifeq ($(CONFIG_FB_MSM_MIPI_PANEL_DETECT),y)
obj-y += mipi_toshiba_video_wvga_pt.o mipi_toshiba_video_wsvga_pt.o mipi_toshiba_video_wuxga.o
obj-y += mipi_novatek_video_qhd_pt.o mipi_novatek_cmd_qhd_pt.o
+obj-y += mipi_orise_video_720p_pt.o mipi_orise_cmd_720p_pt.o
obj-y += mipi_renesas_video_fwvga_pt.o mipi_renesas_cmd_fwvga_pt.o
obj-y += mipi_NT35510_video_wvga_pt.o mipi_NT35510_cmd_wvga_pt.o
+obj-y += mipi_truly_tft540960_1_e_video_qhd_pt.o mipi_truly_tft540960_1_e_cmd_qhd_pt.o
obj-y += mipi_chimei_wxga_pt.o
obj-y += mipi_chimei_wuxga.o
obj-y += mipi_truly_video_wvga_pt.o
@@ -126,6 +130,8 @@
obj-$(CONFIG_FB_MSM_MIPI_TOSHIBA_VIDEO_WSVGA_PT) += mipi_toshiba_video_wsvga_pt.o
obj-$(CONFIG_FB_MSM_MIPI_TOSHIBA_VIDEO_WUXGA) += mipi_toshiba_video_wuxga.o
obj-$(CONFIG_FB_MSM_MIPI_NOVATEK_VIDEO_QHD_PT) += mipi_novatek_video_qhd_pt.o
+obj-$(CONFIG_FB_MSM_MIPI_ORISE_VIDEO_720P_PT) += mipi_orise_video_720p_pt.o
+obj-$(CONFIG_FB_MSM_MIPI_ORISE_CMD_720P_PT) += mipi_orise_cmd_720p_pt.o
obj-$(CONFIG_FB_MSM_MIPI_NOVATEK_CMD_QHD_PT) += mipi_novatek_cmd_qhd_pt.o
obj-$(CONFIG_FB_MSM_MIPI_RENESAS_VIDEO_FWVGA_PT) += mipi_renesas_video_fwvga_pt.o
obj-$(CONFIG_FB_MSM_MIPI_RENESAS_CMD_FWVGA_PT) += mipi_renesas_cmd_fwvga_pt.o
@@ -133,6 +139,8 @@
obj-$(CONFIG_FB_MSM_MIPI_TRULY_VIDEO_WVGA_PT) += mipi_truly_video_wvga_pt.o
obj-$(CONFIG_FB_MSM_MIPI_NT35510_CMD_WVGA_PT) += mipi_NT35510_cmd_wvga_pt.o
obj-$(CONFIG_FB_MSM_MIPI_NT35510_VIDEO_WVGA_PT) += mipi_NT35510_video_wvga_pt.o
+obj-$(CONFIG_FB_MSM_MIPI_NT35516_CMD_QHD_PT) += mipi_truly_tft540960_1_e_cmd_qhd_pt.o
+obj-$(CONFIG_FB_MSM_MIPI_NT35516_VIDEO_QHD_PT) += mipi_truly_tft540960_1_e_video_qhd_pt.o
obj-$(CONFIG_FB_MSM_MIPI_SIMULATOR_VIDEO) += mipi_simulator_video.o
obj-$(CONFIG_FB_MSM_MIPI_CHIMEI_WXGA) += mipi_chimei_wxga_pt.o
obj-$(CONFIG_FB_MSM_MIPI_CHIMEI_WUXGA) += mipi_chimei_wuxga.o
diff --git a/drivers/video/msm/adv7520.c b/drivers/video/msm/adv7520.c
index b3b34bb..7386983 100644
--- a/drivers/video/msm/adv7520.c
+++ b/drivers/video/msm/adv7520.c
@@ -874,7 +874,11 @@
} else
DEV_ERR("adv7520_probe: failed to add fb device\n");
+#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
+ external_common_state->sdev.name = "hdmi_as_primary";
+#else
external_common_state->sdev.name = "hdmi";
+#endif
if (switch_dev_register(&external_common_state->sdev) < 0)
DEV_ERR("Hdmi switch registration failed\n");
diff --git a/drivers/video/msm/external_common.c b/drivers/video/msm/external_common.c
index 0a86a50..d6f59aa 100644
--- a/drivers/video/msm/external_common.c
+++ b/drivers/video/msm/external_common.c
@@ -347,11 +347,12 @@
struct device_attribute *attr, const char *buf, size_t count)
{
ssize_t ret = strnlen(buf, PAGE_SIZE);
-#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
- int hpd = 1;
-#else
- int hpd = atoi(buf);
-#endif
+ int hpd;
+ if (hdmi_prim_display)
+ hpd = 1;
+ else
+ hpd = atoi(buf);
+
if (external_common_state->hpd_feature) {
if (hpd == 0 && external_common_state->hpd_feature_on) {
external_common_state->hpd_feature(0);
@@ -652,6 +653,14 @@
return ret;
}
+static ssize_t hdmi_common_rda_hdmi_primary(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ ssize_t ret = snprintf(buf, PAGE_SIZE, "%d\n",
+ hdmi_prim_display);
+ DEV_DBG("%s: '%d'\n", __func__, hdmi_prim_display);
+ return ret;
+}
static DEVICE_ATTR(video_mode, S_IRUGO | S_IWUGO,
external_common_rda_video_mode, external_common_wta_video_mode);
@@ -671,6 +680,7 @@
static DEVICE_ATTR(format_3d, S_IRUGO | S_IWUGO, hdmi_3d_rda_format_3d,
hdmi_3d_wta_format_3d);
#endif
+static DEVICE_ATTR(hdmi_primary, S_IRUGO, hdmi_common_rda_hdmi_primary, NULL);
static struct attribute *external_common_fs_attrs[] = {
&dev_attr_video_mode.attr,
@@ -693,6 +703,7 @@
&dev_attr_cec_rd_frame.attr,
&dev_attr_cec_wr_frame.attr,
#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL_CEC_SUPPORT */
+ &dev_attr_hdmi_primary.attr,
NULL,
};
static struct attribute_group external_common_fs_attr_group = {
@@ -1567,11 +1578,10 @@
pinfo->pdest = DISPLAY_2;
pinfo->wait_cycle = 0;
pinfo->bpp = 24;
-#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
- pinfo->fb_num = 2;
-#else
- pinfo->fb_num = 1;
-#endif
+ if (hdmi_prim_display)
+ pinfo->fb_num = 2;
+ else
+ pinfo->fb_num = 1;
/* blk */
pinfo->lcdc.border_clr = 0;
diff --git a/drivers/video/msm/hdmi_msm.c b/drivers/video/msm/hdmi_msm.c
index a0665ac..a056328 100644
--- a/drivers/video/msm/hdmi_msm.c
+++ b/drivers/video/msm/hdmi_msm.c
@@ -2475,12 +2475,6 @@
goto error;
}
- /*
- * A small delay is needed here to avoid device crash observed
- * during reauthentication in MSM8960
- */
- msleep(20);
-
/* 0x0168 HDCP_RCVPORT_DATA12
[23:8] BSTATUS
[7:0] BCAPS */
@@ -4062,6 +4056,11 @@
static void hdmi_msm_hpd_off(void)
{
+ if (!hdmi_msm_state->hpd_initialized) {
+ DEV_DBG("%s: HPD is already OFF, returning\n", __func__);
+ return;
+ }
+
DEV_DBG("%s: (timer, clk, 5V, core, IRQ off)\n", __func__);
del_timer(&hdmi_msm_state->hpd_state_timer);
disable_irq(hdmi_msm_state->irq);
@@ -4087,6 +4086,12 @@
static int hdmi_msm_hpd_on(bool trigger_handler)
{
static int phy_reset_done;
+ uint32 hpd_ctrl;
+
+ if (hdmi_msm_state->hpd_initialized) {
+ DEV_DBG("%s: HPD is already ON, returning\n", __func__);
+ return 0;
+ }
hdmi_msm_clk(1);
hdmi_msm_state->pd->core_power(1, 1);
@@ -4104,36 +4109,34 @@
HDMI_OUTP(0x0208, 0x0001001B);
/* Check HPD State */
- if (!hdmi_msm_state->hpd_initialized) {
- uint32 hpd_ctrl;
- enable_irq(hdmi_msm_state->irq);
+ enable_irq(hdmi_msm_state->irq);
- /* set timeout to 4.1ms (max) for hardware debounce */
- hpd_ctrl = (HDMI_INP(0x0258) & ~0xFFF) | 0xFFF;
+ /* set timeout to 4.1ms (max) for hardware debounce */
+ hpd_ctrl = (HDMI_INP(0x0258) & ~0xFFF) | 0xFFF;
- /* Toggle HPD circuit to trigger HPD sense */
- HDMI_OUTP(0x0258, ~(1 << 28) & hpd_ctrl);
- HDMI_OUTP(0x0258, (1 << 28) | hpd_ctrl);
+ /* Toggle HPD circuit to trigger HPD sense */
+ HDMI_OUTP(0x0258, ~(1 << 28) & hpd_ctrl);
+ HDMI_OUTP(0x0258, (1 << 28) | hpd_ctrl);
- DEV_DBG("%s: (clk, 5V, core, IRQ on) <trigger:%s>\n", __func__,
- trigger_handler ? "true" : "false");
+ DEV_DBG("%s: (clk, 5V, core, IRQ on) <trigger:%s>\n", __func__,
+ trigger_handler ? "true" : "false");
- if (trigger_handler) {
- /* Set HPD state machine: ensure at least 2 readouts */
- mutex_lock(&hdmi_msm_state_mutex);
- hdmi_msm_state->hpd_stable = 0;
- hdmi_msm_state->hpd_prev_state = TRUE;
- mutex_lock(&external_common_state_hpd_mutex);
- external_common_state->hpd_state = FALSE;
- mutex_unlock(&external_common_state_hpd_mutex);
- hdmi_msm_state->hpd_cable_chg_detected = TRUE;
- mutex_unlock(&hdmi_msm_state_mutex);
- mod_timer(&hdmi_msm_state->hpd_state_timer,
- jiffies + HZ/2);
- }
-
- hdmi_msm_state->hpd_initialized = TRUE;
+ if (trigger_handler) {
+ /* Set HPD state machine: ensure at least 2 readouts */
+ mutex_lock(&hdmi_msm_state_mutex);
+ hdmi_msm_state->hpd_stable = 0;
+ hdmi_msm_state->hpd_prev_state = TRUE;
+ mutex_lock(&external_common_state_hpd_mutex);
+ external_common_state->hpd_state = FALSE;
+ mutex_unlock(&external_common_state_hpd_mutex);
+ hdmi_msm_state->hpd_cable_chg_detected = TRUE;
+ mutex_unlock(&hdmi_msm_state_mutex);
+ mod_timer(&hdmi_msm_state->hpd_state_timer,
+ jiffies + HZ/2);
}
+
+ hdmi_msm_state->hpd_initialized = TRUE;
+
hdmi_msm_set_mode(TRUE);
return 0;
@@ -4233,9 +4236,6 @@
int rc;
struct platform_device *fb_dev;
- if (cpu_is_apq8064())
- return -ENODEV;
-
if (!hdmi_msm_state) {
pr_err("%s: hdmi_msm_state is NULL\n", __func__);
return -ENOMEM;
@@ -4398,7 +4398,11 @@
queue_work(hdmi_work_queue, &hdmi_msm_state->hpd_read_work);
/* Initialize hdmi node and register with switch driver */
+#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
+ external_common_state->sdev.name = "hdmi_as_primary";
+#else
external_common_state->sdev.name = "hdmi";
+#endif
if (switch_dev_register(&external_common_state->sdev) < 0)
DEV_ERR("Hdmi switch registration failed\n");
@@ -4505,12 +4509,13 @@
{
int rc;
- if (cpu_is_msm8930())
- return 0;
-
if (msm_fb_detect_client("hdmi_msm"))
return 0;
+#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
+ hdmi_prim_display = 1;
+#endif
+
hdmi_msm_setup_video_mode_lut();
hdmi_msm_state = kzalloc(sizeof(*hdmi_msm_state), GFP_KERNEL);
if (!hdmi_msm_state) {
diff --git a/drivers/video/msm/lvds.c b/drivers/video/msm/lvds.c
index a69c64f..e93b238 100644
--- a/drivers/video/msm/lvds.c
+++ b/drivers/video/msm/lvds.c
@@ -110,23 +110,43 @@
mb();
if (mfd->panel_info.bpp == 24) {
- /* MDP_LCDC_LVDS_MUX_CTL_FOR_D0_3_TO_0 */
- MDP_OUTP(MDP_BASE + 0xc2014, 0x03040508);
- /* MDP_LCDC_LVDS_MUX_CTL_FOR_D0_6_TO_4 */
- MDP_OUTP(MDP_BASE + 0xc2018, 0x00000102);
- /* MDP_LCDC_LVDS_MUX_CTL_FOR_D1_3_TO_0 */
- MDP_OUTP(MDP_BASE + 0xc201c, 0x0c0d1011);
- /* MDP_LCDC_LVDS_MUX_CTL_FOR_D1_6_TO_4 */
- MDP_OUTP(MDP_BASE + 0xc2020, 0x00090a0b);
- /* MDP_LCDC_LVDS_MUX_CTL_FOR_D2_3_TO_0 */
- MDP_OUTP(MDP_BASE + 0xc2024, 0x151a191a);
- /* MDP_LCDC_LVDS_MUX_CTL_FOR_D2_6_TO_4 */
- MDP_OUTP(MDP_BASE + 0xc2028, 0x00121314);
- /* MDP_LCDC_LVDS_MUX_CTL_FOR_D3_3_TO_0 */
- MDP_OUTP(MDP_BASE + 0xc202c, 0x1706071b);
- /* MDP_LCDC_LVDS_MUX_CTL_FOR_D3_6_TO_4 */
- MDP_OUTP(MDP_BASE + 0xc2030, 0x000e0f16);
-
+ if (lvds_pdata &&
+ lvds_pdata->lvds_pixel_remap &&
+ lvds_pdata->lvds_pixel_remap()) {
+ /* MDP_LCDC_LVDS_MUX_CTL_FOR_D0_3_TO_0 */
+ MDP_OUTP(MDP_BASE + 0xc2014, 0x05080001);
+ /* MDP_LCDC_LVDS_MUX_CTL_FOR_D0_6_TO_4 */
+ MDP_OUTP(MDP_BASE + 0xc2018, 0x00020304);
+ /* MDP_LCDC_LVDS_MUX_CTL_FOR_D1_3_TO_0 */
+ MDP_OUTP(MDP_BASE + 0xc201c, 0x1011090a);
+ /* MDP_LCDC_LVDS_MUX_CTL_FOR_D1_6_TO_4 */
+ MDP_OUTP(MDP_BASE + 0xc2020, 0x000b0c0d);
+ /* MDP_LCDC_LVDS_MUX_CTL_FOR_D2_3_TO_0 */
+ MDP_OUTP(MDP_BASE + 0xc2024, 0x191a1213);
+ /* MDP_LCDC_LVDS_MUX_CTL_FOR_D2_6_TO_4 */
+ MDP_OUTP(MDP_BASE + 0xc2028, 0x00141518);
+ /* MDP_LCDC_LVDS_MUX_CTL_FOR_D3_3_TO_0 */
+ MDP_OUTP(MDP_BASE + 0xc202c, 0x171b0607);
+ /* MDP_LCDC_LVDS_MUX_CTL_FOR_D3_6_TO_4 */
+ MDP_OUTP(MDP_BASE + 0xc2030, 0x000e0f16);
+ } else {
+ /* MDP_LCDC_LVDS_MUX_CTL_FOR_D0_3_TO_0 */
+ MDP_OUTP(MDP_BASE + 0xc2014, 0x03040508);
+ /* MDP_LCDC_LVDS_MUX_CTL_FOR_D0_6_TO_4 */
+ MDP_OUTP(MDP_BASE + 0xc2018, 0x00000102);
+ /* MDP_LCDC_LVDS_MUX_CTL_FOR_D1_3_TO_0 */
+ MDP_OUTP(MDP_BASE + 0xc201c, 0x0c0d1011);
+ /* MDP_LCDC_LVDS_MUX_CTL_FOR_D1_6_TO_4 */
+ MDP_OUTP(MDP_BASE + 0xc2020, 0x00090a0b);
+ /* MDP_LCDC_LVDS_MUX_CTL_FOR_D2_3_TO_0 */
+ MDP_OUTP(MDP_BASE + 0xc2024, 0x151a191a);
+ /* MDP_LCDC_LVDS_MUX_CTL_FOR_D2_6_TO_4 */
+ MDP_OUTP(MDP_BASE + 0xc2028, 0x00121314);
+ /* MDP_LCDC_LVDS_MUX_CTL_FOR_D3_3_TO_0 */
+ MDP_OUTP(MDP_BASE + 0xc202c, 0x1706071b);
+ /* MDP_LCDC_LVDS_MUX_CTL_FOR_D3_6_TO_4 */
+ MDP_OUTP(MDP_BASE + 0xc2030, 0x000e0f16);
+ }
if (mfd->panel_info.lvds.channel_mode ==
LVDS_DUAL_CHANNEL_MODE) {
lvds_intf = 0x0001ff80;
diff --git a/drivers/video/msm/mdp.c b/drivers/video/msm/mdp.c
index e43f729..de91ade 100644
--- a/drivers/video/msm/mdp.c
+++ b/drivers/video/msm/mdp.c
@@ -86,6 +86,9 @@
struct workqueue_struct *mdp_dma_wq; /*mdp dma wq */
struct workqueue_struct *mdp_vsync_wq; /*mdp vsync wq */
+struct workqueue_struct *mdp_hist_wq; /*mdp histogram wq */
+struct work_struct mdp_histogram_worker;
+
static struct workqueue_struct *mdp_pipe_ctrl_wq; /* mdp mdp pipe ctrl wq */
static struct delayed_work mdp_pipe_ctrl_worker;
@@ -142,6 +145,315 @@
static uint32 mdp_prim_panel_type = NO_PANEL;
#ifndef CONFIG_FB_MSM_MDP22
+
+struct list_head mdp_hist_lut_list;
+DEFINE_MUTEX(mdp_hist_lut_list_mutex);
+
+uint32_t mdp_block2base(uint32_t block)
+{
+ uint32_t base = 0x0;
+ switch (block) {
+ case MDP_BLOCK_DMA_P:
+ base = 0x90000;
+ break;
+ case MDP_BLOCK_DMA_S:
+ base = 0xA0000;
+ break;
+ case MDP_BLOCK_VG_1:
+ base = 0x20000;
+ break;
+ case MDP_BLOCK_VG_2:
+ base = 0x30000;
+ break;
+ case MDP_BLOCK_RGB_1:
+ base = 0x40000;
+ break;
+ case MDP_BLOCK_RGB_2:
+ base = 0x50000;
+ break;
+ default:
+ break;
+ }
+ return base;
+}
+
+static uint32_t mdp_pp_block2hist_lut(uint32_t block)
+{
+ uint32_t valid = 0;
+ switch (block) {
+ case MDP_BLOCK_DMA_P:
+ valid = (mdp_rev >= MDP_REV_40) ? 1 : 0;
+ break;
+ case MDP_BLOCK_DMA_S:
+ valid = (mdp_rev >= MDP_REV_40) ? 1 : 0;
+ break;
+ case MDP_BLOCK_VG_1:
+ valid = (mdp_rev >= MDP_REV_40) ? 1 : 0;
+ break;
+ case MDP_BLOCK_VG_2:
+ valid = (mdp_rev >= MDP_REV_40) ? 1 : 0;
+ break;
+ default:
+ break;
+ }
+ return valid;
+}
+
+static void mdp_hist_lut_init_mgmt(struct mdp_hist_lut_mgmt *mgmt,
+ uint32_t block)
+{
+ mutex_init(&mgmt->lock);
+ mgmt->block = block;
+
+ mutex_lock(&mdp_hist_lut_list_mutex);
+ list_add(&mgmt->list, &mdp_hist_lut_list);
+ mutex_unlock(&mdp_hist_lut_list_mutex);
+}
+
+static int mdp_hist_lut_init(void)
+{
+ struct mdp_hist_lut_mgmt *temp;
+ struct list_head *pos, *q;
+ INIT_LIST_HEAD(&mdp_hist_lut_list);
+
+ if (mdp_rev >= MDP_REV_30) {
+ temp = kmalloc(sizeof(struct mdp_hist_lut_mgmt), GFP_KERNEL);
+ if (!temp)
+ goto exit;
+ mdp_hist_lut_init_mgmt(temp, MDP_BLOCK_DMA_P);
+ }
+
+ if (mdp_rev >= MDP_REV_40) {
+ temp = kmalloc(sizeof(struct mdp_hist_lut_mgmt), GFP_KERNEL);
+ if (!temp)
+ goto exit_list;
+ mdp_hist_lut_init_mgmt(temp, MDP_BLOCK_VG_1);
+
+ temp = kmalloc(sizeof(struct mdp_hist_lut_mgmt), GFP_KERNEL);
+ if (!temp)
+ goto exit_list;
+ mdp_hist_lut_init_mgmt(temp, MDP_BLOCK_VG_2);
+ }
+
+ if (mdp_rev > MDP_REV_42) {
+ temp = kmalloc(sizeof(struct mdp_hist_lut_mgmt), GFP_KERNEL);
+ if (!temp)
+ goto exit_list;
+ mdp_hist_lut_init_mgmt(temp, MDP_BLOCK_DMA_S);
+ }
+ return 0;
+
+exit_list:
+ mutex_lock(&mdp_hist_lut_list_mutex);
+ list_for_each_safe(pos, q, &mdp_hist_lut_list) {
+ temp = list_entry(pos, struct mdp_hist_lut_mgmt, list);
+ list_del(pos);
+ kfree(temp);
+ }
+ mutex_unlock(&mdp_hist_lut_list_mutex);
+exit:
+ pr_err("Failed initializing histogram LUT memory\n");
+ return -ENOMEM;
+}
+
+static int mdp_hist_lut_block2mgmt(uint32_t block,
+ struct mdp_hist_lut_mgmt **mgmt)
+{
+ struct mdp_hist_lut_mgmt *temp, *output;
+ int ret = 0;
+
+ output = NULL;
+
+ mutex_lock(&mdp_hist_lut_list_mutex);
+ list_for_each_entry(temp, &mdp_hist_lut_list, list) {
+ if (temp->block == block)
+ output = temp;
+ }
+ mutex_unlock(&mdp_hist_lut_list_mutex);
+
+ if (output == NULL)
+ ret = -EINVAL;
+ else
+ *mgmt = output;
+
+ return ret;
+}
+
+#define MDP_HIST_LUT_SIZE (256)
+static int mdp_hist_lut_write_off(struct mdp_hist_lut_data *data,
+ struct mdp_hist_lut_info *info, uint32_t offset)
+{
+ int i;
+ uint32_t element[MDP_HIST_LUT_SIZE];
+ uint32_t base = mdp_block2base(info->block);
+ uint32_t sel = info->bank_sel;
+
+
+ if (data->len != MDP_HIST_LUT_SIZE) {
+ pr_err("%s: data->len != %d", __func__, MDP_HIST_LUT_SIZE);
+ return -EINVAL;
+ }
+
+ if (copy_from_user(&element, data->data,
+ MDP_HIST_LUT_SIZE * sizeof(uint32_t))) {
+ pr_err("%s: Error copying histogram data", __func__);
+ return -ENOMEM;
+ }
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
+ for (i = 0; i < MDP_HIST_LUT_SIZE; i++)
+ MDP_OUTP(MDP_BASE + base + offset + (0x400*(sel)) + (4*i),
+ element[i]);
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
+
+ return 0;
+}
+
+static int mdp_hist_lut_write(struct mdp_hist_lut_data *data,
+ struct mdp_hist_lut_info *info)
+{
+ int ret = 0;
+
+ if (data->block != info->block) {
+ ret = -1;
+ pr_err("%s, data/info mdp_block mismatch! %d != %d\n",
+ __func__, data->block, info->block);
+ goto error;
+ }
+
+ switch (data->block) {
+ case MDP_BLOCK_VG_1:
+ case MDP_BLOCK_VG_2:
+ ret = mdp_hist_lut_write_off(data, info, 0x3400);
+ break;
+ case MDP_BLOCK_DMA_P:
+ case MDP_BLOCK_DMA_S:
+ ret = mdp_hist_lut_write_off(data, info, 0x4800);
+ break;
+ default:
+ ret = -EINVAL;
+ goto error;
+ }
+
+error:
+ return ret;
+}
+
+#define MDP_HIST_LUT_VG_EN_MASK (0x20000)
+#define MDP_HIST_LUT_VG_EN_SHIFT (17)
+#define MDP_HIST_LUT_VG_EN_OFFSET (0x0058)
+#define MDP_HIST_LUT_VG_SEL_OFFSET (0x0064)
+static void mdp_hist_lut_commit_vg(struct mdp_hist_lut_info *info)
+{
+ uint32_t out_en, temp_en;
+ uint32_t base = mdp_block2base(info->block);
+ temp_en = (info->is_enabled) ? (1 << MDP_HIST_LUT_VG_EN_SHIFT) : 0x0;
+
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
+ out_en = inpdw(MDP_BASE + base + MDP_HIST_LUT_VG_EN_OFFSET) &
+ ~MDP_HIST_LUT_VG_EN_MASK;
+ MDP_OUTP(MDP_BASE + base + MDP_HIST_LUT_VG_EN_OFFSET, out_en | temp_en);
+
+ if (info->has_sel_update)
+ MDP_OUTP(MDP_BASE + base + MDP_HIST_LUT_VG_SEL_OFFSET,
+ info->bank_sel);
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
+}
+
+#define MDP_HIST_LUT_DMA_EN_MASK (0x7)
+#define MDP_HIST_LUT_DMA_SEL_MASK (0x400)
+#define MDP_HIST_LUT_DMA_SEL_SHIFT (10)
+#define MDP_HIST_LUT_DMA_P_OFFSET (0x0070)
+#define MDP_HIST_LUT_DMA_S_OFFSET (0x0028)
+static void mdp_hist_lut_commit_dma(struct mdp_hist_lut_info *info)
+{
+ uint32_t out, temp, mask;
+ uint32_t base = mdp_block2base(info->block);
+ uint32_t offset = (info->block == MDP_BLOCK_DMA_P) ?
+ MDP_HIST_LUT_DMA_P_OFFSET : MDP_HIST_LUT_DMA_S_OFFSET;
+
+ mask = MDP_HIST_LUT_DMA_EN_MASK;
+ temp = (info->is_enabled) ? 0x7 : 0x0;
+
+ if (info->has_sel_update) {
+ mask |= MDP_HIST_LUT_DMA_SEL_MASK;
+ temp |= ((info->bank_sel & 0x1) << MDP_HIST_LUT_DMA_SEL_SHIFT);
+ }
+
+ out = inpdw(MDP_BASE + base + offset) & ~mask;
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
+ MDP_OUTP(MDP_BASE + base + offset, out | temp);
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
+}
+
+static void mdp_hist_lut_commit_info(struct mdp_hist_lut_info *info)
+{
+ switch (info->block) {
+ case MDP_BLOCK_VG_1:
+ case MDP_BLOCK_VG_2:
+ mdp_hist_lut_commit_vg(info);
+ break;
+ case MDP_BLOCK_DMA_P:
+ case MDP_BLOCK_DMA_S:
+ mdp_hist_lut_commit_dma(info);
+ break;
+ default:
+ goto error;
+ }
+
+error:
+ return;
+}
+
+static void mdp_hist_lut_update_info(struct mdp_hist_lut_info *info, int ops)
+{
+ info->bank_sel = (ops & 0x8) >> 3;
+ info->is_enabled = (ops & 0x1) ? TRUE : FALSE;
+ info->has_sel_update = (ops & 0x10) ? TRUE : FALSE;
+}
+
+int mdp_hist_lut_config(struct mdp_hist_lut_data *data)
+{
+ struct mdp_hist_lut_mgmt *mgmt = NULL;
+ struct mdp_hist_lut_info info;
+ int ret = 0;
+
+ if (!mdp_pp_block2hist_lut(data->block)) {
+ ret = -ENOTTY;
+ goto error;
+ }
+
+ ret = mdp_hist_lut_block2mgmt(data->block, &mgmt);
+ if (ret)
+ goto error;
+
+ mutex_lock(&mgmt->lock);
+
+ info.block = mgmt->block;
+
+ mdp_hist_lut_update_info(&info, data->ops);
+
+ switch ((data->ops & 0x6) >> 1) {
+ case 0x1:
+ pr_info("%s: histogram LUT read not supported\n", __func__);
+ break;
+ case 0x2:
+ ret = mdp_hist_lut_write(data, &info);
+ if (ret)
+ goto error_lock;
+ break;
+ default:
+ break;
+ }
+
+ mdp_hist_lut_commit_info(&info);
+
+error_lock:
+ mutex_unlock(&mgmt->lock);
+error:
+ return ret;
+}
+
+
DEFINE_MUTEX(mdp_lut_push_sem);
static int mdp_lut_i;
static int mdp_lut_hw_update(struct fb_cmap *cmap)
@@ -211,8 +523,8 @@
}
/*mask off non LUT select bits*/
- out = inpdw(MDP_BASE + 0x90070) & ~(0x1 << 10);
- MDP_OUTP(MDP_BASE + 0x90070, (mdp_lut_i << 10) | out);
+ out = inpdw(MDP_BASE + 0x90070) & ~((0x1 << 10) | 0x7);
+ MDP_OUTP(MDP_BASE + 0x90070, (mdp_lut_i << 10) | 0x7 | out);
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
mdp_lut_i = (mdp_lut_i + 1)%2;
@@ -225,9 +537,9 @@
if (mdp_lut_push) {
mutex_lock(&mdp_lut_push_sem);
mdp_lut_push = 0;
- out = inpdw(MDP_BASE + 0x90070) & ~(0x1 << 10);
+ out = inpdw(MDP_BASE + 0x90070) & ~((0x1 << 10) | 0x7);
MDP_OUTP(MDP_BASE + 0x90070,
- (mdp_lut_push_i << 10) | out);
+ (mdp_lut_push_i << 10) | 0x7 | out);
mutex_unlock(&mdp_lut_push_sem);
}
}
@@ -237,20 +549,112 @@
#ifdef CONFIG_FB_MSM_MDP40
unsigned int mdp_hist_frame_cnt;
-struct completion mdp_hist_comp;
-boolean mdp_is_hist_start = FALSE;
#else
static unsigned int mdp_hist_frame_cnt;
-static struct completion mdp_hist_comp;
-static boolean mdp_is_hist_start = FALSE;
#endif
+struct completion mdp_hist_comp;
static DEFINE_MUTEX(mdp_hist_mutex);
static boolean mdp_is_hist_data = FALSE;
+static boolean mdp_is_hist_start = FALSE;
+boolean mdp_is_hist_valid = FALSE;
+static boolean mdp_is_hist_init = FALSE;
+static uint32 mdp_hist_r[128];
+static uint32 mdp_hist_g[128];
+static uint32 mdp_hist_b[128];
+
+void __mdp_histogram_kickoff()
+{
+ char *mdp_hist_base;
+
+ if (mdp_rev >= MDP_REV_40)
+ mdp_hist_base = MDP_BASE + 0x95000;
+ else if (mdp_rev >= MDP_REV_30 && mdp_rev <= MDP_REV_31)
+ mdp_hist_base = MDP_BASE + 0x94000;
+ else {
+ pr_err("%s(): Unsupported MDP rev. %u\n", __func__, mdp_rev);
+ return ;
+ }
+
+ if (mdp_is_hist_data == TRUE) {
+ MDP_OUTP(mdp_hist_base + 0x004, mdp_hist_frame_cnt);
+ MDP_OUTP(mdp_hist_base, 1);
+ }
+}
+
+void __mdp_histogram_reset()
+{
+ char *mdp_hist_base;
+
+ if (mdp_rev >= MDP_REV_40)
+ mdp_hist_base = MDP_BASE + 0x95000;
+ else if (mdp_rev >= MDP_REV_30 && mdp_rev <= MDP_REV_31)
+ mdp_hist_base = MDP_BASE + 0x94000;
+ else {
+ pr_err("%s(): Unsupported MDP rev %u\n", __func__, mdp_rev);
+ return ;
+ }
+
+ MDP_OUTP(mdp_hist_base + 0x00C, 1);
+}
+
+static void mdp_hist_read_work(struct work_struct *data)
+{
+ char *mdp_hist_base;
+ uint32 r_data_offset = 0x100, g_data_offset = 0x200;
+ uint32 b_data_offset = 0x300;
+ int num_bins, i = 0;
+
+ if (mdp_rev >= MDP_REV_42) {
+ mdp_hist_base = MDP_BASE + 0x95000;
+ r_data_offset = 0x400;
+ g_data_offset = 0x800;
+ b_data_offset = 0xc00;
+ num_bins = 128;
+ } else if (mdp_rev >= MDP_REV_40 && mdp_rev <= MDP_REV_41) {
+ mdp_hist_base = MDP_BASE + 0x95000;
+ num_bins = 32;
+ } else if (mdp_rev >= MDP_REV_30 && mdp_rev <= MDP_REV_31) {
+ mdp_hist_base = MDP_BASE + 0x94000;
+ num_bins = 32;
+ } else {
+ pr_err("%s(): Unsupported MDP rev %u\n", __func__, mdp_rev);
+ return ;
+ }
+
+ mutex_lock(&mdp_hist_mutex);
+ if (mdp_is_hist_data == FALSE) {
+ pr_debug("%s, Histogram disabled before read.\n", __func__);
+ goto error;
+ }
+
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
+ for (i = 0; i < num_bins; i++) {
+ mdp_hist_r[i] = inpdw(mdp_hist_base + r_data_offset + (4*i));
+ mdp_hist_g[i] = inpdw(mdp_hist_base + g_data_offset + (4*i));
+ mdp_hist_b[i] = inpdw(mdp_hist_base + b_data_offset + (4*i));
+ }
+
+ __mdp_histogram_kickoff();
+
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
+
+ /* if read was triggered by an underrun, don't wake up readers*/
+ if (mdp_is_hist_valid && mdp_is_hist_init) {
+ complete(&mdp_hist_comp);
+ } else {
+ if (mdp_is_hist_valid == FALSE)
+ mdp_is_hist_valid = TRUE;
+
+ if (mdp_is_hist_init == FALSE)
+ mdp_is_hist_init = TRUE;
+ }
+error:
+ mutex_unlock(&mdp_hist_mutex);
+}
/*should hold mdp_hist_mutex before calling this function*/
int _mdp_histogram_ctrl(boolean en)
{
- unsigned long flag;
unsigned long hist_base;
uint32_t status;
@@ -266,34 +670,40 @@
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
mdp_hist_frame_cnt = 1;
mdp_enable_irq(MDP_HISTOGRAM_TERM);
- spin_lock_irqsave(&mdp_spin_lock, flag);
- if (mdp_rev >= MDP_REV_40) {
- MDP_OUTP(MDP_BASE + hist_base + 0x10, 1);
- MDP_OUTP(MDP_BASE + hist_base + 0x1c, INTR_HIST_DONE);
- }
- spin_unlock_irqrestore(&mdp_spin_lock, flag);
- MDP_OUTP(MDP_BASE + hist_base + 0x4, mdp_hist_frame_cnt);
- MDP_OUTP(MDP_BASE + hist_base, 1);
- mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
+ INIT_COMPLETION(mdp_hist_comp);
+
+ /*Clear the interrupts before enabling them*/
+ MDP_OUTP(MDP_BASE + hist_base + 0x18, INTR_HIST_DONE |
+ INTR_HIST_RESET_SEQ_DONE);
+ MDP_OUTP(MDP_BASE + hist_base + 0x10, 1);
+ MDP_OUTP(MDP_BASE + hist_base + 0x1c, INTR_HIST_DONE |
+ INTR_HIST_RESET_SEQ_DONE);
+
mdp_is_hist_data = TRUE;
+ mdp_is_hist_valid = TRUE;
+ mdp_is_hist_init = FALSE;
+
+ __mdp_histogram_reset();
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
+
} else {
if (!mdp_is_hist_data)
return -EINVAL;
mdp_is_hist_data = FALSE;
+ mdp_is_hist_valid = FALSE;
+ mdp_is_hist_init = FALSE;
+
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
+ status = inpdw(MDP_BASE + hist_base + 0x1C);
+ status &= ~(INTR_HIST_DONE | INTR_HIST_RESET_SEQ_DONE);
+ MDP_OUTP(MDP_BASE + hist_base + 0x1C, status);
+ MDP_OUTP(MDP_BASE + hist_base + 0x18, INTR_HIST_DONE |
+ INTR_HIST_RESET_SEQ_DONE);
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
+
complete(&mdp_hist_comp);
- if (mdp_rev >= MDP_REV_40) {
- mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
- status = inpdw(MDP_BASE + hist_base + 0x1C);
- status &= ~INTR_HIST_DONE;
- MDP_OUTP(MDP_BASE + hist_base + 0x1C, status);
-
- MDP_OUTP(MDP_BASE + hist_base + 0x18, INTR_HIST_DONE);
- mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF,
- FALSE);
- }
-
mdp_disable_irq(MDP_HISTOGRAM_TERM);
}
@@ -307,6 +717,10 @@
if (mdp_is_hist_start)
ret = _mdp_histogram_ctrl(en);
mutex_unlock(&mdp_hist_mutex);
+
+ if (en == false)
+ flush_workqueue(mdp_hist_wq);
+
return ret;
}
@@ -361,6 +775,10 @@
ret = _mdp_histogram_ctrl(FALSE);
+ mutex_unlock(&mdp_hist_mutex);
+ flush_workqueue(mdp_hist_wq);
+ return ret;
+
mdp_hist_stop_err:
mutex_unlock(&mdp_hist_mutex);
return ret;
@@ -369,55 +787,26 @@
/*call from within mdp_hist_mutex*/
static int _mdp_copy_hist_data(struct mdp_histogram *hist)
{
- char *mdp_hist_base;
- uint32 r_data_offset = 0x100, g_data_offset = 0x200;
- uint32 b_data_offset = 0x300;
int ret = 0;
- if (mdp_rev >= MDP_REV_42) {
- mdp_hist_base = MDP_BASE + 0x95000;
- r_data_offset = 0x400;
- g_data_offset = 0x800;
- b_data_offset = 0xc00;
- } else if (mdp_rev >= MDP_REV_40 && mdp_rev <= MDP_REV_41) {
- mdp_hist_base = MDP_BASE + 0x95000;
- } else if (mdp_rev >= MDP_REV_30 && mdp_rev <= MDP_REV_31) {
- mdp_hist_base = MDP_BASE + 0x94000;
- } else {
- pr_err("%s(): Unsupported MDP rev %u\n", __func__, mdp_rev);
- return -EPERM;
- }
-
- mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
if (hist->r) {
- ret = copy_to_user(hist->r, mdp_hist_base + r_data_offset,
- hist->bin_cnt * 4);
+ ret = copy_to_user(hist->r, mdp_hist_r, hist->bin_cnt * 4);
if (ret)
goto hist_err;
}
if (hist->g) {
- ret = copy_to_user(hist->g, mdp_hist_base + g_data_offset,
- hist->bin_cnt * 4);
+ ret = copy_to_user(hist->g, mdp_hist_g, hist->bin_cnt * 4);
if (ret)
goto hist_err;
}
if (hist->b) {
- ret = copy_to_user(hist->b, mdp_hist_base + b_data_offset,
- hist->bin_cnt * 4);
+ ret = copy_to_user(hist->b, mdp_hist_b, hist->bin_cnt * 4);
if (ret)
goto hist_err;
}
-
- if (mdp_is_hist_start == TRUE) {
- MDP_OUTP(mdp_hist_base + 0x004,
- mdp_hist_frame_cnt);
- MDP_OUTP(mdp_hist_base, 1);
- }
- mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
return 0;
-
hist_err:
- printk(KERN_ERR "%s: invalid hist buffer\n", __func__);
+ pr_err("%s: invalid hist buffer\n", __func__);
return ret;
}
@@ -435,17 +824,17 @@
mutex_lock(&mdp_hist_mutex);
if (!mdp_is_hist_data) {
- ret = -EINVAL;
- goto error;
- }
-
- if (!mdp_is_hist_start) {
- printk(KERN_ERR "%s histogram not started\n", __func__);
+ pr_err("%s - histogram not ready\n", __func__);
ret = -EPERM;
goto error;
}
- INIT_COMPLETION(mdp_hist_comp);
+ if (!mdp_is_hist_start) {
+ pr_err("%s histogram not started\n", __func__);
+ ret = -EPERM;
+ goto error;
+ }
+
mdp_hist_frame_cnt = hist->frame_cnt;
mutex_unlock(&mdp_hist_mutex);
@@ -455,8 +844,9 @@
}
mutex_lock(&mdp_hist_mutex);
- if (mdp_is_hist_data)
+ if (mdp_is_hist_data && mdp_is_hist_init)
ret = _mdp_copy_hist_data(hist);
+
error:
mutex_unlock(&mdp_hist_mutex);
return ret;
@@ -818,7 +1208,7 @@
#ifndef CONFIG_FB_MSM_MDP40
irqreturn_t mdp_isr(int irq, void *ptr)
{
- uint32 mdp_interrupt = 0;
+ uint32 hist_interrupt, mdp_interrupt = 0;
struct mdp_dma_data *dma;
unsigned long flag;
@@ -853,24 +1243,34 @@
}
#ifndef CONFIG_FB_MSM_MDP22
if (mdp_interrupt & MDP_HIST_DONE) {
+ hist_interrupt = inp32(MDP_DMA_P_HIST_INTR_STATUS);
outp32(MDP_BASE + 0x94018, 0x3);
outp32(MDP_INTR_CLEAR, MDP_HIST_DONE);
- complete(&mdp_hist_comp);
+ if (hist_interrupt & INTR_HIST_RESET_SEQ_DONE)
+ __mdp_histogram_kickoff();
+
+ if (hist_interrupt & INTR_HIST_DONE) {
+ if (waitqueue_active(&mdp_hist_comp.wait)) {
+ if (!queue_work(mdp_hist_wq,
+ &mdp_histogram_worker)) {
+ pr_err("%s: can't queue hist_read\n",
+ __func__);
+ }
+ } else
+ __mdp_histogram_reset();
+ }
}
/* LCDC UnderFlow */
if (mdp_interrupt & LCDC_UNDERFLOW) {
mdp_lcdc_underflow_cnt++;
/*when underflow happens HW resets all the histogram
- registers that were set before so restore them back
- to normal.*/
+ registers that were set before so restore them back
+ to normal.*/
MDP_OUTP(MDP_BASE + 0x94010, 1);
- MDP_OUTP(MDP_BASE + 0x9401c, 2);
- if (mdp_is_hist_start == TRUE) {
- MDP_OUTP(MDP_BASE + 0x94004,
- mdp_hist_frame_cnt);
- MDP_OUTP(MDP_BASE + 0x94000, 1);
- }
+ MDP_OUTP(MDP_BASE + 0x9401c, INTR_HIST_DONE);
+ mdp_is_hist_valid = FALSE;
+ __mdp_histogram_reset();
}
/* LCDC Frame Start */
@@ -969,6 +1369,8 @@
spin_lock_init(&mdp_spin_lock);
mdp_dma_wq = create_singlethread_workqueue("mdp_dma_wq");
mdp_vsync_wq = create_singlethread_workqueue("mdp_vsync_wq");
+ mdp_hist_wq = create_singlethread_workqueue("mdp_hist_wq");
+ INIT_WORK(&mdp_histogram_worker, mdp_hist_read_work);
mdp_pipe_ctrl_wq = create_singlethread_workqueue("mdp_pipe_ctrl_wq");
INIT_DELAYED_WORK(&mdp_pipe_ctrl_worker,
mdp_pipe_ctrl_workqueue_handler);
@@ -1009,8 +1411,6 @@
mutex_init(&dma_wb_data.ov_mutex);
#endif
-
-
#ifndef CONFIG_FB_MSM_MDP22
init_completion(&mdp_hist_comp);
#endif
@@ -1128,7 +1528,6 @@
}
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
#endif
- mdp_histogram_ctrl(TRUE);
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
ret = panel_next_on(pdev);
@@ -1141,6 +1540,7 @@
mdp4_mddi_overlay_restore();
#endif
+ mdp_histogram_ctrl(TRUE);
return ret;
}
@@ -1444,6 +1844,9 @@
mfd->ov0_blt_state = 0;
mfd->use_ov0_blt = 0 ;
+ /* initialize Post Processing data*/
+ mdp_hist_lut_init();
+
/* add panel data */
if (platform_device_add_data
(msm_fb_dev, pdev->dev.platform_data,
diff --git a/drivers/video/msm/mdp.h b/drivers/video/msm/mdp.h
index 35a1453..6dcc293 100644
--- a/drivers/video/msm/mdp.h
+++ b/drivers/video/msm/mdp.h
@@ -44,6 +44,10 @@
extern int mdp_rev;
extern struct mdp_csc_cfg mdp_csc_convert[4];
+extern struct workqueue_struct *mdp_hist_wq;
+extern struct work_struct mdp_histogram_worker;
+extern boolean mdp_is_hist_valid;
+
#define MDP4_REVISION_V1 0
#define MDP4_REVISION_V2 1
#define MDP4_REVISION_V2_1 2
@@ -83,6 +87,7 @@
extern struct mdp_ccs mdp_ccs_yuv2rgb ;
extern struct mdp_ccs mdp_ccs_rgb2yuv ;
+extern unsigned char hdmi_prim_display;
/*
* MDP Image Structure
@@ -221,6 +226,20 @@
struct completion dmap_comp;
};
+extern struct list_head mdp_hist_lut_list;
+extern struct mutex mdp_hist_lut_list_mutex;
+struct mdp_hist_lut_mgmt {
+ uint32_t block;
+ struct mutex lock;
+ struct list_head list;
+};
+
+struct mdp_hist_lut_info {
+ uint32_t block;
+ boolean is_enabled, has_sel_update;
+ int bank_sel;
+};
+
#define MDP_CMD_DEBUG_ACCESS_BASE (MDP_BASE+0x10000)
#define MDP_DMA2_TERM 0x1
@@ -606,6 +625,10 @@
#define MDP_EBI2_LCD0 (msm_mdp_base + 0x003c)
#define MDP_EBI2_LCD1 (msm_mdp_base + 0x0040)
#define MDP_EBI2_PORTMAP_MODE (msm_mdp_base + 0x005c)
+
+#define MDP_DMA_P_HIST_INTR_STATUS (msm_mdp_base + 0x94014)
+#define MDP_DMA_P_HIST_INTR_CLEAR (msm_mdp_base + 0x94018)
+#define MDP_DMA_P_HIST_INTR_ENABLE (msm_mdp_base + 0x9401C)
#endif
#define MDP_FULL_BYPASS_WORD43 (msm_mdp_base + 0x101ac)
@@ -716,6 +739,11 @@
#ifdef CONFIG_MSM_BUS_SCALING
int mdp_bus_scale_update_request(uint32_t index);
+#else
+static inline int mdp_bus_scale_update_request(uint32_t index)
+{
+ return 0;
+}
#endif
#ifdef MDP_HW_VSYNC
@@ -733,6 +761,8 @@
int mdp_start_histogram(struct fb_info *info);
int mdp_stop_histogram(struct fb_info *info);
int mdp_histogram_ctrl(boolean en);
+void __mdp_histogram_kickoff(void);
+void __mdp_histogram_reset(void);
void mdp_footswitch_ctrl(boolean on);
#ifdef CONFIG_FB_MSM_MDP303
diff --git a/drivers/video/msm/mdp4.h b/drivers/video/msm/mdp4.h
index b72350d..c4f6a04 100644
--- a/drivers/video/msm/mdp4.h
+++ b/drivers/video/msm/mdp4.h
@@ -20,7 +20,6 @@
extern struct mdp_dma_data dma_wb_data;
extern unsigned int mdp_hist_frame_cnt;
extern struct completion mdp_hist_comp;
-extern boolean mdp_is_hist_start;
extern boolean mdp_is_in_isr;
extern uint32 mdp_intr_mask;
extern spinlock_t mdp_spin_lock;
@@ -446,14 +445,7 @@
}
#endif
-#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
void mdp4_dtv_set_black_screen(void);
-#else
-static inline void mdp4_dtv_set_black_screen(void)
-{
- /* empty */
-}
-#endif
static inline int mdp4_overlay_borderfill_supported(void)
{
@@ -708,6 +700,9 @@
int mdp4_writeback_init(struct fb_info *info);
int mdp4_writeback_terminate(struct fb_info *info);
+uint32_t mdp_block2base(uint32_t block);
+int mdp_hist_lut_config(struct mdp_hist_lut_data *data);
+
void mdp4_hsic_set(struct mdp4_overlay_pipe *pipe, struct dpp_ctrl *ctrl);
void mdp4_hsic_update(struct mdp4_overlay_pipe *pipe);
int mdp4_csc_config(struct mdp_csc_cfg_data *config);
@@ -720,4 +715,5 @@
void mdp4_init_writeback_buf(struct msm_fb_data_type *mfd, u32 mix_num);
void mdp4_free_writeback_buf(struct msm_fb_data_type *mfd, u32 mix_num);
+int mdp4_igc_lut_config(struct mdp_igc_lut_data *cfg);
#endif /* MDP_H */
diff --git a/drivers/video/msm/mdp4_dtv.c b/drivers/video/msm/mdp4_dtv.c
index ba774b9..09bc9c2 100644
--- a/drivers/video/msm/mdp4_dtv.c
+++ b/drivers/video/msm/mdp4_dtv.c
@@ -225,11 +225,11 @@
* get/set panel specific fb info
*/
mfd->panel_info = pdata->panel_info;
-#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
- mfd->fb_imgType = MSMFB_DEFAULT_TYPE;
-#else
- mfd->fb_imgType = MDP_RGB_565;
-#endif
+ if (hdmi_prim_display)
+ mfd->fb_imgType = MSMFB_DEFAULT_TYPE;
+ else
+ mfd->fb_imgType = MDP_RGB_565;
+
fbi = mfd->fbi;
fbi->var.pixclock = mfd->panel_info.clk_rate;
fbi->var.left_margin = mfd->panel_info.lcdc.h_back_porch;
diff --git a/drivers/video/msm/mdp4_overlay.c b/drivers/video/msm/mdp4_overlay.c
index aa383e0..a9c03ca 100644
--- a/drivers/video/msm/mdp4_overlay.c
+++ b/drivers/video/msm/mdp4_overlay.c
@@ -277,6 +277,7 @@
void mdp4_overlay_dmap_cfg(struct msm_fb_data_type *mfd, int lcdc)
{
uint32 dma2_cfg_reg;
+ uint32 mask, curr;
dma2_cfg_reg = DMA_DITHER_EN;
#ifdef BLT_RGB565
@@ -309,6 +310,9 @@
#endif
/* dma2 config register */
+ curr = inpdw(MDP_BASE + 0x90000);
+ mask = 0xBFFFFFFF;
+ dma2_cfg_reg = (dma2_cfg_reg & mask) | (curr & ~mask);
MDP_OUTP(MDP_BASE + 0x90000, dma2_cfg_reg);
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
@@ -398,7 +402,8 @@
pipe->op_mode |= MDP4_OP_SCALEY_EN;
if (pipe->pipe_type == OVERLAY_TYPE_VIDEO) {
- if (pipe->alpha_enable && pipe->dst_h > pipe->src_h)
+ if (pipe->flags & MDP_BACKEND_COMPOSITION &&
+ pipe->alpha_enable && pipe->dst_h > pipe->src_h)
pipe->op_mode |= MDP4_OP_SCALEY_PIXEL_RPT;
else if (pipe->dst_h <= (pipe->src_h / 4))
pipe->op_mode |= MDP4_OP_SCALEY_MN_PHASE;
@@ -420,7 +425,8 @@
pipe->op_mode |= MDP4_OP_SCALEX_EN;
if (pipe->pipe_type == OVERLAY_TYPE_VIDEO) {
- if (pipe->alpha_enable && pipe->dst_w > pipe->src_w)
+ if (pipe->flags & MDP_BACKEND_COMPOSITION &&
+ pipe->alpha_enable && pipe->dst_w > pipe->src_w)
pipe->op_mode |= MDP4_OP_SCALEX_PIXEL_RPT;
else if (pipe->dst_w <= (pipe->src_w / 4))
pipe->op_mode |= MDP4_OP_SCALEX_MN_PHASE;
@@ -442,6 +448,7 @@
char *rgb_base;
uint32 src_size, src_xy, dst_size, dst_xy;
uint32 format, pattern;
+ uint32 curr, mask;
uint32 offset = 0;
int pnum;
@@ -473,6 +480,12 @@
mdp4_scale_setup(pipe);
+ /* Ensure proper covert matrix loaded when color space swaps */
+ curr = inpdw(rgb_base + 0x0058);
+ /* Don't touch bits you don't want to configure*/
+ mask = 0xFFFEFFFF;
+ pipe->op_mode = (pipe->op_mode & mask) | (curr & ~mask);
+
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
outpdw(rgb_base + 0x0000, src_size); /* MDP_RGB_SRC_SIZE */
@@ -558,7 +571,7 @@
char *vg_base;
uint32 frame_size, src_size, src_xy, dst_size, dst_xy;
uint32 format, pattern, luma_offset, chroma_offset;
- uint32 mask, curr;
+ uint32 mask, curr, addr;
int pnum, ptype;
pnum = pipe->pipe_num - OVERLAY_PIPE_VG1; /* start from 0 */
@@ -625,13 +638,20 @@
/* Ensure proper covert matrix loaded when color space swaps */
curr = inpdw(vg_base + 0x0058);
mask = 0x600;
+
if ((curr & mask) != (pipe->op_mode & mask)) {
- curr = ((uint32_t)vg_base) + 0x4000;
+ addr = ((uint32_t)vg_base) + 0x4000;
if (ptype != OVERLAY_TYPE_RGB)
- mdp4_csc_write(&(mdp_csc_convert[1]), curr);
+ mdp4_csc_write(&(mdp_csc_convert[1]), addr);
else
- mdp4_csc_write(&(mdp_csc_convert[0]), curr);
+ mdp4_csc_write(&(mdp_csc_convert[0]), addr);
+
+ mask = 0xFFFCFFFF;
+ } else {
+ /* Don't touch bits you don't want to configure*/
+ mask = 0xFFFCF1FF;
}
+ pipe->op_mode = (pipe->op_mode & mask) | (curr & ~mask);
/* luma component plane */
outpdw(vg_base + 0x0010, pipe->srcp0_addr + luma_offset);
@@ -1367,14 +1387,8 @@
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
}
- if (data) {
- if (pipe_cnt == 1) {
- mdp4_update_perf_level(OVERLAY_PERF_LEVEL4);
-#ifdef CONFIG_MSM_BUS_SCALING
- mdp_bus_scale_update_request(2);
-#endif
- }
- }
+ if (data && pipe_cnt == 1)
+ mdp4_update_perf_level(OVERLAY_PERF_LEVEL4);
}
void mdp4_mixer_stage_up(struct mdp4_overlay_pipe *pipe)
@@ -1873,7 +1887,7 @@
static int get_img(struct msmfb_data *img, struct fb_info *info,
unsigned long *start, unsigned long *len, struct file **srcp_file,
- struct ion_handle **srcp_ihdl)
+ int *p_need, struct ion_handle **srcp_ihdl)
{
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
@@ -1883,6 +1897,8 @@
#ifdef CONFIG_ANDROID_PMEM
unsigned long vstart;
#endif
+ *p_need = 0;
+
if (img->flags & MDP_BLIT_SRC_GEM) {
*srcp_file = NULL;
return kgsl_gem_obj_addr(img->memory_id, (int) img->priv,
@@ -1898,8 +1914,10 @@
fb_num = MINOR(file->f_dentry->d_inode->i_rdev);
if (get_fb_phys_info(start, len, fb_num))
ret = -1;
- else
+ else {
*srcp_file = file;
+ *p_need = put_needed;
+ }
} else
ret = -1;
if (ret)
@@ -2016,9 +2034,7 @@
#define OVERLAY_720P_TILE_SIZE 0x0E6000
#define OVERLAY_WSVGA_SIZE 0x98000 /* 1024x608, align 600 to 32bit */
-#ifdef CONFIG_MSM_BUS_SCALING
#define OVERLAY_BUS_SCALE_TABLE_BASE 6
-#endif
static int mdp4_overlay_is_rgb_type(int format)
{
@@ -2037,9 +2053,10 @@
}
}
-static uint32 mdp4_overlay_get_perf_level(struct mdp_overlay *req)
+static uint32 mdp4_overlay_get_perf_level(struct mdp_overlay *req,
+ struct msm_fb_data_type *mfd)
{
- int is_fg;
+ int is_fg = 0, i, cnt;
if (req->is_fg && ((req->alpha & 0x0ff) == 0xff))
is_fg = 1;
@@ -2050,9 +2067,10 @@
if (req->flags & MDP_DEINTERLACE)
return OVERLAY_PERF_LEVEL1;
- if (ctrl->plist[OVERLAY_PIPE_VG1].pipe_used &&
- ctrl->plist[OVERLAY_PIPE_VG2].pipe_used)
- return OVERLAY_PERF_LEVEL1;
+ for (i = 0, cnt = 0; i < OVERLAY_PIPE_MAX; i++) {
+ if (ctrl->plist[i].pipe_used && ++cnt > 2)
+ return OVERLAY_PERF_LEVEL1;
+ }
if (mdp4_overlay_is_rgb_type(req->src.format) && is_fg &&
((req->src.width * req->src.height) <= OVERLAY_WSVGA_SIZE))
@@ -2061,9 +2079,18 @@
return OVERLAY_PERF_LEVEL1;
if (req->src.width*req->src.height <= OVERLAY_VGA_SIZE)
- return OVERLAY_PERF_LEVEL3;
- else if (req->src.width*req->src.height <= OVERLAY_720P_TILE_SIZE)
- return OVERLAY_PERF_LEVEL2;
+ return OVERLAY_PERF_LEVEL4;
+ else if (req->src.width*req->src.height <= OVERLAY_720P_TILE_SIZE) {
+ u32 max, min;
+ max = (req->dst_rect.h > req->dst_rect.w) ?
+ req->dst_rect.h : req->dst_rect.w;
+ min = (mfd->panel_info.yres > mfd->panel_info.xres) ?
+ mfd->panel_info.xres : mfd->panel_info.yres;
+ if (max > min) /* landscape mode */
+ return OVERLAY_PERF_LEVEL3;
+ else /* potrait mode */
+ return OVERLAY_PERF_LEVEL2;
+ }
else
return OVERLAY_PERF_LEVEL1;
}
@@ -2086,6 +2113,8 @@
if (old_perf_level != cur_perf_level) {
mdp_set_core_clk(cur_perf_level);
old_perf_level = cur_perf_level;
+ mdp_bus_scale_update_request(OVERLAY_BUS_SCALE_TABLE_BASE
+ - cur_perf_level);
}
}
@@ -2112,6 +2141,21 @@
mfd->ov0_blt_state = mfd->use_ov0_blt;
}
+static void mdp4_overlay1_update_blt_mode(struct msm_fb_data_type *mfd)
+{
+ if (mfd->ov1_blt_state == mfd->use_ov1_blt)
+ return;
+ if (mfd->use_ov1_blt) {
+ mdp4_allocate_writeback_buf(mfd, MDP4_MIXER1);
+ mdp4_dtv_overlay_blt_start(mfd);
+ pr_debug("%s overlay1 writeback is enabled\n", __func__);
+ } else {
+ mdp4_dtv_overlay_blt_stop(mfd);
+ pr_debug("%s overlay1 writeback is disabled\n", __func__);
+ }
+ mfd->ov1_blt_state = mfd->use_ov1_blt;
+}
+
static u32 mdp4_overlay_blt_enable(struct mdp_overlay *req,
struct msm_fb_data_type *mfd, uint32 perf_level)
{
@@ -2122,7 +2166,8 @@
clk_rate = (&mfd->panel_info.mipi)->dsi_pclk_rate;
if ((mfd->panel_info.type == LCDC_PANEL) ||
- (mfd->panel_info.type == MIPI_VIDEO_PANEL))
+ (mfd->panel_info.type == MIPI_VIDEO_PANEL) ||
+ (mfd->panel_info.type == DTV_PANEL))
pull_mode = 1;
if (pull_mode && (req->src_rect.h > req->dst_rect.h ||
@@ -2141,7 +2186,8 @@
if (req->dst_rect.x != 0)
use_blt = 1;
}
- if (mfd->panel_info.xres > 1280)
+ if ((mfd->panel_info.xres > 1280) &&
+ (mfd->panel_info.type != DTV_PANEL))
use_blt = 1;
}
return use_blt;
@@ -2169,8 +2215,6 @@
return -EINTR;
}
- perf_level = mdp4_overlay_get_perf_level(req);
-
mixer = mfd->panel_info.pdest; /* DISPLAY_1 or DISPLAY_2 */
ret = mdp4_overlay_req2pipe(req, mixer, &pipe, mfd);
@@ -2181,6 +2225,8 @@
return ret;
}
+ perf_level = mdp4_overlay_get_perf_level(req, mfd);
+
if (mixer == MDP4_MIXER0) {
u32 use_blt = mdp4_overlay_blt_enable(req, mfd, perf_level);
mfd->use_ov0_blt &= ~(1 << (pipe->pipe_ndx-1));
@@ -2224,8 +2270,12 @@
}
if (ctrl->panel_mode & MDP4_PANEL_DTV &&
- pipe->mixer_num == MDP4_MIXER1)
+ pipe->mixer_num == MDP4_MIXER1) {
+ u32 use_blt = mdp4_overlay_blt_enable(req, mfd, perf_level);
mdp4_overlay_dtv_set(mfd, pipe);
+ mfd->use_ov1_blt &= ~(1 << (pipe->pipe_ndx-1));
+ mfd->use_ov1_blt |= (use_blt << (pipe->pipe_ndx-1));
+ }
if (new_perf_level != perf_level) {
u32 old_level = new_perf_level;
@@ -2254,13 +2304,6 @@
}
mutex_unlock(&mfd->dma->ov_mutex);
-#ifdef CONFIG_MSM_BUS_SCALING
- if (pipe->mixer_num == MDP4_MIXER0) {
- mdp_bus_scale_update_request(OVERLAY_BUS_SCALE_TABLE_BASE
- - perf_level);
- }
-#endif
-
return 0;
}
@@ -2305,8 +2348,7 @@
#endif
}
- if (mfd->mdp_rev >= MDP_REV_42 && !mfd->use_ov0_blt &&
- !(ctrl->panel_mode & (MDP4_PANEL_MDDI | MDP4_PANEL_DSI_CMD))) {
+ if (mfd->mdp_rev >= MDP_REV_42 && !mfd->use_ov0_blt) {
ctrl->stage[pipe->mixer_num][pipe->mixer_stage] = NULL;
} else {
mdp4_mixer_stage_down(pipe);
@@ -2316,6 +2358,11 @@
if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD) {
if (mfd->panel_power_on)
mdp4_dsi_cmd_overlay_restore();
+ } else if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO) {
+ pipe->flags &= ~MDP_OV_PLAY_NOWAIT;
+ if (mfd->panel_power_on)
+ mdp4_overlay_dsi_video_vsync_push(mfd,
+ pipe);
}
#else
if (ctrl->panel_mode & MDP4_PANEL_MDDI) {
@@ -2326,13 +2373,24 @@
mdp4_mddi_overlay_restore();
}
#endif
+ else if (ctrl->panel_mode & MDP4_PANEL_LCDC) {
+ pipe->flags &= ~MDP_OV_PLAY_NOWAIT;
+ if (mfd->panel_power_on)
+ mdp4_overlay_lcdc_vsync_push(mfd, pipe);
+ }
mfd->use_ov0_blt &= ~(1 << (pipe->pipe_ndx-1));
mdp4_overlay_update_blt_mode(mfd);
if (!mfd->use_ov0_blt)
mdp4_free_writeback_buf(mfd, MDP4_MIXER0);
} else { /* mixer1, DTV, ATV */
- if (ctrl->panel_mode & MDP4_PANEL_DTV)
+ if (ctrl->panel_mode & MDP4_PANEL_DTV) {
mdp4_overlay_dtv_unset(mfd, pipe);
+ mfd->use_ov1_blt &= ~(1 << (pipe->pipe_ndx-1));
+ mdp4_overlay1_update_blt_mode(mfd);
+ if (!mfd->use_ov1_blt)
+ mdp4_free_writeback_buf(mfd,
+ MDP4_MIXER1);
+ }
}
}
@@ -2349,8 +2407,6 @@
mdp4_overlay_pipe_free(pipe);
- mdp4_set_perf_level();
-
mutex_unlock(&mfd->dma->ov_mutex);
return 0;
@@ -2411,6 +2467,9 @@
mdp4_mixer_stage_commit(pipe->mixer_num);
+ if (mfd->use_ov1_blt)
+ mdp4_overlay1_update_blt_mode(mfd);
+
mdp4_overlay_dtv_wait_for_ov(mfd, pipe);
mutex_unlock(&mfd->dma->ov_mutex);
@@ -2428,6 +2487,7 @@
struct file *srcp1_file = NULL, *srcp2_file = NULL;
struct ion_handle *srcp0_ihdl = NULL;
struct ion_handle *srcp1_ihdl = NULL, *srcp2_ihdl = NULL;
+ int ps0_need, p_need;
uint32_t overlay_version = 0;
int ret = 0;
@@ -2447,7 +2507,7 @@
return -EINTR;
img = &req->data;
- get_img(img, info, &start, &len, &srcp0_file, &srcp0_ihdl);
+ get_img(img, info, &start, &len, &srcp0_file, &ps0_need, &srcp0_ihdl);
if (len == 0) {
mutex_unlock(&mfd->dma->ov_mutex);
pr_err("%s: pmem Error\n", __func__);
@@ -2466,7 +2526,7 @@
if (overlay_version > 0) {
img = &req->plane1_data;
get_img(img, info, &start, &len, &srcp1_file,
- &srcp1_ihdl);
+ &p_need, &srcp1_ihdl);
if (len == 0) {
mutex_unlock(&mfd->dma->ov_mutex);
pr_err("%s: Error to get plane1\n", __func__);
@@ -2498,7 +2558,7 @@
if (overlay_version > 0) {
img = &req->plane1_data;
get_img(img, info, &start, &len, &srcp1_file,
- &srcp1_ihdl);
+ &p_need, &srcp1_ihdl);
if (len == 0) {
mutex_unlock(&mfd->dma->ov_mutex);
pr_err("%s: Error to get plane1\n", __func__);
@@ -2509,7 +2569,7 @@
img = &req->plane2_data;
get_img(img, info, &start, &len, &srcp2_file,
- &srcp2_ihdl);
+ &p_need, &srcp2_ihdl);
if (len == 0) {
mutex_unlock(&mfd->dma->ov_mutex);
pr_err("%s: Error to get plane2\n", __func__);
@@ -2552,6 +2612,9 @@
if (mfd->use_ov0_blt)
mdp4_overlay_update_blt_mode(mfd);
+ if (mfd->use_ov1_blt)
+ mdp4_overlay1_update_blt_mode(mfd);
+
if (pipe->pipe_type == OVERLAY_TYPE_VIDEO) {
mdp4_overlay_vg_setup(pipe); /* video/graphic pipe */
} else {
@@ -2577,8 +2640,11 @@
} else if (pipe->mixer_num == MDP4_MIXER1) {
ctrl->mixer1_played++;
/* enternal interface */
- if (ctrl->panel_mode & MDP4_PANEL_DTV)
+ if (ctrl->panel_mode & MDP4_PANEL_DTV) {
mdp4_overlay_dtv_ov_done_push(mfd, pipe);
+ if (!mfd->use_ov1_blt)
+ mdp4_overlay1_update_blt_mode(mfd);
+ }
} else {
/* primary interface */
@@ -2631,9 +2697,13 @@
if (srcp2_file)
put_pmem_file(srcp2_file);
#endif
+ /* only source may use frame buffer */
+ if (img->flags & MDP_MEMORY_ID_TYPE_FB)
+ fput_light(srcp0_file, ps0_need);
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
- if (!IS_ERR_OR_NULL(srcp0_ihdl))
+ else if (!IS_ERR_OR_NULL(srcp0_ihdl))
ion_free(mfd->iclient, srcp0_ihdl);
+
if (!IS_ERR_OR_NULL(srcp1_ihdl))
ion_free(mfd->iclient, srcp1_ihdl);
if (!IS_ERR_OR_NULL(srcp2_ihdl))
diff --git a/drivers/video/msm/mdp4_overlay_atv.c b/drivers/video/msm/mdp4_overlay_atv.c
index 0b707d7..35d5769 100644
--- a/drivers/video/msm/mdp4_overlay_atv.c
+++ b/drivers/video/msm/mdp4_overlay_atv.c
@@ -38,16 +38,13 @@
{
uint8 *buf;
int bpp, ptype;
- int yres, remainder;
struct fb_info *fbi;
struct fb_var_screeninfo *var;
struct msm_fb_data_type *mfd;
struct mdp4_overlay_pipe *pipe;
- struct msm_panel_info *panel_info;
int ret;
mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev);
- panel_info = &mfd->panel_info;
if (!mfd)
return -ENODEV;
@@ -58,28 +55,9 @@
fbi = mfd->fbi;
var = &fbi->var;
- if (panel_info->mode2_yres != 0) {
- yres = panel_info->mode2_yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- } else {
- yres = panel_info->yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- }
-
- if (!remainder)
- remainder = PAGE_SIZE;
-
bpp = fbi->var.bits_per_pixel / 8;
buf = (uint8 *) fbi->fix.smem_start;
- if (fbi->var.yoffset < yres) {
- buf += fbi->var.xoffset * bpp;
- } else if (fbi->var.yoffset >= yres && fbi->var.yoffset < 2 * yres) {
- buf += fbi->var.xoffset * bpp + yres *
- fbi->fix.line_length + PAGE_SIZE - remainder;
- } else {
- buf += fbi->var.xoffset * bpp + 2 * yres *
- fbi->fix.line_length + 2 * (PAGE_SIZE - remainder);
- }
+ buf += calc_fb_offset(mfd, fbi, bpp);
if (atv_pipe == NULL) {
ptype = mdp4_overlay_format2type(mfd->fb_imgType);
@@ -171,36 +149,15 @@
uint8 *buf;
int bpp;
unsigned long flag;
- int yres, remainder;
struct mdp4_overlay_pipe *pipe;
- struct msm_panel_info *panel_info = &mfd->panel_info;
if (!mfd->panel_power_on)
return;
- if (panel_info->mode2_yres != 0) {
- yres = panel_info->mode2_yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- } else {
- yres = panel_info->yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- }
-
- if (!remainder)
- remainder = PAGE_SIZE;
-
/* no need to power on cmd block since it's lcdc mode */
bpp = fbi->var.bits_per_pixel / 8;
buf = (uint8 *) fbi->fix.smem_start;
- if (fbi->var.yoffset < yres) {
- buf += fbi->var.xoffset * bpp;
- } else if (fbi->var.yoffset >= yres && fbi->var.yoffset < 2 * yres) {
- buf += fbi->var.xoffset * bpp + yres *
- fbi->fix.line_length + PAGE_SIZE - remainder;
- } else {
- buf += fbi->var.xoffset * bpp + 2 * yres *
- fbi->fix.line_length + 2 * (PAGE_SIZE - remainder);
- }
+ buf += calc_fb_offset(mfd, fbi, bpp);
mutex_lock(&mfd->dma->ov_mutex);
diff --git a/drivers/video/msm/mdp4_overlay_dsi_video.c b/drivers/video/msm/mdp4_overlay_dsi_video.c
index a3be2af..53b541e 100644
--- a/drivers/video/msm/mdp4_overlay_dsi_video.c
+++ b/drivers/video/msm/mdp4_overlay_dsi_video.c
@@ -96,16 +96,13 @@
int hsync_end_x;
uint8 *buf;
int bpp, ptype;
- int yres, remainder;
struct fb_info *fbi;
struct fb_var_screeninfo *var;
struct msm_fb_data_type *mfd;
struct mdp4_overlay_pipe *pipe;
- struct msm_panel_info *panel_info;
int ret;
mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev);
- panel_info = &mfd->panel_info;
if (!mfd)
return -ENODEV;
@@ -118,28 +115,9 @@
fbi = mfd->fbi;
var = &fbi->var;
- if (panel_info->mode2_yres != 0) {
- yres = panel_info->mode2_yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- } else {
- yres = panel_info->yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- }
-
- if (!remainder)
- remainder = PAGE_SIZE;
-
bpp = fbi->var.bits_per_pixel / 8;
buf = (uint8 *) fbi->fix.smem_start;
- if (fbi->var.yoffset < yres) {
- buf += fbi->var.xoffset * bpp;
- } else if (fbi->var.yoffset >= yres && fbi->var.yoffset < 2 * yres) {
- buf += fbi->var.xoffset * bpp + yres *
- fbi->fix.line_length + PAGE_SIZE - remainder;
- } else {
- buf += fbi->var.xoffset * bpp + 2 * yres *
- fbi->fix.line_length + 2 * (PAGE_SIZE - remainder);
- }
+ buf += calc_fb_offset(mfd, fbi, bpp);
if (dsi_pipe == NULL) {
ptype = mdp4_overlay_format2type(mfd->fb_imgType);
@@ -316,9 +294,7 @@
{
struct fb_info *fbi;
struct mdp4_overlay_pipe *pipe;
- struct msm_panel_info *panel_info = &mfd->panel_info;
int bpp;
- int yres, remainder;
uint8 *buf = NULL;
if (dsi_pipe == NULL)
@@ -337,28 +313,9 @@
fbi = mfd->fbi;
- if (panel_info->mode2_yres != 0) {
- yres = panel_info->mode2_yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- } else {
- yres = panel_info->yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- }
-
- if (!remainder)
- remainder = PAGE_SIZE;
-
bpp = fbi->var.bits_per_pixel / 8;
buf = (uint8 *) fbi->fix.smem_start;
- if (fbi->var.yoffset < yres) {
- buf += fbi->var.xoffset * bpp;
- } else if (fbi->var.yoffset >= yres && fbi->var.yoffset < 2 * yres) {
- buf += fbi->var.xoffset * bpp + yres *
- fbi->fix.line_length + PAGE_SIZE - remainder;
- } else {
- buf += fbi->var.xoffset * bpp + 2 * yres *
- fbi->fix.line_length + 2 * (PAGE_SIZE - remainder);
- }
+ buf += calc_fb_offset(mfd, fbi, bpp);
if (pipe->is_3d) {
pipe->src_height = pipe->src_height_3d;
@@ -689,36 +646,15 @@
struct fb_info *fbi = mfd->fbi;
uint8 *buf;
int bpp;
- int yres, remainder;
struct mdp4_overlay_pipe *pipe;
- struct msm_panel_info *panel_info = &mfd->panel_info;
if (!mfd->panel_power_on)
return;
- if (panel_info->mode2_yres != 0) {
- yres = panel_info->mode2_yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- } else {
- yres = panel_info->yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- }
-
- if (!remainder)
- remainder = PAGE_SIZE;
-
/* no need to power on cmd block since it's dsi video mode */
bpp = fbi->var.bits_per_pixel / 8;
buf = (uint8 *) fbi->fix.smem_start;
- if (fbi->var.yoffset < yres) {
- buf += fbi->var.xoffset * bpp;
- } else if (fbi->var.yoffset >= yres && fbi->var.yoffset < 2 * yres) {
- buf += fbi->var.xoffset * bpp + yres *
- fbi->fix.line_length + PAGE_SIZE - remainder;
- } else {
- buf += fbi->var.xoffset * bpp + 2 * yres *
- fbi->fix.line_length + 2 * (PAGE_SIZE - remainder);
- }
+ buf += calc_fb_offset(mfd, fbi, bpp);
mutex_lock(&mfd->dma->ov_mutex);
diff --git a/drivers/video/msm/mdp4_overlay_dtv.c b/drivers/video/msm/mdp4_overlay_dtv.c
index 590ad65..0b86028 100644
--- a/drivers/video/msm/mdp4_overlay_dtv.c
+++ b/drivers/video/msm/mdp4_overlay_dtv.c
@@ -102,12 +102,12 @@
var = &fbi->var;
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
-#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
- if (is_mdp4_hw_reset()) {
- mdp4_hw_init();
- outpdw(MDP_BASE + 0x0038, mdp4_display_intf);
+ if (hdmi_prim_display) {
+ if (is_mdp4_hw_reset()) {
+ mdp4_hw_init();
+ outpdw(MDP_BASE + 0x0038, mdp4_display_intf);
+ }
}
-#endif
mdp4_overlay_dmae_cfg(mfd, 0);
/*
@@ -301,7 +301,7 @@
/* MSP_BORDER_COLOR */
MDP_OUTP(MDP_BASE + MDP4_OVERLAYPROC1_BASE + 0x5008,
(0x0 & 0xFFF)); /* 12-bit R */
- mdp_pipe_ctrl(MDP_OVERLAY1_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
} else {
switch (mfd->ibuf.bpp) {
case 2:
@@ -312,11 +312,10 @@
break;
case 4:
default:
-#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
- pipe->src_format = MSMFB_DEFAULT_TYPE;
-#else
- pipe->src_format = MDP_ARGB_8888;
-#endif
+ if (hdmi_prim_display)
+ pipe->src_format = MSMFB_DEFAULT_TYPE;
+ else
+ pipe->src_format = MDP_ARGB_8888;
break;
}
}
@@ -355,7 +354,7 @@
if (pipe != NULL && pipe->mixer_stage == MDP4_MIXER_STAGE_BASE &&
pipe->pipe_type == OVERLAY_TYPE_RGB)
dtv_pipe = pipe; /* keep it */
- else if (mdp4_overlay_borderfill_supported())
+ else if (!hdmi_prim_display && mdp4_overlay_borderfill_supported())
mdp4_overlay_dtv_alloc_pipe(mfd, OVERLAY_TYPE_BF);
else
mdp4_overlay_dtv_alloc_pipe(mfd, OVERLAY_TYPE_RGB);
@@ -369,6 +368,9 @@
{
int result = 0;
+ pipe->flags &= ~MDP_OV_PLAY_NOWAIT;
+ mdp4_overlay_dtv_ov_done_push(mfd, pipe);
+
if (pipe->mixer_stage == MDP4_MIXER_STAGE_BASE &&
pipe->pipe_type == OVERLAY_TYPE_RGB) {
result = mdp4_dtv_stop(mfd);
@@ -509,7 +511,6 @@
complete_all(&dtv_pipe->comp);
}
-#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
void mdp4_dtv_set_black_screen(void)
{
char *rgb_base;
@@ -517,8 +518,9 @@
uint32 color = 0x00000000;
uint32 temp_src_format;
- if (!dtv_pipe) {
- pr_err("dtv_pipe is not configured yet\n");
+ if (!dtv_pipe || !hdmi_prim_display) {
+ pr_err("dtv_pipe/hdmi as primary are not"
+ " configured yet\n");
return;
}
rgb_base = MDP_BASE + MDP4_RGB_BASE;
@@ -537,7 +539,6 @@
mdp4_mixer_stage_up(dtv_pipe);
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
}
-#endif
static void mdp4_overlay_dtv_wait4dmae(struct msm_fb_data_type *mfd)
{
@@ -593,13 +594,11 @@
void mdp4_dtv_overlay_blt_start(struct msm_fb_data_type *mfd)
{
- mdp4_allocate_writeback_buf(mfd, MDP4_MIXER1);
mdp4_dtv_do_blt(mfd, 1);
}
void mdp4_dtv_overlay_blt_stop(struct msm_fb_data_type *mfd)
{
- mdp4_free_writeback_buf(mfd, MDP4_MIXER1);
mdp4_dtv_do_blt(mfd, 0);
}
diff --git a/drivers/video/msm/mdp4_overlay_lcdc.c b/drivers/video/msm/mdp4_overlay_lcdc.c
index ae498fc..1755bcc 100644
--- a/drivers/video/msm/mdp4_overlay_lcdc.c
+++ b/drivers/video/msm/mdp4_overlay_lcdc.c
@@ -84,11 +84,8 @@
struct msm_fb_data_type *mfd;
struct mdp4_overlay_pipe *pipe;
int ret;
- int yres, remainder;
- struct msm_panel_info *panel_info;
mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev);
- panel_info = &mfd->panel_info;
if (!mfd)
return -ENODEV;
@@ -101,17 +98,6 @@
fbi = mfd->fbi;
var = &fbi->var;
- if (panel_info->mode2_yres != 0) {
- yres = panel_info->mode2_yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- } else {
- yres = panel_info->yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- }
-
- if (!remainder)
- remainder = PAGE_SIZE;
-
/* MDP cmd block enable */
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
if (is_mdp4_hw_reset()) {
@@ -121,15 +107,7 @@
bpp = fbi->var.bits_per_pixel / 8;
buf = (uint8 *) fbi->fix.smem_start;
- if (fbi->var.yoffset < yres) {
- buf += fbi->var.xoffset * bpp;
- } else if (fbi->var.yoffset >= yres && fbi->var.yoffset < 2 * yres) {
- buf += fbi->var.xoffset * bpp + yres *
- fbi->fix.line_length + PAGE_SIZE - remainder;
- } else {
- buf += fbi->var.xoffset * bpp + 2 * yres *
- fbi->fix.line_length + 2 * (PAGE_SIZE - remainder);
- }
+ buf += calc_fb_offset(mfd, fbi, bpp);
if (lcdc_pipe == NULL) {
ptype = mdp4_overlay_format2type(mfd->fb_imgType);
@@ -573,36 +551,15 @@
struct fb_info *fbi = mfd->fbi;
uint8 *buf;
int bpp;
- int yres, remainder;
struct mdp4_overlay_pipe *pipe;
- struct msm_panel_info *panel_info = &mfd->panel_info;
if (!mfd->panel_power_on)
return;
- if (panel_info->mode2_yres != 0) {
- yres = panel_info->mode2_yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- } else {
- yres = panel_info->yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- }
-
- if (!remainder)
- remainder = PAGE_SIZE;
-
/* no need to power on cmd block since it's lcdc mode */
bpp = fbi->var.bits_per_pixel / 8;
buf = (uint8 *) fbi->fix.smem_start;
- if (fbi->var.yoffset < yres) {
- buf += fbi->var.xoffset * bpp;
- } else if (fbi->var.yoffset >= yres && fbi->var.yoffset < 2 * yres) {
- buf += fbi->var.xoffset * bpp + yres *
- fbi->fix.line_length + PAGE_SIZE - remainder;
- } else {
- buf += fbi->var.xoffset * bpp + 2 * yres *
- fbi->fix.line_length + 2 * (PAGE_SIZE - remainder);
- }
+ buf += calc_fb_offset(mfd, fbi, bpp);
mutex_lock(&mfd->dma->ov_mutex);
diff --git a/drivers/video/msm/mdp4_util.c b/drivers/video/msm/mdp4_util.c
index 2876d9f..b69a2fc 100644
--- a/drivers/video/msm/mdp4_util.c
+++ b/drivers/video/msm/mdp4_util.c
@@ -296,12 +296,6 @@
bits = mdp_intr_mask;
outpdw(MDP_BASE + 0x0050, bits);/* enable specififed interrupts */
- /* histogram */
- MDP_OUTP(MDP_BASE + 0x95010, 1); /* auto clear HIST */
-
- /* enable histogram interrupts */
- outpdw(MDP_BASE + 0x9501c, INTR_HIST_DONE);
-
/* For the max read pending cmd config below, if the MDP clock */
/* is less than the AXI clock, then we must use 3 pending */
/* pending requests. Otherwise, we should use 8 pending requests. */
@@ -386,11 +380,8 @@
that histogram works.*/
MDP_OUTP(MDP_BASE + 0x95010, 1);
outpdw(MDP_BASE + 0x9501c, INTR_HIST_DONE);
- if (mdp_is_hist_start == TRUE) {
- MDP_OUTP(MDP_BASE + 0x95004,
- mdp_hist_frame_cnt);
- MDP_OUTP(MDP_BASE + 0x95000, 1);
- }
+ mdp_is_hist_valid = FALSE;
+ __mdp_histogram_reset();
}
if (isr & INTR_EXTERNAL_INTF_UDERRUN)
@@ -569,16 +560,18 @@
outpdw(MDP_DMA_P_HIST_INTR_CLEAR, isr);
mb();
isr &= mask;
+ if (isr & INTR_HIST_RESET_SEQ_DONE)
+ __mdp_histogram_kickoff();
+
if (isr & INTR_HIST_DONE) {
- if (waitqueue_active(&(mdp_hist_comp.wait))) {
- complete(&mdp_hist_comp);
- } else {
- if (mdp_is_hist_start == TRUE) {
- MDP_OUTP(MDP_BASE + 0x95004,
- mdp_hist_frame_cnt);
- MDP_OUTP(MDP_BASE + 0x95000, 1);
+ if (waitqueue_active(&mdp_hist_comp.wait)) {
+ if (!queue_work(mdp_hist_wq,
+ &mdp_histogram_worker)) {
+ pr_err("%s - can't queue hist_read\n",
+ __func__);
}
- }
+ } else
+ __mdp_histogram_reset();
}
}
@@ -2996,3 +2989,144 @@
return ret;
}
+static uint32_t mdp4_pp_block2igc(uint32_t block)
+{
+ uint32_t valid = 0;
+ switch (block) {
+ case MDP_BLOCK_VG_1:
+ valid = 0x1;
+ break;
+ case MDP_BLOCK_VG_2:
+ valid = 0x1;
+ break;
+ case MDP_BLOCK_RGB_1:
+ valid = 0x1;
+ break;
+ case MDP_BLOCK_RGB_2:
+ valid = 0x1;
+ break;
+ case MDP_BLOCK_DMA_P:
+ valid = (mdp_rev >= MDP_REV_40) ? 1 : 0;
+ break;
+ case MDP_BLOCK_DMA_S:
+ valid = (mdp_rev >= MDP_REV_40) ? 1 : 0;
+ break;
+ default:
+ break;
+ }
+ return valid;
+}
+
+static int mdp4_igc_lut_write(struct mdp_igc_lut_data *cfg, uint32_t en_off,
+ uint32_t lut_off)
+{
+ int i;
+ uint32_t base, *off_low, *off_high;
+ uint32_t low[cfg->len];
+ uint32_t high[cfg->len];
+
+ base = mdp_block2base(cfg->block);
+
+ if (cfg->len != 256)
+ return -EINVAL;
+
+ off_low = (uint32_t *)(MDP_BASE + base + lut_off);
+ off_high = (uint32_t *)(MDP_BASE + base + lut_off + 0x800);
+ if (copy_from_user(&low, cfg->c0_c1_data, cfg->len * sizeof(uint32_t)))
+ return -EFAULT;
+ if (copy_from_user(&high, cfg->c2_data, cfg->len * sizeof(uint32_t)))
+ return -EFAULT;
+
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
+ for (i = 0; i < cfg->len; i++) {
+ MDP_OUTP(off_low++, low[i]);
+ /*low address write should occur before high address write*/
+ wmb();
+ MDP_OUTP(off_high++, high[i]);
+ }
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
+ return 0;
+}
+
+static int mdp4_igc_lut_ctrl(struct mdp_igc_lut_data *cfg)
+{
+ uint32_t mask, out;
+ uint32_t base = mdp_block2base(cfg->block);
+ int8_t shift = 0;
+
+ switch (cfg->block) {
+ case MDP_BLOCK_DMA_P:
+ case MDP_BLOCK_DMA_S:
+ base = base;
+ shift = 30;
+ break;
+ case MDP_BLOCK_VG_1:
+ case MDP_BLOCK_VG_2:
+ case MDP_BLOCK_RGB_1:
+ case MDP_BLOCK_RGB_2:
+ base += 0x58;
+ shift = 16;
+ break;
+ default:
+ return -EINVAL;
+
+ }
+ out = 1<<shift;
+ mask = ~out;
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
+ out = inpdw(MDP_BASE + base) & mask;
+ MDP_OUTP(MDP_BASE + base, out | ((cfg->ops & 0x1)<<shift));
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
+
+ return 0;
+}
+
+static int mdp4_igc_lut_write_cfg(struct mdp_igc_lut_data *cfg)
+{
+ int ret = 0;
+
+ switch (cfg->block) {
+ case MDP_BLOCK_DMA_P:
+ case MDP_BLOCK_DMA_S:
+ ret = mdp4_igc_lut_write(cfg, 0x00, 0x9000);
+ break;
+ case MDP_BLOCK_VG_1:
+ case MDP_BLOCK_VG_2:
+ case MDP_BLOCK_RGB_1:
+ case MDP_BLOCK_RGB_2:
+ ret = mdp4_igc_lut_write(cfg, 0x58, 0x5000);
+ break;
+ default:
+ ret = -EINVAL;
+ }
+
+ return ret;
+}
+
+int mdp4_igc_lut_config(struct mdp_igc_lut_data *cfg)
+{
+ int ret = 0;
+
+ if (!mdp4_pp_block2igc(cfg->block)) {
+ ret = -ENOTTY;
+ goto error;
+ }
+
+ switch ((cfg->ops & 0x6) >> 1) {
+ case 0x1:
+ pr_info("%s: IGC LUT read not supported\n", __func__);
+ break;
+ case 0x2:
+ ret = mdp4_igc_lut_write_cfg(cfg);
+ if (ret)
+ goto error;
+ break;
+ default:
+ break;
+ }
+
+ ret = mdp4_igc_lut_ctrl(cfg);
+
+error:
+ return ret;
+}
diff --git a/drivers/video/msm/mdp_dma.c b/drivers/video/msm/mdp_dma.c
index e8b288f..ab5abf5 100644
--- a/drivers/video/msm/mdp_dma.c
+++ b/drivers/video/msm/mdp_dma.c
@@ -523,36 +523,15 @@
{
struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
struct fb_info *fbi = mfd->fbi;
- struct msm_panel_info *panel_info = &mfd->panel_info;
MDPIBUF *iBuf;
int bpp = info->var.bits_per_pixel / 8;
- int yres, remainder;
-
- if (panel_info->mode2_yres != 0) {
- yres = panel_info->mode2_yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- } else {
- yres = panel_info->yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- }
-
- if (!remainder)
- remainder = PAGE_SIZE;
down(&mfd->sem);
iBuf = &mfd->ibuf;
iBuf->buf = (uint8 *) info->fix.smem_start;
- if (fbi->var.yoffset < yres) {
- iBuf->buf += fbi->var.xoffset * bpp;
- } else if (fbi->var.yoffset >= yres && fbi->var.yoffset < 2 * yres) {
- iBuf->buf += fbi->var.xoffset * bpp + yres *
- fbi->fix.line_length + PAGE_SIZE - remainder;
- } else {
- iBuf->buf += fbi->var.xoffset * bpp + 2 * yres *
- fbi->fix.line_length + 2 * (PAGE_SIZE - remainder);
- }
+ iBuf->buf += calc_fb_offset(mfd, fbi, bpp);
iBuf->ibuf_width = info->var.xres_virtual;
iBuf->bpp = bpp;
diff --git a/drivers/video/msm/mdp_dma_dsi_video.c b/drivers/video/msm/mdp_dma_dsi_video.c
index 0e76a07..e1d7acc 100644
--- a/drivers/video/msm/mdp_dma_dsi_video.c
+++ b/drivers/video/msm/mdp_dma_dsi_video.c
@@ -67,17 +67,15 @@
int hsync_end_x;
uint8 *buf;
uint32 dma2_cfg_reg;
- int yres, remainder;
int bpp;
struct fb_info *fbi;
struct fb_var_screeninfo *var;
struct msm_fb_data_type *mfd;
- struct msm_panel_info *panel_info;
int ret;
+ uint32 mask, curr;
mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev);
- panel_info = &mfd->panel_info;
if (!mfd)
return -ENODEV;
@@ -88,29 +86,10 @@
fbi = mfd->fbi;
var = &fbi->var;
- if (panel_info->mode2_yres != 0) {
- yres = panel_info->mode2_yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- } else {
- yres = panel_info->yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- }
-
- if (!remainder)
- remainder = PAGE_SIZE;
-
bpp = fbi->var.bits_per_pixel / 8;
buf = (uint8 *) fbi->fix.smem_start;
- if (fbi->var.yoffset < yres) {
- buf += fbi->var.xoffset * bpp;
- } else if (fbi->var.yoffset >= yres && fbi->var.yoffset < 2 * yres) {
- buf += fbi->var.xoffset * bpp + yres *
- fbi->fix.line_length + PAGE_SIZE - remainder;
- } else {
- buf += fbi->var.xoffset * bpp + 2 * yres *
- fbi->fix.line_length + 2 * (PAGE_SIZE - remainder);
- }
+ buf += calc_fb_offset(mfd, fbi, bpp);
dma2_cfg_reg = DMA_PACK_ALIGN_LSB | DMA_OUT_SEL_DSI_VIDEO;
@@ -163,6 +142,9 @@
MDP_OUTP(MDP_BASE + DMA_P_BASE + 0x10, 0);
/* dma config */
+ curr = inpdw(MDP_BASE + 0x90000);
+ mask = 0xBFFFFFFF;
+ dma2_cfg_reg = (dma2_cfg_reg & mask) | (curr & ~mask);
MDP_OUTP(MDP_BASE + DMA_P_BASE, dma2_cfg_reg);
/*
@@ -261,38 +243,18 @@
uint8 *buf;
int bpp;
unsigned long flag;
- int yres, remainder;
- struct msm_panel_info *panel_info = &mfd->panel_info;
int irq_block = MDP_DMA2_TERM;
if (!mfd->panel_power_on)
return;
- if (panel_info->mode2_yres != 0) {
- yres = panel_info->mode2_yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- } else {
- yres = panel_info->yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- }
-
- if (!remainder)
- remainder = PAGE_SIZE;
-
down(&mfd->dma->mutex);
bpp = fbi->var.bits_per_pixel / 8;
buf = (uint8 *) fbi->fix.smem_start;
- if (fbi->var.yoffset < yres) {
- buf += fbi->var.xoffset * bpp;
- } else if (fbi->var.yoffset >= yres && fbi->var.yoffset < 2 * yres) {
- buf += fbi->var.xoffset * bpp + yres *
- fbi->fix.line_length + PAGE_SIZE - remainder;
- } else {
- buf += fbi->var.xoffset * bpp + 2 * yres *
- fbi->fix.line_length + 2 * (PAGE_SIZE - remainder);
- }
+ buf += calc_fb_offset(mfd, fbi, bpp);
+
/* no need to power on cmd block since it's dsi mode */
/* starting address */
MDP_OUTP(MDP_BASE + DMA_P_BASE + 0x8, (uint32) buf);
diff --git a/drivers/video/msm/mdp_dma_lcdc.c b/drivers/video/msm/mdp_dma_lcdc.c
index 5dada35..7350d91 100644
--- a/drivers/video/msm/mdp_dma_lcdc.c
+++ b/drivers/video/msm/mdp_dma_lcdc.c
@@ -89,15 +89,12 @@
struct fb_info *fbi;
struct fb_var_screeninfo *var;
struct msm_fb_data_type *mfd;
- struct msm_panel_info *panel_info;
uint32 dma_base;
uint32 timer_base = LCDC_BASE;
uint32 block = MDP_DMA2_BLOCK;
int ret;
- int yres, remainder;
mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev);
- panel_info = &mfd->panel_info;
if (!mfd)
return -ENODEV;
@@ -108,32 +105,13 @@
fbi = mfd->fbi;
var = &fbi->var;
- if (panel_info->mode2_yres != 0) {
- yres = panel_info->mode2_yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- } else {
- yres = panel_info->yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- }
-
- if (!remainder)
- remainder = PAGE_SIZE;
-
/* MDP cmd block enable */
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
bpp = fbi->var.bits_per_pixel / 8;
buf = (uint8 *) fbi->fix.smem_start;
- if (fbi->var.yoffset < yres) {
- buf += fbi->var.xoffset * bpp;
- } else if (fbi->var.yoffset >= yres && fbi->var.yoffset < 2 * yres) {
- buf += fbi->var.xoffset * bpp + yres *
- fbi->fix.line_length + PAGE_SIZE - remainder;
- } else {
- buf += fbi->var.xoffset * bpp + 2 * yres *
- fbi->fix.line_length + 2 * (PAGE_SIZE - remainder);
- }
+ buf += calc_fb_offset(mfd, fbi, bpp);
dma2_cfg_reg = DMA_PACK_ALIGN_LSB | DMA_OUT_SEL_LCDC;
@@ -342,28 +320,15 @@
void mdp_lcdc_update(struct msm_fb_data_type *mfd)
{
struct fb_info *fbi = mfd->fbi;
- struct msm_panel_info *panel_info = &mfd->panel_info;
uint8 *buf;
int bpp;
unsigned long flag;
uint32 dma_base;
- int yres, remainder;
int irq_block = MDP_DMA2_TERM;
#ifdef CONFIG_FB_MSM_MDP40
int intr = INTR_DMA_P_DONE;
#endif
- if (panel_info->mode2_yres != 0) {
- yres = panel_info->mode2_yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- } else {
- yres = panel_info->yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- }
-
- if (!remainder)
- remainder = PAGE_SIZE;
-
if (!mfd->panel_power_on)
return;
@@ -372,15 +337,7 @@
bpp = fbi->var.bits_per_pixel / 8;
buf = (uint8 *) fbi->fix.smem_start;
- if (fbi->var.yoffset < yres) {
- buf += fbi->var.xoffset * bpp;
- } else if (fbi->var.yoffset >= yres && fbi->var.yoffset < 2 * yres) {
- buf += fbi->var.xoffset * bpp + yres *
- fbi->fix.line_length + PAGE_SIZE - remainder;
- } else {
- buf += fbi->var.xoffset * bpp + 2 * yres *
- fbi->fix.line_length + 2 * (PAGE_SIZE - remainder);
- }
+ buf += calc_fb_offset(mfd, fbi, bpp);
dma_base = DMA_P_BASE;
diff --git a/drivers/video/msm/mdp_dma_tv.c b/drivers/video/msm/mdp_dma_tv.c
index 1305e03..b578ba2 100644
--- a/drivers/video/msm/mdp_dma_tv.c
+++ b/drivers/video/msm/mdp_dma_tv.c
@@ -39,15 +39,12 @@
int mdp_dma3_on(struct platform_device *pdev)
{
struct msm_fb_data_type *mfd;
- struct msm_panel_info *panel_info;
struct fb_info *fbi;
uint8 *buf;
int bpp;
int ret = 0;
- int yres, remainder;
mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev);
- panel_info = &mfd->panel_info;
if (!mfd)
return -ENODEV;
@@ -57,32 +54,13 @@
fbi = mfd->fbi;
- if (panel_info->mode2_yres != 0) {
- yres = panel_info->mode2_yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- } else {
- yres = panel_info->yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- }
-
- if (!remainder)
- remainder = PAGE_SIZE;
-
/* MDP cmd block enable */
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
bpp = fbi->var.bits_per_pixel / 8;
buf = (uint8 *) fbi->fix.smem_start;
- if (fbi->var.yoffset < yres) {
- buf += fbi->var.xoffset * bpp;
- } else if (fbi->var.yoffset >= yres && fbi->var.yoffset < 2 * yres) {
- buf += fbi->var.xoffset * bpp + yres *
- fbi->fix.line_length + PAGE_SIZE - remainder;
- } else {
- buf += fbi->var.xoffset * bpp + 2 * yres *
- fbi->fix.line_length + 2 * (PAGE_SIZE - remainder);
- }
+ buf += calc_fb_offset(mfd, fbi, bpp);
/* starting address[31..8] of Video frame buffer is CS0 */
MDP_OUTP(MDP_BASE + 0xC0008, (uint32) buf >> 3);
@@ -135,36 +113,15 @@
uint8 *buf;
int bpp;
unsigned long flag;
- int yres, remainder;
- struct msm_panel_info *panel_info = &mfd->panel_info;
if (!mfd->panel_power_on)
return;
- if (panel_info->mode2_yres != 0) {
- yres = panel_info->mode2_yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- } else {
- yres = panel_info->yres;
- remainder = (fbi->fix.line_length*yres)%PAGE_SIZE;
- }
-
- if (!remainder)
- remainder = PAGE_SIZE;
-
/* no need to power on cmd block since dma3 is running */
bpp = fbi->var.bits_per_pixel / 8;
buf = (uint8 *) fbi->fix.smem_start;
- if (fbi->var.yoffset < yres) {
- buf += fbi->var.xoffset * bpp;
- } else if (fbi->var.yoffset >= yres && fbi->var.yoffset < 2 * yres) {
- buf += fbi->var.xoffset * bpp + yres *
- fbi->fix.line_length + PAGE_SIZE - remainder;
- } else {
- buf += fbi->var.xoffset * bpp + 2 * yres *
- fbi->fix.line_length + 2 * (PAGE_SIZE - remainder);
- }
+ buf += calc_fb_offset(mfd, fbi, bpp);
MDP_OUTP(MDP_BASE + 0xC0008, (uint32) buf >> 3);
diff --git a/drivers/video/msm/mdp_hw_init.c b/drivers/video/msm/mdp_hw_init.c
index 8f8b4d3..ff3ad41 100644
--- a/drivers/video/msm/mdp_hw_init.c
+++ b/drivers/video/msm/mdp_hw_init.c
@@ -635,8 +635,6 @@
MDP_OUTP(MDP_BASE + 0xE0000, 0);
MDP_OUTP(MDP_BASE + 0x100, 0xffffffff);
MDP_OUTP(MDP_BASE + 0x90070, 0);
- MDP_OUTP(MDP_BASE + 0x94010, 1);
- MDP_OUTP(MDP_BASE + 0x9401c, 2);
#endif
/*
diff --git a/drivers/video/msm/mipi_dsi.c b/drivers/video/msm/mipi_dsi.c
index f319072..dfdc3f7 100644
--- a/drivers/video/msm/mipi_dsi.c
+++ b/drivers/video/msm/mipi_dsi.c
@@ -91,6 +91,9 @@
} else {
mdp3_dsi_cmd_dma_busy_wait(mfd);
}
+ } else {
+ /* video mode, wait until fifo cleaned */
+ mipi_dsi_controller_cfg(0);
}
/*
diff --git a/drivers/video/msm/mipi_dsi.h b/drivers/video/msm/mipi_dsi.h
index 4fbb044..8a86fd2 100644
--- a/drivers/video/msm/mipi_dsi.h
+++ b/drivers/video/msm/mipi_dsi.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -51,7 +51,8 @@
#define MIPI_DSI_PANEL_QHD_PT 5
#define MIPI_DSI_PANEL_WXGA 6
#define MIPI_DSI_PANEL_WUXGA 7
-#define DSI_PANEL_MAX 7
+#define MIPI_DSI_PANEL_720P_PT 8
+#define DSI_PANEL_MAX 8
enum { /* mipi dsi panel */
DSI_VIDEO_MODE,
diff --git a/drivers/video/msm/mipi_orise.c b/drivers/video/msm/mipi_orise.c
new file mode 100644
index 0000000..2afbb9b
--- /dev/null
+++ b/drivers/video/msm/mipi_orise.c
@@ -0,0 +1,194 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include "msm_fb.h"
+#include "mipi_dsi.h"
+#include "mipi_orise.h"
+#include "mdp4.h"
+
+
+static struct mipi_dsi_panel_platform_data *mipi_orise_pdata;
+
+static struct dsi_buf orise_tx_buf;
+static struct dsi_buf orise_rx_buf;
+
+static char enter_sleep[2] = {0x10, 0x00}; /* DTYPE_DCS_WRITE */
+static char exit_sleep[2] = {0x11, 0x00}; /* DTYPE_DCS_WRITE */
+static char display_off[2] = {0x28, 0x00}; /* DTYPE_DCS_WRITE */
+static char display_on[2] = {0x29, 0x00}; /* DTYPE_DCS_WRITE */
+
+static struct dsi_cmd_desc orise_video_on_cmds[] = {
+ {DTYPE_DCS_WRITE, 1, 0, 0, 10,
+ sizeof(exit_sleep), exit_sleep},
+ {DTYPE_DCS_WRITE, 1, 0, 0, 10,
+ sizeof(display_on), display_on},
+};
+
+static struct dsi_cmd_desc orise_cmd_on_cmds[] = {
+ {DTYPE_DCS_WRITE, 1, 0, 0, 10,
+ sizeof(exit_sleep), exit_sleep},
+ {DTYPE_DCS_WRITE, 1, 0, 0, 10,
+ sizeof(display_on), display_on},
+};
+
+static struct dsi_cmd_desc orise_display_off_cmds[] = {
+ {DTYPE_DCS_WRITE, 1, 0, 0, 10,
+ sizeof(display_off), display_off},
+ {DTYPE_DCS_WRITE, 1, 0, 0, 120,
+ sizeof(enter_sleep), enter_sleep}
+};
+
+static int mipi_orise_lcd_on(struct platform_device *pdev)
+{
+ struct msm_fb_data_type *mfd;
+ struct mipi_panel_info *mipi;
+ struct msm_panel_info *pinfo;
+
+ mfd = platform_get_drvdata(pdev);
+ if (!mfd)
+ return -ENODEV;
+ if (mfd->key != MFD_KEY)
+ return -EINVAL;
+
+ pinfo = &mfd->panel_info;
+ mipi = &mfd->panel_info.mipi;
+
+ if (mipi->mode == DSI_VIDEO_MODE) {
+ mipi_dsi_cmds_tx(mfd, &orise_tx_buf, orise_video_on_cmds,
+ ARRAY_SIZE(orise_video_on_cmds));
+ } else {
+ mipi_dsi_cmds_tx(mfd, &orise_tx_buf, orise_cmd_on_cmds,
+ ARRAY_SIZE(orise_cmd_on_cmds));
+
+ mipi_dsi_cmd_bta_sw_trigger(); /* clean up ack_err_status */
+ }
+
+ return 0;
+}
+
+static int mipi_orise_lcd_off(struct platform_device *pdev)
+{
+ struct msm_fb_data_type *mfd;
+
+ mfd = platform_get_drvdata(pdev);
+
+ if (!mfd)
+ return -ENODEV;
+ if (mfd->key != MFD_KEY)
+ return -EINVAL;
+
+ mipi_dsi_cmds_tx(mfd, &orise_tx_buf, orise_display_off_cmds,
+ ARRAY_SIZE(orise_display_off_cmds));
+
+ return 0;
+}
+
+
+
+static int __devinit mipi_orise_lcd_probe(struct platform_device *pdev)
+{
+ struct msm_fb_data_type *mfd;
+ struct mipi_panel_info *mipi;
+ struct platform_device *current_pdev;
+ static struct mipi_dsi_phy_ctrl *phy_settings;
+
+ if (pdev->id == 0) {
+ mipi_orise_pdata = pdev->dev.platform_data;
+
+ if (mipi_orise_pdata
+ && mipi_orise_pdata->phy_ctrl_settings) {
+ phy_settings = (mipi_orise_pdata->phy_ctrl_settings);
+ }
+
+ return 0;
+ }
+
+ current_pdev = msm_fb_add_device(pdev);
+
+ if (current_pdev) {
+ mfd = platform_get_drvdata(current_pdev);
+ if (!mfd)
+ return -ENODEV;
+ if (mfd->key != MFD_KEY)
+ return -EINVAL;
+
+ mipi = &mfd->panel_info.mipi;
+
+ if (phy_settings != NULL)
+ mipi->dsi_phy_db = phy_settings;
+ }
+ return 0;
+}
+
+static struct platform_driver this_driver = {
+ .probe = mipi_orise_lcd_probe,
+ .driver = {
+ .name = "mipi_orise",
+ },
+};
+
+static struct msm_fb_panel_data orise_panel_data = {
+ .on = mipi_orise_lcd_on,
+ .off = mipi_orise_lcd_off,
+};
+
+static int ch_used[3];
+
+int mipi_orise_device_register(struct msm_panel_info *pinfo,
+ u32 channel, u32 panel)
+{
+ struct platform_device *pdev = NULL;
+ int ret;
+
+ if ((channel >= 3) || ch_used[channel])
+ return -ENODEV;
+
+ ch_used[channel] = TRUE;
+
+ pdev = platform_device_alloc("mipi_orise", (panel << 8)|channel);
+ if (!pdev)
+ return -ENOMEM;
+
+ orise_panel_data.panel_info = *pinfo;
+
+ ret = platform_device_add_data(pdev, &orise_panel_data,
+ sizeof(orise_panel_data));
+ if (ret) {
+ printk(KERN_ERR
+ "%s: platform_device_add_data failed!\n", __func__);
+ goto err_device_put;
+ }
+
+ ret = platform_device_add(pdev);
+ if (ret) {
+ printk(KERN_ERR
+ "%s: platform_device_register failed!\n", __func__);
+ goto err_device_put;
+ }
+
+ return 0;
+
+err_device_put:
+ platform_device_put(pdev);
+ return ret;
+}
+
+static int __init mipi_orise_lcd_init(void)
+{
+ mipi_dsi_buf_alloc(&orise_tx_buf, DSI_BUF_SIZE);
+ mipi_dsi_buf_alloc(&orise_rx_buf, DSI_BUF_SIZE);
+
+ return platform_driver_register(&this_driver);
+}
+
+module_init(mipi_orise_lcd_init);
diff --git a/drivers/video/msm/mipi_orise.h b/drivers/video/msm/mipi_orise.h
new file mode 100644
index 0000000..1659479
--- /dev/null
+++ b/drivers/video/msm/mipi_orise.h
@@ -0,0 +1,21 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+
+#ifndef MIPI_ORISE_H
+#define MIPI_ORISE_H
+
+int mipi_orise_device_register(struct msm_panel_info *pinfo,
+ u32 channel, u32 panel);
+
+#endif /* MIPI_ORISE_H */
diff --git a/drivers/video/msm/mipi_orise_cmd_720p_pt.c b/drivers/video/msm/mipi_orise_cmd_720p_pt.c
new file mode 100644
index 0000000..c2a158d
--- /dev/null
+++ b/drivers/video/msm/mipi_orise_cmd_720p_pt.c
@@ -0,0 +1,96 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include "msm_fb.h"
+#include "mipi_dsi.h"
+#include "mipi_orise.h"
+
+static struct msm_panel_info pinfo;
+
+static struct mipi_dsi_phy_ctrl dsi_cmd_mode_phy_db = {
+/* DSI_BIT_CLK at 507MHz, 4 lane, RGB888 */
+ {0x03, 0x0a, 0x04, 0x00, 0x20},
+ /* timing */
+ {0x8c, 0x34, 0x15, 0x00, 0x46, 0x50, 0x1a, 0x38,
+ 0x24, 0x03, 0x04, 0xa0},
+ /* phy ctrl */
+ {0x5f, 0x00, 0x00, 0x10},
+ /* strength */
+ {0xff, 0x00, 0x06, 0x00},
+ /* pll control */
+ {0x0, 0xf9, 0x30, 0xda, 0x00, 0x40, 0x03, 0x62,
+ 0x40, 0x07, 0x03,
+ 0x00, 0x1a, 0x00, 0x00, 0x02, 0x00, 0x20, 0x00, 0x01 },
+};
+
+static int __init mipi_cmd_orise_720p_pt_init(void)
+{
+ int ret;
+
+ if (msm_fb_detect_client("mipi_cmd_orise_720p"))
+ return 0;
+
+ pinfo.xres = 720;
+ pinfo.yres = 1280;
+ pinfo.type = MIPI_CMD_PANEL;
+ pinfo.pdest = DISPLAY_1;
+ pinfo.wait_cycle = 0;
+ pinfo.bpp = 24;
+ pinfo.lcdc.h_back_porch = 160;
+ pinfo.lcdc.h_front_porch = 160;
+ pinfo.lcdc.h_pulse_width = 8;
+ pinfo.lcdc.v_back_porch = 32;
+ pinfo.lcdc.v_front_porch = 32;
+ pinfo.lcdc.v_pulse_width = 1;
+ pinfo.lcdc.border_clr = 0; /* blk */
+ pinfo.lcdc.underflow_clr = 0xff; /* blue */
+ pinfo.lcdc.hsync_skew = 0;
+ pinfo.bl_max = 200;
+ pinfo.bl_min = 1;
+ pinfo.fb_num = 2;
+ pinfo.clk_rate = 507000000;
+ pinfo.lcd.vsync_enable = TRUE;
+ pinfo.lcd.hw_vsync_mode = TRUE;
+ pinfo.lcd.refx100 = 6000; /* adjust refx100 to prevent tearing */
+ pinfo.lcd.v_back_porch = 32;
+ pinfo.lcd.v_front_porch = 32;
+ pinfo.lcd.v_pulse_width = 1;
+
+ pinfo.mipi.mode = DSI_CMD_MODE;
+ pinfo.mipi.dst_format = DSI_CMD_DST_FORMAT_RGB888;
+ pinfo.mipi.vc = 0;
+ pinfo.mipi.data_lane0 = TRUE;
+ pinfo.mipi.data_lane1 = TRUE;
+ pinfo.mipi.data_lane2 = TRUE;
+ pinfo.mipi.data_lane3 = TRUE;
+ pinfo.mipi.t_clk_post = 0x04;
+ pinfo.mipi.t_clk_pre = 0x1e;
+ pinfo.mipi.stream = 0; /* dma_p */
+ pinfo.mipi.mdp_trigger = DSI_CMD_TRIGGER_NONE;
+ pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
+ pinfo.mipi.te_sel = 1; /* TE from vsycn gpio */
+ pinfo.mipi.interleave_max = 1;
+ pinfo.mipi.insert_dcs_cmd = TRUE;
+ pinfo.mipi.wr_mem_continue = 0x3c;
+ pinfo.mipi.wr_mem_start = 0x2c;
+ pinfo.mipi.dsi_phy_db = &dsi_cmd_mode_phy_db;
+
+ ret = mipi_orise_device_register(&pinfo, MIPI_DSI_PRIM,
+ MIPI_DSI_PANEL_720P_PT);
+ if (ret)
+ pr_err("%s: failed to register device!\n", __func__);
+
+ return ret;
+}
+
+module_init(mipi_cmd_orise_720p_pt_init);
diff --git a/drivers/video/msm/mipi_orise_video_720p_pt.c b/drivers/video/msm/mipi_orise_video_720p_pt.c
new file mode 100644
index 0000000..629ff10
--- /dev/null
+++ b/drivers/video/msm/mipi_orise_video_720p_pt.c
@@ -0,0 +1,97 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include "msm_fb.h"
+#include "mipi_dsi.h"
+#include "mipi_orise.h"
+
+static struct msm_panel_info pinfo;
+
+static struct mipi_dsi_phy_ctrl dsi_video_mode_phy_db = {
+ /* regulator */
+ {0x03, 0x0a, 0x04, 0x00, 0x20},
+ /* timing */
+ {0x83, 0x31, 0x13, 0x00, 0x42, 0x4d, 0x18, 0x35,
+ 0x21, 0x03, 0x04, 0xa0},
+ /* phy ctrl */
+ {0x5f, 0x00, 0x00, 0x10},
+ /* strength */
+ {0xff, 0x00, 0x06, 0x00},
+ /* pll control */
+ {0x0, 0x0e, 0x30, 0xc0, 0x00, 0x40, 0x03, 0x62,
+ 0x40, 0x07, 0x07,
+ 0x00, 0x1a, 0x00, 0x00, 0x02, 0x00, 0x20, 0x00, 0x01 },
+};
+
+static int __init mipi_video_orise_720p_pt_init(void)
+{
+ int ret;
+
+ if (msm_fb_detect_client("mipi_video_orise_720p"))
+ return 0;
+
+ pinfo.xres = 720;
+ pinfo.yres = 1280;
+ pinfo.lcdc.xres_pad = 0;
+ pinfo.lcdc.yres_pad = 0;
+
+ pinfo.type = MIPI_VIDEO_PANEL;
+ pinfo.pdest = DISPLAY_1;
+ pinfo.wait_cycle = 0;
+ pinfo.bpp = 24;
+ pinfo.lcdc.h_back_porch = 160;
+ pinfo.lcdc.h_front_porch = 160;
+ pinfo.lcdc.h_pulse_width = 8;
+ pinfo.lcdc.v_back_porch = 32;
+ pinfo.lcdc.v_front_porch = 32;
+ pinfo.lcdc.v_pulse_width = 1;
+ pinfo.lcdc.border_clr = 0; /* blk */
+ pinfo.lcdc.underflow_clr = 0xff; /* blue */
+ pinfo.lcdc.hsync_skew = 0;
+ pinfo.bl_max = 200;
+ pinfo.bl_min = 1;
+ pinfo.fb_num = 2;
+
+ pinfo.mipi.mode = DSI_VIDEO_MODE;
+ pinfo.mipi.pulse_mode_hsa_he = TRUE;
+ pinfo.mipi.hfp_power_stop = TRUE;
+ pinfo.mipi.hbp_power_stop = TRUE;
+ pinfo.mipi.hsa_power_stop = FALSE;
+ pinfo.mipi.eof_bllp_power_stop = TRUE;
+ pinfo.mipi.bllp_power_stop = TRUE;
+ pinfo.mipi.traffic_mode = DSI_NON_BURST_SYNCH_EVENT;
+ pinfo.mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
+ pinfo.mipi.vc = 0;
+ pinfo.mipi.rgb_swap = DSI_RGB_SWAP_RGB;
+ pinfo.mipi.data_lane0 = TRUE;
+ pinfo.mipi.data_lane1 = TRUE;
+ pinfo.mipi.data_lane2 = TRUE;
+ pinfo.mipi.data_lane3 = TRUE;
+ pinfo.mipi.t_clk_post = 0x04;
+ pinfo.mipi.t_clk_pre = 0x1c;
+ pinfo.mipi.stream = 0; /* dma_p */
+ pinfo.mipi.mdp_trigger = 0;
+ pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
+ pinfo.mipi.frame_rate = 55;
+ pinfo.mipi.dsi_phy_db = &dsi_video_mode_phy_db;
+ pinfo.mipi.tx_eot_append = TRUE;
+
+ ret = mipi_orise_device_register(&pinfo, MIPI_DSI_PRIM,
+ MIPI_DSI_PANEL_720P_PT);
+ if (ret)
+ printk(KERN_ERR "%s: failed to register device!\n", __func__);
+
+ return ret;
+}
+
+module_init(mipi_video_orise_720p_pt_init);
diff --git a/drivers/video/msm/mipi_tc358764_dsi2lvds.c b/drivers/video/msm/mipi_tc358764_dsi2lvds.c
index fcb5163..1624534 100644
--- a/drivers/video/msm/mipi_tc358764_dsi2lvds.c
+++ b/drivers/video/msm/mipi_tc358764_dsi2lvds.c
@@ -226,10 +226,14 @@
static u32 d2l_3d_gpio_enable;
static u32 d2l_3d_gpio_mode;
static int d2l_enable_3d;
+static struct i2c_client *d2l_i2c_client;
+static struct i2c_driver d2l_i2c_slave_driver;
static int mipi_d2l_init(void);
static int mipi_d2l_enable_3d(struct msm_fb_data_type *mfd,
bool enable, bool mode);
+static u32 d2l_i2c_read_reg(struct i2c_client *client, u16 reg);
+static u32 d2l_i2c_write_reg(struct i2c_client *client, u16 reg, u32 val);
/**
* Read a bridge register
@@ -296,6 +300,20 @@
mipi_d2l_read_reg(mfd, SYSSTAT); /* 0x500 */
}
+static void mipi_d2l_read_status_via_i2c(struct i2c_client *client)
+{
+ u32 tmp = 0;
+
+ tmp = d2l_i2c_read_reg(client, DSIERRCNT);
+ d2l_i2c_write_reg(client, DSIERRCNT, 0xFFFF0000);
+
+ d2l_i2c_read_reg(client, DSI_LANESTATUS0); /* 0x214 */
+ d2l_i2c_read_reg(client, DSI_LANESTATUS1); /* 0x218 */
+ d2l_i2c_read_reg(client, DSI_INTSTATUS); /* 0x220 */
+ d2l_i2c_read_reg(client, SYSSTAT); /* 0x500 */
+
+ d2l_i2c_write_reg(client, DSIERRCNT, tmp);
+}
/**
* Init the D2L bridge via the DSI interface for Video.
*
@@ -315,12 +333,19 @@
u32 vpctrl;
u32 htime1;
u32 vtime1;
+ u32 htime2;
+ u32 vtime2;
u32 ppi_tx_rx_ta; /* BTA Bus-Turn-Around */
u32 lvcfg;
u32 hbpr; /* Horizontal Back Porch */
u32 hpw; /* Horizontal Pulse Width */
u32 vbpr; /* Vertical Back Porch */
u32 vpw; /* Vertical Pulse Width */
+
+ u32 hfpr; /* Horizontal Front Porch */
+ u32 hsize; /* Horizontal Active size */
+ u32 vfpr; /* Vertical Front Porch */
+ u32 vsize; /* Vertical Active size */
bool vesa_rgb888 = false;
lanes_enable = 0x01; /* clock-lane enable */
@@ -345,8 +370,12 @@
return -EINVAL;
}
- pr_debug("%s.xres=%d.yres=%d.\n",
- __func__, mfd->panel_info.xres, mfd->panel_info.yres);
+ pr_debug("%s.xres=%d.yres=%d.fps=%d.dst_format=%d.\n",
+ __func__,
+ mfd->panel_info.xres,
+ mfd->panel_info.yres,
+ mfd->panel_info.mipi.frame_rate,
+ mfd->panel_info.mipi.dst_format);
hbpr = mfd->panel_info.lcdc.h_back_porch;
hpw = mfd->panel_info.lcdc.h_pulse_width;
@@ -355,6 +384,15 @@
htime1 = (hbpr << 16) + hpw;
vtime1 = (vbpr << 16) + vpw;
+
+ hfpr = mfd->panel_info.lcdc.h_front_porch;
+ hsize = mfd->panel_info.xres;
+ vfpr = mfd->panel_info.lcdc.v_front_porch;
+ vsize = mfd->panel_info.yres;
+
+ htime2 = (hfpr << 16) + hsize;
+ vtime2 = (vfpr << 16) + vsize;
+
lvcfg = 0x0003; /* PCLK=DCLK/3, Dual Link, LVEN */
vpctrl = 0x01000120; /* Output RGB888 , Event-Mode , */
ppi_tx_rx_ta = 0x00040004;
@@ -403,6 +441,8 @@
mipi_d2l_write_reg(mfd, VPCTRL, vpctrl); /* RGB888 + Event mode */
mipi_d2l_write_reg(mfd, HTIM1, htime1);
mipi_d2l_write_reg(mfd, VTIM1, vtime1);
+ mipi_d2l_write_reg(mfd, HTIM2, htime2);
+ mipi_d2l_write_reg(mfd, VTIM2, vtime2);
mipi_d2l_write_reg(mfd, VFUEN, 0x00000001);
mipi_d2l_write_reg(mfd, LVCFG, lvcfg); /* Enables LVDS tx */
@@ -539,6 +579,9 @@
mipi_d2l_enable_3d(mfd, false, false);
+ /* Add I2C driver only after DSI-CLK is running */
+ i2c_add_driver(&d2l_i2c_slave_driver);
+
pr_info("%s.ret=%d.\n", __func__, ret);
return ret;
@@ -589,6 +632,103 @@
.set_backlight = mipi_d2l_set_backlight,
};
+static u32 d2l_i2c_read_reg(struct i2c_client *client, u16 reg)
+{
+ int rc;
+ u32 val = 0;
+ u8 buf[6];
+
+ if (client == NULL) {
+ pr_err("%s.invalid i2c client.\n", __func__);
+ return -EINVAL;
+ }
+
+ buf[0] = reg >> 8;
+ buf[1] = reg & 0xFF;
+
+ rc = i2c_master_send(client, buf, sizeof(reg));
+ rc = i2c_master_recv(client, buf, 4);
+
+ if (rc >= 0) {
+ val = buf[0] + (buf[1] << 8) + (buf[2] << 16) + (buf[3] << 24);
+ pr_debug("%s.reg=0x%x.val=0x%x.\n", __func__, reg, val);
+ } else
+ pr_err("%s.fail.reg=0x%x.\n", __func__, reg);
+
+ return val;
+}
+
+static u32 d2l_i2c_write_reg(struct i2c_client *client, u16 reg, u32 val)
+{
+ int rc;
+ u8 buf[6];
+
+ if (client == NULL) {
+ pr_err("%s.invalid i2c client.\n", __func__);
+ return -EINVAL;
+ }
+
+ buf[0] = reg >> 8;
+ buf[1] = reg & 0xFF;
+
+ buf[2] = (val >> 0) & 0xFF;
+ buf[3] = (val >> 8) & 0xFF;
+ buf[4] = (val >> 16) & 0xFF;
+ buf[5] = (val >> 24) & 0xFF;
+
+ rc = i2c_master_send(client, buf, sizeof(buf));
+
+ if (rc >= 0)
+ pr_debug("%s.reg=0x%x.val=0x%x.\n", __func__, reg, val);
+ else
+ pr_err("%s.fail.reg=0x%x.\n", __func__, reg);
+
+ return val;
+}
+
+static int __devinit d2l_i2c_slave_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ static const u32 i2c_funcs = I2C_FUNC_I2C;
+
+ d2l_i2c_client = client;
+
+ if (!i2c_check_functionality(client->adapter, i2c_funcs)) {
+ pr_err("%s.i2c_check_functionality failed.\n", __func__);
+ return -ENOSYS;
+ } else {
+ pr_debug("%s.i2c_check_functionality OK.\n", __func__);
+ }
+
+ d2l_i2c_read_reg(client, IDREG);
+
+ mipi_d2l_read_status_via_i2c(d2l_i2c_client);
+
+ return 0;
+}
+
+static __devexit int d2l_i2c_slave_remove(struct i2c_client *client)
+{
+ d2l_i2c_client = NULL;
+
+ return 0;
+}
+
+static const struct i2c_device_id d2l_i2c_id[] = {
+ {"tc358764-i2c", 0},
+ {}
+};
+
+static struct i2c_driver d2l_i2c_slave_driver = {
+ .driver = {
+ .name = "tc358764-i2c",
+ .owner = THIS_MODULE
+ },
+ .probe = d2l_i2c_slave_probe,
+ .remove = __devexit_p(d2l_i2c_slave_remove),
+ .id_table = d2l_i2c_id,
+};
+
static int mipi_d2l_enable_3d(struct msm_fb_data_type *mfd,
bool enable, bool mode)
{
@@ -630,6 +770,8 @@
mipi_d2l_enable_3d(d2l_mfd, true, false);
else if (data == 0)
mipi_d2l_enable_3d(d2l_mfd, false, false);
+ else if (data == 9)
+ mipi_d2l_read_status_via_i2c(d2l_i2c_client);
else
pr_err("%s.Invalid value=%d.\n", __func__, data);
}
diff --git a/drivers/video/msm/mipi_truly_tft540960_1_e.c b/drivers/video/msm/mipi_truly_tft540960_1_e.c
new file mode 100644
index 0000000..937a598
--- /dev/null
+++ b/drivers/video/msm/mipi_truly_tft540960_1_e.c
@@ -0,0 +1,806 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include "msm_fb.h"
+#include "mipi_dsi.h"
+#include "mipi_truly_tft540960_1_e.h"
+
+static struct msm_panel_common_pdata *mipi_truly_pdata;
+static struct dsi_buf truly_tx_buf;
+static struct dsi_buf truly_rx_buf;
+
+#define TRULY_CMD_DELAY 0
+#define MIPI_SETTING_DELAY 10
+#define TRULY_SLEEP_OFF_DELAY 150
+#define TRULY_DISPLAY_ON_DELAY 150
+
+/* common setting */
+static char exit_sleep[2] = {0x11, 0x00};
+static char display_on[2] = {0x29, 0x00};
+static char display_off[2] = {0x28, 0x00};
+static char enter_sleep[2] = {0x10, 0x00};
+static char write_ram[2] = {0x2c, 0x00}; /* write ram */
+
+static struct dsi_cmd_desc truly_display_off_cmds[] = {
+ {DTYPE_DCS_WRITE, 1, 0, 0, 150, sizeof(display_off), display_off},
+ {DTYPE_DCS_WRITE, 1, 0, 0, 150, sizeof(enter_sleep), enter_sleep}
+};
+
+
+/* TFT540960_1_E CMD mode */
+static char cmd0[5] = {
+ 0xFF, 0xAA, 0x55, 0x25,
+ 0x01,
+};
+
+static char cmd2[5] = {
+ 0xF3, 0x02, 0x03, 0x07,
+ 0x45,
+};
+
+static char cmd3[6] = {
+ 0xF0, 0x55, 0xAA, 0x52,
+ 0x08, 0x00,
+};
+
+static char cmd4[2] = {
+ 0xB1, 0xeC,
+};
+
+/* add 0X BD command */
+static char cmd26_2[6] = {
+ 0xBD, 0x01, 0x60, 0x10, 0x38, 0x01 /* 55 HZ */
+};
+
+static char cmd5[5] = {
+ 0xB8, 0x01, 0x02, 0x02,
+ 0x02,
+};
+
+static char cmd6[4] = {
+ 0xBC, 0x05, 0x05, 0x05,
+};
+
+static char cmd7[2] = {
+ 0x4C, 0x11,
+};
+
+static char cmd8[6] = {
+ 0xF0, 0x55, 0xAA, 0x52,
+ 0x08, 0x01,
+};
+
+static char cmd9[4] = {
+ 0xB0, 0x05, 0x05, 0x05,
+};
+
+static char cmd10[4] = {
+ 0xB6, 0x44, 0x44, 0x44,
+};
+static char cmd11[4] = {
+ 0xB1, 0x05, 0x05, 0x05,
+};
+
+static char cmd12[4] = {
+ 0xB7, 0x34, 0x34, 0x34,
+};
+
+static char cmd13[4] = {
+ 0xB3, 0x10, 0x10, 0x10,
+};
+
+static char cmd14[4] = {
+ 0xB9, 0x34, 0x34, 0x34,
+};
+
+static char cmd15[4] = {
+ 0xB4, 0x0A, 0x0A, 0x0A,
+};
+
+static char cmd16[4] = {
+ 0xBA, 0x14, 0x14, 0x14,
+};
+static char cmd17[4] = {
+ 0xBC, 0x00, 0xA0, 0x00,
+};
+
+static char cmd18[4] = {
+ 0xBD, 0x00, 0xA0, 0x00,
+};
+
+static char cmd19[2] = {
+ 0xBE, 0x45,
+};
+
+static char cmd20[17] = {
+ 0xD1, 0x00, 0x32, 0x00,
+ 0x41, 0x00, 0x54, 0x00,
+ 0x67, 0x00, 0x7A, 0x00,
+ 0x98, 0x00, 0xB0, 0x00,
+ 0xDB,
+};
+
+static char cmd21[17] = {
+ 0xD2, 0x01, 0x01, 0x01,
+ 0x3F, 0x01, 0x70, 0x01,
+ 0xB4, 0x01, 0xEC, 0x01,
+ 0xED, 0x02, 0x1E, 0x02,
+ 0x51,
+};
+
+static char cmd22[17] = {
+ 0xD3, 0x02, 0x6C, 0x02,
+ 0x8D, 0x02, 0xA5, 0x02,
+ 0xC9, 0x02, 0xEA, 0x03,
+ 0x19, 0x03, 0x45, 0x03,
+ 0x7A,
+};
+
+static char cmd23[5] = {
+ 0xD4, 0x03, 0xB0, 0x03,
+ 0xF4,
+};
+
+static char cmd24[17] = {
+ 0xD5, 0x00, 0x32, 0x00,
+ 0x41, 0x00, 0x54, 0x00,
+ 0x67, 0x00, 0x7A, 0x00,
+ 0x98, 0x00, 0xB0, 0x00,
+ 0xDB,
+};
+static char cmd25[17] = {
+ 0xD6, 0x01, 0x01, 0x01,
+ 0x3F, 0x01, 0x70, 0x01,
+ 0xB4, 0x01, 0xEC, 0x01,
+ 0xED, 0x02, 0x1E, 0x02,
+ 0x51,
+};
+
+static char cmd26[17] = {
+ 0xD7, 0x02, 0x6C, 0x02,
+ 0x8D, 0x02, 0xA5, 0x02,
+ 0xC9, 0x02, 0xEA, 0x03,
+ 0x19, 0x03, 0x45, 0x03,
+ 0x7A,
+};
+static char cmd27[5] = {
+ 0xD8, 0x03, 0xB0, 0x03,
+ 0xF4,
+};
+
+
+static char cmd28[17] = {
+ 0xD9, 0x00, 0x32, 0x00,
+ 0x41, 0x00, 0x54, 0x00,
+ 0x67, 0x00, 0x7A, 0x00,
+ 0x98, 0x00, 0xB0, 0x00,
+ 0xDB,
+};
+
+static char cmd29[17] = {
+ 0xDD, 0x01, 0x01, 0x01,
+ 0x3F, 0x01, 0x70, 0x01,
+ 0xB4, 0x01, 0xEC, 0x01,
+ 0xED, 0x02, 0x1E, 0x02,
+ 0x51,
+};
+static char cmd30[17] = {
+ 0xDE, 0x02, 0x6C, 0x02,
+ 0x8D, 0x02, 0xA5, 0x02,
+ 0xC9, 0x02, 0xEA, 0x03,
+ 0x19, 0x03, 0x45, 0x03,
+ 0x7A,
+};
+
+static char cmd31[5] = {
+ 0xDF, 0x03, 0xB0, 0x03,
+ 0xF4,
+};
+
+static char cmd32[17] = {
+ 0xE0, 0x00, 0x32, 0x00,
+ 0x41, 0x00, 0x54, 0x00,
+ 0x67, 0x00, 0x7A, 0x00,
+ 0x98, 0x00, 0xB0, 0x00,
+ 0xDB,
+};
+
+static char cmd33[17] = {
+ 0xE1, 0x01, 0x01, 0x01,
+ 0x3F, 0x01, 0x70, 0x01,
+ 0xB4, 0x01, 0xEC, 0x01,
+ 0xED, 0x02, 0x1E, 0x02,
+ 0x51,
+};
+
+static char cmd34[17] = {
+ 0xE2, 0x02, 0x6C, 0x02,
+ 0x8D, 0x02, 0xA5, 0x02,
+ 0xC9, 0x02, 0xEA, 0x03,
+ 0x19, 0x03, 0x45, 0x03,
+ 0x7A,
+};
+
+static char cmd35[5] = {
+ 0xE3, 0x03, 0xB0, 0x03,
+ 0xF4,
+};
+
+static char cmd36[17] = {
+ 0xE4, 0x00, 0x32, 0x00,
+ 0x41, 0x00, 0x54, 0x00,
+ 0x67, 0x00, 0x7A, 0x00,
+ 0x98, 0x00, 0xB0, 0x00,
+ 0xDB,
+};
+static char cmd37[17] = {
+ 0xE5, 0x01, 0x01, 0x01,
+ 0x3F, 0x01, 0x70, 0x01,
+ 0xB4, 0x01, 0xEC, 0x01,
+ 0xED, 0x02, 0x1E, 0x02,
+ 0x51,
+};
+
+static char cmd38[17] = {
+ 0xE6, 0x02, 0x6C, 0x02,
+ 0x8D, 0x02, 0xA5, 0x02,
+ 0xC9, 0x02, 0xEA, 0x03,
+ 0x19, 0x03, 0x45, 0x03,
+ 0x7A,
+};
+
+static char cmd39[5] = {
+ 0xE7, 0x03, 0xB0, 0x03,
+ 0xF4,
+};
+
+static char cmd40[17] = {
+ 0xE8, 0x00, 0x32, 0x00,
+ 0x41, 0x00, 0x54, 0x00,
+ 0x67, 0x00, 0x7A, 0x00,
+ 0x98, 0x00, 0xB0, 0x00,
+ 0xDB,
+};
+
+static char cmd41[17] = {
+ 0xE9, 0x01, 0x01, 0x01,
+ 0x3F, 0x01, 0x70, 0x01,
+ 0xB4, 0x01, 0xEC, 0x01,
+ 0xED, 0x02, 0x1E, 0x02,
+ 0x51,
+};
+
+static char cmd42[17] = {
+ 0xEA, 0x02, 0x6C, 0x02,
+ 0x8D, 0x02, 0xA5, 0x02,
+ 0xC9, 0x02, 0xEA, 0x03,
+ 0x19, 0x03, 0x45, 0x03,
+ 0x7A,
+};
+
+static char cmd43[5] = {
+ 0xEB, 0x03, 0xB0, 0x03,
+ 0xF4,
+};
+
+static char cmd44[2] = {
+ 0x3A, 0x07,
+};
+
+static char cmd45[2] = {
+ 0x35, 0x00,
+};
+
+
+static struct dsi_cmd_desc truly_cmd_display_on_cmds[] = {
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd0), cmd0},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd2), cmd2},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd3), cmd3},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd4), cmd4},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd26_2), cmd26_2},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd5), cmd5},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd6), cmd6},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd7), cmd7},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd8), cmd8},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd9), cmd9},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd10), cmd10},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd11), cmd11},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd12), cmd12},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd13), cmd13},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd14), cmd14},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd15), cmd15},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd16), cmd16},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd17), cmd17},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd18), cmd18},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd19), cmd19},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd20), cmd20},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd21), cmd21},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd22), cmd22},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd23), cmd23},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd24), cmd24},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd25), cmd25},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd26), cmd26},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd27), cmd27},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd28), cmd28},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd29), cmd29},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd30), cmd30},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd31), cmd31},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd32), cmd32},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd33), cmd33},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd34), cmd34},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd35), cmd35},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd36), cmd36},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd37), cmd37},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd38), cmd38},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd39), cmd39},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd40), cmd40},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd41), cmd41},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd42), cmd42},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd43), cmd43},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd44), cmd44},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd45), cmd45},
+ {DTYPE_DCS_WRITE, 1, 0, 0, TRULY_SLEEP_OFF_DELAY, sizeof(exit_sleep),
+ exit_sleep},
+ {DTYPE_DCS_WRITE, 1, 0, 0, TRULY_CMD_DELAY, sizeof(display_on),
+ display_on},
+ {DTYPE_DCS_WRITE, 1, 0, 0, TRULY_CMD_DELAY, sizeof(write_ram),
+ write_ram},
+
+};
+
+/* TFT540960_1_E VIDEO mode */
+static char video0[5] = {
+ 0xFF, 0xAA, 0x55, 0x25,
+ 0x01,
+};
+
+static char video2[5] = {
+ 0xF3, 0x02, 0x03, 0x07,
+ 0x15,
+};
+
+static char video3[6] = {
+ 0xF0, 0x55, 0xAA, 0x52,
+ 0x08, 0x00,
+};
+
+static char video4[2] = {
+ 0xB1, 0xFC,
+};
+
+static char video5[5] = {
+ 0xB8, 0x01, 0x02, 0x02,
+ 0x02,
+};
+
+static char video6[4] = {
+ 0xBC, 0x05, 0x05, 0x05,
+};
+
+static char video7[2] = {
+ 0x4C, 0x11,
+};
+
+static char video8[6] = {
+ 0xF0, 0x55, 0xAA, 0x52,
+ 0x08, 0x01,
+};
+
+static char video9[4] = {
+ 0xB0, 0x05, 0x05, 0x05,
+};
+
+static char video10[4] = {
+ 0xB6, 0x44, 0x44, 0x44,
+};
+
+static char video11[4] = {
+ 0xB1, 0x05, 0x05, 0x05,
+};
+
+static char video12[4] = {
+ 0xB7, 0x34, 0x34, 0x34,
+};
+
+static char video13[4] = {
+ 0xB3, 0x10, 0x10, 0x10,
+};
+
+static char video14[4] = {
+ 0xB9, 0x34, 0x34, 0x34,
+};
+
+static char video15[4] = {
+ 0xB4, 0x0A, 0x0A, 0x0A,
+};
+
+static char video16[4] = {
+ 0xBA, 0x14, 0x14, 0x14,
+};
+
+static char video17[4] = {
+ 0xBC, 0x00, 0xA0, 0x00,
+};
+
+static char video18[4] = {
+ 0xBD, 0x00, 0xA0, 0x00,
+};
+
+static char video19[2] = {
+ 0xBE, 0x45,
+};
+
+static char video20[17] = {
+ 0xD1, 0x00, 0x32, 0x00,
+ 0x41, 0x00, 0x54, 0x00,
+ 0x67, 0x00, 0x7A, 0x00,
+ 0x98, 0x00, 0xB0, 0x00,
+ 0xDB,
+};
+
+static char video21[17] = {
+ 0xD2, 0x01, 0x01, 0x01,
+ 0x3F, 0x01, 0x70, 0x01,
+ 0xB4, 0x01, 0xEC, 0x01,
+ 0xED, 0x02, 0x1E, 0x02,
+ 0x51,
+};
+
+static char video22[17] = {
+ 0xD3, 0x02, 0x6C, 0x02,
+ 0x8D, 0x02, 0xA5, 0x02,
+ 0xC9, 0x02, 0xEA, 0x03,
+ 0x19, 0x03, 0x45, 0x03,
+ 0x7A,
+};
+
+static char video23[5] = {
+ 0xD4, 0x03, 0xB0, 0x03,
+ 0xF4,
+};
+
+static char video24[17] = {
+ 0xD5, 0x00, 0x32, 0x00,
+ 0x41, 0x00, 0x54, 0x00,
+ 0x67, 0x00, 0x7A, 0x00,
+ 0x98, 0x00, 0xB0, 0x00,
+ 0xDB,
+};
+
+static char video25[17] = {
+ 0xD6, 0x01, 0x01, 0x01,
+ 0x3F, 0x01, 0x70, 0x01,
+ 0xB4, 0x01, 0xEC, 0x01,
+ 0xED, 0x02, 0x1E, 0x02,
+ 0x51,
+};
+
+static char video26[17] = {
+ 0xD7, 0x02, 0x6C, 0x02,
+ 0x8D, 0x02, 0xA5, 0x02,
+ 0xC9, 0x02, 0xEA, 0x03,
+ 0x19, 0x03, 0x45, 0x03,
+ 0x7A,
+};
+
+static char video27[5] = {
+ 0xD8, 0x03, 0xB0, 0x03,
+ 0xF4,
+};
+
+static char video28[17] = {
+ 0xD9, 0x00, 0x32, 0x00,
+ 0x41, 0x00, 0x54, 0x00,
+ 0x67, 0x00, 0x7A, 0x00,
+ 0x98, 0x00, 0xB0, 0x00,
+ 0xDB,
+};
+
+static char video29[17] = {
+ 0xDD, 0x01, 0x01, 0x01,
+ 0x3F, 0x01, 0x70, 0x01,
+ 0xB4, 0x01, 0xEC, 0x01,
+ 0xED, 0x02, 0x1E, 0x02,
+ 0x51,
+};
+
+static char video30[17] = {
+ 0xDE, 0x02, 0x6C, 0x02,
+ 0x8D, 0x02, 0xA5, 0x02,
+ 0xC9, 0x02, 0xEA, 0x03,
+ 0x19, 0x03, 0x45, 0x03,
+ 0x7A,
+};
+
+static char video31[5] = {
+ 0xDF, 0x03, 0xB0, 0x03,
+ 0xF4,
+};
+
+static char video32[17] = {
+ 0xE0, 0x00, 0x32, 0x00,
+ 0x41, 0x00, 0x54, 0x00,
+ 0x67, 0x00, 0x7A, 0x00,
+ 0x98, 0x00, 0xB0, 0x00,
+ 0xDB,
+};
+
+static char video33[17] = {
+ 0xE1, 0x01, 0x01, 0x01,
+ 0x3F, 0x01, 0x70, 0x01,
+ 0xB4, 0x01, 0xEC, 0x01,
+ 0xED, 0x02, 0x1E, 0x02,
+ 0x51,
+};
+
+static char video34[17] = {
+ 0xE2, 0x02, 0x6C, 0x02,
+ 0x8D, 0x02, 0xA5, 0x02,
+ 0xC9, 0x02, 0xEA, 0x03,
+ 0x19, 0x03, 0x45, 0x03,
+ 0x7A,
+};
+
+static char video35[5] = {
+ 0xE3, 0x03, 0xB0, 0x03,
+ 0xF4,
+};
+
+static char video36[17] = {
+ 0xE4, 0x00, 0x32, 0x00,
+ 0x41, 0x00, 0x54, 0x00,
+ 0x67, 0x00, 0x7A, 0x00,
+ 0x98, 0x00, 0xB0, 0x00,
+ 0xDB,
+};
+
+static char video37[17] = {
+ 0xE5, 0x01, 0x01, 0x01,
+ 0x3F, 0x01, 0x70, 0x01,
+ 0xB4, 0x01, 0xEC, 0x01,
+ 0xED, 0x02, 0x1E, 0x02,
+ 0x51,
+};
+
+static char video38[17] = {
+ 0xE6, 0x02, 0x6C, 0x02,
+ 0x8D, 0x02, 0xA5, 0x02,
+ 0xC9, 0x02, 0xEA, 0x03,
+ 0x19, 0x03, 0x45, 0x03,
+ 0x7A,
+};
+
+static char video39[5] = {
+ 0xE7, 0x03, 0xB0, 0x03,
+ 0xF4,
+};
+
+static char video40[17] = {
+ 0xE8, 0x00, 0x32, 0x00,
+ 0x41, 0x00, 0x54, 0x00,
+ 0x67, 0x00, 0x7A, 0x00,
+ 0x98, 0x00, 0xB0, 0x00,
+ 0xDB,
+};
+
+static char video41[17] = {
+ 0xE9, 0x01, 0x01, 0x01,
+ 0x3F, 0x01, 0x70, 0x01,
+ 0xB4, 0x01, 0xEC, 0x01,
+ 0xED, 0x02, 0x1E, 0x02,
+ 0x51,
+};
+
+static char video42[17] = {
+ 0xEA, 0x02, 0x6C, 0x02,
+ 0x8D, 0x02, 0xA5, 0x02,
+ 0xC9, 0x02, 0xEA, 0x03,
+ 0x19, 0x03, 0x45, 0x03,
+ 0x7A,
+};
+
+static char video43[5] = {
+ 0xEB, 0x03, 0xB0, 0x03,
+ 0xF4,
+};
+
+static char video44[2] = {
+ 0x3A, 0x07,
+};
+
+static char video45[2] = {
+ 0x35, 0x00,
+};
+
+static struct dsi_cmd_desc truly_video_display_on_cmds[] = {
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video0), video0},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video2), video2},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video3), video3},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video4), video4},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video5), video5},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video6), video6},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video7), video7},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video8), video8},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video9), video9},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video10), video10},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video11), video11},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video12), video12},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video13), video13},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video14), video14},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video15), video15},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video16), video16},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video17), video17},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video18), video18},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video19), video19},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video20), video20},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video21), video21},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video22), video22},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video23), video23},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video24), video24},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video25), video25},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video26), video26},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video27), video27},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video28), video28},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video29), video29},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video30), video30},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video31), video31},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video32), video32},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video33), video33},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video34), video34},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video35), video35},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video36), video36},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video37), video37},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video38), video38},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video39), video39},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video40), video40},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video41), video41},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video42), video42},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video43), video43},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video44), video44},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video45), video45},
+
+ {DTYPE_DCS_WRITE, 1, 0, 0, 150, sizeof(exit_sleep), exit_sleep},
+ {DTYPE_DCS_WRITE, 1, 0, 0, 50, sizeof(display_on), display_on},
+};
+
+static int mipi_truly_lcd_on(struct platform_device *pdev)
+{
+ struct msm_fb_data_type *mfd;
+ struct mipi_panel_info *mipi;
+
+ mfd = platform_get_drvdata(pdev);
+
+ if (!mfd)
+ return -ENODEV;
+
+ if (mfd->key != MFD_KEY)
+ return -EINVAL;
+
+ mipi = &mfd->panel_info.mipi;
+ pr_info("%s: mode = %d\n", __func__, mipi->mode);
+ msleep(120);
+
+ if (mipi->mode == DSI_VIDEO_MODE) {
+ mipi_dsi_cmds_tx(mfd, &truly_tx_buf,
+ truly_video_display_on_cmds,
+ ARRAY_SIZE(truly_video_display_on_cmds));
+ } else if (mipi->mode == DSI_CMD_MODE) {
+ mipi_dsi_cmds_tx(mfd, &truly_tx_buf,
+ truly_cmd_display_on_cmds,
+ ARRAY_SIZE(truly_cmd_display_on_cmds));
+ }
+
+ return 0;
+}
+
+static int mipi_truly_lcd_off(struct platform_device *pdev)
+{
+ struct msm_fb_data_type *mfd;
+
+ mfd = platform_get_drvdata(pdev);
+
+ if (!mfd)
+ return -ENODEV;
+ if (mfd->key != MFD_KEY)
+ return -EINVAL;
+
+ mipi_dsi_cmds_tx(mfd, &truly_tx_buf, truly_display_off_cmds,
+ ARRAY_SIZE(truly_display_off_cmds));
+
+ return 0;
+}
+
+static int __devinit mipi_truly_lcd_probe(struct platform_device *pdev)
+{
+ int rc = 0;
+
+ if (pdev->id == 0) {
+ mipi_truly_pdata = pdev->dev.platform_data;
+ return rc;
+ }
+
+ msm_fb_add_device(pdev);
+
+ return rc;
+}
+
+static struct platform_driver this_driver = {
+ .probe = mipi_truly_lcd_probe,
+ .driver = {
+ .name = "mipi_truly_tft540960_1_e",
+ },
+};
+
+static void mipi_truly_set_backlight(struct msm_fb_data_type *mfd)
+{
+ return;
+}
+
+static struct msm_fb_panel_data truly_panel_data = {
+ .on = mipi_truly_lcd_on,
+ .off = mipi_truly_lcd_off,
+ .set_backlight = mipi_truly_set_backlight,
+};
+
+static int ch_used[3];
+
+static int mipi_truly_tft540960_1_e_lcd_init(void)
+{
+ mipi_dsi_buf_alloc(&truly_tx_buf, DSI_BUF_SIZE);
+ mipi_dsi_buf_alloc(&truly_rx_buf, DSI_BUF_SIZE);
+
+ return platform_driver_register(&this_driver);
+}
+int mipi_truly_tft540960_1_e_device_register(struct msm_panel_info *pinfo,
+ u32 channel, u32 panel)
+{
+ struct platform_device *pdev = NULL;
+ int ret;
+
+ if ((channel >= 3) || ch_used[channel])
+ return -ENODEV;
+
+ ch_used[channel] = TRUE;
+
+ ret = mipi_truly_tft540960_1_e_lcd_init();
+ if (ret) {
+ pr_err("%s: platform_device_register failed!\n", __func__);
+ return ret;
+ }
+
+ pdev = platform_device_alloc("mipi_truly_tft540960_1_e",
+ (panel << 8)|channel);
+ if (!pdev)
+ return -ENOMEM;
+
+ truly_panel_data.panel_info = *pinfo;
+
+ ret = platform_device_add_data(pdev, &truly_panel_data,
+ sizeof(truly_panel_data));
+ if (ret) {
+ pr_err("%s: platform_device_add_data failed!\n", __func__);
+ goto err_device_put;
+ }
+
+ ret = platform_device_add(pdev);
+ if (ret) {
+ pr_err("%s: platform_device_register failed!\n", __func__);
+ goto err_device_put;
+ }
+
+ return 0;
+
+err_device_put:
+ platform_device_put(pdev);
+ return ret;
+}
diff --git a/drivers/video/msm/mipi_truly_tft540960_1_e.h b/drivers/video/msm/mipi_truly_tft540960_1_e.h
new file mode 100644
index 0000000..8cbfb80
--- /dev/null
+++ b/drivers/video/msm/mipi_truly_tft540960_1_e.h
@@ -0,0 +1,20 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef MIPI_TRULY_H
+#define MIPI_TRULY_H
+
+int mipi_truly_tft540960_1_e_device_register(struct msm_panel_info *pinfo,
+ u32 channel, u32 panel);
+
+#endif /* MIPI_TRULY_H */
diff --git a/drivers/video/msm/mipi_truly_tft540960_1_e_cmd_qhd_pt.c b/drivers/video/msm/mipi_truly_tft540960_1_e_cmd_qhd_pt.c
new file mode 100644
index 0000000..82efbef
--- /dev/null
+++ b/drivers/video/msm/mipi_truly_tft540960_1_e_cmd_qhd_pt.c
@@ -0,0 +1,98 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include "msm_fb.h"
+#include "mipi_dsi.h"
+#include "mipi_truly_tft540960_1_e.h"
+
+static struct msm_panel_info pinfo;
+
+static struct mipi_dsi_phy_ctrl dsi_cmd_mode_phy_db = {
+ /* DSI Bit Clock at 500 MHz, 2 lane, RGB888 */
+ /* regulator */
+ {0x03, 0x01, 0x01, 0x00},
+ /* timing */
+ {0xb9, 0x8e, 0x1f, 0x00, 0x98, 0x9c, 0x22, 0x90,
+ 0x18, 0x03, 0x04},
+ /* phy ctrl */
+ {0x7f, 0x00, 0x00, 0x00},
+ /* strength */
+ {0xbb, 0x02, 0x06, 0x00},
+ /* pll control */
+ {0x01, 0xec, 0x31, 0xd2, 0x00, 0x40, 0x37, 0x62,
+ 0x01, 0x0f, 0x07,
+ 0x05, 0x14, 0x03, 0x0, 0x0, 0x0, 0x20, 0x0, 0x02, 0x0},
+};
+
+static int mipi_cmd_truly_qhd_pt_init(void)
+{
+ int ret;
+ if (msm_fb_detect_client("mipi_cmd_truly_qhd"))
+ return 0;
+
+ pinfo.xres = 540;
+ pinfo.yres = 960;
+ pinfo.type = MIPI_CMD_PANEL;
+ pinfo.pdest = DISPLAY_1;
+ pinfo.wait_cycle = 0;
+ pinfo.bpp = 24;
+ pinfo.lcdc.h_back_porch = 100;
+ pinfo.lcdc.h_front_porch = 100;
+ pinfo.lcdc.h_pulse_width = 8;
+ pinfo.lcdc.v_back_porch = 20;
+ pinfo.lcdc.v_front_porch = 20;
+ pinfo.lcdc.v_pulse_width = 1;
+
+ pinfo.lcdc.border_clr = 0; /* blk */
+ pinfo.lcdc.underflow_clr = 0xff; /* blue */
+ pinfo.lcdc.hsync_skew = 0;
+ pinfo.bl_max = 16;
+ pinfo.bl_min = 1;
+ pinfo.fb_num = 2;
+
+ pinfo.clk_rate = 499000000;
+
+ pinfo.lcd.vsync_enable = TRUE;
+ pinfo.lcd.hw_vsync_mode = TRUE;
+ pinfo.lcd.refx100 = 6000; /* adjust refx100 to prevent tearing */
+
+ pinfo.mipi.mode = DSI_CMD_MODE;
+ pinfo.mipi.dst_format = DSI_CMD_DST_FORMAT_RGB888;
+ pinfo.mipi.vc = 0;
+ pinfo.mipi.rgb_swap = DSI_RGB_SWAP_RGB;
+ pinfo.mipi.data_lane0 = TRUE;
+ pinfo.mipi.data_lane1 = TRUE;
+ pinfo.mipi.t_clk_post = 0x20;
+ pinfo.mipi.t_clk_pre = 0x2F;
+ pinfo.mipi.stream = 0; /* dma_p */
+ pinfo.mipi.mdp_trigger = DSI_CMD_TRIGGER_SW_TE;
+ pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
+ pinfo.mipi.te_sel = 1; /* TE from vsync gpio */
+ pinfo.mipi.interleave_max = 1;
+ pinfo.mipi.insert_dcs_cmd = TRUE;
+ pinfo.mipi.wr_mem_continue = 0x3c;
+ pinfo.mipi.wr_mem_start = 0x2c;
+ pinfo.mipi.dsi_phy_db = &dsi_cmd_mode_phy_db;
+ pinfo.mipi.tx_eot_append = 0x01;
+ pinfo.mipi.rx_eot_ignore = 0x0;
+ pinfo.mipi.dlane_swap = 0x01;
+
+ ret = mipi_truly_tft540960_1_e_device_register(&pinfo, MIPI_DSI_PRIM,
+ MIPI_DSI_PANEL_WVGA_PT);
+ if (ret)
+ pr_err("%s: failed to register device!\n", __func__);
+
+ return ret;
+}
+
+module_init(mipi_cmd_truly_qhd_pt_init);
diff --git a/drivers/video/msm/mipi_truly_tft540960_1_e_video_qhd_pt.c b/drivers/video/msm/mipi_truly_tft540960_1_e_video_qhd_pt.c
new file mode 100644
index 0000000..0e12813
--- /dev/null
+++ b/drivers/video/msm/mipi_truly_tft540960_1_e_video_qhd_pt.c
@@ -0,0 +1,107 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include "msm_fb.h"
+#include "mipi_dsi.h"
+#include "mipi_truly_tft540960_1_e.h"
+
+static struct msm_panel_info pinfo;
+
+static struct mipi_dsi_phy_ctrl dsi_video_mode_phy_db = {
+ /* DSI Bit Clock at 500 MHz, 2 lane, RGB888 */
+ /* regulator */
+ {0x03, 0x01, 0x01, 0x00},
+ /* timing */
+ {0xb9, 0x8e, 0x1f, 0x00, 0x98, 0x9c, 0x22, 0x90,
+ 0x18, 0x03, 0x04},
+ /* phy ctrl */
+ {0x7f, 0x00, 0x00, 0x00},
+ /* strength */
+ {0xbb, 0x02, 0x06, 0x00},
+ /* pll control */
+ {0x00, 0xec, 0x31, 0xd2, 0x00, 0x40, 0x37, 0x62,
+ 0x01, 0x0f, 0x07,
+ 0x05, 0x14, 0x03, 0x0, 0x0, 0x0, 0x20, 0x0, 0x02, 0x0},
+};
+
+static int mipi_video_truly_qhd_pt_init(void)
+{
+ int ret;
+ if (msm_fb_detect_client("mipi_video_truly_qhd"))
+ return 0;
+
+ pinfo.xres = 540;
+ pinfo.yres = 960;
+ pinfo.type = MIPI_VIDEO_PANEL;
+ pinfo.pdest = DISPLAY_1;
+ pinfo.wait_cycle = 0;
+ pinfo.bpp = 24;
+ pinfo.lcdc.h_back_porch = 100;
+ pinfo.lcdc.h_front_porch = 100;
+ pinfo.lcdc.h_pulse_width = 8;
+ pinfo.lcdc.v_back_porch = 20;
+ pinfo.lcdc.v_front_porch = 20;
+ pinfo.lcdc.v_pulse_width = 1;
+ pinfo.lcdc.border_clr = 0; /* blk */
+ pinfo.lcdc.underflow_clr = 0xff; /* blue */
+ /* number of dot_clk cycles HSYNC active edge
+ is delayed from VSYNC active edge */
+ pinfo.lcdc.hsync_skew = 0;
+ pinfo.clk_rate = 699000000;
+ pinfo.lcd.refx100 = 6000; /* FB driver calc FPS based on this value */
+ pinfo.bl_max = 16;
+ pinfo.bl_min = 1;
+ pinfo.fb_num = 2;
+
+ pinfo.mipi.mode = DSI_VIDEO_MODE;
+ /* send HSA and HE following VS/VE packet */
+ pinfo.mipi.pulse_mode_hsa_he = TRUE;
+ pinfo.mipi.hfp_power_stop = TRUE; /* LP-11 during the HFP period */
+ pinfo.mipi.hbp_power_stop = TRUE; /* LP-11 during the HBP period */
+ pinfo.mipi.hsa_power_stop = TRUE; /* LP-11 during the HSA period */
+ /* LP-11 or let Command Mode Engine send packets in
+ HS or LP mode for the BLLP of the last line of a frame */
+ pinfo.mipi.eof_bllp_power_stop = TRUE;
+ /* LP-11 or let Command Mode Engine send packets in
+ HS or LP mode for packets sent during BLLP period */
+ pinfo.mipi.bllp_power_stop = TRUE;
+
+ pinfo.mipi.traffic_mode = DSI_BURST_MODE;
+ pinfo.mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
+ pinfo.mipi.vc = 0;
+ pinfo.mipi.rgb_swap = DSI_RGB_SWAP_RGB; /* RGB */
+ pinfo.mipi.data_lane0 = TRUE;
+ pinfo.mipi.data_lane1 = TRUE;
+
+ pinfo.mipi.t_clk_post = 0x20;
+ pinfo.mipi.t_clk_pre = 0x2f;
+
+ pinfo.mipi.stream = 0; /* dma_p */
+ pinfo.mipi.mdp_trigger = DSI_CMD_TRIGGER_NONE;
+ pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
+ pinfo.mipi.frame_rate = 60;
+
+ pinfo.mipi.dsi_phy_db = &dsi_video_mode_phy_db;
+ pinfo.mipi.dlane_swap = 0x01;
+ /* append EOT at the end of data burst */
+ pinfo.mipi.tx_eot_append = 0x01;
+
+ ret = mipi_truly_tft540960_1_e_device_register(&pinfo, MIPI_DSI_PRIM,
+ MIPI_DSI_PANEL_WVGA_PT);
+ if (ret)
+ pr_err("%s: failed to register device!\n", __func__);
+
+ return ret;
+}
+
+module_init(mipi_video_truly_qhd_pt_init);
diff --git a/drivers/video/msm/msm_dss_io_8960.c b/drivers/video/msm/msm_dss_io_8960.c
index 3b000ec..0f40c77 100644
--- a/drivers/video/msm/msm_dss_io_8960.c
+++ b/drivers/video/msm/msm_dss_io_8960.c
@@ -11,6 +11,7 @@
*
*/
#include <linux/clk.h>
+#include <mach/clk.h>
#include "msm_fb.h"
#include "mdp.h"
#include "mdp4.h"
@@ -634,6 +635,10 @@
hdmi_msm_clk(0);
udelay(5);
hdmi_msm_clk(1);
+
+ clk_reset(hdmi_msm_state->hdmi_app_clk, CLK_RESET_ASSERT);
+ udelay(20);
+ clk_reset(hdmi_msm_state->hdmi_app_clk, CLK_RESET_DEASSERT);
}
void hdmi_msm_init_phy(int video_format)
diff --git a/drivers/video/msm/msm_fb.c b/drivers/video/msm/msm_fb.c
index 69e0423..bacc085 100644
--- a/drivers/video/msm/msm_fb.c
+++ b/drivers/video/msm/msm_fb.c
@@ -188,12 +188,8 @@
};
#endif
-#define PANEL_NAME_MAX_LEN 30
static struct msm_fb_platform_data *msm_fb_pdata;
-static char prim_panel_name[PANEL_NAME_MAX_LEN];
-static char ext_panel_name[PANEL_NAME_MAX_LEN];
-module_param_string(prim_display, prim_panel_name, sizeof(prim_panel_name) , 0);
-module_param_string(ext_display, ext_panel_name, sizeof(ext_panel_name) , 0);
+unsigned char hdmi_prim_display;
int msm_fb_detect_client(const char *name)
{
@@ -202,19 +198,28 @@
#ifdef CONFIG_FB_MSM_MDDI_AUTO_DETECT
u32 id;
#endif
+ if (!msm_fb_pdata)
+ return -EPERM;
+
len = strnlen(name, PANEL_NAME_MAX_LEN);
- if (strnlen(prim_panel_name, PANEL_NAME_MAX_LEN)) {
- MSM_FB_DEBUG("\n name = %s, prim_display = %s",
- name, prim_panel_name);
- if (!strncmp((char *)prim_panel_name, name, len))
+ if (strnlen(msm_fb_pdata->prim_panel_name, PANEL_NAME_MAX_LEN)) {
+ pr_err("\n name = %s, prim_display = %s",
+ name, msm_fb_pdata->prim_panel_name);
+ if (!strncmp((char *)msm_fb_pdata->prim_panel_name,
+ name, len)) {
+ if (!strncmp((char *)msm_fb_pdata->prim_panel_name,
+ "hdmi_msm", len))
+ hdmi_prim_display = 1;
return 0;
- else
+ } else {
ret = -EPERM;
+ }
}
- if (strnlen(ext_panel_name, PANEL_NAME_MAX_LEN)) {
- MSM_FB_DEBUG("\n name = %s, ext_display = %s",
- name, ext_panel_name);
- if (!strncmp((char *)ext_panel_name, name, len))
+
+ if (strnlen(msm_fb_pdata->ext_panel_name, PANEL_NAME_MAX_LEN)) {
+ pr_err("\n name = %s, ext_display = %s",
+ name, msm_fb_pdata->ext_panel_name);
+ if (!strncmp((char *)msm_fb_pdata->ext_panel_name, name, len))
return 0;
else
ret = -EPERM;
@@ -797,6 +802,36 @@
return ret;
}
+int calc_fb_offset(struct msm_fb_data_type *mfd, struct fb_info *fbi, int bpp)
+{
+ struct msm_panel_info *panel_info = &mfd->panel_info;
+ int remainder, yres, offset;
+
+ if (panel_info->mode2_yres != 0) {
+ yres = panel_info->mode2_yres;
+ remainder = (fbi->fix.line_length*yres) & (PAGE_SIZE - 1);
+ } else {
+ yres = panel_info->yres;
+ remainder = (fbi->fix.line_length*yres) & (PAGE_SIZE - 1);
+ }
+
+ if (!remainder)
+ remainder = PAGE_SIZE;
+
+ if (fbi->var.yoffset < yres) {
+ offset = (fbi->var.xoffset * bpp);
+ /* iBuf->buf += fbi->var.xoffset * bpp + 0 *
+ yres * fbi->fix.line_length; */
+ } else if (fbi->var.yoffset >= yres && fbi->var.yoffset < 2 * yres) {
+ offset = (fbi->var.xoffset * bpp + yres *
+ fbi->fix.line_length + PAGE_SIZE - remainder);
+ } else {
+ offset = (fbi->var.xoffset * bpp + 2 * yres *
+ fbi->fix.line_length + 2 * (PAGE_SIZE - remainder));
+ }
+ return offset;
+}
+
static void msm_fb_fillrect(struct fb_info *info,
const struct fb_fillrect *rect)
{
@@ -1114,11 +1149,12 @@
/* Make sure all buffers can be addressed on a page boundary by an x
* and y offset */
- remainder = (fix->line_length * panel_info->yres) % PAGE_SIZE;
+ remainder = (fix->line_length * panel_info->yres) & (PAGE_SIZE - 1);
+ /* PAGE_SIZE is a power of 2 */
if (!remainder)
remainder = PAGE_SIZE;
remainder_mode2 = (fix->line_length *
- panel_info->mode2_yres) % PAGE_SIZE;
+ panel_info->mode2_yres) & (PAGE_SIZE - 1);
if (!remainder_mode2)
remainder_mode2 = PAGE_SIZE;
@@ -1549,6 +1585,7 @@
static int msm_fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
{
struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
+ int hole_offset;
if (var->rotate != FB_ROTATE_UR)
return -EINVAL;
@@ -1643,7 +1680,20 @@
if (var->xoffset > (var->xres_virtual - var->xres))
return -EINVAL;
- if (var->yoffset > (var->yres_virtual - var->yres))
+ if (!mfd->panel_info.mode2_yres)
+ hole_offset = (mfd->fbi->fix.line_length *
+ mfd->panel_info.yres) % PAGE_SIZE;
+ else
+ hole_offset = (mfd->fbi->fix.line_length *
+ mfd->panel_info.mode2_yres) % PAGE_SIZE;
+
+ if (!hole_offset) {
+ hole_offset = PAGE_SIZE - hole_offset;
+ hole_offset = hole_offset/mfd->fbi->fix.line_length;
+ }
+
+ if (var->yoffset > (var->yres_virtual - var->yres + (hole_offset *
+ (mfd->fb_page - 1))))
return -EINVAL;
return 0;
@@ -2952,6 +3002,9 @@
case mdp_op_lut_cfg:
switch (pp_ptr->data.lut_cfg_data.lut_type) {
case mdp_lut_igc:
+ ret = mdp4_igc_lut_config(
+ (struct mdp_igc_lut_data *)
+ &pp_ptr->data.lut_cfg_data.data);
break;
case mdp_lut_pgc:
@@ -2960,6 +3013,9 @@
break;
case mdp_lut_hist:
+ ret = mdp_hist_lut_config(
+ (struct mdp_hist_lut_data *)
+ &pp_ptr->data.lut_cfg_data.data);
break;
default:
@@ -3369,11 +3425,10 @@
*/
if (type == HDMI_PANEL || type == DTV_PANEL ||
type == TV_PANEL || type == WRITEBACK_PANEL) {
-#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
- pdata->panel_info.fb_num = 2;
-#else
- pdata->panel_info.fb_num = 1;
-#endif
+ if (hdmi_prim_display)
+ pdata->panel_info.fb_num = 2;
+ else
+ pdata->panel_info.fb_num = 1;
}
else
pdata->panel_info.fb_num = MSM_FB_NUM;
diff --git a/drivers/video/msm/msm_fb.h b/drivers/video/msm/msm_fb.h
index 9837f07..90fa9b3 100644
--- a/drivers/video/msm/msm_fb.h
+++ b/drivers/video/msm/msm_fb.h
@@ -177,6 +177,7 @@
u32 mem_hid;
u32 mdp_rev;
u32 use_ov0_blt, ov0_blt_state;
+ u32 use_ov1_blt, ov1_blt_state;
u32 writeback_state;
};
@@ -196,6 +197,7 @@
int msm_fb_writeback_stop(struct fb_info *info);
int msm_fb_writeback_terminate(struct fb_info *info);
int msm_fb_detect_client(const char *name);
+int calc_fb_offset(struct msm_fb_data_type *mfd, struct fb_info *fbi, int bpp);
#ifdef CONFIG_FB_BACKLIGHT
void msm_fb_config_backlight(struct msm_fb_data_type *mfd);
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl.h b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl.h
index e613f29..c3874fa 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl.h
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -239,6 +239,7 @@
struct vcd_property_intra_refresh_mb_number intra_refresh;
struct vcd_property_buffer_format buf_format;
struct vcd_property_buffer_format recon_buf_format;
+ struct vcd_property_sps_pps_for_idr_enable sps_pps;
struct ddl_buf_addr seq_header;
struct vcd_buffer_requirement input_buf_req;
struct vcd_buffer_requirement output_buf_req;
@@ -260,7 +261,7 @@
u32 mb_info_enable;
u32 ext_enc_control_val;
u32 num_references_for_p_frame;
- u32 closed_gop;
+ u32 closed_gop;
};
struct ddl_decoder_data {
struct ddl_codec_data_hdr hdr;
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_api.h b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_api.h
index 51a0d13..433dad4 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_api.h
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_api.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -14,8 +14,8 @@
#ifndef _VCD_DDL_API_H_
#define _VCD_DDL_API_H_
+#include <media/msm/vcd_api.h>
#include "vidc.h"
-#include "vcd_api.h"
#define VCD_EVT_RESP_DDL_BASE 0x3000
#define VCD_EVT_RESP_DEVICE_INIT (VCD_EVT_RESP_DDL_BASE + 0x1)
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_core.h b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_core.h
index a0d30b6..b4161dd 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_core.h
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_core.h
@@ -132,4 +132,8 @@
#define DDL_RESL_CHANGE_INCREASED 1
#define DDL_RESL_CHANGE_DECREASED 2
+#define VIDC_SM_ERR_CONCEALMENT_ENABLE 1
+#define VIDC_SM_ERR_CONCEALMENT_INTER_SLICE_MB_COPY 2
+#define VIDC_SM_ERR_CONCEALMENT_INTRA_SLICE_COLOR_CONCEALMENT 1
+
#endif
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_errors.c b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_errors.c
index d658647..a2327d5 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_errors.c
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_errors.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -236,7 +236,6 @@
case VIDC_1080P_ERROR_PICTURE_STRUCTURE_ERR:
case VIDC_1080P_ERROR_SLICE_ADDR_INVALID:
case VIDC_1080P_ERROR_NON_FRAME_DATA_RECEIVED:
- case VIDC_1080P_ERROR_INCOMPLETE_FRAME:
case VIDC_1080P_ERROR_NALU_HEADER_ERROR:
case VIDC_1080P_ERROR_SPS_PARSE_ERROR:
case VIDC_1080P_ERROR_PPS_PARSE_ERROR:
@@ -309,6 +308,8 @@
case VIDC_1080P_WARN_BIT_RATE_NOT_SUPPORTED:
case VIDC_1080P_WARN_COLOR_DIFF_FORMAT_NOT_SUPPORTED:
case VIDC_1080P_WARN_NULL_EXTRA_METADATA_POINTER:
+ case VIDC_1080P_WARN_DEBLOCKING_NOT_DONE:
+ case VIDC_1080P_WARN_INCOMPLETE_FRAME:
case VIDC_1080P_ERROR_NULL_FW_DEBUG_INFO_POINTER:
case VIDC_1080P_ERROR_ALLOC_DEBUG_INFO_SIZE_INSUFFICIENT:
case VIDC_1080P_WARN_METADATA_NO_SPACE_NUM_CONCEAL_MB:
@@ -322,6 +323,9 @@
case VIDC_1080P_WARN_METADATA_NO_SPACE_MB_INFO:
case VIDC_1080P_WARN_METADATA_NO_SPACE_SLICE_SIZE:
case VIDC_1080P_WARN_RESOLUTION_WARNING:
+ case VIDC_1080P_WARN_NO_LONG_TERM_REFERENCE:
+ case VIDC_1080P_WARN_NO_SPACE_MPEG2_DATA_DUMP:
+ case VIDC_1080P_WARN_METADATA_NO_SPACE_MISSING_MB:
status = true;
DDL_MSG_ERROR("VIDC_WARNING_IGNORED");
break;
@@ -626,6 +630,12 @@
case VIDC_1080P_WARN_NULL_EXTRA_METADATA_POINTER:
string = "VIDC_1080P_WARN_NULL_EXTRA_METADATA_POINTER";
break;
+ case VIDC_1080P_WARN_DEBLOCKING_NOT_DONE:
+ string = "VIDC_1080P_WARN_DEBLOCKING_NOT_DONE";
+ break;
+ case VIDC_1080P_WARN_INCOMPLETE_FRAME:
+ string = "VIDC_1080P_WARN_INCOMPLETE_FRAME";
+ break;
case VIDC_1080P_ERROR_NULL_FW_DEBUG_INFO_POINTER:
string = "VIDC_1080P_ERROR_NULL_FW_DEBUG_INFO_POINTER";
break;
@@ -666,6 +676,15 @@
case VIDC_1080P_WARN_RESOLUTION_WARNING:
string = "VIDC_1080P_WARN_RESOLUTION_WARNING";
break;
+ case VIDC_1080P_WARN_NO_LONG_TERM_REFERENCE:
+ string = "VIDC_1080P_WARN_NO_LONG_TERM_REFERENCE";
+ break;
+ case VIDC_1080P_WARN_NO_SPACE_MPEG2_DATA_DUMP:
+ string = "VIDC_1080P_WARN_NO_SPACE_MPEG2_DATA_DUMP";
+ break;
+ case VIDC_1080P_WARN_METADATA_NO_SPACE_MISSING_MB:
+ string = "VIDC_1080P_WARN_METADATA_NO_SPACE_MISSING_MB";
+ break;
}
if (string)
DDL_MSG_ERROR("Error code = 0x%x : %s", error_code, string);
@@ -733,9 +752,6 @@
case VIDC_1080P_ERROR_NON_FRAME_DATA_RECEIVED:
string = "VIDC_1080P_ERROR_NON_FRAME_DATA_RECEIVED";
break;
- case VIDC_1080P_ERROR_INCOMPLETE_FRAME:
- string = "VIDC_1080P_ERROR_INCOMPLETE_FRAME";
- break;
case VIDC_1080P_ERROR_NALU_HEADER_ERROR:
string = "VIDC_1080P_ERROR_NALU_HEADER_ERROR";
break;
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_metadata.c b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_metadata.c
index 3f54756..267e924 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_metadata.c
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_metadata.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010, 2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -246,6 +246,8 @@
DDL_METADATA_ALIGNSIZE(suffix);
encoder->suffix = suffix;
encoder->output_buf_req.sz += suffix;
+ encoder->output_buf_req.sz =
+ DDL_ALIGN(encoder->output_buf_req.sz, DDL_KILO_BYTE(4));
}
u32 ddl_set_metadata_params(struct ddl_client_context *ddl,
@@ -454,6 +456,7 @@
return;
}
out_frame->flags |= VCD_FRAME_FLAG_EXTRADATA;
+ DDL_MSG_LOW("processing metadata for encoder");
start_addr = (u32) ((u8 *)out_frame->virtual + out_frame->offset);
qfiller = (u32 *)((out_frame->data_len +
start_addr + 3) & ~3);
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_properties.c b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_properties.c
index 51a72c8..40c5408 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_properties.c
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_properties.c
@@ -915,14 +915,34 @@
}
case VCD_I_METADATA_ENABLE:
case VCD_I_METADATA_HEADER:
- DDL_MSG_ERROR("Meta Data Interface is Requested");
- vcd_status = ddl_set_metadata_params(ddl, property_hdr,
- property_value);
- vcd_status = VCD_S_SUCCESS;
+ DDL_MSG_LOW("Meta Data Interface is Requested");
+ if (!res_trk_check_for_sec_session()) {
+ vcd_status = ddl_set_metadata_params(ddl,
+ property_hdr, property_value);
+ } else {
+ DDL_MSG_ERROR("Meta Data Interface is not "
+ "supported in secure session");
+ vcd_status = VCD_ERR_ILLEGAL_OP;
+ }
break;
case VCD_I_META_BUFFER_MODE:
vcd_status = VCD_S_SUCCESS;
break;
+ case VCD_I_ENABLE_SPS_PPS_FOR_IDR:
+ {
+ struct vcd_property_sps_pps_for_idr_enable *sps_pps =
+ (struct vcd_property_sps_pps_for_idr_enable *) property_value;
+
+ if ((sizeof(struct vcd_property_sps_pps_for_idr_enable)) ==
+ property_hdr->sz) {
+ DDL_MSG_LOW("SPS PPS generation for IDR Encode "
+ "is Requested");
+ encoder->sps_pps.sps_pps_for_idr_enable_flag =
+ sps_pps->sps_pps_for_idr_enable_flag;
+ vcd_status = VCD_S_SUCCESS;
+ }
+ break;
+ }
default:
DDL_MSG_ERROR("INVALID ID %d\n", (int)property_hdr->prop_id);
vcd_status = VCD_ERR_ILLEGAL_OP;
@@ -1387,6 +1407,14 @@
property_value);
vcd_status = VCD_S_SUCCESS;
break;
+ case VCD_I_ENABLE_SPS_PPS_FOR_IDR:
+ if (sizeof(struct vcd_property_sps_pps_for_idr_enable) ==
+ property_hdr->sz) {
+ *(struct vcd_property_sps_pps_for_idr_enable *)
+ property_value = encoder->sps_pps;
+ vcd_status = VCD_S_SUCCESS;
+ }
+ break;
default:
vcd_status = VCD_ERR_ILLEGAL_OP;
break;
@@ -1836,8 +1864,16 @@
/*original_buf_req->align <= req_buf_req->align,*/
original_buf_req->sz <= req_buf_req->sz)
status = true;
- else
+ else {
DDL_MSG_ERROR("ddl_valid_buf_req:Failed");
+ DDL_MSG_ERROR("codec_buf_req: min_cnt=%d, mx_cnt=%d, "
+ "align=%d, sz=%d\n", original_buf_req->min_count,
+ original_buf_req->max_count, original_buf_req->align,
+ original_buf_req->sz);
+ DDL_MSG_ERROR("client_buffs: actual_count=%d, align=%d, "
+ "sz=%d\n", req_buf_req->actual_count,
+ req_buf_req->align, req_buf_req->sz);
+ }
return status;
}
@@ -1946,5 +1982,6 @@
encoder->frame_rate.fps_numerator = DDL_INITIAL_FRAME_RATE;
encoder->frame_rate.fps_denominator = 1;
ddl_set_default_enc_property(ddl);
+ encoder->sps_pps.sps_pps_for_idr_enable_flag = false;
}
}
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_shared_mem.c b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_shared_mem.c
index f8977e9..c46a349 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_shared_mem.c
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_shared_mem.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -85,6 +85,8 @@
#define VIDC_SM_ENC_EXT_CTRL_VBV_BUFFER_SIZE_SHFT 16
#define VIDC_SM_ENC_EXT_CTRL_H263_CPCFC_ENABLE_BMSK 0x80
#define VIDC_SM_ENC_EXT_CTRL_H263_CPCFC_ENABLE_SHFT 7
+#define VIDC_SM_ENC_EXT_CTRL_SPS_PPS_CONTROL_BMSK 0X100
+#define VIDC_SM_ENC_EXT_CTRL_SPS_PPS_CONTROL_SHFT 8
#define VIDC_SM_ENC_EXT_CTRL_SEQ_HDR_CTRL_BMSK 0x8
#define VIDC_SM_ENC_EXT_CTRL_SEQ_HDR_CTRL_SHFT 3
#define VIDC_SM_ENC_EXT_CTRL_FRAME_SKIP_ENABLE_BMSK 0x6
@@ -200,10 +202,21 @@
#define VIDC_SM_CHROMA_ADDR_CHANGE_BMASK 0x00000001
#define VIDC_SM_CHROMA_ADDR_CHANGE_SHFT 0
+#define VIDC_SM_ERROR_CONCEALMENT_CONFIG_ADDR 0x0154
+
+#define VIDC_SM_ERROR_CONCEALMENT_CONFIG_INTER_SLICE_BMSK 0x0c
+#define VIDC_SM_ERROR_CONCEALMENT_CONFIG_INTER_SLICE_SHFT 2
+#define VIDC_SM_ERROR_CONCEALMENT_CONFIG_INTRA_SLICE_BMSK 0X02
+#define VIDC_SM_ERROR_CONCEALMENT_CONFIG_INTRA_SLICE_SHFT 1
+#define VIDC_SM_ERROR_CONCEALMENT_CONFIG_CONCEAL_ENABLE_BMSK 0x01
+#define VIDC_SM_ERROR_CONCEALMENT_CONFIG_CONCEAL_ENABLE_SHFT 0
+
#define VIDC_SM_SEI_ENABLE_ADDR 0x0180
#define VIDC_SM_SEI_ENABLE_RECOVERY_POINT_SEI_BMSK 0x00000001
#define VIDC_SM_SEI_ENABLE_RECOVERY_POINT_SEI_SHFT 0
+#define VIDC_SM_NUM_STUFF_BYTES_CONSUME_ADDR 0X01ac
+
#define VIDC_SM_ENC_EXT_CTRL_CLOSED_GOP_ENABLE_BMSK 0x40
#define VIDC_SM_ENC_EXT_CTRL_CLOSED_GOP_ENABLE_SHFT 6
@@ -352,7 +365,7 @@
*shared_mem, u32 hec_enable,
enum VIDC_SM_frame_skip frame_skip_mode,
u32 seq_hdr_in_band, u32 vbv_buffer_size, u32 cpcfc_enable,
- u32 closed_gop_enable)
+ u32 sps_pps_control, u32 closed_gop_enable)
{
u32 enc_ctrl;
@@ -371,6 +384,9 @@
VIDC_SETFIELD((cpcfc_enable) ? 1 : 0,
VIDC_SM_ENC_EXT_CTRL_H263_CPCFC_ENABLE_SHFT,
VIDC_SM_ENC_EXT_CTRL_H263_CPCFC_ENABLE_BMSK) |
+ VIDC_SETFIELD((sps_pps_control) ? 1 : 0,
+ VIDC_SM_ENC_EXT_CTRL_SPS_PPS_CONTROL_SHFT,
+ VIDC_SM_ENC_EXT_CTRL_SPS_PPS_CONTROL_BMSK) |
VIDC_SETFIELD(closed_gop_enable,
VIDC_SM_ENC_EXT_CTRL_CLOSED_GOP_ENABLE_SHFT,
VIDC_SM_ENC_EXT_CTRL_CLOSED_GOP_ENABLE_BMSK);
@@ -725,3 +741,32 @@
{
*sei_enable = DDL_MEM_READ_32(shared_mem, VIDC_SM_SEI_ENABLE_ADDR);
}
+
+void vidc_sm_set_error_concealment_config(struct ddl_buf_addr *shared_mem,
+ u32 inter_slice, u32 intra_slice, u32 conceal_config_enable)
+{
+ u32 error_conceal_config = 0;
+
+ error_conceal_config = VIDC_SETFIELD(inter_slice,
+ VIDC_SM_ERROR_CONCEALMENT_CONFIG_INTER_SLICE_SHFT,
+ VIDC_SM_ERROR_CONCEALMENT_CONFIG_INTER_SLICE_BMSK);
+
+ error_conceal_config |= VIDC_SETFIELD(intra_slice,
+ VIDC_SM_ERROR_CONCEALMENT_CONFIG_INTRA_SLICE_SHFT,
+ VIDC_SM_ERROR_CONCEALMENT_CONFIG_INTRA_SLICE_BMSK);
+
+ error_conceal_config |= VIDC_SETFIELD(conceal_config_enable,
+ VIDC_SM_ERROR_CONCEALMENT_CONFIG_CONCEAL_ENABLE_SHFT,
+ VIDC_SM_ERROR_CONCEALMENT_CONFIG_CONCEAL_ENABLE_BMSK);
+
+ DDL_MEM_WRITE_32(shared_mem, VIDC_SM_ERROR_CONCEALMENT_CONFIG_ADDR,
+ error_conceal_config);
+}
+
+void vidc_sm_set_decoder_stuff_bytes_consumption(
+ struct ddl_buf_addr *shared_mem,
+ enum vidc_sm_num_stuff_bytes_consume_info consume_info)
+{
+ DDL_MEM_WRITE_32(shared_mem, VIDC_SM_NUM_STUFF_BYTES_CONSUME_ADDR,
+ consume_info);
+}
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_shared_mem.h b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_shared_mem.h
index 78bfee5..798a537 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_shared_mem.h
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_shared_mem.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -73,6 +73,11 @@
VIDC_SM_PROFILE_INFO_MAX = 0x7fffffff
};
+enum vidc_sm_num_stuff_bytes_consume_info {
+ VIDC_SM_NUM_STUFF_BYTES_CONSUME_ALL = 0x0,
+ VIDC_SM_NUM_STUFF_BYTES_CONSUME_NONE = 0xffffffff
+};
+
void vidc_sm_get_extended_decode_status(struct ddl_buf_addr *shared_mem,
u32 *more_field_needed,
u32 *resl_change);
@@ -100,7 +105,8 @@
void vidc_sm_set_extended_encoder_control(
struct ddl_buf_addr *shared_mem, u32 hec_enable,
enum VIDC_SM_frame_skip frame_skip_mode, u32 seq_hdr_in_band,
- u32 vbv_buffer_size, u32 cpcfc_enable, u32 closed_gop_enable);
+ u32 vbv_buffer_size, u32 cpcfc_enable, u32 sps_pps_control,
+ u32 closed_gop_enable);
void vidc_sm_set_encoder_param_change(struct ddl_buf_addr *shared_mem,
u32 bit_rate_chg, u32 frame_rate_chg, u32 i_period_chg);
void vidc_sm_set_encoder_vop_time(struct ddl_buf_addr *shared_mem,
@@ -168,4 +174,9 @@
u32 sei_enable);
void vidc_sm_get_decoder_sei_enable(struct ddl_buf_addr *shared_mem,
u32 *sei_enable);
+void vidc_sm_set_error_concealment_config(struct ddl_buf_addr *shared_mem,
+ u32 inter_slice, u32 intra_slice, u32 conceal_config_enable);
+void vidc_sm_set_decoder_stuff_bytes_consumption(
+ struct ddl_buf_addr *shared_mem,
+ enum vidc_sm_num_stuff_bytes_consume_info consume_info);
#endif
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_utils.h b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_utils.h
index 42a991c..10b3404 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_utils.h
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_utils.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -15,7 +15,7 @@
#define _VCD_DDL_UTILS_H_
#include <linux/delay.h>
-#include "vidc_type.h"
+#include <media/msm/vidc_type.h>
extern u32 vidc_msg_pmem;
extern u32 vidc_msg_timing;
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_vidc.c b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_vidc.c
index ab50258..66e129c 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_vidc.c
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_vidc.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -197,6 +197,13 @@
vidc_1080p_set_decode_mpeg4_pp_filter(decoder->post_filter.post_filter);
vidc_sm_set_concealment_color(&ddl->shared_mem[ddl->command_channel],
DDL_CONCEALMENT_Y_COLOR, DDL_CONCEALMENT_C_COLOR);
+
+ vidc_sm_set_error_concealment_config(
+ &ddl->shared_mem[ddl->command_channel],
+ VIDC_SM_ERR_CONCEALMENT_INTER_SLICE_MB_COPY,
+ VIDC_SM_ERR_CONCEALMENT_INTRA_SLICE_COLOR_CONCEALMENT,
+ VIDC_SM_ERR_CONCEALMENT_ENABLE);
+
ddl_vidc_metadata_enable(ddl);
vidc_sm_set_metadata_start_address(&ddl->shared_mem
[ddl->command_channel],
@@ -256,6 +263,10 @@
VIDC_SM_RECOVERY_POINT_SEI);
ddl_context->vidc_decode_seq_start[ddl->command_channel](
&seq_start_param);
+
+ vidc_sm_set_decoder_stuff_bytes_consumption(
+ &ddl->shared_mem[ddl->command_channel],
+ VIDC_SM_NUM_STUFF_BYTES_CONSUME_NONE);
}
void ddl_vidc_decode_dynamic_property(struct ddl_client_context *ddl,
@@ -541,7 +552,8 @@
vidc_sm_set_extended_encoder_control(&ddl->shared_mem
[ddl->command_channel], hdr_ext_control,
r_cframe_skip, false, 0,
- h263_cpfc_enable, encoder->closed_gop);
+ h263_cpfc_enable, encoder->sps_pps.sps_pps_for_idr_enable_flag,
+ encoder->closed_gop);
vidc_sm_set_encoder_init_rc_value(&ddl->shared_mem
[ddl->command_channel],
encoder->target_bit_rate.target_bitrate);
diff --git a/drivers/video/msm/vidc/1080p/ddl/vidc.h b/drivers/video/msm/vidc/1080p/ddl/vidc.h
index 55db33c..7573ee8 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vidc.h
+++ b/drivers/video/msm/vidc/1080p/ddl/vidc.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -94,7 +94,6 @@
#define VIDC_1080P_ERROR_SLICE_ADDR_INVALID 121
#define VIDC_1080P_ERROR_NON_PAIRED_FIELD_NOT_SUPPORTED 122
#define VIDC_1080P_ERROR_NON_FRAME_DATA_RECEIVED 123
-#define VIDC_1080P_ERROR_INCOMPLETE_FRAME 124
#define VIDC_1080P_ERROR_NO_BUFFER_RELEASED_FROM_HOST 125
#define VIDC_1080P_ERROR_NULL_FW_DEBUG_INFO_POINTER 126
#define VIDC_1080P_ERROR_ALLOC_DEBUG_INFO_SIZE_INSUFFICIENT 127
@@ -126,10 +125,16 @@
#define VIDC_1080P_WARN_BIT_RATE_NOT_SUPPORTED 168
#define VIDC_1080P_WARN_COLOR_DIFF_FORMAT_NOT_SUPPORTED 169
#define VIDC_1080P_WARN_NULL_EXTRA_METADATA_POINTER 170
+#define VIDC_1080P_WARN_DEBLOCKING_NOT_DONE 178
+#define VIDC_1080P_WARN_INCOMPLETE_FRAME 179
#define VIDC_1080P_WARN_METADATA_NO_SPACE_MB_INFO 180
#define VIDC_1080P_WARN_METADATA_NO_SPACE_SLICE_SIZE 181
#define VIDC_1080P_WARN_RESOLUTION_WARNING 182
+#define VIDC_1080P_WARN_NO_LONG_TERM_REFERENCE 183
+#define VIDC_1080P_WARN_NO_SPACE_MPEG2_DATA_DUMP 190
+#define VIDC_1080P_WARN_METADATA_NO_SPACE_MISSING_MB 191
+
#define VIDC_1080P_H264_ENC_TYPE_P 0
#define VIDC_1080P_H264_ENC_TYPE_B 1
#define VIDC_1080P_H264_ENC_TYPE_IDR 2
diff --git a/drivers/video/msm/vidc/1080p/resource_tracker/vcd_res_tracker.c b/drivers/video/msm/vidc/1080p/resource_tracker/vcd_res_tracker.c
index c32ac81..2f26e01 100644
--- a/drivers/video/msm/vidc/1080p/resource_tracker/vcd_res_tracker.c
+++ b/drivers/video/msm/vidc/1080p/resource_tracker/vcd_res_tracker.c
@@ -21,9 +21,9 @@
#include <linux/interrupt.h>
#include <linux/memory_alloc.h>
#include <asm/sizes.h>
+#include <media/msm/vidc_init.h>
#include "vidc.h"
#include "vcd_res_tracker.h"
-#include "vidc_init.h"
static unsigned int vidc_clk_table[3] = {
48000000, 133330000, 200000000
@@ -740,16 +740,26 @@
mutex_unlock(&resource_context.secure_lock);
return rc;
}
+
+void res_trk_secure_unset(void)
+{
+ mutex_lock(&resource_context.secure_lock);
+ resource_context.secure_session = 0;
+ mutex_unlock(&resource_context.secure_lock);
+}
+
+void res_trk_secure_set(void)
+{
+ mutex_lock(&resource_context.secure_lock);
+ resource_context.secure_session = 1;
+ mutex_unlock(&resource_context.secure_lock);
+}
+
int res_trk_open_secure_session()
{
int rc;
mutex_lock(&resource_context.secure_lock);
- if (resource_context.secure_session) {
- pr_err("Secure session already open");
- rc = -EBUSY;
- goto error_open;
- }
- resource_context.secure_session = 1;
+
rc = res_trk_enable_iommu_clocks();
if (rc) {
pr_err("IOMMU clock enabled failed while open");
diff --git a/drivers/video/msm/vidc/1080p/resource_tracker/vcd_res_tracker_api.h b/drivers/video/msm/vidc/1080p/resource_tracker/vcd_res_tracker_api.h
index f91ddb5..9975573 100644
--- a/drivers/video/msm/vidc/1080p/resource_tracker/vcd_res_tracker_api.h
+++ b/drivers/video/msm/vidc/1080p/resource_tracker/vcd_res_tracker_api.h
@@ -40,4 +40,6 @@
int res_trk_check_for_sec_session(void);
int res_trk_open_secure_session(void);
int res_trk_close_secure_session(void);
+void res_trk_secure_set(void);
+void res_trk_secure_unset(void);
#endif
diff --git a/drivers/video/msm/vidc/720p/ddl/vcd_ddl.c b/drivers/video/msm/vidc/720p/ddl/vcd_ddl.c
index 7c68d63..02b2369 100644
--- a/drivers/video/msm/vidc/720p/ddl/vcd_ddl.c
+++ b/drivers/video/msm/vidc/720p/ddl/vcd_ddl.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,7 +11,7 @@
*
*/
-#include "vidc_type.h"
+#include <media/msm/vidc_type.h>
#include "vcd_ddl_utils.h"
#include "vcd_ddl_metadata.h"
#include "vcd_res_tracker_api.h"
diff --git a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_errors.c b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_errors.c
index eb08b7e..ac5bce9 100644
--- a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_errors.c
+++ b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_errors.c
@@ -11,7 +11,7 @@
*
*/
-#include "vidc_type.h"
+#include <media/msm/vidc_type.h>
#include "vcd_ddl_utils.h"
#include "vcd_ddl.h"
diff --git a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_firmware.c b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_firmware.c
index 25aa6bc..965c3aa 100644
--- a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_firmware.c
+++ b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_firmware.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,7 +11,7 @@
*
*/
-#include "vidc_type.h"
+#include <media/msm/vidc_type.h>
#include "vcd_ddl_firmware.h"
#include "vcd_ddl_utils.h"
diff --git a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_firmware.h b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_firmware.h
index 7952dfb..a136de8 100644
--- a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_firmware.h
+++ b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_firmware.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,7 +12,7 @@
*/
#ifndef _VCD_DDL_FIRMWARE_H_
#define _VCD_DDL_FIRMWARE_H_
-#include "vcd_property.h"
+#include <media/msm/vcd_property.h>
#define VCD_FW_BIG_ENDIAN 0x0
#define VCD_FW_LITTLE_ENDIAN 0x1
diff --git a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_hal.c b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_hal.c
index f09bd71..6a69955 100644
--- a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_hal.c
+++ b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_hal.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,7 +11,7 @@
*
*/
-#include "vidc_type.h"
+#include <media/msm/vidc_type.h>
#include "vcd_ddl_utils.h"
#include "vcd_ddl_metadata.h"
diff --git a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_helper.c b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_helper.c
index 2ec8419..15adf21 100644
--- a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_helper.c
+++ b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_helper.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,7 +11,7 @@
*
*/
-#include "vidc_type.h"
+#include <media/msm/vidc_type.h>
#include "vcd_ddl_utils.h"
DDL_INLINE struct ddl_context *ddl_get_context(void)
diff --git a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_internal_property.h b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_internal_property.h
index 00c00cd..9dc495b 100644
--- a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_internal_property.h
+++ b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_internal_property.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,7 +12,7 @@
*/
#ifndef _VCD_DDL_INTERNAL_PROPERTY_H_
#define _VCD_DDL_INTERNAL_PROPERTY_H_
-#include "vcd_api.h"
+#include <media/msm/vcd_api.h>
#define VCD_EVT_RESP_DDL_BASE 0x3000
#define VCD_EVT_RESP_DEVICE_INIT (VCD_EVT_RESP_DDL_BASE + 0x1)
diff --git a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_interrupt_handler.c b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_interrupt_handler.c
index ece4c30..fe71dc1 100644
--- a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_interrupt_handler.c
+++ b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_interrupt_handler.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,7 +11,7 @@
*
*/
-#include "vidc_type.h"
+#include <media/msm/vidc_type.h>
#include "vidc.h"
#include "vcd_ddl_utils.h"
#include "vcd_ddl_metadata.h"
diff --git a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_metadata.c b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_metadata.c
index 376ea6d..2a74da8 100644
--- a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_metadata.c
+++ b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_metadata.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,7 +11,7 @@
*
*/
-#include "vidc_type.h"
+#include <media/msm/vidc_type.h>
#include "vcd_ddl_utils.h"
#include "vcd_ddl_metadata.h"
diff --git a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_properties.c b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_properties.c
index 6d3c666..3aebdaf 100644
--- a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_properties.c
+++ b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_properties.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,7 +11,7 @@
*
*/
-#include "vidc_type.h"
+#include <media/msm/vidc_type.h>
#include "vcd_ddl_utils.h"
#include "vcd_ddl_metadata.h"
diff --git a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_utils.c b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_utils.c
index c8ea83f..17dedb8 100644
--- a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_utils.c
+++ b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_utils.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,7 +11,7 @@
*
*/
#include <linux/memory_alloc.h>
-#include "vidc_type.h"
+#include <media/msm/vidc_type.h>
#include "vcd_ddl_utils.h"
#if DEBUG
diff --git a/drivers/video/msm/vidc/720p/ddl/vidc.c b/drivers/video/msm/vidc/720p/ddl/vidc.c
index 0f5932a..de6cbbb 100644
--- a/drivers/video/msm/vidc/720p/ddl/vidc.c
+++ b/drivers/video/msm/vidc/720p/ddl/vidc.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,8 +12,8 @@
*/
#include <linux/unistd.h>
+#include <media/msm/vidc_type.h>
#include "vidc.h"
-#include "vidc_type.h"
#if DEBUG
#define DBG(x...) printk(KERN_DEBUG x)
diff --git a/drivers/video/msm/vidc/720p/resource_tracker/vcd_res_tracker.c b/drivers/video/msm/vidc/720p/resource_tracker/vcd_res_tracker.c
index 522ff16..bd0d94e 100644
--- a/drivers/video/msm/vidc/720p/resource_tracker/vcd_res_tracker.c
+++ b/drivers/video/msm/vidc/720p/resource_tracker/vcd_res_tracker.c
@@ -16,9 +16,9 @@
#include <linux/regulator/consumer.h>
#include <mach/clk.h>
#include <linux/interrupt.h>
-#include "vidc_type.h"
+#include <media/msm/vidc_init.h>
+#include <media/msm/vidc_type.h>
#include "vcd_res_tracker.h"
-#include "vidc_init.h"
#define MSM_AXI_QOS_NAME "msm_vidc_reg"
#define AXI_CLK_SCALING
@@ -734,6 +734,16 @@
return 0;
}
+void res_trk_secure_unset(void)
+{
+ return;
+}
+
+void res_trk_secure_set(void)
+{
+ return;
+}
+
int res_trk_open_secure_session()
{
return -EINVAL;
diff --git a/drivers/video/msm/vidc/720p/resource_tracker/vcd_res_tracker_api.h b/drivers/video/msm/vidc/720p/resource_tracker/vcd_res_tracker_api.h
index 237d143..898195a 100644
--- a/drivers/video/msm/vidc/720p/resource_tracker/vcd_res_tracker_api.h
+++ b/drivers/video/msm/vidc/720p/resource_tracker/vcd_res_tracker_api.h
@@ -35,4 +35,6 @@
int res_trk_check_for_sec_session(void);
int res_trk_open_secure_session(void);
int res_trk_close_secure_session(void);
+void res_trk_secure_set(void);
+void res_trk_secure_unset(void);
#endif
diff --git a/drivers/video/msm/vidc/common/dec/vdec.c b/drivers/video/msm/vidc/common/dec/vdec.c
index dee4da7..cffb0a9 100644
--- a/drivers/video/msm/vidc/common/dec/vdec.c
+++ b/drivers/video/msm/vidc/common/dec/vdec.c
@@ -29,11 +29,11 @@
#include <linux/clk.h>
#include <linux/timer.h>
#include <mach/msm_subsystem_map.h>
+#include <media/msm/vidc_type.h>
+#include <media/msm/vcd_api.h>
+#include <media/msm/vidc_init.h>
#include "vcd_res_tracker_api.h"
-#include "vidc_type.h"
-#include "vcd_api.h"
#include "vdec_internal.h"
-#include "vidc_init.h"
@@ -2024,8 +2024,8 @@
}
client_index = vid_dec_get_empty_client_index();
- if (client_index == -1) {
- ERR("%s() : No free clients client_index == -1\n", __func__);
+ if (client_index < 0) {
+ ERR("%s() : No free clients client_index < 0\n", __func__);
goto client_failure;
}
client_ctx = &vid_dec_device_p->vdec_clients[client_index];
@@ -2073,19 +2073,24 @@
mutex_unlock(&vid_dec_device_p->lock);
return -ENODEV;
}
- if (res_trk_open_secure_session()) {
- ERR("Secure session operation failure\n");
- mutex_unlock(&vid_dec_device_p->lock);
- return -ENODEV;
- }
+ res_trk_secure_set();
file->private_data = vid_dec_open_client();
if (!file->private_data) {
- res_trk_close_secure_session();
- mutex_unlock(&vid_dec_device_p->lock);
- return -ENODEV;
+ goto error;
+ }
+
+ if (res_trk_open_secure_session()) {
+ ERR("Secure session operation failure\n");
+ goto error;
}
mutex_unlock(&vid_dec_device_p->lock);
return 0;
+
+error:
+ res_trk_secure_unset();
+ mutex_unlock(&vid_dec_device_p->lock);
+ return -ENODEV;
+
}
static int vid_dec_open(struct inode *inode, struct file *file)
@@ -2113,8 +2118,8 @@
INFO("msm_vidc_dec: Inside %s()", __func__);
vidc_cleanup_addr_table(client_ctx, BUFFER_TYPE_OUTPUT);
vidc_cleanup_addr_table(client_ctx, BUFFER_TYPE_INPUT);
- vid_dec_close_client(client_ctx);
res_trk_close_secure_session();
+ vid_dec_close_client(client_ctx);
vidc_release_firmware();
#ifndef USE_RES_TRACKER
vidc_disable_clk();
diff --git a/drivers/video/msm/vidc/common/dec/vdec_internal.h b/drivers/video/msm/vidc/common/dec/vdec_internal.h
index f310e25..89da9a2 100644
--- a/drivers/video/msm/vidc/common/dec/vdec_internal.h
+++ b/drivers/video/msm/vidc/common/dec/vdec_internal.h
@@ -16,7 +16,7 @@
#include <linux/msm_vidc_dec.h>
#include <linux/cdev.h>
-#include "vidc_init.h"
+#include <media/msm/vidc_init.h>
#define NUM_OF_DRIVER_NODES 2
diff --git a/drivers/video/msm/vidc/common/enc/venc.c b/drivers/video/msm/vidc/common/enc/venc.c
index cc6606c..3c25751 100644
--- a/drivers/video/msm/vidc/common/enc/venc.c
+++ b/drivers/video/msm/vidc/common/enc/venc.c
@@ -27,11 +27,11 @@
#include <linux/workqueue.h>
#include <linux/android_pmem.h>
#include <linux/clk.h>
+#include <media/msm/vidc_type.h>
+#include <media/msm/vcd_api.h>
+#include <media/msm/vidc_init.h>
-#include "vidc_type.h"
-#include "vcd_api.h"
#include "venc_internal.h"
-#include "vidc_init.h"
#include "vcd_res_tracker_api.h"
#define VID_ENC_NAME "msm_vidc_enc"
@@ -1575,6 +1575,34 @@
}
break;
}
+ case VEN_IOCTL_SET_EXTRADATA:
+ case VEN_IOCTL_GET_EXTRADATA:
+ {
+ u32 extradata_flag;
+ DBG("VEN_IOCTL_(G)SET_EXTRADATA\n");
+ if (copy_from_user(&venc_msg, arg, sizeof(venc_msg)))
+ return -EFAULT;
+ if (cmd == VEN_IOCTL_SET_EXTRADATA) {
+ if (copy_from_user(&extradata_flag, venc_msg.in,
+ sizeof(u32)))
+ return -EFAULT;
+ result = vid_enc_set_get_extradata(client_ctx,
+ &extradata_flag, true);
+ } else {
+ result = vid_enc_set_get_extradata(client_ctx,
+ &extradata_flag, false);
+ if (result) {
+ if (copy_to_user(venc_msg.out, &extradata_flag,
+ sizeof(u32)))
+ return -EFAULT;
+ }
+ }
+ if (!result) {
+ ERR("setting VEN_IOCTL_(G)SET_LIVE_MODE failed\n");
+ return -EIO;
+ }
+ break;
+ }
case VEN_IOCTL_SET_AC_PREDICTION:
case VEN_IOCTL_GET_AC_PREDICTION:
case VEN_IOCTL_SET_RVLC:
diff --git a/drivers/video/msm/vidc/common/enc/venc_internal.c b/drivers/video/msm/vidc/common/enc/venc_internal.c
index e3bb9db..cac5dc4 100644
--- a/drivers/video/msm/vidc/common/enc/venc_internal.c
+++ b/drivers/video/msm/vidc/common/enc/venc_internal.c
@@ -28,10 +28,10 @@
#include <linux/android_pmem.h>
#include <linux/clk.h>
#include <mach/msm_subsystem_map.h>
-#include "vidc_type.h"
-#include "vcd_api.h"
+#include <media/msm/vidc_type.h>
+#include <media/msm/vcd_api.h>
+#include <media/msm/vidc_init.h>
#include "venc_internal.h"
-#include "vidc_init.h"
#if DEBUG
#define DBG(x...) printk(KERN_DEBUG x)
@@ -316,6 +316,42 @@
return true;
}
+u32 vid_enc_set_get_extradata(struct video_client_ctx *client_ctx,
+ u32 *extradata_flag, u32 set_flag)
+{
+ struct vcd_property_hdr vcd_property_hdr;
+ struct vcd_property_meta_data_enable vcd_meta_data;
+ u32 vcd_status = VCD_ERR_FAIL;
+ if (!client_ctx || !extradata_flag)
+ return false;
+ vcd_property_hdr.prop_id = VCD_I_METADATA_ENABLE;
+ vcd_property_hdr.sz = sizeof(struct vcd_property_meta_data_enable);
+ if (set_flag) {
+ DBG("vcd_set_property: VCD_I_METADATA_ENABLE = %d\n",
+ *extradata_flag);
+ vcd_meta_data.meta_data_enable_flag = *extradata_flag;
+ vcd_status = vcd_set_property(client_ctx->vcd_handle,
+ &vcd_property_hdr, &vcd_meta_data);
+ if (vcd_status) {
+ ERR("%s(): Set VCD_I_METADATA_ENABLE Failed\n",
+ __func__);
+ return false;
+ }
+ } else {
+ vcd_status = vcd_get_property(client_ctx->vcd_handle,
+ &vcd_property_hdr, &vcd_meta_data);
+ if (vcd_status) {
+ ERR("%s(): Get VCD_I_METADATA_ENABLE Failed\n",
+ __func__);
+ return false;
+ }
+ *extradata_flag = vcd_meta_data.meta_data_enable_flag;
+ DBG("vcd_get_property: VCD_I_METADATA_ENABLE = %d\n",
+ *extradata_flag);
+ }
+ return true;
+}
+
u32 vid_enc_set_get_framerate(struct video_client_ctx *client_ctx,
struct venc_framerate *frame_rate, u32 set_flag)
{
@@ -1494,6 +1530,11 @@
venc_buf_req->alignment = buffer_req.align;
venc_buf_req->bufpoolid = buffer_req.buf_pool_id;
venc_buf_req->suffixsize = 0;
+ DBG("%s: actual_count=%d, align=%d, sz=%d, min_count=%d, "
+ "max_count=%d, buf_pool_id=%d\n", __func__,
+ buffer_req.actual_count, buffer_req.align,
+ buffer_req.sz, buffer_req.min_count,
+ buffer_req.max_count, buffer_req.buf_pool_id);
}
return status;
}
@@ -1521,6 +1562,11 @@
buffer_req.align = venc_buf_req->alignment;
buffer_req.buf_pool_id = 0;
+ DBG("%s: actual_count=%d, align=%d, sz=%d, min_count=%d, "
+ "max_count=%d, buf_pool_id=%d\n", __func__,
+ buffer_req.actual_count, buffer_req.align, buffer_req.sz,
+ buffer_req.min_count, buffer_req.max_count,
+ buffer_req.buf_pool_id);
vcd_status = vcd_set_buffer_requirements(client_ctx->vcd_handle,
buffer, &buffer_req);
diff --git a/drivers/video/msm/vidc/common/enc/venc_internal.h b/drivers/video/msm/vidc/common/enc/venc_internal.h
index 2b5a532..8a07fdb 100644
--- a/drivers/video/msm/vidc/common/enc/venc_internal.h
+++ b/drivers/video/msm/vidc/common/enc/venc_internal.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -16,8 +16,7 @@
#include <linux/msm_vidc_enc.h>
#include <linux/cdev.h>
-
-#include "vidc_init.h"
+#include <media/msm/vidc_init.h>
#define VID_ENC_MAX_NUM_OF_BUFF 100
@@ -69,6 +68,9 @@
u32 vid_enc_set_get_live_mode(struct video_client_ctx *client_ctx,
struct venc_switch *encoder_switch, u32 set_flag);
+u32 vid_enc_set_get_extradata(struct video_client_ctx *client_ctx,
+ u32 *extradata_flag, u32 set_flag);
+
u32 vid_enc_set_get_short_header(struct video_client_ctx *client_ctx,
struct venc_switch *encoder_switch, u32 set_flag);
diff --git a/drivers/video/msm/vidc/common/init/vidc_init.c b/drivers/video/msm/vidc/common/init/vidc_init.c
index f799a6c..0ea64d4 100644
--- a/drivers/video/msm/vidc/common/init/vidc_init.c
+++ b/drivers/video/msm/vidc/common/init/vidc_init.c
@@ -31,9 +31,9 @@
#include <mach/clk.h>
#include <linux/pm_runtime.h>
#include <mach/msm_subsystem_map.h>
-#include "vcd_api.h"
+#include <media/msm/vcd_api.h>
+#include <media/msm/vidc_init.h>
#include "vidc_init_internal.h"
-#include "vidc_init.h"
#include "vcd_res_tracker_api.h"
#if DEBUG
diff --git a/drivers/video/msm/vidc/common/init/vidc_init.h b/drivers/video/msm/vidc/common/init/vidc_init.h
deleted file mode 100644
index a67329c..0000000
--- a/drivers/video/msm/vidc/common/init/vidc_init.h
+++ /dev/null
@@ -1,93 +0,0 @@
-/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef VIDC_INIT_H
-#define VIDC_INIT_H
-#include <linux/ion.h>
-#include "vidc_type.h"
-
-#define VIDC_MAX_NUM_CLIENTS 4
-#define MAX_VIDEO_NUM_OF_BUFF 100
-
-enum buffer_dir {
- BUFFER_TYPE_INPUT,
- BUFFER_TYPE_OUTPUT
-};
-
-struct buf_addr_table {
- unsigned long user_vaddr;
- unsigned long kernel_vaddr;
- unsigned long phy_addr;
- unsigned long buff_ion_flag;
- struct ion_handle *buff_ion_handle;
- int pmem_fd;
- struct file *file;
- unsigned long dev_addr;
- void *client_data;
-};
-
-struct video_client_ctx {
- void *vcd_handle;
- u32 num_of_input_buffers;
- u32 num_of_output_buffers;
- struct buf_addr_table input_buf_addr_table[MAX_VIDEO_NUM_OF_BUFF];
- struct buf_addr_table output_buf_addr_table[MAX_VIDEO_NUM_OF_BUFF];
- struct list_head msg_queue;
- struct mutex msg_queue_lock;
- struct mutex enrty_queue_lock;
- wait_queue_head_t msg_wait;
- struct completion event;
- struct vcd_property_h264_mv_buffer vcd_h264_mv_buffer;
- struct vcd_property_enc_recon_buffer recon_buffer[4];
- u32 event_status;
- u32 seq_header_set;
- u32 stop_msg;
- u32 stop_called;
- u32 stop_sync_cb;
- struct ion_client *user_ion_client;
- struct ion_handle *seq_hdr_ion_handle;
- struct ion_handle *h264_mv_ion_handle;
- struct ion_handle *recon_buffer_ion_handle[4];
- u32 dmx_disable;
-};
-
-void __iomem *vidc_get_ioaddr(void);
-int vidc_load_firmware(void);
-void vidc_release_firmware(void);
-u32 vidc_get_fd_info(struct video_client_ctx *client_ctx,
- enum buffer_dir buffer, int pmem_fd,
- unsigned long kvaddr, int index);
-u32 vidc_lookup_addr_table(struct video_client_ctx *client_ctx,
- enum buffer_dir buffer, u32 search_with_user_vaddr,
- unsigned long *user_vaddr, unsigned long *kernel_vaddr,
- unsigned long *phy_addr, int *pmem_fd, struct file **file,
- s32 *buffer_index);
-u32 vidc_insert_addr_table(struct video_client_ctx *client_ctx,
- enum buffer_dir buffer, unsigned long user_vaddr,
- unsigned long *kernel_vaddr, int pmem_fd,
- unsigned long buffer_addr_offset,
- unsigned int max_num_buffers, unsigned long length);
-u32 vidc_delete_addr_table(struct video_client_ctx *client_ctx,
- enum buffer_dir buffer, unsigned long user_vaddr,
- unsigned long *kernel_vaddr);
-void vidc_cleanup_addr_table(struct video_client_ctx *client_ctx,
- enum buffer_dir buffer);
-
-u32 vidc_timer_create(void (*timer_handler)(void *),
- void *user_data, void **timer_handle);
-void vidc_timer_release(void *timer_handle);
-void vidc_timer_start(void *timer_handle, u32 time_out);
-void vidc_timer_stop(void *timer_handle);
-
-
-#endif
diff --git a/drivers/video/msm/vidc/common/vcd/vcd.h b/drivers/video/msm/vidc/common/vcd/vcd.h
index b557752..9fc76d8 100644
--- a/drivers/video/msm/vidc/common/vcd/vcd.h
+++ b/drivers/video/msm/vidc/common/vcd/vcd.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -13,10 +13,10 @@
#ifndef _VCD_H_
#define _VCD_H_
-#include "vcd_api.h"
+#include <media/msm/vcd_api.h>
+#include "vcd_util.h"
#include "vcd_ddl_api.h"
#include "vcd_res_tracker_api.h"
-#include "vcd_util.h"
#include "vcd_client_sm.h"
#include "vcd_core.h"
#include "vcd_device_sm.h"
diff --git a/drivers/video/msm/vidc/common/vcd/vcd_api.c b/drivers/video/msm/vidc/common/vcd/vcd_api.c
index 5e9fd55..e0ef3af 100644
--- a/drivers/video/msm/vidc/common/vcd/vcd_api.c
+++ b/drivers/video/msm/vidc/common/vcd/vcd_api.c
@@ -11,7 +11,7 @@
*
*/
-#include "vidc_type.h"
+#include <media/msm/vidc_type.h>
#include "vcd.h"
u32 vcd_init(struct vcd_init_config *config, s32 *driver_handle)
diff --git a/drivers/video/msm/vidc/common/vcd/vcd_api.h b/drivers/video/msm/vidc/common/vcd/vcd_api.h
deleted file mode 100644
index 9580ece..0000000
--- a/drivers/video/msm/vidc/common/vcd/vcd_api.h
+++ /dev/null
@@ -1,147 +0,0 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-#ifndef _VCD_API_H_
-#define _VCD_API_H_
-#include "vcd_property.h"
-#include "vcd_status.h"
-
-#define VCD_FRAME_FLAG_EOS 0x00000001
-#define VCD_FRAME_FLAG_DECODEONLY 0x00000004
-#define VCD_FRAME_FLAG_DATACORRUPT 0x00000008
-#define VCD_FRAME_FLAG_ENDOFFRAME 0x00000010
-#define VCD_FRAME_FLAG_SYNCFRAME 0x00000020
-#define VCD_FRAME_FLAG_EXTRADATA 0x00000040
-#define VCD_FRAME_FLAG_CODECCONFIG 0x00000080
-#define VCD_FRAME_FLAG_BFRAME 0x00100000
-#define VCD_FRAME_FLAG_EOSEQ 0x00200000
-
-#define VCD_FLUSH_INPUT 0x0001
-#define VCD_FLUSH_OUTPUT 0x0002
-#define VCD_FLUSH_ALL 0x0003
-
-#define VCD_FRAMETAG_INVALID 0xffffffff
-
-struct vcd_handle_container {
- void *handle;
-};
-struct vcd_flush_cmd {
- u32 mode;
-};
-
-enum vcd_frame {
- VCD_FRAME_YUV = 1,
- VCD_FRAME_I,
- VCD_FRAME_P,
- VCD_FRAME_B,
- VCD_FRAME_NOTCODED,
- VCD_FRAME_IDR,
- VCD_FRAME_32BIT = 0x7fffffff
-};
-
-enum vcd_power_state {
- VCD_PWR_STATE_ON = 1,
- VCD_PWR_STATE_SLEEP,
-};
-
-struct vcd_frame_data {
- u8 *virtual;
- u8 *physical;
- u32 ion_flag;
- u32 alloc_len;
- u32 data_len;
- u32 offset;
- s64 time_stamp;
- u32 flags;
- u32 frm_clnt_data;
- struct vcd_property_dec_output_buffer dec_op_prop;
- u32 interlaced;
- enum vcd_frame frame;
- u32 ip_frm_tag;
- u32 intrlcd_ip_frm_tag;
- u8 *desc_buf;
- u32 desc_size;
-};
-
-struct vcd_sequence_hdr {
- u8 *sequence_header;
- u32 sequence_header_len;
-
-};
-
-enum vcd_buffer_type {
- VCD_BUFFER_INPUT = 0x1,
- VCD_BUFFER_OUTPUT = 0x2,
- VCD_BUFFER_INVALID = 0x3,
- VCD_BUFFER_32BIT = 0x7FFFFFFF
-};
-
-struct vcd_buffer_requirement {
- u32 min_count;
- u32 actual_count;
- u32 max_count;
- size_t sz;
- u32 align;
- u32 buf_pool_id;
-};
-
-struct vcd_init_config {
- void *device_name;
- void *(*map_dev_base_addr) (void *device_name);
- void (*un_map_dev_base_addr) (void);
- void (*interrupt_clr) (void);
- void (*register_isr) (void *device_name);
- void (*deregister_isr) (void);
- u32 (*timer_create) (void (*timer_handler)(void *),
- void *user_data, void **timer_handle);
- void (*timer_release) (void *timer_handle);
- void (*timer_start) (void *timer_handle, u32 time_out);
- void (*timer_stop) (void *timer_handle);
-};
-
-u32 vcd_init(struct vcd_init_config *config, s32 *driver_handle);
-u32 vcd_term(s32 driver_handle);
-u32 vcd_open(s32 driver_handle, u32 decoding,
- void (*callback) (u32 event, u32 status, void *info, size_t sz,
- void *handle, void *const client_data), void *client_data);
-u32 vcd_close(void *handle);
-u32 vcd_encode_start(void *handle);
-u32 vcd_encode_frame(void *handle, struct vcd_frame_data *input_frame);
-u32 vcd_decode_start(void *handle, struct vcd_sequence_hdr *seq_hdr);
-u32 vcd_decode_frame(void *handle, struct vcd_frame_data *input_frame);
-u32 vcd_pause(void *handle);
-u32 vcd_resume(void *handle);
-u32 vcd_flush(void *handle, u32 mode);
-u32 vcd_stop(void *handle);
-u32 vcd_set_property(void *handle, struct vcd_property_hdr *prop_hdr,
- void *prop_val);
-u32 vcd_get_property(void *handle, struct vcd_property_hdr *prop_hdr,
- void *prop_val);
-u32 vcd_set_buffer_requirements(void *handle, enum vcd_buffer_type buffer,
- struct vcd_buffer_requirement *buffer_req);
-u32 vcd_get_buffer_requirements(void *handle, enum vcd_buffer_type buffer,
- struct vcd_buffer_requirement *buffer_req);
-u32 vcd_set_buffer(void *handle, enum vcd_buffer_type buffer_type,
- u8 *buffer, u32 buf_size);
-u32 vcd_allocate_buffer(void *handle, enum vcd_buffer_type buffer,
- u32 buf_size, u8 **vir_buf_addr, u8 **phy_buf_addr);
-
-u32 vcd_free_buffer(void *handle, enum vcd_buffer_type buffer_type, u8 *buffer);
-u32 vcd_fill_output_buffer(void *handle, struct vcd_frame_data *buffer);
-u32 vcd_set_device_power(s32 driver_handle,
- enum vcd_power_state pwr_state);
-void vcd_read_and_clear_interrupt(void);
-void vcd_response_handler(void);
-u8 vcd_get_num_of_clients(void);
-u32 vcd_get_ion_status(void);
-struct ion_client *vcd_get_ion_client(void);
-#endif
diff --git a/drivers/video/msm/vidc/common/vcd/vcd_client_sm.c b/drivers/video/msm/vidc/common/vcd/vcd_client_sm.c
index e00e85f..9376900 100644
--- a/drivers/video/msm/vidc/common/vcd/vcd_client_sm.c
+++ b/drivers/video/msm/vidc/common/vcd/vcd_client_sm.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,7 +11,7 @@
*
*/
-#include "vidc_type.h"
+#include <media/msm/vidc_type.h>
#include "vcd.h"
static const struct vcd_clnt_state_table *vcd_clnt_state_table[];
diff --git a/drivers/video/msm/vidc/common/vcd/vcd_client_sm.h b/drivers/video/msm/vidc/common/vcd/vcd_client_sm.h
index e9ab41c..9f2d63d 100644
--- a/drivers/video/msm/vidc/common/vcd/vcd_client_sm.h
+++ b/drivers/video/msm/vidc/common/vcd/vcd_client_sm.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,7 +12,7 @@
*/
#ifndef _VCD_CLIENT_SM_H_
#define _VCD_CLIENT_SM_H_
-#include "vcd_api.h"
+#include <media/msm/vcd_api.h>
#include "vcd_ddl_api.h"
struct vcd_clnt_state_table;
diff --git a/drivers/video/msm/vidc/common/vcd/vcd_core.h b/drivers/video/msm/vidc/common/vcd/vcd_core.h
index 64dec2d..1f844e8 100644
--- a/drivers/video/msm/vidc/common/vcd/vcd_core.h
+++ b/drivers/video/msm/vidc/common/vcd/vcd_core.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -14,7 +14,7 @@
#define _VCD_CORE_H_
#include <linux/ion.h>
-#include "vcd_api.h"
+#include <media/msm/vcd_api.h>
#include "vcd_ddl_api.h"
#include "vcd_util.h"
diff --git a/drivers/video/msm/vidc/common/vcd/vcd_device_sm.c b/drivers/video/msm/vidc/common/vcd/vcd_device_sm.c
index 4c477cb..9576387 100644
--- a/drivers/video/msm/vidc/common/vcd/vcd_device_sm.c
+++ b/drivers/video/msm/vidc/common/vcd/vcd_device_sm.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,7 +11,7 @@
*
*/
-#include "vidc_type.h"
+#include <media/msm/vidc_type.h>
#include "vcd.h"
static const struct vcd_dev_state_table *vcd_dev_state_table[];
diff --git a/drivers/video/msm/vidc/common/vcd/vcd_device_sm.h b/drivers/video/msm/vidc/common/vcd/vcd_device_sm.h
index 8245966..2443c33 100644
--- a/drivers/video/msm/vidc/common/vcd/vcd_device_sm.h
+++ b/drivers/video/msm/vidc/common/vcd/vcd_device_sm.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -13,7 +13,7 @@
#ifndef _VCD_DEVICE_SM_H_
#define _VCD_DEVICE_SM_H_
-#include "vcd_api.h"
+#include <media/msm/vcd_api.h>
#include "vcd_ddl_api.h"
#include "vcd_core.h"
diff --git a/drivers/video/msm/vidc/common/vcd/vcd_power_sm.c b/drivers/video/msm/vidc/common/vcd/vcd_power_sm.c
index 6a1cc80..01bd931 100644
--- a/drivers/video/msm/vidc/common/vcd/vcd_power_sm.c
+++ b/drivers/video/msm/vidc/common/vcd/vcd_power_sm.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,7 +11,7 @@
*
*/
-#include "vidc_type.h"
+#include <media/msm/vidc_type.h>
#include "vcd_power_sm.h"
#include "vcd_core.h"
#include "vcd.h"
diff --git a/drivers/video/msm/vidc/common/vcd/vcd_property.h b/drivers/video/msm/vidc/common/vcd/vcd_property.h
deleted file mode 100644
index a3069e3..0000000
--- a/drivers/video/msm/vidc/common/vcd/vcd_property.h
+++ /dev/null
@@ -1,350 +0,0 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-#ifndef _VCD_DRIVER_PROPERTY_H_
-#define _VCD_DRIVER_PROPERTY_H_
-
-#define VCD_START_BASE 0x0
-#define VCD_I_LIVE (VCD_START_BASE + 0x1)
-#define VCD_I_CODEC (VCD_START_BASE + 0x2)
-#define VCD_I_FRAME_SIZE (VCD_START_BASE + 0x3)
-#define VCD_I_METADATA_ENABLE (VCD_START_BASE + 0x4)
-#define VCD_I_METADATA_HEADER (VCD_START_BASE + 0x5)
-#define VCD_I_PROFILE (VCD_START_BASE + 0x6)
-#define VCD_I_LEVEL (VCD_START_BASE + 0x7)
-#define VCD_I_BUFFER_FORMAT (VCD_START_BASE + 0x8)
-#define VCD_I_FRAME_RATE (VCD_START_BASE + 0x9)
-#define VCD_I_TARGET_BITRATE (VCD_START_BASE + 0xA)
-#define VCD_I_MULTI_SLICE (VCD_START_BASE + 0xB)
-#define VCD_I_ENTROPY_CTRL (VCD_START_BASE + 0xC)
-#define VCD_I_DEBLOCKING (VCD_START_BASE + 0xD)
-#define VCD_I_RATE_CONTROL (VCD_START_BASE + 0xE)
-#define VCD_I_QP_RANGE (VCD_START_BASE + 0xF)
-#define VCD_I_SESSION_QP (VCD_START_BASE + 0x10)
-#define VCD_I_INTRA_PERIOD (VCD_START_BASE + 0x11)
-#define VCD_I_VOP_TIMING (VCD_START_BASE + 0x12)
-#define VCD_I_SHORT_HEADER (VCD_START_BASE + 0x13)
-#define VCD_I_SEQ_HEADER (VCD_START_BASE + 0x14)
-#define VCD_I_HEADER_EXTENSION (VCD_START_BASE + 0x15)
-#define VCD_I_INTRA_REFRESH (VCD_START_BASE + 0x16)
-#define VCD_I_POST_FILTER (VCD_START_BASE + 0x17)
-#define VCD_I_PROGRESSIVE_ONLY (VCD_START_BASE + 0x18)
-#define VCD_I_OUTPUT_ORDER (VCD_START_BASE + 0x19)
-#define VCD_I_RECON_BUFFERS (VCD_START_BASE + 0x1A)
-#define VCD_I_FREE_RECON_BUFFERS (VCD_START_BASE + 0x1B)
-#define VCD_I_GET_RECON_BUFFER_SIZE (VCD_START_BASE + 0x1C)
-#define VCD_I_H264_MV_BUFFER (VCD_START_BASE + 0x1D)
-#define VCD_I_FREE_H264_MV_BUFFER (VCD_START_BASE + 0x1E)
-#define VCD_I_GET_H264_MV_SIZE (VCD_START_BASE + 0x1F)
-#define VCD_I_DEC_PICTYPE (VCD_START_BASE + 0x20)
-#define VCD_I_CONT_ON_RECONFIG (VCD_START_BASE + 0x21)
-#define VCD_I_META_BUFFER_MODE (VCD_START_BASE + 0x22)
-#define VCD_I_DISABLE_DMX (VCD_START_BASE + 0x23)
-#define VCD_I_DISABLE_DMX_SUPPORT (VCD_START_BASE + 0x24)
-
-#define VCD_START_REQ (VCD_START_BASE + 0x1000)
-#define VCD_I_REQ_IFRAME (VCD_START_REQ + 0x1)
-
-#define VCD_I_RESERVED_BASE (VCD_START_BASE + 0x10000)
-
-struct vcd_property_hdr {
- u32 prop_id;
- size_t sz;
-};
-
-struct vcd_property_live {
- u32 live;
-};
-
-enum vcd_codec {
- VCD_CODEC_H264 = 0x1,
- VCD_CODEC_H263 = 0x2,
- VCD_CODEC_MPEG1 = 0x3,
- VCD_CODEC_MPEG2 = 0x4,
- VCD_CODEC_MPEG4 = 0x5,
- VCD_CODEC_DIVX_3 = 0x6,
- VCD_CODEC_DIVX_4 = 0x7,
- VCD_CODEC_DIVX_5 = 0x8,
- VCD_CODEC_DIVX_6 = 0x9,
- VCD_CODEC_XVID = 0xA,
- VCD_CODEC_VC1 = 0xB,
- VCD_CODEC_VC1_RCV = 0xC
-};
-
-struct vcd_property_codec {
- enum vcd_codec codec;
-};
-
-struct vcd_property_frame_size {
- u32 width;
- u32 height;
- u32 stride;
- u32 scan_lines;
-};
-
-
-#define VCD_METADATA_DATANONE 0x001
-#define VCD_METADATA_QCOMFILLER 0x002
-#define VCD_METADATA_QPARRAY 0x004
-#define VCD_METADATA_CONCEALMB 0x008
-#define VCD_METADATA_SEI 0x010
-#define VCD_METADATA_VUI 0x020
-#define VCD_METADATA_VC1 0x040
-#define VCD_METADATA_PASSTHROUGH 0x080
-#define VCD_METADATA_ENC_SLICE 0x100
-
-struct vcd_property_meta_data_enable {
- u32 meta_data_enable_flag;
-};
-
-struct vcd_property_metadata_hdr {
- u32 meta_data_id;
- u32 version;
- u32 port_index;
- u32 type;
-};
-
-struct vcd_property_frame_rate {
- u32 fps_denominator;
- u32 fps_numerator;
-};
-
-struct vcd_property_target_bitrate {
- u32 target_bitrate;
-};
-
-enum vcd_yuv_buffer_format {
- VCD_BUFFER_FORMAT_NV12 = 0x1,
- VCD_BUFFER_FORMAT_TILE_4x2 = 0x2,
- VCD_BUFFER_FORMAT_NV12_16M2KA = 0x3,
- VCD_BUFFER_FORMAT_TILE_1x1 = 0x4
-};
-
-struct vcd_property_buffer_format {
- enum vcd_yuv_buffer_format buffer_format;
-};
-
-struct vcd_property_post_filter {
- u32 post_filter;
-};
-
-enum vcd_codec_profile {
- VCD_PROFILE_UNKNOWN = 0x0,
- VCD_PROFILE_MPEG4_SP = 0x1,
- VCD_PROFILE_MPEG4_ASP = 0x2,
- VCD_PROFILE_H264_BASELINE = 0x3,
- VCD_PROFILE_H264_MAIN = 0x4,
- VCD_PROFILE_H264_HIGH = 0x5,
- VCD_PROFILE_H263_BASELINE = 0x6,
- VCD_PROFILE_VC1_SIMPLE = 0x7,
- VCD_PROFILE_VC1_MAIN = 0x8,
- VCD_PROFILE_VC1_ADVANCE = 0x9,
- VCD_PROFILE_MPEG2_MAIN = 0xA,
- VCD_PROFILE_MPEG2_SIMPLE = 0xB
-};
-
-struct vcd_property_profile {
- enum vcd_codec_profile profile;
-};
-
-enum vcd_codec_level {
- VCD_LEVEL_UNKNOWN = 0x0,
- VCD_LEVEL_MPEG4_0 = 0x1,
- VCD_LEVEL_MPEG4_0b = 0x2,
- VCD_LEVEL_MPEG4_1 = 0x3,
- VCD_LEVEL_MPEG4_2 = 0x4,
- VCD_LEVEL_MPEG4_3 = 0x5,
- VCD_LEVEL_MPEG4_3b = 0x6,
- VCD_LEVEL_MPEG4_4 = 0x7,
- VCD_LEVEL_MPEG4_4a = 0x8,
- VCD_LEVEL_MPEG4_5 = 0x9,
- VCD_LEVEL_MPEG4_6 = 0xA,
- VCD_LEVEL_MPEG4_7 = 0xB,
- VCD_LEVEL_MPEG4_X = 0xC,
- VCD_LEVEL_H264_1 = 0x10,
- VCD_LEVEL_H264_1b = 0x11,
- VCD_LEVEL_H264_1p1 = 0x12,
- VCD_LEVEL_H264_1p2 = 0x13,
- VCD_LEVEL_H264_1p3 = 0x14,
- VCD_LEVEL_H264_2 = 0x15,
- VCD_LEVEL_H264_2p1 = 0x16,
- VCD_LEVEL_H264_2p2 = 0x17,
- VCD_LEVEL_H264_3 = 0x18,
- VCD_LEVEL_H264_3p1 = 0x19,
- VCD_LEVEL_H264_3p2 = 0x1A,
- VCD_LEVEL_H264_4 = 0x1B,
- VCD_LEVEL_H264_4p1 = 0x1C,
- VCD_LEVEL_H264_4p2 = 0x1D,
- VCD_LEVEL_H264_5 = 0x1E,
- VCD_LEVEL_H264_5p1 = 0x1F,
- VCD_LEVEL_H263_10 = 0x20,
- VCD_LEVEL_H263_20 = 0x21,
- VCD_LEVEL_H263_30 = 0x22,
- VCD_LEVEL_H263_40 = 0x23,
- VCD_LEVEL_H263_45 = 0x24,
- VCD_LEVEL_H263_50 = 0x25,
- VCD_LEVEL_H263_60 = 0x26,
- VCD_LEVEL_H263_70 = 0x27,
- VCD_LEVEL_H263_X = 0x28,
- VCD_LEVEL_MPEG2_LOW = 0x30,
- VCD_LEVEL_MPEG2_MAIN = 0x31,
- VCD_LEVEL_MPEG2_HIGH_14 = 0x32,
- VCD_LEVEL_MPEG2_HIGH = 0x33,
- VCD_LEVEL_MPEG2_X = 0x34,
- VCD_LEVEL_VC1_S_LOW = 0x40,
- VCD_LEVEL_VC1_S_MEDIUM = 0x41,
- VCD_LEVEL_VC1_M_LOW = 0x42,
- VCD_LEVEL_VC1_M_MEDIUM = 0x43,
- VCD_LEVEL_VC1_M_HIGH = 0x44,
- VCD_LEVEL_VC1_A_0 = 0x45,
- VCD_LEVEL_VC1_A_1 = 0x46,
- VCD_LEVEL_VC1_A_2 = 0x47,
- VCD_LEVEL_VC1_A_3 = 0x48,
- VCD_LEVEL_VC1_A_4 = 0x49,
- VCD_LEVEL_VC1_X = 0x4A
-};
-
-struct vcd_property_level {
- enum vcd_codec_level level;
-};
-
-enum vcd_m_slice_sel {
- VCD_MSLICE_OFF = 0x1,
- VCD_MSLICE_BY_MB_COUNT = 0x2,
- VCD_MSLICE_BY_BYTE_COUNT = 0x3,
- VCD_MSLICE_BY_GOB = 0x4
-};
-
-struct vcd_property_multi_slice {
- enum vcd_m_slice_sel m_slice_sel;
- u32 m_slice_size;
-};
-
-enum vcd_entropy_sel {
- VCD_ENTROPY_SEL_CAVLC = 0x1,
- VCD_ENTROPY_SEL_CABAC = 0x2
-};
-
-enum vcd_cabac_model {
- VCD_CABAC_MODEL_NUMBER_0 = 0x1,
- VCD_CABAC_MODEL_NUMBER_1 = 0x2,
- VCD_CABAC_MODEL_NUMBER_2 = 0x3
-};
-
-struct vcd_property_entropy_control {
- enum vcd_entropy_sel entropy_sel;
- enum vcd_cabac_model cabac_model;
-};
-
-enum vcd_db_config {
- VCD_DB_ALL_BLOCKING_BOUNDARY = 0x1,
- VCD_DB_DISABLE = 0x2,
- VCD_DB_SKIP_SLICE_BOUNDARY = 0x3
-};
-struct vcd_property_db_config {
- enum vcd_db_config db_config;
- u32 slice_alpha_offset;
- u32 slice_beta_offset;
-};
-
-enum vcd_rate_control {
- VCD_RATE_CONTROL_OFF = 0x1,
- VCD_RATE_CONTROL_VBR_VFR = 0x2,
- VCD_RATE_CONTROL_VBR_CFR = 0x3,
- VCD_RATE_CONTROL_CBR_VFR = 0x4,
- VCD_RATE_CONTROL_CBR_CFR = 0x5
-};
-
-struct vcd_property_rate_control {
- enum vcd_rate_control rate_control;
-};
-
-struct vcd_property_qp_range {
- u32 max_qp;
- u32 min_qp;
-};
-
-struct vcd_property_session_qp {
- u32 i_frame_qp;
- u32 p_frame_qp;
- u32 b_frame_qp;
-};
-
-struct vcd_property_i_period {
- u32 p_frames;
- u32 b_frames;
-};
-
-struct vcd_property_vop_timing {
- u32 vop_time_resolution;
-};
-
-struct vcd_property_short_header {
- u32 short_header;
-};
-
-struct vcd_property_intra_refresh_mb_number {
- u32 cir_mb_number;
-};
-
-struct vcd_property_req_i_frame {
- u32 req_i_frame;
-};
-
-struct vcd_frame_rect{
- u32 left;
- u32 top;
- u32 right;
- u32 bottom;
-};
-
-struct vcd_property_dec_output_buffer {
- struct vcd_frame_rect disp_frm;
- struct vcd_property_frame_size frm_size;
-};
-
-enum vcd_output_order {
- VCD_DEC_ORDER_DISPLAY = 0x0,
- VCD_DEC_ORDER_DECODE = 0x1
-};
-
-struct vcd_property_enc_recon_buffer{
- u8 *user_virtual_addr;
- u8 *kernel_virtual_addr;
- u8 *physical_addr;
- u8 *dev_addr;
- u32 buffer_size;
- u32 ysize;
- int pmem_fd;
- u32 offset;
- void *client_data;
-};
-
-struct vcd_property_h264_mv_buffer{
- u8 *kernel_virtual_addr;
- u8 *physical_addr;
- u32 size;
- u32 count;
- int pmem_fd;
- u32 offset;
- u8 *dev_addr;
- void *client_data;
-};
-
-struct vcd_property_buffer_size{
- int width;
- int height;
- int size;
- int alignment;
-};
-
-#endif
diff --git a/drivers/video/msm/vidc/common/vcd/vcd_scheduler.c b/drivers/video/msm/vidc/common/vcd/vcd_scheduler.c
index 34a3445..dec9b4e 100644
--- a/drivers/video/msm/vidc/common/vcd/vcd_scheduler.c
+++ b/drivers/video/msm/vidc/common/vcd/vcd_scheduler.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,7 +11,7 @@
*
*/
-#include "vidc_type.h"
+#include <media/msm/vidc_type.h>
#include "vcd.h"
#define NORMALIZATION_FACTOR 3600
diff --git a/drivers/video/msm/vidc/common/vcd/vcd_status.h b/drivers/video/msm/vidc/common/vcd/vcd_status.h
deleted file mode 100644
index 1a36167..0000000
--- a/drivers/video/msm/vidc/common/vcd/vcd_status.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef _VCD_ERR_STATUS_H_
-#define _VCD_ERR_STATUS_H_
-
-#define VCD_EVT_RESP_BASE 0x1000
-#define VCD_EVT_RESP_OPEN (VCD_EVT_RESP_BASE + 0x1)
-#define VCD_EVT_RESP_START (VCD_EVT_RESP_BASE + 0x2)
-#define VCD_EVT_RESP_STOP (VCD_EVT_RESP_BASE + 0x3)
-#define VCD_EVT_RESP_PAUSE (VCD_EVT_RESP_BASE + 0x4)
-#define VCD_EVT_RESP_FLUSH_INPUT_DONE (VCD_EVT_RESP_BASE + 0x5)
-#define VCD_EVT_RESP_FLUSH_OUTPUT_DONE (VCD_EVT_RESP_BASE + 0x6)
-#define VCD_EVT_RESP_INPUT_FLUSHED (VCD_EVT_RESP_BASE + 0x7)
-#define VCD_EVT_RESP_OUTPUT_FLUSHED (VCD_EVT_RESP_BASE + 0x8)
-#define VCD_EVT_RESP_INPUT_DONE (VCD_EVT_RESP_BASE + 0x9)
-#define VCD_EVT_RESP_OUTPUT_DONE (VCD_EVT_RESP_BASE + 0xa)
-
-#define VCD_EVT_IND_BASE 0x2000
-#define VCD_EVT_IND_INPUT_RECONFIG (VCD_EVT_IND_BASE + 0x1)
-#define VCD_EVT_IND_OUTPUT_RECONFIG (VCD_EVT_IND_BASE + 0x2)
-#define VCD_EVT_IND_HWERRFATAL (VCD_EVT_IND_BASE + 0x3)
-#define VCD_EVT_IND_RESOURCES_LOST (VCD_EVT_IND_BASE + 0x4)
-#define VCD_EVT_IND_INFO_OUTPUT_RECONFIG (VCD_EVT_IND_BASE + 0x5)
-#define VCD_EVT_IND_INFO_FIELD_DROPPED (VCD_EVT_IND_BASE + 0x6)
-
-#define VCD_S_SUCCESS 0x0
-
-#define VCD_S_ERR_BASE 0x80000000
-#define VCD_ERR_FAIL (VCD_S_ERR_BASE + 0x01)
-#define VCD_ERR_ALLOC_FAIL (VCD_S_ERR_BASE + 0x02)
-#define VCD_ERR_ILLEGAL_OP (VCD_S_ERR_BASE + 0x03)
-#define VCD_ERR_ILLEGAL_PARM (VCD_S_ERR_BASE + 0x04)
-#define VCD_ERR_BAD_POINTER (VCD_S_ERR_BASE + 0x05)
-#define VCD_ERR_BAD_HANDLE (VCD_S_ERR_BASE + 0x06)
-#define VCD_ERR_NOT_SUPPORTED (VCD_S_ERR_BASE + 0x07)
-#define VCD_ERR_BAD_STATE (VCD_S_ERR_BASE + 0x08)
-#define VCD_ERR_BUSY (VCD_S_ERR_BASE + 0x09)
-#define VCD_ERR_MAX_CLIENT (VCD_S_ERR_BASE + 0x0a)
-#define VCD_ERR_IFRAME_EXPECTED (VCD_S_ERR_BASE + 0x0b)
-#define VCD_ERR_INTRLCD_FIELD_DROP (VCD_S_ERR_BASE + 0x0c)
-#define VCD_ERR_HW_FATAL (VCD_S_ERR_BASE + 0x0d)
-#define VCD_ERR_BITSTREAM_ERR (VCD_S_ERR_BASE + 0x0e)
-#define VCD_ERR_QEMPTY (VCD_S_ERR_BASE + 0x0f)
-#define VCD_ERR_SEQHDR_PARSE_FAIL (VCD_S_ERR_BASE + 0x10)
-#define VCD_ERR_INPUT_NOT_PROCESSED (VCD_S_ERR_BASE + 0x11)
-#define VCD_ERR_INDEX_NOMORE (VCD_S_ERR_BASE + 0x12)
-
-#define VCD_FAILED(rc) ((rc > VCD_S_ERR_BASE) ? true : false)
-
-#endif
diff --git a/drivers/video/msm/vidc/common/vcd/vcd_sub.c b/drivers/video/msm/vidc/common/vcd/vcd_sub.c
index 509b897..ebc30fd 100644
--- a/drivers/video/msm/vidc/common/vcd/vcd_sub.c
+++ b/drivers/video/msm/vidc/common/vcd/vcd_sub.c
@@ -13,7 +13,7 @@
#include <linux/memory_alloc.h>
#include <mach/msm_subsystem_map.h>
#include <asm/div64.h>
-#include "vidc_type.h"
+#include <media/msm/vidc_type.h>
#include "vcd.h"
#include "vdec_internal.h"
diff --git a/drivers/video/msm/vidc/common/vcd/vcd_util.h b/drivers/video/msm/vidc/common/vcd/vcd_util.h
index 07ad651..7164029 100644
--- a/drivers/video/msm/vidc/common/vcd/vcd_util.h
+++ b/drivers/video/msm/vidc/common/vcd/vcd_util.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,8 +12,8 @@
*/
#ifndef _VCD_UTIL_H_
#define _VCD_UTIL_H_
-#include "vidc_type.h"
-#include "vcd_api.h"
+#include <media/msm/vidc_type.h>
+#include <media/msm/vcd_api.h>
#if DEBUG
diff --git a/drivers/video/msm/vidc/common/vcd/vidc_type.h b/drivers/video/msm/vidc/common/vcd/vidc_type.h
deleted file mode 100644
index bd87c0d..0000000
--- a/drivers/video/msm/vidc/common/vcd/vidc_type.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-#ifndef VIDC_TYPE_H
-#define VIDC_TYPE_H
-
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/mutex.h>
-#include <linux/slab.h>
-#include <linux/string.h>
-#include <linux/list.h>
-#include <linux/time.h>
-#include <linux/dma-mapping.h>
-#include <linux/android_pmem.h>
-
-#define DEBUG 0
-#define VIDC_ENABLE_DBGFS
-
-#define USE_RES_TRACKER
-#endif
diff --git a/include/linux/Kbuild b/include/linux/Kbuild
index 9c43f56..79f7874 100644
--- a/include/linux/Kbuild
+++ b/include/linux/Kbuild
@@ -428,6 +428,7 @@
header-y += msm_ipc.h
header-y += msm_charm.h
header-y += tzcom.h
+header-y += qseecom.h
header-y += qcedev.h
header-y += idle_stats_device.h
header-y += genlock.h
diff --git a/include/linux/diagchar.h b/include/linux/diagchar.h
index 1cb5401..5d3a6a1 100644
--- a/include/linux/diagchar.h
+++ b/include/linux/diagchar.h
@@ -36,23 +36,11 @@
#define DIAG_IOCTL_GET_DELAYED_RSP_ID 8
#define DIAG_IOCTL_LSM_DEINIT 9
-/* Machine ID and corresponding PC Tools IDs */
-#define APQ8060_MACHINE_ID 86
-#define AO8960_MACHINE_ID 87
-#define MSM8660_MACHINE_ID 71
-#define MDM9615_MACHINE_ID 104
-#define APQ8064_MACHINE_ID 109
-#define MSM8930_MACHINE_ID 116
-#define MSM8630_MACHINE_ID 117
-#define MSM8230_MACHINE_ID 118
-#define APQ8030_MACHINE_ID 119
-#define MSM8627_MACHINE_ID 120
-#define MSM8227_MACHINE_ID 121
-#define MSM8260A_MACHINE_ID 123
-#define MSM8974_MACHINE_ID 126
+/* PC Tools IDs */
#define APQ8060_TOOLS_ID 4062
#define AO8960_TOOLS_ID 4064
#define APQ8064_TOOLS_ID 4072
+#define MSM8625_TOOLS_ID 4075
#define MSM8930_TOOLS_ID 4076
#define MSM8630_TOOLS_ID 4077
#define MSM8230_TOOLS_ID 4078
@@ -114,11 +102,11 @@
/* This needs to be modified manually now, when we add
a new RANGE of SSIDs to the msg_mask_tbl */
-#define MSG_MASK_TBL_CNT 19
+#define MSG_MASK_TBL_CNT 23
#define EVENT_LAST_ID 0x083F
#define MSG_SSID_0 0
-#define MSG_SSID_0_LAST 68
+#define MSG_SSID_0_LAST 90
#define MSG_SSID_1 500
#define MSG_SSID_1_LAST 506
#define MSG_SSID_2 1000
@@ -126,19 +114,19 @@
#define MSG_SSID_3 2000
#define MSG_SSID_3_LAST 2008
#define MSG_SSID_4 3000
-#define MSG_SSID_4_LAST 3012
+#define MSG_SSID_4_LAST 3014
#define MSG_SSID_5 4000
#define MSG_SSID_5_LAST 4010
#define MSG_SSID_6 4500
#define MSG_SSID_6_LAST 4526
#define MSG_SSID_7 4600
-#define MSG_SSID_7_LAST 4611
+#define MSG_SSID_7_LAST 4612
#define MSG_SSID_8 5000
-#define MSG_SSID_8_LAST 5024
+#define MSG_SSID_8_LAST 5029
#define MSG_SSID_9 5500
-#define MSG_SSID_9_LAST 5514
+#define MSG_SSID_9_LAST 5516
#define MSG_SSID_10 6000
-#define MSG_SSID_10_LAST 6050
+#define MSG_SSID_10_LAST 6072
#define MSG_SSID_11 6500
#define MSG_SSID_11_LAST 6521
#define MSG_SSID_12 7000
@@ -155,6 +143,14 @@
#define MSG_SSID_17_LAST 9008
#define MSG_SSID_18 9500
#define MSG_SSID_18_LAST 9509
+#define MSG_SSID_19 10200
+#define MSG_SSID_19_LAST 10210
+#define MSG_SSID_20 10251
+#define MSG_SSID_20_LAST 10255
+#define MSG_SSID_21 10300
+#define MSG_SSID_21_LAST 10300
+#define MSG_SSID_22 10350
+#define MSG_SSID_22_LAST 10361
struct diagpkt_delay_params {
void *rsp_ptr;
@@ -249,6 +245,28 @@
MSG_LVL_MED,
MSG_LVL_LOW,
MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_HIGH,
+ MSG_LVL_HIGH,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_HIGH,
+ MSG_LVL_HIGH,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW|MSG_LVL_MED|MSG_LVL_HIGH|MSG_LVL_ERROR|MSG_LVL_FATAL,
+ MSG_LVL_MED,
+ MSG_LVL_LOW|MSG_LVL_MED|MSG_LVL_HIGH|MSG_LVL_ERROR|MSG_LVL_FATAL,
+ MSG_LVL_LOW,
+ MSG_LVL_MED,
+ MSG_LVL_LOW
};
static const uint32_t msg_bld_masks_1[] = {
@@ -258,7 +276,7 @@
MSG_LVL_LOW,
MSG_LVL_HIGH,
MSG_LVL_HIGH,
- MSG_LVL_HIGH,
+ MSG_LVL_HIGH
};
static const uint32_t msg_bld_masks_2[] = {
@@ -297,7 +315,9 @@
MSG_LVL_HIGH,
MSG_LVL_HIGH,
MSG_LVL_HIGH,
- MSG_LVL_HIGH
+ MSG_LVL_HIGH,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW
};
static const uint32_t msg_bld_masks_5[] = {
@@ -310,7 +330,8 @@
MSG_LVL_MED,
MSG_LVL_MED,
MSG_LVL_MED,
- MSG_LVL_MED,
+ MSG_LVL_MED|MSG_LVL_MED|MSG_MASK_5|MSG_MASK_6|MSG_MASK_7| \
+ MSG_MASK_8|MSG_MASK_9,
MSG_LVL_MED
};
@@ -357,6 +378,7 @@
MSG_LVL_MED,
MSG_LVL_MED,
MSG_LVL_MED,
+ MSG_LVL_LOW
};
static const uint32_t msg_bld_masks_8[] = {
@@ -385,6 +407,11 @@
MSG_LVL_MED,
MSG_LVL_MED,
MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED
};
static const uint32_t msg_bld_masks_9[] = {
@@ -403,6 +430,8 @@
MSG_LVL_MED|MSG_MASK_5,
MSG_LVL_MED|MSG_MASK_5,
MSG_LVL_MED|MSG_MASK_5,
+ MSG_LVL_MED|MSG_MASK_5,
+ MSG_LVL_MED|MSG_MASK_5
};
static const uint32_t msg_bld_masks_10[] = {
@@ -462,6 +491,28 @@
MSG_LVL_LOW,
MSG_LVL_LOW,
MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_MED,
+ MSG_LVL_LOW
};
static const uint32_t msg_bld_masks_11[] = {
@@ -584,6 +635,47 @@
MSG_LVL_LOW
};
+static const uint32_t msg_bld_masks_19[] = {
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW
+};
+
+static const uint32_t msg_bld_masks_20[] = {
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW
+};
+
+static const uint32_t msg_bld_masks_21[] = {
+ MSG_LVL_HIGH
+};
+
+static const uint32_t msg_bld_masks_22[] = {
+ MSG_LVL_HIGH,
+ MSG_LVL_HIGH,
+ MSG_LVL_HIGH,
+ MSG_LVL_HIGH,
+ MSG_LVL_HIGH,
+ MSG_LVL_HIGH,
+ MSG_LVL_HIGH,
+ MSG_LVL_HIGH,
+ MSG_LVL_HIGH,
+ MSG_LVL_HIGH,
+ MSG_LVL_HIGH,
+ MSG_LVL_HIGH
+};
+
/* LOG CODES */
#define LOG_0 0x0
diff --git a/include/linux/i2c/atmel_mxt_ts.h b/include/linux/i2c/atmel_mxt_ts.h
index 500ee6b..a2391e3 100644
--- a/include/linux/i2c/atmel_mxt_ts.h
+++ b/include/linux/i2c/atmel_mxt_ts.h
@@ -29,6 +29,12 @@
/* MXT_TOUCH_KEYARRAY_T15 */
#define MXT_KEYARRAY_MAX_KEYS 32
+/* Bootoader IDs */
+#define MXT_BOOTLOADER_ID_224 0x0A
+#define MXT_BOOTLOADER_ID_224E 0x06
+#define MXT_BOOTLOADER_ID_1386 0x01
+#define MXT_BOOTLOADER_ID_1386E 0x10
+
/* Config data for a given maXTouch controller with a specific firmware */
struct mxt_config_info {
const u8 *config;
@@ -37,6 +43,9 @@
u8 variant_id;
u8 version;
u8 build;
+ u8 bootldr_id;
+ /* Points to the firmware name to be upgraded to */
+ const char *fw_name;
};
/* The platform data for the Atmel maXTouch touchscreen driver */
diff --git a/include/linux/ion.h b/include/linux/ion.h
index 3256fba..d761e1e 100644
--- a/include/linux/ion.h
+++ b/include/linux/ion.h
@@ -110,6 +110,12 @@
#define ION_IS_CACHED(__flags) ((__flags) & (1 << ION_CACHE_SHIFT))
+/*
+ * This flag allows clients when mapping into the IOMMU to specify to
+ * defer un-mapping from the IOMMU until the buffer memory is freed.
+ */
+#define ION_IOMMU_UNMAP_DELAYED 1
+
#ifdef __KERNEL__
#include <linux/err.h>
#include <mach/ion.h>
@@ -407,6 +413,7 @@
* @iova - pointer to store the iova address
* @buffer_size - pointer to store the size of the buffer
* @flags - flags for options to map
+ * @iommu_flags - flags specific to the iommu.
*
* Maps the handle into the iova space specified via domain number. Iova
* will be allocated from the partition specified via partition_num.
@@ -416,7 +423,7 @@
int domain_num, int partition_num, unsigned long align,
unsigned long iova_length, unsigned long *iova,
unsigned long *buffer_size,
- unsigned long flags);
+ unsigned long flags, unsigned long iommu_flags);
/**
@@ -493,6 +500,23 @@
*/
int msm_ion_unsecure_heap(int heap_id);
+/**
+ * msm_ion_do_cache_op - do cache operations.
+ *
+ * @client - pointer to ION client.
+ * @handle - pointer to buffer handle.
+ * @vaddr - virtual address to operate on.
+ * @len - Length of data to do cache operation on.
+ * @cmd - Cache operation to perform:
+ * ION_IOC_CLEAN_CACHES
+ * ION_IOC_INV_CACHES
+ * ION_IOC_CLEAN_INV_CACHES
+ *
+ * Returns 0 on success
+ */
+int msm_ion_do_cache_op(struct ion_client *client, struct ion_handle *handle,
+ void *vaddr, unsigned long len, unsigned int cmd);
+
#else
static inline struct ion_client *ion_client_create(struct ion_device *dev,
unsigned int heap_mask, const char *name)
@@ -570,7 +594,9 @@
struct ion_handle *handle, int domain_num,
int partition_num, unsigned long align,
unsigned long iova_length, unsigned long *iova,
- unsigned long flags)
+ unsigned long *buffer_size,
+ unsigned long flags,
+ unsigned long iommu_flags)
{
return -ENODEV;
}
@@ -603,6 +629,14 @@
{
return -ENODEV;
}
+
+static inline int msm_ion_do_cache_op(struct ion_client *client,
+ struct ion_handle *handle, void *vaddr,
+ unsigned long len, unsigned int cmd)
+{
+ return -ENODEV;
+}
+
#endif /* CONFIG_ION */
#endif /* __KERNEL__ */
diff --git a/include/linux/libra_sdioif.h b/include/linux/libra_sdioif.h
index 965e2b5..08be83a 100644
--- a/include/linux/libra_sdioif.h
+++ b/include/linux/libra_sdioif.h
@@ -35,6 +35,7 @@
typedef int (suspend_handler_t)(struct sdio_func *);
typedef void (resume_handler_t)(struct sdio_func *);
+int libra_enable_sdio_irq_in_chip(struct sdio_func *func, u8 enable);
int libra_sdio_configure(sdio_irq_handler_t libra_sdio_rxhandler,
void (*func_drv_fn)(int *status),
u32 funcdrv_timeout, u32 blksize);
diff --git a/include/linux/mfd/Kbuild b/include/linux/mfd/Kbuild
index 1acc78f..bba647c 100644
--- a/include/linux/mfd/Kbuild
+++ b/include/linux/mfd/Kbuild
@@ -1,3 +1,3 @@
header-y += timpani-audio.h
header-y += msm-adie-codec.h
-header-y += wcd9310/
+header-y += wcd9xxx/
diff --git a/include/linux/mfd/pm8xxx/irq.h b/include/linux/mfd/pm8xxx/irq.h
index 1e1fe6c..78fbed3 100644
--- a/include/linux/mfd/pm8xxx/irq.h
+++ b/include/linux/mfd/pm8xxx/irq.h
@@ -39,21 +39,20 @@
#ifdef CONFIG_MFD_PM8XXX_IRQ
int pm8xxx_get_irq_stat(struct pm_irq_chip *chip, int irq);
-struct pm_irq_chip * __devinit pm8xxx_irq_init(struct device *dev,
+struct pm_irq_chip *pm8xxx_irq_init(struct device *dev,
const struct pm8xxx_irq_platform_data *pdata);
-int __devexit pm8xxx_irq_exit(struct pm_irq_chip *chip);
+int pm8xxx_irq_exit(struct pm_irq_chip *chip);
#else
static inline int pm8xxx_get_irq_stat(struct pm_irq_chip *chip, int irq)
{
return -ENXIO;
}
-static inline struct pm_irq_chip * __devinit pm8xxx_irq_init(
- const struct device *dev,
+static inline struct pm_irq_chip *pm8xxx_irq_init(const struct device *dev,
const struct pm8xxx_irq_platform_data *pdata)
{
return ERR_PTR(-ENXIO);
}
-static inline int __devexit pm8xxx_irq_exit(struct pm_irq_chip *chip)
+static inline int pm8xxx_irq_exit(struct pm_irq_chip *chip)
{
return -ENXIO;
}
diff --git a/include/linux/mfd/pm8xxx/pm8921-bms.h b/include/linux/mfd/pm8xxx/pm8921-bms.h
index 82db9a4..818eeca 100644
--- a/include/linux/mfd/pm8xxx/pm8921-bms.h
+++ b/include/linux/mfd/pm8xxx/pm8921-bms.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -95,8 +95,15 @@
unsigned int batt_id_channel;
};
+enum battery_type {
+ BATT_UNKNOWN = 0,
+ BATT_PALLADIUM,
+ BATT_DESAY,
+};
+
/**
* struct pm8921_bms_platform_data -
+ * @batt_type: allows to force chose battery calibration data
* @r_sense: sense resistor value in (mOhms)
* @i_test: current at which the unusable charger cutoff is to be
* calculated or the peak system current (mA)
@@ -105,6 +112,7 @@
*/
struct pm8921_bms_platform_data {
struct pm8xxx_bms_core_data bms_cdata;
+ enum battery_type battery_type;
unsigned int r_sense;
unsigned int i_test;
unsigned int v_failure;
@@ -114,6 +122,7 @@
#if defined(CONFIG_PM8921_BMS) || defined(CONFIG_PM8921_BMS_MODULE)
extern struct pm8921_bms_battery_data palladium_1500_data;
+extern struct pm8921_bms_battery_data desay_5200_data;
/**
* pm8921_bms_get_vsense_avg - return the voltage across the sense
* resitor in microvolts
@@ -166,6 +175,16 @@
* track of chargecycles
*/
void pm8921_bms_charging_end(int is_battery_full);
+
+void pm8921_bms_calibrate_hkadc(void);
+/**
+ * pm8921_bms_get_simultaneous_battery_voltage_and_current
+ * - function to take simultaneous vbat and vsense readings
+ * this puts the bms in override mode but keeps coulumb couting
+ * on. Useful when ir compensation needs to be implemented
+ */
+int pm8921_bms_get_simultaneous_battery_voltage_and_current(int *ibat_ua,
+ int *vbat_uv);
#else
static inline int pm8921_bms_get_vsense_avg(int *result)
{
@@ -189,6 +208,14 @@
static inline void pm8921_bms_charging_end(int is_battery_full)
{
}
+static inline void pm8921_bms_calibrate_hkadc(void)
+{
+}
+static inline int pm8921_bms_get_simultaneous_battery_voltage_and_current(
+ int *ibat_ua, int *vbat_uv)
+{
+ return -ENXIO;
+}
#endif
#endif
diff --git a/include/linux/mfd/pm8xxx/pm8921.h b/include/linux/mfd/pm8xxx/pm8921.h
index 22293fe..bdaee74 100644
--- a/include/linux/mfd/pm8xxx/pm8921.h
+++ b/include/linux/mfd/pm8xxx/pm8921.h
@@ -142,6 +142,7 @@
struct pm8xxx_led_platform_data *leds_pdata;
struct pm8xxx_vibrator_platform_data *vibrator_pdata;
struct pm8xxx_ccadc_platform_data *ccadc_pdata;
+ struct pm8xxx_pwm_platform_data *pwm_pdata;
};
#endif
diff --git a/include/linux/mfd/pm8xxx/pwm.h b/include/linux/mfd/pm8xxx/pwm.h
index 9169e90..09b165e 100644
--- a/include/linux/mfd/pm8xxx/pwm.h
+++ b/include/linux/mfd/pm8xxx/pwm.h
@@ -19,7 +19,6 @@
#define PM8XXX_PWM_PERIOD_MIN 7 /* usec: 19.2M, n=6, m=0, pre=2 */
#define PM8XXX_PWM_PERIOD_MAX (384 * USEC_PER_SEC) /* 1K, n=9, m=7, pre=6 */
-
#define PM_PWM_LUT_SIZE 64
#define PM_PWM_LUT_DUTY_TIME_MAX 512 /* ms */
#define PM_PWM_LUT_PAUSE_MAX (7000 * PM_PWM_LUT_DUTY_TIME_MAX)
@@ -92,6 +91,14 @@
};
/**
+ * struct pm8xxx_pwm_platform_data - PWM platform data
+ * dtest_channel - Enable LPG DTEST mode for this LPG channel
+ */
+struct pm8xxx_pwm_platform_data {
+ int dtest_channel;
+};
+
+/**
* pm8xxx_pwm_config_period - change PWM period
*
* @pwm: the PWM device
diff --git a/include/linux/mfd/wcd9310/Kbuild b/include/linux/mfd/wcd9310/Kbuild
deleted file mode 100644
index 2702ec6..0000000
--- a/include/linux/mfd/wcd9310/Kbuild
+++ /dev/null
@@ -1 +0,0 @@
-header-y += registers.h
diff --git a/include/linux/mfd/wcd9310/core.h b/include/linux/mfd/wcd9310/core.h
deleted file mode 100644
index 8605ac6..0000000
--- a/include/linux/mfd/wcd9310/core.h
+++ /dev/null
@@ -1,144 +0,0 @@
-/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MFD_TABLA_CORE_H__
-#define __MFD_TABLA_CORE_H__
-
-#include <linux/interrupt.h>
-#include <linux/wakelock.h>
-
-#define TABLA_NUM_IRQ_REGS 3
-
-#define TABLA_SLIM_NUM_PORT_REG 3
-
-#define TABLA_INTERFACE_TYPE_SLIMBUS 0x00
-#define TABLA_INTERFACE_TYPE_I2C 0x01
-
-#define TABLA_VERSION_1_0 0
-#define TABLA_VERSION_1_1 1
-#define TABLA_VERSION_2_0 2
-#define TABLA_IS_1_X(ver) \
- (((ver == TABLA_VERSION_1_0) || (ver == TABLA_VERSION_1_1)) ? 1 : 0)
-#define TABLA_IS_2_0(ver) ((ver == TABLA_VERSION_2_0) ? 1 : 0)
-
-enum {
- TABLA_IRQ_SLIMBUS = 0,
- TABLA_IRQ_MBHC_REMOVAL,
- TABLA_IRQ_MBHC_SHORT_TERM,
- TABLA_IRQ_MBHC_PRESS,
- TABLA_IRQ_MBHC_RELEASE,
- TABLA_IRQ_MBHC_POTENTIAL,
- TABLA_IRQ_MBHC_INSERTION,
- TABLA_IRQ_BG_PRECHARGE,
- TABLA_IRQ_PA1_STARTUP,
- TABLA_IRQ_PA2_STARTUP,
- TABLA_IRQ_PA3_STARTUP,
- TABLA_IRQ_PA4_STARTUP,
- TABLA_IRQ_PA5_STARTUP,
- TABLA_IRQ_MICBIAS1_PRECHARGE,
- TABLA_IRQ_MICBIAS2_PRECHARGE,
- TABLA_IRQ_MICBIAS3_PRECHARGE,
- TABLA_IRQ_HPH_PA_OCPL_FAULT,
- TABLA_IRQ_HPH_PA_OCPR_FAULT,
- TABLA_IRQ_EAR_PA_OCPL_FAULT,
- TABLA_IRQ_HPH_L_PA_STARTUP,
- TABLA_IRQ_HPH_R_PA_STARTUP,
- TABLA_IRQ_EAR_PA_STARTUP,
- TABLA_NUM_IRQS,
-};
-
-enum tabla_pm_state {
- TABLA_PM_SLEEPABLE,
- TABLA_PM_AWAKE,
- TABLA_PM_ASLEEP,
-};
-
-struct tabla {
- struct device *dev;
- struct slim_device *slim;
- struct slim_device *slim_slave;
- struct mutex io_lock;
- struct mutex xfer_lock;
- struct mutex irq_lock;
- u8 version;
-
- unsigned int irq_base;
- unsigned int irq;
- u8 irq_masks_cur[TABLA_NUM_IRQ_REGS];
- u8 irq_masks_cache[TABLA_NUM_IRQ_REGS];
- u8 irq_level[TABLA_NUM_IRQ_REGS];
-
- int reset_gpio;
-
- int (*read_dev)(struct tabla *tabla, unsigned short reg,
- int bytes, void *dest, bool interface_reg);
- int (*write_dev)(struct tabla *tabla, unsigned short reg,
- int bytes, void *src, bool interface_reg);
-
- struct regulator_bulk_data *supplies;
-
- enum tabla_pm_state pm_state;
- struct mutex pm_lock;
- /* pm_wq notifies change of pm_state */
- wait_queue_head_t pm_wq;
- struct wake_lock wlock;
- int wlock_holders;
-};
-
-int tabla_reg_read(struct tabla *tabla, unsigned short reg);
-int tabla_reg_write(struct tabla *tabla, unsigned short reg, u8 val);
-int tabla_interface_reg_read(struct tabla *tabla, unsigned short reg);
-int tabla_interface_reg_write(struct tabla *tabla, unsigned short reg, u8 val);
-int tabla_bulk_read(struct tabla *tabla, unsigned short reg, int count,
- u8 *buf);
-int tabla_bulk_write(struct tabla *tabla, unsigned short reg, int count,
- u8 *buf);
-int tabla_irq_init(struct tabla *tabla);
-void tabla_irq_exit(struct tabla *tabla);
-int tabla_get_logical_addresses(u8 *pgd_la, u8 *inf_la);
-int tabla_get_intf_type(void);
-
-void tabla_lock_sleep(struct tabla *tabla);
-void tabla_unlock_sleep(struct tabla *tabla);
-enum tabla_pm_state tabla_pm_cmpxchg(struct tabla *tabla, enum tabla_pm_state o,
- enum tabla_pm_state n);
-
-static inline int tabla_request_irq(struct tabla *tabla, int irq,
- irq_handler_t handler, const char *name,
- void *data)
-{
- if (!tabla->irq_base)
- return -EINVAL;
- return request_threaded_irq(tabla->irq_base + irq, NULL, handler,
- IRQF_TRIGGER_RISING, name,
- data);
-}
-static inline void tabla_free_irq(struct tabla *tabla, int irq, void *data)
-{
- if (!tabla->irq_base)
- return;
- free_irq(tabla->irq_base + irq, data);
-}
-static inline void tabla_enable_irq(struct tabla *tabla, int irq)
-{
- if (!tabla->irq_base)
- return;
- enable_irq(tabla->irq_base + irq);
-}
-static inline void tabla_disable_irq(struct tabla *tabla, int irq)
-{
- if (!tabla->irq_base)
- return;
- disable_irq_nosync(tabla->irq_base + irq);
-}
-
-#endif
diff --git a/include/linux/mfd/wcd9xxx/Kbuild b/include/linux/mfd/wcd9xxx/Kbuild
new file mode 100644
index 0000000..acfab6e
--- /dev/null
+++ b/include/linux/mfd/wcd9xxx/Kbuild
@@ -0,0 +1,2 @@
+header-y += wcd9xxx_registers.h
+header-y += wcd9310_registers.h
diff --git a/include/linux/mfd/wcd9xxx/core.h b/include/linux/mfd/wcd9xxx/core.h
new file mode 100644
index 0000000..0d99e37
--- /dev/null
+++ b/include/linux/mfd/wcd9xxx/core.h
@@ -0,0 +1,177 @@
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MFD_TABLA_CORE_H__
+#define __MFD_TABLA_CORE_H__
+
+#include <linux/interrupt.h>
+#include <linux/wakelock.h>
+
+#define WCD9XXX_NUM_IRQ_REGS 3
+
+#define WCD9XXX_SLIM_NUM_PORT_REG 3
+
+#define WCD9XXX_INTERFACE_TYPE_SLIMBUS 0x00
+#define WCD9XXX_INTERFACE_TYPE_I2C 0x01
+
+#define TABLA_VERSION_1_0 0
+#define TABLA_VERSION_1_1 1
+#define TABLA_VERSION_2_0 2
+#define TABLA_IS_1_X(ver) \
+ (((ver == TABLA_VERSION_1_0) || (ver == TABLA_VERSION_1_1)) ? 1 : 0)
+#define TABLA_IS_2_0(ver) ((ver == TABLA_VERSION_2_0) ? 1 : 0)
+
+enum {
+ TABLA_IRQ_SLIMBUS = 0,
+ TABLA_IRQ_MBHC_REMOVAL,
+ TABLA_IRQ_MBHC_SHORT_TERM,
+ TABLA_IRQ_MBHC_PRESS,
+ TABLA_IRQ_MBHC_RELEASE,
+ TABLA_IRQ_MBHC_POTENTIAL,
+ TABLA_IRQ_MBHC_INSERTION,
+ TABLA_IRQ_BG_PRECHARGE,
+ TABLA_IRQ_PA1_STARTUP,
+ TABLA_IRQ_PA2_STARTUP,
+ TABLA_IRQ_PA3_STARTUP,
+ TABLA_IRQ_PA4_STARTUP,
+ TABLA_IRQ_PA5_STARTUP,
+ TABLA_IRQ_MICBIAS1_PRECHARGE,
+ TABLA_IRQ_MICBIAS2_PRECHARGE,
+ TABLA_IRQ_MICBIAS3_PRECHARGE,
+ TABLA_IRQ_HPH_PA_OCPL_FAULT,
+ TABLA_IRQ_HPH_PA_OCPR_FAULT,
+ TABLA_IRQ_EAR_PA_OCPL_FAULT,
+ TABLA_IRQ_HPH_L_PA_STARTUP,
+ TABLA_IRQ_HPH_R_PA_STARTUP,
+ TABLA_IRQ_EAR_PA_STARTUP,
+ TABLA_NUM_IRQS,
+};
+
+enum {
+ SITAR_IRQ_SLIMBUS = 0,
+ SITAR_IRQ_MBHC_REMOVAL,
+ SITAR_IRQ_MBHC_SHORT_TERM,
+ SITAR_IRQ_MBHC_PRESS,
+ SITAR_IRQ_MBHC_RELEASE,
+ SITAR_IRQ_MBHC_POTENTIAL,
+ SITAR_IRQ_MBHC_INSERTION,
+ SITAR_IRQ_BG_PRECHARGE,
+ SITAR_IRQ_PA1_STARTUP,
+ SITAR_IRQ_PA2_STARTUP,
+ SITAR_IRQ_PA3_STARTUP,
+ SITAR_IRQ_PA4_STARTUP,
+ SITAR_IRQ_PA5_STARTUP,
+ SITAR_IRQ_MICBIAS1_PRECHARGE,
+ SITAR_IRQ_MICBIAS2_PRECHARGE,
+ SITAR_IRQ_MICBIAS3_PRECHARGE,
+ SITAR_IRQ_HPH_PA_OCPL_FAULT,
+ SITAR_IRQ_HPH_PA_OCPR_FAULT,
+ SITAR_IRQ_EAR_PA_OCPL_FAULT,
+ SITAR_IRQ_HPH_L_PA_STARTUP,
+ SITAR_IRQ_HPH_R_PA_STARTUP,
+ SITAR_IRQ_EAR_PA_STARTUP,
+ SITAR_NUM_IRQS,
+};
+
+
+enum wcd9xxx_pm_state {
+ WCD9XXX_PM_SLEEPABLE,
+ WCD9XXX_PM_AWAKE,
+ WCD9XXX_PM_ASLEEP,
+};
+
+struct wcd9xxx {
+ struct device *dev;
+ struct slim_device *slim;
+ struct slim_device *slim_slave;
+ struct mutex io_lock;
+ struct mutex xfer_lock;
+ struct mutex irq_lock;
+ u8 version;
+
+ unsigned int irq_base;
+ unsigned int irq;
+ u8 irq_masks_cur[WCD9XXX_NUM_IRQ_REGS];
+ u8 irq_masks_cache[WCD9XXX_NUM_IRQ_REGS];
+ u8 irq_level[WCD9XXX_NUM_IRQ_REGS];
+
+ int reset_gpio;
+
+ int (*read_dev)(struct wcd9xxx *wcd9xxx, unsigned short reg,
+ int bytes, void *dest, bool interface_reg);
+ int (*write_dev)(struct wcd9xxx *wcd9xxx, unsigned short reg,
+ int bytes, void *src, bool interface_reg);
+
+ struct regulator_bulk_data *supplies;
+
+ enum wcd9xxx_pm_state pm_state;
+ struct mutex pm_lock;
+ /* pm_wq notifies change of pm_state */
+ wait_queue_head_t pm_wq;
+ struct wake_lock wlock;
+ int wlock_holders;
+ int num_rx_port;
+ int num_tx_port;
+};
+
+int wcd9xxx_reg_read(struct wcd9xxx *wcd9xxx, unsigned short reg);
+int wcd9xxx_reg_write(struct wcd9xxx *wcd9xxx, unsigned short reg,
+ u8 val);
+int wcd9xxx_interface_reg_read(struct wcd9xxx *wcd9xxx, unsigned short reg);
+int wcd9xxx_interface_reg_write(struct wcd9xxx *wcd9xxx, unsigned short reg,
+ u8 val);
+int wcd9xxx_bulk_read(struct wcd9xxx *wcd9xxx, unsigned short reg,
+ int count, u8 *buf);
+int wcd9xxx_bulk_write(struct wcd9xxx *wcd9xxx, unsigned short reg,
+ int count, u8 *buf);
+int wcd9xxx_irq_init(struct wcd9xxx *wcd9xxx);
+void wcd9xxx_irq_exit(struct wcd9xxx *wcd9xxx);
+int wcd9xxx_get_logical_addresses(u8 *pgd_la, u8 *inf_la);
+int wcd9xxx_get_intf_type(void);
+
+void wcd9xxx_lock_sleep(struct wcd9xxx *wcd9xxx);
+void wcd9xxx_unlock_sleep(struct wcd9xxx *wcd9xxx);
+enum wcd9xxx_pm_state wcd9xxx_pm_cmpxchg(struct wcd9xxx *wcd9xxx,
+ enum wcd9xxx_pm_state o,
+ enum wcd9xxx_pm_state n);
+
+static inline int wcd9xxx_request_irq(struct wcd9xxx *wcd9xxx, int irq,
+ irq_handler_t handler, const char *name,
+ void *data)
+{
+ if (!wcd9xxx->irq_base)
+ return -EINVAL;
+ return request_threaded_irq(wcd9xxx->irq_base + irq, NULL, handler,
+ IRQF_TRIGGER_RISING, name,
+ data);
+}
+static inline void wcd9xxx_free_irq(struct wcd9xxx *wcd9xxx,
+ int irq, void *data)
+{
+ if (!wcd9xxx->irq_base)
+ return;
+ free_irq(wcd9xxx->irq_base + irq, data);
+}
+static inline void wcd9xxx_enable_irq(struct wcd9xxx *wcd9xxx, int irq)
+{
+ if (!wcd9xxx->irq_base)
+ return;
+ enable_irq(wcd9xxx->irq_base + irq);
+}
+static inline void wcd9xxx_disable_irq(struct wcd9xxx *wcd9xxx, int irq)
+{
+ if (!wcd9xxx->irq_base)
+ return;
+ disable_irq_nosync(wcd9xxx->irq_base + irq);
+}
+
+#endif
diff --git a/include/linux/mfd/wcd9310/pdata.h b/include/linux/mfd/wcd9xxx/pdata.h
similarity index 71%
rename from include/linux/mfd/wcd9310/pdata.h
rename to include/linux/mfd/wcd9xxx/pdata.h
index af801f0..db76294 100644
--- a/include/linux/mfd/wcd9310/pdata.h
+++ b/include/linux/mfd/wcd9xxx/pdata.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -16,6 +16,15 @@
#include <linux/slimbus/slimbus.h>
+#define SITAR_LDOH_1P95_V 0x0
+#define SITAR_LDOH_2P35_V 0x1
+#define SITAR_LDOH_2P75_V 0x2
+#define SITAR_LDOH_2P85_V 0x3
+
+#define SITAR_CFILT1_SEL 0x0
+#define SITAR_CFILT2_SEL 0x1
+#define SITAR_CFILT3_SEL 0x2
+
#define TABLA_LDOH_1P95_V 0x0
#define TABLA_LDOH_2P35_V 0x1
#define TABLA_LDOH_2P75_V 0x2
@@ -51,7 +60,7 @@
#define TABLA_DCYCLE_3839 0xE
#define TABLA_DCYCLE_4095 0xF
-struct tabla_amic {
+struct wcd9xxx_amic {
/*legacy mode, txfe_enable and txfe_buff take 7 input
* each bit represent the channel / TXFE number
* and numbered as below
@@ -75,7 +84,7 @@
* If ldoh_v = 2.85 250 mv < cfiltx_mv < 2700 mv
*/
-struct tabla_micbias_setting {
+struct wcd9xxx_micbias_setting {
u8 ldoh_v;
u32 cfilt1_mv; /* in mv */
u32 cfilt2_mv; /* in mv */
@@ -86,7 +95,7 @@
u8 bias4_cfilt_sel;
};
-struct tabla_ocp_setting {
+struct wcd9xxx_ocp_setting {
unsigned int use_pdata:1; /* 0 - use sys default as recommended */
unsigned int num_attempts:4; /* up to 15 attempts */
unsigned int run_time:4; /* in duty cycle */
@@ -94,15 +103,39 @@
unsigned int hph_ocp_limit:3; /* Headphone OCP current limit */
};
-struct tabla_pdata {
+#define MAX_REGULATOR 6
+/*
+ * format : TABLA_<POWER_SUPPLY_PIN_NAME>_CUR_MAX
+ *
+ * <POWER_SUPPLY_PIN_NAME> from Tabla objective spec
+*/
+
+#define WCD9XXX_CDC_VDDA_CP_CUR_MAX 500000
+#define WCD9XXX_CDC_VDDA_RX_CUR_MAX 20000
+#define WCD9XXX_CDC_VDDA_TX_CUR_MAX 20000
+#define WCD9XXX_VDDIO_CDC_CUR_MAX 5000
+
+#define WCD9XXX_VDDD_CDC_D_CUR_MAX 5000
+#define WCD9XXX_VDDD_CDC_A_CUR_MAX 5000
+
+struct wcd9xxx_regulator {
+ const char *name;
+ int min_uV;
+ int max_uV;
+ int optimum_uA;
+ struct regulator *regulator;
+};
+
+struct wcd9xxx_pdata {
int irq;
int irq_base;
int num_irqs;
int reset_gpio;
- struct tabla_amic amic_settings;
+ struct wcd9xxx_amic amic_settings;
struct slim_device slimbus_slave_device;
- struct tabla_micbias_setting micbias;
- struct tabla_ocp_setting ocp;
+ struct wcd9xxx_micbias_setting micbias;
+ struct wcd9xxx_ocp_setting ocp;
+ struct wcd9xxx_regulator regulator[MAX_REGULATOR];
};
#endif
diff --git a/include/linux/mfd/wcd9xxx/wcd9304_registers.h b/include/linux/mfd/wcd9xxx/wcd9304_registers.h
new file mode 100644
index 0000000..df54e02
--- /dev/null
+++ b/include/linux/mfd/wcd9xxx/wcd9304_registers.h
@@ -0,0 +1,742 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef SITAR_CODEC_DIGITAL_H
+#define SITAR_CODEC_DIGITAL_H
+
+#define SITAR_A_PIN_CTL_OE0 (0x10)
+#define SITAR_A_PIN_CTL_OE0__POR (0x00000000)
+#define SITAR_A_PIN_CTL_OE1 (0x11)
+#define SITAR_A_PIN_CTL_OE1__POR (0x00000000)
+#define SITAR_A_PIN_CTL_DATA0 (0x12)
+#define SITAR_A_PIN_CTL_DATA0__POR (0x00000000)
+#define SITAR_A_PIN_CTL_DATA1 (0x13)
+#define SITAR_A_PIN_CTL_DATA1__POR (0x00000000)
+#define SITAR_A_HDRIVE_GENERIC (0x18)
+#define SITAR_A_HDRIVE_GENERIC__POR (0x00000000)
+#define SITAR_A_HDRIVE_OVERRIDE (0x19)
+#define SITAR_A_HDRIVE_OVERRIDE__POR (0x00000008)
+#define SITAR_A_ANA_CSR_WAIT_STATE (0x20)
+#define SITAR_A_ANA_CSR_WAIT_STATE__POR (0x00000044)
+#define SITAR_A_PROCESS_MONITOR_CTL0 (0x40)
+#define SITAR_A_PROCESS_MONITOR_CTL0__POR (0x00000080)
+#define SITAR_A_PROCESS_MONITOR_CTL1 (0x41)
+#define SITAR_A_PROCESS_MONITOR_CTL1__POR (0x00000000)
+#define SITAR_A_PROCESS_MONITOR_CTL2 (0x42)
+#define SITAR_A_PROCESS_MONITOR_CTL2__POR (0x00000000)
+#define SITAR_A_PROCESS_MONITOR_CTL3 (0x43)
+#define SITAR_A_PROCESS_MONITOR_CTL3__POR (0x00000001)
+#define SITAR_A_QFUSE_CTL (0x48)
+#define SITAR_A_QFUSE_CTL__POR (0x00000000)
+#define SITAR_A_QFUSE_STATUS (0x49)
+#define SITAR_A_QFUSE_STATUS__POR (0x00000000)
+#define SITAR_A_QFUSE_DATA_OUT0 (0x4A)
+#define SITAR_A_QFUSE_DATA_OUT0__POR (0x00000000)
+#define SITAR_A_QFUSE_DATA_OUT1 (0x4B)
+#define SITAR_A_QFUSE_DATA_OUT1__POR (0x00000000)
+#define SITAR_A_QFUSE_DATA_OUT2 (0x4C)
+#define SITAR_A_QFUSE_DATA_OUT2__POR (0x00000000)
+#define SITAR_A_QFUSE_DATA_OUT3 (0x4D)
+#define SITAR_A_QFUSE_DATA_OUT3__POR (0x00000000)
+#define SITAR_A_QFUSE_DATA_OUT4 (0x4E)
+#define SITAR_A_QFUSE_DATA_OUT4__POR (0x00000000)
+#define SITAR_A_QFUSE_DATA_OUT5 (0x4F)
+#define SITAR_A_QFUSE_DATA_OUT5__POR (0x00000000)
+#define SITAR_A_QFUSE_DATA_OUT6 (0x50)
+#define SITAR_A_QFUSE_DATA_OUT6__POR (0x00000000)
+#define SITAR_A_QFUSE_DATA_OUT7 (0x51)
+#define SITAR_A_QFUSE_DATA_OUT7__POR (0x00000000)
+#define SITAR_A_CDC_CTL (0x80)
+#define SITAR_A_CDC_CTL__POR (0x00000000)
+#define SITAR_A_LEAKAGE_CTL (0x88)
+#define SITAR_A_LEAKAGE_CTL__POR (0x00000004)
+#define SITAR_A_INTR_MODE (0x90)
+#define SITAR_A_INTR_MODE__POR (0x00000000)
+#define SITAR_A_INTR_MASK0 (0x94)
+#define SITAR_A_INTR_MASK0__POR (0x000000ff)
+#define SITAR_A_INTR_MASK1 (0x95)
+#define SITAR_A_INTR_MASK1__POR (0x000000ff)
+#define SITAR_A_INTR_MASK2 (0x96)
+#define SITAR_A_INTR_MASK2__POR (0x000000ff)
+#define SITAR_A_INTR_STATUS0 (0x98)
+#define SITAR_A_INTR_STATUS0__POR (0x00000000)
+#define SITAR_A_INTR_STATUS1 (0x99)
+#define SITAR_A_INTR_STATUS1__POR (0x00000000)
+#define SITAR_A_INTR_STATUS2 (0x9A)
+#define SITAR_A_INTR_STATUS2__POR (0x00000000)
+#define SITAR_A_INTR_CLEAR0 (0x9C)
+#define SITAR_A_INTR_CLEAR0__POR (0x00000000)
+#define SITAR_A_INTR_CLEAR1 (0x9D)
+#define SITAR_A_INTR_CLEAR1__POR (0x00000000)
+#define SITAR_A_INTR_CLEAR2 (0x9E)
+#define SITAR_A_INTR_CLEAR2__POR (0x00000000)
+#define SITAR_A_INTR_LEVEL0 (0xA0)
+#define SITAR_A_INTR_LEVEL0__POR (0x00000001)
+#define SITAR_A_INTR_LEVEL1 (0xA1)
+#define SITAR_A_INTR_LEVEL1__POR (0x00000000)
+#define SITAR_A_INTR_LEVEL2 (0xA2)
+#define SITAR_A_INTR_LEVEL2__POR (0x00000000)
+#define SITAR_A_INTR_TEST0 (0xA4)
+#define SITAR_A_INTR_TEST0__POR (0x00000000)
+#define SITAR_A_INTR_TEST1 (0xA5)
+#define SITAR_A_INTR_TEST1__POR (0x00000000)
+#define SITAR_A_INTR_TEST2 (0xA6)
+#define SITAR_A_INTR_TEST2__POR (0x00000000)
+#define SITAR_A_INTR_SET0 (0xA8)
+#define SITAR_A_INTR_SET0__POR (0x00000000)
+#define SITAR_A_INTR_SET1 (0xA9)
+#define SITAR_A_INTR_SET1__POR (0x00000000)
+#define SITAR_A_INTR_SET2 (0xAA)
+#define SITAR_A_INTR_SET2__POR (0x00000000)
+#define SITAR_A_CDC_TX_I2S_SCK_MODE (0xC0)
+#define SITAR_A_CDC_TX_I2S_SCK_MODE__POR (0x00000000)
+#define SITAR_A_CDC_TX_I2S_WS_MODE (0xC1)
+#define SITAR_A_CDC_TX_I2S_WS_MODE__POR (0x00000000)
+#define SITAR_A_CDC_DMIC_DATA0_MODE (0xC4)
+#define SITAR_A_CDC_DMIC_DATA0_MODE__POR (0x00000000)
+#define SITAR_A_CDC_DMIC_CLK0_MODE (0xC5)
+#define SITAR_A_CDC_DMIC_CLK0_MODE__POR (0x00000000)
+#define SITAR_A_CDC_DMIC_DATA1_MODE (0xC6)
+#define SITAR_A_CDC_DMIC_DATA1_MODE__POR (0x00000000)
+#define SITAR_A_CDC_DMIC_CLK1_MODE (0xC7)
+#define SITAR_A_CDC_DMIC_CLK1_MODE__POR (0x00000000)
+#define SITAR_A_CDC_TX_I2S_SD0_MODE (0xC8)
+#define SITAR_A_CDC_TX_I2S_SD0_MODE__POR (0x00000000)
+#define SITAR_A_CDC_INTR_MODE (0xC9)
+#define SITAR_A_CDC_INTR_MODE__POR (0x00000000)
+#define SITAR_A_CDC_RX_I2S_SD0_MODE (0xCA)
+#define SITAR_A_CDC_RX_I2S_SD0_MODE__POR (0x00000000)
+#define SITAR_A_CDC_RX_I2S_SD1_MODE (0xCB)
+#define SITAR_A_CDC_RX_I2S_SD1_MODE__POR (0x00000000)
+#define SITAR_A_BIAS_REF_CTL (0x100)
+#define SITAR_A_BIAS_REF_CTL__POR (0x0000001c)
+#define SITAR_A_BIAS_CENTRAL_BG_CTL (0x101)
+#define SITAR_A_BIAS_CENTRAL_BG_CTL__POR (0x00000050)
+#define SITAR_A_BIAS_PRECHRG_CTL (0x102)
+#define SITAR_A_BIAS_PRECHRG_CTL__POR (0x00000007)
+#define SITAR_A_BIAS_CURR_CTL_1 (0x103)
+#define SITAR_A_BIAS_CURR_CTL_1__POR (0x00000052)
+#define SITAR_A_BIAS_CURR_CTL_2 (0x104)
+#define SITAR_A_BIAS_CURR_CTL_2__POR (0x00000000)
+#define SITAR_A_BIAS_OSC_BG_CTL (0x105)
+#define SITAR_A_BIAS_OSC_BG_CTL__POR (0x00000016)
+#define SITAR_A_CLK_BUFF_EN1 (0x108)
+#define SITAR_A_CLK_BUFF_EN1__POR (0x00000004)
+#define SITAR_A_CLK_BUFF_EN2 (0x109)
+#define SITAR_A_CLK_BUFF_EN2__POR (0x00000002)
+#define SITAR_A_LDO_H_MODE_1 (0x110)
+#define SITAR_A_LDO_H_MODE_1__POR (0x00000065)
+#define SITAR_A_LDO_H_MODE_2 (0x111)
+#define SITAR_A_LDO_H_MODE_2__POR (0x000000a8)
+#define SITAR_A_LDO_H_LOOP_CTL (0x112)
+#define SITAR_A_LDO_H_LOOP_CTL__POR (0x0000006b)
+#define SITAR_A_LDO_H_COMP_1 (0x113)
+#define SITAR_A_LDO_H_COMP_1__POR (0x00000084)
+#define SITAR_A_LDO_H_COMP_2 (0x114)
+#define SITAR_A_LDO_H_COMP_2__POR (0x000000e0)
+#define SITAR_A_LDO_H_BIAS_1 (0x115)
+#define SITAR_A_LDO_H_BIAS_1__POR (0x0000006d)
+#define SITAR_A_LDO_H_BIAS_2 (0x116)
+#define SITAR_A_LDO_H_BIAS_2__POR (0x000000a5)
+#define SITAR_A_LDO_H_BIAS_3 (0x117)
+#define SITAR_A_LDO_H_BIAS_3__POR (0x00000060)
+#define SITAR_A_MICB_CFILT_1_CTL (0x128)
+#define SITAR_A_MICB_CFILT_1_CTL__POR (0x00000040)
+#define SITAR_A_MICB_CFILT_1_VAL (0x129)
+#define SITAR_A_MICB_CFILT_1_VAL__POR (0x00000080)
+#define SITAR_A_MICB_CFILT_1_PRECHRG (0x12A)
+#define SITAR_A_MICB_CFILT_1_PRECHRG__POR (0x00000038)
+#define SITAR_A_MICB_1_CTL (0x12B)
+#define SITAR_A_MICB_1_CTL__POR (0x00000016)
+#define SITAR_A_MICB_1_INT_RBIAS (0x12C)
+#define SITAR_A_MICB_1_INT_RBIAS__POR (0x00000024)
+#define SITAR_A_MICB_1_MBHC (0x12D)
+#define SITAR_A_MICB_1_MBHC__POR (0x00000001)
+#define SITAR_A_MICB_CFILT_2_CTL (0x12E)
+#define SITAR_A_MICB_CFILT_2_CTL__POR (0x00000040)
+#define SITAR_A_MICB_CFILT_2_VAL (0x12F)
+#define SITAR_A_MICB_CFILT_2_VAL__POR (0x00000080)
+#define SITAR_A_MICB_CFILT_2_PRECHRG (0x130)
+#define SITAR_A_MICB_CFILT_2_PRECHRG__POR (0x00000038)
+#define SITAR_A_MICB_2_CTL (0x131)
+#define SITAR_A_MICB_2_CTL__POR (0x00000016)
+#define SITAR_A_MICB_2_INT_RBIAS (0x132)
+#define SITAR_A_MICB_2_INT_RBIAS__POR (0x00000024)
+#define SITAR_A_MICB_2_MBHC (0x133)
+#define SITAR_A_MICB_2_MBHC__POR (0x00000002)
+#define SITAR_A_TX_COM_BIAS (0x14C)
+#define SITAR_A_TX_COM_BIAS__POR (0x000000e0)
+#define SITAR_A_MBHC_SCALING_MUX_1 (0x14E)
+#define SITAR_A_MBHC_SCALING_MUX_1__POR (0x00000000)
+#define SITAR_A_MBHC_SCALING_MUX_2 (0x14F)
+#define SITAR_A_MBHC_SCALING_MUX_2__POR (0x00000080)
+#define SITAR_A_TX_SUP_SWITCH_CTRL_1 (0x151)
+#define SITAR_A_TX_SUP_SWITCH_CTRL_1__POR (0x00000000)
+#define SITAR_A_TX_SUP_SWITCH_CTRL_2 (0x152)
+#define SITAR_A_TX_SUP_SWITCH_CTRL_2__POR (0x00000080)
+#define SITAR_A_TX_1_2_EN (0x153)
+#define SITAR_A_TX_1_2_EN__POR (0x00000000)
+#define SITAR_A_TX_1_2_TEST_EN (0x154)
+#define SITAR_A_TX_1_2_TEST_EN__POR (0x000000cc)
+#define SITAR_A_TX_1_2_ADC_CH1 (0x155)
+#define SITAR_A_TX_1_2_ADC_CH1__POR (0x00000044)
+#define SITAR_A_TX_1_2_ADC_CH2 (0x156)
+#define SITAR_A_TX_1_2_ADC_CH2__POR (0x00000044)
+#define SITAR_A_TX_1_2_ATEST_REFCTRL (0x157)
+#define SITAR_A_TX_1_2_ATEST_REFCTRL__POR (0x00000000)
+#define SITAR_A_TX_1_2_TEST_CTL (0x158)
+#define SITAR_A_TX_1_2_TEST_CTL__POR (0x00000038)
+#define SITAR_A_TX_1_2_TEST_BLOCK_EN (0x159)
+#define SITAR_A_TX_1_2_TEST_BLOCK_EN__POR (0x000000fc)
+#define SITAR_A_TX_1_2_TXFE_CLKDIV (0x15A)
+#define SITAR_A_TX_1_2_TXFE_CLKDIV__POR (0x000000ee)
+#define SITAR_A_TX_1_2_SAR_ERR_CH1 (0x15B)
+#define SITAR_A_TX_1_2_SAR_ERR_CH1__POR (0x00000000)
+#define SITAR_A_TX_1_2_SAR_ERR_CH2 (0x15C)
+#define SITAR_A_TX_1_2_SAR_ERR_CH2__POR (0x00000000)
+#define SITAR_A_TX_3_EN (0x15D)
+#define SITAR_A_TX_3_EN__POR (0x00000000)
+#define SITAR_A_TX_3_TEST_EN (0x15E)
+#define SITAR_A_TX_3_TEST_EN__POR (0x000000cc)
+#define SITAR_A_TX_3_ADC (0x15F)
+#define SITAR_A_TX_3_ADC__POR (0x00000044)
+#define SITAR_A_TX_3_MBHC_ATEST_REFCTRL (0x161)
+#define SITAR_A_TX_3_MBHC_ATEST_REFCTRL__POR (0x00000000)
+#define SITAR_A_TX_3_TEST_CTL (0x162)
+#define SITAR_A_TX_3_TEST_CTL__POR (0x00000038)
+#define SITAR_A_TX_3_TEST_BLOCK_EN (0x163)
+#define SITAR_A_TX_3_TEST_BLOCK_EN__POR (0x000000fc)
+#define SITAR_A_TX_3_TXFE_CKDIV (0x164)
+#define SITAR_A_TX_3_TXFE_CKDIV__POR (0x000000ee)
+#define SITAR_A_TX_3_SAR_ERR (0x165)
+#define SITAR_A_TX_3_SAR_ERR__POR (0x00000000)
+#define SITAR_A_TX_4_MBHC_EN (0x171)
+#define SITAR_A_TX_4_MBHC_EN__POR (0x0000000c)
+#define SITAR_A_TX_4_MBHC_ADC (0x173)
+#define SITAR_A_TX_4_MBHC_ADC__POR (0x00000044)
+#define SITAR_A_TX_4_MBHC_TEST_CTL (0x174)
+#define SITAR_A_TX_4_MBHC_TEST_CTL__POR (0x00000038)
+#define SITAR_A_TX_4_MBHC_SAR_ERR (0x175)
+#define SITAR_A_TX_4_MBHC_SAR_ERR__POR (0x00000000)
+#define SITAR_A_TX_4_TXFE_CLKDIV (0x176)
+#define SITAR_A_TX_4_TXFE_CLKDIV__POR (0x0000001c)
+#define SITAR_A_AUX_COM_CTL (0x180)
+#define SITAR_A_AUX_COM_CTL__POR (0x00000034)
+#define SITAR_A_AUX_COM_ATEST (0x181)
+#define SITAR_A_AUX_COM_ATEST__POR (0x00000000)
+#define SITAR_A_AUX_L_EN (0x182)
+#define SITAR_A_AUX_L_EN__POR (0x00000000)
+#define SITAR_A_AUX_L_GAIN (0x183)
+#define SITAR_A_AUX_L_GAIN__POR (0x0000001f)
+#define SITAR_A_AUX_L_PA_CONN (0x184)
+#define SITAR_A_AUX_L_PA_CONN__POR (0x00000000)
+#define SITAR_A_AUX_L_PA_CONN_INV (0x185)
+#define SITAR_A_AUX_L_PA_CONN_INV__POR (0x00000000)
+#define SITAR_A_AUX_R_EN (0x186)
+#define SITAR_A_AUX_R_EN__POR (0x00000000)
+#define SITAR_A_AUX_R_GAIN (0x187)
+#define SITAR_A_AUX_R_GAIN__POR (0x0000001f)
+#define SITAR_A_AUX_R_PA_CONN (0x188)
+#define SITAR_A_AUX_R_PA_CONN__POR (0x00000000)
+#define SITAR_A_AUX_R_PA_CONN_INV (0x189)
+#define SITAR_A_AUX_R_PA_CONN_INV__POR (0x00000000)
+#define SITAR_A_CP_EN (0x192)
+#define SITAR_A_CP_EN__POR (0x000000e6)
+#define SITAR_A_CP_CLK (0x193)
+#define SITAR_A_CP_CLK__POR (0x00000029)
+#define SITAR_A_CP_STATIC (0x194)
+#define SITAR_A_CP_STATIC__POR (0x00000010)
+#define SITAR_A_CP_DCC1 (0x195)
+#define SITAR_A_CP_DCC1__POR (0x00000052)
+#define SITAR_A_CP_DCC3 (0x196)
+#define SITAR_A_CP_DCC3__POR (0x00000001)
+#define SITAR_A_CP_ATEST (0x197)
+#define SITAR_A_CP_ATEST__POR (0x00000000)
+#define SITAR_A_CP_DTEST (0x198)
+#define SITAR_A_CP_DTEST__POR (0x00000000)
+#define SITAR_A_RX_COM_TIMER_DIV (0x19E)
+#define SITAR_A_RX_COM_TIMER_DIV__POR (0x000000e8)
+#define SITAR_A_RX_COM_OCP_CTL (0x19F)
+#define SITAR_A_RX_COM_OCP_CTL__POR (0x0000001f)
+#define SITAR_A_RX_COM_OCP_COUNT (0x1A0)
+#define SITAR_A_RX_COM_OCP_COUNT__POR (0x00000077)
+#define SITAR_A_RX_COM_DAC_CTL (0x1A1)
+#define SITAR_A_RX_COM_DAC_CTL__POR (0x00000000)
+#define SITAR_A_RX_COM_BIAS (0x1A2)
+#define SITAR_A_RX_COM_BIAS__POR (0x00000000)
+#define SITAR_A_RX_HPH_BIAS_PA (0x1A6)
+#define SITAR_A_RX_HPH_BIAS_PA__POR (0x00000057)
+#define SITAR_A_RX_HPH_BIAS_LDO (0x1A7)
+#define SITAR_A_RX_HPH_BIAS_LDO__POR (0x00000056)
+#define SITAR_A_RX_HPH_BIAS_CNP (0x1A8)
+#define SITAR_A_RX_HPH_BIAS_CNP__POR (0x0000008a)
+#define SITAR_A_RX_HPH_BIAS_WG (0x1A9)
+#define SITAR_A_RX_HPH_BIAS_WG__POR (0x00000060)
+#define SITAR_A_RX_HPH_OCP_CTL (0x1AA)
+#define SITAR_A_RX_HPH_OCP_CTL__POR (0x000000e8)
+#define SITAR_A_RX_HPH_CNP_EN (0x1AB)
+#define SITAR_A_RX_HPH_CNP_EN__POR (0x00000080)
+#define SITAR_A_RX_HPH_CNP_WG_CTL (0x1AC)
+#define SITAR_A_RX_HPH_CNP_WG_CTL__POR (0x000000dc)
+#define SITAR_A_RX_HPH_CNP_WG_TIME (0x1AD)
+#define SITAR_A_RX_HPH_CNP_WG_TIME__POR (0x00000028)
+#define SITAR_A_RX_HPH_L_GAIN (0x1AE)
+#define SITAR_A_RX_HPH_L_GAIN__POR (0x00000000)
+#define SITAR_A_RX_HPH_L_TEST (0x1AF)
+#define SITAR_A_RX_HPH_L_TEST__POR (0x00000001)
+#define SITAR_A_RX_HPH_L_PA_CTL (0x1B0)
+#define SITAR_A_RX_HPH_L_PA_CTL__POR (0x00000040)
+#define SITAR_A_RX_HPH_L_DAC_CTL (0x1B1)
+#define SITAR_A_RX_HPH_L_DAC_CTL__POR (0x00000000)
+#define SITAR_A_RX_HPH_L_ATEST (0x1B2)
+#define SITAR_A_RX_HPH_L_ATEST__POR (0x00000000)
+#define SITAR_A_RX_HPH_L_STATUS (0x1B3)
+#define SITAR_A_RX_HPH_L_STATUS__POR (0x00000004)
+#define SITAR_A_RX_HPH_R_GAIN (0x1B4)
+#define SITAR_A_RX_HPH_R_GAIN__POR (0x00000000)
+#define SITAR_A_RX_HPH_R_TEST (0x1B5)
+#define SITAR_A_RX_HPH_R_TEST__POR (0x00000001)
+#define SITAR_A_RX_HPH_R_PA_CTL (0x1B6)
+#define SITAR_A_RX_HPH_R_PA_CTL__POR (0x00000040)
+#define SITAR_A_RX_HPH_R_DAC_CTL (0x1B7)
+#define SITAR_A_RX_HPH_R_DAC_CTL__POR (0x00000000)
+#define SITAR_A_RX_HPH_R_ATEST (0x1B8)
+#define SITAR_A_RX_HPH_R_ATEST__POR (0x00000000)
+#define SITAR_A_RX_HPH_R_STATUS (0x1B9)
+#define SITAR_A_RX_HPH_R_STATUS__POR (0x00000004)
+#define SITAR_A_RX_EAR_BIAS_PA (0x1BA)
+#define SITAR_A_RX_EAR_BIAS_PA__POR (0x000000a6)
+#define SITAR_A_RX_EAR_BIAS_CMBUFF (0x1BB)
+#define SITAR_A_RX_EAR_BIAS_CMBUFF__POR (0x000000a0)
+#define SITAR_A_RX_EAR_EN (0x1BC)
+#define SITAR_A_RX_EAR_EN__POR (0x00000000)
+#define SITAR_A_RX_EAR_GAIN (0x1BD)
+#define SITAR_A_RX_EAR_GAIN__POR (0x00000002)
+#define SITAR_A_RX_EAR_CMBUFF (0x1BE)
+#define SITAR_A_RX_EAR_CMBUFF__POR (0x00000004)
+#define SITAR_A_RX_EAR_ICTL (0x1BF)
+#define SITAR_A_RX_EAR_ICTL__POR (0x00000040)
+#define SITAR_A_RX_EAR_CCOMP (0x1C0)
+#define SITAR_A_RX_EAR_CCOMP__POR (0x00000008)
+#define SITAR_A_RX_EAR_VCM (0x1C1)
+#define SITAR_A_RX_EAR_VCM__POR (0x00000003)
+#define SITAR_A_RX_EAR_CNP (0x1C2)
+#define SITAR_A_RX_EAR_CNP__POR (0x000000f2)
+#define SITAR_A_RX_EAR_ATEST (0x1C3)
+#define SITAR_A_RX_EAR_ATEST__POR (0x00000000)
+#define SITAR_A_RX_EAR_STATUS (0x1C5)
+#define SITAR_A_RX_EAR_STATUS__POR (0x00000004)
+#define SITAR_A_RX_LINE_BIAS_PA (0x1C6)
+#define SITAR_A_RX_LINE_BIAS_PA__POR (0x000000aa)
+#define SITAR_A_RX_LINE_BIAS_LDO (0x1C7)
+#define SITAR_A_RX_LINE_BIAS_LDO__POR (0x00000086)
+#define SITAR_A_RX_LINE_BIAS_CNP1 (0x1C8)
+#define SITAR_A_RX_LINE_BIAS_CNP1__POR (0x00000060)
+#define SITAR_A_RX_LINE_COM (0x1C9)
+#define SITAR_A_RX_LINE_COM__POR (0x00000000)
+#define SITAR_A_RX_LINE_CNP_EN (0x1CA)
+#define SITAR_A_RX_LINE_CNP_EN__POR (0x00000080)
+#define SITAR_A_RX_LINE_CNP_WG_CTL (0x1CB)
+#define SITAR_A_RX_LINE_CNP_WG_CTL__POR (0x000000dc)
+#define SITAR_A_RX_LINE_CNP_WG_TIME (0x1CC)
+#define SITAR_A_RX_LINE_CNP_WG_TIME__POR (0x00000028)
+#define SITAR_A_RX_LINE_1_GAIN (0x1CD)
+#define SITAR_A_RX_LINE_1_GAIN__POR (0x00000000)
+#define SITAR_A_RX_LINE_1_TEST (0x1CE)
+#define SITAR_A_RX_LINE_1_TEST__POR (0x00000001)
+#define SITAR_A_RX_LINE_1_DAC_CTL (0x1CF)
+#define SITAR_A_RX_LINE_1_DAC_CTL__POR (0x00000000)
+#define SITAR_A_RX_LINE_1_STATUS (0x1D0)
+#define SITAR_A_RX_LINE_1_STATUS__POR (0x00000004)
+#define SITAR_A_RX_LINE_2_GAIN (0x1D1)
+#define SITAR_A_RX_LINE_2_GAIN__POR (0x00000000)
+#define SITAR_A_RX_LINE_2_TEST (0x1D2)
+#define SITAR_A_RX_LINE_2_TEST__POR (0x00000001)
+#define SITAR_A_RX_LINE_2_DAC_CTL (0x1D3)
+#define SITAR_A_RX_LINE_2_DAC_CTL__POR (0x00000000)
+#define SITAR_A_RX_LINE_2_STATUS (0x1D4)
+#define SITAR_A_RX_LINE_2_STATUS__POR (0x00000004)
+#define SITAR_A_RX_LINE_BIAS_CNP2 (0x1E1)
+#define SITAR_A_RX_LINE_BIAS_CNP2__POR (0x0000008a)
+#define SITAR_A_RX_LINE_OCP_CTL (0x1E2)
+#define SITAR_A_RX_LINE_OCP_CTL__POR (0x000000e8)
+#define SITAR_A_RX_LINE_1_PA_CTL (0x1E3)
+#define SITAR_A_RX_LINE_1_PA_CTL__POR (0x00000040)
+#define SITAR_A_RX_LINE_2_PA_CTL (0x1E4)
+#define SITAR_A_RX_LINE_2_PA_CTL__POR (0x00000040)
+#define SITAR_A_RX_LINE_CNP_DBG (0x1EC)
+#define SITAR_A_RX_LINE_CNP_DBG__POR (0x00000000)
+#define SITAR_A_MBHC_HPH (0x1ED)
+#define SITAR_A_MBHC_HPH__POR (0x00000048)
+#define SITAR_A_RC_OSC_FREQ (0x1F7)
+#define SITAR_A_RC_OSC_FREQ__POR (0x00000046)
+#define SITAR_A_RC_OSC_TEST (0x1F8)
+#define SITAR_A_RC_OSC_TEST__POR (0x0000000a)
+#define SITAR_A_RC_OSC_STATUS (0x1F9)
+#define SITAR_A_RC_OSC_STATUS__POR (0x0000001c)
+#define SITAR_A_RC_OSC_TUNER (0x1FA)
+#define SITAR_A_RC_OSC_TUNER__POR (0x00000000)
+#define SITAR_A_CDC_ANC1_CTL (0x200)
+#define SITAR_A_CDC_ANC1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_ANC1_SHIFT (0x201)
+#define SITAR_A_CDC_ANC1_SHIFT__POR (0x00000000)
+#define SITAR_A_CDC_ANC1_IIR_B1_CTL (0x202)
+#define SITAR_A_CDC_ANC1_IIR_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_ANC1_IIR_B2_CTL (0x203)
+#define SITAR_A_CDC_ANC1_IIR_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_ANC1_IIR_B3_CTL (0x204)
+#define SITAR_A_CDC_ANC1_IIR_B3_CTL__POR (0x00000000)
+#define SITAR_A_CDC_ANC1_IIR_B4_CTL (0x205)
+#define SITAR_A_CDC_ANC1_IIR_B4_CTL__POR (0x00000000)
+#define SITAR_A_CDC_ANC1_LPF_B1_CTL (0x206)
+#define SITAR_A_CDC_ANC1_LPF_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_ANC1_LPF_B2_CTL (0x207)
+#define SITAR_A_CDC_ANC1_LPF_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_ANC1_LPF_B3_CTL (0x208)
+#define SITAR_A_CDC_ANC1_LPF_B3_CTL__POR (0x00000000)
+#define SITAR_A_CDC_ANC1_SPARE (0x209)
+#define SITAR_A_CDC_ANC1_SPARE__POR (0x00000000)
+#define SITAR_A_CDC_ANC1_SMLPF_CTL (0x20A)
+#define SITAR_A_CDC_ANC1_SMLPF_CTL__POR (0x00000000)
+#define SITAR_A_CDC_ANC1_DCFLT_CTL (0x20B)
+#define SITAR_A_CDC_ANC1_DCFLT_CTL__POR (0x00000000)
+#define SITAR_A_CDC_TX1_VOL_CTL_TIMER (0x220)
+#define SITAR_A_CDC_TX1_VOL_CTL_TIMER__POR (0x00000000)
+#define SITAR_A_CDC_TX1_VOL_CTL_GAIN (0x221)
+#define SITAR_A_CDC_TX1_VOL_CTL_GAIN__POR (0x00000000)
+#define SITAR_A_CDC_TX1_VOL_CTL_CFG (0x222)
+#define SITAR_A_CDC_TX1_VOL_CTL_CFG__POR (0x00000000)
+#define SITAR_A_CDC_TX1_MUX_CTL (0x223)
+#define SITAR_A_CDC_TX1_MUX_CTL__POR (0x00000008)
+#define SITAR_A_CDC_TX1_CLK_FS_CTL (0x224)
+#define SITAR_A_CDC_TX1_CLK_FS_CTL__POR (0x00000003)
+#define SITAR_A_CDC_TX1_DMIC_CTL (0x225)
+#define SITAR_A_CDC_TX1_DMIC_CTL__POR (0x00000000)
+#define SITAR_A_CDC_SRC1_PDA_CFG (0x2A0)
+#define SITAR_A_CDC_SRC1_PDA_CFG__POR (0x00000000)
+#define SITAR_A_CDC_SRC1_FS_CTL (0x2A1)
+#define SITAR_A_CDC_SRC1_FS_CTL__POR (0x0000001b)
+
+#define SITAR_A_CDC_RX1_B1_CTL (0x000002B0)
+#define SITAR_A_CDC_RX1_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_RX2_B1_CTL (0x000002B8)
+#define SITAR_A_CDC_RX2_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_RX3_B1_CTL (0x000002C0)
+#define SITAR_A_CDC_RX3_B1_CTL__POR (0x00000000)
+
+#define SITAR_A_CDC_RX1_B2_CTL (0x000002B1)
+#define SITAR_A_CDC_RX1_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_RX2_B2_CTL (0x000002B9)
+#define SITAR_A_CDC_RX2_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_RX3_B2_CTL (0x000002C1)
+#define SITAR_A_CDC_RX3_B2_CTL__POR (0x00000000)
+
+#define SITAR_A_CDC_RX1_B3_CTL (0x000002B2)
+#define SITAR_A_CDC_RX1_B3_CTL__POR (0x00000000)
+#define SITAR_A_CDC_RX2_B3_CTL (0x000002BA)
+#define SITAR_A_CDC_RX2_B3_CTL__POR (0x00000000)
+#define SITAR_A_CDC_RX3_B3_CTL (0x000002C2)
+#define SITAR_A_CDC_RX3_B3_CTL__POR (0x00000000)
+
+#define SITAR_A_CDC_RX1_B4_CTL (0x000002B3)
+#define SITAR_A_CDC_RX1_B4_CTL__POR (0x00000000)
+#define SITAR_A_CDC_RX2_B4_CTL (0x000002BB)
+#define SITAR_A_CDC_RX2_B4_CTL__POR (0x00000000)
+#define SITAR_A_CDC_RX3_B4_CTL (0x000002C3)
+#define SITAR_A_CDC_RX3_B4_CTL__POR (0x00000000)
+
+#define SITAR_A_CDC_RX1_B5_CTL (0x000002B4)
+#define SITAR_A_CDC_RX1_B5_CTL__POR (0x00000060)
+#define SITAR_A_CDC_RX2_B5_CTL (0x000002BC)
+#define SITAR_A_CDC_RX2_B5_CTL__POR (0x00000060)
+#define SITAR_A_CDC_RX3_B5_CTL (0x000002C4)
+#define SITAR_A_CDC_RX3_B5_CTL__POR (0x00000060)
+
+#define SITAR_A_CDC_RX1_B6_CTL (0x000002B5)
+#define SITAR_A_CDC_RX1_B6_CTL__POR (0x00000000)
+#define SITAR_A_CDC_RX2_B6_CTL (0x000002BD)
+#define SITAR_A_CDC_RX2_B6_CTL__POR (0x00000000)
+#define SITAR_A_CDC_RX3_B6_CTL (0x000002C5)
+#define SITAR_A_CDC_RX3_B6_CTL__POR (0x00000000)
+
+
+#define SITAR_A_CDC_RX1_VOL_CTL_B1_CTL (0x2B6)
+#define SITAR_A_CDC_RX1_VOL_CTL_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_RX1_VOL_CTL_B2_CTL (0x2B7)
+#define SITAR_A_CDC_RX1_VOL_CTL_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CLK_ANC_RESET_CTL (0x300)
+#define SITAR_A_CDC_CLK_ANC_RESET_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CLK_RX_RESET_CTL (0x301)
+#define SITAR_A_CDC_CLK_RX_RESET_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CLK_TX_RESET_B1_CTL (0x302)
+#define SITAR_A_CDC_CLK_TX_RESET_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CLK_TX_RESET_B2_CTL (0x303)
+#define SITAR_A_CDC_CLK_TX_RESET_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CLK_DMIC_CTL (0x304)
+#define SITAR_A_CDC_CLK_DMIC_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CLK_RX_I2S_CTL (0x305)
+#define SITAR_A_CDC_CLK_RX_I2S_CTL__POR (0x00000003)
+#define SITAR_A_CDC_CLK_TX_I2S_CTL (0x306)
+#define SITAR_A_CDC_CLK_TX_I2S_CTL__POR (0x00000003)
+#define SITAR_A_CDC_CLK_OTHR_RESET_CTL (0x307)
+#define SITAR_A_CDC_CLK_OTHR_RESET_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL (0x308)
+#define SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CLK_OTHR_CTL (0x30A)
+#define SITAR_A_CDC_CLK_OTHR_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CLK_RDAC_CLK_EN_CTL (0x30B)
+#define SITAR_A_CDC_CLK_RDAC_CLK_EN_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CLK_ANC_CLK_EN_CTL (0x30C)
+#define SITAR_A_CDC_CLK_ANC_CLK_EN_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CLK_RX_B1_CTL (0x30D)
+#define SITAR_A_CDC_CLK_RX_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CLK_RX_B2_CTL (0x30E)
+#define SITAR_A_CDC_CLK_RX_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CLK_MCLK_CTL (0x30F)
+#define SITAR_A_CDC_CLK_MCLK_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CLK_PDM_CTL (0x310)
+#define SITAR_A_CDC_CLK_PDM_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CLK_SD_CTL (0x311)
+#define SITAR_A_CDC_CLK_SD_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CLK_LP_CTL (0x312)
+#define SITAR_A_CDC_CLK_LP_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CLSG_FREQ_THRESH_B1_CTL (0x320)
+#define SITAR_A_CDC_CLSG_FREQ_THRESH_B1_CTL__POR (0x00000007)
+#define SITAR_A_CDC_CLSG_FREQ_THRESH_B2_CTL (0x321)
+#define SITAR_A_CDC_CLSG_FREQ_THRESH_B2_CTL__POR (0x00000013)
+#define SITAR_A_CDC_CLSG_FREQ_THRESH_B3_CTL (0x322)
+#define SITAR_A_CDC_CLSG_FREQ_THRESH_B3_CTL__POR (0x0000001b)
+#define SITAR_A_CDC_CLSG_FREQ_THRESH_B4_CTL (0x323)
+#define SITAR_A_CDC_CLSG_FREQ_THRESH_B4_CTL__POR (0x0000007f)
+#define SITAR_A_CDC_CLSG_GAIN_THRESH_CTL (0x324)
+#define SITAR_A_CDC_CLSG_GAIN_THRESH_CTL__POR (0x00000026)
+#define SITAR_A_CDC_CLSG_TIMER_B1_CFG (0x325)
+#define SITAR_A_CDC_CLSG_TIMER_B1_CFG__POR (0x0000000a)
+#define SITAR_A_CDC_CLSG_TIMER_B2_CFG (0x326)
+#define SITAR_A_CDC_CLSG_TIMER_B2_CFG__POR (0x00000000)
+#define SITAR_A_CDC_CLSG_CTL (0x327)
+#define SITAR_A_CDC_CLSG_CTL__POR (0x00000013)
+#define SITAR_A_CDC_IIR1_GAIN_B1_CTL (0x340)
+#define SITAR_A_CDC_IIR1_GAIN_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_IIR1_GAIN_B2_CTL (0x341)
+#define SITAR_A_CDC_IIR1_GAIN_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_IIR1_GAIN_B3_CTL (0x342)
+#define SITAR_A_CDC_IIR1_GAIN_B3_CTL__POR (0x00000000)
+#define SITAR_A_CDC_IIR1_GAIN_B4_CTL (0x343)
+#define SITAR_A_CDC_IIR1_GAIN_B4_CTL__POR (0x00000000)
+#define SITAR_A_CDC_IIR1_GAIN_B5_CTL (0x344)
+#define SITAR_A_CDC_IIR1_GAIN_B5_CTL__POR (0x00000000)
+#define SITAR_A_CDC_IIR1_GAIN_B6_CTL (0x345)
+#define SITAR_A_CDC_IIR1_GAIN_B6_CTL__POR (0x00000000)
+#define SITAR_A_CDC_IIR1_GAIN_B7_CTL (0x346)
+#define SITAR_A_CDC_IIR1_GAIN_B7_CTL__POR (0x00000000)
+#define SITAR_A_CDC_IIR1_GAIN_B8_CTL (0x347)
+#define SITAR_A_CDC_IIR1_GAIN_B8_CTL__POR (0x00000000)
+#define SITAR_A_CDC_IIR1_CTL (0x348)
+#define SITAR_A_CDC_IIR1_CTL__POR (0x00000040)
+#define SITAR_A_CDC_IIR1_GAIN_TIMER_CTL (0x349)
+#define SITAR_A_CDC_IIR1_GAIN_TIMER_CTL__POR (0x00000000)
+#define SITAR_A_CDC_IIR1_COEF_B1_CTL (0x34A)
+#define SITAR_A_CDC_IIR1_COEF_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_IIR1_COEF_B2_CTL (0x34B)
+#define SITAR_A_CDC_IIR1_COEF_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_IIR1_COEF_B3_CTL (0x34C)
+#define SITAR_A_CDC_IIR1_COEF_B3_CTL__POR (0x00000000)
+#define SITAR_A_CDC_IIR1_COEF_B4_CTL (0x34D)
+#define SITAR_A_CDC_IIR1_COEF_B4_CTL__POR (0x00000000)
+#define SITAR_A_CDC_IIR1_COEF_B5_CTL (0x34E)
+#define SITAR_A_CDC_IIR1_COEF_B5_CTL__POR (0x00000000)
+#define SITAR_A_CDC_TOP_GAIN_UPDATE (0x360)
+#define SITAR_A_CDC_TOP_GAIN_UPDATE__POR (0x00000000)
+#define SITAR_A_CDC_TOP_RDAC_DOUT_CTL (0x361)
+#define SITAR_A_CDC_TOP_RDAC_DOUT_CTL__POR (0x00000000)
+#define SITAR_A_CDC_DEBUG_B1_CTL (0x368)
+#define SITAR_A_CDC_DEBUG_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_DEBUG_B2_CTL (0x369)
+#define SITAR_A_CDC_DEBUG_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_DEBUG_B3_CTL (0x36A)
+#define SITAR_A_CDC_DEBUG_B3_CTL__POR (0x00000000)
+#define SITAR_A_CDC_DEBUG_B4_CTL (0x36B)
+#define SITAR_A_CDC_DEBUG_B4_CTL__POR (0x00000000)
+#define SITAR_A_CDC_DEBUG_B5_CTL (0x36C)
+#define SITAR_A_CDC_DEBUG_B5_CTL__POR (0x00000000)
+#define SITAR_A_CDC_DEBUG_B6_CTL (0x36D)
+#define SITAR_A_CDC_DEBUG_B6_CTL__POR (0x00000000)
+#define SITAR_A_CDC_DEBUG_B7_CTL (0x36E)
+#define SITAR_A_CDC_DEBUG_B7_CTL__POR (0x00000000)
+#define SITAR_A_CDC_COMP1_B1_CTL (0x370)
+#define SITAR_A_CDC_COMP1_B1_CTL__POR (0x00000030)
+#define SITAR_A_CDC_COMP1_B2_CTL (0x371)
+#define SITAR_A_CDC_COMP1_B2_CTL__POR (0x000000b5)
+#define SITAR_A_CDC_COMP1_B3_CTL (0x372)
+#define SITAR_A_CDC_COMP1_B3_CTL__POR (0x00000028)
+#define SITAR_A_CDC_COMP1_B4_CTL (0x373)
+#define SITAR_A_CDC_COMP1_B4_CTL__POR (0x0000003c)
+#define SITAR_A_CDC_COMP1_B5_CTL (0x374)
+#define SITAR_A_CDC_COMP1_B5_CTL__POR (0x0000001f)
+#define SITAR_A_CDC_COMP1_B6_CTL (0x375)
+#define SITAR_A_CDC_COMP1_B6_CTL__POR (0x00000000)
+#define SITAR_A_CDC_COMP1_SHUT_DOWN_STATUS (0x376)
+#define SITAR_A_CDC_COMP1_SHUT_DOWN_STATUS__POR (0x00000003)
+#define SITAR_A_CDC_COMP1_FS_CFG (0x377)
+#define SITAR_A_CDC_COMP1_FS_CFG__POR (0x0000001b)
+#define SITAR_A_CDC_CONN_RX1_B1_CTL (0x380)
+#define SITAR_A_CDC_CONN_RX1_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_RX1_B2_CTL (0x381)
+#define SITAR_A_CDC_CONN_RX1_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_RX1_B3_CTL (0x382)
+#define SITAR_A_CDC_CONN_RX1_B3_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_RX2_B1_CTL (0x383)
+#define SITAR_A_CDC_CONN_RX2_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_RX2_B2_CTL (0x384)
+#define SITAR_A_CDC_CONN_RX2_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_RX2_B3_CTL (0x385)
+#define SITAR_A_CDC_CONN_RX2_B3_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_RX3_B1_CTL (0x386)
+#define SITAR_A_CDC_CONN_RX3_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_RX3_B2_CTL (0x387)
+#define SITAR_A_CDC_CONN_RX3_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_RX3_B3_CTL (0x388)
+#define SITAR_A_CDC_CONN_RX3_B3_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_ANC_B1_CTL (0x391)
+#define SITAR_A_CDC_CONN_ANC_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_ANC_B2_CTL (0x392)
+#define SITAR_A_CDC_CONN_ANC_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_TX_B1_CTL (0x393)
+#define SITAR_A_CDC_CONN_TX_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_TX_B2_CTL (0x394)
+#define SITAR_A_CDC_CONN_TX_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_EQ1_B1_CTL (0x397)
+#define SITAR_A_CDC_CONN_EQ1_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_EQ1_B2_CTL (0x398)
+#define SITAR_A_CDC_CONN_EQ1_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_EQ1_B3_CTL (0x399)
+#define SITAR_A_CDC_CONN_EQ1_B3_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_EQ1_B4_CTL (0x39A)
+#define SITAR_A_CDC_CONN_EQ1_B4_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_EQ2_B1_CTL (0x39B)
+#define SITAR_A_CDC_CONN_EQ2_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_EQ2_B2_CTL (0x39C)
+#define SITAR_A_CDC_CONN_EQ2_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_EQ2_B3_CTL (0x39D)
+#define SITAR_A_CDC_CONN_EQ2_B3_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_EQ2_B4_CTL (0x39E)
+#define SITAR_A_CDC_CONN_EQ2_B4_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_SRC1_B1_CTL (0x39F)
+#define SITAR_A_CDC_CONN_SRC1_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_SRC1_B2_CTL (0x3A0)
+#define SITAR_A_CDC_CONN_SRC1_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_SRC2_B1_CTL (0x3A1)
+#define SITAR_A_CDC_CONN_SRC2_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_SRC2_B2_CTL (0x3A2)
+#define SITAR_A_CDC_CONN_SRC2_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_TX_SB_B1_CTL (0x3A3)
+#define SITAR_A_CDC_CONN_TX_SB_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_TX_SB_B2_CTL (0x3A4)
+#define SITAR_A_CDC_CONN_TX_SB_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_TX_SB_B3_CTL (0x3A5)
+#define SITAR_A_CDC_CONN_TX_SB_B3_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_TX_SB_B4_CTL (0x3A6)
+#define SITAR_A_CDC_CONN_TX_SB_B4_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_TX_SB_B5_CTL (0x3A7)
+#define SITAR_A_CDC_CONN_TX_SB_B5_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_RX_SB_B1_CTL (0x3AE)
+#define SITAR_A_CDC_CONN_RX_SB_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_RX_SB_B2_CTL (0x3AF)
+#define SITAR_A_CDC_CONN_RX_SB_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_CLSG_CTL (0x3B0)
+#define SITAR_A_CDC_CONN_CLSG_CTL__POR (0x00000000)
+#define SITAR_A_CDC_CONN_SPARE (0x3B1)
+#define SITAR_A_CDC_CONN_SPARE__POR (0x00000000)
+#define SITAR_A_CDC_MBHC_EN_CTL (0x3C0)
+#define SITAR_A_CDC_MBHC_EN_CTL__POR (0x00000000)
+#define SITAR_A_CDC_MBHC_FIR_B1_CFG (0x3C1)
+#define SITAR_A_CDC_MBHC_FIR_B1_CFG__POR (0x00000000)
+#define SITAR_A_CDC_MBHC_FIR_B2_CFG (0x3C2)
+#define SITAR_A_CDC_MBHC_FIR_B2_CFG__POR (0x00000006)
+#define SITAR_A_CDC_MBHC_TIMER_B1_CTL (0x3C3)
+#define SITAR_A_CDC_MBHC_TIMER_B1_CTL__POR (0x00000003)
+#define SITAR_A_CDC_MBHC_TIMER_B2_CTL (0x3C4)
+#define SITAR_A_CDC_MBHC_TIMER_B2_CTL__POR (0x00000009)
+#define SITAR_A_CDC_MBHC_TIMER_B3_CTL (0x3C5)
+#define SITAR_A_CDC_MBHC_TIMER_B3_CTL__POR (0x0000001e)
+#define SITAR_A_CDC_MBHC_TIMER_B4_CTL (0x3C6)
+#define SITAR_A_CDC_MBHC_TIMER_B4_CTL__POR (0x00000045)
+#define SITAR_A_CDC_MBHC_TIMER_B5_CTL (0x3C7)
+#define SITAR_A_CDC_MBHC_TIMER_B5_CTL__POR (0x00000004)
+#define SITAR_A_CDC_MBHC_TIMER_B6_CTL (0x3C8)
+#define SITAR_A_CDC_MBHC_TIMER_B6_CTL__POR (0x00000078)
+#define SITAR_A_CDC_MBHC_B1_STATUS (0x3C9)
+#define SITAR_A_CDC_MBHC_B1_STATUS__POR (0x00000000)
+#define SITAR_A_CDC_MBHC_B2_STATUS (0x3CA)
+#define SITAR_A_CDC_MBHC_B2_STATUS__POR (0x00000000)
+#define SITAR_A_CDC_MBHC_B3_STATUS (0x3CB)
+#define SITAR_A_CDC_MBHC_B3_STATUS__POR (0x00000000)
+#define SITAR_A_CDC_MBHC_B4_STATUS (0x3CC)
+#define SITAR_A_CDC_MBHC_B4_STATUS__POR (0x00000000)
+#define SITAR_A_CDC_MBHC_B5_STATUS (0x3CD)
+#define SITAR_A_CDC_MBHC_B5_STATUS__POR (0x00000000)
+#define SITAR_A_CDC_MBHC_B1_CTL (0x3CE)
+#define SITAR_A_CDC_MBHC_B1_CTL__POR (0x000000c0)
+#define SITAR_A_CDC_MBHC_B2_CTL (0x3CF)
+#define SITAR_A_CDC_MBHC_B2_CTL__POR (0x0000005d)
+#define SITAR_A_CDC_MBHC_VOLT_B1_CTL (0x3D0)
+#define SITAR_A_CDC_MBHC_VOLT_B1_CTL__POR (0x00000000)
+#define SITAR_A_CDC_MBHC_VOLT_B2_CTL (0x3D1)
+#define SITAR_A_CDC_MBHC_VOLT_B2_CTL__POR (0x00000000)
+#define SITAR_A_CDC_MBHC_VOLT_B3_CTL (0x3D2)
+#define SITAR_A_CDC_MBHC_VOLT_B3_CTL__POR (0x00000000)
+#define SITAR_A_CDC_MBHC_VOLT_B4_CTL (0x3D3)
+#define SITAR_A_CDC_MBHC_VOLT_B4_CTL__POR (0x00000000)
+#define SITAR_A_CDC_MBHC_VOLT_B5_CTL (0x3D4)
+#define SITAR_A_CDC_MBHC_VOLT_B5_CTL__POR (0x00000000)
+#define SITAR_A_CDC_MBHC_VOLT_B6_CTL (0x3D5)
+#define SITAR_A_CDC_MBHC_VOLT_B6_CTL__POR (0x00000000)
+#define SITAR_A_CDC_MBHC_VOLT_B7_CTL (0x3D6)
+#define SITAR_A_CDC_MBHC_VOLT_B7_CTL__POR (0x000000ff)
+#define SITAR_A_CDC_MBHC_VOLT_B8_CTL (0x3D7)
+#define SITAR_A_CDC_MBHC_VOLT_B8_CTL__POR (0x00000007)
+#define SITAR_A_CDC_MBHC_VOLT_B9_CTL (0x3D8)
+#define SITAR_A_CDC_MBHC_VOLT_B9_CTL__POR (0x000000ff)
+#define SITAR_A_CDC_MBHC_VOLT_B10_CTL (0x3D9)
+#define SITAR_A_CDC_MBHC_VOLT_B10_CTL__POR (0x0000007f)
+#define SITAR_A_CDC_MBHC_VOLT_B11_CTL (0x3DA)
+#define SITAR_A_CDC_MBHC_VOLT_B11_CTL__POR (0x00000000)
+#define SITAR_A_CDC_MBHC_VOLT_B12_CTL (0x3DB)
+#define SITAR_A_CDC_MBHC_VOLT_B12_CTL__POR (0x00000080)
+#define SITAR_A_CDC_MBHC_CLK_CTL (0x3DC)
+#define SITAR_A_CDC_MBHC_CLK_CTL__POR (0x00000000)
+#define SITAR_A_CDC_MBHC_INT_CTL (0x3DD)
+#define SITAR_A_CDC_MBHC_INT_CTL__POR (0x00000000)
+#define SITAR_A_CDC_MBHC_DEBUG_CTL (0x3DE)
+#define SITAR_A_CDC_MBHC_DEBUG_CTL__POR (0x00000000)
+#define SITAR_A_CDC_MBHC_SPARE (0x3DF)
+#define SITAR_A_CDC_MBHC_SPARE__POR (0x00000000)
+/* SLIMBUS Slave Registers */
+#define SITAR_SLIM_PGD_PORT_INT_EN0 (0x30)
+#define SITAR_SLIM_PGD_PORT_INT_STATUS0 (0x34)
+#define SITAR_SLIM_PGD_PORT_INT_CLR0 (0x38)
+#define SITAR_SLIM_PGD_PORT_INT_SOURCE0 (0x60)
+
+/* Macros for Packing Register Writes into a U32 */
+#define SITAR_PACKED_REG_SIZE sizeof(u32)
+
+#define SITAR_CODEC_PACK_ENTRY(reg, mask, val) ((val & 0xff)|\
+ ((mask & 0xff) << 8)|((reg & 0xffff) << 16))
+
+#define SITAR_CODEC_UNPACK_ENTRY(packed, reg, mask, val) \
+ do { \
+ ((reg) = ((packed >> 16) & (0xffff))); \
+ ((mask) = ((packed >> 8) & (0xff))); \
+ ((val) = ((packed) & (0xff))); \
+ } while (0);
+#endif
diff --git a/include/linux/mfd/wcd9310/registers.h b/include/linux/mfd/wcd9xxx/wcd9310_registers.h
similarity index 93%
rename from include/linux/mfd/wcd9310/registers.h
rename to include/linux/mfd/wcd9xxx/wcd9310_registers.h
index ef27c08..67c2a6b 100644
--- a/include/linux/mfd/wcd9310/registers.h
+++ b/include/linux/mfd/wcd9xxx/wcd9310_registers.h
@@ -1,29 +1,41 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
#ifndef TABLA_CODEC_DIGITAL_H
#define TABLA_CODEC_DIGITAL_H
+#include <linux/mfd/wcd9xxx/wcd9xxx_registers.h>
-#define TABLA_A_CHIP_CTL (0x00)
-#define TABLA_A_CHIP_CTL__POR (0x00000000)
-#define TABLA_A_CHIP_STATUS (0x01)
-#define TABLA_A_CHIP_STATUS__POR (0x00000000)
-#define TABLA_A_CHIP_ID_BYTE_0 (0x04)
-#define TABLA_A_CHIP_ID_BYTE_0__POR (0x00000000)
-#define TABLA_A_CHIP_ID_BYTE_1 (0x05)
-#define TABLA_A_CHIP_ID_BYTE_1__POR (0x00000000)
-#define TABLA_A_CHIP_ID_BYTE_2 (0x06)
-#define TABLA_A_CHIP_ID_BYTE_2__POR (0x00000000)
-#define TABLA_A_CHIP_ID_BYTE_3 (0x07)
-#define TABLA_A_CHIP_ID_BYTE_3__POR (0x00000001)
-#define TABLA_A_CHIP_VERSION (0x08)
-#define TABLA_A_CHIP_VERSION__POR (0x00000020)
-#define TABLA_A_SB_VERSION (0x09)
-#define TABLA_A_SB_VERSION__POR (0x00000010)
-#define TABLA_A_SLAVE_ID_1 (0x0C)
-#define TABLA_A_SLAVE_ID_1__POR (0x00000077)
-#define TABLA_A_SLAVE_ID_2 (0x0D)
-#define TABLA_A_SLAVE_ID_2__POR (0x00000066)
-#define TABLA_A_SLAVE_ID_3 (0x0E)
-#define TABLA_A_SLAVE_ID_3__POR (0x00000055)
+#define TABLA_A_CHIP_CTL WCD9XXX_A_CHIP_CTL
+#define TABLA_A_CHIP_CTL__POR WCD9XXX_A_CHIP_CTL__POR
+#define TABLA_A_CHIP_STATUS WCD9XXX_A_CHIP_STATUS
+#define TABLA_A_CHIP_STATUS__POR WCD9XXX_A_CHIP_STATUS__POR
+#define TABLA_A_CHIP_ID_BYTE_0 WCD9XXX_A_CHIP_ID_BYTE_0
+#define TABLA_A_CHIP_ID_BYTE_0__POR WCD9XXX_A_CHIP_ID_BYTE_0__POR
+#define TABLA_A_CHIP_ID_BYTE_1 WCD9XXX_A_CHIP_ID_BYTE_1
+#define TABLA_A_CHIP_ID_BYTE_1__POR WCD9XXX_A_CHIP_ID_BYTE_1__POR
+#define TABLA_A_CHIP_ID_BYTE_2 WCD9XXX_A_CHIP_ID_BYTE_2
+#define TABLA_A_CHIP_ID_BYTE_2__POR WCD9XXX_A_CHIP_ID_BYTE_2__POR
+#define TABLA_A_CHIP_ID_BYTE_3 WCD9XXX_A_CHIP_ID_BYTE_3
+#define TABLA_A_CHIP_ID_BYTE_3__POR WCD9XXX_A_CHIP_ID_BYTE_3__POR
+#define TABLA_A_CHIP_VERSION WCD9XXX_A_CHIP_VERSION
+#define TABLA_A_CHIP_VERSION__POR WCD9XXX_A_CHIP_VERSION__POR
+#define TABLA_A_SB_VERSION WCD9XXX_A_SB_VERSION
+#define TABLA_A_SB_VERSION__POR WCD9XXX_A_SB_VERSION__POR
+#define TABLA_A_SLAVE_ID_1 WCD9XXX_A_SLAVE_ID_1
+#define TABLA_A_SLAVE_ID_1__POR WCD9XXX_A_SLAVE_ID_1__POR
+#define TABLA_A_SLAVE_ID_2 WCD9XXX_A_SLAVE_ID_2
+#define TABLA_A_SLAVE_ID_2__POR WCD9XXX_A_SLAVE_ID_2__POR
+#define TABLA_A_SLAVE_ID_3 WCD9XXX_A_SLAVE_ID_3
+#define TABLA_A_SLAVE_ID_3__POR WCD9XXX_A_SLAVE_ID_3__POR
#define TABLA_A_PIN_CTL_OE0 (0x10)
#define TABLA_A_PIN_CTL_OE0__POR (0x00000000)
#define TABLA_A_PIN_CTL_OE1 (0x11)
@@ -58,10 +70,10 @@
#define TABLA_A_QFUSE_DATA_OUT2__POR (0x00000000)
#define TABLA_A_QFUSE_DATA_OUT3 (0x4D)
#define TABLA_A_QFUSE_DATA_OUT3__POR (0x00000000)
-#define TABLA_A_CDC_CTL (0x80)
-#define TABLA_A_CDC_CTL__POR (0x00000000)
-#define TABLA_A_LEAKAGE_CTL (0x88)
-#define TABLA_A_LEAKAGE_CTL__POR (0x00000004)
+#define TABLA_A_CDC_CTL WCD9XXX_A_CDC_CTL
+#define TABLA_A_CDC_CTL__POR WCD9XXX_A_CDC_CTL__POR
+#define TABLA_A_LEAKAGE_CTL WCD9XXX_A_LEAKAGE_CTL
+#define TABLA_A_LEAKAGE_CTL__POR WCD9XXX_A_LEAKAGE_CTL__POR
#define TABLA_A_INTR_MODE (0x90)
#define TABLA_A_INTR_MODE__POR (0x00000000)
#define TABLA_A_INTR_MASK0 (0x94)
@@ -885,6 +897,38 @@
#define TABLA_A_CDC_DEBUG_B5_CTL__POR (0x00000000)
#define TABLA_A_CDC_DEBUG_B6_CTL (0x0000036D)
#define TABLA_A_CDC_DEBUG_B6_CTL__POR (0x00000000)
+#define TABLA_A_CDC_COMP1_B1_CTL (0x00000370)
+#define TABLA_A_CDC_COMP1_B1_CTL__POR (0x00000000)
+#define TABLA_A_CDC_COMP1_B2_CTL (0x00000371)
+#define TABLA_A_CDC_COMP1_B2_CTL__POR (0x00000000)
+#define TABLA_A_CDC_COMP1_B3_CTL (0x00000372)
+#define TABLA_A_CDC_COMP1_B3_CTL__POR (0x00000000)
+#define TABLA_A_CDC_COMP1_B4_CTL (0x00000373)
+#define TABLA_A_CDC_COMP1_B4_CTL__POR (0x00000000)
+#define TABLA_A_CDC_COMP1_B5_CTL (0x00000374)
+#define TABLA_A_CDC_COMP1_B5_CTL__POR (0x00000000)
+#define TABLA_A_CDC_COMP1_B6_CTL (0x00000375)
+#define TABLA_A_CDC_COMP1_B6_CTL__POR (0x00000000)
+#define TABLA_A_CDC_COMP1_SHUT_DOWN_STATUS (0x00000376)
+#define TABLA_A_CDC_COMP1_SHUT_DOWN_STATUS__POR (0x00000000)
+#define TABLA_A_CDC_COMP1_FS_CFG (0x00000377)
+#define TABLA_A_CDC_COMP1_FS_CFG__POR (0x00000000)
+#define TABLA_A_CDC_COMP2_B1_CTL (0x00000378)
+#define TABLA_A_CDC_COMP2_B1_CTL__POR (0x00000000)
+#define TABLA_A_CDC_COMP2_B2_CTL (0x00000379)
+#define TABLA_A_CDC_COMP2_B2_CTL__POR (0x00000000)
+#define TABLA_A_CDC_COMP2_B3_CTL (0x0000037A)
+#define TABLA_A_CDC_COMP2_B3_CTL__POR (0x00000000)
+#define TABLA_A_CDC_COMP2_B4_CTL (0x0000037B)
+#define TABLA_A_CDC_COMP2_B4_CTL__POR (0x00000000)
+#define TABLA_A_CDC_COMP2_B5_CTL (0x0000037C)
+#define TABLA_A_CDC_COMP2_B5_CTL__POR (0x00000000)
+#define TABLA_A_CDC_COMP2_B6_CTL (0x0000037D)
+#define TABLA_A_CDC_COMP2_B6_CTL__POR (0x00000000)
+#define TABLA_A_CDC_COMP2_SHUT_DOWN_STATUS (0x0000037E)
+#define TABLA_A_CDC_COMP2_SHUT_DOWN_STATUS__POR (0x00000000)
+#define TABLA_A_CDC_COMP2_FS_CFG (0x0000037F)
+#define TABLA_A_CDC_COMP2_FS_CFG__POR (0x00000000)
#define TABLA_A_CDC_CONN_RX1_B1_CTL (0x00000380)
#define TABLA_A_CDC_CONN_RX1_B1_CTL__POR (0x00000000)
#define TABLA_A_CDC_CONN_RX1_B2_CTL (0x00000381)
diff --git a/include/linux/mfd/wcd9310/wcd9310-slimslave.h b/include/linux/mfd/wcd9xxx/wcd9xxx-slimslave.h
similarity index 84%
rename from include/linux/mfd/wcd9310/wcd9310-slimslave.h
rename to include/linux/mfd/wcd9xxx/wcd9xxx-slimslave.h
index 0bbf96f..fcd3bd3 100644
--- a/include/linux/mfd/wcd9310/wcd9310-slimslave.h
+++ b/include/linux/mfd/wcd9xxx/wcd9xxx-slimslave.h
@@ -14,7 +14,7 @@
#define __WCD9310_SLIMSLAVE_H_
#include <linux/slimbus/slimbus.h>
-#include <linux/mfd/wcd9310/core.h>
+#include <linux/mfd/wcd9xxx/core.h>
/* Local to the core only */
#define SLIM_MAX_RX_PORTS 7
@@ -84,19 +84,19 @@
#define BASE_CH_NUM 128
-int tabla_init_slimslave(struct tabla *tabla, u8 tabla_pgd_la);
+int wcd9xxx_init_slimslave(struct wcd9xxx *wcd9xxx, u8 wcd9xxx_pgd_la);
-int tabla_deinit_slimslave(struct tabla *tabla);
+int wcd9xxx_deinit_slimslave(struct wcd9xxx *wcd9xxx);
-int tabla_cfg_slim_sch_rx(struct tabla *tabla, unsigned int *ch_num,
+int wcd9xxx_cfg_slim_sch_rx(struct wcd9xxx *wcd9xxx, unsigned int *ch_num,
unsigned int tot_ch, unsigned int rate);
-int tabla_cfg_slim_sch_tx(struct tabla *tabla, unsigned int *ch_num,
+int wcd9xxx_cfg_slim_sch_tx(struct wcd9xxx *wcd9xxx, unsigned int *ch_num,
unsigned int tot_ch, unsigned int rate);
-int tabla_close_slim_sch_rx(struct tabla *tabla, unsigned int *ch_num,
+int wcd9xxx_close_slim_sch_rx(struct wcd9xxx *wcd9xxx, unsigned int *ch_num,
unsigned int tot_ch);
-int tabla_close_slim_sch_tx(struct tabla *tabla, unsigned int *ch_num,
+int wcd9xxx_close_slim_sch_tx(struct wcd9xxx *wcd9xxx, unsigned int *ch_num,
unsigned int tot_ch);
-int tabla_get_channel(struct tabla *tabla,
+int wcd9xxx_get_channel(struct wcd9xxx *wcd9xxx,
unsigned int *rx_ch,
unsigned int *tx_ch);
#endif /* __WCD9310_SLIMSLAVE_H_ */
diff --git a/include/linux/mfd/wcd9xxx/wcd9xxx_registers.h b/include/linux/mfd/wcd9xxx/wcd9xxx_registers.h
new file mode 100644
index 0000000..c66e953
--- /dev/null
+++ b/include/linux/mfd/wcd9xxx/wcd9xxx_registers.h
@@ -0,0 +1,42 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef WCD9XXX_CODEC_DIGITAL_H
+
+#define WCD9XXX_CODEC_DIGITAL_H
+
+#define WCD9XXX_A_CHIP_CTL (0x00)
+#define WCD9XXX_A_CHIP_CTL__POR (0x00000000)
+#define WCD9XXX_A_CHIP_STATUS (0x01)
+#define WCD9XXX_A_CHIP_STATUS__POR (0x00000000)
+#define WCD9XXX_A_CHIP_ID_BYTE_0 (0x04)
+#define WCD9XXX_A_CHIP_ID_BYTE_0__POR (0x00000000)
+#define WCD9XXX_A_CHIP_ID_BYTE_1 (0x05)
+#define WCD9XXX_A_CHIP_ID_BYTE_1__POR (0x00000000)
+#define WCD9XXX_A_CHIP_ID_BYTE_2 (0x06)
+#define WCD9XXX_A_CHIP_ID_BYTE_2__POR (0x00000000)
+#define WCD9XXX_A_CHIP_ID_BYTE_3 (0x07)
+#define WCD9XXX_A_CHIP_ID_BYTE_3__POR (0x00000001)
+#define WCD9XXX_A_CHIP_VERSION (0x08)
+#define WCD9XXX_A_CHIP_VERSION__POR (0x00000020)
+#define WCD9XXX_A_SB_VERSION (0x09)
+#define WCD9XXX_A_SB_VERSION__POR (0x00000010)
+#define WCD9XXX_A_SLAVE_ID_1 (0x0C)
+#define WCD9XXX_A_SLAVE_ID_1__POR (0x00000077)
+#define WCD9XXX_A_SLAVE_ID_2 (0x0D)
+#define WCD9XXX_A_SLAVE_ID_2__POR (0x00000066)
+#define WCD9XXX_A_SLAVE_ID_3 (0x0E)
+#define WCD9XXX_A_SLAVE_ID_3__POR (0x00000055)
+#define WCD9XXX_A_CDC_CTL (0x80)
+#define WCD9XXX_A_CDC_CTL__POR (0x00000000)
+#define WCD9XXX_A_LEAKAGE_CTL (0x88)
+#define WCD9XXX_A_LEAKAGE_CTL__POR (0x00000004)
+#endif
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
index 9e82abf8..dedbe5c 100644
--- a/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
@@ -50,8 +50,12 @@
u8 rel_sectors;
u8 rel_param;
u8 part_config;
+ u8 cache_ctrl;
+ u8 rst_n_function;
unsigned int part_time; /* Units: ms */
unsigned int sa_timeout; /* Units: 100ns */
+ unsigned int generic_cmd6_time; /* Units: 10ms */
+ unsigned int power_off_longtime; /* Units: ms */
unsigned int hs_max_dtr;
unsigned int sectors;
unsigned int card_type;
@@ -64,10 +68,15 @@
unsigned long long enhanced_area_offset; /* Units: Byte */
unsigned int enhanced_area_size; /* Units: KB */
unsigned int boot_size; /* in bytes */
+ unsigned int cache_size; /* Units: KB */
+ bool hpi_en; /* HPI enablebit */
+ bool hpi; /* HPI support bit */
+ unsigned int hpi_cmd; /* cmd used as HPI */
u8 raw_partition_support; /* 160 */
u8 raw_erased_mem_count; /* 181 */
u8 raw_ext_csd_structure; /* 194 */
u8 raw_card_type; /* 196 */
+ u8 out_of_int_time; /* 198 */
u8 raw_s_a_timeout; /* 217 */
u8 raw_hc_erase_gap_size; /* 221 */
u8 raw_erase_timeout_mult; /* 223 */
@@ -77,6 +86,9 @@
u8 raw_sec_feature_support;/* 231 */
u8 raw_trim_mult; /* 232 */
u8 raw_sectors[4]; /* 212 - 4 bytes */
+
+ unsigned int feature_support;
+#define MMC_DISCARD_FEATURE BIT(0) /* CMD38 feature */
};
struct sd_scr {
@@ -178,6 +190,7 @@
#define MMC_STATE_ULTRAHIGHSPEED (1<<5) /* card is in ultra high speed mode */
#define MMC_CARD_SDXC (1<<6) /* card is SDXC */
#define MMC_CARD_REMOVED (1<<7) /* card has been removed */
+#define MMC_STATE_HIGHSPEED_200 (1<<8) /* card is in HS200 mode */
unsigned int quirks; /* card quirks */
#define MMC_QUIRK_LENIENT_FN0 (1<<0) /* allow SDIO FN0 writes outside of the VS CCCR range */
#define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1) /* use func->cur_blksize */
@@ -189,6 +202,11 @@
#define MMC_QUIRK_DISABLE_CD (1<<5) /* disconnect CD/DAT[3] resistor */
#define MMC_QUIRK_INAND_CMD38 (1<<6) /* iNAND devices have broken CMD38 */
#define MMC_QUIRK_BLK_NO_CMD23 (1<<7) /* Avoid CMD23 for regular multiblock */
+ unsigned int poweroff_notify_state; /* eMMC4.5 notify feature */
+#define MMC_NO_POWER_NOTIFICATION 0
+#define MMC_POWERED_ON 1
+#define MMC_POWEROFF_SHORT 2
+#define MMC_POWEROFF_LONG 3
unsigned int erase_size; /* erase size in sectors */
unsigned int erase_shift; /* if erase unit is power 2 */
@@ -311,6 +329,7 @@
#define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT)
#define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY)
#define mmc_card_highspeed(c) ((c)->state & MMC_STATE_HIGHSPEED)
+#define mmc_card_hs200(c) ((c)->state & MMC_STATE_HIGHSPEED_200)
#define mmc_card_blockaddr(c) ((c)->state & MMC_STATE_BLOCKADDR)
#define mmc_card_ddr_mode(c) ((c)->state & MMC_STATE_HIGHSPEED_DDR)
#define mmc_sd_card_uhs(c) ((c)->state & MMC_STATE_ULTRAHIGHSPEED)
@@ -320,6 +339,7 @@
#define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT)
#define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY)
#define mmc_card_set_highspeed(c) ((c)->state |= MMC_STATE_HIGHSPEED)
+#define mmc_card_set_hs200(c) ((c)->state |= MMC_STATE_HIGHSPEED_200)
#define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR)
#define mmc_card_set_ddr_mode(c) ((c)->state |= MMC_STATE_HIGHSPEED_DDR)
#define mmc_sd_card_set_uhs(c) ((c)->state |= MMC_STATE_ULTRAHIGHSPEED)
diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
index 279c023..05c126c 100644
--- a/include/linux/mmc/core.h
+++ b/include/linux/mmc/core.h
@@ -117,6 +117,7 @@
unsigned int sg_len; /* size of scatter list */
struct scatterlist *sg; /* I/O scatter list */
+ s32 host_cookie; /* host private data */
};
struct mmc_request {
@@ -125,13 +126,17 @@
struct mmc_data *data;
struct mmc_command *stop;
- void *done_data; /* completion data */
+ struct completion completion;
void (*done)(struct mmc_request *);/* completion function */
};
struct mmc_host;
struct mmc_card;
+struct mmc_async_req;
+extern struct mmc_async_req *mmc_start_req(struct mmc_host *,
+ struct mmc_async_req *, int *);
+extern int mmc_interrupt_hpi(struct mmc_card *);
extern void mmc_wait_for_req(struct mmc_host *, struct mmc_request *);
extern int mmc_wait_for_cmd(struct mmc_host *, struct mmc_command *, int);
extern int mmc_app_cmd(struct mmc_host *, struct mmc_card *);
@@ -142,6 +147,7 @@
#define MMC_ERASE_ARG 0x00000000
#define MMC_SECURE_ERASE_ARG 0x80000000
#define MMC_TRIM_ARG 0x00000001
+#define MMC_DISCARD_ARG 0x00000003
#define MMC_SECURE_TRIM1_ARG 0x80000001
#define MMC_SECURE_TRIM2_ARG 0x80008000
@@ -152,11 +158,17 @@
unsigned int arg);
extern int mmc_can_erase(struct mmc_card *card);
extern int mmc_can_trim(struct mmc_card *card);
+extern int mmc_can_discard(struct mmc_card *card);
+extern int mmc_can_sanitize(struct mmc_card *card);
extern int mmc_can_secure_erase_trim(struct mmc_card *card);
extern int mmc_erase_group_aligned(struct mmc_card *card, unsigned int from,
unsigned int nr);
+extern unsigned int mmc_calc_max_discard(struct mmc_card *card);
extern int mmc_set_blocklen(struct mmc_card *card, unsigned int blocklen);
+extern int mmc_hw_reset(struct mmc_host *host);
+extern int mmc_hw_reset_check(struct mmc_host *host);
+extern int mmc_can_reset(struct mmc_card *card);
extern void mmc_set_data_timeout(struct mmc_data *, const struct mmc_card *);
extern unsigned int mmc_align_data_size(struct mmc_card *, unsigned int);
@@ -167,6 +179,7 @@
extern int mmc_try_claim_host(struct mmc_host *host);
extern int mmc_detect_card_removed(struct mmc_host *host);
+extern int mmc_flush_cache(struct mmc_card *);
/**
* mmc_claim_host - exclusively claim a host
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index d90c779..73a68c9 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -56,12 +56,15 @@
#define MMC_TIMING_UHS_SDR50 3
#define MMC_TIMING_UHS_SDR104 4
#define MMC_TIMING_UHS_DDR50 5
+#define MMC_TIMING_MMC_HS200 6
unsigned char ddr; /* dual data rate used */
#define MMC_SDR_MODE 0
#define MMC_1_2V_DDR_MODE 1
#define MMC_1_8V_DDR_MODE 2
+#define MMC_1_2V_SDR_MODE 3
+#define MMC_1_8V_SDR_MODE 4
unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */
@@ -107,6 +110,15 @@
*/
int (*enable)(struct mmc_host *host);
int (*disable)(struct mmc_host *host, int lazy);
+ /*
+ * It is optional for the host to implement pre_req and post_req in
+ * order to support double buffering of requests (prepare one
+ * request while another request is active).
+ */
+ void (*post_req)(struct mmc_host *host, struct mmc_request *req,
+ int err);
+ void (*pre_req)(struct mmc_host *host, struct mmc_request *req,
+ bool is_first_req);
void (*request)(struct mmc_host *host, struct mmc_request *req);
/*
* Avoid calling these three functions too often or in a "fast path",
@@ -138,13 +150,26 @@
void (*init_card)(struct mmc_host *host, struct mmc_card *card);
int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
- int (*execute_tuning)(struct mmc_host *host);
+
+ /* The tuning command opcode value is different for SD and eMMC cards */
+ int (*execute_tuning)(struct mmc_host *host, u32 opcode);
void (*enable_preset_value)(struct mmc_host *host, bool enable);
+ void (*hw_reset)(struct mmc_host *host);
};
struct mmc_card;
struct device;
+struct mmc_async_req {
+ /* active mmc request */
+ struct mmc_request *mrq;
+ /*
+ * Check error status of completed mmc request.
+ * Returns 0 if success otherwise non zero.
+ */
+ int (*err_check) (struct mmc_card *, struct mmc_async_req *);
+};
+
struct mmc_host {
struct device *parent;
struct device class_dev;
@@ -212,8 +237,22 @@
#define MMC_CAP_MAX_CURRENT_600 (1 << 28) /* Host max current limit is 600mA */
#define MMC_CAP_MAX_CURRENT_800 (1 << 29) /* Host max current limit is 800mA */
#define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */
+#define MMC_CAP_HW_RESET (1 << 31) /* Hardware reset */
+ unsigned int caps2; /* More host capabilities */
+
+#define MMC_CAP2_CACHE_CTRL (1 << 1) /* Allow cache control */
+#define MMC_CAP2_POWEROFF_NOTIFY (1 << 2) /* Notify poweroff supported */
+#define MMC_CAP2_NO_MULTI_READ (1 << 3) /* Multiblock reads don't work */
+#define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */
+#define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */
+#define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \
+ MMC_CAP2_HS200_1_2V_SDR)
mmc_pm_flag_t pm_caps; /* supported pm features */
+ unsigned int power_notify_type;
+#define MMC_HOST_PW_NOTIFY_NONE 0
+#define MMC_HOST_PW_NOTIFY_SHORT 1
+#define MMC_HOST_PW_NOTIFY_LONG 2
#ifdef CONFIG_MMC_CLKGATE
int clk_requests; /* internal reference counter */
@@ -234,6 +273,7 @@
unsigned int max_req_size; /* maximum number of bytes in one req */
unsigned int max_blk_size; /* maximum size of one mmc block */
unsigned int max_blk_count; /* maximum number of blocks in one req */
+ unsigned int max_discard_to; /* max. discard timeout in ms */
/* private data */
spinlock_t lock; /* lock for claim and bus ops */
@@ -314,6 +354,9 @@
ktime_t start;
} perf;
#endif
+
+ struct mmc_async_req *areq; /* active async req */
+
unsigned long private[0] ____cacheline_aligned;
};
@@ -362,6 +405,8 @@
extern void mmc_detect_change(struct mmc_host *, unsigned long delay);
extern void mmc_request_done(struct mmc_host *, struct mmc_request *);
+extern int mmc_cache_ctrl(struct mmc_host *, u8);
+
static inline void mmc_signal_sdio_irq(struct mmc_host *host)
{
host->ops->enable_sdio_irq(host, 0);
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
index 53013f9..e124fbe 100644
--- a/include/linux/mmc/mmc.h
+++ b/include/linux/mmc/mmc.h
@@ -51,6 +51,7 @@
#define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */
#define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */
#define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */
+#define MMC_SEND_TUNING_BLOCK_HS200 21 /* adtc R1 */
/* class 3 */
#define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
@@ -271,18 +272,30 @@
* EXT_CSD fields
*/
+#define EXT_CSD_FLUSH_CACHE 32 /* W */
+#define EXT_CSD_CACHE_CTRL 33 /* R/W */
+#define EXT_CSD_POWER_OFF_NOTIFICATION 34 /* R/W */
#define EXT_CSD_PARTITION_ATTRIBUTE 156 /* R/W */
#define EXT_CSD_PARTITION_SUPPORT 160 /* RO */
+#define EXT_CSD_HPI_MGMT 161 /* R/W */
+#define EXT_CSD_RST_N_FUNCTION 162 /* R/W */
+#define EXT_CSD_SANITIZE_START 165 /* W */
#define EXT_CSD_WR_REL_PARAM 166 /* RO */
#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
#define EXT_CSD_PART_CONFIG 179 /* R/W */
#define EXT_CSD_ERASED_MEM_CONT 181 /* RO */
#define EXT_CSD_BUS_WIDTH 183 /* R/W */
#define EXT_CSD_HS_TIMING 185 /* R/W */
+#define EXT_CSD_POWER_CLASS 187 /* R/W */
#define EXT_CSD_REV 192 /* RO */
#define EXT_CSD_STRUCTURE 194 /* RO */
#define EXT_CSD_CARD_TYPE 196 /* RO */
+#define EXT_CSD_OUT_OF_INTERRUPT_TIME 198 /* RO */
#define EXT_CSD_PART_SWITCH_TIME 199 /* RO */
+#define EXT_CSD_PWR_CL_52_195 200 /* RO */
+#define EXT_CSD_PWR_CL_26_195 201 /* RO */
+#define EXT_CSD_PWR_CL_52_360 202 /* RO */
+#define EXT_CSD_PWR_CL_26_360 203 /* RO */
#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
#define EXT_CSD_S_A_TIMEOUT 217 /* RO */
#define EXT_CSD_REL_WR_SEC_C 222 /* RO */
@@ -294,6 +307,14 @@
#define EXT_CSD_SEC_ERASE_MULT 230 /* RO */
#define EXT_CSD_SEC_FEATURE_SUPPORT 231 /* RO */
#define EXT_CSD_TRIM_MULT 232 /* RO */
+#define EXT_CSD_PWR_CL_200_195 236 /* RO */
+#define EXT_CSD_PWR_CL_200_360 237 /* RO */
+#define EXT_CSD_PWR_CL_DDR_52_195 238 /* RO */
+#define EXT_CSD_PWR_CL_DDR_52_360 239 /* RO */
+#define EXT_CSD_POWER_OFF_LONG_TIME 247 /* RO */
+#define EXT_CSD_GENERIC_CMD6_TIME 248 /* RO */
+#define EXT_CSD_CACHE_SIZE 249 /* RO, 4 bytes */
+#define EXT_CSD_HPI_FEATURES 503 /* RO */
/*
* EXT_CSD field definitions
@@ -311,13 +332,76 @@
#define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */
#define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */
-#define EXT_CSD_CARD_TYPE_MASK 0xF /* Mask out reserved bits */
+#define EXT_CSD_CARD_TYPE_MASK 0x3F /* Mask out reserved bits */
#define EXT_CSD_CARD_TYPE_DDR_1_8V (1<<2) /* Card can run at 52MHz */
/* DDR mode @1.8V or 3V I/O */
#define EXT_CSD_CARD_TYPE_DDR_1_2V (1<<3) /* Card can run at 52MHz */
/* DDR mode @1.2V I/O */
#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
| EXT_CSD_CARD_TYPE_DDR_1_2V)
+#define EXT_CSD_CARD_TYPE_SDR_1_8V (1<<4) /* Card can run at 200MHz */
+#define EXT_CSD_CARD_TYPE_SDR_1_2V (1<<5) /* Card can run at 200MHz */
+ /* SDR mode @1.2V I/O */
+
+#define EXT_CSD_CARD_TYPE_SDR_200 (EXT_CSD_CARD_TYPE_SDR_1_8V | \
+ EXT_CSD_CARD_TYPE_SDR_1_2V)
+
+#define EXT_CSD_CARD_TYPE_SDR_ALL (EXT_CSD_CARD_TYPE_SDR_200 | \
+ EXT_CSD_CARD_TYPE_52 | \
+ EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_1_2V_ALL (EXT_CSD_CARD_TYPE_SDR_1_2V | \
+ EXT_CSD_CARD_TYPE_52 | \
+ EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_1_8V_ALL (EXT_CSD_CARD_TYPE_SDR_1_8V | \
+ EXT_CSD_CARD_TYPE_52 | \
+ EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_8V (EXT_CSD_CARD_TYPE_SDR_1_2V | \
+ EXT_CSD_CARD_TYPE_DDR_1_8V | \
+ EXT_CSD_CARD_TYPE_52 | \
+ EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_8V (EXT_CSD_CARD_TYPE_SDR_1_8V | \
+ EXT_CSD_CARD_TYPE_DDR_1_8V | \
+ EXT_CSD_CARD_TYPE_52 | \
+ EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_2V (EXT_CSD_CARD_TYPE_SDR_1_2V | \
+ EXT_CSD_CARD_TYPE_DDR_1_2V | \
+ EXT_CSD_CARD_TYPE_52 | \
+ EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_2V (EXT_CSD_CARD_TYPE_SDR_1_8V | \
+ EXT_CSD_CARD_TYPE_DDR_1_2V | \
+ EXT_CSD_CARD_TYPE_52 | \
+ EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_52 (EXT_CSD_CARD_TYPE_SDR_1_2V | \
+ EXT_CSD_CARD_TYPE_DDR_52 | \
+ EXT_CSD_CARD_TYPE_52 | \
+ EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_52 (EXT_CSD_CARD_TYPE_SDR_1_8V | \
+ EXT_CSD_CARD_TYPE_DDR_52 | \
+ EXT_CSD_CARD_TYPE_52 | \
+ EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_8V (EXT_CSD_CARD_TYPE_SDR_200 | \
+ EXT_CSD_CARD_TYPE_DDR_1_8V | \
+ EXT_CSD_CARD_TYPE_52 | \
+ EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_2V (EXT_CSD_CARD_TYPE_SDR_200 | \
+ EXT_CSD_CARD_TYPE_DDR_1_2V | \
+ EXT_CSD_CARD_TYPE_52 | \
+ EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_ALL_DDR_52 (EXT_CSD_CARD_TYPE_SDR_200 | \
+ EXT_CSD_CARD_TYPE_DDR_52 | \
+ EXT_CSD_CARD_TYPE_52 | \
+ EXT_CSD_CARD_TYPE_26)
#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
@@ -328,7 +412,20 @@
#define EXT_CSD_SEC_ER_EN BIT(0)
#define EXT_CSD_SEC_BD_BLK_EN BIT(2)
#define EXT_CSD_SEC_GB_CL_EN BIT(4)
+#define EXT_CSD_SEC_SANITIZE BIT(6) /* v4.5 only */
+#define EXT_CSD_RST_N_EN_MASK 0x3
+#define EXT_CSD_RST_N_ENABLED 1 /* RST_n is enabled on card */
+
+#define EXT_CSD_NO_POWER_NOTIFICATION 0
+#define EXT_CSD_POWER_ON 1
+#define EXT_CSD_POWER_OFF_SHORT 2
+#define EXT_CSD_POWER_OFF_LONG 3
+
+#define EXT_CSD_PWR_CL_8BIT_MASK 0xF0 /* 8 bit PWR CLS */
+#define EXT_CSD_PWR_CL_4BIT_MASK 0x0F /* 8 bit PWR CLS */
+#define EXT_CSD_PWR_CL_8BIT_SHIFT 4
+#define EXT_CSD_PWR_CL_4BIT_SHIFT 0
/*
* MMC_SWITCH access modes
*/
diff --git a/include/linux/msm_audio.h b/include/linux/msm_audio.h
index 30d74ce..8a35ca0 100644
--- a/include/linux/msm_audio.h
+++ b/include/linux/msm_audio.h
@@ -90,6 +90,9 @@
#define AUDIO_GET_ACDB_BLK _IOW(AUDIO_IOCTL_MAGIC, 96, \
struct msm_acdb_cmd_device)
+#define AUDIO_REGISTER_ION _IOW(AUDIO_IOCTL_MAGIC, 97, unsigned)
+#define AUDIO_DEREGISTER_ION _IOW(AUDIO_IOCTL_MAGIC, 98, unsigned)
+
#define AUDIO_MAX_COMMON_IOCTL_NUM 100
@@ -166,6 +169,11 @@
uint32_t unused[2];
};
+struct msm_audio_ion_info {
+ int fd;
+ void *vaddr;
+};
+
struct msm_audio_pmem_info {
int fd;
void *vaddr;
diff --git a/include/linux/msm_audio_mvs.h b/include/linux/msm_audio_mvs.h
index 2813c8f..8ec9796 100644
--- a/include/linux/msm_audio_mvs.h
+++ b/include/linux/msm_audio_mvs.h
@@ -24,7 +24,7 @@
#define MVS_MODE_G729A 0xE
#define MVS_MODE_G711A 0xF
#define MVS_MODE_G722 0x10
-#define MVS_MODE_PCM_WB 0x80000000
+#define MVS_MODE_PCM_WB 0x12
enum msm_audio_amr_mode {
MVS_AMR_MODE_0475, /* AMR 4.75 kbps */
diff --git a/include/linux/msm_kgsl.h b/include/linux/msm_kgsl.h
index 37b9d35..69ff05b 100644
--- a/include/linux/msm_kgsl.h
+++ b/include/linux/msm_kgsl.h
@@ -34,6 +34,16 @@
#define KGSL_CLK_MEM_IFACE 0x00000010
#define KGSL_CLK_AXI 0x00000020
+/*
+ * Reset status values for context
+ */
+enum kgsl_ctx_reset_stat {
+ KGSL_CTX_STAT_NO_ERROR = 0x00000000,
+ KGSL_CTX_STAT_GUILTY_CONTEXT_RESET_EXT = 0x00000001,
+ KGSL_CTX_STAT_INNOCENT_CONTEXT_RESET_EXT = 0x00000002,
+ KGSL_CTX_STAT_UNKNOWN_CONTEXT_RESET_EXT = 0x00000003
+};
+
#define KGSL_MAX_PWRLEVELS 5
#define KGSL_CONVERT_TO_MBPS(val) \
@@ -110,6 +120,7 @@
KGSL_PROP_MMU_ENABLE = 0x00000006,
KGSL_PROP_INTERRUPT_WAITS = 0x00000007,
KGSL_PROP_VERSION = 0x00000008,
+ KGSL_PROP_GPU_RESET_STAT = 0x00000009
};
struct kgsl_shadowprop {
@@ -140,6 +151,13 @@
#define KGSL_2D1_REG_MEMORY "kgsl_2d1_reg_memory"
#define KGSL_2D1_IRQ "kgsl_2d1_irq"
+struct kgsl_device_iommu_data {
+ const char **iommu_ctx_names;
+ int iommu_ctx_count;
+ unsigned int physstart;
+ unsigned int physend;
+};
+
struct kgsl_device_platform_data {
struct kgsl_pwrlevel pwrlevel[KGSL_MAX_PWRLEVELS];
int init_level;
@@ -150,8 +168,8 @@
unsigned int clk_map;
unsigned int idle_needed;
struct msm_bus_scale_pdata *bus_scale_table;
- const char *iommu_user_ctx_name;
- const char *iommu_priv_ctx_name;
+ struct kgsl_device_iommu_data *iommu_data;
+ int iommu_count;
};
#endif
diff --git a/include/linux/msm_mdp.h b/include/linux/msm_mdp.h
index 07d5af6..6442faa 100644
--- a/include/linux/msm_mdp.h
+++ b/include/linux/msm_mdp.h
@@ -140,6 +140,7 @@
#define MDP_OV_PLAY_NOWAIT 0x00200000
#define MDP_SOURCE_ROTATED_90 0x00100000
#define MDP_DPP_HSIC 0x00080000
+#define MDP_BACKEND_COMPOSITION 0x00040000
#define MDP_BORDERFILL_SUPPORTED 0x00010000
#define MDP_SECURE_OVERLAY_SESSION 0x00008000
#define MDP_MEMORY_ID_TYPE_FB 0x00001000
diff --git a/include/linux/msm_vidc_enc.h b/include/linux/msm_vidc_enc.h
index 1f264e9..bf149eb 100644
--- a/include/linux/msm_vidc_enc.h
+++ b/include/linux/msm_vidc_enc.h
@@ -52,6 +52,11 @@
#define VEN_BUFFLAG_EXTRADATA 0x00000040
#define VEN_BUFFLAG_CODECCONFIG 0x00000080
+/*Post processing flags bit masks*/
+#define VEN_EXTRADATA_NONE 0x001
+#define VEN_EXTRADATA_QCOMFILLER 0x002
+#define VEN_EXTRADATA_SLICEINFO 0x100
+
/*ENCODER CONFIGURATION CONSTANTS*/
/*Encoded video frame types*/
@@ -257,6 +262,8 @@
#define VEN_IOCTL_GET_RECON_BUFFER_SIZE \
_IOW(VEN_IOCTLBASE_NENC, 22, struct venc_ioctl_msg)
+
+
/*ENCODER PROPERTY CONFIGURATION & CAPABILITY IOCTLs*/
/*IOCTL params:SET: InputData - venc_basecfg, OutputData - NULL
@@ -439,6 +446,14 @@
#define VEN_IOCTL_SET_METABUFFER_MODE \
_IOW(VEN_IOCTLBASE_ENC, 47, struct venc_ioctl_msg)
+
+/*IOCTL params:SET: InputData - unsigned int, OutputData - NULL.*/
+#define VEN_IOCTL_SET_EXTRADATA \
+ _IOW(VEN_IOCTLBASE_ENC, 48, struct venc_ioctl_msg)
+/*IOCTL params:GET: InputData - NULL, OutputData - unsigned int.*/
+#define VEN_IOCTL_GET_EXTRADATA \
+ _IOR(VEN_IOCTLBASE_ENC, 49, struct venc_ioctl_msg)
+
struct venc_switch{
unsigned char status;
};
diff --git a/include/linux/nl80211.h b/include/linux/nl80211.h
index 70fe6ca..e7cc68e 100644
--- a/include/linux/nl80211.h
+++ b/include/linux/nl80211.h
@@ -1242,6 +1242,18 @@
NL80211_ATTR_IE_PROBE_RESP,
NL80211_ATTR_IE_ASSOC_RESP,
+ NL80211_ATTR_STA_WME,
+ NL80211_ATTR_SUPPORT_AP_UAPSD,
+
+ NL80211_ATTR_ROAM_SUPPORT,
+
+ NL80211_ATTR_SCHED_SCAN_MATCH,
+ NL80211_ATTR_MAX_MATCH_SETS,
+
+ NL80211_ATTR_PMKSA_CANDIDATE,
+
+ NL80211_ATTR_TX_NO_CCK_RATE,
+
/* add attributes here, update the policy in nl80211.c */
__NL80211_ATTR_AFTER_LAST,
diff --git a/include/linux/of.h b/include/linux/of.h
index 6a1272c..f904bf4 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -241,6 +241,16 @@
return false;
}
+#define for_each_child_of_node(parent, child) \
+ while (0)
+
+static inline struct property *of_find_property(const struct device_node *np,
+ const char *name,
+ int *lenp)
+{
+ return NULL;
+}
+
static inline int of_property_read_u32_array(const struct device_node *np,
char *propname, u32 *out_values, size_t sz)
{
diff --git a/include/linux/of_address.h b/include/linux/of_address.h
index 3118623..01b925a 100644
--- a/include/linux/of_address.h
+++ b/include/linux/of_address.h
@@ -4,6 +4,7 @@
#include <linux/errno.h>
#include <linux/of.h>
+#ifdef CONFIG_OF_ADDRESS
extern u64 of_translate_address(struct device_node *np, const __be32 *addr);
extern int of_address_to_resource(struct device_node *dev, int index,
struct resource *r);
@@ -25,12 +26,37 @@
#define pci_address_to_pio pci_address_to_pio
#endif
-#ifdef CONFIG_PCI
+#else /* CONFIG_OF_ADDRESS */
+static inline int of_address_to_resource(struct device_node *dev, int index,
+ struct resource *r)
+{
+ return -EINVAL;
+}
+static inline struct device_node *of_find_matching_node_by_address(
+ struct device_node *from,
+ const struct of_device_id *matches,
+ u64 base_address)
+{
+ return NULL;
+}
+static inline void __iomem *of_iomap(struct device_node *device, int index)
+{
+ return NULL;
+}
+static inline const u32 *of_get_address(struct device_node *dev, int index,
+ u64 *size, unsigned int *flags)
+{
+ return NULL;
+}
+#endif /* CONFIG_OF_ADDRESS */
+
+
+#if defined(CONFIG_OF_ADDRESS) && defined(CONFIG_PCI)
extern const __be32 *of_get_pci_address(struct device_node *dev, int bar_no,
u64 *size, unsigned int *flags);
extern int of_pci_address_to_resource(struct device_node *dev, int bar,
struct resource *r);
-#else /* CONFIG_PCI */
+#else /* CONFIG_OF_ADDRESS && CONFIG_PCI */
static inline int of_pci_address_to_resource(struct device_node *dev, int bar,
struct resource *r)
{
@@ -42,8 +68,7 @@
{
return NULL;
}
-#endif /* CONFIG_PCI */
-
+#endif /* CONFIG_OF_ADDRESS && CONFIG_PCI */
#endif /* __OF_ADDRESS_H */
diff --git a/include/linux/of_spmi.h b/include/linux/of_spmi.h
index d07ce63..fe09dec 100644
--- a/include/linux/of_spmi.h
+++ b/include/linux/of_spmi.h
@@ -14,6 +14,17 @@
#include <linux/of_irq.h>
#ifdef CONFIG_OF_SPMI
+/**
+ * of_spmi_register_devices() - Register devices in the SPMI Device Tree
+ * @ctrl: spmi_controller which devices should be registered to.
+ *
+ * This routine scans the SPMI Device Tree, allocating resources and
+ * creating spmi_devices according to the SPMI bus Device Tree
+ * hierarchy. Details of this hierarchy can be found in
+ * Documentation/devicetree/bindings/spmi. This routine is normally
+ * called from the probe routine of the driver registering as a
+ * spmi_controller.
+ */
int of_spmi_register_devices(struct spmi_controller *ctrl);
#else
static int of_spmi_register_devices(struct spmi_controller *ctrl)
diff --git a/include/linux/platform_data/dwc3-omap.h b/include/linux/platform_data/dwc3-omap.h
new file mode 100644
index 0000000..ada4012
--- /dev/null
+++ b/include/linux/platform_data/dwc3-omap.h
@@ -0,0 +1,47 @@
+/**
+ * dwc3-omap.h - OMAP Specific Glue layer, header.
+ *
+ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Author: Felipe Balbi <balbi@ti.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2, as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+enum dwc3_omap_utmi_mode {
+ DWC3_OMAP_UTMI_MODE_UNKNOWN = 0,
+ DWC3_OMAP_UTMI_MODE_HW,
+ DWC3_OMAP_UTMI_MODE_SW,
+};
+
+struct dwc3_omap_data {
+ enum dwc3_omap_utmi_mode utmi_mode;
+};
diff --git a/include/linux/qpnp/gpio.h b/include/linux/qpnp/gpio.h
new file mode 100644
index 0000000..0447a08
--- /dev/null
+++ b/include/linux/qpnp/gpio.h
@@ -0,0 +1,114 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <mach/qpnp.h>
+
+#define QPNP_GPIO_DIR_OUT 1
+#define QPNP_GPIO_DIR_IN 2
+#define QPNP_GPIO_DIR_BOTH (QPNP_GPIO_DIR_OUT | QPNP_GPIO_DIR_IN)
+
+#define QPNP_GPIO_OUT_BUF_OPEN_DRAIN 1
+#define QPNP_GPIO_OUT_BUF_CMOS 0
+
+#define QPNP_GPIO_VIN0 0
+#define QPNP_GPIO_VIN1 1
+#define QPNP_GPIO_VIN2 2
+#define QPNP_GPIO_VIN3 3
+#define QPNP_GPIO_VIN4 4
+#define QPNP_GPIO_VIN5 5
+#define QPNP_GPIO_VIN6 6
+#define QPNP_GPIO_VIN7 7
+
+#define QPNP_GPIO_PULL_UP_30 0
+#define QPNP_GPIO_PULL_UP_1P5 1
+#define QPNP_GPIO_PULL_UP_31P5 2
+#define QPNP_GPIO_PULL_UP_1P5_30 3
+#define QPNP_GPIO_PULL_DN 4
+#define QPNP_GPIO_PULL_NO 5
+
+#define QPNP_GPIO_OUT_STRENGTH_LOW 1
+#define QPNP_GPIO_OUT_STRENGTH_MED 2
+#define QPNP_GPIO_OUT_STRENGTH_HIGH 3
+
+#define QPNP_GPIO_FUNC_NORMAL 0
+#define QPNP_GPIO_FUNC_PAIRED 1
+#define QPNP_GPIO_FUNC_1 2
+#define QPNP_GPIO_FUNC_2 3
+#define QPNP_GPIO_DTEST1 4
+#define QPNP_GPIO_DTEST2 5
+#define QPNP_GPIO_DTEST3 6
+#define QPNP_GPIO_DTEST4 7
+
+/**
+ * struct qpnp_gpio_cfg - structure to specify gpio configurtion values
+ * @direction: indicates whether the gpio should be input, output, or
+ * both. Should be of the type QPNP_GPIO_DIR_*
+ * @output_type: indicates gpio should be configured as CMOS or open
+ * drain. Should be of the type QPNP_GPIO_OUT_BUF_*
+ * @output_value: The gpio output value of the gpio line - 0 or 1
+ * @pull: Indicates whether a pull up or pull down should be
+ * applied. If a pullup is required the current strength
+ * needs to be specified. Current values of 30uA, 1.5uA,
+ * 31.5uA, 1.5uA with 30uA boost are supported. This value
+ * should be one of the QPNP_GPIO_PULL_*
+ * @vin_sel: specifies the voltage level when the output is set to 1.
+ * For an input gpio specifies the voltage level at which
+ * the input is interpreted as a logical 1.
+ * @out_strength: the amount of current supplied for an output gpio,
+ * should be of the type QPNP_GPIO_STRENGTH_*
+ * @source_sel: choose alternate function for the gpio. Certain gpios
+ * can be paired (shorted) with each other. Some gpio pin
+ * can act as alternate functions. This parameter should
+ * be of type QPNP_GPIO_FUNC_*
+ * @inv_int_pol: Invert polarity before feeding the line to the interrupt
+ * module in pmic. This feature will almost be never used
+ * since the pm8xxx interrupt block can detect both edges
+ * and both levels.
+ * @master_en: 1 = Enable features within the GPIO block based on
+ * configurations.
+ * 0 = Completely disable the GPIO block and let the pin
+ * float with high impedance regardless of other settings.
+ */
+struct qpnp_gpio_cfg {
+ int direction;
+ int output_type;
+ int output_value;
+ int pull;
+ int vin_sel;
+ int out_strength;
+ int src_select;
+ int inv_int_pol;
+ int master_en;
+};
+
+/**
+ * qpnp_gpio_config - Apply gpio configuration for Linux gpio
+ * @gpio: Linux gpio number to configure.
+ * @param: parameters to configure.
+ *
+ * This routine takes a Linux gpio number that corresponds with a
+ * PMIC gpio and applies the configuration specified in 'param'.
+ * This gpio number can be ascertained by of_get_gpio_flags() or
+ * the qpnp_gpio_map_gpio() API.
+ */
+int qpnp_gpio_config(int gpio, struct qpnp_gpio_cfg *param);
+
+/**
+ * qpnp_gpio_map_gpio - Obtain Linux GPIO number from device spec
+ * @slave_id: slave_id of the spmi_device for the gpio in question.
+ * @pmic_gpio: PMIC gpio number to lookup.
+ *
+ * This routine is used in legacy configurations that do not support
+ * Device Tree. If you are using Device Tree, you should not use this.
+ * For such cases, use of_get_gpio() instead.
+ */
+int qpnp_gpio_map_gpio(uint16_t slave_id, uint32_t pmic_gpio);
diff --git a/include/linux/qseecom.h b/include/linux/qseecom.h
new file mode 100644
index 0000000..6d39026
--- /dev/null
+++ b/include/linux/qseecom.h
@@ -0,0 +1,149 @@
+#ifndef __QSEECOM_H_
+#define __QSEECOM_H_
+
+#include <linux/types.h>
+#include <linux/ioctl.h>
+
+#define MAX_ION_FD 4
+#define MAX_APP_NAME_SIZE 32
+
+/*
+ * struct qseecom_register_listener_req -
+ * for register listener ioctl request
+ * @listener_id - service id (shared between userspace and QSE)
+ * @ifd_data_fd - ion handle
+ * @virt_sb_base - shared buffer base in user space
+ * @sb_size - shared buffer size
+ */
+struct qseecom_register_listener_req {
+ uint32_t listener_id; /* in */
+ int32_t ifd_data_fd; /* in */
+ uint32_t virt_sb_base; /* in */
+ uint32_t sb_size; /* in */
+};
+
+/*
+ * struct qseecom_send_cmd_req - for send command ioctl request
+ * @cmd_req_len - command buffer length
+ * @cmd_req_buf - command buffer
+ * @resp_len - response buffer length
+ * @resp_buf - response buffer
+ */
+struct qseecom_send_cmd_req {
+ void *cmd_req_buf; /* in */
+ unsigned int cmd_req_len; /* in */
+ void *resp_buf; /* in/out */
+ unsigned int resp_len; /* in/out */
+};
+
+
+/*
+ * struct qseecom_ion_fd_info - ion fd handle data information
+ * @fd - ion handle to some memory allocated in user space
+ * @cmd_buf_offset - command buffer offset
+ */
+struct qseecom_ion_fd_info {
+ int32_t fd;
+ uint32_t cmd_buf_offset;
+};
+/*
+ * struct qseecom_send_modfd_cmd_req - for send command ioctl request
+ * @cmd_req_len - command buffer length
+ * @cmd_req_buf - command buffer
+ * @resp_len - response buffer length
+ * @resp_buf - response buffer
+ * @ifd_data_fd - ion handle to memory allocated in user space
+ * @cmd_buf_offset - command buffer offset
+ */
+struct qseecom_send_modfd_cmd_req {
+ void *cmd_req_buf; /* in */
+ unsigned int cmd_req_len; /* in */
+ void *resp_buf; /* in/out */
+ unsigned int resp_len; /* in/out */
+ struct qseecom_ion_fd_info ifd_data[MAX_ION_FD];
+};
+/*
+ * struct qseecom_listener_send_resp_req - signal to continue the send_cmd req.
+ * Used as a trigger from HLOS service to notify QSEECOM that it's done with its
+ * operation and provide the response for QSEECOM can continue the incomplete
+ * command execution
+ * @resp_len - Length of the response
+ * @resp_buf - Response buffer where the response of the cmd should go.
+ */
+struct qseecom_send_resp_req {
+ void *resp_buf; /* in */
+ unsigned int resp_len; /* in */
+};
+
+/*
+ * struct qseecom_load_img_data - for sending image length information and
+ * ion file descriptor to the qseecom driver. ion file descriptor is used
+ * for retrieving the ion file handle and in turn the physical address of
+ * the image location.
+ * @mdt_len - Length of the .mdt file in bytes.
+ * @img_len - Length of the .mdt + .b00 +..+.bxx images files in bytes
+ * @ion_fd - Ion file descriptor used when allocating memory.
+ * @img_name - Name of the image.
+*/
+struct qseecom_load_img_req {
+ uint32_t mdt_len; /* in */
+ uint32_t img_len; /* in */
+ int32_t ifd_data_fd; /* in */
+ char img_name[MAX_APP_NAME_SIZE]; /* in */
+ int app_id; /* out*/
+};
+
+struct qseecom_set_sb_mem_param_req {
+ int32_t ifd_data_fd; /* in */
+ uint32_t virt_sb_base; /* in */
+ uint32_t sb_len; /* in */
+};
+
+/*
+ * struct qseecom_qseos_version_req - get qseos version
+ * @qseos_version - version number
+ */
+struct qseecom_qseos_version_req {
+ unsigned int qseos_version; /* in */
+};
+
+#define QSEECOM_IOC_MAGIC 0x97
+
+
+#define QSEECOM_IOCTL_REGISTER_LISTENER_REQ \
+ _IOWR(QSEECOM_IOC_MAGIC, 1, struct qseecom_register_listener_req)
+
+#define QSEECOM_IOCTL_UNREGISTER_LISTENER_REQ \
+ _IO(QSEECOM_IOC_MAGIC, 2)
+
+#define QSEECOM_IOCTL_SEND_CMD_REQ \
+ _IOWR(QSEECOM_IOC_MAGIC, 3, struct qseecom_send_cmd_req)
+
+#define QSEECOM_IOCTL_SEND_MODFD_CMD_REQ \
+ _IOWR(QSEECOM_IOC_MAGIC, 4, struct qseecom_send_modfd_cmd_req)
+
+#define QSEECOM_IOCTL_RECEIVE_REQ \
+ _IO(QSEECOM_IOC_MAGIC, 5)
+
+#define QSEECOM_IOCTL_SEND_RESP_REQ \
+ _IO(QSEECOM_IOC_MAGIC, 6)
+
+#define QSEECOM_IOCTL_LOAD_APP_REQ \
+ _IOWR(QSEECOM_IOC_MAGIC, 7, struct qseecom_load_img_req)
+
+#define QSEECOM_IOCTL_SET_MEM_PARAM_REQ \
+ _IOWR(QSEECOM_IOC_MAGIC, 8, struct qseecom_set_sb_mem_param_req)
+
+#define QSEECOM_IOCTL_UNLOAD_APP_REQ \
+ _IO(QSEECOM_IOC_MAGIC, 9)
+
+#define QSEECOM_IOCTL_GET_QSEOS_VERSION_REQ \
+ _IOWR(QSEECOM_IOC_MAGIC, 10, struct qseecom_qseos_version_req)
+
+#define QSEECOM_IOCTL_PERF_ENABLE_REQ \
+ _IO(QSEECOM_IOC_MAGIC, 11)
+
+#define QSEECOM_IOCTL_PERF_DISABLE_REQ \
+ _IO(QSEECOM_IOC_MAGIC, 12)
+
+#endif /* __QSEECOM_H_ */
diff --git a/include/linux/regulator/stub-regulator.h b/include/linux/regulator/stub-regulator.h
new file mode 100644
index 0000000..1119c51
--- /dev/null
+++ b/include/linux/regulator/stub-regulator.h
@@ -0,0 +1,33 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __STUB_REGULATOR_H__
+#define __STUB_REGULATOR_H__
+
+#include <linux/regulator/machine.h>
+
+#define STUB_REGULATOR_DRIVER_NAME "stub-regulator"
+
+/**
+ * struct stub_regulator_pdata - stub regulator device data
+ * @init_data: regulator constraints
+ * @hpm_min_load: minimum load in uA that will result in the regulator
+ * being set to high power mode
+ * @system_uA: current drawn from regulator not accounted for by any
+ * regulator framework consumer
+ */
+struct stub_regulator_pdata {
+ struct regulator_init_data init_data;
+ int hpm_min_load;
+ int system_uA;
+};
+#endif
diff --git a/include/linux/slimbus/slimbus.h b/include/linux/slimbus/slimbus.h
index 448d9ab..75b132b 100644
--- a/include/linux/slimbus/slimbus.h
+++ b/include/linux/slimbus/slimbus.h
@@ -877,6 +877,7 @@
* -EXFULL is returned if there is no space in TDM to reserve the bandwidth.
* -EISCONN/-ENOTCONN is returned if the channel is already connected or not
* yet defined.
+ * -EINVAL is returned if individual control of a grouped-channel is attempted.
*/
extern int slim_control_ch(struct slim_device *sb, u16 grpchanh,
enum slim_ch_control chctrl, bool commit);
diff --git a/include/linux/spmi.h b/include/linux/spmi.h
index ffcb24e..927978a 100644
--- a/include/linux/spmi.h
+++ b/include/linux/spmi.h
@@ -88,24 +88,36 @@
#define to_spmi_driver(d) container_of(d, struct spmi_driver, driver)
/**
+ * struct spmi_resource: spmi_resource for one device_node
+ * @num_resources: number of resources for this device node
+ * @resources: array of resources for this device_node
+ * @of_node: device_node of the resource in question
+ */
+struct spmi_resource {
+ struct resource *resource;
+ u32 num_resources;
+ struct device_node *of_node;
+};
+
+/**
* Client/device handle (struct spmi_device):
* ------------------------------------------
- * This is the client/device handle returned when a SPMI device
- * is registered with a controller.
- * Pointer to this structure is used by client-driver as a handle.
- * @dev: driver model representation of the device.
- * @name: name of driver to use with this device.
- * @ctrl: SPMI controller managing the bus hosting this device.
- * @resource: array of resources for this device_node
- * @num_resources: number of resources for this device node
- * @sid: slave identifier.
+ * This is the client/device handle returned when a SPMI device
+ * is registered with a controller.
+ * Pointer to this structure is used by client-driver as a handle.
+ * @dev: Driver model representation of the device.
+ * @name: Name of driver to use with this device.
+ * @ctrl: SPMI controller managing the bus hosting this device.
+ * @dev_node: array of SPMI resources - one entry per device_node.
+ * @num_dev_node: number of device_node structures.
+ * @sid: Slave Identifier.
*/
struct spmi_device {
struct device dev;
const char *name;
struct spmi_controller *ctrl;
- struct resource *resource;
- u32 num_resources;
+ struct spmi_resource *dev_node;
+ u32 num_dev_node;
u8 sid;
};
#define to_spmi_device(d) container_of(d, struct spmi_device, dev)
@@ -115,16 +127,16 @@
* @slave_id: slave identifier.
* @spmi_device: device to be registered with the SPMI framework.
* @of_node: pointer to the OpenFirmware device node.
- * @num_resources: number of resources for this device node
- * @resource: array of resources for this device_node
+ * @dev_node: one spmi_resource for each device_node.
+ * @num_dev_node: number of device_node structures.
* @platform_data: goes to spmi_device.dev.platform_data
*/
struct spmi_boardinfo {
char name[SPMI_NAME_SIZE];
uint8_t slave_id;
struct device_node *of_node;
- u32 num_resources;
- struct resource *resource;
+ struct spmi_resource *dev_node;
+ u32 num_dev_node;
const void *platform_data;
};
diff --git a/include/linux/usb.h b/include/linux/usb.h
index 583ceb8..60decb6 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -322,6 +322,13 @@
unsigned is_b_host:1; /* true during some HNP roleswitches */
unsigned b_hnp_enable:1; /* OTG: did A-Host enable HNP? */
unsigned hnp_support:1; /* OTG: HNP is supported on OTG port */
+ unsigned quick_hnp:1; /* OTG: Indiacates if hnp is required
+ irrespective of host_request flag
+ */
+ unsigned otg_vbus_off:1; /* OTG: OTG test device feature bit that
+ * tells A-device to turn off VBUS after
+ * B-device is disconnected.
+ */
struct delayed_work hnp_polling;/* OTG: HNP polling work */
unsigned sg_tablesize; /* 0 or largest number of sg list entries */
diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h
index 736203b..8f60c34 100644
--- a/include/linux/usb/ch9.h
+++ b/include/linux/usb/ch9.h
@@ -34,6 +34,7 @@
#define __LINUX_USB_CH9_H
#include <linux/types.h> /* __u8 etc */
+#include <asm/byteorder.h> /* le16_to_cpu */
/*-------------------------------------------------------------------------*/
@@ -133,6 +134,12 @@
#define TEST_PACKET 4
#define TEST_FORCE_EN 5
+/* OTG test mode feature bits
+ * See ECN OTG2.0 spec Table 6-8
+ */
+#define TEST_OTG_SRP_REQD 6
+#define TEST_OTG_HNP_REQD 7
+
/*
* New Feature Selectors as added by USB 3.0
* See USB 3.0 spec Table 9-6
@@ -143,12 +150,20 @@
#define USB_INTRF_FUNC_SUSPEND 0 /* function suspend */
#define USB_INTR_FUNC_SUSPEND_OPT_MASK 0xFF00
+/*
+ * Suspend Options, Table 9-7 USB 3.0 spec
+ */
+#define USB_INTRF_FUNC_SUSPEND_LP (1 << (8 + 0))
+#define USB_INTRF_FUNC_SUSPEND_RW (1 << (8 + 1))
#define USB_ENDPOINT_HALT 0 /* IN/OUT will STALL */
-#define OTG_STATUS_SELECTOR 0xF000
-#define THOST_REQ_POLL 2000 /* msec */
-#define HOST_REQUEST_FLAG 0
+#define OTG_STATUS_SELECTOR 0xF000
+#define HOST_REQUEST_FLAG 0
+#define THOST_REQ_POLL 1500 /* msec (1000 - 2000) */
+#define OTG_TTST_SUSP 70 /* msec (0 - 100) */
+
+#define OTG_TTST_VBUS_OFF 1
/* Bit array elements as returned by the USB_REQ_GET_STATUS request. */
#define USB_DEV_STAT_U1_ENABLED 2 /* transition into U1 state */
@@ -574,6 +589,17 @@
return usb_endpoint_xfer_isoc(epd) && usb_endpoint_dir_out(epd);
}
+/**
+ * usb_endpoint_maxp - get endpoint's max packet size
+ * @epd: endpoint to be checked
+ *
+ * Returns @epd's max packet
+ */
+static inline int usb_endpoint_maxp(const struct usb_endpoint_descriptor *epd)
+{
+ return __le16_to_cpu(epd->wMaxPacketSize);
+}
+
/*-------------------------------------------------------------------------*/
/* USB_DT_SS_ENDPOINT_COMP: SuperSpeed Endpoint Companion descriptor */
@@ -617,8 +643,10 @@
__u8 bDescriptorType;
__u8 bmAttributes; /* support for HNP, SRP, etc */
+ __le16 bcdOTG;
} __attribute__ ((packed));
+#define USB_DT_OTG_SIZE 5
/* from usb_otg_descriptor.bmAttributes */
#define USB_OTG_SRP (1 << 0)
#define USB_OTG_HNP (1 << 1) /* swap host/device roles */
diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h
index 66a29a9..6938a86 100644
--- a/include/linux/usb/composite.h
+++ b/include/linux/usb/composite.h
@@ -59,6 +59,10 @@
* @hs_descriptors: Table of high speed descriptors, using interface and
* string identifiers assigned during @bind(). If this pointer is null,
* the function will not be available at high speed.
+ * @ss_descriptors: Table of super speed descriptors, using interface and
+ * string identifiers assigned during @bind(). If this
+ * pointer is null after initiation, the function will not
+ * be available at super speed.
* @config: assigned when @usb_add_function() is called; this is the
* configuration with which this function is associated.
* @bind: Before the gadget can register, all of its functions bind() to the
@@ -77,6 +81,10 @@
* @setup: Used for interface-specific control requests.
* @suspend: Notifies functions when the host stops sending USB traffic.
* @resume: Notifies functions when the host restarts USB traffic.
+ * @get_status: Returns function status as a reply to
+ * GetStatus() request when the recepient is Interface.
+ * @func_suspend: callback to be called when
+ * SetFeature(FUNCTION_SUSPEND) is reseived
*
* A single USB function uses one or more interfaces, and should in most
* cases support operation at both full and high speeds. Each function is
@@ -106,6 +114,7 @@
struct usb_gadget_strings **strings;
struct usb_descriptor_header **descriptors;
struct usb_descriptor_header **hs_descriptors;
+ struct usb_descriptor_header **ss_descriptors;
struct usb_configuration *config;
@@ -132,6 +141,10 @@
void (*suspend)(struct usb_function *);
void (*resume)(struct usb_function *);
+ /* USB 3.0 additions */
+ int (*get_status)(struct usb_function *);
+ int (*func_suspend)(struct usb_function *,
+ u8 suspend_opt);
/* private: */
/* internals */
struct list_head list;
@@ -145,20 +158,8 @@
int usb_interface_id(struct usb_configuration *, struct usb_function *);
-/**
- * ep_choose - select descriptor endpoint at current device speed
- * @g: gadget, connected and running at some speed
- * @hs: descriptor to use for high speed operation
- * @fs: descriptor to use for full or low speed operation
- */
-static inline struct usb_endpoint_descriptor *
-ep_choose(struct usb_gadget *g, struct usb_endpoint_descriptor *hs,
- struct usb_endpoint_descriptor *fs)
-{
- if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH)
- return hs;
- return fs;
-}
+int config_ep_by_speed(struct usb_gadget *g, struct usb_function *f,
+ struct usb_ep *_ep);
#define MAX_CONFIG_INTERFACES 16 /* arbitrary; max 255 */
@@ -231,6 +232,7 @@
struct list_head list;
struct list_head functions;
u8 next_interface_id;
+ unsigned superspeed:1;
unsigned highspeed:1;
unsigned fullspeed:1;
struct usb_function *interface[MAX_CONFIG_INTERFACES];
@@ -255,6 +257,7 @@
* identifiers.
* @strings: tables of strings, keyed by identifiers assigned during bind()
* and language IDs provided in control requests
+ * @max_speed: Highest speed the driver supports.
* @needs_serial: set to 1 if the gadget needs userspace to provide
* a serial number. If one is not provided, warning will be printed.
* @unbind: Reverses bind; called as a side effect of unregistering
@@ -282,6 +285,7 @@
const char *iManufacturer;
const struct usb_device_descriptor *dev;
struct usb_gadget_strings **strings;
+ enum usb_device_speed max_speed;
unsigned needs_serial:1;
int (*unbind)(struct usb_composite_dev *);
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index 47e8427..0dbc671 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ -27,6 +27,7 @@
* field, and the usb controller needs one, it is responsible
* for mapping and unmapping the buffer.
* @length: Length of that data
+ * @stream_id: The stream id, when USB3.0 bulk streams are being used
* @no_interrupt: If true, hints that no completion irq is needed.
* Helpful sometimes with deep request queues that are handled
* directly by DMA controllers.
@@ -82,6 +83,7 @@
unsigned length;
dma_addr_t dma;
+ unsigned stream_id:16;
unsigned no_interrupt:1;
unsigned zero:1;
unsigned short_not_ok:1;
@@ -132,8 +134,17 @@
* @maxpacket:The maximum packet size used on this endpoint. The initial
* value can sometimes be reduced (hardware allowing), according to
* the endpoint descriptor used to configure the endpoint.
- * @driver_data:for use by the gadget driver. all other fields are
- * read-only to gadget drivers.
+ * @max_streams: The maximum number of streams supported
+ * by this EP (0 - 16, actual number is 2^n)
+ * @mult: multiplier, 'mult' value for SS Isoc EPs
+ * @maxburst: the maximum number of bursts supported by this EP (for usb3)
+ * @driver_data:for use by the gadget driver.
+ * @address: used to identify the endpoint when finding descriptor that
+ * matches connection speed
+ * @desc: endpoint descriptor. This pointer is set before the endpoint is
+ * enabled and remains valid until the endpoint is disabled.
+ * @comp_desc: In case of SuperSpeed support, this is the endpoint companion
+ * descriptor that is used to configure the endpoint
*
* the bus controller driver lists all the general purpose endpoints in
* gadget->ep_list. the control endpoint (gadget->ep0) is not in that list,
@@ -146,6 +157,12 @@
const struct usb_ep_ops *ops;
struct list_head ep_list;
unsigned maxpacket:16;
+ unsigned max_streams:16;
+ unsigned mult:2;
+ unsigned maxburst:4;
+ u8 address;
+ const struct usb_endpoint_descriptor *desc;
+ const struct usb_ss_ep_comp_descriptor *comp_desc;
};
/*-------------------------------------------------------------------------*/
@@ -154,11 +171,8 @@
* usb_ep_enable - configure endpoint, making it usable
* @ep:the endpoint being configured. may not be the endpoint named "ep0".
* drivers discover endpoints through the ep_list of a usb_gadget.
- * @desc:descriptor for desired behavior. caller guarantees this pointer
- * remains valid until the endpoint is disabled; the data byte order
- * is little-endian (usb-standard).
*
- * when configurations are set, or when interface settings change, the driver
+ * When configurations are set, or when interface settings change, the driver
* will enable or disable the relevant endpoints. while it is enabled, an
* endpoint may be used for i/o until the driver receives a disconnect() from
* the host or until the endpoint is disabled.
@@ -173,10 +187,9 @@
*
* returns zero, or a negative error code.
*/
-static inline int usb_ep_enable(struct usb_ep *ep,
- const struct usb_endpoint_descriptor *desc)
+static inline int usb_ep_enable(struct usb_ep *ep)
{
- return ep->ops->enable(ep, desc);
+ return ep->ops->enable(ep, ep->desc);
}
/**
@@ -417,7 +430,16 @@
/*-------------------------------------------------------------------------*/
+struct usb_dcd_config_params {
+ __u8 bU1devExitLat; /* U1 Device exit Latency */
+#define USB_DEFAULT_U1_DEV_EXIT_LAT 0x01 /* Less then 1 microsec */
+ __le16 bU2DevExitLat; /* U2 Device exit Latency */
+#define USB_DEFAULT_U2_DEV_EXIT_LAT 0x1F4 /* Less then 500 microsec */
+};
+
+
struct usb_gadget;
+struct usb_gadget_driver;
/* the rest of the api to the controller hardware: device operations,
* which don't involve endpoints (or i/o).
@@ -431,6 +453,16 @@
int (*pullup) (struct usb_gadget *, int is_on);
int (*ioctl)(struct usb_gadget *,
unsigned code, unsigned long param);
+ void (*get_config_params)(struct usb_dcd_config_params *);
+ int (*udc_start)(struct usb_gadget *,
+ struct usb_gadget_driver *);
+ int (*udc_stop)(struct usb_gadget *,
+ struct usb_gadget_driver *);
+
+ /* Those two are deprecated */
+ int (*start)(struct usb_gadget_driver *,
+ int (*bind)(struct usb_gadget *));
+ int (*stop)(struct usb_gadget_driver *);
};
/**
@@ -453,6 +485,9 @@
* only supports HNP on a different root port.
* @b_hnp_enable: OTG device feature flag, indicating that the A-Host
* enabled HNP support.
+ * @host_request: A flag set by user when wishes to take up host role.
+ * @otg_srp_reqd: OTG test mode feature to initiate SRP after the end of
+ * current session.
* @name: Identifies the controller hardware type. Used in diagnostics
* and sometimes configuration.
* @dev: Driver model state for this abstract device.
@@ -488,6 +523,7 @@
unsigned a_hnp_support:1;
unsigned a_alt_hnp_support:1;
unsigned host_request:1;
+ unsigned otg_srp_reqd:1;
const char *name;
struct device dev;
};
@@ -523,6 +559,24 @@
}
/**
+ * gadget_is_superspeed() - return true if the hardware handles
+ * supperspeed
+ * @g: controller that might support supper speed
+ */
+static inline int gadget_is_superspeed(struct usb_gadget *g)
+{
+#ifdef CONFIG_USB_GADGET_SUPERSPEED
+ /*
+ * runtime test would check "g->is_superspeed" ... that might be
+ * useful to work around hardware bugs, but is mostly pointless
+ */
+ return 1;
+#else
+ return 0;
+#endif
+}
+
+/**
* gadget_is_otg - return true iff the hardware is OTG-ready
* @g: controller that might have a Mini-AB connector
*
@@ -823,6 +877,9 @@
*/
int usb_gadget_unregister_driver(struct usb_gadget_driver *driver);
+extern int usb_add_gadget_udc(struct device *parent, struct usb_gadget *gadget);
+extern void usb_del_gadget_udc(struct usb_gadget *gadget);
+
/*-------------------------------------------------------------------------*/
/* utility to simplify dealing with string descriptors */
@@ -860,6 +917,11 @@
/* utility to simplify managing config descriptors */
+/* Find and fill the requested descriptor into buffer */
+int
+usb_find_descriptor_fillbuf(void *, unsigned,
+ const struct usb_descriptor_header **, u8);
+
/* write vector of descriptors into buffer */
int usb_descriptor_fillbuf(void *, unsigned,
const struct usb_descriptor_header **);
@@ -872,12 +934,6 @@
struct usb_descriptor_header **usb_copy_descriptors(
struct usb_descriptor_header **);
-/* return copy of endpoint descriptor given original descriptor set */
-struct usb_endpoint_descriptor *usb_find_endpoint(
- struct usb_descriptor_header **src,
- struct usb_descriptor_header **copy,
- struct usb_endpoint_descriptor *match);
-
/**
* usb_free_descriptors - free descriptors returned by usb_copy_descriptors()
* @v: vector of descriptors
@@ -894,6 +950,11 @@
extern struct usb_ep *usb_ep_autoconfig(struct usb_gadget *,
struct usb_endpoint_descriptor *);
+
+extern struct usb_ep *usb_ep_autoconfig_ss(struct usb_gadget *,
+ struct usb_endpoint_descriptor *,
+ struct usb_ss_ep_comp_descriptor *);
+
extern void usb_ep_autoconfig_reset(struct usb_gadget *);
#endif /* __LINUX_USB_GADGET_H */
diff --git a/include/linux/usb/msm_hsusb.h b/include/linux/usb/msm_hsusb.h
index 037cfe7..5845cb6 100644
--- a/include/linux/usb/msm_hsusb.h
+++ b/include/linux/usb/msm_hsusb.h
@@ -183,6 +183,46 @@
struct msm_bus_scale_pdata *bus_scale_table;
};
+/* Timeout (in msec) values (min - max) associated with OTG timers */
+
+#define TA_WAIT_VRISE 100 /* ( - 100) */
+#define TA_WAIT_VFALL 500 /* ( - 1000) */
+
+/*
+ * This option is set for embedded hosts or OTG devices in which leakage
+ * currents are very minimal.
+ */
+#ifdef CONFIG_USB_OTG
+#define TA_WAIT_BCON 30000 /* (1100 - 30000) */
+#else
+#define TA_WAIT_BCON -1
+#endif
+
+#define TA_AIDL_BDIS 500 /* (200 - ) */
+#define TA_BIDL_ADIS 155 /* (155 - 200) */
+#define TB_SRP_FAIL 6000 /* (5000 - 6000) */
+#define TB_ASE0_BRST 200 /* (155 - ) */
+
+/* TB_SSEND_SRP and TB_SE0_SRP are combined */
+#define TB_SRP_INIT 2000 /* (1500 - ) */
+
+#define TA_TST_MAINT 10100 /* (9900 - 10100) */
+#define TB_TST_SRP 3000 /* ( - 5000) */
+#define TB_TST_CONFIG 300
+
+/* Timeout variables */
+
+#define A_WAIT_VRISE 0
+#define A_WAIT_VFALL 1
+#define A_WAIT_BCON 2
+#define A_AIDL_BDIS 3
+#define A_BIDL_ADIS 4
+#define B_SRP_FAIL 5
+#define B_ASE0_BRST 6
+#define A_TST_MAINT 7
+#define B_TST_SRP 8
+#define B_TST_CONFIG 9
+
/**
* struct msm_otg: OTG driver data. Shared by HCD and DCD.
* @otg: USB OTG Transceiver structure.
@@ -229,6 +269,18 @@
#define ID_A 2
#define ID_B 3
#define ID_C 4
+#define A_BUS_DROP 5
+#define A_BUS_REQ 6
+#define A_SRP_DET 7
+#define A_VBUS_VLD 8
+#define B_CONN 9
+#define ADP_CHANGE 10
+#define POWER_UP 11
+#define A_CLR_ERR 12
+#define A_BUS_RESUME 13
+#define A_BUS_SUSPEND 14
+#define A_CONN 15
+#define B_BUS_REQ 16
unsigned long inputs;
struct work_struct sm_work;
atomic_t in_lpm;
@@ -269,6 +321,10 @@
#define PHY_OTG_COMP_DISABLED BIT(2)
struct pm_qos_request_list pm_qos_req_dma;
int reset_counter;
+ unsigned long b_last_se0_sess;
+ unsigned long tmouts;
+ u8 active_tmout;
+ struct hrtimer timer;
};
struct msm_hsic_host_platform_data {
@@ -277,6 +333,11 @@
unsigned hub_reset;
};
+struct msm_usb_host_platform_data {
+ unsigned int power_budget;
+ unsigned int dock_connect_irq;
+};
+
struct usb_bam_pipe_connect {
u32 src_phy_addr;
int src_pipe_index;
diff --git a/include/linux/usb/msm_hsusb_hw.h b/include/linux/usb/msm_hsusb_hw.h
index fcd91da..8a05136 100644
--- a/include/linux/usb/msm_hsusb_hw.h
+++ b/include/linux/usb/msm_hsusb_hw.h
@@ -33,6 +33,8 @@
#define PORTSC_PHCD (1 << 23) /* phy suspend mode */
#define PORTSC_PTS_MASK (3 << 30)
#define PORTSC_PTS_ULPI (3 << 30)
+#define PORTSC_CSC (1 << 1)
+#define PORTSC_CCS (1 << 0)
#define USB_ULPI_VIEWPORT (MSM_USB_BASE + 0x0170)
#define ULPI_RUN (1 << 30)
@@ -54,14 +56,26 @@
#define PHY_IDHV_INTEN (1 << 8) /* PHY ID HV interrupt */
#define PHY_OTGSESSVLDHV_INTEN (1 << 9) /* PHY Session Valid HV int. */
+#define STS_PCI (1 << 2) /* R/WC - Port Change Detect */
+#define STS_URI (1 << 6) /* R/WC - RESET recv'd */
+#define STS_SLI (1 << 8) /* R/WC - suspend state entered */
+
/* OTG definitions */
#define OTGSC_INTSTS_MASK (0x7f << 16)
#define OTGSC_IDPU (1 << 5)
+#define OTGSC_INTR_MASK (0x7f << 24)
+#define OTGSC_HADP (1 << 6)
#define OTGSC_ID (1 << 8)
#define OTGSC_BSV (1 << 11)
#define OTGSC_IDIS (1 << 16)
#define OTGSC_BSVIS (1 << 19)
#define OTGSC_IDIE (1 << 24)
#define OTGSC_BSVIE (1 << 27)
+#define OTGSC_DPIE (1 << 30)
+#define OTGSC_DPIS (1 << 22)
+
+/* OTG interrupt status mask */
+#define OTG_USBSTS_MASK (STS_PCI | STS_URI | STS_SLI | PHY_ALT_INT)
+#define OTG_OTGSTS_MASK (OTGSC_IDIS | OTGSC_BSVIS | OTGSC_DPIS)
#endif /* __LINUX_USB_GADGET_MSM72K_UDC_H__ */
diff --git a/include/linux/usb/quirks.h b/include/linux/usb/quirks.h
index 3e93de7..fb1ca8c 100644
--- a/include/linux/usb/quirks.h
+++ b/include/linux/usb/quirks.h
@@ -30,4 +30,6 @@
descriptor */
#define USB_QUIRK_DELAY_INIT 0x00000040
+#define USB_QUIRK_OTG_PET 0x00000080
+
#endif /* __LINUX_USB_QUIRKS_H */
diff --git a/include/linux/usb/ulpi.h b/include/linux/usb/ulpi.h
index 9595796..540a74c 100644
--- a/include/linux/usb/ulpi.h
+++ b/include/linux/usb/ulpi.h
@@ -145,6 +145,7 @@
#define ULPI_INT_SESS_VALID (1 << 2)
#define ULPI_INT_SESS_END (1 << 3)
#define ULPI_INT_IDGRD (1 << 4)
+#define ULPI_INT_DP (1 << 7)
/* Debug */
#define ULPI_DEBUG_LINESTATE0 (1 << 0)
diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h
index ebd2b75..fa3ddf8 100644
--- a/include/linux/videodev2.h
+++ b/include/linux/videodev2.h
@@ -1344,6 +1344,7 @@
enum v4l2_mpeg_video_header_mode {
V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE = 0,
V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME = 1,
+ V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_I_FRAME = 2,
};
#define V4L2_CID_MPEG_VIDEO_MAX_REF_PIC (V4L2_CID_MPEG_BASE+217)
diff --git a/include/media/msm/vcd_api.h b/include/media/msm/vcd_api.h
index 1cd8448..8bb2558 100644
--- a/include/media/msm/vcd_api.h
+++ b/include/media/msm/vcd_api.h
@@ -56,6 +56,7 @@
struct vcd_frame_data {
u8 *virtual;
u8 *physical;
+ u32 ion_flag;
u32 alloc_len;
u32 data_len;
u32 offset;
diff --git a/include/media/msm/vcd_property.h b/include/media/msm/vcd_property.h
index 0279216..0b501ea 100644
--- a/include/media/msm/vcd_property.h
+++ b/include/media/msm/vcd_property.h
@@ -50,6 +50,7 @@
#define VCD_I_META_BUFFER_MODE (VCD_START_BASE + 0x22)
#define VCD_I_DISABLE_DMX (VCD_START_BASE + 0x23)
#define VCD_I_DISABLE_DMX_SUPPORT (VCD_START_BASE + 0x24)
+#define VCD_I_ENABLE_SPS_PPS_FOR_IDR (VCD_START_BASE + 0x25)
#define VCD_START_REQ (VCD_START_BASE + 0x1000)
#define VCD_I_REQ_IFRAME (VCD_START_REQ + 0x1)
@@ -347,4 +348,8 @@
int alignment;
};
+struct vcd_property_sps_pps_for_idr_enable {
+ u32 sps_pps_for_idr_enable_flag;
+};
+
#endif
diff --git a/include/media/msm/vidc_init.h b/include/media/msm/vidc_init.h
index 60cc35f..4e28c74 100644
--- a/include/media/msm/vidc_init.h
+++ b/include/media/msm/vidc_init.h
@@ -14,7 +14,8 @@
#ifndef VIDC_INIT_H
#define VIDC_INIT_H
#include <linux/ion.h>
-#include "vidc_type.h"
+#include <media/msm/vidc_type.h>
+#include <media/msm/vcd_property.h>
#define VIDC_MAX_NUM_CLIENTS 4
#define MAX_VIDEO_NUM_OF_BUFF 100
@@ -28,6 +29,7 @@
unsigned long user_vaddr;
unsigned long kernel_vaddr;
unsigned long phy_addr;
+ unsigned long buff_ion_flag;
struct ion_handle *buff_ion_handle;
int pmem_fd;
struct file *file;
@@ -63,6 +65,9 @@
void __iomem *vidc_get_ioaddr(void);
int vidc_load_firmware(void);
void vidc_release_firmware(void);
+u32 vidc_get_fd_info(struct video_client_ctx *client_ctx,
+ enum buffer_dir buffer, int pmem_fd,
+ unsigned long kvaddr, int index);
u32 vidc_lookup_addr_table(struct video_client_ctx *client_ctx,
enum buffer_dir buffer, u32 search_with_user_vaddr,
unsigned long *user_vaddr, unsigned long *kernel_vaddr,
@@ -76,6 +81,8 @@
u32 vidc_delete_addr_table(struct video_client_ctx *client_ctx,
enum buffer_dir buffer, unsigned long user_vaddr,
unsigned long *kernel_vaddr);
+void vidc_cleanup_addr_table(struct video_client_ctx *client_ctx,
+ enum buffer_dir buffer);
u32 vidc_timer_create(void (*timer_handler)(void *),
void *user_data, void **timer_handle);
diff --git a/include/media/msm_camera.h b/include/media/msm_camera.h
index e0a04dc..cf7157c 100644
--- a/include/media/msm_camera.h
+++ b/include/media/msm_camera.h
@@ -342,6 +342,7 @@
#define MSM_CAM_RESP_MAX 8
#define MSM_CAM_APP_NOTIFY_EVENT 0
+#define MSM_CAM_APP_NOTIFY_ERROR_EVENT 1
/* this one is used to send ctrl/status up to config thread */
@@ -1137,6 +1138,10 @@
uint32_t f_pix_den;
uint32_t total_f_dist_num;
uint32_t total_f_dist_den;
+ uint32_t hor_view_angle_num;
+ uint32_t hor_view_angle_den;
+ uint32_t ver_view_angle_num;
+ uint32_t ver_view_angle_den;
};
struct msm_actuator_cfg_data {
@@ -1185,7 +1190,6 @@
uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS];
const char *video_dev_name[MSM_MAX_CAMERA_SENSORS];
enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS];
-
};
struct msm_cam_config_dev_info {
@@ -1220,6 +1224,13 @@
uint8_t flash_enabled;
int8_t total_steps;
uint8_t support_3d;
+ enum flash_type flashtype;
+ enum sensor_type_t sensor_type;
+ uint32_t pxlcode; /* enum v4l2_mbus_pixelcode */
+ uint32_t camera_type; /* msm_camera_type */
+ int mount_angle;
+ uint32_t max_width;
+ uint32_t max_height;
};
#define V4L2_SINGLE_PLANE 0
@@ -1247,4 +1258,8 @@
uint8_t vpe_can_use;
};
+#define QCAMERA_NAME "qcamera"
+#define QCAMERA_DEVICE_GROUP_ID 1
+#define QCAMERA_VNODE_GROUP_ID 2
+
#endif /* __LINUX_MSM_CAMERA_H */
diff --git a/include/media/msm_isp.h b/include/media/msm_isp.h
index 07784e2..cb728a0 100644
--- a/include/media/msm_isp.h
+++ b/include/media/msm_isp.h
@@ -199,6 +199,7 @@
#define VFE_CMD_SCALE_OUTPUT2_CONFIG 135
#define VFE_CMD_CAPTURE_RAW 136
#define VFE_CMD_STOP_LIVESHOT 137
+#define VFE_CMD_RECONFIG_VFE 138
struct msm_isp_cmd {
int32_t id;
@@ -241,8 +242,17 @@
#define VPE_SCALER_CONFIG_LEN 260
#define VPE_DIS_OFFSET_CFG_LEN 12
-#define IMEM_Y_OFFSET 0x2E000000
-#define IMEM_CBCR_OFFSET 0x2E00FA00
+
+#define CAPTURE_WIDTH 1280
+#define IMEM_Y_SIZE (CAPTURE_WIDTH*16)
+#define IMEM_CBCR_SIZE (CAPTURE_WIDTH*8)
+
+#define IMEM_Y_PING_OFFSET 0x2E000000
+#define IMEM_CBCR_PING_OFFSET (IMEM_Y_PING_OFFSET + IMEM_Y_SIZE)
+
+#define IMEM_Y_PONG_OFFSET (IMEM_CBCR_PING_OFFSET + IMEM_CBCR_SIZE)
+#define IMEM_CBCR_PONG_OFFSET (IMEM_Y_PONG_OFFSET + IMEM_Y_SIZE)
+
struct msm_vpe_op_mode_cfg {
uint8_t op_mode_cfg[VPE_OPERATION_MODE_CFG_LEN];
diff --git a/include/media/radio-iris.h b/include/media/radio-iris.h
index 34a21bd..de2b356 100644
--- a/include/media/radio-iris.h
+++ b/include/media/radio-iris.h
@@ -675,7 +675,7 @@
/* Band limits */
#define REGION_US_EU_BAND_LOW 87500
-#define REGION_US_EU_BAND_HIGH 107900
+#define REGION_US_EU_BAND_HIGH 108000
#define REGION_JAPAN_STANDARD_BAND_LOW 76000
#define REGION_JAPAN_STANDARD_BAND_HIGH 90000
#define REGION_JAPAN_WIDE_BAND_LOW 90000
diff --git a/include/media/tavarua.h b/include/media/tavarua.h
index bedfc7c..211d146 100644
--- a/include/media/tavarua.h
+++ b/include/media/tavarua.h
@@ -152,7 +152,7 @@
* Here we have IOCTl's that are specific to IRIS
* (V4L2_CID_PRIVATE_BASE + 0x1E to V4L2_CID_PRIVATE_BASE + 0x28)
*/
- V4L2_CID_PRIVATE_SOFT_MUTE, /* 0x800001E*/
+ V4L2_CID_PRIVATE_SOFT_MUTE,/* 0x800001E*/
V4L2_CID_PRIVATE_RIVA_ACCS_ADDR,
V4L2_CID_PRIVATE_RIVA_ACCS_LEN,
V4L2_CID_PRIVATE_RIVA_PEEK,
@@ -162,16 +162,16 @@
V4L2_CID_PRIVATE_SSBI_POKE,
V4L2_CID_PRIVATE_TX_TONE,
V4L2_CID_PRIVATE_RDS_GRP_COUNTERS,
- V4L2_CID_PRIVATE_SET_NOTCH_FILTER, /* 0x8000028 */
+ V4L2_CID_PRIVATE_SET_NOTCH_FILTER,/* 0x8000028 */
- V4L2_CID_PRIVATE_TAVARUA_SET_AUDIO_PATH, /* 0x8000029 */
- V4L2_CID_PRIVATE_TAVARUA_DO_CALIBRATION, /* 0x800002A : IRIS command */
- V4L2_CID_PRIVATE_TAVARUA_SRCH_ALGORITHM, /* 0x800002B */
-
- V4L2_CID_PRIVATE_TAVARUA_ON_CHANNEL_THRESHOLD =
- V4L2_CTRL_CLASS_USER + 0x92B,
- V4L2_CID_PRIVATE_TAVARUA_OFF_CHANNEL_THRESHOLD =
- V4L2_CTRL_CLASS_USER + 0x92C
+ V4L2_CID_PRIVATE_TAVARUA_SET_AUDIO_PATH,/* 0x8000029 */
+ V4L2_CID_PRIVATE_TAVARUA_DO_CALIBRATION,/* 0x800002A : IRIS */
+ V4L2_CID_PRIVATE_TAVARUA_SRCH_ALGORITHM,/* 0x800002B */
+ V4L2_CID_PRIVATE_IRIS_GET_SINR, /* 0x800002C : IRIS */
+ V4L2_CID_PRIVATE_INTF_LOW_THRESHOLD, /* 0x800002D */
+ V4L2_CID_PRIVATE_INTF_HIGH_THRESHOLD, /* 0x800002E */
+ V4L2_CID_PRIVATE_SINR_THRESHOLD, /* 0x800002F : IRIS */
+ V4L2_CID_PRIVATE_SINR_SAMPLES, /* 0x8000030 : IRIS */
};
@@ -349,6 +349,7 @@
(reg = (reg & ~mask) | (((val) << offset) & mask))
#define GET_REG_FIELD(reg, offset, mask) ((reg & mask) >> offset)
#define RSH_DATA(val, offset) ((val) >> (offset))
+#define LSH_DATA(val, offset) ((val) << (offset))
#define GET_ABS_VAL(val) ((val) & (0xFF))
enum radio_state_t {
diff --git a/include/net/bluetooth/hci_core.h b/include/net/bluetooth/hci_core.h
index 164d3b4..3ca14ff 100644
--- a/include/net/bluetooth/hci_core.h
+++ b/include/net/bluetooth/hci_core.h
@@ -570,7 +570,7 @@
struct hci_conn *hci_le_conn_add(struct hci_dev *hdev, bdaddr_t *dst,
__u8 addr_type);
int hci_conn_del(struct hci_conn *conn);
-void hci_conn_hash_flush(struct hci_dev *hdev);
+void hci_conn_hash_flush(struct hci_dev *hdev, u8 is_process);
void hci_conn_check_pending(struct hci_dev *hdev);
struct hci_chan *hci_chan_add(struct hci_dev *hdev);
@@ -751,7 +751,8 @@
int (*connect_ind) (struct hci_dev *hdev, bdaddr_t *bdaddr, __u8 type);
int (*connect_cfm) (struct hci_conn *conn, __u8 status);
int (*disconn_ind) (struct hci_conn *conn);
- int (*disconn_cfm) (struct hci_conn *conn, __u8 reason);
+ int (*disconn_cfm) (struct hci_conn *conn, __u8 reason,
+ __u8 is_process);
int (*recv_acldata) (struct hci_conn *conn, struct sk_buff *skb, __u16 flags);
int (*recv_scodata) (struct hci_conn *conn, struct sk_buff *skb);
int (*security_cfm) (struct hci_conn *conn, __u8 status, __u8 encrypt);
@@ -808,17 +809,18 @@
return reason;
}
-static inline void hci_proto_disconn_cfm(struct hci_conn *conn, __u8 reason)
+static inline void hci_proto_disconn_cfm(struct hci_conn *conn, __u8 reason,
+ __u8 is_process)
{
register struct hci_proto *hp;
hp = hci_proto[HCI_PROTO_L2CAP];
if (hp && hp->disconn_cfm)
- hp->disconn_cfm(conn, reason);
+ hp->disconn_cfm(conn, reason, is_process);
hp = hci_proto[HCI_PROTO_SCO];
if (hp && hp->disconn_cfm)
- hp->disconn_cfm(conn, reason);
+ hp->disconn_cfm(conn, reason, is_process);
if (conn->disconn_cfm_cb)
conn->disconn_cfm_cb(conn, reason);
@@ -1049,6 +1051,7 @@
int mgmt_remote_class(u16 index, bdaddr_t *bdaddr, u8 dev_class[3]);
int mgmt_remote_version(u16 index, bdaddr_t *bdaddr, u8 ver, u16 mnf,
u16 sub_ver);
+int mgmt_remote_features(u16 index, bdaddr_t *bdaddr, u8 features[8]);
/* HCI info for socket */
#define hci_pi(sk) ((struct hci_pinfo *) sk)
diff --git a/include/net/bluetooth/mgmt.h b/include/net/bluetooth/mgmt.h
index 9e79fb3..9c089e0 100644
--- a/include/net/bluetooth/mgmt.h
+++ b/include/net/bluetooth/mgmt.h
@@ -161,7 +161,6 @@
struct mgmt_cp_pair_device {
bdaddr_t bdaddr;
__u8 io_cap;
- __u8 ssp_cap;
} __packed;
struct mgmt_rp_pair_device {
bdaddr_t bdaddr;
@@ -355,3 +354,9 @@
__u16 manufacturer;
__u16 lmp_subver;
} __packed;
+
+#define MGMT_EV_REMOTE_FEATURES 0x0019
+struct mgmt_ev_remote_features {
+ bdaddr_t bdaddr;
+ uint8_t features[8];
+} __packed;
diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h
index 8be88bb..4898ea2 100644
--- a/include/net/cfg80211.h
+++ b/include/net/cfg80211.h
@@ -847,9 +847,11 @@
* @n_channels: total number of channels to scan
* @ie: optional information element(s) to add into Probe Request or %NULL
* @ie_len: length of ie in octets
+ * @rates: bitmap of rates to advertise for each band
* @wiphy: the wiphy this was for
* @dev: the interface
* @aborted: (internal) scan request was notified as aborted
+ * @no_cck: used to send probe requests at non CCK rate in 2GHz band
*/
struct cfg80211_scan_request {
struct cfg80211_ssid *ssids;
@@ -858,10 +860,13 @@
const u8 *ie;
size_t ie_len;
+ u32 rates[IEEE80211_NUM_BANDS];
+
/* internal */
struct wiphy *wiphy;
struct net_device *dev;
bool aborted;
+ bool no_cck;
/* keep last */
struct ieee80211_channel *channels[0];
diff --git a/include/sound/q6asm.h b/include/sound/q6asm.h
index d08f528..0fabc5b 100644
--- a/include/sound/q6asm.h
+++ b/include/sound/q6asm.h
@@ -15,6 +15,9 @@
#include <mach/qdsp6v2/apr.h>
#include <mach/msm_subsystem_map.h>
#include <sound/apr_audio.h>
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+#include <linux/ion.h>
+#endif
#define IN 0x000
#define OUT 0x001
@@ -94,10 +97,15 @@
struct audio_buffer {
dma_addr_t phys;
void *data;
- struct msm_mapped_buffer *mem_buffer;
uint32_t used;
uint32_t size;/* size of buffer */
uint32_t actual_size; /* actual number of bytes read by DSP */
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ struct ion_handle *handle;
+ struct ion_client *client;
+#else
+ struct msm_mapped_buffer *mem_buffer;
+#endif
};
struct audio_aio_write_param {
diff --git a/kernel/power/fbearlysuspend.c b/kernel/power/fbearlysuspend.c
index 1513765..4877372 100644
--- a/kernel/power/fbearlysuspend.c
+++ b/kernel/power/fbearlysuspend.c
@@ -19,7 +19,10 @@
#include "power.h"
+#define MAX_BUF 100
+
static wait_queue_head_t fb_state_wq;
+static int display = 1;
static DEFINE_SPINLOCK(fb_state_lock);
static enum {
FB_STATE_STOPPED_DRAWING,
@@ -71,10 +74,16 @@
ret = wait_event_interruptible(fb_state_wq,
fb_state != FB_STATE_DRAWING_OK);
- if (ret && fb_state == FB_STATE_DRAWING_OK)
+ if (ret && fb_state == FB_STATE_DRAWING_OK) {
return ret;
- else
+ } else {
s += sprintf(buf, "sleeping");
+ if (display == 1) {
+ display = 0;
+ sysfs_notify(power_kobj, NULL, "wait_for_fb_status");
+ }
+ }
+
return s - buf;
}
@@ -96,28 +105,47 @@
fb_state == FB_STATE_DRAWING_OK);
if (ret && fb_state != FB_STATE_DRAWING_OK)
return ret;
- else
+ else {
s += sprintf(buf, "awake");
-
+ if (display == 0) {
+ display = 1;
+ sysfs_notify(power_kobj, NULL, "wait_for_fb_status");
+ }
+ }
return s - buf;
}
-#define power_ro_attr(_name) \
-static struct kobj_attribute _name##_attr = { \
- .attr = { \
- .name = __stringify(_name), \
- .mode = 0444, \
- }, \
- .show = _name##_show, \
- .store = NULL, \
+static ssize_t wait_for_fb_status_show(struct kobject *kobj,
+ struct kobj_attribute *attr, char *buf)
+{
+ int ret = 0;
+
+ if (display == 1)
+ ret = snprintf(buf, strnlen("on", MAX_BUF) + 1, "on");
+ else
+ ret = snprintf(buf, strnlen("off", MAX_BUF) + 1, "off");
+
+ return ret;
}
+#define power_ro_attr(_name) \
+ static struct kobj_attribute _name##_attr = { \
+ .attr = { \
+ .name = __stringify(_name), \
+ .mode = 0444, \
+ }, \
+ .show = _name##_show, \
+ .store = NULL, \
+ }
+
power_ro_attr(wait_for_fb_sleep);
power_ro_attr(wait_for_fb_wake);
+power_ro_attr(wait_for_fb_status);
static struct attribute *g[] = {
&wait_for_fb_sleep_attr.attr,
&wait_for_fb_wake_attr.attr,
+ &wait_for_fb_status_attr.attr,
NULL,
};
diff --git a/kernel/power/main.c b/kernel/power/main.c
index ff29679..6aeabf9 100644
--- a/kernel/power/main.c
+++ b/kernel/power/main.c
@@ -15,6 +15,8 @@
#include "power.h"
+#define MAX_BUF 100
+
DEFINE_MUTEX(pm_mutex);
#ifdef CONFIG_PM_SLEEP
@@ -23,6 +25,10 @@
static BLOCKING_NOTIFIER_HEAD(pm_chain_head);
+static struct hrtimer in_ev_timer;
+static int input_processed;
+static ktime_t touch_evt_timer_val;
+
int register_pm_notifier(struct notifier_block *nb)
{
return blocking_notifier_chain_register(&pm_chain_head, nb);
@@ -67,6 +73,72 @@
power_attr(pm_async);
+static ssize_t
+touch_event_show(struct kobject *kobj,
+ struct kobj_attribute *attr, char *buf)
+{
+ if (input_processed == 0)
+ return snprintf(buf, strnlen("touch_event", MAX_BUF) + 1,
+ "touch_event");
+ else
+ return snprintf(buf, strnlen("null", MAX_BUF) + 1,
+ "null");
+}
+
+static ssize_t
+touch_event_store(struct kobject *kobj,
+ struct kobj_attribute *attr,
+ const char *buf, size_t n)
+{
+
+ hrtimer_cancel(&in_ev_timer);
+ input_processed = 0;
+
+ /* set a timer to notify the userspace to stop processing
+ * touch event
+ */
+ hrtimer_start(&in_ev_timer, touch_evt_timer_val, HRTIMER_MODE_REL);
+
+ /* wakeup the userspace poll */
+ sysfs_notify(kobj, NULL, "touch_event");
+
+ return n;
+}
+
+power_attr(touch_event);
+
+static ssize_t
+touch_event_timer_show(struct kobject *kobj,
+ struct kobj_attribute *attr, char *buf)
+{
+ return snprintf(buf, MAX_BUF, "%lld", touch_evt_timer_val.tv64);
+}
+
+static ssize_t
+touch_event_timer_store(struct kobject *kobj,
+ struct kobj_attribute *attr,
+ const char *buf, size_t n)
+{
+ unsigned long val;
+
+ if (strict_strtoul(buf, 10, &val))
+ return -EINVAL;
+
+ touch_evt_timer_val = ktime_set(0, val*1000);
+
+ return n;
+}
+
+power_attr(touch_event_timer);
+
+static enum hrtimer_restart input_event_stop(struct hrtimer *hrtimer)
+{
+ /* wakeup the userspace poll */
+ input_processed = 1;
+ sysfs_notify(power_kobj, NULL, "touch_event");
+ return HRTIMER_NORESTART;
+}
+
#ifdef CONFIG_PM_DEBUG
int pm_test_level = TEST_NONE;
@@ -313,7 +385,9 @@
power_attr(wake_unlock);
#endif
-static struct attribute * g[] = {
+static struct attribute *g[] = {
+ &touch_event_attr.attr,
+ &touch_event_timer_attr.attr,
&state_attr.attr,
#ifdef CONFIG_PM_TRACE
&pm_trace_attr.attr,
@@ -358,6 +432,11 @@
return error;
hibernate_image_size_init();
hibernate_reserved_size_init();
+
+ touch_evt_timer_val = ktime_set(2, 0);
+ hrtimer_init(&in_ev_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+ in_ev_timer.function = &input_event_stop;
+
power_kobj = kobject_create_and_add("power", NULL);
if (!power_kobj)
return -ENOMEM;
diff --git a/net/bluetooth/hci_conn.c b/net/bluetooth/hci_conn.c
index 899c538..a8e5af9 100644
--- a/net/bluetooth/hci_conn.c
+++ b/net/bluetooth/hci_conn.c
@@ -728,7 +728,7 @@
{
BT_DBG("conn %p", conn);
- hci_proto_disconn_cfm(conn, reason);
+ hci_proto_disconn_cfm(conn, reason, 0);
}
EXPORT_SYMBOL(hci_disconnect);
@@ -787,6 +787,10 @@
if (!test_and_set_bit(HCI_CONN_AUTH_PEND, &conn->pend)) {
struct hci_cp_auth_requested cp;
+
+ /* encrypt must be pending if auth is also pending */
+ set_bit(HCI_CONN_ENCRYPT_PEND, &conn->pend);
+
cp.handle = cpu_to_le16(conn->handle);
hci_send_cmd(conn->hdev, HCI_OP_AUTH_REQUESTED,
sizeof(cp), &cp);
@@ -817,7 +821,7 @@
return 0;
} else if (conn->link_mode & HCI_LM_ENCRYPT) {
return hci_conn_auth(conn, sec_level, auth_type);
- } else if (test_and_set_bit(HCI_CONN_ENCRYPT_PEND, &conn->pend)) {
+ } else if (test_bit(HCI_CONN_ENCRYPT_PEND, &conn->pend)) {
return 0;
}
@@ -1027,7 +1031,7 @@
EXPORT_SYMBOL(hci_chan_modify);
/* Drop all connection on the device */
-void hci_conn_hash_flush(struct hci_dev *hdev)
+void hci_conn_hash_flush(struct hci_dev *hdev, u8 is_process)
{
struct hci_conn_hash *h = &hdev->conn_hash;
struct list_head *p;
@@ -1043,7 +1047,7 @@
c->state = BT_CLOSED;
- hci_proto_disconn_cfm(c, 0x16);
+ hci_proto_disconn_cfm(c, 0x16, is_process);
hci_conn_del(c);
}
}
diff --git a/net/bluetooth/hci_core.c b/net/bluetooth/hci_core.c
index 4c2bd37..c0eb50c 100644
--- a/net/bluetooth/hci_core.c
+++ b/net/bluetooth/hci_core.c
@@ -626,7 +626,7 @@
return ret;
}
-static int hci_dev_do_close(struct hci_dev *hdev)
+static int hci_dev_do_close(struct hci_dev *hdev, u8 is_process)
{
unsigned long keepflags = 0;
@@ -647,7 +647,7 @@
hci_dev_lock_bh(hdev);
inquiry_cache_flush(hdev);
- hci_conn_hash_flush(hdev);
+ hci_conn_hash_flush(hdev, is_process);
hci_dev_unlock_bh(hdev);
hci_notify(hdev, HCI_DEV_DOWN);
@@ -714,7 +714,7 @@
hdev = hci_dev_get(dev);
if (!hdev)
return -ENODEV;
- err = hci_dev_do_close(hdev);
+ err = hci_dev_do_close(hdev, 1);
hci_dev_put(hdev);
return err;
}
@@ -740,7 +740,7 @@
hci_dev_lock_bh(hdev);
inquiry_cache_flush(hdev);
- hci_conn_hash_flush(hdev);
+ hci_conn_hash_flush(hdev, 0);
hci_dev_unlock_bh(hdev);
if (hdev->flush)
@@ -953,7 +953,7 @@
if (!blocked)
return 0;
- hci_dev_do_close(hdev);
+ hci_dev_do_close(hdev, 0);
return 0;
}
@@ -1563,7 +1563,7 @@
list_del(&hdev->list);
write_unlock_bh(&hci_dev_list_lock);
- hci_dev_do_close(hdev);
+ hci_dev_do_close(hdev, 0);
for (i = 0; i < NUM_REASSEMBLY; i++)
kfree_skb(hdev->reassembly[i]);
diff --git a/net/bluetooth/hci_event.c b/net/bluetooth/hci_event.c
index fec6f32..aac934a 100644
--- a/net/bluetooth/hci_event.c
+++ b/net/bluetooth/hci_event.c
@@ -1106,9 +1106,25 @@
conn = hci_conn_hash_lookup_handle(hdev, __le16_to_cpu(cp->handle));
if (conn) {
- if (status && conn->state == BT_CONFIG) {
- hci_proto_connect_cfm(conn, status);
- hci_conn_put(conn);
+ if (status) {
+ mgmt_auth_failed(hdev->id, &conn->dst, status);
+ clear_bit(HCI_CONN_AUTH_PEND, &conn->pend);
+
+ if (conn->state == BT_CONFIG) {
+ conn->state = BT_CONNECTED;
+ hci_proto_connect_cfm(conn, status);
+ hci_conn_put(conn);
+ } else {
+ hci_auth_cfm(conn, status);
+ hci_conn_hold(conn);
+ conn->disc_timeout = HCI_DISCONN_TIMEOUT;
+ hci_conn_put(conn);
+ }
+
+ if (test_bit(HCI_CONN_ENCRYPT_PEND, &conn->pend)) {
+ clear_bit(HCI_CONN_ENCRYPT_PEND, &conn->pend);
+ hci_encrypt_cfm(conn, status, 0x00);
+ }
}
conn->auth_initiator = 1;
}
@@ -1517,7 +1533,7 @@
BT_DBG("%s status %d", hdev->name, status);
- if (!lmp_le_capable(hdev))
+ if (!hdev->disco_state)
clear_bit(HCI_INQUIRY, &hdev->flags);
hci_req_complete(hdev, HCI_OP_INQUIRY, status);
@@ -1748,7 +1764,7 @@
if (conn->type == LE_LINK)
del_timer(&conn->smp_timer);
- hci_proto_disconn_cfm(conn, ev->reason);
+ hci_proto_disconn_cfm(conn, ev->reason, 0);
hci_conn_del(conn);
unlock:
@@ -1924,8 +1940,10 @@
if (!conn)
goto unlock;
- if (!ev->status)
+ if (!ev->status) {
memcpy(conn->features, ev->features, 8);
+ mgmt_remote_features(hdev->id, &conn->dst, ev->features);
+ }
if (conn->state != BT_CONFIG)
goto unlock;
@@ -2730,7 +2748,7 @@
conn->ssp_mode = (ev->features[0] & 0x01);
/*In case if remote device ssp supported/2.0 device
reduce the security level to MEDIUM if it is HIGH*/
- if (!conn->ssp_mode &&
+ if (!conn->ssp_mode && conn->auth_initiator &&
(conn->pending_sec_level == BT_SECURITY_HIGH))
conn->pending_sec_level = BT_SECURITY_MEDIUM;
}
@@ -3289,7 +3307,7 @@
if (conn) {
conn->state = BT_CLOSED;
- hci_proto_disconn_cfm(conn, ev->reason);
+ hci_proto_disconn_cfm(conn, ev->reason, 0);
hci_conn_del(conn);
}
diff --git a/net/bluetooth/l2cap_core.c b/net/bluetooth/l2cap_core.c
index 9662795..6a95c79 100644
--- a/net/bluetooth/l2cap_core.c
+++ b/net/bluetooth/l2cap_core.c
@@ -89,7 +89,7 @@
static int l2cap_create_cfm(struct hci_chan *chan, u8 status);
static int l2cap_deaggregate(struct hci_chan *chan, struct l2cap_pinfo *pi);
static void l2cap_chan_ready(struct sock *sk);
-static void l2cap_conn_del(struct hci_conn *hcon, int err);
+static void l2cap_conn_del(struct hci_conn *hcon, int err, u8 is_process);
static u16 l2cap_get_smallest_flushto(struct l2cap_chan_list *l);
static void l2cap_set_acl_flushto(struct hci_conn *hcon, u16 flush_to);
@@ -569,7 +569,7 @@
struct hci_chan *ampchan = l2cap_pi(sk)->ampchan;
l2cap_pi(sk)->ampchan = NULL;
if (!hci_chan_put(ampchan))
- l2cap_deaggregate(l2cap_pi(sk)->ampchan, l2cap_pi(sk));
+ l2cap_deaggregate(ampchan, l2cap_pi(sk));
}
sk->sk_state = BT_CLOSED;
@@ -1160,7 +1160,7 @@
return conn;
}
-static void l2cap_conn_del(struct hci_conn *hcon, int err)
+static void l2cap_conn_del(struct hci_conn *hcon, int err, u8 is_process)
{
struct l2cap_conn *conn = hcon->l2cap_data;
struct sock *sk;
@@ -1181,9 +1181,15 @@
BT_DBG("ampcon %p", l2cap_pi(sk)->ampcon);
if ((conn->hcon == hcon) || (l2cap_pi(sk)->ampcon == hcon)) {
next = l2cap_pi(sk)->next_c;
- bh_lock_sock(sk);
+ if (is_process)
+ lock_sock(sk);
+ else
+ bh_lock_sock(sk);
l2cap_chan_del(sk, err);
- bh_unlock_sock(sk);
+ if (is_process)
+ release_sock(sk);
+ else
+ bh_unlock_sock(sk);
l2cap_sock_kill(sk);
sk = next;
} else
@@ -7332,7 +7338,7 @@
case L2CAP_CID_SMP:
if (smp_sig_channel(conn, skb))
- l2cap_conn_del(conn->hcon, EACCES);
+ l2cap_conn_del(conn->hcon, EACCES, 0);
break;
default:
@@ -7407,7 +7413,7 @@
if (conn)
l2cap_conn_ready(conn);
} else
- l2cap_conn_del(hcon, bt_err(status));
+ l2cap_conn_del(hcon, bt_err(status), 0);
return 0;
}
@@ -7424,14 +7430,14 @@
return conn->disc_reason;
}
-static int l2cap_disconn_cfm(struct hci_conn *hcon, u8 reason)
+static int l2cap_disconn_cfm(struct hci_conn *hcon, u8 reason, u8 is_process)
{
BT_DBG("hcon %p reason %d", hcon, reason);
if (!(hcon->type == ACL_LINK || hcon->type == LE_LINK))
return -EINVAL;
- l2cap_conn_del(hcon, bt_err(reason));
+ l2cap_conn_del(hcon, bt_err(reason), is_process);
return 0;
}
diff --git a/net/bluetooth/mgmt.c b/net/bluetooth/mgmt.c
index 910ef77..bc68c9f 100644
--- a/net/bluetooth/mgmt.c
+++ b/net/bluetooth/mgmt.c
@@ -1613,9 +1613,8 @@
hci_dev_lock_bh(hdev);
- BT_DBG("SSP Cap is %d", cp->ssp_cap);
io_cap = cp->io_cap;
- if ((cp->ssp_cap == 0) || (io_cap == 0x03)) {
+ if (io_cap == 0x03) {
sec_level = BT_SECURITY_MEDIUM;
auth_type = HCI_AT_DEDICATED_BONDING;
} else {
@@ -1633,6 +1632,7 @@
io_cap = 0x01;
conn = hci_connect(hdev, ACL_LINK, 0, &cp->bdaddr, sec_level,
auth_type);
+ conn->auth_initiator = 1;
}
if (IS_ERR(conn)) {
@@ -2672,8 +2672,11 @@
if ((conn->auth_type & HCI_AT_DEDICATED_BONDING) &&
conn->auth_initiator && rem_cap == 0x03)
ev.auto_confirm = 1;
- else if (loc_cap == 0x01 && (rem_cap == 0x00 || rem_cap == 0x03))
+ else if (loc_cap == 0x01 && (rem_cap == 0x00 || rem_cap == 0x03)) {
+ if (!loc_mitm && !rem_mitm)
+ value = 0;
goto no_auto_confirm;
+ }
if ((!loc_mitm || rem_cap == 0x03) && (!rem_mitm || loc_cap == 0x03))
@@ -2929,3 +2932,16 @@
return mgmt_event(MGMT_EV_REMOTE_VERSION, index, &ev, sizeof(ev), NULL);
}
+
+int mgmt_remote_features(u16 index, bdaddr_t *bdaddr, u8 features[8])
+{
+ struct mgmt_ev_remote_features ev;
+
+ memset(&ev, 0, sizeof(ev));
+
+ bacpy(&ev.bdaddr, bdaddr);
+ memcpy(ev.features, features, sizeof(ev.features));
+
+ return mgmt_event(MGMT_EV_REMOTE_FEATURES, index, &ev, sizeof(ev),
+ NULL);
+}
diff --git a/net/bluetooth/sco.c b/net/bluetooth/sco.c
index 99c4559..f8c3bba 100644
--- a/net/bluetooth/sco.c
+++ b/net/bluetooth/sco.c
@@ -62,7 +62,7 @@
static void __sco_chan_add(struct sco_conn *conn, struct sock *sk, struct sock *parent);
static void sco_chan_del(struct sock *sk, int err);
-static int sco_conn_del(struct hci_conn *conn, int err);
+static int sco_conn_del(struct hci_conn *conn, int err, u8 is_process);
static void sco_sock_close(struct sock *sk);
static void sco_sock_kill(struct sock *sk);
@@ -135,7 +135,7 @@
return sk;
}
-static int sco_conn_del(struct hci_conn *hcon, int err)
+static int sco_conn_del(struct hci_conn *hcon, int err, u8 is_process)
{
struct sco_conn *conn = hcon->sco_data;
struct sock *sk;
@@ -148,10 +148,16 @@
/* Kill socket */
sk = sco_chan_get(conn);
if (sk) {
- bh_lock_sock(sk);
+ if (is_process)
+ lock_sock(sk);
+ else
+ bh_lock_sock(sk);
sco_sock_clear_timer(sk);
sco_chan_del(sk, err);
- bh_unlock_sock(sk);
+ if (is_process)
+ release_sock(sk);
+ else
+ bh_unlock_sock(sk);
sco_sock_kill(sk);
}
@@ -952,19 +958,19 @@
if (conn)
sco_conn_ready(conn);
} else
- sco_conn_del(hcon, bt_err(status));
+ sco_conn_del(hcon, bt_err(status), 0);
return 0;
}
-static int sco_disconn_cfm(struct hci_conn *hcon, __u8 reason)
+static int sco_disconn_cfm(struct hci_conn *hcon, __u8 reason, __u8 is_process)
{
BT_DBG("hcon %p reason %d", hcon, reason);
if (hcon->type != SCO_LINK && hcon->type != ESCO_LINK)
return -EINVAL;
- sco_conn_del(hcon, bt_err(reason));
+ sco_conn_del(hcon, bt_err(reason), is_process);
return 0;
}
diff --git a/net/wireless/core.h b/net/wireless/core.h
index 17a80bf..78f12b3 100644
--- a/net/wireless/core.h
+++ b/net/wireless/core.h
@@ -447,6 +447,9 @@
enum nl80211_channel_type channel_type);
u16 cfg80211_calculate_bitrate(struct rate_info *rate);
+int ieee80211_get_ratemask(struct ieee80211_supported_band *sband,
+ const u8 *rates, unsigned int n_rates,
+ u32 *mask);
int cfg80211_validate_beacon_int(struct cfg80211_registered_device *rdev,
u32 beacon_int);
diff --git a/net/wireless/nl80211.c b/net/wireless/nl80211.c
index 1a84262..c92906c 100644
--- a/net/wireless/nl80211.c
+++ b/net/wireless/nl80211.c
@@ -183,10 +183,12 @@
[NL80211_ATTR_STA_PLINK_STATE] = { .type = NLA_U8 },
[NL80211_ATTR_SCHED_SCAN_INTERVAL] = { .type = NLA_U32 },
[NL80211_ATTR_HIDDEN_SSID] = { .type = NLA_U32 },
+ [NL80211_ATTR_SCAN_SUPP_RATES] = { .type = NLA_NESTED },
[NL80211_ATTR_IE_PROBE_RESP] = { .type = NLA_BINARY,
.len = IEEE80211_MAX_DATA_LEN },
[NL80211_ATTR_IE_ASSOC_RESP] = { .type = NLA_BINARY,
.len = IEEE80211_MAX_DATA_LEN },
+ [NL80211_ATTR_TX_NO_CCK_RATE] = { .type = NLA_FLAG },
};
/* policy for the key attributes */
@@ -3378,7 +3380,6 @@
struct nlattr *attr;
struct wiphy *wiphy;
int err, tmp, n_ssids = 0, n_channels, i;
- enum ieee80211_band band;
size_t ie_len;
if (!is_valid_ie_attr(info->attrs[NL80211_ATTR_IE]))
@@ -3398,6 +3399,7 @@
if (!n_channels)
return -EINVAL;
} else {
+ enum ieee80211_band band;
n_channels = 0;
for (band = 0; band < IEEE80211_NUM_BANDS; band++)
@@ -3458,6 +3460,8 @@
i++;
}
} else {
+ enum ieee80211_band band;
+
/* all channels */
for (band = 0; band < IEEE80211_NUM_BANDS; band++) {
int j;
@@ -3503,9 +3507,30 @@
nla_data(info->attrs[NL80211_ATTR_IE]),
request->ie_len);
}
+ for (i = 0; i < IEEE80211_NUM_BANDS; i++)
+ request->rates[i] = (1 << wiphy->bands[i]->n_bitrates) - 1;
+ if (info->attrs[NL80211_ATTR_SCAN_SUPP_RATES]) {
+ nla_for_each_nested(attr,
+ info->attrs[NL80211_ATTR_SCAN_SUPP_RATES],
+ tmp) {
+ enum ieee80211_band band = nla_type(attr);
+ if (band < 0 || band >= IEEE80211_NUM_BANDS) {
+ err = -EINVAL;
+ goto out_free;
+ }
+ err = ieee80211_get_ratemask(wiphy->bands[band],
+ nla_data(attr),
+ nla_len(attr),
+ &request->rates[band]);
+ if (err)
+ goto out_free;
+ }
+ }
request->dev = dev;
request->wiphy = &rdev->wiphy;
+ request->no_cck =
+ nla_get_flag(info->attrs[NL80211_ATTR_TX_NO_CCK_RATE]);
rdev->scan_req = request;
err = rdev->ops->scan(&rdev->wiphy, dev, request);
@@ -4360,25 +4385,11 @@
nla_len(info->attrs[NL80211_ATTR_BSS_BASIC_RATES]);
struct ieee80211_supported_band *sband =
wiphy->bands[ibss.channel->band];
- int i, j;
-
- if (n_rates == 0)
- return -EINVAL;
-
- for (i = 0; i < n_rates; i++) {
- int rate = (rates[i] & 0x7f) * 5;
- bool found = false;
-
- for (j = 0; j < sband->n_bitrates; j++) {
- if (sband->bitrates[j].bitrate == rate) {
- found = true;
- ibss.basic_rates |= BIT(j);
- break;
- }
- }
- if (!found)
- return -EINVAL;
- }
+ int err;
+ err = ieee80211_get_ratemask(sband, rates, n_rates,
+ &ibss.basic_rates);
+ if (err)
+ return err;
}
if (info->attrs[NL80211_ATTR_MCAST_RATE] &&
diff --git a/net/wireless/scan.c b/net/wireless/scan.c
index cbbc927..0aa09bd 100644
--- a/net/wireless/scan.c
+++ b/net/wireless/scan.c
@@ -862,6 +862,8 @@
if (wreq->scan_type == IW_SCAN_TYPE_PASSIVE)
creq->n_ssids = 0;
}
+ for (i = 0; i < IEEE80211_NUM_BANDS; i++)
+ creq->rates[i] = (1 << wiphy->bands[i]->n_bitrates) - 1;
rdev->scan_req = creq;
err = rdev->ops->scan(wiphy, dev, creq);
diff --git a/net/wireless/util.c b/net/wireless/util.c
index c69e653..c87358b 100644
--- a/net/wireless/util.c
+++ b/net/wireless/util.c
@@ -1014,3 +1014,32 @@
return -EBUSY;
}
+
+int ieee80211_get_ratemask(struct ieee80211_supported_band *sband,
+ const u8 *rates, unsigned int n_rates,
+ u32 *mask)
+{
+ int i, j;
+ if (n_rates == 0 || n_rates > NL80211_MAX_SUPP_RATES)
+ return -EINVAL;
+ *mask = 0;
+ for (i = 0; i < n_rates; i++) {
+ int rate = (rates[i] & 0x7f) * 5;
+ bool found = false;
+ for (j = 0; j < sband->n_bitrates; j++) {
+ if (sband->bitrates[j].bitrate == rate) {
+ found = true;
+ *mask |= BIT(j);
+ break;
+ }
+ }
+ if (!found)
+ return -EINVAL;
+ }
+ /*
+ * mask must have at least one bit set here since we
+ * didn't accept a 0-length rates array nor allowed
+ * entries in the array that didn't exist
+ */
+ return 0;
+}
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 0d41625..46a49e7 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -8,9 +8,10 @@
use strict;
use constant BEFORE_SHORTTEXT => 0;
-use constant IN_SHORTTEXT => 1;
-use constant AFTER_SHORTTEXT => 2;
-use constant CHECK_NEXT_SHORTTEXT => 3;
+use constant IN_SHORTTEXT_BLANKLINE => 1;
+use constant IN_SHORTTEXT => 2;
+use constant AFTER_SHORTTEXT => 3;
+use constant CHECK_NEXT_SHORTTEXT => 4;
use constant SHORTTEXT_LIMIT => 75;
my $P = $0;
@@ -1233,6 +1234,7 @@
my $shorttext = BEFORE_SHORTTEXT;
my $shorttext_exspc = 0;
+ my $commit_text_present = 0;
sanitise_line_reset();
cleanup_continuation_headers();
@@ -1416,8 +1418,24 @@
my $hereprev = "$here\n$prevrawline\n$rawline\n";
if ($shorttext != AFTER_SHORTTEXT) {
+ if ($shorttext == IN_SHORTTEXT_BLANKLINE && $line=~/\S/) {
+ # the subject line was just processed,
+ # a blank line must be next
+ WARN("non-blank line after summary line\n" . $herecurr);
+ $shorttext = IN_SHORTTEXT;
+ # this non-blank line may or may not be commit text -
+ # a warning has been generated so assume it is commit
+ # text and move on
+ $commit_text_present = 1;
+ # fall through and treat this line as IN_SHORTTEXT
+ }
if ($shorttext == IN_SHORTTEXT) {
if ($line=~/^---/ || $line=~/^diff.*/) {
+ if ($commit_text_present == 0) {
+ WARN("please add commit text explaining " .
+ "*why* the change is needed\n" .
+ $herecurr);
+ }
$shorttext = AFTER_SHORTTEXT;
} elsif (length($line) > (SHORTTEXT_LIMIT +
$shorttext_exspc)
@@ -1427,7 +1445,25 @@
WARN("commit text line over " .
SHORTTEXT_LIMIT .
" characters\n" . $herecurr);
+ } elsif ($line=~/^\s*change-id:/i ||
+ $line=~/^\s*signed-off-by:/i ||
+ $line=~/^\s*crs-fixed:/i ||
+ $line=~/^\s*acked-by:/i) {
+ # this is a tag, there must be commit
+ # text by now
+ if ($commit_text_present == 0) {
+ WARN("please add commit text explaining " .
+ "*why* the change is needed\n" .
+ $herecurr);
+ # prevent duplicate warnings
+ $commit_text_present = 1;
+ }
+ } elsif ($line=~/\S/) {
+ $commit_text_present = 1;
}
+ } elsif ($shorttext == IN_SHORTTEXT_BLANKLINE) {
+ # case of non-blank line in this state handled above
+ $shorttext = IN_SHORTTEXT;
} elsif ($shorttext == CHECK_NEXT_SHORTTEXT) {
# The Subject line doesn't have to be the last header in the patch.
# Avoid moving to the IN_SHORTTEXT state until clear of all headers.
@@ -1435,16 +1471,25 @@
# text which looks like a header is definitely a header.
if ($line!~/^[\x21-\x39\x3b-\x7e]+:/) {
$shorttext = IN_SHORTTEXT;
-# Check for Subject line followed by a blank line.
+ # Check for Subject line followed by a blank line.
if (length($line) != 0) {
WARN("non-blank line after " .
"summary line\n" .
$sublinenr . $here .
"\n" . $subjectline .
"\n" . $line . "\n");
+ # this non-blank line may or may not
+ # be commit text - a warning has been
+ # generated so assume it is commit
+ # text and move on
+ $commit_text_present = 1;
}
}
+ # The next two cases are BEFORE_SHORTTEXT.
} elsif ($line=~/^Subject: \[[^\]]*\] (.*)/) {
+ # This is the subject line. Go to
+ # CHECK_NEXT_SHORTTEXT to wait for the commit
+ # text to show up.
$shorttext = CHECK_NEXT_SHORTTEXT;
$subjectline = $line;
$sublinenr = "#$linenr & ";
@@ -1455,7 +1500,10 @@
" characters\n" . $herecurr);
}
} elsif ($line=~/^ (.*)/) {
- $shorttext = IN_SHORTTEXT;
+ # Indented format, this must be the summary
+ # line (i.e. git show). There will be no more
+ # headers so we are now in the shorttext.
+ $shorttext = IN_SHORTTEXT_BLANKLINE;
$shorttext_exspc = 4;
if (length($1) > SHORTTEXT_LIMIT) {
WARN("summary line over " .
@@ -2800,8 +2848,11 @@
# unbounded string functions are overflow risks
my %str_fns = (
"sprintf" => "snprintf",
- "strcpy" => "strncpy",
- "strcat" => "strncat",
+ "strcpy" => "strlcpy",
+ "strncpy" => "strlcpy",
+ "strcat" => "strlcat",
+ "strncat" => "strlcat",
+ "vsprintf" => "vsnprintf",
"strcmp" => "strncmp",
"strcasecmp" => "strncasecmp",
"strchr" => "strnchr",
diff --git a/scripts/gcc-wrapper.py b/scripts/gcc-wrapper.py
index 0104f1a..d3d393d 100755
--- a/scripts/gcc-wrapper.py
+++ b/scripts/gcc-wrapper.py
@@ -44,6 +44,8 @@
"alignment.c:720",
"async.c:122",
"async.c:270",
+ "block.c:835",
+ "block.c:836",
"dir.c:43",
"dm.c:1053",
"dm.c:1080",
diff --git a/scripts/setlocalversion b/scripts/setlocalversion
index 4d40384..d2690c3 100755
--- a/scripts/setlocalversion
+++ b/scripts/setlocalversion
@@ -47,7 +47,20 @@
# If we are at a tagged commit (like "v2.6.30-rc6"), we ignore
# it, because this version is defined in the top level Makefile.
- if [ -z "`git describe --exact-match 2>/dev/null`" ]; then
+ if atag="`git describe --exact-match --abbrev=0 2>/dev/null`"; then
+ # Make sure we're at the tag that matches the Makefile.
+ # If not place the hash of the tag as well for
+ # v2.6.30-rc5-g314aef
+ if [ "x$atag" -ne "x$VERSION" ]; then
+ # If only the short version is requested,
+ # don't bother running further git commands
+ if $short; then
+ echo "+"
+ return
+ fi
+ printf '%s%s' -g "`git show-ref -s --abbrev $atag 2>/dev/null`"
+ fi
+ else
# If only the short version is requested, don't bother
# running further git commands
@@ -56,10 +69,12 @@
return
fi
# If we are past a tagged commit (like
- # "v2.6.30-rc5-302-g72357d5"), we pretty print it.
+ # "v2.6.30-rc5-302-g72357d5"), we pretty print it and
+ # include the hash of any new tag on top.
if atag="`git describe 2>/dev/null`"; then
- echo "$atag" | awk -F- '{printf("-%05d-%s", $(NF-1),$(NF))}'
-
+ tag="`git describe --abbrev=0 2>/dev/null`"
+ commit="`echo "$atag" | awk -F- '{printf("-%05d-%s", $(NF-1),$(NF))}'`"
+ printf '%s%s%s' -g "`git show-ref -s --abbrev $tag 2>/dev/null`" $commit
# If we don't have a tag at all we print -g{commitish}.
else
printf '%s%s' -g $head
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index b923a25..88181a6 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -250,6 +250,9 @@
config SND_SOC_UDA1380
tristate
+config SND_SOC_WCD9304
+ tristate
+
config SND_SOC_WCD9310
tristate
diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile
index 78740ab..0bd7255 100644
--- a/sound/soc/codecs/Makefile
+++ b/sound/soc/codecs/Makefile
@@ -38,6 +38,7 @@
snd-soc-twl6040-objs := twl6040.o
snd-soc-uda134x-objs := uda134x.o
snd-soc-uda1380-objs := uda1380.o
+snd-soc-wcd9304-objs := wcd9304.o wcd9304-tables.o
snd-soc-wcd9310-objs := wcd9310.o wcd9310-tables.o
snd-soc-wl1273-objs := wl1273.o
snd-soc-wm1250-ev1-objs := wm1250-ev1.o
@@ -132,6 +133,7 @@
obj-$(CONFIG_SND_SOC_TWL6040) += snd-soc-twl6040.o
obj-$(CONFIG_SND_SOC_UDA134X) += snd-soc-uda134x.o
obj-$(CONFIG_SND_SOC_UDA1380) += snd-soc-uda1380.o
+obj-$(CONFIG_SND_SOC_WCD9304) += snd-soc-wcd9304.o
obj-$(CONFIG_SND_SOC_WCD9310) += snd-soc-wcd9310.o
obj-$(CONFIG_SND_SOC_WL1273) += snd-soc-wl1273.o
obj-$(CONFIG_SND_SOC_WM1250_EV1) += snd-soc-wm1250-ev1.o
diff --git a/sound/soc/codecs/wcd9304-tables.c b/sound/soc/codecs/wcd9304-tables.c
new file mode 100644
index 0000000..823f926
--- /dev/null
+++ b/sound/soc/codecs/wcd9304-tables.c
@@ -0,0 +1,720 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/mfd/wcd9xxx/wcd9xxx_registers.h>
+#include <linux/mfd/wcd9xxx/wcd9304_registers.h>
+#include "wcd9304.h"
+
+const u8 sitar_reg_defaults[SITAR_CACHE_SIZE] = {
+ [WCD9XXX_A_CHIP_CTL] = WCD9XXX_A_CHIP_CTL__POR,
+ [WCD9XXX_A_CHIP_STATUS] = WCD9XXX_A_CHIP_STATUS__POR,
+ [WCD9XXX_A_CHIP_ID_BYTE_0] = WCD9XXX_A_CHIP_ID_BYTE_0__POR,
+ [WCD9XXX_A_CHIP_ID_BYTE_1] = WCD9XXX_A_CHIP_ID_BYTE_1__POR,
+ [WCD9XXX_A_CHIP_ID_BYTE_2] = WCD9XXX_A_CHIP_ID_BYTE_2__POR,
+ [WCD9XXX_A_CHIP_ID_BYTE_3] = WCD9XXX_A_CHIP_ID_BYTE_3__POR,
+ [WCD9XXX_A_CHIP_VERSION] = WCD9XXX_A_CHIP_VERSION__POR,
+ [WCD9XXX_A_SB_VERSION] = WCD9XXX_A_SB_VERSION__POR,
+ [WCD9XXX_A_SLAVE_ID_1] = WCD9XXX_A_SLAVE_ID_1__POR,
+ [WCD9XXX_A_SLAVE_ID_2] = WCD9XXX_A_SLAVE_ID_2__POR,
+ [WCD9XXX_A_SLAVE_ID_3] = WCD9XXX_A_SLAVE_ID_3__POR,
+ [SITAR_A_PIN_CTL_OE0] = SITAR_A_PIN_CTL_OE0__POR,
+ [SITAR_A_PIN_CTL_OE1] = SITAR_A_PIN_CTL_OE1__POR,
+ [SITAR_A_PIN_CTL_DATA0] = SITAR_A_PIN_CTL_DATA0__POR,
+ [SITAR_A_PIN_CTL_DATA1] = SITAR_A_PIN_CTL_DATA1__POR,
+ [SITAR_A_HDRIVE_GENERIC] = SITAR_A_HDRIVE_GENERIC__POR,
+ [SITAR_A_HDRIVE_OVERRIDE] = SITAR_A_HDRIVE_OVERRIDE__POR,
+ [SITAR_A_ANA_CSR_WAIT_STATE] = SITAR_A_ANA_CSR_WAIT_STATE__POR,
+ [SITAR_A_PROCESS_MONITOR_CTL0] = SITAR_A_PROCESS_MONITOR_CTL0__POR,
+ [SITAR_A_PROCESS_MONITOR_CTL1] = SITAR_A_PROCESS_MONITOR_CTL1__POR,
+ [SITAR_A_PROCESS_MONITOR_CTL2] = SITAR_A_PROCESS_MONITOR_CTL2__POR,
+ [SITAR_A_PROCESS_MONITOR_CTL3] = SITAR_A_PROCESS_MONITOR_CTL3__POR,
+ [SITAR_A_QFUSE_CTL] = SITAR_A_QFUSE_CTL__POR,
+ [SITAR_A_QFUSE_STATUS] = SITAR_A_QFUSE_STATUS__POR,
+ [SITAR_A_QFUSE_DATA_OUT0] = SITAR_A_QFUSE_DATA_OUT0__POR,
+ [SITAR_A_QFUSE_DATA_OUT1] = SITAR_A_QFUSE_DATA_OUT1__POR,
+ [SITAR_A_QFUSE_DATA_OUT2] = SITAR_A_QFUSE_DATA_OUT2__POR,
+ [SITAR_A_QFUSE_DATA_OUT3] = SITAR_A_QFUSE_DATA_OUT3__POR,
+ [SITAR_A_CDC_CTL] = SITAR_A_CDC_CTL__POR,
+ [SITAR_A_LEAKAGE_CTL] = SITAR_A_LEAKAGE_CTL__POR,
+ [SITAR_A_INTR_MODE] = SITAR_A_INTR_MODE__POR,
+ [SITAR_A_INTR_MASK0] = SITAR_A_INTR_MASK0__POR,
+ [SITAR_A_INTR_MASK1] = SITAR_A_INTR_MASK1__POR,
+ [SITAR_A_INTR_MASK2] = SITAR_A_INTR_MASK2__POR,
+ [SITAR_A_INTR_STATUS0] = SITAR_A_INTR_STATUS0__POR,
+ [SITAR_A_INTR_STATUS1] = SITAR_A_INTR_STATUS1__POR,
+ [SITAR_A_INTR_STATUS2] = SITAR_A_INTR_STATUS2__POR,
+ [SITAR_A_INTR_CLEAR0] = SITAR_A_INTR_CLEAR0__POR,
+ [SITAR_A_INTR_CLEAR1] = SITAR_A_INTR_CLEAR1__POR,
+ [SITAR_A_INTR_CLEAR2] = SITAR_A_INTR_CLEAR2__POR,
+ [SITAR_A_INTR_LEVEL0] = SITAR_A_INTR_LEVEL0__POR,
+ [SITAR_A_INTR_LEVEL1] = SITAR_A_INTR_LEVEL1__POR,
+ [SITAR_A_INTR_LEVEL2] = SITAR_A_INTR_LEVEL2__POR,
+ [SITAR_A_INTR_TEST0] = SITAR_A_INTR_TEST0__POR,
+ [SITAR_A_INTR_TEST1] = SITAR_A_INTR_TEST1__POR,
+ [SITAR_A_INTR_TEST2] = SITAR_A_INTR_TEST2__POR,
+ [SITAR_A_INTR_SET0] = SITAR_A_INTR_SET0__POR,
+ [SITAR_A_INTR_SET1] = SITAR_A_INTR_SET1__POR,
+ [SITAR_A_INTR_SET2] = SITAR_A_INTR_SET2__POR,
+ [SITAR_A_CDC_TX_I2S_SCK_MODE] = SITAR_A_CDC_TX_I2S_SCK_MODE__POR,
+ [SITAR_A_CDC_TX_I2S_WS_MODE] = SITAR_A_CDC_TX_I2S_WS_MODE__POR,
+ [SITAR_A_CDC_DMIC_DATA0_MODE] = SITAR_A_CDC_DMIC_DATA0_MODE__POR,
+ [SITAR_A_CDC_DMIC_CLK0_MODE] = SITAR_A_CDC_DMIC_CLK0_MODE__POR,
+ [SITAR_A_CDC_DMIC_DATA1_MODE] = SITAR_A_CDC_DMIC_DATA1_MODE__POR,
+ [SITAR_A_CDC_DMIC_CLK1_MODE] = SITAR_A_CDC_DMIC_CLK1_MODE__POR,
+ [SITAR_A_CDC_TX_I2S_SD0_MODE] = SITAR_A_CDC_TX_I2S_SD0_MODE__POR,
+ [SITAR_A_CDC_INTR_MODE] = SITAR_A_CDC_INTR_MODE__POR,
+ [SITAR_A_CDC_RX_I2S_SD0_MODE] = SITAR_A_CDC_RX_I2S_SD0_MODE__POR,
+ [SITAR_A_CDC_RX_I2S_SD1_MODE] = SITAR_A_CDC_RX_I2S_SD1_MODE__POR,
+ [SITAR_A_BIAS_REF_CTL] = SITAR_A_BIAS_REF_CTL__POR,
+ [SITAR_A_BIAS_CENTRAL_BG_CTL] = SITAR_A_BIAS_CENTRAL_BG_CTL__POR,
+ [SITAR_A_BIAS_PRECHRG_CTL] = SITAR_A_BIAS_PRECHRG_CTL__POR,
+ [SITAR_A_BIAS_CURR_CTL_1] = SITAR_A_BIAS_CURR_CTL_1__POR,
+ [SITAR_A_BIAS_CURR_CTL_2] = SITAR_A_BIAS_CURR_CTL_2__POR,
+ [SITAR_A_BIAS_OSC_BG_CTL] = SITAR_A_BIAS_OSC_BG_CTL__POR,
+ [SITAR_A_CLK_BUFF_EN1] = SITAR_A_CLK_BUFF_EN1__POR,
+ [SITAR_A_CLK_BUFF_EN2] = SITAR_A_CLK_BUFF_EN2__POR,
+ [SITAR_A_LDO_H_MODE_1] = SITAR_A_LDO_H_MODE_1__POR,
+ [SITAR_A_LDO_H_MODE_2] = SITAR_A_LDO_H_MODE_2__POR,
+ [SITAR_A_LDO_H_LOOP_CTL] = SITAR_A_LDO_H_LOOP_CTL__POR,
+ [SITAR_A_LDO_H_COMP_1] = SITAR_A_LDO_H_COMP_1__POR,
+ [SITAR_A_LDO_H_COMP_2] = SITAR_A_LDO_H_COMP_2__POR,
+ [SITAR_A_LDO_H_BIAS_1] = SITAR_A_LDO_H_BIAS_1__POR,
+ [SITAR_A_LDO_H_BIAS_2] = SITAR_A_LDO_H_BIAS_2__POR,
+ [SITAR_A_LDO_H_BIAS_3] = SITAR_A_LDO_H_BIAS_3__POR,
+ [SITAR_A_MICB_CFILT_1_CTL] = SITAR_A_MICB_CFILT_1_CTL__POR,
+ [SITAR_A_MICB_CFILT_1_VAL] = SITAR_A_MICB_CFILT_1_VAL__POR,
+ [SITAR_A_MICB_CFILT_1_PRECHRG] = SITAR_A_MICB_CFILT_1_PRECHRG__POR,
+ [SITAR_A_MICB_1_CTL] = SITAR_A_MICB_1_CTL__POR,
+ [SITAR_A_MICB_1_INT_RBIAS] = SITAR_A_MICB_1_INT_RBIAS__POR,
+ [SITAR_A_MICB_1_MBHC] = SITAR_A_MICB_1_MBHC__POR,
+ [SITAR_A_MICB_CFILT_2_CTL] = SITAR_A_MICB_CFILT_2_CTL__POR,
+ [SITAR_A_MICB_CFILT_2_VAL] = SITAR_A_MICB_CFILT_2_VAL__POR,
+ [SITAR_A_MICB_CFILT_2_PRECHRG] = SITAR_A_MICB_CFILT_2_PRECHRG__POR,
+ [SITAR_A_MICB_2_CTL] = SITAR_A_MICB_2_CTL__POR,
+ [SITAR_A_MICB_2_INT_RBIAS] = SITAR_A_MICB_2_INT_RBIAS__POR,
+ [SITAR_A_MICB_2_MBHC] = SITAR_A_MICB_2_MBHC__POR,
+ [SITAR_A_TX_COM_BIAS] = SITAR_A_TX_COM_BIAS__POR,
+ [SITAR_A_MBHC_SCALING_MUX_1] = SITAR_A_MBHC_SCALING_MUX_1__POR,
+ [SITAR_A_MBHC_SCALING_MUX_2] = SITAR_A_MBHC_SCALING_MUX_2__POR,
+ [SITAR_A_TX_SUP_SWITCH_CTRL_1] = SITAR_A_TX_SUP_SWITCH_CTRL_1__POR,
+ [SITAR_A_TX_SUP_SWITCH_CTRL_2] = SITAR_A_TX_SUP_SWITCH_CTRL_2__POR,
+ [SITAR_A_TX_1_2_EN] = SITAR_A_TX_1_2_EN__POR,
+ [SITAR_A_TX_1_2_TEST_EN] = SITAR_A_TX_1_2_TEST_EN__POR,
+ [SITAR_A_TX_1_2_ADC_CH1] = SITAR_A_TX_1_2_ADC_CH1__POR,
+ [SITAR_A_TX_1_2_ADC_CH2] = SITAR_A_TX_1_2_ADC_CH2__POR,
+ [SITAR_A_TX_1_2_ATEST_REFCTRL] = SITAR_A_TX_1_2_ATEST_REFCTRL__POR,
+ [SITAR_A_TX_1_2_TEST_CTL] = SITAR_A_TX_1_2_TEST_CTL__POR,
+ [SITAR_A_TX_1_2_TEST_BLOCK_EN] = SITAR_A_TX_1_2_TEST_BLOCK_EN__POR,
+ [SITAR_A_TX_1_2_TXFE_CLKDIV] = SITAR_A_TX_1_2_TXFE_CLKDIV__POR,
+ [SITAR_A_TX_1_2_SAR_ERR_CH1] = SITAR_A_TX_1_2_SAR_ERR_CH1__POR,
+ [SITAR_A_TX_1_2_SAR_ERR_CH2] = SITAR_A_TX_1_2_SAR_ERR_CH2__POR,
+ [SITAR_A_TX_3_EN] = SITAR_A_TX_3_EN__POR,
+ [SITAR_A_TX_3_TEST_EN] = SITAR_A_TX_3_TEST_EN__POR,
+ [SITAR_A_TX_3_ADC] = SITAR_A_TX_3_ADC__POR,
+ [SITAR_A_TX_3_MBHC_ATEST_REFCTRL] =
+ SITAR_A_TX_3_MBHC_ATEST_REFCTRL__POR,
+ [SITAR_A_TX_3_TEST_CTL] = SITAR_A_TX_3_TEST_CTL__POR,
+ [SITAR_A_TX_3_TEST_BLOCK_EN] = SITAR_A_TX_3_TEST_BLOCK_EN__POR,
+ [SITAR_A_TX_3_TXFE_CKDIV] = SITAR_A_TX_3_TXFE_CKDIV__POR,
+ [SITAR_A_TX_3_SAR_ERR] = SITAR_A_TX_3_SAR_ERR__POR,
+ [SITAR_A_TX_4_MBHC_EN] = SITAR_A_TX_4_MBHC_EN__POR,
+ [SITAR_A_TX_4_MBHC_ADC] = SITAR_A_TX_4_MBHC_ADC__POR,
+ [SITAR_A_TX_4_MBHC_TEST_CTL] = SITAR_A_TX_4_MBHC_TEST_CTL__POR,
+ [SITAR_A_TX_4_MBHC_SAR_ERR] = SITAR_A_TX_4_MBHC_SAR_ERR__POR,
+ [SITAR_A_TX_4_TXFE_CLKDIV] = SITAR_A_TX_4_TXFE_CLKDIV__POR,
+ [SITAR_A_AUX_COM_CTL] = SITAR_A_AUX_COM_CTL__POR,
+ [SITAR_A_AUX_COM_ATEST] = SITAR_A_AUX_COM_ATEST__POR,
+ [SITAR_A_AUX_L_EN] = SITAR_A_AUX_L_EN__POR,
+ [SITAR_A_AUX_L_GAIN] = SITAR_A_AUX_L_GAIN__POR,
+ [SITAR_A_AUX_L_PA_CONN] = SITAR_A_AUX_L_PA_CONN__POR,
+ [SITAR_A_AUX_L_PA_CONN_INV] = SITAR_A_AUX_L_PA_CONN_INV__POR,
+ [SITAR_A_AUX_R_EN] = SITAR_A_AUX_R_EN__POR,
+ [SITAR_A_AUX_R_GAIN] = SITAR_A_AUX_R_GAIN__POR,
+ [SITAR_A_AUX_R_PA_CONN] = SITAR_A_AUX_R_PA_CONN__POR,
+ [SITAR_A_AUX_R_PA_CONN_INV] = SITAR_A_AUX_R_PA_CONN_INV__POR,
+ [SITAR_A_CP_EN] = SITAR_A_CP_EN__POR,
+ [SITAR_A_CP_CLK] = SITAR_A_CP_CLK__POR,
+ [SITAR_A_CP_STATIC] = SITAR_A_CP_STATIC__POR,
+ [SITAR_A_CP_DCC1] = SITAR_A_CP_DCC1__POR,
+ [SITAR_A_CP_DCC3] = SITAR_A_CP_DCC3__POR,
+ [SITAR_A_CP_ATEST] = SITAR_A_CP_ATEST__POR,
+ [SITAR_A_CP_DTEST] = SITAR_A_CP_DTEST__POR,
+ [SITAR_A_RX_COM_TIMER_DIV] = SITAR_A_RX_COM_TIMER_DIV__POR,
+ [SITAR_A_RX_COM_OCP_CTL] = SITAR_A_RX_COM_OCP_CTL__POR,
+ [SITAR_A_RX_COM_OCP_COUNT] = SITAR_A_RX_COM_OCP_COUNT__POR,
+ [SITAR_A_RX_COM_DAC_CTL] = SITAR_A_RX_COM_DAC_CTL__POR,
+ [SITAR_A_RX_COM_BIAS] = SITAR_A_RX_COM_BIAS__POR,
+ [SITAR_A_RX_HPH_BIAS_PA] = SITAR_A_RX_HPH_BIAS_PA__POR,
+ [SITAR_A_RX_HPH_BIAS_LDO] = SITAR_A_RX_HPH_BIAS_LDO__POR,
+ [SITAR_A_RX_HPH_BIAS_CNP] = SITAR_A_RX_HPH_BIAS_CNP__POR,
+ [SITAR_A_RX_HPH_BIAS_WG] = SITAR_A_RX_HPH_BIAS_WG__POR,
+ [SITAR_A_RX_HPH_OCP_CTL] = SITAR_A_RX_HPH_OCP_CTL__POR,
+ [SITAR_A_RX_HPH_CNP_EN] = SITAR_A_RX_HPH_CNP_EN__POR,
+ [SITAR_A_RX_HPH_CNP_WG_CTL] = SITAR_A_RX_HPH_CNP_WG_CTL__POR,
+ [SITAR_A_RX_HPH_CNP_WG_TIME] = SITAR_A_RX_HPH_CNP_WG_TIME__POR,
+ [SITAR_A_RX_HPH_L_GAIN] = SITAR_A_RX_HPH_L_GAIN__POR,
+ [SITAR_A_RX_HPH_L_TEST] = SITAR_A_RX_HPH_L_TEST__POR,
+ [SITAR_A_RX_HPH_L_PA_CTL] = SITAR_A_RX_HPH_L_PA_CTL__POR,
+ [SITAR_A_RX_HPH_L_DAC_CTL] = SITAR_A_RX_HPH_L_DAC_CTL__POR,
+ [SITAR_A_RX_HPH_L_ATEST] = SITAR_A_RX_HPH_L_ATEST__POR,
+ [SITAR_A_RX_HPH_L_STATUS] = SITAR_A_RX_HPH_L_STATUS__POR,
+ [SITAR_A_RX_HPH_R_GAIN] = SITAR_A_RX_HPH_R_GAIN__POR,
+ [SITAR_A_RX_HPH_R_TEST] = SITAR_A_RX_HPH_R_TEST__POR,
+ [SITAR_A_RX_HPH_R_PA_CTL] = SITAR_A_RX_HPH_R_PA_CTL__POR,
+ [SITAR_A_RX_HPH_R_DAC_CTL] = SITAR_A_RX_HPH_R_DAC_CTL__POR,
+ [SITAR_A_RX_HPH_R_ATEST] = SITAR_A_RX_HPH_R_ATEST__POR,
+ [SITAR_A_RX_HPH_R_STATUS] = SITAR_A_RX_HPH_R_STATUS__POR,
+ [SITAR_A_RX_EAR_BIAS_PA] = SITAR_A_RX_EAR_BIAS_PA__POR,
+ [SITAR_A_RX_EAR_BIAS_CMBUFF] = SITAR_A_RX_EAR_BIAS_CMBUFF__POR,
+ [SITAR_A_RX_EAR_EN] = SITAR_A_RX_EAR_EN__POR,
+ [SITAR_A_RX_EAR_GAIN] = SITAR_A_RX_EAR_GAIN__POR,
+ [SITAR_A_RX_EAR_CMBUFF] = SITAR_A_RX_EAR_CMBUFF__POR,
+ [SITAR_A_RX_EAR_ICTL] = SITAR_A_RX_EAR_ICTL__POR,
+ [SITAR_A_RX_EAR_CCOMP] = SITAR_A_RX_EAR_CCOMP__POR,
+ [SITAR_A_RX_EAR_VCM] = SITAR_A_RX_EAR_VCM__POR,
+ [SITAR_A_RX_EAR_CNP] = SITAR_A_RX_EAR_CNP__POR,
+ [SITAR_A_RX_EAR_ATEST] = SITAR_A_RX_EAR_ATEST__POR,
+ [SITAR_A_RX_EAR_STATUS] = SITAR_A_RX_EAR_STATUS__POR,
+ [SITAR_A_RX_LINE_BIAS_PA] = SITAR_A_RX_LINE_BIAS_PA__POR,
+ [SITAR_A_RX_LINE_BIAS_LDO] = SITAR_A_RX_LINE_BIAS_LDO__POR,
+ [SITAR_A_RX_LINE_BIAS_CNP1] = SITAR_A_RX_LINE_BIAS_CNP1__POR,
+ [SITAR_A_RX_LINE_COM] = SITAR_A_RX_LINE_COM__POR,
+ [SITAR_A_RX_LINE_CNP_EN] = SITAR_A_RX_LINE_CNP_EN__POR,
+ [SITAR_A_RX_LINE_CNP_WG_CTL] = SITAR_A_RX_LINE_CNP_WG_CTL__POR,
+ [SITAR_A_RX_LINE_CNP_WG_TIME] = SITAR_A_RX_LINE_CNP_WG_TIME__POR,
+ [SITAR_A_RX_LINE_1_GAIN] = SITAR_A_RX_LINE_1_GAIN__POR,
+ [SITAR_A_RX_LINE_1_TEST] = SITAR_A_RX_LINE_1_TEST__POR,
+ [SITAR_A_RX_LINE_1_DAC_CTL] = SITAR_A_RX_LINE_1_DAC_CTL__POR,
+ [SITAR_A_RX_LINE_1_STATUS] = SITAR_A_RX_LINE_1_STATUS__POR,
+ [SITAR_A_RX_LINE_2_GAIN] = SITAR_A_RX_LINE_2_GAIN__POR,
+ [SITAR_A_RX_LINE_2_TEST] = SITAR_A_RX_LINE_2_TEST__POR,
+ [SITAR_A_RX_LINE_2_DAC_CTL] = SITAR_A_RX_LINE_2_DAC_CTL__POR,
+ [SITAR_A_RX_LINE_2_STATUS] = SITAR_A_RX_LINE_2_STATUS__POR,
+ [SITAR_A_RX_LINE_BIAS_CNP2] = SITAR_A_RX_LINE_BIAS_CNP2__POR,
+ [SITAR_A_RX_LINE_OCP_CTL] = SITAR_A_RX_LINE_OCP_CTL__POR,
+ [SITAR_A_RX_LINE_1_PA_CTL] = SITAR_A_RX_LINE_1_PA_CTL__POR,
+ [SITAR_A_RX_LINE_2_PA_CTL] = SITAR_A_RX_LINE_2_PA_CTL__POR,
+ [SITAR_A_RX_LINE_CNP_DBG] = SITAR_A_RX_LINE_CNP_DBG__POR,
+ [SITAR_A_MBHC_HPH] = SITAR_A_MBHC_HPH__POR,
+ [SITAR_A_RC_OSC_FREQ] = SITAR_A_RC_OSC_FREQ__POR,
+ [SITAR_A_RC_OSC_TEST] = SITAR_A_RC_OSC_TEST__POR,
+ [SITAR_A_RC_OSC_STATUS] = SITAR_A_RC_OSC_STATUS__POR,
+ [SITAR_A_RC_OSC_TUNER] = SITAR_A_RC_OSC_TUNER__POR,
+ [SITAR_A_CDC_ANC1_CTL] = SITAR_A_CDC_ANC1_CTL__POR,
+ [SITAR_A_CDC_ANC1_SHIFT] = SITAR_A_CDC_ANC1_SHIFT__POR,
+ [SITAR_A_CDC_ANC1_IIR_B1_CTL] = SITAR_A_CDC_ANC1_IIR_B1_CTL__POR,
+ [SITAR_A_CDC_ANC1_IIR_B2_CTL] = SITAR_A_CDC_ANC1_IIR_B2_CTL__POR,
+ [SITAR_A_CDC_ANC1_IIR_B3_CTL] = SITAR_A_CDC_ANC1_IIR_B3_CTL__POR,
+ [SITAR_A_CDC_ANC1_IIR_B4_CTL] = SITAR_A_CDC_ANC1_IIR_B4_CTL__POR,
+ [SITAR_A_CDC_ANC1_LPF_B1_CTL] = SITAR_A_CDC_ANC1_LPF_B1_CTL__POR,
+ [SITAR_A_CDC_ANC1_LPF_B2_CTL] = SITAR_A_CDC_ANC1_LPF_B2_CTL__POR,
+ [SITAR_A_CDC_ANC1_LPF_B3_CTL] = SITAR_A_CDC_ANC1_LPF_B3_CTL__POR,
+ [SITAR_A_CDC_ANC1_SPARE] = SITAR_A_CDC_ANC1_SPARE__POR,
+ [SITAR_A_CDC_ANC1_SMLPF_CTL] = SITAR_A_CDC_ANC1_SMLPF_CTL__POR,
+ [SITAR_A_CDC_ANC1_DCFLT_CTL] = SITAR_A_CDC_ANC1_DCFLT_CTL__POR,
+ [SITAR_A_CDC_TX1_VOL_CTL_TIMER] = SITAR_A_CDC_TX1_VOL_CTL_TIMER__POR,
+ [SITAR_A_CDC_TX1_VOL_CTL_GAIN] = SITAR_A_CDC_TX1_VOL_CTL_GAIN__POR,
+ [SITAR_A_CDC_TX1_VOL_CTL_CFG] = SITAR_A_CDC_TX1_VOL_CTL_CFG__POR,
+ [SITAR_A_CDC_TX1_MUX_CTL] = SITAR_A_CDC_TX1_MUX_CTL__POR,
+ [SITAR_A_CDC_TX1_CLK_FS_CTL] = SITAR_A_CDC_TX1_CLK_FS_CTL__POR,
+ [SITAR_A_CDC_TX1_DMIC_CTL] = SITAR_A_CDC_TX1_DMIC_CTL__POR,
+ [SITAR_A_CDC_SRC1_PDA_CFG] = SITAR_A_CDC_SRC1_PDA_CFG__POR,
+ [SITAR_A_CDC_SRC1_FS_CTL] = SITAR_A_CDC_SRC1_FS_CTL__POR,
+ [SITAR_A_CDC_RX1_B1_CTL] = SITAR_A_CDC_RX1_B1_CTL__POR,
+ [SITAR_A_CDC_RX1_B2_CTL] = SITAR_A_CDC_RX1_B2_CTL__POR,
+ [SITAR_A_CDC_RX1_B3_CTL] = SITAR_A_CDC_RX1_B3_CTL__POR,
+ [SITAR_A_CDC_RX1_B4_CTL] = SITAR_A_CDC_RX1_B4_CTL__POR,
+ [SITAR_A_CDC_RX1_B5_CTL] = SITAR_A_CDC_RX1_B5_CTL__POR,
+ [SITAR_A_CDC_RX1_B6_CTL] = SITAR_A_CDC_RX1_B6_CTL__POR,
+ [SITAR_A_CDC_RX1_VOL_CTL_B1_CTL] = SITAR_A_CDC_RX1_VOL_CTL_B1_CTL__POR,
+ [SITAR_A_CDC_RX1_VOL_CTL_B2_CTL] = SITAR_A_CDC_RX1_VOL_CTL_B2_CTL__POR,
+ [SITAR_A_CDC_CLK_ANC_RESET_CTL] = SITAR_A_CDC_CLK_ANC_RESET_CTL__POR,
+ [SITAR_A_CDC_CLK_RX_RESET_CTL] = SITAR_A_CDC_CLK_RX_RESET_CTL__POR,
+ [SITAR_A_CDC_CLK_TX_RESET_B1_CTL] =
+ SITAR_A_CDC_CLK_TX_RESET_B1_CTL__POR,
+ [SITAR_A_CDC_CLK_TX_RESET_B2_CTL] =
+ SITAR_A_CDC_CLK_TX_RESET_B2_CTL__POR,
+ [SITAR_A_CDC_CLK_DMIC_CTL] = SITAR_A_CDC_CLK_DMIC_CTL__POR,
+ [SITAR_A_CDC_CLK_RX_I2S_CTL] = SITAR_A_CDC_CLK_RX_I2S_CTL__POR,
+ [SITAR_A_CDC_CLK_TX_I2S_CTL] = SITAR_A_CDC_CLK_TX_I2S_CTL__POR,
+ [SITAR_A_CDC_CLK_OTHR_RESET_CTL] = SITAR_A_CDC_CLK_OTHR_RESET_CTL__POR,
+ [SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL] =
+ SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL__POR,
+ [SITAR_A_CDC_CLK_OTHR_CTL] = SITAR_A_CDC_CLK_OTHR_CTL__POR,
+ [SITAR_A_CDC_CLK_RDAC_CLK_EN_CTL] =
+ SITAR_A_CDC_CLK_RDAC_CLK_EN_CTL__POR,
+ [SITAR_A_CDC_CLK_ANC_CLK_EN_CTL] = SITAR_A_CDC_CLK_ANC_CLK_EN_CTL__POR,
+ [SITAR_A_CDC_CLK_RX_B1_CTL] = SITAR_A_CDC_CLK_RX_B1_CTL__POR,
+ [SITAR_A_CDC_CLK_RX_B2_CTL] = SITAR_A_CDC_CLK_RX_B2_CTL__POR,
+ [SITAR_A_CDC_CLK_MCLK_CTL] = SITAR_A_CDC_CLK_MCLK_CTL__POR,
+ [SITAR_A_CDC_CLK_PDM_CTL] = SITAR_A_CDC_CLK_PDM_CTL__POR,
+ [SITAR_A_CDC_CLK_SD_CTL] = SITAR_A_CDC_CLK_SD_CTL__POR,
+ [SITAR_A_CDC_CLK_LP_CTL] = SITAR_A_CDC_CLK_LP_CTL__POR,
+ [SITAR_A_CDC_CLSG_FREQ_THRESH_B1_CTL] =
+ SITAR_A_CDC_CLSG_FREQ_THRESH_B1_CTL__POR,
+ [SITAR_A_CDC_CLSG_FREQ_THRESH_B2_CTL] =
+ SITAR_A_CDC_CLSG_FREQ_THRESH_B2_CTL__POR,
+ [SITAR_A_CDC_CLSG_FREQ_THRESH_B3_CTL] =
+ SITAR_A_CDC_CLSG_FREQ_THRESH_B3_CTL__POR,
+ [SITAR_A_CDC_CLSG_FREQ_THRESH_B4_CTL] =
+ SITAR_A_CDC_CLSG_FREQ_THRESH_B4_CTL__POR,
+ [SITAR_A_CDC_CLSG_GAIN_THRESH_CTL] =
+ SITAR_A_CDC_CLSG_GAIN_THRESH_CTL__POR,
+ [SITAR_A_CDC_CLSG_TIMER_B1_CFG] = SITAR_A_CDC_CLSG_TIMER_B1_CFG__POR,
+ [SITAR_A_CDC_CLSG_TIMER_B2_CFG] = SITAR_A_CDC_CLSG_TIMER_B2_CFG__POR,
+ [SITAR_A_CDC_CLSG_CTL] = SITAR_A_CDC_CLSG_CTL__POR,
+ [SITAR_A_CDC_IIR1_GAIN_B1_CTL] = SITAR_A_CDC_IIR1_GAIN_B1_CTL__POR,
+ [SITAR_A_CDC_IIR1_GAIN_B2_CTL] = SITAR_A_CDC_IIR1_GAIN_B2_CTL__POR,
+ [SITAR_A_CDC_IIR1_GAIN_B3_CTL] = SITAR_A_CDC_IIR1_GAIN_B3_CTL__POR,
+ [SITAR_A_CDC_IIR1_GAIN_B4_CTL] = SITAR_A_CDC_IIR1_GAIN_B4_CTL__POR,
+ [SITAR_A_CDC_IIR1_GAIN_B5_CTL] = SITAR_A_CDC_IIR1_GAIN_B5_CTL__POR,
+ [SITAR_A_CDC_IIR1_GAIN_B6_CTL] = SITAR_A_CDC_IIR1_GAIN_B6_CTL__POR,
+ [SITAR_A_CDC_IIR1_GAIN_B7_CTL] = SITAR_A_CDC_IIR1_GAIN_B7_CTL__POR,
+ [SITAR_A_CDC_IIR1_GAIN_B8_CTL] = SITAR_A_CDC_IIR1_GAIN_B8_CTL__POR,
+ [SITAR_A_CDC_IIR1_CTL] = SITAR_A_CDC_IIR1_CTL__POR,
+ [SITAR_A_CDC_IIR1_GAIN_TIMER_CTL] =
+ SITAR_A_CDC_IIR1_GAIN_TIMER_CTL__POR,
+ [SITAR_A_CDC_IIR1_COEF_B1_CTL] = SITAR_A_CDC_IIR1_COEF_B1_CTL__POR,
+ [SITAR_A_CDC_IIR1_COEF_B2_CTL] = SITAR_A_CDC_IIR1_COEF_B2_CTL__POR,
+ [SITAR_A_CDC_IIR1_COEF_B3_CTL] = SITAR_A_CDC_IIR1_COEF_B3_CTL__POR,
+ [SITAR_A_CDC_IIR1_COEF_B4_CTL] = SITAR_A_CDC_IIR1_COEF_B4_CTL__POR,
+ [SITAR_A_CDC_IIR1_COEF_B5_CTL] = SITAR_A_CDC_IIR1_COEF_B5_CTL__POR,
+ [SITAR_A_CDC_TOP_GAIN_UPDATE] = SITAR_A_CDC_TOP_GAIN_UPDATE__POR,
+ [SITAR_A_CDC_TOP_RDAC_DOUT_CTL] = SITAR_A_CDC_TOP_RDAC_DOUT_CTL__POR,
+ [SITAR_A_CDC_DEBUG_B1_CTL] = SITAR_A_CDC_DEBUG_B1_CTL__POR,
+ [SITAR_A_CDC_DEBUG_B2_CTL] = SITAR_A_CDC_DEBUG_B2_CTL__POR,
+ [SITAR_A_CDC_DEBUG_B3_CTL] = SITAR_A_CDC_DEBUG_B3_CTL__POR,
+ [SITAR_A_CDC_DEBUG_B4_CTL] = SITAR_A_CDC_DEBUG_B4_CTL__POR,
+ [SITAR_A_CDC_DEBUG_B5_CTL] = SITAR_A_CDC_DEBUG_B5_CTL__POR,
+ [SITAR_A_CDC_DEBUG_B6_CTL] = SITAR_A_CDC_DEBUG_B6_CTL__POR,
+ [SITAR_A_CDC_DEBUG_B7_CTL] = SITAR_A_CDC_DEBUG_B7_CTL__POR,
+ [SITAR_A_CDC_COMP1_B1_CTL] = SITAR_A_CDC_COMP1_B1_CTL__POR,
+ [SITAR_A_CDC_COMP1_B2_CTL] = SITAR_A_CDC_COMP1_B2_CTL__POR,
+ [SITAR_A_CDC_COMP1_B3_CTL] = SITAR_A_CDC_COMP1_B3_CTL__POR,
+ [SITAR_A_CDC_COMP1_B4_CTL] = SITAR_A_CDC_COMP1_B4_CTL__POR,
+ [SITAR_A_CDC_COMP1_B5_CTL] = SITAR_A_CDC_COMP1_B5_CTL__POR,
+ [SITAR_A_CDC_COMP1_B6_CTL] = SITAR_A_CDC_COMP1_B6_CTL__POR,
+ [SITAR_A_CDC_COMP1_SHUT_DOWN_STATUS] =
+ SITAR_A_CDC_COMP1_SHUT_DOWN_STATUS__POR,
+ [SITAR_A_CDC_COMP1_FS_CFG] = SITAR_A_CDC_COMP1_FS_CFG__POR,
+ [SITAR_A_CDC_CONN_RX1_B1_CTL] = SITAR_A_CDC_CONN_RX1_B1_CTL__POR,
+ [SITAR_A_CDC_CONN_RX1_B2_CTL] = SITAR_A_CDC_CONN_RX1_B2_CTL__POR,
+ [SITAR_A_CDC_CONN_RX1_B3_CTL] = SITAR_A_CDC_CONN_RX1_B3_CTL__POR,
+ [SITAR_A_CDC_CONN_RX2_B1_CTL] = SITAR_A_CDC_CONN_RX2_B1_CTL__POR,
+ [SITAR_A_CDC_CONN_RX2_B2_CTL] = SITAR_A_CDC_CONN_RX2_B2_CTL__POR,
+ [SITAR_A_CDC_CONN_RX2_B3_CTL] = SITAR_A_CDC_CONN_RX2_B3_CTL__POR,
+ [SITAR_A_CDC_CONN_RX3_B1_CTL] = SITAR_A_CDC_CONN_RX3_B1_CTL__POR,
+ [SITAR_A_CDC_CONN_RX3_B2_CTL] = SITAR_A_CDC_CONN_RX3_B2_CTL__POR,
+ [SITAR_A_CDC_CONN_RX3_B3_CTL] = SITAR_A_CDC_CONN_RX3_B3_CTL__POR,
+ [SITAR_A_CDC_CONN_ANC_B1_CTL] = SITAR_A_CDC_CONN_ANC_B1_CTL__POR,
+ [SITAR_A_CDC_CONN_ANC_B2_CTL] = SITAR_A_CDC_CONN_ANC_B2_CTL__POR,
+ [SITAR_A_CDC_CONN_TX_B1_CTL] = SITAR_A_CDC_CONN_TX_B1_CTL__POR,
+ [SITAR_A_CDC_CONN_TX_B2_CTL] = SITAR_A_CDC_CONN_TX_B2_CTL__POR,
+ [SITAR_A_CDC_CONN_EQ1_B1_CTL] = SITAR_A_CDC_CONN_EQ1_B1_CTL__POR,
+ [SITAR_A_CDC_CONN_EQ1_B2_CTL] = SITAR_A_CDC_CONN_EQ1_B2_CTL__POR,
+ [SITAR_A_CDC_CONN_EQ1_B3_CTL] = SITAR_A_CDC_CONN_EQ1_B3_CTL__POR,
+ [SITAR_A_CDC_CONN_EQ1_B4_CTL] = SITAR_A_CDC_CONN_EQ1_B4_CTL__POR,
+ [SITAR_A_CDC_CONN_EQ2_B1_CTL] = SITAR_A_CDC_CONN_EQ2_B1_CTL__POR,
+ [SITAR_A_CDC_CONN_EQ2_B2_CTL] = SITAR_A_CDC_CONN_EQ2_B2_CTL__POR,
+ [SITAR_A_CDC_CONN_EQ2_B3_CTL] = SITAR_A_CDC_CONN_EQ2_B3_CTL__POR,
+ [SITAR_A_CDC_CONN_EQ2_B4_CTL] = SITAR_A_CDC_CONN_EQ2_B4_CTL__POR,
+ [SITAR_A_CDC_CONN_SRC1_B1_CTL] = SITAR_A_CDC_CONN_SRC1_B1_CTL__POR,
+ [SITAR_A_CDC_CONN_SRC1_B2_CTL] = SITAR_A_CDC_CONN_SRC1_B2_CTL__POR,
+ [SITAR_A_CDC_CONN_SRC2_B1_CTL] = SITAR_A_CDC_CONN_SRC2_B1_CTL__POR,
+ [SITAR_A_CDC_CONN_SRC2_B2_CTL] = SITAR_A_CDC_CONN_SRC2_B2_CTL__POR,
+ [SITAR_A_CDC_CONN_TX_SB_B1_CTL] = SITAR_A_CDC_CONN_TX_SB_B1_CTL__POR,
+ [SITAR_A_CDC_CONN_TX_SB_B2_CTL] = SITAR_A_CDC_CONN_TX_SB_B2_CTL__POR,
+ [SITAR_A_CDC_CONN_TX_SB_B3_CTL] = SITAR_A_CDC_CONN_TX_SB_B3_CTL__POR,
+ [SITAR_A_CDC_CONN_TX_SB_B4_CTL] = SITAR_A_CDC_CONN_TX_SB_B4_CTL__POR,
+ [SITAR_A_CDC_CONN_TX_SB_B5_CTL] = SITAR_A_CDC_CONN_TX_SB_B5_CTL__POR,
+ [SITAR_A_CDC_CONN_RX_SB_B1_CTL] = SITAR_A_CDC_CONN_RX_SB_B1_CTL__POR,
+ [SITAR_A_CDC_CONN_RX_SB_B2_CTL] = SITAR_A_CDC_CONN_RX_SB_B2_CTL__POR,
+ [SITAR_A_CDC_CONN_CLSG_CTL] = SITAR_A_CDC_CONN_CLSG_CTL__POR,
+ [SITAR_A_CDC_CONN_SPARE] = SITAR_A_CDC_CONN_SPARE__POR,
+ [SITAR_A_CDC_MBHC_EN_CTL] = SITAR_A_CDC_MBHC_EN_CTL__POR,
+ [SITAR_A_CDC_MBHC_FIR_B1_CFG] = SITAR_A_CDC_MBHC_FIR_B1_CFG__POR,
+ [SITAR_A_CDC_MBHC_FIR_B2_CFG] = SITAR_A_CDC_MBHC_FIR_B2_CFG__POR,
+ [SITAR_A_CDC_MBHC_TIMER_B1_CTL] = SITAR_A_CDC_MBHC_TIMER_B1_CTL__POR,
+ [SITAR_A_CDC_MBHC_TIMER_B2_CTL] = SITAR_A_CDC_MBHC_TIMER_B2_CTL__POR,
+ [SITAR_A_CDC_MBHC_TIMER_B3_CTL] = SITAR_A_CDC_MBHC_TIMER_B3_CTL__POR,
+ [SITAR_A_CDC_MBHC_TIMER_B4_CTL] = SITAR_A_CDC_MBHC_TIMER_B4_CTL__POR,
+ [SITAR_A_CDC_MBHC_TIMER_B5_CTL] = SITAR_A_CDC_MBHC_TIMER_B5_CTL__POR,
+ [SITAR_A_CDC_MBHC_TIMER_B6_CTL] = SITAR_A_CDC_MBHC_TIMER_B6_CTL__POR,
+ [SITAR_A_CDC_MBHC_B1_STATUS] = SITAR_A_CDC_MBHC_B1_STATUS__POR,
+ [SITAR_A_CDC_MBHC_B2_STATUS] = SITAR_A_CDC_MBHC_B2_STATUS__POR,
+ [SITAR_A_CDC_MBHC_B3_STATUS] = SITAR_A_CDC_MBHC_B3_STATUS__POR,
+ [SITAR_A_CDC_MBHC_B4_STATUS] = SITAR_A_CDC_MBHC_B4_STATUS__POR,
+ [SITAR_A_CDC_MBHC_B5_STATUS] = SITAR_A_CDC_MBHC_B5_STATUS__POR,
+ [SITAR_A_CDC_MBHC_B1_CTL] = SITAR_A_CDC_MBHC_B1_CTL__POR,
+ [SITAR_A_CDC_MBHC_B2_CTL] = SITAR_A_CDC_MBHC_B2_CTL__POR,
+ [SITAR_A_CDC_MBHC_VOLT_B1_CTL] = SITAR_A_CDC_MBHC_VOLT_B1_CTL__POR,
+ [SITAR_A_CDC_MBHC_VOLT_B2_CTL] = SITAR_A_CDC_MBHC_VOLT_B2_CTL__POR,
+ [SITAR_A_CDC_MBHC_VOLT_B3_CTL] = SITAR_A_CDC_MBHC_VOLT_B3_CTL__POR,
+ [SITAR_A_CDC_MBHC_VOLT_B4_CTL] = SITAR_A_CDC_MBHC_VOLT_B4_CTL__POR,
+ [SITAR_A_CDC_MBHC_VOLT_B5_CTL] = SITAR_A_CDC_MBHC_VOLT_B5_CTL__POR,
+ [SITAR_A_CDC_MBHC_VOLT_B6_CTL] = SITAR_A_CDC_MBHC_VOLT_B6_CTL__POR,
+ [SITAR_A_CDC_MBHC_VOLT_B7_CTL] = SITAR_A_CDC_MBHC_VOLT_B7_CTL__POR,
+ [SITAR_A_CDC_MBHC_VOLT_B8_CTL] = SITAR_A_CDC_MBHC_VOLT_B8_CTL__POR,
+ [SITAR_A_CDC_MBHC_VOLT_B9_CTL] = SITAR_A_CDC_MBHC_VOLT_B9_CTL__POR,
+ [SITAR_A_CDC_MBHC_VOLT_B10_CTL] = SITAR_A_CDC_MBHC_VOLT_B10_CTL__POR,
+ [SITAR_A_CDC_MBHC_VOLT_B11_CTL] = SITAR_A_CDC_MBHC_VOLT_B11_CTL__POR,
+ [SITAR_A_CDC_MBHC_VOLT_B12_CTL] = SITAR_A_CDC_MBHC_VOLT_B12_CTL__POR,
+ [SITAR_A_CDC_MBHC_CLK_CTL] = SITAR_A_CDC_MBHC_CLK_CTL__POR,
+ [SITAR_A_CDC_MBHC_INT_CTL] = SITAR_A_CDC_MBHC_INT_CTL__POR,
+ [SITAR_A_CDC_MBHC_DEBUG_CTL] = SITAR_A_CDC_MBHC_DEBUG_CTL__POR,
+ [SITAR_A_CDC_MBHC_SPARE] = SITAR_A_CDC_MBHC_SPARE__POR,
+};
+
+const u8 sitar_reg_readable[SITAR_CACHE_SIZE] = {
+ [WCD9XXX_A_CHIP_CTL] = 1,
+ [WCD9XXX_A_CHIP_STATUS] = 1,
+ [WCD9XXX_A_CHIP_ID_BYTE_0] = 1,
+ [WCD9XXX_A_CHIP_ID_BYTE_1] = 1,
+ [WCD9XXX_A_CHIP_ID_BYTE_2] = 1,
+ [WCD9XXX_A_CHIP_ID_BYTE_3] = 1,
+ [WCD9XXX_A_CHIP_VERSION] = 1,
+ [WCD9XXX_A_SB_VERSION] = 1,
+ [WCD9XXX_A_SLAVE_ID_1] = 1,
+ [WCD9XXX_A_SLAVE_ID_2] = 1,
+ [WCD9XXX_A_SLAVE_ID_3] = 1,
+ [SITAR_A_PIN_CTL_OE0] = 1,
+ [SITAR_A_PIN_CTL_OE1] = 1,
+ [SITAR_A_PIN_CTL_DATA0] = 1,
+ [SITAR_A_PIN_CTL_DATA1] = 1,
+ [SITAR_A_HDRIVE_GENERIC] = 1,
+ [SITAR_A_HDRIVE_OVERRIDE] = 1,
+ [SITAR_A_ANA_CSR_WAIT_STATE] = 1,
+ [SITAR_A_PROCESS_MONITOR_CTL0] = 1,
+ [SITAR_A_PROCESS_MONITOR_CTL1] = 1,
+ [SITAR_A_PROCESS_MONITOR_CTL2] = 1,
+ [SITAR_A_PROCESS_MONITOR_CTL3] = 1,
+ [SITAR_A_QFUSE_CTL] = 1,
+ [SITAR_A_QFUSE_STATUS] = 1,
+ [SITAR_A_QFUSE_DATA_OUT0] = 1,
+ [SITAR_A_QFUSE_DATA_OUT1] = 1,
+ [SITAR_A_QFUSE_DATA_OUT2] = 1,
+ [SITAR_A_QFUSE_DATA_OUT3] = 1,
+ [SITAR_A_CDC_CTL] = 1,
+ [SITAR_A_LEAKAGE_CTL] = 1,
+ [SITAR_A_INTR_MODE] = 1,
+ [SITAR_A_INTR_MASK0] = 1,
+ [SITAR_A_INTR_MASK1] = 1,
+ [SITAR_A_INTR_MASK2] = 1,
+ [SITAR_A_INTR_STATUS0] = 1,
+ [SITAR_A_INTR_STATUS1] = 1,
+ [SITAR_A_INTR_STATUS2] = 1,
+ [SITAR_A_INTR_LEVEL0] = 1,
+ [SITAR_A_INTR_LEVEL1] = 1,
+ [SITAR_A_INTR_LEVEL2] = 1,
+ [SITAR_A_INTR_TEST0] = 1,
+ [SITAR_A_INTR_TEST1] = 1,
+ [SITAR_A_INTR_TEST2] = 1,
+ [SITAR_A_INTR_SET0] = 1,
+ [SITAR_A_INTR_SET1] = 1,
+ [SITAR_A_INTR_SET2] = 1,
+ [SITAR_A_CDC_TX_I2S_SCK_MODE] = 1,
+ [SITAR_A_CDC_TX_I2S_WS_MODE] = 1,
+ [SITAR_A_CDC_DMIC_DATA0_MODE] = 1,
+ [SITAR_A_CDC_DMIC_CLK0_MODE] = 1,
+ [SITAR_A_CDC_DMIC_DATA1_MODE] = 1,
+ [SITAR_A_CDC_DMIC_CLK1_MODE] = 1,
+ [SITAR_A_CDC_TX_I2S_SD0_MODE] = 1,
+ [SITAR_A_CDC_INTR_MODE] = 1,
+ [SITAR_A_CDC_RX_I2S_SD0_MODE] = 1,
+ [SITAR_A_CDC_RX_I2S_SD1_MODE] = 1,
+ [SITAR_A_BIAS_REF_CTL] = 1,
+ [SITAR_A_BIAS_CENTRAL_BG_CTL] = 1,
+ [SITAR_A_BIAS_PRECHRG_CTL] = 1,
+ [SITAR_A_BIAS_CURR_CTL_1] = 1,
+ [SITAR_A_BIAS_CURR_CTL_2] = 1,
+ [SITAR_A_BIAS_OSC_BG_CTL] = 1,
+ [SITAR_A_CLK_BUFF_EN1] = 1,
+ [SITAR_A_CLK_BUFF_EN2] = 1,
+ [SITAR_A_LDO_H_MODE_1] = 1,
+ [SITAR_A_LDO_H_MODE_2] = 1,
+ [SITAR_A_LDO_H_LOOP_CTL] = 1,
+ [SITAR_A_LDO_H_COMP_1] = 1,
+ [SITAR_A_LDO_H_COMP_2] = 1,
+ [SITAR_A_LDO_H_BIAS_1] = 1,
+ [SITAR_A_LDO_H_BIAS_2] = 1,
+ [SITAR_A_LDO_H_BIAS_3] = 1,
+ [SITAR_A_MICB_CFILT_1_CTL] = 1,
+ [SITAR_A_MICB_CFILT_1_VAL] = 1,
+ [SITAR_A_MICB_CFILT_1_PRECHRG] = 1,
+ [SITAR_A_MICB_1_CTL] = 1,
+ [SITAR_A_MICB_1_INT_RBIAS] = 1,
+ [SITAR_A_MICB_1_MBHC] = 1,
+ [SITAR_A_MICB_CFILT_2_CTL] = 1,
+ [SITAR_A_MICB_CFILT_2_VAL] = 1,
+ [SITAR_A_MICB_CFILT_2_PRECHRG] = 1,
+ [SITAR_A_MICB_2_CTL] = 1,
+ [SITAR_A_MICB_2_INT_RBIAS] = 1,
+ [SITAR_A_MICB_2_MBHC] = 1,
+ [SITAR_A_TX_COM_BIAS] = 1,
+ [SITAR_A_MBHC_SCALING_MUX_1] = 1,
+ [SITAR_A_MBHC_SCALING_MUX_2] = 1,
+ [SITAR_A_TX_SUP_SWITCH_CTRL_1] = 1,
+ [SITAR_A_TX_SUP_SWITCH_CTRL_2] = 1,
+ [SITAR_A_TX_1_2_EN] = 1,
+ [SITAR_A_TX_1_2_TEST_EN] = 1,
+ [SITAR_A_TX_1_2_ADC_CH1] = 1,
+ [SITAR_A_TX_1_2_ADC_CH2] = 1,
+ [SITAR_A_TX_1_2_ATEST_REFCTRL] = 1,
+ [SITAR_A_TX_1_2_TEST_CTL] = 1,
+ [SITAR_A_TX_1_2_TEST_BLOCK_EN] = 1,
+ [SITAR_A_TX_1_2_TXFE_CLKDIV] = 1,
+ [SITAR_A_TX_1_2_SAR_ERR_CH1] = 1,
+ [SITAR_A_TX_1_2_SAR_ERR_CH2] = 1,
+ [SITAR_A_TX_3_EN] = 1,
+ [SITAR_A_TX_3_TEST_EN] = 1,
+ [SITAR_A_TX_3_ADC] = 1,
+ [SITAR_A_TX_3_MBHC_ATEST_REFCTRL] = 1,
+ [SITAR_A_TX_3_TEST_CTL] = 1,
+ [SITAR_A_TX_3_TEST_BLOCK_EN] = 1,
+ [SITAR_A_TX_3_TXFE_CKDIV] = 1,
+ [SITAR_A_TX_3_SAR_ERR] = 1,
+ [SITAR_A_TX_4_MBHC_EN] = 1,
+ [SITAR_A_TX_4_MBHC_ADC] = 1,
+ [SITAR_A_TX_4_MBHC_TEST_CTL] = 1,
+ [SITAR_A_TX_4_MBHC_SAR_ERR] = 1,
+ [SITAR_A_TX_4_TXFE_CLKDIV] = 1,
+ [SITAR_A_AUX_COM_CTL] = 1,
+ [SITAR_A_AUX_COM_ATEST] = 1,
+ [SITAR_A_AUX_L_EN] = 1,
+ [SITAR_A_AUX_L_GAIN] = 1,
+ [SITAR_A_AUX_L_PA_CONN] = 1,
+ [SITAR_A_AUX_L_PA_CONN_INV] = 1,
+ [SITAR_A_AUX_R_EN] = 1,
+ [SITAR_A_AUX_R_GAIN] = 1,
+ [SITAR_A_AUX_R_PA_CONN] = 1,
+ [SITAR_A_AUX_R_PA_CONN_INV] = 1,
+ [SITAR_A_CP_EN] = 1,
+ [SITAR_A_CP_CLK] = 1,
+ [SITAR_A_CP_STATIC] = 1,
+ [SITAR_A_CP_DCC1] = 1,
+ [SITAR_A_CP_DCC3] = 1,
+ [SITAR_A_CP_ATEST] = 1,
+ [SITAR_A_CP_DTEST] = 1,
+ [SITAR_A_RX_COM_TIMER_DIV] = 1,
+ [SITAR_A_RX_COM_OCP_CTL] = 1,
+ [SITAR_A_RX_COM_OCP_COUNT] = 1,
+ [SITAR_A_RX_COM_DAC_CTL] = 1,
+ [SITAR_A_RX_COM_BIAS] = 1,
+ [SITAR_A_RX_HPH_BIAS_PA] = 1,
+ [SITAR_A_RX_HPH_BIAS_LDO] = 1,
+ [SITAR_A_RX_HPH_BIAS_CNP] = 1,
+ [SITAR_A_RX_HPH_BIAS_WG] = 1,
+ [SITAR_A_RX_HPH_OCP_CTL] = 1,
+ [SITAR_A_RX_HPH_CNP_EN] = 1,
+ [SITAR_A_RX_HPH_CNP_WG_CTL] = 1,
+ [SITAR_A_RX_HPH_CNP_WG_TIME] = 1,
+ [SITAR_A_RX_HPH_L_GAIN] = 1,
+ [SITAR_A_RX_HPH_L_TEST] = 1,
+ [SITAR_A_RX_HPH_L_PA_CTL] = 1,
+ [SITAR_A_RX_HPH_L_DAC_CTL] = 1,
+ [SITAR_A_RX_HPH_L_ATEST] = 1,
+ [SITAR_A_RX_HPH_L_STATUS] = 1,
+ [SITAR_A_RX_HPH_R_GAIN] = 1,
+ [SITAR_A_RX_HPH_R_TEST] = 1,
+ [SITAR_A_RX_HPH_R_PA_CTL] = 1,
+ [SITAR_A_RX_HPH_R_DAC_CTL] = 1,
+ [SITAR_A_RX_HPH_R_ATEST] = 1,
+ [SITAR_A_RX_HPH_R_STATUS] = 1,
+ [SITAR_A_RX_EAR_BIAS_PA] = 1,
+ [SITAR_A_RX_EAR_BIAS_CMBUFF] = 1,
+ [SITAR_A_RX_EAR_EN] = 1,
+ [SITAR_A_RX_EAR_GAIN] = 1,
+ [SITAR_A_RX_EAR_CMBUFF] = 1,
+ [SITAR_A_RX_EAR_ICTL] = 1,
+ [SITAR_A_RX_EAR_CCOMP] = 1,
+ [SITAR_A_RX_EAR_VCM] = 1,
+ [SITAR_A_RX_EAR_CNP] = 1,
+ [SITAR_A_RX_EAR_ATEST] = 1,
+ [SITAR_A_RX_EAR_STATUS] = 1,
+ [SITAR_A_RX_LINE_BIAS_PA] = 1,
+ [SITAR_A_RX_LINE_BIAS_LDO] = 1,
+ [SITAR_A_RX_LINE_BIAS_CNP1] = 1,
+ [SITAR_A_RX_LINE_COM] = 1,
+ [SITAR_A_RX_LINE_CNP_EN] = 1,
+ [SITAR_A_RX_LINE_CNP_WG_CTL] = 1,
+ [SITAR_A_RX_LINE_CNP_WG_TIME] = 1,
+ [SITAR_A_RX_LINE_1_GAIN] = 1,
+ [SITAR_A_RX_LINE_1_TEST] = 1,
+ [SITAR_A_RX_LINE_1_DAC_CTL] = 1,
+ [SITAR_A_RX_LINE_1_STATUS] = 1,
+ [SITAR_A_RX_LINE_2_GAIN] = 1,
+ [SITAR_A_RX_LINE_2_TEST] = 1,
+ [SITAR_A_RX_LINE_2_DAC_CTL] = 1,
+ [SITAR_A_RX_LINE_2_STATUS] = 1,
+ [SITAR_A_RX_LINE_BIAS_CNP2] = 1,
+ [SITAR_A_RX_LINE_OCP_CTL] = 1,
+ [SITAR_A_RX_LINE_1_PA_CTL] = 1,
+ [SITAR_A_RX_LINE_2_PA_CTL] = 1,
+ [SITAR_A_RX_LINE_CNP_DBG] = 1,
+ [SITAR_A_MBHC_HPH] = 1,
+ [SITAR_A_RC_OSC_FREQ] = 1,
+ [SITAR_A_RC_OSC_TEST] = 1,
+ [SITAR_A_RC_OSC_STATUS] = 1,
+ [SITAR_A_RC_OSC_TUNER] = 1,
+ [SITAR_A_CDC_ANC1_CTL] = 1,
+ [SITAR_A_CDC_ANC1_SHIFT] = 1,
+ [SITAR_A_CDC_ANC1_IIR_B1_CTL] = 1,
+ [SITAR_A_CDC_ANC1_IIR_B2_CTL] = 1,
+ [SITAR_A_CDC_ANC1_IIR_B3_CTL] = 1,
+ [SITAR_A_CDC_ANC1_IIR_B4_CTL] = 1,
+ [SITAR_A_CDC_ANC1_LPF_B1_CTL] = 1,
+ [SITAR_A_CDC_ANC1_LPF_B2_CTL] = 1,
+ [SITAR_A_CDC_ANC1_LPF_B3_CTL] = 1,
+ [SITAR_A_CDC_ANC1_SPARE] = 1,
+ [SITAR_A_CDC_ANC1_SMLPF_CTL] = 1,
+ [SITAR_A_CDC_ANC1_DCFLT_CTL] = 1,
+ [SITAR_A_CDC_TX1_VOL_CTL_TIMER] = 1,
+ [SITAR_A_CDC_TX1_VOL_CTL_GAIN] = 1,
+ [SITAR_A_CDC_TX1_VOL_CTL_CFG] = 1,
+ [SITAR_A_CDC_TX1_MUX_CTL] = 1,
+ [SITAR_A_CDC_TX1_CLK_FS_CTL] = 1,
+ [SITAR_A_CDC_TX1_DMIC_CTL] = 1,
+ [SITAR_A_CDC_SRC1_PDA_CFG] = 1,
+ [SITAR_A_CDC_SRC1_FS_CTL] = 1,
+ [SITAR_A_CDC_RX1_B1_CTL] = 1,
+ [SITAR_A_CDC_RX1_B2_CTL] = 1,
+ [SITAR_A_CDC_RX1_B3_CTL] = 1,
+ [SITAR_A_CDC_RX1_B4_CTL] = 1,
+ [SITAR_A_CDC_RX1_B5_CTL] = 1,
+ [SITAR_A_CDC_RX1_B6_CTL] = 1,
+ [SITAR_A_CDC_RX1_VOL_CTL_B1_CTL] = 1,
+ [SITAR_A_CDC_RX1_VOL_CTL_B2_CTL] = 1,
+ [SITAR_A_CDC_CLK_ANC_RESET_CTL] = 1,
+ [SITAR_A_CDC_CLK_RX_RESET_CTL] = 1,
+ [SITAR_A_CDC_CLK_TX_RESET_B1_CTL] = 1,
+ [SITAR_A_CDC_CLK_TX_RESET_B2_CTL] = 1,
+ [SITAR_A_CDC_CLK_DMIC_CTL] = 1,
+ [SITAR_A_CDC_CLK_RX_I2S_CTL] = 1,
+ [SITAR_A_CDC_CLK_TX_I2S_CTL] = 1,
+ [SITAR_A_CDC_CLK_OTHR_RESET_CTL] = 1,
+ [SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL] = 1,
+ [SITAR_A_CDC_CLK_OTHR_CTL] = 1,
+ [SITAR_A_CDC_CLK_RDAC_CLK_EN_CTL] = 1,
+ [SITAR_A_CDC_CLK_ANC_CLK_EN_CTL] = 1,
+ [SITAR_A_CDC_CLK_RX_B1_CTL] = 1,
+ [SITAR_A_CDC_CLK_RX_B2_CTL] = 1,
+ [SITAR_A_CDC_CLK_MCLK_CTL] = 1,
+ [SITAR_A_CDC_CLK_PDM_CTL] = 1,
+ [SITAR_A_CDC_CLK_SD_CTL] = 1,
+ [SITAR_A_CDC_CLK_LP_CTL] = 1,
+ [SITAR_A_CDC_CLSG_FREQ_THRESH_B1_CTL] = 1,
+ [SITAR_A_CDC_CLSG_FREQ_THRESH_B2_CTL] = 1,
+ [SITAR_A_CDC_CLSG_FREQ_THRESH_B3_CTL] = 1,
+ [SITAR_A_CDC_CLSG_FREQ_THRESH_B4_CTL] = 1,
+ [SITAR_A_CDC_CLSG_GAIN_THRESH_CTL] = 1,
+ [SITAR_A_CDC_CLSG_TIMER_B1_CFG] = 1,
+ [SITAR_A_CDC_CLSG_TIMER_B2_CFG] = 1,
+ [SITAR_A_CDC_CLSG_CTL] = 1,
+ [SITAR_A_CDC_IIR1_GAIN_B1_CTL] = 1,
+ [SITAR_A_CDC_IIR1_GAIN_B2_CTL] = 1,
+ [SITAR_A_CDC_IIR1_GAIN_B3_CTL] = 1,
+ [SITAR_A_CDC_IIR1_GAIN_B4_CTL] = 1,
+ [SITAR_A_CDC_IIR1_GAIN_B5_CTL] = 1,
+ [SITAR_A_CDC_IIR1_GAIN_B6_CTL] = 1,
+ [SITAR_A_CDC_IIR1_GAIN_B7_CTL] = 1,
+ [SITAR_A_CDC_IIR1_GAIN_B8_CTL] = 1,
+ [SITAR_A_CDC_IIR1_CTL] = 1,
+ [SITAR_A_CDC_IIR1_GAIN_TIMER_CTL] = 1,
+ [SITAR_A_CDC_IIR1_COEF_B1_CTL] = 1,
+ [SITAR_A_CDC_IIR1_COEF_B2_CTL] = 1,
+ [SITAR_A_CDC_IIR1_COEF_B3_CTL] = 1,
+ [SITAR_A_CDC_IIR1_COEF_B4_CTL] = 1,
+ [SITAR_A_CDC_IIR1_COEF_B5_CTL] = 1,
+ [SITAR_A_CDC_TOP_GAIN_UPDATE] = 1,
+ [SITAR_A_CDC_TOP_RDAC_DOUT_CTL] = 1,
+ [SITAR_A_CDC_DEBUG_B1_CTL] = 1,
+ [SITAR_A_CDC_DEBUG_B2_CTL] = 1,
+ [SITAR_A_CDC_DEBUG_B3_CTL] = 1,
+ [SITAR_A_CDC_DEBUG_B4_CTL] = 1,
+ [SITAR_A_CDC_DEBUG_B5_CTL] = 1,
+ [SITAR_A_CDC_DEBUG_B6_CTL] = 1,
+ [SITAR_A_CDC_DEBUG_B7_CTL] = 1,
+ [SITAR_A_CDC_COMP1_B1_CTL] = 1,
+ [SITAR_A_CDC_COMP1_B2_CTL] = 1,
+ [SITAR_A_CDC_COMP1_B3_CTL] = 1,
+ [SITAR_A_CDC_COMP1_B4_CTL] = 1,
+ [SITAR_A_CDC_COMP1_B5_CTL] = 1,
+ [SITAR_A_CDC_COMP1_B6_CTL] = 1,
+ [SITAR_A_CDC_COMP1_SHUT_DOWN_STATUS] = 1,
+ [SITAR_A_CDC_COMP1_FS_CFG] = 1,
+ [SITAR_A_CDC_CONN_RX1_B1_CTL] = 1,
+ [SITAR_A_CDC_CONN_RX1_B2_CTL] = 1,
+ [SITAR_A_CDC_CONN_RX1_B3_CTL] = 1,
+ [SITAR_A_CDC_CONN_RX2_B1_CTL] = 1,
+ [SITAR_A_CDC_CONN_RX2_B2_CTL] = 1,
+ [SITAR_A_CDC_CONN_RX2_B3_CTL] = 1,
+ [SITAR_A_CDC_CONN_RX3_B1_CTL] = 1,
+ [SITAR_A_CDC_CONN_RX3_B2_CTL] = 1,
+ [SITAR_A_CDC_CONN_RX3_B3_CTL] = 1,
+ [SITAR_A_CDC_CONN_ANC_B1_CTL] = 1,
+ [SITAR_A_CDC_CONN_ANC_B2_CTL] = 1,
+ [SITAR_A_CDC_CONN_TX_B1_CTL] = 1,
+ [SITAR_A_CDC_CONN_TX_B2_CTL] = 1,
+ [SITAR_A_CDC_CONN_EQ1_B1_CTL] = 1,
+ [SITAR_A_CDC_CONN_EQ1_B2_CTL] = 1,
+ [SITAR_A_CDC_CONN_EQ1_B3_CTL] = 1,
+ [SITAR_A_CDC_CONN_EQ1_B4_CTL] = 1,
+ [SITAR_A_CDC_CONN_EQ2_B1_CTL] = 1,
+ [SITAR_A_CDC_CONN_EQ2_B2_CTL] = 1,
+ [SITAR_A_CDC_CONN_EQ2_B3_CTL] = 1,
+ [SITAR_A_CDC_CONN_EQ2_B4_CTL] = 1,
+ [SITAR_A_CDC_CONN_SRC1_B1_CTL] = 1,
+ [SITAR_A_CDC_CONN_SRC1_B2_CTL] = 1,
+ [SITAR_A_CDC_CONN_SRC2_B1_CTL] = 1,
+ [SITAR_A_CDC_CONN_SRC2_B2_CTL] = 1,
+ [SITAR_A_CDC_CONN_TX_SB_B1_CTL] = 1,
+ [SITAR_A_CDC_CONN_TX_SB_B2_CTL] = 1,
+ [SITAR_A_CDC_CONN_TX_SB_B3_CTL] = 1,
+ [SITAR_A_CDC_CONN_TX_SB_B4_CTL] = 1,
+ [SITAR_A_CDC_CONN_TX_SB_B5_CTL] = 1,
+ [SITAR_A_CDC_CONN_RX_SB_B1_CTL] = 1,
+ [SITAR_A_CDC_CONN_RX_SB_B2_CTL] = 1,
+ [SITAR_A_CDC_CONN_CLSG_CTL] = 1,
+ [SITAR_A_CDC_CONN_SPARE] = 1,
+ [SITAR_A_CDC_MBHC_EN_CTL] = 1,
+ [SITAR_A_CDC_MBHC_FIR_B1_CFG] = 1,
+ [SITAR_A_CDC_MBHC_FIR_B2_CFG] = 1,
+ [SITAR_A_CDC_MBHC_TIMER_B1_CTL] = 1,
+ [SITAR_A_CDC_MBHC_TIMER_B2_CTL] = 1,
+ [SITAR_A_CDC_MBHC_TIMER_B3_CTL] = 1,
+ [SITAR_A_CDC_MBHC_TIMER_B4_CTL] = 1,
+ [SITAR_A_CDC_MBHC_TIMER_B5_CTL] = 1,
+ [SITAR_A_CDC_MBHC_TIMER_B6_CTL] = 1,
+ [SITAR_A_CDC_MBHC_B1_STATUS] = 1,
+ [SITAR_A_CDC_MBHC_B2_STATUS] = 1,
+ [SITAR_A_CDC_MBHC_B3_STATUS] = 1,
+ [SITAR_A_CDC_MBHC_B4_STATUS] = 1,
+ [SITAR_A_CDC_MBHC_B5_STATUS] = 1,
+ [SITAR_A_CDC_MBHC_B1_CTL] = 1,
+ [SITAR_A_CDC_MBHC_B2_CTL] = 1,
+ [SITAR_A_CDC_MBHC_VOLT_B1_CTL] = 1,
+ [SITAR_A_CDC_MBHC_VOLT_B2_CTL] = 1,
+ [SITAR_A_CDC_MBHC_VOLT_B3_CTL] = 1,
+ [SITAR_A_CDC_MBHC_VOLT_B4_CTL] = 1,
+ [SITAR_A_CDC_MBHC_VOLT_B5_CTL] = 1,
+ [SITAR_A_CDC_MBHC_VOLT_B6_CTL] = 1,
+ [SITAR_A_CDC_MBHC_VOLT_B7_CTL] = 1,
+ [SITAR_A_CDC_MBHC_VOLT_B8_CTL] = 1,
+ [SITAR_A_CDC_MBHC_VOLT_B9_CTL] = 1,
+ [SITAR_A_CDC_MBHC_VOLT_B10_CTL] = 1,
+ [SITAR_A_CDC_MBHC_VOLT_B11_CTL] = 1,
+ [SITAR_A_CDC_MBHC_VOLT_B12_CTL] = 1,
+ [SITAR_A_CDC_MBHC_CLK_CTL] = 1,
+ [SITAR_A_CDC_MBHC_INT_CTL] = 1,
+ [SITAR_A_CDC_MBHC_DEBUG_CTL] = 1,
+ [SITAR_A_CDC_MBHC_SPARE] = 1,
+};
diff --git a/sound/soc/codecs/wcd9304.c b/sound/soc/codecs/wcd9304.c
new file mode 100644
index 0000000..65fe16d
--- /dev/null
+++ b/sound/soc/codecs/wcd9304.c
@@ -0,0 +1,3537 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/firmware.h>
+#include <linux/slab.h>
+#include <linux/platform_device.h>
+#include <linux/device.h>
+#include <linux/printk.h>
+#include <linux/ratelimit.h>
+#include <linux/debugfs.h>
+#include <linux/mfd/wcd9xxx/core.h>
+#include <linux/mfd/wcd9xxx/wcd9xxx_registers.h>
+#include <linux/mfd/wcd9xxx/wcd9304_registers.h>
+#include <linux/mfd/wcd9xxx/pdata.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/jack.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <sound/tlv.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
+#include <linux/pm_runtime.h>
+#include "wcd9304.h"
+
+#define WCD9304_RATES (SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|\
+ SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_48000)
+
+#define NUM_DECIMATORS 4
+#define NUM_INTERPOLATORS 3
+#define BITS_PER_REG 8
+#define AIF1_PB 1
+#define AIF1_CAP 2
+#define NUM_CODEC_DAIS 2
+
+struct sitar_codec_dai_data {
+ u32 rate;
+ u32 *ch_num;
+ u32 ch_act;
+ u32 ch_tot;
+};
+#define SITAR_CFILT_FAST_MODE 0x00
+#define SITAR_CFILT_SLOW_MODE 0x40
+
+
+#define SITAR_JACK_MASK (SND_JACK_HEADSET | SND_JACK_OC_HPHL | SND_JACK_OC_HPHR)
+
+#define SITAR_I2S_MASTER_MODE_MASK 0x08
+
+#define SITAR_OCP_ATTEMPT 1
+
+static const DECLARE_TLV_DB_SCALE(digital_gain, 0, 1, 0);
+static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
+static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
+static struct snd_soc_dai_driver sitar_dai[];
+static int sitar_codec_enable_slimtx(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event);
+static int sitar_codec_enable_slimrx(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event);
+
+enum sitar_bandgap_type {
+ SITAR_BANDGAP_OFF = 0,
+ SITAR_BANDGAP_AUDIO_MODE,
+ SITAR_BANDGAP_MBHC_MODE,
+};
+
+struct mbhc_micbias_regs {
+ u16 cfilt_val;
+ u16 cfilt_ctl;
+ u16 mbhc_reg;
+ u16 int_rbias;
+ u16 ctl_reg;
+ u8 cfilt_sel;
+};
+
+/* Codec supports 2 IIR filters */
+enum {
+ IIR1 = 0,
+ IIR2,
+ IIR_MAX,
+};
+/* Codec supports 5 bands */
+enum {
+ BAND1 = 0,
+ BAND2,
+ BAND3,
+ BAND4,
+ BAND5,
+ BAND_MAX,
+};
+
+/* Flags to track of PA and DAC state.
+ * PA and DAC should be tracked separately as AUXPGA loopback requires
+ * only PA to be turned on without DAC being on. */
+enum sitar_priv_ack_flags {
+ SITAR_HPHL_PA_OFF_ACK = 0,
+ SITAR_HPHR_PA_OFF_ACK,
+ SITAR_HPHL_DAC_OFF_ACK,
+ SITAR_HPHR_DAC_OFF_ACK
+};
+
+struct sitar_priv {
+ struct snd_soc_codec *codec;
+ u32 adc_count;
+ u32 cfilt1_cnt;
+ u32 cfilt2_cnt;
+ u32 cfilt3_cnt;
+ u32 rx_bias_count;
+ enum sitar_bandgap_type bandgap_type;
+ bool mclk_enabled;
+ bool clock_active;
+ bool config_mode_active;
+ bool mbhc_polling_active;
+ bool fake_insert_context;
+ int buttons_pressed;
+
+ struct sitar_mbhc_calibration *calibration;
+
+ struct snd_soc_jack *headset_jack;
+ struct snd_soc_jack *button_jack;
+
+ struct wcd9xxx_pdata *pdata;
+ u32 anc_slot;
+
+ bool no_mic_headset_override;
+ /* Delayed work to report long button press */
+ struct delayed_work btn0_dwork;
+
+ struct mbhc_micbias_regs mbhc_bias_regs;
+ u8 cfilt_k_value;
+ bool mbhc_micbias_switched;
+
+ /* track PA/DAC state */
+ unsigned long hph_pa_dac_state;
+
+ /*track sitar interface type*/
+ u8 intf_type;
+
+ u32 hph_status; /* track headhpone status */
+ /* define separate work for left and right headphone OCP to avoid
+ * additional checking on which OCP event to report so no locking
+ * to ensure synchronization is required
+ */
+ struct work_struct hphlocp_work; /* reporting left hph ocp off */
+ struct work_struct hphrocp_work; /* reporting right hph ocp off */
+
+ /* pm_cnt holds number of sleep lock holders + 1
+ * so if pm_cnt is 1 system is sleep-able. */
+ atomic_t pm_cnt;
+ wait_queue_head_t pm_wq;
+
+ u8 hphlocp_cnt; /* headphone left ocp retry */
+ u8 hphrocp_cnt; /* headphone right ocp retry */
+ /* num of slim ports required */
+ struct sitar_codec_dai_data dai[NUM_CODEC_DAIS];
+};
+
+#ifdef CONFIG_DEBUG_FS
+struct sitar_priv *debug_sitar_priv;
+#endif
+
+
+static int sitar_pa_gain_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ u8 ear_pa_gain;
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+
+ ear_pa_gain = snd_soc_read(codec, SITAR_A_RX_EAR_GAIN);
+
+ ear_pa_gain = ear_pa_gain >> 5;
+
+ if (ear_pa_gain == 0x00) {
+ ucontrol->value.integer.value[0] = 0;
+ } else if (ear_pa_gain == 0x04) {
+ ucontrol->value.integer.value[0] = 1;
+ } else {
+ pr_err("%s: ERROR: Unsupported Ear Gain = 0x%x\n",
+ __func__, ear_pa_gain);
+ return -EINVAL;
+ }
+
+ pr_err("%s: ear_pa_gain = 0x%x\n", __func__, ear_pa_gain);
+
+ return 0;
+}
+
+static int sitar_pa_gain_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ u8 ear_pa_gain;
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+
+ pr_debug("%s: ucontrol->value.integer.value[0] = %ld\n", __func__,
+ ucontrol->value.integer.value[0]);
+
+ switch (ucontrol->value.integer.value[0]) {
+ case 0:
+ ear_pa_gain = 0x00;
+ break;
+ case 1:
+ ear_pa_gain = 0x80;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ snd_soc_write(codec, SITAR_A_RX_EAR_GAIN, ear_pa_gain);
+ return 0;
+}
+
+static int sitar_get_iir_enable_audio_mixer(
+ struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ int iir_idx = ((struct soc_multi_mixer_control *)
+ kcontrol->private_value)->reg;
+ int band_idx = ((struct soc_multi_mixer_control *)
+ kcontrol->private_value)->shift;
+
+ ucontrol->value.integer.value[0] =
+ snd_soc_read(codec, (SITAR_A_CDC_IIR1_CTL + 16 * iir_idx)) &
+ (1 << band_idx);
+
+ pr_err("%s: IIR #%d band #%d enable %d\n", __func__,
+ iir_idx, band_idx,
+ (uint32_t)ucontrol->value.integer.value[0]);
+ return 0;
+}
+
+static int sitar_put_iir_enable_audio_mixer(
+ struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ int iir_idx = ((struct soc_multi_mixer_control *)
+ kcontrol->private_value)->reg;
+ int band_idx = ((struct soc_multi_mixer_control *)
+ kcontrol->private_value)->shift;
+ int value = ucontrol->value.integer.value[0];
+
+ /* Mask first 5 bits, 6-8 are reserved */
+ snd_soc_update_bits(codec, (SITAR_A_CDC_IIR1_CTL + 16 * iir_idx),
+ (1 << band_idx), (value << band_idx));
+
+ pr_err("%s: IIR #%d band #%d enable %d\n", __func__,
+ iir_idx, band_idx, value);
+ return 0;
+}
+static uint32_t get_iir_band_coeff(struct snd_soc_codec *codec,
+ int iir_idx, int band_idx,
+ int coeff_idx)
+{
+ /* Address does not automatically update if reading */
+ snd_soc_update_bits(codec,
+ (SITAR_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
+ 0x1F, band_idx * BAND_MAX + coeff_idx);
+
+ /* Mask bits top 2 bits since they are reserved */
+ return ((snd_soc_read(codec,
+ (SITAR_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx)) << 24) |
+ (snd_soc_read(codec,
+ (SITAR_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx)) << 16) |
+ (snd_soc_read(codec,
+ (SITAR_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx)) << 8) |
+ (snd_soc_read(codec,
+ (SITAR_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx)))) &
+ 0x3FFFFFFF;
+}
+
+static int sitar_get_iir_band_audio_mixer(
+ struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ int iir_idx = ((struct soc_multi_mixer_control *)
+ kcontrol->private_value)->reg;
+ int band_idx = ((struct soc_multi_mixer_control *)
+ kcontrol->private_value)->shift;
+
+ ucontrol->value.integer.value[0] =
+ get_iir_band_coeff(codec, iir_idx, band_idx, 0);
+ ucontrol->value.integer.value[1] =
+ get_iir_band_coeff(codec, iir_idx, band_idx, 1);
+ ucontrol->value.integer.value[2] =
+ get_iir_band_coeff(codec, iir_idx, band_idx, 2);
+ ucontrol->value.integer.value[3] =
+ get_iir_band_coeff(codec, iir_idx, band_idx, 3);
+ ucontrol->value.integer.value[4] =
+ get_iir_band_coeff(codec, iir_idx, band_idx, 4);
+
+ pr_err("%s: IIR #%d band #%d b0 = 0x%x\n"
+ "%s: IIR #%d band #%d b1 = 0x%x\n"
+ "%s: IIR #%d band #%d b2 = 0x%x\n"
+ "%s: IIR #%d band #%d a1 = 0x%x\n"
+ "%s: IIR #%d band #%d a2 = 0x%x\n",
+ __func__, iir_idx, band_idx,
+ (uint32_t)ucontrol->value.integer.value[0],
+ __func__, iir_idx, band_idx,
+ (uint32_t)ucontrol->value.integer.value[1],
+ __func__, iir_idx, band_idx,
+ (uint32_t)ucontrol->value.integer.value[2],
+ __func__, iir_idx, band_idx,
+ (uint32_t)ucontrol->value.integer.value[3],
+ __func__, iir_idx, band_idx,
+ (uint32_t)ucontrol->value.integer.value[4]);
+ return 0;
+}
+
+static void set_iir_band_coeff(struct snd_soc_codec *codec,
+ int iir_idx, int band_idx,
+ int coeff_idx, uint32_t value)
+{
+ /* Mask top 3 bits, 6-8 are reserved */
+ /* Update address manually each time */
+ snd_soc_update_bits(codec,
+ (SITAR_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
+ 0x1F, band_idx * BAND_MAX + coeff_idx);
+
+ /* Mask top 2 bits, 7-8 are reserved */
+ snd_soc_update_bits(codec,
+ (SITAR_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx),
+ 0x3F, (value >> 24) & 0x3F);
+
+ /* Isolate 8bits at a time */
+ snd_soc_update_bits(codec,
+ (SITAR_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx),
+ 0xFF, (value >> 16) & 0xFF);
+
+ snd_soc_update_bits(codec,
+ (SITAR_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx),
+ 0xFF, (value >> 8) & 0xFF);
+
+ snd_soc_update_bits(codec,
+ (SITAR_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx),
+ 0xFF, value & 0xFF);
+}
+
+static int sitar_put_iir_band_audio_mixer(
+ struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ int iir_idx = ((struct soc_multi_mixer_control *)
+ kcontrol->private_value)->reg;
+ int band_idx = ((struct soc_multi_mixer_control *)
+ kcontrol->private_value)->shift;
+
+ set_iir_band_coeff(codec, iir_idx, band_idx, 0,
+ ucontrol->value.integer.value[0]);
+ set_iir_band_coeff(codec, iir_idx, band_idx, 1,
+ ucontrol->value.integer.value[1]);
+ set_iir_band_coeff(codec, iir_idx, band_idx, 2,
+ ucontrol->value.integer.value[2]);
+ set_iir_band_coeff(codec, iir_idx, band_idx, 3,
+ ucontrol->value.integer.value[3]);
+ set_iir_band_coeff(codec, iir_idx, band_idx, 4,
+ ucontrol->value.integer.value[4]);
+
+ pr_err("%s: IIR #%d band #%d b0 = 0x%x\n"
+ "%s: IIR #%d band #%d b1 = 0x%x\n"
+ "%s: IIR #%d band #%d b2 = 0x%x\n"
+ "%s: IIR #%d band #%d a1 = 0x%x\n"
+ "%s: IIR #%d band #%d a2 = 0x%x\n",
+ __func__, iir_idx, band_idx,
+ get_iir_band_coeff(codec, iir_idx, band_idx, 0),
+ __func__, iir_idx, band_idx,
+ get_iir_band_coeff(codec, iir_idx, band_idx, 1),
+ __func__, iir_idx, band_idx,
+ get_iir_band_coeff(codec, iir_idx, band_idx, 2),
+ __func__, iir_idx, band_idx,
+ get_iir_band_coeff(codec, iir_idx, band_idx, 3),
+ __func__, iir_idx, band_idx,
+ get_iir_band_coeff(codec, iir_idx, band_idx, 4));
+ return 0;
+}
+
+static const char *sitar_ear_pa_gain_text[] = {"POS_6_DB", "POS_2_DB"};
+static const struct soc_enum sitar_ear_pa_gain_enum[] = {
+ SOC_ENUM_SINGLE_EXT(2, sitar_ear_pa_gain_text),
+};
+
+/*cut of frequency for high pass filter*/
+static const char *cf_text[] = {
+ "MIN_3DB_4Hz", "MIN_3DB_75Hz", "MIN_3DB_150Hz"
+};
+
+static const struct soc_enum cf_dec1_enum =
+ SOC_ENUM_SINGLE(SITAR_A_CDC_TX1_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_rxmix1_enum =
+ SOC_ENUM_SINGLE(SITAR_A_CDC_RX1_B4_CTL, 1, 3, cf_text);
+
+static const struct snd_kcontrol_new sitar_snd_controls[] = {
+
+ SOC_ENUM_EXT("EAR PA Gain", sitar_ear_pa_gain_enum[0],
+ sitar_pa_gain_get, sitar_pa_gain_put),
+
+ SOC_SINGLE_TLV("LINEOUT1 Volume", SITAR_A_RX_LINE_1_GAIN, 0, 12, 1,
+ line_gain),
+ SOC_SINGLE_TLV("LINEOUT2 Volume", SITAR_A_RX_LINE_2_GAIN, 0, 12, 1,
+ line_gain),
+
+ SOC_SINGLE_TLV("HPHL Volume", SITAR_A_RX_HPH_L_GAIN, 0, 12, 1,
+ line_gain),
+ SOC_SINGLE_TLV("HPHR Volume", SITAR_A_RX_HPH_R_GAIN, 0, 12, 1,
+ line_gain),
+
+ SOC_SINGLE_S8_TLV("RX1 Digital Volume", SITAR_A_CDC_RX1_VOL_CTL_B2_CTL,
+ -84, 40, digital_gain),
+
+ SOC_SINGLE_S8_TLV("DEC1 Volume", SITAR_A_CDC_TX1_VOL_CTL_GAIN, -84, 40,
+ digital_gain),
+ SOC_SINGLE_S8_TLV("IIR1 INP1 Volume", SITAR_A_CDC_IIR1_GAIN_B1_CTL, -84,
+ 40, digital_gain),
+ SOC_SINGLE_S8_TLV("IIR1 INP2 Volume", SITAR_A_CDC_IIR1_GAIN_B2_CTL, -84,
+ 40, digital_gain),
+ SOC_SINGLE_S8_TLV("IIR1 INP3 Volume", SITAR_A_CDC_IIR1_GAIN_B3_CTL, -84,
+ 40, digital_gain),
+ SOC_SINGLE_S8_TLV("IIR1 INP4 Volume", SITAR_A_CDC_IIR1_GAIN_B4_CTL, -84,
+ 40, digital_gain),
+ SOC_SINGLE_TLV("ADC1 Volume", SITAR_A_TX_1_2_EN, 5, 3, 0, analog_gain),
+ SOC_SINGLE_TLV("ADC2 Volume", SITAR_A_TX_1_2_EN, 1, 3, 0, analog_gain),
+
+ SOC_SINGLE("MICBIAS1 CAPLESS Switch", SITAR_A_MICB_1_CTL, 4, 1, 1),
+ SOC_SINGLE("MICBIAS2 CAPLESS Switch", SITAR_A_MICB_2_CTL, 4, 1, 1),
+
+ SOC_ENUM("TX1 HPF cut off", cf_dec1_enum),
+
+ SOC_SINGLE("TX1 HPF Switch", SITAR_A_CDC_TX1_MUX_CTL, 3, 1, 0),
+
+ SOC_SINGLE("RX1 HPF Switch", SITAR_A_CDC_RX1_B5_CTL, 2, 1, 0),
+
+ SOC_ENUM("RX1 HPF cut off", cf_rxmix1_enum),
+
+ SOC_SINGLE_EXT("IIR1 Enable Band1", IIR1, BAND1, 1, 0,
+ sitar_get_iir_enable_audio_mixer, sitar_put_iir_enable_audio_mixer),
+ SOC_SINGLE_EXT("IIR1 Enable Band2", IIR1, BAND2, 1, 0,
+ sitar_get_iir_enable_audio_mixer, sitar_put_iir_enable_audio_mixer),
+ SOC_SINGLE_EXT("IIR1 Enable Band3", IIR1, BAND3, 1, 0,
+ sitar_get_iir_enable_audio_mixer, sitar_put_iir_enable_audio_mixer),
+ SOC_SINGLE_EXT("IIR1 Enable Band4", IIR1, BAND4, 1, 0,
+ sitar_get_iir_enable_audio_mixer, sitar_put_iir_enable_audio_mixer),
+ SOC_SINGLE_EXT("IIR1 Enable Band5", IIR1, BAND5, 1, 0,
+ sitar_get_iir_enable_audio_mixer, sitar_put_iir_enable_audio_mixer),
+ SOC_SINGLE_EXT("IIR2 Enable Band1", IIR2, BAND1, 1, 0,
+ sitar_get_iir_enable_audio_mixer, sitar_put_iir_enable_audio_mixer),
+ SOC_SINGLE_EXT("IIR2 Enable Band2", IIR2, BAND2, 1, 0,
+ sitar_get_iir_enable_audio_mixer, sitar_put_iir_enable_audio_mixer),
+ SOC_SINGLE_EXT("IIR2 Enable Band3", IIR2, BAND3, 1, 0,
+ sitar_get_iir_enable_audio_mixer, sitar_put_iir_enable_audio_mixer),
+ SOC_SINGLE_EXT("IIR2 Enable Band4", IIR2, BAND4, 1, 0,
+ sitar_get_iir_enable_audio_mixer, sitar_put_iir_enable_audio_mixer),
+ SOC_SINGLE_EXT("IIR2 Enable Band5", IIR2, BAND5, 1, 0,
+ sitar_get_iir_enable_audio_mixer, sitar_put_iir_enable_audio_mixer),
+
+ SOC_SINGLE_MULTI_EXT("IIR1 Band1", IIR1, BAND1, 255, 0, 5,
+ sitar_get_iir_band_audio_mixer, sitar_put_iir_band_audio_mixer),
+ SOC_SINGLE_MULTI_EXT("IIR1 Band2", IIR1, BAND2, 255, 0, 5,
+ sitar_get_iir_band_audio_mixer, sitar_put_iir_band_audio_mixer),
+ SOC_SINGLE_MULTI_EXT("IIR1 Band3", IIR1, BAND3, 255, 0, 5,
+ sitar_get_iir_band_audio_mixer, sitar_put_iir_band_audio_mixer),
+ SOC_SINGLE_MULTI_EXT("IIR1 Band4", IIR1, BAND4, 255, 0, 5,
+ sitar_get_iir_band_audio_mixer, sitar_put_iir_band_audio_mixer),
+ SOC_SINGLE_MULTI_EXT("IIR1 Band5", IIR1, BAND5, 255, 0, 5,
+ sitar_get_iir_band_audio_mixer, sitar_put_iir_band_audio_mixer),
+ SOC_SINGLE_MULTI_EXT("IIR2 Band1", IIR2, BAND1, 255, 0, 5,
+ sitar_get_iir_band_audio_mixer, sitar_put_iir_band_audio_mixer),
+ SOC_SINGLE_MULTI_EXT("IIR2 Band2", IIR2, BAND2, 255, 0, 5,
+ sitar_get_iir_band_audio_mixer, sitar_put_iir_band_audio_mixer),
+ SOC_SINGLE_MULTI_EXT("IIR2 Band3", IIR2, BAND3, 255, 0, 5,
+ sitar_get_iir_band_audio_mixer, sitar_put_iir_band_audio_mixer),
+ SOC_SINGLE_MULTI_EXT("IIR2 Band4", IIR2, BAND4, 255, 0, 5,
+ sitar_get_iir_band_audio_mixer, sitar_put_iir_band_audio_mixer),
+ SOC_SINGLE_MULTI_EXT("IIR2 Band5", IIR2, BAND5, 255, 0, 5,
+ sitar_get_iir_band_audio_mixer, sitar_put_iir_band_audio_mixer),
+};
+
+static const char *rx_mix1_text[] = {
+ "ZERO", "SRC1", "SRC2", "IIR1", "IIR2", "RX1", "RX2", "RX3", "RX4",
+ "RX5"
+};
+
+static const char *rx_dac1_text[] = {
+ "ZERO", "RX1", "RX2"
+};
+
+static const char *rx_dac2_text[] = {
+ "ZERO", "RX1",
+};
+
+static const char *rx_dac3_text[] = {
+ "ZERO", "RX1", "RX1_INV", "RX2"
+};
+
+static const char *rx_dac4_text[] = {
+ "ZERO", "ON"
+};
+
+static const char *sb_tx1_mux_text[] = {
+ "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
+ "DEC1"
+};
+
+static const char *sb_tx2_mux_text[] = {
+ "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
+ "DEC2"
+};
+
+static const char *sb_tx3_mux_text[] = {
+ "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
+ "DEC3"
+};
+
+static const char *sb_tx5_mux_text[] = {
+ "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
+ "DEC5"
+};
+
+static const char *dec1_mux_text[] = {
+ "ZERO", "DMIC1", "ADC1", "ADC2", "ADC3", "MBADC", "DMIC4", "ANCFB1",
+};
+
+static const char *dec2_mux_text[] = {
+ "ZERO", "DMIC2", "ADC1", "ADC2", "ADC3", "MBADC", "DMIC3", "ANCFB2",
+};
+
+static const char *dec3_mux_text[] = {
+ "ZERO", "DMIC2", "DMIC3", "DMIC4", "ADC1", "ADC2", "ADC3", "MBADC",
+};
+
+static const char *dec4_mux_text[] = {
+ "ZERO", "DMIC1", "DMIC2", "DMIC3", "DMIC4", "ADC1", "ADC2", "ADC3",
+};
+
+static const char *iir1_inp1_text[] = {
+ "ZERO", "DEC1", "DEC2", "DEC3", "DEC4", "ZERO", "ZERO", "ZERO",
+ "ZERO", "ZERO", "ZERO", "RX1", "RX2", "RX3", "RX4", "RX5",
+};
+
+static const struct soc_enum rx_mix1_inp1_chain_enum =
+ SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_RX1_B1_CTL, 0, 10, rx_mix1_text);
+
+static const struct soc_enum rx_mix1_inp2_chain_enum =
+ SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_RX1_B1_CTL, 4, 10, rx_mix1_text);
+
+static const struct soc_enum rx2_mix1_inp1_chain_enum =
+ SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_RX2_B1_CTL, 0, 10, rx_mix1_text);
+
+static const struct soc_enum rx2_mix1_inp2_chain_enum =
+ SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_RX2_B1_CTL, 4, 10, rx_mix1_text);
+
+static const struct soc_enum rx3_mix1_inp1_chain_enum =
+ SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_RX3_B1_CTL, 0, 10, rx_mix1_text);
+
+static const struct soc_enum rx3_mix1_inp2_chain_enum =
+ SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_RX3_B1_CTL, 4, 10, rx_mix1_text);
+
+static const struct soc_enum rx_dac1_enum =
+ SOC_ENUM_SINGLE(SITAR_A_CDC_TOP_RDAC_DOUT_CTL, 6, 3, rx_dac1_text);
+
+static const struct soc_enum rx_dac2_enum =
+ SOC_ENUM_SINGLE(SITAR_A_CDC_TOP_RDAC_DOUT_CTL, 4, 2, rx_dac2_text);
+
+static const struct soc_enum rx_dac3_enum =
+ SOC_ENUM_SINGLE(SITAR_A_CDC_TOP_RDAC_DOUT_CTL, 2, 4, rx_dac3_text);
+
+static const struct soc_enum rx_dac4_enum =
+ SOC_ENUM_SINGLE(SITAR_A_CDC_TOP_RDAC_DOUT_CTL, 0, 2, rx_dac4_text);
+
+static const struct soc_enum sb_tx5_mux_enum =
+ SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_TX_SB_B5_CTL, 0, 9, sb_tx5_mux_text);
+
+static const struct soc_enum sb_tx3_mux_enum =
+ SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_TX_SB_B3_CTL, 0, 9, sb_tx3_mux_text);
+
+static const struct soc_enum sb_tx2_mux_enum =
+ SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_TX_SB_B2_CTL, 0, 9, sb_tx2_mux_text);
+
+static const struct soc_enum sb_tx1_mux_enum =
+ SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_TX_SB_B1_CTL, 0, 9, sb_tx1_mux_text);
+
+static const struct soc_enum dec1_mux_enum =
+ SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_TX_B1_CTL, 0, 8, dec1_mux_text);
+
+static const struct soc_enum dec2_mux_enum =
+ SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_TX_B1_CTL, 2, 8, dec2_mux_text);
+
+static const struct soc_enum dec3_mux_enum =
+ SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_TX_B1_CTL, 4, 8, dec3_mux_text);
+
+static const struct soc_enum dec4_mux_enum =
+ SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_TX_B1_CTL, 6, 8, dec4_mux_text);
+
+static const struct soc_enum iir1_inp1_mux_enum =
+ SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_EQ1_B1_CTL, 0, 16, iir1_inp1_text);
+
+static const struct snd_kcontrol_new rx_mix1_inp1_mux =
+ SOC_DAPM_ENUM("RX1 MIX1 INP1 Mux", rx_mix1_inp1_chain_enum);
+
+static const struct snd_kcontrol_new rx_mix1_inp2_mux =
+ SOC_DAPM_ENUM("RX1 MIX1 INP2 Mux", rx_mix1_inp2_chain_enum);
+
+static const struct snd_kcontrol_new rx2_mix1_inp1_mux =
+ SOC_DAPM_ENUM("RX2 MIX1 INP1 Mux", rx2_mix1_inp1_chain_enum);
+
+static const struct snd_kcontrol_new rx2_mix1_inp2_mux =
+ SOC_DAPM_ENUM("RX2 MIX1 INP2 Mux", rx2_mix1_inp2_chain_enum);
+
+static const struct snd_kcontrol_new rx3_mix1_inp1_mux =
+ SOC_DAPM_ENUM("RX3 MIX1 INP1 Mux", rx3_mix1_inp1_chain_enum);
+
+static const struct snd_kcontrol_new rx3_mix1_inp2_mux =
+ SOC_DAPM_ENUM("RX3 MIX1 INP2 Mux", rx3_mix1_inp2_chain_enum);
+
+static const struct snd_kcontrol_new rx_dac1_mux =
+ SOC_DAPM_ENUM("RX1 DAC Mux", rx_dac1_enum);
+
+static const struct snd_kcontrol_new rx_dac2_mux =
+ SOC_DAPM_ENUM("RX2 DAC Mux", rx_dac2_enum);
+
+static const struct snd_kcontrol_new rx_dac3_mux =
+ SOC_DAPM_ENUM("RX3 DAC Mux", rx_dac3_enum);
+
+static const struct snd_kcontrol_new rx_dac4_mux =
+ SOC_DAPM_ENUM("RX4 DAC Mux", rx_dac4_enum);
+
+static const struct snd_kcontrol_new sb_tx5_mux =
+ SOC_DAPM_ENUM("SLIM TX5 MUX Mux", sb_tx5_mux_enum);
+
+static const struct snd_kcontrol_new sb_tx3_mux =
+ SOC_DAPM_ENUM("SLIM TX3 MUX Mux", sb_tx3_mux_enum);
+
+static const struct snd_kcontrol_new sb_tx2_mux =
+ SOC_DAPM_ENUM("SLIM TX2 MUX Mux", sb_tx2_mux_enum);
+
+static const struct snd_kcontrol_new sb_tx1_mux =
+ SOC_DAPM_ENUM("SLIM TX1 MUX Mux", sb_tx1_mux_enum);
+
+static const struct snd_kcontrol_new dec1_mux =
+ SOC_DAPM_ENUM("DEC1 MUX Mux", dec1_mux_enum);
+
+static const struct snd_kcontrol_new dec2_mux =
+ SOC_DAPM_ENUM("DEC2 MUX Mux", dec2_mux_enum);
+
+static const struct snd_kcontrol_new dec3_mux =
+ SOC_DAPM_ENUM("DEC3 MUX Mux", dec3_mux_enum);
+
+static const struct snd_kcontrol_new dec4_mux =
+ SOC_DAPM_ENUM("DEC4 MUX Mux", dec4_mux_enum);
+
+static const struct snd_kcontrol_new iir1_inp1_mux =
+ SOC_DAPM_ENUM("IIR1 INP1 Mux", iir1_inp1_mux_enum);
+
+static const struct snd_kcontrol_new dac1_switch[] = {
+ SOC_DAPM_SINGLE("Switch", SITAR_A_RX_EAR_EN, 5, 1, 0),
+};
+
+static const struct snd_kcontrol_new hphl_switch[] = {
+ SOC_DAPM_SINGLE("Switch", SITAR_A_RX_HPH_L_DAC_CTL, 6, 1, 0)
+};
+
+static void sitar_codec_enable_adc_block(struct snd_soc_codec *codec,
+ int enable)
+{
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
+
+ pr_err("%s %d\n", __func__, enable);
+
+ if (enable) {
+ sitar->adc_count++;
+ snd_soc_update_bits(codec, SITAR_A_TX_COM_BIAS, 0xE0, 0xE0);
+
+ } else {
+ sitar->adc_count--;
+ if (!sitar->adc_count) {
+ if (!sitar->mbhc_polling_active)
+ snd_soc_update_bits(codec, SITAR_A_TX_COM_BIAS,
+ 0xE0, 0x0);
+ }
+ }
+}
+
+static int sitar_codec_enable_adc(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+ u16 adc_reg;
+
+ pr_err("%s %d\n", __func__, event);
+
+ if (w->reg == SITAR_A_TX_1_2_EN)
+ adc_reg = SITAR_A_TX_1_2_TEST_CTL;
+ else {
+ pr_err("%s: Error, invalid adc register\n", __func__);
+ return -EINVAL;
+ }
+
+ switch (event) {
+ case SND_SOC_DAPM_PRE_PMU:
+ sitar_codec_enable_adc_block(codec, 1);
+ break;
+ case SND_SOC_DAPM_POST_PMU:
+ snd_soc_update_bits(codec, adc_reg, 1 << w->shift,
+ 1 << w->shift);
+ usleep_range(1000, 1000);
+ snd_soc_update_bits(codec, adc_reg, 1 << w->shift, 0x00);
+ usleep_range(1000, 1000);
+ snd_soc_update_bits(codec, adc_reg, 0x08, 0x08);
+ break;
+ case SND_SOC_DAPM_POST_PMD:
+ sitar_codec_enable_adc_block(codec, 0);
+ break;
+ }
+ return 0;
+}
+
+static int sitar_codec_enable_lineout(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+ u16 lineout_gain_reg;
+
+ pr_err("%s %d %s\n", __func__, event, w->name);
+
+ switch (w->shift) {
+ case 0:
+ lineout_gain_reg = SITAR_A_RX_LINE_1_GAIN;
+ break;
+ case 1:
+ lineout_gain_reg = SITAR_A_RX_LINE_2_GAIN;
+ break;
+ default:
+ pr_err("%s: Error, incorrect lineout register value\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ switch (event) {
+ case SND_SOC_DAPM_PRE_PMU:
+ snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x40);
+ break;
+ case SND_SOC_DAPM_POST_PMU:
+ pr_err("%s: sleeping 16 ms after %s PA turn on\n",
+ __func__, w->name);
+ usleep_range(16000, 16000);
+ break;
+ case SND_SOC_DAPM_POST_PMD:
+ snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x00);
+ break;
+ }
+ return 0;
+}
+
+static int sitar_codec_enable_dmic(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+ u16 tx_mux_ctl_reg, tx_dmic_ctl_reg;
+ u8 dmic_clk_sel, dmic_clk_en;
+ unsigned int dmic;
+ int ret;
+
+ ret = kstrtouint(strpbrk(w->name, "12"), 10, &dmic);
+ if (ret < 0) {
+ pr_err("%s: Invalid DMIC line on the codec\n", __func__);
+ return -EINVAL;
+ }
+
+ switch (dmic) {
+ case 1:
+ case 2:
+ dmic_clk_sel = 0x02;
+ dmic_clk_en = 0x01;
+ break;
+ case 3:
+ case 4:
+ dmic_clk_sel = 0x08;
+ dmic_clk_en = 0x04;
+ break;
+
+ break;
+
+ default:
+ pr_err("%s: Invalid DMIC Selection\n", __func__);
+ return -EINVAL;
+ }
+
+ tx_mux_ctl_reg = SITAR_A_CDC_TX1_MUX_CTL + 8 * (dmic - 1);
+ tx_dmic_ctl_reg = SITAR_A_CDC_TX1_DMIC_CTL + 8 * (dmic - 1);
+
+ pr_err("%s %d\n", __func__, event);
+
+ switch (event) {
+ case SND_SOC_DAPM_PRE_PMU:
+ snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x1, 0x1);
+
+ snd_soc_update_bits(codec, SITAR_A_CDC_CLK_DMIC_CTL,
+ dmic_clk_sel, dmic_clk_sel);
+
+ snd_soc_update_bits(codec, tx_dmic_ctl_reg, 0x1, 0x1);
+
+ snd_soc_update_bits(codec, SITAR_A_CDC_CLK_DMIC_CTL,
+ dmic_clk_en, dmic_clk_en);
+ break;
+ case SND_SOC_DAPM_POST_PMD:
+ snd_soc_update_bits(codec, SITAR_A_CDC_CLK_DMIC_CTL,
+ dmic_clk_en, 0);
+ break;
+ }
+ return 0;
+}
+
+
+static void sitar_codec_disable_button_presses(struct snd_soc_codec *codec)
+{
+ snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B4_CTL, 0x80);
+ snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B3_CTL, 0x00);
+}
+
+static void sitar_codec_start_hs_polling(struct snd_soc_codec *codec)
+{
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
+
+ snd_soc_write(codec, SITAR_A_MBHC_SCALING_MUX_1, 0x84);
+ wcd9xxx_enable_irq(codec->control_data, SITAR_IRQ_MBHC_REMOVAL);
+ if (!sitar->no_mic_headset_override) {
+ wcd9xxx_enable_irq(codec->control_data,
+ SITAR_IRQ_MBHC_POTENTIAL);
+ wcd9xxx_enable_irq(codec->control_data,
+ SITAR_IRQ_MBHC_RELEASE);
+ } else {
+ sitar_codec_disable_button_presses(codec);
+ }
+}
+
+static void sitar_codec_pause_hs_polling(struct snd_soc_codec *codec)
+{
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
+
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
+ wcd9xxx_disable_irq(codec->control_data, SITAR_IRQ_MBHC_REMOVAL);
+ if (!sitar->no_mic_headset_override) {
+ wcd9xxx_disable_irq(codec->control_data,
+ SITAR_IRQ_MBHC_POTENTIAL);
+ wcd9xxx_disable_irq(codec->control_data,
+ SITAR_IRQ_MBHC_RELEASE);
+ }
+}
+
+static void sitar_codec_switch_cfilt_mode(struct snd_soc_codec *codec,
+ int mode)
+{
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
+ u8 reg_mode_val, cur_mode_val;
+ bool mbhc_was_polling = false;
+
+ if (mode)
+ reg_mode_val = SITAR_CFILT_FAST_MODE;
+ else
+ reg_mode_val = SITAR_CFILT_SLOW_MODE;
+
+ cur_mode_val = snd_soc_read(codec,
+ sitar->mbhc_bias_regs.cfilt_ctl) & 0x40;
+
+ if (cur_mode_val != reg_mode_val) {
+ if (sitar->mbhc_polling_active) {
+ sitar_codec_pause_hs_polling(codec);
+ mbhc_was_polling = true;
+ }
+ snd_soc_update_bits(codec,
+ sitar->mbhc_bias_regs.cfilt_ctl, 0x40, reg_mode_val);
+ if (mbhc_was_polling)
+ sitar_codec_start_hs_polling(codec);
+ pr_err("%s: CFILT mode change (%x to %x)\n", __func__,
+ cur_mode_val, reg_mode_val);
+ } else {
+ pr_err("%s: CFILT Value is already %x\n",
+ __func__, cur_mode_val);
+ }
+}
+
+static void sitar_codec_update_cfilt_usage(struct snd_soc_codec *codec,
+ u8 cfilt_sel, int inc)
+{
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
+ u32 *cfilt_cnt_ptr = NULL;
+ u16 micb_cfilt_reg;
+
+ switch (cfilt_sel) {
+ case SITAR_CFILT1_SEL:
+ cfilt_cnt_ptr = &sitar->cfilt1_cnt;
+ micb_cfilt_reg = SITAR_A_MICB_CFILT_1_CTL;
+ break;
+ case SITAR_CFILT2_SEL:
+ cfilt_cnt_ptr = &sitar->cfilt2_cnt;
+ micb_cfilt_reg = SITAR_A_MICB_CFILT_2_CTL;
+ break;
+ default:
+ return; /* should not happen */
+ }
+
+ if (inc) {
+ if (!(*cfilt_cnt_ptr)++) {
+ /* Switch CFILT to slow mode if MBHC CFILT being used */
+ if (cfilt_sel == sitar->mbhc_bias_regs.cfilt_sel)
+ sitar_codec_switch_cfilt_mode(codec, 0);
+
+ snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0x80);
+ }
+ } else {
+ /* check if count not zero, decrement
+ * then check if zero, go ahead disable cfilter
+ */
+ if ((*cfilt_cnt_ptr) && !--(*cfilt_cnt_ptr)) {
+ snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0);
+
+ /* Switch CFILT to fast mode if MBHC CFILT being used */
+ if (cfilt_sel == sitar->mbhc_bias_regs.cfilt_sel)
+ sitar_codec_switch_cfilt_mode(codec, 1);
+ }
+ }
+}
+
+static int sitar_find_k_value(unsigned int ldoh_v, unsigned int cfilt_mv)
+{
+ int rc = -EINVAL;
+ unsigned min_mv, max_mv;
+
+ switch (ldoh_v) {
+ case SITAR_LDOH_1P95_V:
+ min_mv = 160;
+ max_mv = 1800;
+ break;
+ case SITAR_LDOH_2P35_V:
+ min_mv = 200;
+ max_mv = 2200;
+ break;
+ case SITAR_LDOH_2P75_V:
+ min_mv = 240;
+ max_mv = 2600;
+ break;
+ case SITAR_LDOH_2P85_V:
+ min_mv = 250;
+ max_mv = 2700;
+ break;
+ default:
+ goto done;
+ }
+
+ if (cfilt_mv < min_mv || cfilt_mv > max_mv)
+ goto done;
+
+ for (rc = 4; rc <= 44; rc++) {
+ min_mv = max_mv * (rc) / 44;
+ if (min_mv >= cfilt_mv) {
+ rc -= 4;
+ break;
+ }
+ }
+done:
+ return rc;
+}
+
+static bool sitar_is_hph_pa_on(struct snd_soc_codec *codec)
+{
+ u8 hph_reg_val = 0;
+ hph_reg_val = snd_soc_read(codec, SITAR_A_RX_HPH_CNP_EN);
+
+ return (hph_reg_val & 0x30) ? true : false;
+}
+
+static bool sitar_is_hph_dac_on(struct snd_soc_codec *codec, int left)
+{
+ u8 hph_reg_val = 0;
+ if (left)
+ hph_reg_val = snd_soc_read(codec,
+ SITAR_A_RX_HPH_L_DAC_CTL);
+ else
+ hph_reg_val = snd_soc_read(codec,
+ SITAR_A_RX_HPH_R_DAC_CTL);
+
+ return (hph_reg_val & 0xC0) ? true : false;
+}
+
+static void sitar_codec_switch_micbias(struct snd_soc_codec *codec,
+ int vddio_switch)
+{
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
+ int cfilt_k_val;
+ bool mbhc_was_polling = false;
+
+ switch (vddio_switch) {
+ case 1:
+ if (sitar->mbhc_polling_active) {
+
+ sitar_codec_pause_hs_polling(codec);
+ /* Enable Mic Bias switch to VDDIO */
+ sitar->cfilt_k_value = snd_soc_read(codec,
+ sitar->mbhc_bias_regs.cfilt_val);
+ cfilt_k_val = sitar_find_k_value(
+ sitar->pdata->micbias.ldoh_v, 1800);
+ snd_soc_update_bits(codec,
+ sitar->mbhc_bias_regs.cfilt_val,
+ 0xFC, (cfilt_k_val << 2));
+
+ snd_soc_update_bits(codec,
+ sitar->mbhc_bias_regs.mbhc_reg, 0x80, 0x80);
+ snd_soc_update_bits(codec,
+ sitar->mbhc_bias_regs.mbhc_reg, 0x10, 0x00);
+ sitar_codec_start_hs_polling(codec);
+
+ sitar->mbhc_micbias_switched = true;
+ pr_err("%s: Enabled MBHC Mic bias to VDDIO Switch\n",
+ __func__);
+ }
+ break;
+
+ case 0:
+ if (sitar->mbhc_micbias_switched) {
+ if (sitar->mbhc_polling_active) {
+ sitar_codec_pause_hs_polling(codec);
+ mbhc_was_polling = true;
+ }
+ /* Disable Mic Bias switch to VDDIO */
+ if (sitar->cfilt_k_value != 0)
+ snd_soc_update_bits(codec,
+ sitar->mbhc_bias_regs.cfilt_val, 0XFC,
+ sitar->cfilt_k_value);
+ snd_soc_update_bits(codec,
+ sitar->mbhc_bias_regs.mbhc_reg, 0x80, 0x00);
+ snd_soc_update_bits(codec,
+ sitar->mbhc_bias_regs.mbhc_reg, 0x10, 0x00);
+
+ if (mbhc_was_polling)
+ sitar_codec_start_hs_polling(codec);
+
+ sitar->mbhc_micbias_switched = false;
+ pr_err("%s: Disabled MBHC Mic bias to VDDIO Switch\n",
+ __func__);
+ }
+ break;
+ }
+}
+
+static int sitar_codec_enable_micbias(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
+ u16 micb_int_reg;
+ int micb_line;
+ u8 cfilt_sel_val = 0;
+ char *internal1_text = "Internal1";
+ char *internal2_text = "Internal2";
+
+ pr_err("%s %d\n", __func__, event);
+ switch (w->reg) {
+ case SITAR_A_MICB_1_CTL:
+ micb_int_reg = SITAR_A_MICB_1_INT_RBIAS;
+ cfilt_sel_val = sitar->pdata->micbias.bias1_cfilt_sel;
+ micb_line = SITAR_MICBIAS1;
+ break;
+ case SITAR_A_MICB_2_CTL:
+ micb_int_reg = SITAR_A_MICB_2_INT_RBIAS;
+ cfilt_sel_val = sitar->pdata->micbias.bias2_cfilt_sel;
+ micb_line = SITAR_MICBIAS2;
+ break;
+ default:
+ pr_err("%s: Error, invalid micbias register\n", __func__);
+ return -EINVAL;
+ }
+
+ switch (event) {
+ case SND_SOC_DAPM_PRE_PMU:
+ /* Decide whether to switch the micbias for MBHC */
+ if ((w->reg == sitar->mbhc_bias_regs.ctl_reg)
+ && sitar->mbhc_micbias_switched)
+ sitar_codec_switch_micbias(codec, 0);
+
+ snd_soc_update_bits(codec, w->reg, 0x1E, 0x0A);
+ sitar_codec_update_cfilt_usage(codec, cfilt_sel_val, 1);
+
+ if (strnstr(w->name, internal1_text, 30))
+ snd_soc_update_bits(codec, micb_int_reg, 0xFF, 0xA4);
+ else if (strnstr(w->name, internal2_text, 30))
+ snd_soc_update_bits(codec, micb_int_reg, 0x1C, 0x1C);
+ break;
+ case SND_SOC_DAPM_POST_PMU:
+ if (sitar->mbhc_polling_active &&
+ (sitar->calibration->bias == micb_line)) {
+ sitar_codec_pause_hs_polling(codec);
+ sitar_codec_start_hs_polling(codec);
+ }
+ break;
+ case SND_SOC_DAPM_POST_PMD:
+
+ if ((w->reg == sitar->mbhc_bias_regs.ctl_reg)
+ && sitar_is_hph_pa_on(codec))
+ sitar_codec_switch_micbias(codec, 1);
+
+ if (strnstr(w->name, internal1_text, 30))
+ snd_soc_update_bits(codec, micb_int_reg, 0x80, 0x00);
+ else if (strnstr(w->name, internal2_text, 30))
+ snd_soc_update_bits(codec, micb_int_reg, 0x10, 0x00);
+ sitar_codec_update_cfilt_usage(codec, cfilt_sel_val, 0);
+ break;
+ }
+
+ return 0;
+}
+
+static int sitar_codec_enable_dec(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+ u16 dec_reset_reg;
+
+ pr_err("%s %d\n", __func__, event);
+
+ if (w->reg == SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL)
+ dec_reset_reg = SITAR_A_CDC_CLK_TX_RESET_B1_CTL;
+ else {
+ pr_err("%s: Error, incorrect dec\n", __func__);
+ return -EINVAL;
+ }
+
+ switch (event) {
+ case SND_SOC_DAPM_PRE_PMU:
+ snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift,
+ 1 << w->shift);
+ snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift, 0x0);
+ break;
+ }
+ return 0;
+}
+
+static int sitar_codec_reset_interpolator(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+
+ pr_err("%s %d %s\n", __func__, event, w->name);
+
+ switch (event) {
+ case SND_SOC_DAPM_PRE_PMU:
+ snd_soc_update_bits(codec, SITAR_A_CDC_CLK_RX_RESET_CTL,
+ 1 << w->shift, 1 << w->shift);
+ snd_soc_update_bits(codec, SITAR_A_CDC_CLK_RX_RESET_CTL,
+ 1 << w->shift, 0x0);
+ break;
+ }
+ return 0;
+}
+
+static int sitar_codec_enable_ldo_h(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ switch (event) {
+ case SND_SOC_DAPM_POST_PMU:
+ case SND_SOC_DAPM_POST_PMD:
+ usleep_range(1000, 1000);
+ pr_debug("LDO_H\n");
+ break;
+ }
+ return 0;
+}
+
+static void sitar_enable_rx_bias(struct snd_soc_codec *codec, u32 enable)
+{
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
+
+ if (enable) {
+ sitar->rx_bias_count++;
+ if (sitar->rx_bias_count == 1)
+ snd_soc_update_bits(codec, SITAR_A_RX_COM_BIAS,
+ 0x80, 0x80);
+ } else {
+ sitar->rx_bias_count--;
+ if (!sitar->rx_bias_count)
+ snd_soc_update_bits(codec, SITAR_A_RX_COM_BIAS,
+ 0x80, 0x00);
+ }
+}
+
+static int sitar_codec_enable_rx_bias(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+
+ pr_err("%s %d\n", __func__, event);
+
+ switch (event) {
+ case SND_SOC_DAPM_PRE_PMU:
+ sitar_enable_rx_bias(codec, 1);
+ break;
+ case SND_SOC_DAPM_POST_PMD:
+ sitar_enable_rx_bias(codec, 0);
+ break;
+ }
+ return 0;
+}
+static int sitar_hphr_dac_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+
+ pr_err("%s %s %d\n", __func__, w->name, event);
+
+ switch (event) {
+ case SND_SOC_DAPM_PRE_PMU:
+ snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
+ break;
+ case SND_SOC_DAPM_POST_PMD:
+ snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
+ break;
+ }
+ return 0;
+}
+
+static void sitar_snd_soc_jack_report(struct sitar_priv *sitar,
+ struct snd_soc_jack *jack, int status,
+ int mask)
+{
+ /* XXX: wake_lock_timeout()? */
+ snd_soc_jack_report(jack, status, mask);
+}
+
+static void hphocp_off_report(struct sitar_priv *sitar,
+ u32 jack_status, int irq)
+{
+ struct snd_soc_codec *codec;
+
+ if (sitar) {
+ pr_info("%s: clear ocp status %x\n", __func__, jack_status);
+ codec = sitar->codec;
+ sitar->hph_status &= ~jack_status;
+ if (sitar->headset_jack)
+ sitar_snd_soc_jack_report(sitar, sitar->headset_jack,
+ sitar->hph_status,
+ SITAR_JACK_MASK);
+ snd_soc_update_bits(codec, SITAR_A_RX_HPH_OCP_CTL, 0x10,
+ 0x00);
+ snd_soc_update_bits(codec, SITAR_A_RX_HPH_OCP_CTL, 0x10,
+ 0x10);
+ /* reset retry counter as PA is turned off signifying
+ * start of new OCP detection session
+ */
+ if (SITAR_IRQ_HPH_PA_OCPL_FAULT)
+ sitar->hphlocp_cnt = 0;
+ else
+ sitar->hphrocp_cnt = 0;
+ wcd9xxx_enable_irq(codec->control_data, irq);
+ } else {
+ pr_err("%s: Bad sitar private data\n", __func__);
+ }
+}
+
+static void hphlocp_off_report(struct work_struct *work)
+{
+ struct sitar_priv *sitar = container_of(work, struct sitar_priv,
+ hphlocp_work);
+ hphocp_off_report(sitar, SND_JACK_OC_HPHL, SITAR_IRQ_HPH_PA_OCPL_FAULT);
+}
+
+static void hphrocp_off_report(struct work_struct *work)
+{
+ struct sitar_priv *sitar = container_of(work, struct sitar_priv,
+ hphrocp_work);
+ hphocp_off_report(sitar, SND_JACK_OC_HPHR, SITAR_IRQ_HPH_PA_OCPR_FAULT);
+}
+
+static int sitar_hph_pa_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
+ u8 mbhc_micb_ctl_val;
+ pr_err("%s: event = %d\n", __func__, event);
+
+ switch (event) {
+ case SND_SOC_DAPM_PRE_PMU:
+ mbhc_micb_ctl_val = snd_soc_read(codec,
+ sitar->mbhc_bias_regs.ctl_reg);
+
+ if (!(mbhc_micb_ctl_val & 0x80)
+ && !sitar->mbhc_micbias_switched)
+ sitar_codec_switch_micbias(codec, 1);
+
+ break;
+
+ case SND_SOC_DAPM_POST_PMD:
+ /* schedule work is required because at the time HPH PA DAPM
+ * event callback is called by DAPM framework, CODEC dapm mutex
+ * would have been locked while snd_soc_jack_report also
+ * attempts to acquire same lock.
+ */
+ if (w->shift == 5) {
+ clear_bit(SITAR_HPHL_PA_OFF_ACK,
+ &sitar->hph_pa_dac_state);
+ clear_bit(SITAR_HPHL_DAC_OFF_ACK,
+ &sitar->hph_pa_dac_state);
+ if (sitar->hph_status & SND_JACK_OC_HPHL)
+ schedule_work(&sitar->hphlocp_work);
+ } else if (w->shift == 4) {
+ clear_bit(SITAR_HPHR_PA_OFF_ACK,
+ &sitar->hph_pa_dac_state);
+ clear_bit(SITAR_HPHR_DAC_OFF_ACK,
+ &sitar->hph_pa_dac_state);
+ if (sitar->hph_status & SND_JACK_OC_HPHR)
+ schedule_work(&sitar->hphrocp_work);
+ }
+
+ if (sitar->mbhc_micbias_switched)
+ sitar_codec_switch_micbias(codec, 0);
+
+ pr_err("%s: sleep 10 ms after %s PA disable.\n", __func__,
+ w->name);
+ usleep_range(10000, 10000);
+
+ break;
+ }
+ return 0;
+}
+
+static void sitar_get_mbhc_micbias_regs(struct snd_soc_codec *codec,
+ struct mbhc_micbias_regs *micbias_regs)
+{
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
+ struct sitar_mbhc_calibration *calibration = sitar->calibration;
+ unsigned int cfilt;
+
+ switch (calibration->bias) {
+ case SITAR_MICBIAS1:
+ cfilt = sitar->pdata->micbias.bias1_cfilt_sel;
+ micbias_regs->mbhc_reg = SITAR_A_MICB_1_MBHC;
+ micbias_regs->int_rbias = SITAR_A_MICB_1_INT_RBIAS;
+ micbias_regs->ctl_reg = SITAR_A_MICB_1_CTL;
+ break;
+ case SITAR_MICBIAS2:
+ cfilt = sitar->pdata->micbias.bias2_cfilt_sel;
+ micbias_regs->mbhc_reg = SITAR_A_MICB_2_MBHC;
+ micbias_regs->int_rbias = SITAR_A_MICB_2_INT_RBIAS;
+ micbias_regs->ctl_reg = SITAR_A_MICB_2_CTL;
+ break;
+ default:
+ /* Should never reach here */
+ pr_err("%s: Invalid MIC BIAS for MBHC\n", __func__);
+ return;
+ }
+
+ micbias_regs->cfilt_sel = cfilt;
+
+ switch (cfilt) {
+ case SITAR_CFILT1_SEL:
+ micbias_regs->cfilt_val = SITAR_A_MICB_CFILT_1_VAL;
+ micbias_regs->cfilt_ctl = SITAR_A_MICB_CFILT_1_CTL;
+ break;
+ case SITAR_CFILT2_SEL:
+ micbias_regs->cfilt_val = SITAR_A_MICB_CFILT_2_VAL;
+ micbias_regs->cfilt_ctl = SITAR_A_MICB_CFILT_2_CTL;
+ break;
+ }
+}
+
+static int sitar_codec_enable_charge_pump(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+
+ pr_err("%s %d\n", __func__, event);
+ switch (event) {
+ case SND_SOC_DAPM_POST_PMU:
+ snd_soc_update_bits(codec, SITAR_A_CDC_CLK_OTHR_CTL, 0x01,
+ 0x01);
+ snd_soc_update_bits(codec, SITAR_A_CDC_CLSG_CTL, 0x08, 0x08);
+ usleep_range(200, 200);
+ snd_soc_update_bits(codec, SITAR_A_CP_STATIC, 0x10, 0x00);
+ break;
+ case SND_SOC_DAPM_PRE_PMD:
+ snd_soc_update_bits(codec, SITAR_A_CDC_CLK_OTHR_RESET_CTL, 0x10,
+ 0x10);
+ usleep_range(20, 20);
+ snd_soc_update_bits(codec, SITAR_A_CP_STATIC, 0x08, 0x08);
+ snd_soc_update_bits(codec, SITAR_A_CP_STATIC, 0x10, 0x10);
+ snd_soc_update_bits(codec, SITAR_A_CDC_CLSG_CTL, 0x08, 0x00);
+ snd_soc_update_bits(codec, SITAR_A_CDC_CLK_OTHR_CTL, 0x01,
+ 0x00);
+ snd_soc_update_bits(codec, SITAR_A_CP_STATIC, 0x08, 0x00);
+ break;
+ }
+ return 0;
+}
+
+static const struct snd_soc_dapm_widget sitar_dapm_i2s_widgets[] = {
+ SND_SOC_DAPM_SUPPLY("RX_I2S_CLK", SITAR_A_CDC_CLK_RX_I2S_CTL,
+ 4, 0, NULL, 0),
+ SND_SOC_DAPM_SUPPLY("TX_I2S_CLK", SITAR_A_CDC_CLK_TX_I2S_CTL, 4,
+ 0, NULL, 0),
+};
+
+static const struct snd_soc_dapm_widget sitar_dapm_widgets[] = {
+ /*RX stuff */
+ SND_SOC_DAPM_OUTPUT("EAR"),
+
+ SND_SOC_DAPM_PGA("EAR PA", SITAR_A_RX_EAR_EN, 4, 0, NULL, 0),
+ SND_SOC_DAPM_MIXER("DAC1", SITAR_A_RX_EAR_EN, 6, 0, dac1_switch,
+ ARRAY_SIZE(dac1_switch)),
+ SND_SOC_DAPM_SUPPLY("EAR DRIVER", SITAR_A_RX_EAR_EN, 3, 0, NULL, 0),
+ SND_SOC_DAPM_AIF_IN_E("SLIM RX1", "AIF1 Playback", 0, SND_SOC_NOPM, 0,
+ 0, sitar_codec_enable_slimrx,
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_AIF_IN_E("SLIM RX2", "AIF1 Playback", 0, SND_SOC_NOPM, 0,
+ 0, sitar_codec_enable_slimrx,
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_AIF_IN("SLIM RX3", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("SLIM RX4", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("SLIM RX5", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
+
+ /* Headphone */
+ SND_SOC_DAPM_OUTPUT("HEADPHONE"),
+ SND_SOC_DAPM_PGA_E("HPHL", SITAR_A_RX_HPH_CNP_EN, 5, 0, NULL, 0,
+ sitar_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_MIXER("HPHL DAC", SITAR_A_RX_HPH_L_DAC_CTL, 7, 0,
+ hphl_switch, ARRAY_SIZE(hphl_switch)),
+
+ SND_SOC_DAPM_PGA_E("HPHR", SITAR_A_RX_HPH_CNP_EN, 4, 0, NULL, 0,
+ sitar_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMD),
+
+ SND_SOC_DAPM_DAC_E("HPHR DAC", NULL, SITAR_A_RX_HPH_R_DAC_CTL, 7, 0,
+ sitar_hphr_dac_event,
+ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
+
+ /* Speaker */
+ SND_SOC_DAPM_OUTPUT("LINEOUT1"),
+ SND_SOC_DAPM_OUTPUT("LINEOUT2"),
+
+ SND_SOC_DAPM_PGA_E("LINEOUT1 PA", SITAR_A_RX_LINE_CNP_EN, 0, 0, NULL,
+ 0, sitar_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_PGA_E("LINEOUT2 PA", SITAR_A_RX_LINE_CNP_EN, 1, 0, NULL,
+ 0, sitar_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+
+ SND_SOC_DAPM_MIXER_E("RX1 MIX1", SITAR_A_CDC_CLK_RX_B1_CTL, 0, 0, NULL,
+ 0, sitar_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
+ SND_SOC_DAPM_MIXER_E("RX2 MIX1", SITAR_A_CDC_CLK_RX_B1_CTL, 1, 0, NULL,
+ 0, sitar_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
+ SND_SOC_DAPM_MIXER_E("RX3 MIX1", SITAR_A_CDC_CLK_RX_B1_CTL, 2, 0, NULL,
+ 0, sitar_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
+
+ SND_SOC_DAPM_MUX("DAC1 MUX", SND_SOC_NOPM, 0, 0,
+ &rx_dac1_mux),
+ SND_SOC_DAPM_MUX("DAC2 MUX", SND_SOC_NOPM, 0, 0,
+ &rx_dac2_mux),
+ SND_SOC_DAPM_MUX("DAC3 MUX", SND_SOC_NOPM, 0, 0,
+ &rx_dac3_mux),
+ SND_SOC_DAPM_MUX("DAC4 MUX", SND_SOC_NOPM, 0, 0,
+ &rx_dac4_mux),
+
+ SND_SOC_DAPM_MIXER("RX1 CHAIN", SITAR_A_CDC_RX1_B6_CTL, 5, 0, NULL, 0),
+ SND_SOC_DAPM_MIXER("RX2 CHAIN", SITAR_A_CDC_RX2_B6_CTL, 5, 0, NULL, 0),
+ SND_SOC_DAPM_MIXER("RX3 CHAIN", SITAR_A_CDC_RX3_B6_CTL, 5, 0, NULL, 0),
+
+ SND_SOC_DAPM_MUX("RX1 MIX1 INP1", SND_SOC_NOPM, 0, 0,
+ &rx_mix1_inp1_mux),
+ SND_SOC_DAPM_MUX("RX1 MIX1 INP2", SND_SOC_NOPM, 0, 0,
+ &rx_mix1_inp2_mux),
+ SND_SOC_DAPM_MUX("RX2 MIX1 INP1", SND_SOC_NOPM, 0, 0,
+ &rx2_mix1_inp1_mux),
+ SND_SOC_DAPM_MUX("RX2 MIX1 INP2", SND_SOC_NOPM, 0, 0,
+ &rx2_mix1_inp2_mux),
+ SND_SOC_DAPM_MUX("RX3 MIX1 INP1", SND_SOC_NOPM, 0, 0,
+ &rx3_mix1_inp1_mux),
+ SND_SOC_DAPM_MUX("RX3 MIX1 INP2", SND_SOC_NOPM, 0, 0,
+ &rx3_mix1_inp2_mux),
+
+ SND_SOC_DAPM_SUPPLY("CP", SITAR_A_CP_EN, 0, 0,
+ sitar_codec_enable_charge_pump, SND_SOC_DAPM_POST_PMU |
+ SND_SOC_DAPM_PRE_PMD),
+ SND_SOC_DAPM_SUPPLY("RX_BIAS", SND_SOC_NOPM, 0, 0,
+ sitar_codec_enable_rx_bias, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMD),
+
+ SND_SOC_DAPM_SUPPLY("LDO_H", SITAR_A_LDO_H_MODE_1, 7, 0,
+ sitar_codec_enable_ldo_h, SND_SOC_DAPM_POST_PMU),
+ /* TX */
+ SND_SOC_DAPM_SUPPLY("CDC_CONN", SITAR_A_CDC_CLK_OTHR_CTL, 2, 0, NULL,
+ 0),
+ SND_SOC_DAPM_INPUT("AMIC1"),
+ SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 External", SITAR_A_MICB_1_CTL, 7, 0,
+ sitar_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal1", SITAR_A_MICB_1_CTL, 7, 0,
+ sitar_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+
+ SND_SOC_DAPM_INPUT("AMIC2"),
+ SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 External", SITAR_A_MICB_2_CTL, 7, 0,
+ sitar_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal1", SITAR_A_MICB_2_CTL, 7, 0,
+ sitar_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal2", SITAR_A_MICB_2_CTL, 7, 0,
+ sitar_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+
+ SND_SOC_DAPM_ADC_E("ADC1", NULL, SITAR_A_TX_1_2_EN, 7, 0,
+ sitar_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_ADC_E("ADC2", NULL, SITAR_A_TX_1_2_EN, 3, 0,
+ sitar_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+
+ SND_SOC_DAPM_MUX_E("DEC1 MUX", SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL, 0, 0,
+ &dec1_mux, sitar_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
+
+ SND_SOC_DAPM_MUX("SLIM TX1 MUX", SND_SOC_NOPM, 0, 0, &sb_tx1_mux),
+ SND_SOC_DAPM_MUX("SLIM TX2 MUX", SND_SOC_NOPM, 0, 0, &sb_tx2_mux),
+ SND_SOC_DAPM_MUX("SLIM TX3 MUX", SND_SOC_NOPM, 0, 0, &sb_tx3_mux),
+
+ SND_SOC_DAPM_AIF_OUT_E("SLIM TX1", "AIF1 Capture", 0, SND_SOC_NOPM, 0,
+ 0, sitar_codec_enable_slimtx,
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+
+ SND_SOC_DAPM_AIF_OUT_E("SLIM TX2", "AIF1 Capture", 0, SND_SOC_NOPM, 0,
+ 0, sitar_codec_enable_slimtx,
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+
+ SND_SOC_DAPM_AIF_OUT_E("SLIM TX3", "AIF1 Capture", 0, SND_SOC_NOPM, 0,
+ 0, sitar_codec_enable_slimtx,
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_MUX_E("DEC2 MUX", SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL, 1, 0,
+ &dec2_mux, sitar_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
+ SND_SOC_DAPM_MUX_E("DEC3 MUX", SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL, 2, 0,
+ &dec3_mux, sitar_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
+ SND_SOC_DAPM_MUX_E("DEC4 MUX", SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL, 3, 0,
+ &dec4_mux, sitar_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
+
+ /* Digital Mic Inputs */
+ SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
+ sitar_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 0, 0,
+ sitar_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMD),
+
+ SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 0, 0,
+ sitar_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMD),
+
+ SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 0, 0,
+ sitar_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMD),
+
+ /* Sidetone */
+ SND_SOC_DAPM_MUX("IIR1 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir1_inp1_mux),
+ SND_SOC_DAPM_PGA("IIR1", SITAR_A_CDC_CLK_SD_CTL, 0, 0, NULL, 0),
+
+};
+
+static const struct snd_soc_dapm_route audio_map[] = {
+ /* Earpiece (RX MIX1) */
+ {"EAR", NULL, "EAR PA"},
+ {"EAR PA", "NULL", "DAC1"},
+ {"DAC1", "Switch", "DAC1 MUX"},
+ {"DAC1", NULL, "CP"},
+ {"DAC1", NULL, "EAR DRIVER"},
+
+ {"LINEOUT1", NULL, "CP"},
+ {"LINEOUT2", NULL, "CP"},
+
+ {"LINEOUT2", NULL, "LINEOUT2 PA"},
+ {"LINEOUT2 PA", "NULL", "DAC3 MUX"},
+
+ {"LINEOUT1", NULL, "LINEOUT1 PA"},
+ {"LINEOUT1 PA", "NULL", "DAC2 MUX"},
+
+ /* Headset (RX MIX1 and RX MIX2) */
+ {"HEADPHONE", NULL, "HPHL"},
+ {"HEADPHONE", NULL, "HPHR"},
+
+ {"HPHL", NULL, "HPHL DAC"},
+ {"HPHL DAC", NULL, "DAC4 MUX"},
+ {"HPHR", NULL, "HPHR DAC"},
+ {"HPHL DAC", NULL, "RX3 MIX1"},
+
+ {"DAC1 MUX", "RX1", "RX1 CHAIN"},
+ {"DAC2 MUX", "RX1", "RX1 CHAIN"},
+ {"DAC3 MUX", "RX1", "RX1 CHAIN"},
+ {"DAC3 MUX", "RX1_INV", "RX1 CHAIN"},
+ {"DAC3 MUX", "RX2", "RX2 MIX1"},
+ {"DAC4 MUX", "ON", "RX2 MIX1"},
+
+ {"RX1 CHAIN", NULL, "RX1 MIX1"},
+
+ {"CP", NULL, "RX_BIAS"},
+
+ {"RX1 MIX1", NULL, "RX1 MIX1 INP1"},
+ {"RX1 MIX1", NULL, "RX1 MIX1 INP2"},
+ {"RX2 MIX1", NULL, "RX2 MIX1 INP1"},
+ {"RX2 MIX1", NULL, "RX2 MIX1 INP2"},
+ {"RX3 MIX1", NULL, "RX3 MIX1 INP1"},
+ {"RX3 MIX1", NULL, "RX3 MIX1 INP2"},
+
+ /* SLIMBUS Connections */
+
+ /* Slimbus port 5 is non functional in Sitar 1.0 */
+ {"RX1 MIX1 INP1", "RX1", "SLIM RX1"},
+ {"RX1 MIX1 INP1", "RX2", "SLIM RX2"},
+ {"RX1 MIX1 INP1", "RX3", "SLIM RX3"},
+ {"RX1 MIX1 INP1", "RX4", "SLIM RX4"},
+ {"RX1 MIX1 INP1", "IIR1", "IIR1"},
+ {"RX1 MIX1 INP2", "RX1", "SLIM RX1"},
+ {"RX1 MIX1 INP2", "RX2", "SLIM RX2"},
+ {"RX1 MIX1 INP2", "RX3", "SLIM RX3"},
+ {"RX1 MIX1 INP2", "RX4", "SLIM RX4"},
+ {"RX1 MIX1 INP2", "IIR1", "IIR1"},
+ {"RX2 MIX1 INP1", "RX1", "SLIM RX1"},
+ {"RX2 MIX1 INP1", "RX2", "SLIM RX2"},
+ {"RX2 MIX1 INP1", "RX3", "SLIM RX3"},
+ {"RX2 MIX1 INP1", "RX4", "SLIM RX4"},
+ {"RX2 MIX1 INP1", "IIR1", "IIR1"},
+ {"RX2 MIX1 INP2", "RX1", "SLIM RX1"},
+ {"RX2 MIX1 INP2", "RX2", "SLIM RX2"},
+ {"RX2 MIX1 INP2", "RX3", "SLIM RX3"},
+ {"RX2 MIX1 INP2", "RX4", "SLIM RX4"},
+ {"RX2 MIX1 INP2", "IIR1", "IIR1"},
+ {"RX3 MIX1 INP1", "RX1", "SLIM RX1"},
+ {"RX3 MIX1 INP1", "RX2", "SLIM RX2"},
+ {"RX3 MIX1 INP1", "RX3", "SLIM RX3"},
+ {"RX3 MIX1 INP1", "RX4", "SLIM RX4"},
+ {"RX3 MIX1 INP1", "IIR1", "IIR1"},
+ {"RX3 MIX1 INP2", "RX1", "SLIM RX1"},
+ {"RX3 MIX1 INP2", "RX2", "SLIM RX2"},
+ {"RX3 MIX1 INP2", "RX3", "SLIM RX3"},
+ {"RX3 MIX1 INP2", "RX4", "SLIM RX4"},
+ {"RX3 MIX1 INP2", "IIR1", "IIR1"},
+
+
+ /* TX */
+ {"SLIM TX1", NULL, "SLIM TX1 MUX"},
+ {"MIC BIAS2 Internal1", NULL, "DEC1 MUX"},
+
+ {"SLIM TX2", NULL, "SLIM TX2 MUX"},
+ {"MIC BIAS2 Internal1", NULL, "DEC1 MUX"},
+
+ {"SLIM TX1", NULL, "SLIM TX1 MUX"},
+ {"SLIM TX2", NULL, "SLIM TX2 MUX"},
+ {"SLIM TX3", NULL, "SLIM TX3 MUX"},
+
+ {"SLIM TX1 MUX", "DEC1", "DEC1 MUX"},
+ {"SLIM TX2 MUX", "DEC2", "DEC2 MUX"},
+ {"SLIM TX3 MUX", "DEC3", "DEC3 MUX"},
+
+ /* Decimator Inputs */
+ {"DEC1 MUX", "DMIC1", "DMIC1"},
+ {"DEC1 MUX", "DMIC4", "DMIC4"},
+ {"DEC1 MUX", "ADC1", "ADC1"},
+ {"DEC1 MUX", "ADC2", "ADC2"},
+
+ {"DEC2 MUX", "DMIC2", "DMIC2"},
+ {"DEC2 MUX", "DMIC3", "DMIC3"},
+ {"DEC2 MUX", "ADC1", "ADC1"},
+ {"DEC2 MUX", "ADC2", "ADC2"},
+
+ {"DEC3 MUX", "DMIC3", "DMIC3"},
+ {"DEC3 MUX", "ADC1", "ADC1"},
+ {"DEC3 MUX", "ADC2", "ADC2"},
+ {"DEC3 MUX", "DMIC2", "DMIC2"},
+ {"DEC3 MUX", "DMIC3", "DMIC4"},
+
+ {"DEC4 MUX", "DMIC4", "DMIC4"},
+ {"DEC4 MUX", "ADC1", "ADC1"},
+ {"DEC4 MUX", "ADC2", "ADC2"},
+ {"DEC4 MUX", "DMIC3", "DMIC3"},
+ {"DEC4 MUX", "DMIC2", "DMIC2"},
+ {"DEC4 MUX", "DMIC1", "DMIC1"},
+
+ /* ADC Connections */
+ {"ADC1", NULL, "AMIC1"},
+ {"ADC2", NULL, "AMIC2"},
+
+ /* IIR */
+ {"IIR1", NULL, "IIR1 INP1 MUX"},
+ {"IIR1 INP1 MUX", "DEC1", "DEC1 MUX"},
+ {"MIC BIAS1 Internal1", NULL, "LDO_H"},
+ {"MIC BIAS1 External", NULL, "LDO_H"},
+ {"MIC BIAS2 Internal1", NULL, "LDO_H"},
+ {"MIC BIAS2 External", NULL, "LDO_H"},
+};
+
+static int sitar_readable(struct snd_soc_codec *ssc, unsigned int reg)
+{
+ return sitar_reg_readable[reg];
+}
+
+static int sitar_volatile(struct snd_soc_codec *ssc, unsigned int reg)
+{
+ /* Registers lower than 0x100 are top level registers which can be
+ * written by the Sitar core driver.
+ */
+
+ if ((reg >= SITAR_A_CDC_MBHC_EN_CTL) || (reg < 0x100))
+ return 1;
+
+ /* IIR Coeff registers are not cacheable */
+ if ((reg >= SITAR_A_CDC_IIR1_COEF_B1_CTL) &&
+ (reg <= SITAR_A_CDC_IIR1_COEF_B5_CTL))
+ return 1;
+
+ return 0;
+}
+
+#define SITAR_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)
+static int sitar_write(struct snd_soc_codec *codec, unsigned int reg,
+ unsigned int value)
+{
+ int ret;
+
+ BUG_ON(reg > SITAR_MAX_REGISTER);
+
+ if (!sitar_volatile(codec, reg)) {
+ ret = snd_soc_cache_write(codec, reg, value);
+ if (ret != 0)
+ dev_err(codec->dev, "Cache write to %x failed: %d\n",
+ reg, ret);
+ }
+
+ return wcd9xxx_reg_write(codec->control_data, reg, value);
+}
+static unsigned int sitar_read(struct snd_soc_codec *codec,
+ unsigned int reg)
+{
+ unsigned int val;
+ int ret;
+
+ BUG_ON(reg > SITAR_MAX_REGISTER);
+
+ if (!sitar_volatile(codec, reg) && sitar_readable(codec, reg) &&
+ reg < codec->driver->reg_cache_size) {
+ ret = snd_soc_cache_read(codec, reg, &val);
+ if (ret >= 0) {
+ return val;
+ } else
+ dev_err(codec->dev, "Cache read from %x failed: %d\n",
+ reg, ret);
+ }
+
+ val = wcd9xxx_reg_read(codec->control_data, reg);
+ return val;
+}
+
+static void sitar_codec_enable_audio_mode_bandgap(struct snd_soc_codec *codec)
+{
+
+ snd_soc_update_bits(codec, SITAR_A_LDO_H_MODE_1, 0x0C, 0x61);
+ snd_soc_update_bits(codec, SITAR_A_LDO_H_MODE_1, 0x80, 0x80);
+ usleep_range(1000, 1000);
+ snd_soc_write(codec, SITAR_A_BIAS_REF_CTL, 0x1C);
+ snd_soc_update_bits(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x80,
+ 0x80);
+ snd_soc_update_bits(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x04,
+ 0x04);
+ snd_soc_update_bits(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x01,
+ 0x01);
+ usleep_range(1000, 1000);
+ snd_soc_update_bits(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x80,
+ 0x00);
+}
+
+static void sitar_codec_enable_bandgap(struct snd_soc_codec *codec,
+ enum sitar_bandgap_type choice)
+{
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
+
+ /* TODO lock resources accessed by audio streams and threaded
+ * interrupt handlers
+ */
+
+ pr_err("%s, choice is %d, current is %d\n", __func__, choice,
+ sitar->bandgap_type);
+
+ if (sitar->bandgap_type == choice)
+ return;
+
+ if ((sitar->bandgap_type == SITAR_BANDGAP_OFF) &&
+ (choice == SITAR_BANDGAP_AUDIO_MODE)) {
+ sitar_codec_enable_audio_mode_bandgap(codec);
+ } else if (choice == SITAR_BANDGAP_MBHC_MODE) {
+ snd_soc_update_bits(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x2,
+ 0x2);
+ snd_soc_update_bits(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x80,
+ 0x80);
+ snd_soc_update_bits(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x4,
+ 0x4);
+ snd_soc_update_bits(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x01,
+ 0x1);
+ usleep_range(1000, 1000);
+ snd_soc_update_bits(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x80,
+ 0x00);
+ } else if ((sitar->bandgap_type == SITAR_BANDGAP_MBHC_MODE) &&
+ (choice == SITAR_BANDGAP_AUDIO_MODE)) {
+ snd_soc_write(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x50);
+ usleep_range(100, 100);
+ sitar_codec_enable_audio_mode_bandgap(codec);
+ } else if (choice == SITAR_BANDGAP_OFF) {
+ snd_soc_write(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x50);
+ } else {
+ pr_err("%s: Error, Invalid bandgap settings\n", __func__);
+ }
+ sitar->bandgap_type = choice;
+}
+
+
+static int sitar_codec_enable_clock_block(struct snd_soc_codec *codec,
+ int config_mode)
+{
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
+
+ pr_err("%s\n", __func__);
+
+ if (config_mode) {
+ snd_soc_write(codec, SITAR_A_CLK_BUFF_EN2, 0x00);
+ snd_soc_write(codec, SITAR_A_CLK_BUFF_EN2, 0x02);
+ snd_soc_write(codec, SITAR_A_CLK_BUFF_EN1, 0x0D);
+ usleep_range(1000, 1000);
+ } else
+ snd_soc_update_bits(codec, SITAR_A_CLK_BUFF_EN1, 0x08, 0x00);
+
+
+ snd_soc_update_bits(codec, SITAR_A_CLK_BUFF_EN1, 0x05, 0x05);
+ snd_soc_update_bits(codec, SITAR_A_CLK_BUFF_EN2, 0x02, 0x00);
+ snd_soc_update_bits(codec, SITAR_A_CLK_BUFF_EN2, 0x04, 0x04);
+ snd_soc_update_bits(codec, SITAR_A_CDC_CLK_MCLK_CTL, 0x01, 0x01);
+ snd_soc_update_bits(codec, SITAR_A_CDC_CLK_OTHR_CTL, 0x04, 0x04);
+ usleep_range(50, 50);
+ sitar->clock_active = true;
+ return 0;
+}
+static void sitar_codec_disable_clock_block(struct snd_soc_codec *codec)
+{
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
+ pr_err("%s\n", __func__);
+ snd_soc_update_bits(codec, SITAR_A_CDC_CLK_OTHR_CTL, 0x04, 0x04);
+ snd_soc_update_bits(codec, SITAR_A_CLK_BUFF_EN2, 0x04, 0x00);
+ ndelay(160);
+ snd_soc_update_bits(codec, SITAR_A_CLK_BUFF_EN2, 0x02, 0x02);
+ snd_soc_update_bits(codec, SITAR_A_CLK_BUFF_EN1, 0x05, 0x00);
+ sitar->clock_active = false;
+}
+
+static void sitar_codec_calibrate_hs_polling(struct snd_soc_codec *codec)
+{
+ /* TODO store register values in calibration */
+ snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B5_CTL, 0x20);
+ snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B6_CTL, 0xFF);
+
+ snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B10_CTL, 0xFF);
+ snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B9_CTL, 0x20);
+
+ snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B4_CTL, 0xF8);
+ snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B3_CTL, 0xEE);
+ snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B2_CTL, 0xFC);
+ snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B1_CTL, 0xCE);
+
+ snd_soc_write(codec, SITAR_A_CDC_MBHC_TIMER_B1_CTL, 3);
+ snd_soc_write(codec, SITAR_A_CDC_MBHC_TIMER_B2_CTL, 9);
+ snd_soc_write(codec, SITAR_A_CDC_MBHC_TIMER_B3_CTL, 30);
+ snd_soc_write(codec, SITAR_A_CDC_MBHC_TIMER_B6_CTL, 120);
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_TIMER_B1_CTL, 0x78, 0x58);
+ snd_soc_write(codec, SITAR_A_CDC_MBHC_B2_CTL, 11);
+}
+
+static int sitar_startup(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct wcd9xxx *wcd9xxx = dev_get_drvdata(dai->codec->dev->parent);
+ if ((wcd9xxx != NULL) && (wcd9xxx->dev != NULL) &&
+ (wcd9xxx->dev->parent != NULL))
+ pm_runtime_get_sync(wcd9xxx->dev->parent);
+ pr_err("%s(): substream = %s stream = %d\n" , __func__,
+ substream->name, substream->stream);
+
+ return 0;
+}
+
+static void sitar_shutdown(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct wcd9xxx *wcd9xxx = dev_get_drvdata(dai->codec->dev->parent);
+ if ((wcd9xxx != NULL) && (wcd9xxx->dev != NULL) &&
+ (wcd9xxx->dev->parent != NULL)) {
+ pm_runtime_mark_last_busy(wcd9xxx->dev->parent);
+ pm_runtime_put(wcd9xxx->dev->parent);
+ }
+ pr_err("%s(): substream = %s stream = %d\n" , __func__,
+ substream->name, substream->stream);
+}
+
+int sitar_mclk_enable(struct snd_soc_codec *codec, int mclk_enable)
+{
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
+
+ pr_err("%s() mclk_enable = %u\n", __func__, mclk_enable);
+
+ if (mclk_enable) {
+ sitar->mclk_enabled = true;
+
+ if (sitar->mbhc_polling_active && (sitar->mclk_enabled)) {
+ sitar_codec_pause_hs_polling(codec);
+ sitar_codec_enable_bandgap(codec,
+ SITAR_BANDGAP_AUDIO_MODE);
+ sitar_codec_enable_clock_block(codec, 0);
+ sitar_codec_calibrate_hs_polling(codec);
+ sitar_codec_start_hs_polling(codec);
+ } else {
+ sitar_codec_enable_bandgap(codec,
+ SITAR_BANDGAP_AUDIO_MODE);
+ sitar_codec_enable_clock_block(codec, 0);
+ }
+ } else {
+
+ if (!sitar->mclk_enabled) {
+ pr_err("Error, MCLK already diabled\n");
+ return -EINVAL;
+ }
+ sitar->mclk_enabled = false;
+
+ if (sitar->mbhc_polling_active) {
+ if (!sitar->mclk_enabled) {
+ sitar_codec_pause_hs_polling(codec);
+ sitar_codec_enable_bandgap(codec,
+ SITAR_BANDGAP_MBHC_MODE);
+ sitar_enable_rx_bias(codec, 1);
+ sitar_codec_enable_clock_block(codec, 1);
+ sitar_codec_calibrate_hs_polling(codec);
+ sitar_codec_start_hs_polling(codec);
+ }
+ snd_soc_update_bits(codec, SITAR_A_CLK_BUFF_EN1,
+ 0x05, 0x01);
+ } else {
+ sitar_codec_disable_clock_block(codec);
+ sitar_codec_enable_bandgap(codec,
+ SITAR_BANDGAP_OFF);
+ }
+ }
+ return 0;
+}
+
+static int sitar_set_dai_sysclk(struct snd_soc_dai *dai,
+ int clk_id, unsigned int freq, int dir)
+{
+ pr_err("%s\n", __func__);
+ return 0;
+}
+
+static int sitar_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
+{
+ u8 val = 0;
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(dai->codec);
+
+ pr_err("%s\n", __func__);
+ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
+ case SND_SOC_DAIFMT_CBS_CFS:
+ /* CPU is master */
+ if (sitar->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
+ if (dai->id == AIF1_CAP)
+ snd_soc_update_bits(dai->codec,
+ SITAR_A_CDC_CLK_TX_I2S_CTL,
+ SITAR_I2S_MASTER_MODE_MASK, 0);
+ else if (dai->id == AIF1_PB)
+ snd_soc_update_bits(dai->codec,
+ SITAR_A_CDC_CLK_RX_I2S_CTL,
+ SITAR_I2S_MASTER_MODE_MASK, 0);
+ }
+ break;
+ case SND_SOC_DAIFMT_CBM_CFM:
+ /* CPU is slave */
+ if (sitar->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
+ val = SITAR_I2S_MASTER_MODE_MASK;
+ if (dai->id == AIF1_CAP)
+ snd_soc_update_bits(dai->codec,
+ SITAR_A_CDC_CLK_TX_I2S_CTL, val, val);
+ else if (dai->id == AIF1_PB)
+ snd_soc_update_bits(dai->codec,
+ SITAR_A_CDC_CLK_RX_I2S_CTL, val, val);
+ }
+ break;
+ default:
+ return -EINVAL;
+ }
+ return 0;
+}
+static int sitar_set_channel_map(struct snd_soc_dai *dai,
+ unsigned int tx_num, unsigned int *tx_slot,
+ unsigned int rx_num, unsigned int *rx_slot)
+
+{
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(dai->codec);
+ u32 i = 0;
+ if (!tx_slot && !rx_slot) {
+ pr_err("%s: Invalid\n", __func__);
+ return -EINVAL;
+ }
+ pr_debug("%s: DAI-ID %x %d %d\n", __func__, dai->id, tx_num, rx_num);
+
+ if (dai->id == AIF1_PB) {
+ for (i = 0; i < rx_num; i++) {
+ sitar->dai[dai->id - 1].ch_num[i] = rx_slot[i];
+ sitar->dai[dai->id - 1].ch_act = 0;
+ sitar->dai[dai->id - 1].ch_tot = rx_num;
+ }
+ } else if (dai->id == AIF1_CAP) {
+ for (i = 0; i < tx_num; i++) {
+ sitar->dai[dai->id - 1].ch_num[i] = tx_slot[i];
+ sitar->dai[dai->id - 1].ch_act = 0;
+ sitar->dai[dai->id - 1].ch_tot = tx_num;
+ }
+ }
+ return 0;
+}
+
+static int sitar_get_channel_map(struct snd_soc_dai *dai,
+ unsigned int *tx_num, unsigned int *tx_slot,
+ unsigned int *rx_num, unsigned int *rx_slot)
+
+{
+ struct wcd9xxx *sitar = dev_get_drvdata(dai->codec->control_data);
+
+ u32 cnt = 0;
+ u32 tx_ch[SLIM_MAX_TX_PORTS];
+ u32 rx_ch[SLIM_MAX_RX_PORTS];
+
+ if (!rx_slot && !tx_slot) {
+ pr_err("%s: Invalid\n", __func__);
+ return -EINVAL;
+ }
+ pr_debug("%s: DAI-ID %x\n", __func__, dai->id);
+ /* for virtual port, codec driver needs to do
+ * housekeeping, for now should be ok
+ */
+ wcd9xxx_get_channel(sitar, rx_ch, tx_ch);
+ if (dai->id == AIF1_PB) {
+ *rx_num = sitar_dai[dai->id - 1].playback.channels_max;
+ while (cnt < *rx_num) {
+ rx_slot[cnt] = rx_ch[cnt];
+ cnt++;
+ }
+ } else if (dai->id == AIF1_CAP) {
+ *tx_num = sitar_dai[dai->id - 1].capture.channels_max;
+ while (cnt < *tx_num) {
+ tx_slot[cnt] = tx_ch[6 + cnt];
+ cnt++;
+ }
+ }
+ return 0;
+}
+
+static int sitar_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
+{
+ struct snd_soc_codec *codec = dai->codec;
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(dai->codec);
+ u8 path, shift;
+ u16 tx_fs_reg, rx_fs_reg;
+ u8 tx_fs_rate, rx_fs_rate, rx_state, tx_state;
+
+ pr_err("%s: DAI-ID %x\n", __func__, dai->id);
+
+ switch (params_rate(params)) {
+ case 8000:
+ tx_fs_rate = 0x00;
+ rx_fs_rate = 0x00;
+ break;
+ case 16000:
+ tx_fs_rate = 0x01;
+ rx_fs_rate = 0x20;
+ break;
+ case 32000:
+ tx_fs_rate = 0x02;
+ rx_fs_rate = 0x40;
+ break;
+ case 48000:
+ tx_fs_rate = 0x03;
+ rx_fs_rate = 0x60;
+ break;
+ default:
+ pr_err("%s: Invalid sampling rate %d\n", __func__,
+ params_rate(params));
+ return -EINVAL;
+ }
+
+
+ /**
+ * If current dai is a tx dai, set sample rate to
+ * all the txfe paths that are currently not active
+ */
+ if (dai->id == AIF1_CAP) {
+
+ tx_state = snd_soc_read(codec,
+ SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL);
+
+ for (path = 1, shift = 0;
+ path <= NUM_DECIMATORS; path++, shift++) {
+
+ if (!(tx_state & (1 << shift))) {
+ tx_fs_reg = SITAR_A_CDC_TX1_CLK_FS_CTL
+ + (BITS_PER_REG*(path-1));
+ snd_soc_update_bits(codec, tx_fs_reg,
+ 0x03, tx_fs_rate);
+ }
+ }
+ if (sitar->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
+ switch (params_format(params)) {
+ case SNDRV_PCM_FORMAT_S16_LE:
+ snd_soc_update_bits(codec,
+ SITAR_A_CDC_CLK_TX_I2S_CTL,
+ 0x20, 0x20);
+ break;
+ case SNDRV_PCM_FORMAT_S32_LE:
+ snd_soc_update_bits(codec,
+ SITAR_A_CDC_CLK_TX_I2S_CTL,
+ 0x20, 0x00);
+ break;
+ default:
+ pr_err("invalid format\n");
+ break;
+ }
+ snd_soc_update_bits(codec, SITAR_A_CDC_CLK_TX_I2S_CTL,
+ 0x03, tx_fs_rate);
+ }
+ } else {
+ sitar->dai[dai->id - 1].rate = params_rate(params);
+ }
+
+ /**
+ * TODO: Need to handle case where same RX chain takes 2 or more inputs
+ * with varying sample rates
+ */
+
+ /**
+ * If current dai is a rx dai, set sample rate to
+ * all the rx paths that are currently not active
+ */
+ if (dai->id == AIF1_PB) {
+
+ rx_state = snd_soc_read(codec,
+ SITAR_A_CDC_CLK_RX_B1_CTL);
+
+ for (path = 1, shift = 0;
+ path <= NUM_INTERPOLATORS; path++, shift++) {
+
+ if (!(rx_state & (1 << shift))) {
+ rx_fs_reg = SITAR_A_CDC_RX1_B5_CTL
+ + (BITS_PER_REG*(path-1));
+ snd_soc_update_bits(codec, rx_fs_reg,
+ 0xE0, rx_fs_rate);
+ }
+ }
+ if (sitar->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
+ switch (params_format(params)) {
+ case SNDRV_PCM_FORMAT_S16_LE:
+ snd_soc_update_bits(codec,
+ SITAR_A_CDC_CLK_RX_I2S_CTL,
+ 0x20, 0x20);
+ break;
+ case SNDRV_PCM_FORMAT_S32_LE:
+ snd_soc_update_bits(codec,
+ SITAR_A_CDC_CLK_RX_I2S_CTL,
+ 0x20, 0x00);
+ break;
+ default:
+ pr_err("invalid format\n");
+ break;
+ }
+ snd_soc_update_bits(codec, SITAR_A_CDC_CLK_RX_I2S_CTL,
+ 0x03, (rx_fs_rate >> 0x05));
+ }
+ } else {
+ sitar->dai[dai->id - 1].rate = params_rate(params);
+ }
+
+ return 0;
+}
+
+static struct snd_soc_dai_ops sitar_dai_ops = {
+ .startup = sitar_startup,
+ .shutdown = sitar_shutdown,
+ .hw_params = sitar_hw_params,
+ .set_sysclk = sitar_set_dai_sysclk,
+ .set_fmt = sitar_set_dai_fmt,
+ .set_channel_map = sitar_set_channel_map,
+ .get_channel_map = sitar_get_channel_map,
+};
+
+static struct snd_soc_dai_driver sitar_dai[] = {
+ {
+ .name = "sitar_rx1",
+ .id = AIF1_PB,
+ .playback = {
+ .stream_name = "AIF1 Playback",
+ .rates = WCD9304_RATES,
+ .formats = SITAR_FORMATS,
+ .rate_max = 48000,
+ .rate_min = 8000,
+ .channels_min = 1,
+ .channels_max = 2,
+ },
+ .ops = &sitar_dai_ops,
+ },
+ {
+ .name = "sitar_tx1",
+ .id = AIF1_CAP,
+ .capture = {
+ .stream_name = "AIF1 Capture",
+ .rates = WCD9304_RATES,
+ .formats = SITAR_FORMATS,
+ .rate_max = 48000,
+ .rate_min = 8000,
+ .channels_min = 1,
+ .channels_max = 2,
+ },
+ .ops = &sitar_dai_ops,
+ },
+};
+
+static int sitar_codec_enable_slimrx(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct wcd9xxx *sitar;
+ struct snd_soc_codec *codec = w->codec;
+ struct sitar_priv *sitar_p = snd_soc_codec_get_drvdata(codec);
+ u32 j = 0;
+ codec->control_data = dev_get_drvdata(codec->dev->parent);
+ sitar = codec->control_data;
+ /* Execute the callback only if interface type is slimbus */
+ if (sitar_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS)
+ return 0;
+ switch (event) {
+ case SND_SOC_DAPM_POST_PMU:
+ for (j = 0; j < ARRAY_SIZE(sitar_dai); j++) {
+ if (sitar_dai[j].id == AIF1_CAP)
+ continue;
+ if (!strncmp(w->sname,
+ sitar_dai[j].playback.stream_name, 13)) {
+ ++sitar_p->dai[j].ch_act;
+ break;
+ }
+ }
+ if (sitar_p->dai[j].ch_act == sitar_p->dai[j].ch_tot)
+ wcd9xxx_cfg_slim_sch_rx(sitar,
+ sitar_p->dai[j].ch_num,
+ sitar_p->dai[j].ch_tot,
+ sitar_p->dai[j].rate);
+ break;
+ case SND_SOC_DAPM_POST_PMD:
+ for (j = 0; j < ARRAY_SIZE(sitar_dai); j++) {
+ if (sitar_dai[j].id == AIF1_CAP)
+ continue;
+ if (!strncmp(w->sname,
+ sitar_dai[j].playback.stream_name, 13)) {
+ --sitar_p->dai[j].ch_act;
+ break;
+ }
+ }
+ if (!sitar_p->dai[j].ch_act) {
+ wcd9xxx_close_slim_sch_rx(sitar,
+ sitar_p->dai[j].ch_num,
+ sitar_p->dai[j].ch_tot);
+ sitar_p->dai[j].rate = 0;
+ memset(sitar_p->dai[j].ch_num, 0, (sizeof(u32)*
+ sitar_p->dai[j].ch_tot));
+ sitar_p->dai[j].ch_tot = 0;
+ }
+ }
+ return 0;
+}
+
+static int sitar_codec_enable_slimtx(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct wcd9xxx *sitar;
+ struct snd_soc_codec *codec = w->codec;
+ struct sitar_priv *sitar_p = snd_soc_codec_get_drvdata(codec);
+ /* index to the DAI ID, for now hardcoding */
+ u32 j = 0;
+
+ codec->control_data = dev_get_drvdata(codec->dev->parent);
+ sitar = codec->control_data;
+
+ /* Execute the callback only if interface type is slimbus */
+ if (sitar_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS)
+ return 0;
+ switch (event) {
+ case SND_SOC_DAPM_POST_PMU:
+ for (j = 0; j < ARRAY_SIZE(sitar_dai); j++) {
+ if (sitar_dai[j].id == AIF1_PB)
+ continue;
+ if (!strncmp(w->sname,
+ sitar_dai[j].capture.stream_name, 13)) {
+ ++sitar_p->dai[j].ch_act;
+ break;
+ }
+ }
+ if (sitar_p->dai[j].ch_act == sitar_p->dai[j].ch_tot)
+ wcd9xxx_cfg_slim_sch_tx(sitar,
+ sitar_p->dai[j].ch_num,
+ sitar_p->dai[j].ch_tot,
+ sitar_p->dai[j].rate);
+ break;
+ case SND_SOC_DAPM_POST_PMD:
+ for (j = 0; j < ARRAY_SIZE(sitar_dai); j++) {
+ if (sitar_dai[j].id == AIF1_PB)
+ continue;
+ if (!strncmp(w->sname,
+ sitar_dai[j].capture.stream_name, 13)) {
+ --sitar_p->dai[j].ch_act;
+ break;
+ }
+ }
+ if (!sitar_p->dai[j].ch_act) {
+ wcd9xxx_close_slim_sch_tx(sitar,
+ sitar_p->dai[j].ch_num,
+ sitar_p->dai[j].ch_tot);
+ sitar_p->dai[j].rate = 0;
+ memset(sitar_p->dai[j].ch_num, 0, (sizeof(u32)*
+ sitar_p->dai[j].ch_tot));
+ sitar_p->dai[j].ch_tot = 0;
+ }
+ }
+ return 0;
+}
+
+
+static short sitar_codec_read_sta_result(struct snd_soc_codec *codec)
+{
+ u8 bias_msb, bias_lsb;
+ short bias_value;
+
+ bias_msb = snd_soc_read(codec, SITAR_A_CDC_MBHC_B3_STATUS);
+ bias_lsb = snd_soc_read(codec, SITAR_A_CDC_MBHC_B2_STATUS);
+ bias_value = (bias_msb << 8) | bias_lsb;
+ return bias_value;
+}
+
+static short sitar_codec_read_dce_result(struct snd_soc_codec *codec)
+{
+ u8 bias_msb, bias_lsb;
+ short bias_value;
+
+ bias_msb = snd_soc_read(codec, SITAR_A_CDC_MBHC_B5_STATUS);
+ bias_lsb = snd_soc_read(codec, SITAR_A_CDC_MBHC_B4_STATUS);
+ bias_value = (bias_msb << 8) | bias_lsb;
+ return bias_value;
+}
+
+static short sitar_codec_measure_micbias_voltage(struct snd_soc_codec *codec,
+ int dce)
+{
+ short bias_value;
+
+ if (dce) {
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
+ snd_soc_write(codec, SITAR_A_CDC_MBHC_EN_CTL, 0x4);
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
+ snd_soc_write(codec, SITAR_A_CDC_MBHC_EN_CTL, 0x4);
+ usleep_range(60000, 60000);
+ bias_value = sitar_codec_read_dce_result(codec);
+ } else {
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
+ snd_soc_write(codec, SITAR_A_CDC_MBHC_EN_CTL, 0x2);
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
+ usleep_range(5000, 5000);
+ snd_soc_write(codec, SITAR_A_CDC_MBHC_EN_CTL, 0x2);
+ usleep_range(50, 50);
+ bias_value = sitar_codec_read_sta_result(codec);
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
+ snd_soc_write(codec, SITAR_A_CDC_MBHC_EN_CTL, 0x0);
+ }
+
+ pr_err("read microphone bias value %x\n", bias_value);
+ return bias_value;
+}
+
+static short sitar_codec_setup_hs_polling(struct snd_soc_codec *codec)
+{
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
+ struct sitar_mbhc_calibration *calibration = sitar->calibration;
+ short bias_value;
+ u8 cfilt_mode;
+
+ if (!calibration) {
+ pr_err("Error, no sitar calibration\n");
+ return -ENODEV;
+ }
+
+ sitar->mbhc_polling_active = true;
+
+ if (!sitar->mclk_enabled) {
+ sitar_codec_enable_bandgap(codec, SITAR_BANDGAP_MBHC_MODE);
+ sitar_enable_rx_bias(codec, 1);
+ sitar_codec_enable_clock_block(codec, 1);
+ }
+
+ snd_soc_update_bits(codec, SITAR_A_CLK_BUFF_EN1, 0x05, 0x01);
+
+ snd_soc_update_bits(codec, SITAR_A_TX_COM_BIAS, 0xE0, 0xE0);
+
+ /* Make sure CFILT is in fast mode, save current mode */
+ cfilt_mode = snd_soc_read(codec,
+ sitar->mbhc_bias_regs.cfilt_ctl);
+ snd_soc_update_bits(codec, sitar->mbhc_bias_regs.cfilt_ctl,
+ 0x70, 0x00);
+
+ snd_soc_update_bits(codec,
+ sitar->mbhc_bias_regs.ctl_reg, 0x1F, 0x16);
+
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
+ snd_soc_write(codec, SITAR_A_MBHC_SCALING_MUX_1, 0x84);
+
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x8, 0x00);
+
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_B1_CTL, 0x6, 0x6);
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
+
+ sitar_codec_calibrate_hs_polling(codec);
+
+ bias_value = sitar_codec_measure_micbias_voltage(codec, 0);
+ snd_soc_update_bits(codec,
+ sitar->mbhc_bias_regs.cfilt_ctl, 0x40, cfilt_mode);
+ snd_soc_update_bits(codec, SITAR_A_MBHC_HPH, 0x13, 0x00);
+
+ return bias_value;
+}
+
+static int sitar_codec_enable_hs_detect(struct snd_soc_codec *codec,
+ int insertion)
+{
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
+ struct sitar_mbhc_calibration *calibration = sitar->calibration;
+ int central_bias_enabled = 0;
+ u8 wg_time;
+
+ if (!calibration) {
+ pr_err("Error, no sitar calibration\n");
+ return -EINVAL;
+ }
+
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_INT_CTL, 0x1, 0);
+
+ if (insertion) {
+ /* Make sure mic bias and Mic line schmitt trigger
+ * are turned OFF
+ */
+ snd_soc_update_bits(codec, sitar->mbhc_bias_regs.ctl_reg,
+ 0x81, 0x01);
+ snd_soc_update_bits(codec, sitar->mbhc_bias_regs.mbhc_reg,
+ 0x90, 0x00);
+ wg_time = snd_soc_read(codec, SITAR_A_RX_HPH_CNP_WG_TIME) ;
+ wg_time += 1;
+
+ /* Enable HPH Schmitt Trigger */
+ snd_soc_update_bits(codec, SITAR_A_MBHC_HPH, 0x11, 0x11);
+ snd_soc_update_bits(codec, SITAR_A_MBHC_HPH, 0x0C,
+ calibration->hph_current << 2);
+
+ /* Turn off HPH PAs and DAC's during insertion detection to
+ * avoid false insertion interrupts
+ */
+ if (sitar->mbhc_micbias_switched)
+ sitar_codec_switch_micbias(codec, 0);
+ snd_soc_update_bits(codec, SITAR_A_RX_HPH_CNP_EN, 0x30, 0x00);
+ snd_soc_update_bits(codec, SITAR_A_RX_HPH_L_DAC_CTL,
+ 0xC0, 0x00);
+ snd_soc_update_bits(codec, SITAR_A_RX_HPH_R_DAC_CTL,
+ 0xC0, 0x00);
+ usleep_range(wg_time * 1000, wg_time * 1000);
+
+ /* setup for insetion detection */
+ snd_soc_update_bits(codec, SITAR_A_MBHC_HPH, 0x02, 0x02);
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_INT_CTL, 0x2, 0);
+ } else {
+ /* Make sure the HPH schmitt trigger is OFF */
+ snd_soc_update_bits(codec, SITAR_A_MBHC_HPH, 0x12, 0x00);
+
+ /* enable the mic line schmitt trigger */
+ snd_soc_update_bits(codec, sitar->mbhc_bias_regs.mbhc_reg, 0x60,
+ calibration->mic_current << 5);
+ snd_soc_update_bits(codec, sitar->mbhc_bias_regs.mbhc_reg,
+ 0x80, 0x80);
+ usleep_range(calibration->mic_pid, calibration->mic_pid);
+ snd_soc_update_bits(codec, sitar->mbhc_bias_regs.mbhc_reg,
+ 0x10, 0x10);
+
+ /* Setup for low power removal detection */
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_INT_CTL, 0x2, 0x2);
+ }
+
+ if (snd_soc_read(codec, SITAR_A_CDC_MBHC_B1_CTL) & 0x4) {
+ if (!(sitar->clock_active)) {
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_B1_CTL,
+ 0x06, 0);
+ usleep_range(calibration->shutdown_plug_removal,
+ calibration->shutdown_plug_removal);
+ } else
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_B1_CTL,
+ 0x06, 0);
+ }
+
+ snd_soc_update_bits(codec, sitar->mbhc_bias_regs.int_rbias, 0x80, 0);
+
+ /* If central bandgap disabled */
+ if (!(snd_soc_read(codec, SITAR_A_PIN_CTL_OE1) & 1)) {
+ snd_soc_update_bits(codec, SITAR_A_PIN_CTL_OE1, 0x3, 0x3);
+ usleep_range(calibration->bg_fast_settle,
+ calibration->bg_fast_settle);
+ central_bias_enabled = 1;
+ }
+
+ /* If LDO_H disabled */
+ if (snd_soc_read(codec, SITAR_A_PIN_CTL_OE0) & 0x80) {
+ snd_soc_update_bits(codec, SITAR_A_PIN_CTL_OE0, 0x10, 0);
+ snd_soc_update_bits(codec, SITAR_A_PIN_CTL_OE0, 0x80, 0x80);
+ usleep_range(calibration->tldoh, calibration->tldoh);
+ snd_soc_update_bits(codec, SITAR_A_PIN_CTL_OE0, 0x80, 0);
+
+ if (central_bias_enabled)
+ snd_soc_update_bits(codec, SITAR_A_PIN_CTL_OE1, 0x1, 0);
+ }
+
+ wcd9xxx_enable_irq(codec->control_data, SITAR_IRQ_MBHC_INSERTION);
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_INT_CTL, 0x1, 0x1);
+ return 0;
+}
+
+static void btn0_lpress_fn(struct work_struct *work)
+{
+ struct delayed_work *delayed_work;
+ struct sitar_priv *sitar;
+
+ pr_err("%s:\n", __func__);
+
+ delayed_work = to_delayed_work(work);
+ sitar = container_of(delayed_work, struct sitar_priv, btn0_dwork);
+
+ if (sitar) {
+ if (sitar->button_jack) {
+ pr_err("%s: Reporting long button press event\n",
+ __func__);
+ sitar_snd_soc_jack_report(sitar, sitar->button_jack,
+ SND_JACK_BTN_0,
+ SND_JACK_BTN_0);
+ }
+ } else {
+ pr_err("%s: Bad sitar private data\n", __func__);
+ }
+
+}
+
+int sitar_hs_detect(struct snd_soc_codec *codec,
+ struct snd_soc_jack *headset_jack, struct snd_soc_jack *button_jack,
+ struct sitar_mbhc_calibration *calibration)
+{
+ struct sitar_priv *sitar;
+ int rc;
+
+ if (!codec || !calibration) {
+ pr_err("Error: no codec or calibration\n");
+ return -EINVAL;
+ }
+ sitar = snd_soc_codec_get_drvdata(codec);
+ sitar->headset_jack = headset_jack;
+ sitar->button_jack = button_jack;
+ sitar->calibration = calibration;
+ sitar_get_mbhc_micbias_regs(codec, &sitar->mbhc_bias_regs);
+
+ /* Put CFILT in fast mode by default */
+ snd_soc_update_bits(codec, sitar->mbhc_bias_regs.cfilt_ctl,
+ 0x40, SITAR_CFILT_FAST_MODE);
+
+ INIT_DELAYED_WORK(&sitar->btn0_dwork, btn0_lpress_fn);
+ INIT_WORK(&sitar->hphlocp_work, hphlocp_off_report);
+ INIT_WORK(&sitar->hphrocp_work, hphrocp_off_report);
+ rc = sitar_codec_enable_hs_detect(codec, 1);
+
+ if (!IS_ERR_VALUE(rc)) {
+ snd_soc_update_bits(codec, SITAR_A_RX_HPH_OCP_CTL, 0x10,
+ 0x10);
+ wcd9xxx_enable_irq(codec->control_data,
+ SITAR_IRQ_HPH_PA_OCPL_FAULT);
+ wcd9xxx_enable_irq(codec->control_data,
+ SITAR_IRQ_HPH_PA_OCPR_FAULT);
+ }
+
+ return rc;
+}
+EXPORT_SYMBOL_GPL(sitar_hs_detect);
+
+static irqreturn_t sitar_dce_handler(int irq, void *data)
+{
+ struct sitar_priv *priv = data;
+ struct snd_soc_codec *codec = priv->codec;
+ short bias_value;
+ struct wcd9xxx *core = dev_get_drvdata(priv->codec->dev->parent);
+
+ wcd9xxx_disable_irq(codec->control_data, SITAR_IRQ_MBHC_REMOVAL);
+ wcd9xxx_disable_irq(codec->control_data, SITAR_IRQ_MBHC_POTENTIAL);
+
+ bias_value = sitar_codec_read_dce_result(codec);
+ pr_err("%s: button press interrupt, bias value(DCE Read)=%d\n",
+ __func__, bias_value);
+
+ bias_value = sitar_codec_read_sta_result(codec);
+ pr_err("%s: button press interrupt, bias value(STA Read)=%d\n",
+ __func__, bias_value);
+ /*
+ * TODO: If button pressed is not button 0,
+ * report the button press event immediately.
+ */
+ priv->buttons_pressed |= SND_JACK_BTN_0;
+
+ msleep(100);
+
+ wcd9xxx_lock_sleep(core);
+ if (schedule_delayed_work(&priv->btn0_dwork,
+ msecs_to_jiffies(400)) == 0) {
+ WARN(1, "Button pressed twice without release event\n");
+ wcd9xxx_unlock_sleep(core);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t sitar_release_handler(int irq, void *data)
+{
+ struct sitar_priv *priv = data;
+ struct snd_soc_codec *codec = priv->codec;
+ int ret, mic_voltage;
+ struct wcd9xxx *core = dev_get_drvdata(priv->codec->dev->parent);
+
+ pr_err("%s\n", __func__);
+ wcd9xxx_disable_irq(codec->control_data, SITAR_IRQ_MBHC_RELEASE);
+
+ mic_voltage = sitar_codec_read_dce_result(codec);
+ pr_err("%s: Microphone Voltage on release(DCE Read) = %d\n",
+ __func__, mic_voltage);
+
+ if (priv->buttons_pressed & SND_JACK_BTN_0) {
+ ret = cancel_delayed_work(&priv->btn0_dwork);
+
+ if (ret == 0) {
+
+ pr_err("%s: Reporting long button release event\n",
+ __func__);
+ if (priv->button_jack) {
+ sitar_snd_soc_jack_report(priv,
+ priv->button_jack, 0,
+ SND_JACK_BTN_0);
+ }
+
+ } else {
+ /* if scheduled btn0_dwork is canceled from here,
+ * we have to unlock from here instead btn0_work */
+ wcd9xxx_unlock_sleep(core);
+ mic_voltage =
+ sitar_codec_measure_micbias_voltage(codec, 0);
+ pr_err("%s: Mic Voltage on release(new STA) = %d\n",
+ __func__, mic_voltage);
+
+ if (mic_voltage < -2000 || mic_voltage > -670) {
+ pr_err("%s: Fake buttton press interrupt\n",
+ __func__);
+ } else {
+
+ if (priv->button_jack) {
+ pr_err("%s:reporting short button press and release\n",
+ __func__);
+
+ sitar_snd_soc_jack_report(priv,
+ priv->button_jack,
+ SND_JACK_BTN_0, SND_JACK_BTN_0);
+ sitar_snd_soc_jack_report(priv,
+ priv->button_jack,
+ 0, SND_JACK_BTN_0);
+ }
+ }
+ }
+
+ priv->buttons_pressed &= ~SND_JACK_BTN_0;
+ }
+
+ sitar_codec_start_hs_polling(codec);
+ return IRQ_HANDLED;
+}
+
+static void sitar_codec_shutdown_hs_removal_detect(struct snd_soc_codec *codec)
+{
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
+ struct sitar_mbhc_calibration *calibration = sitar->calibration;
+
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_B1_CTL, 0x6, 0x0);
+
+ snd_soc_update_bits(codec,
+ sitar->mbhc_bias_regs.mbhc_reg, 0x80, 0x00);
+ usleep_range(calibration->shutdown_plug_removal,
+ calibration->shutdown_plug_removal);
+
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0xA, 0x8);
+
+ snd_soc_write(codec, SITAR_A_MBHC_SCALING_MUX_1, 0x00);
+}
+
+static void sitar_codec_shutdown_hs_polling(struct snd_soc_codec *codec)
+{
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
+
+ sitar_codec_shutdown_hs_removal_detect(codec);
+
+ if (!sitar->mclk_enabled) {
+ snd_soc_update_bits(codec, SITAR_A_TX_COM_BIAS, 0xE0, 0x00);
+ sitar_codec_enable_bandgap(codec, SITAR_BANDGAP_AUDIO_MODE);
+ sitar_codec_enable_clock_block(codec, 0);
+ }
+
+ sitar->mbhc_polling_active = false;
+}
+
+static irqreturn_t sitar_hphl_ocp_irq(int irq, void *data)
+{
+ struct sitar_priv *sitar = data;
+ struct snd_soc_codec *codec;
+
+ pr_info("%s: received HPHL OCP irq\n", __func__);
+
+ if (sitar) {
+ codec = sitar->codec;
+ if (sitar->hphlocp_cnt++ < SITAR_OCP_ATTEMPT) {
+ pr_info("%s: retry\n", __func__);
+ snd_soc_update_bits(codec, SITAR_A_RX_HPH_OCP_CTL, 0x10,
+ 0x00);
+ snd_soc_update_bits(codec, SITAR_A_RX_HPH_OCP_CTL, 0x10,
+ 0x10);
+ } else {
+ wcd9xxx_disable_irq(codec->control_data,
+ SITAR_IRQ_HPH_PA_OCPL_FAULT);
+ sitar->hphlocp_cnt = 0;
+ sitar->hph_status |= SND_JACK_OC_HPHL;
+ if (sitar->headset_jack)
+ sitar_snd_soc_jack_report(sitar,
+ sitar->headset_jack,
+ sitar->hph_status,
+ SITAR_JACK_MASK);
+ }
+ } else {
+ pr_err("%s: Bad sitar private data\n", __func__);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t sitar_hphr_ocp_irq(int irq, void *data)
+{
+ struct sitar_priv *sitar = data;
+ struct snd_soc_codec *codec;
+
+ pr_info("%s: received HPHR OCP irq\n", __func__);
+
+ if (sitar) {
+ codec = sitar->codec;
+ if (sitar->hphrocp_cnt++ < SITAR_OCP_ATTEMPT) {
+ pr_info("%s: retry\n", __func__);
+ snd_soc_update_bits(codec, SITAR_A_RX_HPH_OCP_CTL, 0x10,
+ 0x00);
+ snd_soc_update_bits(codec, SITAR_A_RX_HPH_OCP_CTL, 0x10,
+ 0x10);
+ } else {
+ wcd9xxx_disable_irq(codec->control_data,
+ SITAR_IRQ_HPH_PA_OCPR_FAULT);
+ sitar->hphrocp_cnt = 0;
+ sitar->hph_status |= SND_JACK_OC_HPHR;
+ if (sitar->headset_jack)
+ sitar_snd_soc_jack_report(sitar,
+ sitar->headset_jack,
+ sitar->hph_status,
+ SITAR_JACK_MASK);
+ }
+ } else {
+ pr_err("%s: Bad sitar private data\n", __func__);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static void sitar_sync_hph_state(struct sitar_priv *sitar)
+{
+ if (test_and_clear_bit(SITAR_HPHR_PA_OFF_ACK,
+ &sitar->hph_pa_dac_state)) {
+ pr_err("%s: HPHR clear flag and enable PA\n", __func__);
+ snd_soc_update_bits(sitar->codec, SITAR_A_RX_HPH_CNP_EN, 0x10,
+ 1 << 4);
+ }
+ if (test_and_clear_bit(SITAR_HPHL_PA_OFF_ACK,
+ &sitar->hph_pa_dac_state)) {
+ pr_err("%s: HPHL clear flag and enable PA\n", __func__);
+ snd_soc_update_bits(sitar->codec, SITAR_A_RX_HPH_CNP_EN, 0x20,
+ 1 << 5);
+ }
+
+ if (test_and_clear_bit(SITAR_HPHR_DAC_OFF_ACK,
+ &sitar->hph_pa_dac_state)) {
+ pr_err("%s: HPHR clear flag and enable DAC\n", __func__);
+ snd_soc_update_bits(sitar->codec, SITAR_A_RX_HPH_R_DAC_CTL,
+ 0xC0, 0xC0);
+ }
+ if (test_and_clear_bit(SITAR_HPHL_DAC_OFF_ACK,
+ &sitar->hph_pa_dac_state)) {
+ pr_err("%s: HPHL clear flag and enable DAC\n", __func__);
+ snd_soc_update_bits(sitar->codec, SITAR_A_RX_HPH_L_DAC_CTL,
+ 0xC0, 0xC0);
+ }
+}
+
+static irqreturn_t sitar_hs_insert_irq(int irq, void *data)
+{
+ struct sitar_priv *priv = data;
+ struct snd_soc_codec *codec = priv->codec;
+ int ldo_h_on, micb_cfilt_on;
+ short mic_voltage;
+ short threshold_no_mic = 0xF7F6;
+ short threshold_fake_insert = 0xFD30;
+ u8 is_removal;
+
+ pr_err("%s\n", __func__);
+ wcd9xxx_disable_irq(codec->control_data, SITAR_IRQ_MBHC_INSERTION);
+
+ is_removal = snd_soc_read(codec, SITAR_A_CDC_MBHC_INT_CTL) & 0x02;
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_INT_CTL, 0x03, 0x00);
+
+ /* Turn off both HPH and MIC line schmitt triggers */
+ snd_soc_update_bits(codec, priv->mbhc_bias_regs.mbhc_reg,
+ 0x90, 0x00);
+ snd_soc_update_bits(codec, SITAR_A_MBHC_HPH, 0x13, 0x00);
+
+ if (priv->fake_insert_context) {
+ pr_err("%s: fake context interrupt, reset insertion\n",
+ __func__);
+ priv->fake_insert_context = false;
+ sitar_codec_shutdown_hs_polling(codec);
+ sitar_codec_enable_hs_detect(codec, 1);
+ return IRQ_HANDLED;
+ }
+
+
+ ldo_h_on = snd_soc_read(codec, SITAR_A_LDO_H_MODE_1) & 0x80;
+ micb_cfilt_on = snd_soc_read(codec,
+ priv->mbhc_bias_regs.cfilt_ctl) & 0x80;
+
+ if (!ldo_h_on)
+ snd_soc_update_bits(codec, SITAR_A_LDO_H_MODE_1, 0x80, 0x80);
+ if (!micb_cfilt_on)
+ snd_soc_update_bits(codec, priv->mbhc_bias_regs.cfilt_ctl,
+ 0x80, 0x80);
+
+ usleep_range(priv->calibration->setup_plug_removal_delay,
+ priv->calibration->setup_plug_removal_delay);
+
+ if (!ldo_h_on)
+ snd_soc_update_bits(codec, SITAR_A_LDO_H_MODE_1, 0x80, 0x0);
+ if (!micb_cfilt_on)
+ snd_soc_update_bits(codec, priv->mbhc_bias_regs.cfilt_ctl,
+ 0x80, 0x0);
+
+ if (is_removal) {
+ /*
+ * If headphone is removed while playback is in progress,
+ * it is possible that micbias will be switched to VDDIO.
+ */
+ if (priv->mbhc_micbias_switched)
+ sitar_codec_switch_micbias(codec, 0);
+ priv->hph_status &= ~SND_JACK_HEADPHONE;
+
+ /* If headphone PA is on, check if userspace receives
+ * removal event to sync-up PA's state */
+ if (sitar_is_hph_pa_on(codec)) {
+ set_bit(SITAR_HPHL_PA_OFF_ACK, &priv->hph_pa_dac_state);
+ set_bit(SITAR_HPHR_PA_OFF_ACK, &priv->hph_pa_dac_state);
+ }
+
+ if (sitar_is_hph_dac_on(codec, 1))
+ set_bit(SITAR_HPHL_DAC_OFF_ACK,
+ &priv->hph_pa_dac_state);
+ if (sitar_is_hph_dac_on(codec, 0))
+ set_bit(SITAR_HPHR_DAC_OFF_ACK,
+ &priv->hph_pa_dac_state);
+
+ if (priv->headset_jack) {
+ pr_err("%s: Reporting removal\n", __func__);
+ sitar_snd_soc_jack_report(priv, priv->headset_jack,
+ priv->hph_status,
+ SITAR_JACK_MASK);
+ }
+ sitar_codec_shutdown_hs_removal_detect(codec);
+ sitar_codec_enable_hs_detect(codec, 1);
+ return IRQ_HANDLED;
+ }
+
+ mic_voltage = sitar_codec_setup_hs_polling(codec);
+
+ if (mic_voltage > threshold_fake_insert) {
+ pr_err("%s: Fake insertion interrupt, mic_voltage = %x\n",
+ __func__, mic_voltage);
+
+ /* Disable HPH trigger and enable MIC line trigger */
+ snd_soc_update_bits(codec, SITAR_A_MBHC_HPH, 0x12, 0x00);
+
+ snd_soc_update_bits(codec, priv->mbhc_bias_regs.mbhc_reg, 0x60,
+ priv->calibration->mic_current << 5);
+ snd_soc_update_bits(codec, priv->mbhc_bias_regs.mbhc_reg,
+ 0x80, 0x80);
+ usleep_range(priv->calibration->mic_pid,
+ priv->calibration->mic_pid);
+ snd_soc_update_bits(codec, priv->mbhc_bias_regs.mbhc_reg,
+ 0x10, 0x10);
+
+ /* Setup for insertion detection */
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_INT_CTL, 0x2, 0);
+ priv->fake_insert_context = true;
+ wcd9xxx_enable_irq(codec->control_data,
+ SITAR_IRQ_MBHC_INSERTION);
+ snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_INT_CTL, 0x1, 0x1);
+
+ } else if (mic_voltage < threshold_no_mic) {
+ pr_err("%s: Headphone Detected, mic_voltage = %x\n",
+ __func__, mic_voltage);
+ priv->hph_status |= SND_JACK_HEADPHONE;
+ if (priv->headset_jack) {
+ pr_err("%s: Reporting insertion %d\n", __func__,
+ SND_JACK_HEADPHONE);
+ sitar_snd_soc_jack_report(priv, priv->headset_jack,
+ priv->hph_status,
+ SITAR_JACK_MASK);
+ }
+ sitar_codec_shutdown_hs_polling(codec);
+ sitar_codec_enable_hs_detect(codec, 0);
+ sitar_sync_hph_state(priv);
+ } else {
+ pr_err("%s: Headset detected, mic_voltage = %x\n",
+ __func__, mic_voltage);
+ priv->hph_status |= SND_JACK_HEADSET;
+ if (priv->headset_jack) {
+ pr_err("%s: Reporting insertion %d\n", __func__,
+ SND_JACK_HEADSET);
+ sitar_snd_soc_jack_report(priv, priv->headset_jack,
+ priv->hph_status,
+ SITAR_JACK_MASK);
+ }
+ sitar_codec_start_hs_polling(codec);
+ sitar_sync_hph_state(priv);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t sitar_hs_remove_irq(int irq, void *data)
+{
+ struct sitar_priv *priv = data;
+ struct snd_soc_codec *codec = priv->codec;
+ short bias_value;
+
+ wcd9xxx_disable_irq(codec->control_data, SITAR_IRQ_MBHC_REMOVAL);
+ wcd9xxx_disable_irq(codec->control_data, SITAR_IRQ_MBHC_POTENTIAL);
+ wcd9xxx_disable_irq(codec->control_data, SITAR_IRQ_MBHC_RELEASE);
+
+ usleep_range(priv->calibration->shutdown_plug_removal,
+ priv->calibration->shutdown_plug_removal);
+
+ bias_value = sitar_codec_measure_micbias_voltage(codec, 1);
+ pr_err("removal interrupt, bias value is %d\n", bias_value);
+
+ if (bias_value < -90) {
+ pr_err("False alarm, headset not actually removed\n");
+ sitar_codec_start_hs_polling(codec);
+ } else {
+ /*
+ * If this removal is not false, first check the micbias
+ * switch status and switch it to LDOH if it is already
+ * switched to VDDIO.
+ */
+ if (priv->mbhc_micbias_switched)
+ sitar_codec_switch_micbias(codec, 0);
+ priv->hph_status &= ~SND_JACK_HEADSET;
+ if (priv->headset_jack) {
+ pr_err("%s: Reporting removal\n", __func__);
+ sitar_snd_soc_jack_report(priv, priv->headset_jack, 0,
+ SITAR_JACK_MASK);
+ }
+ sitar_codec_shutdown_hs_polling(codec);
+
+ sitar_codec_enable_hs_detect(codec, 1);
+ }
+
+ return IRQ_HANDLED;
+}
+
+
+static unsigned long slimbus_value;
+
+static irqreturn_t sitar_slimbus_irq(int irq, void *data)
+{
+ struct sitar_priv *priv = data;
+ struct snd_soc_codec *codec = priv->codec;
+ int i, j;
+ u8 val;
+
+
+ for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++) {
+ slimbus_value = wcd9xxx_interface_reg_read(codec->control_data,
+ SITAR_SLIM_PGD_PORT_INT_STATUS0 + i);
+ for_each_set_bit(j, &slimbus_value, BITS_PER_BYTE) {
+ val = wcd9xxx_interface_reg_read(codec->control_data,
+ SITAR_SLIM_PGD_PORT_INT_SOURCE0 + i*8 + j);
+ if (val & 0x1)
+ pr_err_ratelimited("overflow error on port %x,"
+ " value %x\n", i*8 + j, val);
+ if (val & 0x2)
+ pr_err_ratelimited("underflow error on port %x,"
+ " value %x\n", i*8 + j, val);
+ }
+ wcd9xxx_interface_reg_write(codec->control_data,
+ SITAR_SLIM_PGD_PORT_INT_CLR0 + i, 0xFF);
+ }
+
+ return IRQ_HANDLED;
+}
+
+
+static int sitar_handle_pdata(struct sitar_priv *sitar)
+{
+ struct snd_soc_codec *codec = sitar->codec;
+ struct wcd9xxx_pdata *pdata = sitar->pdata;
+ int k1, k2, rc = 0;
+ u8 leg_mode = pdata->amic_settings.legacy_mode;
+ u8 txfe_bypass = pdata->amic_settings.txfe_enable;
+ u8 txfe_buff = pdata->amic_settings.txfe_buff;
+ u8 flag = pdata->amic_settings.use_pdata;
+ u8 i = 0, j = 0;
+ u8 val_txfe = 0, value = 0;
+
+ if (!pdata) {
+ rc = -ENODEV;
+ goto done;
+ }
+
+ /* Make sure settings are correct */
+ if ((pdata->micbias.ldoh_v > SITAR_LDOH_2P85_V) ||
+ (pdata->micbias.bias1_cfilt_sel > SITAR_CFILT2_SEL) ||
+ (pdata->micbias.bias2_cfilt_sel > SITAR_CFILT2_SEL)) {
+ rc = -EINVAL;
+ goto done;
+ }
+
+ /* figure out k value */
+ k1 = sitar_find_k_value(pdata->micbias.ldoh_v,
+ pdata->micbias.cfilt1_mv);
+ k2 = sitar_find_k_value(pdata->micbias.ldoh_v,
+ pdata->micbias.cfilt2_mv);
+
+ if (IS_ERR_VALUE(k1) || IS_ERR_VALUE(k2)) {
+ rc = -EINVAL;
+ goto done;
+ }
+
+ /* Set voltage level and always use LDO */
+
+ snd_soc_update_bits(codec, SITAR_A_MICB_CFILT_1_VAL, 0xFC,
+ (k1 << 2));
+ snd_soc_update_bits(codec, SITAR_A_MICB_CFILT_2_VAL, 0xFC,
+ (k2 << 2));
+
+ snd_soc_update_bits(codec, SITAR_A_MICB_1_CTL, 0x60,
+ (pdata->micbias.bias1_cfilt_sel << 5));
+ snd_soc_update_bits(codec, SITAR_A_MICB_2_CTL, 0x60,
+ (pdata->micbias.bias2_cfilt_sel << 5));
+
+ for (i = 0; i < 6; j++, i += 2) {
+ if (flag & (0x01 << i)) {
+ value = (leg_mode & (0x01 << i)) ? 0x10 : 0x00;
+ val_txfe = (txfe_bypass & (0x01 << i)) ? 0x20 : 0x00;
+ val_txfe = val_txfe |
+ ((txfe_buff & (0x01 << i)) ? 0x10 : 0x00);
+ snd_soc_update_bits(codec, SITAR_A_TX_1_2_EN + j * 10,
+ 0x10, value);
+ snd_soc_update_bits(codec,
+ SITAR_A_TX_1_2_TEST_EN + j * 10,
+ 0x30, val_txfe);
+ }
+ if (flag & (0x01 << (i + 1))) {
+ value = (leg_mode & (0x01 << (i + 1))) ? 0x01 : 0x00;
+ val_txfe = (txfe_bypass &
+ (0x01 << (i + 1))) ? 0x02 : 0x00;
+ val_txfe |= (txfe_buff &
+ (0x01 << (i + 1))) ? 0x01 : 0x00;
+ snd_soc_update_bits(codec, SITAR_A_TX_1_2_EN + j * 10,
+ 0x01, value);
+ snd_soc_update_bits(codec,
+ SITAR_A_TX_1_2_TEST_EN + j * 10,
+ 0x03, val_txfe);
+ }
+ }
+
+ if (pdata->ocp.use_pdata) {
+ /* not defined in CODEC specification */
+ if (pdata->ocp.hph_ocp_limit == 1 ||
+ pdata->ocp.hph_ocp_limit == 5) {
+ rc = -EINVAL;
+ goto done;
+ }
+ snd_soc_update_bits(codec, SITAR_A_RX_COM_OCP_CTL,
+ 0x0F, pdata->ocp.num_attempts);
+ snd_soc_write(codec, SITAR_A_RX_COM_OCP_COUNT,
+ ((pdata->ocp.run_time << 4) | pdata->ocp.wait_time));
+ snd_soc_update_bits(codec, SITAR_A_RX_HPH_OCP_CTL,
+ 0xE0, (pdata->ocp.hph_ocp_limit << 5));
+ }
+done:
+ return rc;
+}
+
+static const struct sitar_reg_mask_val sitar_1_1_reg_defaults[] = {
+
+ /* Sitar 1.1 MICBIAS changes */
+ SITAR_REG_VAL(SITAR_A_MICB_1_INT_RBIAS, 0x24),
+ SITAR_REG_VAL(SITAR_A_MICB_2_INT_RBIAS, 0x24),
+
+ /* Sitar 1.1 HPH changes */
+ SITAR_REG_VAL(SITAR_A_RX_HPH_BIAS_PA, 0x57),
+ SITAR_REG_VAL(SITAR_A_RX_HPH_BIAS_LDO, 0x56),
+
+ /* Sitar 1.1 EAR PA changes */
+ SITAR_REG_VAL(SITAR_A_RX_EAR_BIAS_PA, 0xA6),
+ SITAR_REG_VAL(SITAR_A_RX_EAR_GAIN, 0x02),
+ SITAR_REG_VAL(SITAR_A_RX_EAR_VCM, 0x03),
+
+ /* Sitar 1.1 RX Changes */
+ SITAR_REG_VAL(SITAR_A_CDC_RX1_B5_CTL, 0x78),
+
+ /* Sitar 1.1 RX1 and RX2 Changes */
+ SITAR_REG_VAL(SITAR_A_CDC_RX1_B6_CTL, 0x80),
+
+ SITAR_REG_VAL(SITAR_A_CDC_CLSG_FREQ_THRESH_B3_CTL, 0x1B),
+
+};
+
+static void sitar_update_reg_defaults(struct snd_soc_codec *codec)
+{
+ u32 i;
+ for (i = 0; i < ARRAY_SIZE(sitar_1_1_reg_defaults); i++)
+ snd_soc_write(codec, sitar_1_1_reg_defaults[i].reg,
+ sitar_1_1_reg_defaults[i].val);
+
+}
+static const struct sitar_reg_mask_val sitar_codec_reg_init_val[] = {
+ /* Initialize current threshold to 350MA
+ * number of wait and run cycles to 4096
+ */
+ {SITAR_A_RX_HPH_OCP_CTL, 0xF8, 0x60},
+ {SITAR_A_RX_COM_OCP_COUNT, 0xFF, 0xFF},
+
+ {SITAR_A_QFUSE_CTL, 0xFF, 0x03},
+
+ /* Initialize gain registers to use register gain */
+ {SITAR_A_RX_HPH_L_GAIN, 0x10, 0x10},
+ {SITAR_A_RX_HPH_R_GAIN, 0x10, 0x10},
+ {SITAR_A_RX_LINE_1_GAIN, 0x10, 0x10},
+ {SITAR_A_RX_LINE_2_GAIN, 0x10, 0x10},
+
+ /* Initialize mic biases to differential mode */
+ {SITAR_A_MICB_1_INT_RBIAS, 0x24, 0x24},
+ {SITAR_A_MICB_2_INT_RBIAS, 0x24, 0x24},
+
+ {SITAR_A_CDC_CONN_CLSG_CTL, 0x3C, 0x14},
+
+ /* Use 16 bit sample size for TX1 to TX6 */
+ {SITAR_A_CDC_CONN_TX_SB_B1_CTL, 0x30, 0x28},
+ {SITAR_A_CDC_CONN_TX_SB_B2_CTL, 0x30, 0x20},
+ {SITAR_A_CDC_CONN_TX_SB_B3_CTL, 0x30, 0x20},
+ {SITAR_A_CDC_CONN_TX_SB_B4_CTL, 0x30, 0x20},
+ {SITAR_A_CDC_CONN_TX_SB_B5_CTL, 0x30, 0x20},
+
+ /* Use 16 bit sample size for RX */
+ {SITAR_A_CDC_CONN_RX_SB_B1_CTL, 0xFF, 0xAA},
+ {SITAR_A_CDC_CONN_RX_SB_B2_CTL, 0x02, 0x02},
+
+ /*enable HPF filter for TX paths */
+ {SITAR_A_CDC_TX1_MUX_CTL, 0x8, 0x0},
+};
+
+static void sitar_codec_init_reg(struct snd_soc_codec *codec)
+{
+ u32 i;
+
+ for (i = 0; i < ARRAY_SIZE(sitar_codec_reg_init_val); i++)
+ snd_soc_update_bits(codec, sitar_codec_reg_init_val[i].reg,
+ sitar_codec_reg_init_val[i].mask,
+ sitar_codec_reg_init_val[i].val);
+}
+
+static int sitar_codec_probe(struct snd_soc_codec *codec)
+{
+ struct sitar *control;
+ struct sitar_priv *sitar;
+ struct snd_soc_dapm_context *dapm = &codec->dapm;
+ int ret = 0;
+ int i;
+ u8 sitar_version;
+ int ch_cnt;
+
+ codec->control_data = dev_get_drvdata(codec->dev->parent);
+ control = codec->control_data;
+
+ sitar = kzalloc(sizeof(struct sitar_priv), GFP_KERNEL);
+ if (!sitar) {
+ dev_err(codec->dev, "Failed to allocate private data\n");
+ return -ENOMEM;
+ }
+
+ /* Make sure mbhc micbias register addresses are zeroed out */
+ memset(&sitar->mbhc_bias_regs, 0,
+ sizeof(struct mbhc_micbias_regs));
+ sitar->cfilt_k_value = 0;
+ sitar->mbhc_micbias_switched = false;
+
+ snd_soc_codec_set_drvdata(codec, sitar);
+
+ sitar->mclk_enabled = false;
+ sitar->bandgap_type = SITAR_BANDGAP_OFF;
+ sitar->clock_active = false;
+ sitar->config_mode_active = false;
+ sitar->mbhc_polling_active = false;
+ sitar->fake_insert_context = false;
+ sitar->no_mic_headset_override = false;
+ sitar->codec = codec;
+ sitar->pdata = dev_get_platdata(codec->dev->parent);
+ atomic_set(&sitar->pm_cnt, 1);
+ init_waitqueue_head(&sitar->pm_wq);
+
+ sitar_update_reg_defaults(codec);
+ sitar_codec_init_reg(codec);
+
+ ret = sitar_handle_pdata(sitar);
+ if (IS_ERR_VALUE(ret)) {
+ pr_err("%s: bad pdata\n", __func__);
+ goto err_pdata;
+ }
+
+ snd_soc_add_controls(codec, sitar_snd_controls,
+ ARRAY_SIZE(sitar_snd_controls));
+ snd_soc_dapm_new_controls(dapm, sitar_dapm_widgets,
+ ARRAY_SIZE(sitar_dapm_widgets));
+ snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
+
+ sitar_version = snd_soc_read(codec, WCD9XXX_A_CHIP_VERSION);
+ pr_info("%s : Sitar version reg 0x%2x\n", __func__, (u32)sitar_version);
+
+ sitar_version &= 0x1F;
+ pr_info("%s : Sitar version %u\n", __func__, (u32)sitar_version);
+
+ snd_soc_dapm_sync(dapm);
+
+
+ ret = wcd9xxx_request_irq(codec->control_data, SITAR_IRQ_MBHC_INSERTION,
+ sitar_hs_insert_irq, "Headset insert detect", sitar);
+ if (ret) {
+ pr_err("%s: Failed to request irq %d\n", __func__,
+ SITAR_IRQ_MBHC_INSERTION);
+ goto err_insert_irq;
+ }
+ wcd9xxx_disable_irq(codec->control_data, SITAR_IRQ_MBHC_INSERTION);
+
+ ret = wcd9xxx_request_irq(codec->control_data, SITAR_IRQ_MBHC_REMOVAL,
+ sitar_hs_remove_irq, "Headset remove detect", sitar);
+ if (ret) {
+ pr_err("%s: Failed to request irq %d\n", __func__,
+ SITAR_IRQ_MBHC_REMOVAL);
+ goto err_remove_irq;
+ }
+ wcd9xxx_disable_irq(codec->control_data, SITAR_IRQ_MBHC_REMOVAL);
+
+ ret = wcd9xxx_request_irq(codec->control_data, SITAR_IRQ_MBHC_POTENTIAL,
+ sitar_dce_handler, "DC Estimation detect", sitar);
+ if (ret) {
+ pr_err("%s: Failed to request irq %d\n", __func__,
+ SITAR_IRQ_MBHC_POTENTIAL);
+ goto err_potential_irq;
+ }
+ wcd9xxx_disable_irq(codec->control_data, SITAR_IRQ_MBHC_POTENTIAL);
+
+ ret = wcd9xxx_request_irq(codec->control_data, SITAR_IRQ_MBHC_RELEASE,
+ sitar_release_handler, "Button Release detect", sitar);
+ if (ret) {
+ pr_err("%s: Failed to request irq %d\n", __func__,
+ SITAR_IRQ_MBHC_RELEASE);
+ goto err_release_irq;
+ }
+ wcd9xxx_disable_irq(codec->control_data, SITAR_IRQ_MBHC_RELEASE);
+
+ ret = wcd9xxx_request_irq(codec->control_data, SITAR_IRQ_SLIMBUS,
+ sitar_slimbus_irq, "SLIMBUS Slave", sitar);
+ if (ret) {
+ pr_err("%s: Failed to request irq %d\n", __func__,
+ SITAR_IRQ_SLIMBUS);
+ goto err_slimbus_irq;
+ }
+
+ for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++)
+ wcd9xxx_interface_reg_write(codec->control_data,
+ SITAR_SLIM_PGD_PORT_INT_EN0 + i, 0xFF);
+
+
+ ret = wcd9xxx_request_irq(codec->control_data,
+ SITAR_IRQ_HPH_PA_OCPL_FAULT, sitar_hphl_ocp_irq,
+ "HPH_L OCP detect", sitar);
+ if (ret) {
+ pr_err("%s: Failed to request irq %d\n", __func__,
+ SITAR_IRQ_HPH_PA_OCPL_FAULT);
+ goto err_hphl_ocp_irq;
+ }
+ wcd9xxx_disable_irq(codec->control_data, SITAR_IRQ_HPH_PA_OCPL_FAULT);
+
+ ret = wcd9xxx_request_irq(codec->control_data,
+ SITAR_IRQ_HPH_PA_OCPR_FAULT, sitar_hphr_ocp_irq,
+ "HPH_R OCP detect", sitar);
+ if (ret) {
+ pr_err("%s: Failed to request irq %d\n", __func__,
+ SITAR_IRQ_HPH_PA_OCPR_FAULT);
+ goto err_hphr_ocp_irq;
+ }
+ wcd9xxx_disable_irq(codec->control_data, SITAR_IRQ_HPH_PA_OCPR_FAULT);
+
+ for (i = 0; i < ARRAY_SIZE(sitar_dai); i++) {
+ switch (sitar_dai[i].id) {
+ case AIF1_PB:
+ ch_cnt = sitar_dai[i].playback.channels_max;
+ break;
+ case AIF1_CAP:
+ ch_cnt = sitar_dai[i].capture.channels_max;
+ break;
+ default:
+ continue;
+ }
+ sitar->dai[i].ch_num = kzalloc((sizeof(unsigned int)*
+ ch_cnt), GFP_KERNEL);
+ }
+
+#ifdef CONFIG_DEBUG_FS
+ debug_sitar_priv = sitar;
+#endif
+
+ return ret;
+
+err_hphr_ocp_irq:
+ wcd9xxx_free_irq(codec->control_data,
+ SITAR_IRQ_HPH_PA_OCPL_FAULT, sitar);
+err_hphl_ocp_irq:
+ wcd9xxx_free_irq(codec->control_data,
+ SITAR_IRQ_SLIMBUS, sitar);
+err_slimbus_irq:
+ wcd9xxx_free_irq(codec->control_data,
+ SITAR_IRQ_MBHC_RELEASE, sitar);
+err_release_irq:
+ wcd9xxx_free_irq(codec->control_data,
+ SITAR_IRQ_MBHC_POTENTIAL, sitar);
+err_potential_irq:
+ wcd9xxx_free_irq(codec->control_data,
+ SITAR_IRQ_MBHC_REMOVAL, sitar);
+err_remove_irq:
+ wcd9xxx_free_irq(codec->control_data,
+ SITAR_IRQ_MBHC_INSERTION, sitar);
+err_insert_irq:
+err_pdata:
+ kfree(sitar);
+ return ret;
+}
+static int sitar_codec_remove(struct snd_soc_codec *codec)
+{
+ int i;
+ struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
+ wcd9xxx_free_irq(codec->control_data, SITAR_IRQ_SLIMBUS, sitar);
+ wcd9xxx_free_irq(codec->control_data, SITAR_IRQ_MBHC_RELEASE, sitar);
+ wcd9xxx_free_irq(codec->control_data, SITAR_IRQ_MBHC_POTENTIAL, sitar);
+ wcd9xxx_free_irq(codec->control_data, SITAR_IRQ_MBHC_REMOVAL, sitar);
+ wcd9xxx_free_irq(codec->control_data, SITAR_IRQ_MBHC_INSERTION, sitar);
+ sitar_codec_disable_clock_block(codec);
+ sitar_codec_enable_bandgap(codec, SITAR_BANDGAP_OFF);
+ for (i = 0; i < ARRAY_SIZE(sitar_dai); i++)
+ kfree(sitar->dai[i].ch_num);
+ kfree(sitar);
+ return 0;
+}
+static struct snd_soc_codec_driver soc_codec_dev_sitar = {
+ .probe = sitar_codec_probe,
+ .remove = sitar_codec_remove,
+ .read = sitar_read,
+ .write = sitar_write,
+
+ .readable_register = sitar_readable,
+ .volatile_register = sitar_volatile,
+
+ .reg_cache_size = SITAR_CACHE_SIZE,
+ .reg_cache_default = sitar_reg_defaults,
+ .reg_word_size = 1,
+};
+
+#ifdef CONFIG_DEBUG_FS
+static struct dentry *debugfs_poke;
+
+static int codec_debug_open(struct inode *inode, struct file *file)
+{
+ file->private_data = inode->i_private;
+ return 0;
+}
+
+static ssize_t codec_debug_write(struct file *filp,
+ const char __user *ubuf, size_t cnt, loff_t *ppos)
+{
+ char lbuf[32];
+ char *buf;
+ int rc;
+
+ if (cnt > sizeof(lbuf) - 1)
+ return -EINVAL;
+
+ rc = copy_from_user(lbuf, ubuf, cnt);
+ if (rc)
+ return -EFAULT;
+
+ lbuf[cnt] = '\0';
+ buf = (char *)lbuf;
+ debug_sitar_priv->no_mic_headset_override = (*strsep(&buf, " ") == '0')
+ ? false : true;
+
+ return rc;
+}
+
+static const struct file_operations codec_debug_ops = {
+ .open = codec_debug_open,
+ .write = codec_debug_write,
+};
+#endif
+
+#ifdef CONFIG_PM
+static int sitar_suspend(struct device *dev)
+{
+ dev_dbg(dev, "%s: system suspend\n", __func__);
+ return 0;
+}
+
+static int sitar_resume(struct device *dev)
+{
+ dev_dbg(dev, "%s: system resume\n", __func__);
+ return 0;
+}
+
+static const struct dev_pm_ops sitar_pm_ops = {
+ .suspend = sitar_suspend,
+ .resume = sitar_resume,
+};
+#endif
+
+static int __devinit sitar_probe(struct platform_device *pdev)
+{
+ int ret = 0;
+ pr_err("%s\n", __func__);
+#ifdef CONFIG_DEBUG_FS
+ debugfs_poke = debugfs_create_file("TRRS",
+ S_IFREG | S_IRUGO, NULL, (void *) "TRRS", &codec_debug_ops);
+
+#endif
+ ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_sitar,
+ sitar_dai, ARRAY_SIZE(sitar_dai));
+ return ret;
+}
+static int __devexit sitar_remove(struct platform_device *pdev)
+{
+ snd_soc_unregister_codec(&pdev->dev);
+
+#ifdef CONFIG_DEBUG_FS
+ debugfs_remove(debugfs_poke);
+#endif
+ return 0;
+}
+static struct platform_driver sitar_codec_driver = {
+ .probe = sitar_probe,
+ .remove = sitar_remove,
+ .driver = {
+ .name = "sitar_codec",
+ .owner = THIS_MODULE,
+#ifdef CONFIG_PM
+ .pm = &sitar_pm_ops,
+#endif
+ },
+};
+
+static int __init sitar_codec_init(void)
+{
+ return platform_driver_register(&sitar_codec_driver);
+}
+
+static void __exit sitar_codec_exit(void)
+{
+ platform_driver_unregister(&sitar_codec_driver);
+}
+
+module_init(sitar_codec_init);
+module_exit(sitar_codec_exit);
+
+MODULE_DESCRIPTION("Sitar codec driver");
+MODULE_VERSION("1.0");
+MODULE_LICENSE("GPL v2");
diff --git a/sound/soc/codecs/wcd9304.h b/sound/soc/codecs/wcd9304.h
new file mode 100644
index 0000000..07a1ca0
--- /dev/null
+++ b/sound/soc/codecs/wcd9304.h
@@ -0,0 +1,72 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <sound/soc.h>
+#include <linux/mfd/wcd9xxx/wcd9xxx-slimslave.h>
+
+#define SITAR_VERSION_1_0 0x00
+
+#define SITAR_NUM_REGISTERS 0x3E0
+#define SITAR_MAX_REGISTER (SITAR_NUM_REGISTERS-1)
+#define SITAR_CACHE_SIZE SITAR_NUM_REGISTERS
+
+#define SITAR_REG_VAL(reg, val) {reg, 0, val}
+
+/* Local to the core only */
+#define SITAR_SLIM_MAX_RX_PORTS 5
+#define SITAR_SLIM_MAX_TX_PORTS 5
+
+extern const u8 sitar_reg_readable[SITAR_CACHE_SIZE];
+extern const u8 sitar_reg_defaults[SITAR_CACHE_SIZE];
+
+enum sitar_micbias_num {
+ SITAR_MICBIAS1,
+ SITAR_MICBIAS2,
+};
+
+enum sitar_pid_current {
+ SITAR_PID_MIC_2P5_UA,
+ SITAR_PID_MIC_5_UA,
+ SITAR_PID_MIC_10_UA,
+ SITAR_PID_MIC_20_UA,
+};
+
+struct sitar_mbhc_calibration {
+ enum sitar_micbias_num bias;
+ int tldoh;
+ int bg_fast_settle;
+ enum sitar_pid_current mic_current;
+ int mic_pid;
+ enum sitar_pid_current hph_current;
+ int setup_plug_removal_delay;
+ int shutdown_plug_removal;
+};
+
+struct sitar_reg_mask_val {
+ u16 reg;
+ u8 mask;
+ u8 val;
+};
+
+extern int sitar_hs_detect(struct snd_soc_codec *codec,
+ struct snd_soc_jack *headset_jack, struct snd_soc_jack *button_jack,
+ struct sitar_mbhc_calibration *calibration);
+
+#ifndef anc_header_dec
+struct anc_header {
+ u32 reserved[3];
+ u32 num_anc_slots;
+};
+#define anc_header_dec
+#endif
+
+extern int sitar_mclk_enable(struct snd_soc_codec *codec, int mclk_enable);
diff --git a/sound/soc/codecs/wcd9310-tables.c b/sound/soc/codecs/wcd9310-tables.c
index c681771..2cba59d 100644
--- a/sound/soc/codecs/wcd9310-tables.c
+++ b/sound/soc/codecs/wcd9310-tables.c
@@ -10,7 +10,7 @@
* GNU General Public License for more details.
*/
-#include <linux/mfd/wcd9310/registers.h>
+#include <linux/mfd/wcd9xxx/wcd9310_registers.h>
#include "wcd9310.h"
const u8 tabla_reg_readable[TABLA_CACHE_SIZE] = {
@@ -451,6 +451,22 @@
[TABLA_A_CDC_DEBUG_B4_CTL] = 1,
[TABLA_A_CDC_DEBUG_B5_CTL] = 1,
[TABLA_A_CDC_DEBUG_B6_CTL] = 1,
+ [TABLA_A_CDC_COMP1_B1_CTL] = 1,
+ [TABLA_A_CDC_COMP1_B2_CTL] = 1,
+ [TABLA_A_CDC_COMP1_B3_CTL] = 1,
+ [TABLA_A_CDC_COMP1_B4_CTL] = 1,
+ [TABLA_A_CDC_COMP1_B5_CTL] = 1,
+ [TABLA_A_CDC_COMP1_B6_CTL] = 1,
+ [TABLA_A_CDC_COMP1_SHUT_DOWN_STATUS] = 1,
+ [TABLA_A_CDC_COMP1_FS_CFG] = 1,
+ [TABLA_A_CDC_COMP2_B1_CTL] = 1,
+ [TABLA_A_CDC_COMP2_B2_CTL] = 1,
+ [TABLA_A_CDC_COMP2_B3_CTL] = 1,
+ [TABLA_A_CDC_COMP2_B4_CTL] = 1,
+ [TABLA_A_CDC_COMP2_B5_CTL] = 1,
+ [TABLA_A_CDC_COMP2_B6_CTL] = 1,
+ [TABLA_A_CDC_COMP2_SHUT_DOWN_STATUS] = 1,
+ [TABLA_A_CDC_COMP2_FS_CFG] = 1,
[TABLA_A_CDC_CONN_RX1_B1_CTL] = 1,
[TABLA_A_CDC_CONN_RX1_B2_CTL] = 1,
[TABLA_A_CDC_CONN_RX1_B3_CTL] = 1,
@@ -993,6 +1009,24 @@
[TABLA_A_CDC_DEBUG_B4_CTL] = TABLA_A_CDC_DEBUG_B4_CTL__POR,
[TABLA_A_CDC_DEBUG_B5_CTL] = TABLA_A_CDC_DEBUG_B5_CTL__POR,
[TABLA_A_CDC_DEBUG_B6_CTL] = TABLA_A_CDC_DEBUG_B6_CTL__POR,
+ [TABLA_A_CDC_COMP1_B1_CTL] = TABLA_A_CDC_COMP1_B1_CTL__POR,
+ [TABLA_A_CDC_COMP1_B2_CTL] = TABLA_A_CDC_COMP1_B2_CTL__POR,
+ [TABLA_A_CDC_COMP1_B3_CTL] = TABLA_A_CDC_COMP1_B3_CTL__POR,
+ [TABLA_A_CDC_COMP1_B4_CTL] = TABLA_A_CDC_COMP1_B4_CTL__POR,
+ [TABLA_A_CDC_COMP1_B5_CTL] = TABLA_A_CDC_COMP1_B5_CTL__POR,
+ [TABLA_A_CDC_COMP1_B6_CTL] = TABLA_A_CDC_COMP1_B6_CTL__POR,
+ [TABLA_A_CDC_COMP1_SHUT_DOWN_STATUS] =
+ TABLA_A_CDC_COMP1_SHUT_DOWN_STATUS__POR,
+ [TABLA_A_CDC_COMP1_FS_CFG] = TABLA_A_CDC_COMP1_FS_CFG__POR,
+ [TABLA_A_CDC_COMP2_B1_CTL] = TABLA_A_CDC_COMP2_B1_CTL__POR,
+ [TABLA_A_CDC_COMP2_B2_CTL] = TABLA_A_CDC_COMP2_B2_CTL__POR,
+ [TABLA_A_CDC_COMP2_B3_CTL] = TABLA_A_CDC_COMP2_B3_CTL__POR,
+ [TABLA_A_CDC_COMP2_B4_CTL] = TABLA_A_CDC_COMP2_B4_CTL__POR,
+ [TABLA_A_CDC_COMP2_B5_CTL] = TABLA_A_CDC_COMP2_B5_CTL__POR,
+ [TABLA_A_CDC_COMP2_B6_CTL] = TABLA_A_CDC_COMP2_B6_CTL__POR,
+ [TABLA_A_CDC_COMP1_SHUT_DOWN_STATUS] =
+ TABLA_A_CDC_COMP1_SHUT_DOWN_STATUS__POR,
+ [TABLA_A_CDC_COMP2_FS_CFG] = TABLA_A_CDC_COMP2_FS_CFG__POR,
[TABLA_A_CDC_CONN_RX1_B1_CTL] = TABLA_A_CDC_CONN_RX1_B1_CTL__POR,
[TABLA_A_CDC_CONN_RX1_B2_CTL] = TABLA_A_CDC_CONN_RX1_B2_CTL__POR,
[TABLA_A_CDC_CONN_RX1_B3_CTL] = TABLA_A_CDC_CONN_RX1_B3_CTL__POR,
diff --git a/sound/soc/codecs/wcd9310.c b/sound/soc/codecs/wcd9310.c
index 46f6461..828aaca 100644
--- a/sound/soc/codecs/wcd9310.c
+++ b/sound/soc/codecs/wcd9310.c
@@ -18,9 +18,10 @@
#include <linux/printk.h>
#include <linux/ratelimit.h>
#include <linux/debugfs.h>
-#include <linux/mfd/wcd9310/core.h>
-#include <linux/mfd/wcd9310/registers.h>
-#include <linux/mfd/wcd9310/pdata.h>
+#include <linux/mfd/wcd9xxx/core.h>
+#include <linux/mfd/wcd9xxx/wcd9xxx_registers.h>
+#include <linux/mfd/wcd9xxx/wcd9310_registers.h>
+#include <linux/mfd/wcd9xxx/pdata.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
@@ -28,6 +29,7 @@
#include <sound/tlv.h>
#include <linux/bitops.h>
#include <linux/delay.h>
+#include <linux/pm_runtime.h>
#include "wcd9310.h"
#define WCD9310_RATES (SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|\
@@ -51,6 +53,7 @@
#define AIF1_CAP 2
#define AIF2_PB 3
#define NUM_CODEC_DAIS 3
+#define TABLA_COMP_DIGITAL_GAIN_OFFSET 3
struct tabla_codec_dai_data {
u32 rate;
@@ -69,6 +72,7 @@
static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
static struct snd_soc_dai_driver tabla_dai[];
+static const DECLARE_TLV_DB_SCALE(aux_pga_gain, 0, 2, 0);
enum tabla_bandgap_type {
TABLA_BANDGAP_OFF = 0,
@@ -101,6 +105,20 @@
BAND_MAX,
};
+enum {
+ COMPANDER_1 = 0,
+ COMPANDER_2,
+ COMPANDER_MAX,
+};
+
+enum {
+ COMPANDER_FS_8KHZ = 0,
+ COMPANDER_FS_16KHZ,
+ COMPANDER_FS_32KHZ,
+ COMPANDER_FS_48KHZ,
+ COMPANDER_FS_MAX,
+};
+
/* Flags to track of PA and DAC state.
* PA and DAC should be tracked separately as AUXPGA loopback requires
* only PA to be turned on without DAC being on. */
@@ -111,6 +129,13 @@
TABLA_HPHR_DAC_OFF_ACK
};
+
+struct comp_sample_dependent_params {
+ u32 peak_det_timeout;
+ u32 rms_meter_div_fact;
+ u32 rms_meter_resamp_fact;
+};
+
/* Data used by MBHC */
struct mbhc_internal_cal_data {
u16 dce_z;
@@ -171,7 +196,7 @@
struct snd_soc_jack *headset_jack;
struct snd_soc_jack *button_jack;
- struct tabla_pdata *pdata;
+ struct wcd9xxx_pdata *pdata;
u32 anc_slot;
bool no_mic_headset_override;
@@ -208,12 +233,61 @@
/* num of slim ports required */
struct tabla_codec_dai_data dai[NUM_CODEC_DAIS];
+
+ /*compander*/
+ int comp_enabled[COMPANDER_MAX];
+ u32 comp_fs[COMPANDER_MAX];
+
+ /* Maintain the status of AUX PGA */
+ int aux_pga_cnt;
+ u8 aux_l_gain;
+ u8 aux_r_gain;
};
#ifdef CONFIG_DEBUG_FS
struct tabla_priv *debug_tabla_priv;
#endif
+static const u32 comp_shift[] = {
+ 0,
+ 2,
+};
+
+static const int comp_rx_path[] = {
+ COMPANDER_1,
+ COMPANDER_1,
+ COMPANDER_2,
+ COMPANDER_2,
+ COMPANDER_2,
+ COMPANDER_2,
+ COMPANDER_MAX,
+};
+
+static const struct comp_sample_dependent_params comp_samp_params[] = {
+ {
+ .peak_det_timeout = 0x2,
+ .rms_meter_div_fact = 0x8 << 4,
+ .rms_meter_resamp_fact = 0x21,
+ },
+ {
+ .peak_det_timeout = 0x3,
+ .rms_meter_div_fact = 0x9 << 4,
+ .rms_meter_resamp_fact = 0x28,
+ },
+
+ {
+ .peak_det_timeout = 0x5,
+ .rms_meter_div_fact = 0xB << 4,
+ .rms_meter_resamp_fact = 0x28,
+ },
+
+ {
+ .peak_det_timeout = 0x5,
+ .rms_meter_div_fact = 0xB << 4,
+ .rms_meter_resamp_fact = 0x28,
+ },
+};
+
static int tabla_codec_enable_charge_pump(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
@@ -477,6 +551,192 @@
return 0;
}
+static int tabla_compander_gain_offset(
+ struct snd_soc_codec *codec, u32 enable,
+ unsigned int reg, int mask, int event)
+{
+ int pa_mode = snd_soc_read(codec, reg) & mask;
+ int gain_offset = 0;
+ /* if PMU && enable is 1-> offset is 3
+ * if PMU && enable is 0-> offset is 0
+ * if PMD && pa_mode is PA -> offset is 0: PMU compander is off
+ * if PMD && pa_mode is comp -> offset is -3: PMU compander is on.
+ */
+
+ if (SND_SOC_DAPM_EVENT_ON(event) && (enable != 0))
+ gain_offset = TABLA_COMP_DIGITAL_GAIN_OFFSET;
+ if (SND_SOC_DAPM_EVENT_OFF(event) && (pa_mode == 0))
+ gain_offset = -TABLA_COMP_DIGITAL_GAIN_OFFSET;
+ return gain_offset;
+}
+
+
+static int tabla_config_gain_compander(
+ struct snd_soc_codec *codec,
+ u32 compander, u32 enable, int event)
+{
+ int value = 0;
+ int mask = 1 << 4;
+ int gain = 0;
+ int gain_offset;
+ if (compander >= COMPANDER_MAX) {
+ pr_err("%s: Error, invalid compander channel\n", __func__);
+ return -EINVAL;
+ }
+
+ if ((enable == 0) || SND_SOC_DAPM_EVENT_OFF(event))
+ value = 1 << 4;
+
+ if (compander == COMPANDER_1) {
+ gain_offset = tabla_compander_gain_offset(codec, enable,
+ TABLA_A_RX_HPH_L_GAIN, mask, event);
+ snd_soc_update_bits(codec, TABLA_A_RX_HPH_L_GAIN, mask, value);
+ gain = snd_soc_read(codec, TABLA_A_CDC_RX1_VOL_CTL_B2_CTL);
+ snd_soc_update_bits(codec, TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
+ 0xFF, gain - gain_offset);
+ gain_offset = tabla_compander_gain_offset(codec, enable,
+ TABLA_A_RX_HPH_R_GAIN, mask, event);
+ snd_soc_update_bits(codec, TABLA_A_RX_HPH_R_GAIN, mask, value);
+ gain = snd_soc_read(codec, TABLA_A_CDC_RX2_VOL_CTL_B2_CTL);
+ snd_soc_update_bits(codec, TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
+ 0xFF, gain - gain_offset);
+ } else if (compander == COMPANDER_2) {
+ gain_offset = tabla_compander_gain_offset(codec, enable,
+ TABLA_A_RX_LINE_1_GAIN, mask, event);
+ snd_soc_update_bits(codec, TABLA_A_RX_LINE_1_GAIN, mask, value);
+ gain = snd_soc_read(codec, TABLA_A_CDC_RX3_VOL_CTL_B2_CTL);
+ snd_soc_update_bits(codec, TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
+ 0xFF, gain - gain_offset);
+ gain_offset = tabla_compander_gain_offset(codec, enable,
+ TABLA_A_RX_LINE_3_GAIN, mask, event);
+ snd_soc_update_bits(codec, TABLA_A_RX_LINE_3_GAIN, mask, value);
+ gain = snd_soc_read(codec, TABLA_A_CDC_RX4_VOL_CTL_B2_CTL);
+ snd_soc_update_bits(codec, TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
+ 0xFF, gain - gain_offset);
+ gain_offset = tabla_compander_gain_offset(codec, enable,
+ TABLA_A_RX_LINE_2_GAIN, mask, event);
+ snd_soc_update_bits(codec, TABLA_A_RX_LINE_2_GAIN, mask, value);
+ gain = snd_soc_read(codec, TABLA_A_CDC_RX5_VOL_CTL_B2_CTL);
+ snd_soc_update_bits(codec, TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
+ 0xFF, gain - gain_offset);
+ gain_offset = tabla_compander_gain_offset(codec, enable,
+ TABLA_A_RX_LINE_4_GAIN, mask, event);
+ snd_soc_update_bits(codec, TABLA_A_RX_LINE_4_GAIN, mask, value);
+ gain = snd_soc_read(codec, TABLA_A_CDC_RX6_VOL_CTL_B2_CTL);
+ snd_soc_update_bits(codec, TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
+ 0xFF, gain - gain_offset);
+ }
+ return 0;
+}
+static int tabla_get_compander(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ int comp = ((struct soc_multi_mixer_control *)
+ kcontrol->private_value)->max;
+ struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
+
+ ucontrol->value.integer.value[0] = tabla->comp_enabled[comp];
+
+ return 0;
+}
+
+static int tabla_set_compander(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
+ int comp = ((struct soc_multi_mixer_control *)
+ kcontrol->private_value)->max;
+ int value = ucontrol->value.integer.value[0];
+
+ if (value == tabla->comp_enabled[comp]) {
+ pr_debug("%s: compander #%d enable %d no change\n",
+ __func__, comp, value);
+ return 0;
+ }
+ tabla->comp_enabled[comp] = value;
+ return 0;
+}
+
+
+static int tabla_config_compander(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol,
+ int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+ struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
+ u32 rate = tabla->comp_fs[w->shift];
+
+ switch (event) {
+ case SND_SOC_DAPM_PRE_PMU:
+ if (tabla->comp_enabled[w->shift] != 0) {
+ /* Enable both L/R compander clocks */
+ snd_soc_update_bits(codec,
+ TABLA_A_CDC_CLK_RX_B2_CTL,
+ 0x03 << comp_shift[w->shift],
+ 0x03 << comp_shift[w->shift]);
+ /* Clar the HALT for the compander*/
+ snd_soc_update_bits(codec,
+ TABLA_A_CDC_COMP1_B1_CTL +
+ w->shift * 8, 1 << 2, 0);
+ /* Toggle compander reset bits*/
+ snd_soc_update_bits(codec,
+ TABLA_A_CDC_CLK_OTHR_RESET_CTL,
+ 0x03 << comp_shift[w->shift],
+ 0x03 << comp_shift[w->shift]);
+ snd_soc_update_bits(codec,
+ TABLA_A_CDC_CLK_OTHR_RESET_CTL,
+ 0x03 << comp_shift[w->shift], 0);
+ tabla_config_gain_compander(codec, w->shift, 1, event);
+ /* Update the RMS meter resampling*/
+ snd_soc_update_bits(codec,
+ TABLA_A_CDC_COMP1_B3_CTL +
+ w->shift * 8, 0xFF, 0x01);
+ /* Wait for 1ms*/
+ usleep_range(1000, 1000);
+ }
+ break;
+ case SND_SOC_DAPM_POST_PMU:
+ /* Set sample rate dependent paramater*/
+ if (tabla->comp_enabled[w->shift] != 0) {
+ snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_FS_CFG +
+ w->shift * 8, 0x03, rate);
+ snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B2_CTL +
+ w->shift * 8, 0x0F,
+ comp_samp_params[rate].peak_det_timeout);
+ snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B2_CTL +
+ w->shift * 8, 0xF0,
+ comp_samp_params[rate].rms_meter_div_fact);
+ snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B3_CTL +
+ w->shift * 8, 0xFF,
+ comp_samp_params[rate].rms_meter_resamp_fact);
+ /* Compander enable -> 0x370/0x378*/
+ snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
+ w->shift * 8, 0x03, 0x03);
+ }
+ break;
+ case SND_SOC_DAPM_PRE_PMD:
+ /* Halt the compander*/
+ snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
+ w->shift * 8, 1 << 2, 1 << 2);
+ break;
+ case SND_SOC_DAPM_POST_PMD:
+ /* Restore the gain */
+ tabla_config_gain_compander(codec, w->shift,
+ tabla->comp_enabled[w->shift], event);
+ /* Disable the compander*/
+ snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
+ w->shift * 8, 0x03, 0x00);
+ /* Turn off the clock for compander in pair*/
+ snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_B2_CTL,
+ 0x03 << comp_shift[w->shift], 0);
+ break;
+ }
+ return 0;
+}
+
static const char *tabla_ear_pa_gain_text[] = {"POS_6_DB", "POS_2_DB"};
static const struct soc_enum tabla_ear_pa_gain_enum[] = {
SOC_ENUM_SINGLE_EXT(2, tabla_ear_pa_gain_text),
@@ -609,6 +869,11 @@
SOC_SINGLE_TLV("ADC5 Volume", TABLA_A_TX_5_6_EN, 5, 3, 0, analog_gain),
SOC_SINGLE_TLV("ADC6 Volume", TABLA_A_TX_5_6_EN, 1, 3, 0, analog_gain),
+ SOC_SINGLE_TLV("AUX_PGA_LEFT Volume", TABLA_A_AUX_L_GAIN, 0, 39, 0,
+ aux_pga_gain),
+ SOC_SINGLE_TLV("AUX_PGA_RIGHT Volume", TABLA_A_AUX_R_GAIN, 0, 39, 0,
+ aux_pga_gain),
+
SOC_SINGLE("MICBIAS1 CAPLESS Switch", TABLA_A_MICB_1_CTL, 4, 1, 1),
SOC_SINGLE("MICBIAS2 CAPLESS Switch", TABLA_A_MICB_2_CTL, 4, 1, 1),
SOC_SINGLE("MICBIAS3 CAPLESS Switch", TABLA_A_MICB_3_CTL, 4, 1, 1),
@@ -694,6 +959,10 @@
tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
SOC_SINGLE_MULTI_EXT("IIR2 Band5", IIR2, BAND5, 255, 0, 5,
tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
+ SOC_SINGLE_EXT("COMP1 Switch", SND_SOC_NOPM, 1, COMPANDER_1, 0,
+ tabla_get_compander, tabla_set_compander),
+ SOC_SINGLE_EXT("COMP2 Switch", SND_SOC_NOPM, 0, COMPANDER_2, 0,
+ tabla_get_compander, tabla_set_compander),
};
static const struct snd_kcontrol_new tabla_1_x_snd_controls[] = {
@@ -1020,6 +1289,94 @@
SOC_DAPM_SINGLE("Switch", TABLA_A_RX_HPH_L_DAC_CTL, 6, 1, 0)
};
+static const struct snd_kcontrol_new hphl_pa_mix[] = {
+ SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
+ 7, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
+ 7, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
+ TABLA_A_AUX_L_PA_CONN_INV, 7, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
+ TABLA_A_AUX_R_PA_CONN_INV, 7, 1, 0),
+};
+
+static const struct snd_kcontrol_new hphr_pa_mix[] = {
+ SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
+ 6, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
+ 6, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
+ TABLA_A_AUX_L_PA_CONN_INV, 6, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
+ TABLA_A_AUX_R_PA_CONN_INV, 6, 1, 0),
+};
+
+static const struct snd_kcontrol_new lineout1_pa_mix[] = {
+ SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
+ 5, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
+ 5, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
+ TABLA_A_AUX_L_PA_CONN_INV, 5, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
+ TABLA_A_AUX_R_PA_CONN_INV, 5, 1, 0),
+};
+
+static const struct snd_kcontrol_new lineout2_pa_mix[] = {
+ SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
+ 4, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
+ 4, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
+ TABLA_A_AUX_L_PA_CONN_INV, 4, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
+ TABLA_A_AUX_R_PA_CONN_INV, 4, 1, 0),
+};
+
+static const struct snd_kcontrol_new lineout3_pa_mix[] = {
+ SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
+ 3, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
+ 3, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
+ TABLA_A_AUX_L_PA_CONN_INV, 3, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
+ TABLA_A_AUX_R_PA_CONN_INV, 3, 1, 0),
+};
+
+static const struct snd_kcontrol_new lineout4_pa_mix[] = {
+ SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
+ 2, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
+ 2, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
+ TABLA_A_AUX_L_PA_CONN_INV, 2, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
+ TABLA_A_AUX_R_PA_CONN_INV, 2, 1, 0),
+};
+
+static const struct snd_kcontrol_new lineout5_pa_mix[] = {
+ SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
+ 1, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
+ 1, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
+ TABLA_A_AUX_L_PA_CONN_INV, 1, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
+ TABLA_A_AUX_R_PA_CONN_INV, 1, 1, 0),
+};
+
+static const struct snd_kcontrol_new ear_pa_mix[] = {
+ SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
+ 0, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
+ 0, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
+ TABLA_A_AUX_L_PA_CONN_INV, 0, 1, 0),
+ SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
+ TABLA_A_AUX_R_PA_CONN_INV, 0, 1, 0),
+};
+
static const struct snd_kcontrol_new lineout3_ground_switch =
SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_3_DAC_CTL, 6, 1, 0);
@@ -1099,6 +1456,260 @@
return 0;
}
+static void tabla_codec_enable_audio_mode_bandgap(struct snd_soc_codec *codec)
+{
+ snd_soc_write(codec, TABLA_A_BIAS_REF_CTL, 0x1C);
+ snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
+ 0x80);
+ snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x04,
+ 0x04);
+ snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
+ 0x01);
+ usleep_range(1000, 1000);
+ snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
+ 0x00);
+}
+
+static void tabla_codec_enable_bandgap(struct snd_soc_codec *codec,
+ enum tabla_bandgap_type choice)
+{
+ struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
+
+ /* TODO lock resources accessed by audio streams and threaded
+ * interrupt handlers
+ */
+
+ pr_debug("%s, choice is %d, current is %d\n", __func__, choice,
+ tabla->bandgap_type);
+
+ if (tabla->bandgap_type == choice)
+ return;
+
+ if ((tabla->bandgap_type == TABLA_BANDGAP_OFF) &&
+ (choice == TABLA_BANDGAP_AUDIO_MODE)) {
+ tabla_codec_enable_audio_mode_bandgap(codec);
+ } else if (choice == TABLA_BANDGAP_MBHC_MODE) {
+ snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x2,
+ 0x2);
+ snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
+ 0x80);
+ snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x4,
+ 0x4);
+ snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
+ 0x01);
+ usleep_range(1000, 1000);
+ snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
+ 0x00);
+ } else if ((tabla->bandgap_type == TABLA_BANDGAP_MBHC_MODE) &&
+ (choice == TABLA_BANDGAP_AUDIO_MODE)) {
+ snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
+ usleep_range(100, 100);
+ tabla_codec_enable_audio_mode_bandgap(codec);
+ } else if (choice == TABLA_BANDGAP_OFF) {
+ snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
+ } else {
+ pr_err("%s: Error, Invalid bandgap settings\n", __func__);
+ }
+ tabla->bandgap_type = choice;
+}
+
+static void tabla_codec_disable_clock_block(struct snd_soc_codec *codec)
+{
+ struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
+ pr_debug("%s\n", __func__);
+ snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x00);
+ ndelay(160);
+ snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x02);
+ snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x00);
+ tabla->clock_active = false;
+}
+
+static int tabla_codec_mclk_index(const struct tabla_priv *tabla)
+{
+ if (tabla->mclk_freq == TABLA_MCLK_RATE_12288KHZ)
+ return 0;
+ else if (tabla->mclk_freq == TABLA_MCLK_RATE_9600KHZ)
+ return 1;
+ else {
+ BUG_ON(1);
+ return -EINVAL;
+ }
+}
+
+static void tabla_enable_rx_bias(struct snd_soc_codec *codec, u32 enable)
+{
+ struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
+
+ if (enable) {
+ tabla->rx_bias_count++;
+ if (tabla->rx_bias_count == 1)
+ snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
+ 0x80, 0x80);
+ } else {
+ tabla->rx_bias_count--;
+ if (!tabla->rx_bias_count)
+ snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
+ 0x80, 0x00);
+ }
+}
+
+static int tabla_codec_enable_config_mode(struct snd_soc_codec *codec,
+ int enable)
+{
+ struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
+
+ pr_debug("%s: enable = %d\n", __func__, enable);
+ if (enable) {
+ snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x10, 0);
+ snd_soc_write(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x17);
+ usleep_range(5, 5);
+ snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80,
+ 0x80);
+ snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80,
+ 0x80);
+ usleep_range(10, 10);
+ snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80, 0);
+ usleep_range(20, 20);
+ snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x08);
+ } else {
+ snd_soc_update_bits(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x1,
+ 0);
+ snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80, 0);
+ snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x00);
+ }
+ tabla->config_mode_active = enable ? true : false;
+
+ return 0;
+}
+
+static int tabla_codec_enable_clock_block(struct snd_soc_codec *codec,
+ int config_mode)
+{
+ struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
+
+ pr_debug("%s: config_mode = %d\n", __func__, config_mode);
+
+ if (config_mode) {
+ tabla_codec_enable_config_mode(codec, 1);
+ snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x00);
+ snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
+ snd_soc_write(codec, TABLA_A_CLK_BUFF_EN1, 0x0D);
+ usleep_range(1000, 1000);
+ } else
+ snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x00);
+
+ if (!config_mode && tabla->mbhc_polling_active) {
+ snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
+ tabla_codec_enable_config_mode(codec, 0);
+
+ }
+
+ snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x05);
+ snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x00);
+ snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x04);
+ snd_soc_update_bits(codec, TABLA_A_CDC_CLK_MCLK_CTL, 0x01, 0x01);
+ usleep_range(50, 50);
+ tabla->clock_active = true;
+ return 0;
+}
+
+static int tabla_codec_enable_aux_pga(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+ struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
+
+ pr_debug("%s: %d\n", __func__, event);
+
+ switch (event) {
+ case SND_SOC_DAPM_PRE_PMU:
+ tabla_codec_enable_bandgap(codec,
+ TABLA_BANDGAP_AUDIO_MODE);
+ tabla_enable_rx_bias(codec, 1);
+
+ snd_soc_update_bits(codec, TABLA_A_AUX_COM_CTL,
+ 0x08, 0x08);
+ /* Enable Zero Cross detect for AUX PGA channel
+ * and set the initial AUX PGA gain to NEG_0P0_DB
+ * to avoid glitches.
+ */
+ if (w->reg == TABLA_A_AUX_L_EN) {
+ snd_soc_update_bits(codec, TABLA_A_AUX_L_EN,
+ 0x20, 0x20);
+ tabla->aux_l_gain = snd_soc_read(codec,
+ TABLA_A_AUX_L_GAIN);
+ snd_soc_write(codec, TABLA_A_AUX_L_GAIN, 0x1F);
+ } else {
+ snd_soc_update_bits(codec, TABLA_A_AUX_R_EN,
+ 0x20, 0x20);
+ tabla->aux_r_gain = snd_soc_read(codec,
+ TABLA_A_AUX_R_GAIN);
+ snd_soc_write(codec, TABLA_A_AUX_R_GAIN, 0x1F);
+ }
+ if (tabla->aux_pga_cnt++ == 1
+ && !tabla->mclk_enabled) {
+ tabla_codec_enable_clock_block(codec, 1);
+ pr_debug("AUX PGA enabled RC osc\n");
+ }
+ break;
+
+ case SND_SOC_DAPM_POST_PMU:
+ if (w->reg == TABLA_A_AUX_L_EN)
+ snd_soc_write(codec, TABLA_A_AUX_L_GAIN,
+ tabla->aux_l_gain);
+ else
+ snd_soc_write(codec, TABLA_A_AUX_R_GAIN,
+ tabla->aux_r_gain);
+ break;
+
+ case SND_SOC_DAPM_PRE_PMD:
+ /* Mute AUX PGA channel in use before disabling AUX PGA */
+ if (w->reg == TABLA_A_AUX_L_EN) {
+ tabla->aux_l_gain = snd_soc_read(codec,
+ TABLA_A_AUX_L_GAIN);
+ snd_soc_write(codec, TABLA_A_AUX_L_GAIN, 0x1F);
+ } else {
+ tabla->aux_r_gain = snd_soc_read(codec,
+ TABLA_A_AUX_R_GAIN);
+ snd_soc_write(codec, TABLA_A_AUX_R_GAIN, 0x1F);
+ }
+ break;
+
+ case SND_SOC_DAPM_POST_PMD:
+ tabla_enable_rx_bias(codec, 0);
+
+ snd_soc_update_bits(codec, TABLA_A_AUX_COM_CTL,
+ 0x08, 0x00);
+ if (w->reg == TABLA_A_AUX_L_EN) {
+ snd_soc_write(codec, TABLA_A_AUX_L_GAIN,
+ tabla->aux_l_gain);
+ snd_soc_update_bits(codec, TABLA_A_AUX_L_EN,
+ 0x20, 0x00);
+ } else {
+ snd_soc_write(codec, TABLA_A_AUX_R_GAIN,
+ tabla->aux_r_gain);
+ snd_soc_update_bits(codec, TABLA_A_AUX_R_EN,
+ 0x20, 0x00);
+ }
+
+ if (tabla->aux_pga_cnt-- == 0) {
+ if (tabla->mbhc_polling_active)
+ tabla_codec_enable_bandgap(codec,
+ TABLA_BANDGAP_MBHC_MODE);
+ else
+ tabla_codec_enable_bandgap(codec,
+ TABLA_BANDGAP_OFF);
+
+ if (!tabla->mclk_enabled &&
+ !tabla->mbhc_polling_active) {
+ tabla_codec_enable_clock_block(codec, 0);
+ }
+ }
+ break;
+ }
+ return 0;
+}
+
static int tabla_codec_enable_lineout(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
@@ -1319,10 +1930,12 @@
struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
- tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
+ wcd9xxx_enable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
if (!tabla->no_mic_headset_override) {
- tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
- tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
+ wcd9xxx_enable_irq(codec->control_data,
+ TABLA_IRQ_MBHC_POTENTIAL);
+ wcd9xxx_enable_irq(codec->control_data,
+ TABLA_IRQ_MBHC_RELEASE);
} else {
tabla_codec_disable_button_presses(codec);
}
@@ -1336,11 +1949,12 @@
struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
- tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
+ wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
if (!tabla->no_mic_headset_override) {
- tabla_disable_irq(codec->control_data,
+ wcd9xxx_disable_irq(codec->control_data,
TABLA_IRQ_MBHC_POTENTIAL);
- tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
+ wcd9xxx_disable_irq(codec->control_data,
+ TABLA_IRQ_MBHC_RELEASE);
}
}
@@ -1684,24 +2298,6 @@
return 0;
}
-
-static void tabla_enable_rx_bias(struct snd_soc_codec *codec, u32 enable)
-{
- struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
-
- if (enable) {
- tabla->rx_bias_count++;
- if (tabla->rx_bias_count == 1)
- snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
- 0x80, 0x80);
- } else {
- tabla->rx_bias_count--;
- if (!tabla->rx_bias_count)
- snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
- 0x80, 0x00);
- }
-}
-
static int tabla_codec_enable_rx_bias(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
@@ -1767,7 +2363,7 @@
tabla->hphlocp_cnt = 0;
else
tabla->hphrocp_cnt = 0;
- tabla_enable_irq(codec->control_data, irq);
+ wcd9xxx_enable_irq(codec->control_data, irq);
} else {
pr_err("%s: Bad tabla private data\n", __func__);
}
@@ -1925,16 +2521,16 @@
static const struct snd_soc_dapm_widget tabla_1_x_dapm_widgets[] = {
SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", TABLA_1_A_MICB_4_CTL, 7,
- 0, tabla_codec_enable_micbias,
- SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
- SND_SOC_DAPM_POST_PMD),
+ 0, tabla_codec_enable_micbias,
+ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
+ SND_SOC_DAPM_POST_PMD),
};
static const struct snd_soc_dapm_widget tabla_2_higher_dapm_widgets[] = {
SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", TABLA_2_A_MICB_4_CTL, 7,
- 0, tabla_codec_enable_micbias,
- SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
- SND_SOC_DAPM_POST_PMD),
+ 0, tabla_codec_enable_micbias,
+ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
+ SND_SOC_DAPM_POST_PMD),
};
static const struct snd_soc_dapm_route audio_i2s_map[] = {
@@ -2009,7 +2605,8 @@
/* Earpiece (RX MIX1) */
{"EAR", NULL, "EAR PA"},
- {"EAR PA", NULL, "DAC1"},
+ {"EAR PA", NULL, "EAR_PA_MIXER"},
+ {"EAR_PA_MIXER", NULL, "DAC1"},
{"DAC1", NULL, "CP"},
{"ANC1 FB MUX", "EAR_HPH_L", "RX1 MIX1"},
@@ -2020,8 +2617,11 @@
{"HEADPHONE", NULL, "HPHL"},
{"HEADPHONE", NULL, "HPHR"},
- {"HPHL", NULL, "HPHL DAC"},
- {"HPHR", NULL, "HPHR DAC"},
+ {"HPHL", NULL, "HPHL_PA_MIXER"},
+ {"HPHL_PA_MIXER", NULL, "HPHL DAC"},
+
+ {"HPHR", NULL, "HPHR_PA_MIXER"},
+ {"HPHR_PA_MIXER", NULL, "HPHR DAC"},
{"HPHL DAC", NULL, "CP"},
{"HPHR DAC", NULL, "CP"},
@@ -2049,11 +2649,16 @@
{"LINEOUT4", NULL, "LINEOUT4 PA"},
{"LINEOUT5", NULL, "LINEOUT5 PA"},
- {"LINEOUT1 PA", NULL, "LINEOUT1 DAC"},
- {"LINEOUT2 PA", NULL, "LINEOUT2 DAC"},
- {"LINEOUT3 PA", NULL, "LINEOUT3 DAC"},
- {"LINEOUT4 PA", NULL, "LINEOUT4 DAC"},
- {"LINEOUT5 PA", NULL, "LINEOUT5 DAC"},
+ {"LINEOUT1 PA", NULL, "LINEOUT1_PA_MIXER"},
+ {"LINEOUT1_PA_MIXER", NULL, "LINEOUT1 DAC"},
+ {"LINEOUT2 PA", NULL, "LINEOUT2_PA_MIXER"},
+ {"LINEOUT2_PA_MIXER", NULL, "LINEOUT2 DAC"},
+ {"LINEOUT3 PA", NULL, "LINEOUT3_PA_MIXER"},
+ {"LINEOUT3_PA_MIXER", NULL, "LINEOUT3 DAC"},
+ {"LINEOUT4 PA", NULL, "LINEOUT4_PA_MIXER"},
+ {"LINEOUT4_PA_MIXER", NULL, "LINEOUT4 DAC"},
+ {"LINEOUT5 PA", NULL, "LINEOUT5_PA_MIXER"},
+ {"LINEOUT5_PA_MIXER", NULL, "LINEOUT5 DAC"},
{"LINEOUT1 DAC", NULL, "RX3 MIX1"},
{"LINEOUT5 DAC", NULL, "RX7 MIX1"},
@@ -2070,6 +2675,12 @@
{"LINEOUT4 DAC", NULL, "RX_BIAS"},
{"LINEOUT5 DAC", NULL, "RX_BIAS"},
+ {"RX1 MIX1", NULL, "COMP1_CLK"},
+ {"RX2 MIX1", NULL, "COMP1_CLK"},
+ {"RX3 MIX1", NULL, "COMP2_CLK"},
+ {"RX5 MIX1", NULL, "COMP2_CLK"},
+
+
{"RX1 MIX1", NULL, "RX1 MIX1 INP1"},
{"RX1 MIX1", NULL, "RX1 MIX1 INP2"},
{"RX2 MIX1", NULL, "RX2 MIX1 INP1"},
@@ -2221,6 +2832,42 @@
{"ADC5", NULL, "AMIC5"},
{"ADC6", NULL, "AMIC6"},
+ /* AUX PGA Connections */
+ {"HPHL_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
+ {"HPHL_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
+ {"HPHL_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
+ {"HPHL_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
+ {"HPHR_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
+ {"HPHR_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
+ {"HPHR_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
+ {"HPHR_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
+ {"LINEOUT1_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
+ {"LINEOUT1_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
+ {"LINEOUT1_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
+ {"LINEOUT1_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
+ {"LINEOUT2_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
+ {"LINEOUT2_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
+ {"LINEOUT2_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
+ {"LINEOUT2_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
+ {"LINEOUT3_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
+ {"LINEOUT3_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
+ {"LINEOUT3_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
+ {"LINEOUT3_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
+ {"LINEOUT4_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
+ {"LINEOUT4_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
+ {"LINEOUT4_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
+ {"LINEOUT4_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
+ {"LINEOUT5_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
+ {"LINEOUT5_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
+ {"LINEOUT5_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
+ {"LINEOUT5_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
+ {"EAR_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
+ {"EAR_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
+ {"EAR_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
+ {"EAR_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
+ {"AUX_PGA_Left", NULL, "AMIC5"},
+ {"AUX_PGA_Right", NULL, "AMIC6"},
+
{"IIR1", NULL, "IIR1 INP1 MUX"},
{"IIR1 INP1 MUX", "DEC1", "DEC1 MUX"},
{"IIR1 INP1 MUX", "DEC2", "DEC2 MUX"},
@@ -2284,7 +2931,7 @@
static int tabla_readable(struct snd_soc_codec *ssc, unsigned int reg)
{
int i;
- struct tabla *tabla_core = dev_get_drvdata(ssc->dev->parent);
+ struct wcd9xxx *tabla_core = dev_get_drvdata(ssc->dev->parent);
if (TABLA_IS_1_X(tabla_core->version)) {
for (i = 0; i < ARRAY_SIZE(tabla_1_reg_readable); i++) {
@@ -2323,7 +2970,6 @@
unsigned int value)
{
int ret;
-
BUG_ON(reg > TABLA_MAX_REGISTER);
if (!tabla_volatile(codec, reg)) {
@@ -2333,7 +2979,7 @@
reg, ret);
}
- return tabla_reg_write(codec->control_data, reg, value);
+ return wcd9xxx_reg_write(codec->control_data, reg, value);
}
static unsigned int tabla_read(struct snd_soc_codec *codec,
unsigned int reg)
@@ -2353,154 +2999,15 @@
reg, ret);
}
- val = tabla_reg_read(codec->control_data, reg);
+ val = wcd9xxx_reg_read(codec->control_data, reg);
return val;
}
-static void tabla_codec_enable_audio_mode_bandgap(struct snd_soc_codec *codec)
-{
- snd_soc_write(codec, TABLA_A_BIAS_REF_CTL, 0x1C);
- snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
- 0x80);
- snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x04,
- 0x04);
- snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
- 0x01);
- usleep_range(1000, 1000);
- snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
- 0x00);
-}
-
-static void tabla_codec_enable_bandgap(struct snd_soc_codec *codec,
- enum tabla_bandgap_type choice)
-{
- struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
-
- /* TODO lock resources accessed by audio streams and threaded
- * interrupt handlers
- */
-
- pr_debug("%s, choice is %d, current is %d\n", __func__, choice,
- tabla->bandgap_type);
-
- if (tabla->bandgap_type == choice)
- return;
-
- if ((tabla->bandgap_type == TABLA_BANDGAP_OFF) &&
- (choice == TABLA_BANDGAP_AUDIO_MODE)) {
- tabla_codec_enable_audio_mode_bandgap(codec);
- } else if (choice == TABLA_BANDGAP_MBHC_MODE) {
- snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x2,
- 0x2);
- snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
- 0x80);
- snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x4,
- 0x4);
- snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
- 0x01);
- usleep_range(1000, 1000);
- snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
- 0x00);
- } else if ((tabla->bandgap_type == TABLA_BANDGAP_MBHC_MODE) &&
- (choice == TABLA_BANDGAP_AUDIO_MODE)) {
- snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
- usleep_range(100, 100);
- tabla_codec_enable_audio_mode_bandgap(codec);
- } else if (choice == TABLA_BANDGAP_OFF) {
- snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
- } else {
- pr_err("%s: Error, Invalid bandgap settings\n", __func__);
- }
- tabla->bandgap_type = choice;
-}
-
-static int tabla_codec_enable_config_mode(struct snd_soc_codec *codec,
- int enable)
-{
- struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
-
- if (enable) {
- snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x10, 0);
- snd_soc_write(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x17);
- usleep_range(5, 5);
- snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80,
- 0x80);
- snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80,
- 0x80);
- usleep_range(10, 10);
- snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80, 0);
- usleep_range(20, 20);
- snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x08);
- } else {
- snd_soc_update_bits(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x1,
- 0);
- snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80, 0);
- snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x00);
- }
- tabla->config_mode_active = enable ? true : false;
-
- return 0;
-}
-
-static int tabla_codec_enable_clock_block(struct snd_soc_codec *codec,
- int config_mode)
-{
- struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
-
- pr_debug("%s: config_mode = %d\n", __func__, config_mode);
-
- if (config_mode) {
- tabla_codec_enable_config_mode(codec, 1);
- snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x00);
- snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
- snd_soc_write(codec, TABLA_A_CLK_BUFF_EN1, 0x0D);
- usleep_range(1000, 1000);
- } else
- snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x00);
-
- if (!config_mode && tabla->mbhc_polling_active) {
- snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
- tabla_codec_enable_config_mode(codec, 0);
-
- }
-
- snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x05);
- snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x00);
- snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x04);
- snd_soc_update_bits(codec, TABLA_A_CDC_CLK_MCLK_CTL, 0x01, 0x01);
- usleep_range(50, 50);
- tabla->clock_active = true;
- return 0;
-}
-static void tabla_codec_disable_clock_block(struct snd_soc_codec *codec)
-{
- struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
- pr_debug("%s\n", __func__);
- snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x00);
- ndelay(160);
- snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x02);
- snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x00);
- tabla->clock_active = false;
-}
-
-static int tabla_codec_mclk_index(const struct tabla_priv *tabla)
-{
- if (tabla->mclk_freq == TABLA_MCLK_RATE_12288KHZ)
- return 0;
- else if (tabla->mclk_freq == TABLA_MCLK_RATE_9600KHZ)
- return 1;
- else {
- BUG_ON(1);
- return -EINVAL;
- }
-}
-
static void tabla_codec_calibrate_hs_polling(struct snd_soc_codec *codec)
{
u8 *n_ready, *n_cic;
struct tabla_mbhc_btn_detect_cfg *btn_det;
struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
-
btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->calibration);
snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
@@ -2543,8 +3050,13 @@
static int tabla_startup(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
+ struct wcd9xxx *tabla_core = dev_get_drvdata(dai->codec->dev->parent);
pr_debug("%s(): substream = %s stream = %d\n" , __func__,
substream->name, substream->stream);
+ if ((tabla_core != NULL) &&
+ (tabla_core->dev != NULL) &&
+ (tabla_core->dev->parent != NULL))
+ pm_runtime_get_sync(tabla_core->dev->parent);
return 0;
}
@@ -2552,8 +3064,15 @@
static void tabla_shutdown(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
+ struct wcd9xxx *tabla_core = dev_get_drvdata(dai->codec->dev->parent);
pr_debug("%s(): substream = %s stream = %d\n" , __func__,
substream->name, substream->stream);
+ if ((tabla_core != NULL) &&
+ (tabla_core->dev != NULL) &&
+ (tabla_core->dev->parent != NULL)) {
+ pm_runtime_mark_last_busy(tabla_core->dev->parent);
+ pm_runtime_put(tabla_core->dev->parent);
+ }
}
int tabla_mclk_enable(struct snd_soc_codec *codec, int mclk_enable)
@@ -2622,7 +3141,7 @@
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
case SND_SOC_DAIFMT_CBS_CFS:
/* CPU is master */
- if (tabla->intf_type == TABLA_INTERFACE_TYPE_I2C) {
+ if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
if (dai->id == AIF1_CAP)
snd_soc_update_bits(dai->codec,
TABLA_A_CDC_CLK_TX_I2S_CTL,
@@ -2635,7 +3154,7 @@
break;
case SND_SOC_DAIFMT_CBM_CFM:
/* CPU is slave */
- if (tabla->intf_type == TABLA_INTERFACE_TYPE_I2C) {
+ if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
val = TABLA_I2S_MASTER_MODE_MASK;
if (dai->id == AIF1_CAP)
snd_soc_update_bits(dai->codec,
@@ -2685,7 +3204,7 @@
unsigned int *rx_num, unsigned int *rx_slot)
{
- struct tabla *tabla = dev_get_drvdata(dai->codec->control_data);
+ struct wcd9xxx *tabla = dev_get_drvdata(dai->codec->control_data);
u32 cnt = 0;
u32 tx_ch[SLIM_MAX_TX_PORTS];
@@ -2699,7 +3218,7 @@
/* for virtual port, codec driver needs to do
* housekeeping, for now should be ok
*/
- tabla_get_channel(tabla, rx_ch, tx_ch);
+ wcd9xxx_get_channel(tabla, rx_ch, tx_ch);
if (dai->id == AIF1_PB) {
*rx_num = tabla_dai[dai->id - 1].playback.channels_max;
while (cnt < *rx_num) {
@@ -2731,6 +3250,7 @@
u8 path, shift;
u16 tx_fs_reg, rx_fs_reg;
u8 tx_fs_rate, rx_fs_rate, rx_state, tx_state;
+ u32 compander_fs;
pr_debug("%s: DAI-ID %x rate %d\n", __func__, dai->id,
params_rate(params));
@@ -2739,18 +3259,22 @@
case 8000:
tx_fs_rate = 0x00;
rx_fs_rate = 0x00;
+ compander_fs = COMPANDER_FS_8KHZ;
break;
case 16000:
tx_fs_rate = 0x01;
rx_fs_rate = 0x20;
+ compander_fs = COMPANDER_FS_16KHZ;
break;
case 32000:
tx_fs_rate = 0x02;
rx_fs_rate = 0x40;
+ compander_fs = COMPANDER_FS_32KHZ;
break;
case 48000:
tx_fs_rate = 0x03;
rx_fs_rate = 0x60;
+ compander_fs = COMPANDER_FS_48KHZ;
break;
default:
pr_err("%s: Invalid sampling rate %d\n", __func__,
@@ -2784,7 +3308,7 @@
0x03, tx_fs_rate);
}
}
- if (tabla->intf_type == TABLA_INTERFACE_TYPE_I2C) {
+ if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
switch (params_format(params)) {
case SNDRV_PCM_FORMAT_S16_LE:
snd_soc_update_bits(codec,
@@ -2828,9 +3352,12 @@
+ (BITS_PER_REG*(path-1));
snd_soc_update_bits(codec, rx_fs_reg,
0xE0, rx_fs_rate);
+ if (comp_rx_path[shift] < COMPANDER_MAX)
+ tabla->comp_fs[comp_rx_path[shift]]
+ = compander_fs;
}
}
- if (tabla->intf_type == TABLA_INTERFACE_TYPE_I2C) {
+ if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
switch (params_format(params)) {
case SNDRV_PCM_FORMAT_S16_LE:
snd_soc_update_bits(codec,
@@ -2945,7 +3472,7 @@
static int tabla_codec_enable_slimrx(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
- struct tabla *tabla;
+ struct wcd9xxx *tabla;
struct snd_soc_codec *codec = w->codec;
struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
u32 j = 0;
@@ -2953,7 +3480,7 @@
codec->control_data = dev_get_drvdata(codec->dev->parent);
tabla = codec->control_data;
/* Execute the callback only if interface type is slimbus */
- if (tabla_p->intf_type != TABLA_INTERFACE_TYPE_SLIMBUS)
+ if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS)
return 0;
switch (event) {
case SND_SOC_DAPM_POST_PMU:
@@ -2967,10 +3494,10 @@
}
}
if (tabla_p->dai[j].ch_act == tabla_p->dai[j].ch_tot)
- ret = tabla_cfg_slim_sch_rx(tabla,
- tabla_p->dai[j].ch_num,
- tabla_p->dai[j].ch_tot,
- tabla_p->dai[j].rate);
+ ret = wcd9xxx_cfg_slim_sch_rx(tabla,
+ tabla_p->dai[j].ch_num,
+ tabla_p->dai[j].ch_tot,
+ tabla_p->dai[j].rate);
break;
case SND_SOC_DAPM_POST_PMD:
for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
@@ -2983,12 +3510,12 @@
}
}
if (!tabla_p->dai[j].ch_act) {
- ret = tabla_close_slim_sch_rx(tabla,
+ ret = wcd9xxx_close_slim_sch_rx(tabla,
tabla_p->dai[j].ch_num,
tabla_p->dai[j].ch_tot);
tabla_p->dai[j].rate = 0;
memset(tabla_p->dai[j].ch_num, 0, (sizeof(u32)*
- tabla_p->dai[j].ch_tot));
+ tabla_p->dai[j].ch_tot));
tabla_p->dai[j].ch_tot = 0;
}
}
@@ -2998,7 +3525,7 @@
static int tabla_codec_enable_slimtx(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
- struct tabla *tabla;
+ struct wcd9xxx *tabla;
struct snd_soc_codec *codec = w->codec;
struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
/* index to the DAI ID, for now hardcoding */
@@ -3009,7 +3536,7 @@
tabla = codec->control_data;
/* Execute the callback only if interface type is slimbus */
- if (tabla_p->intf_type != TABLA_INTERFACE_TYPE_SLIMBUS)
+ if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS)
return 0;
switch (event) {
case SND_SOC_DAPM_POST_PMU:
@@ -3024,7 +3551,7 @@
}
}
if (tabla_p->dai[j].ch_act == tabla_p->dai[j].ch_tot)
- ret = tabla_cfg_slim_sch_tx(tabla,
+ ret = wcd9xxx_cfg_slim_sch_tx(tabla,
tabla_p->dai[j].ch_num,
tabla_p->dai[j].ch_tot,
tabla_p->dai[j].rate);
@@ -3041,12 +3568,12 @@
}
}
if (!tabla_p->dai[j].ch_act) {
- ret = tabla_close_slim_sch_tx(tabla,
+ ret = wcd9xxx_close_slim_sch_tx(tabla,
tabla_p->dai[j].ch_num,
tabla_p->dai[j].ch_tot);
tabla_p->dai[j].rate = 0;
memset(tabla_p->dai[j].ch_num, 0, (sizeof(u32)*
- tabla_p->dai[j].ch_tot));
+ tabla_p->dai[j].ch_tot));
tabla_p->dai[j].ch_tot = 0;
}
}
@@ -3212,6 +3739,13 @@
SND_SOC_DAPM_SUPPLY("LDO_H", TABLA_A_LDO_H_MODE_1, 7, 0,
tabla_codec_enable_ldo_h, SND_SOC_DAPM_POST_PMU),
+ SND_SOC_DAPM_SUPPLY("COMP1_CLK", SND_SOC_NOPM, 0, 0,
+ tabla_config_compander, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_POST_PMD),
+ SND_SOC_DAPM_SUPPLY("COMP2_CLK", SND_SOC_NOPM, 1, 0,
+ tabla_config_compander, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_POST_PMD),
+
SND_SOC_DAPM_INPUT("AMIC1"),
SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 External", TABLA_A_MICB_1_CTL, 7, 0,
tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
@@ -3368,6 +3902,42 @@
/* Sidetone */
SND_SOC_DAPM_MUX("IIR1 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir1_inp1_mux),
SND_SOC_DAPM_PGA("IIR1", TABLA_A_CDC_CLK_SD_CTL, 0, 0, NULL, 0),
+
+ /* AUX PGA */
+ SND_SOC_DAPM_ADC_E("AUX_PGA_Left", NULL, TABLA_A_AUX_L_EN, 7, 0,
+ tabla_codec_enable_aux_pga, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD |
+ SND_SOC_DAPM_POST_PMD),
+
+ SND_SOC_DAPM_ADC_E("AUX_PGA_Right", NULL, TABLA_A_AUX_R_EN, 7, 0,
+ tabla_codec_enable_aux_pga, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD |
+ SND_SOC_DAPM_POST_PMD),
+
+ /* Lineout, ear and HPH PA Mixers */
+ SND_SOC_DAPM_MIXER("HPHL_PA_MIXER", SND_SOC_NOPM, 0, 0,
+ hphl_pa_mix, ARRAY_SIZE(hphl_pa_mix)),
+
+ SND_SOC_DAPM_MIXER("HPHR_PA_MIXER", SND_SOC_NOPM, 0, 0,
+ hphr_pa_mix, ARRAY_SIZE(hphr_pa_mix)),
+
+ SND_SOC_DAPM_MIXER("LINEOUT1_PA_MIXER", SND_SOC_NOPM, 0, 0,
+ lineout1_pa_mix, ARRAY_SIZE(lineout1_pa_mix)),
+
+ SND_SOC_DAPM_MIXER("LINEOUT2_PA_MIXER", SND_SOC_NOPM, 0, 0,
+ lineout2_pa_mix, ARRAY_SIZE(lineout2_pa_mix)),
+
+ SND_SOC_DAPM_MIXER("LINEOUT3_PA_MIXER", SND_SOC_NOPM, 0, 0,
+ lineout3_pa_mix, ARRAY_SIZE(lineout3_pa_mix)),
+
+ SND_SOC_DAPM_MIXER("LINEOUT4_PA_MIXER", SND_SOC_NOPM, 0, 0,
+ lineout4_pa_mix, ARRAY_SIZE(lineout4_pa_mix)),
+
+ SND_SOC_DAPM_MIXER("LINEOUT5_PA_MIXER", SND_SOC_NOPM, 0, 0,
+ lineout5_pa_mix, ARRAY_SIZE(lineout5_pa_mix)),
+
+ SND_SOC_DAPM_MIXER("EAR_PA_MIXER", SND_SOC_NOPM, 0, 0,
+ ear_pa_mix, ARRAY_SIZE(ear_pa_mix)),
};
static short tabla_codec_read_sta_result(struct snd_soc_codec *codec)
@@ -3584,7 +4154,7 @@
snd_soc_update_bits(codec, tabla->reg_addr.micb_4_mbhc, 0x3,
tabla->micbias);
- tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
+ wcd9xxx_enable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0x1);
return 0;
}
@@ -3655,10 +4225,10 @@
if (tabla->button_jack) {
bias_value = tabla_codec_read_sta_result(tabla->codec);
sta_mv = tabla_codec_sta_dce_v(tabla->codec, 0,
- bias_value);
+ bias_value);
bias_value = tabla_codec_read_dce_result(tabla->codec);
dce_mv = tabla_codec_sta_dce_v(tabla->codec, 1,
- bias_value);
+ bias_value);
pr_debug("%s: Reporting long button press event"
" STA: %d, DCE: %d\n", __func__,
sta_mv, dce_mv);
@@ -3670,7 +4240,6 @@
pr_err("%s: Bad tabla private data\n", __func__);
}
- tabla_unlock_sleep(core);
}
void tabla_mbhc_cal(struct snd_soc_codec *codec)
@@ -3850,7 +4419,7 @@
struct tabla_mbhc_btn_detect_cfg *btn_det;
int n;
u8 *n_cic, *gain;
- struct tabla *tabla_core = dev_get_drvdata(codec->dev->parent);
+ struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
tabla = snd_soc_codec_get_drvdata(codec);
generic = TABLA_MBHC_CAL_GENERAL_PTR(tabla->calibration);
@@ -3998,7 +4567,7 @@
if (mclk_rate != TABLA_MCLK_RATE_12288KHZ) {
if (mclk_rate == TABLA_MCLK_RATE_9600KHZ)
pr_err("Error: clock rate %dHz is not yet supported\n",
- mclk_rate);
+ mclk_rate);
else
pr_err("Error: unsupported clock rate %d\n", mclk_rate);
return -EINVAL;
@@ -4037,9 +4606,9 @@
if (!IS_ERR_VALUE(rc)) {
snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
0x10);
- tabla_enable_irq(codec->control_data,
+ wcd9xxx_enable_irq(codec->control_data,
TABLA_IRQ_HPH_PA_OCPL_FAULT);
- tabla_enable_irq(codec->control_data,
+ wcd9xxx_enable_irq(codec->control_data,
TABLA_IRQ_HPH_PA_OCPR_FAULT);
}
@@ -4057,7 +4626,7 @@
btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(priv->calibration);
v_btn_low = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_V_BTN_LOW);
v_btn_high = tabla_mbhc_cal_btn_det_mp(btn_det,
- TABLA_BTN_DET_V_BTN_HIGH);
+ TABLA_BTN_DET_V_BTN_HIGH);
for (i = 0; i < btn_det->num_btn; i++) {
if ((v_btn_low[i] <= bias_mv) && (v_btn_high[i] >= bias_mv)) {
btn = i;
@@ -4115,10 +4684,10 @@
TABLA_MBHC_CAL_BTN_DET_PTR(priv->calibration);
short btnmeas[d->n_btn_meas + 1];
struct snd_soc_codec *codec = priv->codec;
- struct tabla *core = dev_get_drvdata(priv->codec->dev->parent);
+ struct wcd9xxx *core = dev_get_drvdata(priv->codec->dev->parent);
- tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
- tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
+ wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
+ wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
bias_value_dce = tabla_codec_read_dce_result(codec);
bias_mv_dce = tabla_codec_sta_dce_v(codec, 1, bias_value_dce);
@@ -4164,12 +4733,12 @@
/* XXX: assuming button 0 has the lowest micbias voltage */
if (btn == 0) {
- tabla_lock_sleep(core);
+ wcd9xxx_lock_sleep(core);
if (schedule_delayed_work(&priv->btn0_dwork,
msecs_to_jiffies(400)) == 0) {
WARN(1, "Button pressed twice without release"
"event\n");
- tabla_unlock_sleep(core);
+ wcd9xxx_unlock_sleep(core);
}
} else {
pr_debug("%s: Reporting short button %d(0x%x) press\n",
@@ -4191,10 +4760,10 @@
short mb_v;
struct tabla_priv *priv = data;
struct snd_soc_codec *codec = priv->codec;
- struct tabla *core = dev_get_drvdata(priv->codec->dev->parent);
+ struct wcd9xxx *core = dev_get_drvdata(priv->codec->dev->parent);
pr_debug("%s: enter\n", __func__);
- tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
+ wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
if (priv->buttons_pressed & SND_JACK_BTN_0) {
ret = cancel_delayed_work(&priv->btn0_dwork);
@@ -4208,7 +4777,7 @@
} else {
/* if scheduled btn0_dwork is canceled from here,
* we have to unlock from here instead btn0_work */
- tabla_unlock_sleep(core);
+ wcd9xxx_unlock_sleep(core);
mb_v = tabla_codec_sta_dce(codec, 0);
pr_debug("%s: Mic Voltage on release STA: %d,%d\n",
__func__, mb_v,
@@ -4304,7 +4873,7 @@
snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
0x10);
} else {
- tabla_disable_irq(codec->control_data,
+ wcd9xxx_disable_irq(codec->control_data,
TABLA_IRQ_HPH_PA_OCPL_FAULT);
tabla->hphlocp_cnt = 0;
tabla->hph_status |= SND_JACK_OC_HPHL;
@@ -4337,7 +4906,7 @@
snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
0x10);
} else {
- tabla_disable_irq(codec->control_data,
+ wcd9xxx_disable_irq(codec->control_data,
TABLA_IRQ_HPH_PA_OCPR_FAULT);
tabla->hphrocp_cnt = 0;
tabla->hph_status |= SND_JACK_OC_HPHR;
@@ -4357,26 +4926,26 @@
static void tabla_sync_hph_state(struct tabla_priv *tabla)
{
if (test_and_clear_bit(TABLA_HPHR_PA_OFF_ACK,
- &tabla->hph_pa_dac_state)) {
+ &tabla->hph_pa_dac_state)) {
pr_debug("%s: HPHR clear flag and enable PA\n", __func__);
snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x10,
1 << 4);
}
if (test_and_clear_bit(TABLA_HPHL_PA_OFF_ACK,
- &tabla->hph_pa_dac_state)) {
+ &tabla->hph_pa_dac_state)) {
pr_debug("%s: HPHL clear flag and enable PA\n", __func__);
snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x20,
1 << 5);
}
if (test_and_clear_bit(TABLA_HPHR_DAC_OFF_ACK,
- &tabla->hph_pa_dac_state)) {
+ &tabla->hph_pa_dac_state)) {
pr_debug("%s: HPHR clear flag and enable DAC\n", __func__);
snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_R_DAC_CTL,
0xC0, 0xC0);
}
if (test_and_clear_bit(TABLA_HPHL_DAC_OFF_ACK,
- &tabla->hph_pa_dac_state)) {
+ &tabla->hph_pa_dac_state)) {
pr_debug("%s: HPHL clear flag and enable DAC\n", __func__);
snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_L_DAC_CTL,
0xC0, 0xC0);
@@ -4395,7 +4964,7 @@
int mic_mv;
pr_debug("%s: enter\n", __func__);
- tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
+ wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
is_removal = snd_soc_read(codec, TABLA_A_CDC_MBHC_INT_CTL) & 0x02;
snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x03, 0x00);
@@ -4406,7 +4975,7 @@
if (priv->mbhc_fake_ins_start &&
time_after(jiffies, priv->mbhc_fake_ins_start +
- msecs_to_jiffies(TABLA_FAKE_INS_THRESHOLD_MS))) {
+ msecs_to_jiffies(TABLA_FAKE_INS_THRESHOLD_MS))) {
pr_debug("%s: fake context interrupt, reset insertion\n",
__func__);
priv->mbhc_fake_ins_start = 0;
@@ -4482,8 +5051,8 @@
0),
mb_v, mic_mv);
if (time_after(jiffies,
- priv->mbhc_fake_ins_start +
- msecs_to_jiffies(TABLA_FAKE_INS_THRESHOLD_MS))) {
+ priv->mbhc_fake_ins_start +
+ msecs_to_jiffies(TABLA_FAKE_INS_THRESHOLD_MS))) {
/* Disable HPH trigger and enable MIC line trigger */
snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x12,
0x00);
@@ -4509,7 +5078,8 @@
}
/* Setup for insertion detection */
snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0);
- tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
+ wcd9xxx_enable_irq(codec->control_data,
+ TABLA_IRQ_MBHC_INSERTION);
snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0x1);
} else if (mb_v < (short) priv->mbhc_data.v_no_mic) {
@@ -4559,9 +5129,9 @@
int min_us = TABLA_FAKE_REMOVAL_MIN_PERIOD_MS * 1000;
pr_debug("%s: enter, removal interrupt\n", __func__);
- tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
- tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
- tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
+ wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
+ wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
+ wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
usleep_range(generic->t_shutdown_plug_rem,
generic->t_shutdown_plug_rem);
@@ -4611,11 +5181,11 @@
int i, j;
u8 val;
- for (i = 0; i < TABLA_SLIM_NUM_PORT_REG; i++) {
- slimbus_value = tabla_interface_reg_read(codec->control_data,
+ for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++) {
+ slimbus_value = wcd9xxx_interface_reg_read(codec->control_data,
TABLA_SLIM_PGD_PORT_INT_STATUS0 + i);
for_each_set_bit(j, &slimbus_value, BITS_PER_BYTE) {
- val = tabla_interface_reg_read(codec->control_data,
+ val = wcd9xxx_interface_reg_read(codec->control_data,
TABLA_SLIM_PGD_PORT_INT_SOURCE0 + i*8 + j);
if (val & 0x1)
pr_err_ratelimited("overflow error on port %x,"
@@ -4624,7 +5194,7 @@
pr_err_ratelimited("underflow error on port %x,"
" value %x\n", i*8 + j, val);
}
- tabla_interface_reg_write(codec->control_data,
+ wcd9xxx_interface_reg_write(codec->control_data,
TABLA_SLIM_PGD_PORT_INT_CLR0 + i, 0xFF);
}
@@ -4635,7 +5205,7 @@
static int tabla_handle_pdata(struct tabla_priv *tabla)
{
struct snd_soc_codec *codec = tabla->codec;
- struct tabla_pdata *pdata = tabla->pdata;
+ struct wcd9xxx_pdata *pdata = tabla->pdata;
int k1, k2, k3, rc = 0;
u8 leg_mode = pdata->amic_settings.legacy_mode;
u8 txfe_bypass = pdata->amic_settings.txfe_enable;
@@ -4802,7 +5372,7 @@
static void tabla_update_reg_defaults(struct snd_soc_codec *codec)
{
u32 i;
- struct tabla *tabla_core = dev_get_drvdata(codec->dev->parent);
+ struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
for (i = 0; i < ARRAY_SIZE(tabla_1_1_reg_defaults); i++)
snd_soc_write(codec, tabla_1_1_reg_defaults[i].reg,
@@ -4894,7 +5464,7 @@
static void tabla_codec_init_reg(struct snd_soc_codec *codec)
{
u32 i;
- struct tabla *tabla_core = dev_get_drvdata(codec->dev->parent);
+ struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
for (i = 0; i < ARRAY_SIZE(tabla_codec_reg_init_val); i++)
snd_soc_update_bits(codec, tabla_codec_reg_init_val[i].reg,
@@ -4918,23 +5488,23 @@
static void tabla_update_reg_address(struct tabla_priv *priv)
{
- struct tabla *tabla_core = dev_get_drvdata(priv->codec->dev->parent);
+ struct wcd9xxx *tabla_core = dev_get_drvdata(priv->codec->dev->parent);
struct tabla_reg_address *reg_addr = &priv->reg_addr;
if (TABLA_IS_1_X(tabla_core->version)) {
+ reg_addr->micb_4_mbhc = TABLA_1_A_MICB_4_MBHC;
+ reg_addr->micb_4_int_rbias = TABLA_1_A_MICB_4_INT_RBIAS;
reg_addr->micb_4_ctl = TABLA_1_A_MICB_4_CTL;
- reg_addr->micb_4_int_rbias = TABLA_1_A_MICB_4_INT_RBIAS;
- reg_addr->micb_4_int_rbias = TABLA_1_A_MICB_4_INT_RBIAS;
} else if (TABLA_IS_2_0(tabla_core->version)) {
+ reg_addr->micb_4_mbhc = TABLA_2_A_MICB_4_MBHC;
+ reg_addr->micb_4_int_rbias = TABLA_2_A_MICB_4_INT_RBIAS;
reg_addr->micb_4_ctl = TABLA_2_A_MICB_4_CTL;
- reg_addr->micb_4_int_rbias = TABLA_2_A_MICB_4_INT_RBIAS;
- reg_addr->micb_4_int_rbias = TABLA_2_A_MICB_4_INT_RBIAS;
}
}
static int tabla_codec_probe(struct snd_soc_codec *codec)
{
- struct tabla *control;
+ struct wcd9xxx *control;
struct tabla_priv *tabla;
struct snd_soc_dapm_context *dapm = &codec->dapm;
int ret = 0;
@@ -4972,9 +5542,15 @@
tabla->mbhc_fake_ins_start = 0;
tabla->no_mic_headset_override = false;
tabla->codec = codec;
+ for (i = 0; i < COMPANDER_MAX; i++) {
+ tabla->comp_enabled[i] = 0;
+ tabla->comp_fs[i] = COMPANDER_FS_48KHZ;
+ }
tabla->pdata = dev_get_platdata(codec->dev->parent);
- tabla->intf_type = tabla_get_intf_type();
-
+ tabla->intf_type = wcd9xxx_get_intf_type();
+ tabla->aux_pga_cnt = 0;
+ tabla->aux_l_gain = 0x1F;
+ tabla->aux_r_gain = 0x1F;
tabla_update_reg_address(tabla);
tabla_update_reg_defaults(codec);
tabla_codec_init_reg(codec);
@@ -5002,7 +5578,7 @@
snd_soc_dapm_new_controls(dapm, tabla_2_higher_dapm_widgets,
ARRAY_SIZE(tabla_2_higher_dapm_widgets));
- if (tabla->intf_type == TABLA_INTERFACE_TYPE_I2C) {
+ if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
snd_soc_dapm_new_controls(dapm, tabla_dapm_i2s_widgets,
ARRAY_SIZE(tabla_dapm_i2s_widgets));
snd_soc_dapm_add_routes(dapm, audio_i2s_map,
@@ -5018,49 +5594,49 @@
ARRAY_SIZE(tabla_2_x_lineout_2_to_4_map));
} else {
pr_err("%s : ERROR. Unsupported Tabla version 0x%2x\n",
- __func__, control->version);
+ __func__, control->version);
goto err_pdata;
}
snd_soc_dapm_sync(dapm);
- ret = tabla_request_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION,
+ ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION,
tabla_hs_insert_irq, "Headset insert detect", tabla);
if (ret) {
pr_err("%s: Failed to request irq %d\n", __func__,
TABLA_IRQ_MBHC_INSERTION);
goto err_insert_irq;
}
- tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
+ wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
- ret = tabla_request_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL,
+ ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL,
tabla_hs_remove_irq, "Headset remove detect", tabla);
if (ret) {
pr_err("%s: Failed to request irq %d\n", __func__,
TABLA_IRQ_MBHC_REMOVAL);
goto err_remove_irq;
}
- tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
+ wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
- ret = tabla_request_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL,
+ ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL,
tabla_dce_handler, "DC Estimation detect", tabla);
if (ret) {
pr_err("%s: Failed to request irq %d\n", __func__,
TABLA_IRQ_MBHC_POTENTIAL);
goto err_potential_irq;
}
- tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
+ wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
- ret = tabla_request_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE,
+ ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE,
tabla_release_handler, "Button Release detect", tabla);
if (ret) {
pr_err("%s: Failed to request irq %d\n", __func__,
TABLA_IRQ_MBHC_RELEASE);
goto err_release_irq;
}
- tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
+ wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
- ret = tabla_request_irq(codec->control_data, TABLA_IRQ_SLIMBUS,
+ ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_SLIMBUS,
tabla_slimbus_irq, "SLIMBUS Slave", tabla);
if (ret) {
pr_err("%s: Failed to request irq %d\n", __func__,
@@ -5068,11 +5644,11 @@
goto err_slimbus_irq;
}
- for (i = 0; i < TABLA_SLIM_NUM_PORT_REG; i++)
- tabla_interface_reg_write(codec->control_data,
+ for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++)
+ wcd9xxx_interface_reg_write(codec->control_data,
TABLA_SLIM_PGD_PORT_INT_EN0 + i, 0xFF);
- ret = tabla_request_irq(codec->control_data,
+ ret = wcd9xxx_request_irq(codec->control_data,
TABLA_IRQ_HPH_PA_OCPL_FAULT, tabla_hphl_ocp_irq,
"HPH_L OCP detect", tabla);
if (ret) {
@@ -5080,9 +5656,9 @@
TABLA_IRQ_HPH_PA_OCPL_FAULT);
goto err_hphl_ocp_irq;
}
- tabla_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPL_FAULT);
+ wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPL_FAULT);
- ret = tabla_request_irq(codec->control_data,
+ ret = wcd9xxx_request_irq(codec->control_data,
TABLA_IRQ_HPH_PA_OCPR_FAULT, tabla_hphr_ocp_irq,
"HPH_R OCP detect", tabla);
if (ret) {
@@ -5090,7 +5666,7 @@
TABLA_IRQ_HPH_PA_OCPR_FAULT);
goto err_hphr_ocp_irq;
}
- tabla_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPR_FAULT);
+ wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPR_FAULT);
for (i = 0; i < ARRAY_SIZE(tabla_dai); i++) {
switch (tabla_dai[i].id) {
case AIF1_PB:
@@ -5116,17 +5692,18 @@
return ret;
err_hphr_ocp_irq:
- tabla_free_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPL_FAULT, tabla);
+ wcd9xxx_free_irq(codec->control_data,
+ TABLA_IRQ_HPH_PA_OCPL_FAULT, tabla);
err_hphl_ocp_irq:
- tabla_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
+ wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
err_slimbus_irq:
- tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
+ wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
err_release_irq:
- tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
+ wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
err_potential_irq:
- tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
+ wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
err_remove_irq:
- tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
+ wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
err_insert_irq:
err_pdata:
kfree(tabla);
@@ -5136,11 +5713,11 @@
{
int i;
struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
- tabla_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
- tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
- tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
- tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
- tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
+ wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
+ wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
+ wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
+ wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
+ wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
tabla_codec_disable_clock_block(codec);
tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
if (tabla->mbhc_fw)
@@ -5227,10 +5804,10 @@
S_IFREG | S_IRUGO, NULL, (void *) "TRRS", &codec_debug_ops);
#endif
- if (tabla_get_intf_type() == TABLA_INTERFACE_TYPE_SLIMBUS)
+ if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_SLIMBUS)
ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
tabla_dai, ARRAY_SIZE(tabla_dai));
- else if (tabla_get_intf_type() == TABLA_INTERFACE_TYPE_I2C)
+ else if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_I2C)
ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
tabla_i2s_dai, ARRAY_SIZE(tabla_i2s_dai));
return ret;
diff --git a/sound/soc/codecs/wcd9310.h b/sound/soc/codecs/wcd9310.h
index 9c430b9..d1d0c17 100644
--- a/sound/soc/codecs/wcd9310.h
+++ b/sound/soc/codecs/wcd9310.h
@@ -11,7 +11,7 @@
*/
#include <sound/soc.h>
#include <sound/jack.h>
-#include <linux/mfd/wcd9310/wcd9310-slimslave.h>
+#include <linux/mfd/wcd9xxx/wcd9xxx-slimslave.h>
#define TABLA_NUM_REGISTERS 0x400
#define TABLA_MAX_REGISTER (TABLA_NUM_REGISTERS-1)
diff --git a/sound/soc/msm/Kconfig b/sound/soc/msm/Kconfig
index 1ed5f74..3a2687e 100644
--- a/sound/soc/msm/Kconfig
+++ b/sound/soc/msm/Kconfig
@@ -126,6 +126,7 @@
select SND_SOC_QDSP6
select SND_SOC_MSM_STUB
select SND_SOC_WCD9310
+ select SND_SOC_WCD9304
select SND_SOC_MSM_HOSTLESS_PCM
select SND_SOC_MSM_QDSP6_HDMI_AUDIO
default n
diff --git a/sound/soc/msm/Makefile b/sound/soc/msm/Makefile
index 6f2d651..2aef4bd 100644
--- a/sound/soc/msm/Makefile
+++ b/sound/soc/msm/Makefile
@@ -62,7 +62,7 @@
snd-soc-qdsp6-objs += msm-pcm-lpa.o msm-pcm-afe.o
obj-$(CONFIG_SND_SOC_QDSP6) += snd-soc-qdsp6.o
-snd-soc-msm8960-objs := msm8960.o apq8064.o
+snd-soc-msm8960-objs := msm8960.o apq8064.o msm8930.o
obj-$(CONFIG_SND_SOC_MSM8960) += snd-soc-msm8960.o
# Generic MSM drivers
diff --git a/sound/soc/msm/apq8064.c b/sound/soc/msm/apq8064.c
index bcf6784..a97bf87 100644
--- a/sound/soc/msm/apq8064.c
+++ b/sound/soc/msm/apq8064.c
@@ -55,7 +55,7 @@
#define TABLA_EXT_CLK_RATE 12288000
-#define TABLA_MBHC_DEF_BUTTONS 3
+#define TABLA_MBHC_DEF_BUTTONS 8
#define TABLA_MBHC_DEF_RLOADS 5
static u32 top_spk_pamp_gpio = PM8921_GPIO_PM_TO_SYS(18);
@@ -604,7 +604,7 @@
void *tabla_cal;
struct tabla_mbhc_btn_detect_cfg *btn_cfg;
u16 *btn_low, *btn_high;
- u8 *n_cic, *gain;
+ u8 *n_ready, *n_cic, *gain;
tabla_cal = kzalloc(TABLA_MBHC_CAL_SIZE(TABLA_MBHC_DEF_BUTTONS,
TABLA_MBHC_DEF_RLOADS),
@@ -625,25 +625,21 @@
S(mic_current, TABLA_PID_MIC_5_UA);
S(hph_current, TABLA_PID_MIC_5_UA);
S(t_mic_pid, 100);
- S(t_ins_complete, 1000);
+ S(t_ins_complete, 250);
S(t_ins_retry, 200);
#undef S
#define S(X, Y) ((TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla_cal)->X) = (Y))
S(v_no_mic, 30);
- S(v_hs_max, 1450);
+ S(v_hs_max, 1550);
#undef S
#define S(X, Y) ((TABLA_MBHC_CAL_BTN_DET_PTR(tabla_cal)->X) = (Y))
- S(c[0], 6);
- S(c[1], 10);
- S(c[2], 10);
- S(c[3], 14);
- S(c[4], 14);
- S(c[5], 16);
- S(c[6], 0);
- S(c[7], 0);
- S(nc, 5);
- S(n_meas, 11);
+ S(c[0], 62);
+ S(c[1], 124);
+ S(nc, 1);
+ S(n_meas, 3);
S(mbhc_nsc, 11);
+ S(n_btn_meas, 1);
+ S(n_btn_con, 2);
S(num_btn, TABLA_MBHC_DEF_BUTTONS);
S(v_btn_press_delta_sta, 100);
S(v_btn_press_delta_cic, 50);
@@ -651,15 +647,28 @@
btn_cfg = TABLA_MBHC_CAL_BTN_DET_PTR(tabla_cal);
btn_low = tabla_mbhc_cal_btn_det_mp(btn_cfg, TABLA_BTN_DET_V_BTN_LOW);
btn_high = tabla_mbhc_cal_btn_det_mp(btn_cfg, TABLA_BTN_DET_V_BTN_HIGH);
- btn_low[0] = 0;
- btn_high[0] = 40;
- btn_low[1] = 60;
- btn_high[1] = 140;
- btn_low[2] = 160;
- btn_high[2] = 240;
+ btn_low[0] = -50;
+ btn_high[0] = 10;
+ btn_low[1] = 11;
+ btn_high[1] = 38;
+ btn_low[2] = 39;
+ btn_high[2] = 64;
+ btn_low[3] = 65;
+ btn_high[3] = 91;
+ btn_low[4] = 92;
+ btn_high[4] = 115;
+ btn_low[5] = 116;
+ btn_high[5] = 141;
+ btn_low[6] = 142;
+ btn_high[6] = 163;
+ btn_low[7] = 164;
+ btn_high[7] = 250;
+ n_ready = tabla_mbhc_cal_btn_det_mp(btn_cfg, TABLA_BTN_DET_N_READY);
+ n_ready[0] = 48;
+ n_ready[1] = 38;
n_cic = tabla_mbhc_cal_btn_det_mp(btn_cfg, TABLA_BTN_DET_N_CIC);
- n_cic[0] = 120;
- n_cic[1] = 94;
+ n_cic[0] = 60;
+ n_cic[1] = 47;
gain = tabla_mbhc_cal_btn_det_mp(btn_cfg, TABLA_BTN_DET_GAIN);
gain[0] = 11;
gain[1] = 9;
@@ -727,6 +736,13 @@
return ret;
}
+static int msm_stubrx_init(struct snd_soc_pcm_runtime *rtd)
+{
+ rtd->pmdown_time = 0;
+
+ return 0;
+}
+
static int msm_audrx_init(struct snd_soc_pcm_runtime *rtd)
{
int err;
@@ -770,7 +786,7 @@
}
err = snd_soc_jack_new(codec, "Button Jack",
- SND_JACK_BTN_0, &button_jack);
+ TABLA_JACK_BUTTON_MASK, &button_jack);
if (err) {
pr_err("failed to create new jack\n");
return err;
@@ -1253,6 +1269,7 @@
.no_pcm = 1,
/* .be_id = do not care */
.be_hw_params_fixup = msm_slim_0_rx_be_hw_params_fixup,
+ .init = &msm_stubrx_init,
.ops = &msm_be_ops,
},
{
@@ -1270,7 +1287,7 @@
};
struct snd_soc_card snd_soc_card_msm = {
- .name = "msm-snd-card",
+ .name = "apq8064-tabla-snd-card",
.dai_link = msm_dai,
.num_links = ARRAY_SIZE(msm_dai),
};
diff --git a/sound/soc/msm/msm-compr-q6.c b/sound/soc/msm/msm-compr-q6.c
index f0f17a9..7d99322 100644
--- a/sound/soc/msm/msm-compr-q6.c
+++ b/sound/soc/msm/msm-compr-q6.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -179,6 +179,7 @@
struct snd_pcm_runtime *runtime = substream->runtime;
struct compr_audio *compr = runtime->private_data;
struct msm_audio *prtd = &compr->prtd;
+ struct asm_aac_cfg aac_cfg;
int ret;
pr_debug("%s\n", __func__);
@@ -189,14 +190,33 @@
prtd->samp_rate = runtime->rate;
prtd->channel_mode = runtime->channels;
prtd->out_head = 0;
+ atomic_set(&prtd->out_count, runtime->periods);
+
if (prtd->enabled)
return 0;
- ret = q6asm_media_format_block(prtd->audio_client, compr->codec);
- if (ret < 0)
- pr_info("%s: CMD Format block failed\n", __func__);
-
- atomic_set(&prtd->out_count, runtime->periods);
+ switch (compr->info.codec_param.codec.id) {
+ case SND_AUDIOCODEC_MP3:
+ ret = q6asm_media_format_block(prtd->audio_client,
+ compr->codec);
+ if (ret < 0)
+ pr_info("%s: CMD Format block failed\n", __func__);
+ break;
+ case SND_AUDIOCODEC_AAC:
+ pr_debug("SND_AUDIOCODEC_AAC\n");
+ memset(&aac_cfg, 0x0, sizeof(struct asm_aac_cfg));
+ aac_cfg.aot = AAC_ENC_MODE_EAAC_P;
+ aac_cfg.format = 0x03;
+ aac_cfg.ch_cfg = runtime->channels;
+ aac_cfg.sample_rate = runtime->rate;
+ ret = q6asm_media_format_block_aac(prtd->audio_client,
+ &aac_cfg);
+ if (ret < 0)
+ pr_err("%s: CMD Format block failed\n", __func__);
+ break;
+ default:
+ return -EINVAL;
+ }
prtd->enabled = 1;
prtd->cmd_ack = 0;
@@ -250,6 +270,7 @@
compr->info.compr_cap.min_fragments = runtime->hw.periods_min;
compr->info.compr_cap.max_fragments = runtime->hw.periods_max;
compr->info.compr_cap.codecs[0] = SND_AUDIOCODEC_MP3;
+ compr->info.compr_cap.codecs[1] = SND_AUDIOCODEC_AAC;
/* Add new codecs here */
}
@@ -504,6 +525,10 @@
pr_debug("SND_AUDIOCODEC_MP3\n");
compr->codec = FORMAT_MP3;
break;
+ case SND_AUDIOCODEC_AAC:
+ pr_debug("SND_AUDIOCODEC_AAC\n");
+ compr->codec = FORMAT_MPEG4_AAC;
+ break;
default:
pr_debug("FORMAT_LINEAR_PCM\n");
compr->codec = FORMAT_LINEAR_PCM;
diff --git a/sound/soc/msm/msm-dai-q6-hdmi.c b/sound/soc/msm/msm-dai-q6-hdmi.c
index 6907ded..3333344 100644
--- a/sound/soc/msm/msm-dai-q6-hdmi.c
+++ b/sound/soc/msm/msm-dai-q6-hdmi.c
@@ -14,10 +14,8 @@
#include <linux/module.h>
#include <linux/device.h>
#include <linux/platform_device.h>
-#include <linux/mfd/wcd9310/core.h>
#include <linux/bitops.h>
#include <linux/slab.h>
-#include <linux/clk.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/soc.h>
@@ -25,7 +23,6 @@
#include <sound/q6afe.h>
#include <sound/q6adm.h>
#include <sound/msm-dai-q6.h>
-#include <mach/clk.h>
#include <mach/msm_hdmi_audio.h>
diff --git a/sound/soc/msm/msm-dai-q6.c b/sound/soc/msm/msm-dai-q6.c
index f23a6a0..3d1cea0 100644
--- a/sound/soc/msm/msm-dai-q6.c
+++ b/sound/soc/msm/msm-dai-q6.c
@@ -14,7 +14,7 @@
#include <linux/module.h>
#include <linux/device.h>
#include <linux/platform_device.h>
-#include <linux/mfd/wcd9310/core.h>
+#include <linux/mfd/wcd9xxx/core.h>
#include <linux/bitops.h>
#include <linux/slab.h>
#include <linux/clk.h>
@@ -100,6 +100,7 @@
break;
}
}
+ dai_data->rate = params_rate(params);
/* Q6 only supports 16 as now */
dai_data->port_config.mi2s.bitwidth = 16;
@@ -760,14 +761,14 @@
dev_dbg(dai->dev, "enter %s, id = %d\n", __func__,
dai->id);
- if (!tx_slot && !rx_slot)
- return -EINVAL;
switch (dai->id) {
case SLIMBUS_0_RX:
/* channel number to be between 128 and 255. For RX port
* use channel numbers from 138 to 144, for TX port
* use channel numbers from 128 to 137
*/
+ if (!rx_slot)
+ return -EINVAL;
for (i = 0; i < rx_num; i++) {
dai_data->port_config.slim_sch.slave_ch_mapping[i] =
rx_slot[i];
@@ -786,6 +787,8 @@
* use channel numbers from 138 to 144, for TX port
* use channel numbers from 128 to 137
*/
+ if (!tx_slot)
+ return -EINVAL;
for (i = 0; i < tx_num; i++) {
dai_data->port_config.slim_sch.slave_ch_mapping[i] =
tx_slot[i];
diff --git a/sound/soc/msm/msm-pcm-afe.c b/sound/soc/msm/msm-pcm-afe.c
index 01b8463..a176118 100644
--- a/sound/soc/msm/msm-pcm-afe.c
+++ b/sound/soc/msm/msm-pcm-afe.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -149,6 +149,8 @@
}
case AFE_EVENT_RTPORT_STOP:
pr_debug("%s: event!=0\n", __func__);
+ prtd->start = 0;
+ snd_pcm_stop(substream, SNDRV_PCM_STATE_SETUP);
break;
case AFE_EVENT_RTPORT_LOW_WM:
pr_debug("%s: Underrun\n", __func__);
@@ -213,6 +215,8 @@
}
case AFE_EVENT_RTPORT_STOP:
pr_debug("%s: event!=0\n", __func__);
+ prtd->start = 0;
+ snd_pcm_stop(substream, SNDRV_PCM_STATE_SETUP);
break;
case AFE_EVENT_RTPORT_LOW_WM:
pr_debug("%s: Underrun\n", __func__);
diff --git a/sound/soc/msm/msm-pcm-lpa.c b/sound/soc/msm/msm-pcm-lpa.c
index 83fd691..1acb57f 100644
--- a/sound/soc/msm/msm-pcm-lpa.c
+++ b/sound/soc/msm/msm-pcm-lpa.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -27,6 +27,10 @@
#include <asm/dma.h>
#include <linux/dma-mapping.h>
#include <linux/android_pmem.h>
+#include <sound/snd_compress_params.h>
+#include <sound/compress_offload.h>
+#include <sound/compress_driver.h>
+#include <sound/timer.h>
#include "msm-pcm-q6.h"
#include "msm-pcm-routing.h"
@@ -92,6 +96,10 @@
prtd->pcm_irq_pos += prtd->pcm_count;
if (atomic_read(&prtd->start))
snd_pcm_period_elapsed(substream);
+ else
+ if (substream->timer_running)
+ snd_timer_interrupt(substream->timer, 1);
+
atomic_inc(&prtd->out_count);
wake_up(&the_locks.write_wait);
if (!atomic_read(&prtd->start)) {
@@ -459,7 +467,8 @@
return -ENOMEM;
}
buf = prtd->audio_client->port[dir].buf;
- if (!buf && !buf[0].data)
+
+ if (buf == NULL || buf[0].data == NULL)
return -ENOMEM;
pr_debug("%s:buf = %p\n", __func__, buf);
@@ -482,8 +491,37 @@
int rc = 0;
struct snd_pcm_runtime *runtime = substream->runtime;
struct msm_audio *prtd = runtime->private_data;
+ uint64_t timestamp;
+ uint64_t temp;
switch (cmd) {
+ case SNDRV_COMPRESS_TSTAMP: {
+ struct snd_compr_tstamp tstamp;
+ pr_debug("SNDRV_COMPRESS_TSTAMP\n");
+
+ memset(&tstamp, 0x0, sizeof(struct snd_compr_tstamp));
+ timestamp = q6asm_get_session_time(prtd->audio_client);
+ if (timestamp < 0) {
+ pr_err("%s: Get Session Time return value =%lld\n",
+ __func__, timestamp);
+ return -EAGAIN;
+ }
+ temp = (timestamp * 2 * runtime->channels);
+ temp = temp * (runtime->rate/1000);
+ temp = div_u64(temp, 1000);
+ tstamp.sampling_rate = runtime->rate;
+ tstamp.rendered = (size_t)(temp & 0xFFFFFFFF);
+ tstamp.decoded = (size_t)((temp >> 32) & 0xFFFFFFFF);
+ tstamp.timestamp = timestamp;
+ pr_debug("%s: bytes_consumed:lsb = %d, msb = %d,"
+ "timestamp = %lld,\n",
+ __func__, tstamp.rendered, tstamp.decoded,
+ tstamp.timestamp);
+ if (copy_to_user((void *) arg, &tstamp,
+ sizeof(struct snd_compr_tstamp)))
+ return -EFAULT;
+ return 0;
+ }
case SNDRV_PCM_IOCTL1_RESET:
prtd->cmd_ack = 0;
rc = q6asm_cmd(prtd->audio_client, CMD_FLUSH);
diff --git a/sound/soc/msm/msm-pcm-routing.c b/sound/soc/msm/msm-pcm-routing.c
index b01c22c..4f19160 100644
--- a/sound/soc/msm/msm-pcm-routing.c
+++ b/sound/soc/msm/msm-pcm-routing.c
@@ -254,6 +254,23 @@
mutex_unlock(&routing_lock);
}
+/* Check if FE/BE route is set */
+static bool msm_pcm_routing_route_is_set(u16 be_id, u16 fe_id)
+{
+ bool rc = false;
+
+ if (fe_id > MSM_FRONTEND_DAI_MM_MAX_ID) {
+ /* recheck FE ID in the mixer control defined in this file */
+ pr_err("%s: bad MM ID\n", __func__);
+ return rc;
+ }
+
+ if (test_bit(fe_id, &msm_bedais[be_id].fe_sessions))
+ rc = true;
+
+ return rc;
+}
+
static void msm_pcm_routing_process_audio(u16 reg, u16 val, int set)
{
int session_type, path_type;
@@ -350,10 +367,12 @@
(struct soc_mixer_control *)kcontrol->private_value;
- if (ucontrol->value.integer.value[0]) {
+ if (ucontrol->value.integer.value[0] &&
+ msm_pcm_routing_route_is_set(mc->reg, mc->shift) == false) {
msm_pcm_routing_process_audio(mc->reg, mc->shift, 1);
snd_soc_dapm_mixer_update_power(widget, kcontrol, 1);
- } else {
+ } else if (!ucontrol->value.integer.value[0] &&
+ msm_pcm_routing_route_is_set(mc->reg, mc->shift) == true) {
msm_pcm_routing_process_audio(mc->reg, mc->shift, 0);
snd_soc_dapm_mixer_update_power(widget, kcontrol, 0);
}
diff --git a/sound/soc/msm/msm-pcm-voice.c b/sound/soc/msm/msm-pcm-voice.c
index eafe0f9..5a0f27a 100644
--- a/sound/soc/msm/msm-pcm-voice.c
+++ b/sound/soc/msm/msm-pcm-voice.c
@@ -129,7 +129,7 @@
struct snd_pcm_runtime *runtime = substream->runtime;
struct msm_voice *prtd = runtime->private_data;
- int ret;
+ int ret = 0;
mutex_lock(&prtd->lock);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
@@ -217,6 +217,26 @@
return 0;
}
+static int msm_voice_rx_device_mute_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ ucontrol->value.integer.value[0] =
+ voc_get_rx_device_mute(voc_get_session_id(VOICE_SESSION_NAME));
+ return 0;
+}
+
+static int msm_voice_rx_device_mute_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ int mute = ucontrol->value.integer.value[0];
+
+ pr_debug("%s: mute=%d\n", __func__, mute);
+
+ voc_set_rx_device_mute(voc_get_session_id(VOICE_SESSION_NAME), mute);
+
+ return 0;
+}
+
static const char const *tty_mode[] = {"OFF", "HCO", "VCO", "FULL"};
static const struct soc_enum msm_tty_mode_enum[] = {
SOC_ENUM_SINGLE_EXT(4, tty_mode),
@@ -308,6 +328,9 @@
}
static struct snd_kcontrol_new msm_voice_controls[] = {
+ SOC_SINGLE_EXT("Voice Rx Device Mute", SND_SOC_NOPM, 0, 1, 0,
+ msm_voice_rx_device_mute_get,
+ msm_voice_rx_device_mute_put),
SOC_SINGLE_EXT("Voice Tx Mute", SND_SOC_NOPM, 0, 1, 0,
msm_voice_mute_get, msm_voice_mute_put),
SOC_SINGLE_EXT("Voice Rx Volume", SND_SOC_NOPM, 0, 5, 0,
diff --git a/sound/soc/msm/msm-pcm-voip.c b/sound/soc/msm/msm-pcm-voip.c
index 56b4cf5..2301472 100644
--- a/sound/soc/msm/msm-pcm-voip.c
+++ b/sound/soc/msm/msm-pcm-voip.c
@@ -108,6 +108,7 @@
uint32_t mode;
uint32_t rate_type;
uint32_t rate;
+ uint32_t dtx_mode;
uint8_t capture_start;
uint8_t playback_start;
@@ -200,6 +201,31 @@
return 0;
}
+static int msm_voip_dtx_mode_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ mutex_lock(&voip_info.lock);
+
+ voip_info.dtx_mode = ucontrol->value.integer.value[0];
+
+ pr_debug("%s: dtx: %d\n", __func__, voip_info.dtx_mode);
+
+ mutex_unlock(&voip_info.lock);
+
+ return 0;
+}
+static int msm_voip_dtx_mode_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ mutex_lock(&voip_info.lock);
+
+ ucontrol->value.integer.value[0] = voip_info.dtx_mode;
+
+ mutex_unlock(&voip_info.lock);
+
+ return 0;
+}
+
static struct snd_kcontrol_new msm_voip_controls[] = {
SOC_SINGLE_EXT("Voip Tx Mute", SND_SOC_NOPM, 0, 1, 0,
msm_voip_mute_get, msm_voip_mute_put),
@@ -208,6 +234,8 @@
SOC_SINGLE_MULTI_EXT("Voip Mode Rate Config", SND_SOC_NOPM, 0, 23850,
0, 2, msm_voip_mode_rate_config_get,
msm_voip_mode_rate_config_put),
+ SOC_SINGLE_EXT("Voip Dtx Mode", SND_SOC_NOPM, 0, 1, 0,
+ msm_voip_dtx_mode_get, msm_voip_dtx_mode_put),
};
static int msm_pcm_voip_probe(struct snd_soc_platform *platform)
@@ -713,11 +741,13 @@
if ((prtd->play_samp_rate == 8000) &&
(prtd->cap_samp_rate == 8000))
voc_config_vocoder(media_type, rate_type,
- VSS_NETWORK_ID_VOIP_NB);
+ VSS_NETWORK_ID_VOIP_NB,
+ voip_info.dtx_mode);
else if ((prtd->play_samp_rate == 16000) &&
(prtd->cap_samp_rate == 16000))
voc_config_vocoder(media_type, rate_type,
- VSS_NETWORK_ID_VOIP_WB);
+ VSS_NETWORK_ID_VOIP_WB,
+ voip_info.dtx_mode);
else {
pr_debug("%s: Invalid rate playback %d, capture %d\n",
__func__, prtd->play_samp_rate,
diff --git a/sound/soc/msm/msm-pcm.c b/sound/soc/msm/msm-pcm.c
index bea528f..ea31985 100644
--- a/sound/soc/msm/msm-pcm.c
+++ b/sound/soc/msm/msm-pcm.c
@@ -2,7 +2,7 @@
*
* Copyright (C) 2008 Google, Inc.
* Copyright (C) 2008 HTC Corporation
- * Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2008-2009, 2012 Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -45,8 +45,6 @@
msm_adsp_write(prtd->audrec, QDSP_uPAudRecCmdQueue, cmd, len)
int intcnt;
-static int audio_dsp_send_buffer(struct msm_audio *prtd,
- unsigned idx, unsigned len);
struct audio_frame {
uint16_t count_low;
@@ -139,12 +137,15 @@
if (prtd->ops->playback)
prtd->ops->playback(prtd);
+ if (prtd->mmap_flag)
+ break;
+
spin_lock_irqsave(&the_locks.write_dsp_lock, flag);
if (prtd->running) {
prtd->out[idx].used = 0;
frame = prtd->out + prtd->out_tail;
if (frame->used) {
- audio_dsp_send_buffer(prtd,
+ alsa_dsp_send_buffer(prtd,
prtd->out_tail,
frame->used);
prtd->out_tail ^= 1;
@@ -414,7 +415,7 @@
spin_lock_irqsave(&the_locks.write_dsp_lock, flag);
frame = prtd->out + prtd->out_tail;
if (frame->used && prtd->out_needed) {
- audio_dsp_send_buffer(prtd, prtd->out_tail,
+ alsa_dsp_send_buffer(prtd, prtd->out_tail,
frame->used);
prtd->out_tail ^= 1;
prtd->out_needed--;
@@ -583,7 +584,7 @@
}
EXPORT_SYMBOL(alsa_buffer_read);
-static int audio_dsp_send_buffer(struct msm_audio *prtd,
+int alsa_dsp_send_buffer(struct msm_audio *prtd,
unsigned idx, unsigned len)
{
audpp_cmd_pcm_intf_send_buffer cmd;
diff --git a/sound/soc/msm/msm-pcm.h b/sound/soc/msm/msm-pcm.h
index e7ddd30..6e1325b 100644
--- a/sound/soc/msm/msm-pcm.h
+++ b/sound/soc/msm/msm-pcm.h
@@ -2,7 +2,7 @@
*
* Copyright (C) 2008 Google, Inc.
* Copyright (C) 2008 HTC Corporation
- * Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2008-2009, 2012 Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -173,11 +173,15 @@
int running;
int stopped; /* set when stopped, cleared on flush */
int eos_ack;
+ int mmap_flag;
+ int period;
};
/* platform data */
+extern int alsa_dsp_send_buffer(struct msm_audio *prtd,
+ unsigned idx, unsigned len);
extern int audio_dsp_out_enable(struct msm_audio *prtd, int yes);
extern struct snd_soc_platform_driver msm_soc_platform;
diff --git a/sound/soc/msm/msm7k-pcm.c b/sound/soc/msm/msm7k-pcm.c
index 1f36e3b..6ef924f 100644
--- a/sound/soc/msm/msm7k-pcm.c
+++ b/sound/soc/msm/msm7k-pcm.c
@@ -1,6 +1,6 @@
/* linux/sound/soc/msm/msm7k-pcm.c
*
- * Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2008-2009, 2012 Code Aurora Forum. All rights reserved.
*
* All source code in this file is licensed under the following license except
* where indicated.
@@ -109,18 +109,20 @@
}
static struct snd_pcm_hardware msm_pcm_playback_hardware = {
- .info = SNDRV_PCM_INFO_INTERLEAVED,
+ .info = SNDRV_PCM_INFO_MMAP |
+ SNDRV_PCM_INFO_MMAP_VALID |
+ SNDRV_PCM_INFO_INTERLEAVED,
.formats = USE_FORMATS,
.rates = USE_RATE,
.rate_min = USE_RATE_MIN,
.rate_max = USE_RATE_MAX,
.channels_min = USE_CHANNELS_MIN,
.channels_max = USE_CHANNELS_MAX,
- .buffer_bytes_max = MAX_BUFFER_PLAYBACK_SIZE,
- .period_bytes_min = 64,
- .period_bytes_max = MAX_PERIOD_SIZE,
- .periods_min = USE_PERIODS_MIN,
- .periods_max = USE_PERIODS_MAX,
+ .buffer_bytes_max = 4800 * 2,
+ .period_bytes_min = 4800,
+ .period_bytes_max = 4800,
+ .periods_min = 2,
+ .periods_max = 2,
.fifo_size = 0,
};
@@ -151,10 +153,36 @@
.mask = 0,
};
+static void msm_pcm_enqueue_data(struct snd_pcm_substream *substream)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct msm_audio *prtd = runtime->private_data;
+ unsigned int period_size;
+
+ pr_debug("prtd->out_tail =%d mmap_flag=%d\n",
+ prtd->out_tail, prtd->mmap_flag);
+ period_size = snd_pcm_lib_period_bytes(substream);
+ alsa_dsp_send_buffer(prtd, prtd->out_tail, period_size);
+ prtd->out_tail ^= 1;
+ ++copy_count;
+ prtd->period++;
+ if (unlikely(prtd->period >= runtime->periods))
+ prtd->period = 0;
+
+}
+
static void playback_event_handler(void *data)
{
struct msm_audio *prtd = data;
snd_pcm_period_elapsed(prtd->playback_substream);
+ if (prtd->mmap_flag) {
+ if (prtd->dir == SNDRV_PCM_STREAM_CAPTURE)
+ return;
+ if (!prtd->stopped)
+ msm_pcm_enqueue_data(prtd->playback_substream);
+ else
+ prtd->out_needed++;
+ }
}
static void capture_event_handler(void *data)
@@ -177,6 +205,26 @@
prtd->out_sample_rate = runtime->rate;
prtd->out_channel_mode = runtime->channels;
+ if (prtd->enabled | !(prtd->mmap_flag))
+ return 0;
+
+ prtd->data = substream->dma_buffer.area;
+ prtd->phys = substream->dma_buffer.addr;
+ prtd->out[0].data = prtd->data + 0;
+ prtd->out[0].addr = prtd->phys + 0;
+ prtd->out[0].size = BUFSZ;
+ prtd->out[1].data = prtd->data + BUFSZ;
+ prtd->out[1].addr = prtd->phys + BUFSZ;
+ prtd->out[1].size = BUFSZ;
+
+ prtd->out[0].used = prtd->pcm_count;
+ prtd->out[1].used = prtd->pcm_count;
+
+ mutex_lock(&the_locks.lock);
+ alsa_audio_configure(prtd);
+ mutex_unlock(&the_locks.lock);
+
+
return 0;
}
@@ -231,16 +279,55 @@
static int msm_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct msm_audio *prtd = runtime->private_data;
+ unsigned long flag = 0;
int ret = 0;
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+ if ((substream->stream == SNDRV_PCM_STREAM_CAPTURE)
+ || !prtd->mmap_flag)
+ break;
+ if (!prtd->out_needed) {
+ prtd->stopped = 0;
+ break;
+ }
+ spin_lock_irqsave(&the_locks.write_dsp_lock, flag);
+ if (prtd->running == 1) {
+ if (prtd->stopped == 1) {
+ prtd->stopped = 0;
+ prtd->period = 0;
+ if (prtd->pcm_irq_pos == 0) {
+ prtd->out_tail = 0;
+ msm_pcm_enqueue_data(
+ prtd->playback_substream);
+ prtd->out_needed--;
+ } else {
+ prtd->out_tail = 1;
+ msm_pcm_enqueue_data(
+ prtd->playback_substream);
+ prtd->out_needed--;
+ }
+ if (prtd->out_needed) {
+ prtd->out_tail ^= 1;
+ msm_pcm_enqueue_data(
+ prtd->playback_substream);
+ prtd->out_needed--;
+ }
+ }
+ }
+ spin_unlock_irqrestore(&the_locks.write_dsp_lock, flag);
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+ if ((substream->stream == SNDRV_PCM_STREAM_CAPTURE)
+ || !prtd->mmap_flag)
+ break;
+ prtd->stopped = 1;
break;
default:
ret = -EINVAL;
@@ -376,7 +463,6 @@
fbytes = frames_to_bytes(runtime, frames);
rc = alsa_send_buffer(prtd, buf, fbytes, NULL);
++copy_count;
- prtd->pcm_buf_pos += fbytes;
if (copy_count == 1) {
mutex_lock(&the_locks.lock);
alsa_audio_configure(prtd);
@@ -469,10 +555,27 @@
runtime->hw.info &= ~SNDRV_PCM_INFO_INTERLEAVED;
runtime->hw.info |= SNDRV_PCM_INFO_NONINTERLEAVED;
}
+ snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
return 0;
}
+int msm_pcm_mmap(struct snd_pcm_substream *substream,
+ struct vm_area_struct *vma)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct msm_audio *prtd = runtime->private_data;
+
+ prtd->out_head = 0; /* point to First buffer on startup */
+ prtd->mmap_flag = 1;
+ runtime->dma_bytes = snd_pcm_lib_period_bytes(substream)*2;
+ dma_mmap_coherent(substream->pcm->card->dev, vma,
+ runtime->dma_area,
+ runtime->dma_addr,
+ runtime->dma_bytes);
+ return 0;
+}
+
static struct snd_pcm_ops msm_pcm_ops = {
.open = msm_pcm_open,
.copy = msm_pcm_copy,
@@ -482,6 +585,7 @@
.prepare = msm_pcm_prepare,
.trigger = msm_pcm_trigger,
.pointer = msm_pcm_pointer,
+ .mmap = msm_pcm_mmap,
};
static int pcm_preallocate_dma_buffer(struct snd_pcm *pcm,
diff --git a/sound/soc/msm/msm8930.c b/sound/soc/msm/msm8930.c
new file mode 100644
index 0000000..a081253
--- /dev/null
+++ b/sound/soc/msm/msm8930.c
@@ -0,0 +1,1083 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/mfd/pm8xxx/pm8921.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/mfd/pm8xxx/pm8921.h>
+#include <linux/slab.h>
+#include <sound/core.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <sound/soc-dsp.h>
+#include <sound/pcm.h>
+#include <sound/jack.h>
+#include <asm/mach-types.h>
+#include <mach/socinfo.h>
+#include "msm-pcm-routing.h"
+#include "../codecs/wcd9304.h"
+
+/* 8930 machine driver */
+
+#define PM8921_GPIO_BASE NR_GPIO_IRQS
+#define PM8921_GPIO_PM_TO_SYS(pm_gpio) (pm_gpio - 1 + PM8921_GPIO_BASE)
+
+#define MSM8930_SPK_ON 1
+#define MSM8930_SPK_OFF 0
+
+#define msm8930_SLIM_0_RX_MAX_CHANNELS 2
+#define msm8930_SLIM_0_TX_MAX_CHANNELS 4
+
+#define BTSCO_RATE_8KHZ 8000
+#define BTSCO_RATE_16KHZ 16000
+
+#define BOTTOM_SPK_AMP_POS 0x1
+#define BOTTOM_SPK_AMP_NEG 0x2
+#define TOP_SPK_AMP_POS 0x4
+#define TOP_SPK_AMP_NEG 0x8
+
+#define GPIO_AUX_PCM_DOUT 63
+#define GPIO_AUX_PCM_DIN 64
+#define GPIO_AUX_PCM_SYNC 65
+#define GPIO_AUX_PCM_CLK 66
+
+#define SITAR_EXT_CLK_RATE 12288000
+
+#define SITAR_MBHC_DEF_BUTTONS 3
+#define SITAR_MBHC_DEF_RLOADS 5
+
+static int msm8930_spk_control;
+static int msm8930_slim_0_rx_ch = 1;
+static int msm8930_slim_0_tx_ch = 1;
+
+static int msm8930_btsco_rate = BTSCO_RATE_8KHZ;
+static int msm8930_btsco_ch = 1;
+
+static struct clk *codec_clk;
+static int clk_users;
+
+static int msm8930_headset_gpios_configured;
+
+static struct snd_soc_jack hs_jack;
+static struct snd_soc_jack button_jack;
+
+struct sitar_mbhc_calibration sitar_calib = {
+ .bias = SITAR_MICBIAS2,
+ .tldoh = 100,
+ .bg_fast_settle = 100,
+ .mic_current = SITAR_PID_MIC_5_UA,
+ .mic_pid = 100,
+ .hph_current = SITAR_PID_MIC_5_UA,
+ .setup_plug_removal_delay = 1000000,
+ .shutdown_plug_removal = 100000,
+};
+
+static void msm8930_ext_control(struct snd_soc_codec *codec)
+{
+ struct snd_soc_dapm_context *dapm = &codec->dapm;
+
+ pr_debug("%s: msm8930_spk_control = %d", __func__, msm8930_spk_control);
+ if (msm8930_spk_control == MSM8930_SPK_ON) {
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Left Pos");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Right Pos");
+ } else {
+ snd_soc_dapm_disable_pin(dapm, "Ext Spk Left Pos");
+ snd_soc_dapm_disable_pin(dapm, "Ext Spk Right Pos");
+ }
+
+ snd_soc_dapm_sync(dapm);
+}
+
+static int msm8930_get_spk(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ pr_debug("%s: msm8930_spk_control = %d", __func__, msm8930_spk_control);
+ ucontrol->value.integer.value[0] = msm8930_spk_control;
+ return 0;
+}
+static int msm8930_set_spk(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+
+ pr_debug("%s()\n", __func__);
+ if (msm8930_spk_control == ucontrol->value.integer.value[0])
+ return 0;
+
+ msm8930_spk_control = ucontrol->value.integer.value[0];
+ msm8930_ext_control(codec);
+ return 1;
+}
+
+static int msm8930_spkramp_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *k, int event)
+{
+ pr_debug("%s() %x\n", __func__, SND_SOC_DAPM_EVENT_ON(event));
+ /* TODO: add external speaker power amps support */
+ return 0;
+}
+int msm8930_enable_codec_ext_clk(
+ struct snd_soc_codec *codec, int enable)
+{
+ pr_debug("%s: enable = %d\n", __func__, enable);
+ if (enable) {
+ clk_users++;
+ pr_debug("%s: clk_users = %d\n", __func__, clk_users);
+ if (clk_users != 1)
+ return 0;
+
+ if (codec_clk) {
+ clk_set_rate(codec_clk, SITAR_EXT_CLK_RATE);
+ clk_enable(codec_clk);
+ sitar_mclk_enable(codec, 1);
+ } else {
+ pr_err("%s: Error setting Tabla MCLK\n", __func__);
+ clk_users--;
+ return -EINVAL;
+ }
+ } else {
+ pr_debug("%s: clk_users = %d\n", __func__, clk_users);
+ if (clk_users == 0)
+ return 0;
+ clk_users--;
+ if (!clk_users) {
+ pr_debug("%s: disabling MCLK. clk_users = %d\n",
+ __func__, clk_users);
+ clk_disable(codec_clk);
+ sitar_mclk_enable(codec, 0);
+ }
+ }
+ return 0;
+}
+
+static int msm8930_mclk_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ pr_debug("%s: event = %d\n", __func__, event);
+
+ switch (event) {
+ case SND_SOC_DAPM_PRE_PMU:
+ return msm8930_enable_codec_ext_clk(w->codec, 1);
+ case SND_SOC_DAPM_POST_PMD:
+ return msm8930_enable_codec_ext_clk(w->codec, 0);
+ }
+ return 0;
+}
+
+static const struct snd_soc_dapm_widget msm8930_dapm_widgets[] = {
+
+ SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
+ msm8930_mclk_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
+
+ SND_SOC_DAPM_SPK("Ext Spk Left Pos", msm8930_spkramp_event),
+ SND_SOC_DAPM_SPK("Ext Spk Right Pos", msm8930_spkramp_event),
+
+ SND_SOC_DAPM_MIC("Handset Mic", NULL),
+ SND_SOC_DAPM_MIC("Headset Mic", NULL),
+ SND_SOC_DAPM_MIC("Digital Mic1", NULL),
+ SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
+ SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
+
+ SND_SOC_DAPM_MIC("Digital Mic1", NULL),
+ SND_SOC_DAPM_MIC("Digital Mic2", NULL),
+ SND_SOC_DAPM_MIC("Digital Mic3", NULL),
+ SND_SOC_DAPM_MIC("Digital Mic4", NULL),
+
+};
+
+static const struct snd_soc_dapm_route common_audio_map[] = {
+
+ {"RX_BIAS", NULL, "MCLK"},
+ {"LDO_H", NULL, "MCLK"},
+
+ {"MIC BIAS1 Internal1", NULL, "MCLK"},
+ {"MIC BIAS2 Internal1", NULL, "MCLK"},
+
+ /* Speaker path */
+ {"Ext Spk Left Pos", NULL, "LINEOUT1"},
+ {"Ext Spk Right Pos", NULL, "LINEOUT2"},
+
+
+ {"AMIC2", NULL, "MIC BIAS2 Internal1"},
+ {"MIC BIAS2 Internal1", NULL, "Headset Mic"},
+
+ /* Microphone path */
+ {"AMIC1", NULL, "MIC BIAS1 Internal1"},
+ {"MIC BIAS1 Internal1", NULL, "Handset Mic"},
+
+ {"HEADPHONE", NULL, "LDO_H"},
+
+ /**
+ * The digital Mic routes are setup considering
+ * fluid as default device.
+ */
+
+ /**
+ * Digital Mic1. Front Bottom left Digital Mic on Fluid and MTP.
+ * Digital Mic GM5 on CDP mainboard.
+ * Conncted to DMIC2 Input on Tabla codec.
+ */
+ {"DMIC1", NULL, "MIC BIAS1 External"},
+ {"MIC BIAS1 External", NULL, "Digital Mic1"},
+
+ /**
+ * Digital Mic2. Front Bottom right Digital Mic on Fluid and MTP.
+ * Digital Mic GM6 on CDP mainboard.
+ * Conncted to DMIC1 Input on Tabla codec.
+ */
+ {"DMIC2", NULL, "MIC BIAS1 External"},
+ {"MIC BIAS1 External", NULL, "Digital Mic2"},
+ /**
+ * Digital Mic3. Back Bottom Digital Mic on Fluid.
+ * Digital Mic GM1 on CDP mainboard.
+ * Conncted to DMIC4 Input on Tabla codec.
+ */
+ {"DMIC3", NULL, "MIC BIAS2 External"},
+ {"MIC BIAS2 External", NULL, "Digital Mic3"},
+
+ /**
+ * Digital Mic4. Back top Digital Mic on Fluid.
+ * Digital Mic GM2 on CDP mainboard.
+ * Conncted to DMIC3 Input on Tabla codec.
+ */
+ {"DMIC4", NULL, "MIC BIAS2 External"},
+ {"MIC BIAS2 External", NULL, "Digital Mic4"},
+
+
+};
+
+static const char *spk_function[] = {"Off", "On"};
+static const char *slim0_rx_ch_text[] = {"One", "Two"};
+static const char *slim0_tx_ch_text[] = {"One", "Two", "Three", "Four"};
+
+static const struct soc_enum msm8930_enum[] = {
+ SOC_ENUM_SINGLE_EXT(2, spk_function),
+ SOC_ENUM_SINGLE_EXT(2, slim0_rx_ch_text),
+ SOC_ENUM_SINGLE_EXT(4, slim0_tx_ch_text),
+};
+
+static const char *btsco_rate_text[] = {"8000", "16000"};
+static const struct soc_enum msm8930_btsco_enum[] = {
+ SOC_ENUM_SINGLE_EXT(2, btsco_rate_text),
+};
+
+static int msm8930_slim_0_rx_ch_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ pr_debug("%s: msm8930_slim_0_rx_ch = %d\n", __func__,
+ msm8930_slim_0_rx_ch);
+ ucontrol->value.integer.value[0] = msm8930_slim_0_rx_ch - 1;
+ return 0;
+}
+
+static int msm8930_slim_0_rx_ch_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ msm8930_slim_0_rx_ch = ucontrol->value.integer.value[0] + 1;
+
+ pr_debug("%s: msm8930_slim_0_rx_ch = %d\n", __func__,
+ msm8930_slim_0_rx_ch);
+ return 1;
+}
+
+static int msm8930_slim_0_tx_ch_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ pr_debug("%s: msm8930_slim_0_tx_ch = %d\n", __func__,
+ msm8930_slim_0_tx_ch);
+ ucontrol->value.integer.value[0] = msm8930_slim_0_tx_ch - 1;
+ return 0;
+}
+
+static int msm8930_slim_0_tx_ch_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ msm8930_slim_0_tx_ch = ucontrol->value.integer.value[0] + 1;
+
+ pr_debug("%s: msm8930_slim_0_tx_ch = %d\n", __func__,
+ msm8930_slim_0_tx_ch);
+ return 1;
+}
+
+static int msm8930_btsco_rate_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ pr_debug("%s: msm8930_btsco_rate = %d", __func__, msm8930_btsco_rate);
+ ucontrol->value.integer.value[0] = msm8930_btsco_rate;
+ return 0;
+}
+
+static int msm8930_btsco_rate_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ switch (ucontrol->value.integer.value[0]) {
+ case 0:
+ msm8930_btsco_rate = BTSCO_RATE_8KHZ;
+ break;
+ case 1:
+ msm8930_btsco_rate = BTSCO_RATE_16KHZ;
+ break;
+ default:
+ msm8930_btsco_rate = BTSCO_RATE_8KHZ;
+ break;
+ }
+ pr_debug("%s: msm8930_btsco_rate = %d\n", __func__, msm8930_btsco_rate);
+ return 0;
+}
+
+static const struct snd_kcontrol_new sitar_msm8930_controls[] = {
+ SOC_ENUM_EXT("Speaker Function", msm8930_enum[0], msm8930_get_spk,
+ msm8930_set_spk),
+ SOC_ENUM_EXT("SLIM_0_RX Channels", msm8930_enum[1],
+ msm8930_slim_0_rx_ch_get, msm8930_slim_0_rx_ch_put),
+ SOC_ENUM_EXT("SLIM_0_TX Channels", msm8930_enum[2],
+ msm8930_slim_0_tx_ch_get, msm8930_slim_0_tx_ch_put),
+};
+
+static const struct snd_kcontrol_new int_btsco_rate_mixer_controls[] = {
+ SOC_ENUM_EXT("Internal BTSCO SampleRate", msm8930_btsco_enum[0],
+ msm8930_btsco_rate_get, msm8930_btsco_rate_put),
+};
+
+static int msm8930_btsco_init(struct snd_soc_pcm_runtime *rtd)
+{
+ int err = 0;
+ struct snd_soc_platform *platform = rtd->platform;
+
+ err = snd_soc_add_platform_controls(platform,
+ int_btsco_rate_mixer_controls,
+ ARRAY_SIZE(int_btsco_rate_mixer_controls));
+ if (err < 0)
+ return err;
+ return 0;
+}
+
+static int msm8930_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct snd_soc_dai *codec_dai = rtd->codec_dai;
+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+ int ret = 0;
+ unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
+ unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
+
+ pr_debug("%s: ch=%d\n", __func__,
+ msm8930_slim_0_rx_ch);
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ ret = snd_soc_dai_get_channel_map(codec_dai,
+ &tx_ch_cnt, tx_ch, &rx_ch_cnt , rx_ch);
+ if (ret < 0) {
+ pr_err("%s: failed to get codec chan map\n", __func__);
+ goto end;
+ }
+
+ ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
+ msm8930_slim_0_rx_ch, rx_ch);
+ if (ret < 0) {
+ pr_err("%s: failed to set cpu chan map\n", __func__);
+ goto end;
+ }
+ ret = snd_soc_dai_set_channel_map(codec_dai, 0, 0,
+ msm8930_slim_0_rx_ch, rx_ch);
+ if (ret < 0) {
+ pr_err("%s: failed to set codec channel map\n",
+ __func__);
+ goto end;
+ }
+ } else {
+ ret = snd_soc_dai_get_channel_map(codec_dai,
+ &tx_ch_cnt, tx_ch, &rx_ch_cnt , rx_ch);
+ if (ret < 0) {
+ pr_err("%s: failed to get codec chan map\n", __func__);
+ goto end;
+ }
+ ret = snd_soc_dai_set_channel_map(cpu_dai,
+ msm8930_slim_0_tx_ch, tx_ch, 0 , 0);
+ if (ret < 0) {
+ pr_err("%s: failed to set cpu chan map\n", __func__);
+ goto end;
+ }
+ ret = snd_soc_dai_set_channel_map(codec_dai,
+ msm8930_slim_0_tx_ch, tx_ch, 0, 0);
+ if (ret < 0) {
+ pr_err("%s: failed to set codec channel map\n",
+ __func__);
+ goto end;
+ }
+
+ }
+end:
+ return ret;
+}
+
+static int msm8930_audrx_init(struct snd_soc_pcm_runtime *rtd)
+{
+ int err;
+ struct snd_soc_codec *codec = rtd->codec;
+ struct snd_soc_dapm_context *dapm = &codec->dapm;
+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+
+ pr_debug("%s()\n", __func__);
+
+
+ rtd->pmdown_time = 0;
+
+ err = snd_soc_add_controls(codec, sitar_msm8930_controls,
+ ARRAY_SIZE(sitar_msm8930_controls));
+ if (err < 0)
+ return err;
+
+ snd_soc_dapm_new_controls(dapm, msm8930_dapm_widgets,
+ ARRAY_SIZE(msm8930_dapm_widgets));
+
+ snd_soc_dapm_add_routes(dapm, common_audio_map,
+ ARRAY_SIZE(common_audio_map));
+
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Left Pos");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Right Pos");
+
+ snd_soc_dapm_sync(dapm);
+
+ err = snd_soc_jack_new(codec, "Headset Jack",
+ (SND_JACK_HEADSET | SND_JACK_OC_HPHL | SND_JACK_OC_HPHR),
+ &hs_jack);
+ if (err) {
+ pr_err("failed to create new jack\n");
+ return err;
+ }
+
+ err = snd_soc_jack_new(codec, "Button Jack",
+ SND_JACK_BTN_0, &button_jack);
+ if (err) {
+ pr_err("failed to create new jack\n");
+ return err;
+ }
+ codec_clk = clk_get(cpu_dai->dev, "osr_clk");
+ sitar_hs_detect(codec, &hs_jack, &button_jack, &sitar_calib);
+ return 0;
+}
+
+static struct snd_soc_dsp_link lpa_fe_media = {
+ .playback = true,
+ .trigger = {
+ SND_SOC_DSP_TRIGGER_POST,
+ SND_SOC_DSP_TRIGGER_POST
+ },
+};
+
+static struct snd_soc_dsp_link fe_media = {
+ .playback = true,
+ .capture = true,
+ .trigger = {
+ SND_SOC_DSP_TRIGGER_POST,
+ SND_SOC_DSP_TRIGGER_POST
+ },
+};
+
+static struct snd_soc_dsp_link slimbus0_hl_media = {
+ .playback = true,
+ .capture = true,
+ .trigger = {
+ SND_SOC_DSP_TRIGGER_POST,
+ SND_SOC_DSP_TRIGGER_POST
+ },
+};
+
+static struct snd_soc_dsp_link int_fm_hl_media = {
+ .playback = true,
+ .capture = true,
+ .trigger = {
+ SND_SOC_DSP_TRIGGER_POST,
+ SND_SOC_DSP_TRIGGER_POST
+ },
+};
+
+/* bi-directional media definition for hostless PCM device */
+static struct snd_soc_dsp_link bidir_hl_media = {
+ .playback = true,
+ .capture = true,
+ .trigger = {
+ SND_SOC_DSP_TRIGGER_POST,
+ SND_SOC_DSP_TRIGGER_POST
+ },
+};
+
+static struct snd_soc_dsp_link hdmi_rx_hl = {
+ .playback = true,
+ .trigger = {
+ SND_SOC_DSP_TRIGGER_POST,
+ SND_SOC_DSP_TRIGGER_POST
+ },
+};
+
+static int msm8930_slim_0_rx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_interval *rate = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_RATE);
+
+ struct snd_interval *channels = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_CHANNELS);
+
+ pr_debug("%s()\n", __func__);
+ rate->min = rate->max = 48000;
+ channels->min = channels->max = msm8930_slim_0_rx_ch;
+
+ return 0;
+}
+
+static int msm8930_slim_0_tx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_interval *rate = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_RATE);
+
+ struct snd_interval *channels = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_CHANNELS);
+
+ pr_debug("%s()\n", __func__);
+ rate->min = rate->max = 48000;
+ channels->min = channels->max = msm8930_slim_0_tx_ch;
+
+ return 0;
+}
+
+static int msm8930_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_interval *rate = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_RATE);
+
+ pr_debug("%s()\n", __func__);
+ rate->min = rate->max = 48000;
+
+ return 0;
+}
+
+static int msm8930_hdmi_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_interval *rate = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_RATE);
+
+ struct snd_interval *channels = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_CHANNELS);
+
+ rate->min = rate->max = 48000;
+ channels->min = channels->max = 2;
+
+ return 0;
+}
+
+static int msm8930_btsco_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_interval *rate = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_RATE);
+
+ struct snd_interval *channels = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_CHANNELS);
+
+ rate->min = rate->max = msm8930_btsco_rate;
+ channels->min = channels->max = msm8930_btsco_ch;
+
+ return 0;
+}
+static int msm8930_auxpcm_be_params_fixup(struct snd_soc_pcm_runtime *rtd,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_interval *rate = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_RATE);
+
+ struct snd_interval *channels = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_CHANNELS);
+
+ /* PCM only supports mono output with 8khz sample rate */
+ rate->min = rate->max = 8000;
+ channels->min = channels->max = 1;
+
+ return 0;
+}
+static int msm8930_aux_pcm_get_gpios(void)
+{
+ int ret = 0;
+
+ pr_debug("%s\n", __func__);
+
+ ret = gpio_request(GPIO_AUX_PCM_DOUT, "AUX PCM DOUT");
+ if (ret < 0) {
+ pr_err("%s: Failed to request gpio(%d): AUX PCM DOUT",
+ __func__, GPIO_AUX_PCM_DOUT);
+ goto fail_dout;
+ }
+
+ ret = gpio_request(GPIO_AUX_PCM_DIN, "AUX PCM DIN");
+ if (ret < 0) {
+ pr_err("%s: Failed to request gpio(%d): AUX PCM DIN",
+ __func__, GPIO_AUX_PCM_DIN);
+ goto fail_din;
+ }
+
+ ret = gpio_request(GPIO_AUX_PCM_SYNC, "AUX PCM SYNC");
+ if (ret < 0) {
+ pr_err("%s: Failed to request gpio(%d): AUX PCM SYNC",
+ __func__, GPIO_AUX_PCM_SYNC);
+ goto fail_sync;
+ }
+ ret = gpio_request(GPIO_AUX_PCM_CLK, "AUX PCM CLK");
+ if (ret < 0) {
+ pr_err("%s: Failed to request gpio(%d): AUX PCM CLK",
+ __func__, GPIO_AUX_PCM_CLK);
+ goto fail_clk;
+ }
+
+ return 0;
+
+fail_clk:
+ gpio_free(GPIO_AUX_PCM_SYNC);
+fail_sync:
+ gpio_free(GPIO_AUX_PCM_DIN);
+fail_din:
+ gpio_free(GPIO_AUX_PCM_DOUT);
+fail_dout:
+
+ return ret;
+}
+
+static int msm8930_aux_pcm_free_gpios(void)
+{
+ gpio_free(GPIO_AUX_PCM_DIN);
+ gpio_free(GPIO_AUX_PCM_DOUT);
+ gpio_free(GPIO_AUX_PCM_SYNC);
+ gpio_free(GPIO_AUX_PCM_CLK);
+
+ return 0;
+}
+static int msm8930_startup(struct snd_pcm_substream *substream)
+{
+ pr_debug("%s(): substream = %s stream = %d\n", __func__,
+ substream->name, substream->stream);
+ return 0;
+}
+
+static int msm8930_auxpcm_startup(struct snd_pcm_substream *substream)
+{
+ int ret = 0;
+
+ pr_debug("%s(): substream = %s\n", __func__, substream->name);
+ ret = msm8930_aux_pcm_get_gpios();
+ if (ret < 0) {
+ pr_err("%s: Aux PCM GPIO request failed\n", __func__);
+ return -EINVAL;
+ }
+ return 0;
+}
+
+static void msm8930_auxpcm_shutdown(struct snd_pcm_substream *substream)
+{
+
+ pr_debug("%s(): substream = %s\n", __func__, substream->name);
+ msm8930_aux_pcm_free_gpios();
+}
+
+static void msm8930_shutdown(struct snd_pcm_substream *substream)
+{
+ pr_debug("%s(): substream = %s stream = %d\n", __func__,
+ substream->name, substream->stream);
+}
+
+static struct snd_soc_ops msm8930_be_ops = {
+ .startup = msm8930_startup,
+ .hw_params = msm8930_hw_params,
+ .shutdown = msm8930_shutdown,
+};
+
+static struct snd_soc_ops msm8930_auxpcm_be_ops = {
+ .startup = msm8930_auxpcm_startup,
+ .shutdown = msm8930_auxpcm_shutdown,
+};
+
+/* Digital audio interface glue - connects codec <---> CPU */
+static struct snd_soc_dai_link msm8930_dai[] = {
+ /* FrontEnd DAI Links */
+ {
+ .name = "MSM8930 Media1",
+ .stream_name = "MultiMedia1",
+ .cpu_dai_name = "MultiMedia1",
+ .platform_name = "msm-pcm-dsp",
+ .dynamic = 1,
+ .dsp_link = &fe_media,
+ .be_id = MSM_FRONTEND_DAI_MULTIMEDIA1
+ },
+ {
+ .name = "MSM8930 Media2",
+ .stream_name = "MultiMedia2",
+ .cpu_dai_name = "MultiMedia2",
+ .platform_name = "msm-pcm-dsp",
+ .dynamic = 1,
+ .dsp_link = &fe_media,
+ .be_id = MSM_FRONTEND_DAI_MULTIMEDIA2,
+ },
+ {
+ .name = "Circuit-Switch Voice",
+ .stream_name = "CS-Voice",
+ .cpu_dai_name = "CS-VOICE",
+ .platform_name = "msm-pcm-voice",
+ .dynamic = 1,
+ .dsp_link = &fe_media,
+ .be_id = MSM_FRONTEND_DAI_CS_VOICE,
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .ignore_suspend = 1,
+ },
+ {
+ .name = "MSM VoIP",
+ .stream_name = "VoIP",
+ .cpu_dai_name = "VoIP",
+ .platform_name = "msm-voip-dsp",
+ .dynamic = 1,
+ .dsp_link = &fe_media,
+ .be_id = MSM_FRONTEND_DAI_VOIP,
+ },
+ {
+ .name = "MSM8930 LPA",
+ .stream_name = "LPA",
+ .cpu_dai_name = "MultiMedia3",
+ .platform_name = "msm-pcm-lpa",
+ .dynamic = 1,
+ .dsp_link = &lpa_fe_media,
+ .be_id = MSM_FRONTEND_DAI_MULTIMEDIA3,
+ },
+ /* Hostless PMC purpose */
+ {
+ .name = "SLIMBUS_0 Hostless",
+ .stream_name = "SLIMBUS_0 Hostless",
+ .cpu_dai_name = "SLIMBUS0_HOSTLESS",
+ .platform_name = "msm-pcm-hostless",
+ .dynamic = 1,
+ .dsp_link = &slimbus0_hl_media,
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .ignore_suspend = 1,
+ /* .be_id = do not care */
+ },
+ {
+ .name = "INT_FM Hostless",
+ .stream_name = "INT_FM Hostless",
+ .cpu_dai_name = "INT_FM_HOSTLESS",
+ .platform_name = "msm-pcm-hostless",
+ .dynamic = 1,
+ .dsp_link = &int_fm_hl_media,
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .ignore_suspend = 1,
+ /* .be_id = do not care */
+ },
+ {
+ .name = "MSM AFE-PCM RX",
+ .stream_name = "AFE-PROXY RX",
+ .cpu_dai_name = "msm-dai-q6.241",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-rx",
+ .platform_name = "msm-pcm-afe",
+ .ignore_suspend = 1,
+ },
+ {
+ .name = "MSM AFE-PCM TX",
+ .stream_name = "AFE-PROXY TX",
+ .cpu_dai_name = "msm-dai-q6.240",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-tx",
+ .platform_name = "msm-pcm-afe",
+ .ignore_suspend = 1,
+ },
+ {
+ .name = "MSM8930 Compr",
+ .stream_name = "COMPR",
+ .cpu_dai_name = "MultiMedia4",
+ .platform_name = "msm-compr-dsp",
+ .dynamic = 1,
+ .dsp_link = &lpa_fe_media,
+ .be_id = MSM_FRONTEND_DAI_MULTIMEDIA4,
+ },
+ {
+ .name = "AUXPCM Hostless",
+ .stream_name = "AUXPCM Hostless",
+ .cpu_dai_name = "AUXPCM_HOSTLESS",
+ .platform_name = "msm-pcm-hostless",
+ .dynamic = 1,
+ .dsp_link = &bidir_hl_media,
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .ignore_suspend = 1,
+ },
+ /* HDMI Hostless */
+ {
+ .name = "HDMI_RX_HOSTLESS",
+ .stream_name = "HDMI_RX_HOSTLESS",
+ .cpu_dai_name = "HDMI_HOSTLESS",
+ .platform_name = "msm-pcm-hostless",
+ .dynamic = 1,
+ .dsp_link = &hdmi_rx_hl,
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .no_codec = 1,
+ .ignore_suspend = 1,
+ },
+ /* Backend DAI Links */
+ {
+ .name = LPASS_BE_SLIMBUS_0_RX,
+ .stream_name = "Slimbus Playback",
+ .cpu_dai_name = "msm-dai-q6.16384",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "sitar_codec",
+ .codec_dai_name = "sitar_rx1",
+ .no_pcm = 1,
+ .be_id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
+ .init = &msm8930_audrx_init,
+ .be_hw_params_fixup = msm8930_slim_0_rx_be_hw_params_fixup,
+ .ops = &msm8930_be_ops,
+ },
+ {
+ .name = LPASS_BE_SLIMBUS_0_TX,
+ .stream_name = "Slimbus Capture",
+ .cpu_dai_name = "msm-dai-q6.16385",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "sitar_codec",
+ .codec_dai_name = "sitar_tx1",
+ .no_pcm = 1,
+ .be_id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
+ .be_hw_params_fixup = msm8930_slim_0_tx_be_hw_params_fixup,
+ .ops = &msm8930_be_ops,
+ },
+ /* Backend BT/FM DAI Links */
+ {
+ .name = LPASS_BE_INT_BT_SCO_RX,
+ .stream_name = "Internal BT-SCO Playback",
+ .cpu_dai_name = "msm-dai-q6.12288",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-rx",
+ .init = &msm8930_btsco_init,
+ .no_pcm = 1,
+ .be_id = MSM_BACKEND_DAI_INT_BT_SCO_RX,
+ .be_hw_params_fixup = msm8930_btsco_be_hw_params_fixup,
+ },
+ {
+ .name = LPASS_BE_INT_BT_SCO_TX,
+ .stream_name = "Internal BT-SCO Capture",
+ .cpu_dai_name = "msm-dai-q6.12289",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-tx",
+ .no_pcm = 1,
+ .be_id = MSM_BACKEND_DAI_INT_BT_SCO_TX,
+ .be_hw_params_fixup = msm8930_btsco_be_hw_params_fixup,
+ },
+ {
+ .name = LPASS_BE_INT_FM_RX,
+ .stream_name = "Internal FM Playback",
+ .cpu_dai_name = "msm-dai-q6.12292",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-rx",
+ .no_pcm = 1,
+ .be_id = MSM_BACKEND_DAI_INT_FM_RX,
+ .be_hw_params_fixup = msm8930_be_hw_params_fixup,
+ },
+ {
+ .name = LPASS_BE_INT_FM_TX,
+ .stream_name = "Internal FM Capture",
+ .cpu_dai_name = "msm-dai-q6.12293",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-tx",
+ .no_pcm = 1,
+ .be_id = MSM_BACKEND_DAI_INT_FM_TX,
+ .be_hw_params_fixup = msm8930_be_hw_params_fixup,
+ },
+ /* HDMI BACK END DAI Link */
+ {
+ .name = LPASS_BE_HDMI,
+ .stream_name = "HDMI Playback",
+ .cpu_dai_name = "msm-dai-q6-hdmi.8",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-rx",
+ .no_pcm = 1,
+ .no_codec = 1,
+ .be_id = MSM_BACKEND_DAI_HDMI_RX,
+ .be_hw_params_fixup = msm8930_hdmi_be_hw_params_fixup,
+ },
+ /* Backend AFE DAI Links */
+ {
+ .name = LPASS_BE_AFE_PCM_RX,
+ .stream_name = "AFE Playback",
+ .cpu_dai_name = "msm-dai-q6.224",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-rx",
+ .no_codec = 1,
+ .no_pcm = 1,
+ .be_id = MSM_BACKEND_DAI_AFE_PCM_RX,
+ },
+ {
+ .name = LPASS_BE_AFE_PCM_TX,
+ .stream_name = "AFE Capture",
+ .cpu_dai_name = "msm-dai-q6.225",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-tx",
+ .no_codec = 1,
+ .no_pcm = 1,
+ .be_id = MSM_BACKEND_DAI_AFE_PCM_TX,
+ },
+ /* AUX PCM Backend DAI Links */
+ {
+ .name = LPASS_BE_AUXPCM_RX,
+ .stream_name = "AUX PCM Playback",
+ .cpu_dai_name = "msm-dai-q6.2",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-rx",
+ .no_pcm = 1,
+ .be_id = MSM_BACKEND_DAI_AUXPCM_RX,
+ .be_hw_params_fixup = msm8930_auxpcm_be_params_fixup,
+ .ops = &msm8930_auxpcm_be_ops,
+ },
+ {
+ .name = LPASS_BE_AUXPCM_TX,
+ .stream_name = "AUX PCM Capture",
+ .cpu_dai_name = "msm-dai-q6.3",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-tx",
+ .no_pcm = 1,
+ .be_id = MSM_BACKEND_DAI_AUXPCM_TX,
+ .be_hw_params_fixup = msm8930_auxpcm_be_params_fixup,
+ },
+ /* Incall Music BACK END DAI Link */
+ {
+ .name = LPASS_BE_VOICE_PLAYBACK_TX,
+ .stream_name = "Voice Farend Playback",
+ .cpu_dai_name = "msm-dai-q6.32773",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-rx",
+ .no_pcm = 1,
+ .no_codec = 1,
+ .be_id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
+ .be_hw_params_fixup = msm8930_be_hw_params_fixup,
+ },
+ /* Incall Record Uplink BACK END DAI Link */
+ {
+ .name = LPASS_BE_INCALL_RECORD_TX,
+ .stream_name = "Voice Uplink Capture",
+ .cpu_dai_name = "msm-dai-q6.32772",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-tx",
+ .no_pcm = 1,
+ .no_codec = 1,
+ .be_id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
+ .be_hw_params_fixup = msm8930_be_hw_params_fixup,
+ },
+ /* Incall Record Downlink BACK END DAI Link */
+ {
+ .name = LPASS_BE_INCALL_RECORD_RX,
+ .stream_name = "Voice Downlink Capture",
+ .cpu_dai_name = "msm-dai-q6.32771",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-tx",
+ .no_pcm = 1,
+ .no_codec = 1,
+ .be_id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
+ .be_hw_params_fixup = msm8930_be_hw_params_fixup,
+ },
+};
+
+struct snd_soc_card snd_soc_card_msm8930 = {
+ .name = "msm8930-sitar-snd-card",
+ .dai_link = msm8930_dai,
+ .num_links = ARRAY_SIZE(msm8930_dai),
+};
+
+static struct platform_device *msm8930_snd_device;
+
+static int msm8930_configure_headset_mic_gpios(void)
+{
+ int ret;
+ ret = gpio_request(80, "US_EURO_SWITCH");
+ if (ret) {
+ pr_err("%s: Failed to request gpio 80\n", __func__);
+ return ret;
+ }
+ ret = gpio_direction_output(80, 0);
+ if (ret) {
+ pr_err("%s: Unable to set direction\n", __func__);
+ gpio_free(80);
+ }
+ msm8930_headset_gpios_configured = 0;
+ return 0;
+}
+static void msm8930_free_headset_mic_gpios(void)
+{
+ if (msm8930_headset_gpios_configured)
+ gpio_free(80);
+}
+
+static int __init msm8930_audio_init(void)
+{
+ int ret;
+
+ if (!cpu_is_msm8930()) {
+ pr_err("%s: Not the right machine type\n", __func__);
+ return -ENODEV ;
+ }
+
+ msm8930_snd_device = platform_device_alloc("soc-audio", 0);
+ if (!msm8930_snd_device) {
+ pr_err("Platform device allocation failed\n");
+ return -ENOMEM;
+ }
+
+ platform_set_drvdata(msm8930_snd_device, &snd_soc_card_msm8930);
+ ret = platform_device_add(msm8930_snd_device);
+ if (ret) {
+ platform_device_put(msm8930_snd_device);
+ return ret;
+ }
+
+ if (msm8930_configure_headset_mic_gpios()) {
+ pr_err("%s Fail to configure headset mic gpios\n", __func__);
+ msm8930_headset_gpios_configured = 0;
+ } else
+ msm8930_headset_gpios_configured = 1;
+
+ return ret;
+
+}
+module_init(msm8930_audio_init);
+
+static void __exit msm8930_audio_exit(void)
+{
+ if (!cpu_is_msm8930()) {
+ pr_err("%s: Not the right machine type\n", __func__);
+ return ;
+ }
+ msm8930_free_headset_mic_gpios();
+ platform_device_unregister(msm8930_snd_device);
+}
+module_exit(msm8930_audio_exit);
+
+MODULE_DESCRIPTION("ALSA SoC MSM8930");
+MODULE_LICENSE("GPL v2");
diff --git a/sound/soc/msm/msm8960.c b/sound/soc/msm/msm8960.c
index eb363e7..0854dff 100644
--- a/sound/soc/msm/msm8960.c
+++ b/sound/soc/msm/msm8960.c
@@ -1391,7 +1391,7 @@
{
int ret;
- if (!cpu_is_msm8960() && !cpu_is_msm8930()) {
+ if (!cpu_is_msm8960()) {
pr_err("%s: Not the right machine type\n", __func__);
return -ENODEV ;
}
@@ -1455,7 +1455,7 @@
static void __exit msm8960_audio_exit(void)
{
- if (!cpu_is_msm8960() && !cpu_is_msm8930()) {
+ if (!cpu_is_msm8960()) {
pr_err("%s: Not the right machine type\n", __func__);
return ;
}
diff --git a/sound/soc/msm/qdsp6/q6adm.c b/sound/soc/msm/qdsp6/q6adm.c
index 2710fbb..a3e1c13 100644
--- a/sound/soc/msm/qdsp6/q6adm.c
+++ b/sound/soc/msm/qdsp6/q6adm.c
@@ -76,7 +76,11 @@
index = afe_get_port_index(data->token);
pr_debug("%s: Port ID %d, index %d\n", __func__,
data->token, index);
-
+ if (index < 0 || index >= AFE_MAX_PORTS) {
+ pr_err("%s: invalid port idx %d token %d\n",
+ __func__, index, data->token);
+ return 0;
+ }
if (data->opcode == APR_BASIC_RSP_RESULT) {
pr_debug("APR_BASIC_RSP_RESULT\n");
switch (payload[0]) {
@@ -139,6 +143,11 @@
s32 result = 0;
struct adm_set_params_command adm_params;
int index = afe_get_port_index(port_id);
+ if (index < 0 || index >= AFE_MAX_PORTS) {
+ pr_err("%s: invalid port idx %d portid %d\n",
+ __func__, index, port_id);
+ return 0;
+ }
pr_debug("%s: Port id %d, index %d\n", __func__, port_id, index);
@@ -205,8 +214,10 @@
get_audproc_cal(acdb_path, &aud_cal);
/* map & cache buffers used */
- if ((mem_addr_audproc[acdb_path].cal_paddr != aud_cal.cal_paddr) &&
- (aud_cal.cal_size > 0)) {
+ if (((mem_addr_audproc[acdb_path].cal_paddr != aud_cal.cal_paddr) &&
+ (aud_cal.cal_size > 0)) ||
+ (aud_cal.cal_size > mem_addr_audproc[acdb_path].cal_size)) {
+
if (mem_addr_audproc[acdb_path].cal_paddr != 0)
adm_memory_unmap_regions(
&mem_addr_audproc[acdb_path].cal_paddr,
@@ -233,8 +244,9 @@
get_audvol_cal(acdb_path, &aud_cal);
/* map & cache buffers used */
- if ((mem_addr_audvol[acdb_path].cal_paddr != aud_cal.cal_paddr) &&
- (aud_cal.cal_size > 0)) {
+ if (((mem_addr_audvol[acdb_path].cal_paddr != aud_cal.cal_paddr) &&
+ (aud_cal.cal_size > 0)) ||
+ (aud_cal.cal_size > mem_addr_audvol[acdb_path].cal_size)) {
if (mem_addr_audvol[acdb_path].cal_paddr != 0)
adm_memory_unmap_regions(
&mem_addr_audvol[acdb_path].cal_paddr,
@@ -328,8 +340,8 @@
open.channel_config = channel_mode & 0x00FF;
open.rate = rate;
- pr_debug("%s: channel_config=%d port_id=%d rate=%d\
- topology_id=0x%X\n", __func__, open.channel_config,\
+ pr_debug("%s: channel_config=%d port_id=%d rate=%d"
+ "topology_id=0x%X\n", __func__, open.channel_config,\
open.endpoint_id1, open.rate,\
open.topology_id);
@@ -495,6 +507,11 @@
int ret = 0, i = 0;
/* Assumes port_ids have already been validated during adm_open */
int index = afe_get_port_index(copp_id);
+ if (index < 0 || index >= AFE_MAX_PORTS) {
+ pr_err("%s: invalid port idx %d token %d\n",
+ __func__, index, copp_id);
+ return 0;
+ }
pr_debug("%s: session 0x%x path:%d num_copps:%d port_id[0]:%d\n",
__func__, session_id, path, num_copps, port_id[0]);
@@ -523,7 +540,8 @@
pr_debug("%s: port_id[%d]: %d, index: %d\n", __func__, i,
port_id[i], tmp);
- route.session[0].copp_id[i] =
+ if (tmp >= 0 && tmp < AFE_MAX_PORTS)
+ route.session[0].copp_id[i] =
atomic_read(&this_adm.copp_id[tmp]);
}
if (num_copps % 2)
diff --git a/sound/soc/msm/qdsp6/q6afe.c b/sound/soc/msm/qdsp6/q6afe.c
index 59506f1..be08e25 100644
--- a/sound/soc/msm/qdsp6/q6afe.c
+++ b/sound/soc/msm/qdsp6/q6afe.c
@@ -37,7 +37,7 @@
static struct afe_ctl this_afe;
-static uint32_t afe_cal_addr[MAX_AUDPROC_TYPES];
+static struct acdb_cal_block afe_cal_addr[MAX_AUDPROC_TYPES];
#define TIMEOUT_MS 1000
#define Q6AFE_MAX_VOLUME 0x3FFF
@@ -332,12 +332,16 @@
goto done;
}
- if (afe_cal_addr[path] != cal_block.cal_paddr) {
- if (afe_cal_addr[path] != 0)
- afe_cmd_memory_unmap_nowait(afe_cal_addr[path]);
+ if ((afe_cal_addr[path].cal_paddr != cal_block.cal_paddr) ||
+ (cal_block.cal_size > afe_cal_addr[path].cal_size)) {
+ if (afe_cal_addr[path].cal_paddr != 0)
+ afe_cmd_memory_unmap_nowait(
+ afe_cal_addr[path].cal_paddr);
+
afe_cmd_memory_map_nowait(cal_block.cal_paddr,
cal_block.cal_size);
- afe_cal_addr[path] = cal_block.cal_paddr;
+ afe_cal_addr[path].cal_paddr = cal_block.cal_paddr;
+ afe_cal_addr[path].cal_size = cal_block.cal_size;
}
afe_cal.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
@@ -1565,8 +1569,9 @@
debugfs_remove(debugfs_afelb_gain);
#endif
for (i = 0; i < MAX_AUDPROC_TYPES; i++) {
- if (afe_cal_addr[i] != 0)
- afe_cmd_memory_unmap_nowait(afe_cal_addr[i]);
+ if (afe_cal_addr[i].cal_paddr != 0)
+ afe_cmd_memory_unmap_nowait(
+ afe_cal_addr[i].cal_paddr);
}
}
diff --git a/sound/soc/msm/qdsp6/q6asm.c b/sound/soc/msm/qdsp6/q6asm.c
index dc49f12..fe31b27 100644
--- a/sound/soc/msm/qdsp6/q6asm.c
+++ b/sound/soc/msm/qdsp6/q6asm.c
@@ -240,6 +240,13 @@
while (cnt >= 0) {
if (port->buf[cnt].data) {
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ ion_unmap_kernel(port->buf[cnt].client,
+ port->buf[cnt].handle);
+ ion_free(port->buf[cnt].client,
+ port->buf[cnt].handle);
+ ion_client_destroy(port->buf[cnt].client);
+#else
pr_debug("%s:data[%p]phys[%p][%p] cnt[%d]"
"mem_buffer[%p]\n",
__func__, (void *)port->buf[cnt].data,
@@ -259,6 +266,7 @@
free_contiguous_memory_by_paddr(
port->buf[cnt].phys);
+#endif
port->buf[cnt].data = NULL;
port->buf[cnt].phys = 0;
--(port->max_buf_cnt);
@@ -295,6 +303,19 @@
}
if (port->buf[0].data) {
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ ion_unmap_kernel(port->buf[0].client, port->buf[0].handle);
+ ion_free(port->buf[0].client, port->buf[0].handle);
+ ion_client_destroy(port->buf[0].client);
+ pr_debug("%s:data[%p]phys[%p][%p]"
+ ", client[%p] handle[%p]\n",
+ __func__,
+ (void *)port->buf[0].data,
+ (void *)port->buf[0].phys,
+ (void *)&port->buf[0].phys,
+ (void *)port->buf[0].client,
+ (void *)port->buf[0].handle);
+#else
pr_debug("%s:data[%p]phys[%p][%p]"
"mem_buffer[%p]\n",
__func__,
@@ -313,6 +334,7 @@
" failed\n", __func__);
}
free_contiguous_memory_by_paddr(port->buf[0].phys);
+#endif
}
while (cnt >= 0) {
@@ -465,6 +487,9 @@
int cnt = 0;
int rc = 0;
struct audio_buffer *buf;
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ int len;
+#endif
if (!(ac) || ((dir != IN) && (dir != OUT)))
return -EINVAL;
@@ -494,6 +519,50 @@
while (cnt < bufcnt) {
if (bufsz > 0) {
if (!buf[cnt].data) {
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ buf[cnt].client = msm_ion_client_create
+ (UINT_MAX, "audio_client");
+ if (IS_ERR_OR_NULL((void *)
+ buf[cnt].client)) {
+ pr_err("%s: ION create client"
+ " for AUDIO failed\n",
+ __func__);
+ goto fail;
+ }
+ buf[cnt].handle = ion_alloc
+ (buf[cnt].client, bufsz, SZ_4K,
+ (0x1 << ION_AUDIO_HEAP_ID));
+ if (IS_ERR_OR_NULL((void *)
+ buf[cnt].handle)) {
+ pr_err("%s: ION memory"
+ " allocation for AUDIO failed\n",
+ __func__);
+ goto fail;
+ }
+
+ rc = ion_phys(buf[cnt].client,
+ buf[cnt].handle,
+ (ion_phys_addr_t *)
+ &buf[cnt].phys,
+ (size_t *)&len);
+ if (rc) {
+ pr_err("%s: ION Get Physical"
+ " for AUDIO failed, rc = %d\n",
+ __func__, rc);
+ goto fail;
+ }
+
+ buf[cnt].data = ion_map_kernel
+ (buf[cnt].client, buf[cnt].handle,
+ 0);
+ if (IS_ERR_OR_NULL((void *)
+ buf[cnt].data)) {
+ pr_err("%s: ION memory"
+ " mapping for AUDIO failed\n", __func__);
+ goto fail;
+ }
+ memset((void *)buf[cnt].data, 0, bufsz);
+#else
unsigned int flags = 0;
buf[cnt].phys =
allocate_contiguous_ebi_nomap(bufsz,
@@ -526,16 +595,15 @@
mutex_unlock(&ac->cmd_lock);
goto fail;
}
+#endif
buf[cnt].used = 1;
buf[cnt].size = bufsz;
buf[cnt].actual_size = bufsz;
- pr_debug("%s data[%p]phys[%p][%p]"
- "mem_buffer[%p]\n",
+ pr_debug("%s data[%p]phys[%p][%p]\n",
__func__,
(void *)buf[cnt].data,
(void *)buf[cnt].phys,
- (void *)&buf[cnt].phys,
- (void *)buf[cnt].mem_buffer);
+ (void *)&buf[cnt].phys);
cnt++;
}
}
@@ -562,9 +630,12 @@
{
int cnt = 0;
int rc = 0;
- int flags = 0;
struct audio_buffer *buf;
-
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ int len;
+#else
+ int flags = 0;
+#endif
if (!(ac) || ((dir != IN) && (dir != OUT)))
return -EINVAL;
@@ -590,6 +661,35 @@
ac->port[dir].buf = buf;
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ buf[0].client = msm_ion_client_create(UINT_MAX, "audio_client");
+ if (IS_ERR_OR_NULL((void *)buf[0].client)) {
+ pr_err("%s: ION create client for AUDIO failed\n", __func__);
+ goto fail;
+ }
+ buf[0].handle = ion_alloc(buf[0].client, bufsz * bufcnt, SZ_4K,
+ (0x1 << ION_AUDIO_HEAP_ID));
+ if (IS_ERR_OR_NULL((void *) buf[0].handle)) {
+ pr_err("%s: ION memory allocation for AUDIO failed\n",
+ __func__);
+ goto fail;
+ }
+
+ rc = ion_phys(buf[0].client, buf[0].handle,
+ (ion_phys_addr_t *)&buf[0].phys, (size_t *)&len);
+ if (rc) {
+ pr_err("%s: ION Get Physical for AUDIO failed, rc = %d\n",
+ __func__, rc);
+ goto fail;
+ }
+
+ buf[0].data = ion_map_kernel(buf[0].client, buf[0].handle, 0);
+ if (IS_ERR_OR_NULL((void *) buf[0].data)) {
+ pr_err("%s: ION memory mapping for AUDIO failed\n", __func__);
+ goto fail;
+ }
+ memset((void *)buf[0].data, 0, (bufsz * bufcnt));
+#else
buf[0].phys = allocate_contiguous_ebi_nomap(bufsz * bufcnt,
SZ_4K);
if (!buf[0].phys) {
@@ -612,6 +712,7 @@
goto fail;
}
buf[0].data = buf[0].mem_buffer->vaddr;
+#endif
if (!buf[0].data) {
pr_err("%s:invalid vaddr,"
" iomap failed\n", __func__);
@@ -726,6 +827,9 @@
if (data->opcode == RESET_EVENTS) {
pr_debug("q6asm_callback: Reset event is received: %d %d apr[%p]\n",
data->reset_event, data->reset_proc, ac->apr);
+ if (ac->cb)
+ ac->cb(data->opcode, data->token,
+ (uint32_t *)data->payload, ac->priv);
apr_reset(ac->apr);
return 0;
}
@@ -3211,7 +3315,7 @@
{
pr_debug("%s\n", __func__);
- if (session_id < 0) {
+ if (session_id < 0 || session_id > SESSION_MAX) {
pr_err("%s: invalid session_id = %d\n", __func__, session_id);
return -EINVAL;
}
diff --git a/sound/soc/msm/qdsp6/q6voice.c b/sound/soc/msm/qdsp6/q6voice.c
index 532d92b..0376f34 100644
--- a/sound/soc/msm/qdsp6/q6voice.c
+++ b/sound/soc/msm/qdsp6/q6voice.c
@@ -662,6 +662,59 @@
return -EINVAL;
}
+static int voice_set_dtx(struct voice_data *v)
+{
+ int ret = 0;
+ void *apr_cvs;
+ u16 cvs_handle;
+ struct cvs_set_enc_dtx_mode_cmd cvs_set_dtx;
+
+ if (v == NULL) {
+ pr_err("%s: v is NULL\n", __func__);
+ return -EINVAL;
+ }
+ apr_cvs = common.apr_q6_cvs;
+
+ if (!apr_cvs) {
+ pr_err("%s: apr_cvs is NULL.\n", __func__);
+ return -EINVAL;
+ }
+
+ cvs_handle = voice_get_cvs_handle(v);
+
+ /* Set DTX */
+ cvs_set_dtx.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
+ APR_HDR_LEN(APR_HDR_SIZE),
+ APR_PKT_VER);
+ cvs_set_dtx.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE,
+ sizeof(cvs_set_dtx) - APR_HDR_SIZE);
+ cvs_set_dtx.hdr.src_port = v->session_id;
+ cvs_set_dtx.hdr.dest_port = cvs_handle;
+ cvs_set_dtx.hdr.token = 0;
+ cvs_set_dtx.hdr.opcode = VSS_ISTREAM_CMD_SET_ENC_DTX_MODE;
+ cvs_set_dtx.dtx_mode.enable = common.mvs_info.dtx_mode;
+
+ pr_debug("%s: Setting DTX %d\n", __func__, common.mvs_info.dtx_mode);
+
+ v->cvs_state = CMD_STATUS_FAIL;
+
+ ret = apr_send_pkt(apr_cvs, (uint32_t *) &cvs_set_dtx);
+ if (ret < 0) {
+ pr_err("%s: Error %d sending SET_DTX\n", __func__, ret);
+ return -EINVAL;
+ }
+
+ ret = wait_event_timeout(v->cvs_wait,
+ (v->cvs_state == CMD_STATUS_SUCCESS),
+ msecs_to_jiffies(TIMEOUT_MS));
+ if (!ret) {
+ pr_err("%s: wait_event timeout\n", __func__);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static int voice_config_cvs_vocoder(struct voice_data *v)
{
int ret = 0;
@@ -753,7 +806,6 @@
}
case VSS_MEDIA_ID_AMR_NB_MODEM: {
struct cvs_set_amr_enc_rate_cmd cvs_set_amr_rate;
- struct cvs_set_enc_dtx_mode_cmd cvs_set_dtx;
pr_debug("Setting AMR rate\n");
@@ -785,40 +837,15 @@
pr_err("%s: wait_event timeout\n", __func__);
goto fail;
}
- /* Disable DTX */
- pr_debug("Disabling DTX\n");
- cvs_set_dtx.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
- APR_HDR_LEN(APR_HDR_SIZE),
- APR_PKT_VER);
- cvs_set_dtx.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE,
- sizeof(cvs_set_dtx) - APR_HDR_SIZE);
- cvs_set_dtx.hdr.src_port = v->session_id;
- cvs_set_dtx.hdr.dest_port = cvs_handle;
- cvs_set_dtx.hdr.token = 0;
- cvs_set_dtx.hdr.opcode = VSS_ISTREAM_CMD_SET_ENC_DTX_MODE;
- cvs_set_dtx.dtx_mode.enable = 0;
-
- v->cvs_state = CMD_STATUS_FAIL;
-
- ret = apr_send_pkt(apr_cvs, (uint32_t *) &cvs_set_dtx);
- if (ret < 0) {
- pr_err("%s: Error %d sending SET_DTX\n",
- __func__, ret);
+ ret = voice_set_dtx(v);
+ if (ret < 0)
goto fail;
- }
- ret = wait_event_timeout(v->cvs_wait,
- (v->cvs_state == CMD_STATUS_SUCCESS),
- msecs_to_jiffies(TIMEOUT_MS));
- if (!ret) {
- pr_err("%s: wait_event timeout\n", __func__);
- goto fail;
- }
+
break;
}
case VSS_MEDIA_ID_AMR_WB_MODEM: {
struct cvs_set_amrwb_enc_rate_cmd cvs_set_amrwb_rate;
- struct cvs_set_enc_dtx_mode_cmd cvs_set_dtx;
pr_debug("Setting AMR WB rate\n");
@@ -851,70 +878,18 @@
pr_err("%s: wait_event timeout\n", __func__);
goto fail;
}
- /* Disable DTX */
- pr_debug("Disabling DTX\n");
- cvs_set_dtx.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
- APR_HDR_LEN(APR_HDR_SIZE),
- APR_PKT_VER);
- cvs_set_dtx.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE,
- sizeof(cvs_set_dtx) - APR_HDR_SIZE);
- cvs_set_dtx.hdr.src_port = v->session_id;
- cvs_set_dtx.hdr.dest_port = cvs_handle;
- cvs_set_dtx.hdr.token = 0;
- cvs_set_dtx.hdr.opcode = VSS_ISTREAM_CMD_SET_ENC_DTX_MODE;
- cvs_set_dtx.dtx_mode.enable = 0;
-
- v->cvs_state = CMD_STATUS_FAIL;
-
- ret = apr_send_pkt(apr_cvs, (uint32_t *) &cvs_set_dtx);
- if (ret < 0) {
- pr_err("%s: Error %d sending SET_DTX\n",
- __func__, ret);
+ ret = voice_set_dtx(v);
+ if (ret < 0)
goto fail;
- }
- ret = wait_event_timeout(v->cvs_wait,
- (v->cvs_state == CMD_STATUS_SUCCESS),
- msecs_to_jiffies(TIMEOUT_MS));
- if (!ret) {
- pr_err("%s: wait_event timeout\n", __func__);
- goto fail;
- }
+
break;
}
case VSS_MEDIA_ID_G729:
case VSS_MEDIA_ID_G711_ALAW:
case VSS_MEDIA_ID_G711_MULAW: {
- struct cvs_set_enc_dtx_mode_cmd cvs_set_dtx;
- /* Disable DTX */
- pr_debug("Disabling DTX\n");
+ ret = voice_set_dtx(v);
- cvs_set_dtx.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
- APR_HDR_LEN(APR_HDR_SIZE),
- APR_PKT_VER);
- cvs_set_dtx.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE,
- sizeof(cvs_set_dtx) - APR_HDR_SIZE);
- cvs_set_dtx.hdr.src_port = v->session_id;
- cvs_set_dtx.hdr.dest_port = cvs_handle;
- cvs_set_dtx.hdr.token = 0;
- cvs_set_dtx.hdr.opcode = VSS_ISTREAM_CMD_SET_ENC_DTX_MODE;
- cvs_set_dtx.dtx_mode.enable = 0;
-
- v->cvs_state = CMD_STATUS_FAIL;
-
- ret = apr_send_pkt(apr_cvs, (uint32_t *) &cvs_set_dtx);
- if (ret < 0) {
- pr_err("%s: Error %d sending SET_DTX\n",
- __func__, ret);
- goto fail;
- }
- ret = wait_event_timeout(v->cvs_wait,
- (v->cvs_state == CMD_STATUS_SUCCESS),
- msecs_to_jiffies(TIMEOUT_MS));
- if (!ret) {
- pr_err("%s: wait_event timeout\n", __func__);
- goto fail;
- }
break;
}
default:
@@ -2307,6 +2282,51 @@
return -EINVAL;
}
+static int voice_send_rx_device_mute_cmd(struct voice_data *v)
+{
+ struct cvp_set_mute_cmd cvp_mute_cmd;
+ int ret = 0;
+ void *apr_cvp;
+ u16 cvp_handle;
+ if (v == NULL) {
+ pr_err("%s: v is NULL\n", __func__);
+ return -EINVAL;
+ }
+ apr_cvp = common.apr_q6_cvp;
+
+ if (!apr_cvp) {
+ pr_err("%s: apr_cvp is NULL.\n", __func__);
+ return -EINVAL;
+ }
+ cvp_handle = voice_get_cvp_handle(v);
+
+ cvp_mute_cmd.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
+ APR_HDR_LEN(APR_HDR_SIZE),
+ APR_PKT_VER);
+ cvp_mute_cmd.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE,
+ sizeof(cvp_mute_cmd) - APR_HDR_SIZE);
+ cvp_mute_cmd.hdr.src_port = v->session_id;
+ cvp_mute_cmd.hdr.dest_port = cvp_handle;
+ cvp_mute_cmd.hdr.token = 0;
+ cvp_mute_cmd.hdr.opcode = VSS_IVOCPROC_CMD_SET_MUTE;
+ cvp_mute_cmd.cvp_set_mute.direction = 1;
+ cvp_mute_cmd.cvp_set_mute.mute_flag = v->dev_rx.mute;
+ v->cvp_state = CMD_STATUS_FAIL;
+ ret = apr_send_pkt(apr_cvp, (uint32_t *) &cvp_mute_cmd);
+ if (ret < 0) {
+ pr_err("Fail in sending RX device mute cmd\n");
+ return -EINVAL;
+ }
+ ret = wait_event_timeout(v->cvp_wait,
+ (v->cvp_state == CMD_STATUS_SUCCESS),
+ msecs_to_jiffies(TIMEOUT_MS));
+ if (!ret) {
+ pr_err("%s: wait_event timeout\n", __func__);
+ return -EINVAL;
+ }
+ return 0;
+}
+
static int voice_send_vol_index_cmd(struct voice_data *v)
{
struct cvp_set_rx_volume_index_cmd cvp_vol_cmd;
@@ -2908,6 +2928,49 @@
return ret;
}
+int voc_set_rx_device_mute(uint16_t session_id, uint32_t mute)
+{
+ struct voice_data *v = voice_get_session(session_id);
+ int ret = 0;
+
+ if (v == NULL) {
+ pr_err("%s: invalid session_id 0x%x\n", __func__, session_id);
+
+ return -EINVAL;
+ }
+
+ mutex_lock(&v->lock);
+
+ v->dev_rx.mute = mute;
+
+ if (v->voc_state == VOC_RUN)
+ ret = voice_send_rx_device_mute_cmd(v);
+
+ mutex_unlock(&v->lock);
+
+ return ret;
+}
+
+int voc_get_rx_device_mute(uint16_t session_id)
+{
+ struct voice_data *v = voice_get_session(session_id);
+ int ret = 0;
+
+ if (v == NULL) {
+ pr_err("%s: invalid session_id 0x%x\n", __func__, session_id);
+
+ return -EINVAL;
+ }
+
+ mutex_lock(&v->lock);
+
+ ret = v->dev_rx.mute;
+
+ mutex_unlock(&v->lock);
+
+ return ret;
+}
+
int voc_set_tty_mode(uint16_t session_id, uint8_t tty_mode)
{
struct voice_data *v = voice_get_session(session_id);
@@ -3236,11 +3299,13 @@
void voc_config_vocoder(uint32_t media_type,
uint32_t rate,
- uint32_t network_type)
+ uint32_t network_type,
+ uint32_t dtx_mode)
{
common.mvs_info.media_type = media_type;
common.mvs_info.rate = rate;
common.mvs_info.network_type = network_type;
+ common.mvs_info.dtx_mode = dtx_mode;
}
static int32_t qdsp_mvm_callback(struct apr_client_data *data, void *priv)
@@ -3594,6 +3659,7 @@
/* initialize dev_rx and dev_tx */
common.voice[i].dev_rx.volume = common.default_vol_val;
+ common.voice[i].dev_rx.mute = 0;
common.voice[i].dev_tx.mute = common.default_mute_val;
common.voice[i].dev_tx.port_id = 1;
diff --git a/sound/soc/msm/qdsp6/q6voice.h b/sound/soc/msm/qdsp6/q6voice.h
index 2dc08d6..0edf1c9 100644
--- a/sound/soc/msm/qdsp6/q6voice.h
+++ b/sound/soc/msm/qdsp6/q6voice.h
@@ -637,6 +637,8 @@
#define VSS_MEDIA_ID_G729 0x00010FD0
/* G.729AB (contains two 10ms vocoder frames. */
+#define VSS_IVOCPROC_CMD_SET_MUTE 0x000110EF
+
#define VOICE_CMD_SET_PARAM 0x00011006
#define VOICE_CMD_GET_PARAM 0x00011007
#define VOICE_EVT_GET_PARAM_ACK 0x00011008
@@ -729,6 +731,22 @@
/* Size of the volume calibration table in bytes. */
} __packed;
+struct vss_ivocproc_cmd_set_mute_t {
+ uint16_t direction;
+ /*
+ * 0 : TX only.
+ * 1 : RX only.
+ * 2 : TX and Rx.
+ */
+ uint16_t mute_flag;
+ /*
+ * Mute, un-mute.
+ *
+ * 0 : Disable.
+ * 1 : Enable.
+ */
+} __packed;
+
struct cvp_create_full_ctl_session_cmd {
struct apr_hdr hdr;
struct vss_ivocproc_cmd_create_full_control_session_t cvp_session;
@@ -770,6 +788,11 @@
struct apr_hdr hdr;
} __packed;
+struct cvp_set_mute_cmd {
+ struct apr_hdr hdr;
+ struct vss_ivocproc_cmd_set_mute_t cvp_set_mute;
+} __packed;
+
/* CB for up-link packets. */
typedef void (*ul_cb_fn)(uint8_t *voc_pkt,
uint32_t pkt_len,
@@ -785,6 +808,7 @@
uint32_t media_type;
uint32_t rate;
uint32_t network_type;
+ uint32_t dtx_mode;
ul_cb_fn ul_cb;
dl_cb_fn dl_cb;
void *private_data;
@@ -876,7 +900,8 @@
void voc_config_vocoder(uint32_t media_type,
uint32_t rate,
- uint32_t network_type);
+ uint32_t network_type,
+ uint32_t dtx_mode);
enum {
DEV_RX = 0,
@@ -902,6 +927,8 @@
uint32_t dev_type);
int voc_set_rx_vol_index(uint16_t session_id, uint32_t dir, uint32_t voc_idx);
int voc_set_tx_mute(uint16_t session_id, uint32_t dir, uint32_t mute);
+int voc_set_rx_device_mute(uint16_t session_id, uint32_t mute);
+int voc_get_rx_device_mute(uint16_t session_id);
int voc_disable_cvp(uint16_t session_id);
int voc_enable_cvp(uint16_t session_id);
int voc_set_route_flag(uint16_t session_id, uint8_t path_dir, uint8_t set);
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index d528f4b..76091e3 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -1144,6 +1144,11 @@
struct snd_soc_codec *codec;
int i;
+ if (!card->instantiated) {
+ dev_dbg(card->dev, "uninsantiated card found card->name = %s\n",
+ card->name);
+ return 0;
+ }
/* If the initialization of this soc device failed, there is no codec
* associated with it. Just bail out in this case.
*/
@@ -1397,6 +1402,11 @@
struct snd_soc_card *card = dev_get_drvdata(dev);
int i, ac97_control = 0;
+ if (!card->instantiated) {
+ dev_dbg(card->dev, "uninsantiated card found card->name = %s\n",
+ card->name);
+ return 0;
+ }
/* AC97 devices might have other drivers hanging off them so
* need to resume immediately. Other drivers don't have that
* problem and may take a substantial amount of time to resume
diff --git a/tools/perf/builtin-periodic.c b/tools/perf/builtin-periodic.c
index 70a0e2b..060e909 100644
--- a/tools/perf/builtin-periodic.c
+++ b/tools/perf/builtin-periodic.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -194,6 +194,8 @@
if (p == NULL)
return PERF_PERIODIC_ERROR;
for (cpu = 0; cpu < cpus->nr; cpu++) {
+ if (((1 << cpu) & cpumask) == 0)
+ continue;
p->perf_fd[cpu] = sys_perf_event_open(p->attr, target_pid, cpu,
-1, 0);
if (p->perf_fd[cpu] < 0)