| commit | 6bebd912b8b10053d321c1d93a4c6475262e6dbe | [log] [tgz] |
|---|---|---|
| author | Fabio Estevam <fabio.estevam@freescale.com> | Thu Jul 04 20:01:03 2013 -0300 |
| committer | chrmhoffmann <chrmhoffmann@gmail.com> | Sun Apr 05 10:18:32 2020 +0200 |
| tree | 14f7b6b645739c5a0ef0800290e69cb298f007df | |
| parent | f0c1291742ed5c185cf38e07bcfc67c522d09876 [diff] |
ASoC: sglt5000: Fix SGTL5000_PLL_FRAC_DIV_MASK commit 5c78dfe87ea04b501ee000a7f03b9432ac9d008c upstream. SGTL5000_PLL_FRAC_DIV_MASK is used to mask bits 0-10 (11 bits in total) of register CHIP_PLL_CTRL, so fix the mask to accomodate all this bit range. Reported-by: Oskar Schirmer <oskar@scara.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>