Merge "msm: camera: Add proper error handling during msm_open" into msm-3.0
diff --git a/arch/arm/configs/fsm9xxx-perf_defconfig b/arch/arm/configs/fsm9xxx-perf_defconfig
index c671d32..1d0584e 100644
--- a/arch/arm/configs/fsm9xxx-perf_defconfig
+++ b/arch/arm/configs/fsm9xxx-perf_defconfig
@@ -8,6 +8,7 @@
CONFIG_IKCONFIG_PROC=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_PANIC_TIMEOUT=5
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
# CONFIG_PERF_EVENTS is not set
@@ -34,7 +35,7 @@
# CONFIG_MSM_HW3D is not set
# CONFIG_QSD_AUDIO is not set
# CONFIG_SURF_FFA_GPIO_KEYPAD is not set
-CONFIG_MSM_JTAG=y
+CONFIG_MSM_WATCHDOG=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_VMSPLIT_2G=y
diff --git a/arch/arm/configs/fsm9xxx_defconfig b/arch/arm/configs/fsm9xxx_defconfig
index 80252d8..b3e5b87 100644
--- a/arch/arm/configs/fsm9xxx_defconfig
+++ b/arch/arm/configs/fsm9xxx_defconfig
@@ -8,6 +8,7 @@
CONFIG_IKCONFIG_PROC=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_PANIC_TIMEOUT=5
CONFIG_KALLSYMS_ALL=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
@@ -33,6 +34,7 @@
# CONFIG_MSM_HW3D is not set
# CONFIG_QSD_AUDIO is not set
# CONFIG_SURF_FFA_GPIO_KEYPAD is not set
+CONFIG_MSM_WATCHDOG=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_VMSPLIT_2G=y
diff --git a/arch/arm/configs/msm-copper_defconfig b/arch/arm/configs/msm-copper_defconfig
index d1c607e..8594562 100644
--- a/arch/arm/configs/msm-copper_defconfig
+++ b/arch/arm/configs/msm-copper_defconfig
@@ -97,6 +97,9 @@
CONFIG_DIAG_CHAR=y
CONFIG_HW_RANDOM=y
CONFIG_DCC_TTY=y
+CONFIG_SPI=y
+CONFIG_SPI_QUP=y
+CONFIG_SPI_SPIDEV=m
CONFIG_SPMI=y
CONFIG_SPMI_MSM_PMIC_ARB=y
CONFIG_MSM_QPNP=y
diff --git a/arch/arm/configs/msm7627-perf_defconfig b/arch/arm/configs/msm7627-perf_defconfig
deleted file mode 100644
index 82fc695..0000000
--- a/arch/arm/configs/msm7627-perf_defconfig
+++ /dev/null
@@ -1,307 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_LOCALVERSION="-perf"
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_CGROUPS=y
-CONFIG_CGROUP_FREEZER=y
-CONFIG_CGROUP_CPUACCT=y
-CONFIG_RESOURCE_COUNTERS=y
-CONFIG_CGROUP_SCHED=y
-CONFIG_RT_GROUP_SCHED=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_ASHMEM=y
-CONFIG_EMBEDDED=y
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=m
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-CONFIG_ARCH_MSM=y
-CONFIG_ARCH_MSM7X27=y
-# CONFIG_MSM_STACKED_MEMORY is not set
-CONFIG_MSM7X00A_USE_DG_TIMER=y
-# CONFIG_MSM_FIQ_SUPPORT is not set
-CONFIG_MSM_SMD=y
-CONFIG_MSM_SMD_PKG4=y
-CONFIG_MSM_ONCRPCROUTER=y
-CONFIG_MSM_RMT_STORAGE_CLIENT=y
-# CONFIG_MSM_HW3D is not set
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="init=/sbin/init root=/dev/ram rw initrd=0x11000000,16M console=ttyDCC0 mem=88M"
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_STAT_DETAILS=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
-CONFIG_VFP=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_WAKELOCK=y
-CONFIG_PM_RUNTIME=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_MULTIPLE_TABLES=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_IPV6=y
-CONFIG_IPV6_PRIVACY=y
-CONFIG_IPV6_ROUTER_PREF=y
-CONFIG_IPV6_ROUTE_INFO=y
-CONFIG_IPV6_OPTIMISTIC_DAD=y
-CONFIG_INET6_AH=y
-CONFIG_INET6_ESP=y
-CONFIG_INET6_IPCOMP=y
-CONFIG_IPV6_MIP6=y
-CONFIG_IPV6_TUNNEL=y
-CONFIG_IPV6_MULTIPLE_TABLES=y
-CONFIG_IPV6_SUBTREES=y
-CONFIG_NETFILTER=y
-CONFIG_NETFILTER_NETLINK_LOG=y
-CONFIG_NF_CONNTRACK=y
-CONFIG_NF_CONNTRACK_EVENTS=y
-CONFIG_NF_CT_PROTO_DCCP=y
-CONFIG_NF_CT_PROTO_SCTP=y
-CONFIG_NF_CT_PROTO_UDPLITE=y
-CONFIG_NF_CONNTRACK_AMANDA=y
-CONFIG_NF_CONNTRACK_FTP=y
-CONFIG_NF_CONNTRACK_H323=y
-CONFIG_NF_CONNTRACK_IRC=y
-CONFIG_NF_CONNTRACK_NETBIOS_NS=y
-CONFIG_NF_CONNTRACK_PPTP=y
-CONFIG_NF_CONNTRACK_SANE=y
-CONFIG_NF_CONNTRACK_SIP=y
-CONFIG_NF_CONNTRACK_TFTP=y
-CONFIG_NF_CT_NETLINK=y
-CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
-CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
-CONFIG_NETFILTER_XT_TARGET_MARK=y
-CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
-CONFIG_NETFILTER_XT_MATCH_COMMENT=y
-CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
-CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
-CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
-CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
-CONFIG_NETFILTER_XT_MATCH_HELPER=y
-CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
-CONFIG_NETFILTER_XT_MATCH_LENGTH=y
-CONFIG_NETFILTER_XT_MATCH_LIMIT=y
-CONFIG_NETFILTER_XT_MATCH_MAC=y
-CONFIG_NETFILTER_XT_MATCH_MARK=y
-CONFIG_NETFILTER_XT_MATCH_OWNER=y
-CONFIG_NETFILTER_XT_MATCH_POLICY=y
-CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
-CONFIG_NETFILTER_XT_MATCH_QUOTA=y
-CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
-CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y
-CONFIG_NETFILTER_XT_MATCH_STATE=y
-CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
-CONFIG_NETFILTER_XT_MATCH_STRING=y
-CONFIG_NETFILTER_XT_MATCH_TIME=y
-CONFIG_NETFILTER_XT_MATCH_U32=y
-CONFIG_NF_CONNTRACK_IPV4=y
-CONFIG_IP_NF_IPTABLES=y
-CONFIG_IP_NF_MATCH_AH=y
-CONFIG_IP_NF_MATCH_ECN=y
-CONFIG_IP_NF_MATCH_TTL=y
-CONFIG_IP_NF_FILTER=y
-CONFIG_IP_NF_TARGET_REJECT=y
-CONFIG_IP_NF_TARGET_LOG=y
-CONFIG_NF_NAT=y
-CONFIG_IP_NF_TARGET_MASQUERADE=y
-CONFIG_IP_NF_TARGET_NETMAP=y
-CONFIG_IP_NF_TARGET_REDIRECT=y
-CONFIG_IP_NF_ARPTABLES=y
-CONFIG_IP_NF_ARPFILTER=y
-CONFIG_IP_NF_ARP_MANGLE=y
-CONFIG_NET_SCHED=y
-CONFIG_NET_SCH_HTB=y
-CONFIG_NET_CLS_U32=y
-CONFIG_BT=y
-CONFIG_BT_L2CAP=y
-CONFIG_BT_SCO=y
-CONFIG_BT_RFCOMM=y
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=y
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=y
-CONFIG_BT_HCIUART=y
-CONFIG_BT_HCIUART_H4=y
-CONFIG_BT_HCIUART_BCSP=y
-CONFIG_BT_HCIUART_IBS=y
-CONFIG_BT_MSM_SLEEP=y
-CONFIG_MSM_BT_POWER=y
-# CONFIG_WIRELESS_EXT_SYSFS is not set
-CONFIG_RFKILL=y
-# CONFIG_RFKILL_PM is not set
-CONFIG_GENLOCK=y
-CONFIG_GENLOCK_MISCDEVICE=y
-CONFIG_MTD=y
-CONFIG_MTD_TESTS=m
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=8
-CONFIG_BLK_DEV_RAM_SIZE=16384
-CONFIG_MISC_DEVICES=y
-CONFIG_SCSI=y
-CONFIG_SCSI_TGT=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_CHR_DEV_SCH=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_LOGGING=y
-CONFIG_SCSI_SCAN_ASYNC=y
-CONFIG_MD=y
-CONFIG_BLK_DEV_DM=y
-CONFIG_DM_CRYPT=y
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_LIBRA_SDIOIF=m
-CONFIG_SLIP=y
-CONFIG_SLIP_COMPRESSED=y
-CONFIG_SLIP_MODE_SLIP6=y
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=m
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_MSM_LEGACY=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_KEYCHORD=y
-CONFIG_INPUT_UINPUT=y
-CONFIG_INPUT_GPIO=y
-# CONFIG_SERIO is not set
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_MSM_HS=y
-CONFIG_DIAG_CHAR=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_DEBUG_GPIO=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_POWER_SUPPLY=y
-CONFIG_BATTERY_MSM=y
-# CONFIG_HWMON is not set
-CONFIG_MEDIA_SUPPORT=y
-CONFIG_VIDEO_DEV=y
-# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
-CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
-CONFIG_MSM_KGSL=y
-CONFIG_VIDEO_OUTPUT_CONTROL=y
-CONFIG_FB=y
-CONFIG_FB_MSM=y
-# CONFIG_FB_MSM_BACKLIGHT is not set
-CONFIG_FB_MSM_TRIPLE_BUFFER=y
-CONFIG_FB_MSM_MDP30=y
-CONFIG_FB_MSM_TRY_MDDI_CATCH_LCDC_PRISM=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-CONFIG_SND_SOC=y
-CONFIG_SND_MSM_SOC=y
-CONFIG_USB=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_SUSPEND=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_EHSET=y
-CONFIG_USB_EHCI_ROOT_HUB_TT=y
-# CONFIG_USB_EHCI_TT_NEWSCHED is not set
-CONFIG_USB_EHCI_MSM_72K=y
-CONFIG_USB_ACM=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_DATAFAB=y
-CONFIG_USB_STORAGE_FREECOM=y
-CONFIG_USB_STORAGE_ISD200=y
-CONFIG_USB_STORAGE_USBAT=y
-CONFIG_USB_STORAGE_SDDR09=y
-CONFIG_USB_STORAGE_SDDR55=y
-CONFIG_USB_STORAGE_JUMPSHOT=y
-CONFIG_USB_STORAGE_ALAUDA=y
-CONFIG_USB_STORAGE_ONETOUCH=y
-CONFIG_USB_STORAGE_KARMA=y
-CONFIG_USB_STORAGE_CYPRESS_ATACB=y
-CONFIG_USB_EHSET_TEST_FIXTURE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_MSM_72K=y
-CONFIG_USB_G_ANDROID=y
-CONFIG_RMNET_SMD_CTL_CHANNEL="DATA12_CNTL"
-CONFIG_RMNET_SMD_DATA_CHANNEL="DATA12"
-CONFIG_MMC=y
-CONFIG_MMC_PERF_PROFILING=y
-CONFIG_MMC_UNSAFE_RESUME=y
-CONFIG_MMC_CLKGATE=y
-CONFIG_MMC_PARANOID_SD_INIT=y
-CONFIG_MMC_BLOCK_MINORS=32
-# CONFIG_MMC_BLOCK_BOUNCE is not set
-CONFIG_MMC_TEST=m
-CONFIG_MMC_MSM=y
-CONFIG_MMC_MSM_SDIO_SUPPORT=y
-CONFIG_SWITCH=y
-CONFIG_SWITCH_GPIO=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DEBUG=y
-CONFIG_STAGING=y
-CONFIG_ANDROID=y
-CONFIG_ANDROID_BINDER_IPC=y
-CONFIG_ANDROID_LOGGER=y
-CONFIG_ANDROID_RAM_CONSOLE=y
-CONFIG_ANDROID_TIMED_GPIO=y
-CONFIG_ANDROID_LOW_MEMORY_KILLER=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
-CONFIG_EXT4_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_YAFFS_FS=y
-CONFIG_YAFFS_DISABLE_TAGS_ECC=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_PRINTK_TIME=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_SCHED_DEBUG is not set
-CONFIG_TIMER_STATS=y
-# CONFIG_DEBUG_PREEMPT is not set
-CONFIG_DEBUG_INFO=y
-CONFIG_DYNAMIC_DEBUG=y
-CONFIG_DEBUG_USER=y
-CONFIG_CRYPTO_SHA256=y
-CONFIG_CRYPTO_TWOFISH=y
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/msm7627_defconfig b/arch/arm/configs/msm7627_defconfig
deleted file mode 100644
index c6dfdc4..0000000
--- a/arch/arm/configs/msm7627_defconfig
+++ /dev/null
@@ -1,312 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_CGROUPS=y
-CONFIG_CGROUP_DEBUG=y
-CONFIG_CGROUP_FREEZER=y
-CONFIG_CGROUP_CPUACCT=y
-CONFIG_RESOURCE_COUNTERS=y
-CONFIG_CGROUP_SCHED=y
-CONFIG_RT_GROUP_SCHED=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_ASHMEM=y
-CONFIG_EMBEDDED=y
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=m
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-CONFIG_ARCH_MSM=y
-CONFIG_ARCH_MSM7X27=y
-# CONFIG_MSM_STACKED_MEMORY is not set
-CONFIG_MSM7X00A_USE_DG_TIMER=y
-# CONFIG_MSM_FIQ_SUPPORT is not set
-CONFIG_MSM_SMD=y
-CONFIG_MSM_SMD_PKG4=y
-CONFIG_MSM_ONCRPCROUTER=y
-CONFIG_MSM_RMT_STORAGE_CLIENT=y
-# CONFIG_MSM_HW3D is not set
-CONFIG_STRICT_MEMORY_RWX=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="init=/sbin/init root=/dev/ram rw initrd=0x11000000,16M console=ttyDCC0 mem=88M"
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_STAT_DETAILS=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
-CONFIG_VFP=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_WAKELOCK=y
-CONFIG_PM_RUNTIME=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_MULTIPLE_TABLES=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_IPV6=y
-CONFIG_IPV6_PRIVACY=y
-CONFIG_IPV6_ROUTER_PREF=y
-CONFIG_IPV6_ROUTE_INFO=y
-CONFIG_IPV6_OPTIMISTIC_DAD=y
-CONFIG_INET6_AH=y
-CONFIG_INET6_ESP=y
-CONFIG_INET6_IPCOMP=y
-CONFIG_IPV6_MIP6=y
-CONFIG_IPV6_TUNNEL=y
-CONFIG_IPV6_MULTIPLE_TABLES=y
-CONFIG_IPV6_SUBTREES=y
-CONFIG_NETFILTER=y
-CONFIG_NETFILTER_NETLINK_LOG=y
-CONFIG_NF_CONNTRACK=y
-CONFIG_NF_CONNTRACK_EVENTS=y
-CONFIG_NF_CT_PROTO_DCCP=y
-CONFIG_NF_CT_PROTO_SCTP=y
-CONFIG_NF_CT_PROTO_UDPLITE=y
-CONFIG_NF_CONNTRACK_AMANDA=y
-CONFIG_NF_CONNTRACK_FTP=y
-CONFIG_NF_CONNTRACK_H323=y
-CONFIG_NF_CONNTRACK_IRC=y
-CONFIG_NF_CONNTRACK_NETBIOS_NS=y
-CONFIG_NF_CONNTRACK_PPTP=y
-CONFIG_NF_CONNTRACK_SANE=y
-CONFIG_NF_CONNTRACK_SIP=y
-CONFIG_NF_CONNTRACK_TFTP=y
-CONFIG_NF_CT_NETLINK=y
-CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
-CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
-CONFIG_NETFILTER_XT_TARGET_MARK=y
-CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
-CONFIG_NETFILTER_XT_MATCH_COMMENT=y
-CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
-CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
-CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
-CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
-CONFIG_NETFILTER_XT_MATCH_HELPER=y
-CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
-CONFIG_NETFILTER_XT_MATCH_LENGTH=y
-CONFIG_NETFILTER_XT_MATCH_LIMIT=y
-CONFIG_NETFILTER_XT_MATCH_MAC=y
-CONFIG_NETFILTER_XT_MATCH_MARK=y
-CONFIG_NETFILTER_XT_MATCH_OWNER=y
-CONFIG_NETFILTER_XT_MATCH_POLICY=y
-CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
-CONFIG_NETFILTER_XT_MATCH_QUOTA=y
-CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
-CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y
-CONFIG_NETFILTER_XT_MATCH_STATE=y
-CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
-CONFIG_NETFILTER_XT_MATCH_STRING=y
-CONFIG_NETFILTER_XT_MATCH_TIME=y
-CONFIG_NETFILTER_XT_MATCH_U32=y
-CONFIG_NF_CONNTRACK_IPV4=y
-CONFIG_IP_NF_IPTABLES=y
-CONFIG_IP_NF_MATCH_AH=y
-CONFIG_IP_NF_MATCH_ECN=y
-CONFIG_IP_NF_MATCH_TTL=y
-CONFIG_IP_NF_FILTER=y
-CONFIG_IP_NF_TARGET_REJECT=y
-CONFIG_IP_NF_TARGET_LOG=y
-CONFIG_NF_NAT=y
-CONFIG_IP_NF_TARGET_MASQUERADE=y
-CONFIG_IP_NF_TARGET_NETMAP=y
-CONFIG_IP_NF_TARGET_REDIRECT=y
-CONFIG_IP_NF_ARPTABLES=y
-CONFIG_IP_NF_ARPFILTER=y
-CONFIG_IP_NF_ARP_MANGLE=y
-CONFIG_NET_SCHED=y
-CONFIG_NET_SCH_HTB=y
-CONFIG_NET_CLS_U32=y
-CONFIG_BT=y
-CONFIG_BT_L2CAP=y
-CONFIG_BT_SCO=y
-CONFIG_BT_RFCOMM=y
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=y
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=y
-CONFIG_BT_HCIUART=y
-CONFIG_BT_HCIUART_H4=y
-CONFIG_BT_HCIUART_BCSP=y
-CONFIG_BT_HCIUART_IBS=y
-CONFIG_BT_MSM_SLEEP=y
-CONFIG_MSM_BT_POWER=y
-# CONFIG_WIRELESS_EXT_SYSFS is not set
-CONFIG_RFKILL=y
-# CONFIG_RFKILL_PM is not set
-CONFIG_GENLOCK=y
-CONFIG_GENLOCK_MISCDEVICE=y
-CONFIG_MTD=y
-CONFIG_MTD_TESTS=m
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=8
-CONFIG_BLK_DEV_RAM_SIZE=16384
-CONFIG_MISC_DEVICES=y
-CONFIG_SCSI=y
-CONFIG_SCSI_TGT=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_CHR_DEV_SCH=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_LOGGING=y
-CONFIG_SCSI_SCAN_ASYNC=y
-CONFIG_MD=y
-CONFIG_BLK_DEV_DM=y
-CONFIG_DM_CRYPT=y
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_LIBRA_SDIOIF=m
-CONFIG_SLIP=y
-CONFIG_SLIP_COMPRESSED=y
-CONFIG_SLIP_MODE_SLIP6=y
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=m
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_MSM_LEGACY=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_KEYCHORD=y
-CONFIG_INPUT_UINPUT=y
-CONFIG_INPUT_GPIO=y
-# CONFIG_SERIO is not set
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_MSM_HS=y
-CONFIG_DIAG_CHAR=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_DCC_TTY=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_DEBUG_GPIO=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_POWER_SUPPLY=y
-CONFIG_BATTERY_MSM=y
-# CONFIG_HWMON is not set
-CONFIG_MSM_KGSL=y
-CONFIG_VIDEO_OUTPUT_CONTROL=y
-CONFIG_FB=y
-CONFIG_FB_MSM=y
-# CONFIG_FB_MSM_BACKLIGHT is not set
-CONFIG_FB_MSM_TRIPLE_BUFFER=y
-CONFIG_FB_MSM_MDP30=y
-CONFIG_FB_MSM_TRY_MDDI_CATCH_LCDC_PRISM=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-CONFIG_SND_SOC=y
-CONFIG_SND_MSM_SOC=y
-CONFIG_USB=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_SUSPEND=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_EHSET=y
-CONFIG_USB_EHCI_ROOT_HUB_TT=y
-# CONFIG_USB_EHCI_TT_NEWSCHED is not set
-CONFIG_USB_EHCI_MSM_72K=y
-CONFIG_USB_ACM=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_DATAFAB=y
-CONFIG_USB_STORAGE_FREECOM=y
-CONFIG_USB_STORAGE_ISD200=y
-CONFIG_USB_STORAGE_USBAT=y
-CONFIG_USB_STORAGE_SDDR09=y
-CONFIG_USB_STORAGE_SDDR55=y
-CONFIG_USB_STORAGE_JUMPSHOT=y
-CONFIG_USB_STORAGE_ALAUDA=y
-CONFIG_USB_STORAGE_ONETOUCH=y
-CONFIG_USB_STORAGE_KARMA=y
-CONFIG_USB_STORAGE_CYPRESS_ATACB=y
-CONFIG_USB_EHSET_TEST_FIXTURE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_MSM_72K=y
-CONFIG_USB_G_ANDROID=y
-CONFIG_RMNET_SMD_CTL_CHANNEL="DATA12_CNTL"
-CONFIG_RMNET_SMD_DATA_CHANNEL="DATA12"
-CONFIG_MMC=y
-CONFIG_MMC_PERF_PROFILING=y
-CONFIG_MMC_UNSAFE_RESUME=y
-CONFIG_MMC_CLKGATE=y
-CONFIG_MMC_PARANOID_SD_INIT=y
-CONFIG_MMC_BLOCK_MINORS=32
-# CONFIG_MMC_BLOCK_BOUNCE is not set
-CONFIG_MMC_TEST=m
-CONFIG_MMC_MSM=y
-CONFIG_MMC_MSM_SDIO_SUPPORT=y
-CONFIG_SWITCH=y
-CONFIG_SWITCH_GPIO=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DEBUG=y
-CONFIG_STAGING=y
-CONFIG_ANDROID=y
-CONFIG_ANDROID_BINDER_IPC=y
-CONFIG_ANDROID_LOGGER=y
-CONFIG_ANDROID_RAM_CONSOLE=y
-CONFIG_ANDROID_TIMED_GPIO=y
-CONFIG_ANDROID_LOW_MEMORY_KILLER=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
-CONFIG_EXT4_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_YAFFS_FS=y
-CONFIG_YAFFS_DISABLE_TAGS_ECC=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_PRINTK_TIME=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_LOCKUP_DETECTOR=y
-CONFIG_DETECT_HUNG_TASK=y
-CONFIG_TIMER_STATS=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK_SLEEP=y
-CONFIG_DEBUG_STACK_USAGE=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_LIST=y
-CONFIG_LATENCYTOP=y
-CONFIG_DEBUG_PAGEALLOC=y
-CONFIG_DYNAMIC_DEBUG=y
-CONFIG_DEBUG_USER=y
-CONFIG_CRYPTO_SHA256=y
-CONFIG_CRYPTO_TWOFISH=y
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/msm8960-perf_defconfig b/arch/arm/configs/msm8960-perf_defconfig
index 61b461e..2bc922a 100644
--- a/arch/arm/configs/msm8960-perf_defconfig
+++ b/arch/arm/configs/msm8960-perf_defconfig
@@ -9,7 +9,7 @@
CONFIG_CGROUP_CPUACCT=y
CONFIG_RESOURCE_COUNTERS=y
CONFIG_CGROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
+CONFIG_FAIR_GROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
@@ -53,6 +53,7 @@
CONFIG_MACH_APQ8064_CDP=y
CONFIG_MACH_APQ8064_MTP=y
CONFIG_MACH_APQ8064_LIQUID=y
+CONFIG_MACH_MPQ8064_CDP=y
CONFIG_MACH_MPQ8064_HRD=y
CONFIG_MACH_MPQ8064_DTV=y
# CONFIG_MSM_STACKED_MEMORY is not set
diff --git a/arch/arm/configs/msm8960_defconfig b/arch/arm/configs/msm8960_defconfig
index 880e623..71ad4ba 100644
--- a/arch/arm/configs/msm8960_defconfig
+++ b/arch/arm/configs/msm8960_defconfig
@@ -8,7 +8,7 @@
CONFIG_CGROUP_CPUACCT=y
CONFIG_RESOURCE_COUNTERS=y
CONFIG_CGROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
+CONFIG_FAIR_GROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
@@ -52,6 +52,7 @@
CONFIG_MACH_APQ8064_CDP=y
CONFIG_MACH_APQ8064_MTP=y
CONFIG_MACH_APQ8064_LIQUID=y
+CONFIG_MACH_MPQ8064_CDP=y
CONFIG_MACH_MPQ8064_HRD=y
CONFIG_MACH_MPQ8064_DTV=y
# CONFIG_MSM_STACKED_MEMORY is not set
@@ -93,6 +94,7 @@
CONFIG_MSM_L1_ERR_PANIC=y
CONFIG_MSM_L2_ERP_1BIT_PANIC=y
CONFIG_MSM_L2_ERP_2BIT_PANIC=y
+CONFIG_MSM_CACHE_DUMP=y
CONFIG_STRICT_MEMORY_RWX=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index 5bb5139..5668e75 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -50,8 +50,11 @@
void gic_enable_ppi(unsigned int);
bool gic_is_spi_pending(unsigned int irq);
void gic_clear_spi_pending(unsigned int irq);
+#ifdef CONFIG_ARM_GIC
void gic_set_irq_secure(unsigned int irq);
-
+#else
+static inline void gic_set_irq_secure(unsigned int irq) { }
+#endif
static inline void gic_init(unsigned int nr, int start,
void __iomem *dist , void __iomem *cpu)
{
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 3c2d47a..e4e2653 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -265,6 +265,7 @@
select MSM_XO
select MSM_QDSP6_APR
select MSM_AUDIO_QDSP6 if SND_SOC
+ select FIQ
config ARCH_MSM8625
bool "MSM8625"
@@ -780,6 +781,12 @@
help
Support for the Qualcomm APQ8064 LIQUID device.
+config MACH_MPQ8064_CDP
+ depends on ARCH_APQ8064
+ bool "MPQ8064 CDP"
+ help
+ Support for the Qualcomm MPQ8064 CDP device.
+
config MACH_MPQ8064_HRD
depends on ARCH_APQ8064
bool "MPQ8064 HRD"
@@ -2221,4 +2228,12 @@
config HAVE_ARCH_HAS_CURRENT_TIMER
bool
+
+config MSM_CACHE_DUMP
+ bool "Cache dumping support"
+ help
+ Add infrastructure to dump the L1 and L2 caches to an allocated buffer.
+ This allows for analysis of the caches in case cache corruption is
+ suspected.
+
endif
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 981ad58..0f438e1 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -204,6 +204,7 @@
obj-$(CONFIG_ARCH_FSM9XXX) += restart-fsm9xxx.o xo-fsm9xxx.o
obj-$(CONFIG_MSM_WATCHDOG) += msm_watchdog.o
+obj-$(CONFIG_MSM_WATCHDOG) += msm_watchdog_asm.o
obj-$(CONFIG_MACH_MSM8X60_RUMI3) += board-msm8x60.o
obj-$(CONFIG_MACH_MSM8X60_SIM) += board-msm8x60.o
obj-$(CONFIG_MACH_MSM8X60_SURF) += board-msm8x60.o
@@ -220,7 +221,8 @@
obj-$(CONFIG_MACH_MSM7X27_FFA) += board-msm7x27.o devices-msm7x27.o
obj-$(CONFIG_ARCH_MSM7X27A) += clock-pcom-lookup.o devices-msm7x27a.o
board-7627a-all-objs += board-msm7627a-storage.o board-msm7627a-bt.o board-msm7627a-camera.o
-board-7627a-all-objs += board-msm7627a-display.o board-msm7627a-wlan.o
+board-7627a-all-objs += board-msm7627a-display.o board-msm7627a-wlan.o board-msm7627a-io.o
+board-7627a-all-objs += board-msm7627a-audio.o
obj-$(CONFIG_MACH_MSM7X27A_RUMI3) += board-msm7x27a.o board-7627a-all.o
obj-$(CONFIG_MACH_MSM7X27A_SURF) += board-msm7x27a.o board-7627a-all.o
obj-$(CONFIG_MACH_MSM7X27A_FFA) += board-msm7x27a.o board-7627a-all.o
@@ -331,3 +333,4 @@
obj-$(CONFIG_ARCH_MSM8960) += mdm2.o mdm_common.o
obj-$(CONFIG_MSM_RTB) += msm_rtb.o
obj-$(CONFIG_MSM_CACHE_ERP) += cache_erp.o
+obj-$(CONFIG_MSM_CACHE_DUMP) += msm_cache_dump.o
diff --git a/arch/arm/mach-msm/acpuclock-8960.c b/arch/arm/mach-msm/acpuclock-8960.c
index cbeac3f..051e165 100644
--- a/arch/arm/mach-msm/acpuclock-8960.c
+++ b/arch/arm/mach-msm/acpuclock-8960.c
@@ -36,6 +36,7 @@
#include <mach/rpm-regulator.h>
#include "acpuclock.h"
+#include "pm.h"
/*
* Source IDs.
@@ -377,10 +378,11 @@
},
};
-static struct scalable *scalable;
static struct l2_level *l2_freq_tbl;
static struct acpu_level *acpu_freq_tbl;
static int l2_freq_tbl_size;
+static struct scalable *scalable;
+#define SCALABLE_TO_CPU(sc) ((sc) - scalable)
/* Instantaneous bandwidth requests in MB/s. */
#define BW_MBPS(_bw) \
@@ -912,28 +914,37 @@
set_pri_clk_src(sc, tgt_s->pri_src_sel);
} else if (strt_s->src == HFPLL && tgt_s->src != HFPLL) {
/*
- * If responding to CPU_DEAD we must be running on another
- * CPU. Therefore, we can't access the downed CPU's CP15
- * clock MUX registers from here and can't change clock sources.
- * Just turn off the PLL- since the CPU is down already, halting
- * its clock should be safe.
+ * If responding to CPU_DEAD we must be running on another CPU.
+ * Therefore, we can't access the downed CPU's clock MUX CP15
+ * registers from here and can't change clock sources. If the
+ * CPU is collapsed, however, it is still safe to turn off the
+ * PLL without switching the MUX away from it.
*/
if (reason != SETRATE_HOTPLUG || sc == &scalable[L2]) {
set_sec_clk_src(sc, tgt_s->sec_src_sel);
set_pri_clk_src(sc, tgt_s->pri_src_sel);
+ hfpll_disable(sc, 0);
+ } else if (reason == SETRATE_HOTPLUG
+ && msm_pm_verify_cpu_pc(SCALABLE_TO_CPU(sc))) {
+ hfpll_disable(sc, 0);
}
- hfpll_disable(sc, 0);
} else if (strt_s->src != HFPLL && tgt_s->src == HFPLL) {
- hfpll_set_rate(sc, tgt_s);
- hfpll_enable(sc, 0);
/*
* If responding to CPU_UP_PREPARE, we can't change CP15
* registers for the CPU that's coming up since we're not
* running on that CPU. That's okay though, since the MUX
* source was not changed on the way down, either.
*/
- if (reason != SETRATE_HOTPLUG || sc == &scalable[L2])
+ if (reason != SETRATE_HOTPLUG || sc == &scalable[L2]) {
+ hfpll_set_rate(sc, tgt_s);
+ hfpll_enable(sc, 0);
set_pri_clk_src(sc, tgt_s->pri_src_sel);
+ } else if (reason == SETRATE_HOTPLUG
+ && msm_pm_verify_cpu_pc(SCALABLE_TO_CPU(sc))) {
+ /* PLL was disabled during hot-unplug. Re-enable it. */
+ hfpll_set_rate(sc, tgt_s);
+ hfpll_enable(sc, 0);
+ }
} else {
if (reason != SETRATE_HOTPLUG || sc == &scalable[L2])
set_sec_clk_src(sc, tgt_s->sec_src_sel);
diff --git a/arch/arm/mach-msm/acpuclock-8x60.c b/arch/arm/mach-msm/acpuclock-8x60.c
index 7339a4c..787483b 100644
--- a/arch/arm/mach-msm/acpuclock-8x60.c
+++ b/arch/arm/mach-msm/acpuclock-8x60.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -40,13 +40,12 @@
#define COMPLEX_SLEW 7
/* PLL calibration limits.
- * The PLL hardware is capable of 384MHz to 1536MHz. The L_VALs
- * used for calibration should respect these limits. */
+ * The PLL hardware has a minimum frequency of 384MHz.
+ * Calibration should respect this limit. */
#define L_VAL_SCPLL_CAL_MIN 0x08 /* = 432 MHz with 27MHz source */
-#define L_VAL_SCPLL_CAL_MAX 0x1C /* = 1512 MHz with 27MHz source */
-#define MAX_VDD_SC 1250000 /* uV */
-#define MAX_VDD_MEM 1250000 /* uV */
+#define MAX_VDD_SC 1325000 /* uV */
+#define MAX_VDD_MEM 1325000 /* uV */
#define MAX_VDD_DIG 1200000 /* uV */
#define MAX_AXI 310500 /* KHz */
#define SCPLL_LOW_VDD_FMAX 594000 /* KHz */
@@ -72,7 +71,7 @@
#define SCPLL_STATUS_OFFSET 0x10
#define SCPLL_CFG_OFFSET 0x1C
#define SCPLL_FSM_CTL_EXT_OFFSET 0x24
-#define SCPLL_LUT_A_HW_MAX (0x38 + ((L_VAL_SCPLL_CAL_MAX / 4) * 4))
+#define SCPLL_LUT_OFFSET(l_val) (0x38 + (((l_val) / 4) * 4))
/* Clock registers. */
#define SPSS0_CLK_CTL_ADDR (MSM_ACC0_BASE + 0x04)
@@ -218,6 +217,72 @@
};
/* SCPLL frequencies = 2 * 27 MHz * L_VAL */
+static struct clkctl_acpu_speed acpu_freq_tbl_slowest[] = {
+ { {1, 1}, 192000, ACPU_PLL_8, 3, 1, 0, 0, L2(1), 800000, 0x03006000},
+ /* MAX_AXI row is used to source CPU cores and L2 from the AFAB clock. */
+ { {0, 0}, MAX_AXI, ACPU_AFAB, 1, 0, 0, 0, L2(0), 825000, 0x03006000},
+ { {1, 1}, 384000, ACPU_PLL_8, 3, 0, 0, 0, L2(1), 825000, 0x03006000},
+ { {1, 1}, 432000, ACPU_SCPLL, 0, 0, 1, 0x08, L2(1), 850000, 0x03006000},
+ { {1, 1}, 486000, ACPU_SCPLL, 0, 0, 1, 0x09, L2(2), 850000, 0x03006000},
+ { {1, 1}, 540000, ACPU_SCPLL, 0, 0, 1, 0x0A, L2(3), 875000, 0x03006000},
+ { {1, 1}, 594000, ACPU_SCPLL, 0, 0, 1, 0x0B, L2(4), 875000, 0x03006000},
+ { {1, 1}, 648000, ACPU_SCPLL, 0, 0, 1, 0x0C, L2(5), 900000, 0x03006000},
+ { {1, 1}, 702000, ACPU_SCPLL, 0, 0, 1, 0x0D, L2(6), 900000, 0x03006000},
+ { {1, 1}, 756000, ACPU_SCPLL, 0, 0, 1, 0x0E, L2(7), 925000, 0x03006000},
+ { {1, 1}, 810000, ACPU_SCPLL, 0, 0, 1, 0x0F, L2(8), 975000, 0x03006000},
+ { {1, 1}, 864000, ACPU_SCPLL, 0, 0, 1, 0x10, L2(9), 975000, 0x03006000},
+ { {1, 1}, 918000, ACPU_SCPLL, 0, 0, 1, 0x11, L2(10), 1000000, 0x03006000},
+ { {1, 1}, 972000, ACPU_SCPLL, 0, 0, 1, 0x12, L2(11), 1025000, 0x03006000},
+ { {1, 1}, 1026000, ACPU_SCPLL, 0, 0, 1, 0x13, L2(12), 1025000, 0x03006000},
+ { {1, 1}, 1080000, ACPU_SCPLL, 0, 0, 1, 0x14, L2(13), 1050000, 0x03006000},
+ { {1, 1}, 1134000, ACPU_SCPLL, 0, 0, 1, 0x15, L2(14), 1075000, 0x03006000},
+ { {1, 1}, 1188000, ACPU_SCPLL, 0, 0, 1, 0x16, L2(15), 1100000, 0x03006000},
+ { {1, 1}, 1242000, ACPU_SCPLL, 0, 0, 1, 0x17, L2(16), 1125000, 0x03006000},
+ { {1, 1}, 1296000, ACPU_SCPLL, 0, 0, 1, 0x18, L2(17), 1150000, 0x03006000},
+ { {1, 1}, 1350000, ACPU_SCPLL, 0, 0, 1, 0x19, L2(18), 1175000, 0x03006000},
+ { {1, 1}, 1404000, ACPU_SCPLL, 0, 0, 1, 0x1A, L2(19), 1200000, 0x03006000},
+ { {1, 1}, 1458000, ACPU_SCPLL, 0, 0, 1, 0x1B, L2(19), 1225000, 0x03006000},
+ { {1, 1}, 1512000, ACPU_SCPLL, 0, 0, 1, 0x1C, L2(19), 1250000, 0x03006000},
+ { {1, 1}, 1566000, ACPU_SCPLL, 0, 0, 1, 0x1D, L2(19), 1275000, 0x03006000},
+ { {1, 1}, 1620000, ACPU_SCPLL, 0, 0, 1, 0x1E, L2(19), 1300000, 0x03006000},
+ { {1, 1}, 1674000, ACPU_SCPLL, 0, 0, 1, 0x1F, L2(19), 1325000, 0x03006000},
+ { {0, 0}, 0 },
+};
+
+/* SCPLL frequencies = 2 * 27 MHz * L_VAL */
+static struct clkctl_acpu_speed acpu_freq_tbl_slower[] = {
+ { {1, 1}, 192000, ACPU_PLL_8, 3, 1, 0, 0, L2(1), 800000, 0x03006000},
+ /* MAX_AXI row is used to source CPU cores and L2 from the AFAB clock. */
+ { {0, 0}, MAX_AXI, ACPU_AFAB, 1, 0, 0, 0, L2(0), 825000, 0x03006000},
+ { {1, 1}, 384000, ACPU_PLL_8, 3, 0, 0, 0, L2(1), 825000, 0x03006000},
+ { {1, 1}, 432000, ACPU_SCPLL, 0, 0, 1, 0x08, L2(1), 850000, 0x03006000},
+ { {1, 1}, 486000, ACPU_SCPLL, 0, 0, 1, 0x09, L2(2), 850000, 0x03006000},
+ { {1, 1}, 540000, ACPU_SCPLL, 0, 0, 1, 0x0A, L2(3), 875000, 0x03006000},
+ { {1, 1}, 594000, ACPU_SCPLL, 0, 0, 1, 0x0B, L2(4), 875000, 0x03006000},
+ { {1, 1}, 648000, ACPU_SCPLL, 0, 0, 1, 0x0C, L2(5), 900000, 0x03006000},
+ { {1, 1}, 702000, ACPU_SCPLL, 0, 0, 1, 0x0D, L2(6), 900000, 0x03006000},
+ { {1, 1}, 756000, ACPU_SCPLL, 0, 0, 1, 0x0E, L2(7), 925000, 0x03006000},
+ { {1, 1}, 810000, ACPU_SCPLL, 0, 0, 1, 0x0F, L2(8), 975000, 0x03006000},
+ { {1, 1}, 864000, ACPU_SCPLL, 0, 0, 1, 0x10, L2(9), 975000, 0x03006000},
+ { {1, 1}, 918000, ACPU_SCPLL, 0, 0, 1, 0x11, L2(10), 1000000, 0x03006000},
+ { {1, 1}, 972000, ACPU_SCPLL, 0, 0, 1, 0x12, L2(11), 1025000, 0x03006000},
+ { {1, 1}, 1026000, ACPU_SCPLL, 0, 0, 1, 0x13, L2(12), 1025000, 0x03006000},
+ { {1, 1}, 1080000, ACPU_SCPLL, 0, 0, 1, 0x14, L2(13), 1050000, 0x03006000},
+ { {1, 1}, 1134000, ACPU_SCPLL, 0, 0, 1, 0x15, L2(14), 1075000, 0x03006000},
+ { {1, 1}, 1188000, ACPU_SCPLL, 0, 0, 1, 0x16, L2(15), 1100000, 0x03006000},
+ { {1, 1}, 1242000, ACPU_SCPLL, 0, 0, 1, 0x17, L2(16), 1125000, 0x03006000},
+ { {1, 1}, 1296000, ACPU_SCPLL, 0, 0, 1, 0x18, L2(17), 1150000, 0x03006000},
+ { {1, 1}, 1350000, ACPU_SCPLL, 0, 0, 1, 0x19, L2(18), 1150000, 0x03006000},
+ { {1, 1}, 1404000, ACPU_SCPLL, 0, 0, 1, 0x1A, L2(19), 1175000, 0x03006000},
+ { {1, 1}, 1458000, ACPU_SCPLL, 0, 0, 1, 0x1B, L2(19), 1200000, 0x03006000},
+ { {1, 1}, 1512000, ACPU_SCPLL, 0, 0, 1, 0x1C, L2(19), 1225000, 0x03006000},
+ { {1, 1}, 1566000, ACPU_SCPLL, 0, 0, 1, 0x1D, L2(19), 1250000, 0x03006000},
+ { {1, 1}, 1620000, ACPU_SCPLL, 0, 0, 1, 0x1E, L2(19), 1275000, 0x03006000},
+ { {1, 1}, 1674000, ACPU_SCPLL, 0, 0, 1, 0x1F, L2(19), 1300000, 0x03006000},
+ { {0, 0}, 0 },
+};
+
+/* SCPLL frequencies = 2 * 27 MHz * L_VAL */
static struct clkctl_acpu_speed acpu_freq_tbl_slow[] = {
{ {1, 1}, 192000, ACPU_PLL_8, 3, 1, 0, 0, L2(1), 800000, 0x03006000},
/* MAX_AXI row is used to source CPU cores and L2 from the AFAB clock. */
@@ -244,6 +309,9 @@
{ {1, 1}, 1404000, ACPU_SCPLL, 0, 0, 1, 0x1A, L2(19), 1175000, 0x03006000},
{ {1, 1}, 1458000, ACPU_SCPLL, 0, 0, 1, 0x1B, L2(19), 1200000, 0x03006000},
{ {1, 1}, 1512000, ACPU_SCPLL, 0, 0, 1, 0x1C, L2(19), 1225000, 0x03006000},
+ { {1, 1}, 1566000, ACPU_SCPLL, 0, 0, 1, 0x1D, L2(19), 1225000, 0x03006000},
+ { {1, 1}, 1620000, ACPU_SCPLL, 0, 0, 1, 0x1E, L2(19), 1225000, 0x03006000},
+ { {1, 1}, 1674000, ACPU_SCPLL, 0, 0, 1, 0x1F, L2(19), 1250000, 0x03006000},
{ {0, 0}, 0 },
};
@@ -274,6 +342,9 @@
{ {1, 1}, 1404000, ACPU_SCPLL, 0, 0, 1, 0x1A, L2(19), 1150000, 0x03006000},
{ {1, 1}, 1458000, ACPU_SCPLL, 0, 0, 1, 0x1B, L2(19), 1150000, 0x03006000},
{ {1, 1}, 1512000, ACPU_SCPLL, 0, 0, 1, 0x1C, L2(19), 1175000, 0x03006000},
+ { {1, 1}, 1566000, ACPU_SCPLL, 0, 0, 1, 0x1D, L2(19), 1175000, 0x03006000},
+ { {1, 1}, 1620000, ACPU_SCPLL, 0, 0, 1, 0x1E, L2(19), 1200000, 0x03006000},
+ { {1, 1}, 1674000, ACPU_SCPLL, 0, 0, 1, 0x1F, L2(19), 1200000, 0x03006000},
{ {0, 0}, 0 },
};
@@ -304,6 +375,9 @@
{ {1, 1}, 1404000, ACPU_SCPLL, 0, 0, 1, 0x1A, L2(19), 1100000, 0x03006000},
{ {1, 1}, 1458000, ACPU_SCPLL, 0, 0, 1, 0x1B, L2(19), 1100000, 0x03006000},
{ {1, 1}, 1512000, ACPU_SCPLL, 0, 0, 1, 0x1C, L2(19), 1125000, 0x03006000},
+ { {1, 1}, 1566000, ACPU_SCPLL, 0, 0, 1, 0x1D, L2(19), 1125000, 0x03006000},
+ { {1, 1}, 1620000, ACPU_SCPLL, 0, 0, 1, 0x1E, L2(19), 1125000, 0x03006000},
+ { {1, 1}, 1674000, ACPU_SCPLL, 0, 0, 1, 0x1F, L2(19), 1150000, 0x03006000},
{ {0, 0}, 0 },
};
@@ -669,34 +743,29 @@
return rc;
}
-static void __init scpll_init(int sc_pll)
+static void __init scpll_init(int pll, unsigned int max_l_val)
{
uint32_t regval;
- pr_debug("Initializing SCPLL%d\n", sc_pll);
+ pr_debug("Initializing SCPLL%d\n", pll);
/* Clear calibration LUT registers containing max frequency entry.
* LUT registers are only writeable in debug mode. */
- writel_relaxed(SCPLL_DEBUG_FULL,
- sc_pll_base[sc_pll] + SCPLL_DEBUG_OFFSET);
- writel_relaxed(0x0, sc_pll_base[sc_pll] + SCPLL_LUT_A_HW_MAX);
- writel_relaxed(SCPLL_DEBUG_NONE,
- sc_pll_base[sc_pll] + SCPLL_DEBUG_OFFSET);
+ writel_relaxed(SCPLL_DEBUG_FULL, sc_pll_base[pll] + SCPLL_DEBUG_OFFSET);
+ writel_relaxed(0x0, sc_pll_base[pll] + SCPLL_LUT_OFFSET(max_l_val));
+ writel_relaxed(SCPLL_DEBUG_NONE, sc_pll_base[pll] + SCPLL_DEBUG_OFFSET);
/* Power-up SCPLL into standby mode. */
- writel_relaxed(SCPLL_STANDBY, sc_pll_base[sc_pll] + SCPLL_CTL_OFFSET);
+ writel_relaxed(SCPLL_STANDBY, sc_pll_base[pll] + SCPLL_CTL_OFFSET);
mb();
udelay(10);
- /* Calibrate the SCPLL to the maximum range supported by the h/w. We
- * might not use the full range of calibrated frequencies, but this
- * simplifies changes required for future increases in max CPU freq.
- */
- regval = (L_VAL_SCPLL_CAL_MAX << 24) | (L_VAL_SCPLL_CAL_MIN << 16);
- writel_relaxed(regval, sc_pll_base[sc_pll] + SCPLL_CAL_OFFSET);
+ /* Calibrate the SCPLL for the frequency range needed. */
+ regval = (max_l_val << 24) | (L_VAL_SCPLL_CAL_MIN << 16);
+ writel_relaxed(regval, sc_pll_base[pll] + SCPLL_CAL_OFFSET);
/* Start calibration */
- writel_relaxed(SCPLL_FULL_CAL, sc_pll_base[sc_pll] + SCPLL_CTL_OFFSET);
+ writel_relaxed(SCPLL_FULL_CAL, sc_pll_base[pll] + SCPLL_CTL_OFFSET);
/* Wait for proof that calibration has started before checking the
* 'calibration done' bit in the status register. Waiting for the
@@ -704,15 +773,15 @@
* This is required since the 'calibration done' bit takes time to
* transition from 'done' to 'not done' when starting a calibration.
*/
- while (readl_relaxed(sc_pll_base[sc_pll] + SCPLL_LUT_A_HW_MAX) == 0)
+ while (!readl_relaxed(sc_pll_base[pll] + SCPLL_LUT_OFFSET(max_l_val)))
cpu_relax();
/* Wait for calibration to complete. */
- while (readl_relaxed(sc_pll_base[sc_pll] + SCPLL_STATUS_OFFSET) & 0x2)
+ while (readl_relaxed(sc_pll_base[pll] + SCPLL_STATUS_OFFSET) & 0x2)
cpu_relax();
/* Power-down SCPLL. */
- scpll_disable(sc_pll);
+ scpll_disable(pll);
}
/* Force ACPU core and L2 cache clocks to rates that don't require SCPLLs. */
@@ -859,7 +928,7 @@
.notifier_call = acpuclock_cpu_callback,
};
-static unsigned int __init select_freq_plan(void)
+static __init struct clkctl_acpu_speed *select_freq_plan(void)
{
uint32_t pte_efuse, speed_bin, pvs, max_khz;
struct clkctl_acpu_speed *f;
@@ -870,12 +939,41 @@
if (speed_bin == 0xF)
speed_bin = (pte_efuse >> 4) & 0xF;
- if (speed_bin == 0x1) {
- max_khz = 1512000;
- pvs = (pte_efuse >> 10) & 0x7;
- if (pvs == 0x7)
- pvs = (pte_efuse >> 13) & 0x7;
+ pvs = (pte_efuse >> 10) & 0x7;
+ if (pvs == 0x7)
+ pvs = (pte_efuse >> 13) & 0x7;
+ if (speed_bin == 0x2) {
+ max_khz = 1674000;
+ switch (pvs) {
+ case 0x7:
+ case 0x5:
+ acpu_freq_tbl = acpu_freq_tbl_slowest;
+ pr_info("ACPU PVS: Slowest\n");
+ break;
+ case 0x4:
+ acpu_freq_tbl = acpu_freq_tbl_slower;
+ pr_info("ACPU PVS: Slower\n");
+ break;
+ case 0x0:
+ acpu_freq_tbl = acpu_freq_tbl_slow;
+ pr_info("ACPU PVS: Slow\n");
+ break;
+ case 0x1:
+ acpu_freq_tbl = acpu_freq_tbl_nom;
+ pr_info("ACPU PVS: Nominal\n");
+ break;
+ case 0x3:
+ acpu_freq_tbl = acpu_freq_tbl_fast;
+ pr_info("ACPU PVS: Fast\n");
+ break;
+ default:
+ acpu_freq_tbl = acpu_freq_tbl_slowest;
+ pr_warn("ACPU PVS: Unknown. Defaulting to slowest.\n");
+ break;
+ }
+ } else if (speed_bin == 0x1) {
+ max_khz = 1512000;
switch (pvs) {
case 0x0:
case 0x7:
@@ -910,7 +1008,7 @@
f--;
pr_info("Max ACPU freq: %u KHz\n", f->acpuclk_khz);
- return f->acpuclk_khz;
+ return f;
}
static struct acpuclk_data acpuclk_8x60_data = {
@@ -922,25 +1020,25 @@
static int __init acpuclk_8x60_init(struct acpuclk_soc_data *soc_data)
{
- unsigned int max_cpu_khz;
+ struct clkctl_acpu_speed *max_freq;
int cpu;
mutex_init(&drv_state.lock);
spin_lock_init(&drv_state.l2_lock);
/* Configure hardware. */
- max_cpu_khz = select_freq_plan();
+ max_freq = select_freq_plan();
unselect_scplls();
scpll_set_refs();
for_each_possible_cpu(cpu)
- scpll_init(cpu);
- scpll_init(L2);
+ scpll_init(cpu, max_freq->l_val);
+ scpll_init(L2, max_freq->l2_level->l_val);
regulator_init();
bus_init();
/* Improve boot time by ramping up CPUs immediately. */
for_each_online_cpu(cpu)
- acpuclk_8x60_set_rate(cpu, max_cpu_khz, SETRATE_INIT);
+ acpuclk_8x60_set_rate(cpu, max_freq->acpuclk_khz, SETRATE_INIT);
acpuclk_register(&acpuclk_8x60_data);
cpufreq_table_init();
diff --git a/arch/arm/mach-msm/board-8064-display.c b/arch/arm/mach-msm/board-8064-display.c
index 433fb2e..6949b62 100644
--- a/arch/arm/mach-msm/board-8064-display.c
+++ b/arch/arm/mach-msm/board-8064-display.c
@@ -46,7 +46,16 @@
#define MSM_FB_EXT_BUF_SIZE 0
#endif
-#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE, 4096)
+#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
+#define MSM_FB_WFD_BUF_SIZE \
+ (roundup((1280 * 736 * 2), 4096) * 1) /* 2 bpp x 1 page */
+#else
+#define MSM_FB_WFD_BUF_SIZE 0
+#endif
+
+#define MSM_FB_SIZE \
+ roundup(MSM_FB_PRIM_BUF_SIZE + \
+ MSM_FB_EXT_BUF_SIZE + MSM_FB_WFD_BUF_SIZE, 4096)
#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
#define MSM_FB_OVERLAY0_WRITEBACK_SIZE roundup((1376 * 768 * 3 * 2), 4096)
@@ -297,6 +306,19 @@
.dev.platform_data = &hdmi_msm_data,
};
+#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
+static struct platform_device wfd_panel_device = {
+ .name = "wfd_panel",
+ .id = 0,
+ .dev.platform_data = NULL,
+};
+
+static struct platform_device wfd_device = {
+ .name = "msm_wfd",
+ .id = -1,
+};
+#endif
+
/* HDMI related GPIOs */
#define HDMI_CEC_VAR_GPIO 69
#define HDMI_DDC_CLK_GPIO 70
@@ -897,6 +919,11 @@
platform_device_register(&msm_fb_device);
platform_device_register(&lvds_chimei_panel_device);
+#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
+ platform_device_register(&wfd_panel_device);
+ platform_device_register(&wfd_device);
+#endif
+
if (machine_is_apq8064_liquid())
platform_device_register(&mipi_dsi2lvds_bridge_device);
if (machine_is_apq8064_mtp())
diff --git a/arch/arm/mach-msm/board-8064-pmic.c b/arch/arm/mach-msm/board-8064-pmic.c
index df28390..f915657 100644
--- a/arch/arm/mach-msm/board-8064-pmic.c
+++ b/arch/arm/mach-msm/board-8064-pmic.c
@@ -142,8 +142,6 @@
/* Initial PM8XXX MPP configurations */
static struct pm8xxx_mpp_init pm8xxx_mpps[] __initdata = {
PM8921_MPP_INIT(3, D_OUTPUT, PM8921_MPP_DIG_LEVEL_VPH, DOUT_CTRL_LOW),
- /* External 5V regulator enable; shared by HDMI and USB_OTG switches. */
- PM8921_MPP_INIT(7, D_OUTPUT, PM8921_MPP_DIG_LEVEL_VPH, DOUT_CTRL_LOW),
PM8921_MPP_INIT(8, D_OUTPUT, PM8921_MPP_DIG_LEVEL_S4, DOUT_CTRL_LOW),
/*MPP9 is used to detect docking station connection/removal on Liquid*/
PM8921_MPP_INIT(9, D_INPUT, PM8921_MPP_DIG_LEVEL_S4, DIN_TO_INT),
diff --git a/arch/arm/mach-msm/board-8064-regulator.c b/arch/arm/mach-msm/board-8064-regulator.c
index 025f065..24df393 100644
--- a/arch/arm/mach-msm/board-8064-regulator.c
+++ b/arch/arm/mach-msm/board-8064-regulator.c
@@ -229,6 +229,7 @@
};
VREG_CONSUMERS(EXT_5V) = {
REGULATOR_SUPPLY("ext_5v", NULL),
+ REGULATOR_SUPPLY("ext_ddr3", NULL),
REGULATOR_SUPPLY("vbus", "msm_ehci_host.0"),
};
VREG_CONSUMERS(EXT_MPP8) = {
diff --git a/arch/arm/mach-msm/board-8064.c b/arch/arm/mach-msm/board-8064.c
index 01879bc..73f02f5 100644
--- a/arch/arm/mach-msm/board-8064.c
+++ b/arch/arm/mach-msm/board-8064.c
@@ -686,8 +686,6 @@
epm_adc_pdata.chan_per_mux = 8;
};
-#define TABLA_INTERRUPT_BASE (NR_MSM_IRQS + NR_GPIO_IRQS + NR_PM8921_IRQS)
-
/* Micbias setting is based on 8660 CDP/MTP/FLUID requirement
* 4 micbiases are used to power various analog and digital
* microphones operating at 1800 mV. Technically, all micbiases
@@ -1870,6 +1868,11 @@
&apq8064_msm_gov_device,
&apq8064_device_cache_erp,
&epm_adc_device,
+ &apq8064_qdss_device,
+ &msm_etb_device,
+ &msm_tpiu_device,
+ &msm_funnel_device,
+ &apq8064_etm_device,
};
static struct platform_device *sim_devices[] __initdata = {
@@ -2200,6 +2203,20 @@
#endif
}
+static void enable_ddr3_regulator(void)
+{
+ static struct regulator *ext_ddr3;
+
+ /* Use MPP7 output state as a flag for PCDDR3 presence. */
+ if (gpio_get_value_cansleep(PM8921_MPP_PM_TO_SYS(7)) > 0) {
+ ext_ddr3 = regulator_get(NULL, "ext_ddr3");
+ if (IS_ERR(ext_ddr3) || ext_ddr3 == NULL)
+ pr_err("Could not get MPP7 regulator\n");
+ else
+ regulator_enable(ext_ddr3);
+ }
+}
+
static void __init apq8064_common_init(void)
{
if (socinfo_init() < 0)
@@ -2228,6 +2245,7 @@
apq8064_ehci_host_init();
apq8064_init_buses();
platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
+ enable_ddr3_regulator();
if (machine_is_apq8064_mtp()) {
apq8064_device_hsic_host.dev.platform_data = &msm_hsic_pdata;
device_initialize(&apq8064_device_hsic_host.dev);
@@ -2352,6 +2370,17 @@
.init_very_early = apq8064_early_reserve,
MACHINE_END
+MACHINE_START(MPQ8064_CDP, "QCT MPQ8064 CDP")
+ .map_io = apq8064_map_io,
+ .reserve = apq8064_reserve,
+ .init_irq = apq8064_init_irq,
+ .handle_irq = gic_handle_irq,
+ .timer = &msm_timer,
+ .init_machine = apq8064_cdp_init,
+ .init_early = apq8064_allocate_memory_regions,
+ .init_very_early = apq8064_early_reserve,
+MACHINE_END
+
MACHINE_START(MPQ8064_HRD, "QCT MPQ8064 HRD")
.map_io = apq8064_map_io,
.reserve = apq8064_reserve,
diff --git a/arch/arm/mach-msm/board-8064.h b/arch/arm/mach-msm/board-8064.h
index 938d2ea..115929c 100644
--- a/arch/arm/mach-msm/board-8064.h
+++ b/arch/arm/mach-msm/board-8064.h
@@ -31,6 +31,8 @@
#define PM8821_MPP_PM_TO_SYS(pm_mpp) (pm_mpp - 1 + PM8821_MPP_BASE)
#define PM8821_IRQ_BASE (PM8921_IRQ_BASE + PM8921_NR_IRQS)
+#define TABLA_INTERRUPT_BASE (PM8821_IRQ_BASE + PM8821_NR_IRQS)
+
extern struct pm8xxx_regulator_platform_data
msm8064_pm8921_regulator_pdata[] __devinitdata;
diff --git a/arch/arm/mach-msm/board-8930-gpiomux.c b/arch/arm/mach-msm/board-8930-gpiomux.c
index 77d9c5f..cd201ef 100644
--- a/arch/arm/mach-msm/board-8930-gpiomux.c
+++ b/arch/arm/mach-msm/board-8930-gpiomux.c
@@ -611,7 +611,11 @@
};
#endif
-#ifdef MSM8930_PHASE_2
+static struct gpiomux_setting haptics_active_cfg = {
+ .func = GPIOMUX_FUNC_GPIO,
+ .drv = GPIOMUX_DRV_8MA,
+ .pull = GPIOMUX_PULL_UP,
+};
static struct gpiomux_setting haptics_suspend_cfg = {
.func = GPIOMUX_FUNC_GPIO,
.drv = GPIOMUX_DRV_8MA,
@@ -622,17 +626,18 @@
{
.gpio = 77,
.settings = {
+ [GPIOMUX_ACTIVE] = &haptics_active_cfg,
[GPIOMUX_SUSPENDED] = &haptics_suspend_cfg,
},
},
{
.gpio = 78,
.settings = {
+ [GPIOMUX_ACTIVE] = &haptics_active_cfg,
[GPIOMUX_SUSPENDED] = &haptics_suspend_cfg,
},
},
};
-#endif
int __init msm8930_init_gpiomux(void)
{
@@ -679,11 +684,10 @@
msm_gpiomux_install(mdm_configs,
ARRAY_SIZE(mdm_configs));
-#ifdef MSM8930_PHASE_2
- if (machine_is_msm8930_mtp() || machine_is_msm8930_fluid())
+ if (machine_is_msm8930_cdp() || machine_is_msm8930_mtp()
+ || machine_is_msm8930_fluid())
msm_gpiomux_install(msm8930_haptics_configs,
ARRAY_SIZE(msm8930_haptics_configs));
-#endif
#ifdef CONFIG_USB_EHCI_MSM_HSIC
if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1) &&
diff --git a/arch/arm/mach-msm/board-8930-gpu.c b/arch/arm/mach-msm/board-8930-gpu.c
index a5157038..7c8c64f 100644
--- a/arch/arm/mach-msm/board-8930-gpu.c
+++ b/arch/arm/mach-msm/board-8930-gpu.c
@@ -53,7 +53,7 @@
.src = MSM_BUS_MASTER_GRAPHICS_3D,
.dst = MSM_BUS_SLAVE_EBI_CH0,
.ab = 0,
- .ib = KGSL_CONVERT_TO_MBPS(3200),
+ .ib = KGSL_CONVERT_TO_MBPS(4264),
},
};
@@ -115,17 +115,17 @@
static struct kgsl_device_platform_data kgsl_3d0_pdata = {
.pwrlevel = {
{
- .gpu_freq = 200000000,
+ .gpu_freq = 450000000,
.bus_freq = 3,
.io_fraction = 0,
},
{
- .gpu_freq = 200000000,
+ .gpu_freq = 320000000,
.bus_freq = 2,
.io_fraction = 33,
},
{
- .gpu_freq = 200000000,
+ .gpu_freq = 192000000,
.bus_freq = 1,
.io_fraction = 100,
},
@@ -137,8 +137,8 @@
.init_level = 0,
.num_levels = 4,
.set_grp_async = NULL,
- .idle_timeout = 0x1FFFFFFF,
- .nap_allowed = false,
+ .idle_timeout = HZ/12,
+ .nap_allowed = true,
.clk_map = KGSL_CLK_CORE | KGSL_CLK_IFACE | KGSL_CLK_MEM_IFACE,
#ifdef CONFIG_MSM_BUS_SCALING
.bus_scale_table = &grp3d_bus_scale_pdata,
diff --git a/arch/arm/mach-msm/board-8930-pmic.c b/arch/arm/mach-msm/board-8930-pmic.c
index 1ca1902..6be2637 100644
--- a/arch/arm/mach-msm/board-8930-pmic.c
+++ b/arch/arm/mach-msm/board-8930-pmic.c
@@ -93,6 +93,8 @@
PM8XXX_GPIO_INPUT(8, PM_GPIO_PULL_UP_30),
PM8XXX_GPIO_INPUT(10, PM_GPIO_PULL_UP_30),
PM8XXX_GPIO_INPUT(11, PM_GPIO_PULL_UP_30),
+ /* haptics gpio */
+ PM8XXX_GPIO_OUTPUT_FUNC(7, 0, PM_GPIO_FUNC_1),
};
/* Initial pm8038 MPP configurations */
@@ -227,11 +229,24 @@
};
#define PM8038_WLED_MAX_CURRENT 25
+#define PM8XXX_LED_PWM_PERIOD 1000
+#define PM8XXX_LED_PWM_DUTY_MS 20
+#define PM8038_RGB_LED_MAX_CURRENT 12
static struct led_info pm8038_led_info[] = {
[0] = {
.name = "wled",
},
+ [1] = {
+ .name = "led:rgb_red",
+ .default_trigger = "battery-charging",
+ },
+ [2] = {
+ .name = "led:rgb_green",
+ },
+ [3] = {
+ .name = "led:rgb_blue",
+ },
};
static struct led_platform_data pm8038_led_core_pdata = {
@@ -249,6 +264,22 @@
.num_strings = 1,
};
+static int pm8038_led0_pwm_duty_pcts[56] = {
+ 1, 4, 8, 12, 16, 20, 24, 28, 32, 36,
+ 40, 44, 46, 52, 56, 60, 64, 68, 72, 76,
+ 80, 84, 88, 92, 96, 100, 100, 100, 98, 95,
+ 92, 88, 84, 82, 78, 74, 70, 66, 62, 58,
+ 58, 54, 50, 48, 42, 38, 34, 30, 26, 22,
+ 14, 10, 6, 4, 1
+};
+
+static struct pm8xxx_pwm_duty_cycles pm8038_led0_pwm_duty_cycles = {
+ .duty_pcts = (int *)&pm8038_led0_pwm_duty_pcts,
+ .num_duty_pcts = ARRAY_SIZE(pm8038_led0_pwm_duty_pcts),
+ .duty_ms = PM8XXX_LED_PWM_DUTY_MS,
+ .start_idx = 0,
+};
+
static struct pm8xxx_led_config pm8038_led_configs[] = {
[0] = {
.id = PM8XXX_ID_WLED,
@@ -257,6 +288,30 @@
.default_state = 1,
.wled_cfg = &wled_cfg,
},
+ [1] = {
+ .id = PM8XXX_ID_RGB_LED_RED,
+ .mode = PM8XXX_LED_MODE_PWM1,
+ .max_current = PM8038_RGB_LED_MAX_CURRENT,
+ .pwm_channel = 5,
+ .pwm_period_us = PM8XXX_LED_PWM_PERIOD,
+ .pwm_duty_cycles = &pm8038_led0_pwm_duty_cycles,
+ },
+ [2] = {
+ .id = PM8XXX_ID_RGB_LED_GREEN,
+ .mode = PM8XXX_LED_MODE_PWM1,
+ .max_current = PM8038_RGB_LED_MAX_CURRENT,
+ .pwm_channel = 4,
+ .pwm_period_us = PM8XXX_LED_PWM_PERIOD,
+ .pwm_duty_cycles = &pm8038_led0_pwm_duty_cycles,
+ },
+ [3] = {
+ .id = PM8XXX_ID_RGB_LED_BLUE,
+ .mode = PM8XXX_LED_MODE_PWM1,
+ .max_current = PM8038_RGB_LED_MAX_CURRENT,
+ .pwm_channel = 3,
+ .pwm_period_us = PM8XXX_LED_PWM_PERIOD,
+ .pwm_duty_cycles = &pm8038_led0_pwm_duty_cycles,
+ },
};
static struct pm8xxx_led_platform_data pm8xxx_leds_pdata = {
diff --git a/arch/arm/mach-msm/board-8930-regulator.c b/arch/arm/mach-msm/board-8930-regulator.c
index e8500dc..f760e7b 100644
--- a/arch/arm/mach-msm/board-8930-regulator.c
+++ b/arch/arm/mach-msm/board-8930-regulator.c
@@ -84,6 +84,7 @@
REGULATOR_SUPPLY("VDDIO_CDC", "sitar-slim"),
REGULATOR_SUPPLY("CDC_VDDA_TX", "sitar-slim"),
REGULATOR_SUPPLY("CDC_VDDA_RX", "sitar-slim"),
+ REGULATOR_SUPPLY("vddp", "0-0048"),
};
VREG_CONSUMERS(L12) = {
REGULATOR_SUPPLY("8038_l12", NULL),
@@ -179,7 +180,7 @@
REGULATOR_SUPPLY("8038_lvs2", NULL),
REGULATOR_SUPPLY("vcc_i2c", "3-004a"),
REGULATOR_SUPPLY("vcc_i2c", "3-0024"),
- REGULATOR_SUPPLY("vddp", "12-0048"),
+ REGULATOR_SUPPLY("vcc_i2c", "0-0048"),
};
VREG_CONSUMERS(EXT_5V) = {
REGULATOR_SUPPLY("ext_5v", NULL),
diff --git a/arch/arm/mach-msm/board-8930-storage.c b/arch/arm/mach-msm/board-8930-storage.c
index 26211bf..83fb5fd 100644
--- a/arch/arm/mach-msm/board-8930-storage.c
+++ b/arch/arm/mach-msm/board-8930-storage.c
@@ -245,6 +245,7 @@
.wpswitch_gpio = PM8921_GPIO_PM_TO_SYS(16),
#else
.wpswitch_gpio = 66,
+ .wpswitch_polarity = 1,
#endif
#endif
.vreg_data = &mmc_slot_vreg_data[SDCC3],
diff --git a/arch/arm/mach-msm/board-8930.c b/arch/arm/mach-msm/board-8930.c
index 59651a7..864d7b6 100644
--- a/arch/arm/mach-msm/board-8930.c
+++ b/arch/arm/mach-msm/board-8930.c
@@ -1218,127 +1218,25 @@
#/* TODO: Remove this once PM8038 physically becomes
* available.
*/
-#ifndef MSM8930_PHASE_2
-#define PM_HAP_EN_GPIO PM8921_GPIO_PM_TO_SYS(33)
-#define PM_HAP_LEN_GPIO PM8921_GPIO_PM_TO_SYS(20)
-#else
#define ISA1200_HAP_EN_GPIO 77
#define ISA1200_HAP_LEN_GPIO 78
#define ISA1200_HAP_CLK PM8038_GPIO_PM_TO_SYS(7)
-#endif
-
-#ifndef MSM8930_PHASE_2
-static struct msm_xo_voter *xo_handle_d1;
-#endif
static int isa1200_power(int on)
{
-#ifndef MSM8930_PHASE_2
- int rc = 0;
-
- gpio_set_value(HAP_SHIFT_LVL_OE_GPIO, !!on);
-
- rc = on ? msm_xo_mode_vote(xo_handle_d1, MSM_XO_MODE_ON) :
- msm_xo_mode_vote(xo_handle_d1, MSM_XO_MODE_OFF);
- if (rc < 0) {
- pr_err("%s: failed to %svote for TCXO D1 buffer%d\n",
- __func__, on ? "" : "de-", rc);
- goto err_xo_vote;
- }
-
- return 0;
-
-err_xo_vote:
- gpio_set_value(HAP_SHIFT_LVL_OE_GPIO, !on);
- return rc;
-#else
gpio_set_value_cansleep(ISA1200_HAP_CLK, !!on);
return 0;
-#endif
-
}
static int isa1200_dev_setup(bool enable)
{
int rc = 0;
-#ifndef MSM8930_PHASE_2
- struct pm_gpio hap_gpio_config = {
- .direction = PM_GPIO_DIR_OUT,
- .pull = PM_GPIO_PULL_NO,
- .out_strength = PM_GPIO_STRENGTH_HIGH,
- .function = PM_GPIO_FUNC_NORMAL,
- .inv_int_pol = 0,
- .vin_sel = 2,
- .output_buffer = PM_GPIO_OUT_BUF_CMOS,
- .output_value = 0,
- };
-
- if (enable == true) {
- rc = pm8xxx_gpio_config(PM_HAP_EN_GPIO, &hap_gpio_config);
- if (rc) {
- pr_err("%s: pm8921 gpio %d config failed(%d)\n",
- __func__, PM_HAP_EN_GPIO, rc);
- return rc;
- }
-
- rc = pm8xxx_gpio_config(PM_HAP_LEN_GPIO, &hap_gpio_config);
- if (rc) {
- pr_err("%s: pm8921 gpio %d config failed(%d)\n",
- __func__, PM_HAP_LEN_GPIO, rc);
- return rc;
- }
-
- rc = gpio_request(HAP_SHIFT_LVL_OE_GPIO, "hap_shft_lvl_oe");
- if (rc) {
- pr_err("%s: unable to request gpio %d (%d)\n",
- __func__, HAP_SHIFT_LVL_OE_GPIO, rc);
- return rc;
- }
-
- rc = gpio_direction_output(HAP_SHIFT_LVL_OE_GPIO, 0);
- if (rc) {
- pr_err("%s: Unable to set direction\n", __func__);
- goto free_gpio;
- }
-
- xo_handle_d1 = msm_xo_get(MSM_XO_TCXO_D1, "isa1200");
- if (IS_ERR(xo_handle_d1)) {
- rc = PTR_ERR(xo_handle_d1);
- pr_err("%s: failed to get the handle for D1(%d)\n",
- __func__, rc);
- goto gpio_set_dir;
- }
- } else {
- gpio_free(HAP_SHIFT_LVL_OE_GPIO);
-
- msm_xo_put(xo_handle_d1);
- }
-
- return 0;
-
-gpio_set_dir:
- gpio_set_value(HAP_SHIFT_LVL_OE_GPIO, 0);
-free_gpio:
- gpio_free(HAP_SHIFT_LVL_OE_GPIO);
- return rc;
-#else
- struct pm_gpio hap_clk_gpio_config = {
- .direction = PM_GPIO_DIR_OUT,
- .pull = PM_GPIO_PULL_NO,
- .out_strength = PM_GPIO_STRENGTH_HIGH,
- .function = PM_GPIO_FUNC_1,
- .inv_int_pol = 0,
- .vin_sel = PM_GPIO_VIN_S4,
- .output_buffer = PM_GPIO_OUT_BUF_CMOS,
- .output_value = 0,
- };
-
- rc = pm8xxx_gpio_config(ISA1200_HAP_CLK, &hap_clk_gpio_config);
+ rc = pm8xxx_aux_clk_control(CLK_MP3_1, XO_DIV_1, enable);
if (rc) {
- pr_err("%s: pm8038 gpio %d config failed(%d)\n",
- __func__, ISA1200_HAP_CLK, rc);
+ pr_err("%s: unable to write aux clock register(%d)\n",
+ __func__, rc);
return rc;
}
@@ -1363,38 +1261,29 @@
fail_gpio_req:
return rc;
-#endif
}
static struct isa1200_regulator isa1200_reg_data[] = {
-#ifndef MSM8930_PHASE_2
- {
- .name = "vcc_i2c",
- .min_uV = ISA_I2C_VTG_MIN_UV,
- .max_uV = ISA_I2C_VTG_MAX_UV,
- .load_uA = ISA_I2C_CURR_UA,
- },
-#else
{
.name = "vddp",
.min_uV = ISA_I2C_VTG_MIN_UV,
.max_uV = ISA_I2C_VTG_MAX_UV,
.load_uA = ISA_I2C_CURR_UA,
},
-#endif
+ {
+ .name = "vcc_i2c",
+ .min_uV = ISA_I2C_VTG_MIN_UV,
+ .max_uV = ISA_I2C_VTG_MAX_UV,
+ .load_uA = ISA_I2C_CURR_UA,
+ },
};
static struct isa1200_platform_data isa1200_1_pdata = {
.name = "vibrator",
.dev_setup = isa1200_dev_setup,
.power_on = isa1200_power,
-#ifndef MSM8930_PHASE_2
- .hap_en_gpio = PM_HAP_EN_GPIO,
- .hap_len_gpio = PM_HAP_LEN_GPIO,
-#else
.hap_en_gpio = ISA1200_HAP_EN_GPIO,
.hap_len_gpio = ISA1200_HAP_LEN_GPIO,
-#endif
.max_timeout = 15000,
.mode_ctrl = PWM_GEN_MODE,
.pwm_fd = {
@@ -1804,6 +1693,7 @@
&msm_device_tz_log,
#ifdef CONFIG_MSM_QDSS
+ &msm_qdss_device,
&msm_etb_device,
&msm_tpiu_device,
&msm_funnel_device,
@@ -2099,23 +1989,14 @@
ARRAY_SIZE(isl_charger_i2c_info),
},
#endif /* CONFIG_ISL9519_CHARGER */
-#ifndef MSM8930_PHASE_2
{
- I2C_LIQUID,
- MSM_8930_GSBI10_QUP_I2C_BUS_ID,
+ I2C_SURF | I2C_FFA | I2C_FLUID,
+ MSM_8930_GSBI9_QUP_I2C_BUS_ID,
msm_isa1200_board_info,
ARRAY_SIZE(msm_isa1200_board_info),
},
-#else
{
- I2C_FFA | I2C_FLUID,
- MSM_8930_GSBI10_QUP_I2C_BUS_ID,
- msm_isa1200_board_info,
- ARRAY_SIZE(msm_isa1200_board_info),
- },
-#endif
- {
- I2C_SURF,
+ I2C_SURF | I2C_FFA | I2C_FLUID,
MSM_8930_GSBI3_QUP_I2C_BUS_ID,
mxt_device_info_8930,
ARRAY_SIZE(mxt_device_info_8930),
@@ -2218,8 +2099,7 @@
msm8930_init_cam();
msm8930_init_mmc();
acpuclk_init(&acpuclk_8930_soc_data);
- if (machine_is_msm8930_cdp() || machine_is_msm8627_cdp())
- mxt_init_vkeys_8930();
+ mxt_init_vkeys_8930();
register_i2c_devices();
msm8930_init_fb();
slim_register_board_info(msm_slim_devices,
diff --git a/arch/arm/mach-msm/board-8930.h b/arch/arm/mach-msm/board-8930.h
index 45fe40f..a8fad72 100644
--- a/arch/arm/mach-msm/board-8930.h
+++ b/arch/arm/mach-msm/board-8930.h
@@ -133,6 +133,7 @@
(socinfo_get_platform_subtype() == 1) \
)
-#define MSM_8930_GSBI4_QUP_I2C_BUS_ID 4
#define MSM_8930_GSBI3_QUP_I2C_BUS_ID 3
+#define MSM_8930_GSBI4_QUP_I2C_BUS_ID 4
+#define MSM_8930_GSBI9_QUP_I2C_BUS_ID 0
#define MSM_8930_GSBI10_QUP_I2C_BUS_ID 10
diff --git a/arch/arm/mach-msm/board-8960.c b/arch/arm/mach-msm/board-8960.c
index d14b59b..724dd80 100644
--- a/arch/arm/mach-msm/board-8960.c
+++ b/arch/arm/mach-msm/board-8960.c
@@ -79,6 +79,8 @@
#include <mach/mdm2.h>
#include <mach/mdm-peripheral.h>
#include <mach/msm_rtb.h>
+#include <mach/msm_cache_dump.h>
+#include <mach/scm.h>
#include <linux/fmem.h>
@@ -137,13 +139,20 @@
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
#define MSM_PMEM_KERNEL_EBI1_SIZE 0x65000
-#define MSM_ION_SF_SIZE MSM_PMEM_SIZE
+#ifdef CONFIG_MSM_IOMMU
+#define MSM_ION_MM_SIZE 0x3800000
+#define MSM_ION_SF_SIZE 0x0
+#define MSM_ION_HEAP_NUM 7
+#else
+#define MSM_ION_MM_SIZE MSM_PMEM_ADSP_SIZE
+#define MSM_ION_SF_SIZE MSM_PMEM_SIZE
+#define MSM_ION_HEAP_NUM 8
+#endif
#define MSM_ION_MM_FW_SIZE 0x200000 /* (2MB) */
-#define MSM_ION_MM_SIZE MSM_PMEM_ADSP_SIZE
#define MSM_ION_QSECOM_SIZE 0x600000 /* (6MB) */
#define MSM_ION_MFC_SIZE SZ_8K
#define MSM_ION_AUDIO_SIZE MSM_PMEM_AUDIO_SIZE
-#define MSM_ION_HEAP_NUM 8
+
#define MSM_LIQUID_ION_MM_SIZE (MSM_ION_MM_SIZE + 0x600000)
#define MSM_LIQUID_ION_SF_SIZE MSM_LIQUID_PMEM_SIZE
#define MSM_HDMI_PRIM_ION_SF_SIZE MSM_HDMI_PRIM_PMEM_SIZE
@@ -417,6 +426,7 @@
.memory_type = ION_EBI_TYPE,
.extra_data = (void *) &cp_mfc_ion_pdata,
},
+#ifndef CONFIG_MSM_IOMMU
{
.id = ION_SF_HEAP_ID,
.type = ION_HEAP_TYPE_CARVEOUT,
@@ -425,6 +435,7 @@
.memory_type = ION_EBI_TYPE,
.extra_data = (void *) &co_ion_pdata,
},
+#endif
{
.id = ION_IOMMU_HEAP_ID,
.type = ION_HEAP_TYPE_IOMMU,
@@ -581,6 +592,43 @@
msm8960_mdp_writeback(msm8960_reserve_table);
}
+#if defined(CONFIG_MSM_CACHE_DUMP)
+static struct msm_cache_dump_platform_data msm_cache_dump_pdata = {
+ .l2_size = L2_BUFFER_SIZE,
+};
+
+static struct platform_device msm_cache_dump_device = {
+ .name = "msm_cache_dump",
+ .id = -1,
+ .dev = {
+ .platform_data = &msm_cache_dump_pdata,
+ },
+};
+
+#endif
+
+static void reserve_cache_dump_memory(void)
+{
+#ifdef CONFIG_MSM_CACHE_DUMP
+ unsigned int spare;
+ unsigned int l1_size;
+ unsigned int total;
+ int ret;
+
+ ret = scm_call(L1C_SERVICE_ID, L1C_BUFFER_GET_SIZE_COMMAND_ID, &spare,
+ sizeof(spare), &l1_size, sizeof(l1_size));
+
+ if (ret)
+ /* Fall back to something reasonable here */
+ l1_size = L1_BUFFER_SIZE;
+
+ total = l1_size + L2_BUFFER_SIZE;
+
+ msm8960_reserve_table[MEMTYPE_EBI1].size += total;
+ msm_cache_dump_pdata.l1_size = l1_size;
+#endif
+}
+
static void __init msm8960_calculate_reserve_sizes(void)
{
size_pmem_devices();
@@ -588,6 +636,7 @@
reserve_ion_memory();
reserve_mdp_memory();
reserve_rtb_memory();
+ reserve_cache_dump_memory();
}
static struct reserve_info msm8960_reserve_info __initdata = {
@@ -2192,6 +2241,7 @@
&msm8960_rpm_stat_device,
&msm_device_tz_log,
#ifdef CONFIG_MSM_QDSS
+ &msm_qdss_device,
&msm_etb_device,
&msm_tpiu_device,
&msm_funnel_device,
@@ -2205,6 +2255,9 @@
&msm8960_cpu_idle_device,
&msm8960_msm_gov_device,
&msm8960_device_cache_erp,
+#ifdef CONFIG_MSM_CACHE_DUMP
+ &msm_cache_dump_device,
+#endif
};
static struct platform_device *sim_devices[] __initdata = {
diff --git a/arch/arm/mach-msm/board-9615.c b/arch/arm/mach-msm/board-9615.c
index 3438f9d..77ee09f 100644
--- a/arch/arm/mach-msm/board-9615.c
+++ b/arch/arm/mach-msm/board-9615.c
@@ -367,7 +367,7 @@
0x44, 0x80,/* set VBUS valid threshold and
disconnect valid threshold */
0x38, 0x81, /* update DC voltage level */
- 0x14, 0x82,/* set preemphasis and rise/fall time */
+ 0x24, 0x82,/* set preemphasis and rise/fall time */
0x13, 0x83,/* set source impedance adjustment */
-1};
diff --git a/arch/arm/mach-msm/board-copper.c b/arch/arm/mach-msm/board-copper.c
index e08c807..b074809 100644
--- a/arch/arm/mach-msm/board-copper.c
+++ b/arch/arm/mach-msm/board-copper.c
@@ -369,6 +369,17 @@
msm_copper_stub_regulator_devices_len);
}
+/*
+ * Used to satisfy dependencies for devices that need to be
+ * run early or in a particular order. Most likely your device doesn't fall
+ * into this category, and thus the driver should not be added here. The
+ * EPROBE_DEFER can satisfy most dependency problems.
+ */
+void __init msm_copper_add_drivers(void)
+{
+ regulator_stub_init();
+}
+
static struct of_device_id irq_match[] __initdata = {
{ .compatible = "qcom,msm-qgic2", .data = gic_of_init, },
{ .compatible = "qcom,msm-gpio", .data = msm_gpio_of_init, },
diff --git a/arch/arm/mach-msm/board-dt.c b/arch/arm/mach-msm/board-dt.c
index 5d04786..52f3de6 100644
--- a/arch/arm/mach-msm/board-dt.c
+++ b/arch/arm/mach-msm/board-dt.c
@@ -55,8 +55,10 @@
msm_copper_init(&adata);
of_platform_populate(NULL, of_default_bus_match_table, adata, NULL);
- if (machine_is_copper())
+ if (machine_is_copper()) {
msm_copper_add_devices();
+ msm_copper_add_drivers();
+ }
}
static const char *msm_dt_match[] __initdata = {
diff --git a/arch/arm/mach-msm/board-msm7627a-audio.c b/arch/arm/mach-msm/board-msm7627a-audio.c
new file mode 100644
index 0000000..c393226
--- /dev/null
+++ b/arch/arm/mach-msm/board-msm7627a-audio.c
@@ -0,0 +1,429 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <asm/mach-types.h>
+#include <linux/platform_device.h>
+#include <linux/android_pmem.h>
+#include <linux/gfp.h>
+#include <mach/msm_memtypes.h>
+#include <mach/board.h>
+#include <mach/msm_rpcrouter.h>
+#include <mach/socinfo.h>
+
+#include "devices.h"
+#include "board-msm7627a.h"
+#include "devices-msm7x2xa.h"
+
+static struct android_pmem_platform_data android_pmem_adsp_pdata = {
+ .name = "pmem_adsp",
+ .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
+ .cached = 1,
+ .memory_type = MEMTYPE_EBI1,
+ .request_region = request_fmem_c_region,
+ .release_region = release_fmem_c_region,
+ .reusable = 1,
+};
+
+static struct platform_device android_pmem_adsp_device = {
+ .name = "android_pmem",
+ .id = 1,
+ .dev = { .platform_data = &android_pmem_adsp_pdata },
+};
+
+#define SND(desc, num) { .name = #desc, .id = num }
+static struct snd_endpoint snd_endpoints_list[] = {
+ SND(HANDSET, 0),
+ SND(MONO_HEADSET, 2),
+ SND(HEADSET, 3),
+ SND(SPEAKER, 6),
+ SND(TTY_HEADSET, 8),
+ SND(TTY_VCO, 9),
+ SND(TTY_HCO, 10),
+ SND(BT, 12),
+ SND(IN_S_SADC_OUT_HANDSET, 16),
+ SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
+ SND(FM_DIGITAL_STEREO_HEADSET, 26),
+ SND(FM_DIGITAL_SPEAKER_PHONE, 27),
+ SND(FM_DIGITAL_BT_A2DP_HEADSET, 28),
+ SND(STEREO_HEADSET_AND_SPEAKER, 31),
+ SND(CURRENT, 0x7FFFFFFE),
+ SND(FM_ANALOG_STEREO_HEADSET, 35),
+ SND(FM_ANALOG_STEREO_HEADSET_CODEC, 36),
+};
+#undef SND
+
+static struct msm_snd_endpoints msm_device_snd_endpoints = {
+ .endpoints = snd_endpoints_list,
+ .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
+};
+
+static struct platform_device msm_device_snd = {
+ .name = "msm_snd",
+ .id = -1,
+ .dev = {
+ .platform_data = &msm_device_snd_endpoints
+ },
+};
+
+#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
+ (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
+ (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
+ (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
+ (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
+ (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
+#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
+ (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
+ (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
+ (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
+ (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
+ (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
+#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
+ (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
+ (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
+ (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
+ (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
+ (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
+#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
+ (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
+ (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
+ (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
+ (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
+ (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
+#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
+
+static unsigned int dec_concurrency_table[] = {
+ /* Audio LP */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
+ 0, 0, 0,
+
+ /* Concurrency 1 */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC4_FORMAT),
+
+ /* Concurrency 2 */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC4_FORMAT),
+
+ /* Concurrency 3 */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC4_FORMAT),
+
+ /* Concurrency 4 */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC4_FORMAT),
+
+ /* Concurrency 5 */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC4_FORMAT),
+
+ /* Concurrency 6 */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ 0, 0, 0,
+
+ /* Concurrency 7 */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC4_FORMAT),
+};
+
+#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
+ .module_queueid = queueid, .module_decid = decid, \
+ .nr_codec_support = nr_codec}
+
+static struct msm_adspdec_info dec_info_list[] = {
+ DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
+ DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
+ DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
+ DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
+ DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
+};
+
+static struct msm_adspdec_database msm_device_adspdec_database = {
+ .num_dec = ARRAY_SIZE(dec_info_list),
+ .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
+ ARRAY_SIZE(dec_info_list)),
+ .dec_concurrency_table = dec_concurrency_table,
+ .dec_info_list = dec_info_list,
+};
+
+static struct platform_device msm_device_adspdec = {
+ .name = "msm_adspdec",
+ .id = -1,
+ .dev = {
+ .platform_data = &msm_device_adspdec_database
+ },
+};
+
+static struct android_pmem_platform_data android_pmem_audio_pdata = {
+ .name = "pmem_audio",
+ .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
+ .cached = 0,
+ .memory_type = MEMTYPE_EBI1,
+};
+
+static struct platform_device android_pmem_audio_device = {
+ .name = "android_pmem",
+ .id = 2,
+ .dev = { .platform_data = &android_pmem_audio_pdata },
+};
+
+static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
+static int __init pmem_kernel_ebi1_size_setup(char *p)
+{
+ pmem_kernel_ebi1_size = memparse(p, NULL);
+ return 0;
+}
+early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
+
+static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
+static int __init pmem_audio_size_setup(char *p)
+{
+ pmem_audio_size = memparse(p, NULL);
+ return 0;
+}
+early_param("pmem_audio_size", pmem_audio_size_setup);
+
+static struct memtype_reserve msm7627a_reserve_table[] __initdata = {
+ [MEMTYPE_SMI] = {
+ },
+ [MEMTYPE_EBI0] = {
+ .flags = MEMTYPE_FLAGS_1M_ALIGN,
+ },
+ [MEMTYPE_EBI1] = {
+ .flags = MEMTYPE_FLAGS_1M_ALIGN,
+ },
+};
+
+static struct android_pmem_platform_data android_pmem_pdata = {
+ .name = "pmem",
+ .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
+ .cached = 1,
+ .memory_type = MEMTYPE_EBI1,
+};
+static struct platform_device android_pmem_device = {
+ .name = "android_pmem",
+ .id = 0,
+ .dev = { .platform_data = &android_pmem_pdata },
+};
+
+static struct android_pmem_platform_data *pmem_pdata_array[] __initdata = {
+ &android_pmem_adsp_pdata,
+ &android_pmem_audio_pdata,
+ &android_pmem_pdata,
+};
+
+static unsigned pmem_mdp_size;
+static unsigned pmem_adsp_size;
+
+static int __init pmem_mdp_size_setup(char *p)
+{
+ pmem_mdp_size = memparse(p, NULL);
+ return 0;
+}
+early_param("pmem_mdp_size", pmem_mdp_size_setup);
+
+static int __init pmem_adsp_size_setup(char *p)
+{
+ pmem_adsp_size = memparse(p, NULL);
+ return 0;
+}
+early_param("pmem_adsp_size", pmem_adsp_size_setup);
+
+static void __init msm7627a_size_pmem_devices(void)
+{
+ unsigned int i;
+ unsigned int reusable_count = 0;
+
+ if (machine_is_msm7625a_surf() || machine_is_msm7625a_ffa()) {
+ pmem_mdp_size = MSM7x25A_MSM_PMEM_MDP_SIZE;
+ pmem_adsp_size = MSM7x25A_MSM_PMEM_ADSP_SIZE;
+ } else {
+ pmem_mdp_size = MSM_PMEM_MDP_SIZE;
+ pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
+ }
+
+ android_pmem_adsp_pdata.size = pmem_adsp_size;
+ android_pmem_pdata.size = pmem_mdp_size;
+ android_pmem_audio_pdata.size = pmem_audio_size;
+
+ fmem_pdata.size = 0;
+
+ /* Find pmem devices that should use FMEM (reusable) memory.
+ */
+ for (i = 0; i < ARRAY_SIZE(pmem_pdata_array); ++i) {
+ struct android_pmem_platform_data *pdata = pmem_pdata_array[i];
+
+ if (!reusable_count && pdata->reusable)
+ fmem_pdata.size += pdata->size;
+
+ reusable_count += (pdata->reusable) ? 1 : 0;
+
+ if (pdata->reusable && reusable_count > 1) {
+ pr_err("%s: Too many PMEM devices specified as reusable. PMEM device %s was not configured as reusable.\n",
+ __func__, pdata->name);
+ pdata->reusable = 0;
+ }
+ }
+}
+
+static void __init qrd7627a_size_pmem_devices(void)
+{
+ unsigned int i;
+ unsigned int reusable_count = 0;
+
+ pmem_mdp_size = QRD_PMEM_MDP_SIZE;
+ pmem_adsp_size = QRD_PMEM_ADSP_SIZE;
+
+ android_pmem_adsp_pdata.size = pmem_adsp_size;
+ android_pmem_pdata.size = pmem_mdp_size;
+ android_pmem_audio_pdata.size = pmem_audio_size;
+
+ fmem_pdata.size = 0;
+
+ /* Find pmem devices that should use FMEM (reusable) memory.
+ */
+ for (i = 0; i < ARRAY_SIZE(pmem_pdata_array); ++i) {
+ struct android_pmem_platform_data *pdata = pmem_pdata_array[i];
+
+ if (!reusable_count && pdata->reusable)
+ fmem_pdata.size += pdata->size;
+
+ reusable_count += (pdata->reusable) ? 1 : 0;
+
+ if (pdata->reusable && reusable_count > 1) {
+ pr_err("%s: Too many PMEM devices specified as reusable. PMEM device %s was not configured as reusable.\n",
+ __func__, pdata->name);
+ pdata->reusable = 0;
+ }
+ }
+}
+
+static void __init reserve_memory_for(struct android_pmem_platform_data *p)
+{
+ msm7627a_reserve_table[p->memory_type].size += p->size;
+}
+
+static void __init msm7627a_reserve_pmem_memory(void)
+{
+ unsigned int i;
+ for (i = 0; i < ARRAY_SIZE(pmem_pdata_array); ++i) {
+ if (!pmem_pdata_array[i]->reusable)
+ reserve_memory_for(pmem_pdata_array[i]);
+ }
+
+ msm7627a_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
+}
+
+static void __init qrd7627a_reserve_pmem_memory(void)
+{
+ reserve_memory_for(&android_pmem_adsp_pdata);
+ reserve_memory_for(&android_pmem_pdata);
+ reserve_memory_for(&android_pmem_audio_pdata);
+ msm7627a_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
+}
+
+static void __init msm7627a_calculate_reserve_sizes(void)
+{
+ msm7627a_size_pmem_devices();
+ msm7627a_reserve_pmem_memory();
+}
+
+static void __init qrd7627a_calculate_reserve_sizes(void)
+{
+ qrd7627a_size_pmem_devices();
+ qrd7627a_reserve_pmem_memory();
+}
+
+static int msm7627a_paddr_to_memtype(unsigned int paddr)
+{
+ return MEMTYPE_EBI1;
+}
+
+static struct reserve_info msm7627a_reserve_info __initdata = {
+ .memtype_reserve_table = msm7627a_reserve_table,
+ .calculate_reserve_sizes = msm7627a_calculate_reserve_sizes,
+ .paddr_to_memtype = msm7627a_paddr_to_memtype,
+};
+
+static struct reserve_info qrd7627a_reserve_info __initdata = {
+ .memtype_reserve_table = msm7627a_reserve_table,
+ .calculate_reserve_sizes = qrd7627a_calculate_reserve_sizes,
+ .paddr_to_memtype = msm7627a_paddr_to_memtype,
+};
+
+void __init msm7627a_reserve(void)
+{
+ reserve_info = &msm7627a_reserve_info;
+ msm_reserve();
+ fmem_pdata.phys = reserve_memory_for_fmem(fmem_pdata.size);
+}
+
+void __init qrd7627a_reserve(void)
+{
+ reserve_info = &qrd7627a_reserve_info;
+ msm_reserve();
+ fmem_pdata.phys = reserve_memory_for_fmem(fmem_pdata.size);
+}
+
+static struct platform_device *audio_devices[] __initdata = {
+ &android_pmem_device,
+ &android_pmem_adsp_device,
+ &android_pmem_audio_device,
+ &msm_device_adspdec,
+ &msm_device_snd,
+};
+
+void __init msm_adsp_add_pdev(void)
+{
+ int rc = 0;
+ struct rpc_board_dev *rpc_adsp_pdev;
+
+ rpc_adsp_pdev = kzalloc(sizeof(struct rpc_board_dev), GFP_KERNEL);
+ if (rpc_adsp_pdev == NULL) {
+ pr_err("%s: Memory Allocation failure\n", __func__);
+ return;
+ }
+ rpc_adsp_pdev->prog = ADSP_RPC_PROG;
+
+ if (cpu_is_msm8625())
+ rpc_adsp_pdev->pdev = msm8625_device_adsp;
+ else
+ rpc_adsp_pdev->pdev = msm_adsp_device;
+ rc = msm_rpc_add_board_dev(rpc_adsp_pdev, 1);
+ if (rc < 0) {
+ pr_err("%s: return val: %d\n", __func__, rc);
+ kfree(rpc_adsp_pdev);
+ }
+
+ platform_add_devices(audio_devices,
+ ARRAY_SIZE(audio_devices));
+
+}
diff --git a/arch/arm/mach-msm/board-msm7627a-bt.c b/arch/arm/mach-msm/board-msm7627a-bt.c
index fcbf2a6..81abbc0 100644
--- a/arch/arm/mach-msm/board-msm7627a-bt.c
+++ b/arch/arm/mach-msm/board-msm7627a-bt.c
@@ -20,6 +20,7 @@
#include <asm/gpio.h>
#include <asm/mach-types.h>
#include <mach/rpc_pmapp.h>
+#include <mach/socinfo.h>
#include "board-msm7627a.h"
#include "devices-msm7x2xa.h"
@@ -98,12 +99,19 @@
int gpio_bt_sys_rest_en = 133;
static void gpio_bt_config(void)
{
+ u32 socinfo = socinfo_get_platform_version();
if (machine_is_msm7627a_qrd1())
gpio_bt_sys_rest_en = 114;
if (machine_is_msm7627a_evb() || machine_is_msm8625_evb())
gpio_bt_sys_rest_en = 16;
if (machine_is_msm8625_qrd7())
gpio_bt_sys_rest_en = 88;
+ if (machine_is_msm7627a_qrd3()) {
+ if (socinfo == 0x70002)
+ gpio_bt_sys_rest_en = 88;
+ else
+ gpio_bt_sys_rest_en = 85;
+ }
}
static int bt_set_gpio(int on)
@@ -962,8 +970,6 @@
int i, rc = 0;
struct device *dev;
- if (machine_is_msm7627a_qrd3())
- return;
gpio_bt_config();
diff --git a/arch/arm/mach-msm/board-msm7627a-io.c b/arch/arm/mach-msm/board-msm7627a-io.c
new file mode 100644
index 0000000..757c166
--- /dev/null
+++ b/arch/arm/mach-msm/board-msm7627a-io.c
@@ -0,0 +1,713 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/platform_device.h>
+#include <linux/regulator/consumer.h>
+#include <linux/gpio_event.h>
+#include <linux/leds.h>
+#include <linux/i2c/atmel_mxt_ts.h>
+#include <linux/i2c.h>
+#include <linux/input/rmi_platformdata.h>
+#include <linux/input/rmi_i2c.h>
+#include <linux/delay.h>
+#include <linux/atmel_maxtouch.h>
+#include <linux/input/ft5x06_ts.h>
+#include <asm/gpio.h>
+#include <asm/mach-types.h>
+#include <mach/rpc_server_handset.h>
+
+#include "devices.h"
+#include "board-msm7627a.h"
+#include "devices-msm7x2xa.h"
+
+#define ATMEL_TS_I2C_NAME "maXTouch"
+#define ATMEL_X_OFFSET 13
+#define ATMEL_Y_OFFSET 0
+
+#if defined(CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C) || \
+defined(CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C_MODULE)
+
+#ifndef CLEARPAD3000_ATTEN_GPIO
+#define CLEARPAD3000_ATTEN_GPIO (48)
+#endif
+
+#ifndef CLEARPAD3000_RESET_GPIO
+#define CLEARPAD3000_RESET_GPIO (26)
+#endif
+
+#define KP_INDEX(row, col) ((row)*ARRAY_SIZE(kp_col_gpios) + (col))
+
+static unsigned int kp_row_gpios[] = {31, 32, 33, 34, 35};
+static unsigned int kp_col_gpios[] = {36, 37, 38, 39, 40};
+
+static const unsigned short keymap[ARRAY_SIZE(kp_col_gpios) *
+ ARRAY_SIZE(kp_row_gpios)] = {
+ [KP_INDEX(0, 0)] = KEY_7,
+ [KP_INDEX(0, 1)] = KEY_DOWN,
+ [KP_INDEX(0, 2)] = KEY_UP,
+ [KP_INDEX(0, 3)] = KEY_RIGHT,
+ [KP_INDEX(0, 4)] = KEY_ENTER,
+
+ [KP_INDEX(1, 0)] = KEY_LEFT,
+ [KP_INDEX(1, 1)] = KEY_SEND,
+ [KP_INDEX(1, 2)] = KEY_1,
+ [KP_INDEX(1, 3)] = KEY_4,
+ [KP_INDEX(1, 4)] = KEY_CLEAR,
+
+ [KP_INDEX(2, 0)] = KEY_6,
+ [KP_INDEX(2, 1)] = KEY_5,
+ [KP_INDEX(2, 2)] = KEY_8,
+ [KP_INDEX(2, 3)] = KEY_3,
+ [KP_INDEX(2, 4)] = KEY_NUMERIC_STAR,
+
+ [KP_INDEX(3, 0)] = KEY_9,
+ [KP_INDEX(3, 1)] = KEY_NUMERIC_POUND,
+ [KP_INDEX(3, 2)] = KEY_0,
+ [KP_INDEX(3, 3)] = KEY_2,
+ [KP_INDEX(3, 4)] = KEY_SLEEP,
+
+ [KP_INDEX(4, 0)] = KEY_BACK,
+ [KP_INDEX(4, 1)] = KEY_HOME,
+ [KP_INDEX(4, 2)] = KEY_MENU,
+ [KP_INDEX(4, 3)] = KEY_VOLUMEUP,
+ [KP_INDEX(4, 4)] = KEY_VOLUMEDOWN,
+};
+
+/* SURF keypad platform device information */
+static struct gpio_event_matrix_info kp_matrix_info = {
+ .info.func = gpio_event_matrix_func,
+ .keymap = keymap,
+ .output_gpios = kp_row_gpios,
+ .input_gpios = kp_col_gpios,
+ .noutputs = ARRAY_SIZE(kp_row_gpios),
+ .ninputs = ARRAY_SIZE(kp_col_gpios),
+ .settle_time.tv_nsec = 40 * NSEC_PER_USEC,
+ .poll_time.tv_nsec = 20 * NSEC_PER_MSEC,
+ .flags = GPIOKPF_LEVEL_TRIGGERED_IRQ | GPIOKPF_DRIVE_INACTIVE |
+ GPIOKPF_PRINT_UNMAPPED_KEYS,
+};
+
+static struct gpio_event_info *kp_info[] = {
+ &kp_matrix_info.info
+};
+
+static struct gpio_event_platform_data kp_pdata = {
+ .name = "7x27a_kp",
+ .info = kp_info,
+ .info_count = ARRAY_SIZE(kp_info)
+};
+
+static struct platform_device kp_pdev = {
+ .name = GPIO_EVENT_DEV_NAME,
+ .id = -1,
+ .dev = {
+ .platform_data = &kp_pdata,
+ },
+};
+
+/* 8625 keypad device information */
+static unsigned int kp_row_gpios_8625[] = {31};
+static unsigned int kp_col_gpios_8625[] = {36, 37};
+
+static const unsigned short keymap_8625[] = {
+ KEY_VOLUMEUP,
+ KEY_VOLUMEDOWN,
+};
+
+static struct gpio_event_matrix_info kp_matrix_info_8625 = {
+ .info.func = gpio_event_matrix_func,
+ .keymap = keymap_8625,
+ .output_gpios = kp_row_gpios_8625,
+ .input_gpios = kp_col_gpios_8625,
+ .noutputs = ARRAY_SIZE(kp_row_gpios_8625),
+ .ninputs = ARRAY_SIZE(kp_col_gpios_8625),
+ .settle_time.tv_nsec = 40 * NSEC_PER_USEC,
+ .poll_time.tv_nsec = 20 * NSEC_PER_MSEC,
+ .flags = GPIOKPF_LEVEL_TRIGGERED_IRQ | GPIOKPF_DRIVE_INACTIVE |
+ GPIOKPF_PRINT_UNMAPPED_KEYS,
+};
+
+static struct gpio_event_info *kp_info_8625[] = {
+ &kp_matrix_info_8625.info,
+};
+
+static struct gpio_event_platform_data kp_pdata_8625 = {
+ .name = "8625_kp",
+ .info = kp_info_8625,
+ .info_count = ARRAY_SIZE(kp_info_8625)
+};
+
+static struct platform_device kp_pdev_8625 = {
+ .name = GPIO_EVENT_DEV_NAME,
+ .id = -1,
+ .dev = {
+ .platform_data = &kp_pdata_8625,
+ },
+};
+
+#define LED_GPIO_PDM 96
+#define LED_RED_GPIO_8625 49
+#define LED_GREEN_GPIO_8625 34
+
+static struct gpio_led gpio_leds_config_8625[] = {
+ {
+ .name = "green",
+ .gpio = LED_GREEN_GPIO_8625,
+ },
+ {
+ .name = "red",
+ .gpio = LED_RED_GPIO_8625,
+ },
+};
+
+static struct gpio_led_platform_data gpio_leds_pdata_8625 = {
+ .num_leds = ARRAY_SIZE(gpio_leds_config_8625),
+ .leds = gpio_leds_config_8625,
+};
+
+static struct platform_device gpio_leds_8625 = {
+ .name = "leds-gpio",
+ .id = -1,
+ .dev = {
+ .platform_data = &gpio_leds_pdata_8625,
+ },
+};
+
+#define MXT_TS_IRQ_GPIO 48
+#define MXT_TS_RESET_GPIO 26
+
+static const u8 mxt_config_data[] = {
+ /* T6 Object */
+ 0, 0, 0, 0, 0, 0,
+ /* T38 Object */
+ 16, 0, 0, 0, 0, 0, 0, 0,
+ /* T7 Object */
+ 32, 16, 50,
+ /* T8 Object */
+ 30, 0, 20, 20, 0, 0, 20, 0, 50, 0,
+ /* T9 Object */
+ 3, 0, 0, 18, 11, 0, 32, 75, 3, 3,
+ 0, 1, 1, 0, 10, 10, 10, 10, 31, 3,
+ 223, 1, 11, 11, 15, 15, 151, 43, 145, 80,
+ 100, 15, 0, 0, 0,
+ /* T15 Object */
+ 131, 0, 11, 11, 1, 1, 0, 45, 3, 0,
+ 0,
+ /* T18 Object */
+ 0, 0,
+ /* T19 Object */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+ /* T23 Object */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ /* T25 Object */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ /* T40 Object */
+ 0, 0, 0, 0, 0,
+ /* T42 Object */
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ /* T46 Object */
+ 0, 2, 32, 48, 0, 0, 0, 0, 0,
+ /* T47 Object */
+ 1, 20, 60, 5, 2, 50, 40, 0, 0, 40,
+ /* T48 Object */
+ 1, 12, 80, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 6, 6, 0, 0, 100, 4, 64,
+ 10, 0, 20, 5, 0, 38, 0, 20, 0, 0,
+ 0, 0, 0, 0, 16, 65, 3, 1, 1, 0,
+ 10, 10, 10, 0, 0, 15, 15, 154, 58, 145,
+ 80, 100, 15, 3,
+};
+
+static struct mxt_config_info mxt_config_array[] = {
+ {
+ .config = mxt_config_data,
+ .config_length = ARRAY_SIZE(mxt_config_data),
+ .family_id = 0x81,
+ .variant_id = 0x01,
+ .version = 0x10,
+ .build = 0xAA,
+ },
+};
+
+static int mxt_key_codes[MXT_KEYARRAY_MAX_KEYS] = {
+ [0] = KEY_HOME,
+ [1] = KEY_MENU,
+ [9] = KEY_BACK,
+ [10] = KEY_SEARCH,
+};
+
+static struct mxt_platform_data mxt_platform_data = {
+ .config_array = mxt_config_array,
+ .config_array_size = ARRAY_SIZE(mxt_config_array),
+ .panel_minx = 0,
+ .panel_maxx = 479,
+ .panel_miny = 0,
+ .panel_maxy = 799,
+ .disp_minx = 0,
+ .disp_maxx = 479,
+ .disp_miny = 0,
+ .disp_maxy = 799,
+ .irqflags = IRQF_TRIGGER_FALLING,
+ .i2c_pull_up = true,
+ .reset_gpio = MXT_TS_RESET_GPIO,
+ .irq_gpio = MXT_TS_IRQ_GPIO,
+ .key_codes = mxt_key_codes,
+};
+
+static struct i2c_board_info mxt_device_info[] __initdata = {
+ {
+ I2C_BOARD_INFO("atmel_mxt_ts", 0x4a),
+ .platform_data = &mxt_platform_data,
+ .irq = MSM_GPIO_TO_INT(MXT_TS_IRQ_GPIO),
+ },
+};
+
+static int synaptics_touchpad_setup(void);
+
+static struct msm_gpio clearpad3000_cfg_data[] = {
+ {GPIO_CFG(CLEARPAD3000_ATTEN_GPIO, 0, GPIO_CFG_INPUT,
+ GPIO_CFG_NO_PULL, GPIO_CFG_6MA), "rmi4_attn"},
+ {GPIO_CFG(CLEARPAD3000_RESET_GPIO, 0, GPIO_CFG_OUTPUT,
+ GPIO_CFG_PULL_DOWN, GPIO_CFG_8MA), "rmi4_reset"},
+};
+
+static struct rmi_XY_pair rmi_offset = {.x = 0, .y = 0};
+static struct rmi_range rmi_clipx = {.min = 48, .max = 980};
+static struct rmi_range rmi_clipy = {.min = 7, .max = 1647};
+static struct rmi_f11_functiondata synaptics_f11_data = {
+ .swap_axes = false,
+ .flipX = false,
+ .flipY = false,
+ .offset = &rmi_offset,
+ .button_height = 113,
+ .clipX = &rmi_clipx,
+ .clipY = &rmi_clipy,
+};
+
+#define MAX_LEN 100
+
+static ssize_t clearpad3000_virtual_keys_register(struct kobject *kobj,
+ struct kobj_attribute *attr, char *buf)
+{
+ char *virtual_keys = __stringify(EV_KEY) ":" __stringify(KEY_MENU) \
+ ":60:830:120:60" ":" __stringify(EV_KEY) \
+ ":" __stringify(KEY_HOME) ":180:830:120:60" \
+ ":" __stringify(EV_KEY) ":" \
+ __stringify(KEY_SEARCH) ":300:830:120:60" \
+ ":" __stringify(EV_KEY) ":" \
+ __stringify(KEY_BACK) ":420:830:120:60" "\n";
+
+ return snprintf(buf, strnlen(virtual_keys, MAX_LEN) + 1 , "%s",
+ virtual_keys);
+}
+
+static struct kobj_attribute clearpad3000_virtual_keys_attr = {
+ .attr = {
+ .name = "virtualkeys.sensor00fn11",
+ .mode = S_IRUGO,
+ },
+ .show = &clearpad3000_virtual_keys_register,
+};
+
+static struct attribute *virtual_key_properties_attrs[] = {
+ &clearpad3000_virtual_keys_attr.attr,
+ NULL
+};
+
+static struct attribute_group virtual_key_properties_attr_group = {
+ .attrs = virtual_key_properties_attrs,
+};
+
+struct kobject *virtual_key_properties_kobj;
+
+static struct rmi_functiondata synaptics_functiondata[] = {
+ {
+ .function_index = RMI_F11_INDEX,
+ .data = &synaptics_f11_data,
+ },
+};
+
+static struct rmi_functiondata_list synaptics_perfunctiondata = {
+ .count = ARRAY_SIZE(synaptics_functiondata),
+ .functiondata = synaptics_functiondata,
+};
+
+static struct rmi_sensordata synaptics_sensordata = {
+ .perfunctiondata = &synaptics_perfunctiondata,
+ .rmi_sensor_setup = synaptics_touchpad_setup,
+};
+
+static struct rmi_i2c_platformdata synaptics_platformdata = {
+ .i2c_address = 0x2c,
+ .irq_type = IORESOURCE_IRQ_LOWLEVEL,
+ .sensordata = &synaptics_sensordata,
+};
+
+static struct i2c_board_info synaptic_i2c_clearpad3k[] = {
+ {
+ I2C_BOARD_INFO("rmi4_ts", 0x2c),
+ .platform_data = &synaptics_platformdata,
+ },
+};
+
+static int synaptics_touchpad_setup(void)
+{
+ int retval = 0;
+
+ virtual_key_properties_kobj =
+ kobject_create_and_add("board_properties", NULL);
+ if (virtual_key_properties_kobj)
+ retval = sysfs_create_group(virtual_key_properties_kobj,
+ &virtual_key_properties_attr_group);
+ if (!virtual_key_properties_kobj || retval)
+ pr_err("failed to create ft5202 board_properties\n");
+
+ retval = msm_gpios_request_enable(clearpad3000_cfg_data,
+ sizeof(clearpad3000_cfg_data)/sizeof(struct msm_gpio));
+ if (retval) {
+ pr_err("%s:Failed to obtain touchpad GPIO %d. Code: %d.",
+ __func__, CLEARPAD3000_ATTEN_GPIO, retval);
+ retval = 0; /* ignore the err */
+ }
+ synaptics_platformdata.irq = gpio_to_irq(CLEARPAD3000_ATTEN_GPIO);
+
+ gpio_set_value(CLEARPAD3000_RESET_GPIO, 0);
+ usleep(10000);
+ gpio_set_value(CLEARPAD3000_RESET_GPIO, 1);
+ usleep(50000);
+
+ return retval;
+}
+#endif
+
+static struct regulator_bulk_data regs_atmel[] = {
+ { .supply = "ldo2", .min_uV = 2850000, .max_uV = 2850000 },
+ { .supply = "smps3", .min_uV = 1800000, .max_uV = 1800000 },
+};
+
+#define ATMEL_TS_GPIO_IRQ 82
+
+static int atmel_ts_power_on(bool on)
+{
+ int rc = on ?
+ regulator_bulk_enable(ARRAY_SIZE(regs_atmel), regs_atmel) :
+ regulator_bulk_disable(ARRAY_SIZE(regs_atmel), regs_atmel);
+
+ if (rc)
+ pr_err("%s: could not %sable regulators: %d\n",
+ __func__, on ? "en" : "dis", rc);
+ else
+ msleep(50);
+
+ return rc;
+}
+
+static int atmel_ts_platform_init(struct i2c_client *client)
+{
+ int rc;
+ struct device *dev = &client->dev;
+
+ rc = regulator_bulk_get(dev, ARRAY_SIZE(regs_atmel), regs_atmel);
+ if (rc) {
+ dev_err(dev, "%s: could not get regulators: %d\n",
+ __func__, rc);
+ goto out;
+ }
+
+ rc = regulator_bulk_set_voltage(ARRAY_SIZE(regs_atmel), regs_atmel);
+ if (rc) {
+ dev_err(dev, "%s: could not set voltages: %d\n",
+ __func__, rc);
+ goto reg_free;
+ }
+
+ rc = gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
+ GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
+ GPIO_CFG_8MA), GPIO_CFG_ENABLE);
+ if (rc) {
+ dev_err(dev, "%s: gpio_tlmm_config for %d failed\n",
+ __func__, ATMEL_TS_GPIO_IRQ);
+ goto reg_free;
+ }
+
+ /* configure touchscreen interrupt gpio */
+ rc = gpio_request(ATMEL_TS_GPIO_IRQ, "atmel_maxtouch_gpio");
+ if (rc) {
+ dev_err(dev, "%s: unable to request gpio %d\n",
+ __func__, ATMEL_TS_GPIO_IRQ);
+ goto ts_gpio_tlmm_unconfig;
+ }
+
+ rc = gpio_direction_input(ATMEL_TS_GPIO_IRQ);
+ if (rc < 0) {
+ dev_err(dev, "%s: unable to set the direction of gpio %d\n",
+ __func__, ATMEL_TS_GPIO_IRQ);
+ goto free_ts_gpio;
+ }
+ return 0;
+
+free_ts_gpio:
+ gpio_free(ATMEL_TS_GPIO_IRQ);
+ts_gpio_tlmm_unconfig:
+ gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
+ GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
+ GPIO_CFG_2MA), GPIO_CFG_DISABLE);
+reg_free:
+ regulator_bulk_free(ARRAY_SIZE(regs_atmel), regs_atmel);
+out:
+ return rc;
+}
+
+static int atmel_ts_platform_exit(struct i2c_client *client)
+{
+ gpio_free(ATMEL_TS_GPIO_IRQ);
+ gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
+ GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
+ GPIO_CFG_2MA), GPIO_CFG_DISABLE);
+ regulator_bulk_free(ARRAY_SIZE(regs_atmel), regs_atmel);
+ return 0;
+}
+
+static u8 atmel_ts_read_chg(void)
+{
+ return gpio_get_value(ATMEL_TS_GPIO_IRQ);
+}
+
+static u8 atmel_ts_valid_interrupt(void)
+{
+ return !atmel_ts_read_chg();
+}
+
+
+static struct maxtouch_platform_data atmel_ts_pdata = {
+ .numtouch = 4,
+ .init_platform_hw = atmel_ts_platform_init,
+ .exit_platform_hw = atmel_ts_platform_exit,
+ .power_on = atmel_ts_power_on,
+ .display_res_x = 480,
+ .display_res_y = 864,
+ .min_x = ATMEL_X_OFFSET,
+ .max_x = (505 - ATMEL_X_OFFSET),
+ .min_y = ATMEL_Y_OFFSET,
+ .max_y = (863 - ATMEL_Y_OFFSET),
+ .valid_interrupt = atmel_ts_valid_interrupt,
+ .read_chg = atmel_ts_read_chg,
+};
+
+static struct i2c_board_info atmel_ts_i2c_info[] __initdata = {
+ {
+ I2C_BOARD_INFO(ATMEL_TS_I2C_NAME, 0x4a),
+ .platform_data = &atmel_ts_pdata,
+ .irq = MSM_GPIO_TO_INT(ATMEL_TS_GPIO_IRQ),
+ },
+};
+
+static struct msm_handset_platform_data hs_platform_data = {
+ .hs_name = "7k_handset",
+ .pwr_key_delay_ms = 500, /* 0 will disable end key */
+};
+
+static struct platform_device hs_pdev = {
+ .name = "msm-handset",
+ .id = -1,
+ .dev = {
+ .platform_data = &hs_platform_data,
+ },
+};
+
+#define FT5X06_IRQ_GPIO 48
+#define FT5X06_RESET_GPIO 26
+
+static ssize_t
+ft5x06_virtual_keys_register(struct kobject *kobj,
+ struct kobj_attribute *attr,
+ char *buf)
+{
+ return snprintf(buf, 200,
+ __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":40:510:80:60"
+ ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":120:510:80:60"
+ ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":200:510:80:60"
+ ":" __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":280:510:80:60"
+ "\n");
+}
+
+static struct kobj_attribute ft5x06_virtual_keys_attr = {
+ .attr = {
+ .name = "virtualkeys.ft5x06_ts",
+ .mode = S_IRUGO,
+ },
+ .show = &ft5x06_virtual_keys_register,
+};
+
+static struct attribute *ft5x06_virtual_key_properties_attrs[] = {
+ &ft5x06_virtual_keys_attr.attr,
+ NULL,
+};
+
+static struct attribute_group ft5x06_virtual_key_properties_attr_group = {
+ .attrs = ft5x06_virtual_key_properties_attrs,
+};
+
+struct kobject *ft5x06_virtual_key_properties_kobj;
+
+static struct ft5x06_ts_platform_data ft5x06_platformdata = {
+ .x_max = 320,
+ .y_max = 480,
+ .reset_gpio = FT5X06_RESET_GPIO,
+ .irq_gpio = FT5X06_IRQ_GPIO,
+ .irqflags = IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
+};
+
+static struct i2c_board_info ft5x06_device_info[] __initdata = {
+ {
+ I2C_BOARD_INFO("ft5x06_ts", 0x38),
+ .platform_data = &ft5x06_platformdata,
+ .irq = MSM_GPIO_TO_INT(FT5X06_IRQ_GPIO),
+ },
+};
+
+static void ft5x06_touchpad_setup(void)
+{
+ int rc;
+
+ rc = gpio_tlmm_config(GPIO_CFG(FT5X06_IRQ_GPIO, 0,
+ GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
+ GPIO_CFG_8MA), GPIO_CFG_ENABLE);
+ if (rc)
+ pr_err("%s: gpio_tlmm_config for %d failed\n",
+ __func__, FT5X06_IRQ_GPIO);
+
+ rc = gpio_tlmm_config(GPIO_CFG(FT5X06_RESET_GPIO, 0,
+ GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
+ GPIO_CFG_8MA), GPIO_CFG_ENABLE);
+ if (rc)
+ pr_err("%s: gpio_tlmm_config for %d failed\n",
+ __func__, FT5X06_RESET_GPIO);
+
+ ft5x06_virtual_key_properties_kobj =
+ kobject_create_and_add("board_properties", NULL);
+
+ if (ft5x06_virtual_key_properties_kobj)
+ rc = sysfs_create_group(ft5x06_virtual_key_properties_kobj,
+ &ft5x06_virtual_key_properties_attr_group);
+
+ if (!ft5x06_virtual_key_properties_kobj || rc)
+ pr_err("%s: failed to create board_properties\n", __func__);
+
+ i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
+ ft5x06_device_info,
+ ARRAY_SIZE(ft5x06_device_info));
+}
+
+void __init msm7627a_add_io_devices(void)
+{
+ /* touchscreen */
+ if (machine_is_msm7625a_surf() || machine_is_msm7625a_ffa()) {
+ atmel_ts_pdata.min_x = 0;
+ atmel_ts_pdata.max_x = 480;
+ atmel_ts_pdata.min_y = 0;
+ atmel_ts_pdata.max_y = 320;
+ }
+
+ i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
+ atmel_ts_i2c_info,
+ ARRAY_SIZE(atmel_ts_i2c_info));
+ /* keypad */
+ platform_device_register(&kp_pdev);
+
+ /* headset */
+ platform_device_register(&hs_pdev);
+
+ /* LED: configure it as a pdm function */
+ if (gpio_tlmm_config(GPIO_CFG(LED_GPIO_PDM, 3,
+ GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
+ GPIO_CFG_8MA), GPIO_CFG_ENABLE))
+ pr_err("%s: gpio_tlmm_config for %d failed\n",
+ __func__, LED_GPIO_PDM);
+ else
+ platform_device_register(&led_pdev);
+
+ /* Vibrator */
+ if (machine_is_msm7x27a_ffa() || machine_is_msm7625a_ffa())
+ msm_init_pmic_vibrator();
+}
+
+void __init qrd7627a_add_io_devices(void)
+{
+ int rc;
+
+ /* touchscreen */
+ if (machine_is_msm7627a_qrd1()) {
+ i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
+ synaptic_i2c_clearpad3k,
+ ARRAY_SIZE(synaptic_i2c_clearpad3k));
+ } else if (machine_is_msm7627a_evb() || machine_is_msm8625_evb()) {
+ rc = gpio_tlmm_config(GPIO_CFG(MXT_TS_IRQ_GPIO, 0,
+ GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
+ GPIO_CFG_8MA), GPIO_CFG_ENABLE);
+ if (rc) {
+ pr_err("%s: gpio_tlmm_config for %d failed\n",
+ __func__, MXT_TS_IRQ_GPIO);
+ }
+
+ rc = gpio_tlmm_config(GPIO_CFG(MXT_TS_RESET_GPIO, 0,
+ GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
+ GPIO_CFG_8MA), GPIO_CFG_ENABLE);
+ if (rc) {
+ pr_err("%s: gpio_tlmm_config for %d failed\n",
+ __func__, MXT_TS_RESET_GPIO);
+ }
+
+ i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
+ mxt_device_info,
+ ARRAY_SIZE(mxt_device_info));
+ } else if (machine_is_msm7627a_qrd3() || machine_is_msm8625_qrd7()) {
+ ft5x06_touchpad_setup();
+ }
+
+ /* headset */
+ platform_device_register(&hs_pdev);
+
+ /* vibrator */
+#ifdef CONFIG_MSM_RPC_VIBRATOR
+ msm_init_pmic_vibrator();
+#endif
+
+ /* keypad */
+ if (machine_is_msm7627a_evb() || machine_is_msm8625_evb())
+ platform_device_register(&kp_pdev_8625);
+
+ /* leds */
+ if (machine_is_msm7627a_evb() || machine_is_msm8625_evb()) {
+ rc = gpio_tlmm_config(GPIO_CFG(LED_RED_GPIO_8625, 0,
+ GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP,
+ GPIO_CFG_16MA), GPIO_CFG_ENABLE);
+ if (rc) {
+ pr_err("%s: gpio_tlmm_config for %d failed\n",
+ __func__, LED_RED_GPIO_8625);
+ }
+
+ rc = gpio_tlmm_config(GPIO_CFG(LED_GREEN_GPIO_8625, 0,
+ GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP,
+ GPIO_CFG_16MA), GPIO_CFG_ENABLE);
+ if (rc) {
+ pr_err("%s: gpio_tlmm_config for %d failed\n",
+ __func__, LED_GREEN_GPIO_8625);
+ }
+
+ platform_device_register(&gpio_leds_8625);
+ }
+}
diff --git a/arch/arm/mach-msm/board-msm7627a-storage.c b/arch/arm/mach-msm/board-msm7627a-storage.c
index e4ee52e..564c59d 100644
--- a/arch/arm/mach-msm/board-msm7627a-storage.c
+++ b/arch/arm/mach-msm/board-msm7627a-storage.c
@@ -151,7 +151,9 @@
static void gpio_sdc1_config(void)
{
if (machine_is_msm7627a_qrd1() || machine_is_msm7627a_evb()
- || machine_is_msm8625_evb())
+ || machine_is_msm8625_evb()
+ || machine_is_msm7627a_qrd3()
+ || machine_is_msm8625_qrd7())
gpio_sdc1_hw_det = 42;
}
@@ -253,7 +255,9 @@
if (!status) {
if (machine_is_msm7627a_qrd1() ||
machine_is_msm7627a_evb() ||
- machine_is_msm8625_evb())
+ machine_is_msm8625_evb() ||
+ machine_is_msm7627a_qrd3() ||
+ machine_is_msm8625_qrd7())
status = !gpio_get_value(gpio_sdc1_hw_det);
else
status = gpio_get_value(gpio_sdc1_hw_det);
@@ -367,11 +371,15 @@
{
/* eMMC slot */
#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
- if (mmc_regulator_init(3, "emmc", 3000000))
- return;
- sdc3_plat_data.swfi_latency = msm7627a_power_collapse_latency(
+
+ /* There is no eMMC on SDC3 for QRD3 based devices */
+ if (!(machine_is_msm7627a_qrd3() || machine_is_msm8625_qrd7())) {
+ if (mmc_regulator_init(3, "emmc", 3000000))
+ return;
+ sdc3_plat_data.swfi_latency = msm7627a_power_collapse_latency(
MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT);
- msm_add_sdcc(3, &sdc3_plat_data);
+ msm_add_sdcc(3, &sdc3_plat_data);
+ }
#endif
/* Micro-SD slot */
#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
@@ -392,9 +400,12 @@
/* Not Used */
#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
&& !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
- if (mmc_regulator_init(4, "smps3", 1800000))
- return;
- msm_add_sdcc(4, &sdc4_plat_data);
+ /* There is no SDC4 for QRD3/7 based devices */
+ if (!(machine_is_msm7627a_qrd3() || machine_is_msm8625_qrd7())) {
+ if (mmc_regulator_init(4, "smps3", 1800000))
+ return;
+ msm_add_sdcc(4, &sdc4_plat_data);
+ }
#endif
}
#endif
diff --git a/arch/arm/mach-msm/board-msm7627a.h b/arch/arm/mach-msm/board-msm7627a.h
index bde9b61..e3c9469 100644
--- a/arch/arm/mach-msm/board-msm7627a.h
+++ b/arch/arm/mach-msm/board-msm7627a.h
@@ -14,11 +14,25 @@
#define __ARCH_ARM_MACH_MSM_BOARD_7627A__
#include "pm.h"
+#include <linux/fmem.h>
+
void __init msm7627a_init_mmc(void);
void __init msm_msm7627a_allocate_memory_regions(void);
void __init msm_fb_add_devices(void);
+#define PMEM_KERNEL_EBI1_SIZE 0x3A000
+#define MSM_PMEM_AUDIO_SIZE 0x1F4000
+
+#define MSM_PMEM_MDP_SIZE 0x2300000
+#define MSM_PMEM_ADSP_SIZE 0x1100000
+
+#define MSM7x25A_MSM_PMEM_MDP_SIZE 0x1500000
+#define MSM7x25A_MSM_PMEM_ADSP_SIZE 0xB91000
+
+#define QRD_PMEM_MDP_SIZE 0x1DD1000
+#define QRD_PMEM_ADSP_SIZE 0x1100000
+
enum {
GPIO_EXPANDER_IRQ_BASE = NR_MSM_IRQS + NR_GPIO_IRQS,
GPIO_EXPANDER_GPIO_BASE = NR_MSM_GPIOS,
@@ -102,6 +116,14 @@
void __init msm7627a_bt_power_init(void);
#endif
+extern struct fmem_platform_data fmem_pdata;
+
void __init msm7627a_camera_init(void);
u32 msm7627a_power_collapse_latency(enum msm_pm_sleep_mode);
+
+void __init msm7627a_add_io_devices(void);
+void __init qrd7627a_add_io_devices(void);
+void __init msm_adsp_add_pdev(void);
+void __init msm7627a_reserve(void);
+void __init qrd7627a_reserve(void);
#endif
diff --git a/arch/arm/mach-msm/board-msm7x27a.c b/arch/arm/mach-msm/board-msm7x27a.c
index 7563300..44138a5e 100644
--- a/arch/arm/mach-msm/board-msm7x27a.c
+++ b/arch/arm/mach-msm/board-msm7x27a.c
@@ -59,9 +59,6 @@
#include "pm-boot.h"
#include "board-msm7627a.h"
-#define PMEM_KERNEL_EBI1_SIZE 0x3A000
-#define MSM_PMEM_AUDIO_SIZE 0x5B000
-
#if defined(CONFIG_GPIO_SX150X)
enum {
SX150X_CORE,
@@ -155,15 +152,6 @@
.msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
};
-#ifdef CONFIG_ARCH_MSM7X27A
-#define MSM_PMEM_MDP_SIZE 0x2300000
-#define MSM7x25A_MSM_PMEM_MDP_SIZE 0x1500000
-
-#define MSM_PMEM_ADSP_SIZE 0x1100000
-#define MSM7x25A_MSM_PMEM_ADSP_SIZE 0xB91000
-
-#endif
-
static struct android_usb_platform_data android_usb_pdata = {
.update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
};
@@ -450,207 +438,6 @@
.v_addr = MSM_CFG_CTL_BASE,
};
-static struct android_pmem_platform_data android_pmem_adsp_pdata = {
- .name = "pmem_adsp",
- .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
- .cached = 1,
- .memory_type = MEMTYPE_EBI1,
- .request_region = request_fmem_c_region,
- .release_region = release_fmem_c_region,
- .reusable = 1,
-};
-
-static struct platform_device android_pmem_adsp_device = {
- .name = "android_pmem",
- .id = 1,
- .dev = { .platform_data = &android_pmem_adsp_pdata },
-};
-
-static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE;
-static int __init pmem_mdp_size_setup(char *p)
-{
- pmem_mdp_size = memparse(p, NULL);
- return 0;
-}
-
-early_param("pmem_mdp_size", pmem_mdp_size_setup);
-
-static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
-static int __init pmem_adsp_size_setup(char *p)
-{
- pmem_adsp_size = memparse(p, NULL);
- return 0;
-}
-
-early_param("pmem_adsp_size", pmem_adsp_size_setup);
-
-#define SND(desc, num) { .name = #desc, .id = num }
-static struct snd_endpoint snd_endpoints_list[] = {
- SND(HANDSET, 0),
- SND(MONO_HEADSET, 2),
- SND(HEADSET, 3),
- SND(SPEAKER, 6),
- SND(TTY_HEADSET, 8),
- SND(TTY_VCO, 9),
- SND(TTY_HCO, 10),
- SND(BT, 12),
- SND(IN_S_SADC_OUT_HANDSET, 16),
- SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
- SND(FM_DIGITAL_STEREO_HEADSET, 26),
- SND(FM_DIGITAL_SPEAKER_PHONE, 27),
- SND(FM_DIGITAL_BT_A2DP_HEADSET, 28),
- SND(STEREO_HEADSET_AND_SPEAKER, 31),
- SND(CURRENT, 0x7FFFFFFE),
- SND(FM_ANALOG_STEREO_HEADSET, 35),
- SND(FM_ANALOG_STEREO_HEADSET_CODEC, 36),
-};
-#undef SND
-
-static struct msm_snd_endpoints msm_device_snd_endpoints = {
- .endpoints = snd_endpoints_list,
- .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
-};
-
-static struct platform_device msm_device_snd = {
- .name = "msm_snd",
- .id = -1,
- .dev = {
- .platform_data = &msm_device_snd_endpoints
- },
-};
-
-#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
- (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
- (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
- (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
- (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
- (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
-#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
- (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
- (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
- (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
- (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
- (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
-#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
- (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
- (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
- (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
- (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
- (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
-#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
- (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
- (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
- (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
- (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
- (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
-#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
-
-static unsigned int dec_concurrency_table[] = {
- /* Audio LP */
- (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
- 0, 0, 0,
-
- /* Concurrency 1 */
- (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC4_FORMAT),
-
- /* Concurrency 2 */
- (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC4_FORMAT),
-
- /* Concurrency 3 */
- (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC4_FORMAT),
-
- /* Concurrency 4 */
- (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC4_FORMAT),
-
- /* Concurrency 5 */
- (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC4_FORMAT),
-
- /* Concurrency 6 */
- (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- 0, 0, 0,
-
- /* Concurrency 7 */
- (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC4_FORMAT),
-};
-
-#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
- .module_queueid = queueid, .module_decid = decid, \
- .nr_codec_support = nr_codec}
-
-static struct msm_adspdec_info dec_info_list[] = {
- DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
- DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
- DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
- DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
- DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
-};
-
-static struct msm_adspdec_database msm_device_adspdec_database = {
- .num_dec = ARRAY_SIZE(dec_info_list),
- .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
- ARRAY_SIZE(dec_info_list)),
- .dec_concurrency_table = dec_concurrency_table,
- .dec_info_list = dec_info_list,
-};
-
-static struct platform_device msm_device_adspdec = {
- .name = "msm_adspdec",
- .id = -1,
- .dev = {
- .platform_data = &msm_device_adspdec_database
- },
-};
-
-static struct android_pmem_platform_data android_pmem_audio_pdata = {
- .name = "pmem_audio",
- .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
- .cached = 0,
- .memory_type = MEMTYPE_EBI1,
-};
-
-static struct platform_device android_pmem_audio_device = {
- .name = "android_pmem",
- .id = 2,
- .dev = { .platform_data = &android_pmem_audio_pdata },
-};
-
-static struct android_pmem_platform_data android_pmem_pdata = {
- .name = "pmem",
- .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
- .cached = 1,
- .memory_type = MEMTYPE_EBI1,
-};
-static struct platform_device android_pmem_device = {
- .name = "android_pmem",
- .id = 0,
- .dev = { .platform_data = &android_pmem_pdata },
-};
-
static u32 msm_calculate_batt_capacity(u32 current_voltage);
static struct msm_psy_batt_pdata msm_psy_batt_data = {
@@ -803,13 +590,8 @@
static struct platform_device *common_devices[] __initdata = {
&android_usb_device,
- &android_pmem_device,
- &android_pmem_adsp_device,
- &android_pmem_audio_device,
&fmem_device,
&msm_device_nand,
- &msm_device_snd,
- &msm_device_adspdec,
&asoc_msm_pcm,
&asoc_msm_dai0,
&asoc_msm_dai1,
@@ -829,126 +611,9 @@
&msm8625_kgsl_3d0,
};
-static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
-static int __init pmem_kernel_ebi1_size_setup(char *p)
-{
- pmem_kernel_ebi1_size = memparse(p, NULL);
- return 0;
-}
-early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
-
-static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
-static int __init pmem_audio_size_setup(char *p)
-{
- pmem_audio_size = memparse(p, NULL);
- return 0;
-}
-early_param("pmem_audio_size", pmem_audio_size_setup);
-
-static struct memtype_reserve msm7x27a_reserve_table[] __initdata = {
- [MEMTYPE_SMI] = {
- },
- [MEMTYPE_EBI0] = {
- .flags = MEMTYPE_FLAGS_1M_ALIGN,
- },
- [MEMTYPE_EBI1] = {
- .flags = MEMTYPE_FLAGS_1M_ALIGN,
- },
-};
-
-#ifdef CONFIG_ANDROID_PMEM
-static struct android_pmem_platform_data *pmem_pdata_array[] __initdata = {
- &android_pmem_adsp_pdata,
- &android_pmem_audio_pdata,
- &android_pmem_pdata,
-};
-#endif
-
-static void __init size_pmem_devices(void)
-{
-#ifdef CONFIG_ANDROID_PMEM
- unsigned int i;
- unsigned int reusable_count = 0;
-
- if (machine_is_msm7625a_surf() || machine_is_msm7625a_ffa()) {
- pmem_mdp_size = MSM7x25A_MSM_PMEM_MDP_SIZE;
- pmem_adsp_size = MSM7x25A_MSM_PMEM_ADSP_SIZE;
- } else {
- pmem_mdp_size = MSM_PMEM_MDP_SIZE;
- pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
- }
-
- android_pmem_adsp_pdata.size = pmem_adsp_size;
- android_pmem_pdata.size = pmem_mdp_size;
- android_pmem_audio_pdata.size = pmem_audio_size;
-
- fmem_pdata.size = 0;
-
- /* Find pmem devices that should use FMEM (reusable) memory.
- */
- for (i = 0; i < ARRAY_SIZE(pmem_pdata_array); ++i) {
- struct android_pmem_platform_data *pdata = pmem_pdata_array[i];
-
- if (!reusable_count && pdata->reusable)
- fmem_pdata.size += pdata->size;
-
- reusable_count += (pdata->reusable) ? 1 : 0;
-
- if (pdata->reusable && reusable_count > 1) {
- pr_err("%s: Too many PMEM devices specified as reusable. PMEM device %s was not configured as reusable.\n",
- __func__, pdata->name);
- pdata->reusable = 0;
- }
- }
-#endif
-
-}
-
-static void __init reserve_memory_for(struct android_pmem_platform_data *p)
-{
- msm7x27a_reserve_table[p->memory_type].size += p->size;
-}
-
-static void __init reserve_pmem_memory(void)
-{
-#ifdef CONFIG_ANDROID_PMEM
- unsigned int i;
- for (i = 0; i < ARRAY_SIZE(pmem_pdata_array); ++i) {
- if (!pmem_pdata_array[i]->reusable)
- reserve_memory_for(pmem_pdata_array[i]);
- }
-
- msm7x27a_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
-#endif
-}
-
-static void __init msm7x27a_calculate_reserve_sizes(void)
-{
- size_pmem_devices();
- reserve_pmem_memory();
-}
-
-static int msm7x27a_paddr_to_memtype(unsigned int paddr)
-{
- return MEMTYPE_EBI1;
-}
-
-static struct reserve_info msm7x27a_reserve_info __initdata = {
- .memtype_reserve_table = msm7x27a_reserve_table,
- .calculate_reserve_sizes = msm7x27a_calculate_reserve_sizes,
- .paddr_to_memtype = msm7x27a_paddr_to_memtype,
-};
-
-static void __init msm7x27a_reserve(void)
-{
- reserve_info = &msm7x27a_reserve_info;
- msm_reserve();
- fmem_pdata.phys = reserve_memory_for_fmem(fmem_pdata.size);
-}
-
static void __init msm8625_reserve(void)
{
- msm7x27a_reserve();
+ msm7627a_reserve();
memblock_remove(MSM8625_SECONDARY_PHYS, SZ_8);
memblock_remove(MSM8625_WARM_BOOT_PHYS, SZ_32);
}
@@ -1001,215 +666,6 @@
iounmap(ebi2_cfg_ptr);
}
-#define ATMEL_TS_I2C_NAME "maXTouch"
-
-static struct regulator_bulk_data regs_atmel[] = {
- { .supply = "ldo2", .min_uV = 2850000, .max_uV = 2850000 },
- { .supply = "smps3", .min_uV = 1800000, .max_uV = 1800000 },
-};
-
-#define ATMEL_TS_GPIO_IRQ 82
-
-static int atmel_ts_power_on(bool on)
-{
- int rc = on ?
- regulator_bulk_enable(ARRAY_SIZE(regs_atmel), regs_atmel) :
- regulator_bulk_disable(ARRAY_SIZE(regs_atmel), regs_atmel);
-
- if (rc)
- pr_err("%s: could not %sable regulators: %d\n",
- __func__, on ? "en" : "dis", rc);
- else
- msleep(50);
-
- return rc;
-}
-
-static int atmel_ts_platform_init(struct i2c_client *client)
-{
- int rc;
- struct device *dev = &client->dev;
-
- rc = regulator_bulk_get(dev, ARRAY_SIZE(regs_atmel), regs_atmel);
- if (rc) {
- dev_err(dev, "%s: could not get regulators: %d\n",
- __func__, rc);
- goto out;
- }
-
- rc = regulator_bulk_set_voltage(ARRAY_SIZE(regs_atmel), regs_atmel);
- if (rc) {
- dev_err(dev, "%s: could not set voltages: %d\n",
- __func__, rc);
- goto reg_free;
- }
-
- rc = gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
- GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
- GPIO_CFG_8MA), GPIO_CFG_ENABLE);
- if (rc) {
- dev_err(dev, "%s: gpio_tlmm_config for %d failed\n",
- __func__, ATMEL_TS_GPIO_IRQ);
- goto reg_free;
- }
-
- /* configure touchscreen interrupt gpio */
- rc = gpio_request(ATMEL_TS_GPIO_IRQ, "atmel_maxtouch_gpio");
- if (rc) {
- dev_err(dev, "%s: unable to request gpio %d\n",
- __func__, ATMEL_TS_GPIO_IRQ);
- goto ts_gpio_tlmm_unconfig;
- }
-
- rc = gpio_direction_input(ATMEL_TS_GPIO_IRQ);
- if (rc < 0) {
- dev_err(dev, "%s: unable to set the direction of gpio %d\n",
- __func__, ATMEL_TS_GPIO_IRQ);
- goto free_ts_gpio;
- }
- return 0;
-
-free_ts_gpio:
- gpio_free(ATMEL_TS_GPIO_IRQ);
-ts_gpio_tlmm_unconfig:
- gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
- GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
- GPIO_CFG_2MA), GPIO_CFG_DISABLE);
-reg_free:
- regulator_bulk_free(ARRAY_SIZE(regs_atmel), regs_atmel);
-out:
- return rc;
-}
-
-static int atmel_ts_platform_exit(struct i2c_client *client)
-{
- gpio_free(ATMEL_TS_GPIO_IRQ);
- gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
- GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
- GPIO_CFG_2MA), GPIO_CFG_DISABLE);
- regulator_bulk_free(ARRAY_SIZE(regs_atmel), regs_atmel);
- return 0;
-}
-
-static u8 atmel_ts_read_chg(void)
-{
- return gpio_get_value(ATMEL_TS_GPIO_IRQ);
-}
-
-static u8 atmel_ts_valid_interrupt(void)
-{
- return !atmel_ts_read_chg();
-}
-
-#define ATMEL_X_OFFSET 13
-#define ATMEL_Y_OFFSET 0
-
-static struct maxtouch_platform_data atmel_ts_pdata = {
- .numtouch = 4,
- .init_platform_hw = atmel_ts_platform_init,
- .exit_platform_hw = atmel_ts_platform_exit,
- .power_on = atmel_ts_power_on,
- .display_res_x = 480,
- .display_res_y = 864,
- .min_x = ATMEL_X_OFFSET,
- .max_x = (505 - ATMEL_X_OFFSET),
- .min_y = ATMEL_Y_OFFSET,
- .max_y = (863 - ATMEL_Y_OFFSET),
- .valid_interrupt = atmel_ts_valid_interrupt,
- .read_chg = atmel_ts_read_chg,
-};
-
-static struct i2c_board_info atmel_ts_i2c_info[] __initdata = {
- {
- I2C_BOARD_INFO(ATMEL_TS_I2C_NAME, 0x4a),
- .platform_data = &atmel_ts_pdata,
- .irq = MSM_GPIO_TO_INT(ATMEL_TS_GPIO_IRQ),
- },
-};
-
-#define KP_INDEX(row, col) ((row)*ARRAY_SIZE(kp_col_gpios) + (col))
-
-static unsigned int kp_row_gpios[] = {31, 32, 33, 34, 35};
-static unsigned int kp_col_gpios[] = {36, 37, 38, 39, 40};
-
-static const unsigned short keymap[ARRAY_SIZE(kp_col_gpios) *
- ARRAY_SIZE(kp_row_gpios)] = {
- [KP_INDEX(0, 0)] = KEY_7,
- [KP_INDEX(0, 1)] = KEY_DOWN,
- [KP_INDEX(0, 2)] = KEY_UP,
- [KP_INDEX(0, 3)] = KEY_RIGHT,
- [KP_INDEX(0, 4)] = KEY_ENTER,
-
- [KP_INDEX(1, 0)] = KEY_LEFT,
- [KP_INDEX(1, 1)] = KEY_SEND,
- [KP_INDEX(1, 2)] = KEY_1,
- [KP_INDEX(1, 3)] = KEY_4,
- [KP_INDEX(1, 4)] = KEY_CLEAR,
-
- [KP_INDEX(2, 0)] = KEY_6,
- [KP_INDEX(2, 1)] = KEY_5,
- [KP_INDEX(2, 2)] = KEY_8,
- [KP_INDEX(2, 3)] = KEY_3,
- [KP_INDEX(2, 4)] = KEY_NUMERIC_STAR,
-
- [KP_INDEX(3, 0)] = KEY_9,
- [KP_INDEX(3, 1)] = KEY_NUMERIC_POUND,
- [KP_INDEX(3, 2)] = KEY_0,
- [KP_INDEX(3, 3)] = KEY_2,
- [KP_INDEX(3, 4)] = KEY_SLEEP,
-
- [KP_INDEX(4, 0)] = KEY_BACK,
- [KP_INDEX(4, 1)] = KEY_HOME,
- [KP_INDEX(4, 2)] = KEY_MENU,
- [KP_INDEX(4, 3)] = KEY_VOLUMEUP,
- [KP_INDEX(4, 4)] = KEY_VOLUMEDOWN,
-};
-
-/* SURF keypad platform device information */
-static struct gpio_event_matrix_info kp_matrix_info = {
- .info.func = gpio_event_matrix_func,
- .keymap = keymap,
- .output_gpios = kp_row_gpios,
- .input_gpios = kp_col_gpios,
- .noutputs = ARRAY_SIZE(kp_row_gpios),
- .ninputs = ARRAY_SIZE(kp_col_gpios),
- .settle_time.tv_nsec = 40 * NSEC_PER_USEC,
- .poll_time.tv_nsec = 20 * NSEC_PER_MSEC,
- .flags = GPIOKPF_LEVEL_TRIGGERED_IRQ | GPIOKPF_DRIVE_INACTIVE |
- GPIOKPF_PRINT_UNMAPPED_KEYS,
-};
-
-static struct gpio_event_info *kp_info[] = {
- &kp_matrix_info.info
-};
-
-static struct gpio_event_platform_data kp_pdata = {
- .name = "7x27a_kp",
- .info = kp_info,
- .info_count = ARRAY_SIZE(kp_info)
-};
-
-static struct platform_device kp_pdev = {
- .name = GPIO_EVENT_DEV_NAME,
- .id = -1,
- .dev = {
- .platform_data = &kp_pdata,
- },
-};
-
-static struct msm_handset_platform_data hs_platform_data = {
- .hs_name = "7k_handset",
- .pwr_key_delay_ms = 500, /* 0 will disable end key */
-};
-
-static struct platform_device hs_pdev = {
- .name = "msm-handset",
- .id = -1,
- .dev = {
- .platform_data = &hs_platform_data,
- },
-};
-
static struct platform_device msm_proccomm_regulator_dev = {
.name = PROCCOMM_REGULATOR_DEV_NAME,
.id = -1,
@@ -1218,29 +674,6 @@
}
};
-static void msm_adsp_add_pdev(void)
-{
- int rc = 0;
- struct rpc_board_dev *rpc_adsp_pdev;
-
- rpc_adsp_pdev = kzalloc(sizeof(struct rpc_board_dev), GFP_KERNEL);
- if (rpc_adsp_pdev == NULL) {
- pr_err("%s: Memory Allocation failure\n", __func__);
- return;
- }
- rpc_adsp_pdev->prog = ADSP_RPC_PROG;
-
- if (cpu_is_msm8625())
- rpc_adsp_pdev->pdev = msm8625_device_adsp;
- else
- rpc_adsp_pdev->pdev = msm_adsp_device;
- rc = msm_rpc_add_board_dev(rpc_adsp_pdev, 1);
- if (rc < 0) {
- pr_err("%s: return val: %d\n", __func__, rc);
- kfree(rpc_adsp_pdev);
- }
-}
-
static void __init msm7627a_rumi3_init(void)
{
msm7x27a_init_ebi2();
@@ -1262,7 +695,6 @@
msm8x25_spm_device_init();
}
-#define LED_GPIO_PDM 96
#define UART1DM_RX_GPIO 45
#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
@@ -1330,39 +762,6 @@
}
}
-static void __init msm7x27a_add_io_devices(void)
-{
- /* touchscreen */
- if (machine_is_msm7625a_surf() || machine_is_msm7625a_ffa()) {
- atmel_ts_pdata.min_x = 0;
- atmel_ts_pdata.max_x = 480;
- atmel_ts_pdata.min_y = 0;
- atmel_ts_pdata.max_y = 320;
- }
-
- i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
- atmel_ts_i2c_info,
- ARRAY_SIZE(atmel_ts_i2c_info));
- /* keypad */
- platform_device_register(&kp_pdev);
-
- /* headset */
- platform_device_register(&hs_pdev);
-
- /* LED: configure it as a pdm function */
- if (gpio_tlmm_config(GPIO_CFG(LED_GPIO_PDM, 3,
- GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
- GPIO_CFG_8MA), GPIO_CFG_ENABLE))
- pr_err("%s: gpio_tlmm_config for %d failed\n",
- __func__, LED_GPIO_PDM);
- else
- platform_device_register(&led_pdev);
-
- /* Vibrator */
- if (machine_is_msm7x27a_ffa() || machine_is_msm7625a_ffa())
- msm_init_pmic_vibrator();
-}
-
static void __init msm7x27a_pm_init(void)
{
if (machine_is_msm8625_surf()) {
@@ -1407,7 +806,7 @@
register_i2c_devices();
msm7627a_bt_power_init();
msm7627a_camera_init();
- msm7x27a_add_io_devices();
+ msm7627a_add_io_devices();
/*7x25a kgsl initializations*/
msm7x25a_kgsl_3d0_init();
}
@@ -1420,7 +819,7 @@
MACHINE_START(MSM7X27A_RUMI3, "QCT MSM7x27a RUMI3")
.boot_params = PHYS_OFFSET + 0x100,
.map_io = msm_common_io_init,
- .reserve = msm7x27a_reserve,
+ .reserve = msm7627a_reserve,
.init_irq = msm_init_irq,
.init_machine = msm7627a_rumi3_init,
.timer = &msm_timer,
@@ -1430,7 +829,7 @@
MACHINE_START(MSM7X27A_SURF, "QCT MSM7x27a SURF")
.boot_params = PHYS_OFFSET + 0x100,
.map_io = msm_common_io_init,
- .reserve = msm7x27a_reserve,
+ .reserve = msm7627a_reserve,
.init_irq = msm_init_irq,
.init_machine = msm7x2x_init,
.timer = &msm_timer,
@@ -1440,7 +839,7 @@
MACHINE_START(MSM7X27A_FFA, "QCT MSM7x27a FFA")
.boot_params = PHYS_OFFSET + 0x100,
.map_io = msm_common_io_init,
- .reserve = msm7x27a_reserve,
+ .reserve = msm7627a_reserve,
.init_irq = msm_init_irq,
.init_machine = msm7x2x_init,
.timer = &msm_timer,
@@ -1450,7 +849,7 @@
MACHINE_START(MSM7625A_SURF, "QCT MSM7625a SURF")
.boot_params = PHYS_OFFSET + 0x100,
.map_io = msm_common_io_init,
- .reserve = msm7x27a_reserve,
+ .reserve = msm7627a_reserve,
.init_irq = msm_init_irq,
.init_machine = msm7x2x_init,
.timer = &msm_timer,
@@ -1460,7 +859,7 @@
MACHINE_START(MSM7625A_FFA, "QCT MSM7625a FFA")
.boot_params = PHYS_OFFSET + 0x100,
.map_io = msm_common_io_init,
- .reserve = msm7x27a_reserve,
+ .reserve = msm7627a_reserve,
.init_irq = msm_init_irq,
.init_machine = msm7x2x_init,
.timer = &msm_timer,
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 1bfb72c..947c639 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -433,7 +433,7 @@
.name = "8901_s0",
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
.min_uV = 800000,
- .max_uV = 1250000,
+ .max_uV = 1325000,
},
.consumer_supplies = vreg_consumers_8901_S0,
.num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S0),
@@ -444,7 +444,7 @@
.name = "8901_s1",
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
.min_uV = 800000,
- .max_uV = 1250000,
+ .max_uV = 1325000,
},
.consumer_supplies = vreg_consumers_8901_S1,
.num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S1),
@@ -924,7 +924,7 @@
[MSM_RPMRS_VDD_MEM_RET_LOW] = 500,
[MSM_RPMRS_VDD_MEM_RET_HIGH] = 750,
[MSM_RPMRS_VDD_MEM_ACTIVE] = 1000,
- [MSM_RPMRS_VDD_MEM_MAX] = 1250,
+ [MSM_RPMRS_VDD_MEM_MAX] = 1325,
},
.vdd_dig_levels = {
[MSM_RPMRS_VDD_DIG_RET_LOW] = 500,
@@ -2686,9 +2686,9 @@
#define MSM_FB_OVERLAY1_WRITEBACK_SIZE (0)
#endif /* CONFIG_FB_MSM_OVERLAY1_WRITEBACK */
-#define MSM_PMEM_KERNEL_EBI1_SIZE 0x600000
+#define MSM_PMEM_KERNEL_EBI1_SIZE 0x3BC000
#define MSM_PMEM_ADSP_SIZE 0x2000000
-#define MSM_PMEM_AUDIO_SIZE 0x28B000
+#define MSM_PMEM_AUDIO_SIZE 0x4CF000
#define MSM_SMI_BASE 0x38000000
#define MSM_SMI_SIZE 0x4000000
@@ -2712,9 +2712,9 @@
#endif
#define MSM_ION_QSECOM_SIZE 0x600000 /* (6MB) */
-#define MSM_ION_AUDIO_SIZE MSM_PMEM_AUDIO_SIZE
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+#define MSM_ION_AUDIO_SIZE MSM_PMEM_AUDIO_SIZE
#define MSM_ION_HEAP_NUM 9
#define MSM_HDMI_PRIM_ION_SF_SIZE MSM_HDMI_PRIM_PMEM_SF_SIZE
static unsigned msm_ion_sf_size = MSM_ION_SF_SIZE;
@@ -4103,7 +4103,7 @@
/* RPM early regulator constraints */
static struct rpm_regulator_init_data rpm_regulator_early_init_data[] = {
/* ID a_on pd ss min_uV max_uV init_ip freq */
- RPM_SMPS(PM8058_S0, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
+ RPM_SMPS(PM8058_S0, 0, 1, 1, 500000, 1325000, SMPS_HMIN, 1p60),
RPM_SMPS(PM8058_S1, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
};
@@ -5477,6 +5477,7 @@
msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_CAMERA_SIZE;
msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_WB_SIZE;
msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_AUDIO_SIZE;
+ msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_QSECOM_SIZE;
#endif
}
diff --git a/arch/arm/mach-msm/board-qrd7627a.c b/arch/arm/mach-msm/board-qrd7627a.c
index 8bffe16..44ba518 100644
--- a/arch/arm/mach-msm/board-qrd7627a.c
+++ b/arch/arm/mach-msm/board-qrd7627a.c
@@ -24,9 +24,6 @@
#include <linux/bootmem.h>
#include <linux/mfd/marimba.h>
#include <linux/power_supply.h>
-#include <linux/input/rmi_platformdata.h>
-#include <linux/input/rmi_i2c.h>
-#include <linux/i2c/atmel_mxt_ts.h>
#include <linux/regulator/consumer.h>
#include <linux/memblock.h>
#include <linux/input/ft5x06_ts.h>
@@ -58,20 +55,6 @@
#include "board-msm7x27a-regulator.h"
#include "board-msm7627a.h"
-#define PMEM_KERNEL_EBI1_SIZE 0x3A000
-#define MSM_PMEM_AUDIO_SIZE 0x5B000
-#define BAHAMA_SLAVE_ID_FM_REG 0x02
-#define FM_GPIO 83
-#define BT_PCM_BCLK_MODE 0x88
-#define BT_PCM_DIN_MODE 0x89
-#define BT_PCM_DOUT_MODE 0x8A
-#define BT_PCM_SYNC_MODE 0x8B
-#define FM_I2S_SD_MODE 0x8E
-#define FM_I2S_WS_MODE 0x8F
-#define FM_I2S_SCK_MODE 0x90
-#define I2C_PIN_CTL 0x15
-#define I2C_NORMAL 0x40
-
static struct platform_device msm_wlan_ar6000_pm_device = {
.name = "wlan_ar6000_pm_dev",
.id = -1,
@@ -125,224 +108,6 @@
.msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
};
-#ifdef CONFIG_ARCH_MSM7X27A
-#define MSM_PMEM_MDP_SIZE 0x1DD1000
-#define MSM_PMEM_ADSP_SIZE 0x1100000
-#endif
-
-#if defined(CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C) || \
-defined(CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C_MODULE)
-
-#ifndef CLEARPAD3000_ATTEN_GPIO
-#define CLEARPAD3000_ATTEN_GPIO (48)
-#endif
-
-#ifndef CLEARPAD3000_RESET_GPIO
-#define CLEARPAD3000_RESET_GPIO (26)
-#endif
-
-static int synaptics_touchpad_setup(void);
-
-static struct msm_gpio clearpad3000_cfg_data[] = {
- {GPIO_CFG(CLEARPAD3000_ATTEN_GPIO, 0, GPIO_CFG_INPUT,
- GPIO_CFG_NO_PULL, GPIO_CFG_6MA), "rmi4_attn"},
- {GPIO_CFG(CLEARPAD3000_RESET_GPIO, 0, GPIO_CFG_OUTPUT,
- GPIO_CFG_PULL_DOWN, GPIO_CFG_8MA), "rmi4_reset"},
-};
-
-static struct rmi_XY_pair rmi_offset = {.x = 0, .y = 0};
-static struct rmi_range rmi_clipx = {.min = 48, .max = 980};
-static struct rmi_range rmi_clipy = {.min = 7, .max = 1647};
-static struct rmi_f11_functiondata synaptics_f11_data = {
- .swap_axes = false,
- .flipX = false,
- .flipY = false,
- .offset = &rmi_offset,
- .button_height = 113,
- .clipX = &rmi_clipx,
- .clipY = &rmi_clipy,
-};
-
-#define MAX_LEN 100
-
-static ssize_t clearpad3000_virtual_keys_register(struct kobject *kobj,
- struct kobj_attribute *attr, char *buf)
-{
- char *virtual_keys = __stringify(EV_KEY) ":" __stringify(KEY_MENU) \
- ":60:830:120:60" ":" __stringify(EV_KEY) \
- ":" __stringify(KEY_HOME) ":180:830:120:60" \
- ":" __stringify(EV_KEY) ":" \
- __stringify(KEY_SEARCH) ":300:830:120:60" \
- ":" __stringify(EV_KEY) ":" \
- __stringify(KEY_BACK) ":420:830:120:60" "\n";
-
- return snprintf(buf, strnlen(virtual_keys, MAX_LEN) + 1 , "%s",
- virtual_keys);
-}
-
-static struct kobj_attribute clearpad3000_virtual_keys_attr = {
- .attr = {
- .name = "virtualkeys.sensor00fn11",
- .mode = S_IRUGO,
- },
- .show = &clearpad3000_virtual_keys_register,
-};
-
-static struct attribute *virtual_key_properties_attrs[] = {
- &clearpad3000_virtual_keys_attr.attr,
- NULL
-};
-
-static struct attribute_group virtual_key_properties_attr_group = {
- .attrs = virtual_key_properties_attrs,
-};
-
-struct kobject *virtual_key_properties_kobj;
-
-static struct rmi_functiondata synaptics_functiondata[] = {
- {
- .function_index = RMI_F11_INDEX,
- .data = &synaptics_f11_data,
- },
-};
-
-static struct rmi_functiondata_list synaptics_perfunctiondata = {
- .count = ARRAY_SIZE(synaptics_functiondata),
- .functiondata = synaptics_functiondata,
-};
-
-static struct rmi_sensordata synaptics_sensordata = {
- .perfunctiondata = &synaptics_perfunctiondata,
- .rmi_sensor_setup = synaptics_touchpad_setup,
-};
-
-static struct rmi_i2c_platformdata synaptics_platformdata = {
- .i2c_address = 0x2c,
- .irq_type = IORESOURCE_IRQ_LOWLEVEL,
- .sensordata = &synaptics_sensordata,
-};
-
-static struct i2c_board_info synaptic_i2c_clearpad3k[] = {
- {
- I2C_BOARD_INFO("rmi4_ts", 0x2c),
- .platform_data = &synaptics_platformdata,
- },
-};
-
-static int synaptics_touchpad_setup(void)
-{
- int retval = 0;
-
- virtual_key_properties_kobj =
- kobject_create_and_add("board_properties", NULL);
- if (virtual_key_properties_kobj)
- retval = sysfs_create_group(virtual_key_properties_kobj,
- &virtual_key_properties_attr_group);
- if (!virtual_key_properties_kobj || retval)
- pr_err("failed to create ft5202 board_properties\n");
-
- retval = msm_gpios_request_enable(clearpad3000_cfg_data,
- sizeof(clearpad3000_cfg_data)/sizeof(struct msm_gpio));
- if (retval) {
- pr_err("%s:Failed to obtain touchpad GPIO %d. Code: %d.",
- __func__, CLEARPAD3000_ATTEN_GPIO, retval);
- retval = 0; /* ignore the err */
- }
- synaptics_platformdata.irq = gpio_to_irq(CLEARPAD3000_ATTEN_GPIO);
-
- gpio_set_value(CLEARPAD3000_RESET_GPIO, 0);
- usleep(10000);
- gpio_set_value(CLEARPAD3000_RESET_GPIO, 1);
- usleep(50000);
-
- return retval;
-}
-#endif
-
-#define FT5X06_IRQ_GPIO 48
-#define FT5X06_RESET_GPIO 26
-
-static ssize_t
-ft5x06_virtual_keys_register(struct kobject *kobj,
- struct kobj_attribute *attr,
- char *buf)
-{
- return snprintf(buf, 200,
- __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":40:510:80:60"
- ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":120:510:80:60"
- ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":200:510:80:60"
- ":" __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":280:510:80:60"
- "\n");
-}
-
-static struct kobj_attribute ft5x06_virtual_keys_attr = {
- .attr = {
- .name = "virtualkeys.ft5x06_ts",
- .mode = S_IRUGO,
- },
- .show = &ft5x06_virtual_keys_register,
-};
-
-static struct attribute *ft5x06_virtual_key_properties_attrs[] = {
- &ft5x06_virtual_keys_attr.attr,
- NULL,
-};
-
-static struct attribute_group ft5x06_virtual_key_properties_attr_group = {
- .attrs = ft5x06_virtual_key_properties_attrs,
-};
-
-struct kobject *ft5x06_virtual_key_properties_kobj;
-
-static struct ft5x06_ts_platform_data ft5x06_platformdata = {
- .x_max = 320,
- .y_max = 480,
- .reset_gpio = FT5X06_RESET_GPIO,
- .irq_gpio = FT5X06_IRQ_GPIO,
- .irqflags = IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
-};
-
-static struct i2c_board_info ft5x06_device_info[] __initdata = {
- {
- I2C_BOARD_INFO("ft5x06_ts", 0x38),
- .platform_data = &ft5x06_platformdata,
- .irq = MSM_GPIO_TO_INT(FT5X06_IRQ_GPIO),
- },
-};
-
-static void ft5x06_touchpad_setup(void)
-{
- int rc;
-
- rc = gpio_tlmm_config(GPIO_CFG(FT5X06_IRQ_GPIO, 0,
- GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
- GPIO_CFG_8MA), GPIO_CFG_ENABLE);
- if (rc)
- pr_err("%s: gpio_tlmm_config for %d failed\n",
- __func__, FT5X06_IRQ_GPIO);
-
- rc = gpio_tlmm_config(GPIO_CFG(FT5X06_RESET_GPIO, 0,
- GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
- GPIO_CFG_8MA), GPIO_CFG_ENABLE);
- if (rc)
- pr_err("%s: gpio_tlmm_config for %d failed\n",
- __func__, FT5X06_RESET_GPIO);
-
- ft5x06_virtual_key_properties_kobj =
- kobject_create_and_add("board_properties", NULL);
-
- if (ft5x06_virtual_key_properties_kobj)
- rc = sysfs_create_group(ft5x06_virtual_key_properties_kobj,
- &ft5x06_virtual_key_properties_attr_group);
-
- if (!ft5x06_virtual_key_properties_kobj || rc)
- pr_err("%s: failed to create board_properties\n", __func__);
-
- i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
- ft5x06_device_info,
- ARRAY_SIZE(ft5x06_device_info));
-}
-
static struct android_usb_platform_data android_usb_pdata = {
.update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
};
@@ -589,203 +354,6 @@
.v_addr = MSM_CFG_CTL_BASE,
};
-static struct android_pmem_platform_data android_pmem_adsp_pdata = {
- .name = "pmem_adsp",
- .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
- .cached = 1,
- .memory_type = MEMTYPE_EBI1,
-};
-
-static struct platform_device android_pmem_adsp_device = {
- .name = "android_pmem",
- .id = 1,
- .dev = { .platform_data = &android_pmem_adsp_pdata },
-};
-
-static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE;
-static int __init pmem_mdp_size_setup(char *p)
-{
- pmem_mdp_size = memparse(p, NULL);
- return 0;
-}
-
-early_param("pmem_mdp_size", pmem_mdp_size_setup);
-
-static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
-static int __init pmem_adsp_size_setup(char *p)
-{
- pmem_adsp_size = memparse(p, NULL);
- return 0;
-}
-
-early_param("pmem_adsp_size", pmem_adsp_size_setup);
-
-#define SND(desc, num) { .name = #desc, .id = num }
-static struct snd_endpoint snd_endpoints_list[] = {
- SND(HANDSET, 0),
- SND(MONO_HEADSET, 2),
- SND(HEADSET, 3),
- SND(SPEAKER, 6),
- SND(TTY_HEADSET, 8),
- SND(TTY_VCO, 9),
- SND(TTY_HCO, 10),
- SND(BT, 12),
- SND(IN_S_SADC_OUT_HANDSET, 16),
- SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
- SND(FM_DIGITAL_STEREO_HEADSET, 26),
- SND(FM_DIGITAL_SPEAKER_PHONE, 27),
- SND(FM_DIGITAL_BT_A2DP_HEADSET, 28),
- SND(STEREO_HEADSET_AND_SPEAKER, 31),
- SND(CURRENT, 0x7FFFFFFE),
- SND(FM_ANALOG_STEREO_HEADSET, 35),
- SND(FM_ANALOG_STEREO_HEADSET_CODEC, 36),
-};
-#undef SND
-
-static struct msm_snd_endpoints msm_device_snd_endpoints = {
- .endpoints = snd_endpoints_list,
- .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
-};
-
-static struct platform_device msm_device_snd = {
- .name = "msm_snd",
- .id = -1,
- .dev = {
- .platform_data = &msm_device_snd_endpoints
- },
-};
-
-#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
- (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
- (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
- (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
- (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
- (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
-#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
- (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
- (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
- (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
- (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
- (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
-#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
- (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
- (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
- (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
- (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
- (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
-#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
- (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
- (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
- (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
- (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
- (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
-#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
-
-static unsigned int dec_concurrency_table[] = {
- /* Audio LP */
- (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
- 0, 0, 0,
-
- /* Concurrency 1 */
- (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC4_FORMAT),
-
- /* Concurrency 2 */
- (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC4_FORMAT),
-
- /* Concurrency 3 */
- (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC4_FORMAT),
-
- /* Concurrency 4 */
- (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC4_FORMAT),
-
- /* Concurrency 5 */
- (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC4_FORMAT),
-
- /* Concurrency 6 */
- (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- 0, 0, 0, 0,
-
- /* Concurrency 7 */
- (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
- (DEC4_FORMAT),
-};
-
-#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
- .module_queueid = queueid, .module_decid = decid, \
- .nr_codec_support = nr_codec}
-
-static struct msm_adspdec_info dec_info_list[] = {
- DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
- DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
- DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
- DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
- DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
-};
-
-static struct msm_adspdec_database msm_device_adspdec_database = {
- .num_dec = ARRAY_SIZE(dec_info_list),
- .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
- ARRAY_SIZE(dec_info_list)),
- .dec_concurrency_table = dec_concurrency_table,
- .dec_info_list = dec_info_list,
-};
-
-static struct platform_device msm_device_adspdec = {
- .name = "msm_adspdec",
- .id = -1,
- .dev = {
- .platform_data = &msm_device_adspdec_database
- },
-};
-
-static struct android_pmem_platform_data android_pmem_audio_pdata = {
- .name = "pmem_audio",
- .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
- .cached = 0,
- .memory_type = MEMTYPE_EBI1,
-};
-
-static struct platform_device android_pmem_audio_device = {
- .name = "android_pmem",
- .id = 2,
- .dev = { .platform_data = &android_pmem_audio_pdata },
-};
-
-static struct android_pmem_platform_data android_pmem_pdata = {
- .name = "pmem",
- .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
- .cached = 1,
- .memory_type = MEMTYPE_EBI1,
-};
-static struct platform_device android_pmem_device = {
- .name = "android_pmem",
- .id = 0,
- .dev = { .platform_data = &android_pmem_pdata },
-};
-
static u32 msm_calculate_batt_capacity(u32 current_voltage);
static struct msm_psy_batt_pdata msm_psy_batt_data = {
@@ -813,12 +381,7 @@
static struct platform_device *common_devices[] __initdata = {
&android_usb_device,
- &android_pmem_device,
- &android_pmem_adsp_device,
- &android_pmem_audio_device,
&msm_batt_device,
- &msm_device_adspdec,
- &msm_device_snd,
&asoc_msm_pcm,
&asoc_msm_dai0,
&asoc_msm_dai1,
@@ -852,110 +415,6 @@
&msm8625_kgsl_3d0,
};
-static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
-static int __init pmem_kernel_ebi1_size_setup(char *p)
-{
- pmem_kernel_ebi1_size = memparse(p, NULL);
- return 0;
-}
-early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
-
-static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
-static int __init pmem_audio_size_setup(char *p)
-{
- pmem_audio_size = memparse(p, NULL);
- return 0;
-}
-early_param("pmem_audio_size", pmem_audio_size_setup);
-
-static struct memtype_reserve msm7627a_reserve_table[] __initdata = {
- [MEMTYPE_SMI] = {
- },
- [MEMTYPE_EBI0] = {
- .flags = MEMTYPE_FLAGS_1M_ALIGN,
- },
- [MEMTYPE_EBI1] = {
- .flags = MEMTYPE_FLAGS_1M_ALIGN,
- },
-};
-
-static void __init size_pmem_devices(void)
-{
-#ifdef CONFIG_ANDROID_PMEM
- android_pmem_adsp_pdata.size = pmem_adsp_size;
- android_pmem_pdata.size = pmem_mdp_size;
- android_pmem_audio_pdata.size = pmem_audio_size;
-#endif
-}
-
-static void __init reserve_memory_for(struct android_pmem_platform_data *p)
-{
- msm7627a_reserve_table[p->memory_type].size += p->size;
-}
-
-static void __init reserve_pmem_memory(void)
-{
-#ifdef CONFIG_ANDROID_PMEM
- reserve_memory_for(&android_pmem_adsp_pdata);
- reserve_memory_for(&android_pmem_pdata);
- reserve_memory_for(&android_pmem_audio_pdata);
- msm7627a_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
-#endif
-}
-
-static void __init msm7627a_calculate_reserve_sizes(void)
-{
- size_pmem_devices();
- reserve_pmem_memory();
-}
-
-static int msm7627a_paddr_to_memtype(unsigned int paddr)
-{
- return MEMTYPE_EBI1;
-}
-
-static struct reserve_info msm7627a_reserve_info __initdata = {
- .memtype_reserve_table = msm7627a_reserve_table,
- .calculate_reserve_sizes = msm7627a_calculate_reserve_sizes,
- .paddr_to_memtype = msm7627a_paddr_to_memtype,
-};
-
-static void __init msm7627a_reserve(void)
-{
- reserve_info = &msm7627a_reserve_info;
- msm_reserve();
- memblock_remove(MSM8625_WARM_BOOT_PHYS, SZ_32);
-}
-
-static void __init msm8625_reserve(void)
-{
- memblock_remove(MSM8625_SECONDARY_PHYS, SZ_8);
- msm7627a_reserve();
-}
-
-static void msmqrd_adsp_add_pdev(void)
-{
- int rc = 0;
- struct rpc_board_dev *rpc_adsp_pdev;
-
- rpc_adsp_pdev = kzalloc(sizeof(struct rpc_board_dev), GFP_KERNEL);
- if (rpc_adsp_pdev == NULL) {
- pr_err("%s: Memory Allocation failure\n", __func__);
- return;
- }
- rpc_adsp_pdev->prog = ADSP_RPC_PROG;
-
- if (cpu_is_msm8625())
- rpc_adsp_pdev->pdev = msm8625_device_adsp;
- else
- rpc_adsp_pdev->pdev = msm_adsp_device;
- rc = msm_rpc_add_board_dev(rpc_adsp_pdev, 1);
- if (rc < 0) {
- pr_err("%s: return val: %d\n", __func__, rc);
- kfree(rpc_adsp_pdev);
- }
-}
-
static void __init msm7627a_device_i2c_init(void)
{
msm_gsbi0_qup_i2c_device.dev.platform_data = &msm_gsbi0_qup_i2c_pdata;
@@ -970,19 +429,6 @@
= &msm_gsbi1_qup_i2c_pdata;
}
-static struct msm_handset_platform_data hs_platform_data = {
- .hs_name = "7k_handset",
- .pwr_key_delay_ms = 500, /* 0 will disable end key */
-};
-
-static struct platform_device hs_pdev = {
- .name = "msm-handset",
- .id = -1,
- .dev = {
- .platform_data = &hs_platform_data,
- },
-};
-
static struct platform_device msm_proccomm_regulator_dev = {
.name = PROCCOMM_REGULATOR_DEV_NAME,
.id = -1,
@@ -999,231 +445,6 @@
__func__, rc);
}
-/* 8625 keypad device information */
-static unsigned int kp_row_gpios_8625[] = {31};
-static unsigned int kp_col_gpios_8625[] = {36, 37};
-
-static const unsigned short keymap_8625[] = {
- KEY_VOLUMEUP,
- KEY_VOLUMEDOWN,
-};
-
-static struct gpio_event_matrix_info kp_matrix_info_8625 = {
- .info.func = gpio_event_matrix_func,
- .keymap = keymap_8625,
- .output_gpios = kp_row_gpios_8625,
- .input_gpios = kp_col_gpios_8625,
- .noutputs = ARRAY_SIZE(kp_row_gpios_8625),
- .ninputs = ARRAY_SIZE(kp_col_gpios_8625),
- .settle_time.tv_nsec = 40 * NSEC_PER_USEC,
- .poll_time.tv_nsec = 20 * NSEC_PER_MSEC,
- .flags = GPIOKPF_LEVEL_TRIGGERED_IRQ | GPIOKPF_DRIVE_INACTIVE |
- GPIOKPF_PRINT_UNMAPPED_KEYS,
-};
-
-static struct gpio_event_info *kp_info_8625[] = {
- &kp_matrix_info_8625.info,
-};
-static struct gpio_event_platform_data kp_pdata_8625 = {
- .name = "8625_kp",
- .info = kp_info_8625,
- .info_count = ARRAY_SIZE(kp_info_8625)
-};
-
-static struct platform_device kp_pdev_8625 = {
- .name = GPIO_EVENT_DEV_NAME,
- .id = -1,
- .dev = {
- .platform_data = &kp_pdata_8625,
- },
-};
-
-#define LED_RED_GPIO_8625 49
-#define LED_GREEN_GPIO_8625 34
-
-static struct gpio_led gpio_leds_config_8625[] = {
- {
- .name = "green",
- .gpio = LED_GREEN_GPIO_8625,
- },
- {
- .name = "red",
- .gpio = LED_RED_GPIO_8625,
- },
-};
-
-static struct gpio_led_platform_data gpio_leds_pdata_8625 = {
- .num_leds = ARRAY_SIZE(gpio_leds_config_8625),
- .leds = gpio_leds_config_8625,
-};
-
-static struct platform_device gpio_leds_8625 = {
- .name = "leds-gpio",
- .id = -1,
- .dev = {
- .platform_data = &gpio_leds_pdata_8625,
- },
-};
-
-#define MXT_TS_IRQ_GPIO 48
-#define MXT_TS_RESET_GPIO 26
-
-static const u8 mxt_config_data[] = {
- /* T6 Object */
- 0, 0, 0, 0, 0, 0,
- /* T38 Object */
- 16, 0, 0, 0, 0, 0, 0, 0,
- /* T7 Object */
- 32, 16, 50,
- /* T8 Object */
- 30, 0, 20, 20, 0, 0, 20, 0, 50, 0,
- /* T9 Object */
- 3, 0, 0, 18, 11, 0, 32, 75, 3, 3,
- 0, 1, 1, 0, 10, 10, 10, 10, 31, 3,
- 223, 1, 11, 11, 15, 15, 151, 43, 145, 80,
- 100, 15, 0, 0, 0,
- /* T15 Object */
- 131, 0, 11, 11, 1, 1, 0, 45, 3, 0,
- 0,
- /* T18 Object */
- 0, 0,
- /* T19 Object */
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
- /* T23 Object */
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0,
- /* T25 Object */
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0,
- /* T40 Object */
- 0, 0, 0, 0, 0,
- /* T42 Object */
- 0, 0, 0, 0, 0, 0, 0, 0,
- /* T46 Object */
- 0, 2, 32, 48, 0, 0, 0, 0, 0,
- /* T47 Object */
- 1, 20, 60, 5, 2, 50, 40, 0, 0, 40,
- /* T48 Object */
- 1, 12, 80, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 6, 6, 0, 0, 100, 4, 64,
- 10, 0, 20, 5, 0, 38, 0, 20, 0, 0,
- 0, 0, 0, 0, 16, 65, 3, 1, 1, 0,
- 10, 10, 10, 0, 0, 15, 15, 154, 58, 145,
- 80, 100, 15, 3,
-};
-
-static struct mxt_config_info mxt_config_array[] = {
- {
- .config = mxt_config_data,
- .config_length = ARRAY_SIZE(mxt_config_data),
- .family_id = 0x81,
- .variant_id = 0x01,
- .version = 0x10,
- .build = 0xAA,
- },
-};
-
-static int mxt_key_codes[MXT_KEYARRAY_MAX_KEYS] = {
- [0] = KEY_HOME,
- [1] = KEY_MENU,
- [9] = KEY_BACK,
- [10] = KEY_SEARCH,
-};
-
-static struct mxt_platform_data mxt_platform_data = {
- .config_array = mxt_config_array,
- .config_array_size = ARRAY_SIZE(mxt_config_array),
- .panel_minx = 0,
- .panel_maxx = 479,
- .panel_miny = 0,
- .panel_maxy = 799,
- .disp_minx = 0,
- .disp_maxx = 479,
- .disp_miny = 0,
- .disp_maxy = 799,
- .irqflags = IRQF_TRIGGER_FALLING,
- .i2c_pull_up = true,
- .reset_gpio = MXT_TS_RESET_GPIO,
- .irq_gpio = MXT_TS_IRQ_GPIO,
- .key_codes = mxt_key_codes,
-};
-
-static struct i2c_board_info mxt_device_info[] __initdata = {
- {
- I2C_BOARD_INFO("atmel_mxt_ts", 0x4a),
- .platform_data = &mxt_platform_data,
- .irq = MSM_GPIO_TO_INT(MXT_TS_IRQ_GPIO),
- },
-};
-
-static void msm7627a_add_io_devices(void)
-{
- int rc;
-
- /* touchscreen */
- if (machine_is_msm7627a_qrd1()) {
- i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
- synaptic_i2c_clearpad3k,
- ARRAY_SIZE(synaptic_i2c_clearpad3k));
- } else if (machine_is_msm7627a_evb() || machine_is_msm8625_evb()) {
- rc = gpio_tlmm_config(GPIO_CFG(MXT_TS_IRQ_GPIO, 0,
- GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
- GPIO_CFG_8MA), GPIO_CFG_ENABLE);
- if (rc) {
- pr_err("%s: gpio_tlmm_config for %d failed\n",
- __func__, MXT_TS_IRQ_GPIO);
- }
-
- rc = gpio_tlmm_config(GPIO_CFG(MXT_TS_RESET_GPIO, 0,
- GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
- GPIO_CFG_8MA), GPIO_CFG_ENABLE);
- if (rc) {
- pr_err("%s: gpio_tlmm_config for %d failed\n",
- __func__, MXT_TS_RESET_GPIO);
- }
-
- i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
- mxt_device_info,
- ARRAY_SIZE(mxt_device_info));
- } else if (machine_is_msm7627a_qrd3() || machine_is_msm8625_qrd7()) {
- ft5x06_touchpad_setup();
- }
-
- /* headset */
- platform_device_register(&hs_pdev);
-
- /* vibrator */
-#ifdef CONFIG_MSM_RPC_VIBRATOR
- msm_init_pmic_vibrator();
-#endif
-
- /* keypad */
- if (machine_is_msm7627a_evb() || machine_is_msm8625_evb())
- platform_device_register(&kp_pdev_8625);
-
- /* leds */
- if (machine_is_msm7627a_evb() || machine_is_msm8625_evb()) {
- rc = gpio_tlmm_config(GPIO_CFG(LED_RED_GPIO_8625, 0,
- GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP,
- GPIO_CFG_16MA), GPIO_CFG_ENABLE);
- if (rc) {
- pr_err("%s: gpio_tlmm_config for %d failed\n",
- __func__, LED_RED_GPIO_8625);
- }
-
- rc = gpio_tlmm_config(GPIO_CFG(LED_GREEN_GPIO_8625, 0,
- GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP,
- GPIO_CFG_16MA), GPIO_CFG_ENABLE);
- if (rc) {
- pr_err("%s: gpio_tlmm_config for %d failed\n",
- __func__, LED_GREEN_GPIO_8625);
- }
-
- platform_device_register(&gpio_leds_8625);
- }
-}
-
static int __init msm_qrd_init_ar6000pm(void)
{
msm_wlan_ar6000_pm_device.dev.platform_data = &ar600x_wlan_power;
@@ -1286,10 +507,8 @@
static void __init msm_pm_init(void)
{
- if (machine_is_msm8625_qrd7())
- return;
- if (!machine_is_msm8625_evb()) {
+ if (!cpu_is_msm8625()) {
msm_pm_set_platform_data(msm7627a_pm_data,
ARRAY_SIZE(msm7627a_pm_data));
BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
@@ -1301,11 +520,19 @@
}
}
+static void __init qrd8625_reserve(void)
+{
+ memblock_remove(MSM8625_SECONDARY_PHYS, SZ_8);
+ qrd7627a_reserve();
+ memblock_remove(MSM8625_WARM_BOOT_PHYS, SZ_32);
+ msm_pm_8625_boot_pdata.p_addr = memblock_alloc(SZ_8, SZ_64K);
+}
+
static void __init msm_qrd_init(void)
{
msm7x2x_misc_init();
msm7627a_init_regulators();
- msmqrd_adsp_add_pdev();
+ msm_adsp_add_pdev();
if (cpu_is_msm8625())
msm8625_device_i2c_init();
@@ -1337,7 +564,7 @@
#endif
msm7627a_camera_init();
- msm7627a_add_io_devices();
+ qrd7627a_add_io_devices();
msm7x25a_kgsl_3d0_init();
}
@@ -1349,7 +576,7 @@
MACHINE_START(MSM7627A_QRD1, "QRD MSM7627a QRD1")
.boot_params = PHYS_OFFSET + 0x100,
.map_io = msm_common_io_init,
- .reserve = msm7627a_reserve,
+ .reserve = qrd7627a_reserve,
.init_irq = msm_init_irq,
.init_machine = msm_qrd_init,
.timer = &msm_timer,
@@ -1359,7 +586,7 @@
MACHINE_START(MSM7627A_QRD3, "QRD MSM7627a QRD3")
.boot_params = PHYS_OFFSET + 0x100,
.map_io = msm_common_io_init,
- .reserve = msm7627a_reserve,
+ .reserve = qrd7627a_reserve,
.init_irq = msm_init_irq,
.init_machine = msm_qrd_init,
.timer = &msm_timer,
@@ -1369,7 +596,7 @@
MACHINE_START(MSM7627A_EVB, "QRD MSM7627a EVB")
.boot_params = PHYS_OFFSET + 0x100,
.map_io = msm_common_io_init,
- .reserve = msm7627a_reserve,
+ .reserve = qrd7627a_reserve,
.init_irq = msm_init_irq,
.init_machine = msm_qrd_init,
.timer = &msm_timer,
@@ -1379,7 +606,7 @@
MACHINE_START(MSM8625_EVB, "QRD MSM8625 EVB")
.boot_params = PHYS_OFFSET + 0x100,
.map_io = msm8625_map_io,
- .reserve = msm8625_reserve,
+ .reserve = qrd8625_reserve,
.init_irq = msm8625_init_irq,
.init_machine = msm_qrd_init,
.timer = &msm_timer,
@@ -1389,7 +616,7 @@
MACHINE_START(MSM8625_QRD7, "QRD MSM8625 QRD7")
.boot_params = PHYS_OFFSET + 0x100,
.map_io = msm8625_map_io,
- .reserve = msm7627a_reserve,
+ .reserve = qrd8625_reserve,
.init_irq = msm8625_init_irq,
.init_machine = msm_qrd_init,
.timer = &msm_timer,
diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index 69e23f6..044bd79 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -3350,6 +3350,7 @@
F_GFX3D(145455000, pll2, 2, 11),
F_GFX3D(160000000, pll2, 1, 5),
F_GFX3D(177778000, pll2, 2, 9),
+ F_GFX3D(192000000, pll8, 1, 2),
F_GFX3D(200000000, pll2, 1, 4),
F_GFX3D(228571000, pll2, 2, 7),
F_GFX3D(266667000, pll2, 1, 3),
@@ -3367,7 +3368,7 @@
};
static unsigned long fmax_gfx3d_8930[MAX_VDD_LEVELS] __initdata = {
- [VDD_DIG_LOW] = 128000000,
+ [VDD_DIG_LOW] = 192000000,
[VDD_DIG_NOMINAL] = 320000000,
[VDD_DIG_HIGH] = 450000000
};
@@ -5478,7 +5479,7 @@
};
static struct clk_lookup msm_clocks_8930[] = {
- CLK_LOOKUP("xo", cxo_clk.c, "msm_otg"),
+ CLK_LOOKUP("xo", cxo_clk.c, "msm_xo"),
CLK_LOOKUP("cxo", cxo_clk.c, "wcnss_wlan.0"),
CLK_LOOKUP("cxo", cxo_clk.c, "pil_riva"),
CLK_LOOKUP("xo", pxo_clk.c, "pil_qdsp6v4.0"),
diff --git a/arch/arm/mach-msm/devices-8064.c b/arch/arm/mach-msm/devices-8064.c
index 3965413..7c2fca4 100644
--- a/arch/arm/mach-msm/devices-8064.c
+++ b/arch/arm/mach-msm/devices-8064.c
@@ -31,6 +31,7 @@
#include <mach/mdm2.h>
#include <mach/msm_smd.h>
#include <mach/msm_dcvs.h>
+#include <mach/qdss.h>
#include <linux/ion.h>
#include "clock.h"
#include "devices.h"
@@ -2210,3 +2211,42 @@
.num_resources = ARRAY_SIZE(msm_cache_erp_resources),
.resource = msm_cache_erp_resources,
};
+
+#define MSM_QDSS_PHYS_BASE 0x01A00000
+#define MSM_ETM_PHYS_BASE (MSM_QDSS_PHYS_BASE + 0x1C000)
+
+#define QDSS_SOURCE(src_name, fpm) { .name = src_name, .fport_mask = fpm, }
+
+static struct qdss_source msm_qdss_sources[] = {
+ QDSS_SOURCE("msm_etm", 0x33),
+ QDSS_SOURCE("msm_oxili", 0x80),
+};
+
+static struct msm_qdss_platform_data qdss_pdata = {
+ .src_table = msm_qdss_sources,
+ .size = ARRAY_SIZE(msm_qdss_sources),
+ .afamily = 1,
+};
+
+struct platform_device apq8064_qdss_device = {
+ .name = "msm_qdss",
+ .id = -1,
+ .dev = {
+ .platform_data = &qdss_pdata,
+ },
+};
+
+static struct resource msm_etm_resources[] = {
+ {
+ .start = MSM_ETM_PHYS_BASE,
+ .end = MSM_ETM_PHYS_BASE + (SZ_4K * 4) - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+struct platform_device apq8064_etm_device = {
+ .name = "msm_etm",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(msm_etm_resources),
+ .resource = msm_etm_resources,
+};
diff --git a/arch/arm/mach-msm/devices-8960.c b/arch/arm/mach-msm/devices-8960.c
index b03f137..0ab81a4 100644
--- a/arch/arm/mach-msm/devices-8960.c
+++ b/arch/arm/mach-msm/devices-8960.c
@@ -34,6 +34,7 @@
#include <sound/msm-dai-q6.h>
#include <sound/apr_audio.h>
#include <mach/msm_tsif.h>
+#include <mach/qdss.h>
#include "clock.h"
#include "devices.h"
#include "devices-msm8x60.h"
@@ -3167,6 +3168,26 @@
#define MSM_FUNNEL_PHYS_BASE (MSM_QDSS_PHYS_BASE + 0x4000)
#define MSM_ETM_PHYS_BASE (MSM_QDSS_PHYS_BASE + 0x1C000)
+#define QDSS_SOURCE(src_name, fpm) { .name = src_name, .fport_mask = fpm, }
+
+static struct qdss_source msm_qdss_sources[] = {
+ QDSS_SOURCE("msm_etm", 0x3),
+};
+
+static struct msm_qdss_platform_data qdss_pdata = {
+ .src_table = msm_qdss_sources,
+ .size = ARRAY_SIZE(msm_qdss_sources),
+ .afamily = 1,
+};
+
+struct platform_device msm_qdss_device = {
+ .name = "msm_qdss",
+ .id = -1,
+ .dev = {
+ .platform_data = &qdss_pdata,
+ },
+};
+
static struct resource msm_etb_resources[] = {
{
.start = MSM_ETB_PHYS_BASE,
diff --git a/arch/arm/mach-msm/devices-9615.c b/arch/arm/mach-msm/devices-9615.c
index 1acc833..5e62507 100644
--- a/arch/arm/mach-msm/devices-9615.c
+++ b/arch/arm/mach-msm/devices-9615.c
@@ -64,7 +64,8 @@
static struct msm_watchdog_pdata msm_watchdog_pdata = {
.pet_time = 10000,
.bark_time = 11000,
- .has_secure = true,
+ .has_secure = false,
+ .use_kernel_fiq = true,
};
struct platform_device msm9615_device_watchdog = {
diff --git a/arch/arm/mach-msm/devices-msm8x60.c b/arch/arm/mach-msm/devices-msm8x60.c
index 3ad3ee4..ba7ac2a 100644
--- a/arch/arm/mach-msm/devices-msm8x60.c
+++ b/arch/arm/mach-msm/devices-msm8x60.c
@@ -331,6 +331,7 @@
.config_gpio = 1,
.uart_tx_gpio = 67,
.uart_rx_gpio = 66,
+ .line = 1,
};
static struct resource msm_uart_gsbi9_resources[] = {
diff --git a/arch/arm/mach-msm/devices.h b/arch/arm/mach-msm/devices.h
index ac9feee..18b0a52 100644
--- a/arch/arm/mach-msm/devices.h
+++ b/arch/arm/mach-msm/devices.h
@@ -318,10 +318,13 @@
extern struct platform_device msm9615_device_watchdog;
extern struct platform_device fsm9xxx_device_watchdog;
+extern struct platform_device apq8064_qdss_device;
+extern struct platform_device msm_qdss_device;
extern struct platform_device msm_etb_device;
extern struct platform_device msm_tpiu_device;
extern struct platform_device msm_funnel_device;
extern struct platform_device msm_etm_device;
+extern struct platform_device apq8064_etm_device;
#endif
extern struct platform_device msm_bus_8064_apps_fabric;
diff --git a/arch/arm/mach-msm/gss-8064.c b/arch/arm/mach-msm/gss-8064.c
index 1ddb7a3..3c475d6 100644
--- a/arch/arm/mach-msm/gss-8064.c
+++ b/arch/arm/mach-msm/gss-8064.c
@@ -113,7 +113,7 @@
/* FIXME: Get address, size from PIL */
static struct ramdump_segment gss_segments[] = {
- {0x89D00000 - 0x89000000}
+ {0x89000000, 0x00D00000}
};
static struct ramdump_segment smem_segments[] = {
diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h
index 7b74f1e..98fa233 100644
--- a/arch/arm/mach-msm/include/mach/board.h
+++ b/arch/arm/mach-msm/include/mach/board.h
@@ -499,6 +499,7 @@
#endif
void msm_add_devices(void);
void msm_copper_add_devices(void);
+void msm_copper_add_drivers(void);
void msm_map_common_io(void);
void msm_map_qsd8x50_io(void);
void msm_map_msm8x60_io(void);
diff --git a/arch/arm/mach-msm/include/mach/iommu_domains.h b/arch/arm/mach-msm/include/mach/iommu_domains.h
index af9213f..c17795a 100644
--- a/arch/arm/mach-msm/include/mach/iommu_domains.h
+++ b/arch/arm/mach-msm/include/mach/iommu_domains.h
@@ -15,9 +15,9 @@
enum {
VIDEO_DOMAIN,
- CAMERA_DOMAIN = VIDEO_DOMAIN,
- DISPLAY_DOMAIN = CAMERA_DOMAIN,
- ROTATOR_DOMAIN = DISPLAY_DOMAIN,
+ CAMERA_DOMAIN,
+ DISPLAY_DOMAIN,
+ ROTATOR_DOMAIN,
MAX_DOMAINS
};
diff --git a/arch/arm/mach-msm/include/mach/irqs-9615.h b/arch/arm/mach-msm/include/mach/irqs-9615.h
index 6252cef..39058a6 100644
--- a/arch/arm/mach-msm/include/mach/irqs-9615.h
+++ b/arch/arm/mach-msm/include/mach/irqs-9615.h
@@ -21,6 +21,7 @@
* 32+: SPI (shared peripheral interrupts)
*/
+#define FIQ_START 16
#define GIC_PPI_START 16
#define GIC_SPI_START 32
diff --git a/arch/arm/mach-msm/include/mach/msm_cache_dump.h b/arch/arm/mach-msm/include/mach/msm_cache_dump.h
new file mode 100644
index 0000000..a8d2987
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/msm_cache_dump.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef _MACH_MSM_CACHE_DUMP_
+#define _MACH_MSM_CACHE_DUMP_
+
+#include <asm-generic/sizes.h>
+
+
+struct l2_cache_line_dump {
+ unsigned int l2dcrtr0_val;
+ unsigned int l2dcrtr1_val;
+ unsigned int cache_line_data[32];
+ unsigned int ddr_data[32];
+} __packed;
+
+struct l2_cache_dump {
+ unsigned int magic_number;
+ unsigned int version;
+ unsigned int tag_size;
+ unsigned int line_size;
+ unsigned int total_lines;
+ struct l2_cache_line_dump cache[8*1024];
+ unsigned int l2esr;
+} __packed;
+
+
+struct l1_cache_dump {
+ unsigned int magic;
+ unsigned int version;
+ unsigned int flags;
+ unsigned int cpu_count;
+ unsigned int i_tag_size;
+ unsigned int i_line_size;
+ unsigned int i_num_sets;
+ unsigned int i_num_ways;
+ unsigned int d_tag_size;
+ unsigned int d_line_size;
+ unsigned int d_num_sets;
+ unsigned int d_num_ways;
+ unsigned int spare[32];
+ unsigned int lines[];
+} __packed;
+
+
+struct msm_cache_dump_platform_data {
+ unsigned int l1_size;
+ unsigned int l2_size;
+};
+
+#define L1_BUFFER_SIZE SZ_1M
+#define L2_BUFFER_SIZE (sizeof(struct l2_cache_dump))
+
+#define CACHE_BUFFER_DUMP_SIZE (L1_BUFFER_SIZE + L2_BUFFER_SIZE)
+
+#define L1C_SERVICE_ID 3
+#define L1C_BUFFER_SET_COMMAND_ID 4
+#define L1C_BUFFER_GET_SIZE_COMMAND_ID 6
+
+#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_serial_hs_lite.h b/arch/arm/mach-msm/include/mach/msm_serial_hs_lite.h
index e2bdaea..577a097 100644
--- a/arch/arm/mach-msm/include/mach/msm_serial_hs_lite.h
+++ b/arch/arm/mach-msm/include/mach/msm_serial_hs_lite.h
@@ -18,6 +18,7 @@
unsigned config_gpio;
unsigned uart_tx_gpio;
unsigned uart_rx_gpio;
+ int line;
};
#endif
diff --git a/arch/arm/mach-msm/include/mach/qdss.h b/arch/arm/mach-msm/include/mach/qdss.h
index 530bcb2..3b236b8 100644
--- a/arch/arm/mach-msm/include/mach/qdss.h
+++ b/arch/arm/mach-msm/include/mach/qdss.h
@@ -13,10 +13,30 @@
#ifndef __MACH_QDSS_H
#define __MACH_QDSS_H
+struct qdss_source {
+ struct list_head link;
+ const char *name;
+ uint32_t fport_mask;
+};
+
+struct msm_qdss_platform_data {
+ struct qdss_source *src_table;
+ size_t size;
+ uint8_t afamily;
+};
+
#ifdef CONFIG_MSM_QDSS
+extern struct qdss_source *qdss_get(const char *name);
+extern void qdss_put(struct qdss_source *src);
+extern int qdss_enable(struct qdss_source *src);
+extern void qdss_disable(struct qdss_source *src);
extern int qdss_clk_enable(void);
extern void qdss_clk_disable(void);
#else
+static inline struct qdss_source *qdss_get(const char *name) { return NULL; }
+static inline void qdss_put(struct qdss_source *src) {}
+static inline int qdss_enable(struct qdss_source *src) { return -ENOSYS; }
+static inline void qdss_disable(struct qdss_source *src) {}
static inline int qdss_clk_enable(void) { return -ENOSYS; }
static inline void qdss_clk_disable(void) {}
#endif
diff --git a/arch/arm/mach-msm/iommu_domains.c b/arch/arm/mach-msm/iommu_domains.c
index 3c6dc64..1959f5d 100644
--- a/arch/arm/mach-msm/iommu_domains.c
+++ b/arch/arm/mach-msm/iommu_domains.c
@@ -44,10 +44,145 @@
char *name;
int domain;
} msm_iommu_ctx_names[] = {
+ /* Camera */
+ {
+ .name = "vpe_src",
+ .domain = CAMERA_DOMAIN,
+ },
+ /* Camera */
+ {
+ .name = "vpe_dst",
+ .domain = CAMERA_DOMAIN,
+ },
+ /* Camera */
+ {
+ .name = "vfe_imgwr",
+ .domain = CAMERA_DOMAIN,
+ },
+ /* Camera */
+ {
+ .name = "vfe_misc",
+ .domain = CAMERA_DOMAIN,
+ },
+ /* Camera */
+ {
+ .name = "ijpeg_src",
+ .domain = CAMERA_DOMAIN,
+ },
+ /* Camera */
+ {
+ .name = "ijpeg_dst",
+ .domain = CAMERA_DOMAIN,
+ },
+ /* Camera */
+ {
+ .name = "jpegd_src",
+ .domain = CAMERA_DOMAIN,
+ },
+ /* Camera */
+ {
+ .name = "jpegd_dst",
+ .domain = CAMERA_DOMAIN,
+ },
+ /* Rotator */
+ {
+ .name = "rot_src",
+ .domain = ROTATOR_DOMAIN,
+ },
+ /* Rotator */
+ {
+ .name = "rot_dst",
+ .domain = ROTATOR_DOMAIN,
+ },
+ /* Video */
+ {
+ .name = "vcodec_a_mm1",
+ .domain = VIDEO_DOMAIN,
+ },
+ /* Video */
+ {
+ .name = "vcodec_b_mm2",
+ .domain = VIDEO_DOMAIN,
+ },
+ /* Video */
+ {
+ .name = "vcodec_a_stream",
+ .domain = VIDEO_DOMAIN,
+ },
};
+static struct mem_pool video_pools[] = {
+ /*
+ * Video hardware has the following requirements:
+ * 1. All video addresses used by the video hardware must be at a higher
+ * address than video firmware address.
+ * 2. Video hardware can only access a range of 256MB from the base of
+ * the video firmware.
+ */
+ [VIDEO_FIRMWARE_POOL] =
+ /* Low addresses, intended for video firmware */
+ {
+ .paddr = SZ_128K,
+ .size = SZ_16M - SZ_128K,
+ },
+ [VIDEO_MAIN_POOL] =
+ /* Main video pool */
+ {
+ .paddr = SZ_16M,
+ .size = SZ_256M - SZ_16M,
+ },
+ [GEN_POOL] =
+ /* Remaining address space up to 2G */
+ {
+ .paddr = SZ_256M,
+ .size = SZ_2G - SZ_256M,
+ },
+};
+
+static struct mem_pool camera_pools[] = {
+ [GEN_POOL] =
+ /* One address space for camera */
+ {
+ .paddr = SZ_128K,
+ .size = SZ_2G - SZ_128K,
+ },
+};
+
+static struct mem_pool display_pools[] = {
+ [GEN_POOL] =
+ /* One address space for display */
+ {
+ .paddr = SZ_128K,
+ .size = SZ_2G - SZ_128K,
+ },
+};
+
+static struct mem_pool rotator_pools[] = {
+ [GEN_POOL] =
+ /* One address space for rotator */
+ {
+ .paddr = SZ_128K,
+ .size = SZ_2G - SZ_128K,
+ },
+};
static struct msm_iommu_domain msm_iommu_domains[] = {
+ [VIDEO_DOMAIN] = {
+ .iova_pools = video_pools,
+ .npools = ARRAY_SIZE(video_pools),
+ },
+ [CAMERA_DOMAIN] = {
+ .iova_pools = camera_pools,
+ .npools = ARRAY_SIZE(camera_pools),
+ },
+ [DISPLAY_DOMAIN] = {
+ .iova_pools = display_pools,
+ .npools = ARRAY_SIZE(display_pools),
+ },
+ [ROTATOR_DOMAIN] = {
+ .iova_pools = rotator_pools,
+ .npools = ARRAY_SIZE(rotator_pools),
+ },
};
int msm_iommu_map_extra(struct iommu_domain *domain,
@@ -181,8 +316,7 @@
int msm_use_iommu()
{
- /* Kill use of the iommu by these clients for now. */
- return 0;
+ return iommu_found();
}
static int __init msm_subsystem_iommu_init(void)
@@ -198,25 +332,29 @@
struct mem_pool *pool = &msm_iommu_domains[i].
iova_pools[j];
mutex_init(&pool->pool_mutex);
- pool->gpool = gen_pool_create(PAGE_SHIFT, -1);
+ if (pool->size) {
+ pool->gpool = gen_pool_create(PAGE_SHIFT, -1);
- if (!pool->gpool) {
- pr_err("%s: domain %d: could not allocate iova"
- " pool. iommu programming will not work"
- " with iova space %d\n", __func__,
- i, j);
- continue;
- }
+ if (!pool->gpool) {
+ pr_err("%s: could not allocate pool\n",
+ __func__);
+ pr_err("%s: domain %d iova space %d\n",
+ __func__, i, j);
+ continue;
+ }
- if (gen_pool_add(pool->gpool, pool->paddr, pool->size,
- -1)) {
- pr_err("%s: domain %d: could not add memory to"
- " iova pool. iommu programming will not"
- " work with iova space %d\n", __func__,
- i, j);
- gen_pool_destroy(pool->gpool);
+ if (gen_pool_add(pool->gpool, pool->paddr,
+ pool->size, -1)) {
+ pr_err("%s: could not add memory\n",
+ __func__);
+ pr_err("%s: domain %d pool %d\n",
+ __func__, i, j);
+ gen_pool_destroy(pool->gpool);
+ pool->gpool = NULL;
+ continue;
+ }
+ } else {
pool->gpool = NULL;
- continue;
}
}
}
diff --git a/arch/arm/mach-msm/memory.c b/arch/arm/mach-msm/memory.c
index d26d76b..8dbf304 100644
--- a/arch/arm/mach-msm/memory.c
+++ b/arch/arm/mach-msm/memory.c
@@ -146,7 +146,7 @@
flush_axi_bus_buffer();
}
-void *alloc_bootmem_aligned(unsigned long size, unsigned long alignment)
+void * __init alloc_bootmem_aligned(unsigned long size, unsigned long alignment)
{
void *unused_addr = NULL;
unsigned long addr, tmp_size, unused_size;
diff --git a/arch/arm/mach-msm/msm-krait-l2-accessors.c b/arch/arm/mach-msm/msm-krait-l2-accessors.c
index b03e2d2..3d341e3 100644
--- a/arch/arm/mach-msm/msm-krait-l2-accessors.c
+++ b/arch/arm/mach-msm/msm-krait-l2-accessors.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -29,14 +29,13 @@
mb();
asm volatile ("mcr p15, 3, %[l2cpselr], c15, c0, 6\n\t"
+ "isb\n\t"
"mcr p15, 3, %[l2cpdr], c15, c0, 7\n\t"
- :
+ "isb\n\t"
+ "mrc p15, 3, %[l2cpdr_read], c15, c0, 7\n\t"
+ : [l2cpdr_read]"=r" (ret_val)
: [l2cpselr]"r" (reg_addr), [l2cpdr]"r" (val)
);
- isb();
- /* Ensure the value took */
- asm volatile ("mrc p15, 3, %0, c15, c0, 7" : "=r" (ret_val));
-
raw_spin_unlock_irqrestore(&l2_access_lock, flags);
return ret_val;
@@ -53,11 +52,12 @@
raw_spin_lock_irqsave(&l2_access_lock, flags);
mb();
asm volatile ("mcr p15, 3, %[l2cpselr], c15, c0, 6\n\t"
+ "isb\n\t"
"mcr p15, 3, %[l2cpdr], c15, c0, 7\n\t"
+ "isb\n\t"
:
: [l2cpselr]"r" (reg_addr), [l2cpdr]"r" (val)
);
- isb();
raw_spin_unlock_irqrestore(&l2_access_lock, flags);
}
EXPORT_SYMBOL(set_l2_indirect_reg);
@@ -72,6 +72,7 @@
raw_spin_lock_irqsave(&l2_access_lock, flags);
asm volatile ("mcr p15, 3, %[l2cpselr], c15, c0, 6\n\t"
+ "isb\n\t"
"mrc p15, 3, %[l2cpdr], c15, c0, 7\n\t"
: [l2cpdr]"=r" (val)
: [l2cpselr]"r" (reg_addr)
diff --git a/arch/arm/mach-msm/msm_cache_dump.c b/arch/arm/mach-msm/msm_cache_dump.c
new file mode 100644
index 0000000..40c358a
--- /dev/null
+++ b/arch/arm/mach-msm/msm_cache_dump.c
@@ -0,0 +1,100 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/workqueue.h>
+#include <linux/platform_device.h>
+#include <linux/pm.h>
+#include <linux/memory_alloc.h>
+#include <mach/scm.h>
+#include <mach/msm_cache_dump.h>
+#include <mach/memory.h>
+#include <mach/msm_iomap.h>
+
+#define L2C_IMEM_ADDR 0x2a03f014
+
+static unsigned long msm_cache_dump_addr;
+
+/*
+ * These are dummy pointers so the defintion of l1_cache_dump
+ * and l2_cache_dump don't get optimized away. If they aren't
+ * referenced, the structure definitions don't show up in the
+ * debugging information which is needed for post processing.
+ */
+static struct l1_cache_dump __used *l1_dump;
+static struct l2_cache_dump __used *l2_dump;
+
+static int msm_cache_dump_probe(struct platform_device *pdev)
+{
+ struct msm_cache_dump_platform_data *d = pdev->dev.platform_data;
+ int ret;
+ struct {
+ unsigned long buf;
+ unsigned long size;
+ } l1_cache_data;
+ unsigned int *imem_loc;
+ void *temp;
+ unsigned long total_size = d->l1_size + d->l2_size;
+
+ msm_cache_dump_addr = allocate_contiguous_ebi_nomap(total_size, SZ_4K);
+
+ if (!msm_cache_dump_addr) {
+ pr_err("%s: Could not get memory for cache dumping\n",
+ __func__);
+ return -ENOMEM;
+ }
+
+ temp = ioremap(msm_cache_dump_addr, total_size);
+ memset(temp, 0xFF, total_size);
+ iounmap(temp);
+
+ l1_cache_data.buf = msm_cache_dump_addr;
+ l1_cache_data.size = d->l1_size;
+
+ ret = scm_call(L1C_SERVICE_ID, L1C_BUFFER_SET_COMMAND_ID,
+ &l1_cache_data, sizeof(l1_cache_data), NULL, 0);
+
+ if (ret)
+ pr_err("%s: could not register L1 buffer ret = %d.\n",
+ __func__, ret);
+
+ imem_loc = ioremap(L2C_IMEM_ADDR, SZ_4K);
+ __raw_writel(msm_cache_dump_addr + d->l1_size, imem_loc);
+ iounmap(imem_loc);
+
+ return 0;
+}
+
+static struct platform_driver msm_cache_dump_driver = {
+ .driver = {
+ .name = "msm_cache_dump",
+ .owner = THIS_MODULE
+ },
+};
+
+static int __init msm_cache_dump_init(void)
+{
+ return platform_driver_probe(&msm_cache_dump_driver,
+ msm_cache_dump_probe);
+}
+
+static void __exit msm_cache_dump_exit(void)
+{
+ platform_driver_unregister(&msm_cache_dump_driver);
+}
+late_initcall(msm_cache_dump_init);
+module_exit(msm_cache_dump_exit)
diff --git a/arch/arm/mach-msm/msm_watchdog.c b/arch/arm/mach-msm/msm_watchdog.c
index 994dca6..aabb644 100644
--- a/arch/arm/mach-msm/msm_watchdog.c
+++ b/arch/arm/mach-msm/msm_watchdog.c
@@ -23,6 +23,8 @@
#include <linux/suspend.h>
#include <linux/percpu.h>
#include <linux/interrupt.h>
+#include <asm/fiq.h>
+#include <asm/hardware/gic.h>
#include <mach/msm_iomap.h>
#include <asm/mach-types.h>
#include <mach/scm.h>
@@ -42,6 +44,8 @@
#define WDT_HZ 32768
+struct msm_watchdog_dump msm_dump_cpu_ctx;
+
static void __iomem *msm_tmr0_base;
static unsigned long delay_time;
@@ -78,6 +82,8 @@
static int appsbark;
module_param(appsbark, int, 0);
+static int appsbark_fiq;
+
/*
* Use /sys/module/msm_watchdog/parameters/print_all_stacks
* to control whether stacks of all running
@@ -96,6 +102,13 @@
static DECLARE_DELAYED_WORK(dogwork_struct, pet_watchdog_work);
static DECLARE_WORK(init_dogwork_struct, init_watchdog_work);
+/* Called from the FIQ bark handler */
+void msm_wdog_bark_fin(void)
+{
+ pr_crit("\nApps Watchdog bark received - Calling Panic\n");
+ panic("Apps Watchdog Bark received\n");
+}
+
static int msm_watchdog_suspend(struct device *dev)
{
if (!enable)
@@ -166,9 +179,11 @@
free_irq(WDT0_ACCSCSSNBARK_INT, 0);
} else {
disable_percpu_irq(WDT0_ACCSCSSNBARK_INT);
- free_percpu_irq(WDT0_ACCSCSSNBARK_INT,
- percpu_pdata);
- free_percpu(percpu_pdata);
+ if (!appsbark_fiq) {
+ free_percpu_irq(WDT0_ACCSCSSNBARK_INT,
+ percpu_pdata);
+ free_percpu(percpu_pdata);
+ }
}
enable = 0;
atomic_notifier_chain_unregister(&panic_notifier_list,
@@ -231,8 +246,11 @@
free_irq(WDT0_ACCSCSSNBARK_INT, 0);
} else {
disable_percpu_irq(WDT0_ACCSCSSNBARK_INT);
- free_percpu_irq(WDT0_ACCSCSSNBARK_INT, percpu_pdata);
- free_percpu(percpu_pdata);
+ if (!appsbark_fiq) {
+ free_percpu_irq(WDT0_ACCSCSSNBARK_INT,
+ percpu_pdata);
+ free_percpu(percpu_pdata);
+ }
}
enable = 0;
/* In case we got suspended mid-exit */
@@ -329,26 +347,35 @@
__raw_writel(1, msm_tmr0_base + WDT0_RST);
last_pet = sched_clock();
+ if (!has_vic)
+ enable_percpu_irq(WDT0_ACCSCSSNBARK_INT, IRQ_TYPE_EDGE_RISING);
+
printk(KERN_INFO "MSM Watchdog Initialized\n");
return;
}
+struct fiq_handler wdog_fh = {
+ .name = MODULE_NAME,
+};
+
static int msm_watchdog_probe(struct platform_device *pdev)
{
struct msm_watchdog_pdata *pdata = pdev->dev.platform_data;
int ret;
+ void *stack;
if (!enable || !pdata || !pdata->pet_time || !pdata->bark_time) {
printk(KERN_INFO "MSM Watchdog Not Initialized\n");
return -ENODEV;
}
- if (!pdata->has_secure)
- appsbark = 1;
-
bark_time = pdata->bark_time;
has_vic = pdata->has_vic;
+ if (!pdata->has_secure) {
+ appsbark = 1;
+ appsbark_fiq = pdata->use_kernel_fiq;
+ }
msm_tmr0_base = msm_timer_get_timer0_base();
@@ -357,6 +384,18 @@
"apps_wdog_bark", NULL);
if (ret)
return ret;
+ } else if (appsbark_fiq) {
+ claim_fiq(&wdog_fh);
+ set_fiq_handler(&msm_wdog_fiq_start, msm_wdog_fiq_length);
+ stack = (void *)__get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER);
+ if (!stack) {
+ pr_info("No free pages available - %s fails\n",
+ __func__);
+ return -ENOMEM;
+ }
+
+ msm_wdog_fiq_setup(stack);
+ gic_set_irq_secure(WDT0_ACCSCSSNBARK_INT);
} else {
percpu_pdata = alloc_percpu(struct msm_watchdog_pdata *);
if (!percpu_pdata) {
@@ -373,8 +412,6 @@
free_percpu(percpu_pdata);
return ret;
}
-
- enable_percpu_irq(WDT0_ACCSCSSNBARK_INT, IRQ_TYPE_EDGE_RISING);
}
/*
diff --git a/arch/arm/mach-msm/msm_watchdog.h b/arch/arm/mach-msm/msm_watchdog.h
index 7156dfc..00ff0b6 100644
--- a/arch/arm/mach-msm/msm_watchdog.h
+++ b/arch/arm/mach-msm/msm_watchdog.h
@@ -21,8 +21,53 @@
bool has_secure;
bool needs_expired_enable;
bool has_vic;
+ /* You have to be running in secure mode to use FIQ */
+ bool use_kernel_fiq;
};
+struct msm_watchdog_dump {
+ uint32_t magic;
+ uint32_t curr_cpsr;
+ uint32_t usr_r0;
+ uint32_t usr_r1;
+ uint32_t usr_r2;
+ uint32_t usr_r3;
+ uint32_t usr_r4;
+ uint32_t usr_r5;
+ uint32_t usr_r6;
+ uint32_t usr_r7;
+ uint32_t usr_r8;
+ uint32_t usr_r9;
+ uint32_t usr_r10;
+ uint32_t usr_r11;
+ uint32_t usr_r12;
+ uint32_t usr_r13;
+ uint32_t usr_r14;
+ uint32_t irq_spsr;
+ uint32_t irq_r13;
+ uint32_t irq_r14;
+ uint32_t svc_spsr;
+ uint32_t svc_r13;
+ uint32_t svc_r14;
+ uint32_t abt_spsr;
+ uint32_t abt_r13;
+ uint32_t abt_r14;
+ uint32_t und_spsr;
+ uint32_t und_r13;
+ uint32_t und_r14;
+ uint32_t fiq_spsr;
+ uint32_t fiq_r8;
+ uint32_t fiq_r9;
+ uint32_t fiq_r10;
+ uint32_t fiq_r11;
+ uint32_t fiq_r12;
+ uint32_t fiq_r13;
+ uint32_t fiq_r14;
+};
+
+void msm_wdog_fiq_setup(void *stack);
+extern unsigned int msm_wdog_fiq_length, msm_wdog_fiq_start;
+
#ifdef CONFIG_MSM_WATCHDOG
void pet_watchdog(void);
#else
diff --git a/arch/arm/mach-msm/msm_watchdog_asm.S b/arch/arm/mach-msm/msm_watchdog_asm.S
new file mode 100644
index 0000000..c0377d6
--- /dev/null
+++ b/arch/arm/mach-msm/msm_watchdog_asm.S
@@ -0,0 +1,84 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+#define VERSION_ID 0x1
+#define MAGIC 0xDEAD0000 | VERSION_ID
+
+ .text
+
+ .align 3
+
+ENTRY(msm_wdog_fiq_start)
+ mov sp, r8 @get stack
+ ldr r8, Ldump_cpu_ctx
+ @ store magic to indicate a valid dump
+ ldr r9, Lmagic
+ str r9, [r8], #4
+ @ get the current cpsr
+ mrs r9, cpsr
+ str r9, [r8],#4
+ @ get the USR r0-r7
+ stmia r8!, {r0-r7}
+ mov r4, r8
+ mov r5, #PSR_I_BIT | PSR_F_BIT | SYSTEM_MODE
+ msr cpsr_c, r5 @ select SYSTEM mode
+ stmia r4!, {r8-r14}
+ mov r5, #PSR_I_BIT | PSR_F_BIT | IRQ_MODE
+ msr cpsr_c, r5 @ select IRQ mode
+ mrs r5, spsr
+ str r5, [r4], #4
+ stmia r4!, {r13-r14}
+ mov r5, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
+ msr cpsr_c, r5 @ select SVC mode
+ mrs r5, spsr
+ str r5, [r4], #4
+ stmia r4!, {r13-r14}
+ mov r5, #PSR_I_BIT | PSR_F_BIT | ABT_MODE
+ msr cpsr_c, r5 @ select ABT mode
+ mrs r5, spsr
+ str r5, [r4], #4
+ stmia r4!, {r13-r14}
+ mov r5, #PSR_I_BIT | PSR_F_BIT | UND_MODE
+ msr cpsr_c, r5 @ select UND mode
+ mrs r5, spsr
+ str r5, [r4], #4
+ stmia r4!, {r13-r14}
+ mov r5, #PSR_I_BIT | PSR_F_BIT | FIQ_MODE
+ msr cpsr_c, r5 @ select FIQ mode
+ mrs r5, spsr
+ str r5, [r4], #4
+ stmia r4!, {r8-r14}
+ dsb
+ mov r5, #PSR_F_BIT | SVC_MODE
+ msr cpsr_c, r5 @ select SVC mode
+ ldr r2, Lwatchdog_bark_fin
+ blx r2
+Ldump_cpu_ctx:
+ .word msm_dump_cpu_ctx
+Lmagic:
+ .word MAGIC
+Lwatchdog_bark_fin:
+ .word msm_wdog_bark_fin
+ENTRY(msm_wdog_fiq_length)
+ .word . - msm_wdog_fiq_start
+
+/* setup the stack */
+ENTRY(msm_wdog_fiq_setup)
+ mrs r3, cpsr
+ msr cpsr_c, #(FIQ_MODE | PSR_I_BIT | PSR_F_BIT)
+ mov r8, r0
+ msr cpsr_c, r3
+ bx lr
diff --git a/arch/arm/mach-msm/pil-modem.c b/arch/arm/mach-msm/pil-modem.c
index 80e0ac9..998e606 100644
--- a/arch/arm/mach-msm/pil-modem.c
+++ b/arch/arm/mach-msm/pil-modem.c
@@ -18,7 +18,6 @@
#include <linux/elf.h>
#include <linux/delay.h>
#include <linux/err.h>
-#include <linux/workqueue.h>
#include <linux/clk.h>
#include <mach/msm_iomap.h>
@@ -48,42 +47,32 @@
#define PLL8_STATUS (MSM_CLK_CTL_BASE + 0x3158)
#define CLK_HALT_MSS_SMPSS_MISC_STATE (MSM_CLK_CTL_BASE + 0x2FDC)
-#define PROXY_VOTE_TIMEOUT 10000
-
struct modem_data {
void __iomem *base;
unsigned long start_addr;
struct pil_device *pil;
struct clk *xo;
- struct delayed_work work;
};
-static int make_modem_proxy_votes(struct device *dev)
+static int make_modem_proxy_votes(struct pil_desc *pil)
{
int ret;
- struct modem_data *drv = dev_get_drvdata(dev);
+ struct modem_data *drv = dev_get_drvdata(pil->dev);
ret = clk_prepare_enable(drv->xo);
if (ret) {
- dev_err(dev, "Failed to enable XO\n");
+ dev_err(pil->dev, "Failed to enable XO\n");
return ret;
}
- schedule_delayed_work(&drv->work, msecs_to_jiffies(PROXY_VOTE_TIMEOUT));
return 0;
}
-static void remove_modem_proxy_votes(struct work_struct *work)
+static void remove_modem_proxy_votes(struct pil_desc *pil)
{
- struct modem_data *drv;
- drv = container_of(work, struct modem_data, work.work);
+ struct modem_data *drv = dev_get_drvdata(pil->dev);
clk_disable_unprepare(drv->xo);
}
-static void remove_modem_proxy_votes_now(struct modem_data *drv)
-{
- flush_delayed_work(&drv->work);
-}
-
static int modem_init_image(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
@@ -96,13 +85,8 @@
static int modem_reset(struct pil_desc *pil)
{
u32 reg;
- int ret;
const struct modem_data *drv = dev_get_drvdata(pil->dev);
- ret = make_modem_proxy_votes(pil->dev);
- if (ret)
- return ret;
-
/* Put modem AHB0,1,2 clocks into reset */
writel_relaxed(BIT(0) | BIT(1), MAHB0_SFAB_PORT_RESET);
writel_relaxed(BIT(7), MAHB1_CLK_CTL);
@@ -180,7 +164,6 @@
static int modem_shutdown(struct pil_desc *pil)
{
u32 reg;
- struct modem_data *drv = dev_get_drvdata(pil->dev);
/* Put modem into reset */
writel_relaxed(0x1, MARM_RESET);
@@ -214,8 +197,6 @@
/* Clear modem's votes for PLLs */
writel_relaxed(0x0, PLL_ENA_MARM);
- remove_modem_proxy_votes_now(drv);
-
return 0;
}
@@ -223,6 +204,8 @@
.init_image = modem_init_image,
.auth_and_reset = modem_reset,
.shutdown = modem_shutdown,
+ .proxy_vote = make_modem_proxy_votes,
+ .proxy_unvote = remove_modem_proxy_votes,
};
static int modem_init_image_trusted(struct pil_desc *pil, const u8 *metadata,
@@ -233,37 +216,20 @@
static int modem_reset_trusted(struct pil_desc *pil)
{
- int ret;
- struct modem_data *drv = dev_get_drvdata(pil->dev);
-
- ret = make_modem_proxy_votes(pil->dev);
- if (ret)
- return ret;
-
- ret = pas_auth_and_reset(PAS_MODEM);
- if (ret)
- remove_modem_proxy_votes_now(drv);
-
- return ret;
+ return pas_auth_and_reset(PAS_MODEM);
}
static int modem_shutdown_trusted(struct pil_desc *pil)
{
- int ret;
- struct modem_data *drv = dev_get_drvdata(pil->dev);
-
- ret = pas_shutdown(PAS_MODEM);
- if (ret)
- return ret;
-
- remove_modem_proxy_votes_now(drv);
- return 0;
+ return pas_shutdown(PAS_MODEM);
}
static struct pil_reset_ops pil_modem_ops_trusted = {
.init_image = modem_init_image_trusted,
.auth_and_reset = modem_reset_trusted,
.shutdown = modem_shutdown_trusted,
+ .proxy_vote = make_modem_proxy_votes,
+ .proxy_unvote = remove_modem_proxy_votes,
};
static int __devinit pil_modem_driver_probe(struct platform_device *pdev)
@@ -297,6 +263,7 @@
desc->depends_on = "q6";
desc->dev = &pdev->dev;
desc->owner = THIS_MODULE;
+ desc->proxy_timeout = 10000;
if (pas_supported(PAS_MODEM) > 0) {
desc->ops = &pil_modem_ops_trusted;
@@ -305,11 +272,8 @@
desc->ops = &pil_modem_ops;
dev_info(&pdev->dev, "using non-secure boot\n");
}
- INIT_DELAYED_WORK(&drv->work, remove_modem_proxy_votes);
-
drv->pil = msm_pil_register(desc);
if (IS_ERR(drv->pil)) {
- flush_delayed_work_sync(&drv->work);
clk_put(drv->xo);
return PTR_ERR(drv->pil);
}
@@ -320,7 +284,6 @@
{
struct modem_data *drv = platform_get_drvdata(pdev);
msm_pil_unregister(drv->pil);
- flush_delayed_work_sync(&drv->work);
clk_put(drv->xo);
return 0;
}
diff --git a/arch/arm/mach-msm/pil-q6v3.c b/arch/arm/mach-msm/pil-q6v3.c
index 6c00ae7..235d881 100644
--- a/arch/arm/mach-msm/pil-q6v3.c
+++ b/arch/arm/mach-msm/pil-q6v3.c
@@ -19,7 +19,6 @@
#include <linux/elf.h>
#include <linux/err.h>
#include <linux/clk.h>
-#include <linux/workqueue.h>
#include <mach/msm_iomap.h>
@@ -61,14 +60,11 @@
#define Q6_STRAP_TCM_BASE (0x28C << 15)
#define Q6_STRAP_TCM_CONFIG 0x28B
-#define PROXY_VOTE_TIMEOUT 10000
-
struct q6v3_data {
void __iomem *base;
unsigned long start_addr;
struct pil_device *pil;
struct clk *pll;
- struct delayed_work work;
};
static int pil_q6v3_init_image(struct pil_desc *pil, const u8 *metadata,
@@ -80,41 +76,30 @@
return 0;
}
-static void q6v3_remove_proxy_votes(struct work_struct *work)
+static void pil_q6v3_remove_proxy_votes(struct pil_desc *pil)
{
- struct q6v3_data *drv = container_of(work, struct q6v3_data, work.work);
+ struct q6v3_data *drv = dev_get_drvdata(pil->dev);
clk_disable_unprepare(drv->pll);
}
-static int q6v3_make_proxy_votes(struct device *dev)
+static int pil_q6v3_make_proxy_votes(struct pil_desc *pil)
{
int ret;
- struct q6v3_data *drv = dev_get_drvdata(dev);
+ struct q6v3_data *drv = dev_get_drvdata(pil->dev);
ret = clk_prepare_enable(drv->pll);
if (ret) {
- dev_err(dev, "Failed to enable PLL\n");
+ dev_err(pil->dev, "Failed to enable PLL\n");
return ret;
}
- schedule_delayed_work(&drv->work, msecs_to_jiffies(PROXY_VOTE_TIMEOUT));
return 0;
}
-static void q6v3_remove_proxy_votes_now(struct q6v3_data *drv)
-{
- flush_delayed_work(&drv->work);
-}
-
static int pil_q6v3_reset(struct pil_desc *pil)
{
u32 reg;
- int ret;
struct q6v3_data *drv = dev_get_drvdata(pil->dev);
- ret = q6v3_make_proxy_votes(pil->dev);
- if (ret)
- return ret;
-
/* Put Q6 into reset */
reg = readl_relaxed(LCC_Q6_FUNC);
reg |= Q6SS_SS_ARES | Q6SS_ISDB_ARES | Q6SS_ETM_ARES | STOP_CORE |
@@ -159,7 +144,6 @@
static int pil_q6v3_shutdown(struct pil_desc *pil)
{
u32 reg;
- struct q6v3_data *drv = dev_get_drvdata(pil->dev);
/* Put Q6 into reset */
reg = readl_relaxed(LCC_Q6_FUNC);
@@ -179,8 +163,6 @@
reg |= CLAMP_IO;
writel_relaxed(reg, LCC_Q6_FUNC);
- q6v3_remove_proxy_votes_now(drv);
-
return 0;
}
@@ -188,6 +170,8 @@
.init_image = pil_q6v3_init_image,
.auth_and_reset = pil_q6v3_reset,
.shutdown = pil_q6v3_shutdown,
+ .proxy_vote = pil_q6v3_make_proxy_votes,
+ .proxy_unvote = pil_q6v3_remove_proxy_votes,
};
static int pil_q6v3_init_image_trusted(struct pil_desc *pil,
@@ -198,31 +182,20 @@
static int pil_q6v3_reset_trusted(struct pil_desc *pil)
{
- int ret;
- ret = q6v3_make_proxy_votes(pil->dev);
- if (ret)
- return ret;
return pas_auth_and_reset(PAS_Q6);
}
static int pil_q6v3_shutdown_trusted(struct pil_desc *pil)
{
- int ret;
- struct q6v3_data *drv = dev_get_drvdata(pil->dev);
-
- ret = pas_shutdown(PAS_Q6);
- if (ret)
- return ret;
-
- q6v3_remove_proxy_votes_now(drv);
-
- return 0;
+ return pas_shutdown(PAS_Q6);
}
static struct pil_reset_ops pil_q6v3_ops_trusted = {
.init_image = pil_q6v3_init_image_trusted,
.auth_and_reset = pil_q6v3_reset_trusted,
.shutdown = pil_q6v3_shutdown_trusted,
+ .proxy_vote = pil_q6v3_make_proxy_votes,
+ .proxy_unvote = pil_q6v3_remove_proxy_votes,
};
static int __devinit pil_q6v3_driver_probe(struct platform_device *pdev)
@@ -255,6 +228,7 @@
desc->name = "q6";
desc->dev = &pdev->dev;
desc->owner = THIS_MODULE;
+ desc->proxy_timeout = 10000;
if (pas_supported(PAS_Q6) > 0) {
desc->ops = &pil_q6v3_ops_trusted;
@@ -264,11 +238,8 @@
dev_info(&pdev->dev, "using non-secure boot\n");
}
- INIT_DELAYED_WORK(&drv->work, q6v3_remove_proxy_votes);
-
drv->pil = msm_pil_register(desc);
if (IS_ERR(drv->pil)) {
- flush_delayed_work_sync(&drv->work);
return PTR_ERR(drv->pil);
}
return 0;
@@ -278,7 +249,6 @@
{
struct q6v3_data *drv = platform_get_drvdata(pdev);
msm_pil_unregister(drv->pil);
- flush_delayed_work_sync(&drv->work);
return 0;
}
diff --git a/arch/arm/mach-msm/pil-q6v4.c b/arch/arm/mach-msm/pil-q6v4.c
index eabc095..b6ea03b 100644
--- a/arch/arm/mach-msm/pil-q6v4.c
+++ b/arch/arm/mach-msm/pil-q6v4.c
@@ -376,7 +376,7 @@
if (!desc)
return -ENOMEM;
- drv->pll_supply = regulator_get(&pdev->dev, "pll_vdd");
+ drv->pll_supply = devm_regulator_get(&pdev->dev, "pll_vdd");
if (IS_ERR(drv->pll_supply)) {
drv->pll_supply = NULL;
} else {
@@ -407,7 +407,7 @@
dev_info(&pdev->dev, "using non-secure boot\n");
}
- drv->vreg = regulator_get(&pdev->dev, "core_vdd");
+ drv->vreg = devm_regulator_get(&pdev->dev, "core_vdd");
if (IS_ERR(drv->vreg)) {
ret = PTR_ERR(drv->vreg);
goto err;
@@ -416,7 +416,7 @@
drv->xo = clk_get(&pdev->dev, "xo");
if (IS_ERR(drv->xo)) {
ret = PTR_ERR(drv->xo);
- goto err_xo;
+ goto err;
}
drv->pil = msm_pil_register(desc);
@@ -427,10 +427,7 @@
return 0;
err_pil:
clk_put(drv->xo);
-err_xo:
- regulator_put(drv->vreg);
err:
- regulator_put(drv->pll_supply);
return ret;
}
@@ -438,8 +435,6 @@
{
struct q6v4_data *drv = platform_get_drvdata(pdev);
clk_put(drv->xo);
- regulator_put(drv->vreg);
- regulator_put(drv->pll_supply);
msm_pil_unregister(drv->pil);
return 0;
}
diff --git a/arch/arm/mach-msm/pil-riva.c b/arch/arm/mach-msm/pil-riva.c
index 0b79fd6..92339e9 100644
--- a/arch/arm/mach-msm/pil-riva.c
+++ b/arch/arm/mach-msm/pil-riva.c
@@ -341,7 +341,7 @@
if (!desc)
return -ENOMEM;
- drv->pll_supply = regulator_get(&pdev->dev, "pll_vdd");
+ drv->pll_supply = devm_regulator_get(&pdev->dev, "pll_vdd");
if (IS_ERR(drv->pll_supply)) {
dev_err(&pdev->dev, "failed to get pll supply\n");
return PTR_ERR(drv->pll_supply);
@@ -390,7 +390,6 @@
err_register:
clk_put(drv->xo);
err:
- regulator_put(drv->pll_supply);
return ret;
}
@@ -399,7 +398,6 @@
struct riva_data *drv = platform_get_drvdata(pdev);
msm_pil_unregister(drv->pil);
clk_put(drv->xo);
- regulator_put(drv->pll_supply);
return 0;
}
diff --git a/arch/arm/mach-msm/pm-boot.c b/arch/arm/mach-msm/pm-boot.c
index 80e5a55..8d4ca8b 100644
--- a/arch/arm/mach-msm/pm-boot.c
+++ b/arch/arm/mach-msm/pm-boot.c
@@ -181,8 +181,6 @@
__raw_writel(readl_relaxed(pdata->v_addr +
MPA5_CFG_CTL_REG) | BIT(26),
pdata->v_addr + MPA5_CFG_CTL_REG);
-
- msm_pm_boot_before_pc = msm_pm_write_boot_vector;
}
break;
default:
diff --git a/arch/arm/mach-msm/qdsp5/audio_lpa.c b/arch/arm/mach-msm/qdsp5/audio_lpa.c
index 9521e87..8760e443 100644
--- a/arch/arm/mach-msm/qdsp5/audio_lpa.c
+++ b/arch/arm/mach-msm/qdsp5/audio_lpa.c
@@ -73,7 +73,7 @@
/* Size must be power of 2 */
#define MAX_BUF 2
-#define BUFSZ (167210)
+#define BUFSZ (1024000)
#define AUDDEC_DEC_PCM 0
diff --git a/arch/arm/mach-msm/qdss-etb.c b/arch/arm/mach-msm/qdss-etb.c
index 8b5f8db..96eba26 100644
--- a/arch/arm/mach-msm/qdss-etb.c
+++ b/arch/arm/mach-msm/qdss-etb.c
@@ -318,7 +318,7 @@
return ret;
}
-static void etb_sysfs_exit(void)
+static void __exit etb_sysfs_exit(void)
{
sysfs_remove_file(etb.kobj, &trigger_cntr_attr.attr);
kobject_put(etb.kobj);
@@ -371,7 +371,7 @@
return ret;
}
-static int etb_remove(struct platform_device *pdev)
+static int __devexit etb_remove(struct platform_device *pdev)
{
if (etb.enabled)
etb_disable();
@@ -386,18 +386,23 @@
static struct platform_driver etb_driver = {
.probe = etb_probe,
- .remove = etb_remove,
+ .remove = __devexit_p(etb_remove),
.driver = {
.name = "msm_etb",
},
};
-int __init etb_init(void)
+static int __init etb_init(void)
{
return platform_driver_register(&etb_driver);
}
+module_init(etb_init);
-void etb_exit(void)
+static void __exit etb_exit(void)
{
platform_driver_unregister(&etb_driver);
}
+module_exit(etb_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("CoreSight Embedded Trace Buffer driver");
diff --git a/arch/arm/mach-msm/qdss-etm.c b/arch/arm/mach-msm/qdss-etm.c
index eeb7519..251db45 100644
--- a/arch/arm/mach-msm/qdss-etm.c
+++ b/arch/arm/mach-msm/qdss-etm.c
@@ -156,6 +156,7 @@
bool enabled;
struct wake_lock wake_lock;
struct pm_qos_request_list qos_req;
+ struct qdss_source *src;
struct mutex mutex;
struct device *dev;
struct kobject *kobj;
@@ -339,10 +340,6 @@
goto err;
}
- ret = qdss_clk_enable();
- if (ret)
- goto err;
-
wake_lock(&etm.wake_lock);
/* 1. causes all online cpus to come out of idle PC
* 2. prevents idle PC until save restore flag is enabled atomically
@@ -353,11 +350,10 @@
*/
pm_qos_update_request(&etm.qos_req, 0);
- etb_disable();
- tpiu_disable();
- /* enable ETB first to avoid loosing any trace data */
- etb_enable();
- funnel_enable(0x0, 0x3);
+ ret = qdss_enable(etm.src);
+ if (ret)
+ goto err_qdss;
+
for_each_online_cpu(cpu)
__etm_enable(cpu);
@@ -368,6 +364,10 @@
dev_info(etm.dev, "ETM tracing enabled\n");
return 0;
+
+err_qdss:
+ pm_qos_update_request(&etm.qos_req, PM_QOS_DEFAULT_VALUE);
+ wake_unlock(&etm.wake_lock);
err:
return ret;
}
@@ -407,17 +407,14 @@
for_each_online_cpu(cpu)
__etm_disable(cpu);
- etb_dump();
- etb_disable();
- funnel_disable(0x0, 0x3);
+
+ qdss_disable(etm.src);
etm.enabled = false;
pm_qos_update_request(&etm.qos_req, PM_QOS_DEFAULT_VALUE);
wake_unlock(&etm.wake_lock);
- qdss_clk_disable();
-
dev_info(etm.dev, "ETM tracing disabled\n");
return 0;
err:
@@ -1151,14 +1148,14 @@
return ret;
}
-static void etm_sysfs_exit(void)
+static void __exit etm_sysfs_exit(void)
{
sysfs_remove_group(etm.kobj, &etm_attr_grp);
sysfs_remove_file(etm.kobj, &enabled_attr.attr);
kobject_put(etm.kobj);
}
-static bool etm_arch_supported(uint8_t arch)
+static bool __init etm_arch_supported(uint8_t arch)
{
switch (arch) {
case PFT_ARCH_V1_1:
@@ -1249,6 +1246,12 @@
wake_lock_init(&etm.wake_lock, WAKE_LOCK_SUSPEND, "msm_etm");
pm_qos_add_request(&etm.qos_req, PM_QOS_CPU_DMA_LATENCY,
PM_QOS_DEFAULT_VALUE);
+ etm.src = qdss_get("msm_etm");
+ if (IS_ERR(etm.src)) {
+ ret = PTR_ERR(etm.src);
+ goto err_qdssget;
+ }
+
ret = qdss_clk_enable();
if (ret)
goto err_clk;
@@ -1276,6 +1279,8 @@
err_arch:
qdss_clk_disable();
err_clk:
+ qdss_put(etm.src);
+err_qdssget:
pm_qos_remove_request(&etm.qos_req);
wake_lock_destroy(&etm.wake_lock);
mutex_destroy(&etm.mutex);
@@ -1286,11 +1291,12 @@
return ret;
}
-static int etm_remove(struct platform_device *pdev)
+static int __devexit etm_remove(struct platform_device *pdev)
{
if (etm.enabled)
etm_disable();
etm_sysfs_exit();
+ qdss_put(etm.src);
pm_qos_remove_request(&etm.qos_req);
wake_lock_destroy(&etm.wake_lock);
mutex_destroy(&etm.mutex);
@@ -1301,7 +1307,7 @@
static struct platform_driver etm_driver = {
.probe = etm_probe,
- .remove = etm_remove,
+ .remove = __devexit_p(etm_remove),
.driver = {
.name = "msm_etm",
},
@@ -1311,8 +1317,13 @@
{
return platform_driver_register(&etm_driver);
}
+module_init(etm_init);
-void etm_exit(void)
+void __exit etm_exit(void)
{
platform_driver_unregister(&etm_driver);
}
+module_exit(etm_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("CoreSight Program Flow Trace driver");
diff --git a/arch/arm/mach-msm/qdss-funnel.c b/arch/arm/mach-msm/qdss-funnel.c
index 990295b..2d80603 100644
--- a/arch/arm/mach-msm/qdss-funnel.c
+++ b/arch/arm/mach-msm/qdss-funnel.c
@@ -159,7 +159,7 @@
return ret;
}
-static void funnel_sysfs_exit(void)
+static void __exit funnel_sysfs_exit(void)
{
sysfs_remove_file(funnel.kobj, &priority_attr.attr);
kobject_put(funnel.kobj);
@@ -197,7 +197,7 @@
return ret;
}
-static int funnel_remove(struct platform_device *pdev)
+static int __devexit funnel_remove(struct platform_device *pdev)
{
if (funnel.enabled)
funnel_disable(0x0, 0xFF);
@@ -210,18 +210,23 @@
static struct platform_driver funnel_driver = {
.probe = funnel_probe,
- .remove = funnel_remove,
+ .remove = __devexit_p(funnel_remove),
.driver = {
.name = "msm_funnel",
},
};
-int __init funnel_init(void)
+static int __init funnel_init(void)
{
return platform_driver_register(&funnel_driver);
}
+module_init(funnel_init);
-void funnel_exit(void)
+static void __exit funnel_exit(void)
{
platform_driver_unregister(&funnel_driver);
}
+module_exit(funnel_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("CoreSight Funnel driver");
diff --git a/arch/arm/mach-msm/qdss-priv.h b/arch/arm/mach-msm/qdss-priv.h
index b9f3072..f39bc52 100644
--- a/arch/arm/mach-msm/qdss-priv.h
+++ b/arch/arm/mach-msm/qdss-priv.h
@@ -58,15 +58,6 @@
#define BMVAL(val, lsb, msb) ((val & BM(lsb, msb)) >> lsb)
#define BVAL(val, n) ((val & BIT(n)) >> n)
-int etb_init(void);
-void etb_exit(void);
-int tpiu_init(void);
-void tpiu_exit(void);
-int funnel_init(void);
-void funnel_exit(void);
-int etm_init(void);
-void etm_exit(void);
-
void etb_enable(void);
void etb_disable(void);
void etb_dump(void);
diff --git a/arch/arm/mach-msm/qdss-tpiu.c b/arch/arm/mach-msm/qdss-tpiu.c
index 4481a0a..fa15635 100644
--- a/arch/arm/mach-msm/qdss-tpiu.c
+++ b/arch/arm/mach-msm/qdss-tpiu.c
@@ -108,7 +108,7 @@
return ret;
}
-static int tpiu_remove(struct platform_device *pdev)
+static int __devexit tpiu_remove(struct platform_device *pdev)
{
if (tpiu.enabled)
tpiu_disable();
@@ -119,18 +119,23 @@
static struct platform_driver tpiu_driver = {
.probe = tpiu_probe,
- .remove = tpiu_remove,
+ .remove = __devexit_p(tpiu_remove),
.driver = {
.name = "msm_tpiu",
},
};
-int __init tpiu_init(void)
+static int __init tpiu_init(void)
{
return platform_driver_register(&tpiu_driver);
}
+module_init(tpiu_init);
-void tpiu_exit(void)
+static void __exit tpiu_exit(void)
{
platform_driver_unregister(&tpiu_driver);
}
+module_exit(tpiu_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("CoreSight Trace Port Interface Unit driver");
diff --git a/arch/arm/mach-msm/qdss.c b/arch/arm/mach-msm/qdss.c
index 80ec65a..cfe65ad 100644
--- a/arch/arm/mach-msm/qdss.c
+++ b/arch/arm/mach-msm/qdss.c
@@ -24,26 +24,155 @@
#include "rpm_resources.h"
#include "qdss-priv.h"
+#define MAX_STR_LEN (65535)
+
enum {
QDSS_CLK_OFF,
QDSS_CLK_ON_DBG,
QDSS_CLK_ON_HSDBG,
};
+/*
+ * Exclusion rules for structure fields.
+ *
+ * S: qdss.sources_mutex protected.
+ * I: qdss.sink_mutex protected.
+ * C: qdss.clk_mutex protected.
+ */
struct qdss_ctx {
- struct kobject *modulekobj;
- uint8_t max_clk;
- uint8_t clk_count;
- struct mutex clk_mutex;
+ struct kobject *modulekobj;
+ struct msm_qdss_platform_data *pdata;
+ struct list_head sources; /* S: sources list */
+ struct mutex sources_mutex;
+ uint8_t sink_count; /* I: sink count */
+ struct mutex sink_mutex;
+ uint8_t max_clk;
+ uint8_t clk_count; /* C: clk count */
+ struct mutex clk_mutex;
};
static struct qdss_ctx qdss;
-
-struct kobject *qdss_get_modulekobj(void)
+/**
+ * qdss_get - get the qdss source handle
+ * @name: name of the qdss source
+ *
+ * Searches the sources list to get the qdss source handle for this source.
+ *
+ * CONTEXT:
+ * Typically called from init or probe functions
+ *
+ * RETURNS:
+ * pointer to struct qdss_source on success, %NULL on failure
+ */
+struct qdss_source *qdss_get(const char *name)
{
- return qdss.modulekobj;
+ struct qdss_source *src, *source = NULL;
+
+ mutex_lock(&qdss.sources_mutex);
+ list_for_each_entry(src, &qdss.sources, link) {
+ if (src->name) {
+ if (strncmp(src->name, name, MAX_STR_LEN))
+ continue;
+ source = src;
+ break;
+ }
+ }
+ mutex_unlock(&qdss.sources_mutex);
+
+ return source ? source : ERR_PTR(-ENOENT);
}
+EXPORT_SYMBOL(qdss_get);
+
+/**
+ * qdss_put - release the qdss source handle
+ * @name: name of the qdss source
+ *
+ * CONTEXT:
+ * Typically called from driver remove or exit functions
+ */
+void qdss_put(struct qdss_source *src)
+{
+}
+EXPORT_SYMBOL(qdss_put);
+
+/**
+ * qdss_enable - enable qdss for the source
+ * @src: handle for the source making the call
+ *
+ * Enables qdss block (relevant funnel ports and sink) if not already
+ * enabled, otherwise increments the reference count
+ *
+ * CONTEXT:
+ * Might sleep. Uses a mutex lock. Should be called from a non-atomic context.
+ *
+ * RETURNS:
+ * 0 on success, non-zero on failure
+ */
+int qdss_enable(struct qdss_source *src)
+{
+ int ret;
+
+ if (!src)
+ return -EINVAL;
+
+ ret = qdss_clk_enable();
+ if (ret)
+ goto err;
+
+ if ((qdss.pdata)->afamily) {
+ mutex_lock(&qdss.sink_mutex);
+ if (qdss.sink_count == 0) {
+ etb_disable();
+ tpiu_disable();
+ /* enable ETB first to avoid losing any trace data */
+ etb_enable();
+ }
+ qdss.sink_count++;
+ mutex_unlock(&qdss.sink_mutex);
+ }
+
+ funnel_enable(0x0, src->fport_mask);
+ return 0;
+err:
+ return ret;
+}
+EXPORT_SYMBOL(qdss_enable);
+
+/**
+ * qdss_disable - disable qdss for the source
+ * @src: handle for the source making the call
+ *
+ * Disables qdss block (relevant funnel ports and sink) if the reference count
+ * is one, otherwise decrements the reference count
+ *
+ * CONTEXT:
+ * Might sleep. Uses a mutex lock. Should be called from a non-atomic context.
+ */
+void qdss_disable(struct qdss_source *src)
+{
+ if (!src)
+ return;
+
+ if ((qdss.pdata)->afamily) {
+ mutex_lock(&qdss.sink_mutex);
+ if (WARN(qdss.sink_count == 0, "qdss is unbalanced\n"))
+ goto out;
+ if (qdss.sink_count == 1) {
+ etb_dump();
+ etb_disable();
+ }
+ qdss.sink_count--;
+ mutex_unlock(&qdss.sink_mutex);
+ }
+
+ funnel_disable(0x0, src->fport_mask);
+ qdss_clk_disable();
+ return;
+out:
+ mutex_unlock(&qdss.sink_mutex);
+}
+EXPORT_SYMBOL(qdss_disable);
/**
* qdss_clk_enable - enable qdss clocks
@@ -111,6 +240,11 @@
}
EXPORT_SYMBOL(qdss_clk_disable);
+struct kobject *qdss_get_modulekobj(void)
+{
+ return qdss.modulekobj;
+}
+
#define QDSS_ATTR(name) \
static struct kobj_attribute name##_attr = \
__ATTR(name, S_IRUGO | S_IWUSR, name##_show, name##_store)
@@ -136,6 +270,16 @@
}
QDSS_ATTR(max_clk);
+static void __init qdss_add_sources(struct qdss_source *srcs, size_t num)
+{
+ mutex_lock(&qdss.sources_mutex);
+ while (num--) {
+ list_add_tail(&srcs->link, &qdss.sources);
+ srcs++;
+ }
+ mutex_unlock(&qdss.sources_mutex);
+}
+
static int __init qdss_sysfs_init(void)
{
int ret;
@@ -158,58 +302,85 @@
return ret;
}
-static void qdss_sysfs_exit(void)
+static void __exit qdss_sysfs_exit(void)
{
sysfs_remove_file(qdss.modulekobj, &max_clk_attr.attr);
}
-static int __init qdss_init(void)
+static int __devinit qdss_probe(struct platform_device *pdev)
{
int ret;
+ struct qdss_source *src_table;
+ size_t num_srcs;
+ mutex_init(&qdss.sources_mutex);
mutex_init(&qdss.clk_mutex);
+ mutex_init(&qdss.sink_mutex);
+
+ if (pdev->dev.platform_data == NULL) {
+ pr_err("%s: platform data is NULL\n", __func__);
+ ret = -ENODEV;
+ goto err_pdata;
+ }
+ qdss.pdata = pdev->dev.platform_data;
+
+ INIT_LIST_HEAD(&qdss.sources);
+ src_table = (qdss.pdata)->src_table;
+ num_srcs = (qdss.pdata)->size;
+ qdss_add_sources(src_table, num_srcs);
+
+ pr_info("QDSS arch initialized\n");
+ return 0;
+err_pdata:
+ mutex_destroy(&qdss.sink_mutex);
+ mutex_destroy(&qdss.clk_mutex);
+ mutex_destroy(&qdss.sources_mutex);
+ pr_err("QDSS init failed\n");
+ return ret;
+}
+
+static int __devexit qdss_remove(struct platform_device *pdev)
+{
+ qdss_sysfs_exit();
+ mutex_destroy(&qdss.sink_mutex);
+ mutex_destroy(&qdss.clk_mutex);
+ mutex_destroy(&qdss.sources_mutex);
+
+ return 0;
+}
+
+static struct platform_driver qdss_driver = {
+ .probe = qdss_probe,
+ .remove = __devexit_p(qdss_remove),
+ .driver = {
+ .name = "msm_qdss",
+ },
+};
+
+static int __init qdss_init(void)
+{
+ return platform_driver_register(&qdss_driver);
+}
+arch_initcall(qdss_init);
+
+static int __init qdss_module_init(void)
+{
+ int ret;
ret = qdss_sysfs_init();
if (ret)
goto err_sysfs;
- ret = etb_init();
- if (ret)
- goto err_etb;
- ret = tpiu_init();
- if (ret)
- goto err_tpiu;
- ret = funnel_init();
- if (ret)
- goto err_funnel;
- ret = etm_init();
- if (ret)
- goto err_etm;
- pr_info("QDSS initialized\n");
+ pr_info("QDSS module initialized\n");
return 0;
-err_etm:
- funnel_exit();
-err_funnel:
- tpiu_exit();
-err_tpiu:
- etb_exit();
-err_etb:
- qdss_sysfs_exit();
err_sysfs:
- mutex_destroy(&qdss.clk_mutex);
- pr_err("QDSS init failed\n");
return ret;
}
-module_init(qdss_init);
+module_init(qdss_module_init);
static void __exit qdss_exit(void)
{
- qdss_sysfs_exit();
- etm_exit();
- funnel_exit();
- tpiu_exit();
- etb_exit();
- mutex_destroy(&qdss.clk_mutex);
+ platform_driver_unregister(&qdss_driver);
}
module_exit(qdss_exit);
diff --git a/arch/arm/mach-msm/smd.c b/arch/arm/mach-msm/smd.c
index bbfe702..3cf0550 100644
--- a/arch/arm/mach-msm/smd.c
+++ b/arch/arm/mach-msm/smd.c
@@ -2365,26 +2365,19 @@
return;
}
- /* queue state entries */
- for (n = 0; n < SMSM_NUM_ENTRIES; n++) {
- new_state = __raw_readl(SMSM_STATE_ADDR(n));
-
- ret = kfifo_in(&smsm_snapshot_fifo,
- &new_state, sizeof(new_state));
- if (ret != sizeof(new_state)) {
- pr_err("%s: SMSM snapshot failure %d\n", __func__, ret);
- return;
- }
- }
-
- /* queue wakelock usage flag */
- ret = kfifo_in(&smsm_snapshot_fifo,
- &use_wakelock, sizeof(use_wakelock));
- if (ret != sizeof(use_wakelock)) {
- pr_err("%s: SMSM snapshot failure %d\n", __func__, ret);
- return;
- }
-
+ /*
+ * To avoid a race condition with notify_smsm_cb_clients_worker, the
+ * following sequence must be followed:
+ * 1) increment snapshot count
+ * 2) insert data into FIFO
+ *
+ * Potentially in parallel, the worker:
+ * a) verifies >= 1 snapshots are in FIFO
+ * b) processes snapshot
+ * c) decrements reference count
+ *
+ * This order ensures that 1 will always occur before abc.
+ */
if (use_wakelock) {
spin_lock_irqsave(&smsm_snapshot_count_lock, flags);
if (smsm_snapshot_count == 0) {
@@ -2394,7 +2387,44 @@
++smsm_snapshot_count;
spin_unlock_irqrestore(&smsm_snapshot_count_lock, flags);
}
+
+ /* queue state entries */
+ for (n = 0; n < SMSM_NUM_ENTRIES; n++) {
+ new_state = __raw_readl(SMSM_STATE_ADDR(n));
+
+ ret = kfifo_in(&smsm_snapshot_fifo,
+ &new_state, sizeof(new_state));
+ if (ret != sizeof(new_state)) {
+ pr_err("%s: SMSM snapshot failure %d\n", __func__, ret);
+ goto restore_snapshot_count;
+ }
+ }
+
+ /* queue wakelock usage flag */
+ ret = kfifo_in(&smsm_snapshot_fifo,
+ &use_wakelock, sizeof(use_wakelock));
+ if (ret != sizeof(use_wakelock)) {
+ pr_err("%s: SMSM snapshot failure %d\n", __func__, ret);
+ goto restore_snapshot_count;
+ }
+
schedule_work(&smsm_cb_work);
+ return;
+
+restore_snapshot_count:
+ if (use_wakelock) {
+ spin_lock_irqsave(&smsm_snapshot_count_lock, flags);
+ if (smsm_snapshot_count) {
+ --smsm_snapshot_count;
+ if (smsm_snapshot_count == 0) {
+ SMx_POWER_INFO("SMSM snapshot wake unlock\n");
+ wake_unlock(&smsm_snapshot_wakelock);
+ }
+ } else {
+ pr_err("%s: invalid snapshot count\n", __func__);
+ }
+ spin_unlock_irqrestore(&smsm_snapshot_count_lock, flags);
+ }
}
static irqreturn_t smsm_irq_handler(int irq, void *data)
diff --git a/arch/arm/mach-msm/smem_log.c b/arch/arm/mach-msm/smem_log.c
index 98f9957..2e9a97c 100644
--- a/arch/arm/mach-msm/smem_log.c
+++ b/arch/arm/mach-msm/smem_log.c
@@ -59,10 +59,20 @@
#define D(x...) do {} while (0)
#endif
+/*
+ * Legacy targets use the 32KHz hardware timer and new targets will use
+ * the scheduler timer scaled to a 32KHz tick count.
+ *
+ * As testing on legacy targets permits, we will move them to use
+ * sched_clock() and eventually remove the conditiona compilation.
+ */
#if defined(CONFIG_ARCH_MSM7X30) || defined(CONFIG_ARCH_MSM8X60) \
|| defined(CONFIG_ARCH_FSM9XXX)
#define TIMESTAMP_ADDR (MSM_TMR_BASE + 0x08)
-#else
+#elif defined(CONFIG_ARCH_APQ8064) || defined(CONFIG_ARCH_MSM7X01A) || \
+ defined(CONFIG_ARCH_MSM7x25) || defined(CONFIG_ARCH_MSM7X27) || \
+ defined(CONFIG_ARCH_MSM7X27A) || defined(CONFIG_ARCH_MSM8960) || \
+ defined(CONFIG_ARCH_MSM9615) || defined(CONFIG_ARCH_QSD8X50)
#define TIMESTAMP_ADDR (MSM_TMR_BASE + 0x04)
#endif
@@ -623,6 +633,8 @@
static void init_syms(void) {}
#endif
+#ifdef TIMESTAMP_ADDR
+/* legacy timestamp using 32.768KHz clock */
static inline unsigned int read_timestamp(void)
{
unsigned int tick = 0;
@@ -637,6 +649,18 @@
return tick;
}
+#else
+static inline unsigned int read_timestamp(void)
+{
+ unsigned long long val;
+
+ /* SMEM LOG uses a 32.768KHz timestamp */
+ val = sched_clock() * 32768U;
+ do_div(val, 1000000000U);
+
+ return (unsigned int)val;
+}
+#endif
static void smem_log_event_from_user(struct smem_log_inst *inst,
const char __user *buf, int size, int num)
@@ -649,6 +673,11 @@
int first = 1;
int ret;
+ if (!inst->idx) {
+ pr_err("%s: invalid write index\n", __func__);
+ return;
+ }
+
remote_spin_lock_irqsave(inst->remote_spinlock, flags);
while (num--) {
@@ -898,6 +927,9 @@
local_inst = fp->private_data;
+ if (!local_inst->idx)
+ return -ENODEV;
+
remote_spin_lock_irqsave(local_inst->remote_spinlock, flags);
orig_idx = *local_inst->idx;
@@ -947,6 +979,8 @@
struct smem_log_inst *inst;
inst = fp->private_data;
+ if (!inst->idx)
+ return -ENODEV;
remote_spin_lock_irqsave(inst->remote_spinlock, flags);
@@ -1185,8 +1219,10 @@
int curr_read_avail;
unsigned long flags = 0;
- remote_spin_lock_irqsave(inst->remote_spinlock, flags);
+ if (!inst->idx)
+ return 0;
+ remote_spin_lock_irqsave(inst->remote_spinlock, flags);
curr_read_avail = (*inst->idx - inst->read_idx);
if (curr_read_avail < 0)
curr_read_avail = inst->num - inst->read_idx + *inst->idx;
@@ -1694,6 +1730,10 @@
static int debug_dump(char *buf, int max, uint32_t cont)
{
int r;
+
+ if (!inst[GEN].idx || !inst[GEN].events)
+ return -ENODEV;
+
while (cont) {
update_read_avail(&inst[GEN]);
r = wait_event_interruptible_timeout(inst[GEN].read_wait,
@@ -1714,6 +1754,10 @@
static int debug_dump_sym(char *buf, int max, uint32_t cont)
{
int r;
+
+ if (!inst[GEN].idx || !inst[GEN].events)
+ return -ENODEV;
+
while (cont) {
update_read_avail(&inst[GEN]);
r = wait_event_interruptible_timeout(inst[GEN].read_wait,
@@ -1734,6 +1778,10 @@
static int debug_dump_static(char *buf, int max, uint32_t cont)
{
int r;
+
+ if (!inst[STA].idx || !inst[STA].events)
+ return -ENODEV;
+
while (cont) {
update_read_avail(&inst[STA]);
r = wait_event_interruptible_timeout(inst[STA].read_wait,
@@ -1754,6 +1802,10 @@
static int debug_dump_static_sym(char *buf, int max, uint32_t cont)
{
int r;
+
+ if (!inst[STA].idx || !inst[STA].events)
+ return -ENODEV;
+
while (cont) {
update_read_avail(&inst[STA]);
r = wait_event_interruptible_timeout(inst[STA].read_wait,
@@ -1774,6 +1826,10 @@
static int debug_dump_power(char *buf, int max, uint32_t cont)
{
int r;
+
+ if (!inst[POW].idx || !inst[POW].events)
+ return -ENODEV;
+
while (cont) {
update_read_avail(&inst[POW]);
r = wait_event_interruptible_timeout(inst[POW].read_wait,
@@ -1794,6 +1850,10 @@
static int debug_dump_power_sym(char *buf, int max, uint32_t cont)
{
int r;
+
+ if (!inst[POW].idx || !inst[POW].events)
+ return -ENODEV;
+
while (cont) {
update_read_avail(&inst[POW]);
r = wait_event_interruptible_timeout(inst[POW].read_wait,
@@ -1822,10 +1882,15 @@
size_t count, loff_t *ppos)
{
int r;
- static int bsize;
+ int bsize = 0;
int (*fill)(char *, int, uint32_t) = file->private_data;
- if (!(*ppos))
+ if (!(*ppos)) {
bsize = fill(debug_buffer, EVENTS_PRINT_SIZE, 0);
+
+ if (bsize < 0)
+ bsize = scnprintf(debug_buffer,
+ EVENTS_PRINT_SIZE, "Log not available\n");
+ }
DBG("%s: count %d ppos %d\n", __func__, count, (unsigned int)*ppos);
r = simple_read_from_buffer(buf, count, ppos, debug_buffer,
bsize);
@@ -1840,12 +1905,21 @@
int bsize;
if (!buffer)
return -ENOMEM;
+
bsize = fill(buffer, count, 1);
+ if (bsize < 0) {
+ if (*ppos == 0)
+ bsize = scnprintf(buffer, count, "Log not available\n");
+ else
+ bsize = 0;
+ }
+
DBG("%s: count %d bsize %d\n", __func__, count, bsize);
if (copy_to_user(buf, buffer, bsize)) {
kfree(buffer);
return -EFAULT;
}
+ *ppos += bsize;
kfree(buffer);
return bsize;
}
diff --git a/arch/arm/mach-msm/spm-v2.c b/arch/arm/mach-msm/spm-v2.c
index 378bcf2..2a6294f 100644
--- a/arch/arm/mach-msm/spm-v2.c
+++ b/arch/arm/mach-msm/spm-v2.c
@@ -68,6 +68,9 @@
dev->reg_shadow[MSM_SPM_REG_SAW2_PMIC_DATA_0] &= ~0xFF;
dev->reg_shadow[MSM_SPM_REG_SAW2_PMIC_DATA_0] |= vlevel;
+
+ dev->reg_shadow[MSM_SPM_REG_SAW2_PMIC_DATA_1] &= ~0x3F;
+ dev->reg_shadow[MSM_SPM_REG_SAW2_PMIC_DATA_1] |= (vlevel & 0x3F);
}
static void msm_spm_drv_flush_shadow(struct msm_spm_driver_data *dev,
@@ -235,6 +238,7 @@
msm_spm_drv_set_vctl(dev, vlevel);
msm_spm_drv_flush_shadow(dev, MSM_SPM_REG_SAW2_VCTL);
msm_spm_drv_flush_shadow(dev, MSM_SPM_REG_SAW2_PMIC_DATA_0);
+ msm_spm_drv_flush_shadow(dev, MSM_SPM_REG_SAW2_PMIC_DATA_1);
mb();
/* Wait for PMIC state to return to idle or until timeout */
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index ae7bc32..ea8356c 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -1032,7 +1032,7 @@
gpt->freq = 32765;
gpt_hz = 32765;
sclk_hz = 32765;
- if (!machine_is_apq8064_rumi3()) {
+ if (!cpu_is_msm8930()) {
gpt->flags |= MSM_CLOCK_FLAGS_UNSTABLE_COUNT;
dgt->flags |= MSM_CLOCK_FLAGS_UNSTABLE_COUNT;
}
diff --git a/arch/arm/mach-msm/timer.h b/arch/arm/mach-msm/timer.h
index caef19d..7da9e6a 100644
--- a/arch/arm/mach-msm/timer.h
+++ b/arch/arm/mach-msm/timer.h
@@ -17,9 +17,14 @@
extern struct sys_timer msm_timer;
void __iomem *msm_timer_get_timer0_base(void);
-int64_t msm_timer_enter_idle(void);
-void msm_timer_exit_idle(int low_power);
int64_t msm_timer_get_sclk_time(int64_t *period);
uint32_t msm_timer_get_sclk_ticks(void);
int msm_timer_init_time_sync(void (*timeout)(void));
+#ifndef CONFIG_ARM_ARCH_TIMER
+int64_t msm_timer_enter_idle(void);
+void msm_timer_exit_idle(int low_power);
+#else
+static inline int64_t msm_timer_enter_idle(void) { return 0; }
+static inline void msm_timer_exit_idle(int low_power) { return; }
+#endif
#endif
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index bc5ffce..5c24578 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -484,6 +484,16 @@
/* Invalidate the cache */
l2x0_inv_all();
+ /*
+ * TBD: make sure that l2xo_inv_all finished
+ * before actually enabling the cache. Logically this
+ * is not required as cache sync is atomic operation.
+ * but on 8x25, observed the random crashes and they go
+ * away if we add dmb or disable the L2.
+ * keeping this as temporary workaround until root
+ * cause is find out.
+ */
+ dmb();
}
/* Enable the cache */
diff --git a/arch/arm/oprofile/common.c b/arch/arm/oprofile/common.c
index 58f4720..338e8c2 100644
--- a/arch/arm/oprofile/common.c
+++ b/arch/arm/oprofile/common.c
@@ -36,6 +36,8 @@
return "arm/armv6";
case ARM_PERF_PMU_ID_V6MP:
return "arm/mpcore";
+ case ARM_PERF_PMU_ID_CA5:
+ return "arm/armv7";
case ARM_PERF_PMU_ID_CA8:
return "arm/armv7";
case ARM_PERF_PMU_ID_CA9:
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index cde8031..0ff30c3 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -1136,6 +1136,7 @@
apq8064_cdp MACH_APQ8064_CDP APQ8064_CDP 3948
apq8064_mtp MACH_APQ8064_MTP APQ8064_MTP 3949
apq8064_liquid MACH_APQ8064_LIQUID APQ8064_LIQUID 3951
+mpq8064_cdp MACH_MPQ8064_CDP MPQ8064_CDP 3993
mpq8064_hrd MACH_MPQ8064_HRD MPQ8064_HRD 3994
mpq8064_dtv MACH_MPQ8064_DTV MPQ8064_DTV 3995
msm7627a_qrd3 MACH_MSM7627A_QRD3 MSM7627A_QRD3 4005
diff --git a/drivers/char/diag/diagchar.h b/drivers/char/diag/diagchar.h
index cd32152..926bd69 100644
--- a/drivers/char/diag/diagchar.h
+++ b/drivers/char/diag/diagchar.h
@@ -164,7 +164,8 @@
unsigned char *buf_in_qdsp_1;
unsigned char *buf_in_qdsp_2;
unsigned char *buf_in_qdsp_cntl;
- unsigned char *buf_in_wcnss;
+ unsigned char *buf_in_wcnss_1;
+ unsigned char *buf_in_wcnss_2;
unsigned char *buf_in_wcnss_cntl;
unsigned char *usb_buf_out;
unsigned char *apps_rsp_buf;
@@ -183,7 +184,8 @@
int in_busy_2;
int in_busy_qdsp_1;
int in_busy_qdsp_2;
- int in_busy_wcnss;
+ int in_busy_wcnss_1;
+ int in_busy_wcnss_2;
int read_len_legacy;
unsigned char *hdlc_buf;
unsigned hdlc_count;
@@ -222,7 +224,8 @@
struct diag_request *write_ptr_svc;
struct diag_request *write_ptr_qdsp_1;
struct diag_request *write_ptr_qdsp_2;
- struct diag_request *write_ptr_wcnss;
+ struct diag_request *write_ptr_wcnss_1;
+ struct diag_request *write_ptr_wcnss_2;
int logging_mode;
int mask_check;
int logging_process_id;
diff --git a/drivers/char/diag/diagchar_core.c b/drivers/char/diag/diagchar_core.c
index d9f12ac..7e2333a 100644
--- a/drivers/char/diag/diagchar_core.c
+++ b/drivers/char/diag/diagchar_core.c
@@ -424,7 +424,8 @@
driver->in_busy_2 = 1;
driver->in_busy_qdsp_1 = 1;
driver->in_busy_qdsp_2 = 1;
- driver->in_busy_wcnss = 1;
+ driver->in_busy_wcnss_1 = 1;
+ driver->in_busy_wcnss_2 = 1;
#ifdef CONFIG_DIAG_SDIO_PIPE
driver->in_busy_sdio = 1;
#endif
@@ -434,7 +435,8 @@
driver->in_busy_2 = 0;
driver->in_busy_qdsp_1 = 0;
driver->in_busy_qdsp_2 = 0;
- driver->in_busy_wcnss = 0;
+ driver->in_busy_wcnss_1 = 0;
+ driver->in_busy_wcnss_2 = 0;
/* Poll SMD channels to check for data*/
if (driver->ch)
queue_work(driver->diag_wq,
@@ -465,9 +467,10 @@
diagfwd_disconnect();
driver->in_busy_1 = 0;
driver->in_busy_2 = 0;
+ driver->in_busy_qdsp_1 = 0;
driver->in_busy_qdsp_2 = 0;
- driver->in_busy_qdsp_2 = 0;
- driver->in_busy_wcnss = 0;
+ driver->in_busy_wcnss_1 = 0;
+ driver->in_busy_wcnss_2 = 0;
/* Poll SMD channels to check for data*/
if (driver->ch)
queue_work(driver->diag_wq,
@@ -607,16 +610,27 @@
driver->in_busy_qdsp_2 = 0;
}
/* copy wncss data */
- if (driver->in_busy_wcnss == 1) {
+ if (driver->in_busy_wcnss_1 == 1) {
num_data++;
/*Copy the length of data being passed*/
COPY_USER_SPACE_OR_EXIT(buf+ret,
- (driver->write_ptr_wcnss->length), 4);
+ (driver->write_ptr_wcnss_1->length), 4);
/*Copy the actual data being passed*/
COPY_USER_SPACE_OR_EXIT(buf+ret, *(driver->
- buf_in_wcnss),
- driver->write_ptr_wcnss->length);
- driver->in_busy_wcnss = 0;
+ buf_in_wcnss_1),
+ driver->write_ptr_wcnss_1->length);
+ driver->in_busy_wcnss_1 = 0;
+ }
+ if (driver->in_busy_wcnss_2 == 1) {
+ num_data++;
+ /*Copy the length of data being passed*/
+ COPY_USER_SPACE_OR_EXIT(buf+ret,
+ (driver->write_ptr_wcnss_2->length), 4);
+ /*Copy the actual data being passed*/
+ COPY_USER_SPACE_OR_EXIT(buf+ret, *(driver->
+ buf_in_wcnss_2),
+ driver->write_ptr_wcnss_2->length);
+ driver->in_busy_wcnss_2 = 0;
}
#ifdef CONFIG_DIAG_SDIO_PIPE
/* copy 9K data over SDIO */
diff --git a/drivers/char/diag/diagfwd.c b/drivers/char/diag/diagfwd.c
index 4cf6d33..a77d825 100644
--- a/drivers/char/diag/diagfwd.c
+++ b/drivers/char/diag/diagfwd.c
@@ -271,7 +271,8 @@
queue_work(driver->diag_wq, &(driver->
diag_read_smd_qdsp_work));
} else if (proc_num == WCNSS_DATA) {
- driver->in_busy_wcnss = 0;
+ driver->in_busy_wcnss_1 = 0;
+ driver->in_busy_wcnss_2 = 0;
queue_work(driver->diag_wq, &(driver->
diag_read_smd_wcnss_work));
}
@@ -343,11 +344,21 @@
void __diag_smd_wcnss_send_req(void)
{
- void *buf = driver->buf_in_wcnss;
- int *in_busy_wcnss_ptr = &(driver->in_busy_wcnss);
- struct diag_request *write_ptr_wcnss = driver->write_ptr_wcnss;
+ void *buf = NULL;
+ int *in_busy_wcnss_ptr = NULL;
+ struct diag_request *write_ptr_wcnss = NULL;
- if ((!driver->in_busy_wcnss) && driver->ch_wcnss && buf) {
+ if (!driver->in_busy_wcnss_1) {
+ buf = driver->buf_in_wcnss_1;
+ write_ptr_wcnss = driver->write_ptr_wcnss_1;
+ in_busy_wcnss_ptr = &(driver->in_busy_wcnss_1);
+ } else if (!driver->in_busy_wcnss_2) {
+ buf = driver->buf_in_wcnss_2;
+ write_ptr_wcnss = driver->write_ptr_wcnss_2;
+ in_busy_wcnss_ptr = &(driver->in_busy_wcnss_2);
+ }
+
+ if (driver->ch_wcnss && buf) {
int r = smd_read_avail(driver->ch_wcnss);
if (r > IN_BUF_SIZE) {
if (r < MAX_IN_BUF_SIZE) {
@@ -1248,7 +1259,8 @@
driver->in_busy_2 = 0;
driver->in_busy_qdsp_1 = 0;
driver->in_busy_qdsp_2 = 0;
- driver->in_busy_wcnss = 0;
+ driver->in_busy_wcnss_1 = 0;
+ driver->in_busy_wcnss_2 = 0;
/* Poll SMD channels to check for data*/
queue_work(driver->diag_wq, &(driver->diag_read_smd_work));
@@ -1282,7 +1294,8 @@
driver->in_busy_2 = 1;
driver->in_busy_qdsp_1 = 1;
driver->in_busy_qdsp_2 = 1;
- driver->in_busy_wcnss = 1;
+ driver->in_busy_wcnss_1 = 1;
+ driver->in_busy_wcnss_2 = 1;
}
#ifdef CONFIG_DIAG_SDIO_PIPE
if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
@@ -1314,8 +1327,13 @@
driver->in_busy_qdsp_2 = 0;
APPEND_DEBUG('P');
queue_work(driver->diag_wq, &(driver->diag_read_smd_qdsp_work));
- } else if (buf == (void *)driver->buf_in_wcnss) {
- driver->in_busy_wcnss = 0;
+ } else if (buf == driver->buf_in_wcnss_1) {
+ driver->in_busy_wcnss_1 = 0;
+ APPEND_DEBUG('r');
+ queue_work(driver->diag_wq,
+ &(driver->diag_read_smd_wcnss_work));
+ } else if (buf == driver->buf_in_wcnss_2) {
+ driver->in_busy_wcnss_2 = 0;
APPEND_DEBUG('R');
queue_work(driver->diag_wq,
&(driver->diag_read_smd_wcnss_work));
@@ -1568,11 +1586,17 @@
if (driver->buf_in_qdsp_2 == NULL)
goto err;
}
- if (driver->buf_in_wcnss == NULL) {
- driver->buf_in_wcnss = kzalloc(IN_BUF_SIZE, GFP_KERNEL);
- if (driver->buf_in_wcnss == NULL)
+ if (driver->buf_in_wcnss_1 == NULL) {
+ driver->buf_in_wcnss_1 = kzalloc(IN_BUF_SIZE, GFP_KERNEL);
+ if (driver->buf_in_wcnss_1 == NULL)
goto err;
}
+ if (driver->buf_in_wcnss_2 == NULL) {
+ driver->buf_in_wcnss_2 = kzalloc(IN_BUF_SIZE, GFP_KERNEL);
+ if (driver->buf_in_wcnss_2 == NULL)
+ goto err;
+ }
+
if (driver->buf_msg_mask_update == NULL) {
driver->buf_msg_mask_update = kzalloc(APPS_BUF_SIZE,
GFP_KERNEL);
@@ -1657,12 +1681,19 @@
if (driver->write_ptr_qdsp_2 == NULL)
goto err;
}
- if (driver->write_ptr_wcnss == NULL) {
- driver->write_ptr_wcnss = kzalloc(
+ if (driver->write_ptr_wcnss_1 == NULL) {
+ driver->write_ptr_wcnss_1 = kzalloc(
sizeof(struct diag_request), GFP_KERNEL);
- if (driver->write_ptr_wcnss == NULL)
+ if (driver->write_ptr_wcnss_1 == NULL)
goto err;
}
+ if (driver->write_ptr_wcnss_2 == NULL) {
+ driver->write_ptr_wcnss_2 = kzalloc(
+ sizeof(struct diag_request), GFP_KERNEL);
+ if (driver->write_ptr_wcnss_2 == NULL)
+ goto err;
+ }
+
if (driver->usb_read_ptr == NULL) {
driver->usb_read_ptr = kzalloc(
sizeof(struct diag_request), GFP_KERNEL);
@@ -1712,7 +1743,8 @@
kfree(driver->buf_in_2);
kfree(driver->buf_in_qdsp_1);
kfree(driver->buf_in_qdsp_2);
- kfree(driver->buf_in_wcnss);
+ kfree(driver->buf_in_wcnss_1);
+ kfree(driver->buf_in_wcnss_2);
kfree(driver->buf_msg_mask_update);
kfree(driver->buf_log_mask_update);
kfree(driver->buf_event_mask_update);
@@ -1730,7 +1762,8 @@
kfree(driver->write_ptr_2);
kfree(driver->write_ptr_qdsp_1);
kfree(driver->write_ptr_qdsp_2);
- kfree(driver->write_ptr_wcnss);
+ kfree(driver->write_ptr_wcnss_1);
+ kfree(driver->write_ptr_wcnss_2);
kfree(driver->usb_read_ptr);
kfree(driver->apps_rsp_buf);
kfree(driver->user_space_data);
@@ -1760,7 +1793,8 @@
kfree(driver->buf_in_2);
kfree(driver->buf_in_qdsp_1);
kfree(driver->buf_in_qdsp_2);
- kfree(driver->buf_in_wcnss);
+ kfree(driver->buf_in_wcnss_1);
+ kfree(driver->buf_in_wcnss_2);
kfree(driver->buf_msg_mask_update);
kfree(driver->buf_log_mask_update);
kfree(driver->buf_event_mask_update);
@@ -1778,7 +1812,8 @@
kfree(driver->write_ptr_2);
kfree(driver->write_ptr_qdsp_1);
kfree(driver->write_ptr_qdsp_2);
- kfree(driver->write_ptr_wcnss);
+ kfree(driver->write_ptr_wcnss_1);
+ kfree(driver->write_ptr_wcnss_2);
kfree(driver->usb_read_ptr);
kfree(driver->apps_rsp_buf);
kfree(driver->user_space_data);
diff --git a/drivers/gpu/msm/a3xx_reg.h b/drivers/gpu/msm/a3xx_reg.h
index 970f377..4f5c783 100644
--- a/drivers/gpu/msm/a3xx_reg.h
+++ b/drivers/gpu/msm/a3xx_reg.h
@@ -249,7 +249,7 @@
/* Bit flags for RBBM_CTL */
#define RBBM_RBBM_CTL_RESET_PWR_CTR1 (1 << 1)
-#define RBBM_RBBM_CTL_ENABLE_PWR_CTR1 (17 << 1)
+#define RBBM_RBBM_CTL_ENABLE_PWR_CTR1 (1 << 17)
/* Various flags used by the context switch code */
diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c
index 3db397b..d7a104c 100644
--- a/drivers/gpu/msm/adreno.c
+++ b/drivers/gpu/msm/adreno.c
@@ -398,7 +398,7 @@
* adreno 22x gpus are indicated by coreid 2,
* but REG_RBBM_PERIPHID1 always contains 0 for this field
*/
- if (cpu_is_msm8960() || cpu_is_msm8x60() || cpu_is_msm8930())
+ if (cpu_is_msm8960() || cpu_is_msm8x60())
chipid = 2 << 24;
else
chipid = (coreid & 0xF) << 24;
diff --git a/drivers/gpu/msm/adreno_a2xx.c b/drivers/gpu/msm/adreno_a2xx.c
index f31d120..52c2ab1 100644
--- a/drivers/gpu/msm/adreno_a2xx.c
+++ b/drivers/gpu/msm/adreno_a2xx.c
@@ -1907,7 +1907,7 @@
adreno_regwrite(device, REG_SQ_VS_PROGRAM, 0x00000000);
adreno_regwrite(device, REG_SQ_PS_PROGRAM, 0x00000000);
- if (cpu_is_msm8960() || cpu_is_msm8930())
+ if (cpu_is_msm8960())
adreno_regwrite(device, REG_RBBM_PM_OVERRIDE1, 0x200);
else
adreno_regwrite(device, REG_RBBM_PM_OVERRIDE1, 0);
diff --git a/drivers/gpu/msm/kgsl.c b/drivers/gpu/msm/kgsl.c
index 37d18bc..1b0a7bc 100644
--- a/drivers/gpu/msm/kgsl.c
+++ b/drivers/gpu/msm/kgsl.c
@@ -1195,6 +1195,8 @@
struct kgsl_mem_entry *entry = NULL;
struct vm_area_struct *vma;
+ KGSL_DEV_ERR_ONCE(dev_priv->device, "IOCTL_KGSL_SHAREDMEM_FROM_VMALLOC"
+ " is deprecated\n");
if (!kgsl_mmu_enabled())
return -ENODEV;
@@ -1637,6 +1639,8 @@
break;
case KGSL_USER_MEM_TYPE_ADDR:
+ KGSL_DEV_ERR_ONCE(dev_priv->device, "User mem type "
+ "KGSL_USER_MEM_TYPE_ADDR is deprecated\n");
if (!kgsl_mmu_enabled()) {
KGSL_DRV_ERR(dev_priv->device,
"Cannot map paged memory with the "
diff --git a/drivers/gpu/msm/kgsl_log.h b/drivers/gpu/msm/kgsl_log.h
index 9fafcf4..6fd28ab 100644
--- a/drivers/gpu/msm/kgsl_log.h
+++ b/drivers/gpu/msm/kgsl_log.h
@@ -48,6 +48,16 @@
#define KGSL_LOG_DUMP(_dev, fmt, args...) dev_err(_dev->dev, fmt, ##args)
+#define KGSL_DEV_ERR_ONCE(_dev, fmt, args...) \
+({ \
+ static bool kgsl_dev_err_once; \
+ \
+ if (!kgsl_dev_err_once) { \
+ kgsl_dev_err_once = true; \
+ dev_crit(_dev->dev, "|%s| " fmt, __func__, ##args); \
+ } \
+})
+
#define KGSL_DRV_INFO(_dev, fmt, args...) \
KGSL_LOG_INFO(_dev->dev, _dev->drv_log, fmt, ##args)
#define KGSL_DRV_WARN(_dev, fmt, args...) \
diff --git a/drivers/gpu/msm/kgsl_pwrctrl.c b/drivers/gpu/msm/kgsl_pwrctrl.c
index a03e530..8ccd462 100644
--- a/drivers/gpu/msm/kgsl_pwrctrl.c
+++ b/drivers/gpu/msm/kgsl_pwrctrl.c
@@ -699,7 +699,7 @@
}
kgsl_pwrctrl_irq(device, KGSL_PWRFLAGS_OFF);
kgsl_pwrctrl_clk(device, KGSL_PWRFLAGS_OFF);
- kgsl_pwrctrl_set_state(device, KGSL_STATE_NAP);
+ kgsl_pwrctrl_set_state(device, device->requested_state);
if (device->idle_wakelock.name)
wake_unlock(&device->idle_wakelock);
case KGSL_STATE_NAP:
diff --git a/drivers/gpu/msm/kgsl_pwrscale_trustzone.c b/drivers/gpu/msm/kgsl_pwrscale_trustzone.c
index 931ef48..eef80d3 100644
--- a/drivers/gpu/msm/kgsl_pwrscale_trustzone.c
+++ b/drivers/gpu/msm/kgsl_pwrscale_trustzone.c
@@ -180,7 +180,7 @@
struct tz_priv *priv;
/* Trustzone is only valid for some SOCs */
- if (!(cpu_is_msm8x60() || cpu_is_msm8960() || cpu_is_msm8930()))
+ if (!(cpu_is_msm8x60() || cpu_is_msm8960()))
return -EINVAL;
priv = pwrscale->priv = kzalloc(sizeof(struct tz_priv), GFP_KERNEL);
diff --git a/drivers/gpu/msm/kgsl_sharedmem.c b/drivers/gpu/msm/kgsl_sharedmem.c
index d083702..5634a19 100644
--- a/drivers/gpu/msm/kgsl_sharedmem.c
+++ b/drivers/gpu/msm/kgsl_sharedmem.c
@@ -443,7 +443,7 @@
sg_set_page(&memdesc->sg[i], page, PAGE_SIZE, 0);
}
- kgsl_cache_range_op(memdesc, KGSL_CACHE_OP_INV);
+ kgsl_cache_range_op(memdesc, KGSL_CACHE_OP_FLUSH);
ret = kgsl_mmu_map(pagetable, memdesc, protflags);
diff --git a/drivers/leds/leds-pm8xxx.c b/drivers/leds/leds-pm8xxx.c
index d1bfc07..6770ec8 100644
--- a/drivers/leds/leds-pm8xxx.c
+++ b/drivers/leds/leds-pm8xxx.c
@@ -79,6 +79,13 @@
#define WLED_SYNC_VAL 0x07
#define WLED_SYNC_RESET_VAL 0x00
+#define SSBI_REG_ADDR_RGB_CNTL1 0x12D
+#define SSBI_REG_ADDR_RGB_CNTL2 0x12E
+
+#define PM8XXX_DRV_RGB_RED_LED BIT(2)
+#define PM8XXX_DRV_RGB_GREEN_LED BIT(1)
+#define PM8XXX_DRV_RGB_BLUE_LED BIT(0)
+
#define MAX_FLASH_LED_CURRENT 300
#define MAX_LC_LED_CURRENT 40
#define MAX_KP_BL_LED_CURRENT 300
@@ -99,7 +106,7 @@
#define PM8XXX_LED_PWM_FLAGS (PM_PWM_LUT_LOOP | PM_PWM_LUT_RAMP_UP)
#define LED_MAP(_version, _kb, _led0, _led1, _led2, _flash_led0, _flash_led1, \
- _wled)\
+ _wled, _rgb_led_red, _rgb_led_green, _rgb_led_blue)\
{\
.version = _version,\
.supported = _kb << PM8XXX_ID_LED_KB_LIGHT | \
@@ -107,7 +114,10 @@
_led2 << PM8XXX_ID_LED_2 | \
_flash_led0 << PM8XXX_ID_FLASH_LED_0 | \
_flash_led1 << PM8XXX_ID_FLASH_LED_1 | \
- _wled << PM8XXX_ID_WLED, \
+ _wled << PM8XXX_ID_WLED | \
+ _rgb_led_red << PM8XXX_ID_RGB_LED_RED | \
+ _rgb_led_green << PM8XXX_ID_RGB_LED_GREEN | \
+ _rgb_led_blue << PM8XXX_ID_RGB_LED_BLUE, \
}
/**
@@ -122,11 +132,11 @@
};
static const struct supported_leds led_map[] = {
- LED_MAP(PM8XXX_VERSION_8058, 1, 1, 1, 1, 1, 1, 0),
- LED_MAP(PM8XXX_VERSION_8921, 1, 1, 1, 1, 1, 1, 0),
- LED_MAP(PM8XXX_VERSION_8018, 1, 0, 0, 0, 0, 0, 0),
- LED_MAP(PM8XXX_VERSION_8922, 0, 0, 0, 0, 1, 1, 1),
- LED_MAP(PM8XXX_VERSION_8038, 0, 0, 0, 0, 0, 0, 1),
+ LED_MAP(PM8XXX_VERSION_8058, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0),
+ LED_MAP(PM8XXX_VERSION_8921, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0),
+ LED_MAP(PM8XXX_VERSION_8018, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0),
+ LED_MAP(PM8XXX_VERSION_8922, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1),
+ LED_MAP(PM8XXX_VERSION_8038, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1),
};
/**
@@ -291,6 +301,44 @@
}
}
+static void
+led_rgb_set(struct pm8xxx_led_data *led, enum led_brightness value)
+{
+ int rc;
+ u8 val, mask;
+
+ rc = pm8xxx_readb(led->dev->parent, SSBI_REG_ADDR_RGB_CNTL2, &val);
+ if (rc) {
+ dev_err(led->cdev.dev, "can't read rgb ctrl register rc=%d\n",
+ rc);
+ return;
+ }
+
+ switch (led->id) {
+ case PM8XXX_ID_RGB_LED_RED:
+ mask = PM8XXX_DRV_RGB_RED_LED;
+ break;
+ case PM8XXX_ID_RGB_LED_GREEN:
+ mask = PM8XXX_DRV_RGB_GREEN_LED;
+ break;
+ case PM8XXX_ID_RGB_LED_BLUE:
+ mask = PM8XXX_DRV_RGB_BLUE_LED;
+ break;
+ default:
+ return;
+ }
+
+ if (value)
+ val |= mask;
+ else
+ val &= ~mask;
+
+ rc = pm8xxx_writeb(led->dev->parent, SSBI_REG_ADDR_RGB_CNTL2, val);
+ if (rc < 0)
+ dev_err(led->cdev.dev, "can't set rgb led %d level rc=%d\n",
+ led->id, rc);
+}
+
static int pm8xxx_led_pwm_work(struct pm8xxx_led_data *led)
{
int duty_us;
@@ -336,6 +384,11 @@
if (rc < 0)
pr_err("wled brightness set failed %d\n", rc);
break;
+ case PM8XXX_ID_RGB_LED_RED:
+ case PM8XXX_ID_RGB_LED_GREEN:
+ case PM8XXX_ID_RGB_LED_BLUE:
+ led_rgb_set(led, level);
+ break;
default:
dev_err(led->cdev.dev, "unknown led id %d", led->id);
break;
@@ -380,8 +433,6 @@
static int pm8xxx_set_led_mode_and_max_brightness(struct pm8xxx_led_data *led,
enum pm8xxx_led_modes led_mode, int max_current)
{
- int rc = 0;
-
switch (led->id) {
case PM8XXX_ID_LED_0:
case PM8XXX_ID_LED_1:
@@ -420,13 +471,17 @@
case PM8XXX_ID_WLED:
led->cdev.max_brightness = WLED_MAX_LEVEL;
break;
- default:
- rc = -EINVAL;
- pr_err("LED Id is invalid");
+ case PM8XXX_ID_RGB_LED_RED:
+ case PM8XXX_ID_RGB_LED_GREEN:
+ case PM8XXX_ID_RGB_LED_BLUE:
+ led->cdev.max_brightness = LED_FULL;
break;
+ default:
+ dev_err(led->cdev.dev, "LED Id is invalid");
+ return -EINVAL;
}
- return rc;
+ return 0;
}
static enum led_brightness pm8xxx_led_get(struct led_classdev *led_cdev)
@@ -581,6 +636,35 @@
return 0;
}
+static int __devinit init_rgb_led(struct pm8xxx_led_data *led)
+{
+ int rc;
+ u8 val;
+
+ rc = pm8xxx_readb(led->dev->parent, SSBI_REG_ADDR_RGB_CNTL1, &val);
+ if (rc) {
+ dev_err(led->cdev.dev, "can't read rgb ctrl1 register rc=%d\n",
+ rc);
+ return rc;
+ }
+
+ switch (led->id) {
+ case PM8XXX_ID_RGB_LED_RED:
+ val |= PM8XXX_DRV_RGB_RED_LED;
+ break;
+ case PM8XXX_ID_RGB_LED_GREEN:
+ val |= PM8XXX_DRV_RGB_GREEN_LED;
+ break;
+ case PM8XXX_ID_RGB_LED_BLUE:
+ val |= PM8XXX_DRV_RGB_BLUE_LED;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return pm8xxx_writeb(led->dev->parent, SSBI_REG_ADDR_RGB_CNTL1, val);
+}
+
static int __devinit get_init_value(struct pm8xxx_led_data *led, u8 *val)
{
int rc, offset;
@@ -608,6 +692,17 @@
dev_err(led->cdev.dev, "can't initialize wled rc=%d\n",
rc);
return rc;
+ case PM8XXX_ID_RGB_LED_RED:
+ case PM8XXX_ID_RGB_LED_GREEN:
+ case PM8XXX_ID_RGB_LED_BLUE:
+ rc = init_rgb_led(led);
+ if (rc) {
+ dev_err(led->cdev.dev, "can't initialize rgb rc=%d\n",
+ rc);
+ return rc;
+ }
+ addr = SSBI_REG_ADDR_RGB_CNTL1;
+ break;
default:
dev_err(led->cdev.dev, "unknown led id %d", led->id);
return -EINVAL;
@@ -765,7 +860,12 @@
led->cdev.brightness = LED_OFF;
if (led_cfg->mode != PM8XXX_LED_MODE_MANUAL) {
- __pm8xxx_led_work(led_dat,
+ if (led_dat->id == PM8XXX_ID_RGB_LED_RED ||
+ led_dat->id == PM8XXX_ID_RGB_LED_GREEN ||
+ led_dat->id == PM8XXX_ID_RGB_LED_BLUE)
+ __pm8xxx_led_work(led_dat, 0);
+ else
+ __pm8xxx_led_work(led_dat,
led_dat->cdev.max_brightness);
if (led_dat->pwm_channel != -1) {
diff --git a/drivers/media/radio/radio-tavarua.c b/drivers/media/radio/radio-tavarua.c
index fb73321..a2ec006 100644
--- a/drivers/media/radio/radio-tavarua.c
+++ b/drivers/media/radio/radio-tavarua.c
@@ -1078,6 +1078,10 @@
{
struct tavarua_device *radio = container_of(work,
struct tavarua_device, work.work);
+ FMDERR("%s: Releasing the FM I2S GPIO\n", __func__);
+ if (radio->pdata->config_i2s_gpio != NULL)
+ radio->pdata->config_i2s_gpio(FM_I2S_OFF);
+ FMDERR("%s: Shutting down FM SOC\n", __func__);
radio->pdata->fm_shutdown(radio->pdata);
complete(&radio->shutdown_done);
}
@@ -1163,8 +1167,9 @@
return -EINVAL;
irq = radio->pdata->irq;
disable_irq_wake(irq);
- flush_workqueue(radio->wqueue);
free_irq(irq, radio);
+ cancel_delayed_work_sync(&radio->work);
+ flush_workqueue(radio->wqueue);
return 0;
}
@@ -2043,10 +2048,7 @@
FMDBG("In %s", __func__);
- /* disable radio ctrl */
- retval = tavarua_write_register(radio, RDCTRL, 0x00);
-
- FMDBG("%s, Disable IRQs\n", __func__);
+ FMDBG("%s, Disabling the IRQs\n", __func__);
/* disable irq */
retval = tavarua_disable_irq(radio);
if (retval < 0) {
@@ -2054,6 +2056,13 @@
return retval;
}
+ /* disable radio ctrl */
+ retval = tavarua_write_register(radio, RDCTRL, 0x00);
+ if (retval < 0) {
+ printk(KERN_ERR "%s: failed to disable FM\n", __func__);
+ return retval;
+ }
+
init_completion(&radio->shutdown_done);
bahama_present = is_bahama();
@@ -2146,8 +2155,6 @@
/* teardown gpio and pmic */
marimba_set_fm_status(radio->marimba, false);
wait_for_completion(&radio->shutdown_done);
- if (radio->pdata->config_i2s_gpio != NULL)
- radio->pdata->config_i2s_gpio(FM_I2S_OFF);
radio->handle_irq = 1;
atomic_inc(&radio->users);
radio->marimba->mod_id = SLAVE_ID_BAHAMA;
@@ -2992,7 +2999,7 @@
}
/* check if off */
else if ((ctrl->value == FM_OFF) && radio->registers[RDCTRL]) {
- FMDBG("turning off...\n");
+ FMDBG("%s: turning off...\n", __func__);
tavarua_write_register(radio, RDCTRL, ctrl->value);
/* flush the event and work queues */
kfifo_reset(&radio->data_buf[TAVARUA_BUF_EVENTS]);
diff --git a/drivers/media/rc/gpio-ir-recv.c b/drivers/media/rc/gpio-ir-recv.c
index a9b8e40..6744479 100644
--- a/drivers/media/rc/gpio-ir-recv.c
+++ b/drivers/media/rc/gpio-ir-recv.c
@@ -21,27 +21,22 @@
#include <media/rc-core.h>
#include <media/gpio-ir-recv.h>
-#define TSOP_DRIVER_NAME "gpio-rc-recv"
-#define TSOP_DEVICE_NAME "gpio_ir_recv"
+#define GPIO_IR_DRIVER_NAME "gpio-rc-recv"
+#define GPIO_IR_DEVICE_NAME "gpio_ir_recv"
struct gpio_rc_dev {
struct rc_dev *rcdev;
- struct mutex lock;
unsigned int gpio_nr;
bool active_low;
- bool can_wakeup;
- struct work_struct work;
};
-static void ir_decoder_work(struct work_struct *work)
+static irqreturn_t gpio_ir_recv_irq(int irq, void *dev_id)
{
- struct gpio_rc_dev *gpio_dev = container_of(work,
- struct gpio_rc_dev, work);
+ struct gpio_rc_dev *gpio_dev = dev_id;
unsigned int gval;
int rc = 0;
enum raw_event_type type = IR_SPACE;
- mutex_lock(&gpio_dev->lock);
gval = gpio_get_value_cansleep(gpio_dev->gpio_nr);
if (gval < 0)
@@ -60,15 +55,6 @@
ir_raw_event_handle(gpio_dev->rcdev);
err_get_value:
- mutex_unlock(&gpio_dev->lock);
-}
-
-static irqreturn_t gpio_ir_recv_irq_handler(int irq, void *data)
-{
- struct gpio_rc_dev *gpio_dev = data;
-
- schedule_work(&gpio_dev->work);
-
return IRQ_HANDLED;
}
@@ -78,7 +64,7 @@
struct rc_dev *rcdev;
const struct gpio_ir_recv_platform_data *pdata =
pdev->dev.platform_data;
- int rc = 0;
+ int rc;
if (!pdata)
return -EINVAL;
@@ -90,8 +76,6 @@
if (!gpio_dev)
return -ENOMEM;
- mutex_init(&gpio_dev->lock);
-
rcdev = rc_allocate_device();
if (!rcdev) {
rc = -ENOMEM;
@@ -99,18 +83,15 @@
}
rcdev->driver_type = RC_DRIVER_IR_RAW;
- rcdev->allowed_protos = RC_TYPE_NEC;
- rcdev->input_name = TSOP_DEVICE_NAME;
+ rcdev->allowed_protos = RC_TYPE_ALL;
+ rcdev->input_name = GPIO_IR_DEVICE_NAME;
rcdev->input_id.bustype = BUS_HOST;
- rcdev->driver_name = TSOP_DRIVER_NAME;
- rcdev->map_name = RC_MAP_SAMSUNG_NECX;
+ rcdev->driver_name = GPIO_IR_DRIVER_NAME;
+ rcdev->map_name = RC_MAP_EMPTY;
gpio_dev->rcdev = rcdev;
gpio_dev->gpio_nr = pdata->gpio_nr;
gpio_dev->active_low = pdata->active_low;
- gpio_dev->can_wakeup = pdata->can_wakeup;
-
- INIT_WORK(&gpio_dev->work, ir_decoder_work);
rc = gpio_request(pdata->gpio_nr, "gpio-ir-recv");
if (rc < 0)
@@ -127,22 +108,15 @@
platform_set_drvdata(pdev, gpio_dev);
- rc = request_irq(gpio_to_irq(pdata->gpio_nr), gpio_ir_recv_irq_handler,
+ rc = request_any_context_irq(gpio_to_irq(pdata->gpio_nr),
+ gpio_ir_recv_irq,
IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
- "gpio-ir-recv-irq", gpio_dev);
+ "gpio-ir-recv-irq", gpio_dev);
if (rc < 0)
goto err_request_irq;
- if (pdata->can_wakeup == true) {
- rc = enable_irq_wake(gpio_to_irq(pdata->gpio_nr));
- if (rc < 0)
- goto err_enable_irq_wake;
- }
-
return 0;
-err_enable_irq_wake:
- free_irq(gpio_to_irq(gpio_dev->gpio_nr), gpio_dev);
err_request_irq:
platform_set_drvdata(pdev, NULL);
rc_unregister_device(rcdev);
@@ -153,7 +127,6 @@
rc_free_device(rcdev);
rcdev = NULL;
err_allocate_device:
- mutex_destroy(&gpio_dev->lock);
kfree(gpio_dev);
return rc;
}
@@ -162,24 +135,57 @@
{
struct gpio_rc_dev *gpio_dev = platform_get_drvdata(pdev);
- flush_work_sync(&gpio_dev->work);
- disable_irq_wake(gpio_to_irq(gpio_dev->gpio_nr));
free_irq(gpio_to_irq(gpio_dev->gpio_nr), gpio_dev);
platform_set_drvdata(pdev, NULL);
rc_unregister_device(gpio_dev->rcdev);
gpio_free(gpio_dev->gpio_nr);
rc_free_device(gpio_dev->rcdev);
- mutex_destroy(&gpio_dev->lock);
kfree(gpio_dev);
return 0;
}
+#ifdef CONFIG_PM
+static int gpio_ir_recv_suspend(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct gpio_rc_dev *gpio_dev = platform_get_drvdata(pdev);
+
+ if (device_may_wakeup(dev))
+ enable_irq_wake(gpio_to_irq(gpio_dev->gpio_nr));
+ else
+ disable_irq(gpio_to_irq(gpio_dev->gpio_nr));
+
+ return 0;
+}
+
+static int gpio_ir_recv_resume(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct gpio_rc_dev *gpio_dev = platform_get_drvdata(pdev);
+
+ if (device_may_wakeup(dev))
+ disable_irq_wake(gpio_to_irq(gpio_dev->gpio_nr));
+ else
+ enable_irq(gpio_to_irq(gpio_dev->gpio_nr));
+
+ return 0;
+}
+
+static const struct dev_pm_ops gpio_ir_recv_pm_ops = {
+ .suspend = gpio_ir_recv_suspend,
+ .resume = gpio_ir_recv_resume,
+};
+#endif
+
static struct platform_driver gpio_ir_recv_driver = {
.probe = gpio_ir_recv_probe,
.remove = __devexit_p(gpio_ir_recv_remove),
.driver = {
- .name = TSOP_DRIVER_NAME,
+ .name = GPIO_IR_DRIVER_NAME,
.owner = THIS_MODULE,
+#ifdef CONFIG_PM
+ .pm = &gpio_ir_recv_pm_ops,
+#endif
},
};
diff --git a/drivers/media/video/msm/wfd/wfd-ioctl.c b/drivers/media/video/msm/wfd/wfd-ioctl.c
index 05fe2bb..f296079 100644
--- a/drivers/media/video/msm/wfd/wfd-ioctl.c
+++ b/drivers/media/video/msm/wfd/wfd-ioctl.c
@@ -35,7 +35,9 @@
#include "vsg-subdev.h"
#define WFD_VERSION KERNEL_VERSION(0, 0, 1)
-#define WFD_DEVICE_NUMBER 38
+#define WFD_NUM_DEVICES 2
+#define WFD_DEVICE_NUMBER_BASE 38
+#define WFD_DEVICE_SECURE (WFD_DEVICE_NUMBER_BASE + 1)
#define DEFAULT_WFD_WIDTH 640
#define DEFAULT_WFD_HEIGHT 480
#define VSG_SCRATCH_BUFFERS 1
@@ -50,6 +52,7 @@
struct v4l2_subdev enc_sdev;
struct v4l2_subdev vsg_sdev;
struct ion_client *ion_client;
+ bool secure_device;
};
struct mem_info {
@@ -141,17 +144,19 @@
}
static int wfd_allocate_ion_buffer(struct ion_client *client,
- struct mem_region *mregion)
+ bool secure, struct mem_region *mregion)
{
struct ion_handle *handle;
void *kvaddr, *phys_addr;
unsigned long size;
+ unsigned int alloc_regions = 0;
int rc;
+ alloc_regions = ION_HEAP(ION_CP_MM_HEAP_ID);
+ alloc_regions |= secure ? 0 :
+ ION_HEAP(ION_IOMMU_HEAP_ID);
handle = ion_alloc(client,
- mregion->size, SZ_4K,
- ION_HEAP(ION_IOMMU_HEAP_ID) |
- ION_HEAP(ION_CP_MM_HEAP_ID));
+ mregion->size, SZ_4K, alloc_regions);
if (IS_ERR_OR_NULL(handle)) {
WFD_MSG_ERR("Failed to allocate input buffer\n");
@@ -256,7 +261,8 @@
mdp_mregion = kzalloc(sizeof(*enc_mregion), GFP_KERNEL);
enc_mregion->size = ALIGN(inst->input_buf_size, SZ_4K);
- rc = wfd_allocate_ion_buffer(wfd_dev->ion_client, enc_mregion);
+ rc = wfd_allocate_ion_buffer(wfd_dev->ion_client,
+ wfd_dev->secure_device, enc_mregion);
if (rc) {
WFD_MSG_ERR("Failed to allocate input memory."
" This error causes memory leak!!!\n");
@@ -1320,19 +1326,11 @@
{
}
-static int __devinit __wfd_probe(struct platform_device *pdev)
+
+static int wfd_dev_setup(struct wfd_device *wfd_dev, int dev_num,
+ struct platform_device *pdev)
{
int rc = 0;
- struct wfd_device *wfd_dev;
- WFD_MSG_DBG("__wfd_probe: E\n");
- wfd_dev = kzalloc(sizeof(*wfd_dev), GFP_KERNEL);
- if (!wfd_dev) {
- WFD_MSG_ERR("Could not allocate memory for "
- "wfd device\n");
- rc = -ENOMEM;
- goto err_v4l2_registration;
- }
- pdev->dev.platform_data = (void *) wfd_dev;
rc = v4l2_device_register(&pdev->dev, &wfd_dev->v4l2_dev);
if (rc) {
WFD_MSG_ERR("Failed to register the video device\n");
@@ -1349,7 +1347,7 @@
wfd_dev->pvdev->ioctl_ops = &g_wfd_ioctl_ops;
rc = video_register_device(wfd_dev->pvdev, VFL_TYPE_GRABBER,
- WFD_DEVICE_NUMBER);
+ dev_num);
if (rc) {
WFD_MSG_ERR("Failed to register the device\n");
goto err_video_register_device;
@@ -1359,7 +1357,7 @@
v4l2_subdev_init(&wfd_dev->mdp_sdev, &mdp_subdev_ops);
strncpy(wfd_dev->mdp_sdev.name, "wfd-mdp", V4L2_SUBDEV_NAME_SIZE);
rc = v4l2_device_register_subdev(&wfd_dev->v4l2_dev,
- &wfd_dev->mdp_sdev);
+ &wfd_dev->mdp_sdev);
if (rc) {
WFD_MSG_ERR("Failed to register mdp subdevice: %d\n", rc);
goto err_mdp_register_subdev;
@@ -1368,7 +1366,7 @@
v4l2_subdev_init(&wfd_dev->enc_sdev, &enc_subdev_ops);
strncpy(wfd_dev->enc_sdev.name, "wfd-venc", V4L2_SUBDEV_NAME_SIZE);
rc = v4l2_device_register_subdev(&wfd_dev->v4l2_dev,
- &wfd_dev->enc_sdev);
+ &wfd_dev->enc_sdev);
if (rc) {
WFD_MSG_ERR("Failed to register encoder subdevice: %d\n", rc);
goto err_venc_register_subdev;
@@ -1382,23 +1380,14 @@
v4l2_subdev_init(&wfd_dev->vsg_sdev, &vsg_subdev_ops);
strncpy(wfd_dev->vsg_sdev.name, "wfd-vsg", V4L2_SUBDEV_NAME_SIZE);
rc = v4l2_device_register_subdev(&wfd_dev->v4l2_dev,
- &wfd_dev->vsg_sdev);
+ &wfd_dev->vsg_sdev);
if (rc) {
WFD_MSG_ERR("Failed to register vsg subdevice: %d\n", rc);
goto err_venc_init;
}
- wfd_dev->ion_client = msm_ion_client_create(-1, "wfd");
- if (!wfd_dev->ion_client) {
- WFD_MSG_ERR("Failed to create ion client\n");
- rc = -ENODEV;
- goto err_vsg_register_subdev;
- }
- WFD_MSG_DBG("__wfd_probe: X\n");
return rc;
-err_vsg_register_subdev:
- v4l2_device_unregister_subdev(&wfd_dev->vsg_sdev);
err_venc_init:
v4l2_device_unregister_subdev(&wfd_dev->enc_sdev);
err_venc_register_subdev:
@@ -1410,6 +1399,66 @@
err_video_device_alloc:
v4l2_device_unregister(&wfd_dev->v4l2_dev);
err_v4l2_registration:
+ return rc;
+}
+static int __devinit __wfd_probe(struct platform_device *pdev)
+{
+ int rc = 0, c = 0;
+ struct wfd_device *wfd_dev; /* Should be taken as an array*/
+ struct ion_client *ion_client = NULL;
+
+ WFD_MSG_DBG("__wfd_probe: E\n");
+ wfd_dev = kzalloc(sizeof(*wfd_dev)*WFD_NUM_DEVICES, GFP_KERNEL);
+ if (!wfd_dev) {
+ WFD_MSG_ERR("Could not allocate memory for "
+ "wfd device\n");
+ rc = -ENOMEM;
+ goto err_v4l2_probe;
+ }
+ pdev->dev.platform_data = (void *) wfd_dev;
+
+ ion_client = msm_ion_client_create(-1, "wfd");
+ if (!ion_client) {
+ WFD_MSG_ERR("Failed to create ion client\n");
+ rc = -ENODEV;
+ goto err_v4l2_probe;
+ }
+
+ for (c = 0; c < WFD_NUM_DEVICES; ++c) {
+ rc = wfd_dev_setup(&wfd_dev[c],
+ WFD_DEVICE_NUMBER_BASE + c, pdev);
+
+ if (rc) {
+ /* Clear out old devices */
+ for (--c; c >= 0; --c) {
+ v4l2_device_unregister_subdev(
+ &wfd_dev[c].vsg_sdev);
+ v4l2_device_unregister_subdev(
+ &wfd_dev[c].enc_sdev);
+ v4l2_device_unregister_subdev(
+ &wfd_dev[c].mdp_sdev);
+ video_unregister_device(wfd_dev[c].pvdev);
+ video_device_release(wfd_dev[c].pvdev);
+ v4l2_device_unregister(&wfd_dev[c].v4l2_dev);
+ }
+
+ goto err_v4l2_probe;
+ }
+
+ /* Other device specific stuff */
+ wfd_dev[c].ion_client = ion_client;
+ switch (WFD_DEVICE_NUMBER_BASE + c) {
+ case WFD_DEVICE_SECURE:
+ wfd_dev[c].secure_device = true;
+ break;
+ default:
+ break;
+ }
+
+ }
+ WFD_MSG_DBG("__wfd_probe: X\n");
+ return rc;
+err_v4l2_probe:
kfree(wfd_dev);
return rc;
}
@@ -1417,6 +1466,8 @@
static int __devexit __wfd_remove(struct platform_device *pdev)
{
struct wfd_device *wfd_dev;
+ int c = 0;
+
wfd_dev = (struct wfd_device *)pdev->dev.platform_data;
WFD_MSG_DBG("Inside wfd_remove\n");
@@ -1425,10 +1476,15 @@
return -ENODEV;
}
- v4l2_device_unregister_subdev(&wfd_dev->mdp_sdev);
- video_unregister_device(wfd_dev->pvdev);
- video_device_release(wfd_dev->pvdev);
- v4l2_device_unregister(&wfd_dev->v4l2_dev);
+ for (c = 0; c < WFD_NUM_DEVICES; ++c) {
+ v4l2_device_unregister_subdev(&wfd_dev[c].vsg_sdev);
+ v4l2_device_unregister_subdev(&wfd_dev[c].enc_sdev);
+ v4l2_device_unregister_subdev(&wfd_dev[c].mdp_sdev);
+ video_unregister_device(wfd_dev[c].pvdev);
+ video_device_release(wfd_dev[c].pvdev);
+ v4l2_device_unregister(&wfd_dev[c].v4l2_dev);
+ }
+
kfree(wfd_dev);
return 0;
}
diff --git a/drivers/mmc/card/mmc_test.c b/drivers/mmc/card/mmc_test.c
index a2b005e..9063e98 100644
--- a/drivers/mmc/card/mmc_test.c
+++ b/drivers/mmc/card/mmc_test.c
@@ -2889,7 +2889,8 @@
}
#ifdef CONFIG_HIGHMEM
- __free_pages(test->highmem, BUFFER_ORDER);
+ if (test->highmem)
+ __free_pages(test->highmem, BUFFER_ORDER);
#endif
kfree(test->buffer);
kfree(test);
diff --git a/drivers/net/usb/usbnet.c b/drivers/net/usb/usbnet.c
index 2620108..d07487b 100644
--- a/drivers/net/usb/usbnet.c
+++ b/drivers/net/usb/usbnet.c
@@ -372,6 +372,7 @@
tasklet_schedule (&dev->bh);
break;
case 0:
+ usb_mark_last_busy(dev->udev);
__skb_queue_tail (&dev->rxq, skb);
}
} else {
diff --git a/drivers/of/of_spmi.c b/drivers/of/of_spmi.c
index 112497c..61085c9 100644
--- a/drivers/of/of_spmi.c
+++ b/drivers/of/of_spmi.c
@@ -203,9 +203,18 @@
struct device_node *node;
int rc, i, num_dev_node = 0;
- /* first count the total number of device_nodes */
- for_each_child_of_node(container, node)
+ if (!of_device_is_available(container))
+ return;
+
+ /*
+ * Count the total number of device_nodes so we know how much
+ * device_store to allocate.
+ */
+ for_each_child_of_node(container, node) {
+ if (!of_device_is_available(node))
+ continue;
num_dev_node++;
+ }
rc = of_spmi_alloc_device_store(d_info, num_dev_node);
if (rc) {
@@ -214,9 +223,10 @@
return;
}
- /* allocate resources per device_node */
i = 0;
for_each_child_of_node(container, node) {
+ if (!of_device_is_available(node))
+ continue;
of_spmi_init_resource(&r_info, node);
of_spmi_sum_node_resources(&r_info, 1);
rc = of_spmi_allocate_node_resources(d_info, &r_info, i);
@@ -226,17 +236,6 @@
of_spmi_free_device_resources(d_info);
return;
}
- i++;
- }
-
- /**
- * Now we need to cycle through again and actually populate
- * the resources for each node.
- */
- i = 0;
- for_each_child_of_node(container, node) {
- of_spmi_init_resource(&r_info, node);
- of_spmi_sum_node_resources(&r_info, 1);
of_spmi_populate_node_resources(d_info, &r_info, i);
i++;
}
@@ -265,6 +264,9 @@
for_each_child_of_node(container, node) {
struct of_spmi_res_info r_info;
+ if (!of_device_is_available(node))
+ continue;
+
/**
* Check to see if this node contains children which
* should be all created as the same spmi_device.
@@ -365,6 +367,9 @@
continue;
}
+ if (!of_device_is_available(node))
+ continue;
+
rc = of_spmi_alloc_device_store(&d_info, 1);
if (rc) {
dev_err(&ctrl->dev, "%s: unable to allocate"
diff --git a/drivers/power/pm8921-charger.c b/drivers/power/pm8921-charger.c
index 3223e6e..1454ca9 100644
--- a/drivers/power/pm8921-charger.c
+++ b/drivers/power/pm8921-charger.c
@@ -1904,13 +1904,14 @@
turn_on_usb_ovp_fet(chip);
} else {
- pm_chg_masked_write(chip, USB_OVP_CONTROL,
- USB_OVP_DEBOUNCE_TIME, 0x1);
- pr_debug("Exit count=%d chg_gone=%d, usb_valid=%d\n",
- count, chg_gone, usb_chg_plugged_in);
- return;
+ break;
}
}
+ pm_chg_masked_write(chip, USB_OVP_CONTROL,
+ USB_OVP_DEBOUNCE_TIME, 0x2);
+ pr_debug("Exit count=%d chg_gone=%d, usb_valid=%d\n",
+ count, chg_gone, usb_chg_plugged_in);
+ return;
}
static int find_usb_ma_value(int value)
diff --git a/drivers/regulator/stub-regulator.c b/drivers/regulator/stub-regulator.c
index 6198c40..1c4b935 100644
--- a/drivers/regulator/stub-regulator.c
+++ b/drivers/regulator/stub-regulator.c
@@ -215,11 +215,18 @@
},
};
-static int __init regulator_stub_init(void)
+int __init regulator_stub_init(void)
{
+ static int registered;
+
+ if (registered)
+ return 0;
+ else
+ registered = 1;
return platform_driver_register(®ulator_stub_driver);
}
postcore_initcall(regulator_stub_init);
+EXPORT_SYMBOL(regulator_stub_init);
static void __exit regulator_stub_exit(void)
{
diff --git a/drivers/slimbus/slim-msm-ctrl.c b/drivers/slimbus/slim-msm-ctrl.c
index 8bd5bd8..fa9d1df 100644
--- a/drivers/slimbus/slim-msm-ctrl.c
+++ b/drivers/slimbus/slim-msm-ctrl.c
@@ -88,10 +88,80 @@
#define QC_DEVID_PGD 0x5
#define QC_MSM_DEVS 5
+#define PGD_THIS_EE(r, v) ((v) ? PGD_THIS_EE_V2(r) : PGD_THIS_EE_V1(r))
+#define PGD_PORT(r, p, v) ((v) ? PGD_PORT_V2(r, p) : PGD_PORT_V1(r, p))
+#define CFG_PORT(r, v) ((v) ? CFG_PORT_V2(r) : CFG_PORT_V1(r))
+
+#define PGD_THIS_EE_V2(r) (dev->base + (r ## _V2) + (dev->ee * 0x1000))
+#define PGD_PORT_V2(r, p) (dev->base + (r ## _V2) + ((p) * 0x1000))
+#define CFG_PORT_V2(r) ((r ## _V2))
/* Component registers */
-enum comp_reg {
- COMP_CFG = 0,
- COMP_TRUST_CFG = 0x14,
+enum comp_reg_v2 {
+ COMP_CFG_V2 = 4,
+ COMP_TRUST_CFG_V2 = 0x3000,
+};
+
+/* Manager PGD registers */
+enum pgd_reg_v2 {
+ PGD_CFG_V2 = 0x800,
+ PGD_STAT_V2 = 0x804,
+ PGD_INT_EN_V2 = 0x810,
+ PGD_INT_STAT_V2 = 0x814,
+ PGD_INT_CLR_V2 = 0x818,
+ PGD_OWN_EEn_V2 = 0x300C,
+ PGD_PORT_INT_EN_EEn_V2 = 0x5000,
+ PGD_PORT_INT_ST_EEn_V2 = 0x5004,
+ PGD_PORT_INT_CL_EEn_V2 = 0x5008,
+ PGD_PORT_CFGn_V2 = 0x14000,
+ PGD_PORT_STATn_V2 = 0x14004,
+ PGD_PORT_PARAMn_V2 = 0x14008,
+ PGD_PORT_BLKn_V2 = 0x1400C,
+ PGD_PORT_TRANn_V2 = 0x14010,
+ PGD_PORT_MCHANn_V2 = 0x14014,
+ PGD_PORT_PSHPLLn_V2 = 0x14018,
+ PGD_PORT_PC_CFGn_V2 = 0x8000,
+ PGD_PORT_PC_VALn_V2 = 0x8004,
+ PGD_PORT_PC_VFR_TSn_V2 = 0x8008,
+ PGD_PORT_PC_VFR_STn_V2 = 0x800C,
+ PGD_PORT_PC_VFR_CLn_V2 = 0x8010,
+ PGD_IE_STAT_V2 = 0x820,
+ PGD_VE_STAT_V2 = 0x830,
+};
+
+#define PGD_THIS_EE_V1(r) (dev->base + (r ## _V1) + (dev->ee * 16))
+#define PGD_PORT_V1(r, p) (dev->base + (r ## _V1) + ((p) * 32))
+#define CFG_PORT_V1(r) ((r ## _V1))
+/* Component registers */
+enum comp_reg_v1 {
+ COMP_CFG_V1 = 0,
+ COMP_TRUST_CFG_V1 = 0x14,
+};
+
+/* Manager PGD registers */
+enum pgd_reg_v1 {
+ PGD_CFG_V1 = 0x1000,
+ PGD_STAT_V1 = 0x1004,
+ PGD_INT_EN_V1 = 0x1010,
+ PGD_INT_STAT_V1 = 0x1014,
+ PGD_INT_CLR_V1 = 0x1018,
+ PGD_OWN_EEn_V1 = 0x1020,
+ PGD_PORT_INT_EN_EEn_V1 = 0x1030,
+ PGD_PORT_INT_ST_EEn_V1 = 0x1034,
+ PGD_PORT_INT_CL_EEn_V1 = 0x1038,
+ PGD_PORT_CFGn_V1 = 0x1080,
+ PGD_PORT_STATn_V1 = 0x1084,
+ PGD_PORT_PARAMn_V1 = 0x1088,
+ PGD_PORT_BLKn_V1 = 0x108C,
+ PGD_PORT_TRANn_V1 = 0x1090,
+ PGD_PORT_MCHANn_V1 = 0x1094,
+ PGD_PORT_PSHPLLn_V1 = 0x1098,
+ PGD_PORT_PC_CFGn_V1 = 0x1600,
+ PGD_PORT_PC_VALn_V1 = 0x1604,
+ PGD_PORT_PC_VFR_TSn_V1 = 0x1608,
+ PGD_PORT_PC_VFR_STn_V1 = 0x160C,
+ PGD_PORT_PC_VFR_CLn_V1 = 0x1610,
+ PGD_IE_STAT_V1 = 0x1700,
+ PGD_VE_STAT_V1 = 0x1710,
};
/* Manager registers */
@@ -143,33 +213,6 @@
INTF_VE_STAT = 0x640,
};
-/* Manager PGD registers */
-enum pgd_reg {
- PGD_CFG = 0x1000,
- PGD_STAT = 0x1004,
- PGD_INT_EN = 0x1010,
- PGD_INT_STAT = 0x1014,
- PGD_INT_CLR = 0x1018,
- PGD_OWN_EEn = 0x1020,
- PGD_PORT_INT_EN_EEn = 0x1030,
- PGD_PORT_INT_ST_EEn = 0x1034,
- PGD_PORT_INT_CL_EEn = 0x1038,
- PGD_PORT_CFGn = 0x1080,
- PGD_PORT_STATn = 0x1084,
- PGD_PORT_PARAMn = 0x1088,
- PGD_PORT_BLKn = 0x108C,
- PGD_PORT_TRANn = 0x1090,
- PGD_PORT_MCHANn = 0x1094,
- PGD_PORT_PSHPLLn = 0x1098,
- PGD_PORT_PC_CFGn = 0x1600,
- PGD_PORT_PC_VALn = 0x1604,
- PGD_PORT_PC_VFR_TSn = 0x1608,
- PGD_PORT_PC_VFR_STn = 0x160C,
- PGD_PORT_PC_VFR_CLn = 0x1610,
- PGD_IE_STAT = 0x1700,
- PGD_VE_STAT = 0x1710,
-};
-
enum rsc_grp {
EE_MGR_RSC_GRP = 1 << 10,
EE_NGD_2 = 2 << 6,
@@ -245,6 +288,7 @@
bool chan_active;
enum msm_ctrl_state state;
int nsats;
+ u32 ver;
};
struct msm_sat_chan {
@@ -509,13 +553,13 @@
mb();
complete(&dev->reconf);
}
- pstat = readl_relaxed(dev->base + PGD_PORT_INT_ST_EEn + (16 * dev->ee));
+ pstat = readl_relaxed(PGD_THIS_EE(PGD_PORT_INT_ST_EEn, dev->ver));
if (pstat != 0) {
int i = 0;
for (i = dev->pipe_b; i < MSM_SLIM_NPORTS; i++) {
if (pstat & 1 << i) {
- u32 val = readl_relaxed(dev->base +
- PGD_PORT_STATn + (i * 32));
+ u32 val = readl_relaxed(PGD_PORT(PGD_PORT_STATn,
+ i, dev->ver));
if (val & (1 << 19)) {
dev->ctrl.ports[i].err =
SLIM_P_DISCONNECT;
@@ -532,8 +576,8 @@
dev->ctrl.ports[i].err =
SLIM_P_UNDERFLOW;
}
- writel_relaxed(1, dev->base + PGD_PORT_INT_CL_EEn +
- (dev->ee * 16));
+ writel_relaxed(1, PGD_THIS_EE(PGD_PORT_INT_CL_EEn,
+ dev->ver));
}
/*
* Guarantee that port interrupt bit(s) clearing writes go
@@ -612,13 +656,13 @@
static void msm_hw_set_port(struct msm_slim_ctrl *dev, u8 pn)
{
u32 set_cfg = DEF_WATERMARK | DEF_ALIGN | DEF_PACK | ENABLE_PORT;
- u32 int_port = readl_relaxed(dev->base + PGD_PORT_INT_EN_EEn +
- (dev->ee * 16));
- writel_relaxed(set_cfg, dev->base + PGD_PORT_CFGn + (pn * 32));
- writel_relaxed(DEF_BLKSZ, dev->base + PGD_PORT_BLKn + (pn * 32));
- writel_relaxed(DEF_TRANSZ, dev->base + PGD_PORT_TRANn + (pn * 32));
- writel_relaxed((int_port | 1 << pn) , dev->base + PGD_PORT_INT_EN_EEn +
- (dev->ee * 16));
+ u32 int_port = readl_relaxed(PGD_THIS_EE(PGD_PORT_INT_EN_EEn,
+ dev->ver));
+ writel_relaxed(set_cfg, PGD_PORT(PGD_PORT_CFGn, pn, dev->ver));
+ writel_relaxed(DEF_BLKSZ, PGD_PORT(PGD_PORT_BLKn, pn, dev->ver));
+ writel_relaxed(DEF_TRANSZ, PGD_PORT(PGD_PORT_TRANn, pn, dev->ver));
+ writel_relaxed((int_port | 1 << pn) , PGD_THIS_EE(PGD_PORT_INT_EN_EEn,
+ dev->ver));
/* Make sure that port registers are updated before returning */
mb();
}
@@ -645,8 +689,8 @@
}
}
- stat = readl_relaxed(dev->base + PGD_PORT_STATn +
- (32 * (pn + dev->pipe_b)));
+ stat = readl_relaxed(PGD_PORT(PGD_PORT_STATn, (pn + dev->pipe_b),
+ dev->ver));
if (dev->ctrl.ports[pn].flow == SLIM_SRC) {
cfg->destination = dev->bam.hdl;
cfg->source = SPS_DEV_HANDLE_MEM;
@@ -1947,10 +1991,13 @@
clk_set_rate(dev->rclk, SLIM_ROOT_FREQ);
clk_prepare_enable(dev->rclk);
+ dev->ver = readl_relaxed(dev->base);
+ /* Version info in 16 MSbits */
+ dev->ver >>= 16;
/* Component register initialization */
- writel_relaxed(1, dev->base + COMP_CFG);
+ writel_relaxed(1, dev->base + CFG_PORT(COMP_CFG, dev->ver));
writel_relaxed((EE_MGR_RSC_GRP | EE_NGD_2 | EE_NGD_1),
- dev->base + COMP_TRUST_CFG);
+ dev->base + CFG_PORT(COMP_TRUST_CFG, dev->ver));
/*
* Manager register initialization
@@ -2001,15 +2048,16 @@
* ported generic device inside MSM manager
*/
mb();
- writel_relaxed(1, dev->base + PGD_CFG);
- writel_relaxed(0x3F<<17, dev->base + (PGD_OWN_EEn + (4 * dev->ee)));
+ writel_relaxed(1, dev->base + CFG_PORT(PGD_CFG, dev->ver));
+ writel_relaxed(0x3F<<17, dev->base + CFG_PORT(PGD_OWN_EEn, dev->ver) +
+ (4 * dev->ee));
/*
* Make sure that ported generic device is enabled and port-EE settings
* are written through before finally enabling the component
*/
mb();
- writel_relaxed(1, dev->base + COMP_CFG);
+ writel_relaxed(1, dev->base + CFG_PORT(COMP_CFG, dev->ver));
/*
* Make sure that all writes have gone through before exiting this
* function
@@ -2026,7 +2074,7 @@
return 0;
err_ctrl_failed:
- writel_relaxed(0, dev->base + COMP_CFG);
+ writel_relaxed(0, dev->base + CFG_PORT(COMP_CFG, dev->ver));
err_clk_get_failed:
kfree(dev->satd);
err_request_irq_failed:
diff --git a/drivers/staging/qcache/fmem.c b/drivers/staging/qcache/fmem.c
index acca6f1..4250ff5 100644
--- a/drivers/staging/qcache/fmem.c
+++ b/drivers/staging/qcache/fmem.c
@@ -223,6 +223,9 @@
{
int ret = 0;
+ if (fmem_state == FMEM_UNINITIALIZED)
+ return NOTIFY_OK;
+
switch (action) {
case MEM_ONLINE:
fmem_mem_online_callback(arg);
diff --git a/drivers/staging/qcache/qcache-main.c b/drivers/staging/qcache/qcache-main.c
index f6838d1..ea6635c 100644
--- a/drivers/staging/qcache/qcache-main.c
+++ b/drivers/staging/qcache/qcache-main.c
@@ -160,15 +160,18 @@
spin_lock_irqsave(&qc->lock, flags);
offset = bitmap_find_free_region(qc->bitmap, qc->pages, 0);
- spin_unlock_irqrestore(&qc->lock, flags);
- if (offset < 0)
+ if (offset < 0) {
+ spin_unlock_irqrestore(&qc->lock, flags);
return NULL;
+ }
- addr = qc->addr + offset * PAGE_SIZE;
zcache_qc_allocated++;
zcache_qc_used++;
zcache_qc_max_used = max(zcache_qc_max_used, zcache_qc_used);
+ spin_unlock_irqrestore(&qc->lock, flags);
+
+ addr = qc->addr + offset * PAGE_SIZE;
return addr;
}
@@ -183,10 +186,10 @@
spin_lock_irqsave(&qc->lock, flags);
bitmap_release_region(qc->bitmap, offset, 0);
- spin_unlock_irqrestore(&qc->lock, flags);
zcache_qc_freed++;
zcache_qc_used--;
+ spin_unlock_irqrestore(&qc->lock, flags);
}
/*
diff --git a/drivers/tty/serial/msm_serial_hs_lite.c b/drivers/tty/serial/msm_serial_hs_lite.c
index 9a8d552..285d1de 100644
--- a/drivers/tty/serial/msm_serial_hs_lite.c
+++ b/drivers/tty/serial/msm_serial_hs_lite.c
@@ -141,6 +141,16 @@
return UART_TO_MSM(port)->is_uartdm;
}
+static int get_line(struct platform_device *pdev)
+{
+ const struct msm_serial_hslite_platform_data *pdata =
+ pdev->dev.platform_data;
+ if (pdata)
+ return pdata->line;
+
+ return pdev->id;
+}
+
static int clk_en(struct uart_port *port, int enable)
{
struct msm_hsl_port *msm_hsl_port = UART_TO_MSM(port);
@@ -1243,7 +1253,7 @@
struct uart_port *port;
struct platform_device *pdev = to_platform_device(dev);
- port = get_port_from_line(pdev->id);
+ port = get_port_from_line(get_line(pdev));
enable = get_console_state(port);
@@ -1264,7 +1274,7 @@
struct uart_port *port;
struct platform_device *pdev = to_platform_device(dev);
- port = get_port_from_line(pdev->id);
+ port = get_port_from_line(get_line(pdev));
cur_state = get_console_state(port);
enable = buf[0] - '0';
@@ -1332,12 +1342,12 @@
if (pdev->id == -1)
pdev->id = atomic_inc_return(&msm_serial_hsl_next_id) - 1;
- if (unlikely(pdev->id < 0 || pdev->id >= UART_NR))
+ if (unlikely(get_line(pdev) < 0 || get_line(pdev) >= UART_NR))
return -ENXIO;
printk(KERN_INFO "msm_serial_hsl: detected port #%d\n", pdev->id);
- port = get_port_from_line(pdev->id);
+ port = get_port_from_line(get_line(pdev));
port->dev = &pdev->dev;
msm_hsl_port = UART_TO_MSM(port);
@@ -1395,7 +1405,7 @@
if (unlikely(ret))
pr_err("%s():Can't create console attribute\n", __func__);
#endif
- msm_hsl_debugfs_init(msm_hsl_port, pdev->id);
+ msm_hsl_debugfs_init(msm_hsl_port, get_line(pdev));
/* Temporarily increase the refcount on the GSBI clock to avoid a race
* condition with the earlyprintk handover mechanism.
@@ -1413,7 +1423,7 @@
struct msm_hsl_port *msm_hsl_port = platform_get_drvdata(pdev);
struct uart_port *port;
- port = get_port_from_line(pdev->id);
+ port = get_port_from_line(get_line(pdev));
#ifdef CONFIG_SERIAL_MSM_HSL_CONSOLE
device_remove_file(&pdev->dev, &dev_attr_console);
#endif
@@ -1436,7 +1446,7 @@
{
struct platform_device *pdev = to_platform_device(dev);
struct uart_port *port;
- port = get_port_from_line(pdev->id);
+ port = get_port_from_line(get_line(pdev));
if (port) {
@@ -1455,7 +1465,7 @@
{
struct platform_device *pdev = to_platform_device(dev);
struct uart_port *port;
- port = get_port_from_line(pdev->id);
+ port = get_port_from_line(get_line(pdev));
if (port) {
@@ -1478,7 +1488,7 @@
{
struct platform_device *pdev = to_platform_device(dev);
struct uart_port *port;
- port = get_port_from_line(pdev->id);
+ port = get_port_from_line(get_line(pdev));
dev_dbg(dev, "pm_runtime: suspending\n");
msm_hsl_deinit_clock(port);
@@ -1489,7 +1499,7 @@
{
struct platform_device *pdev = to_platform_device(dev);
struct uart_port *port;
- port = get_port_from_line(pdev->id);
+ port = get_port_from_line(get_line(pdev));
dev_dbg(dev, "pm_runtime: resuming\n");
msm_hsl_init_clock(port);
diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
index 593d1db..5607ac4 100644
--- a/drivers/usb/dwc3/Makefile
+++ b/drivers/usb/dwc3/Makefile
@@ -4,10 +4,7 @@
obj-$(CONFIG_USB_DWC3) += dwc3.o
dwc3-y := core.o
-
-ifneq ($(CONFIG_USB_GADGET_DWC3),)
- dwc3-y += gadget.o ep0.o
-endif
+dwc3-y += gadget.o ep0.o
ifneq ($(CONFIG_DEBUG_FS),)
dwc3-y += debugfs.o
@@ -28,7 +25,7 @@
# PCI doesn't provide nops if CONFIG_PCI isn't enabled.
##
-obj-$(CONFIG_USB_DWC3) += dwc3-omap.o
+obj-$(CONFIG_USB_DWC3_OMAP) += dwc3-omap.o
ifneq ($(CONFIG_PCI),)
obj-$(CONFIG_USB_DWC3) += dwc3-pci.o
diff --git a/drivers/usb/dwc3/gadget.h b/drivers/usb/dwc3/gadget.h
index 71145a4..9206096 100644
--- a/drivers/usb/dwc3/gadget.h
+++ b/drivers/usb/dwc3/gadget.h
@@ -110,7 +110,7 @@
list_move_tail(&req->list, &dep->req_queued);
}
-#if defined(CONFIG_USB_GADGET_DWC3) || defined(CONFIG_USB_GADGET_DWC3_MODULE)
+#if defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_DWC3_MODULE)
int dwc3_gadget_init(struct dwc3 *dwc);
void dwc3_gadget_exit(struct dwc3 *dwc);
#else
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 0865f91..f8327c8 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -300,17 +300,6 @@
PXA9xx Processor series include a high speed USB2.0 device
controller, which support high speed and full speed USB peripheral.
-config USB_GADGET_DWC3
- tristate "DesignWare USB3.0 (DRD) Controller"
- depends on USB_DWC3
- select USB_GADGET_DUALSPEED
- select USB_GADGET_SUPERSPEED
- help
- DesignWare USB3.0 controller is a SuperSpeed USB3.0 Controller
- which can be configured for peripheral-only, host-only, hub-only
- and Dual-Role operation. This Controller was first integrated into
- the OMAP5 series of processors. More information about the OMAP5
- version of this controller, refer to http://www.ti.com/omap5.
#
# Controllers available in both integrated and discrete versions
#
@@ -476,6 +465,32 @@
dynamically linked module called "ci13xxx_msm_hsic" and force all
gadget drivers to also be dynamically linked.
+config USB_DWC3_MSM
+ tristate "DesignWare USB3.0 (DRD) Controller for MSM"
+ depends on ARCH_MSM
+ select USB_DWC3
+ select USB_GADGET_DUALSPEED
+ select USB_GADGET_SELECTED
+ help
+ The DesignWare USB3.0 controller is a SuperSpeed USB3.0 Controller
+ integrated into the Qualcomm MSM chipset series, supporting host,
+ device and otg modes of operation. For more information please
+ refer to http://www.qualcomm.com/chipsets.
+
+config USB_DWC3_OMAP
+ tristate "DesignWare USB3.0 (DRD) Controller for OMAP"
+ depends on ARCH_OMAP
+ select USB_DWC3
+ select USB_GADGET_DUALSPEED
+ select USB_GADGET_SUPERSPEED
+ select USB_GADGET_SELECTED
+ help
+ DesignWare USB3.0 controller is a SuperSpeed USB3.0 Controller
+ which can be configured for peripheral-only, host-only, hub-only
+ and Dual-Role operation. This Controller was first integrated into
+ the OMAP5 series of processors. More information about the OMAP5
+ version of this controller, refer to http://www.ti.com/omap5.
+
#
# LAST -- dummy/emulated controller
#
@@ -527,9 +542,15 @@
# Selected by UDC drivers that support super-speed opperation
config USB_GADGET_SUPERSPEED
- bool
+ bool "Operate as superspeed"
depends on USB_GADGET
depends on USB_GADGET_DUALSPEED
+ default n
+ help
+ When a superspeed peripheral controller is selected
+ (for example DesignWare USB3.0 controller), use this flag to
+ indicate if the device should operate in superspeed(=y)
+ or not.
#
# USB Gadget Drivers
diff --git a/drivers/usb/gadget/android.c b/drivers/usb/gadget/android.c
index ee44846..3e5c6f1 100644
--- a/drivers/usb/gadget/android.c
+++ b/drivers/usb/gadget/android.c
@@ -183,6 +183,12 @@
.bConfigurationValue = 1,
};
+enum android_device_state {
+ USB_DISCONNECTED,
+ USB_CONNECTED,
+ USB_CONFIGURED,
+};
+
static void android_work(struct work_struct *data)
{
struct android_dev *dev = container_of(data, struct android_dev, work);
@@ -191,18 +197,45 @@
char *connected[2] = { "USB_STATE=CONNECTED", NULL };
char *configured[2] = { "USB_STATE=CONFIGURED", NULL };
char **uevent_envp = NULL;
+ static enum android_device_state last_uevent, next_state;
unsigned long flags;
spin_lock_irqsave(&cdev->lock, flags);
- if (cdev->config)
+ if (cdev->config) {
uevent_envp = configured;
- else if (dev->connected != dev->sw_connected)
+ next_state = USB_CONFIGURED;
+ } else if (dev->connected != dev->sw_connected) {
uevent_envp = dev->connected ? connected : disconnected;
+ next_state = dev->connected ? USB_CONNECTED : USB_DISCONNECTED;
+ }
dev->sw_connected = dev->connected;
spin_unlock_irqrestore(&cdev->lock, flags);
if (uevent_envp) {
+ /*
+ * Some userspace modules, e.g. MTP, work correctly only if
+ * CONFIGURED uevent is preceded by DISCONNECT uevent.
+ * Check if we missed sending out a DISCONNECT uevent. This can
+ * happen if host PC resets and configures device really quick.
+ */
+ if (((uevent_envp == connected) &&
+ (last_uevent != USB_DISCONNECTED)) ||
+ ((uevent_envp == configured) &&
+ (last_uevent == USB_CONFIGURED))) {
+ pr_info("%s: sent missed DISCONNECT event\n", __func__);
+ kobject_uevent_env(&dev->dev->kobj, KOBJ_CHANGE,
+ disconnected);
+ msleep(20);
+ }
+ /*
+ * Before sending out CONFIGURED uevent give function drivers
+ * a chance to wakeup userspace threads and notify disconnect
+ */
+ if (uevent_envp == configured)
+ msleep(50);
+
kobject_uevent_env(&dev->dev->kobj, KOBJ_CHANGE, uevent_envp);
+ last_uevent = next_state;
pr_info("%s: sent uevent %s\n", __func__, uevent_envp[0]);
} else {
pr_info("%s: did not send uevent (%d %d %p)\n", __func__,
diff --git a/drivers/usb/gadget/ci13xxx_msm_hsic.c b/drivers/usb/gadget/ci13xxx_msm_hsic.c
index 95a70d5..c74b69a 100644
--- a/drivers/usb/gadget/ci13xxx_msm_hsic.c
+++ b/drivers/usb/gadget/ci13xxx_msm_hsic.c
@@ -643,7 +643,7 @@
}
dev_info(&pdev->dev, "HSIC Peripheral regs = %p\n", mhsic->regs);
- mhsic->xo_handle = msm_xo_get(MSM_XO_CXO, "hsic_peripheral");
+ mhsic->xo_handle = msm_xo_get(MSM_XO_TCXO_D0, "hsic_peripheral");
if (IS_ERR(mhsic->xo_handle)) {
dev_err(&pdev->dev, "%s not able to get the handle "
"to vote for TCXO\n", __func__);
diff --git a/drivers/usb/gadget/u_data_hsic.c b/drivers/usb/gadget/u_data_hsic.c
index 534aa7b..89d2887 100644
--- a/drivers/usb/gadget/u_data_hsic.c
+++ b/drivers/usb/gadget/u_data_hsic.c
@@ -34,8 +34,8 @@
#define GHSIC_DATA_RMNET_RX_Q_SIZE 50
#define GHSIC_DATA_RMNET_TX_Q_SIZE 300
-#define GHSIC_DATA_SERIAL_RX_Q_SIZE 2
-#define GHSIC_DATA_SERIAL_TX_Q_SIZE 2
+#define GHSIC_DATA_SERIAL_RX_Q_SIZE 10
+#define GHSIC_DATA_SERIAL_TX_Q_SIZE 20
#define GHSIC_DATA_RX_REQ_SIZE 2048
#define GHSIC_DATA_TX_INTR_THRESHOLD 20
diff --git a/drivers/usb/otg/msm_otg.c b/drivers/usb/otg/msm_otg.c
index 037f834..7aa0430 100644
--- a/drivers/usb/otg/msm_otg.c
+++ b/drivers/usb/otg/msm_otg.c
@@ -49,8 +49,7 @@
#define MSM_USB_BASE (motg->regs)
#define DRIVER_NAME "msm_otg"
-#define ID_TIMER_FREQ (jiffies + msecs_to_jiffies(2000))
-#define ID_TIMER_INITIAL_FREQ (jiffies + msecs_to_jiffies(1000))
+#define ID_TIMER_FREQ (jiffies + msecs_to_jiffies(500))
#define ULPI_IO_TIMEOUT_USEC (10 * 1000)
#define USB_PHY_3P3_VOL_MIN 3050000 /* uV */
#define USB_PHY_3P3_VOL_MAX 3300000 /* uV */
@@ -2292,7 +2291,7 @@
msm_otg_start_host(otg, 1);
msm_chg_enable_aca_det(motg);
msm_chg_disable_aca_intr(motg);
- mod_timer(&motg->id_timer, ID_TIMER_INITIAL_FREQ);
+ mod_timer(&motg->id_timer, ID_TIMER_FREQ);
if (msm_chg_check_aca_intr(motg))
work = 1;
}
diff --git a/drivers/video/msm/Kconfig b/drivers/video/msm/Kconfig
index 606d349..b3b4d53 100644
--- a/drivers/video/msm/Kconfig
+++ b/drivers/video/msm/Kconfig
@@ -35,11 +35,16 @@
bool "Support for triple frame buffer"
default n
+config FB_MSM_MDP_HW
+ bool
+ default n
+
choice
prompt "MDP HW version"
default FB_MSM_MDP22
config FB_MSM_MDP22
+ select FB_MSM_MDP_HW
bool "MDP HW ver2.2"
---help---
Support for MSM MDP HW revision 2.2
@@ -54,6 +59,7 @@
config FB_MSM_MDP303
depends on FB_MSM_MDP30
+ select FB_MSM_MDP_HW
bool "MDP HW ver3.03"
default n
---help---
@@ -64,6 +70,7 @@
config FB_MSM_MDP31
select FB_MSM_LCDC_HW
+ select FB_MSM_MDP_HW
bool "MDP HW ver3.1"
---help---
Support for MSM MDP HW revision 3.1
@@ -71,10 +78,17 @@
config FB_MSM_MDP40
select FB_MSM_LCDC_HW
+ select FB_MSM_MDP_HW
bool "MDP HW ver4.0"
---help---
Support for MSM MDP HW revision 4.0
Say Y here if this is msm7x30 variant platform.
+
+config FB_MSM_MDP_NONE
+ bool "MDP HW None"
+ ---help---
+ Say Y here if this is mdm platform.
+
endchoice
config FB_MSM_EBI2
@@ -885,4 +899,17 @@
endchoice
+config FB_MSM_EBI2_EPSON_S1D_QVGA_PANEL
+ bool "EBI2 Epson QVGA Panel"
+ select FB_MSM_EBI2
+ default n
+ ---help---
+ Support for EBI2 Epson QVGA (240x320) panel
+
+config FB_MSM_EBI2_PANEL_DETECT
+ bool "EBI2 Panel Detect"
+ select FB_MSM_EBI2_EPSON_S1D_QVGA_PANEL
+ default n
+ ---help---
+ Support for EBI2 panel auto detect
endif
diff --git a/drivers/video/msm/external_common.c b/drivers/video/msm/external_common.c
index d6f59aa..eec600e 100644
--- a/drivers/video/msm/external_common.c
+++ b/drivers/video/msm/external_common.c
@@ -18,6 +18,9 @@
/* #define DEBUG */
#define DEV_DBG_PREFIX "EXT_COMMON: "
+/* The start of the data block collection within the CEA Extension Version 3 */
+#define DBC_START_OFFSET 4
+
#include "msm_fb.h"
#include "hdmi_msm.h"
#include "external_common.h"
@@ -317,6 +320,18 @@
return ret;
}
+static ssize_t hdmi_common_rda_edid_scan_info(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ ssize_t ret = snprintf(buf, PAGE_SIZE, "%d, %d, %d\n",
+ external_common_state->pt_scan_info,
+ external_common_state->it_scan_info,
+ external_common_state->ce_scan_info);
+ DEV_DBG("%s: '%s'\n", __func__, buf);
+
+ return ret;
+}
+
static ssize_t hdmi_common_rda_hdcp(struct device *dev,
struct device_attribute *attr, char *buf)
{
@@ -400,6 +415,14 @@
mutex_lock(&hdmi_msm_state_mutex);
hdmi_msm_state->cec_enabled = true;
hdmi_msm_state->cec_logical_addr = 4;
+
+ /* flush CEC queue */
+ hdmi_msm_state->cec_queue_wr = hdmi_msm_state->cec_queue_start;
+ hdmi_msm_state->cec_queue_rd = hdmi_msm_state->cec_queue_start;
+ hdmi_msm_state->cec_queue_full = false;
+ memset(hdmi_msm_state->cec_queue_rd, 0,
+ sizeof(struct hdmi_msm_cec_msg)*CEC_QUEUE_SIZE);
+
mutex_unlock(&hdmi_msm_state_mutex);
hdmi_msm_cec_init();
hdmi_msm_cec_write_logical_addr(
@@ -673,6 +696,8 @@
static DEVICE_ATTR(hpd, S_IRUGO | S_IWUGO, hdmi_common_rda_hpd,
hdmi_common_wta_hpd);
static DEVICE_ATTR(hdcp, S_IRUGO, hdmi_common_rda_hdcp, NULL);
+static DEVICE_ATTR(scan_info, S_IRUGO,
+ hdmi_common_rda_edid_scan_info, NULL);
static DEVICE_ATTR(3d_present, S_IRUGO, hdmi_common_rda_3d_present, NULL);
static DEVICE_ATTR(hdcp_present, S_IRUGO, hdmi_common_rda_hdcp_present, NULL);
#endif
@@ -691,6 +716,7 @@
&dev_attr_edid_modes.attr,
&dev_attr_hdcp.attr,
&dev_attr_hpd.attr,
+ &dev_attr_scan_info.attr,
&dev_attr_3d_present.attr,
&dev_attr_hdcp_present.attr,
#endif
@@ -918,11 +944,12 @@
31500, 60000, 108108, 60000, TRUE},
};
-static const uint8 *hdmi_edid_find_block(const uint8 *in_buf, uint8 type,
- uint8 *len)
+static const uint8 *hdmi_edid_find_block(const uint8 *in_buf,
+ uint32 start_offset, uint8 type, uint8 *len)
{
/* the start of data block collection, start of Video Data Block */
- uint32 offset = 4;
+ uint32 offset = start_offset;
+ uint32 end_dbc_offset = in_buf[2];
*len = 0;
@@ -930,11 +957,11 @@
present.
edid buffer 1, byte 2 being 0 menas no non-DTD/DATA block collection
present and no DTD data present.*/
- if ((in_buf[2] == 0) || (in_buf[2] == 4)) {
+ if ((end_dbc_offset == 0) || (end_dbc_offset == 4)) {
DEV_WARN("EDID: no DTD or non-DTD data present\n");
return NULL;
}
- while (offset < 0x80) {
+ while (offset < end_dbc_offset) {
uint8 block_len = in_buf[offset] & 0x1F;
if ((in_buf[offset] >> 5) == type) {
*len = block_len;
@@ -962,7 +989,8 @@
static uint32 hdmi_edid_extract_ieee_reg_id(const uint8 *in_buf)
{
uint8 len;
- const uint8 *vsd = hdmi_edid_find_block(in_buf, 3, &len);
+ const uint8 *vsd = hdmi_edid_find_block(in_buf, DBC_START_OFFSET, 3,
+ &len);
if (vsd == NULL)
return 0;
@@ -975,7 +1003,8 @@
static void hdmi_edid_extract_3d_present(const uint8 *in_buf)
{
uint8 len, offset;
- const uint8 *vsd = hdmi_edid_find_block(in_buf, 3, &len);
+ const uint8 *vsd = hdmi_edid_find_block(in_buf, DBC_START_OFFSET, 3,
+ &len);
external_common_state->present_3d = 0;
if (vsd == NULL || len < 9) {
@@ -995,7 +1024,8 @@
static void hdmi_edid_extract_latency_fields(const uint8 *in_buf)
{
uint8 len;
- const uint8 *vsd = hdmi_edid_find_block(in_buf, 3, &len);
+ const uint8 *vsd = hdmi_edid_find_block(in_buf, DBC_START_OFFSET, 3,
+ &len);
if (vsd == NULL || len < 12 || !(vsd[8] & BIT(7))) {
external_common_state->video_latency = (uint16)-1;
@@ -1013,7 +1043,8 @@
static void hdmi_edid_extract_speaker_allocation_data(const uint8 *in_buf)
{
uint8 len;
- const uint8 *sad = hdmi_edid_find_block(in_buf, 4, &len);
+ const uint8 *sad = hdmi_edid_find_block(in_buf, DBC_START_OFFSET, 4,
+ &len);
if (sad == NULL)
return;
@@ -1033,7 +1064,8 @@
static void hdmi_edid_extract_audio_data_blocks(const uint8 *in_buf)
{
uint8 len;
- const uint8 *sad = hdmi_edid_find_block(in_buf, 1, &len);
+ const uint8 *sad = hdmi_edid_find_block(in_buf, DBC_START_OFFSET, 1,
+ &len);
uint32 *adb = external_common_state->audio_data_blocks;
if (sad == NULL)
@@ -1052,6 +1084,63 @@
}
}
+static void hdmi_edid_extract_extended_data_blocks(const uint8 *in_buf)
+{
+ uint8 len = 0;
+ uint8 const *prev_etag = in_buf;
+ uint32 start_offset = DBC_START_OFFSET;
+
+ /* A Tage code of 7 identifies extended data blocks */
+ uint8 const *etag = hdmi_edid_find_block(in_buf, start_offset, 7, &len);
+
+ while (etag != NULL) {
+ /* The extended data block should at least be 2 bytes long */
+ if (len < 2) {
+ DEV_DBG("EDID: Found an extended data block of length"
+ "less than 2 bytes. Ignoring ...\n");
+ } else {
+ /*
+ * The second byte of the extended data block has the
+ * extended tag code
+ */
+ switch (etag[1]) {
+ case 0:
+ /* Video Capability Data Block */
+ DEV_DBG("EDID: VCDB=%02X %02X\n", etag[1],
+ etag[2]);
+
+ /*
+ * Check if the sink specifies underscan
+ * support for:
+ * BIT 5: preferred video format
+ * BIT 3: IT video format
+ * BIT 1: CE video format
+ */
+ external_common_state->pt_scan_info = (etag[2] &
+ (BIT(4) | BIT(5))) >> 4;
+ external_common_state->it_scan_info = (etag[2] &
+ (BIT(3) | BIT(2))) >> 2;
+ external_common_state->ce_scan_info = etag[2] &
+ (BIT(1) | BIT(0));
+ DEV_DBG("EDID: Scan Information (pt|it|ce): "
+ "(%d|%d|%d)",
+ external_common_state->pt_scan_info,
+ external_common_state->it_scan_info,
+ external_common_state->ce_scan_info);
+ break;
+ default:
+ DEV_DBG("EDID: Extend Tag Code %d not"
+ "supported\n", etag[1]);
+ break;
+ }
+ }
+
+ /* There could be more that one extended data block */
+ start_offset = etag - prev_etag + len + 1;
+ prev_etag = etag;
+ etag = hdmi_edid_find_block(in_buf, start_offset, 7, &len);
+ }
+}
static void hdmi_edid_detail_desc(const uint8 *data_buf, uint32 *disp_mode)
{
@@ -1196,7 +1285,8 @@
const uint8 *edid_blk0 = &data_buf[0x0];
const uint8 *edid_blk1 = &data_buf[0x80];
const uint8 *svd = num_og_cea_blocks ?
- hdmi_edid_find_block(data_buf+0x80, 2, &len) : NULL;
+ hdmi_edid_find_block(data_buf+0x80, DBC_START_OFFSET,
+ 2, &len) : NULL;
disp_mode_list->num_of_elements = 0;
if (svd != NULL) {
@@ -1208,6 +1298,11 @@
video_format = (*svd & 0x7F) - 1;
add_supported_video_format(disp_mode_list,
video_format);
+ /* Make a note of the preferred video format */
+ if (i == 0) {
+ external_common_state->preferred_video_format =
+ video_format;
+ }
if (video_format == HDMI_VFRMT_640x480p60_4_3)
has480p = TRUE;
}
@@ -1230,6 +1325,11 @@
video_format);
if (video_format == HDMI_VFRMT_640x480p60_4_3)
has480p = TRUE;
+ /* Make a note of the preferred video format */
+ if (i == 0) {
+ external_common_state->preferred_video_format =
+ video_format;
+ }
desc_offset += 0x12;
++i;
}
@@ -1250,6 +1350,11 @@
video_format);
if (video_format == HDMI_VFRMT_640x480p60_4_3)
has480p = TRUE;
+ /* Make a note of the preferred video format */
+ if (i == 0) {
+ external_common_state->preferred_video_format =
+ video_format;
+ }
desc_offset += 0x12;
++i;
}
@@ -1273,6 +1378,11 @@
video_format);
if (video_format == HDMI_VFRMT_640x480p60_4_3)
has480p = TRUE;
+ /* Make a note of the preferred video format */
+ if (i == 0) {
+ external_common_state->preferred_video_format =
+ video_format;
+ }
desc_offset += 0x12;
++i;
}
@@ -1351,6 +1461,7 @@
/* EDID_BLOCK_SIZE[0x80] Each page size in the EDID ROM */
uint8 edid_buf[0x80 * 4];
+ external_common_state->preferred_video_format = 0;
external_common_state->present_3d = 0;
memset(&external_common_state->disp_mode_list, 0,
sizeof(external_common_state->disp_mode_list));
@@ -1402,6 +1513,7 @@
edid_buf+0x80);
hdmi_edid_extract_audio_data_blocks(edid_buf+0x80);
hdmi_edid_extract_3d_present(edid_buf+0x80);
+ hdmi_edid_extract_extended_data_blocks(edid_buf+0x80);
}
break;
case 2:
diff --git a/drivers/video/msm/external_common.h b/drivers/video/msm/external_common.h
index c9ab88e..c6dfeb1 100644
--- a/drivers/video/msm/external_common.h
+++ b/drivers/video/msm/external_common.h
@@ -216,6 +216,10 @@
uint8 speaker_allocation_block;
uint16 video_latency, audio_latency;
uint8 audio_data_block_cnt;
+ uint32 preferred_video_format;
+ uint8 pt_scan_info;
+ uint8 it_scan_info;
+ uint8 ce_scan_info;
boolean present_3d;
boolean present_hdcp;
uint32 audio_data_blocks[16];
diff --git a/drivers/video/msm/hdmi_msm.c b/drivers/video/msm/hdmi_msm.c
index dd22f26..30ce90b 100644
--- a/drivers/video/msm/hdmi_msm.c
+++ b/drivers/video/msm/hdmi_msm.c
@@ -2218,6 +2218,9 @@
{
int hdcp_link_status = HDMI_INP(0x011C);
+ /* Disable HDCP interrupts */
+ HDMI_OUTP(0x0118, 0x0);
+
external_common_state->hdcp_active = FALSE;
/* 0x0130 HDCP_RESET
[0] LINK0_DEAUTHENTICATE */
@@ -2231,9 +2234,6 @@
if (hdcp_link_status & 0x00000004)
hdcp_auth_info((hdcp_link_status & 0x000000F0) >> 4);
-
- /* Disable HDCP interrupts */
- HDMI_OUTP(0x0118, 0x0);
}
static void check_and_clear_HDCP_DDC_Failure(void)
@@ -3675,6 +3675,7 @@
uint32 regVal;
int i;
int mode = 0;
+ boolean use_ce_scan_info = TRUE;
switch (external_common_state->video_resolution) {
case HDMI_VFRMT_720x480p60_4_3:
@@ -3740,6 +3741,48 @@
/* Data Byte 01: 0 Y1 Y0 A0 B1 B0 S1 S0 */
aviInfoFrame[3] = hdmi_msm_avi_iframe_lut[0][mode];
+
+ /*
+ * If the sink specified support for both underscan/overscan
+ * then, by default, set the underscan bit.
+ * Only checking underscan support for preferred format and cea formats
+ */
+ if ((external_common_state->video_resolution ==
+ external_common_state->preferred_video_format)) {
+ use_ce_scan_info = FALSE;
+ switch (external_common_state->pt_scan_info) {
+ case 0:
+ /*
+ * Need to use the info specified for the corresponding
+ * IT or CE format
+ */
+ DEV_DBG("%s: No underscan information specified for the"
+ " preferred video format\n", __func__);
+ use_ce_scan_info = TRUE;
+ break;
+ case 3:
+ DEV_DBG("%s: Setting underscan bit for the preferred"
+ " video format\n", __func__);
+ aviInfoFrame[3] |= 0x02;
+ break;
+ default:
+ DEV_DBG("%s: Underscan information not set for the"
+ " preferred video format\n", __func__);
+ break;
+ }
+ }
+
+ if (use_ce_scan_info) {
+ if (3 == external_common_state->ce_scan_info) {
+ DEV_DBG("%s: Setting underscan bit for the CE video"
+ " format\n", __func__);
+ aviInfoFrame[3] |= 0x02;
+ } else {
+ DEV_DBG("%s: Not setting underscan bit for the CE video"
+ " format\n", __func__);
+ }
+ }
+
/* Data Byte 02: C1 C0 M1 M0 R3 R2 R1 R0 */
aviInfoFrame[4] = hdmi_msm_avi_iframe_lut[1][mode];
/* Data Byte 03: ITC EC2 EC1 EC0 Q1 Q0 SC1 SC0 */
diff --git a/drivers/video/msm/lvds.c b/drivers/video/msm/lvds.c
index e93b238..d9785d8 100644
--- a/drivers/video/msm/lvds.c
+++ b/drivers/video/msm/lvds.c
@@ -181,6 +181,8 @@
lvds_intf = 0x0001078c;
lvds_phy_cfg0 = BIT(6);
}
+ } else {
+ BUG();
}
/* MDP_LVDSPHY_CFG0 */
diff --git a/drivers/video/msm/mddihosti.c b/drivers/video/msm/mddihosti.c
index 4989d35..1a5a3fd 100644
--- a/drivers/video/msm/mddihosti.c
+++ b/drivers/video/msm/mddihosti.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2008-2010, 2012 Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1874,42 +1874,6 @@
MDDI_MSG_ERR("mddi_client_power return %d", ret);
}
-#if 0
- switch (mddi_client_capability_pkt.Mfr_Name) {
- case 0x4474:
- if ((mddi_client_capability_pkt.Product_Code != 0x8960) &&
- (target == DISPLAY_1)) {
- ret = PRISM_WVGA;
- }
- break;
-
- case 0xD263:
- if (target == DISPLAY_1)
- ret = TOSHIBA_VGA_PRIM;
- else if (target == DISPLAY_2)
- ret = TOSHIBA_QCIF_SECD;
- break;
-
- case 0:
- if (mddi_client_capability_pkt.Product_Code == 0x8835) {
- if (target == DISPLAY_1)
- ret = SHARP_QVGA_PRIM;
- else if (target == DISPLAY_2)
- ret = SHARP_128x128_SECD;
- }
- break;
-
- default:
- break;
- }
-
- if ((!client_detection_try) && (ret != TOSHIBA_VGA_PRIM)
- && (ret != TOSHIBA_QCIF_SECD)) {
- /* Not a Toshiba display, so change drive_lo back to default value */
- mddi_host_reg_out(DRIVE_LO, 0x0032);
- }
-#endif
-
#endif
return mddi_client_id;
diff --git a/drivers/video/msm/mdp.c b/drivers/video/msm/mdp.c
index 6c05833..79464bf 100644
--- a/drivers/video/msm/mdp.c
+++ b/drivers/video/msm/mdp.c
@@ -988,9 +988,6 @@
/* DMA update timestamp */
mdp_dma2_last_update_time = ktime_get_real();
/* let's turn on DMA2 block */
-#if 0
- mdp_pipe_ctrl(MDP_DMA2_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
-#endif
#ifdef CONFIG_FB_MSM_MDP22
outpdw(MDP_CMD_DEBUG_ACCESS_BASE + 0x0044, 0x0);/* start DMA */
#else
diff --git a/drivers/video/msm/mdp4_overlay.c b/drivers/video/msm/mdp4_overlay.c
index 4e07cd0..a4db73e 100644
--- a/drivers/video/msm/mdp4_overlay.c
+++ b/drivers/video/msm/mdp4_overlay.c
@@ -1455,8 +1455,6 @@
pipe_cnt++;
mdp4_mixer_blend_setup(pipe);
- if (i == mixer && pipe->pipe_num <= OVERLAY_PIPE_RGB2)
- flush_bits |= (1 << (2 + pipe->pipe_num));
}
}
@@ -1692,15 +1690,23 @@
void mdp4_overlay_reg_flush(struct mdp4_overlay_pipe *pipe, int all)
{
+ struct mdp4_overlay_pipe *bg_pipe;
uint32 bits = 0;
- if (pipe->mixer_num == MDP4_MIXER1)
- bits |= 0x02;
- else
- bits |= 0x01;
+ if (all) {
+ if (pipe->mixer_num == MDP4_MIXER1)
+ bits |= 0x02;
+ else
+ bits |= 0x01;
+ }
- if (all && pipe->pipe_num <= OVERLAY_PIPE_RGB2)
+ if (pipe->pipe_num <= OVERLAY_PIPE_RGB2)
bits |= 1 << (2 + pipe->pipe_num);
+ if (pipe->is_fg && pipe->alpha == 0xFF) {
+ bg_pipe = mdp4_overlay_stage_pipe(pipe->mixer_num,
+ MDP4_MIXER_STAGE_BASE);
+ bits |= 1 << (2 + bg_pipe->pipe_num);
+ }
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
outpdw(MDP_BASE + 0x18000, bits); /* MDP_OVERLAY_REG_FLUSH */
@@ -2823,6 +2829,7 @@
/* primary interface */
ctrl->mixer0_played++;
if (ctrl->panel_mode & MDP4_PANEL_LCDC) {
+ mdp4_overlay_reg_flush(pipe, 0);
if (!mfd->use_ov0_blt)
mdp4_overlay_update_blt_mode(mfd);
mdp4_overlay_lcdc_start();
@@ -2830,6 +2837,7 @@
}
#ifdef CONFIG_FB_MSM_MIPI_DSI
else if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO) {
+ mdp4_overlay_reg_flush(pipe, 0);
if (!mfd->use_ov0_blt)
mdp4_overlay_update_blt_mode(mfd);
mdp4_overlay_dsi_video_start();
@@ -2884,7 +2892,26 @@
char *name;
int domain;
} msm_iommu_ctx_names[] = {
-/* Display domains */
+ /* Display */
+ {
+ .name = "mdp_vg1",
+ .domain = DISPLAY_DOMAIN,
+ },
+ /* Display */
+ {
+ .name = "mdp_vg2",
+ .domain = DISPLAY_DOMAIN,
+ },
+ /* Display */
+ {
+ .name = "mdp_rgb1",
+ .domain = DISPLAY_DOMAIN,
+ },
+ /* Display */
+ {
+ .name = "mdp_rgb2",
+ .domain = DISPLAY_DOMAIN,
+ },
};
void mdp4_iommu_attach(void)
diff --git a/drivers/video/msm/mdp4_overlay_atv.c b/drivers/video/msm/mdp4_overlay_atv.c
index f8200a8..dd827aa 100644
--- a/drivers/video/msm/mdp4_overlay_atv.c
+++ b/drivers/video/msm/mdp4_overlay_atv.c
@@ -117,6 +117,8 @@
mdp4_overlayproc_cfg(pipe);
+ mdp4_overlay_reg_flush(pipe, 1);
+
if (ret == 0)
mdp_pipe_ctrl(MDP_OVERLAY1_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
@@ -184,6 +186,7 @@
}
mdp4_overlay_rgb_setup(pipe);
mdp4_mixer_stage_up(pipe);
+ mdp4_overlay_reg_flush(pipe, 0);
printk(KERN_INFO "mdp4_atv_overlay: pipe=%x ndx=%d\n",
(int)pipe, pipe->pipe_ndx);
diff --git a/drivers/video/msm/mdp4_overlay_dsi_video.c b/drivers/video/msm/mdp4_overlay_dsi_video.c
index c6b7475..f06f380 100644
--- a/drivers/video/msm/mdp4_overlay_dsi_video.c
+++ b/drivers/video/msm/mdp4_overlay_dsi_video.c
@@ -273,6 +273,7 @@
MDP_OUTP(MDP_BASE + DSI_VIDEO_BASE + 0x2c, dsi_underflow_clr);
MDP_OUTP(MDP_BASE + DSI_VIDEO_BASE + 0x30, dsi_hsync_skew);
MDP_OUTP(MDP_BASE + DSI_VIDEO_BASE + 0x38, ctrl_polarity);
+ mdp4_overlay_reg_flush(pipe, 1);
mdp_histogram_ctrl(TRUE);
ret = panel_next_on(pdev);
diff --git a/drivers/video/msm/mdp4_overlay_dtv.c b/drivers/video/msm/mdp4_overlay_dtv.c
index ec8ebae..b94d1a4 100644
--- a/drivers/video/msm/mdp4_overlay_dtv.c
+++ b/drivers/video/msm/mdp4_overlay_dtv.c
@@ -350,6 +350,7 @@
}
mdp4_mixer_stage_up(pipe);
+ mdp4_overlay_reg_flush(pipe, 1);
dtv_pipe = pipe; /* keep it */
}
@@ -561,7 +562,7 @@
*/
temp_src_format = inpdw(rgb_base + 0x0050);
MDP_OUTP(rgb_base + 0x0050, temp_src_format | BIT(22));
- mdp4_mixer_stage_up(dtv_pipe);
+ mdp4_overlay_reg_flush(dtv_pipe, 0);
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
}
diff --git a/drivers/video/msm/mdp4_overlay_lcdc.c b/drivers/video/msm/mdp4_overlay_lcdc.c
index d0a7573..ed4553d 100644
--- a/drivers/video/msm/mdp4_overlay_lcdc.c
+++ b/drivers/video/msm/mdp4_overlay_lcdc.c
@@ -242,6 +242,8 @@
MDP_OUTP(MDP_BASE + LCDC_BASE + 0x20, active_v_start);
MDP_OUTP(MDP_BASE + LCDC_BASE + 0x24, active_v_end);
+ mdp4_overlay_reg_flush(pipe, 1);
+
#ifdef CONFIG_MSM_BUS_SCALING
mdp_bus_scale_update_request(2);
#endif
diff --git a/drivers/video/msm/mdp_ppp_v20.c b/drivers/video/msm/mdp_ppp_v20.c
index e2a6564..fd04009 100644
--- a/drivers/video/msm/mdp_ppp_v20.c
+++ b/drivers/video/msm/mdp_ppp_v20.c
@@ -2177,26 +2177,8 @@
*pppop_reg_ptr |=
(PPP_OP_SCALE_Y_ON | PPP_OP_SCALE_X_ON);
- /* let's use SHIM logic to calculate the partial ROI scaling */
-#if 0
- phasex_step =
- (uint32) mdp_do_div(0x20000000 * iBuf->roi.width,
- dst_roi_width_scale);
- phasey_step =
- (uint32) mdp_do_div(0x20000000 * iBuf->roi.height,
- dst_roi_height_scale);
-
-/*
- phasex_step= ((long long) iBuf->roi.width * 0x20000000)/dst_roi_width_scale;
- phasey_step= ((long long)iBuf->roi.height * 0x20000000)/dst_roi_height_scale;
-*/
-
- phasex_init =
- (((long long)phasex_step - 0x20000000) >> 1);
- phasey_init =
- (((long long)phasey_step - 0x20000000) >> 1);
-
-#else
+ /* let's use SHIM logic to calculate the
+ partial ROI scaling */
mdp_calc_scale_params(iBuf->roi.x, iBuf->roi.width,
dst_roi_width_scale, 1,
&phasex_init, &phasex_step,
@@ -2205,7 +2187,6 @@
dst_roi_height_scale, 0,
&phasey_init, &phasey_step,
&dummy, &dummy);
-#endif
MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x013c,
phasex_init);
MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0140,
diff --git a/drivers/video/msm/mipi_truly_tft540960_1_e.c b/drivers/video/msm/mipi_truly_tft540960_1_e.c
index 937a598..30e255e 100644
--- a/drivers/video/msm/mipi_truly_tft540960_1_e.c
+++ b/drivers/video/msm/mipi_truly_tft540960_1_e.c
@@ -59,7 +59,7 @@
/* add 0X BD command */
static char cmd26_2[6] = {
- 0xBD, 0x01, 0x60, 0x10, 0x38, 0x01 /* 55 HZ */
+ 0xBD, 0x01, 0x48, 0x10, 0x38, 0x01 /* 59 HZ */
};
static char cmd5[5] = {
diff --git a/drivers/video/msm/mipi_truly_tft540960_1_e_cmd_qhd_pt.c b/drivers/video/msm/mipi_truly_tft540960_1_e_cmd_qhd_pt.c
index 82efbef..b3805c5 100644
--- a/drivers/video/msm/mipi_truly_tft540960_1_e_cmd_qhd_pt.c
+++ b/drivers/video/msm/mipi_truly_tft540960_1_e_cmd_qhd_pt.c
@@ -64,7 +64,7 @@
pinfo.lcd.vsync_enable = TRUE;
pinfo.lcd.hw_vsync_mode = TRUE;
- pinfo.lcd.refx100 = 6000; /* adjust refx100 to prevent tearing */
+ pinfo.lcd.refx100 = 6100; /* adjust refx100 to prevent tearing */
pinfo.mipi.mode = DSI_CMD_MODE;
pinfo.mipi.dst_format = DSI_CMD_DST_FORMAT_RGB888;
diff --git a/include/linux/leds-pm8xxx.h b/include/linux/leds-pm8xxx.h
index 18e6398..60755de 100644
--- a/include/linux/leds-pm8xxx.h
+++ b/include/linux/leds-pm8xxx.h
@@ -35,6 +35,9 @@
PM8XXX_ID_FLASH_LED_0,
PM8XXX_ID_FLASH_LED_1,
PM8XXX_ID_WLED,
+ PM8XXX_ID_RGB_LED_RED,
+ PM8XXX_ID_RGB_LED_GREEN,
+ PM8XXX_ID_RGB_LED_BLUE,
PM8XXX_ID_MAX,
};
diff --git a/include/linux/mfd/pm8xxx/misc.h b/include/linux/mfd/pm8xxx/misc.h
index c90d8d1..77683ce 100644
--- a/include/linux/mfd/pm8xxx/misc.h
+++ b/include/linux/mfd/pm8xxx/misc.h
@@ -79,7 +79,7 @@
};
enum pm8xxx_aux_clk_div {
- X0_DIV_NONE,
+ XO_DIV_NONE,
XO_DIV_1,
XO_DIV_2,
XO_DIV_4,
diff --git a/include/linux/msm_mdp.h b/include/linux/msm_mdp.h
index 56e8438..aa54b71 100644
--- a/include/linux/msm_mdp.h
+++ b/include/linux/msm_mdp.h
@@ -25,7 +25,7 @@
#define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int)
#define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor)
#define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap)
-#define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram)
+#define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram_data)
/* new ioctls's for set/get ccs matrix */
#define MSMFB_GET_CCS_MATRIX _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs)
#define MSMFB_SET_CCS_MATRIX _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs)
@@ -44,8 +44,9 @@
#define MSMFB_OVERLAY_BLT _IOWR(MSMFB_IOCTL_MAGIC, 142, \
struct msmfb_overlay_blt)
#define MSMFB_OVERLAY_BLT_OFFSET _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int)
-#define MSMFB_HISTOGRAM_START _IO(MSMFB_IOCTL_MAGIC, 144)
-#define MSMFB_HISTOGRAM_STOP _IO(MSMFB_IOCTL_MAGIC, 145)
+#define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144, \
+ struct mdp_histogram_start_req)
+#define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int)
#define MSMFB_NOTIFY_UPDATE _IOW(MSMFB_IOCTL_MAGIC, 146, unsigned int)
#define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147, \
@@ -328,6 +329,32 @@
MDP_BLOCK_MAX,
};
+/*
+ * mdp_histogram_start_req is used to provide the parameters for
+ * histogram start request
+ */
+
+struct mdp_histogram_start_req {
+ uint32_t block;
+ uint8_t frame_cnt;
+ uint8_t bit_mask;
+ uint8_t num_bins;
+};
+
+/*
+ * mdp_histogram_data is used to return the histogram data, once
+ * the histogram is done/stopped/cance
+ */
+
+struct mdp_histogram_data {
+ uint32_t block;
+ uint8_t bin_cnt;
+ uint32_t *c0;
+ uint32_t *c1;
+ uint32_t *c2;
+ uint32_t extra_info[2];
+};
+
struct mdp_pcc_coeff {
uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1;
};
diff --git a/include/linux/regulator/stub-regulator.h b/include/linux/regulator/stub-regulator.h
index 1119c51..e7f4110 100644
--- a/include/linux/regulator/stub-regulator.h
+++ b/include/linux/regulator/stub-regulator.h
@@ -30,4 +30,6 @@
int hpm_min_load;
int system_uA;
};
+
+int __init regulator_stub_init(void);
#endif
diff --git a/include/media/gpio-ir-recv.h b/include/media/gpio-ir-recv.h
index 3eab611..61a7fbb 100644
--- a/include/media/gpio-ir-recv.h
+++ b/include/media/gpio-ir-recv.h
@@ -16,7 +16,6 @@
struct gpio_ir_recv_platform_data {
unsigned int gpio_nr;
bool active_low;
- bool can_wakeup;
};
#endif /* __GPIO_IR_RECV_H__ */
diff --git a/include/net/bluetooth/amp.h b/include/net/bluetooth/amp.h
index 0a2849a..ec517b0 100644
--- a/include/net/bluetooth/amp.h
+++ b/include/net/bluetooth/amp.h
@@ -1,5 +1,5 @@
/*
- Copyright (c) 2010-2011 Code Aurora Forum. All rights reserved.
+ Copyright (c) 2010-2012 Code Aurora Forum. All rights reserved.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License version 2 and
@@ -115,7 +115,7 @@
void amp_exit(void);
/* L2CAP-AMP fixed channel interface */
-void amp_conn_ind(struct l2cap_conn *conn, struct sk_buff *skb);
+void amp_conn_ind(struct hci_conn *hcon, struct sk_buff *skb);
/* L2CAP-AMP link interface */
void amp_create_physical(struct l2cap_conn *conn, struct sock *sk);
@@ -256,7 +256,7 @@
};
struct amp_work_conn_ind {
struct work_struct work;
- struct l2cap_conn *conn;
+ struct hci_conn *hcon;
struct sk_buff *skb;
};
struct amp_work_create_physical {
diff --git a/include/net/bluetooth/l2cap.h b/include/net/bluetooth/l2cap.h
index d5c4189..b903c5c 100644
--- a/include/net/bluetooth/l2cap.h
+++ b/include/net/bluetooth/l2cap.h
@@ -51,7 +51,7 @@
#define L2CAP_CONN_TIMEOUT (40000) /* 40 seconds */
#define L2CAP_INFO_TIMEOUT (4000) /* 4 seconds */
-#define L2CAP_MOVE_TIMEOUT (2*HZ) /* 2 seconds */
+#define L2CAP_MOVE_TIMEOUT (4*HZ) /* 4 seconds */
#define L2CAP_MOVE_ERTX_TIMEOUT (60*HZ) /* 60 seconds */
/* L2CAP socket address */
diff --git a/net/bluetooth/amp.c b/net/bluetooth/amp.c
index 0a3b91d..df80c42 100644
--- a/net/bluetooth/amp.c
+++ b/net/bluetooth/amp.c
@@ -1,5 +1,5 @@
/*
- Copyright (c) 2010-2011 Code Aurora Forum. All rights reserved.
+ Copyright (c) 2010-2012 Code Aurora Forum. All rights reserved.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License version 2 and
@@ -87,15 +87,15 @@
return found;
}
-static struct amp_mgr *get_create_amp_mgr(struct l2cap_conn *conn,
+static struct amp_mgr *get_create_amp_mgr(struct hci_conn *hcon,
struct sk_buff *skb)
{
struct amp_mgr *mgr;
write_lock(&_mgr_list_lock);
list_for_each_entry(mgr, &_mgr_list, list) {
- if (mgr->l2cap_conn == conn) {
- BT_DBG("conn %p found %p", conn, mgr);
+ if (mgr->l2cap_conn == hcon->l2cap_data) {
+ BT_DBG("found %p", mgr);
write_unlock(&_mgr_list_lock);
goto gc_finished;
}
@@ -106,13 +106,13 @@
if (!mgr)
return NULL;
- mgr->l2cap_conn = conn;
+ mgr->l2cap_conn = hcon->l2cap_data;
mgr->next_ident = 1;
INIT_LIST_HEAD(&mgr->ctx_list);
rwlock_init(&mgr->ctx_list_lock);
mgr->skb = skb;
- BT_DBG("conn %p mgr %p", conn, mgr);
- mgr->a2mp_sock = open_fixed_channel(conn->src, conn->dst);
+ BT_DBG("hcon %p mgr %p", hcon, mgr);
+ mgr->a2mp_sock = open_fixed_channel(&hcon->hdev->bdaddr, &hcon->dst);
if (!mgr->a2mp_sock) {
kfree(mgr);
return NULL;
@@ -484,7 +484,7 @@
struct amp_ctx *ctx = NULL;
BT_DBG("conn %p", conn);
- mgr = get_create_amp_mgr(conn, NULL);
+ mgr = get_create_amp_mgr(conn->hcon, NULL);
if (!mgr)
goto cp_finished;
BT_DBG("mgr %p", mgr);
@@ -514,7 +514,7 @@
if (!hdev)
goto ap_finished;
BT_DBG("hdev %p", hdev);
- mgr = get_create_amp_mgr(lcon, NULL);
+ mgr = get_create_amp_mgr(lcon->hcon, NULL);
if (!mgr)
goto ap_finished;
BT_DBG("mgr %p", mgr);
@@ -1773,12 +1773,13 @@
static void conn_ind_worker(struct work_struct *w)
{
struct amp_work_conn_ind *work = (struct amp_work_conn_ind *) w;
- struct l2cap_conn *conn = work->conn;
+ struct hci_conn *hcon = work->hcon;
struct sk_buff *skb = work->skb;
struct amp_mgr *mgr;
- mgr = get_create_amp_mgr(conn, skb);
+ mgr = get_create_amp_mgr(hcon, skb);
BT_DBG("mgr %p", mgr);
+ hci_conn_put(hcon);
kfree(work);
}
@@ -1804,17 +1805,20 @@
/* L2CAP Fixed Channel interface */
-void amp_conn_ind(struct l2cap_conn *conn, struct sk_buff *skb)
+void amp_conn_ind(struct hci_conn *hcon, struct sk_buff *skb)
{
struct amp_work_conn_ind *work;
- BT_DBG("conn %p, skb %p", conn, skb);
+ BT_DBG("hcon %p, skb %p", hcon, skb);
work = kmalloc(sizeof(*work), GFP_ATOMIC);
if (work) {
INIT_WORK((struct work_struct *) work, conn_ind_worker);
- work->conn = conn;
+ hci_conn_hold(hcon);
+ work->hcon = hcon;
work->skb = skb;
- if (queue_work(amp_workqueue, (struct work_struct *) work) == 0)
+ if (!queue_work(amp_workqueue, (struct work_struct *) work)) {
+ hci_conn_put(hcon);
kfree(work);
+ }
}
}
diff --git a/net/bluetooth/l2cap_core.c b/net/bluetooth/l2cap_core.c
index 0ad64a0..47b6d4d 100644
--- a/net/bluetooth/l2cap_core.c
+++ b/net/bluetooth/l2cap_core.c
@@ -5465,7 +5465,9 @@
} else if ((pi->amp_move_state !=
L2CAP_AMP_STATE_WAIT_MOVE_RSP_SUCCESS) &&
(pi->amp_move_state !=
- L2CAP_AMP_STATE_WAIT_MOVE_CONFIRM)) {
+ L2CAP_AMP_STATE_WAIT_MOVE_CONFIRM) &&
+ (pi->amp_move_state !=
+ L2CAP_AMP_STATE_WAIT_MOVE_CONFIRM_RSP)) {
/* Move was not in expected state, free the channel */
ampchan = pi->ampchan;
ampcon = pi->ampcon;
@@ -7361,7 +7363,7 @@
bh_unlock_sock(sk);
} else if (cid == L2CAP_CID_A2MP) {
BT_DBG("A2MP");
- amp_conn_ind(conn, skb);
+ amp_conn_ind(conn->hcon, skb);
} else {
BT_DBG("unknown cid 0x%4.4x", cid);
kfree_skb(skb);
diff --git a/sound/soc/codecs/wcd9310.c b/sound/soc/codecs/wcd9310.c
index 2c43792..74e2dc0 100644
--- a/sound/soc/codecs/wcd9310.c
+++ b/sound/soc/codecs/wcd9310.c
@@ -3591,6 +3591,7 @@
ret = wcd9xxx_close_slim_sch_rx(tabla,
tabla_p->dai[j].ch_num,
tabla_p->dai[j].ch_tot);
+ usleep_range(5000, 5000);
tabla_p->dai[j].rate = 0;
memset(tabla_p->dai[j].ch_num, 0, (sizeof(u32)*
tabla_p->dai[j].ch_tot));
diff --git a/sound/soc/msm/qdsp6/q6adm.c b/sound/soc/msm/qdsp6/q6adm.c
index a3e1c13..f928c00 100644
--- a/sound/soc/msm/qdsp6/q6adm.c
+++ b/sound/soc/msm/qdsp6/q6adm.c
@@ -328,9 +328,7 @@
if ((open.topology_id ==
VPM_TX_SM_ECNS_COPP_TOPOLOGY) ||
(open.topology_id ==
- VPM_TX_DM_FLUENCE_COPP_TOPOLOGY) ||
- (open.topology_id ==
- VPM_TX_QMIC_FLUENCE_COPP_TOPOLOGY))
+ VPM_TX_DM_FLUENCE_COPP_TOPOLOGY))
rate = 16000;
}