commit | 700e3077beff5dbe16479a35c121c8cd887e7361 | [log] [tgz] |
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author | Ravishangar Kalyanam <rkalya@codeaurora.org> | Thu Jan 19 15:57:54 2012 -0800 |
committer | Ravishangar Kalyanam <rkalya@codeaurora.org> | Tue Jan 24 19:45:02 2012 -0800 |
tree | 9bb447da753107ce9df91d87278c64e85683f59c | |
parent | 395db38b308d0cfc4dc277182c3afa57a4516467 [diff] |
msm: clock-dss-8960: Fix HDMI PLL power up/down sequence Fix HDMI PLL power up/down sequence along with proper control of HDMI PHY registers to avoid PLL lock detect failures CRs-Fixed: 328366 Change-Id: Ic8a791f62b1e695bd70081c11156d57191a66de3 Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>