coresight: sequence FFCR writes during __etb_disable

Instead of writing FFCR bits 12 and 6 at once, sequence them i.e.
write bit 12 first to set ETB to stop on flush and followed by
setting bit 6 to trigger manual flush.

This should avoid any possible race between flush completing
before bit 12 getting set.

Change-Id: I0567701d34cb33a35d6bd876636a296532b9e400
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
1 file changed