msm: cpr-regulator: change device tree vendor prefix from 'qti' to 'qcom'
New policy requires changing device tree vendor prefix from 'qti'
to 'qcom'. Also change device tree files for msm8610, msm8226 and msm8926.
Change-Id: I0b00127a698e10c2d937b515cd7e55ae3b0ba569
Signed-off-by: Ke Liu <keliu@codeaurora.org>
diff --git a/Documentation/devicetree/bindings/arm/msm/cpr-regulator.txt b/Documentation/devicetree/bindings/arm/msm/cpr-regulator.txt
index 3a293a3..68600dd 100644
--- a/Documentation/devicetree/bindings/arm/msm/cpr-regulator.txt
+++ b/Documentation/devicetree/bindings/arm/msm/cpr-regulator.txt
@@ -11,7 +11,7 @@
bits to indicate what bin (and voltage range) a chip is in.
Required properties:
-- compatible: Must be "qti,cpr-regulator"
+- compatible: Must be "qcom,cpr-regulator"
- reg: Register addresses for RBCPR, RBCPR clock
select, PVS and CPR eFuse address
- reg-names: Register names. Must be "rbcpr", "rbcpr_clk",
@@ -22,41 +22,41 @@
should be 1 for SVS corner
- regulator-max-microvolt: Maximum corner value as max constraint, which
should be 4 for SUPER_TURBO or 3 for TURBO
-- qti,pvs-init-voltage: A list of integers whose length is equal to 2
- to the power of qti,pvs-fuse[num-of-bits]. The
+- qcom,pvs-init-voltage: A list of integers whose length is equal to 2
+ to the power of qcom,pvs-fuse[num-of-bits]. The
location or 0-based index of an element in the
list corresponds to the bin number. The value of
each integer corresponds to the initial voltage
of the PVS bin in turbo mode in microvolts.
-- qti,pvs-corner-ceiling-slow: Ceiling voltages of all corners for APC_PVS_SLOW
-- qti,pvs-corner-ceiling-nom: Ceiling voltages of all corners for APC_PVS_NOM
-- qti,pvs-corner-ceiling-fast: Ceiling voltages of all corners for APC_PVS_FAST
+- qcom,pvs-corner-ceiling-slow: Ceiling voltages of all corners for APC_PVS_SLOW
+- qcom,pvs-corner-ceiling-nom: Ceiling voltages of all corners for APC_PVS_NOM
+- qcom,pvs-corner-ceiling-fast: Ceiling voltages of all corners for APC_PVS_FAST
The ceiling voltages for each of above three
properties may look like this:
0 (SVS voltage): 1050000 uV
1 (NORMAL voltage): 1150000 uV
2 (TURBO voltage): 1275000 uV
- vdd-apc-supply: Regulator to supply VDD APC power
-- qti,vdd-apc-step-up-limit: Limit of vdd-apc-supply steps for scaling up.
-- qti,vdd-apc-step-down-limit: Limit of vdd-apc-supply steps for scaling down.
-- qti,cpr-ref-clk: The reference clock in kHz.
-- qti,cpr-timer-delay: The delay in microseconds for the timer interval.
-- qti,cpr-timer-cons-up: Consecutive number of timer interval (qti,cpr-timer-delay)
+- qcom,vdd-apc-step-up-limit: Limit of vdd-apc-supply steps for scaling up.
+- qcom,vdd-apc-step-down-limit: Limit of vdd-apc-supply steps for scaling down.
+- qcom,cpr-ref-clk: The reference clock in kHz.
+- qcom,cpr-timer-delay: The delay in microseconds for the timer interval.
+- qcom,cpr-timer-cons-up: Consecutive number of timer interval (qcom,cpr-timer-delay)
occurred before issuing UP interrupt.
-- qti,cpr-timer-cons-down: Consecutive number of timer interval (qti,cpr-timer-delay)
+- qcom,cpr-timer-cons-down: Consecutive number of timer interval (qcom,cpr-timer-delay)
occurred before issuing DOWN interrupt.
-- qti,cpr-irq-line: Internal interrupt route signal of RBCPR, one of 0, 1 or 2.
-- qti,cpr-step-quotient: Number of CPR quotient (Ring Oscillator(RO) count) per vdd-apc-supply step
+- qcom,cpr-irq-line: Internal interrupt route signal of RBCPR, one of 0, 1 or 2.
+- qcom,cpr-step-quotient: Number of CPR quotient (Ring Oscillator(RO) count) per vdd-apc-supply step
to issue error_steps.
-- qti,cpr-up-threshold: The threshold for CPR to issue interrupt when
+- qcom,cpr-up-threshold: The threshold for CPR to issue interrupt when
error_steps is greater than it when stepping up.
-- qti,cpr-down-threshold: The threshold for CPR to issue interrupt when
+- qcom,cpr-down-threshold: The threshold for CPR to issue interrupt when
error_steps is greater than it when stepping down.
-- qti,cpr-idle-clocks: Idle clock cycles RO can be in.
-- qti,cpr-gcnt-time: The time for gate count in microseconds.
-- qti,cpr-apc-volt-step: The voltage in microvolt per CPR step, such as 5000uV.
+- qcom,cpr-idle-clocks: Idle clock cycles RO can be in.
+- qcom,cpr-gcnt-time: The time for gate count in microseconds.
+- qcom,cpr-apc-volt-step: The voltage in microvolt per CPR step, such as 5000uV.
-- qti,pvs-fuse-redun-sel: Array of 5 elements to indicate where to read the bits, what value to
+- qcom,pvs-fuse-redun-sel: Array of 5 elements to indicate where to read the bits, what value to
compare with in order to decide if the redundant PVS fuse bits would be
used instead of the original bits and method to read fuse row, reading
register through SCM or directly. The 5 elements with index [0..4] are:
@@ -70,19 +70,19 @@
Otherwise, the original PVS bits should be selected. If the 5th
element is 0, read the fuse row from register directly. Otherwise,
read it through SCM.
-- qti,pvs-fuse: Array of 4 elements to indicate the bits for PVS fuse and read method.
+- qcom,pvs-fuse: Array of 4 elements to indicate the bits for PVS fuse and read method.
The array should have index and value like this:
[0] => the PVS fuse row number
[1] => LSB bit position of the bits
[2] => number of bits
[3] => fuse reading method, 0 for direct reading or 1 for SCM reading
-- qti,pvs-fuse-redun: Array of 4 elements to indicate the bits for redundant PVS fuse.
+- qcom,pvs-fuse-redun: Array of 4 elements to indicate the bits for redundant PVS fuse.
The array should have index and value like this:
[0] => the redundant PVS fuse row number
[1] => LSB bit position of the bits
[2] => number of bits
[3] => fuse reading method, 0 for direct reading or 1 for SCM reading
-- qti,cpr-fuse-redun-sel: Array of 5 elements to indicate where to read the bits, what value to
+- qcom,cpr-fuse-redun-sel: Array of 5 elements to indicate where to read the bits, what value to
compare with in order to decide if the redundant CPR fuse bits would be
used instead of the original bits and method to read fuse row, using SCM
to read or read register directly. The 5 elements with index [0..4] are:
@@ -96,32 +96,32 @@
Otherwise, the original CPR bits should be selected. If the 5th element
is 0, read the fuse row from register directly. Otherwise, read it through
SCM.
-- qti,cpr-fuse-row: Array of row number of CPR fuse and method to read that row. It should have
+- qcom,cpr-fuse-row: Array of row number of CPR fuse and method to read that row. It should have
index and value like this:
[0] => the fuse row number
[1] => fuse reading method, 0 for direct reading or 1 for SCM reading
-- qti,cpr-fuse-bp-cpr-disable: Bit position of the bit to indicate if CPR should be disable
-- qti,cpr-fuse-bp-scheme: Bit position of the bit to indicate if it's a global/local scheme
-- qti,cpr-fuse-target-quot: Array of bit positions in fuse for Target Quotient of all corners.
+- qcom,cpr-fuse-bp-cpr-disable: Bit position of the bit to indicate if CPR should be disable
+- qcom,cpr-fuse-bp-scheme: Bit position of the bit to indicate if it's a global/local scheme
+- qcom,cpr-fuse-target-quot: Array of bit positions in fuse for Target Quotient of all corners.
It should have index and value like this:
[0] => bit position of the LSB bit for SVS target quotient
[1] => bit position of the LSB bit for NOMINAL target quotient
[2] => bit position of the LSB bit for TURBO target quotient
-- qti,cpr-fuse-ro-sel: Array of bit positions in fuse for RO select of all corners.
+- qcom,cpr-fuse-ro-sel: Array of bit positions in fuse for RO select of all corners.
It should have index and value like this:
[0] => bit position of the LSB bit for SVS RO select bits
[1] => bit position of the LSB bit for NOMINAL RO select bits
[2] => bit position of the LSB bit for TURBO RO select bits
-- qti,cpr-fuse-redun-row: Array of row number of redundant CPR fuse and method to read that
+- qcom,cpr-fuse-redun-row: Array of row number of redundant CPR fuse and method to read that
row. It should have index and value like this:
[0] => the redundant fuse row number
[1] => the value to indicate reading the fuse row directly or using SCM
-- qti,cpr-fuse-redun-target-quot: Array of bit positions in fuse for redundant Target Quotient of all corners.
+- qcom,cpr-fuse-redun-target-quot: Array of bit positions in fuse for redundant Target Quotient of all corners.
It should have index and value like this:
[0] => bit position of the LSB bit for redundant SVS target quotient
[1] => bit position of the LSB bit for redundant NOMINAL target quotient
[2] => bit position of the LSB bit for redundant TURBO target quotient
-- qti,cpr-fuse-redun-ro-sel: Array of bit positions in eFuse for redundant RO select.
+- qcom,cpr-fuse-redun-ro-sel: Array of bit positions in eFuse for redundant RO select.
It should have index and value like this:
[0] => bit position of the LSB bit for redundant SVS RO select bits
[1] => bit position of the LSB bit for redundant NOMINAL RO select bits
@@ -131,23 +131,23 @@
Optional properties:
- vdd-mx-supply: Regulator to supply memory power as dependency
of VDD APC.
-- qti,vdd-mx-vmax: The maximum voltage in uV for vdd-mx-supply. This
+- qcom,vdd-mx-vmax: The maximum voltage in uV for vdd-mx-supply. This
is required when vdd-mx-supply is present.
-- qti,vdd-mx-vmin-method: The method to determine the minimum voltage for
+- qcom,vdd-mx-vmin-method: The method to determine the minimum voltage for
vdd-mx-supply, which can be one of following
choices compared with VDD APC:
0 => equal to the voltage(vmin) of VDD APC
1 => equal to PVS corner ceiling voltage
2 => equal to slow speed corner ceiling
- 3 => equal to qti,vdd-mx-vmax
+ 3 => equal to qcom,vdd-mx-vmax
This is required when vdd-mx-supply is present.
-- qti,cpr-fuse-redun-bp-cpr-disable: Redundant bit position of the bit to indicate if CPR should be disable
-- qti,cpr-fuse-redun-bp-scheme: Redundant bit position of the bit to indicate if it's a global/local scheme
+- qcom,cpr-fuse-redun-bp-cpr-disable: Redundant bit position of the bit to indicate if CPR should be disable
+- qcom,cpr-fuse-redun-bp-scheme: Redundant bit position of the bit to indicate if it's a global/local scheme
This property is required if cpr-fuse-redun-bp-cpr-disable
is present, and vise versa.
-- qti,cpr-enable: Present: CPR enabled by default.
+- qcom,cpr-enable: Present: CPR enabled by default.
Not Present: CPR disable by default.
-- qti,cpr-fuse-cond-min-volt-sel: Array of 5 elements to indicate where to read the bits, what value to
+- qcom,cpr-fuse-cond-min-volt-sel: Array of 5 elements to indicate where to read the bits, what value to
compare with in order to decide if the conditional minimum apc voltage needs
to be applied and the fuse reading method.
The 5 elements with index[0..4] are:
@@ -159,11 +159,11 @@
When the value of the fuse bits specified by first 3 elements is not equal to
the value in 4th element, then set the apc voltage for all parts running
at each voltage corner to be not lower than the voltage defined
- using "qti,cpr-cond-min-voltage".
-- qti,cpr-cond-min-voltage: Minimum voltage in microvolts for SVS, NOM and TURBO mode if the fuse bits
- defined in qti,cpr-fuse-cond-min-volt-sel have not been programmed with the
+ using "qcom,cpr-cond-min-voltage".
+- qcom,cpr-cond-min-voltage: Minimum voltage in microvolts for SVS, NOM and TURBO mode if the fuse bits
+ defined in qcom,cpr-fuse-cond-min-volt-sel have not been programmed with the
expected data. This is required if cpr-fuse-cond-min-volt-sel is present.
-- qti,cpr-fuse-uplift-sel: Array of 5 elements to indicate where to read the bits, what value to
+- qcom,cpr-fuse-uplift-sel: Array of 5 elements to indicate where to read the bits, what value to
compare with in order to enable or disable the pvs voltage uplift workaround,
and the fuse reading method.
The 5 elements with index[0..4] are:
@@ -175,7 +175,7 @@
[4]: => fuse reading method, 0 for direct reading or 1 for SCM reading.
When the value of the fuse bits specified by first 3 elements equals to the
value in 4th element, the pvs voltage uplift workaround will be enabled.
-- qti,speed-bin-fuse-sel: Array of 4 elements to indicate where to read the speed bin of the processor,
+- qcom,speed-bin-fuse-sel: Array of 4 elements to indicate where to read the speed bin of the processor,
and the fuse reading method.
The 4 elements with index[0..3] are:
[0]: => the fuse row number of the selector;
@@ -183,22 +183,22 @@
[2]: => number of the bits;
[3]: => fuse reading method, 0 for direct reading or 1 for SCM reading.
This is required if cpr-fuse-uplift-disable-sel is present.
-- qti,cpr-uplift-voltage: Uplift in microvolts used for increasing pvs init voltage. If this property is present,
+- qcom,cpr-uplift-voltage: Uplift in microvolts used for increasing pvs init voltage. If this property is present,
This is required if cpr-fuse-uplift-disable-sel is present.
-- qti,cpr-uplift-max-volt: Maximum voltage in microvolts used for pvs voltage uplift workaround to limit
+- qcom,cpr-uplift-max-volt: Maximum voltage in microvolts used for pvs voltage uplift workaround to limit
the maximum pvs voltage.
This is required if cpr-fuse-uplift-disable-sel is present.
-- qti,cpr-uplift-quotient: Three numbers used for pvs voltage uplift workaround to be added to the target
+- qcom,cpr-uplift-quotient: Three numbers used for pvs voltage uplift workaround to be added to the target
quotient for each corner.
The 3 quotient increment with index[0..2] are:
[0]: => for SVS corner target quotient;
[1]: => for NORM corner target quotient;
[2]: => for TURBO corner target quotient;
This is required if cpr-fuse-uplift-disable-sel is present.
-- qti,cpr-uplift-speed-bin: The speed bin value corresponding to one type of processor which needs to apply the
+- qcom,cpr-uplift-speed-bin: The speed bin value corresponding to one type of processor which needs to apply the
pvs voltage uplift workaround.
This is required if cpr-fuse-uplift-disable-sel is present.
-- qti,cpr-quot-adjust-table: Array of triples in which each triple indicates the speed bin of the CPU, the virtual
+- qcom,cpr-quot-adjust-table: Array of triples in which each triple indicates the speed bin of the CPU, the virtual
corner to use and the quotient adjustment.
The 3 elements in one triple are:
[0]: => the speed bin of the CPU.
@@ -207,17 +207,17 @@
If the speed bin in a triple is equal to the speed bin of the CPU, the adjustment would
be subtracted from the quotient value of the voltage corner when the CPU is running at
that virtual corner. Each virtual corner value must be in the range 1 to the number of
- elements in qti,cpr-corner-map.
-- qti,cpr-corner-map: Array of elements of fuse corner value for each virtual corner.
+ elements in qcom,cpr-corner-map.
+- qcom,cpr-corner-map: Array of elements of fuse corner value for each virtual corner.
The location or 1-based index of an element in the list corresponds to
the virtual corner value. For example, the first element in the list is the fuse corner
value that virtual corner 1 maps to.
- This is required if qti,cpr-quot-adjust-table is present.
+ This is required if qcom,cpr-quot-adjust-table is present.
Example:
apc_vreg_corner: regulator@f9018000 {
status = "okay";
- compatible = "qti,cpr-regulator";
+ compatible = "qcom,cpr-regulator";
reg = <0xf9018000 0x1000>, <0xfc4b8000 0x1000>;
reg-names = "rbcpr", "efuse_addr";
interrupts = <0 15 0>;
@@ -225,11 +225,11 @@
regulator-min-microvolt = <1>;
regulator-max-microvolt = <3>;
- qti,pvs-fuse = <22 6 5 1>;
- qti,pvs-fuse-redun-sel = <22 24 3 2 1>;
- qti,pvs-fuse-redun = <22 27 5 1>;
+ qcom,pvs-fuse = <22 6 5 1>;
+ qcom,pvs-fuse-redun-sel = <22 24 3 2 1>;
+ qcom,pvs-fuse-redun = <22 27 5 1>;
- qti,pvs-init-voltage = <1330000 1330000 1330000 1320000
+ qcom,pvs-init-voltage = <1330000 1330000 1330000 1320000
1310000 1300000 1290000 1280000
1270000 1260000 1250000 1240000
1230000 1220000 1210000 1200000
@@ -237,46 +237,46 @@
1150000 1140000 1140000 1140000
1140000 1140000 1140000 1140000
1140000 1140000 1140000 1140000>;
- qti,pvs-corner-ceiling-slow = <1050000 1160000 1275000>;
- qti,pvs-corner-ceiling-nom = <975000 1075000 1200000>;
- qti,pvs-corner-ceiling-fast = <900000 1000000 1140000>;
+ qcom,pvs-corner-ceiling-slow = <1050000 1160000 1275000>;
+ qcom,pvs-corner-ceiling-nom = <975000 1075000 1200000>;
+ qcom,pvs-corner-ceiling-fast = <900000 1000000 1140000>;
vdd-apc-supply = <&pm8226_s2>;
vdd-mx-supply = <&pm8226_l3_ao>;
- qti,vdd-mx-vmax = <1350000>;
- qti,vdd-mx-vmin-method = <1>;
- qti,vdd-apc-step-up-limit = <1>;
- qti,vdd-apc-step-down-limit = <1>;
- qti,cpr-ref-clk = <19200>;
- qti,cpr-timer-delay = <5000>;
- qti,cpr-timer-cons-up = <1>;
- qti,cpr-timer-cons-down = <2>;
- qti,cpr-irq-line = <0>;
- qti,cpr-step-quotient = <15>;
- qti,cpr-up-threshold = <1>;
- qti,cpr-down-threshold = <2>;
- qti,cpr-idle-clocks = <5>;
- qti,cpr-gcnt-time = <1>;
- qti,cpr-apc-volt-step = <5000>;
+ qcom,vdd-mx-vmax = <1350000>;
+ qcom,vdd-mx-vmin-method = <1>;
+ qcom,vdd-apc-step-up-limit = <1>;
+ qcom,vdd-apc-step-down-limit = <1>;
+ qcom,cpr-ref-clk = <19200>;
+ qcom,cpr-timer-delay = <5000>;
+ qcom,cpr-timer-cons-up = <1>;
+ qcom,cpr-timer-cons-down = <2>;
+ qcom,cpr-irq-line = <0>;
+ qcom,cpr-step-quotient = <15>;
+ qcom,cpr-up-threshold = <1>;
+ qcom,cpr-down-threshold = <2>;
+ qcom,cpr-idle-clocks = <5>;
+ qcom,cpr-gcnt-time = <1>;
+ qcom,cpr-apc-volt-step = <5000>;
- qti,cpr-fuse-row = <138 1>;
- qti,cpr-fuse-bp-cpr-disable = <36>;
- qti,cpr-fuse-bp-scheme = <37>;
- qti,cpr-fuse-target-quot = <24 12 0>;
- qti,cpr-fuse-ro-sel = <54 38 41>;
- qti,cpr-fuse-redun-sel = <138 57 1 1 1>;
- qti,cpr-fuse-redun-row = <139 1>;
- qti,cpr-fuse-redun-target-quot = <24 12 0>;
- qti,cpr-fuse-redun-ro-sel = <46 36 39>;
- qti,cpr-fuse-cond-min-volt-sel = <54 42 6 7 1>;
- qti,cpr-cond-min-voltage = <1140000>;
- qti,cpr-fuse-uplift-sel = <22 53 1 0 0>;
- qti,cpr-uplift-voltage = <50000>;
- qti,cpr-uplift-quotient = <0 0 120>;
- qti,cpr-uplift-max-volt = <1350000>;
- qti,cpr-uplift-speed-bin = <1>;
- qti,speed-bin-fuse-sel = <22 0 3 0>;
- qti,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3>;
- qti,cpr-quot-adjust-table = <1 1 0>, <1 2 0>, <1 3 0>,
+ qcom,cpr-fuse-row = <138 1>;
+ qcom,cpr-fuse-bp-cpr-disable = <36>;
+ qcom,cpr-fuse-bp-scheme = <37>;
+ qcom,cpr-fuse-target-quot = <24 12 0>;
+ qcom,cpr-fuse-ro-sel = <54 38 41>;
+ qcom,cpr-fuse-redun-sel = <138 57 1 1 1>;
+ qcom,cpr-fuse-redun-row = <139 1>;
+ qcom,cpr-fuse-redun-target-quot = <24 12 0>;
+ qcom,cpr-fuse-redun-ro-sel = <46 36 39>;
+ qcom,cpr-fuse-cond-min-volt-sel = <54 42 6 7 1>;
+ qcom,cpr-cond-min-voltage = <1140000>;
+ qcom,cpr-fuse-uplift-sel = <22 53 1 0 0>;
+ qcom,cpr-uplift-voltage = <50000>;
+ qcom,cpr-uplift-quotient = <0 0 120>;
+ qcom,cpr-uplift-max-volt = <1350000>;
+ qcom,cpr-uplift-speed-bin = <1>;
+ qcom,speed-bin-fuse-sel = <22 0 3 0>;
+ qcom,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3>;
+ qcom,cpr-quot-adjust-table = <1 1 0>, <1 2 0>, <1 3 0>,
<1 4 0>, <1 5 450>, <1 6 375>,
<1 7 300>, <1 8 225>, <1 9 187>,
<1 10 150>, <1 11 75>, <1 12 0>;
diff --git a/arch/arm/boot/dts/msm8226-regulator.dtsi b/arch/arm/boot/dts/msm8226-regulator.dtsi
index dbeaa97..0146367 100644
--- a/arch/arm/boot/dts/msm8226-regulator.dtsi
+++ b/arch/arm/boot/dts/msm8226-regulator.dtsi
@@ -30,7 +30,7 @@
&soc {
apc_vreg_corner: regulator@f9018000 {
status = "okay";
- compatible = "qti,cpr-regulator";
+ compatible = "qcom,cpr-regulator";
reg = <0xf9018000 0x1000>, <0xf9011064 4>, <0xfc4b8000 0x1000>;
reg-names = "rbcpr", "rbcpr_clk", "efuse_addr";
interrupts = <0 15 0>;
@@ -38,61 +38,61 @@
regulator-min-microvolt = <1>;
regulator-max-microvolt = <12>;
- qti,pvs-fuse-redun-sel = <22 24 3 2 0>;
- qti,pvs-fuse = <22 6 5 0>;
- qti,pvs-fuse-redun = <22 27 5 0>;
+ qcom,pvs-fuse-redun-sel = <22 24 3 2 0>;
+ qcom,pvs-fuse = <22 6 5 0>;
+ qcom,pvs-fuse-redun = <22 27 5 0>;
- qti,pvs-init-voltage = <1275000 1275000 1275000 1275000 1275000
+ qcom,pvs-init-voltage = <1275000 1275000 1275000 1275000 1275000
1275000 1260000 1245000 1230000 1215000
1200000 1185000 1170000 1155000 1140000
1140000 1140000 1140000 1140000 1140000
1150000 1140000 1140000 1140000 1140000
1140000 1140000 1140000 1275000 1275000
1275000 1275000>;
- qti,pvs-corner-ceiling-slow = <1050000 1150000 1275000>;
- qti,pvs-corner-ceiling-nom = <1050000 1075000 1200000>;
- qti,pvs-corner-ceiling-fast = <1050000 1050000 1100000>;
+ qcom,pvs-corner-ceiling-slow = <1050000 1150000 1275000>;
+ qcom,pvs-corner-ceiling-nom = <1050000 1075000 1200000>;
+ qcom,pvs-corner-ceiling-fast = <1050000 1050000 1100000>;
vdd-apc-supply = <&pm8226_s2>;
vdd-mx-supply = <&pm8226_l3_ao>;
- qti,vdd-mx-vmax = <1350000>;
- qti,vdd-mx-vmin-method = <1>;
+ qcom,vdd-mx-vmax = <1350000>;
+ qcom,vdd-mx-vmin-method = <1>;
- qti,cpr-ref-clk = <19200>;
- qti,cpr-timer-delay = <5000>;
- qti,cpr-timer-cons-up = <0>;
- qti,cpr-timer-cons-down = <2>;
- qti,cpr-irq-line = <0>;
- qti,cpr-step-quotient = <15>;
- qti,cpr-up-threshold = <0>;
- qti,cpr-down-threshold = <10>;
- qti,cpr-idle-clocks = <0>;
- qti,cpr-gcnt-time = <1>;
- qti,vdd-apc-step-up-limit = <1>;
- qti,vdd-apc-step-down-limit = <1>;
- qti,cpr-apc-volt-step = <5000>;
+ qcom,cpr-ref-clk = <19200>;
+ qcom,cpr-timer-delay = <5000>;
+ qcom,cpr-timer-cons-up = <0>;
+ qcom,cpr-timer-cons-down = <2>;
+ qcom,cpr-irq-line = <0>;
+ qcom,cpr-step-quotient = <15>;
+ qcom,cpr-up-threshold = <0>;
+ qcom,cpr-down-threshold = <10>;
+ qcom,cpr-idle-clocks = <0>;
+ qcom,cpr-gcnt-time = <1>;
+ qcom,vdd-apc-step-up-limit = <1>;
+ qcom,vdd-apc-step-down-limit = <1>;
+ qcom,cpr-apc-volt-step = <5000>;
- qti,cpr-fuse-redun-sel = <138 57 1 1 0>;
- qti,cpr-fuse-row = <138 0>;
- qti,cpr-fuse-bp-cpr-disable = <36>;
- qti,cpr-fuse-bp-scheme = <37>;
- qti,cpr-fuse-target-quot = <24 12 0>;
- qti,cpr-fuse-ro-sel = <54 38 41>;
- qti,cpr-fuse-redun-row = <139 0>;
- qti,cpr-fuse-redun-target-quot = <24 12 0>;
- qti,cpr-fuse-redun-ro-sel = <46 36 39>;
+ qcom,cpr-fuse-redun-sel = <138 57 1 1 0>;
+ qcom,cpr-fuse-row = <138 0>;
+ qcom,cpr-fuse-bp-cpr-disable = <36>;
+ qcom,cpr-fuse-bp-scheme = <37>;
+ qcom,cpr-fuse-target-quot = <24 12 0>;
+ qcom,cpr-fuse-ro-sel = <54 38 41>;
+ qcom,cpr-fuse-redun-row = <139 0>;
+ qcom,cpr-fuse-redun-target-quot = <24 12 0>;
+ qcom,cpr-fuse-redun-ro-sel = <46 36 39>;
- qti,cpr-enable;
- qti,cpr-fuse-cond-min-volt-sel = <54 42 6 7 1>;
- qti,cpr-cond-min-voltage = <1140000>;
- qti,cpr-fuse-uplift-sel = <22 53 1 0 0>;
- qti,cpr-uplift-voltage = <50000>;
- qti,cpr-uplift-quotient = <0 0 120>;
- qti,cpr-uplift-max-volt = <1350000>;
- qti,cpr-uplift-speed-bin = <1>;
- qti,speed-bin-fuse-sel = <22 0 3 0>;
- qti,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3>;
- qti,cpr-quot-adjust-table =
+ qcom,cpr-enable;
+ qcom,cpr-fuse-cond-min-volt-sel = <54 42 6 7 1>;
+ qcom,cpr-cond-min-voltage = <1140000>;
+ qcom,cpr-fuse-uplift-sel = <22 53 1 0 0>;
+ qcom,cpr-uplift-voltage = <50000>;
+ qcom,cpr-uplift-quotient = <0 0 120>;
+ qcom,cpr-uplift-max-volt = <1350000>;
+ qcom,cpr-uplift-speed-bin = <1>;
+ qcom,speed-bin-fuse-sel = <22 0 3 0>;
+ qcom,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3>;
+ qcom,cpr-quot-adjust-table =
<1 5 450>,
<1 6 375>,
<1 7 300>,
diff --git a/arch/arm/boot/dts/msm8226-v2.dtsi b/arch/arm/boot/dts/msm8226-v2.dtsi
index 4149169..b7b0b4f 100644
--- a/arch/arm/boot/dts/msm8226-v2.dtsi
+++ b/arch/arm/boot/dts/msm8226-v2.dtsi
@@ -52,20 +52,20 @@
};
&apc_vreg_corner {
- qti,pvs-init-voltage = <1330000 1330000 1330000 1320000 1310000
+ qcom,pvs-init-voltage = <1330000 1330000 1330000 1320000 1310000
1300000 1290000 1280000 1270000 1260000
1250000 1240000 1230000 1220000 1210000
1200000 1190000 1180000 1170000 1160000
1150000 1140000 1140000 1140000 1140000
1140000 1140000 1140000 1140000 1140000
1140000 1140000>;
- qti,pvs-corner-ceiling-slow = <1050000 1150000 1280000>;
- qti,pvs-corner-ceiling-nom = <1050000 1080000 1200000>;
- qti,pvs-corner-ceiling-fast = <1050000 1050000 1100000>;
- qti,cpr-step-quotient = <30>;
- qti,cpr-up-threshold = <0>;
- qti,cpr-down-threshold = <5>;
- qti,cpr-apc-volt-step = <10000>;
+ qcom,pvs-corner-ceiling-slow = <1050000 1150000 1280000>;
+ qcom,pvs-corner-ceiling-nom = <1050000 1080000 1200000>;
+ qcom,pvs-corner-ceiling-fast = <1050000 1050000 1100000>;
+ qcom,cpr-step-quotient = <30>;
+ qcom,cpr-up-threshold = <0>;
+ qcom,cpr-down-threshold = <5>;
+ qcom,cpr-apc-volt-step = <10000>;
};
&msm_gpu {
diff --git a/arch/arm/boot/dts/msm8610-regulator.dtsi b/arch/arm/boot/dts/msm8610-regulator.dtsi
index 21788f5..1340612 100644
--- a/arch/arm/boot/dts/msm8610-regulator.dtsi
+++ b/arch/arm/boot/dts/msm8610-regulator.dtsi
@@ -30,7 +30,7 @@
&soc {
apc_vreg_corner: regulator@f9018000 {
status = "okay";
- compatible = "qti,cpr-regulator";
+ compatible = "qcom,cpr-regulator";
reg = <0xf9018000 0x1000>, <0xf9011064 4>, <0xfc4b8000 0x1000>;
reg-names = "rbcpr", "rbcpr_clk", "efuse_addr";
interrupts = <0 15 0>;
@@ -38,54 +38,54 @@
regulator-min-microvolt = <1>;
regulator-max-microvolt = <12>;
- qti,pvs-fuse-redun-sel = <53 25 3 2 1>;
- qti,pvs-fuse = <23 6 5 1>;
- qti,pvs-fuse-redun = <61 47 5 1>;
+ qcom,pvs-fuse-redun-sel = <53 25 3 2 1>;
+ qcom,pvs-fuse = <23 6 5 1>;
+ qcom,pvs-fuse-redun = <61 47 5 1>;
- qti,pvs-init-voltage = <1275000 1275000 1275000 1275000 1275000
+ qcom,pvs-init-voltage = <1275000 1275000 1275000 1275000 1275000
1275000 1275000 1275000 1275000 1275000
1275000 1275000 1275000 1275000 1275000
1275000 1275000 1275000 1275000 1275000
1275000 1275000 1275000 1275000 1275000
1275000 1275000 1275000 1275000 1275000
1275000 1275000>;
- qti,pvs-corner-ceiling-slow = <1050000 1150000 1275000>;
- qti,pvs-corner-ceiling-nom = <1050000 1075000 1275000>;
- qti,pvs-corner-ceiling-fast = <1050000 1050000 1275000>;
+ qcom,pvs-corner-ceiling-slow = <1050000 1150000 1275000>;
+ qcom,pvs-corner-ceiling-nom = <1050000 1075000 1275000>;
+ qcom,pvs-corner-ceiling-fast = <1050000 1050000 1275000>;
vdd-apc-supply = <&pm8110_s2>;
vdd-mx-supply = <&pm8110_l3_ao>;
- qti,vdd-mx-vmax = <1350000>;
- qti,vdd-mx-vmin-method = <1>;
+ qcom,vdd-mx-vmax = <1350000>;
+ qcom,vdd-mx-vmin-method = <1>;
- qti,cpr-ref-clk = <19200>;
- qti,cpr-timer-delay = <5000>;
- qti,cpr-timer-cons-up = <0>;
- qti,cpr-timer-cons-down = <2>;
- qti,cpr-irq-line = <0>;
- qti,cpr-step-quotient = <15>;
- qti,cpr-up-threshold = <0>;
- qti,cpr-down-threshold = <10>;
- qti,cpr-idle-clocks = <5>;
- qti,cpr-gcnt-time = <1>;
- qti,vdd-apc-step-up-limit = <1>;
- qti,vdd-apc-step-down-limit = <1>;
- qti,cpr-apc-volt-step = <5000>;
+ qcom,cpr-ref-clk = <19200>;
+ qcom,cpr-timer-delay = <5000>;
+ qcom,cpr-timer-cons-up = <0>;
+ qcom,cpr-timer-cons-down = <2>;
+ qcom,cpr-irq-line = <0>;
+ qcom,cpr-step-quotient = <15>;
+ qcom,cpr-up-threshold = <0>;
+ qcom,cpr-down-threshold = <10>;
+ qcom,cpr-idle-clocks = <5>;
+ qcom,cpr-gcnt-time = <1>;
+ qcom,vdd-apc-step-up-limit = <1>;
+ qcom,vdd-apc-step-down-limit = <1>;
+ qcom,cpr-apc-volt-step = <5000>;
- qti,cpr-fuse-redun-sel = <53 25 3 2 1>;
- qti,cpr-fuse-row = <61 1>;
- qti,cpr-fuse-bp-cpr-disable = <39>;
- qti,cpr-fuse-bp-scheme = <40>;
- qti,cpr-fuse-target-quot = <27 15 3>;
- qti,cpr-fuse-ro-sel = <47 41 44>;
- qti,cpr-fuse-redun-row = <52 1>;
- qti,cpr-fuse-redun-bp-cpr-disable = <24>;
- qti,cpr-fuse-redun-bp-scheme = <25>;
- qti,cpr-fuse-redun-target-quot = <32 12 0>;
- qti,cpr-fuse-redun-ro-sel = <44 26 29>;
- qti,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3>;
+ qcom,cpr-fuse-redun-sel = <53 25 3 2 1>;
+ qcom,cpr-fuse-row = <61 1>;
+ qcom,cpr-fuse-bp-cpr-disable = <39>;
+ qcom,cpr-fuse-bp-scheme = <40>;
+ qcom,cpr-fuse-target-quot = <27 15 3>;
+ qcom,cpr-fuse-ro-sel = <47 41 44>;
+ qcom,cpr-fuse-redun-row = <52 1>;
+ qcom,cpr-fuse-redun-bp-cpr-disable = <24>;
+ qcom,cpr-fuse-redun-bp-scheme = <25>;
+ qcom,cpr-fuse-redun-target-quot = <32 12 0>;
+ qcom,cpr-fuse-redun-ro-sel = <44 26 29>;
+ qcom,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3>;
- qti,cpr-enable;
+ qcom,cpr-enable;
};
};
diff --git a/arch/arm/boot/dts/msm8926.dtsi b/arch/arm/boot/dts/msm8926.dtsi
index 0b876a1..a0394d1 100644
--- a/arch/arm/boot/dts/msm8926.dtsi
+++ b/arch/arm/boot/dts/msm8926.dtsi
@@ -116,20 +116,20 @@
};
&apc_vreg_corner {
- qti,pvs-init-voltage = <1350000 1340000 1330000 1320000 1310000
+ qcom,pvs-init-voltage = <1350000 1340000 1330000 1320000 1310000
1300000 1290000 1280000 1270000 1260000
1250000 1240000 1230000 1220000 1210000
1200000 1190000 1180000 1170000 1160000
1150000 1140000 1140000 1140000 1140000
1140000 1140000 1140000 1140000 1140000
1140000 1140000>;
- qti,pvs-corner-ceiling-slow = <1050000 1150000 1280000>;
- qti,pvs-corner-ceiling-nom = <1050000 1080000 1200000>;
- qti,pvs-corner-ceiling-fast = <1050000 1050000 1100000>;
- qti,cpr-step-quotient = <30>;
- qti,cpr-up-threshold = <0>;
- qti,cpr-down-threshold = <5>;
- qti,cpr-apc-volt-step = <10000>;
+ qcom,pvs-corner-ceiling-slow = <1050000 1150000 1280000>;
+ qcom,pvs-corner-ceiling-nom = <1050000 1080000 1200000>;
+ qcom,pvs-corner-ceiling-fast = <1050000 1050000 1100000>;
+ qcom,cpr-step-quotient = <30>;
+ qcom,cpr-up-threshold = <0>;
+ qcom,cpr-down-threshold = <5>;
+ qcom,cpr-apc-volt-step = <10000>;
};
&tsens {
diff --git a/arch/arm/mach-msm/cpr-regulator.c b/arch/arm/mach-msm/cpr-regulator.c
index fa132fa..68ae0f8 100644
--- a/arch/arm/mach-msm/cpr-regulator.c
+++ b/arch/arm/mach-msm/cpr-regulator.c
@@ -1063,13 +1063,13 @@
int rc, i;
rc = of_property_read_u32(of_node,
- "qti,cpr-uplift-voltage", &uplift_voltage);
+ "qcom,cpr-uplift-voltage", &uplift_voltage);
if (rc < 0) {
pr_err("cpr-uplift-voltage is missing, rc = %d", rc);
return rc;
}
rc = of_property_read_u32(of_node,
- "qti,cpr-uplift-max-volt", &uplift_max_volt);
+ "qcom,cpr-uplift-max-volt", &uplift_max_volt);
if (rc < 0) {
pr_err("cpr-uplift-max-volt is missing, rc = %d", rc);
return rc;
@@ -1095,7 +1095,7 @@
bool redundant;
size_t pvs_bins;
- rc = of_property_read_u32_array(of_node, "qti,pvs-fuse-redun-sel",
+ rc = of_property_read_u32_array(of_node, "qcom,pvs-fuse-redun-sel",
pvs_fuse_redun_sel, 5);
if (rc < 0) {
pr_err("pvs-fuse-redun-sel missing: rc=%d\n", rc);
@@ -1105,14 +1105,14 @@
redundant = cpr_fuse_is_setting_expected(cpr_vreg, pvs_fuse_redun_sel);
if (redundant) {
- rc = of_property_read_u32_array(of_node, "qti,pvs-fuse-redun",
+ rc = of_property_read_u32_array(of_node, "qcom,pvs-fuse-redun",
pvs_fuse, 4);
if (rc < 0) {
pr_err("pvs-fuse-redun missing: rc=%d\n", rc);
return rc;
}
} else {
- rc = of_property_read_u32_array(of_node, "qti,pvs-fuse",
+ rc = of_property_read_u32_array(of_node, "qcom,pvs-fuse",
pvs_fuse, 4);
if (rc < 0) {
pr_err("pvs-fuse missing: rc=%d\n", rc);
@@ -1128,7 +1128,7 @@
pvs_bins = 1 << pvs_fuse[2];
- rc = of_property_read_u32_array(of_node, "qti,pvs-init-voltage",
+ rc = of_property_read_u32_array(of_node, "qcom,pvs-init-voltage",
cpr_vreg->pvs_init_v, pvs_bins);
if (rc < 0) {
pr_err("pvs-init-voltage missing: rc=%d\n", rc);
@@ -1175,7 +1175,7 @@
do { \
if (!rc) { \
rc = of_property_read_u32(of_node, \
- "qti," cpr_property, \
+ "qcom," cpr_property, \
cpr_config); \
if (rc) { \
pr_err("Missing " #cpr_property \
@@ -1212,14 +1212,14 @@
/* Parse dependency parameters */
if (cpr_vreg->vdd_mx) {
- rc = of_property_read_u32(of_node, "qti,vdd-mx-vmax",
+ rc = of_property_read_u32(of_node, "qcom,vdd-mx-vmax",
&cpr_vreg->vdd_mx_vmax);
if (rc < 0) {
pr_err("vdd-mx-vmax missing: rc=%d\n", rc);
return rc;
}
- rc = of_property_read_u32(of_node, "qti,vdd-mx-vmin-method",
+ rc = of_property_read_u32(of_node, "qcom,vdd-mx-vmin-method",
&cpr_vreg->vdd_mx_vmin_method);
if (rc < 0) {
pr_err("vdd-mx-vmin-method missing: rc=%d\n", rc);
@@ -1252,7 +1252,7 @@
int rc, i;
rc = of_property_read_u32_array(of_node,
- "qti,cpr-uplift-quotient", delta_quot, 3);
+ "qcom,cpr-uplift-quotient", delta_quot, 3);
if (rc < 0) {
pr_err("cpr-uplift-quotient is missing: %d", rc);
return rc;
@@ -1271,7 +1271,7 @@
u32 *tmp;
bool corners_mapped;
- prop = of_find_property(dev->of_node, "qti,cpr-corner-map", NULL);
+ prop = of_find_property(dev->of_node, "qcom,cpr-corner-map", NULL);
if (prop) {
size = prop->length / sizeof(u32);
@@ -1294,10 +1294,10 @@
cpr_vreg->corner_map[i] = i;
} else {
rc = of_property_read_u32_array(dev->of_node,
- "qti,cpr-corner-map", &cpr_vreg->corner_map[1], size);
+ "qcom,cpr-corner-map", &cpr_vreg->corner_map[1], size);
if (rc) {
- pr_err("qti,cpr-corner-map missing, rc = %d", rc);
+ pr_err("qcom,cpr-corner-map missing, rc = %d", rc);
return rc;
}
}
@@ -1310,12 +1310,12 @@
return -ENOMEM;
}
- prop = of_find_property(dev->of_node, "qti,cpr-quot-adjust-table",
+ prop = of_find_property(dev->of_node, "qcom,cpr-quot-adjust-table",
NULL);
if (prop) {
if (!corners_mapped) {
- pr_err("qti,cpr-corner-map missing\n");
+ pr_err("qcom,cpr-corner-map missing\n");
return -EINVAL;
}
@@ -1325,9 +1325,9 @@
return -ENOMEM;
rc = of_property_read_u32_array(dev->of_node,
- "qti,cpr-quot-adjust-table", tmp, size);
+ "qcom,cpr-quot-adjust-table", tmp, size);
if (rc) {
- pr_err("qti,cpr-quot-adjust-table missing, rc = %d",
+ pr_err("qcom,cpr-quot-adjust-table missing, rc = %d",
rc);
kfree(tmp);
return rc;
@@ -1336,7 +1336,7 @@
stripe_size = sizeof(struct quot_adjust_info) / sizeof(int);
if ((size % stripe_size) != 0) {
- pr_err("qti,cpr-quot-adjust-table data is not correct");
+ pr_err("qcom,cpr-quot-adjust-table data is not correct");
kfree(tmp);
return -EINVAL;
}
@@ -1349,7 +1349,7 @@
cpr_vreg->quot_adjust[tmp[i + 1]] =
tmp[i + 2];
} else {
- pr_err("qti,cpr-quot-adjust-table data is not correct");
+ pr_err("qcom,cpr-quot-adjust-table data is not correct");
kfree(tmp);
return -EINVAL;
}
@@ -1377,7 +1377,7 @@
u32 ro_sel, val;
u64 fuse_bits, fuse_bits_2;
- rc = of_property_read_u32_array(of_node, "qti,cpr-fuse-redun-sel",
+ rc = of_property_read_u32_array(of_node, "qcom,cpr-fuse-redun-sel",
cpr_fuse_redun_sel, 5);
if (rc < 0) {
pr_err("cpr-fuse-redun-sel missing: rc=%d\n", rc);
@@ -1388,16 +1388,16 @@
if (redundant) {
rc = of_property_read_u32_array(of_node,
- "qti,cpr-fuse-redun-row",
+ "qcom,cpr-fuse-redun-row",
cpr_fuse_row, 2);
- targ_quot_str = "qti,cpr-fuse-redun-target-quot";
- ro_sel_str = "qti,cpr-fuse-redun-ro-sel";
+ targ_quot_str = "qcom,cpr-fuse-redun-target-quot";
+ ro_sel_str = "qcom,cpr-fuse-redun-ro-sel";
} else {
rc = of_property_read_u32_array(of_node,
- "qti,cpr-fuse-row",
+ "qcom,cpr-fuse-row",
cpr_fuse_row, 2);
- targ_quot_str = "qti,cpr-fuse-target-quot";
- ro_sel_str = "qti,cpr-fuse-ro-sel";
+ targ_quot_str = "qcom,cpr-fuse-target-quot";
+ ro_sel_str = "qcom,cpr-fuse-ro-sel";
}
if (rc)
return rc;
@@ -1427,7 +1427,7 @@
if (redundant) {
if (of_property_read_bool(of_node,
- "qti,cpr-fuse-redun-bp-cpr-disable")) {
+ "qcom,cpr-fuse-redun-bp-cpr-disable")) {
CPR_PROP_READ_U32(of_node,
"cpr-fuse-redun-bp-cpr-disable",
&bp_cpr_disable, rc);
@@ -1446,7 +1446,7 @@
CPR_PROP_READ_U32(of_node, "cpr-fuse-bp-scheme",
&bp_scheme, rc);
rc = of_property_read_u32_array(of_node,
- "qti,cpr-fuse-row",
+ "qcom,cpr-fuse-row",
temp_row, 2);
if (rc)
return rc;
@@ -1611,7 +1611,7 @@
return rc;
/* Init module parameter with the DT value */
- cpr_vreg->enable = of_property_read_bool(of_node, "qti,cpr-enable");
+ cpr_vreg->enable = of_property_read_bool(of_node, "qcom,cpr-enable");
cpr_enable = (int) cpr_vreg->enable;
pr_info("CPR is %s by default.\n",
cpr_vreg->enable ? "enabled" : "disabled");
@@ -1716,12 +1716,12 @@
u32 fuse_sel[5];
/*
* Restrict all pvs corner voltages to a minimum value of
- * qti,cpr-cond-min-voltage if the fuse defined in
- * qti,cpr-fuse-cond-min-volt-sel does not read back with
+ * qcom,cpr-cond-min-voltage if the fuse defined in
+ * qcom,cpr-fuse-cond-min-volt-sel does not read back with
* the expected value.
*/
rc = of_property_read_u32_array(of_node,
- "qti,cpr-fuse-cond-min-volt-sel", fuse_sel, 5);
+ "qcom,cpr-fuse-cond-min-volt-sel", fuse_sel, 5);
if (!rc) {
if (!cpr_fuse_is_setting_expected(cpr_vreg, fuse_sel))
cpr_vreg->flags |= FLAGS_SET_MIN_VOLTAGE;
@@ -1737,7 +1737,7 @@
u32 speed_bits;
rc = of_property_read_u32_array(of_node,
- "qti,speed-bin-fuse-sel", fuse_sel, 4);
+ "qcom,speed-bin-fuse-sel", fuse_sel, 4);
if (!rc) {
fuse_bits = cpr_read_efuse_row(cpr_vreg,
@@ -1760,13 +1760,13 @@
u32 uplift_speed_bin;
rc = of_property_read_u32_array(of_node,
- "qti,cpr-fuse-uplift-sel", fuse_sel, 5);
+ "qcom,cpr-fuse-uplift-sel", fuse_sel, 5);
if (!rc) {
rc = of_property_read_u32(of_node,
- "qti,cpr-uplift-speed-bin",
+ "qcom,cpr-uplift-speed-bin",
&uplift_speed_bin);
if (rc < 0) {
- pr_err("qti,cpr-uplift-speed-bin missing\n");
+ pr_err("qcom,cpr-uplift-speed-bin missing\n");
return rc;
}
if (cpr_fuse_is_setting_expected(cpr_vreg, fuse_sel)
@@ -1786,7 +1786,7 @@
u32 min_uv = 0;
rc = of_property_read_u32_array(of_node,
- "qti,pvs-corner-ceiling-slow",
+ "qcom,pvs-corner-ceiling-slow",
&cpr_vreg->pvs_corner_v[APC_PVS_SLOW][CPR_FUSE_CORNER_SVS],
CPR_FUSE_CORNER_MAX - CPR_FUSE_CORNER_SVS);
if (rc < 0) {
@@ -1795,7 +1795,7 @@
}
rc = of_property_read_u32_array(of_node,
- "qti,pvs-corner-ceiling-nom",
+ "qcom,pvs-corner-ceiling-nom",
&cpr_vreg->pvs_corner_v[APC_PVS_NOM][CPR_FUSE_CORNER_SVS],
CPR_FUSE_CORNER_MAX - CPR_FUSE_CORNER_SVS);
if (rc < 0) {
@@ -1804,7 +1804,7 @@
}
rc = of_property_read_u32_array(of_node,
- "qti,pvs-corner-ceiling-fast",
+ "qcom,pvs-corner-ceiling-fast",
&cpr_vreg->pvs_corner_v[APC_PVS_FAST][CPR_FUSE_CORNER_SVS],
CPR_FUSE_CORNER_MAX - CPR_FUSE_CORNER_SVS);
if (rc < 0) {
@@ -1820,7 +1820,7 @@
return rc;
}
if (cpr_vreg->flags & FLAGS_SET_MIN_VOLTAGE) {
- of_property_read_u32(of_node, "qti,cpr-cond-min-voltage",
+ of_property_read_u32(of_node, "qcom,cpr-cond-min-voltage",
&min_uv);
for (i = APC_PVS_SLOW; i < NUM_APC_PVS; i++)
for (j = CPR_FUSE_CORNER_SVS; j < CPR_FUSE_CORNER_MAX;
diff --git a/include/linux/regulator/cpr-regulator.h b/include/linux/regulator/cpr-regulator.h
index 2e2d931..3b23d17 100644
--- a/include/linux/regulator/cpr-regulator.h
+++ b/include/linux/regulator/cpr-regulator.h
@@ -16,7 +16,7 @@
#include <linux/regulator/machine.h>
-#define CPR_REGULATOR_DRIVER_NAME "qti,cpr-regulator"
+#define CPR_REGULATOR_DRIVER_NAME "qcom,cpr-regulator"
#define CPR_PVS_EFUSE_BITS_MAX 5
#define CPR_PVS_EFUSE_BINS_MAX (1 << CPR_PVS_EFUSE_BITS_MAX)