Merge "msm: add new image modes to support stats buffer" into msm-3.4
diff --git a/Documentation/devicetree/bindings/arm/msm/msm_thermal.txt b/Documentation/devicetree/bindings/arm/msm/msm_thermal.txt
new file mode 100644
index 0000000..5d1fafb
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/msm/msm_thermal.txt
@@ -0,0 +1,34 @@
+MSM thermal driver (MSM_THERMAL)
+
+MSM_THERMAL is a kernel platform driver which regulates thermal conditions
+on the device during kernel boot. The goal of MSM_THERMAL is to prevent the
+temperature of the system from exceeding a thermal limit at which it cannot
+operate. Examples are CPU junction thermal limit, or POP memory thermal limit.
+The MSM_THERMAL driver polls the TSENS sensor hardware during boot, and
+reduces the maximum CPU frequency allowed in steps, to limit power/thermal
+output when a threshold temperature is crossed. It restores the maximum CPU
+frequency allowed in the same stepwise fashion when the threshold temperature
+(with hysteresis gap) is cleared.
+
+The devicetree representation of the MSM_THERMAL block should be:
+
+Required properties
+
+- compatible: "qcom,msm-thermal"
+- qcom,sensor-id: The id of the TSENS sensor polled for temperature.
+ Typically the sensor closest to CPU0.
+- qcom,poll-ms: Sampling interval to read sensor, in ms.
+- qcom,limit-temp: Threshold temperature to start stepping CPU down, in degC.
+- qcom,temp-hysteresis: Degrees below threshold temperature to step CPU up.
+- qcom,freq-step: Number of frequency steps to take on each CPU mitigation.
+
+Example:
+
+ qcom,msm-thermal {
+ compatible = "qcom,msm-thermal";
+ qcom,sensor-id = <0>;
+ qcom,poll-ms = <250>;
+ qcom,limit-temp = <60>;
+ qcom,temp-hysteresis = <10>;
+ qcom,freq-step = <2>;
+ };
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 1665abd..a5d851e 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -259,6 +259,7 @@
select MSM_AUDIO_QDSP6V2 if SND_SOC
select MSM_RPM_REGULATOR_SMD
select ARM_HAS_SG_CHAIN
+ select MSM_RUN_QUEUE_STATS
config ARCH_FSM9XXX
bool "FSM9XXX"
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index b96ccec..ce19336 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -291,6 +291,7 @@
obj-$(CONFIG_ARCH_MSM8974) += acpuclock-8974.o
obj-$(CONFIG_ARCH_MSM8974) += clock-local2.o clock-pll.o clock-8974.o clock-rpm.o clock-voter.o
obj-$(CONFIG_ARCH_MSM8974) += gdsc.o
+obj-$(CONFIG_ARCH_MSM8974) += krait-regulator.o
obj-$(CONFIG_ARCH_MSM9625) += board-9625.o board-9625-gpiomux.o
obj-$(CONFIG_ARCH_MSM8930) += acpuclock-8930.o acpuclock-8627.o acpuclock-8930aa.o
diff --git a/arch/arm/mach-msm/acpuclock-8064.c b/arch/arm/mach-msm/acpuclock-8064.c
index 6f9960d..a9521f0 100644
--- a/arch/arm/mach-msm/acpuclock-8064.c
+++ b/arch/arm/mach-msm/acpuclock-8064.c
@@ -121,6 +121,7 @@
[12] = { { 1026000, HFPLL, 1, 0, 0x26 }, 1150000, 1150000, 5 },
[13] = { { 1080000, HFPLL, 1, 0, 0x28 }, 1150000, 1150000, 5 },
[14] = { { 1134000, HFPLL, 1, 0, 0x2A }, 1150000, 1150000, 5 },
+ [15] = { { 1188000, HFPLL, 1, 0, 0x2C }, 1150000, 1150000, 5 },
};
static struct acpu_level acpu_freq_tbl_slow[] __initdata = {
@@ -137,15 +138,15 @@
{ 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(6), 1100000 },
{ 0, { 972000, HFPLL, 1, 0, 0x24 }, L2(6), 1125000 },
{ 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(6), 1125000 },
- { 0, { 1080000, HFPLL, 1, 0, 0x28 }, L2(14), 1175000 },
- { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(14), 1175000 },
- { 0, { 1188000, HFPLL, 1, 0, 0x2C }, L2(14), 1200000 },
- { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(14), 1200000 },
- { 0, { 1296000, HFPLL, 1, 0, 0x30 }, L2(14), 1225000 },
- { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(14), 1225000 },
- { 0, { 1404000, HFPLL, 1, 0, 0x34 }, L2(14), 1237500 },
- { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(14), 1237500 },
- { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(14), 1250000 },
+ { 0, { 1080000, HFPLL, 1, 0, 0x28 }, L2(15), 1175000 },
+ { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(15), 1175000 },
+ { 0, { 1188000, HFPLL, 1, 0, 0x2C }, L2(15), 1200000 },
+ { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(15), 1200000 },
+ { 0, { 1296000, HFPLL, 1, 0, 0x30 }, L2(15), 1225000 },
+ { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(15), 1225000 },
+ { 0, { 1404000, HFPLL, 1, 0, 0x34 }, L2(15), 1237500 },
+ { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(15), 1237500 },
+ { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(15), 1250000 },
{ 0, { 0 } }
};
@@ -163,15 +164,15 @@
{ 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(6), 1050000 },
{ 0, { 972000, HFPLL, 1, 0, 0x24 }, L2(6), 1075000 },
{ 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(6), 1075000 },
- { 0, { 1080000, HFPLL, 1, 0, 0x28 }, L2(14), 1125000 },
- { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(14), 1125000 },
- { 0, { 1188000, HFPLL, 1, 0, 0x2C }, L2(14), 1150000 },
- { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(14), 1150000 },
- { 0, { 1296000, HFPLL, 1, 0, 0x30 }, L2(14), 1175000 },
- { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(14), 1175000 },
- { 0, { 1404000, HFPLL, 1, 0, 0x34 }, L2(14), 1187500 },
- { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(14), 1187500 },
- { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(14), 1200000 },
+ { 0, { 1080000, HFPLL, 1, 0, 0x28 }, L2(15), 1125000 },
+ { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(15), 1125000 },
+ { 0, { 1188000, HFPLL, 1, 0, 0x2C }, L2(15), 1150000 },
+ { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(15), 1150000 },
+ { 0, { 1296000, HFPLL, 1, 0, 0x30 }, L2(15), 1175000 },
+ { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(15), 1175000 },
+ { 0, { 1404000, HFPLL, 1, 0, 0x34 }, L2(15), 1187500 },
+ { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(15), 1187500 },
+ { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(15), 1200000 },
{ 0, { 0 } }
};
@@ -189,15 +190,15 @@
{ 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(6), 1000000 },
{ 0, { 972000, HFPLL, 1, 0, 0x24 }, L2(6), 1025000 },
{ 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(6), 1025000 },
- { 0, { 1080000, HFPLL, 1, 0, 0x28 }, L2(14), 1075000 },
- { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(14), 1075000 },
- { 0, { 1188000, HFPLL, 1, 0, 0x2C }, L2(14), 1100000 },
- { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(14), 1100000 },
- { 0, { 1296000, HFPLL, 1, 0, 0x30 }, L2(14), 1125000 },
- { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(14), 1125000 },
- { 0, { 1404000, HFPLL, 1, 0, 0x34 }, L2(14), 1137500 },
- { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(14), 1137500 },
- { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(14), 1150000 },
+ { 0, { 1080000, HFPLL, 1, 0, 0x28 }, L2(15), 1075000 },
+ { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(15), 1075000 },
+ { 0, { 1188000, HFPLL, 1, 0, 0x2C }, L2(15), 1100000 },
+ { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(15), 1100000 },
+ { 0, { 1296000, HFPLL, 1, 0, 0x30 }, L2(15), 1125000 },
+ { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(15), 1125000 },
+ { 0, { 1404000, HFPLL, 1, 0, 0x34 }, L2(15), 1137500 },
+ { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(15), 1137500 },
+ { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(15), 1150000 },
{ 0, { 0 } }
};
diff --git a/arch/arm/mach-msm/acpuclock-krait.c b/arch/arm/mach-msm/acpuclock-krait.c
index 33396e5..9afa7c0 100644
--- a/arch/arm/mach-msm/acpuclock-krait.c
+++ b/arch/arm/mach-msm/acpuclock-krait.c
@@ -214,6 +214,9 @@
{
const struct core_speed *strt_s = sc->cur_speed;
+ if (strt_s == tgt_s)
+ return;
+
if (strt_s->src == HFPLL && tgt_s->src == HFPLL) {
/*
* Move to an always-on source running at a frequency
diff --git a/arch/arm/mach-msm/board-8064.c b/arch/arm/mach-msm/board-8064.c
index 2a8ac87..ea7fb32 100644
--- a/arch/arm/mach-msm/board-8064.c
+++ b/arch/arm/mach-msm/board-8064.c
@@ -890,6 +890,8 @@
#define PMIC_GPIO_DP 27 /* PMIC GPIO for D+ change */
#define PMIC_GPIO_DP_IRQ PM8921_GPIO_IRQ(PM8921_IRQ_BASE, PMIC_GPIO_DP)
+#define MSM_MPM_PIN_USB1_OTGSESSVLD 40
+
static struct msm_otg_platform_data msm_otg_pdata = {
.mode = USB_OTG,
.otg_control = OTG_PMIC_CONTROL,
@@ -898,6 +900,7 @@
.power_budget = 750,
.bus_scale_table = &usb_bus_scale_pdata,
.phy_init_seq = phy_init_seq,
+ .mpm_otgsessvld_int = MSM_MPM_PIN_USB1_OTGSESSVLD,
};
static struct msm_usb_host_platform_data msm_ehci_host_pdata3 = {
diff --git a/arch/arm/mach-msm/board-8930.c b/arch/arm/mach-msm/board-8930.c
index fb20307..b20c876 100644
--- a/arch/arm/mach-msm/board-8930.c
+++ b/arch/arm/mach-msm/board-8930.c
@@ -1455,6 +1455,8 @@
0x13, 0x83, /* set source impedance adjusment */
-1};
+#define MSM_MPM_PIN_USB1_OTGSESSVLD 40
+
static struct msm_otg_platform_data msm_otg_pdata = {
.mode = USB_OTG,
.otg_control = OTG_PMIC_CONTROL,
@@ -1467,6 +1469,7 @@
#ifdef CONFIG_FB_MSM_HDMI_MHL_8334
.mhl_dev_name = "sii8334",
#endif
+ .mpm_otgsessvld_int = MSM_MPM_PIN_USB1_OTGSESSVLD,
};
#endif
diff --git a/arch/arm/mach-msm/board-8960.c b/arch/arm/mach-msm/board-8960.c
index 50a5ed2..25677c3 100644
--- a/arch/arm/mach-msm/board-8960.c
+++ b/arch/arm/mach-msm/board-8960.c
@@ -1486,6 +1486,8 @@
};
#endif
+#define MSM_MPM_PIN_USB1_OTGSESSVLD 40
+
static struct msm_otg_platform_data msm_otg_pdata = {
.mode = USB_OTG,
.otg_control = OTG_PMIC_CONTROL,
@@ -1494,6 +1496,7 @@
.power_budget = 750,
#ifdef CONFIG_MSM_BUS_SCALING
.bus_scale_table = &usb_bus_scale_pdata,
+ .mpm_otgsessvld_int = MSM_MPM_PIN_USB1_OTGSESSVLD,
#endif
#ifdef CONFIG_FB_MSM_HDMI_MHL_8334
.mhl_dev_name = "sii8334",
diff --git a/arch/arm/mach-msm/clock-debug.c b/arch/arm/mach-msm/clock-debug.c
index 7263512..099b012 100644
--- a/arch/arm/mach-msm/clock-debug.c
+++ b/arch/arm/mach-msm/clock-debug.c
@@ -35,7 +35,8 @@
clk_set_max_rate(clock, val);
ret = clk_set_rate(clock, val);
if (ret)
- pr_err("clk_set_rate failed (%d)\n", ret);
+ pr_err("clk_set_rate(%s, %lu) failed (%d)\n", clock->dbg_name,
+ (unsigned long)val, ret);
return ret;
}
@@ -58,7 +59,7 @@
int ret, is_hw_gated;
/* Check to see if the clock is in hardware gating mode */
- if (clock->flags & CLKFLAG_HWCG)
+ if (clock->ops->in_hwcg_mode)
is_hw_gated = clock->ops->in_hwcg_mode(clock);
else
is_hw_gated = 0;
@@ -134,7 +135,10 @@
static int clock_debug_hwcg_get(void *data, u64 *val)
{
struct clk *clock = data;
- *val = !!(clock->flags & CLKFLAG_HWCG);
+ if (clock->ops->in_hwcg_mode)
+ *val = !!clock->ops->in_hwcg_mode(clock);
+ else
+ *val = 0;
return 0;
}
diff --git a/arch/arm/mach-msm/clock-local.c b/arch/arm/mach-msm/clock-local.c
index 51e5703..2df1cd1 100644
--- a/arch/arm/mach-msm/clock-local.c
+++ b/arch/arm/mach-msm/clock-local.c
@@ -563,11 +563,8 @@
{
if (!branch_in_hwcg_mode(b)) {
b->hwcg_mask = 0;
- c->flags &= ~CLKFLAG_HWCG;
if (b->ctl_reg && readl_relaxed(b->ctl_reg) & b->en_mask)
return HANDOFF_ENABLED_CLK;
- } else {
- c->flags |= CLKFLAG_HWCG;
}
return HANDOFF_DISABLED_CLK;
}
diff --git a/arch/arm/mach-msm/clock.h b/arch/arm/mach-msm/clock.h
index d236e13..ff0e973 100644
--- a/arch/arm/mach-msm/clock.h
+++ b/arch/arm/mach-msm/clock.h
@@ -29,7 +29,6 @@
#define CLKFLAG_NOINVERT 0x00000002
#define CLKFLAG_NONEST 0x00000004
#define CLKFLAG_NORESET 0x00000008
-#define CLKFLAG_HWCG 0x00000020
#define CLKFLAG_RETAIN 0x00000040
#define CLKFLAG_NORETAIN 0x00000080
#define CLKFLAG_SKIP_HANDOFF 0x00000100
diff --git a/arch/arm/mach-msm/devices-msm7x27a.c b/arch/arm/mach-msm/devices-msm7x27a.c
index 2642864..1fcf7dc 100644
--- a/arch/arm/mach-msm/devices-msm7x27a.c
+++ b/arch/arm/mach-msm/devices-msm7x27a.c
@@ -898,7 +898,7 @@
kgsl_3d0_pdata.idle_timeout = HZ/5;
kgsl_3d0_pdata.strtstp_sleepwake = false;
/* 8x25 supports a higher GPU frequency */
- kgsl_3d0_pdata.pwrlevel[0].gpu_freq = 300000000;
+ kgsl_3d0_pdata.pwrlevel[0].gpu_freq = 320000000;
kgsl_3d0_pdata.pwrlevel[0].bus_freq = 200000000;
}
}
diff --git a/arch/arm/mach-msm/krait-regulator.c b/arch/arm/mach-msm/krait-regulator.c
new file mode 100644
index 0000000..03a34d6
--- /dev/null
+++ b/arch/arm/mach-msm/krait-regulator.c
@@ -0,0 +1,737 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#define pr_fmt(fmt) "%s: " fmt, __func__
+
+#include <linux/err.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/regulator/driver.h>
+#include <linux/regulator/machine.h>
+#include <linux/regulator/of_regulator.h>
+#include <linux/regulator/krait-regulator.h>
+
+#include "spm.h"
+
+/*
+ * supply
+ * from
+ * pmic
+ * gang
+ * | LDO BYP [6]
+ * | /
+ * | /
+ * |_______/ _____
+ * | |
+ * ___|___ |
+ * | | |
+ * | | /
+ * | LDO | /
+ * | | / BHS[6]
+ * |_______| |
+ * | |
+ * |________________|
+ * |
+ * ________|________
+ * | |
+ * | KRAIT |
+ * |_________________|
+ */
+
+#define V_RETENTION 600000
+#define V_LDO_HEADROOM 150000
+
+#define PMIC_VOLTAGE_MIN 350000
+#define PMIC_VOLTAGE_MAX 1355000
+#define LV_RANGE_STEP 5000
+#define LV_RANGE_MIN 80000
+
+/* use LDO for core voltage below LDO_THRESH */
+#define CORE_VOLTAGE_LDO_THRESH 750000
+
+#define LOAD_PER_PHASE 3200000
+
+#define CORE_VOLTAGE_MIN 500000
+
+#define KRAIT_LDO_VOLTAGE_MIN 465000
+#define KRAIT_LDO_VOLTAGE_OFFSET 460000
+#define KRAIT_LDO_STEP 5000
+
+#define BHS_SETTLING_DELAY_US 1
+#define LDO_SETTLING_DELAY_US 1
+
+#define _KRAIT_MASK(BITS, POS) (((u32)(1 << (BITS)) - 1) << POS)
+#define KRAIT_MASK(LEFT_BIT_POS, RIGHT_BIT_POS) \
+ _KRAIT_MASK(LEFT_BIT_POS - RIGHT_BIT_POS + 1, RIGHT_BIT_POS)
+
+#define APC_SECURE 0x00000000
+#define CPU_PWR_CTL 0x00000004
+#define APC_PWR_STATUS 0x00000008
+#define APC_TEST_BUS_SEL 0x0000000C
+#define CPU_TRGTD_DBG_RST 0x00000010
+#define APC_PWR_GATE_CTL 0x00000014
+#define APC_LDO_VREF_SET 0x00000018
+
+/* bit definitions for APC_PWR_GATE_CTL */
+#define BHS_CNT_BIT_POS 24
+#define BHS_CNT_MASK KRAIT_MASK(31, 24)
+#define BHS_CNT_DEFAULT 64
+
+#define CLK_SRC_SEL_BIT_POS 15
+#define CLK_SRC_SEL_MASK KRAIT_MASK(15, 15)
+#define CLK_SRC_DEFAULT 0
+
+#define LDO_PWR_DWN_BIT_POS 16
+#define LDO_PWR_DWN_MASK KRAIT_MASK(21, 16)
+
+#define LDO_BYP_BIT_POS 8
+#define LDO_BYP_MASK KRAIT_MASK(13, 8)
+
+#define BHS_SEG_EN_BIT_POS 1
+#define BHS_SEG_EN_MASK KRAIT_MASK(6, 1)
+#define BHS_SEG_EN_DEFAULT 0x3F
+
+#define BHS_EN_BIT_POS 0
+#define BHS_EN_MASK KRAIT_MASK(0, 0)
+
+/* bit definitions for APC_LDO_VREF_SET register */
+#define VREF_RET_POS 8
+#define VREF_RET_MASK KRAIT_MASK(14, 8)
+
+#define VREF_LDO_BIT_POS 0
+#define VREF_LDO_MASK KRAIT_MASK(6, 0)
+
+/**
+ * struct pmic_gang_vreg -
+ * @name: the string used to represent the gang
+ * @pmic_vmax_uV: the current pmic gang voltage
+ * @pmic_phase_count: the number of phases turned on in the gang
+ * @krait_power_vregs: a list of krait consumers this gang supplies to
+ * @krait_power_vregs_lock: lock to prevent simultaneous access to the list
+ * and its nodes. This needs to be taken by each
+ * regulator's callback functions to prevent
+ * simultaneous updates to the pmic's phase
+ * voltage.
+ */
+struct pmic_gang_vreg {
+ const char *name;
+ int pmic_vmax_uV;
+ int pmic_phase_count;
+ struct list_head krait_power_vregs;
+ struct mutex krait_power_vregs_lock;
+};
+
+static struct pmic_gang_vreg *the_gang;
+
+enum krait_supply_mode {
+ HS_MODE = REGULATOR_MODE_NORMAL,
+ LDO_MODE = REGULATOR_MODE_IDLE,
+};
+
+struct krait_power_vreg {
+ struct list_head link;
+ struct regulator_desc desc;
+ struct regulator_dev *rdev;
+ const char *name;
+ struct pmic_gang_vreg *pvreg;
+ int uV;
+ int load_uA;
+ enum krait_supply_mode mode;
+ void __iomem *reg_base;
+};
+
+static void krait_masked_write(struct krait_power_vreg *kvreg,
+ int reg, uint32_t mask, uint32_t val)
+{
+ uint32_t reg_val;
+
+ reg_val = readl_relaxed(kvreg->reg_base + reg);
+ reg_val &= ~mask;
+ reg_val |= (val & mask);
+ writel_relaxed(reg_val, kvreg->reg_base + reg);
+
+ /*
+ * Barrier to ensure that the reads and writes from
+ * other regulator regions (they are 1k apart) execute in
+ * order to the above write.
+ */
+ mb();
+}
+
+static int get_krait_ldo_uv(struct krait_power_vreg *kvreg)
+{
+ uint32_t reg_val;
+ int uV;
+
+ reg_val = readl_relaxed(kvreg->reg_base + APC_LDO_VREF_SET);
+ reg_val &= VREF_LDO_MASK;
+ reg_val >>= VREF_LDO_BIT_POS;
+
+ if (reg_val == 0)
+ uV = 0;
+ else
+ uV = KRAIT_LDO_VOLTAGE_OFFSET + reg_val * KRAIT_LDO_STEP;
+
+ return uV;
+}
+
+static int set_krait_ldo_uv(struct krait_power_vreg *kvreg)
+{
+ uint32_t reg_val;
+
+ reg_val = kvreg->uV - KRAIT_LDO_VOLTAGE_OFFSET / KRAIT_LDO_STEP;
+ krait_masked_write(kvreg, APC_LDO_VREF_SET, VREF_LDO_MASK,
+ reg_val << VREF_LDO_BIT_POS);
+
+ return 0;
+}
+
+static int switch_to_using_hs(struct krait_power_vreg *kvreg)
+{
+ if (kvreg->mode == HS_MODE)
+ return 0;
+
+ /*
+ * enable ldo bypass - the krait is powered still by LDO since
+ * LDO is enabled and BHS is disabled
+ */
+ krait_masked_write(kvreg, APC_PWR_GATE_CTL, LDO_BYP_MASK, LDO_BYP_MASK);
+
+ /* enable bhs */
+ krait_masked_write(kvreg, APC_PWR_GATE_CTL, BHS_EN_MASK, BHS_EN_MASK);
+
+ /*
+ * wait for the bhs to settle - note that
+ * after the voltage has settled both BHS and LDO are supplying power
+ * to the krait. This avoids glitches during switching
+ */
+ udelay(BHS_SETTLING_DELAY_US);
+
+ /* disable ldo - only the BHS provides voltage to the cpu after this */
+ krait_masked_write(kvreg, APC_PWR_GATE_CTL,
+ LDO_PWR_DWN_MASK, LDO_PWR_DWN_MASK);
+
+ kvreg->mode = HS_MODE;
+ return 0;
+}
+
+static int switch_to_using_ldo(struct krait_power_vreg *kvreg)
+{
+ if (kvreg->mode == LDO_MODE && get_krait_ldo_uv(kvreg) == kvreg->uV)
+ return 0;
+
+ /*
+ * if the krait is in ldo mode and a voltage change is requested on the
+ * ldo switch to using hs before changing ldo voltage
+ */
+ if (kvreg->mode == LDO_MODE)
+ switch_to_using_hs(kvreg);
+
+ set_krait_ldo_uv(kvreg);
+
+ /*
+ * enable ldo - note that both LDO and BHS are are supplying voltage to
+ * the cpu after this. This avoids glitches during switching from BHS
+ * to LDO.
+ */
+ krait_masked_write(kvreg, APC_PWR_GATE_CTL, LDO_PWR_DWN_MASK, 0);
+
+ /* wait for the ldo to settle */
+ udelay(LDO_SETTLING_DELAY_US);
+
+ /*
+ * disable BHS and disable LDO bypass seperate from enabling
+ * the LDO above.
+ */
+ krait_masked_write(kvreg, APC_PWR_GATE_CTL,
+ BHS_EN_MASK | LDO_BYP_MASK, 0);
+
+ kvreg->mode = LDO_MODE;
+ return 0;
+}
+
+static int set_pmic_gang_phases(int phase_count)
+{
+ return msm_spm_apcs_set_phase(phase_count);
+}
+
+static int set_pmic_gang_voltage(int uV)
+{
+ int setpoint;
+
+ if (uV < PMIC_VOLTAGE_MIN) {
+ pr_err("requested %d < %d, restricting it to %d\n",
+ uV, PMIC_VOLTAGE_MIN, PMIC_VOLTAGE_MIN);
+ uV = PMIC_VOLTAGE_MIN;
+ }
+ if (uV > PMIC_VOLTAGE_MAX) {
+ pr_err("requested %d > %d, restricting it to %d\n",
+ uV, PMIC_VOLTAGE_MAX, PMIC_VOLTAGE_MAX);
+ uV = PMIC_VOLTAGE_MAX;
+ }
+
+ setpoint = DIV_ROUND_UP(uV - LV_RANGE_MIN, LV_RANGE_STEP);
+ return msm_spm_apcs_set_vdd(setpoint);
+}
+
+static int configure_ldo_or_hs(struct krait_power_vreg *from, int vmax)
+{
+ struct pmic_gang_vreg *pvreg = from->pvreg;
+ struct krait_power_vreg *kvreg;
+ int rc = 0;
+
+ list_for_each_entry(kvreg, &pvreg->krait_power_vregs, link) {
+ if (kvreg->uV > CORE_VOLTAGE_LDO_THRESH
+ || kvreg->uV > vmax - V_LDO_HEADROOM) {
+ rc = switch_to_using_hs(kvreg);
+ if (rc < 0) {
+ pr_err("could not switch %s to hs rc = %d\n",
+ kvreg->name, rc);
+ return rc;
+ }
+ } else {
+ rc = switch_to_using_ldo(kvreg);
+ if (rc < 0) {
+ pr_err("could not switch %s to ldo rc = %d\n",
+ kvreg->name, rc);
+ return rc;
+ }
+ }
+ }
+
+ return rc;
+}
+
+#define SLEW_RATE 2994
+static int pmic_gang_set_voltage_increase(struct krait_power_vreg *from,
+ int vmax)
+{
+ struct pmic_gang_vreg *pvreg = from->pvreg;
+ int rc = 0;
+ int settling_us;
+
+ /*
+ * since pmic gang voltage is increasing set the gang voltage
+ * prior to changing ldo/hs states of the requesting krait
+ */
+ rc = set_pmic_gang_voltage(vmax);
+ if (rc < 0) {
+ dev_err(&from->rdev->dev, "%s failed set voltage %d rc = %d\n",
+ pvreg->name, vmax, rc);
+ }
+
+ /* delay until the voltage is settled when it is raised */
+ settling_us = DIV_ROUND_UP(vmax - pvreg->pmic_vmax_uV, SLEW_RATE);
+ udelay(settling_us);
+
+ rc = configure_ldo_or_hs(from, vmax);
+ if (rc < 0) {
+ dev_err(&from->rdev->dev, "%s failed ldo/hs conf %d rc = %d\n",
+ pvreg->name, vmax, rc);
+ }
+
+ return rc;
+}
+
+static int pmic_gang_set_voltage_decrease(struct krait_power_vreg *from,
+ int vmax)
+{
+ struct pmic_gang_vreg *pvreg = from->pvreg;
+ int rc = 0;
+
+ /*
+ * since pmic gang voltage is decreasing ldos might get out of their
+ * operating range. Hence configure such kraits to be in hs mode prior
+ * to setting the pmic gang voltage
+ */
+ rc = configure_ldo_or_hs(from, vmax);
+ if (rc < 0) {
+ dev_err(&from->rdev->dev, "%s failed ldo/hs conf %d rc = %d\n",
+ pvreg->name, vmax, rc);
+ return rc;
+ }
+
+ rc = set_pmic_gang_voltage(vmax);
+ if (rc < 0) {
+ dev_err(&from->rdev->dev, "%s failed set voltage %d rc = %d\n",
+ pvreg->name, vmax, rc);
+ }
+
+ return rc;
+}
+
+static int pmic_gang_set_voltage(struct krait_power_vreg *from,
+ int vmax)
+{
+ struct pmic_gang_vreg *pvreg = from->pvreg;
+
+ if (pvreg->pmic_vmax_uV == vmax)
+ return 0;
+ else if (vmax < pvreg->pmic_vmax_uV)
+ return pmic_gang_set_voltage_decrease(from, vmax);
+
+ return pmic_gang_set_voltage_increase(from, vmax);
+}
+
+#define PHASE_SETTLING_TIME_US 10
+static unsigned int pmic_gang_set_phases(struct krait_power_vreg *from,
+ int load_uA)
+{
+ struct pmic_gang_vreg *pvreg = from->pvreg;
+ int phase_count = DIV_ROUND_UP(load_uA, LOAD_PER_PHASE) - 1;
+ int rc = 0;
+
+ if (phase_count < 0)
+ phase_count = 0;
+
+ if (phase_count != pvreg->pmic_phase_count) {
+ rc = set_pmic_gang_phases(phase_count);
+ if (rc < 0) {
+ dev_err(&from->rdev->dev,
+ "%s failed set phase %d rc = %d\n",
+ pvreg->name, phase_count, rc);
+ return rc;
+ }
+
+ /*
+ * delay until the phases are settled when
+ * the count is raised
+ */
+ if (phase_count > pvreg->pmic_phase_count)
+ udelay(PHASE_SETTLING_TIME_US);
+
+ pvreg->pmic_phase_count = phase_count;
+ }
+ return rc;
+}
+
+static int __init pvreg_init(struct platform_device *pdev)
+{
+ struct pmic_gang_vreg *pvreg;
+
+ pvreg = devm_kzalloc(&pdev->dev,
+ sizeof(struct pmic_gang_vreg), GFP_KERNEL);
+ if (!pvreg) {
+ pr_err("kzalloc failed.\n");
+ return -ENOMEM;
+ }
+
+ pvreg->name = "pmic_gang";
+ pvreg->pmic_vmax_uV = PMIC_VOLTAGE_MIN;
+ pvreg->pmic_phase_count = 1;
+
+ mutex_init(&pvreg->krait_power_vregs_lock);
+ INIT_LIST_HEAD(&pvreg->krait_power_vregs);
+ the_gang = pvreg;
+
+ pr_debug("name=%s inited\n", pvreg->name);
+
+ return 0;
+}
+
+static int krait_power_get_voltage(struct regulator_dev *rdev)
+{
+ struct krait_power_vreg *kvreg = rdev_get_drvdata(rdev);
+
+ return kvreg->uV;
+}
+
+static int get_vmax(struct krait_power_vreg *from, int min_uV)
+{
+ int vmax = 0;
+ int v;
+ struct krait_power_vreg *kvreg;
+ struct pmic_gang_vreg *pvreg = from->pvreg;
+
+ list_for_each_entry(kvreg, &pvreg->krait_power_vregs, link) {
+ v = kvreg->uV;
+
+ if (kvreg == from)
+ v = min_uV;
+
+ if (vmax < v)
+ vmax = v;
+ }
+ return vmax;
+}
+
+static int get_total_load(struct krait_power_vreg *from)
+{
+ int load_total = 0;
+ struct krait_power_vreg *kvreg;
+ struct pmic_gang_vreg *pvreg = from->pvreg;
+
+ list_for_each_entry(kvreg, &pvreg->krait_power_vregs, link)
+ load_total += kvreg->load_uA;
+
+ return load_total;
+}
+
+#define ROUND_UP_VOLTAGE(v, res) (DIV_ROUND_UP(v, res) * res)
+static int krait_power_set_voltage(struct regulator_dev *rdev,
+ int min_uV, int max_uV, unsigned *selector)
+{
+ struct krait_power_vreg *kvreg = rdev_get_drvdata(rdev);
+ struct pmic_gang_vreg *pvreg = kvreg->pvreg;
+ int rc;
+ int vmax;
+
+ /*
+ * if the voltage requested is below LDO_THRESHOLD this cpu could
+ * switch to LDO mode. Hence round the voltage as per the LDO
+ * resolution
+ */
+ if (min_uV < CORE_VOLTAGE_LDO_THRESH) {
+ if (min_uV < KRAIT_LDO_VOLTAGE_MIN)
+ min_uV = KRAIT_LDO_VOLTAGE_MIN;
+ min_uV = ROUND_UP_VOLTAGE(min_uV, KRAIT_LDO_STEP);
+ }
+
+ mutex_lock(&pvreg->krait_power_vregs_lock);
+
+ vmax = get_vmax(kvreg, min_uV);
+
+ /* round up the pmic voltage as per its resolution */
+ vmax = ROUND_UP_VOLTAGE(vmax, LV_RANGE_STEP);
+
+ /*
+ * Assign the voltage before updating the gang voltage as we iterate
+ * over all the core voltages and choose HS or LDO for each of them
+ */
+ kvreg->uV = min_uV;
+
+ rc = pmic_gang_set_voltage(kvreg, vmax);
+ if (rc < 0) {
+ dev_err(&rdev->dev, "%s failed set voltage (%d, %d) rc = %d\n",
+ kvreg->name, min_uV, max_uV, rc);
+ goto out;
+ }
+
+ pvreg->pmic_vmax_uV = vmax;
+
+out:
+ mutex_unlock(&pvreg->krait_power_vregs_lock);
+ return rc;
+}
+
+static unsigned int krait_power_get_optimum_mode(struct regulator_dev *rdev,
+ int input_uV, int output_uV, int load_uA)
+{
+ struct krait_power_vreg *kvreg = rdev_get_drvdata(rdev);
+ struct pmic_gang_vreg *pvreg = kvreg->pvreg;
+ int rc;
+ int load_total_uA;
+ int reg_mode = -EINVAL;
+
+ mutex_lock(&pvreg->krait_power_vregs_lock);
+
+ kvreg->load_uA = load_uA;
+
+ load_total_uA = get_total_load(kvreg);
+
+ rc = pmic_gang_set_phases(kvreg, load_total_uA);
+ if (rc < 0) {
+ dev_err(&rdev->dev, "%s failed set mode %d rc = %d\n",
+ kvreg->name, load_total_uA, rc);
+ goto out;
+ }
+
+ reg_mode = kvreg->mode;
+out:
+ mutex_unlock(&pvreg->krait_power_vregs_lock);
+ return reg_mode;
+}
+
+static int krait_power_set_mode(struct regulator_dev *rdev, unsigned int mode)
+{
+ return 0;
+}
+
+static unsigned int krait_power_get_mode(struct regulator_dev *rdev)
+{
+ struct krait_power_vreg *kvreg = rdev_get_drvdata(rdev);
+
+ return kvreg->mode;
+}
+
+static struct regulator_ops krait_power_ops = {
+ .get_voltage = krait_power_get_voltage,
+ .set_voltage = krait_power_set_voltage,
+ .get_optimum_mode = krait_power_get_optimum_mode,
+ .set_mode = krait_power_set_mode,
+ .get_mode = krait_power_get_mode,
+};
+
+static void kvreg_hw_init(struct krait_power_vreg *kvreg)
+{
+ /*
+ * bhs_cnt value sets the ramp-up time from power collapse,
+ * initialize the ramp up time
+ */
+ krait_masked_write(kvreg, APC_PWR_GATE_CTL,
+ BHS_CNT_MASK, BHS_CNT_DEFAULT << BHS_CNT_BIT_POS);
+
+ krait_masked_write(kvreg, APC_PWR_GATE_CTL,
+ CLK_SRC_SEL_MASK, CLK_SRC_DEFAULT << CLK_SRC_SEL_BIT_POS);
+
+ /* BHS has six different segments, turn them all on */
+ krait_masked_write(kvreg, APC_PWR_GATE_CTL,
+ BHS_SEG_EN_MASK, BHS_SEG_EN_DEFAULT << BHS_SEG_EN_BIT_POS);
+}
+
+static int __devinit krait_power_probe(struct platform_device *pdev)
+{
+ struct krait_power_vreg *kvreg;
+ struct resource *res;
+ struct regulator_init_data *init_data = pdev->dev.platform_data;
+ int rc = 0;
+
+ /* Initialize the pmic gang if it hasn't been initialized already */
+ if (the_gang == NULL) {
+ rc = pvreg_init(pdev);
+ if (rc < 0) {
+ dev_err(&pdev->dev,
+ "failed to init pmic gang rc = %d\n", rc);
+ return rc;
+ }
+ }
+
+ if (pdev->dev.of_node) {
+ /* Get init_data from device tree. */
+ init_data = of_get_regulator_init_data(&pdev->dev,
+ pdev->dev.of_node);
+ init_data->constraints.valid_ops_mask
+ |= REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_DRMS
+ | REGULATOR_CHANGE_MODE;
+ init_data->constraints.valid_modes_mask
+ |= REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE
+ | REGULATOR_MODE_FAST;
+ init_data->constraints.input_uV = init_data->constraints.max_uV;
+ }
+
+ if (!init_data) {
+ dev_err(&pdev->dev, "init data required.\n");
+ return -EINVAL;
+ }
+
+ if (!init_data->constraints.name) {
+ dev_err(&pdev->dev,
+ "regulator name must be specified in constraints.\n");
+ return -EINVAL;
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(&pdev->dev, "missing physical register addresses\n");
+ return -EINVAL;
+ }
+
+ kvreg = devm_kzalloc(&pdev->dev,
+ sizeof(struct krait_power_vreg), GFP_KERNEL);
+ if (!kvreg) {
+ dev_err(&pdev->dev, "kzalloc failed.\n");
+ return -ENOMEM;
+ }
+
+ kvreg->reg_base = devm_ioremap(&pdev->dev,
+ res->start, resource_size(res));
+
+ kvreg->pvreg = the_gang;
+ kvreg->name = init_data->constraints.name;
+ kvreg->desc.name = kvreg->name;
+ kvreg->desc.ops = &krait_power_ops;
+ kvreg->desc.type = REGULATOR_VOLTAGE;
+ kvreg->desc.owner = THIS_MODULE;
+ kvreg->uV = CORE_VOLTAGE_MIN;
+ kvreg->mode = HS_MODE;
+ kvreg->desc.ops = &krait_power_ops;
+
+ platform_set_drvdata(pdev, kvreg);
+
+ mutex_lock(&the_gang->krait_power_vregs_lock);
+ list_add_tail(&kvreg->link, &the_gang->krait_power_vregs);
+ mutex_unlock(&the_gang->krait_power_vregs_lock);
+
+ kvreg->rdev = regulator_register(&kvreg->desc, &pdev->dev, init_data,
+ kvreg, pdev->dev.of_node);
+ if (IS_ERR(kvreg->rdev)) {
+ rc = PTR_ERR(kvreg->rdev);
+ pr_err("regulator_register failed, rc=%d.\n", rc);
+ goto out;
+ }
+
+ kvreg_hw_init(kvreg);
+ dev_dbg(&pdev->dev, "id=%d, name=%s\n", pdev->id, kvreg->name);
+
+ return 0;
+out:
+ mutex_lock(&the_gang->krait_power_vregs_lock);
+ list_del(&kvreg->link);
+ mutex_unlock(&the_gang->krait_power_vregs_lock);
+
+ platform_set_drvdata(pdev, NULL);
+ return rc;
+}
+
+static int __devexit krait_power_remove(struct platform_device *pdev)
+{
+ struct krait_power_vreg *kvreg = platform_get_drvdata(pdev);
+ struct pmic_gang_vreg *pvreg = kvreg->pvreg;
+
+ mutex_lock(&pvreg->krait_power_vregs_lock);
+ list_del(&kvreg->link);
+ mutex_unlock(&pvreg->krait_power_vregs_lock);
+
+ regulator_unregister(kvreg->rdev);
+ platform_set_drvdata(pdev, NULL);
+ return 0;
+}
+
+static struct of_device_id krait_power_match_table[] = {
+ { .compatible = "qcom,krait-regulator", },
+ {}
+};
+
+static struct platform_driver krait_power_driver = {
+ .probe = krait_power_probe,
+ .remove = __devexit_p(krait_power_remove),
+ .driver = {
+ .name = KRAIT_REGULATOR_DRIVER_NAME,
+ .of_match_table = krait_power_match_table,
+ .owner = THIS_MODULE,
+ },
+};
+
+int __init krait_power_init(void)
+{
+ return platform_driver_register(&krait_power_driver);
+}
+
+static void __exit krait_power_exit(void)
+{
+ platform_driver_unregister(&krait_power_driver);
+}
+
+module_exit(krait_power_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("KRAIT POWER regulator driver");
+MODULE_VERSION("1.0");
+MODULE_ALIAS("platform:"KRAIT_REGULATOR_DRIVER_NAME);
diff --git a/arch/arm/mach-msm/modem-8960.c b/arch/arm/mach-msm/modem-8960.c
index 73b9b1f..844a78b 100644
--- a/arch/arm/mach-msm/modem-8960.c
+++ b/arch/arm/mach-msm/modem-8960.c
@@ -38,8 +38,6 @@
static struct subsys_device *modem_8960_dev;
#define MAX_SSR_REASON_LEN 81U
-#define Q6_FW_WDOG_ENABLE 0x08882024
-#define Q6_SW_WDOG_ENABLE 0x08982024
static void log_modem_sfr(void)
{
@@ -71,26 +69,6 @@
subsystem_restart_dev(modem_8960_dev);
}
-static void modem_wdog_check(struct work_struct *work)
-{
- void __iomem *q6_sw_wdog_addr;
- u32 regval;
-
- q6_sw_wdog_addr = ioremap_nocache(Q6_SW_WDOG_ENABLE, 4);
- if (!q6_sw_wdog_addr)
- panic("Unable to check modem watchdog status.\n");
-
- regval = readl_relaxed(q6_sw_wdog_addr);
- if (!regval) {
- pr_err("modem-8960: Modem watchdog wasn't activated!. Restarting the modem now.\n");
- restart_modem();
- }
-
- iounmap(q6_sw_wdog_addr);
-}
-
-static DECLARE_DELAYED_WORK(modem_wdog_check_work, modem_wdog_check);
-
static void smsm_state_cb(void *data, uint32_t old_state, uint32_t new_state)
{
/* Ignore if we're the one that set SMSM_RESET */
@@ -103,18 +81,15 @@
}
}
+#define Q6_FW_WDOG_ENABLE 0x08882024
+#define Q6_SW_WDOG_ENABLE 0x08982024
+
static int modem_shutdown(const struct subsys_desc *subsys)
{
void __iomem *q6_fw_wdog_addr;
void __iomem *q6_sw_wdog_addr;
/*
- * Cancel any pending wdog_check work items, since we're shutting
- * down anyway.
- */
- cancel_delayed_work(&modem_wdog_check_work);
-
- /*
* Disable the modem watchdog since it keeps running even after the
* modem is shutdown.
*/
@@ -150,8 +125,6 @@
pil_force_boot("modem");
enable_irq(Q6FW_WDOG_EXPIRED_IRQ);
enable_irq(Q6SW_WDOG_EXPIRED_IRQ);
- schedule_delayed_work(&modem_wdog_check_work,
- msecs_to_jiffies(MODEM_WDOG_CHECK_TIMEOUT_MS));
return 0;
}
diff --git a/arch/arm/mach-msm/msm_xo.c b/arch/arm/mach-msm/msm_xo.c
index 8254502..2d61504 100644
--- a/arch/arm/mach-msm/msm_xo.c
+++ b/arch/arm/mach-msm/msm_xo.c
@@ -259,9 +259,9 @@
}
/* Ignore transitions from pin to on or vice versa */
if (mode && xo_voter->mode == MSM_XO_MODE_OFF)
- clk_enable(xo_clk);
+ clk_prepare_enable(xo_clk);
else if (!mode)
- clk_disable(xo_clk);
+ clk_disable_unprepare(xo_clk);
}
xo_voter->mode = mode;
out:
diff --git a/drivers/char/hw_random/msm_rng.c b/drivers/char/hw_random/msm_rng.c
index 7e6670d..60ca44f 100644
--- a/drivers/char/hw_random/msm_rng.c
+++ b/drivers/char/hw_random/msm_rng.c
@@ -127,9 +127,9 @@
PRNG_HW_ENABLE;
/* PRNG H/W is not ON */
if (val != PRNG_HW_ENABLE) {
- val = readl_relaxed(msm_rng_dev->base + PRNG_LFSR_CFG_OFFSET) &
- PRNG_LFSR_CFG_MASK;
- val |= PRNG_LFSR_CFG_MASK;
+ val = readl_relaxed(msm_rng_dev->base + PRNG_LFSR_CFG_OFFSET);
+ val &= PRNG_LFSR_CFG_MASK;
+ val |= PRNG_LFSR_CFG_CLOCKS;
writel_relaxed(val, msm_rng_dev->base + PRNG_LFSR_CFG_OFFSET);
/* The PRNG CONFIG register should be first written */
diff --git a/drivers/gpio/gpio-msm-common.c b/drivers/gpio/gpio-msm-common.c
index fa8239a..bdb8171 100644
--- a/drivers/gpio/gpio-msm-common.c
+++ b/drivers/gpio/gpio-msm-common.c
@@ -299,6 +299,7 @@
spin_lock_irqsave(&tlmm_lock, irq_flags);
__set_bit(gpio, msm_gpio.enabled_irqs);
+ __msm_gpio_set_intr_status(gpio);
__msm_gpio_set_intr_cfg_enable(gpio, 1);
mb();
spin_unlock_irqrestore(&tlmm_lock, irq_flags);
diff --git a/drivers/gpio/gpio-msm-v2.c b/drivers/gpio/gpio-msm-v2.c
index bac9f8a..943a4a2 100644
--- a/drivers/gpio/gpio-msm-v2.c
+++ b/drivers/gpio/gpio-msm-v2.c
@@ -149,10 +149,8 @@
{
if (val) {
set_gpio_bits(INTR_ENABLE, GPIO_INTR_CFG(gpio));
- __raw_writel(TARGET_PROC_SCORPION, GPIO_INTR_CFG_SU(gpio));
} else {
- __raw_writel(TARGET_PROC_NONE, GPIO_INTR_CFG_SU(gpio));
clr_gpio_bits(INTR_ENABLE, GPIO_INTR_CFG(gpio));
}
}
@@ -161,6 +159,15 @@
{
unsigned cfg;
+ /* RAW_STATUS_EN is left on for all gpio irqs. Due to the
+ * internal circuitry of TLMM, toggling the RAW_STATUS
+ * could cause the INTR_STATUS to be set for EDGE interrupts.
+ */
+ cfg = __msm_gpio_get_intr_config(gpio);
+ cfg |= INTR_RAW_STATUS_EN;
+ __raw_writel(cfg, GPIO_INTR_CFG(gpio));
+ __raw_writel(TARGET_PROC_SCORPION, GPIO_INTR_CFG_SU(gpio));
+
cfg = __msm_gpio_get_intr_config(gpio);
if (type & IRQ_TYPE_EDGE_BOTH)
cfg |= INTR_DECT_CTL_EDGE;
@@ -172,23 +179,13 @@
else
cfg &= ~INTR_POL_CTL_HI;
- /* RAW_STATUS_EN is left on for all gpio irqs. Due to the
- * internal circuitry of TLMM, toggling the RAW_STATUS
- * could cause the INTR_STATUS to be set for EDGE interrupts.
- */
- cfg |= INTR_RAW_STATUS_EN;
__raw_writel(cfg, GPIO_INTR_CFG(gpio));
-
/* Sometimes it might take a little while to update
* the interrupt status after the RAW_STATUS is enabled
+ * We clear the interrupt status before enabling the
+ * interrupt in the unmask call-back.
*/
udelay(5);
-
- /* Clear the interrupt status to clear out any spurious
- * irq as a result of the above operation
- */
- __msm_gpio_set_intr_status(gpio);
-
}
void __gpio_tlmm_config(unsigned config)
diff --git a/drivers/gpio/gpio-msm-v3.c b/drivers/gpio/gpio-msm-v3.c
index 6086de3..e0b01cd 100644
--- a/drivers/gpio/gpio-msm-v3.c
+++ b/drivers/gpio/gpio-msm-v3.c
@@ -155,11 +155,10 @@
cfg = __raw_readl(GPIO_INTR_CFG(gpio));
if (val) {
- cfg &= ~(INTR_TARGET_PROC_NONE | INTR_DIR_CONN_EN);
- cfg |= INTR_ENABLE | INTR_TARGET_PROC_APPS;
+ cfg &= ~INTR_DIR_CONN_EN;
+ cfg |= INTR_ENABLE;
} else {
- cfg &= ~(INTR_TARGET_PROC_APPS | INTR_ENABLE);
- cfg |= INTR_TARGET_PROC_NONE;
+ cfg &= ~INTR_ENABLE;
}
__raw_writel(cfg, GPIO_INTR_CFG(gpio));
}
@@ -169,6 +168,14 @@
unsigned cfg;
cfg = __raw_readl(GPIO_INTR_CFG(gpio));
+
+ /* RAW_STATUS_EN is left on for all gpio irqs. Due to the
+ * internal circuitry of TLMM, toggling the RAW_STATUS
+ * could cause the INTR_STATUS to be set for EDGE interrupts.
+ */
+ cfg |= (INTR_RAW_STATUS_EN | INTR_TARGET_PROC_APPS);
+ __raw_writel(cfg, GPIO_INTR_CFG(gpio));
+ cfg = __raw_readl(GPIO_INTR_CFG(gpio));
cfg &= ~INTR_DECT_CTL_MASK;
if (type == IRQ_TYPE_EDGE_RISING)
cfg |= INTR_DECT_CTL_POS_EDGE;
@@ -184,22 +191,13 @@
else
cfg &= ~INTR_POL_CTL_HI;
- /* RAW_STATUS_EN is left on for all gpio irqs. Due to the
- * internal circuitry of TLMM, toggling the RAW_STATUS
- * could cause the INTR_STATUS to be set for EDGE interrupts.
- */
- cfg |= INTR_RAW_STATUS_EN;
__raw_writel(cfg, GPIO_INTR_CFG(gpio));
-
/* Sometimes it might take a little while to update
* the interrupt status after the RAW_STATUS is enabled
+ * We clear the interrupt status before enabling the
+ * interrupt in the unmask call-back.
*/
udelay(5);
-
- /* Clear the interrupt status to clear out any spurious
- * irq as a result of the above operation
- */
- __msm_gpio_set_intr_status(gpio);
}
void __gpio_tlmm_config(unsigned config)
diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile
index e0de38d..082ee3d 100644
--- a/drivers/media/video/Makefile
+++ b/drivers/media/video/Makefile
@@ -215,6 +215,7 @@
obj-$(CONFIG_MSM_CAMERA) += msm/
obj-$(CONFIG_ARCH_OMAP) += omap/
obj-$(CONFIG_MSM_VIDC_V4L2) += msm_vidc/
+obj-$(CONFIG_FB_MSM_WRITEBACK_MSM_PANEL) += msm_wfd/
ccflags-y += -I$(srctree)/drivers/media/dvb/dvb-core
ccflags-y += -I$(srctree)/drivers/media/dvb/frontends
diff --git a/drivers/media/video/msm/Makefile b/drivers/media/video/msm/Makefile
index 3ca4198..740e424 100644
--- a/drivers/media/video/msm/Makefile
+++ b/drivers/media/video/msm/Makefile
@@ -55,5 +55,4 @@
obj-$(CONFIG_MT9D112) += mt9d112.o mt9d112_reg.o
obj-$(CONFIG_MT9D113) += mt9d113.o mt9d113_reg.o
-obj-$(CONFIG_FB_MSM_WRITEBACK_MSM_PANEL) += wfd/
obj-$(CONFIG_MSM_V4L2_VIDEO_OVERLAY_DEVICE) += msm_v4l2_video.o
diff --git a/drivers/media/video/msm/wfd/Makefile b/drivers/media/video/msm_wfd/Makefile
similarity index 100%
rename from drivers/media/video/msm/wfd/Makefile
rename to drivers/media/video/msm_wfd/Makefile
diff --git a/drivers/media/video/msm/wfd/enc-subdev.c b/drivers/media/video/msm_wfd/enc-subdev.c
similarity index 100%
rename from drivers/media/video/msm/wfd/enc-subdev.c
rename to drivers/media/video/msm_wfd/enc-subdev.c
diff --git a/drivers/media/video/msm/wfd/enc-subdev.h b/drivers/media/video/msm_wfd/enc-subdev.h
similarity index 100%
rename from drivers/media/video/msm/wfd/enc-subdev.h
rename to drivers/media/video/msm_wfd/enc-subdev.h
diff --git a/drivers/media/video/msm/wfd/mdp-subdev.c b/drivers/media/video/msm_wfd/mdp-subdev.c
similarity index 100%
rename from drivers/media/video/msm/wfd/mdp-subdev.c
rename to drivers/media/video/msm_wfd/mdp-subdev.c
diff --git a/drivers/media/video/msm/wfd/mdp-subdev.h b/drivers/media/video/msm_wfd/mdp-subdev.h
similarity index 100%
rename from drivers/media/video/msm/wfd/mdp-subdev.h
rename to drivers/media/video/msm_wfd/mdp-subdev.h
diff --git a/drivers/media/video/msm/wfd/vsg-subdev.c b/drivers/media/video/msm_wfd/vsg-subdev.c
similarity index 100%
rename from drivers/media/video/msm/wfd/vsg-subdev.c
rename to drivers/media/video/msm_wfd/vsg-subdev.c
diff --git a/drivers/media/video/msm/wfd/vsg-subdev.h b/drivers/media/video/msm_wfd/vsg-subdev.h
similarity index 100%
rename from drivers/media/video/msm/wfd/vsg-subdev.h
rename to drivers/media/video/msm_wfd/vsg-subdev.h
diff --git a/drivers/media/video/msm/wfd/wfd-ioctl.c b/drivers/media/video/msm_wfd/wfd-ioctl.c
similarity index 100%
rename from drivers/media/video/msm/wfd/wfd-ioctl.c
rename to drivers/media/video/msm_wfd/wfd-ioctl.c
diff --git a/drivers/media/video/msm/wfd/wfd-util.c b/drivers/media/video/msm_wfd/wfd-util.c
similarity index 100%
rename from drivers/media/video/msm/wfd/wfd-util.c
rename to drivers/media/video/msm_wfd/wfd-util.c
diff --git a/drivers/media/video/msm/wfd/wfd-util.h b/drivers/media/video/msm_wfd/wfd-util.h
similarity index 100%
rename from drivers/media/video/msm/wfd/wfd-util.h
rename to drivers/media/video/msm_wfd/wfd-util.h
diff --git a/drivers/media/video/videobuf2-core.c b/drivers/media/video/videobuf2-core.c
index 2ec872b..2bc0938 100644
--- a/drivers/media/video/videobuf2-core.c
+++ b/drivers/media/video/videobuf2-core.c
@@ -1104,7 +1104,7 @@
* consistent after getting driver's lock back.
*/
if (q->memory == V4L2_MEMORY_USERPTR) {
- mmap_sem = ¤t->mm->mmap_sem;
+ mmap_sem = ¤t->active_mm->mmap_sem;
call_qop(q, wait_prepare, q);
down_read(mmap_sem);
call_qop(q, wait_finish, q);
diff --git a/drivers/thermal/msm_thermal.c b/drivers/thermal/msm_thermal.c
index 0575d80..2dd2592 100644
--- a/drivers/thermal/msm_thermal.c
+++ b/drivers/thermal/msm_thermal.c
@@ -21,6 +21,8 @@
#include <linux/cpufreq.h>
#include <linux/msm_tsens.h>
#include <linux/msm_thermal.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
#include <mach/cpufreq.h>
static int enabled;
@@ -176,7 +178,7 @@
module_param_cb(enabled, &module_ops, &enabled, 0644);
MODULE_PARM_DESC(enabled, "enforce thermal limit on cpu");
-int __init msm_thermal_init(struct msm_thermal_data *pdata)
+int __devinit msm_thermal_init(struct msm_thermal_data *pdata)
{
int ret = 0;
@@ -190,3 +192,64 @@
return ret;
}
+
+static int __devinit msm_thermal_dev_probe(struct platform_device *pdev)
+{
+ int ret = 0;
+ char *key = NULL;
+ struct device_node *node = pdev->dev.of_node;
+ struct msm_thermal_data data;
+
+ memset(&data, 0, sizeof(struct msm_thermal_data));
+ key = "qcom,sensor-id";
+ ret = of_property_read_u32(node, key, &data.sensor_id);
+ if (ret)
+ goto fail;
+ WARN_ON(data.sensor_id >= TSENS_MAX_SENSORS);
+
+ key = "qcom,poll-ms";
+ ret = of_property_read_u32(node, key, &data.poll_ms);
+ if (ret)
+ goto fail;
+
+ key = "qcom,limit-temp";
+ ret = of_property_read_u32(node, key, &data.limit_temp_degC);
+ if (ret)
+ goto fail;
+
+ key = "qcom,temp-hysteresis";
+ ret = of_property_read_u32(node, key, &data.temp_hysteresis_degC);
+ if (ret)
+ goto fail;
+
+ key = "qcom,freq-step";
+ ret = of_property_read_u32(node, key, &data.freq_step);
+
+fail:
+ if (ret)
+ pr_err("%s: Failed reading node=%s, key=%s\n",
+ __func__, node->full_name, key);
+ else
+ ret = msm_thermal_init(&data);
+
+ return ret;
+}
+
+static struct of_device_id msm_thermal_match_table[] = {
+ {.compatible = "qcom,msm-thermal"},
+ {},
+};
+
+static struct platform_driver msm_thermal_device_driver = {
+ .probe = msm_thermal_dev_probe,
+ .driver = {
+ .name = "msm-thermal",
+ .owner = THIS_MODULE,
+ .of_match_table = msm_thermal_match_table,
+ },
+};
+
+int __init msm_thermal_device_init(void)
+{
+ return platform_driver_register(&msm_thermal_device_driver);
+}
diff --git a/drivers/usb/dwc3/dwc3-msm.c b/drivers/usb/dwc3/dwc3-msm.c
index 136c6d9..522e3a4 100644
--- a/drivers/usb/dwc3/dwc3-msm.c
+++ b/drivers/usb/dwc3/dwc3-msm.c
@@ -43,27 +43,29 @@
* USB DBM Hardware registers.
*
*/
-#define DBM_EP_CFG(n) (0x00 + 4 * (n))
-#define DBM_DATA_FIFO(n) (0x10 + 4 * (n))
-#define DBM_DATA_FIFO_SIZE(n) (0x20 + 4 * (n))
-#define DBM_DATA_FIFO_EN (0x30)
-#define DBM_GEVNTADR (0x34)
-#define DBM_GEVNTSIZ (0x38)
-#define DBM_DBG_CNFG (0x3C)
-#define DBM_HW_TRB0_EP(n) (0x40 + 4 * (n))
-#define DBM_HW_TRB1_EP(n) (0x50 + 4 * (n))
-#define DBM_HW_TRB2_EP(n) (0x60 + 4 * (n))
-#define DBM_HW_TRB3_EP(n) (0x70 + 4 * (n))
-#define DBM_PIPE_CFG (0x80)
-#define DBM_SOFT_RESET (0x84)
+#define DBM_BASE 0x000F8000
+#define DBM_EP_CFG(n) (DBM_BASE + (0x00 + 4 * (n)))
+#define DBM_DATA_FIFO(n) (DBM_BASE + (0x10 + 4 * (n)))
+#define DBM_DATA_FIFO_SIZE(n) (DBM_BASE + (0x20 + 4 * (n)))
+#define DBM_DATA_FIFO_EN (DBM_BASE + (0x30))
+#define DBM_GEVNTADR (DBM_BASE + (0x34))
+#define DBM_GEVNTSIZ (DBM_BASE + (0x38))
+#define DBM_DBG_CNFG (DBM_BASE + (0x3C))
+#define DBM_HW_TRB0_EP(n) (DBM_BASE + (0x40 + 4 * (n)))
+#define DBM_HW_TRB1_EP(n) (DBM_BASE + (0x50 + 4 * (n)))
+#define DBM_HW_TRB2_EP(n) (DBM_BASE + (0x60 + 4 * (n)))
+#define DBM_HW_TRB3_EP(n) (DBM_BASE + (0x70 + 4 * (n)))
+#define DBM_PIPE_CFG (DBM_BASE + (0x80))
+#define DBM_SOFT_RESET (DBM_BASE + (0x84))
+#define DBM_GEN_CFG (DBM_BASE + (0x88))
/**
* USB DBM Hardware registers bitmask.
*
*/
/* DBM_EP_CFG */
-#define DBM_EN_EP 0x00000000
-#define DBM_USB3_EP_NUM 0x0000003E
+#define DBM_EN_EP 0x00000001
+#define USB3_EPNUM 0x0000003E
#define DBM_BAM_PIPE_NUM 0x000000C0
#define DBM_PRODUCER 0x00000100
#define DBM_DISABLE_WB 0x00000200
@@ -83,8 +85,9 @@
#define DBM_SFT_RST_EP1 0x00000002
#define DBM_SFT_RST_EP2 0x00000004
#define DBM_SFT_RST_EP3 0x00000008
-#define DBM_SFT_RST_EPS 0x0000000F
-#define DBM_SFT_RST 0x80000000
+#define DBM_SFT_RST_EPS_MASK 0x0000000F
+#define DBM_SFT_RST_MASK 0x80000000
+#define DBM_EN_MASK 0x00000002
#define DBM_MAX_EPS 4
@@ -93,17 +96,18 @@
#define DBM_TRB_DATA_SRC 0x40000000
#define DBM_TRB_DMA 0x20000000
#define DBM_TRB_EP_NUM(ep) (ep<<24)
+
/**
* USB QSCRATCH Hardware registers
*
*/
#define QSCRATCH_REG_OFFSET (0x000F8800)
+#define QSCRATCH_GENERAL_CFG (QSCRATCH_REG_OFFSET + 0x08)
#define CHARGING_DET_CTRL_REG (QSCRATCH_REG_OFFSET + 0x18)
#define CHARGING_DET_OUTPUT_REG (QSCRATCH_REG_OFFSET + 0x1C)
#define ALT_INTERRUPT_EN_REG (QSCRATCH_REG_OFFSET + 0x20)
#define HS_PHY_IRQ_STAT_REG (QSCRATCH_REG_OFFSET + 0x24)
-
struct dwc3_msm_req_complete {
struct list_head list_item;
struct usb_request *req;
@@ -271,21 +275,6 @@
}
/**
- * Return DBM EP number which is not already configured.
- *
- */
-static int dwc3_msm_find_avail_dbm_ep(void)
-{
- int i;
-
- for (i = 0; i < context->dbm_num_eps; i++)
- if (!context->ep_num_mapping[i])
- return i;
-
- return -ENODEV; /* Not found */
-}
-
-/**
* Return DBM EP number according to usb endpoint number.
*
*/
@@ -339,12 +328,21 @@
* Reset the DBM registers upon initialization.
*
*/
-static int dwc3_msm_dbm_soft_reset(void)
+static int dwc3_msm_dbm_soft_reset(int enter_reset)
{
dev_dbg(context->dev, "%s\n", __func__);
-
- dwc3_msm_write_reg_field(context->base, DBM_SOFT_RESET,
- DBM_SFT_RST, 1);
+ if (enter_reset) {
+ dev_dbg(context->dev, "enter DBM reset\n");
+ dwc3_msm_write_reg_field(context->base, DBM_SOFT_RESET,
+ DBM_SFT_RST_MASK, 1);
+ } else {
+ dev_dbg(context->dev, "exit DBM reset\n");
+ dwc3_msm_write_reg_field(context->base, DBM_SOFT_RESET,
+ DBM_SFT_RST_MASK, 0);
+ /*enable DBM*/
+ dwc3_msm_write_reg_field(context->base, QSCRATCH_GENERAL_CFG,
+ DBM_EN_MASK, 0x1);
+ }
return 0;
}
@@ -371,10 +369,10 @@
if (enter_reset) {
dwc3_msm_write_reg_field(context->base, DBM_SOFT_RESET,
- DBM_SFT_RST_EPS, 1 << dbm_ep);
+ DBM_SFT_RST_EPS_MASK & 1 << dbm_ep, 1);
} else {
dwc3_msm_write_reg_field(context->base, DBM_SOFT_RESET,
- DBM_SFT_RST_EPS, 0);
+ DBM_SFT_RST_EPS_MASK & 1 << dbm_ep, 0);
}
return 0;
@@ -397,36 +395,39 @@
bool internal_mem, bool ioc)
{
u8 dbm_ep;
- u8 ioc_mask;
+ u32 ep_cfg;
dev_dbg(context->dev, "%s\n", __func__);
- dbm_ep = dwc3_msm_find_avail_dbm_ep();
+ dbm_ep = dwc3_msm_find_matching_dbm_ep(usb_ep);
+
if (dbm_ep < 0) {
- dev_err(context->dev, "%s: No more DBM eps\n", __func__);
+ dev_err(context->dev,
+ "%s: Invalid usb ep index\n", __func__);
return -ENODEV;
}
-
- context->ep_num_mapping[dbm_ep] = usb_ep;
-
/* First, reset the dbm endpoint */
- dwc3_msm_dbm_ep_soft_reset(dbm_ep, false);
+ dwc3_msm_dbm_ep_soft_reset(dbm_ep, 0);
- ioc_mask = dwc3_msm_read_reg_field(context->base, DBM_DBG_CNFG,
- DBM_ENABLE_IOC_MASK);
- ioc_mask &= ~(ioc << dbm_ep); /* Clear ioc bit for dbm_ep */
/* Set ioc bit for dbm_ep if needed */
dwc3_msm_write_reg_field(context->base, DBM_DBG_CNFG,
- DBM_ENABLE_IOC_MASK, ioc_mask | (ioc << dbm_ep));
+ DBM_ENABLE_IOC_MASK & 1 << dbm_ep, ioc ? 1 : 0);
- dwc3_msm_write_reg(context->base, DBM_EP_CFG(dbm_ep),
- producer | disable_wb | internal_mem);
+ ep_cfg = (producer ? DBM_PRODUCER : 0) |
+ (disable_wb ? DBM_DISABLE_WB : 0) |
+ (internal_mem ? DBM_INT_RAM_ACC : 0);
+
dwc3_msm_write_reg_field(context->base, DBM_EP_CFG(dbm_ep),
- DBM_USB3_EP_NUM, usb_ep);
+ DBM_PRODUCER | DBM_DISABLE_WB | DBM_INT_RAM_ACC, ep_cfg >> 8);
+
+ dwc3_msm_write_reg_field(context->base, DBM_EP_CFG(dbm_ep), USB3_EPNUM,
+ usb_ep);
dwc3_msm_write_reg_field(context->base, DBM_EP_CFG(dbm_ep),
DBM_BAM_PIPE_NUM, bam_pipe);
- dwc3_msm_write_reg_field(context->base, DBM_EP_CFG(dbm_ep),
- DBM_EN_EP, 1);
+ dwc3_msm_write_reg_field(context->base, DBM_PIPE_CFG, 0x000000ff,
+ 0xe4);
+ dwc3_msm_write_reg_field(context->base, DBM_EP_CFG(dbm_ep), DBM_EN_EP,
+ 1);
return dbm_ep;
}
@@ -471,20 +472,16 @@
* @size - size of data fifo.
*
*/
-int msm_data_fifo_config(struct usb_ep *ep, u32 addr, u32 size)
+int msm_data_fifo_config(struct usb_ep *ep, u32 addr, u32 size, u8 dst_pipe_idx)
{
u8 dbm_ep;
struct dwc3_ep *dep = to_dwc3_ep(ep);
+ u8 bam_pipe = dst_pipe_idx;
dev_dbg(context->dev, "%s\n", __func__);
- dbm_ep = dwc3_msm_find_matching_dbm_ep(dep->number);
-
- if (dbm_ep >= context->dbm_num_eps) {
- dev_err(context->dev,
- "%s: Invalid DBM ep index\n", __func__);
- return -ENODEV;
- }
+ dbm_ep = bam_pipe;
+ context->ep_num_mapping[dbm_ep] = dep->number;
dwc3_msm_write_reg(context->base, DBM_DATA_FIFO(dbm_ep), addr);
dwc3_msm_write_reg_field(context->base, DBM_DATA_FIFO_SIZE(dbm_ep),
@@ -547,7 +544,8 @@
* taken by the caller of this function (dwc3_gadget_giveback()).
*/
request->complete = req_complete->orig_complete;
- request->complete(ep, request);
+ if (request->complete)
+ request->complete(ep, request);
kfree(req_complete);
}
@@ -585,18 +583,18 @@
memset(trb, 0, sizeof(*trb));
req->trb = trb;
- req->trb_dma = dwc3_trb_dma_offset(dep, trb);
- trb->bph = DBM_TRB_BIT | DBM_TRB_DATA_SRC |
- DBM_TRB_DMA | DBM_TRB_EP_NUM(dep->number);
+ trb->bph = DBM_TRB_BIT | DBM_TRB_DMA | DBM_TRB_EP_NUM(dep->number);
trb->size = DWC3_TRB_SIZE_LENGTH(req->request.length);
trb->ctrl = DWC3_TRBCTL_NORMAL | DWC3_TRB_CTRL_HWO | DWC3_TRB_CTRL_CHN;
+ req->trb_dma = dwc3_trb_dma_offset(dep, trb);
/* Second, prepare a Link TRB that points to the first TRB*/
trb_link = &dep->trb_pool[dep->free_slot & DWC3_TRB_MASK];
dep->free_slot++;
+ memset(trb_link, 0, sizeof *trb_link);
trb_link->bpl = lower_32_bits(req->trb_dma);
- trb_link->bph = DBM_TRB_BIT | DBM_TRB_DATA_SRC |
+ trb_link->bph = DBM_TRB_BIT |
DBM_TRB_DMA | DBM_TRB_EP_NUM(dep->number);
trb_link->size = 0;
trb_link->ctrl = DWC3_TRBCTL_LINK_TRB | DWC3_TRB_CTRL_HWO;
@@ -605,8 +603,9 @@
* Now start the transfer
*/
memset(¶ms, 0, sizeof(params));
- params.param0 = upper_32_bits(req->trb_dma);
- params.param1 = lower_32_bits(req->trb_dma);
+ params.param0 = 0; /* TDAddr High */
+ params.param1 = lower_32_bits(req->trb_dma); /* DAddr Low */
+
cmd = DWC3_DEPCMD_STARTTRANSFER;
ret = dwc3_send_gadget_ep_cmd(dep->dwc, dep->number, cmd, ¶ms);
if (ret < 0) {
@@ -657,6 +656,7 @@
bool disable_wb;
bool internal_mem;
bool ioc;
+ u8 speed;
if (!(request->udc_priv & MSM_SPS_MODE)) {
/* Not SPS mode, call original queue */
@@ -707,17 +707,9 @@
request->complete = dwc3_msm_req_complete_func;
/*
- * Configure dbm event buffers if this is the first
- * dbm endpoint we about to configure.
- */
- if (0 == dwc3_msm_configured_dbm_ep_num())
- dwc3_msm_event_buffer_config(dwc->ev_buffs[0]->dma,
- dwc->ev_buffs[0]->length);
-
- /*
* Configure the DBM endpoint
*/
- bam_pipe = (request->udc_priv & MSM_PIPE_ID_MASK);
+ bam_pipe = request->udc_priv & MSM_PIPE_ID_MASK;
producer = ((request->udc_priv & MSM_PRODUCER) ? true : false);
disable_wb = ((request->udc_priv & MSM_DISABLE_WB) ? true : false);
internal_mem = ((request->udc_priv & MSM_INTERNAL_MEM) ? true : false);
@@ -752,6 +744,9 @@
return ret;
}
+ speed = dwc3_readl(dwc->regs, DWC3_DSTS) & DWC3_DSTS_CONNECTSPD;
+ dwc3_msm_write_reg(context->base, DBM_GEN_CFG, speed >> 2);
+
return 0;
}
@@ -1551,7 +1546,12 @@
}
/* Reset the DBM */
- dwc3_msm_dbm_soft_reset();
+ dwc3_msm_dbm_soft_reset(1);
+ usleep_range(1000, 1200);
+ dwc3_msm_dbm_soft_reset(0);
+
+ dwc3_msm_event_buffer_config(dwc3_readl(msm->base, DWC3_GEVNTADRLO(0)),
+ dwc3_readl(msm->base, DWC3_GEVNTSIZ(0)));
msm->otg_xceiv = usb_get_transceiver();
if (msm->otg_xceiv) {
diff --git a/drivers/usb/gadget/android.c b/drivers/usb/gadget/android.c
index 49d7c0f..7b34e60 100644
--- a/drivers/usb/gadget/android.c
+++ b/drivers/usb/gadget/android.c
@@ -45,6 +45,7 @@
#include "composite.c"
#include "f_diag.c"
+#include "f_qdss.c"
#include "f_rmnet_smd.c"
#include "f_rmnet_sdio.c"
#include "f_rmnet_smd_sdio.c"
@@ -761,6 +762,37 @@
.attributes = diag_function_attributes,
};
+/* DEBUG */
+static int qdss_function_init(struct android_usb_function *f,
+ struct usb_composite_dev *cdev)
+{
+ return qdss_setup();
+}
+
+static void qdss_function_cleanup(struct android_usb_function *f)
+{
+ qdss_cleanup();
+}
+
+static int qdss_function_bind_config(struct android_usb_function *f,
+ struct usb_configuration *c)
+{
+ int err = -1;
+
+ err = qdss_bind_config(c, "qdss");
+ if (err)
+ pr_err("qdss: Cannot open channel qdss");
+
+ return err;
+}
+
+static struct android_usb_function qdss_function = {
+ .name = "qdss",
+ .init = qdss_function_init,
+ .cleanup = qdss_function_cleanup,
+ .bind_config = qdss_function_bind_config,
+};
+
/* SERIAL */
static char serial_transports[32]; /*enabled FSERIAL ports - "tty[,sdio]"*/
static ssize_t serial_transports_store(
@@ -1471,6 +1503,7 @@
&rmnet_smd_sdio_function,
&rmnet_function,
&diag_function,
+ &qdss_function,
&serial_function,
&adb_function,
&ccid_function,
diff --git a/drivers/usb/gadget/f_qdss.c b/drivers/usb/gadget/f_qdss.c
new file mode 100644
index 0000000..0c81904
--- /dev/null
+++ b/drivers/usb/gadget/f_qdss.c
@@ -0,0 +1,817 @@
+/*
+ * f_qdss.c -- QDSS function Driver
+ *
+ * Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/usb/usb_qdss.h>
+#include <linux/usb/msm_hsusb.h>
+
+#include "f_qdss.h"
+#include "u_qdss.c"
+
+static DEFINE_SPINLOCK(d_lock);
+static LIST_HEAD(usb_qdss_ch_list);
+
+static struct usb_interface_descriptor qdss_data_intf_desc = {
+ .bLength = sizeof qdss_data_intf_desc,
+ .bDescriptorType = USB_DT_INTERFACE,
+ .bAlternateSetting = 0,
+ .bNumEndpoints = 1,
+ .bInterfaceClass = 0xff,
+ .bInterfaceSubClass = 0xff,
+ .bInterfaceProtocol = 0xff,
+};
+
+static struct usb_endpoint_descriptor qdss_hs_data_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+ .bEndpointAddress = USB_DIR_IN,
+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
+ .wMaxPacketSize = __constant_cpu_to_le16(512),
+};
+
+static struct usb_endpoint_descriptor qdss_ss_data_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+ .bEndpointAddress = USB_DIR_IN,
+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
+ .wMaxPacketSize = __constant_cpu_to_le16(1024),
+};
+
+static struct usb_ss_ep_comp_descriptor qdss_data_ep_comp_desc = {
+ .bLength = sizeof qdss_data_ep_comp_desc,
+ .bDescriptorType = USB_DT_SS_ENDPOINT_COMP,
+ .bMaxBurst = 1,
+ .bmAttributes = 0,
+ .wBytesPerInterval = 0,
+};
+
+static struct usb_interface_descriptor qdss_ctrl_intf_desc = {
+ .bLength = sizeof qdss_ctrl_intf_desc,
+ .bDescriptorType = USB_DT_INTERFACE,
+ .bAlternateSetting = 0,
+ .bNumEndpoints = 2,
+ .bInterfaceClass = 0xff,
+ .bInterfaceSubClass = 0xff,
+ .bInterfaceProtocol = 0xff,
+};
+
+static struct usb_endpoint_descriptor qdss_hs_ctrl_in_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+ .bEndpointAddress = USB_DIR_IN,
+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
+ .wMaxPacketSize = __constant_cpu_to_le16(512),
+};
+
+static struct usb_endpoint_descriptor qdss_ss_ctrl_in_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+ .bEndpointAddress = USB_DIR_IN,
+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
+ .wMaxPacketSize = __constant_cpu_to_le16(1024),
+};
+
+static struct usb_endpoint_descriptor qdss_hs_ctrl_out_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+ .bEndpointAddress = USB_DIR_OUT,
+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
+ .wMaxPacketSize = __constant_cpu_to_le16(512),
+};
+
+static struct usb_endpoint_descriptor qdss_ss_ctrl_out_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+ .bEndpointAddress = USB_DIR_OUT,
+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
+ .wMaxPacketSize = __constant_cpu_to_le16(0x400),
+};
+
+static struct usb_ss_ep_comp_descriptor qdss_ctrl_in_ep_comp_desc = {
+ .bLength = sizeof qdss_ctrl_in_ep_comp_desc,
+ .bDescriptorType = USB_DT_SS_ENDPOINT_COMP,
+ .bMaxBurst = 0,
+ .bmAttributes = 0,
+ .wBytesPerInterval = 0,
+};
+
+static struct usb_ss_ep_comp_descriptor qdss_ctrl_out_ep_comp_desc = {
+ .bLength = sizeof qdss_ctrl_out_ep_comp_desc,
+ .bDescriptorType = USB_DT_SS_ENDPOINT_COMP,
+ .bMaxBurst = 0,
+ .bmAttributes = 0,
+ .wBytesPerInterval = 0,
+};
+
+static struct usb_descriptor_header *qdss_hs_desc[] = {
+ (struct usb_descriptor_header *) &qdss_data_intf_desc,
+ (struct usb_descriptor_header *) &qdss_hs_data_desc,
+ (struct usb_descriptor_header *) &qdss_ctrl_intf_desc,
+ (struct usb_descriptor_header *) &qdss_hs_ctrl_in_desc,
+ (struct usb_descriptor_header *) &qdss_hs_ctrl_out_desc,
+ NULL,
+};
+
+static struct usb_descriptor_header *qdss_ss_desc[] = {
+ (struct usb_descriptor_header *) &qdss_data_intf_desc,
+ (struct usb_descriptor_header *) &qdss_ss_data_desc,
+ (struct usb_descriptor_header *) &qdss_data_ep_comp_desc,
+ (struct usb_descriptor_header *) &qdss_ctrl_intf_desc,
+ (struct usb_descriptor_header *) &qdss_ss_ctrl_in_desc,
+ (struct usb_descriptor_header *) &qdss_ctrl_in_ep_comp_desc,
+ (struct usb_descriptor_header *) &qdss_ss_ctrl_out_desc,
+ (struct usb_descriptor_header *) &qdss_ctrl_out_ep_comp_desc,
+ NULL,
+};
+
+/* string descriptors: */
+#define QDSS_DATA_IDX 0
+#define QDSS_CTRL_IDX 1
+
+static struct usb_string qdss_string_defs[] = {
+ [QDSS_DATA_IDX].s = "QDSS DATA",
+ [QDSS_CTRL_IDX].s = "QDSS CTRL",
+ {}, /* end of list */
+};
+
+static struct usb_gadget_strings qdss_string_table = {
+ .language = 0x0409,
+ .strings = qdss_string_defs,
+};
+
+static struct usb_gadget_strings *qdss_strings[] = {
+ &qdss_string_table,
+ NULL,
+};
+
+static inline struct f_qdss *func_to_qdss(struct usb_function *f)
+{
+ return container_of(f, struct f_qdss, function);
+}
+
+/*----------------------------------------------------------------------*/
+
+static void qdss_ctrl_write_complete(struct usb_ep *ep,
+ struct usb_request *req)
+{
+ struct f_qdss *qdss = ep->driver_data;
+ struct qdss_request *d_req = req->context;
+ unsigned long flags;
+
+ pr_debug("qdss_ctrl_write_complete\n");
+
+ if (!req->status) {
+ /* send zlp */
+ if ((req->length >= ep->maxpacket) &&
+ ((req->length % ep->maxpacket) == 0)) {
+ req->length = 0;
+ d_req->actual = req->actual;
+ d_req->status = req->status;
+ usb_ep_queue(qdss->ctrl_in, req, GFP_ATOMIC);
+ return;
+ }
+ }
+
+ spin_lock_irqsave(&qdss->lock, flags);
+ list_add_tail(&req->list, &qdss->ctrl_write_pool);
+ if (req->length != 0) {
+ d_req->actual = req->actual;
+ d_req->status = req->status;
+ }
+ spin_unlock_irqrestore(&qdss->lock, flags);
+
+ if (qdss->ch.notify)
+ qdss->ch.notify(qdss->ch.priv, USB_QDSS_CTRL_WRITE_DONE, d_req,
+ NULL);
+}
+
+static void qdss_ctrl_read_complete(struct usb_ep *ep,
+ struct usb_request *req)
+{
+ struct f_qdss *qdss = ep->driver_data;
+ struct qdss_request *d_req = req->context;
+ unsigned long flags;
+
+ pr_debug("qdss_ctrl_read_complete\n");
+
+ d_req->actual = req->actual;
+ d_req->status = req->status;
+
+ spin_lock_irqsave(&qdss->lock, flags);
+ list_add_tail(&req->list, &qdss->ctrl_read_pool);
+ spin_unlock_irqrestore(&qdss->lock, flags);
+
+ if (qdss->ch.notify)
+ qdss->ch.notify(qdss->ch.priv, USB_QDSS_CTRL_READ_DONE, d_req,
+ NULL);
+}
+
+void usb_qdss_free_req(struct usb_qdss_ch *ch)
+{
+ struct f_qdss *qdss;
+ struct usb_request *req;
+ struct list_head *act, *tmp;
+
+ pr_debug("usb_qdss_free_req\n");
+
+ qdss = ch->priv_usb;
+ if (!qdss) {
+ pr_err("usb_qdss_free_req: qdss ctx is NULL\n");
+ return;
+ }
+
+ list_for_each_safe(act, tmp, &qdss->ctrl_write_pool) {
+ req = list_entry(act, struct usb_request, list);
+ list_del(&req->list);
+ usb_ep_free_request(qdss->ctrl_in, req);
+ }
+
+ list_for_each_safe(act, tmp, &qdss->ctrl_read_pool) {
+ req = list_entry(act, struct usb_request, list);
+ list_del(&req->list);
+ usb_ep_free_request(qdss->ctrl_out, req);
+ }
+}
+EXPORT_SYMBOL(usb_qdss_free_req);
+
+int usb_qdss_alloc_req(struct usb_qdss_ch *ch, int no_write_buf,
+ int no_read_buf)
+{
+ struct f_qdss *qdss = ch->priv_usb;
+ struct usb_request *req;
+ int i;
+
+ pr_debug("usb_qdss_alloc_req\n");
+
+ if (no_write_buf <= 0 || no_read_buf <= 0 || !qdss) {
+ pr_err("usb_qdss_alloc_req: missing params\n");
+ return -ENODEV;
+ }
+
+ for (i = 0; i < no_write_buf; i++) {
+ req = usb_ep_alloc_request(qdss->ctrl_in, GFP_ATOMIC);
+ if (!req) {
+ pr_err("usb_qdss_alloc_req: ctrl_in allocation err\n");
+ goto fail;
+ }
+ req->complete = qdss_ctrl_write_complete;
+ list_add_tail(&req->list, &qdss->ctrl_write_pool);
+ }
+
+ for (i = 0; i < no_read_buf; i++) {
+ req = usb_ep_alloc_request(qdss->ctrl_out, GFP_ATOMIC);
+ if (!req) {
+ pr_err("usb_qdss_alloc_req:ctrl_out allocation err\n");
+ goto fail;
+ }
+ req->complete = qdss_ctrl_read_complete;
+ list_add_tail(&req->list, &qdss->ctrl_read_pool);
+ }
+
+ return 0;
+
+fail:
+ usb_qdss_free_req(ch);
+ return -ENOMEM;
+}
+EXPORT_SYMBOL(usb_qdss_alloc_req);
+
+static void clear_eps(struct usb_function *f)
+{
+ struct f_qdss *qdss = func_to_qdss(f);
+
+ pr_debug("clear_eps\n");
+
+ if (qdss->ctrl_in)
+ qdss->ctrl_in->driver_data = NULL;
+ if (qdss->ctrl_out)
+ qdss->ctrl_out->driver_data = NULL;
+ if (qdss->data)
+ qdss->data->driver_data = NULL;
+}
+
+static void clear_desc(struct usb_gadget *gadget, struct usb_function *f)
+{
+ pr_debug("clear_desc\n");
+
+ if (gadget_is_superspeed(gadget) && f->ss_descriptors)
+ usb_free_descriptors(f->ss_descriptors);
+
+ if (gadget_is_dualspeed(gadget) && f->hs_descriptors)
+ usb_free_descriptors(f->hs_descriptors);
+}
+
+static int qdss_bind(struct usb_configuration *c, struct usb_function *f)
+{
+ struct usb_gadget *gadget = c->cdev->gadget;
+ struct f_qdss *qdss = func_to_qdss(f);
+ struct usb_ep *ep;
+ int iface;
+
+ pr_debug("qdss_bind\n");
+
+ if (!gadget_is_dualspeed(gadget) && !gadget_is_superspeed(gadget)) {
+ pr_err("qdss_bind: full-speed is not supported\n");
+ return -ENOTSUPP;
+ }
+
+ /* Allocate data I/F */
+ iface = usb_interface_id(c, f);
+ if (iface < 0) {
+ pr_err("interface allocation error\n");
+ return iface;
+ }
+ qdss_data_intf_desc.bInterfaceNumber = iface;
+ qdss->data_iface_id = iface;
+
+ /* Allocate ctrl I/F */
+ iface = usb_interface_id(c, f);
+ if (iface < 0) {
+ pr_err("interface allocation error\n");
+ return iface;
+ }
+ qdss_ctrl_intf_desc.bInterfaceNumber = iface;
+ qdss->ctrl_iface_id = iface;
+
+ ep = usb_ep_autoconfig_ss(gadget, &qdss_ss_data_desc,
+ &qdss_data_ep_comp_desc);
+ if (!ep) {
+ pr_err("ep_autoconfig error\n");
+ goto fail;
+ }
+ qdss->data = ep;
+ ep->driver_data = qdss;
+
+ ep = usb_ep_autoconfig_ss(gadget, &qdss_ss_ctrl_in_desc,
+ &qdss_ctrl_in_ep_comp_desc);
+ if (!ep) {
+ pr_err("ep_autoconfig error\n");
+ goto fail;
+ }
+ qdss->ctrl_in = ep;
+ ep->driver_data = qdss;
+
+ ep = usb_ep_autoconfig_ss(gadget, &qdss_ss_ctrl_out_desc,
+ &qdss_ctrl_out_ep_comp_desc);
+ if (!ep) {
+ pr_err("ep_autoconfig error\n");
+ goto fail;
+ }
+ qdss->ctrl_out = ep;
+ ep->driver_data = qdss;
+
+ /*update descriptors*/
+ qdss_hs_data_desc.bEndpointAddress =
+ qdss_ss_data_desc.bEndpointAddress;
+ qdss_hs_ctrl_in_desc.bEndpointAddress =
+ qdss_ss_ctrl_in_desc.bEndpointAddress;
+ qdss_hs_ctrl_out_desc.bEndpointAddress =
+ qdss_ss_ctrl_out_desc.bEndpointAddress;
+
+ f->hs_descriptors = usb_copy_descriptors(qdss_hs_desc);
+ if (!f->hs_descriptors) {
+ pr_err("usb_copy_descriptors error\n");
+ goto fail;
+ }
+
+ /* update ss descriptors */
+ if (gadget_is_superspeed(gadget)) {
+ f->ss_descriptors = usb_copy_descriptors(qdss_ss_desc);
+ if (!f->ss_descriptors) {
+ pr_err("usb_copy_descriptors error\n");
+ goto fail;
+ }
+ }
+
+ return 0;
+fail:
+ clear_eps(f);
+ clear_desc(gadget, f);
+ return -ENOTSUPP;
+}
+
+
+static void qdss_unbind(struct usb_configuration *c, struct usb_function *f)
+{
+ pr_debug("qdss_unbind\n");
+
+ clear_desc(c->cdev->gadget, f);
+}
+
+static void qdss_eps_disable(struct usb_function *f)
+{
+ struct f_qdss *qdss = func_to_qdss(f);
+
+ pr_debug("qdss_eps_disable\n");
+
+ if (qdss->ctrl_in_enabled) {
+ usb_ep_disable(qdss->ctrl_in);
+ qdss->ctrl_in_enabled = 0;
+ qdss->ctrl_in->driver_data = NULL;
+ }
+
+ if (qdss->ctrl_out_enabled) {
+ usb_ep_disable(qdss->ctrl_out);
+ qdss->ctrl_out_enabled = 0;
+ qdss->ctrl_out->driver_data = NULL;
+ }
+
+ if (qdss->data_enabled) {
+ usb_ep_disable(qdss->data);
+ qdss->data_enabled = 0;
+ qdss->data->driver_data = NULL;
+ }
+}
+
+static void qdss_disable(struct usb_function *f)
+{
+ struct f_qdss *qdss = func_to_qdss(f);
+ unsigned long flags;
+ int status;
+
+ pr_debug("qdss_disable\n");
+
+ spin_lock_irqsave(&qdss->lock, flags);
+ qdss->usb_connected = 0;
+ spin_unlock_irqrestore(&qdss->lock, flags);
+
+ /*cancell all active xfers*/
+ qdss_eps_disable(f);
+
+ /* notify qdss to cancell all active transfers*/
+ if (qdss->ch.notify) {
+ qdss->ch.notify(qdss->ch.priv, USB_QDSS_DISCONNECT, NULL,
+ NULL);
+ /* If the app was never started, we can skip USB BAM reset */
+ status = set_qdss_data_connection(qdss->data,
+ qdss->data->address, 0);
+ if (status)
+ pr_err("qdss_disable error");
+ }
+}
+
+static void usb_qdss_work_func(struct work_struct *work)
+{
+ struct f_qdss *qdss = container_of(work, struct f_qdss, qdss_work);
+ int status;
+
+ pr_debug("usb_qdss_work_func\n");
+
+ status = init_data(qdss->data);
+ if (status) {
+ pr_err("init_data error");
+ return;
+ }
+
+ status = set_qdss_data_connection(qdss->data,
+ qdss->data->address, 1);
+ if (status) {
+ pr_err("set_qdss_data_connection error");
+ return;
+ }
+ if (qdss->ch.notify)
+ qdss->ch.notify(qdss->ch.priv, USB_QDSS_CONNECT, NULL,
+ &qdss->ch);
+
+ status = send_sps_req(qdss->data);
+ if (status) {
+ pr_err("send_sps_req error\n");
+ return;
+ }
+}
+
+static int qdss_set_alt(struct usb_function *f, unsigned intf, unsigned alt)
+{
+ struct f_qdss *qdss = func_to_qdss(f);
+ struct usb_gadget *gadget = f->config->cdev->gadget;
+ struct usb_qdss_ch *ch = &qdss->ch;
+ int ret = 0;
+
+ pr_debug("qdss_set_alt\n");
+
+ if (alt != 0)
+ goto fail;
+
+ if (gadget->speed != USB_SPEED_SUPER &&
+ gadget->speed != USB_SPEED_HIGH) {
+ pr_err("qdss_st_alt: qdss supportes HS or SS only\n");
+ goto fail;
+ }
+
+ if (intf == qdss->data_iface_id) {
+ if (config_ep_by_speed(gadget, f, qdss->data))
+ return -EINVAL;
+
+ ret = usb_ep_enable(qdss->data);
+ if (ret)
+ goto fail;
+
+ qdss->data->driver_data = qdss;
+ qdss->data_enabled = 1;
+
+ } else if (intf == qdss->ctrl_iface_id) {
+ if (config_ep_by_speed(gadget, f, qdss->ctrl_in))
+ return -EINVAL;
+
+ ret = usb_ep_enable(qdss->ctrl_in);
+ if (ret)
+ goto fail;
+
+ qdss->ctrl_in->driver_data = qdss;
+ qdss->ctrl_in_enabled = 1;
+
+ if (config_ep_by_speed(gadget, f, qdss->ctrl_out))
+ return -EINVAL;
+
+ ret = usb_ep_enable(qdss->ctrl_out);
+ if (ret)
+ goto fail;
+
+ qdss->ctrl_out->driver_data = qdss;
+ qdss->ctrl_out_enabled = 1;
+ }
+
+ if (qdss->ctrl_out_enabled && qdss->ctrl_in_enabled &&
+ qdss->data_enabled)
+ qdss->usb_connected = 1;
+
+ if (qdss->usb_connected && ch->app_conn)
+ schedule_work(&qdss->qdss_work);
+
+ return 0;
+fail:
+ pr_err("qdss_set_alt failed\n");
+ qdss_eps_disable(f);
+ return ret;
+}
+
+static int qdss_bind_config(struct usb_configuration *c, const char *name)
+{
+ struct f_qdss *qdss;
+ int status, found = 0;
+ struct usb_qdss_ch *ch;
+ unsigned long flags;
+
+ pr_debug("qdss_bind_config\n");
+
+ if (qdss_string_defs[QDSS_DATA_IDX].id == 0) {
+ status = usb_string_id(c->cdev);
+ if (status < 0)
+ return status;
+ qdss_string_defs[QDSS_DATA_IDX].id = status;
+ qdss_data_intf_desc.iInterface = status;
+
+ status = usb_string_id(c->cdev);
+ if (status < 0)
+ return status;
+ qdss_string_defs[QDSS_CTRL_IDX].id = status;
+ qdss_ctrl_intf_desc.iInterface = status;
+ }
+
+ spin_lock_irqsave(&d_lock, flags);
+ list_for_each_entry(ch, &usb_qdss_ch_list, list) {
+ if (!strncmp(name, ch->name, sizeof(ch->name))) {
+ found = 1;
+ break;
+ }
+ }
+
+ if (!found) {
+ pr_debug("qdss_bind_config allocating channel\n");
+ qdss = kzalloc(sizeof *qdss, GFP_ATOMIC);
+ if (!qdss) {
+ pr_err("qdss_bind_config: allocating channel failed\n");
+ spin_unlock_irqrestore(&d_lock, flags);
+ return -ENOMEM;
+ }
+
+ ch = &qdss->ch;
+ ch->name = name;
+ list_add_tail(&ch->list, &usb_qdss_ch_list);
+ } else {
+ qdss = container_of(ch, struct f_qdss, ch);
+ ch->priv_usb = qdss;
+ }
+ spin_unlock_irqrestore(&d_lock, flags);
+ qdss->cdev = c->cdev;
+ qdss->function.name = name;
+ qdss->function.descriptors = qdss_hs_desc;
+ qdss->function.hs_descriptors = qdss_hs_desc;
+ qdss->function.strings = qdss_strings;
+ qdss->function.bind = qdss_bind;
+ qdss->function.unbind = qdss_unbind;
+ qdss->function.set_alt = qdss_set_alt;
+ qdss->function.disable = qdss_disable;
+ INIT_LIST_HEAD(&qdss->ctrl_read_pool);
+ INIT_LIST_HEAD(&qdss->ctrl_write_pool);
+ INIT_WORK(&qdss->qdss_work, usb_qdss_work_func);
+
+ status = usb_add_function(c, &qdss->function);
+ if (status) {
+ pr_err("qdss usb_add_function failed\n");
+ ch->priv_usb = NULL;
+ kfree(qdss);
+ }
+
+ return status;
+}
+
+int usb_qdss_ctrl_read(struct usb_qdss_ch *ch, struct qdss_request *d_req)
+{
+ struct f_qdss *qdss = ch->priv_usb;
+ unsigned long flags;
+ struct usb_request *req = NULL;
+
+ pr_debug("usb_qdss_ctrl_read\n");
+
+ if (!qdss)
+ return -ENODEV;
+
+ spin_lock_irqsave(&qdss->lock, flags);
+
+ if (qdss->usb_connected == 0) {
+ spin_unlock_irqrestore(&qdss->lock, flags);
+ return -EIO;
+ }
+
+ if (list_empty(&qdss->ctrl_read_pool)) {
+ spin_unlock_irqrestore(&qdss->lock, flags);
+ pr_err("error: usb_qdss_ctrl_read list is empty\n");
+ return -EAGAIN;
+ }
+
+ req = list_first_entry(&qdss->ctrl_read_pool, struct usb_request, list);
+ list_del(&req->list);
+ spin_unlock_irqrestore(&qdss->lock, flags);
+
+ req->buf = d_req->buf;
+ req->length = d_req->length;
+ req->context = d_req;
+
+ if (usb_ep_queue(qdss->ctrl_out, req, GFP_ATOMIC)) {
+ /* If error add the link to linked list again*/
+ spin_lock_irqsave(&qdss->lock, flags);
+ list_add_tail(&req->list, &qdss->ctrl_read_pool);
+ spin_unlock_irqrestore(&qdss->lock, flags);
+ pr_err("qdss usb_ep_queue failed\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(usb_qdss_ctrl_read);
+
+int usb_qdss_ctrl_write(struct usb_qdss_ch *ch, struct qdss_request *d_req)
+{
+ struct f_qdss *qdss = ch->priv_usb;
+ unsigned long flags;
+ struct usb_request *req = NULL;
+
+ pr_debug("usb_qdss_ctrl_write\n");
+
+ if (!qdss)
+ return -ENODEV;
+
+ spin_lock_irqsave(&qdss->lock, flags);
+
+ if (qdss->usb_connected == 0) {
+ spin_unlock_irqrestore(&qdss->lock, flags);
+ return -EIO;
+ }
+
+ if (list_empty(&qdss->ctrl_write_pool)) {
+ pr_err("error: usb_qdss_ctrl_write list is empty\n");
+ spin_unlock_irqrestore(&qdss->lock, flags);
+ return -EAGAIN;
+ }
+
+ req = list_first_entry(&qdss->ctrl_write_pool, struct usb_request,
+ list);
+ list_del(&req->list);
+ spin_unlock_irqrestore(&qdss->lock, flags);
+
+ req->buf = d_req->buf;
+ req->length = d_req->length;
+ req->context = d_req;
+ if (usb_ep_queue(qdss->ctrl_in, req, GFP_ATOMIC)) {
+ spin_lock_irqsave(&qdss->lock, flags);
+ list_add_tail(&req->list, &qdss->ctrl_write_pool);
+ spin_unlock_irqrestore(&qdss->lock, flags);
+ pr_err("qdss usb_ep_queue failed\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(usb_qdss_ctrl_write);
+
+struct usb_qdss_ch *usb_qdss_open(const char *name, void *priv,
+ void (*notify)(void *, unsigned, struct qdss_request *,
+ struct usb_qdss_ch *))
+{
+ struct usb_qdss_ch *ch;
+ struct f_qdss *qdss;
+ unsigned long flags;
+ int found = 0;
+
+ pr_debug("usb_qdss_open\n");
+
+ if (!notify) {
+ pr_err("usb_qdss_open: notification func is missing\n");
+ return NULL;
+ }
+
+ spin_lock_irqsave(&d_lock, flags);
+ /* Check if we already have a channel with this name */
+ list_for_each_entry(ch, &usb_qdss_ch_list, list) {
+ if (!strncmp(name, ch->name, sizeof(ch->name))) {
+ found = 1;
+ break;
+ }
+ }
+
+ if (!found) {
+ pr_debug("usb_qdss_open: allocation qdss ctx\n");
+ qdss = kzalloc(sizeof(*qdss), GFP_ATOMIC);
+ if (!qdss) {
+ spin_unlock_irqrestore(&d_lock, flags);
+ return ERR_PTR(-ENOMEM);
+ }
+ ch = &qdss->ch;
+ list_add_tail(&ch->list, &usb_qdss_ch_list);
+ } else {
+ pr_debug("usb_qdss_open: qdss ctx found\n");
+ qdss = container_of(ch, struct f_qdss, ch);
+ ch->priv_usb = qdss;
+ }
+
+ ch->name = name;
+ ch->priv = priv;
+ ch->notify = notify;
+ ch->app_conn = 1;
+ spin_unlock_irqrestore(&d_lock, flags);
+
+ /* the case USB cabel was connected befor qdss called qdss_open*/
+ if (qdss->usb_connected == 1)
+ schedule_work(&qdss->qdss_work);
+
+ return ch;
+}
+EXPORT_SYMBOL(usb_qdss_open);
+
+void usb_qdss_close(struct usb_qdss_ch *ch)
+{
+ struct f_qdss *qdss = ch->priv_usb;
+ unsigned long flags;
+
+ pr_debug("usb_qdss_close\n");
+
+ spin_lock_irqsave(&d_lock, flags);
+ /*free not used reqests*/
+ usb_qdss_free_req(ch);
+ usb_ep_dequeue(qdss->data, qdss->endless_req);
+ qdss->endless_req = NULL;
+ spin_unlock_irqrestore(&d_lock, flags);
+}
+EXPORT_SYMBOL(usb_qdss_close);
+
+static void qdss_cleanup(void)
+{
+ struct f_qdss *qdss;
+ struct list_head *act, *tmp;
+ struct usb_qdss_ch *_ch;
+ unsigned long flags;
+
+ pr_debug("qdss_cleanup\n");
+
+ list_for_each_safe(act, tmp, &usb_qdss_ch_list) {
+ _ch = list_entry(act, struct usb_qdss_ch, list);
+ qdss = container_of(_ch, struct f_qdss, ch);
+ spin_lock_irqsave(&d_lock, flags);
+
+ if (!_ch->priv) {
+ list_del(&_ch->list);
+ kfree(qdss);
+ }
+ spin_unlock_irqrestore(&d_lock, flags);
+ }
+}
+
+static int qdss_setup(void)
+{
+ return 0;
+}
+
diff --git a/drivers/usb/gadget/f_qdss.h b/drivers/usb/gadget/f_qdss.h
new file mode 100644
index 0000000..b61244b
--- /dev/null
+++ b/drivers/usb/gadget/f_qdss.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details
+ */
+
+#ifndef _F_QDSS_H
+#define _F_QDSS_H
+
+#include <linux/kernel.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+
+/* struct f_qdss - USB qdss function driver private structure */
+struct f_qdss {
+ struct usb_function function;
+ struct usb_composite_dev *cdev;
+ u8 ctrl_iface_id;
+ u8 data_iface_id;
+ int usb_connected;
+ struct usb_request *endless_req;
+ struct usb_ep *ctrl_out;
+ struct usb_ep *ctrl_in;
+ struct usb_ep *data;
+ struct usb_qdss_ch ch;
+ struct list_head ctrl_read_pool;
+ struct list_head ctrl_write_pool;
+ struct work_struct qdss_work;
+ spinlock_t lock;
+ unsigned int data_enabled:1;
+ unsigned int ctrl_in_enabled:1;
+ unsigned int ctrl_out_enabled:1;
+};
+
+#endif
+
diff --git a/drivers/usb/gadget/u_qdss.c b/drivers/usb/gadget/u_qdss.c
new file mode 100644
index 0000000..d227c62
--- /dev/null
+++ b/drivers/usb/gadget/u_qdss.c
@@ -0,0 +1,136 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/usb/msm_hsusb.h>
+#include <mach/usb_bam.h>
+
+#define BAM_CONNC_IDX 0 /* USB bam connection index */
+
+struct usb_qdss_bam_connect_info {
+ u32 usb_bam_pipe_idx;
+ u32 peer_pipe_idx;
+ u32 usb_bam_handle;
+ struct sps_mem_buffer *data_fifo;
+};
+
+static struct usb_qdss_bam_connect_info bam_info;
+
+int send_sps_req(struct usb_ep *data_ep)
+{
+ struct usb_request *req = NULL;
+ struct f_qdss *qdss = data_ep->driver_data;
+ struct usb_gadget *gadget = qdss->cdev->gadget;
+ u32 sps_params = 0;
+
+ pr_debug("send_sps_req\n");
+
+ req = usb_ep_alloc_request(data_ep, GFP_ATOMIC);
+ if (!req) {
+ pr_err("usb_ep_alloc_request failed\n");
+ return -ENOMEM;
+ }
+
+ if (gadget_is_dwc3(gadget)) {
+ req->length = 32*1024;
+ sps_params = MSM_SPS_MODE | MSM_DISABLE_WB | MSM_INTERNAL_MEM |
+ bam_info.usb_bam_pipe_idx;
+ } else {
+ /* non DWC3 BAM requires req->length to be 0 */
+ req->length = 0;
+ sps_params = (MSM_SPS_MODE | bam_info.usb_bam_pipe_idx |
+ MSM_VENDOR_ID) & ~MSM_IS_FINITE_TRANSFER;
+ }
+ req->udc_priv = sps_params;
+ qdss->endless_req = req;
+ if (usb_ep_queue(data_ep, req, GFP_ATOMIC)) {
+ pr_err("send_sps_req: usb_ep_queue error\n");
+ return -EIO;
+ }
+ return 0;
+}
+
+int set_qdss_data_connection(struct usb_ep *data_ep, u8 data_addr, int enable)
+{
+ int res = 0;
+
+ pr_debug("set_qdss_data_connection\n");
+
+ if (enable) {
+ res = usb_bam_connect(BAM_CONNC_IDX, NULL,
+ &(bam_info.usb_bam_pipe_idx));
+ if (res) {
+ pr_err("usb_bam_connection error\n");
+ return res;
+ }
+
+ bam_info.data_fifo =
+ kzalloc(sizeof(struct sps_mem_buffer *), GFP_KERNEL);
+ if (!bam_info.data_fifo) {
+ pr_err("qdss_data_connection: memory alloc failed\n");
+ return -ENOMEM;
+ }
+ get_bam2bam_connection_info(BAM_CONNC_IDX,
+ PEER_PERIPHERAL_TO_USB, &bam_info.usb_bam_handle,
+ &bam_info.usb_bam_pipe_idx, &bam_info.peer_pipe_idx,
+ NULL, bam_info.data_fifo);
+
+ msm_data_fifo_config(data_ep, bam_info.data_fifo->phys_base,
+ bam_info.data_fifo->size, bam_info.usb_bam_pipe_idx);
+ } else {
+ kfree(bam_info.data_fifo);
+ res = usb_bam_disconnect_pipe(BAM_CONNC_IDX);
+ if (res) {
+ pr_err("usb_bam_disconnection error\n");
+ return res;
+ }
+
+ }
+ return res;
+}
+
+int init_data(struct usb_ep *ep)
+{
+ struct f_qdss *qdss = ep->driver_data;
+ struct usb_gadget *gadget = qdss->cdev->gadget;
+ int res = 0;
+
+ pr_debug("init_data\n");
+
+ if (gadget_is_dwc3(gadget)) {
+ res = msm_ep_config(ep);
+ if (res)
+ pr_err("msm_ep_config failed\n");
+ } else {
+ pr_debug("QDSS is used with non DWC3 core\n");
+ }
+
+ return res;
+}
+
+int uninit_data(struct usb_ep *ep)
+{
+ struct f_qdss *qdss = ep->driver_data;
+ struct usb_gadget *gadget = qdss->cdev->gadget;
+ int res = 0;
+
+ pr_err("uninit_data\n");
+
+ if (gadget_is_dwc3(gadget)) {
+ res = msm_ep_unconfig(ep);
+ if (res)
+ pr_err("msm_ep_config failed\n");
+ }
+
+ return res;
+}
diff --git a/drivers/usb/host/ehci-msm-hsic.c b/drivers/usb/host/ehci-msm-hsic.c
index e49e2a0..4dd6d68 100644
--- a/drivers/usb/host/ehci-msm-hsic.c
+++ b/drivers/usb/host/ehci-msm-hsic.c
@@ -27,7 +27,6 @@
#include <linux/err.h>
#include <linux/debugfs.h>
#include <linux/seq_file.h>
-#include <linux/wakelock.h>
#include <linux/pm_runtime.h>
#include <linux/regulator/consumer.h>
@@ -57,14 +56,13 @@
struct clk *phy_clk;
struct clk *cal_clk;
struct regulator *hsic_vddcx;
- bool async_int;
atomic_t in_lpm;
- struct wake_lock wlock;
int peripheral_status_irq;
int wakeup_irq;
int wakeup_gpio;
bool wakeup_irq_enabled;
- atomic_t pm_usage_cnt;
+ bool irq_enabled;
+ bool async_int;
uint32_t bus_perf_client;
uint32_t wakeup_int_cnt;
enum usb_vdd_type vdd_type;
@@ -599,13 +597,15 @@
disable_irq(hcd->irq);
- /* make sure we don't race against a remote wakeup */
- if (test_bit(HCD_FLAG_WAKEUP_PENDING, &hcd->flags) ||
+ /* make sure we don't race against the root hub being resumed */
+ if (HCD_RH_RUNNING(hcd) || HCD_WAKEUP_PENDING(hcd) ||
readl_relaxed(USB_PORTSC) & PORT_RESUME) {
- dev_dbg(mehci->dev, "wakeup pending, aborting suspend\n");
+ dev_warn(mehci->dev, "%s: Root hub is not suspended\n",
+ __func__);
enable_irq(hcd->irq);
return -EBUSY;
}
+ mehci->irq_enabled = false;
/*
* PHY may take some time or even fail to enter into low power
@@ -666,14 +666,13 @@
}
atomic_set(&mehci->in_lpm, 1);
+ mehci->irq_enabled = true;
enable_irq(hcd->irq);
mehci->wakeup_irq_enabled = 1;
enable_irq_wake(mehci->wakeup_irq);
enable_irq(mehci->wakeup_irq);
- wake_unlock(&mehci->wlock);
-
dev_info(mehci->dev, "HSIC-USB in low power mode\n");
return 0;
@@ -697,8 +696,6 @@
mehci->wakeup_irq_enabled = 0;
}
- wake_lock(&mehci->wlock);
-
if (mehci->bus_perf_client && debug_bus_voting_enabled) {
ret = msm_bus_scale_client_update_request(
mehci->bus_perf_client, 1);
@@ -757,14 +754,15 @@
if (mehci->async_int) {
mehci->async_int = false;
pm_runtime_put_noidle(mehci->dev);
- enable_irq(hcd->irq);
}
- if (atomic_read(&mehci->pm_usage_cnt)) {
- atomic_set(&mehci->pm_usage_cnt, 0);
- pm_runtime_put_noidle(mehci->dev);
+ if (!mehci->irq_enabled) {
+ enable_irq(hcd->irq);
+ mehci->irq_enabled = true;
}
+ pm_relax(mehci->dev);
+
dev_info(mehci->dev, "HSIC-USB exited from low power mode\n");
return 0;
@@ -777,9 +775,11 @@
if (atomic_read(&mehci->in_lpm)) {
disable_irq_nosync(hcd->irq);
+ mehci->irq_enabled = false;
dev_dbg(mehci->dev, "phy async intr\n");
mehci->async_int = true;
pm_runtime_get(mehci->dev);
+ pm_stay_awake(mehci->dev);
return IRQ_HANDLED;
}
@@ -996,7 +996,9 @@
dev_dbg(mehci->dev, "%s: hsic remote wakeup interrupt cnt: %u\n",
__func__, mehci->wakeup_int_cnt);
- wake_lock(&mehci->wlock);
+ mehci->async_int = true;
+ pm_runtime_get(mehci->dev);
+ pm_stay_awake(mehci->dev);
if (mehci->wakeup_irq_enabled) {
mehci->wakeup_irq_enabled = 0;
@@ -1004,11 +1006,6 @@
disable_irq_nosync(irq);
}
- if (!atomic_read(&mehci->pm_usage_cnt)) {
- atomic_set(&mehci->pm_usage_cnt, 1);
- pm_runtime_get(mehci->dev);
- }
-
return IRQ_HANDLED;
}
@@ -1303,9 +1300,8 @@
goto unconfig_gpio;
}
+ mehci->irq_enabled = true;
device_init_wakeup(&pdev->dev, 1);
- wake_lock_init(&mehci->wlock, WAKE_LOCK_SUSPEND, dev_name(&pdev->dev));
- wake_lock(&mehci->wlock);
if (mehci->peripheral_status_irq) {
ret = request_threaded_irq(mehci->peripheral_status_irq,
@@ -1412,7 +1408,6 @@
msm_hsic_init_vddcx(mehci, 0);
msm_hsic_init_clocks(mehci, 0);
- wake_lock_destroy(&mehci->wlock);
iounmap(hcd->regs);
usb_put_hcd(hcd);
diff --git a/drivers/usb/otg/msm_otg.c b/drivers/usb/otg/msm_otg.c
index 3884c81..0e1267b 100644
--- a/drivers/usb/otg/msm_otg.c
+++ b/drivers/usb/otg/msm_otg.c
@@ -43,6 +43,7 @@
#include <linux/mhl_8334.h>
#include <mach/clk.h>
+#include <mach/mpm.h>
#include <mach/msm_xo.h>
#include <mach/msm_bus.h>
#include <mach/rpm-regulator.h>
@@ -876,6 +877,9 @@
enable_irq_wake(motg->irq);
if (motg->pdata->pmic_id_irq)
enable_irq_wake(motg->pdata->pmic_id_irq);
+ if (pdata->otg_control == OTG_PHY_CONTROL &&
+ pdata->mpm_otgsessvld_int)
+ msm_mpm_set_pin_wake(pdata->mpm_otgsessvld_int, 1);
}
if (bus)
clear_bit(HCD_FLAG_HW_ACCESSIBLE, &(bus_to_hcd(bus))->flags);
@@ -893,6 +897,7 @@
{
struct usb_phy *phy = &motg->phy;
struct usb_bus *bus = phy->otg->host;
+ struct msm_otg_platform_data *pdata = motg->pdata;
int cnt = 0;
unsigned temp;
u32 phy_ctrl_val = 0;
@@ -971,6 +976,9 @@
disable_irq_wake(motg->irq);
if (motg->pdata->pmic_id_irq)
disable_irq_wake(motg->pdata->pmic_id_irq);
+ if (pdata->otg_control == OTG_PHY_CONTROL &&
+ pdata->mpm_otgsessvld_int)
+ msm_mpm_set_pin_wake(pdata->mpm_otgsessvld_int, 0);
}
if (bus)
set_bit(HCD_FLAG_HW_ACCESSIBLE, &(bus_to_hcd(bus))->flags);
@@ -3583,6 +3591,9 @@
goto destroy_wlock;
}
+ if (pdata->otg_control == OTG_PHY_CONTROL && pdata->mpm_otgsessvld_int)
+ msm_mpm_enable_pin(pdata->mpm_otgsessvld_int, 1);
+
phy->init = msm_otg_reset;
phy->set_power = msm_otg_set_power;
phy->set_suspend = msm_otg_set_suspend;
@@ -3734,6 +3745,10 @@
usb_set_transceiver(NULL);
free_irq(motg->irq, motg);
+ if (motg->pdata->otg_control == OTG_PHY_CONTROL &&
+ motg->pdata->mpm_otgsessvld_int)
+ msm_mpm_enable_pin(motg->pdata->mpm_otgsessvld_int, 0);
+
/*
* Put PHY in low power mode.
*/
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_interrupt_handler.c b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_interrupt_handler.c
index 72fe2e3..8ec444f 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_interrupt_handler.c
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_interrupt_handler.c
@@ -366,10 +366,6 @@
need_reconfig = ddl_check_reconfig(ddl);
DDL_MSG_HIGH("%s : need_reconfig = %u\n", __func__,
need_reconfig);
- if (input_vcd_frm->flags &
- VCD_FRAME_FLAG_EOS) {
- need_reconfig = false;
- }
if (((input_vcd_frm->flags &
VCD_FRAME_FLAG_CODECCONFIG) &&
(!(input_vcd_frm->flags &
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_properties.c b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_properties.c
index ab4d51c..2d3bee3 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_properties.c
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_properties.c
@@ -201,6 +201,7 @@
decoder->dynamic_prop_change |=
DDL_DEC_REQ_OUTPUT_FLUSH;
decoder->dpb_mask.client_mask = 0;
+ decoder->field_needed_for_prev_ip = 0;
vcd_status = VCD_S_SUCCESS;
}
break;
diff --git a/include/linux/msm_thermal.h b/include/linux/msm_thermal.h
index 47a8753..8b7bb7c 100644
--- a/include/linux/msm_thermal.h
+++ b/include/linux/msm_thermal.h
@@ -24,11 +24,16 @@
#ifdef CONFIG_THERMAL_MONITOR
extern int msm_thermal_init(struct msm_thermal_data *pdata);
+extern int msm_thermal_device_init(void);
#else
static inline int msm_thermal_init(struct msm_thermal_data *pdata)
{
return -ENOSYS;
}
+static inline int msm_thermal_device_init(void)
+{
+ return -ENOSYS;
+}
#endif
#endif /*__MSM_THERMAL_H*/
diff --git a/include/linux/regulator/krait-regulator.h b/include/linux/regulator/krait-regulator.h
new file mode 100644
index 0000000..1f85952
--- /dev/null
+++ b/include/linux/regulator/krait-regulator.h
@@ -0,0 +1,27 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __KRAIT_REGULATOR_H__
+#define __KRAIT_REGULATOR_H__
+
+#define KRAIT_REGULATOR_DRIVER_NAME "krait-power-regulator"
+
+/**
+ * krait_power_init - driver initialization function
+ *
+ * This function registers the krait-power-regulator platform driver. This
+ * should be called from appropriate initialization code. Returns 0 on
+ * success and error on failure.
+ */
+int __init krait_power_init(void);
+
+#endif
diff --git a/include/linux/usb/msm_hsusb.h b/include/linux/usb/msm_hsusb.h
index b9ecd60..763e977 100644
--- a/include/linux/usb/msm_hsusb.h
+++ b/include/linux/usb/msm_hsusb.h
@@ -187,6 +187,8 @@
* @default_mode: Default operational mode. Applicable only if
* OTG switch is controller by user.
* @pmic_id_irq: IRQ number assigned for PMIC USB ID line.
+ * @mpm_otgsessvld_int: MPM wakeup pin assigned for OTG SESSVLD
+ * interrupt. Used when .otg_control == OTG_PHY_CONTROL.
* @mhl_enable: indicates MHL connector or not.
* @disable_reset_on_disconnect: perform USB PHY and LINK reset
* on USB cable disconnection.
@@ -211,6 +213,7 @@
enum msm_usb_phy_type phy_type;
void (*setup_gpio)(enum usb_otg_state state);
int pmic_id_irq;
+ unsigned int mpm_otgsessvld_int;
bool mhl_enable;
bool disable_reset_on_disconnect;
bool enable_dcd;
diff --git a/include/linux/usb/usb_qdss.h b/include/linux/usb/usb_qdss.h
new file mode 100644
index 0000000..94a2c37
--- /dev/null
+++ b/include/linux/usb/usb_qdss.h
@@ -0,0 +1,55 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __LINUX_USB_QDSS_H
+#define __LINUX_USB_QDSS_H
+
+#include <linux/kernel.h>
+
+struct qdss_request {
+ char *buf;
+ int length;
+ int actual;
+ int status;
+ void *context;
+};
+
+struct usb_qdss_ch {
+ const char *name;
+ struct list_head list;
+ void (*notify)(void *priv, unsigned event, struct qdss_request *d_req,
+ struct usb_qdss_ch *);
+ void *priv;
+ void *priv_usb;
+ int app_conn;
+};
+
+enum qdss_state {
+ USB_QDSS_CONNECT,
+ USB_QDSS_DISCONNECT,
+ USB_QDSS_CTRL_READ_DONE,
+ USB_QDSS_DATA_WRITE_DONE,
+ USB_QDSS_CTRL_WRITE_DONE,
+};
+
+struct usb_qdss_ch *usb_qdss_open(const char *name, void *priv,
+ void (*notify)(void *, unsigned, struct qdss_request *,
+ struct usb_qdss_ch *));
+void usb_qdss_close(struct usb_qdss_ch *ch);
+int usb_qdss_alloc_req(struct usb_qdss_ch *ch, int n_write, int n_read);
+void usb_qdss_free_req(struct usb_qdss_ch *ch);
+int usb_qdss_read(struct usb_qdss_ch *ch, struct qdss_request *d_req);
+int usb_qdss_write(struct usb_qdss_ch *ch, struct qdss_request *d_req);
+int usb_qdss_ctrl_write(struct usb_qdss_ch *ch, struct qdss_request *d_req);
+int usb_qdss_ctrl_read(struct usb_qdss_ch *ch, struct qdss_request *d_req);
+
+#endif