arch/arm/boot/dts/apq8084.dtsi

/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

/include/ "skeleton.dtsi"
/include/ "apq8084-ion.dtsi"

/ {
	model = "Qualcomm APQ 8084";
	compatible = "qcom,apq8084";
	interrupt-parent = <&intc>;

	intc: interrupt-controller@f9000000 {
		compatible = "qcom,msm-qgic2";
		interrupt-controller;
		#interrupt-cells = <3>;
		reg = <0xF9000000 0x1000>,
		      <0xF9002000 0x1000>;
	};

	msmgpio: gpio@fd510000 {
		compatible = "qcom,msm-gpio";
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
		reg = <0xfd510000 0x4000>;
		ngpio = <146>;
		interrupts = <0 208 0>;
		qcom,direct-connect-irqs = <8>;
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupts = <1 2 0 1 3 0>;
		clock-frequency = <19200000>;
	};

	serial@f991f000 {
		compatible = "qcom,msm-lsuart-v14";
		reg = <0xf991f000 0x1000>;
		interrupts = <0 109 0>;
		status = "disabled";
	};

	qcom,cache_erp {
		compatible = "qcom,cache_erp";
		interrupts = <1 9 0>, <0 2 0>;
		interrupt-names = "l1_irq", "l2_irq";
	};

	qcom,cache_dump {
		compatible = "qcom,cache_dump";
		qcom,l1-dump-size = <0x100000>;
		qcom,l2-dump-size = <0x500000>;
		qcom,memory-reservation-type = "EBI1";
		qcom,memory-reservation-size = <0x600000>; /* 6M EBI1 buffer */
	};

	rpm_bus: qcom,rpm-smd {
		compatible = "qcom,rpm-smd";
		rpm-channel-name = "rpm_requests";
		rpm-channel-type = <15>; /* SMD_APPS_RPM */
		rpm-standalone;
	};

        qcom,msm-imem@fe805000 {
                compatible = "qcom,msm-imem";
                reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
	};

	qcom,msm-rtb {
		compatible = "qcom,msm-rtb";
		qcom,memory-reservation-type = "EBI1";
		qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
	};

	sdcc1: qcom,sdcc@f9824000 {
		cell-index = <1>; /* SDC1 eMMC slot */
		compatible = "qcom,msm-sdcc";
		reg = <0xf9824000 0x800>;
		reg-names = "core_mem";
		interrupts = <0 123 0>;
		interrupt-names = "core_irq";

		qcom,bus-width = <8>;
		status = "disabled";
	};

	sdcc2: qcom,sdcc@f98a4000 {
		cell-index = <2>; /* SDC2 SD card slot */
		compatible = "qcom,msm-sdcc";
		reg = <0xf98a4000 0x800>;
		reg-names = "core_mem";
		interrupts = <0 125 0>;
		interrupt-names = "core_irq";


		qcom,bus-width = <4>;
		status = "disabled";
	};

	spmi_bus: qcom,spmi@fc4c0000 {
		cell-index = <0>;
		compatible = "qcom,spmi-pmic-arb";
		reg-names = "core", "intr", "cnfg";
		reg = <0xfc4cf000 0x1000>,
		      <0Xfc4cb000 0x1000>,
		      <0Xfc4ca000 0x1000>;
		/* 190,ee0_krait_hlos_spmi_periph_irq */
		/* 187,channel_0_krait_hlos_trans_done_irq */
		interrupts = <0 190 0>, <0 187 0>;
		qcom,not-wakeup;
		qcom,pmic-arb-ee = <0>;
		qcom,pmic-arb-channel = <0>;
		#address-cells = <1>;
		#size-cells = <0>;
		interrupt-controller;
		#interrupt-cells = <3>;
	};
};