Revert "msm: clock-8960: Do hwcg for vcodec_axi_{a,b}_clk"
This reverts commit 2aa8a4b89531d8df92a7c25b215517b8d2c8c697.
CRs-fixed: 328393
Change-Id: Iae246a63a94842661268ce4c9493c3f834d6322a
Signed-off-by: Gopikrishnaiah Anandan <gopikr@codeaurora.org>
diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index 667ac62..95c93ad 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -742,8 +742,6 @@
.en_mask = BIT(23),
.hwcg_reg = MAXI_EN4_REG,
.hwcg_mask = BIT(22),
- .reset_reg = SW_RESET_AXI_REG,
- .reset_mask = BIT(4),
.halt_reg = DBG_BUS_VEC_I_REG,
.halt_bit = 25,
},
@@ -760,8 +758,6 @@
.en_mask = BIT(25),
.hwcg_reg = MAXI_EN4_REG,
.hwcg_mask = BIT(24),
- .reset_reg = SW_RESET_AXI_REG,
- .reset_mask = BIT(5),
.halt_reg = DBG_BUS_VEC_I_REG,
.halt_bit = 26,
},
@@ -780,7 +776,7 @@
.hwcg_reg = MAXI_EN_REG,
.hwcg_mask = BIT(13),
.reset_reg = SW_RESET_AXI_REG,
- .reset_mask = BIT(7),
+ .reset_mask = BIT(4)|BIT(5)|BIT(7),
.halt_reg = DBG_BUS_VEC_E_REG,
.halt_bit = 3,
},
@@ -5744,7 +5740,7 @@
SOCINFO_VERSION_MAJOR(socinfo_get_version()) >= 3) {
rmwreg(0x0003AFF9, MAXI_EN_REG, 0x0803FFFF);
rmwreg(0x3A27FCFF, MAXI_EN2_REG, 0x3A3FFFFF);
- rmwreg(0x0167FCFF, MAXI_EN4_REG, 0x017FFFFF);
+ rmwreg(0x0027FCFF, MAXI_EN4_REG, 0x017FFFFF);
} else {
rmwreg(0x000007F9, MAXI_EN_REG, 0x0803FFFF);
rmwreg(0x3027FCFF, MAXI_EN2_REG, 0x3A3FFFFF);
diff --git a/arch/arm/mach-msm/footswitch-8x60.c b/arch/arm/mach-msm/footswitch-8x60.c
index d8326e4..7f63dc8 100644
--- a/arch/arm/mach-msm/footswitch-8x60.c
+++ b/arch/arm/mach-msm/footswitch-8x60.c
@@ -512,22 +512,13 @@
{ 0 }
};
-static struct clk_data ved_8660_clks[] = {
+static struct clk_data ved_clks[] = {
{ .name = "core_clk" },
{ .name = "iface_clk" },
{ .name = "bus_clk" },
{ 0 }
};
-static struct clk_data ved_8960_clks[] = {
- { .name = "core_clk" },
- { .name = "iface_clk" },
- { .name = "bus_clk" },
- { .name = "bus_a_clk" },
- { .name = "bus_b_clk" },
- { 0 }
-};
-
static struct clk_data vfe_clks[] = {
{ .name = "core_clk" },
{ .name = "iface_clk" },
@@ -586,7 +577,7 @@
ROT_GFS_CTL_REG, 31, rot_clks,
MSM_BUS_MASTER_ROTATOR, 0),
FOOTSWITCH(FS_VED, "fs_ved", &standard_fs_ops,
- VED_GFS_CTL_REG, 31, NULL,
+ VED_GFS_CTL_REG, 31, ved_clks,
MSM_BUS_MASTER_HD_CODEC_PORT0,
MSM_BUS_MASTER_HD_CODEC_PORT1),
FOOTSWITCH(FS_VFE, "fs_vfe", &standard_fs_ops,
@@ -624,14 +615,6 @@
else
BUG();
}
- if (pdev->id == FS_VED) {
- if (cpu_is_msm8960() || cpu_is_msm8930())
- fs->clk_data = ved_8960_clks;
- else if (cpu_is_msm8x60())
- fs->clk_data = ved_8660_clks;
- else
- BUG();
- }
for (clock = fs->clk_data; clock->name; clock++) {
clock->clk = clk_get(&pdev->dev, clock->name);