commit 855a95e4fc2ac6b758145ca7d6a0c95b66a57ef8
author Ben Skeggs <bskeggs@redhat.com> Thu Sep 16 15:25:25 2010 +1000
committer Ben Skeggs <bskeggs@redhat.com> Fri Sep 24 16:26:49 2010 +1000
tree a8536a4799ee31a97186d44c6bdb5fa90f6e3919
parent f9aafdd30ef8356f0a3690bf9bdd9c6e51b7705c

drm/nouveau: make the behaviour of get_pll_limits() consistent

This replaces all the pll_types definitions for ones that match the types
used in the tables in recent VBIOS versions.

get_pll_limits() will now accept either type or register value as input
across all limits table versions, and will store the actual register ID
that a PLL type refers to in the returned structure.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/nv04_crtc.c

diff --git a/drivers/gpu/drm/nouveau/nv04_crtc.c b/drivers/gpu/drm/nouveau/nv04_crtc.c
index 1f0f978..ef48028 100644
--- a/drivers/gpu/drm/nouveau/nv04_crtc.c
+++ b/drivers/gpu/drm/nouveau/nv04_crtc.c
@@ -109,7 +109,7 @@
 	struct nouveau_pll_vals *pv = &regp->pllvals;
 	struct pll_lims pll_lim;
 
-	if (get_pll_limits(dev, nv_crtc->index ? VPLL2 : VPLL1, &pll_lim))
+	if (get_pll_limits(dev, nv_crtc->index ? PLL_VPLL1 : PLL_VPLL0, &pll_lim))
 		return;
 
 	/* NM2 == 0 is used to determine single stage mode on two stage plls */