| commit | 86b1f6566dedc2df8fa98808709bd003d437b6ff | [log] [tgz] |
|---|---|---|
| author | Prachee Ramsinghani <pracheer@codeaurora.org> | Tue Apr 03 16:01:30 2012 +0530 |
| committer | Trilok Soni <tsoni@codeaurora.org> | Sat Apr 14 00:03:50 2012 +0530 |
| tree | bd52a03892a8b597e9856c805e0a4ffe70fa50d1 | |
| parent | f5a8ffd790f9f12de206245ac687cbe8572cbeef [diff] |
msm: devices-msm7x27a: Enable L2 No write allocate and Double line fill L2 cache settings for improving memory performance on msm8625. To improve write bandwidth, L2 is forced to No-Write-Allocate through L2_AUX_CTRL(Enable bit 23). To improve read bandwidth, Prefech offset of 3(Bit 0-4)and Double line fill(Bit 23, 30)are enabled through L2_PREFETCH_CTRL. Change-Id: Ia05cc41f8dee65486af9b0b7269b7f5763b5a988 Signed-off-by: Prachee Ramsinghani <pracheer@codeaurora.org>