board: storage: enable eMMC DDR capability for non-CDP platforms
When eMMC runs in DDR mode on CDP platform, we have seen instability
due to DATA CRC errors. These errors are attributed to long physical
path between MSM and eMMC on CDP.
So disable the DDR mode on CDP platform only and let other platforms
take advantage of eMMC DDR mode.
NOTE: eMMC DDR mode instability was observed only on MSM8960 and
MSM8930 CDP platforms.
CRs-Fixed: 371242
Change-Id: I882e7a7c3e352a0f9c2ebe4362c55c22decef53b
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
diff --git a/arch/arm/mach-msm/board-8960-storage.c b/arch/arm/mach-msm/board-8960-storage.c
index e674e91..4b09f82 100644
--- a/arch/arm/mach-msm/board-8960-storage.c
+++ b/arch/arm/mach-msm/board-8960-storage.c
@@ -271,7 +271,7 @@
#define MSM_MPM_PIN_SDC3_DAT1 21
static unsigned int sdc1_sup_clk_rates[] = {
- 400000, 24000000, 48000000
+ 400000, 24000000, 48000000, 96000000
};
#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
@@ -361,6 +361,16 @@
void __init msm8960_init_mmc(void)
{
#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
+ /*
+ * When eMMC runs in DDR mode on CDP platform, we have
+ * seen instability due to DATA CRC errors. These errors are
+ * attributed to long physical path between MSM and eMMC on CDP.
+ * So let's not enable the DDR mode on CDP platform but let other
+ * platforms take advantage of eMMC DDR mode.
+ */
+ if (!machine_is_msm8960_cdp())
+ msm8960_sdc1_data.uhs_caps |= (MMC_CAP_1_8V_DDR |
+ MMC_CAP_UHS_DDR50);
/* SDC1 : eMMC card connected */
msm_add_sdcc(1, &msm8960_sdc1_data);
#endif