arm/dt : 8974 : Update max address size of BLSP2 BAM device
Each BLSP device has 6 UART and 6 QUP (having I2C and SPI subcore) cores.
These cores share one BAM device(i.e. DMA Engine) available on each BLSP.
All these cores' (UART/SPI/I2C) drivers are independent and SPS driver
is not registering available BLSP based BAM device. SPS driver provides
APIs to query to see if BAM device is already register or not, otherwise
it is required to be registered by BLSP based device's driver.
BLSP2 BAM have 24 pipes and each UART and QUP has alloacted 2 pipes.
If only BAM device registered with address space by considering allocated
pipes for the same, next device would not be able to register BAM device
and received BAM device handler would not allow the other core to
programmed required pipes related registers allocated for that core. Hence
update max address size of BLSP2 BAM device considering all devices' pipe
address space. Each pipe has 0x1000 bytes register address space, and BAM
top-level registers also have 0x1000 bytes address space. Hence use 0x19000
as the max address size of BLSP2 BAM device.
Change-Id: Icdcbc3aea66598894ebaaac8a3e17efe02d3e64e
Signed-off-by: Saket Saurabh <ssaurabh@codeaurora.org>
1 file changed