[MIPS] Alchemy: SMBus resource fix
The Alchemy platform code registers the SMBus device using the virtual
address of its registers instead of the physical one -- fix this, taking
into account that actually the whole megabyte is decoded by any of the
programmable serial controllers (one of which is SMBus), and that all the
Alchemy peripherals are directly mappable into KSEG1 kernel space and
therefore ioremap() call would just boil down to CKSEG1ADDR() invocation.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
diff --git a/arch/mips/au1000/common/platform.c b/arch/mips/au1000/common/platform.c
index 31d2a22..dbefa9e 100644
--- a/arch/mips/au1000/common/platform.c
+++ b/arch/mips/au1000/common/platform.c
@@ -269,8 +269,8 @@
#ifdef SMBUS_PSC_BASE
static struct resource pbdb_smbus_resources[] = {
{
- .start = SMBUS_PSC_BASE,
- .end = SMBUS_PSC_BASE + 0x24 - 1,
+ .start = CPHYSADDR(SMBUS_PSC_BASE),
+ .end = CPHYSADDR(SMBUS_PSC_BASE + 0xfffff),
.flags = IORESOURCE_MEM,
},
};
diff --git a/drivers/i2c/busses/i2c-au1550.c b/drivers/i2c/busses/i2c-au1550.c
index 491718f..cae9dc8 100644
--- a/drivers/i2c/busses/i2c-au1550.c
+++ b/drivers/i2c/busses/i2c-au1550.c
@@ -335,7 +335,7 @@
goto out_mem;
}
- priv->psc_base = r->start;
+ priv->psc_base = CKSEG1ADDR(r->start);
priv->xfer_timeout = 200;
priv->ack_timeout = 200;