| commit | 90182317a9e383474613aa60e9d61d57bdf17c3e | [log] [tgz] |
|---|---|---|
| author | Kevin Liu <kliu5@marvell.com> | Wed Sep 08 09:44:36 2010 -0400 |
| committer | Samuel Ortiz <sameo@linux.intel.com> | Wed Sep 29 10:14:53 2010 +0200 |
| tree | 82c15105db4f388ad06656789e565f7a8f5315da | |
| parent | c9d66d3515bbb0ad8062721487de7ade02d2b936 [diff] |
mfd: Fix max8925 irq control bit incorrect setting In max8925_irq_sync_unlock(), irq control bit is set at the same time. Zero means enabling irq, and one means disabling irq. The original code is: irq_chg[0] &= irq_data->enable; It should be changed to: irq_chg[0] &= ~irq_data->enable; Otherwise, irq control bit is mess. Signed-off-by: Kevin Liu <kliu5@marvell.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>