| commit | 96983ffefce46312e9372d357309dda413553009 | [log] [tgz] |
|---|---|---|
| author | Kevin Cernekee <cernekee@gmail.com> | Fri Sep 18 19:12:45 2009 -0700 |
| committer | Ralf Baechle <ralf@linux-mips.org> | Wed Sep 30 21:47:00 2009 +0200 |
| tree | da15ecb8a3c728af409fa0903f292731c358e222 | |
| parent | a648e8119666782f21b509a7886be9b281e41ccb [diff] |
MIPS: MIPSxx SC: Avoid destructive invalidation on partial L2 cachelines. This extends commit a8ca8b64e3fdfec17679cba0ca5ce6e3ffed092d to cover MIPSxx-style board cache code. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>