Merge "arm/dt: Add skeleton dtsi file" into msm-3.0
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b2dbee3..184026a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -24,7 +24,7 @@
select HAVE_PERF_EVENTS
select PERF_USE_VMALLOC
select HAVE_REGS_AND_STACK_ACCESS_API
- select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
+ #select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
select HAVE_C_RECORDMCOUNT
select HAVE_GENERIC_HARDIRQS
select HAVE_SPARSE_IRQ
diff --git a/arch/arm/configs/fsm9xxx-perf_defconfig b/arch/arm/configs/fsm9xxx-perf_defconfig
index 50145f9..60d8a32 100644
--- a/arch/arm/configs/fsm9xxx-perf_defconfig
+++ b/arch/arm/configs/fsm9xxx-perf_defconfig
@@ -7,6 +7,7 @@
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
# CONFIG_PERF_EVENTS is not set
diff --git a/arch/arm/configs/fsm9xxx_defconfig b/arch/arm/configs/fsm9xxx_defconfig
index 4019a4f..6913409 100644
--- a/arch/arm/configs/fsm9xxx_defconfig
+++ b/arch/arm/configs/fsm9xxx_defconfig
@@ -7,6 +7,7 @@
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_KALLSYMS_ALL=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
diff --git a/arch/arm/configs/msm7627-perf_defconfig b/arch/arm/configs/msm7627-perf_defconfig
index 1cc4b97..78eeadd 100644
--- a/arch/arm/configs/msm7627-perf_defconfig
+++ b/arch/arm/configs/msm7627-perf_defconfig
@@ -11,6 +11,7 @@
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_KALLSYMS_ALL=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
diff --git a/arch/arm/configs/msm7627_defconfig b/arch/arm/configs/msm7627_defconfig
index 6f0cb31..7da4daf 100644
--- a/arch/arm/configs/msm7627_defconfig
+++ b/arch/arm/configs/msm7627_defconfig
@@ -11,6 +11,7 @@
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
diff --git a/arch/arm/configs/msm7627a-perf_defconfig b/arch/arm/configs/msm7627a-perf_defconfig
index 985b8f2..33b9a37 100644
--- a/arch/arm/configs/msm7627a-perf_defconfig
+++ b/arch/arm/configs/msm7627a-perf_defconfig
@@ -12,6 +12,7 @@
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_KALLSYMS_ALL=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
diff --git a/arch/arm/configs/msm7627a_defconfig b/arch/arm/configs/msm7627a_defconfig
index 9254abb..1eaec3f 100644
--- a/arch/arm/configs/msm7627a_defconfig
+++ b/arch/arm/configs/msm7627a_defconfig
@@ -12,6 +12,7 @@
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
diff --git a/arch/arm/configs/msm7630-perf_defconfig b/arch/arm/configs/msm7630-perf_defconfig
index cc86af8..5b52404 100644
--- a/arch/arm/configs/msm7630-perf_defconfig
+++ b/arch/arm/configs/msm7630-perf_defconfig
@@ -11,6 +11,7 @@
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
diff --git a/arch/arm/configs/msm7630_defconfig b/arch/arm/configs/msm7630_defconfig
index 9645211..9ad0b5a 100644
--- a/arch/arm/configs/msm7630_defconfig
+++ b/arch/arm/configs/msm7630_defconfig
@@ -11,6 +11,7 @@
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
diff --git a/arch/arm/configs/msm8660-perf_defconfig b/arch/arm/configs/msm8660-perf_defconfig
index 3315171..ace54ef 100644
--- a/arch/arm/configs/msm8660-perf_defconfig
+++ b/arch/arm/configs/msm8660-perf_defconfig
@@ -18,6 +18,7 @@
CONFIG_BLK_DEV_INITRD=y
CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
diff --git a/arch/arm/configs/msm8660_defconfig b/arch/arm/configs/msm8660_defconfig
index 698855a..41e3a6d 100644
--- a/arch/arm/configs/msm8660_defconfig
+++ b/arch/arm/configs/msm8660_defconfig
@@ -18,6 +18,7 @@
CONFIG_BLK_DEV_INITRD=y
CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
diff --git a/arch/arm/configs/msm8960_defconfig b/arch/arm/configs/msm8960_defconfig
index bf15477..73d0756 100755
--- a/arch/arm/configs/msm8960_defconfig
+++ b/arch/arm/configs/msm8960_defconfig
@@ -19,6 +19,7 @@
CONFIG_BLK_DEV_INITRD=y
CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_KALLSYMS_ALL=y
CONFIG_ASHMEM=y
diff --git a/arch/arm/configs/msm9615_defconfig b/arch/arm/configs/msm9615_defconfig
index 612e8e8..f8ccbb3 100644
--- a/arch/arm/configs/msm9615_defconfig
+++ b/arch/arm/configs/msm9615_defconfig
@@ -20,6 +20,7 @@
CONFIG_BLK_DEV_INITRD=y
CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_KALLSYMS_ALL=y
CONFIG_EMBEDDED=y
@@ -158,6 +159,10 @@
# CONFIG_MMC_MSM_SDC4_SUPPORT is not set
# CONFIG_MMC_MSM_SDC5_SUPPORT is not set
CONFIG_MMC_MSM_SPS_SUPPORT=y
+CONFIG_RTC_CLASS=y
+# CONFIG_RTC_INTF_ALARM is not set
+# CONFIG_RTC_DRV_MSM is not set
+CONFIG_RTC_DRV_PM8XXX=y
CONFIG_MSM_SSBI=y
CONFIG_SPS=y
CONFIG_SPS_SUPPORT_BAMDMA=y
diff --git a/arch/arm/mach-msm/board-msm7x27a.c b/arch/arm/mach-msm/board-msm7x27a.c
index 92879bc..44939e7 100644
--- a/arch/arm/mach-msm/board-msm7x27a.c
+++ b/arch/arm/mach-msm/board-msm7x27a.c
@@ -1841,10 +1841,16 @@
static int msm_fb_detect_panel(const char *name)
{
- if (!strncmp(name, MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
- strnlen(MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
- PANEL_NAME_MAX_LEN)))
- return 0;
+ int ret = -ENODEV;
+
+ if (machine_is_msm7x27a_surf() || machine_is_msm7625a_surf()) {
+ if (!strncmp(name, "lcdc_toshiba_fwvga_pt", 21) ||
+ !strncmp(name, "mipi_cmd_renesas_fwvga", 22))
+ ret = 0;
+ } else if (machine_is_msm7x27a_ffa()) {
+ if (!strncmp(name, "mipi_cmd_renesas_fwvga", 22))
+ ret = 0;
+ }
#if !defined(CONFIG_FB_MSM_LCDC_AUTO_DETECT) && \
!defined(CONFIG_FB_MSM_MIPI_PANEL_AUTO_DETECT) && \
@@ -1857,7 +1863,7 @@
return 0;
}
#endif
- return -ENODEV;
+ return ret;
}
static struct msm_fb_platform_data msm_fb_pdata = {
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index 2615cd4..10d1cd5 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -3328,46 +3328,46 @@
/* configuration data */
static const u8 mxt_config_data[] = {
/* T6 Object */
- 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
/* T38 Object */
- 11, 0, 0, 6, 9, 11, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0,
+ 11, 1, 0, 20, 10, 11, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0,
/* T7 Object */
- 10, 10, 50,
+ 100, 16, 50,
/* T8 Object */
- 8, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 8, 0, 0, 0, 0, 0, 0, 0, 0, 0,
/* T9 Object */
- 131, 0, 0, 26, 42, 0, 32, 60, 2, 5,
- 0, 5, 5, 34, 10, 10, 10, 10, 85, 5,
- 255, 2, 8, 9, 9, 9, 0, 0, 5, 20,
- 0, 5, 45, 46,
+ 131, 0, 0, 26, 42, 0, 32, 60, 2, 5,
+ 0, 5, 5, 34, 10, 10, 10, 10, 255, 2,
+ 85, 5, 18, 18, 18, 18, 0, 0, 5, 20,
+ 0, 5, 45, 46,
/* T15 Object */
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0,
/* T22 Object */
- 0, 0, 0, 0, 0, 0, 0, 0, 30, 0,
- 0, 0, 255, 255, 255, 255, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 30, 0,
+ 0, 0, 255, 255, 255, 255, 0,
/* T24 Object */
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0,
/* T25 Object */
- 3, 0, 188, 52, 52, 33, 0, 0, 0, 0,
- 0, 0, 0, 0,
+ 3, 0, 188, 52, 52, 33, 0, 0, 0, 0,
+ 0, 0, 0, 0,
/* T27 Object */
- 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0,
/* T28 Object */
- 0, 0, 0, 8, 8, 8,
+ 0, 0, 0, 8, 8, 60,
/* T40 Object */
- 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
/* T41 Object */
- 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
/* T43 Object */
- 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
};
#define MXT_TS_GPIO_IRQ 11
@@ -3435,15 +3435,10 @@
static struct mxt_platform_data mxt_platform_data = {
.config = mxt_config_data,
.config_length = ARRAY_SIZE(mxt_config_data),
- .x_line = 26,
- .y_line = 42,
- .x_size = 767,
- .y_size = 1365,
- .blen = 32,
- .threshold = 40,
- .voltage = 3300000, /* 3.3V */
- .orient = MXT_ROTATED_90,
+ .x_size = 1365,
+ .y_size = 767,
.irqflags = IRQF_TRIGGER_FALLING,
+ .i2c_pull_up = true,
};
static struct i2c_board_info mxt_device_info[] __initdata = {
diff --git a/arch/arm/mach-msm/board-qrd7627a.c b/arch/arm/mach-msm/board-qrd7627a.c
index b07ac00..ff392eb 100644
--- a/arch/arm/mach-msm/board-qrd7627a.c
+++ b/arch/arm/mach-msm/board-qrd7627a.c
@@ -1455,6 +1455,57 @@
early_param("fb_size", fb_size_setup);
+static struct resource msm_fb_resources[] = {
+ {
+ .flags = IORESOURCE_DMA,
+ }
+};
+
+static int msm_fb_detect_panel(const char *name)
+{
+ int ret;
+
+ if (!strncmp(name, "mipi_video_truly_wvga", 21))
+ ret = 0;
+ else
+ ret = -ENODEV;
+
+ return ret;
+}
+
+static int mipi_truly_set_bl(int on)
+{
+ gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, !!on);
+
+ return 1;
+}
+
+static struct msm_fb_platform_data msm_fb_pdata = {
+ .detect_client = msm_fb_detect_panel,
+};
+
+static struct platform_device msm_fb_device = {
+ .name = "msm_fb",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(msm_fb_resources),
+ .resource = msm_fb_resources,
+ .dev = {
+ .platform_data = &msm_fb_pdata,
+ }
+};
+
+static struct msm_panel_common_pdata mipi_truly_pdata = {
+ .pmic_backlight = mipi_truly_set_bl,
+};
+
+static struct platform_device mipi_dsi_truly_panel_device = {
+ .name = "mipi_truly",
+ .id = 0,
+ .dev = {
+ .platform_data = &mipi_truly_pdata,
+ }
+};
+
static void __init msm7627a_init_mmc(void)
{
vreg_emmc = vreg_get(NULL, "emmc");
@@ -1701,6 +1752,7 @@
&android_usb_device,
&android_pmem_device,
&android_pmem_adsp_device,
+ &msm_fb_device,
&android_pmem_audio_device,
&msm_device_snd,
&msm_device_adspdec,
@@ -1709,6 +1761,7 @@
#ifdef CONFIG_BT
&msm_bt_power_device,
#endif
+ &mipi_dsi_truly_panel_device,
&msm_wlan_ar6000_pm_device,
&asoc_msm_pcm,
&asoc_msm_dai0,
@@ -1733,7 +1786,15 @@
static void __init msm_msm7627a_allocate_memory_regions(void)
{
- pr_info("Dummy allocation for fb\n");
+ void *addr;
+ unsigned long size;
+
+ size = fb_size ? : MSM_FB_SIZE;
+ addr = alloc_bootmem_align(size, 0x1000);
+ msm_fb_resources[0].start = __pa(addr);
+ msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
+ pr_info("allocating %lu bytes at %p (%lx physical) for fb\n", size,
+ addr, __pa(addr));
}
static struct memtype_reserve msm7627a_reserve_table[] __initdata = {
@@ -1747,6 +1808,159 @@
},
};
+static struct msm_panel_common_pdata mdp_pdata = {
+ .gpio = 97,
+ .mdp_rev = MDP_REV_303,
+};
+
+#define GPIO_LCDC_BRDG_PD 128
+#define GPIO_LCDC_BRDG_RESET_N 129
+#define GPIO_LCD_DSI_SEL 125
+
+static unsigned mipi_dsi_gpio[] = {
+ GPIO_CFG(GPIO_LCDC_BRDG_RESET_N, 0, GPIO_CFG_OUTPUT,
+ GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
+ GPIO_CFG(GPIO_LCDC_BRDG_PD, 0, GPIO_CFG_OUTPUT,
+ GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* LCDC_BRDG_PD */
+};
+
+static unsigned lcd_dsi_sel_gpio[] = {
+ GPIO_CFG(GPIO_LCD_DSI_SEL, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP,
+ GPIO_CFG_2MA),
+};
+
+enum {
+ DSI_SINGLE_LANE = 1,
+ DSI_TWO_LANES,
+};
+
+static int msm_fb_get_lane_config(void)
+{
+ pr_info("DSI_TWO_LANES\n");
+ return DSI_TWO_LANES;
+}
+
+static int mipi_truly_sel_mode(int video_mode)
+{
+ int rc = 0;
+
+ rc = gpio_request(GPIO_LCD_DSI_SEL, "lcd_dsi_sel");
+ if (rc < 0)
+ goto gpio_error;
+
+ rc = gpio_tlmm_config(lcd_dsi_sel_gpio[0], GPIO_CFG_ENABLE);
+ if (rc)
+ goto gpio_error;
+
+ rc = gpio_direction_output(GPIO_LCD_DSI_SEL, 1);
+ if (!rc) {
+ gpio_set_value_cansleep(GPIO_LCD_DSI_SEL, video_mode);
+ return rc;
+ } else {
+ goto gpio_error;
+ }
+
+gpio_error:
+ pr_err("mipi_truly_sel_mode failed\n");
+ gpio_free(GPIO_LCD_DSI_SEL);
+ return rc;
+}
+
+static int msm_fb_dsi_client_qrd1_reset(void)
+{
+ int rc = 0;
+
+ rc = gpio_request(GPIO_LCDC_BRDG_RESET_N, "lcdc_brdg_reset_n");
+ if (rc < 0) {
+ pr_err("failed to request lcd brdg reset_n\n");
+ return rc;
+ }
+
+ rc = gpio_tlmm_config(mipi_dsi_gpio[0], GPIO_CFG_ENABLE);
+ if (rc < 0) {
+ pr_err("Failed to enable LCDC Bridge reset enable\n");
+ return rc;
+ }
+
+ rc = gpio_direction_output(GPIO_LCDC_BRDG_RESET_N, 1);
+ if (rc < 0) {
+ pr_err("Failed GPIO bridge pd\n");
+ gpio_free(GPIO_LCDC_BRDG_RESET_N);
+ return rc;
+ }
+
+ mipi_truly_sel_mode(1);
+
+ return rc;
+}
+
+static int msm_fb_dsi_client_reset(void)
+{
+ int rc = 0;
+
+ rc = msm_fb_dsi_client_qrd1_reset();
+ return rc;
+}
+
+static int dsi_gpio_initialized;
+
+static int mipi_dsi_panel_qrd1_power(int on)
+{
+ int rc = 0;
+
+ if (!dsi_gpio_initialized) {
+ rc = gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en");
+ if (rc < 0)
+ return rc;
+
+ rc = gpio_direction_output(GPIO_BACKLIGHT_EN, 1);
+ if (rc < 0) {
+ pr_err("failed to enable backlight\n");
+ gpio_free(GPIO_BACKLIGHT_EN);
+ return rc;
+ }
+ dsi_gpio_initialized = 1;
+ }
+
+ gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, !!on);
+
+ if (!on) {
+ gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N, 1);
+ msleep(20);
+ gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N, 0);
+ msleep(20);
+ gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N, 1);
+
+ }
+
+ return rc;
+}
+
+static int mipi_dsi_panel_power(int on)
+{
+ int rc = 0;
+
+ rc = mipi_dsi_panel_qrd1_power(on);
+ return rc;
+}
+
+#define MDP_303_VSYNC_GPIO 97
+
+#ifdef CONFIG_FB_MSM_MDP303
+static struct mipi_dsi_platform_data mipi_dsi_pdata = {
+ .vsync_gpio = MDP_303_VSYNC_GPIO,
+ .dsi_power_save = mipi_dsi_panel_power,
+ .dsi_client_reset = msm_fb_dsi_client_reset,
+ .get_lane_config = msm_fb_get_lane_config,
+};
+#endif
+
+static void __init msm_fb_add_devices(void)
+{
+ msm_fb_register_device("mdp", &mdp_pdata);
+ msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
+}
+
static void __init size_pmem_devices(void)
{
#ifdef CONFIG_ANDROID_PMEM
@@ -1839,6 +2053,7 @@
#endif
msm_pm_set_platform_data(msm7627a_pm_data,
ARRAY_SIZE(msm7627a_pm_data));
+ msm_fb_add_devices();
#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
diff --git a/arch/arm/mach-msm/devices-8064.c b/arch/arm/mach-msm/devices-8064.c
index 99e8d23..3606c41 100644
--- a/arch/arm/mach-msm/devices-8064.c
+++ b/arch/arm/mach-msm/devices-8064.c
@@ -21,6 +21,7 @@
#include <mach/msm_iomap.h>
#include <mach/usbdiag.h>
#include <mach/msm_sps.h>
+#include <mach/dma.h>
#include "clock.h"
#include "devices.h"
@@ -53,13 +54,21 @@
#define MSM_HSUSB_PHYS 0x12500000
#define MSM_HSUSB_SIZE SZ_4K
-
static struct resource msm_dmov_resource[] = {
{
.start = ADM_0_SCSS_0_IRQ,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x18300000,
+ .end = 0x18300000 + SZ_1M - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 0,
+ .sd_size = 0x800,
};
struct platform_device apq8064_device_dmov = {
@@ -67,6 +76,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
static struct resource resources_uart_gsbi1[] = {
diff --git a/arch/arm/mach-msm/devices-8960.c b/arch/arm/mach-msm/devices-8960.c
index b531dec..e81e2e8 100644
--- a/arch/arm/mach-msm/devices-8960.c
+++ b/arch/arm/mach-msm/devices-8960.c
@@ -803,9 +803,18 @@
static struct resource msm_dmov_resource[] = {
{
.start = ADM_0_SCSS_1_IRQ,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x18320000,
+ .end = 0x18320000 + SZ_1M - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 1,
+ .sd_size = 0x800,
};
struct platform_device msm8960_device_dmov = {
@@ -813,6 +822,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
static struct platform_device *msm_sdcc_devices[] __initdata = {
diff --git a/arch/arm/mach-msm/devices-9615.c b/arch/arm/mach-msm/devices-9615.c
index f65750b..77a6556 100644
--- a/arch/arm/mach-msm/devices-9615.c
+++ b/arch/arm/mach-msm/devices-9615.c
@@ -60,9 +60,18 @@
static struct resource msm_dmov_resource[] = {
{
.start = ADM_0_SCSS_1_IRQ,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x18320000,
+ .end = 0x18320000 + SZ_1M - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 1,
+ .sd_size = 0x800,
};
struct platform_device msm9615_device_dmov = {
@@ -70,6 +79,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
static struct resource resources_otg[] = {
diff --git a/arch/arm/mach-msm/devices-fsm9xxx.c b/arch/arm/mach-msm/devices-fsm9xxx.c
index 426be10..d46e4d6 100644
--- a/arch/arm/mach-msm/devices-fsm9xxx.c
+++ b/arch/arm/mach-msm/devices-fsm9xxx.c
@@ -232,12 +232,21 @@
* ADM
*/
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t) MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x94610000,
+ .end = 0x94610000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -245,6 +254,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
/*
diff --git a/arch/arm/mach-msm/devices-msm7x01a.c b/arch/arm/mach-msm/devices-msm7x01a.c
index 9ed6fd1..1b9eb86 100644
--- a/arch/arm/mach-msm/devices-msm7x01a.c
+++ b/arch/arm/mach-msm/devices-msm7x01a.c
@@ -384,12 +384,21 @@
.id = -1,
};
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0xA9700000,
+ .end = 0xA9700000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -397,6 +406,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
#define MSM_SDC1_BASE 0xA0400000
diff --git a/arch/arm/mach-msm/devices-msm7x25.c b/arch/arm/mach-msm/devices-msm7x25.c
index ca3caa2..c166c8d 100644
--- a/arch/arm/mach-msm/devices-msm7x25.c
+++ b/arch/arm/mach-msm/devices-msm7x25.c
@@ -407,12 +407,21 @@
.id = -1,
};
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0xA9700000,
+ .end = 0xA9700000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -420,6 +429,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
#define MSM_SDC1_BASE 0xA0400000
diff --git a/arch/arm/mach-msm/devices-msm7x27.c b/arch/arm/mach-msm/devices-msm7x27.c
index 3772884..1bb9a21 100644
--- a/arch/arm/mach-msm/devices-msm7x27.c
+++ b/arch/arm/mach-msm/devices-msm7x27.c
@@ -372,12 +372,21 @@
.id = -1,
};
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0xA9700000,
+ .end = 0xA9700000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -385,6 +394,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
#define MSM_SDC1_BASE 0xA0400000
diff --git a/arch/arm/mach-msm/devices-msm7x27a.c b/arch/arm/mach-msm/devices-msm7x27a.c
index 488db75..7008bd5 100644
--- a/arch/arm/mach-msm/devices-msm7x27a.c
+++ b/arch/arm/mach-msm/devices-msm7x27a.c
@@ -188,17 +188,29 @@
static struct resource msm_dmov_resource[] = {
{
- .start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
- .flags = IORESOURCE_IRQ,
+ .start = INT_ADM_AARM,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = 0xA9700000,
+ .end = 0xA9700000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
},
};
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
+};
+
struct platform_device msm_device_dmov = {
- .name = "msm_dmov",
- .id = -1,
- .resource = msm_dmov_resource,
- .num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .name = "msm_dmov",
+ .id = -1,
+ .resource = msm_dmov_resource,
+ .num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
struct platform_device msm_device_smd = {
diff --git a/arch/arm/mach-msm/devices-msm7x30.c b/arch/arm/mach-msm/devices-msm7x30.c
index d7832a3..d7fc93e 100644
--- a/arch/arm/mach-msm/devices-msm7x30.c
+++ b/arch/arm/mach-msm/devices-msm7x30.c
@@ -585,12 +585,21 @@
.id = -1,
};
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0xAC400000,
+ .end = 0xAC400000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 2,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -598,6 +607,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
#define MSM_SDC1_BASE 0xA0400000
diff --git a/arch/arm/mach-msm/devices-msm8x60.c b/arch/arm/mach-msm/devices-msm8x60.c
index 445f1d4..9f3e03d 100644
--- a/arch/arm/mach-msm/devices-msm8x60.c
+++ b/arch/arm/mach-msm/devices-msm8x60.c
@@ -1833,20 +1833,38 @@
.id = -1,
};
-struct resource msm_dmov_resource_adm0[] = {
+static struct resource msm_dmov_resource_adm0[] = {
{
.start = INT_ADM0_AARM,
- .end = (resource_size_t)MSM_DMOV_ADM0_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x18320000,
+ .end = 0x18320000 + SZ_1M - 1,
+ .flags = IORESOURCE_MEM,
+ },
};
-struct resource msm_dmov_resource_adm1[] = {
+static struct resource msm_dmov_resource_adm1[] = {
{
.start = INT_ADM1_AARM,
- .end = (resource_size_t)MSM_DMOV_ADM1_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x18420000,
+ .end = 0x18420000 + SZ_1M - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata_adm0 = {
+ .sd = 1,
+ .sd_size = 0x800,
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata_adm1 = {
+ .sd = 1,
+ .sd_size = 0x800,
};
struct platform_device msm_device_dmov_adm0 = {
@@ -1854,6 +1872,9 @@
.id = 0,
.resource = msm_dmov_resource_adm0,
.num_resources = ARRAY_SIZE(msm_dmov_resource_adm0),
+ .dev = {
+ .platform_data = &msm_dmov_pdata_adm0,
+ },
};
struct platform_device msm_device_dmov_adm1 = {
@@ -1861,6 +1882,9 @@
.id = 1,
.resource = msm_dmov_resource_adm1,
.num_resources = ARRAY_SIZE(msm_dmov_resource_adm1),
+ .dev = {
+ .platform_data = &msm_dmov_pdata_adm1,
+ },
};
/* MSM Video core device */
diff --git a/arch/arm/mach-msm/devices-qsd8x50.c b/arch/arm/mach-msm/devices-qsd8x50.c
index 5ae5b8b..2367719 100644
--- a/arch/arm/mach-msm/devices-qsd8x50.c
+++ b/arch/arm/mach-msm/devices-qsd8x50.c
@@ -438,12 +438,21 @@
.id = -1,
};
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0xA9700000,
+ .end = 0xA9700000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -451,6 +460,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
#define MSM_SDC1_BASE 0xA0300000
diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c
index ddf7732..ad1aecd 100644
--- a/arch/arm/mach-msm/dma.c
+++ b/arch/arm/mach-msm/dma.c
@@ -57,6 +57,8 @@
struct msm_dmov_crci_conf *crci_conf;
struct msm_dmov_chan_conf *chan_conf;
int channel_active;
+ int sd;
+ size_t sd_size;
struct list_head ready_commands[MSM_DMOV_CHANNEL_COUNT];
struct list_head active_commands[MSM_DMOV_CHANNEL_COUNT];
spinlock_t lock;
@@ -185,7 +187,8 @@
#endif
#define MSM_DMOV_ID_COUNT (MSM_DMOV_CHANNEL_COUNT * ARRAY_SIZE(dmov_conf))
-#define DMOV_REG(name, adm) ((name) + (dmov_conf[adm].base))
+#define DMOV_REG(name, adm) ((name) + (dmov_conf[adm].base) +\
+ (dmov_conf[adm].sd * dmov_conf[adm].sd_size))
#define DMOV_ID_TO_ADM(id) ((id) / MSM_DMOV_CHANNEL_COUNT)
#define DMOV_ID_TO_CHAN(id) ((id) % MSM_DMOV_CHANNEL_COUNT)
#define DMOV_CHAN_ADM_TO_ID(ch, adm) ((ch) + (adm) * MSM_DMOV_CHANNEL_COUNT)
@@ -620,33 +623,46 @@
int adm = (pdev->id >= 0) ? pdev->id : 0;
int i;
int ret;
- struct resource *res =
+ struct msm_dmov_pdata *pdata = pdev->dev.platform_data;
+ struct resource *irqres =
platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ struct resource *mres =
+ platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (res) {
- dmov_conf[adm].irq = res->start;
- dmov_conf[adm].base = (void *)res->end;
+ if (pdata) {
+ dmov_conf[adm].sd = pdata->sd;
+ dmov_conf[adm].sd_size = pdata->sd_size;
}
- if (!dmov_conf[adm].base || !dmov_conf[adm].irq)
+ if (!dmov_conf[adm].sd_size)
return -ENXIO;
+ if (!irqres || !irqres->start)
+ return -ENXIO;
+ dmov_conf[adm].irq = irqres->start;
+
+ if (!mres || !mres->start)
+ return -ENXIO;
+ dmov_conf[adm].base = ioremap_nocache(mres->start, resource_size(mres));
+ if (!dmov_conf[adm].base)
+ return -ENOMEM;
+
ret = request_irq(dmov_conf[adm].irq, msm_datamover_irq_handler,
0, "msmdatamover", NULL);
if (ret) {
PRINT_ERROR("Requesting ADM%d irq %d failed\n", adm,
dmov_conf[adm].irq);
- return ret;
+ goto out_map;
}
disable_irq(dmov_conf[adm].irq);
ret = msm_dmov_init_clocks(pdev);
if (ret) {
PRINT_ERROR("Requesting ADM%d clocks failed\n", adm);
- return -ENOENT;
+ goto out_irq;
}
ret = msm_dmov_clk_toggle(adm, 1);
if (ret) {
PRINT_ERROR("Enabling ADM%d clocks failed\n", adm);
- return -ENOENT;
+ goto out_irq;
}
config_datamover(adm);
@@ -661,6 +677,11 @@
wmb();
msm_dmov_clk_toggle(adm, 0);
return ret;
+out_irq:
+ free_irq(dmov_conf[adm].irq, NULL);
+out_map:
+ iounmap(dmov_conf[adm].base);
+ return ret;
}
static struct platform_driver msm_dmov_driver = {
diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h
index 349b2d0..bc41915 100644
--- a/arch/arm/mach-msm/include/mach/board.h
+++ b/arch/arm/mach-msm/include/mach/board.h
@@ -415,6 +415,7 @@
void __init msm_map_qsd8x50_io(void);
void __init msm_map_msm8x60_io(void);
void __init msm_map_msm8960_io(void);
+void __init msm_map_msm8930_io(void);
void __init msm_map_apq8064_io(void);
void __init msm_map_msm7x30_io(void);
void __init msm_map_fsm9xxx_io(void);
diff --git a/arch/arm/mach-msm/include/mach/dma-fsm9xxx.h b/arch/arm/mach-msm/include/mach/dma-fsm9xxx.h
index 300ee87..e284267 100644
--- a/arch/arm/mach-msm/include/mach/dma-fsm9xxx.h
+++ b/arch/arm/mach-msm/include/mach/dma-fsm9xxx.h
@@ -13,12 +13,6 @@
#ifndef __ASM_ARCH_MSM_DMA_FSM9XXX_H
#define __ASM_ARCH_MSM_DMA_FSM9XXX_H
-#define DMOV_SD_SIZE 0x1400
-#define DMOV_SD_MASTER 0
-#define DMOV_SD_AARM 3
-#define DMOV_SD_MASTER_ADDR(off, ch) DMOV_ADDR(off, ch, DMOV_SD_MASTER)
-#define DMOV_SD_AARM_ADDR(off, ch) DMOV_ADDR(off, ch, DMOV_SD_AARM)
-
/* DMA channels allocated to Scorpion */
#define DMOV_GP_CHAN 4
#define DMOV_CE1_IN_CHAN 5
diff --git a/arch/arm/mach-msm/include/mach/dma.h b/arch/arm/mach-msm/include/mach/dma.h
index 9c331a4..1474fcb 100644
--- a/arch/arm/mach-msm/include/mach/dma.h
+++ b/arch/arm/mach-msm/include/mach/dma.h
@@ -38,6 +38,11 @@
void *user; /* Pointer for caller's reference */
};
+struct msm_dmov_pdata {
+ int sd;
+ size_t sd_size;
+};
+
void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd);
void msm_dmov_enqueue_cmd_ext(unsigned id, struct msm_dmov_cmd *cmd);
void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful);
@@ -46,64 +51,37 @@
#define DMOV_CRCIS_PER_CONF 10
-#define DMOV_ADDR(off, ch, sd) ((DMOV_SD_SIZE*(sd)) + (off) + ((ch) << 2))
-#define DMOV_SD0(off, ch) DMOV_ADDR(off, ch, 0)
-#define DMOV_SD1(off, ch) DMOV_ADDR(off, ch, 1)
-#define DMOV_SD2(off, ch) DMOV_ADDR(off, ch, 2)
-#define DMOV_SD3(off, ch) DMOV_ADDR(off, ch, 3)
+#define DMOV_ADDR(off, ch) ((off) + ((ch) << 2))
-#if defined(CONFIG_ARCH_MSM7X30)
-#define DMOV_SD_SIZE 0x400
-#define DMOV_SD_AARM 2
-#elif defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_MSM9615)
-#define DMOV_SD_SIZE 0x800
-#define DMOV_SD_AARM 1
-#elif defined(CONFIG_ARCH_APQ8064)
-#define DMOV_SD_SIZE 0x800
-#define DMOV_SD_AARM 0
-#elif defined(CONFIG_MSM_ADM3)
-#define DMOV_SD_SIZE 0x800
-#define DMOV_SD_MASTER 1
-#define DMOV_SD_AARM 1
-#define DMOV_SD_MASTER_ADDR(off, ch) DMOV_ADDR(off, ch, DMOV_SD_MASTER)
-#elif defined(CONFIG_ARCH_FSM9XXX)
-/* defined in dma-fsm9xxx.h */
-#else
-#define DMOV_SD_SIZE 0x400
-#define DMOV_SD_AARM 3
-#endif
-
-#define DMOV_SD_AARM_ADDR(off, ch) DMOV_ADDR(off, ch, DMOV_SD_AARM)
-
-#define DMOV_CMD_PTR(ch) DMOV_SD_AARM_ADDR(0x000, ch)
+#define DMOV_CMD_PTR(ch) DMOV_ADDR(0x000, ch)
#define DMOV_CMD_LIST (0 << 29) /* does not work */
#define DMOV_CMD_PTR_LIST (1 << 29) /* works */
#define DMOV_CMD_INPUT_CFG (2 << 29) /* untested */
#define DMOV_CMD_OUTPUT_CFG (3 << 29) /* untested */
#define DMOV_CMD_ADDR(addr) ((addr) >> 3)
-#define DMOV_RSLT(ch) DMOV_SD_AARM_ADDR(0x040, ch)
+#define DMOV_RSLT(ch) DMOV_ADDR(0x040, ch)
#define DMOV_RSLT_VALID (1 << 31) /* 0 == host has empties result fifo */
#define DMOV_RSLT_ERROR (1 << 3)
#define DMOV_RSLT_FLUSH (1 << 2)
#define DMOV_RSLT_DONE (1 << 1) /* top pointer done */
#define DMOV_RSLT_USER (1 << 0) /* command with FR force result */
-#define DMOV_FLUSH0(ch) DMOV_SD_AARM_ADDR(0x080, ch)
-#define DMOV_FLUSH1(ch) DMOV_SD_AARM_ADDR(0x0C0, ch)
-#define DMOV_FLUSH2(ch) DMOV_SD_AARM_ADDR(0x100, ch)
-#define DMOV_FLUSH3(ch) DMOV_SD_AARM_ADDR(0x140, ch)
-#define DMOV_FLUSH4(ch) DMOV_SD_AARM_ADDR(0x180, ch)
-#define DMOV_FLUSH5(ch) DMOV_SD_AARM_ADDR(0x1C0, ch)
+#define DMOV_FLUSH0(ch) DMOV_ADDR(0x080, ch)
+#define DMOV_FLUSH1(ch) DMOV_ADDR(0x0C0, ch)
+#define DMOV_FLUSH2(ch) DMOV_ADDR(0x100, ch)
+#define DMOV_FLUSH3(ch) DMOV_ADDR(0x140, ch)
+#define DMOV_FLUSH4(ch) DMOV_ADDR(0x180, ch)
+#define DMOV_FLUSH5(ch) DMOV_ADDR(0x1C0, ch)
#define DMOV_FLUSH_TYPE (1 << 31)
-#define DMOV_STATUS(ch) DMOV_SD_AARM_ADDR(0x200, ch)
+#define DMOV_STATUS(ch) DMOV_ADDR(0x200, ch)
#define DMOV_STATUS_RSLT_COUNT(n) (((n) >> 29))
#define DMOV_STATUS_CMD_COUNT(n) (((n) >> 27) & 3)
#define DMOV_STATUS_RSLT_VALID (1 << 1)
#define DMOV_STATUS_CMD_PTR_RDY (1 << 0)
-#define DMOV_CONF(ch) DMOV_SD_MASTER_ADDR(0x240, ch)
+#define DMOV_CONF(ch) DMOV_ADDR(0x240, ch)
#define DMOV_CONF_SD(sd) (((sd & 4) << 11) | ((sd & 3) << 4))
#define DMOV_CONF_IRQ_EN (1 << 6)
#define DMOV_CONF_FORCE_RSLT_EN (1 << 7)
@@ -111,28 +89,28 @@
#define DMOV_CONF_MPU_DISABLE (1 << 11)
#define DMOV_CONF_PRIORITY(n) (n << 0)
-#define DMOV_DBG_ERR(ci) DMOV_SD_MASTER_ADDR(0x280, ci)
+#define DMOV_DBG_ERR(ci) DMOV_ADDR(0x280, ci)
-#define DMOV_RSLT_CONF(ch) DMOV_SD_AARM_ADDR(0x300, ch)
+#define DMOV_RSLT_CONF(ch) DMOV_ADDR(0x300, ch)
#define DMOV_RSLT_CONF_FORCE_TOP_PTR_RSLT (1 << 2)
#define DMOV_RSLT_CONF_FORCE_FLUSH_RSLT (1 << 1)
#define DMOV_RSLT_CONF_IRQ_EN (1 << 0)
-#define DMOV_ISR DMOV_SD_AARM_ADDR(0x380, 0)
+#define DMOV_ISR DMOV_ADDR(0x380, 0)
-#define DMOV_CI_CONF(ci) DMOV_SD_MASTER_ADDR(0x390, ci)
+#define DMOV_CI_CONF(ci) DMOV_ADDR(0x390, ci)
#define DMOV_CI_CONF_RANGE_END(n) ((n) << 24)
#define DMOV_CI_CONF_RANGE_START(n) ((n) << 16)
#define DMOV_CI_CONF_MAX_BURST(n) ((n) << 0)
-#define DMOV_CI_DBG_ERR(ci) DMOV_SD_MASTER_ADDR(0x3B0, ci)
+#define DMOV_CI_DBG_ERR(ci) DMOV_ADDR(0x3B0, ci)
-#define DMOV_CRCI_CONF0 DMOV_SD_MASTER_ADDR(0x3D0, 0)
-#define DMOV_CRCI_CONF1 DMOV_SD_MASTER_ADDR(0x3D4, 0)
+#define DMOV_CRCI_CONF0 DMOV_ADDR(0x3D0, 0)
+#define DMOV_CRCI_CONF1 DMOV_ADDR(0x3D4, 0)
#define DMOV_CRCI_CONF0_SD(crci, sd) (sd << (crci*3))
#define DMOV_CRCI_CONF1_SD(crci, sd) (sd << ((crci-DMOV_CRCIS_PER_CONF)*3))
-#define DMOV_CRCI_CTL(crci) DMOV_SD_AARM_ADDR(0x400, crci)
+#define DMOV_CRCI_CTL(crci) DMOV_ADDR(0x400, crci)
#define DMOV_CRCI_CTL_BLK_SZ(n) ((n) << 0)
#define DMOV_CRCI_CTL_RST (1 << 17)
#define DMOV_CRCI_MUX (1 << 18)
diff --git a/arch/arm/mach-msm/include/mach/irqs-8930.h b/arch/arm/mach-msm/include/mach/irqs-8930.h
new file mode 100644
index 0000000..ed927bd
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/irqs-8930.h
@@ -0,0 +1,292 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_MSM_IRQS_8930_H
+#define __ASM_ARCH_MSM_IRQS_8930_H
+
+/* MSM ACPU Interrupt Numbers */
+
+/* 0-15: STI/SGI (software triggered/generated interrupts)
+ 16-31: PPI (private peripheral interrupts)
+ 32+: SPI (shared peripheral interrupts) */
+
+#define GIC_PPI_START 16
+#define GIC_SPI_START 32
+
+#define INT_VGIC (GIC_PPI_START + 0)
+#define INT_DEBUG_TIMER_EXP (GIC_PPI_START + 1)
+#define INT_GP_TIMER_EXP (GIC_PPI_START + 2)
+#define INT_GP_TIMER2_EXP (GIC_PPI_START + 3)
+#define WDT0_ACCSCSSNBARK_INT (GIC_PPI_START + 4)
+#define WDT1_ACCSCSSNBARK_INT (GIC_PPI_START + 5)
+#define AVS_SVICINT (GIC_PPI_START + 6)
+#define AVS_SVICINTSWDONE (GIC_PPI_START + 7)
+#define CPU_DBGCPUXCOMMRXFULL (GIC_PPI_START + 8)
+#define CPU_DBGCPUXCOMMTXEMPTY (GIC_PPI_START + 9)
+#define INT_ARMQC_PERFMON (GIC_PPI_START + 10)
+#define SC_AVSCPUXDOWN (GIC_PPI_START + 11)
+#define SC_AVSCPUXUP (GIC_PPI_START + 12)
+#define SC_SICCPUXACGIRPTREQ (GIC_PPI_START + 13)
+#define SC_SICCPUXEXTFAULTIRPTREQ (GIC_PPI_START + 14)
+/* PPI 15 is unused */
+
+#define APCC_QGICACGIRPTREQ (GIC_SPI_START + 0)
+#define APCC_QGICL2PERFMONIRPTREQ (GIC_SPI_START + 1)
+#define SC_SICL2PERFMONIRPTREQ APCC_QGICL2PERFMONIRPTREQ
+#define APCC_QGICL2IRPTREQ (GIC_SPI_START + 2)
+#define APCC_QGICMPUIRPTREQ (GIC_SPI_START + 3)
+#define TLMM_MSM_DIR_CONN_IRQ_0 (GIC_SPI_START + 4)
+#define TLMM_MSM_DIR_CONN_IRQ_1 (GIC_SPI_START + 5)
+#define TLMM_MSM_DIR_CONN_IRQ_2 (GIC_SPI_START + 6)
+#define TLMM_MSM_DIR_CONN_IRQ_3 (GIC_SPI_START + 7)
+#define TLMM_MSM_DIR_CONN_IRQ_4 (GIC_SPI_START + 8)
+#define TLMM_MSM_DIR_CONN_IRQ_5 (GIC_SPI_START + 9)
+#define TLMM_MSM_DIR_CONN_IRQ_6 (GIC_SPI_START + 10)
+#define TLMM_MSM_DIR_CONN_IRQ_7 (GIC_SPI_START + 11)
+#define TLMM_MSM_DIR_CONN_IRQ_8 (GIC_SPI_START + 12)
+#define TLMM_MSM_DIR_CONN_IRQ_9 (GIC_SPI_START + 13)
+#define PM8921_SEC_IRQ_103 (GIC_SPI_START + 14)
+#define PM8018_SEC_IRQ_106 (GIC_SPI_START + 15)
+#define TLMM_MSM_SUMMARY_IRQ (GIC_SPI_START + 16)
+#define SPDM_RT_1_IRQ (GIC_SPI_START + 17)
+#define SPDM_DIAG_IRQ (GIC_SPI_START + 18)
+#define RPM_APCC_CPU0_GP_HIGH_IRQ (GIC_SPI_START + 19)
+#define RPM_APCC_CPU0_GP_MEDIUM_IRQ (GIC_SPI_START + 20)
+#define RPM_APCC_CPU0_GP_LOW_IRQ (GIC_SPI_START + 21)
+#define RPM_APCC_CPU0_WAKE_UP_IRQ (GIC_SPI_START + 22)
+#define RPM_APCC_CPU1_GP_HIGH_IRQ (GIC_SPI_START + 23)
+#define RPM_APCC_CPU1_GP_MEDIUM_IRQ (GIC_SPI_START + 24)
+#define RPM_APCC_CPU1_GP_LOW_IRQ (GIC_SPI_START + 25)
+#define RPM_APCC_CPU1_WAKE_UP_IRQ (GIC_SPI_START + 26)
+#define SSBI2_2_SC_CPU0_SECURE_IRQ (GIC_SPI_START + 27)
+#define SSBI2_2_SC_CPU0_NON_SECURE_IRQ (GIC_SPI_START + 28)
+#define SSBI2_1_SC_CPU0_SECURE_IRQ (GIC_SPI_START + 29)
+#define SSBI2_1_SC_CPU0_NON_SECURE_IRQ (GIC_SPI_START + 30)
+#define MSMC_SC_SEC_CE_IRQ (GIC_SPI_START + 31)
+#define MSMC_SC_PRI_CE_IRQ (GIC_SPI_START + 32)
+#define SLIMBUS0_CORE_EE1_IRQ (GIC_SPI_START + 33)
+#define SLIMBUS0_BAM_EE1_IRQ (GIC_SPI_START + 34)
+#define Q6FW_WDOG_EXPIRED_IRQ (GIC_SPI_START + 35)
+#define Q6SW_WDOG_EXPIRED_IRQ (GIC_SPI_START + 36)
+#define MSS_TO_APPS_IRQ_0 (GIC_SPI_START + 37)
+#define MSS_TO_APPS_IRQ_1 (GIC_SPI_START + 38)
+#define MSS_TO_APPS_IRQ_2 (GIC_SPI_START + 39)
+#define MSS_TO_APPS_IRQ_3 (GIC_SPI_START + 40)
+#define MSS_TO_APPS_IRQ_4 (GIC_SPI_START + 41)
+#define MSS_TO_APPS_IRQ_5 (GIC_SPI_START + 42)
+#define MSS_TO_APPS_IRQ_6 (GIC_SPI_START + 43)
+#define MSS_TO_APPS_IRQ_7 (GIC_SPI_START + 44)
+#define MSS_TO_APPS_IRQ_8 (GIC_SPI_START + 45)
+#define MSS_TO_APPS_IRQ_9 (GIC_SPI_START + 46)
+#define VPE_IRQ (GIC_SPI_START + 47)
+#define VFE_IRQ (GIC_SPI_START + 48)
+#define VCODEC_IRQ (GIC_SPI_START + 49)
+/* SPI IRQ 50 is unused */
+#define SMMU_VPE_CB_SC_SECURE_IRQ (GIC_SPI_START + 51)
+#define SMMU_VPE_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 52)
+#define SMMU_VFE_CB_SC_SECURE_IRQ (GIC_SPI_START + 53)
+#define SMMU_VFE_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 54)
+#define SMMU_VCODEC_B_CB_SC_SECURE_IRQ (GIC_SPI_START + 55)
+#define SMMU_VCODEC_B_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 56)
+#define SMMU_VCODEC_A_CB_SC_SECURE_IRQ (GIC_SPI_START + 57)
+#define SMMU_VCODEC_A_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 58)
+#define SMMU_ROT_CB_SC_SECURE_IRQ (GIC_SPI_START + 59)
+#define SMMU_ROT_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 60)
+#define SMMU_MDP1_CB_SC_SECURE_IRQ (GIC_SPI_START + 61)
+#define SMMU_MDP1_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 62)
+#define SMMU_MDP0_CB_SC_SECURE_IRQ (GIC_SPI_START + 63)
+#define SMMU_MDP0_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 64)
+/* SPI IRQ 65 is unused */
+/* SPI IRQ 66 is unused */
+#define SMMU_IJPEG_CB_SC_SECURE_IRQ (GIC_SPI_START + 67)
+#define SMMU_IJPEG_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 68)
+#define SMMU_GFX3D_CB_SC_SECURE_IRQ (GIC_SPI_START + 69)
+#define SMMU_GFX3D_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 70)
+/* SPI IRQ 71 is unused */
+/* SPI IRQ 72 is unused */
+#define ROT_IRQ (GIC_SPI_START + 73)
+#define MMSS_FABRIC_IRQ (GIC_SPI_START + 74)
+#define MDP_IRQ (GIC_SPI_START + 75)
+/* SPI IRQ 76 is unused */
+#define JPEG_IRQ (GIC_SPI_START + 77)
+#define MMSS_IMEM_IRQ (GIC_SPI_START + 78)
+#define HDMI_IRQ (GIC_SPI_START + 79)
+#define GFX3D_IRQ (GIC_SPI_START + 80)
+/* SPI IRQ 81 is unused */
+#define DSI1_IRQ (GIC_SPI_START + 82)
+#define CSI_1_IRQ (GIC_SPI_START + 83)
+#define CSI_0_IRQ (GIC_SPI_START + 84)
+#define LPASS_SCSS_AUDIO_IF_OUT0_IRQ (GIC_SPI_START + 85)
+#define LPASS_SCSS_MIDI_IRQ (GIC_SPI_START + 86)
+#define LPASS_Q6SS_WDOG_EXPIRED (GIC_SPI_START + 87)
+#define LPASS_SCSS_GP_LOW_IRQ (GIC_SPI_START + 88)
+#define LPASS_SCSS_GP_MEDIUM_IRQ (GIC_SPI_START + 89)
+#define LPASS_SCSS_GP_HIGH_IRQ (GIC_SPI_START + 90)
+#define TOP_IMEM_IRQ (GIC_SPI_START + 91)
+#define FABRIC_SYS_IRQ (GIC_SPI_START + 92)
+#define FABRIC_APPS_IRQ (GIC_SPI_START + 93)
+#define USB1_HS_BAM_IRQ (GIC_SPI_START + 94)
+#define SDC4_BAM_IRQ (GIC_SPI_START + 95)
+#define SDC3_BAM_IRQ (GIC_SPI_START + 96)
+#define SDC2_BAM_IRQ (GIC_SPI_START + 97)
+#define SDC1_BAM_IRQ (GIC_SPI_START + 98)
+#define FABRIC_SPS_IRQ (GIC_SPI_START + 99)
+#define USB1_HS_IRQ (GIC_SPI_START + 100)
+#define SDC4_IRQ_0 (GIC_SPI_START + 101)
+#define SDC3_IRQ_0 (GIC_SPI_START + 102)
+#define SDC2_IRQ_0 (GIC_SPI_START + 103)
+#define SDC1_IRQ_0 (GIC_SPI_START + 104)
+#define SPS_BAM_DMA_IRQ (GIC_SPI_START + 105)
+#define SPS_SEC_VIOL_IRQ (GIC_SPI_START + 106)
+#define SPS_MTI_0 (GIC_SPI_START + 107)
+#define SPS_MTI_1 (GIC_SPI_START + 108)
+#define SPS_MTI_2 (GIC_SPI_START + 109)
+#define SPS_MTI_3 (GIC_SPI_START + 110)
+#define GPS_PPS_OUT (GIC_SPI_START + 111)
+#define SPS_MTI_5 (GIC_SPI_START + 112)
+#define SPS_MTI_6 (GIC_SPI_START + 113)
+#define SPS_MTI_7 (GIC_SPI_START + 114)
+#define SPS_MTI_8 (GIC_SPI_START + 115)
+#define TLMM_MSM_DIR_CONN_IRQ_11 (GIC_SPI_START + 116)
+#define TLMM_MSM_DIR_CONN_IRQ_10 (GIC_SPI_START + 117)
+#define BAM_DMA1 (GIC_SPI_START + 118)
+#define BAM_DMA2 (GIC_SPI_START + 119)
+#define SDC1_IRQ (GIC_SPI_START + 120)
+#define SDC2_IRQ (GIC_SPI_START + 121)
+#define SDC3_IRQ (GIC_SPI_START + 122)
+#define SPS_MTI_16 (GIC_SPI_START + 123)
+#define SPS_MTI_17 (GIC_SPI_START + 124)
+#define SPS_MTI_18 (GIC_SPI_START + 125)
+#define SPS_MTI_19 (GIC_SPI_START + 126)
+#define SPS_MTI_20 (GIC_SPI_START + 127)
+#define SPS_MTI_21 (GIC_SPI_START + 128)
+#define SPS_MTI_22 (GIC_SPI_START + 129)
+#define SPS_MTI_23 (GIC_SPI_START + 130)
+#define SPS_MTI_24 (GIC_SPI_START + 131)
+#define SPS_MTI_25 (GIC_SPI_START + 132)
+#define SPS_MTI_26 (GIC_SPI_START + 133)
+#define SPS_MTI_27 (GIC_SPI_START + 134)
+#define SPS_MTI_28 (GIC_SPI_START + 135)
+#define SPS_MTI_29 (GIC_SPI_START + 136)
+#define SPS_MTI_30 (GIC_SPI_START + 137)
+#define SPS_MTI_31 (GIC_SPI_START + 138)
+#define CSIPHY_4LN_IRQ (GIC_SPI_START + 139)
+#define MSM8930_CSIPHY_2LN_IRQ (GIC_SPI_START + 140)
+#define USB2_IRQ (GIC_SPI_START + 141)
+#define USB1_IRQ (GIC_SPI_START + 142)
+#define TSSC_SSBI_IRQ (GIC_SPI_START + 143)
+#define TSSC_SAMPLE_IRQ (GIC_SPI_START + 144)
+#define TSSC_PENUP_IRQ (GIC_SPI_START + 145)
+#define MSM8930_GSBI1_UARTDM_IRQ (GIC_SPI_START + 146)
+#define MSM8930_GSBI1_QUP_IRQ (GIC_SPI_START + 147)
+#define MSM8930_GSBI2_UARTDM_IRQ (GIC_SPI_START + 148)
+#define MSM8930_GSBI2_QUP_IRQ (GIC_SPI_START + 149)
+#define GSBI3_UARTDM_IRQ (GIC_SPI_START + 150)
+#define GSBI3_QUP_IRQ (GIC_SPI_START + 151)
+#define GSBI4_UARTDM_IRQ (GIC_SPI_START + 152)
+#define GSBI4_QUP_IRQ (GIC_SPI_START + 153)
+#define GSBI5_UARTDM_IRQ (GIC_SPI_START + 154)
+#define GSBI5_QUP_IRQ (GIC_SPI_START + 155)
+#define GSBI6_UARTDM_IRQ (GIC_SPI_START + 156)
+#define GSBI6_QUP_IRQ (GIC_SPI_START + 157)
+#define GSBI7_UARTDM_IRQ (GIC_SPI_START + 158)
+#define GSBI7_QUP_IRQ (GIC_SPI_START + 159)
+#define GSBI8_UARTDM_IRQ (GIC_SPI_START + 160)
+#define GSBI8_QUP_IRQ (GIC_SPI_START + 161)
+#define TSIF_TSPP_IRQ (GIC_SPI_START + 162)
+#define TSIF_BAM_IRQ (GIC_SPI_START + 163)
+#define TSIF2_IRQ (GIC_SPI_START + 164)
+#define TSIF1_IRQ (GIC_SPI_START + 165)
+/* SPI IRQ 166 is unused */
+#define ISPIF_IRQ (GIC_SPI_START + 167)
+#define MSMC_SC_SEC_TMR_IRQ (GIC_SPI_START + 168)
+#define MSMC_SC_SEC_WDOG_BARK_IRQ (GIC_SPI_START + 169)
+#define ADM_0_SCSS_0_IRQ (GIC_SPI_START + 170)
+#define ADM_0_SCSS_1_IRQ (GIC_SPI_START + 171)
+#define ADM_0_SCSS_2_IRQ (GIC_SPI_START + 172)
+#define ADM_0_SCSS_3_IRQ (GIC_SPI_START + 173)
+#define CC_SCSS_WDT1CPU1BITEEXPIRED (GIC_SPI_START + 174)
+#define CC_SCSS_WDT1CPU0BITEEXPIRED (GIC_SPI_START + 175)
+#define CC_SCSS_WDT0CPU1BITEEXPIRED (GIC_SPI_START + 176)
+#define CC_SCSS_WDT0CPU0BITEEXPIRED (GIC_SPI_START + 177)
+#define TSENS_UPPER_LOWER_INT (GIC_SPI_START + 178)
+#define SSBI2_2_SC_CPU1_SECURE_INT (GIC_SPI_START + 179)
+#define SSBI2_2_SC_CPU1_NON_SECURE_INT (GIC_SPI_START + 180)
+#define SSBI2_1_SC_CPU1_SECURE_INT (GIC_SPI_START + 181)
+#define SSBI2_1_SC_CPU1_NON_SECURE_INT (GIC_SPI_START + 182)
+#define XPU_SUMMARY_IRQ (GIC_SPI_START + 183)
+#define BUS_EXCEPTION_SUMMARY_IRQ (GIC_SPI_START + 184)
+#define HSDDRX_EBI1CH0_IRQ (GIC_SPI_START + 185)
+/* SPI IRQ 186 is unused */
+#define SDC5_BAM_IRQ (GIC_SPI_START + 187)
+#define SDC5_IRQ_0 (GIC_SPI_START + 188)
+#define GSBI9_UARTDM_IRQ (GIC_SPI_START + 189)
+#define GSBI9_QUP_IRQ (GIC_SPI_START + 190)
+#define GSBI10_UARTDM_IRQ (GIC_SPI_START + 191)
+#define GSBI10_QUP_IRQ (GIC_SPI_START + 192)
+#define GSBI11_UARTDM_IRQ (GIC_SPI_START + 193)
+#define GSBI11_QUP_IRQ (GIC_SPI_START + 194)
+#define GSBI12_UARTDM_IRQ (GIC_SPI_START + 195)
+#define GSBI12_QUP_IRQ (GIC_SPI_START + 196)
+#define RIVA_APSS_LTECOEX_IRQ (GIC_SPI_START + 197)
+#define RIVA_APSS_SPARE_IRQ (GIC_SPI_START + 198)
+#define RIVA_APSS_WDOG_BITE_RESET_RDY_IRQ (GIC_SPI_START + 199)
+#define RIVA_APSS_RESET_DONE_IRQ (GIC_SPI_START + 200)
+#define RIVA_APSS_ASIC_IRQ (GIC_SPI_START + 201)
+#define RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ (GIC_SPI_START + 202)
+#define RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ (GIC_SPI_START + 203)
+#define RIVA_APPS_WLAN_SMSM_IRQ (GIC_SPI_START + 204)
+#define RIVA_APPS_LOG_CTRL_IRQ (GIC_SPI_START + 205)
+#define RIVA_APPS_FM_CTRL_IRQ (GIC_SPI_START + 206)
+#define RIVA_APPS_HCI_IRQ (GIC_SPI_START + 207)
+#define RIVA_APPS_WLAN_CTRL_IRQ (GIC_SPI_START + 208)
+#define A2_BAM_IRQ (GIC_SPI_START + 209)
+/* SPI IRQ 210 is unused */
+/* SPI IRQ 211 is unused */
+/* SPI IRQ 212 is unused */
+#define PPSS_WDOG_TIMER_IRQ (GIC_SPI_START + 213)
+#define SPS_SLIMBUS_CORE_EE0_IRQ (GIC_SPI_START + 214)
+#define SPS_SLIMBUS_BAM_EE0_IRQ (GIC_SPI_START + 215)
+#define QDSS_ETB_IRQ (GIC_SPI_START + 216)
+#define QDSS_CTI2KPSS_CPU1_IRQ (GIC_SPI_START + 217)
+#define QDSS_CTI2KPSS_CPU0_IRQ (GIC_SPI_START + 218)
+#define TLMM_MSM_DIR_CONN_IRQ_16 (GIC_SPI_START + 219)
+#define TLMM_MSM_DIR_CONN_IRQ_17 (GIC_SPI_START + 220)
+#define TLMM_MSM_DIR_CONN_IRQ_18 (GIC_SPI_START + 221)
+#define TLMM_MSM_DIR_CONN_IRQ_19 (GIC_SPI_START + 222)
+#define TLMM_MSM_DIR_CONN_IRQ_20 (GIC_SPI_START + 223)
+#define TLMM_MSM_DIR_CONN_IRQ_21 (GIC_SPI_START + 224)
+#define PM8921_SEC_IRQ_104 (GIC_SPI_START + 225)
+#define PM8018_SEC_IRQ_107 (GIC_SPI_START + 226)
+#define USB_HSIC_IRQ (GIC_SPI_START + 229)
+#define CE2_BAM_XPU_IRQ (GIC_SPI_START + 230)
+#define CE1_BAM_XPU_IRQ (GIC_SPI_START + 231)
+#define GFX3D_VBIF_IRPT (GIC_SPI_START + 232)
+#define RBIF_IRQ_0 (GIC_SPI_START + 233)
+#define RBIF_IRQ_1 (GIC_SPI_START + 234)
+#define RBIF_IRQ_2 (GIC_SPI_START + 235)
+
+/* Backwards compatible IRQ macros. */
+#define INT_ADM_AARM ADM_0_SCSS_0_IRQ
+
+/* smd/smsm interrupts */
+#define INT_A9_M2A_0 (GIC_SPI_START + 37) /*MSS_TO_APPS_IRQ_0*/
+#define INT_A9_M2A_5 (GIC_SPI_START + 38) /*MSS_TO_APPS_IRQ_1*/
+#define INT_ADSP_A11 LPASS_SCSS_GP_HIGH_IRQ
+#define INT_ADSP_A11_SMSM LPASS_SCSS_GP_MEDIUM_IRQ
+#define INT_DSPS_A11 SPS_MTI_31
+#define INT_DSPS_A11_SMSM SPS_MTI_30
+#define INT_WCNSS_A11 RIVA_APSS_SPARE_IRQ
+#define INT_WCNSS_A11_SMSM RIVA_APPS_WLAN_SMSM_IRQ
+
+#endif
+
diff --git a/arch/arm/mach-msm/include/mach/irqs.h b/arch/arm/mach-msm/include/mach/irqs.h
index f38eddb..b086bff 100644
--- a/arch/arm/mach-msm/include/mach/irqs.h
+++ b/arch/arm/mach-msm/include/mach/irqs.h
@@ -19,12 +19,17 @@
#define MSM_IRQ_BIT(irq) (1 << ((irq) & 31))
-#if defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_APQ8064)
+#if defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_APQ8064) || \
+ defined(CONFIG_ARCH_MSM8930)
#ifdef CONFIG_ARCH_MSM8960
#include "irqs-8960.h"
#endif
+#ifdef CONFIG_ARCH_MSM8930
+#include "irqs-8930.h"
+#endif
+
#ifdef CONFIG_ARCH_APQ8064
#include "irqs-8064.h"
#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
index 571391b..d1aef0a 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
@@ -58,10 +58,6 @@
#define MSM_GPT_BASE MSM_TMR_BASE
#define MSM_DGT_BASE (MSM_TMR_BASE + 0x10)
-#define MSM_DMOV_BASE IOMEM(0xF8002000)
-#define MSM_DMOV_PHYS 0xA9700000
-#define MSM_DMOV_SIZE SZ_4K
-
#define MSM_GPIO1_BASE IOMEM(0xF8003000)
#define MSM_GPIO1_PHYS 0xA9200000
#define MSM_GPIO1_SIZE SZ_4K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
index fce9e35..e49e870 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
@@ -47,10 +47,6 @@
#define MSM_TMR_BASE MSM_CSR_BASE
#define MSM_TMR_SIZE SZ_4K
-#define MSM_DMOV_BASE IOMEM(0xFA002000)
-#define MSM_DMOV_PHYS 0xAC400000
-#define MSM_DMOV_SIZE SZ_4K
-
#define MSM_GPIO1_BASE IOMEM(0xFA003000)
#define MSM_GPIO1_PHYS 0xAC001000
#define MSM_GPIO1_SIZE SZ_4K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h b/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h
index 1fb9d0e..da0c54c 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h
@@ -47,10 +47,6 @@
#define MSM_TMR_BASE MSM_CSR_BASE
#define MSM_TMR_SIZE SZ_4K
-#define MSM_DMOV_BASE IOMEM(0xFA002000)
-#define MSM_DMOV_PHYS 0xA9700000
-#define MSM_DMOV_SIZE SZ_4K
-
#define MSM_GPIO1_BASE IOMEM(0xFA003000)
#define MSM_GPIO1_PHYS 0xA9200000
#define MSM_GPIO1_SIZE SZ_4K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8064.h b/arch/arm/mach-msm/include/mach/msm_iomap-8064.h
index 665ccd0..7f5bd75 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8064.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8064.h
@@ -44,9 +44,6 @@
#define APQ8064_QGIC_CPU_PHYS 0x02002000
#define APQ8064_QGIC_CPU_SIZE SZ_4K
-#define APQ8064_DMOV_PHYS 0x18300000
-#define APQ8064_DMOV_SIZE SZ_1M
-
#define APQ8064_TLMM_PHYS 0x00800000
#define APQ8064_TLMM_SIZE SZ_16K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8930.h b/arch/arm/mach-msm/include/mach/msm_iomap-8930.h
new file mode 100644
index 0000000..8e50824
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8930.h
@@ -0,0 +1,116 @@
+/*
+ * Copyright (C) 2007 Google, Inc.
+ * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
+ * Author: Brian Swetland <swetland@google.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ *
+ * The MSM peripherals are spread all over across 768MB of physical
+ * space, which makes just having a simple IO_ADDRESS macro to slide
+ * them into the right virtual location rough. Instead, we will
+ * provide a master phys->virt mapping for peripherals here.
+ *
+ */
+
+#ifndef __ASM_ARCH_MSM_IOMAP_8930_H
+#define __ASM_ARCH_MSM_IOMAP_8930_H
+
+/* Physical base address and size of peripherals.
+ * Ordered by the virtual base addresses they will be mapped at.
+ *
+ * If you add or remove entries here, you'll want to edit the
+ * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
+ * changes.
+ *
+ */
+
+#define MSM8930_TMR_PHYS 0x0200A000
+#define MSM8930_TMR_SIZE SZ_4K
+
+#define MSM8930_TMR0_PHYS 0x0208A000
+#define MSM8930_TMR0_SIZE SZ_4K
+
+#define MSM8930_RPM_PHYS 0x00108000
+#define MSM8930_RPM_SIZE SZ_4K
+
+#define MSM8930_RPM_MPM_PHYS 0x00200000
+#define MSM8930_RPM_MPM_SIZE SZ_4K
+
+#define MSM8930_TCSR_PHYS 0x1A400000
+#define MSM8930_TCSR_SIZE SZ_4K
+
+#define MSM8930_APCS_GCC_PHYS 0x02011000
+#define MSM8930_APCS_GCC_SIZE SZ_4K
+
+#define MSM8930_SAW_L2_PHYS 0x02012000
+#define MSM8930_SAW_L2_SIZE SZ_4K
+
+#define MSM8930_SAW0_PHYS 0x02089000
+#define MSM8930_SAW0_SIZE SZ_4K
+
+#define MSM8930_SAW1_PHYS 0x02099000
+#define MSM8930_SAW1_SIZE SZ_4K
+
+#define MSM8930_IMEM_PHYS 0x2A03F000
+#define MSM8930_IMEM_SIZE SZ_4K
+
+#define MSM8930_ACC0_PHYS 0x02088000
+#define MSM8930_ACC0_SIZE SZ_4K
+
+#define MSM8930_ACC1_PHYS 0x02098000
+#define MSM8930_ACC1_SIZE SZ_4K
+
+#define MSM8930_QGIC_DIST_PHYS 0x02000000
+#define MSM8930_QGIC_DIST_SIZE SZ_4K
+
+#define MSM8930_QGIC_CPU_PHYS 0x02002000
+#define MSM8930_QGIC_CPU_SIZE SZ_4K
+
+#define MSM8930_CLK_CTL_PHYS 0x00900000
+#define MSM8930_CLK_CTL_SIZE SZ_16K
+
+#define MSM8930_MMSS_CLK_CTL_PHYS 0x04000000
+#define MSM8930_MMSS_CLK_CTL_SIZE SZ_4K
+
+#define MSM8930_LPASS_CLK_CTL_PHYS 0x28000000
+#define MSM8930_LPASS_CLK_CTL_SIZE SZ_4K
+
+#define MSM8930_HFPLL_PHYS 0x00903000
+#define MSM8930_HFPLL_SIZE SZ_4K
+
+#define MSM8930_TLMM_PHYS 0x00800000
+#define MSM8930_TLMM_SIZE SZ_16K
+
+#define MSM8930_DMOV_PHYS 0x18320000
+#define MSM8930_DMOV_SIZE SZ_1M
+
+#define MSM8930_SIC_NON_SECURE_PHYS 0x12100000
+#define MSM8930_SIC_NON_SECURE_SIZE SZ_64K
+
+#define MSM_GPT_BASE (MSM_TMR_BASE + 0x4)
+#define MSM_DGT_BASE (MSM_TMR_BASE + 0x24)
+
+#define MSM8930_HDMI_PHYS 0x04A00000
+#define MSM8930_HDMI_SIZE SZ_4K
+
+#ifdef CONFIG_MSM_DEBUG_UART
+#define MSM_DEBUG_UART_BASE IOMEM(0xFA740000)
+#define MSM_DEBUG_UART_SIZE SZ_4K
+
+#ifdef CONFIG_MSM_DEBUG_UART1
+#define MSM_DEBUG_UART_PHYS 0x16440000
+#endif
+#endif
+
+#define MSM8930_QFPROM_PHYS 0x00700000
+#define MSM8930_QFPROM_SIZE SZ_4K
+
+#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
index 56cbd2f..24505ae 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
@@ -89,9 +89,6 @@
#define MSM8960_TLMM_PHYS 0x00800000
#define MSM8960_TLMM_SIZE SZ_16K
-#define MSM8960_DMOV_PHYS 0x18320000
-#define MSM8960_DMOV_SIZE SZ_1M
-
#define MSM8960_SIC_NON_SECURE_PHYS 0x12100000
#define MSM8960_SIC_NON_SECURE_SIZE SZ_64K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
index cab4027..a073d6a 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
@@ -47,10 +47,6 @@
#define MSM_TMR_BASE MSM_CSR_BASE
#define MSM_TMR_SIZE SZ_4K
-#define MSM_DMOV_BASE IOMEM(0xFA002000)
-#define MSM_DMOV_PHYS 0xA9700000
-#define MSM_DMOV_SIZE SZ_4K
-
#define MSM_GPIO1_BASE IOMEM(0xFA003000)
#define MSM_GPIO1_PHYS 0xA9000000
#define MSM_GPIO1_SIZE SZ_4K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
index 4b91733..c1cf221 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
@@ -106,14 +106,6 @@
#define MSM_SAW1_PHYS 0x02052000
#define MSM_SAW1_SIZE SZ_4K
-#define MSM_DMOV_ADM0_BASE IOMEM(0xFA400000)
-#define MSM_DMOV_ADM0_PHYS 0x18320000
-#define MSM_DMOV_ADM0_SIZE SZ_1M
-
-#define MSM_DMOV_ADM1_BASE IOMEM(0xFA500000)
-#define MSM_DMOV_ADM1_PHYS 0x18420000
-#define MSM_DMOV_ADM1_SIZE SZ_1M
-
#define MSM_SIC_NON_SECURE_BASE IOMEM(0xFA600000)
#define MSM_SIC_NON_SECURE_PHYS 0x12100000
#define MSM_SIC_NON_SECURE_SIZE SZ_64K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-9615.h b/arch/arm/mach-msm/include/mach/msm_iomap-9615.h
index e842f8e..dda5f50 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-9615.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-9615.h
@@ -41,9 +41,6 @@
#define MSM9615_QGIC_CPU_PHYS 0x02002000
#define MSM9615_QGIC_CPU_SIZE SZ_4K
-#define MSM9615_DMOV_PHYS 0x18320000
-#define MSM9615_DMOV_SIZE SZ_1M
-
#define MSM9615_TLMM_PHYS 0x00800000
#define MSM9615_TLMM_SIZE SZ_1M
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-fsm9xxx.h b/arch/arm/mach-msm/include/mach/msm_iomap-fsm9xxx.h
index 5261bcc..57bfd58 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-fsm9xxx.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-fsm9xxx.h
@@ -64,24 +64,6 @@
#define MSM_GRFC_PHYS 0x94038000
#define MSM_GRFC_SIZE SZ_4K
-#define MSM_DMOV_SD0_BASE IOMEM(0xFA00A000)
-#define MSM_DMOV_SD0_PHYS 0x94310000
-#define MSM_DMOV_SD0_SIZE SZ_4K
-
-#define MSM_DMOV_SD1_BASE IOMEM(0xFA00B000)
-#define MSM_DMOV_SD1_PHYS 0x94410000
-#define MSM_DMOV_SD1_SIZE SZ_4K
-
-#define MSM_DMOV_SD2_BASE IOMEM(0xFA00C000)
-#define MSM_DMOV_SD2_PHYS 0x94510000
-#define MSM_DMOV_SD2_SIZE SZ_4K
-
-#define MSM_DMOV_SD3_BASE IOMEM(0xFA00D000)
-#define MSM_DMOV_SD3_PHYS 0x94610000
-#define MSM_DMOV_SD3_SIZE SZ_4K
-
-#define MSM_DMOV_BASE MSM_DMOV_SD0_BASE
-
#define MSM_QFP_FUSE_BASE IOMEM(0xFA010000)
#define MSM_QFP_FUSE_PHYS 0x80000000
#define MSM_QFP_FUSE_SIZE SZ_32K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index df19606..426dbad 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -43,8 +43,8 @@
#define IOMEM(x) ((void __force __iomem *)(x))
#endif
-#if defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_APQ8064) \
- || defined(CONFIG_ARCH_MSM9615)
+#if defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_APQ8064) || \
+ defined(CONFIG_ARCH_MSM8930) || defined(CONFIG_ARCH_MSM9615)
/* Unified iomap */
#define MSM_TMR_BASE IOMEM(0xFA000000) /* 4K */
@@ -67,7 +67,6 @@
#define MSM_HFPLL_BASE IOMEM(0xFA016000) /* 4K */
#define MSM_TLMM_BASE IOMEM(0xFA017000) /* 16K */
#define MSM_SHARED_RAM_BASE IOMEM(0xFA300000) /* 2M */
-#define MSM_DMOV_BASE IOMEM(0xFA500000) /* 1M */
#define MSM_SIC_NON_SECURE_BASE IOMEM(0xFA600000) /* 64K */
#define MSM_HDMI_BASE IOMEM(0xFA800000) /* 4K */
#define MSM_RPM_BASE IOMEM(0xFA801000) /* 4K */
@@ -83,6 +82,7 @@
#endif
#include "msm_iomap-8960.h"
+#include "msm_iomap-8930.h"
#include "msm_iomap-8064.h"
#include "msm_iomap-9615.h"
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 3bb10fb..72acab8 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -61,7 +61,6 @@
MSM_DEVICE(VIC),
MSM_DEVICE(CSR),
MSM_DEVICE(TMR),
- MSM_DEVICE(DMOV),
MSM_DEVICE(GPIO1),
MSM_DEVICE(GPIO2),
MSM_DEVICE(CLK_CTL),
@@ -106,7 +105,6 @@
MSM_DEVICE(VIC),
MSM_DEVICE(CSR),
MSM_DEVICE(TMR),
- MSM_DEVICE(DMOV),
MSM_DEVICE(GPIO1),
MSM_DEVICE(GPIO2),
MSM_DEVICE(CLK_CTL),
@@ -145,8 +143,6 @@
MSM_DEVICE(SAW1),
MSM_DEVICE(GCC),
MSM_DEVICE(TLMM),
- MSM_DEVICE(DMOV_ADM0),
- MSM_DEVICE(DMOV_ADM1),
MSM_DEVICE(SCPLL),
MSM_DEVICE(RPM),
MSM_DEVICE(CLK_CTL),
@@ -186,7 +182,6 @@
MSM_CHIP_DEVICE(MMSS_CLK_CTL, MSM8960),
MSM_CHIP_DEVICE(LPASS_CLK_CTL, MSM8960),
MSM_CHIP_DEVICE(RPM, MSM8960),
- MSM_CHIP_DEVICE(DMOV, MSM8960),
MSM_CHIP_DEVICE(TLMM, MSM8960),
MSM_CHIP_DEVICE(HFPLL, MSM8960),
MSM_CHIP_DEVICE(SAW0, MSM8960),
@@ -213,13 +208,51 @@
}
#endif /* CONFIG_ARCH_MSM8960 */
+#ifdef CONFIG_ARCH_MSM8930
+static struct map_desc msm8930_io_desc[] __initdata = {
+ MSM_CHIP_DEVICE(QGIC_DIST, MSM8930),
+ MSM_CHIP_DEVICE(QGIC_CPU, MSM8930),
+ MSM_CHIP_DEVICE(ACC0, MSM8930),
+ MSM_CHIP_DEVICE(ACC1, MSM8930),
+ MSM_CHIP_DEVICE(TMR, MSM8930),
+ MSM_CHIP_DEVICE(TMR0, MSM8930),
+ MSM_CHIP_DEVICE(RPM_MPM, MSM8930),
+ MSM_CHIP_DEVICE(CLK_CTL, MSM8930),
+ MSM_CHIP_DEVICE(MMSS_CLK_CTL, MSM8930),
+ MSM_CHIP_DEVICE(LPASS_CLK_CTL, MSM8930),
+ MSM_CHIP_DEVICE(RPM, MSM8930),
+ MSM_CHIP_DEVICE(TLMM, MSM8930),
+ MSM_CHIP_DEVICE(HFPLL, MSM8930),
+ MSM_CHIP_DEVICE(SAW0, MSM8930),
+ MSM_CHIP_DEVICE(SAW1, MSM8930),
+ MSM_CHIP_DEVICE(SAW_L2, MSM8930),
+ MSM_CHIP_DEVICE(SIC_NON_SECURE, MSM8930),
+ MSM_CHIP_DEVICE(APCS_GCC, MSM8930),
+ MSM_CHIP_DEVICE(IMEM, MSM8930),
+ MSM_CHIP_DEVICE(HDMI, MSM8930),
+ {
+ .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
+ .length = MSM_SHARED_RAM_SIZE,
+ .type = MT_DEVICE,
+ },
+#ifdef CONFIG_MSM_DEBUG_UART
+ MSM_DEVICE(DEBUG_UART),
+#endif
+ MSM_CHIP_DEVICE(QFPROM, MSM8930),
+};
+
+void __init msm_map_msm8930_io(void)
+{
+ msm_map_io(msm8930_io_desc, ARRAY_SIZE(msm8930_io_desc));
+}
+#endif /* CONFIG_ARCH_MSM8930 */
+
#ifdef CONFIG_ARCH_APQ8064
static struct map_desc apq8064_io_desc[] __initdata = {
MSM_CHIP_DEVICE(QGIC_DIST, APQ8064),
MSM_CHIP_DEVICE(QGIC_CPU, APQ8064),
MSM_CHIP_DEVICE(TMR, APQ8064),
MSM_CHIP_DEVICE(TMR0, APQ8064),
- MSM_CHIP_DEVICE(DMOV, APQ8064),
MSM_CHIP_DEVICE(TLMM, APQ8064),
MSM_CHIP_DEVICE(ACC0, APQ8064),
MSM_CHIP_DEVICE(ACC1, APQ8064),
@@ -249,7 +282,6 @@
MSM_DEVICE(VIC),
MSM_DEVICE(CSR),
MSM_DEVICE(TMR),
- MSM_DEVICE(DMOV),
MSM_DEVICE(GPIO1),
MSM_DEVICE(GPIO2),
MSM_DEVICE(CLK_CTL),
@@ -288,10 +320,6 @@
MSM_DEVICE(SAW),
MSM_DEVICE(GCC),
MSM_DEVICE(GRFC),
- MSM_DEVICE(DMOV_SD0),
- MSM_DEVICE(DMOV_SD1),
- MSM_DEVICE(DMOV_SD2),
- MSM_DEVICE(DMOV_SD3),
MSM_DEVICE(QFP_FUSE),
MSM_DEVICE(HH),
#ifdef CONFIG_MSM_DEBUG_UART
@@ -316,7 +344,6 @@
MSM_CHIP_DEVICE(QGIC_CPU, MSM9615),
MSM_CHIP_DEVICE(ACC0, MSM9615),
MSM_CHIP_DEVICE(TMR, MSM9615),
- MSM_CHIP_DEVICE(DMOV, MSM9615),
MSM_CHIP_DEVICE(TLMM, MSM9615),
MSM_CHIP_DEVICE(SAW0, MSM9615),
MSM_CHIP_DEVICE(APCS_GCC, MSM9615),
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_pcm_in.c b/arch/arm/mach-msm/qdsp5v2/audio_pcm_in.c
index 7f68c03..43f3d26 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_pcm_in.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_pcm_in.c
@@ -638,30 +638,52 @@
rc = -EFAULT;
break;
}
- if (cfg.channel_count == 1) {
- cfg.channel_count = AUDREC_CMD_MODE_MONO;
- if ((cfg.buffer_size == MONO_DATA_SIZE_256) ||
- (cfg.buffer_size == MONO_DATA_SIZE_512) ||
- (cfg.buffer_size == MONO_DATA_SIZE_1024)) {
- audio->buffer_size = cfg.buffer_size;
+ MM_ERR("build_id[17] = %c\n", audio->build_id[17]);
+ if (audio->build_id[17] == '1') {
+ audio->enc_type = ENC_TYPE_EXT_WAV | audio->mode;
+ if (cfg.channel_count == 1) {
+ cfg.channel_count = AUDREC_CMD_MODE_MONO;
+ if ((cfg.buffer_size == MONO_DATA_SIZE_256) ||
+ (cfg.buffer_size ==
+ MONO_DATA_SIZE_512) ||
+ (cfg.buffer_size ==
+ MONO_DATA_SIZE_1024)) {
+ audio->buffer_size = cfg.buffer_size;
+ } else {
+ rc = -EINVAL;
+ break;
+ }
+ } else if (cfg.channel_count == 2) {
+ cfg.channel_count = AUDREC_CMD_MODE_STEREO;
+ if ((cfg.buffer_size ==
+ STEREO_DATA_SIZE_256) ||
+ (cfg.buffer_size ==
+ STEREO_DATA_SIZE_512) ||
+ (cfg.buffer_size ==
+ STEREO_DATA_SIZE_1024)) {
+ audio->buffer_size = cfg.buffer_size;
+ } else {
+ rc = -EINVAL;
+ break;
+ }
} else {
rc = -EINVAL;
break;
}
- } else if (cfg.channel_count == 2) {
- cfg.channel_count = AUDREC_CMD_MODE_STEREO;
- if ((cfg.buffer_size == STEREO_DATA_SIZE_256) ||
- (cfg.buffer_size == STEREO_DATA_SIZE_512) ||
- (cfg.buffer_size == STEREO_DATA_SIZE_1024)) {
- audio->buffer_size = cfg.buffer_size;
- } else {
- rc = -EINVAL;
- break;
+ } else if (audio->build_id[17] == '0') {
+ audio->enc_type = ENC_TYPE_WAV | audio->mode;
+ if (cfg.channel_count == 1) {
+ cfg.channel_count = AUDREC_CMD_MODE_MONO;
+ audio->buffer_size = MONO_DATA_SIZE_1024;
+ } else if (cfg.channel_count == 2) {
+ cfg.channel_count = AUDREC_CMD_MODE_STEREO;
+ audio->buffer_size = STEREO_DATA_SIZE_1024;
}
} else {
- rc = -EINVAL;
- break;
+ MM_ERR("wrong build_id = %s\n", audio->build_id);
+ return -ENODEV;
}
+ MM_ERR("buffer size configured is = %d\n", audio->buffer_size);
audio->samp_rate = cfg.sample_rate;
audio->channel_mode = cfg.channel_count;
break;
diff --git a/drivers/gpu/msm/kgsl.c b/drivers/gpu/msm/kgsl.c
index 165bbbf..7e61a32 100644
--- a/drivers/gpu/msm/kgsl.c
+++ b/drivers/gpu/msm/kgsl.c
@@ -1226,7 +1226,11 @@
entry->memdesc.size = size;
entry->memdesc.physaddr = phys + (offset & PAGE_MASK);
entry->memdesc.hostptr = (void *) (virt + (offset & PAGE_MASK));
- entry->memdesc.ops = &kgsl_contiguous_ops;
+
+ ret = memdesc_sg_phys(&entry->memdesc,
+ phys + (offset & PAGE_MASK), size);
+ if (ret)
+ goto err;
return 0;
err:
@@ -1236,6 +1240,60 @@
return ret;
}
+static int memdesc_sg_virt(struct kgsl_memdesc *memdesc,
+ void *addr, int size)
+{
+ int i;
+ int sglen = PAGE_ALIGN(size) / PAGE_SIZE;
+ unsigned long paddr = (unsigned long) addr;
+
+ memdesc->sg = kmalloc(sglen * sizeof(struct scatterlist),
+ GFP_KERNEL);
+ if (memdesc->sg == NULL)
+ return -ENOMEM;
+
+ memdesc->sglen = sglen;
+ sg_init_table(memdesc->sg, sglen);
+
+ spin_lock(¤t->mm->page_table_lock);
+
+ for (i = 0; i < sglen; i++, paddr += PAGE_SIZE) {
+ struct page *page;
+ pmd_t *ppmd;
+ pte_t *ppte;
+ pgd_t *ppgd = pgd_offset(current->mm, paddr);
+
+ if (pgd_none(*ppgd) || pgd_bad(*ppgd))
+ goto err;
+
+ ppmd = pmd_offset(ppgd, paddr);
+ if (pmd_none(*ppmd) || pmd_bad(*ppmd))
+ goto err;
+
+ ppte = pte_offset_map(ppmd, paddr);
+ if (ppte == NULL)
+ goto err;
+
+ page = pfn_to_page(pte_pfn(*ppte));
+ if (!page)
+ goto err;
+
+ sg_set_page(&memdesc->sg[i], page, PAGE_SIZE, 0);
+ pte_unmap(ppte);
+ }
+
+ spin_unlock(¤t->mm->page_table_lock);
+
+ return 0;
+
+err:
+ spin_unlock(¤t->mm->page_table_lock);
+ kfree(memdesc->sg);
+ memdesc->sg = NULL;
+
+ return -EINVAL;
+}
+
static int kgsl_setup_hostptr(struct kgsl_mem_entry *entry,
struct kgsl_pagetable *pagetable,
void *hostptr, unsigned int offset,
@@ -1285,9 +1343,9 @@
entry->memdesc.pagetable = pagetable;
entry->memdesc.size = size;
entry->memdesc.hostptr = hostptr + (offset & PAGE_MASK);
- entry->memdesc.ops = &kgsl_userptr_ops;
- return 0;
+ return memdesc_sg_virt(&entry->memdesc,
+ hostptr + (offset & PAGE_MASK), size);
}
#ifdef CONFIG_ASHMEM
@@ -1335,11 +1393,13 @@
}
entry->file_ptr = filep;
-
entry->memdesc.pagetable = pagetable;
entry->memdesc.size = ALIGN(size, PAGE_SIZE);
entry->memdesc.hostptr = hostptr;
- entry->memdesc.ops = &kgsl_userptr_ops;
+
+ ret = memdesc_sg_virt(&entry->memdesc, hostptr, size);
+ if (ret)
+ goto err;
return 0;
@@ -1725,7 +1785,7 @@
{
struct kgsl_mem_entry *entry = vma->vm_private_data;
- if (!entry->memdesc.ops->vmfault)
+ if (!entry->memdesc.ops || !entry->memdesc.ops->vmfault)
return VM_FAULT_SIGBUS;
return entry->memdesc.ops->vmfault(&entry->memdesc, vma, vmf);
@@ -1772,7 +1832,9 @@
if (entry == NULL)
return -EINVAL;
- if (!entry->memdesc.ops->vmflags || !entry->memdesc.ops->vmfault)
+ if (!entry->memdesc.ops ||
+ !entry->memdesc.ops->vmflags ||
+ !entry->memdesc.ops->vmfault)
return -EINVAL;
vma->vm_flags |= entry->memdesc.ops->vmflags(&entry->memdesc);
diff --git a/drivers/gpu/msm/kgsl.h b/drivers/gpu/msm/kgsl.h
index 8db2cb4..1480df4 100644
--- a/drivers/gpu/msm/kgsl.h
+++ b/drivers/gpu/msm/kgsl.h
@@ -115,6 +115,8 @@
unsigned int physaddr;
unsigned int size;
unsigned int priv;
+ struct scatterlist *sg;
+ unsigned int sglen;
struct kgsl_memdesc_ops *ops;
};
diff --git a/drivers/gpu/msm/kgsl_drm.c b/drivers/gpu/msm/kgsl_drm.c
index 202783b..cdf9dc4 100644
--- a/drivers/gpu/msm/kgsl_drm.c
+++ b/drivers/gpu/msm/kgsl_drm.c
@@ -293,7 +293,6 @@
}
priv->memdesc.size = obj->size * priv->bufcount;
- priv->memdesc.ops = &kgsl_contiguous_ops;
} else if (TYPE_IS_MEM(priv->type)) {
priv->memdesc.hostptr =
diff --git a/drivers/gpu/msm/kgsl_gpummu.c b/drivers/gpu/msm/kgsl_gpummu.c
index 383b910..fe5677e 100644
--- a/drivers/gpu/msm/kgsl_gpummu.c
+++ b/drivers/gpu/msm/kgsl_gpummu.c
@@ -659,68 +659,45 @@
return 0;
}
+#define SUPERPTE_IS_DIRTY(_p) \
+(((_p) & (GSL_PT_SUPER_PTE - 1)) == 0 && \
+GSL_TLBFLUSH_FILTER_ISDIRTY((_p) / GSL_PT_SUPER_PTE))
+
static int
kgsl_gpummu_map(void *mmu_specific_pt,
struct kgsl_memdesc *memdesc,
unsigned int protflags)
{
- int numpages;
- unsigned int pte, ptefirst, ptelast, physaddr;
- int flushtlb;
- unsigned int offset = 0;
+ unsigned int pte;
struct kgsl_gpummu_pt *gpummu_pt = mmu_specific_pt;
+ struct scatterlist *s;
+ int flushtlb = 0;
+ int i;
- if (!protflags ||
- protflags & ~(GSL_PT_PAGE_RV | GSL_PT_PAGE_WV)) {
- KGSL_CORE_ERR("Invalid protflags for "
- "kgsl_mmu_specific_map: %x", protflags);
- return -EINVAL;
- }
+ pte = kgsl_pt_entry_get(KGSL_PAGETABLE_BASE, memdesc->gpuaddr);
- numpages = (memdesc->size >> PAGE_SHIFT);
-
- ptefirst = kgsl_pt_entry_get(KGSL_PAGETABLE_BASE, memdesc->gpuaddr);
- ptelast = ptefirst + numpages;
-
- pte = ptefirst;
- flushtlb = 0;
-
- /* tlb needs to be flushed when the first and last pte are not at
- * superpte boundaries */
- if ((ptefirst & (GSL_PT_SUPER_PTE - 1)) != 0 ||
- ((ptelast + 1) & (GSL_PT_SUPER_PTE-1)) != 0)
+ /* Flush the TLB if the first PTE isn't at the superpte boundary */
+ if (pte & (GSL_PT_SUPER_PTE - 1))
flushtlb = 1;
- for (pte = ptefirst; pte < ptelast; pte++, offset += PAGE_SIZE) {
-#ifdef VERBOSE_DEBUG
- /* check if PTE exists */
- uint32_t val = kgsl_pt_map_get(gpummu_pt, pte);
- if (val != 0 && val != GSL_PT_PAGE_DIRTY) {
- KGSL_CORE_ERR("pt entry %x is already set with "
- "value %x for pagetable %p\n", pte, val, gpummu_pt);
- return -EINVAL;
- }
-#endif
- if ((pte & (GSL_PT_SUPER_PTE-1)) == 0)
- if (GSL_TLBFLUSH_FILTER_ISDIRTY(pte / GSL_PT_SUPER_PTE))
- flushtlb = 1;
- /* mark pte as in use */
+ for_each_sg(memdesc->sg, s, memdesc->sglen, i) {
+ unsigned int paddr = sg_phys(s);
+ unsigned int j;
- physaddr = memdesc->ops->physaddr(memdesc, offset);
- if (!physaddr) {
- KGSL_CORE_ERR("Failed to convert %x address to "
- "physical", (unsigned int)memdesc->hostptr + offset);
- kgsl_gpummu_unmap(mmu_specific_pt, memdesc);
- return -EFAULT;
+ /* Each sg entry might be multiple pages long */
+ for (j = paddr; j < paddr + s->length; pte++, j += PAGE_SIZE) {
+ if (SUPERPTE_IS_DIRTY(pte))
+ flushtlb = 1;
+ kgsl_pt_map_set(gpummu_pt, pte, j | protflags);
}
- kgsl_pt_map_set(gpummu_pt, pte, physaddr | protflags);
}
- /* Post all writes to the pagetable */
+ /* Flush the TLB if the last PTE isn't at the superpte boundary */
+ if ((pte + 1) & (GSL_PT_SUPER_PTE - 1))
+ flushtlb = 1;
+
wmb();
- /* Invalidate tlb only if current page table used by GPU is the
- * pagetable that we used to allocate */
if (flushtlb) {
/*set all devices as needing flushing*/
gpummu_pt->tlb_flags = UINT_MAX;
diff --git a/drivers/gpu/msm/kgsl_iommu.c b/drivers/gpu/msm/kgsl_iommu.c
index f9b9b4a..f43b96e 100644
--- a/drivers/gpu/msm/kgsl_iommu.c
+++ b/drivers/gpu/msm/kgsl_iommu.c
@@ -257,37 +257,33 @@
struct kgsl_memdesc *memdesc,
unsigned int protflags)
{
- int ret = 0;
- unsigned int physaddr;
+ int ret, i;
+ struct scatterlist *s;
unsigned int iommu_virt_addr;
- unsigned int offset = 0;
int map_order;
- struct iommu_domain *domain = (struct iommu_domain *)
- mmu_specific_pt;
+ struct iommu_domain *domain = mmu_specific_pt;
BUG_ON(NULL == domain);
map_order = get_order(SZ_4K);
- for (iommu_virt_addr = memdesc->gpuaddr;
- iommu_virt_addr < (memdesc->gpuaddr + memdesc->size);
- iommu_virt_addr += SZ_4K, offset += PAGE_SIZE) {
- physaddr = memdesc->ops->physaddr(memdesc, offset);
- if (!physaddr) {
- KGSL_CORE_ERR("Failed to convert %x address to "
- "physical\n", (unsigned int)memdesc->hostptr + offset);
- kgsl_iommu_unmap(mmu_specific_pt, memdesc);
- return -EFAULT;
- }
- ret = iommu_map(domain, iommu_virt_addr, physaddr,
+ iommu_virt_addr = memdesc->gpuaddr;
+
+ for_each_sg(memdesc->sg, s, memdesc->sglen, i) {
+ unsigned int paddr = sg_phys(s), j;
+ for (j = paddr; j < paddr + s->length; j += PAGE_SIZE) {
+ ret = iommu_map(domain, iommu_virt_addr, j,
map_order, MSM_IOMMU_ATTR_NONCACHED);
- if (ret) {
- KGSL_CORE_ERR("iommu_map(%p, %x, %x, %d, %d) "
- "failed with err: %d\n", domain,
- iommu_virt_addr, physaddr, map_order,
- MSM_IOMMU_ATTR_NONCACHED, ret);
- kgsl_iommu_unmap(mmu_specific_pt, memdesc);
- return ret;
+ if (ret) {
+ KGSL_CORE_ERR("iommu_map(%p, %x, %x, %d, %d) "
+ "failed with err: %d\n", domain,
+ iommu_virt_addr, j, map_order,
+ MSM_IOMMU_ATTR_NONCACHED, ret);
+ kgsl_iommu_unmap(mmu_specific_pt, memdesc);
+ return ret;
+ }
+
+ iommu_virt_addr += SZ_4K;
}
}
diff --git a/drivers/gpu/msm/kgsl_mmu.c b/drivers/gpu/msm/kgsl_mmu.c
index 7eec9e5..1879666 100644
--- a/drivers/gpu/msm/kgsl_mmu.c
+++ b/drivers/gpu/msm/kgsl_mmu.c
@@ -525,37 +525,6 @@
*/
}
-unsigned int kgsl_virtaddr_to_physaddr(void *virtaddr)
-{
- unsigned int physaddr = 0;
- pgd_t *pgd_ptr = NULL;
- pmd_t *pmd_ptr = NULL;
- pte_t *pte_ptr = NULL, pte;
-
- pgd_ptr = pgd_offset(current->mm, (unsigned long) virtaddr);
- if (pgd_none(*pgd) || pgd_bad(*pgd)) {
- KGSL_CORE_ERR("Invalid pgd entry\n");
- return 0;
- }
-
- pmd_ptr = pmd_offset(pgd_ptr, (unsigned long) virtaddr);
- if (pmd_none(*pmd_ptr) || pmd_bad(*pmd_ptr)) {
- KGSL_CORE_ERR("Invalid pmd entry\n");
- return 0;
- }
-
- pte_ptr = pte_offset_map(pmd_ptr, (unsigned long) virtaddr);
- if (!pte_ptr) {
- KGSL_CORE_ERR("pt_offset_map failed\n");
- return 0;
- }
- pte = *pte_ptr;
- physaddr = pte_pfn(pte);
- pte_unmap(pte_ptr);
- physaddr <<= PAGE_SHIFT;
- return physaddr;
-}
-
int
kgsl_mmu_map(struct kgsl_pagetable *pagetable,
struct kgsl_memdesc *memdesc,
diff --git a/drivers/gpu/msm/kgsl_sharedmem.c b/drivers/gpu/msm/kgsl_sharedmem.c
index 09070e4..8f75daa 100644
--- a/drivers/gpu/msm/kgsl_sharedmem.c
+++ b/drivers/gpu/msm/kgsl_sharedmem.c
@@ -207,28 +207,21 @@
break;
}
}
-#endif
-static unsigned long kgsl_vmalloc_physaddr(struct kgsl_memdesc *memdesc,
- unsigned int offset)
+static void outer_cache_range_op_sg(struct scatterlist *sg, int sglen, int op)
{
- unsigned int addr;
+ struct scatterlist *s;
+ int i;
- if (offset > memdesc->size)
- return 0;
-
- addr = vmalloc_to_pfn(memdesc->hostptr + offset);
- return addr << PAGE_SHIFT;
+ for_each_sg(sg, s, sglen, i) {
+ unsigned int paddr = sg_phys(s);
+ _outer_cache_range_op(op, paddr, s->length);
+ }
}
-#ifdef CONFIG_OUTER_CACHE
-static void kgsl_vmalloc_outer_cache(struct kgsl_memdesc *memdesc, int op)
+#else
+static void outer_cache_range_op_sg(struct scatterlist *sg, int sglen, int op)
{
- void *vaddr = memdesc->hostptr;
- for (; vaddr < (memdesc->hostptr + memdesc->size); vaddr += PAGE_SIZE) {
- unsigned long paddr = page_to_phys(vmalloc_to_page(vaddr));
- _outer_cache_range_op(op, paddr, PAGE_SIZE);
- }
}
#endif
@@ -306,88 +299,24 @@
memdesc->hostptr, memdesc->physaddr);
}
-static unsigned long kgsl_contiguous_physaddr(struct kgsl_memdesc *memdesc,
- unsigned int offset)
-{
- if (offset > memdesc->size)
- return 0;
-
- return memdesc->physaddr + offset;
-}
-
-#ifdef CONFIG_OUTER_CACHE
-static void kgsl_contiguous_outer_cache(struct kgsl_memdesc *memdesc, int op)
-{
- _outer_cache_range_op(op, memdesc->physaddr, memdesc->size);
-}
-#endif
-
-#ifdef CONFIG_OUTER_CACHE
-static void kgsl_userptr_outer_cache(struct kgsl_memdesc *memdesc, int op)
-{
- void *vaddr = memdesc->hostptr;
- for (; vaddr < (memdesc->hostptr + memdesc->size); vaddr += PAGE_SIZE) {
- unsigned long paddr = kgsl_virtaddr_to_physaddr(vaddr);
- if (paddr)
- _outer_cache_range_op(op, paddr, PAGE_SIZE);
- }
-}
-#endif
-
-static unsigned long kgsl_userptr_physaddr(struct kgsl_memdesc *memdesc,
- unsigned int offset)
-{
- return kgsl_virtaddr_to_physaddr(memdesc->hostptr + offset);
-}
-
/* Global - also used by kgsl_drm.c */
struct kgsl_memdesc_ops kgsl_vmalloc_ops = {
- .physaddr = kgsl_vmalloc_physaddr,
.free = kgsl_vmalloc_free,
.vmflags = kgsl_vmalloc_vmflags,
.vmfault = kgsl_vmalloc_vmfault,
-#ifdef CONFIG_OUTER_CACHE
- .outer_cache = kgsl_vmalloc_outer_cache,
-#endif
};
EXPORT_SYMBOL(kgsl_vmalloc_ops);
static struct kgsl_memdesc_ops kgsl_ebimem_ops = {
- .physaddr = kgsl_contiguous_physaddr,
.free = kgsl_ebimem_free,
.vmflags = kgsl_contiguous_vmflags,
.vmfault = kgsl_contiguous_vmfault,
-#ifdef CONFIG_OUTER_CACHE
- .outer_cache = kgsl_contiguous_outer_cache,
-#endif
};
static struct kgsl_memdesc_ops kgsl_coherent_ops = {
- .physaddr = kgsl_contiguous_physaddr,
.free = kgsl_coherent_free,
-#ifdef CONFIG_OUTER_CACHE
- .outer_cache = kgsl_contiguous_outer_cache,
-#endif
};
-/* Global - also used by kgsl.c and kgsl_drm.c */
-struct kgsl_memdesc_ops kgsl_contiguous_ops = {
- .physaddr = kgsl_contiguous_physaddr,
-#ifdef CONFIG_OUTER_CACHE
- .outer_cache = kgsl_contiguous_outer_cache
-#endif
-};
-EXPORT_SYMBOL(kgsl_contiguous_ops);
-
-/* Global - also used by kgsl.c */
-struct kgsl_memdesc_ops kgsl_userptr_ops = {
- .physaddr = kgsl_userptr_physaddr,
-#ifdef CONFIG_OUTER_CACHE
- .outer_cache = kgsl_userptr_outer_cache,
-#endif
-};
-EXPORT_SYMBOL(kgsl_userptr_ops);
-
void kgsl_cache_range_op(struct kgsl_memdesc *memdesc, int op)
{
void *addr = memdesc->hostptr;
@@ -405,8 +334,7 @@
break;
}
- if (memdesc->ops->outer_cache)
- memdesc->ops->outer_cache(memdesc, op);
+ outer_cache_range_op_sg(memdesc->sg, memdesc->sglen, op);
}
EXPORT_SYMBOL(kgsl_cache_range_op);
@@ -415,7 +343,9 @@
struct kgsl_pagetable *pagetable,
void *ptr, size_t size, unsigned int protflags)
{
- int result;
+ int order, ret = 0;
+ int sglen = PAGE_ALIGN(size) / PAGE_SIZE;
+ int i;
memdesc->size = size;
memdesc->pagetable = pagetable;
@@ -423,25 +353,44 @@
memdesc->ops = &kgsl_vmalloc_ops;
memdesc->hostptr = (void *) ptr;
- kgsl_cache_range_op(memdesc, KGSL_CACHE_OP_INV);
-
- result = kgsl_mmu_map(pagetable, memdesc, protflags);
-
- if (result) {
- kgsl_sharedmem_free(memdesc);
- } else {
- int order;
-
- KGSL_STATS_ADD(size, kgsl_driver.stats.vmalloc,
- kgsl_driver.stats.vmalloc_max);
-
- order = get_order(size);
-
- if (order < 16)
- kgsl_driver.stats.histogram[order]++;
+ memdesc->sg = kmalloc(sglen * sizeof(struct scatterlist), GFP_KERNEL);
+ if (memdesc->sg == NULL) {
+ ret = -ENOMEM;
+ goto done;
}
- return result;
+ memdesc->sglen = sglen;
+ sg_init_table(memdesc->sg, sglen);
+
+ for (i = 0; i < memdesc->sglen; i++, ptr += PAGE_SIZE) {
+ struct page *page = vmalloc_to_page(ptr);
+ if (!page) {
+ ret = -EINVAL;
+ goto done;
+ }
+ sg_set_page(&memdesc->sg[i], page, PAGE_SIZE, 0);
+ }
+
+ kgsl_cache_range_op(memdesc, KGSL_CACHE_OP_INV);
+
+ ret = kgsl_mmu_map(pagetable, memdesc, protflags);
+
+ if (ret)
+ goto done;
+
+ KGSL_STATS_ADD(size, kgsl_driver.stats.vmalloc,
+ kgsl_driver.stats.vmalloc_max);
+
+ order = get_order(size);
+
+ if (order < 16)
+ kgsl_driver.stats.histogram[order]++;
+
+done:
+ if (ret)
+ kgsl_sharedmem_free(memdesc);
+
+ return ret;
}
int
@@ -494,24 +443,35 @@
int
kgsl_sharedmem_alloc_coherent(struct kgsl_memdesc *memdesc, size_t size)
{
+ int result = 0;
+
size = ALIGN(size, PAGE_SIZE);
+ memdesc->size = size;
+ memdesc->ops = &kgsl_coherent_ops;
+
memdesc->hostptr = dma_alloc_coherent(NULL, size, &memdesc->physaddr,
GFP_KERNEL);
if (memdesc->hostptr == NULL) {
KGSL_CORE_ERR("dma_alloc_coherent(%d) failed\n", size);
- return -ENOMEM;
+ result = -ENOMEM;
+ goto err;
}
- memdesc->size = size;
- memdesc->ops = &kgsl_coherent_ops;
+ result = memdesc_sg_phys(memdesc, memdesc->physaddr, size);
+ if (result)
+ goto err;
/* Record statistics */
KGSL_STATS_ADD(size, kgsl_driver.stats.coherent,
kgsl_driver.stats.coherent_max);
- return 0;
+err:
+ if (result)
+ kgsl_sharedmem_free(memdesc);
+
+ return result;
}
EXPORT_SYMBOL(kgsl_sharedmem_alloc_coherent);
@@ -523,9 +483,11 @@
if (memdesc->gpuaddr)
kgsl_mmu_unmap(memdesc->pagetable, memdesc);
- if (memdesc->ops->free)
+ if (memdesc->ops && memdesc->ops->free)
memdesc->ops->free(memdesc);
+ kfree(memdesc->sg);
+
memset(memdesc, 0, sizeof(*memdesc));
}
EXPORT_SYMBOL(kgsl_sharedmem_free);
@@ -534,8 +496,11 @@
_kgsl_sharedmem_ebimem(struct kgsl_memdesc *memdesc,
struct kgsl_pagetable *pagetable, size_t size)
{
- int result;
+ int result = 0;
+ memdesc->size = size;
+ memdesc->pagetable = pagetable;
+ memdesc->ops = &kgsl_ebimem_ops;
memdesc->physaddr = allocate_contiguous_ebi_nomap(size, SZ_8K);
if (memdesc->physaddr == 0) {
@@ -544,19 +509,24 @@
return -ENOMEM;
}
- memdesc->size = size;
- memdesc->pagetable = pagetable;
- memdesc->ops = &kgsl_ebimem_ops;
+ result = memdesc_sg_phys(memdesc, memdesc->physaddr, size);
+
+ if (result)
+ goto err;
result = kgsl_mmu_map(pagetable, memdesc,
GSL_PT_PAGE_RV | GSL_PT_PAGE_WV);
if (result)
- kgsl_sharedmem_free(memdesc);
+ goto err;
KGSL_STATS_ADD(size, kgsl_driver.stats.coherent,
kgsl_driver.stats.coherent_max);
+err:
+ if (result)
+ kgsl_sharedmem_free(memdesc);
+
return result;
}
diff --git a/drivers/gpu/msm/kgsl_sharedmem.h b/drivers/gpu/msm/kgsl_sharedmem.h
index 9e57e78..a9abcf9 100644
--- a/drivers/gpu/msm/kgsl_sharedmem.h
+++ b/drivers/gpu/msm/kgsl_sharedmem.h
@@ -13,6 +13,7 @@
#ifndef __KGSL_SHAREDMEM_H
#define __KGSL_SHAREDMEM_H
+#include <linux/slab.h>
#include <linux/dma-mapping.h>
struct kgsl_device;
@@ -26,8 +27,6 @@
#define KGSL_MEMFLAGS_CACHED 0x00000001
struct kgsl_memdesc_ops {
- unsigned long (*physaddr)(struct kgsl_memdesc *, unsigned int);
- void (*outer_cache)(struct kgsl_memdesc *, int);
int (*vmflags)(struct kgsl_memdesc *);
int (*vmfault)(struct kgsl_memdesc *, struct vm_area_struct *,
struct vm_fault *);
@@ -35,8 +34,6 @@
};
extern struct kgsl_memdesc_ops kgsl_vmalloc_ops;
-extern struct kgsl_memdesc_ops kgsl_contiguous_ops;
-extern struct kgsl_memdesc_ops kgsl_userptr_ops;
int kgsl_sharedmem_vmalloc(struct kgsl_memdesc *memdesc,
struct kgsl_pagetable *pagetable, size_t size);
@@ -78,6 +75,22 @@
void kgsl_sharedmem_uninit_sysfs(void);
static inline int
+memdesc_sg_phys(struct kgsl_memdesc *memdesc,
+ unsigned int physaddr, unsigned int size)
+{
+ struct page *page = phys_to_page(physaddr);
+
+ memdesc->sg = kmalloc(sizeof(struct scatterlist) * 1, GFP_KERNEL);
+ if (memdesc->sg == NULL)
+ return -ENOMEM;
+
+ memdesc->sglen = 1;
+ sg_init_table(memdesc->sg, 1);
+ sg_set_page(&memdesc->sg[0], page, size, 0);
+ return 0;
+}
+
+static inline int
kgsl_allocate(struct kgsl_memdesc *memdesc,
struct kgsl_pagetable *pagetable, size_t size)
{
diff --git a/drivers/input/touchscreen/atmel_mxt_ts.c b/drivers/input/touchscreen/atmel_mxt_ts.c
index c9a5ba2..4d97331 100644
--- a/drivers/input/touchscreen/atmel_mxt_ts.c
+++ b/drivers/input/touchscreen/atmel_mxt_ts.c
@@ -3,6 +3,7 @@
*
* Copyright (C) 2010 Samsung Electronics Co.Ltd
* Author: Joonyoung Shim <jy0922.shim@samsung.com>
+ * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -180,10 +181,12 @@
#define MXT_VTG_MIN_UV 2700000
#define MXT_VTG_MAX_UV 3300000
#define MXT_ACTIVE_LOAD_UA 15000
+#define MXT_LPM_LOAD_UA 10
#define MXT_I2C_VTG_MIN_UV 1800000
#define MXT_I2C_VTG_MAX_UV 1800000
#define MXT_I2C_LOAD_UA 10000
+#define MXT_I2C_LPM_LOAD_UA 10
/* Define for MXT_GEN_COMMAND */
#define MXT_BOOT_VALUE 0xa5
@@ -196,6 +199,8 @@
#define MXT_FWRESET_TIME 175 /* msec */
+#define MXT_WAKE_TIME 25
+
/* Command to unlock bootloader */
#define MXT_UNLOCK_CMD_MSB 0xaa
#define MXT_UNLOCK_CMD_LSB 0xdc
@@ -229,7 +234,9 @@
#define MXT_MAX_FINGER 10
#define MXT_BUFF_SIZE 100
-#define T7_DATA_SIZE 3
+#define T7_DATA_SIZE 3
+#define MXT_MAX_RW_TRIES 3
+#define MXT_BLOCK_SIZE 256
struct mxt_info {
u8 family_id;
@@ -274,14 +281,14 @@
struct mxt_info info;
struct mxt_finger finger[MXT_MAX_FINGER];
unsigned int irq;
- unsigned int max_x;
- unsigned int max_y;
struct regulator *vcc;
struct regulator *vcc_i2c;
#if defined(CONFIG_HAS_EARLYSUSPEND)
struct early_suspend early_suspend;
#endif
+
u8 t7_data[T7_DATA_SIZE];
+ u16 t7_start_addr;
u8 t9_ctrl;
};
@@ -416,6 +423,7 @@
{
struct i2c_msg xfer[2];
u8 buf[2];
+ int i = 0;
buf[0] = reg & 0xff;
buf[1] = (reg >> 8) & 0xff;
@@ -432,12 +440,14 @@
xfer[1].len = len;
xfer[1].buf = val;
- if (i2c_transfer(client->adapter, xfer, 2) != 2) {
- dev_err(&client->dev, "%s: i2c transfer failed\n", __func__);
- return -EIO;
- }
+ do {
+ if (i2c_transfer(client->adapter, xfer, 2) == 2)
+ return 0;
+ msleep(MXT_WAKE_TIME);
+ } while (++i < MXT_MAX_RW_TRIES);
- return 0;
+ dev_err(&client->dev, "%s: i2c transfer failed\n", __func__);
+ return -EIO;
}
static int mxt_read_reg(struct i2c_client *client, u16 reg, u8 *val)
@@ -445,20 +455,33 @@
return __mxt_read_reg(client, reg, 1, val);
}
+static int __mxt_write_reg(struct i2c_client *client,
+ u16 addr, u16 length, u8 *value)
+{
+ u8 buf[MXT_BLOCK_SIZE + 2];
+ int i, tries = 0;
+
+ if (length > MXT_BLOCK_SIZE)
+ return -EINVAL;
+
+ buf[0] = addr & 0xff;
+ buf[1] = (addr >> 8) & 0xff;
+ for (i = 0; i < length; i++)
+ buf[i + 2] = *value++;
+
+ do {
+ if (i2c_master_send(client, buf, length + 2) == (length + 2))
+ return 0;
+ msleep(MXT_WAKE_TIME);
+ } while (++tries < MXT_MAX_RW_TRIES);
+
+ dev_err(&client->dev, "%s: i2c send failed\n", __func__);
+ return -EIO;
+}
+
static int mxt_write_reg(struct i2c_client *client, u16 reg, u8 val)
{
- u8 buf[3];
-
- buf[0] = reg & 0xff;
- buf[1] = (reg >> 8) & 0xff;
- buf[2] = val;
-
- if (i2c_master_send(client, buf, 3) != 3) {
- dev_err(&client->dev, "%s: i2c send failed\n", __func__);
- return -EIO;
- }
-
- return 0;
+ return __mxt_write_reg(client, reg, 1, &val);
}
static int mxt_read_object_table(struct i2c_client *client,
@@ -591,9 +614,9 @@
x = (message->message[1] << 4) | ((message->message[3] >> 4) & 0xf);
y = (message->message[2] << 4) | ((message->message[3] & 0xf));
- if (data->max_x < 1024)
+ if (data->pdata->x_size < 1024)
x = x >> 2;
- if (data->max_y < 1024)
+ if (data->pdata->y_size < 1024)
y = y >> 2;
area = message->message[4];
@@ -705,54 +728,6 @@
return 0;
}
-static void mxt_handle_pdata(struct mxt_data *data)
-{
- const struct mxt_platform_data *pdata = data->pdata;
- u8 voltage;
-
- /* Set touchscreen lines */
- mxt_write_object(data, MXT_TOUCH_MULTI, MXT_TOUCH_XSIZE,
- pdata->x_line);
- mxt_write_object(data, MXT_TOUCH_MULTI, MXT_TOUCH_YSIZE,
- pdata->y_line);
-
- /* Set touchscreen orient */
- mxt_write_object(data, MXT_TOUCH_MULTI, MXT_TOUCH_ORIENT,
- pdata->orient);
-
- /* Set touchscreen burst length */
- mxt_write_object(data, MXT_TOUCH_MULTI,
- MXT_TOUCH_BLEN, pdata->blen);
-
- /* Set touchscreen threshold */
- mxt_write_object(data, MXT_TOUCH_MULTI,
- MXT_TOUCH_TCHTHR, pdata->threshold);
-
- /* Set touchscreen resolution */
- mxt_write_object(data, MXT_TOUCH_MULTI,
- MXT_TOUCH_XRANGE_LSB, (pdata->x_size - 1) & 0xff);
- mxt_write_object(data, MXT_TOUCH_MULTI,
- MXT_TOUCH_XRANGE_MSB, (pdata->x_size - 1) >> 8);
- mxt_write_object(data, MXT_TOUCH_MULTI,
- MXT_TOUCH_YRANGE_LSB, (pdata->y_size - 1) & 0xff);
- mxt_write_object(data, MXT_TOUCH_MULTI,
- MXT_TOUCH_YRANGE_MSB, (pdata->y_size - 1) >> 8);
-
- /* Set touchscreen voltage */
- if (pdata->voltage) {
- if (pdata->voltage < MXT_VOLTAGE_DEFAULT) {
- voltage = (MXT_VOLTAGE_DEFAULT - pdata->voltage) /
- MXT_VOLTAGE_STEP;
- voltage = 0xff - voltage + 1;
- } else
- voltage = (pdata->voltage - MXT_VOLTAGE_DEFAULT) /
- MXT_VOLTAGE_STEP;
-
- mxt_write_object(data, MXT_SPT_CTECONFIG,
- MXT_CTE_VOLTAGE, voltage);
- }
-}
-
static int mxt_get_info(struct mxt_data *data)
{
struct i2c_client *client = data->client;
@@ -840,10 +815,11 @@
{
struct i2c_client *client = data->client;
struct mxt_info *info = &data->info;
- int error, i;
+ int error;
int timeout_counter = 0;
u8 val;
u8 command_register;
+ struct mxt_object *t7_object;
error = mxt_get_info(data);
if (error)
@@ -868,14 +844,19 @@
return error;
/* Store T7 and T9 locally, used in suspend/resume operations */
- for (i = 0; i < T7_DATA_SIZE; i++) {
- error = mxt_read_object(data, MXT_GEN_POWER, i,
- &data->t7_data[i]);
- if (error < 0) {
- dev_err(&client->dev,
- "failed to save current power state\n");
- return error;
- }
+ t7_object = mxt_get_object(data, MXT_GEN_POWER);
+ if (!t7_object) {
+ dev_err(&client->dev, "Failed to get T7 object\n");
+ return -EINVAL;
+ }
+
+ data->t7_start_addr = t7_object->start_address;
+ error = __mxt_read_reg(client, data->t7_start_addr,
+ T7_DATA_SIZE, data->t7_data);
+ if (error < 0) {
+ dev_err(&client->dev,
+ "failed to save current power state\n");
+ return error;
}
error = mxt_read_object(data, MXT_TOUCH_MULTI, MXT_TOUCH_CTRL,
&data->t9_ctrl);
@@ -884,8 +865,6 @@
return error;
}
- mxt_handle_pdata(data);
-
/* Backup to memory */
mxt_write_object(data, MXT_GEN_COMMAND,
MXT_COMMAND_BACKUPNV,
@@ -935,20 +914,6 @@
return 0;
}
-static void mxt_calc_resolution(struct mxt_data *data)
-{
- unsigned int max_x = data->pdata->x_size - 1;
- unsigned int max_y = data->pdata->y_size - 1;
-
- if (data->pdata->orient & MXT_XY_SWITCH) {
- data->max_x = max_y;
- data->max_y = max_x;
- } else {
- data->max_x = max_x;
- data->max_y = max_y;
- }
-}
-
static ssize_t mxt_object_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
@@ -1108,17 +1073,17 @@
static int mxt_start(struct mxt_data *data)
{
- int i, error;
+ int error;
+
/* restore the old power state values and reenable touch */
- for (i = 0; i < T7_DATA_SIZE; i++) {
- error = mxt_write_object(data, MXT_GEN_POWER, i,
- data->t7_data[i]);
- if (error < 0) {
- dev_err(&data->client->dev,
- "failed to restore old power state\n");
- return error;
- }
+ error = __mxt_write_reg(data->client, data->t7_start_addr,
+ T7_DATA_SIZE, data->t7_data);
+ if (error < 0) {
+ dev_err(&data->client->dev,
+ "failed to restore old power state\n");
+ return error;
}
+
error = mxt_write_object(data,
MXT_TOUCH_MULTI, MXT_TOUCH_CTRL, data->t9_ctrl);
if (error < 0) {
@@ -1131,22 +1096,21 @@
static int mxt_stop(struct mxt_data *data)
{
- int i, error;
- /* configure deep sleep mode and disable touch */
- for (i = 0; i < T7_DATA_SIZE; i++) {
- error = mxt_write_object(data, MXT_GEN_POWER, i, 0);
- if (error < 0) {
- dev_err(&data->client->dev,
- "failed to configure deep sleep mode\n");
- return error;
- }
+ int error;
+ u8 t7_data[T7_DATA_SIZE] = {0};
+
+ /* disable touch and configure deep sleep mode */
+ error = mxt_write_object(data, MXT_TOUCH_MULTI, MXT_TOUCH_CTRL, 0);
+ if (error < 0) {
+ dev_err(&data->client->dev, "failed to disable touch\n");
+ return error;
}
- error = mxt_write_object(data,
- MXT_TOUCH_MULTI, MXT_TOUCH_CTRL, 0);
+ error = __mxt_write_reg(data->client, data->t7_start_addr,
+ T7_DATA_SIZE, t7_data);
if (error < 0) {
dev_err(&data->client->dev,
- "failed to disable touch\n");
+ "failed to configure deep sleep mode\n");
return error;
}
@@ -1308,6 +1272,68 @@
}
#ifdef CONFIG_PM
+static int mxt_regulator_lpm(struct mxt_data *data, bool on)
+{
+
+ int rc;
+
+ if (on == false)
+ goto regulator_hpm;
+
+ rc = regulator_set_optimum_mode(data->vcc, MXT_LPM_LOAD_UA);
+ if (rc < 0) {
+ dev_err(&data->client->dev,
+ "Regulator set_opt failed rc=%d\n", rc);
+ goto fail_regulator_lpm;
+ }
+
+ if (data->pdata->i2c_pull_up) {
+ rc = regulator_set_optimum_mode(data->vcc_i2c,
+ MXT_I2C_LPM_LOAD_UA);
+ if (rc < 0) {
+ dev_err(&data->client->dev,
+ "Regulator set_opt failed rc=%d\n", rc);
+ goto fail_regulator_lpm;
+ }
+ }
+
+ return 0;
+
+regulator_hpm:
+
+ rc = regulator_set_optimum_mode(data->vcc, MXT_ACTIVE_LOAD_UA);
+ if (rc < 0) {
+ dev_err(&data->client->dev,
+ "Regulator set_opt failed rc=%d\n", rc);
+ goto fail_regulator_hpm;
+ }
+
+ if (data->pdata->i2c_pull_up) {
+ rc = regulator_set_optimum_mode(data->vcc_i2c, MXT_I2C_LOAD_UA);
+ if (rc < 0) {
+ dev_err(&data->client->dev,
+ "Regulator set_opt failed rc=%d\n", rc);
+ goto fail_regulator_hpm;
+ }
+ }
+
+ return 0;
+
+fail_regulator_lpm:
+ regulator_set_optimum_mode(data->vcc, MXT_ACTIVE_LOAD_UA);
+ if (data->pdata->i2c_pull_up)
+ regulator_set_optimum_mode(data->vcc_i2c, MXT_I2C_LOAD_UA);
+
+ return rc;
+
+fail_regulator_hpm:
+ regulator_set_optimum_mode(data->vcc, MXT_LPM_LOAD_UA);
+ if (data->pdata->i2c_pull_up)
+ regulator_set_optimum_mode(data->vcc_i2c, MXT_I2C_LPM_LOAD_UA);
+
+ return rc;
+}
+
static int mxt_suspend(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
@@ -1320,7 +1346,7 @@
if (input_dev->users) {
error = mxt_stop(data);
if (error < 0) {
- dev_err(&client->dev, "mxt_stop failed in suspend\n");
+ dev_err(dev, "mxt_stop failed in suspend\n");
mutex_unlock(&input_dev->mutex);
return error;
}
@@ -1329,6 +1355,13 @@
mutex_unlock(&input_dev->mutex);
+ /* put regulators in low power mode */
+ error = mxt_regulator_lpm(data, true);
+ if (error < 0) {
+ dev_err(dev, "failed to enter low power mode\n");
+ return error;
+ }
+
return 0;
}
@@ -1338,18 +1371,20 @@
struct mxt_data *data = i2c_get_clientdata(client);
struct input_dev *input_dev = data->input_dev;
int error;
- /* Soft reset */
- mxt_write_object(data, MXT_GEN_COMMAND,
- MXT_COMMAND_RESET, 1);
- mxt_reset_delay(data);
+ /* put regulators in high power mode */
+ error = mxt_regulator_lpm(data, false);
+ if (error < 0) {
+ dev_err(dev, "failed to enter high power mode\n");
+ return error;
+ }
mutex_lock(&input_dev->mutex);
if (input_dev->users) {
error = mxt_start(data);
if (error < 0) {
- dev_err(&client->dev, "mxt_start failed in resume\n");
+ dev_err(dev, "mxt_start failed in resume\n");
mutex_unlock(&input_dev->mutex);
return error;
}
@@ -1414,25 +1449,23 @@
data->pdata = pdata;
data->irq = client->irq;
- mxt_calc_resolution(data);
-
__set_bit(EV_ABS, input_dev->evbit);
__set_bit(EV_KEY, input_dev->evbit);
__set_bit(BTN_TOUCH, input_dev->keybit);
/* For single touch */
input_set_abs_params(input_dev, ABS_X,
- 0, data->max_x, 0, 0);
+ 0, data->pdata->x_size, 0, 0);
input_set_abs_params(input_dev, ABS_Y,
- 0, data->max_y, 0, 0);
+ 0, data->pdata->y_size, 0, 0);
/* For multi touch */
input_set_abs_params(input_dev, ABS_MT_TOUCH_MAJOR,
0, MXT_MAX_AREA, 0, 0);
input_set_abs_params(input_dev, ABS_MT_POSITION_X,
- 0, data->max_x, 0, 0);
+ 0, data->pdata->x_size, 0, 0);
input_set_abs_params(input_dev, ABS_MT_POSITION_Y,
- 0, data->max_y, 0, 0);
+ 0, data->pdata->y_size, 0, 0);
input_set_drvdata(input_dev, data);
i2c_set_clientdata(client, data);
diff --git a/drivers/media/video/msm/msm.c b/drivers/media/video/msm/msm.c
index 727b751..74534af 100644
--- a/drivers/media/video/msm/msm.c
+++ b/drivers/media/video/msm/msm.c
@@ -1398,10 +1398,8 @@
}
mutex_lock(&pcam->vid_lock);
for (i = 0; i < MSM_DEV_INST_MAX; i++) {
- if (pcam->dev_inst[i] == NULL) {
- mutex_unlock(&pcam->vid_lock);
+ if (pcam->dev_inst[i] == NULL)
break;
- }
}
/* if no instance is available, return error */
if (i == MSM_DEV_INST_MAX) {
diff --git a/drivers/media/video/msm/msm_io_8960.c b/drivers/media/video/msm/msm_io_8960.c
index 45871bc..0e4429e 100644
--- a/drivers/media/video/msm/msm_io_8960.c
+++ b/drivers/media/video/msm/msm_io_8960.c
@@ -27,6 +27,7 @@
#define DBG_CSID 0
#define DBG_CSIPHY 0
+#define BUFF_SIZE_128 128
/* MIPI CSI PHY registers */
#define MIPI_CSIPHY_LNn_CFG1_ADDR 0x0
@@ -194,7 +195,7 @@
void msm_io_dump(void __iomem *addr, int size)
{
- char line_str[128], *p_str;
+ char line_str[BUFF_SIZE_128], *p_str;
int i;
u32 *p = (u32 *) addr;
u32 data;
@@ -203,11 +204,11 @@
p_str = line_str;
for (i = 0; i < size/4; i++) {
if (i % 4 == 0) {
- sprintf(p_str, "%08x: ", (u32) p);
+ snprintf(p_str, 12, "%08x: ", (u32) p);
p_str += 10;
}
data = readl_relaxed(p++);
- sprintf(p_str, "%08x ", data);
+ snprintf(p_str, 12, "%08x ", data);
p_str += 9;
if ((i + 1) % 4 == 0) {
CDBG("%s\n", line_str);
diff --git a/drivers/media/video/msm/msm_isp.c b/drivers/media/video/msm/msm_isp.c
index 9204269..6983d70 100644
--- a/drivers/media/video/msm/msm_isp.c
+++ b/drivers/media/video/msm/msm_isp.c
@@ -157,7 +157,7 @@
if (notification == NOTIFY_VFE_BUF_EVT)
return msm_isp_notify_VFE_BUF_EVT(sd, arg);
- isp_event = kzalloc(sizeof(struct msm_isp_event_ctrl), GFP_KERNEL);
+ isp_event = kzalloc(sizeof(struct msm_isp_event_ctrl), GFP_ATOMIC);
if (!isp_event) {
pr_err("%s Insufficient memory. return", __func__);
return -ENOMEM;
diff --git a/drivers/media/video/msm/msm_mctl_pp.c b/drivers/media/video/msm/msm_mctl_pp.c
index 7040c29..4f82d32 100644
--- a/drivers/media/video/msm/msm_mctl_pp.c
+++ b/drivers/media/video/msm/msm_mctl_pp.c
@@ -43,7 +43,7 @@
struct v4l2_event v4l2_evt;
struct msm_isp_event_ctrl *isp_event;
isp_event = kzalloc(sizeof(struct msm_isp_event_ctrl),
- GFP_KERNEL);
+ GFP_ATOMIC);
if (!isp_event) {
pr_err("%s Insufficient memory. return", __func__);
return -ENOMEM;
@@ -581,7 +581,7 @@
struct msm_mctl_pp_event_info *pp_event_info;
struct msm_isp_event_ctrl *isp_event;
isp_event = kzalloc(sizeof(struct msm_isp_event_ctrl),
- GFP_KERNEL);
+ GFP_ATOMIC);
if (!isp_event) {
pr_err("%s Insufficient memory.", __func__);
return -ENOMEM;
diff --git a/drivers/mfd/pm8018-core.c b/drivers/mfd/pm8018-core.c
index 1567c5b..528f232 100644
--- a/drivers/mfd/pm8018-core.c
+++ b/drivers/mfd/pm8018-core.c
@@ -21,6 +21,7 @@
#include <linux/mfd/core.h>
#include <linux/mfd/pm8xxx/pm8018.h>
#include <linux/mfd/pm8xxx/core.h>
+#include <linux/leds-pm8xxx.h>
/* PMIC PM8018 SSBI Addresses */
@@ -215,6 +216,16 @@
.pdata_size = sizeof("pm8018-dbg"),
};
+static struct mfd_cell pwm_cell __devinitdata = {
+ .name = PM8XXX_PWM_DEV_NAME,
+ .id = -1,
+};
+
+static struct mfd_cell leds_cell __devinitdata = {
+ .name = PM8XXX_LEDS_DEV_NAME,
+ .id = -1,
+};
+
static int __devinit
pm8018_add_subdevices(const struct pm8018_platform_data *pdata,
struct pm8018 *pmic)
@@ -303,6 +314,15 @@
irq_base);
if (ret) {
pr_err("Failed to add adc subdevice ret=%d\n", ret);
+ }
+ }
+
+ if (pdata->leds_pdata) {
+ leds_cell.platform_data = pdata->leds_pdata;
+ leds_cell.pdata_size = sizeof(struct pm8xxx_led_platform_data);
+ ret = mfd_add_devices(pmic->dev, 0, &leds_cell, 1, NULL, 0);
+ if (ret) {
+ pr_err("Failed to add leds subdevice ret=%d\n", ret);
goto bail;
}
}
@@ -313,6 +333,12 @@
goto bail;
}
+ ret = mfd_add_devices(pmic->dev, 0, &pwm_cell, 1, NULL, 0);
+ if (ret) {
+ pr_err("Failed to add pwm subdevice ret=%d\n", ret);
+ goto bail;
+ }
+
/* Add one device for each regulator used by the board. */
if (pdata->num_regulators > 0 && pdata->regulator_pdatas) {
mfd_regulators = kzalloc(sizeof(struct mfd_cell)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index f6c44c6..8aab269 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1795,6 +1795,8 @@
depends on SPI
select MII
select CRC32
+ select MISC_DEVICES
+ select EEPROM_93CX6
help
SPI driver for Micrel KS8851 SPI attached network chip.
diff --git a/drivers/net/ks8851.c b/drivers/net/ks8851.c
index e338aed..0bf972a 100644
--- a/drivers/net/ks8851.c
+++ b/drivers/net/ks8851.c
@@ -22,6 +22,8 @@
#include <linux/crc32.h>
#include <linux/mii.h>
#include <linux/regulator/consumer.h>
+#include <linux/eeprom_93cx6.h>
+
#include <linux/spi/spi.h>
#include <linux/ks8851.h>
#include <linux/gpio.h>
@@ -83,6 +85,7 @@
* @rc_ccr: Cached copy of KS_CCR.
* @rc_rxqcr: Cached copy of KS_RXQCR.
* @eeprom_size: Companion eeprom size in Bytes, 0 if no eeprom
+ * @eeprom: 93CX6 EEPROM state for accessing on-board EEPROM.
*
* The @lock ensures that the chip is protected when certain operations are
* in progress. When the read or write packet transfer is in progress, most
@@ -131,6 +134,8 @@
struct spi_transfer spi_xfer2[2];
struct regulator *vdd_io;
struct regulator *vdd_phy;
+
+ struct eeprom_93cx6 eeprom;
};
static int msg_enable;
@@ -346,6 +351,26 @@
}
/**
+ * ks8851_set_powermode - set power mode of the device
+ * @ks: The device state
+ * @pwrmode: The power mode value to write to KS_PMECR.
+ *
+ * Change the power mode of the chip.
+ */
+static void ks8851_set_powermode(struct ks8851_net *ks, unsigned pwrmode)
+{
+ unsigned pmecr;
+
+ netif_dbg(ks, hw, ks->netdev, "setting power mode %d\n", pwrmode);
+
+ pmecr = ks8851_rdreg16(ks, KS_PMECR);
+ pmecr &= ~PMECR_PM_MASK;
+ pmecr |= pwrmode;
+
+ ks8851_wrreg16(ks, KS_PMECR, pmecr);
+}
+
+/**
* ks8851_write_mac_addr - write mac address to device registers
* @dev: The network device
*
@@ -361,8 +386,15 @@
mutex_lock(&ks->lock);
+ /*
+ * Wake up chip in case it was powered off when stopped; otherwise,
+ * the first write to the MAC address does not take effect.
+ */
+ ks8851_set_powermode(ks, PMECR_PM_NORMAL);
for (i = 0; i < ETH_ALEN; i++)
ks8851_wrreg8(ks, KS_MAR(i), dev->dev_addr[i]);
+ if (!netif_running(dev))
+ ks8851_set_powermode(ks, PMECR_PM_SOFTDOWN);
mutex_unlock(&ks->lock);
@@ -370,17 +402,14 @@
}
/**
- * ks8851_init_mac - initialise the mac address
- * @ks: The device structure
+ * ks8851_read_mac_addr - read mac address from device registers
+ * @dev: The network device
*
- * Get or create the initial mac address for the device and then set that
- * into the station address register. The device will try to read a MAC address
- * from the EEPROM and program it into the MARs. We use random_ether_addr()
- * if the EEPROM is not present or if the address in the MARs appears invalid.
- */
-static void ks8851_init_mac(struct ks8851_net *ks)
+ * Update our copy of the KS8851 MAC address from the registers of @dev.
+*/
+static void ks8851_read_mac_addr(struct net_device *dev)
{
- struct net_device *dev = ks->netdev;
+ struct ks8851_net *ks = netdev_priv(dev);
int i;
mutex_lock(&ks->lock);
@@ -389,11 +418,33 @@
dev->dev_addr[i] = ks8851_rdreg8(ks, KS_MAR(i));
mutex_unlock(&ks->lock);
+}
- if (!(ks->rc_ccr & CCR_EEPROM) || !is_valid_ether_addr(dev->dev_addr)) {
- random_ether_addr(dev->dev_addr);
- ks8851_write_mac_addr(dev);
+/**
+ * ks8851_init_mac - initialise the mac address
+ * @ks: The device structure
+ *
+ * Get or create the initial mac address for the device and then set that
+ * into the station address register. If there is an EEPROM present, then
+ * we try that. If no valid mac address is found we use random_ether_addr()
+ * to create a new one.
+ */
+static void ks8851_init_mac(struct ks8851_net *ks)
+{
+ struct net_device *dev = ks->netdev;
+
+ /* first, try reading what we've got already */
+ if (ks->rc_ccr & CCR_EEPROM) {
+ ks8851_read_mac_addr(dev);
+ if (is_valid_ether_addr(dev->dev_addr))
+ return;
+
+ netdev_err(ks->netdev, "invalid mac address read %pM\n",
+ dev->dev_addr);
}
+
+ random_ether_addr(dev->dev_addr);
+ ks8851_write_mac_addr(dev);
}
/**
@@ -749,26 +800,6 @@
}
/**
- * ks8851_set_powermode - set power mode of the device
- * @ks: The device state
- * @pwrmode: The power mode value to write to KS_PMECR.
- *
- * Change the power mode of the chip.
- */
-static void ks8851_set_powermode(struct ks8851_net *ks, unsigned pwrmode)
-{
- unsigned pmecr;
-
- netif_dbg(ks, hw, ks->netdev, "setting power mode %d\n", pwrmode);
-
- pmecr = ks8851_rdreg16(ks, KS_PMECR);
- pmecr &= ~PMECR_PM_MASK;
- pmecr |= pwrmode;
-
- ks8851_wrreg16(ks, KS_PMECR, pmecr);
-}
-
-/**
* ks8851_net_open - open network device
* @dev: The network device being opened.
*
@@ -1048,234 +1079,6 @@
.ndo_validate_addr = eth_validate_addr,
};
-/* Companion eeprom access */
-
-enum { /* EEPROM programming states */
- EEPROM_CONTROL,
- EEPROM_ADDRESS,
- EEPROM_DATA,
- EEPROM_COMPLETE
-};
-
-/**
- * ks8851_eeprom_read - read a 16bits word in ks8851 companion EEPROM
- * @dev: The network device the PHY is on.
- * @addr: EEPROM address to read
- *
- * eeprom_size: used to define the data coding length. Can be changed
- * through debug-fs.
- *
- * Programs a read on the EEPROM using ks8851 EEPROM SW access feature.
- * Warning: The READ feature is not supported on ks8851 revision 0.
- *
- * Rough programming model:
- * - on period start: set clock high and read value on bus
- * - on period / 2: set clock low and program value on bus
- * - start on period / 2
- */
-unsigned int ks8851_eeprom_read(struct net_device *dev, unsigned int addr)
-{
- struct ks8851_net *ks = netdev_priv(dev);
- int eepcr;
- int ctrl = EEPROM_OP_READ;
- int state = EEPROM_CONTROL;
- int bit_count = EEPROM_OP_LEN - 1;
- unsigned int data = 0;
- int dummy;
- unsigned int addr_len;
-
- addr_len = (ks->eeprom_size == 128) ? 6 : 8;
-
- /* start transaction: chip select high, authorize write */
- mutex_lock(&ks->lock);
- eepcr = EEPCR_EESA | EEPCR_EESRWA;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- eepcr |= EEPCR_EECS;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
- while (state != EEPROM_COMPLETE) {
- /* falling clock period starts... */
- /* set EED_IO pin for control and address */
- eepcr &= ~EEPCR_EEDO;
- switch (state) {
- case EEPROM_CONTROL:
- eepcr |= ((ctrl >> bit_count) & 1) << 2;
- if (bit_count-- <= 0) {
- bit_count = addr_len - 1;
- state = EEPROM_ADDRESS;
- }
- break;
- case EEPROM_ADDRESS:
- eepcr |= ((addr >> bit_count) & 1) << 2;
- bit_count--;
- break;
- case EEPROM_DATA:
- /* Change to receive mode */
- eepcr &= ~EEPCR_EESRWA;
- break;
- }
-
- /* lower clock */
- eepcr &= ~EEPCR_EESCK;
-
- mutex_lock(&ks->lock);
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
- /* waitread period / 2 */
- udelay(EEPROM_SK_PERIOD / 2);
-
- /* rising clock period starts... */
-
- /* raise clock */
- mutex_lock(&ks->lock);
- eepcr |= EEPCR_EESCK;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
- /* Manage read */
- switch (state) {
- case EEPROM_ADDRESS:
- if (bit_count < 0) {
- bit_count = EEPROM_DATA_LEN - 1;
- state = EEPROM_DATA;
- }
- break;
- case EEPROM_DATA:
- mutex_lock(&ks->lock);
- dummy = ks8851_rdreg16(ks, KS_EEPCR);
- mutex_unlock(&ks->lock);
- data |= ((dummy >> EEPCR_EESB_OFFSET) & 1) << bit_count;
- if (bit_count-- <= 0)
- state = EEPROM_COMPLETE;
- break;
- }
-
- /* wait period / 2 */
- udelay(EEPROM_SK_PERIOD / 2);
- }
-
- /* close transaction */
- mutex_lock(&ks->lock);
- eepcr &= ~EEPCR_EECS;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- eepcr = 0;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
- return data;
-}
-
-/**
- * ks8851_eeprom_write - write a 16bits word in ks8851 companion EEPROM
- * @dev: The network device the PHY is on.
- * @op: operand (can be WRITE, EWEN, EWDS)
- * @addr: EEPROM address to write
- * @data: data to write
- *
- * eeprom_size: used to define the data coding length. Can be changed
- * through debug-fs.
- *
- * Programs a write on the EEPROM using ks8851 EEPROM SW access feature.
- *
- * Note that a write enable is required before writing data.
- *
- * Rough programming model:
- * - on period start: set clock high
- * - on period / 2: set clock low and program value on bus
- * - start on period / 2
- */
-void ks8851_eeprom_write(struct net_device *dev, unsigned int op,
- unsigned int addr, unsigned int data)
-{
- struct ks8851_net *ks = netdev_priv(dev);
- int eepcr;
- int state = EEPROM_CONTROL;
- int bit_count = EEPROM_OP_LEN - 1;
- unsigned int addr_len;
-
- addr_len = (ks->eeprom_size == 128) ? 6 : 8;
-
- switch (op) {
- case EEPROM_OP_EWEN:
- addr = 0x30;
- break;
- case EEPROM_OP_EWDS:
- addr = 0;
- break;
- }
-
- /* start transaction: chip select high, authorize write */
- mutex_lock(&ks->lock);
- eepcr = EEPCR_EESA | EEPCR_EESRWA;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- eepcr |= EEPCR_EECS;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
- while (state != EEPROM_COMPLETE) {
- /* falling clock period starts... */
- /* set EED_IO pin for control and address */
- eepcr &= ~EEPCR_EEDO;
- switch (state) {
- case EEPROM_CONTROL:
- eepcr |= ((op >> bit_count) & 1) << 2;
- if (bit_count-- <= 0) {
- bit_count = addr_len - 1;
- state = EEPROM_ADDRESS;
- }
- break;
- case EEPROM_ADDRESS:
- eepcr |= ((addr >> bit_count) & 1) << 2;
- if (bit_count-- <= 0) {
- if (op == EEPROM_OP_WRITE) {
- bit_count = EEPROM_DATA_LEN - 1;
- state = EEPROM_DATA;
- } else {
- state = EEPROM_COMPLETE;
- }
- }
- break;
- case EEPROM_DATA:
- eepcr |= ((data >> bit_count) & 1) << 2;
- if (bit_count-- <= 0)
- state = EEPROM_COMPLETE;
- break;
- }
-
- /* lower clock */
- eepcr &= ~EEPCR_EESCK;
-
- mutex_lock(&ks->lock);
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
- /* wait period / 2 */
- udelay(EEPROM_SK_PERIOD / 2);
-
- /* rising clock period starts... */
-
- /* raise clock */
- eepcr |= EEPCR_EESCK;
- mutex_lock(&ks->lock);
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
- /* wait period / 2 */
- udelay(EEPROM_SK_PERIOD / 2);
- }
-
- /* close transaction */
- mutex_lock(&ks->lock);
- eepcr &= ~EEPCR_EECS;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- eepcr = 0;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
-}
-
/* ethtool support */
static void ks8851_get_drvinfo(struct net_device *dev,
@@ -1322,115 +1125,141 @@
return mii_nway_restart(&ks->mii);
}
-static int ks8851_get_eeprom_len(struct net_device *dev)
+/* EEPROM support */
+
+static void ks8851_eeprom_regread(struct eeprom_93cx6 *ee)
+{
+ struct ks8851_net *ks = ee->data;
+ unsigned val;
+
+ val = ks8851_rdreg16(ks, KS_EEPCR);
+
+ ee->reg_data_out = (val & EEPCR_EESB) ? 1 : 0;
+ ee->reg_data_clock = (val & EEPCR_EESCK) ? 1 : 0;
+ ee->reg_chip_select = (val & EEPCR_EECS) ? 1 : 0;
+}
+
+static void ks8851_eeprom_regwrite(struct eeprom_93cx6 *ee)
+{
+ struct ks8851_net *ks = ee->data;
+ unsigned val = EEPCR_EESA; /* default - eeprom access on */
+
+ if (ee->drive_data)
+ val |= EEPCR_EESRWA;
+ if (ee->reg_data_in)
+ val |= EEPCR_EEDO;
+ if (ee->reg_data_clock)
+ val |= EEPCR_EESCK;
+ if (ee->reg_chip_select)
+ val |= EEPCR_EECS;
+
+ ks8851_wrreg16(ks, KS_EEPCR, val);
+}
+
+/**
+ * ks8851_eeprom_claim - claim device EEPROM and activate the interface
+ * @ks: The network deice state.
+ *
+ * Check for the presence of an EEPROM, and then activate software access
+ * to the device.
+ */
+static int ks8851_eeprom_claim(struct ks8851_net *ks)
+{
+ if (!(ks->rc_ccr & CCR_EEPROM))
+ return -ENOENT;
+
+ mutex_lock(&ks->lock);
+
+ /* start with clock low, cs high */
+ ks8851_wrreg16(ks, KS_EEPCR, EEPCR_EESA | EEPCR_EECS);
+ return 0;
+}
+
+/**
+ * ks8851_eeprom_release - release the EEPROM interface
+ * @ks: The device state
+ *
+ * Release the software access to the device EEPROM
+ */
+static void ks8851_eeprom_release(struct ks8851_net *ks)
+{
+ unsigned val = ks8851_rdreg16(ks, KS_EEPCR);
+
+ ks8851_wrreg16(ks, KS_EEPCR, val & ~EEPCR_EESA);
+ mutex_unlock(&ks->lock);
+}
+
+#define KS_EEPROM_MAGIC (0x00008851)
+
+static int ks8851_set_eeprom(struct net_device *dev,
+ struct ethtool_eeprom *ee, u8 *data)
{
struct ks8851_net *ks = netdev_priv(dev);
- return ks->eeprom_size;
+ int offset = ee->offset;
+ int len = ee->len;
+ u16 tmp;
+
+ /* currently only support byte writing */
+ if (len != 1)
+ return -EINVAL;
+
+ if (ee->magic != KS_EEPROM_MAGIC)
+ return -EINVAL;
+
+ if (ks8851_eeprom_claim(ks))
+ return -ENOENT;
+
+ eeprom_93cx6_wren(&ks->eeprom, true);
+
+ /* ethtool currently only supports writing bytes, which means
+ * we have to read/modify/write our 16bit EEPROMs */
+
+ eeprom_93cx6_read(&ks->eeprom, offset/2, &tmp);
+
+ if (offset & 1) {
+ tmp &= 0xff;
+ tmp |= *data << 8;
+ } else {
+ tmp &= 0xff00;
+ tmp |= *data;
+ }
+
+ eeprom_93cx6_write(&ks->eeprom, offset/2, tmp);
+ eeprom_93cx6_wren(&ks->eeprom, false);
+
+ ks8851_eeprom_release(ks);
+
+ return 0;
}
static int ks8851_get_eeprom(struct net_device *dev,
- struct ethtool_eeprom *eeprom, u8 *bytes)
+ struct ethtool_eeprom *ee, u8 *data)
{
struct ks8851_net *ks = netdev_priv(dev);
- u16 *eeprom_buff;
- int first_word;
- int last_word;
- int ret_val = 0;
- u16 i;
+ int offset = ee->offset;
+ int len = ee->len;
- if (eeprom->len == 0)
+ /* must be 2 byte aligned */
+ if (len & 1 || offset & 1)
return -EINVAL;
- if (eeprom->len > ks->eeprom_size)
- return -EINVAL;
+ if (ks8851_eeprom_claim(ks))
+ return -ENOENT;
- eeprom->magic = ks8851_rdreg16(ks, KS_CIDER);
+ ee->magic = KS_EEPROM_MAGIC;
- first_word = eeprom->offset >> 1;
- last_word = (eeprom->offset + eeprom->len - 1) >> 1;
+ eeprom_93cx6_multiread(&ks->eeprom, offset/2, (__le16 *)data, len/2);
+ ks8851_eeprom_release(ks);
- eeprom_buff = kmalloc(sizeof(u16) *
- (last_word - first_word + 1), GFP_KERNEL);
- if (!eeprom_buff)
- return -ENOMEM;
-
- for (i = 0; i < last_word - first_word + 1; i++)
- eeprom_buff[i] = ks8851_eeprom_read(dev, first_word + 1);
-
- /* Device's eeprom is little-endian, word addressable */
- for (i = 0; i < last_word - first_word + 1; i++)
- le16_to_cpus(&eeprom_buff[i]);
-
- memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
- kfree(eeprom_buff);
-
- return ret_val;
+ return 0;
}
-static int ks8851_set_eeprom(struct net_device *dev,
- struct ethtool_eeprom *eeprom, u8 *bytes)
+static int ks8851_get_eeprom_len(struct net_device *dev)
{
struct ks8851_net *ks = netdev_priv(dev);
- u16 *eeprom_buff;
- void *ptr;
- int max_len;
- int first_word;
- int last_word;
- int ret_val = 0;
- u16 i;
- if (eeprom->len == 0)
- return -EOPNOTSUPP;
-
- if (eeprom->len > ks->eeprom_size)
- return -EINVAL;
-
- if (eeprom->magic != ks8851_rdreg16(ks, KS_CIDER))
- return -EFAULT;
-
- first_word = eeprom->offset >> 1;
- last_word = (eeprom->offset + eeprom->len - 1) >> 1;
- max_len = (last_word - first_word + 1) * 2;
- eeprom_buff = kmalloc(max_len, GFP_KERNEL);
- if (!eeprom_buff)
- return -ENOMEM;
-
- ptr = (void *)eeprom_buff;
-
- if (eeprom->offset & 1) {
- /* need read/modify/write of first changed EEPROM word */
- /* only the second byte of the word is being modified */
- eeprom_buff[0] = ks8851_eeprom_read(dev, first_word);
- ptr++;
- }
- if ((eeprom->offset + eeprom->len) & 1)
- /* need read/modify/write of last changed EEPROM word */
- /* only the first byte of the word is being modified */
- eeprom_buff[last_word - first_word] =
- ks8851_eeprom_read(dev, last_word);
-
-
- /* Device's eeprom is little-endian, word addressable */
- le16_to_cpus(&eeprom_buff[0]);
- le16_to_cpus(&eeprom_buff[last_word - first_word]);
-
- memcpy(ptr, bytes, eeprom->len);
-
- for (i = 0; i < last_word - first_word + 1; i++)
- eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
-
- ks8851_eeprom_write(dev, EEPROM_OP_EWEN, 0, 0);
-
- for (i = 0; i < last_word - first_word + 1; i++) {
- ks8851_eeprom_write(dev, EEPROM_OP_WRITE, first_word + i,
- eeprom_buff[i]);
- mdelay(EEPROM_WRITE_TIME);
- }
-
- ks8851_eeprom_write(dev, EEPROM_OP_EWDS, 0, 0);
-
- kfree(eeprom_buff);
- return ret_val;
+ /* currently, we assume it is an 93C46 attached, so return 128 */
+ return ks->rc_ccr & CCR_EEPROM ? 128 : 0;
}
static const struct ethtool_ops ks8851_ethtool_ops = {
@@ -1650,6 +1479,13 @@
spi_message_add_tail(&ks->spi_xfer2[0], &ks->spi_msg2);
spi_message_add_tail(&ks->spi_xfer2[1], &ks->spi_msg2);
+ /* setup EEPROM state */
+
+ ks->eeprom.data = ks;
+ ks->eeprom.width = PCI_EEPROM_WIDTH_93C46;
+ ks->eeprom.register_read = ks8851_eeprom_regread;
+ ks->eeprom.register_write = ks8851_eeprom_regwrite;
+
/* setup mii state */
ks->mii.dev = ndev;
ks->mii.phy_id = 1,
@@ -1711,9 +1547,10 @@
goto err_netdev;
}
- netdev_info(ndev, "revision %d, MAC %pM, IRQ %d\n",
+ netdev_info(ndev, "revision %d, MAC %pM, IRQ %d, %s EEPROM\n",
CIDER_REV_GET(ks8851_rdreg16(ks, KS_CIDER)),
- ndev->dev_addr, ndev->irq);
+ ndev->dev_addr, ndev->irq,
+ ks->rc_ccr & CCR_EEPROM ? "has" : "no");
return 0;
diff --git a/drivers/net/ks8851.h b/drivers/net/ks8851.h
index 537fb06e..b2703a1 100644
--- a/drivers/net/ks8851.h
+++ b/drivers/net/ks8851.h
@@ -16,7 +16,7 @@
#define CCR_32PIN (1 << 0)
/* MAC address registers */
-#define KS_MAR(_m) 0x15 - (_m)
+#define KS_MAR(_m) (0x15 - (_m))
#define KS_MARL 0x10
#define KS_MARM 0x12
#define KS_MARH 0x14
diff --git a/include/linux/i2c/atmel_mxt_ts.h b/include/linux/i2c/atmel_mxt_ts.h
index 6a1c918..c425343 100644
--- a/include/linux/i2c/atmel_mxt_ts.h
+++ b/include/linux/i2c/atmel_mxt_ts.h
@@ -3,6 +3,7 @@
*
* Copyright (C) 2010 Samsung Electronics Co.Ltd
* Author: Joonyoung Shim <jy0922.shim@samsung.com>
+ * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -30,18 +31,12 @@
const u8 *config;
size_t config_length;
- unsigned int x_line;
- unsigned int y_line;
unsigned int x_size;
unsigned int y_size;
- unsigned int blen;
- unsigned int threshold;
- unsigned int voltage;
- unsigned char orient;
unsigned long irqflags;
bool i2c_pull_up;
- u8(*read_chg) (void);
+ u8(*read_chg) (void);
int (*init_hw) (bool);
int (*power_on) (bool);
};
diff --git a/include/linux/mfd/pm8xxx/pm8018.h b/include/linux/mfd/pm8xxx/pm8018.h
index 69e781c..1093409 100644
--- a/include/linux/mfd/pm8xxx/pm8018.h
+++ b/include/linux/mfd/pm8xxx/pm8018.h
@@ -27,6 +27,8 @@
#include <linux/mfd/pm8xxx/misc.h>
#include <linux/regulator/pm8018-regulator.h>
#include <linux/mfd/pm8xxx/pm8xxx-adc.h>
+#include <linux/mfd/pm8xxx/pwm.h>
+#include <linux/leds-pm8xxx.h>
#define PM8018_CORE_DEV_NAME "pm8018-core"
@@ -65,6 +67,7 @@
struct pm8018_regulator_platform_data *regulator_pdatas;
struct pm8xxx_adc_platform_data *adc_pdata;
int num_regulators;
+ struct pm8xxx_led_platform_data *leds_pdata;
};
#endif
diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
index dc154f2..45e149c 100644
--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -396,7 +396,8 @@
* then mask it and get out of here:
*/
if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
- desc->istate |= IRQS_PENDING;
+ if (!irq_settings_is_level(desc))
+ desc->istate |= IRQS_PENDING;
mask_irq(desc);
goto out;
}
diff --git a/sound/soc/codecs/wcd9310.c b/sound/soc/codecs/wcd9310.c
index 0000869..649f219 100644
--- a/sound/soc/codecs/wcd9310.c
+++ b/sound/soc/codecs/wcd9310.c
@@ -191,6 +191,62 @@
SOC_ENUM_SINGLE_EXT(2, tabla_ear_pa_gain_text),
};
+/*cut of frequency for high pass filter*/
+static const char *cf_text[] = {
+ "MIN_3DB_4Hz", "MIN_3DB_75Hz", "MIN_3DB_150Hz"
+};
+
+static const struct soc_enum cf_dec1_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX1_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec2_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX2_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec3_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX3_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec4_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX4_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec5_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX5_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec6_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX6_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec7_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX7_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec8_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX8_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec9_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX9_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec10_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX10_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_rxmix1_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_RX1_B4_CTL, 1, 3, cf_text);
+
+static const struct soc_enum cf_rxmix2_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_RX2_B4_CTL, 1, 3, cf_text);
+
+static const struct soc_enum cf_rxmix3_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_RX3_B4_CTL, 1, 3, cf_text);
+
+static const struct soc_enum cf_rxmix4_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B4_CTL, 1, 3, cf_text);
+
+static const struct soc_enum cf_rxmix5_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_RX5_B4_CTL, 1, 3, cf_text)
+;
+static const struct soc_enum cf_rxmix6_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B4_CTL, 1, 3, cf_text);
+
+static const struct soc_enum cf_rxmix7_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_RX7_B4_CTL, 1, 3, cf_text);
+
static const struct snd_kcontrol_new tabla_snd_controls[] = {
SOC_ENUM_EXT("EAR PA Gain", tabla_ear_pa_gain_enum[0],
@@ -273,6 +329,43 @@
SOC_SINGLE_EXT("ANC Slot", SND_SOC_NOPM, 0, 0, 100, tabla_get_anc_slot,
tabla_put_anc_slot),
+ SOC_ENUM("TX1 HPF cut off", cf_dec1_enum),
+ SOC_ENUM("TX2 HPF cut off", cf_dec2_enum),
+ SOC_ENUM("TX3 HPF cut off", cf_dec3_enum),
+ SOC_ENUM("TX4 HPF cut off", cf_dec4_enum),
+ SOC_ENUM("TX5 HPF cut off", cf_dec5_enum),
+ SOC_ENUM("TX6 HPF cut off", cf_dec6_enum),
+ SOC_ENUM("TX7 HPF cut off", cf_dec7_enum),
+ SOC_ENUM("TX8 HPF cut off", cf_dec8_enum),
+ SOC_ENUM("TX9 HPF cut off", cf_dec9_enum),
+ SOC_ENUM("TX10 HPF cut off", cf_dec10_enum),
+
+ SOC_SINGLE("TX1 HPF Switch", TABLA_A_CDC_TX1_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX2 HPF Switch", TABLA_A_CDC_TX2_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX3 HPF Switch", TABLA_A_CDC_TX3_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX4 HPF Switch", TABLA_A_CDC_TX4_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX5 HPF Switch", TABLA_A_CDC_TX5_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX6 HPF Switch", TABLA_A_CDC_TX6_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX7 HPF Switch", TABLA_A_CDC_TX7_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX8 HPF Switch", TABLA_A_CDC_TX8_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX9 HPF Switch", TABLA_A_CDC_TX9_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX10 HPF Switch", TABLA_A_CDC_TX10_MUX_CTL, 3, 1, 0),
+
+ SOC_SINGLE("RX1 HPF Switch", TABLA_A_CDC_RX1_B5_CTL, 2, 1, 0),
+ SOC_SINGLE("RX2 HPF Switch", TABLA_A_CDC_RX2_B5_CTL, 2, 1, 0),
+ SOC_SINGLE("RX3 HPF Switch", TABLA_A_CDC_RX3_B5_CTL, 2, 1, 0),
+ SOC_SINGLE("RX4 HPF Switch", TABLA_A_CDC_RX4_B5_CTL, 2, 1, 0),
+ SOC_SINGLE("RX5 HPF Switch", TABLA_A_CDC_RX5_B5_CTL, 2, 1, 0),
+ SOC_SINGLE("RX6 HPF Switch", TABLA_A_CDC_RX6_B5_CTL, 2, 1, 0),
+ SOC_SINGLE("RX7 HPF Switch", TABLA_A_CDC_RX7_B5_CTL, 2, 1, 0),
+
+ SOC_ENUM("RX1 HPF cut off", cf_rxmix1_enum),
+ SOC_ENUM("RX2 HPF cut off", cf_rxmix2_enum),
+ SOC_ENUM("RX3 HPF cut off", cf_rxmix3_enum),
+ SOC_ENUM("RX4 HPF cut off", cf_rxmix4_enum),
+ SOC_ENUM("RX5 HPF cut off", cf_rxmix5_enum),
+ SOC_ENUM("RX6 HPF cut off", cf_rxmix6_enum),
+ SOC_ENUM("RX7 HPF cut off", cf_rxmix7_enum),
};
static const char *rx_mix1_text[] = {
diff --git a/sound/soc/msm/msm-pcm-lpa.c b/sound/soc/msm/msm-pcm-lpa.c
index 2719d22..8a44a56 100644
--- a/sound/soc/msm/msm-pcm-lpa.c
+++ b/sound/soc/msm/msm-pcm-lpa.c
@@ -78,7 +78,7 @@
struct snd_pcm_substream *substream = prtd->substream;
struct snd_pcm_runtime *runtime = substream->runtime;
struct audio_aio_write_param param;
- struct audio_buffer *buf = prtd->audio_client->port[IN].buf;
+ struct audio_buffer *buf = NULL;
unsigned long flag = 0;
int i = 0;
@@ -102,6 +102,7 @@
pr_debug("%s:writing %d bytes of buffer to dsp 2\n",
__func__, prtd->pcm_count);
+ buf = prtd->audio_client->port[IN].buf;
param.paddr = (unsigned long)buf[0].phys
+ (prtd->out_head * prtd->pcm_count);
param.len = prtd->pcm_count;
@@ -135,6 +136,7 @@
pr_debug("%s:writing %d bytes"
" of buffer to dsp\n",
__func__, prtd->pcm_count);
+ buf = prtd->audio_client->port[IN].buf;
param.paddr = (unsigned long)buf[prtd->out_head].phys;
param.len = prtd->pcm_count;
param.msw_ts = 0;
@@ -341,6 +343,7 @@
dir = IN;
lpa_audio.prtd = NULL;
+ q6asm_cmd(prtd->audio_client, CMD_CLOSE);
q6asm_audio_client_buf_free_contiguous(dir,
prtd->audio_client);
@@ -348,7 +351,6 @@
msm_pcm_routing_dereg_phy_stream(soc_prtd->dai_link->be_id,
SNDRV_PCM_STREAM_PLAYBACK);
pr_debug("%s\n", __func__);
- q6asm_cmd(prtd->audio_client, CMD_CLOSE);
q6asm_audio_client_free(prtd->audio_client);
kfree(prtd);
diff --git a/sound/soc/msm/msm8960.c b/sound/soc/msm/msm8960.c
index bbb0789..5e81e0f 100644
--- a/sound/soc/msm/msm8960.c
+++ b/sound/soc/msm/msm8960.c
@@ -229,10 +229,17 @@
struct snd_soc_dapm_context *dapm = &codec->dapm;
pr_debug("%s: msm8960_spk_control = %d", __func__, msm8960_spk_control);
- if (msm8960_spk_control == MSM8960_SPK_ON)
- snd_soc_dapm_enable_pin(dapm, "Ext Spk");
- else
- snd_soc_dapm_disable_pin(dapm, "Ext Spk");
+ if (msm8960_spk_control == MSM8960_SPK_ON) {
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Bottom Pos");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Bottom Neg");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Top Pos");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Top Neg");
+ } else {
+ snd_soc_dapm_disable_pin(dapm, "Ext Spk Bottom Pos");
+ snd_soc_dapm_disable_pin(dapm, "Ext Spk Bottom Neg");
+ snd_soc_dapm_disable_pin(dapm, "Ext Spk Top Pos");
+ snd_soc_dapm_disable_pin(dapm, "Ext Spk Top Neg");
+ }
snd_soc_dapm_sync(dapm);
}
@@ -581,7 +588,10 @@
snd_soc_dapm_add_routes(dapm, common_audio_map,
ARRAY_SIZE(common_audio_map));
- snd_soc_dapm_enable_pin(dapm, "Ext Spk");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Bottom Pos");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Bottom Neg");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Top Pos");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Top Neg");
snd_soc_dapm_sync(dapm);