| commit | a032beb02f3f8318cdb493a6d960f061d2c01944 | [log] [tgz] |
|---|---|---|
| author | Manu Gautam <mgautam@codeaurora.org> | Thu Jun 27 15:21:46 2013 +0530 |
| committer | Manu Gautam <mgautam@codeaurora.org> | Thu Jun 27 15:21:46 2013 +0530 |
| tree | 1eba1f1be05b813a04a87e76db0fd90574e162c5 | |
| parent | a80cbf2a251450c557de1adbb45c72fb09e39a42 [diff] |
USB: xhci: Add RESET delay quirk for DWC3 controller In Synopsis DWC3 controller, XHCI RESET takes some time complete. If PIPE RESET is not complete by the time USBCMD.RUN bit is set then HC fails to carry out SuperSpeed transfers. Workaround is to give worst case pipe delay ~350us after resetting DWC3. Change-Id: I42a6eb69e5718aafd1d8bb0b32f44a4807a7dc3f CRs-fixed: 490545 Signed-off-by: Manu Gautam <mgautam@codeaurora.org>