Merge "ASoC: WCD9306: Fix incorrect error logging"
diff --git a/arch/arm/boot/dts/msm8226-v1-pm.dtsi b/arch/arm/boot/dts/msm8226-v1-pm.dtsi
index 97b75c4..dcf46e6 100644
--- a/arch/arm/boot/dts/msm8226-v1-pm.dtsi
+++ b/arch/arm/boot/dts/msm8226-v1-pm.dtsi
@@ -168,12 +168,32 @@
<53 104>, /* mdss_irq */
<62 222>, /* ee0_krait_hlos_spmi_periph_irq */
<2 216>, /* tsens_upper_lower_int */
+ <0xff 18>, /* APC_qgicQTmrSecPhysIrptReq */
+ <0xff 19>, /* APC_qgicQTmrNonSecPhysIrptReq */
+ <0xff 35>, /* WDT_barkInt */
+ <0xff 40>, /* qtmr_phy_irq[0] */
+ <0xff 47>, /* rbif_irq[0] */
<0xff 56>, /* q6_wdog_expired_irq */
<0xff 57>, /* mss_to_apps_irq(0) */
<0xff 58>, /* mss_to_apps_irq(1) */
<0xff 59>, /* mss_to_apps_irq(2) */
<0xff 60>, /* mss_to_apps_irq(3) */
<0xff 61>, /* mss_a2_bam_irq */
+ <0xff 65>, /* o_gc_sys_irq[0] */
+ <0xff 74>, /* venus0_mmu_cirpt[1] */
+ <0xff 75>, /* venus0_mmu_cirpt[0] */
+ <0xff 78>, /* mdss_mmu_cirpt[0] */
+ <0xff 79>, /* mdss_mmu_cirpt[1] */
+ <0xff 97>, /* camss_vfe_mmu_cirpt[1] */
+ <0xff 102>, /* camss_jpeg_mmu_cirpt[1] */
+ <0xff 109>, /* ocmem_dm_nonsec_irq */
+ <0xff 131>, /* blsp1_qup_5_irq */
+ <0xff 141>, /* blsp1_uart_3_irq */
+ <0xff 155>, /* sdc1_irq(0) */
+ <0xff 157>, /* sdc2_irq(0) */
+ <0xff 161>, /* lpass_irq_out_spare[4] */
+ <0xff 162>, /* lpass_irq_out_spare[5]*/
+ <0xff 170>, /* sdc1_pwr_cmd_irq */
<0xff 173>, /* o_wcss_apss_smd_hi */
<0xff 174>, /* o_wcss_apss_smd_med */
<0xff 175>, /* o_wcss_apss_smd_low */
@@ -187,9 +207,7 @@
<0xff 190>, /* lpass_irq_out_apcs(2) */
<0xff 191>, /* lpass_irq_out_apcs(3) */
<0xff 192>, /* lpass_irq_out_apcs(4) */
- <0xff 194>, /* lpass_irq_out_apcs[6] */
- <0xff 195>, /* lpass_irq_out_apcs[7] */
- <0xff 196>, /* lpass_irq_out_apcs[8] */
+ <0xff 194>, /* lpass_irq_out_apcs(6) */
<0xff 200>, /* rpm_ipc(4) */
<0xff 201>, /* rpm_ipc(5) */
<0xff 202>, /* rpm_ipc(6) */
@@ -198,12 +216,16 @@
<0xff 205>, /* rpm_ipc(25) */
<0xff 206>, /* rpm_ipc(26) */
<0xff 207>, /* rpm_ipc(27) */
+ <0xff 234>, /* lpass_irq_out_spare[6]*/
+ <0xff 235>, /* lpass_irq_out_spare[7]*/
+ <0xff 240>, /* summary_irq_kpss */
+ <0xff 253>, /* sdc2_pwr_cmd_irq */
<0xff 258>, /* rpm_ipc(28) */
<0xff 259>, /* rpm_ipc(29) */
- <0xff 275>, /* rpm_ipc(30) */
- <0xff 276>, /* rpm_ipc(31) */
<0xff 269>, /* rpm_wdog_expired_irq */
- <0xff 240>; /* summary_irq_kpss */
+ <0xff 270>, /* blsp1_bam_irq[0] */
+ <0xff 275>, /* rpm_ipc(30) */
+ <0xff 276>; /* rpm_ipc(31) */
qcom,gpio-parent = <&msmgpio>;
qcom,gpio-map = <3 1>,
diff --git a/arch/arm/boot/dts/msm8226-v2-pm.dtsi b/arch/arm/boot/dts/msm8226-v2-pm.dtsi
index 92b204e..9ee47e2 100644
--- a/arch/arm/boot/dts/msm8226-v2-pm.dtsi
+++ b/arch/arm/boot/dts/msm8226-v2-pm.dtsi
@@ -170,12 +170,32 @@
<53 104>, /* mdss_irq */
<62 222>, /* ee0_krait_hlos_spmi_periph_irq */
<2 216>, /* tsens_upper_lower_int */
+ <0xff 18>, /* APC_qgicQTmrSecPhysIrptReq */
+ <0xff 19>, /* APC_qgicQTmrNonSecPhysIrptReq */
+ <0xff 35>, /* WDT_barkInt */
+ <0xff 40>, /* qtmr_phy_irq[0] */
+ <0xff 47>, /* rbif_irq[0] */
<0xff 56>, /* q6_wdog_expired_irq */
<0xff 57>, /* mss_to_apps_irq(0) */
<0xff 58>, /* mss_to_apps_irq(1) */
<0xff 59>, /* mss_to_apps_irq(2) */
<0xff 60>, /* mss_to_apps_irq(3) */
<0xff 61>, /* mss_a2_bam_irq */
+ <0xff 65>, /* o_gc_sys_irq[0] */
+ <0xff 74>, /* venus0_mmu_cirpt[1] */
+ <0xff 75>, /* venus0_mmu_cirpt[0] */
+ <0xff 78>, /* mdss_mmu_cirpt[0] */
+ <0xff 79>, /* mdss_mmu_cirpt[1] */
+ <0xff 97>, /* camss_vfe_mmu_cirpt[1] */
+ <0xff 102>, /* camss_jpeg_mmu_cirpt[1] */
+ <0xff 109>, /* ocmem_dm_nonsec_irq */
+ <0xff 131>, /* blsp1_qup_5_irq */
+ <0xff 141>, /* blsp1_uart_3_irq */
+ <0xff 155>, /* sdc1_irq(0) */
+ <0xff 157>, /* sdc2_irq(0) */
+ <0xff 161>, /* lpass_irq_out_spare[4] */
+ <0xff 162>, /* lpass_irq_out_spare[5]*/
+ <0xff 170>, /* sdc1_pwr_cmd_irq */
<0xff 173>, /* o_wcss_apss_smd_hi */
<0xff 174>, /* o_wcss_apss_smd_med */
<0xff 175>, /* o_wcss_apss_smd_low */
@@ -189,9 +209,7 @@
<0xff 190>, /* lpass_irq_out_apcs(2) */
<0xff 191>, /* lpass_irq_out_apcs(3) */
<0xff 192>, /* lpass_irq_out_apcs(4) */
- <0xff 194>, /* lpass_irq_out_apcs[6] */
- <0xff 195>, /* lpass_irq_out_apcs[7] */
- <0xff 196>, /* lpass_irq_out_apcs[8] */
+ <0xff 194>, /* lpass_irq_out_apcs(6) */
<0xff 200>, /* rpm_ipc(4) */
<0xff 201>, /* rpm_ipc(5) */
<0xff 202>, /* rpm_ipc(6) */
@@ -200,12 +218,16 @@
<0xff 205>, /* rpm_ipc(25) */
<0xff 206>, /* rpm_ipc(26) */
<0xff 207>, /* rpm_ipc(27) */
+ <0xff 234>, /* lpass_irq_out_spare[6]*/
+ <0xff 235>, /* lpass_irq_out_spare[7]*/
+ <0xff 240>, /* summary_irq_kpss */
+ <0xff 253>, /* sdc2_pwr_cmd_irq */
<0xff 258>, /* rpm_ipc(28) */
<0xff 259>, /* rpm_ipc(29) */
- <0xff 275>, /* rpm_ipc(30) */
- <0xff 276>, /* rpm_ipc(31) */
<0xff 269>, /* rpm_wdog_expired_irq */
- <0xff 240>; /* summary_irq_kpss */
+ <0xff 270>, /* blsp1_bam_irq[0] */
+ <0xff 275>, /* rpm_ipc(30) */
+ <0xff 276>; /* rpm_ipc(31) */
qcom,gpio-parent = <&msmgpio>;
qcom,gpio-map = <3 1>,
diff --git a/arch/arm/boot/dts/msm8974-mdss.dtsi b/arch/arm/boot/dts/msm8974-mdss.dtsi
index f8a8fa6..b615ebe 100644
--- a/arch/arm/boot/dts/msm8974-mdss.dtsi
+++ b/arch/arm/boot/dts/msm8974-mdss.dtsi
@@ -158,7 +158,7 @@
qcom,hdmi-tx-supply-names = "hpd-gdsc", "hpd-5v", "core-vdda", "core-vcc";
qcom,hdmi-tx-min-voltage-level = <0 0 1800000 1800000>;
qcom,hdmi-tx-max-voltage-level = <0 0 1800000 1800000>;
- qcom,hdmi-tx-peak-current = <0 0 1800000 0>;
+ qcom,hdmi-tx-peak-current = <0 0 300000 0>;
qcom,hdmi-tx-cec = <&msmgpio 31 0>;
qcom,hdmi-tx-ddc-clk = <&msmgpio 32 0>;
diff --git a/arch/arm/boot/dts/msm8974pro-pm.dtsi b/arch/arm/boot/dts/msm8974pro-pm.dtsi
index 31bff88..9e1f83f 100644
--- a/arch/arm/boot/dts/msm8974pro-pm.dtsi
+++ b/arch/arm/boot/dts/msm8974pro-pm.dtsi
@@ -123,6 +123,7 @@
qcom,saw2-spm-cmd-gdhs = [00 32 42 07 44 50 02 32 50 0f];
qcom,saw2-spm-cmd-pc = [00 10 32 b0 11 42 07 01 b0 12 44
50 02 32 50 0f];
+ qcom,L2-spm-is-apcs-master;
};
qcom,lpm-levels {
diff --git a/arch/arm/configs/msm8226-perf_defconfig b/arch/arm/configs/msm8226-perf_defconfig
index 63fd82b..7bf8edbe 100644
--- a/arch/arm/configs/msm8226-perf_defconfig
+++ b/arch/arm/configs/msm8226-perf_defconfig
@@ -223,6 +223,7 @@
CONFIG_DM_CRYPT=y
CONFIG_NETDEVICES=y
CONFIG_DUMMY=y
+CONFIG_TUN=y
CONFIG_KS8851=y
# CONFIG_MSM_RMNET is not set
CONFIG_MSM_RMNET_BAM=y
diff --git a/arch/arm/configs/msm8226_defconfig b/arch/arm/configs/msm8226_defconfig
index 7d1562b..a9f18fd 100644
--- a/arch/arm/configs/msm8226_defconfig
+++ b/arch/arm/configs/msm8226_defconfig
@@ -205,6 +205,7 @@
CONFIG_BT_HIDP=y
CONFIG_BT_HCISMD=y
CONFIG_CFG80211=y
+CONFIG_CFG80211_INTERNAL_REGDB=y
CONFIG_NL80211_TESTMODE=y
CONFIG_CMA=y
CONFIG_BLK_DEV_LOOP=y
diff --git a/arch/arm/configs/msm8610_defconfig b/arch/arm/configs/msm8610_defconfig
index aec5ce2..0f4e4c6 100644
--- a/arch/arm/configs/msm8610_defconfig
+++ b/arch/arm/configs/msm8610_defconfig
@@ -203,6 +203,7 @@
CONFIG_BT_HIDP=y
CONFIG_BT_HCISMD=y
CONFIG_CFG80211=y
+CONFIG_CFG80211_INTERNAL_REGDB=y
CONFIG_NL80211_TESTMODE=y
CONFIG_CMA=y
CONFIG_BLK_DEV_LOOP=y
diff --git a/arch/arm/configs/msm8960_defconfig b/arch/arm/configs/msm8960_defconfig
index 9b55c3b..1d645e2 100644
--- a/arch/arm/configs/msm8960_defconfig
+++ b/arch/arm/configs/msm8960_defconfig
@@ -253,6 +253,7 @@
CONFIG_BT_HCIUART_IBS=y
CONFIG_MSM_BT_POWER=y
CONFIG_CFG80211=m
+CONFIG_CFG80211_INTERNAL_REGDB=y
# CONFIG_CFG80211_WEXT is not set
CONFIG_RFKILL=y
CONFIG_GENLOCK=y
diff --git a/arch/arm/configs/msm8974_defconfig b/arch/arm/configs/msm8974_defconfig
index 4937a64..2976ee8 100644
--- a/arch/arm/configs/msm8974_defconfig
+++ b/arch/arm/configs/msm8974_defconfig
@@ -240,6 +240,7 @@
CONFIG_BT_HCIUART_ATH3K=y
CONFIG_MSM_BT_POWER=y
CONFIG_CFG80211=y
+CONFIG_CFG80211_INTERNAL_REGDB=y
CONFIG_NL80211_TESTMODE=y
CONFIG_RFKILL=y
CONFIG_GENLOCK=y
diff --git a/arch/arm/kernel/arch_timer.c b/arch/arm/kernel/arch_timer.c
index ac4c7a3..9e27592 100644
--- a/arch/arm/kernel/arch_timer.c
+++ b/arch/arm/kernel/arch_timer.c
@@ -291,7 +291,7 @@
return 0;
}
-static inline cycle_t counter_get_cntpct_mem(void)
+static inline cycle_t notrace counter_get_cntpct_mem(void)
{
u32 cvall, cvalh, thigh;
@@ -304,7 +304,7 @@
return ((cycle_t) cvalh << 32) | cvall;
}
-static inline cycle_t counter_get_cntpct_cp15(void)
+static inline cycle_t notrace counter_get_cntpct_cp15(void)
{
u32 cvall, cvalh;
@@ -312,7 +312,7 @@
return ((cycle_t) cvalh << 32) | cvall;
}
-static inline cycle_t counter_get_cntvct_mem(void)
+static inline cycle_t notrace counter_get_cntvct_mem(void)
{
u32 cvall, cvalh, thigh;
@@ -325,7 +325,7 @@
return ((cycle_t) cvalh << 32) | cvall;
}
-static inline cycle_t counter_get_cntvct_cp15(void)
+static inline cycle_t notrace counter_get_cntvct_cp15(void)
{
u32 cvall, cvalh;
diff --git a/arch/arm/mach-msm/clock-8226.c b/arch/arm/mach-msm/clock-8226.c
index c4097ca..b72cdab 100644
--- a/arch/arm/mach-msm/clock-8226.c
+++ b/arch/arm/mach-msm/clock-8226.c
@@ -353,7 +353,6 @@
#define GPLL1_N_VAL (0x004C)
#define GPLL1_USER_CTL (0x0050)
#define GPLL1_STATUS (0x005C)
-#define PERIPH_NOC_AHB_CBCR (0x0184)
#define NOC_CONF_XPU_AHB_CBCR (0x01C0)
#define MMSS_NOC_CFG_AHB_CBCR (0x024C)
#define MSS_CFG_AHB_CBCR (0x0280)
@@ -1394,17 +1393,6 @@
},
};
-static struct branch_clk gcc_periph_noc_ahb_clk = {
- .cbcr_reg = PERIPH_NOC_AHB_CBCR,
- .has_sibling = 1,
- .base = &virt_bases[GCC_BASE],
- .c = {
- .dbg_name = "gcc_periph_noc_ahb_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(gcc_periph_noc_ahb_clk.c),
- },
-};
-
static struct local_vote_clk gcc_prng_ahb_clk = {
.cbcr_reg = PRNG_AHB_CBCR,
.vote_reg = APCS_CLOCK_BRANCH_ENA_VOTE,
@@ -1571,7 +1559,6 @@
};
static struct measure_mux_entry measure_mux_GCC[] = {
- { &gcc_periph_noc_ahb_clk.c, GCC_BASE, 0x0010 },
{ &gcc_mss_cfg_ahb_clk.c, GCC_BASE, 0x0030 },
{ &gcc_mss_q6_bimc_axi_clk.c, GCC_BASE, 0x0031 },
{ &gcc_usb_hsic_ahb_clk.c, GCC_BASE, 0x0058 },
diff --git a/arch/arm/mach-msm/msm_rtb.c b/arch/arm/mach-msm/msm_rtb.c
index fdf39be..28b2195 100644
--- a/arch/arm/mach-msm/msm_rtb.c
+++ b/arch/arm/mach-msm/msm_rtb.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -89,7 +89,7 @@
.notifier_call = msm_rtb_panic_notifier,
};
-int msm_rtb_event_should_log(enum logk_event_type log_type)
+int notrace msm_rtb_event_should_log(enum logk_event_type log_type)
{
return msm_rtb.initialized && msm_rtb.enabled &&
((1 << (log_type & ~LOGTYPE_NOPC)) & msm_rtb.filter);
@@ -203,7 +203,7 @@
}
#endif
-int uncached_logk_pc(enum logk_event_type log_type, void *caller,
+int notrace uncached_logk_pc(enum logk_event_type log_type, void *caller,
void *data)
{
int i;
@@ -219,7 +219,7 @@
}
EXPORT_SYMBOL(uncached_logk_pc);
-noinline int uncached_logk(enum logk_event_type log_type, void *data)
+noinline int notrace uncached_logk(enum logk_event_type log_type, void *data)
{
return uncached_logk_pc(log_type, __builtin_return_address(0), data);
}
diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c
index 2a6fe62..dcaa4e1 100644
--- a/drivers/gpu/msm/adreno.c
+++ b/drivers/gpu/msm/adreno.c
@@ -912,7 +912,6 @@
static bool adreno_use_default_setstate(struct adreno_device *adreno_dev)
{
return (adreno_isidle(&adreno_dev->dev) ||
- adreno_dev->drawctxt_active == NULL ||
KGSL_STATE_ACTIVE != adreno_dev->dev.state ||
atomic_read(&adreno_dev->dev.active_cnt) == 0 ||
adreno_dev->dev.cff_dump_enable);
diff --git a/drivers/hwmon/qpnp-adc-current.c b/drivers/hwmon/qpnp-adc-current.c
index 490a5ce..2933714 100644
--- a/drivers/hwmon/qpnp-adc-current.c
+++ b/drivers/hwmon/qpnp-adc-current.c
@@ -134,7 +134,8 @@
bool ext_rsense;
u8 id;
u8 sys_gain;
- u8 revision;
+ u8 revision_dig_major;
+ u8 revision_ana_minor;
};
struct qpnp_iadc_chip {
@@ -324,60 +325,244 @@
return 0;
}
-static int32_t qpnp_iadc_comp(int64_t *result, struct qpnp_iadc_comp comp,
+#define QPNP_IADC_PM8941_3_1_REV2 3
+#define QPNP_IADC_PM8941_3_1_REV3 2
+#define QPNP_IADC_PM8026_1_REV2 1
+#define QPNP_IADC_PM8026_1_REV3 2
+#define QPNP_IADC_PM8026_2_REV2 4
+#define QPNP_IADC_PM8026_2_REV3 2
+#define QPNP_IADC_PM8110_1_REV2 2
+#define QPNP_IADC_PM8110_1_REV3 2
+
+#define QPNP_IADC_REV_ID_8941_3_1 1
+#define QPNP_IADC_REV_ID_8026_1_0 2
+#define QPNP_IADC_REV_ID_8026_2_0 3
+#define QPNP_IADC_REV_ID_8110_1_0 4
+
+static void qpnp_temp_comp_version_check(struct qpnp_iadc_chip *iadc,
+ int32_t *version)
+{
+ if ((iadc->iadc_comp.revision_dig_major ==
+ QPNP_IADC_PM8941_3_1_REV2) &&
+ (iadc->iadc_comp.revision_ana_minor ==
+ QPNP_IADC_PM8941_3_1_REV3))
+ *version = QPNP_IADC_REV_ID_8941_3_1;
+ else if ((iadc->iadc_comp.revision_dig_major ==
+ QPNP_IADC_PM8026_1_REV2) &&
+ (iadc->iadc_comp.revision_ana_minor ==
+ QPNP_IADC_PM8026_1_REV3))
+ *version = QPNP_IADC_REV_ID_8026_1_0;
+ else if ((iadc->iadc_comp.revision_dig_major ==
+ QPNP_IADC_PM8026_2_REV2) &&
+ (iadc->iadc_comp.revision_ana_minor ==
+ QPNP_IADC_PM8026_2_REV3))
+ *version = QPNP_IADC_REV_ID_8026_2_0;
+ else if ((iadc->iadc_comp.revision_dig_major ==
+ QPNP_IADC_PM8110_1_REV2) &&
+ (iadc->iadc_comp.revision_ana_minor ==
+ QPNP_IADC_PM8110_1_REV3))
+ *version = QPNP_IADC_REV_ID_8110_1_0;
+ else
+ *version = -EINVAL;
+
+ return;
+}
+
+#define QPNP_COEFF_1 969000
+#define QPNP_COEFF_2 32
+#define QPNP_COEFF_3_TYPEA 1700000
+#define QPNP_COEFF_3_TYPEB 1000000
+#define QPNP_COEFF_4 100
+#define QPNP_COEFF_5 15000
+#define QPNP_COEFF_6 100000
+#define QPNP_COEFF_7 21700
+#define QPNP_COEFF_8 100000000
+#define QPNP_COEFF_9 38
+#define QPNP_COEFF_10 40
+#define QPNP_COEFF_11 7
+#define QPNP_COEFF_12 11
+#define QPNP_COEFF_13 37
+#define QPNP_COEFF_14 39
+#define QPNP_COEFF_15 9
+#define QPNP_COEFF_16 11
+#define QPNP_COEFF_17 851200
+#define QPNP_COEFF_18 296500
+#define QPNP_COEFF_19 222400
+#define QPNP_COEFF_20 813800
+#define QPNP_COEFF_21 1059100
+#define QPNP_COEFF_22 5000000
+#define QPNP_COEFF_23 3722500
+#define QPNP_COEFF_24 84
+
+static int32_t qpnp_iadc_comp(int64_t *result, struct qpnp_iadc_chip *iadc,
int64_t die_temp)
{
- int64_t temp_var = 0, sign_coeff = 0, sys_gain_coeff = 0, old;
+ int64_t temp_var = 0, sys_gain_coeff = 0, old;
+ int32_t coeff_a = 0, coeff_b = 0;
+ int32_t version;
+
+ qpnp_temp_comp_version_check(iadc, &version);
+ if (version == -EINVAL)
+ return 0;
old = *result;
*result = *result * 1000000;
- if (comp.revision == QPNP_IADC_VER_3_1) {
- /* revision 3.1 */
- if (comp.sys_gain > 127)
- sys_gain_coeff = -QPNP_COEFF_6 * (comp.sys_gain - 128);
- else
- sys_gain_coeff = QPNP_COEFF_6 * comp.sys_gain;
- } else if (comp.revision != QPNP_IADC_VER_3_0) {
- /* unsupported revision, do not compensate */
- *result = old;
- return 0;
+ if (iadc->iadc_comp.sys_gain > 127)
+ sys_gain_coeff = -QPNP_COEFF_6 *
+ (iadc->iadc_comp.sys_gain - 128);
+ else
+ sys_gain_coeff = QPNP_COEFF_6 *
+ iadc->iadc_comp.sys_gain;
+
+ switch (version) {
+ case QPNP_IADC_REV_ID_8941_3_1:
+ switch (iadc->iadc_comp.id) {
+ case COMP_ID_GF:
+ if (!iadc->iadc_comp.ext_rsense) {
+ /* internal rsense */
+ coeff_a = QPNP_COEFF_2;
+ coeff_b = -QPNP_COEFF_3_TYPEA;
+ } else {
+ if (*result < 0) {
+ /* charge */
+ coeff_a = QPNP_COEFF_5;
+ coeff_b = QPNP_COEFF_6;
+ } else {
+ /* discharge */
+ coeff_a = -QPNP_COEFF_7;
+ coeff_b = QPNP_COEFF_6;
+ }
+ }
+ break;
+ case COMP_ID_TSMC:
+ default:
+ if (!iadc->iadc_comp.ext_rsense) {
+ /* internal rsense */
+ coeff_a = QPNP_COEFF_2;
+ coeff_b = -QPNP_COEFF_3_TYPEB;
+ } else {
+ if (*result < 0) {
+ /* charge */
+ coeff_a = QPNP_COEFF_5;
+ coeff_b = QPNP_COEFF_6;
+ } else {
+ /* discharge */
+ coeff_a = -QPNP_COEFF_7;
+ coeff_b = QPNP_COEFF_6;
+ }
+ }
+ break;
+ }
+ break;
+ case QPNP_IADC_REV_ID_8026_1_0:
+ /* pm8026 rev 1.0 */
+ switch (iadc->iadc_comp.id) {
+ case COMP_ID_GF:
+ if (!iadc->iadc_comp.ext_rsense) {
+ /* internal rsense */
+ if (*result < 0) {
+ /* charge */
+ coeff_a = QPNP_COEFF_9;
+ coeff_b = -QPNP_COEFF_17;
+ } else {
+ coeff_a = QPNP_COEFF_10;
+ coeff_b = QPNP_COEFF_18;
+ }
+ } else {
+ if (*result < 0) {
+ /* charge */
+ coeff_a = -QPNP_COEFF_11;
+ coeff_b = 0;
+ } else {
+ /* discharge */
+ coeff_a = -QPNP_COEFF_17;
+ coeff_b = -QPNP_COEFF_19;
+ }
+ }
+ break;
+ case COMP_ID_TSMC:
+ default:
+ if (!iadc->iadc_comp.ext_rsense) {
+ /* internal rsense */
+ if (*result < 0) {
+ /* charge */
+ coeff_a = QPNP_COEFF_13;
+ coeff_b = -QPNP_COEFF_20;
+ } else {
+ coeff_a = QPNP_COEFF_14;
+ coeff_b = QPNP_COEFF_21;
+ }
+ } else {
+ if (*result < 0) {
+ /* charge */
+ coeff_a = -QPNP_COEFF_15;
+ coeff_b = 0;
+ } else {
+ /* discharge */
+ coeff_a = -QPNP_COEFF_12;
+ coeff_b = -QPNP_COEFF_19;
+ }
+ }
+ break;
+ }
+ break;
+ case QPNP_IADC_REV_ID_8110_1_0:
+ /* pm8110 rev 1.0 */
+ switch (iadc->iadc_comp.id) {
+ case COMP_ID_GF:
+ if (!iadc->iadc_comp.ext_rsense) {
+ /* internal rsense */
+ if (*result < 0) {
+ /* charge */
+ coeff_a = QPNP_COEFF_24;
+ coeff_b = -QPNP_COEFF_22;
+ } else {
+ coeff_a = QPNP_COEFF_24;
+ coeff_b = -QPNP_COEFF_23;
+ }
+ }
+ break;
+ case COMP_ID_SMIC:
+ default:
+ if (!iadc->iadc_comp.ext_rsense) {
+ /* internal rsense */
+ if (*result < 0) {
+ /* charge */
+ coeff_a = QPNP_COEFF_24;
+ coeff_b = -QPNP_COEFF_22;
+ } else {
+ coeff_a = QPNP_COEFF_24;
+ coeff_b = -QPNP_COEFF_23;
+ }
+ }
+ break;
+ }
+ break;
+ default:
+ case QPNP_IADC_REV_ID_8026_2_0:
+ /* pm8026 rev 1.0 */
+ coeff_a = 0;
+ coeff_b = 0;
+ break;
}
- if (!comp.ext_rsense) {
+ temp_var = (coeff_a * die_temp) + coeff_b;
+ temp_var = div64_s64(temp_var, QPNP_COEFF_4);
+ temp_var = 1000000 * (1000000 - temp_var);
+
+ if (!iadc->iadc_comp.ext_rsense) {
/* internal rsense */
- switch (comp.id) {
- case COMP_ID_TSMC:
- temp_var = ((QPNP_COEFF_2 * die_temp) -
- QPNP_COEFF_3_TYPEB);
- break;
- case COMP_ID_GF:
- default:
- temp_var = ((QPNP_COEFF_2 * die_temp) -
- QPNP_COEFF_3_TYPEA);
- break;
- }
- temp_var = div64_s64(temp_var, QPNP_COEFF_4);
- if (comp.revision == QPNP_IADC_VER_3_0)
- temp_var = QPNP_COEFF_1 * (1000000 - temp_var);
- else if (comp.revision == QPNP_IADC_VER_3_1)
- temp_var = 1000000 * (1000000 - temp_var);
*result = div64_s64(*result * 1000000, temp_var);
}
- sign_coeff = *result < 0 ? QPNP_COEFF_7 : QPNP_COEFF_5;
- if (comp.ext_rsense) {
- /* external rsense and current charging */
- temp_var = div64_s64((-sign_coeff * die_temp) + QPNP_COEFF_8,
- QPNP_COEFF_4);
- temp_var = 1000000000 - temp_var;
- if (comp.revision == QPNP_IADC_VER_3_1) {
- sys_gain_coeff = (1000000 +
- div64_s64(sys_gain_coeff, QPNP_COEFF_4));
- temp_var = div64_s64(temp_var * sys_gain_coeff,
- 1000000000);
- }
- *result = div64_s64(*result, temp_var);
+ if (iadc->iadc_comp.ext_rsense) {
+ /* external rsense */
+ sys_gain_coeff = (1000000 +
+ div64_s64(sys_gain_coeff, QPNP_COEFF_4));
+ temp_var = div64_s64(temp_var * sys_gain_coeff,
+ 1000000000);
+ *result = div64_s64(*result * 1000, temp_var);
}
pr_debug("%lld compensated into %lld\n", old, *result);
@@ -386,7 +571,7 @@
int32_t qpnp_iadc_comp_result(struct qpnp_iadc_chip *iadc, int64_t *result)
{
- return qpnp_iadc_comp(result, iadc->iadc_comp, iadc->die_temp);
+ return qpnp_iadc_comp(result, iadc, iadc->die_temp);
}
EXPORT_SYMBOL(qpnp_iadc_comp_result);
@@ -401,9 +586,16 @@
}
rc = qpnp_iadc_read_reg(iadc, QPNP_IADC_REVISION2,
- &iadc->iadc_comp.revision);
+ &iadc->iadc_comp.revision_dig_major);
if (rc < 0) {
- pr_err("qpnp adc revision read failed with %d\n", rc);
+ pr_err("qpnp adc revision2 read failed with %d\n", rc);
+ return rc;
+ }
+
+ rc = qpnp_iadc_read_reg(iadc, QPNP_IADC_REVISION3,
+ &iadc->iadc_comp.revision_ana_minor);
+ if (rc < 0) {
+ pr_err("qpnp adc revision3 read failed with %d\n", rc);
return rc;
}
@@ -417,9 +609,10 @@
if (iadc->external_rsense)
iadc->iadc_comp.ext_rsense = true;
- pr_debug("fab id = %u, revision = %u, sys gain = %u, external_rsense = %d\n",
+ pr_debug("fab id = %u, revision_dig_major = %u, revision_ana_minor = %u sys gain = %u, external_rsense = %d\n",
iadc->iadc_comp.id,
- iadc->iadc_comp.revision,
+ iadc->iadc_comp.revision_dig_major,
+ iadc->iadc_comp.revision_ana_minor,
iadc->iadc_comp.sys_gain,
iadc->iadc_comp.ext_rsense);
return rc;
@@ -571,6 +764,7 @@
return 0;
}
+#define IADC_IDEAL_RAW_GAIN 3291
int32_t qpnp_iadc_calibrate_for_trim(struct qpnp_iadc_chip *iadc,
bool batfet_closed)
{
@@ -629,6 +823,12 @@
goto fail;
}
+ if (iadc->iadc_comp.revision_dig_major == QPNP_IADC_PM8026_2_REV2
+ && iadc->iadc_comp.revision_ana_minor ==
+ QPNP_IADC_PM8026_2_REV3)
+ iadc->adc->calib.gain_raw =
+ iadc->adc->calib.offset_raw + IADC_IDEAL_RAW_GAIN;
+
pr_debug("raw gain:0x%x, raw offset:0x%x\n",
iadc->adc->calib.gain_raw, iadc->adc->calib.offset_raw);
diff --git a/drivers/hwmon/qpnp-adc-voltage.c b/drivers/hwmon/qpnp-adc-voltage.c
index 548764f..e37f75a 100644
--- a/drivers/hwmon/qpnp-adc-voltage.c
+++ b/drivers/hwmon/qpnp-adc-voltage.c
@@ -113,6 +113,8 @@
u8 id;
struct work_struct trigger_completion_work;
bool vadc_poll_eoc;
+ u8 revision_ana_minor;
+ u8 revision_dig_major;
struct sensor_device_attribute sens_attr[0];
};
@@ -494,29 +496,189 @@
return 0;
}
-static int32_t qpnp_vbat_sns_comp(int64_t *result, u8 id, int64_t die_temp)
+#define QPNP_VBAT_COEFF_1 3000
+#define QPNP_VBAT_COEFF_2 45810000
+#define QPNP_VBAT_COEFF_3 100000
+#define QPNP_VBAT_COEFF_4 3500
+#define QPNP_VBAT_COEFF_5 80000000
+#define QPNP_VBAT_COEFF_6 4400
+#define QPNP_VBAT_COEFF_7 32200000
+#define QPNP_VBAT_COEFF_8 3880
+#define QPNP_VBAT_COEFF_9 5770
+#define QPNP_VBAT_COEFF_10 3660
+#define QPNP_VBAT_COEFF_11 5320
+#define QPNP_VBAT_COEFF_12 8060000
+#define QPNP_VBAT_COEFF_13 102640000
+#define QPNP_VBAT_COEFF_14 22220000
+#define QPNP_VBAT_COEFF_15 83060000
+
+#define QPNP_VADC_REV_ID_8941_3_1 1
+#define QPNP_VADC_REV_ID_8026_1_0 2
+#define QPNP_VADC_REV_ID_8026_2_0 3
+
+static void qpnp_temp_comp_version_check(struct qpnp_vadc_chip *vadc,
+ int32_t *version)
+{
+ if (vadc->revision_dig_major == 3 &&
+ vadc->revision_ana_minor == 2)
+ *version = QPNP_VADC_REV_ID_8941_3_1;
+ else if (vadc->revision_dig_major == 1 &&
+ vadc->revision_ana_minor == 2)
+ *version = QPNP_VADC_REV_ID_8026_1_0;
+ else if (vadc->revision_dig_major == 2 &&
+ vadc->revision_ana_minor == 2)
+ *version = QPNP_VADC_REV_ID_8026_2_0;
+ else
+ *version = -EINVAL;
+
+ return;
+}
+
+static int32_t qpnp_ocv_comp(int64_t *result,
+ struct qpnp_vadc_chip *vadc, int64_t die_temp)
{
int64_t temp_var = 0;
int64_t old = *result;
+ int32_t version;
+
+ qpnp_temp_comp_version_check(vadc, &version);
+ if (version == -EINVAL)
+ return 0;
if (die_temp < 25000)
return 0;
- switch (id) {
- case COMP_ID_TSMC:
- temp_var = (((die_temp *
- (-QPNP_VBAT_SNS_COEFF_1_TYPEB))
- + QPNP_VBAT_SNS_COEFF_2_TYPEB));
- break;
+ if (die_temp > 60000)
+ die_temp = 60000;
+
+ switch (version) {
+ case QPNP_VADC_REV_ID_8941_3_1:
+ switch (vadc->id) {
+ case COMP_ID_TSMC:
+ temp_var = (((die_temp *
+ (-QPNP_VBAT_COEFF_4))
+ + QPNP_VBAT_COEFF_5));
+ break;
+ default:
+ case COMP_ID_GF:
+ temp_var = (((die_temp *
+ (-QPNP_VBAT_COEFF_1))
+ + QPNP_VBAT_COEFF_2));
+ break;
+ }
+ break;
+ case QPNP_VADC_REV_ID_8026_1_0:
+ switch (vadc->id) {
+ case COMP_ID_TSMC:
+ temp_var = (((die_temp *
+ (-QPNP_VBAT_COEFF_10))
+ - QPNP_VBAT_COEFF_14));
+ break;
+ default:
+ case COMP_ID_GF:
+ temp_var = (((die_temp *
+ (-QPNP_VBAT_COEFF_8))
+ + QPNP_VBAT_COEFF_12));
+ break;
+ }
+ break;
+ case QPNP_VADC_REV_ID_8026_2_0:
+ switch (vadc->id) {
+ case COMP_ID_TSMC:
+ temp_var = ((die_temp - 2500) *
+ (-QPNP_VBAT_COEFF_10));
+ break;
+ default:
+ case COMP_ID_GF:
+ temp_var = ((die_temp - 2500) *
+ (-QPNP_VBAT_COEFF_8));
+ break;
+ }
+ break;
default:
- case COMP_ID_GF:
- temp_var = (((die_temp *
- (-QPNP_VBAT_SNS_COEFF_1_TYPEA))
- + QPNP_VBAT_SNS_COEFF_2_TYPEA));
- break;
+ temp_var = 0;
+ break;
}
- temp_var = div64_s64(temp_var, QPNP_VBAT_SNS_COEFF_3);
+ temp_var = div64_s64(temp_var, QPNP_VBAT_COEFF_3);
+
+ temp_var = 1000000 + temp_var;
+
+ *result = *result * temp_var;
+
+ *result = div64_s64(*result, 1000000);
+ pr_debug("%lld compensated into %lld\n", old, *result);
+
+ return 0;
+}
+
+static int32_t qpnp_vbat_sns_comp(int64_t *result,
+ struct qpnp_vadc_chip *vadc, int64_t die_temp)
+{
+ int64_t temp_var = 0;
+ int64_t old = *result;
+ int32_t version;
+
+ qpnp_temp_comp_version_check(vadc, &version);
+ if (version == -EINVAL)
+ return 0;
+
+ if (die_temp < 25000)
+ return 0;
+
+ /* min(die_temp_c, 60_degC) */
+ if (die_temp > 60000)
+ die_temp = 60000;
+
+ switch (version) {
+ case QPNP_VADC_REV_ID_8941_3_1:
+ switch (vadc->id) {
+ case COMP_ID_TSMC:
+ temp_var = (die_temp *
+ (-QPNP_VBAT_COEFF_1));
+ break;
+ default:
+ case COMP_ID_GF:
+ temp_var = (((die_temp *
+ (-QPNP_VBAT_COEFF_6))
+ + QPNP_VBAT_COEFF_7));
+ break;
+ }
+ break;
+ case QPNP_VADC_REV_ID_8026_1_0:
+ switch (vadc->id) {
+ case COMP_ID_TSMC:
+ temp_var = (((die_temp *
+ (-QPNP_VBAT_COEFF_11))
+ + QPNP_VBAT_COEFF_15));
+ break;
+ default:
+ case COMP_ID_GF:
+ temp_var = (((die_temp *
+ (-QPNP_VBAT_COEFF_9))
+ + QPNP_VBAT_COEFF_13));
+ break;
+ }
+ break;
+ case QPNP_VADC_REV_ID_8026_2_0:
+ switch (vadc->id) {
+ case COMP_ID_TSMC:
+ temp_var = ((die_temp - 2500) *
+ (-QPNP_VBAT_COEFF_11));
+ break;
+ default:
+ case COMP_ID_GF:
+ temp_var = ((die_temp - 2500) *
+ (-QPNP_VBAT_COEFF_9));
+ break;
+ }
+ break;
+ default:
+ temp_var = 0;
+ break;
+ }
+
+ temp_var = div64_s64(temp_var, QPNP_VBAT_COEFF_3);
temp_var = 1000000 + temp_var;
@@ -545,8 +707,7 @@
return rc;
}
- rc = qpnp_vbat_sns_comp(result, vadc->id,
- die_temp_result.physical);
+ rc = qpnp_ocv_comp(result, vadc, die_temp_result.physical);
if (rc < 0)
pr_err("Error with vbat compensation\n");
@@ -981,7 +1142,7 @@
return rc;
}
- rc = qpnp_vbat_sns_comp(&result->physical, vadc->id,
+ rc = qpnp_vbat_sns_comp(&result->physical, vadc,
die_temp_result.physical);
if (rc < 0)
pr_err("Error with vbat compensation\n");
@@ -1234,6 +1395,20 @@
}
vadc->id = fab_id;
+ rc = qpnp_vadc_read_reg(vadc, QPNP_VADC_REVISION2,
+ &vadc->revision_dig_major);
+ if (rc < 0) {
+ pr_err("qpnp adc dig_major rev read failed with %d\n", rc);
+ goto err_setup;
+ }
+
+ rc = qpnp_vadc_read_reg(vadc, QPNP_VADC_REVISION3,
+ &vadc->revision_ana_minor);
+ if (rc < 0) {
+ pr_err("qpnp adc ana_minor rev read failed with %d\n", rc);
+ goto err_setup;
+ }
+
rc = qpnp_vadc_warm_rst_configure(vadc);
if (rc < 0) {
pr_err("Setting perp reset on warm reset failed %d\n", rc);
diff --git a/drivers/input/misc/mpu3050.c b/drivers/input/misc/mpu3050.c
index e0d8a47..1537866 100644
--- a/drivers/input/misc/mpu3050.c
+++ b/drivers/input/misc/mpu3050.c
@@ -796,6 +796,7 @@
client->irq, error);
goto err_pm_set_suspended;
}
+ disable_irq(client->irq);
}
error = input_register_device(idev);
diff --git a/drivers/media/radio/radio-iris.c b/drivers/media/radio/radio-iris.c
index da8f6b8..a4cf18e 100644
--- a/drivers/media/radio/radio-iris.c
+++ b/drivers/media/radio/radio-iris.c
@@ -2061,8 +2061,7 @@
if (radio->fm_st_rsp.station_rsp.stereo_prg)
iris_q_event(radio, IRIS_EVT_STEREO);
-
- if (radio->fm_st_rsp.station_rsp.mute_mode)
+ else if (radio->fm_st_rsp.station_rsp.stereo_prg == 0)
iris_q_event(radio, IRIS_EVT_MONO);
if (radio->fm_st_rsp.station_rsp.rds_sync_status)
diff --git a/drivers/video/msm/mdss/mdss_mdp_ctl.c b/drivers/video/msm/mdss/mdss_mdp_ctl.c
index 4a426cf..1186f1e 100644
--- a/drivers/video/msm/mdss/mdss_mdp_ctl.c
+++ b/drivers/video/msm/mdss/mdss_mdp_ctl.c
@@ -515,13 +515,13 @@
ctl = mdss_mdp_ctl_alloc(mdss_res, mdss_res->nmixers_intf);
if (!ctl) {
- pr_err("unable to allocate wb ctl\n");
+ pr_debug("unable to allocate wb ctl\n");
return NULL;
}
mixer = mdss_mdp_mixer_alloc(ctl, MDSS_MDP_MIXER_TYPE_WRITEBACK, false);
if (!mixer) {
- pr_err("unable to allocate wb mixer\n");
+ pr_debug("unable to allocate wb mixer\n");
goto error;
}
diff --git a/drivers/video/msm/mdss/mdss_mdp_rotator.c b/drivers/video/msm/mdss/mdss_mdp_rotator.c
index fcd90e1..8381c5b 100644
--- a/drivers/video/msm/mdss/mdss_mdp_rotator.c
+++ b/drivers/video/msm/mdss/mdss_mdp_rotator.c
@@ -74,14 +74,14 @@
mixer = mdss_mdp_wb_mixer_alloc(1);
if (!mixer) {
- pr_err("wb mixer alloc failed\n");
+ pr_debug("wb mixer alloc failed\n");
return NULL;
}
pipe = mdss_mdp_pipe_alloc_dma(mixer);
if (!pipe) {
mdss_mdp_wb_mixer_destroy(mixer);
- pr_err("dma pipe allocation failed\n");
+ pr_debug("dma pipe allocation failed\n");
}
return pipe;
@@ -134,6 +134,7 @@
static int mdss_mdp_rotator_pipe_dequeue(struct mdss_mdp_rotator_session *rot)
{
+ int rc;
if (rot->pipe) {
pr_debug("reusing existing session=%d\n", rot->pipe->num);
mdss_mdp_rotator_busy_wait(rot);
@@ -153,12 +154,19 @@
struct mdss_mdp_rotator_session,
head);
- pr_debug("wait for rotator pipe=%d\n", tmp->pipe->num);
- mdss_mdp_rotator_busy_wait(tmp);
+ rc = mdss_mdp_rotator_busy_wait(tmp);
+ list_del(&tmp->head);
+ if (rc) {
+ pr_err("no pipe attached to session=%d\n",
+ tmp->session_id);
+ return rc;
+ } else {
+ pr_debug("waited for rotator pipe=%d\n",
+ tmp->pipe->num);
+ }
rot->pipe = tmp->pipe;
tmp->pipe = NULL;
- list_del(&tmp->head);
list_add_tail(&rot->head, &rotator_queue);
} else {
pr_err("no available rotator pipes\n");
diff --git a/include/linux/qpnp/qpnp-adc.h b/include/linux/qpnp/qpnp-adc.h
index 9a49c5e..13bef66 100644
--- a/include/linux/qpnp/qpnp-adc.h
+++ b/include/linux/qpnp/qpnp-adc.h
@@ -622,27 +622,6 @@
COMP_ID_NUM,
};
-enum qpnp_iadc_rev {
- QPNP_IADC_VER_3_0 = 0x1,
- QPNP_IADC_VER_3_1 = 0x3,
-};
-
-#define QPNP_VBAT_SNS_COEFF_1_TYPEA 3000
-#define QPNP_VBAT_SNS_COEFF_2_TYPEA 45810000
-#define QPNP_VBAT_SNS_COEFF_3 100000
-#define QPNP_VBAT_SNS_COEFF_1_TYPEB 3500
-#define QPNP_VBAT_SNS_COEFF_2_TYPEB 80000000
-
-#define QPNP_COEFF_1 969000
-#define QPNP_COEFF_2 34
-#define QPNP_COEFF_3_TYPEA 1700000
-#define QPNP_COEFF_3_TYPEB 1000000
-#define QPNP_COEFF_4 100
-#define QPNP_COEFF_5 15000
-#define QPNP_COEFF_6 100000
-#define QPNP_COEFF_7 21700
-#define QPNP_COEFF_8 100000000
-
/**
* struct qpnp_adc_tm_config - Represent ADC Thermal Monitor configuration.
* @channel: ADC channel for which thermal monitoring is requested.