| commit | ac51295ccc0ff922fea62cfc6f72cddf9c6c7306 | [log] [tgz] |
|---|---|---|
| author | Erik Andrén <erik.andren@gmail.com> | Wed Jun 24 04:30:56 2009 -0300 |
| committer | Mauro Carvalho Chehab <mchehab@redhat.com> | Fri Jul 24 14:03:21 2009 -0300 |
| tree | dff9711e1638b82cabac8332a497192ee111aed0 | |
| parent | 36a516d953e02523e78ce27fbff91a968a9e5751 [diff] |
V4L/DVB (12222): gspca - stv06xx-hdcs: Fix sensor sequence bug All hdcs registers use bit 0 as a read/write flag and needs to be shifted one bit to the left. This wasn't accounted for when doing a sequence of writes. Signed-off-by: Erik Andrén <erik.andren@gmail.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>