Merge "USB: ci13xxx_msm: add module license" into msm-3.0
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 64877d1..b6570c7 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -6,6 +6,10 @@
config GIC_NON_BANKED
bool
+config GIC_SECURE
+ bool
+ depends on ARM_GIC
+
config ARM_VIC
bool
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index bb4d971..4e43cb2 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -156,7 +156,7 @@
return d->hwirq;
}
-#ifdef CONFIG_CPU_V7
+#if defined(CONFIG_CPU_V7) && defined(CONFIG_GIC_SECURE)
static const inline bool is_cpu_secure(void)
{
unsigned int dscr;
diff --git a/arch/arm/configs/msm7627a-perf_defconfig b/arch/arm/configs/msm7627a-perf_defconfig
index 7decf0a..4f0212f 100644
--- a/arch/arm/configs/msm7627a-perf_defconfig
+++ b/arch/arm/configs/msm7627a-perf_defconfig
@@ -255,6 +255,7 @@
CONFIG_FB_MSM_TRIPLE_BUFFER=y
CONFIG_FB_MSM_MDP30=y
CONFIG_FB_MSM_MDP303=y
+CONFIG_FB_MSM_LCDC_TRULY_HVGA_IPS3P2335_PT_PANEL=y
CONFIG_FB_MSM_MIPI_PANEL_DETECT=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
diff --git a/arch/arm/configs/msm7627a_defconfig b/arch/arm/configs/msm7627a_defconfig
index 052c715..3dde352 100644
--- a/arch/arm/configs/msm7627a_defconfig
+++ b/arch/arm/configs/msm7627a_defconfig
@@ -256,6 +256,7 @@
CONFIG_FB_MSM_TRIPLE_BUFFER=y
CONFIG_FB_MSM_MDP30=y
CONFIG_FB_MSM_MDP303=y
+CONFIG_FB_MSM_LCDC_TRULY_HVGA_IPS3P2335_PT_PANEL=y
CONFIG_FB_MSM_MIPI_PANEL_DETECT=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
diff --git a/arch/arm/kernel/smp_scu.c b/arch/arm/kernel/smp_scu.c
index cb7dd40..dbf1e6e 100644
--- a/arch/arm/kernel/smp_scu.c
+++ b/arch/arm/kernel/smp_scu.c
@@ -33,7 +33,7 @@
/*
* Enable the SCU
*/
-void __init scu_enable(void __iomem *scu_base)
+void scu_enable(void __iomem *scu_base)
{
u32 scu_ctrl;
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 2494999..398b28f 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -250,6 +250,7 @@
config ARCH_MSM9615
bool "MSM9615"
select ARM_GIC
+ select GIC_SECURE
select ARCH_MSM_CORTEX_A5
select CPU_V7
select MSM_V2_TLMM
@@ -314,11 +315,13 @@
config ARCH_MSM_SCORPIONMP
select ARCH_MSM_SCORPION
select MSM_SMP
+ select HAVE_ARCH_HAS_CURRENT_TIMER
bool
config ARCH_MSM_KRAITMP
select ARCH_MSM_KRAIT
select MSM_SMP
+ select HAVE_ARCH_HAS_CURRENT_TIMER
bool
config ARCH_MSM_CORTEXMP
@@ -2193,4 +2196,6 @@
algorithm and the algorithm returns a frequency for the core which is
passed to the frequency change driver.
+config HAVE_ARCH_HAS_CURRENT_TIMER
+ bool
endif
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index f46b226..cd6e36c 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -246,7 +246,7 @@
obj-$(CONFIG_ARCH_MSM8960) += devices-8960.o
obj-$(CONFIG_ARCH_APQ8064) += devices-8960.o devices-8064.o
board-8960-all-objs += board-8960.o board-8960-camera.o board-8960-display.o board-8960-pmic.o board-8960-storage.o board-8960-gpiomux.o
-board-8930-all-objs += board-8930.o board-8930-camera.o board-8930-display.o board-8930-pmic.o board-8930-storage.o board-8930-gpiomux.o devices-8930.o
+board-8930-all-objs += board-8930.o board-8930-camera.o board-8930-display.o board-8930-pmic.o board-8930-storage.o board-8930-gpiomux.o devices-8930.o board-8930-gpu.o
board-8064-all-objs += board-8064.o board-8064-pmic.o board-8064-storage.o board-8064-gpiomux.o board-8064-camera.o board-8064-display.o board-8064-gpu.o
obj-$(CONFIG_MACH_MSM8960_SIM) += board-8960-all.o board-8960-regulator.o
obj-$(CONFIG_MACH_MSM8960_RUMI3) += board-8960-all.o board-8960-regulator.o
diff --git a/arch/arm/mach-msm/acpuclock-7201.c b/arch/arm/mach-msm/acpuclock-7201.c
index 687033c..35e8eba 100644
--- a/arch/arm/mach-msm/acpuclock-7201.c
+++ b/arch/arm/mach-msm/acpuclock-7201.c
@@ -29,8 +29,9 @@
#include <linux/sort.h>
#include <mach/board.h>
#include <mach/msm_iomap.h>
-#include <asm/mach-types.h>
#include <mach/socinfo.h>
+#include <asm/mach-types.h>
+#include <asm/cpu.h>
#include "smd_private.h"
#include "acpuclock.h"
@@ -87,6 +88,7 @@
unsigned int ahbclk_div;
int vdd;
unsigned int axiclk_khz;
+ unsigned long lpj; /* loops_per_jiffy */
/* Pointers in acpu_freq_tbl[] for max up/down steppings. */
struct clkctl_acpu_speed *down[ACPU_PLL_END];
struct clkctl_acpu_speed *up[ACPU_PLL_END];
@@ -114,7 +116,7 @@
{ 0, 400000, ACPU_PLL_2, 2, 2, 133333, 2, 5, 160000 },
{ 1, 480000, ACPU_PLL_0, 4, 1, 160000, 2, 6, 160000 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 200000, 2, 7, 200000 },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7627 with CDMA capable modem */
@@ -128,7 +130,7 @@
{ 0, 400000, ACPU_PLL_2, 2, 2, 133333, 2, 5, 160000 },
{ 1, 480000, ACPU_PLL_0, 4, 1, 160000, 2, 6, 160000 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 200000, 2, 7, 200000 },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7627 with GSM capable modem - PLL2 @ 800 */
@@ -142,7 +144,7 @@
{ 0, 400000, ACPU_PLL_2, 2, 1, 133333, 2, 5, 160000 },
{ 1, 480000, ACPU_PLL_0, 4, 1, 160000, 2, 6, 160000 },
{ 1, 800000, ACPU_PLL_2, 2, 0, 200000, 3, 7, 200000 },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7627 with CDMA capable modem - PLL2 @ 800 */
@@ -156,7 +158,7 @@
{ 0, 400000, ACPU_PLL_2, 2, 1, 133333, 2, 5, 160000 },
{ 1, 480000, ACPU_PLL_0, 4, 1, 160000, 2, 6, 160000 },
{ 1, 800000, ACPU_PLL_2, 2, 0, 200000, 3, 7, 200000 },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7627a PLL2 @ 1200MHz with GSM capable modem */
@@ -171,7 +173,7 @@
{ 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 122880 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
{ 1, 800000, ACPU_PLL_4, 6, 0, 100000, 3, 7, 200000 },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7627a PLL2 @ 1200MHz with CDMA capable modem */
@@ -186,7 +188,7 @@
{ 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 120000 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
{ 1, 800000, ACPU_PLL_4, 6, 0, 100000, 3, 7, 200000 },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7627aa PLL4 @ 1008MHz with GSM capable modem */
@@ -201,7 +203,7 @@
{ 0, 504000, ACPU_PLL_4, 6, 1, 63000, 3, 6, 200000 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
{ 1, 1008000, ACPU_PLL_4, 6, 0, 126000, 3, 7, 200000},
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7627aa PLL4 @ 1008MHz with CDMA capable modem */
@@ -216,7 +218,7 @@
{ 0, 504000, ACPU_PLL_4, 6, 1, 63000, 3, 6, 200000 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
{ 1, 1008000, ACPU_PLL_4, 6, 0, 126000, 3, 7, 200000},
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 8625 PLL4 @ 1209MHz with GSM capable modem */
@@ -230,7 +232,7 @@
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
{ 0, 604800, ACPU_PLL_4, 6, 1, 75600, 3, 6, 200000 },
{ 1, 1209600, ACPU_PLL_4, 6, 0, 151200, 3, 7, 200000},
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 8625 PLL4 @ 1209MHz with CDMA capable modem */
@@ -244,7 +246,7 @@
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
{ 0, 604800, ACPU_PLL_4, 6, 1, 75600, 3, 6, 200000 },
{ 1, 1209600, ACPU_PLL_4, 6, 0, 151200, 3, 7, 200000},
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7625a PLL2 @ 1200MHz with GSM capable modem */
@@ -258,7 +260,7 @@
{ 0, 400000, ACPU_PLL_2, 2, 2, 50000, 3, 4, 122880 },
{ 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 122880 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7627a PLL2 @ 1200MHz with GSM capable modem */
@@ -273,7 +275,7 @@
{ 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 122880 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
{ 1, 800000, ACPU_PLL_4, 6, 0, 100000, 3, 7, 200000 },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7627a PLL2 @ 1200MHz with CDMA capable modem */
@@ -288,7 +290,7 @@
{ 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 120000 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
{ 1, 800000, ACPU_PLL_4, 6, 0, 100000, 3, 7, 200000 },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7627aa PLL4 @ 1008MHz with GSM capable modem */
@@ -303,7 +305,7 @@
{ 0, 504000, ACPU_PLL_4, 6, 1, 63000, 3, 6, 200000 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
{ 1, 1008000, ACPU_PLL_4, 6, 0, 126000, 3, 7, 200000},
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7627aa PLL4 @ 1008MHz with CDMA capable modem */
@@ -318,7 +320,7 @@
{ 0, 504000, ACPU_PLL_4, 6, 1, 63000, 3, 6, 200000 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
{ 1, 1008000, ACPU_PLL_4, 6, 0, 126000, 3, 7, 200000},
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
/* 7625a PLL2 @ 1200MHz with GSM capable modem */
@@ -332,7 +334,7 @@
{ 0, 400000, ACPU_PLL_2, 2, 2, 50000, 3, 4, 122880 },
{ 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 122880 },
{ 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 200000 },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, {0, 0, 0, 0} }
};
#define PLL_CONFIG(m0, m1, m2, m4) { \
@@ -607,6 +609,16 @@
acpuclk_set_div(cur_s);
drv_state.current_speed = cur_s;
+ /* Re-adjust lpj for the new clock speed. */
+#ifdef CONFIG_SMP
+ for_each_possible_cpu(cpu) {
+ per_cpu(cpu_data, cpu).loops_per_jiffy =
+ cur_s->lpj;
+ }
+#endif
+ /* Adjust the global one */
+ loops_per_jiffy = cur_s->lpj;
+
mb();
udelay(50);
}
@@ -790,6 +802,27 @@
return found_khz;
}
+static void __init lpj_init(void)
+{
+ int i = 0, cpu;
+ const struct clkctl_acpu_speed *base_clk = drv_state.current_speed;
+ unsigned long loops;
+
+ for_each_possible_cpu(cpu) {
+#ifdef CONFIG_SMP
+ loops = per_cpu(cpu_data, cpu).loops_per_jiffy;
+#else
+ loops = loops_per_jiffy;
+#endif
+ for (i = 0; acpu_freq_tbl[i].a11clk_khz; i++) {
+ acpu_freq_tbl[i].lpj = cpufreq_scale(
+ loops,
+ base_clk->a11clk_khz,
+ acpu_freq_tbl[i].a11clk_khz);
+ }
+ }
+}
+
static void __init precompute_stepping(void)
{
int i, step_idx;
@@ -882,6 +915,7 @@
acpuclk_7627_data.wait_for_irq_khz = find_wait_for_irq_khz();
precompute_stepping();
acpuclk_hw_init();
+ lpj_init();
print_acpu_freq_tbl();
acpuclk_register(&acpuclk_7627_data);
diff --git a/arch/arm/mach-msm/board-8064.c b/arch/arm/mach-msm/board-8064.c
index f7677f4..54d68d3 100644
--- a/arch/arm/mach-msm/board-8064.c
+++ b/arch/arm/mach-msm/board-8064.c
@@ -1777,6 +1777,7 @@
&msm_rtb_device,
#endif
&apq8064_cpu_idle_device,
+ &apq8064_msm_gov_device,
};
static struct platform_device *sim_devices[] __initdata = {
diff --git a/arch/arm/mach-msm/board-8930-gpu.c b/arch/arm/mach-msm/board-8930-gpu.c
new file mode 100644
index 0000000..a5157038
--- /dev/null
+++ b/arch/arm/mach-msm/board-8930-gpu.c
@@ -0,0 +1,163 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/msm_kgsl.h>
+#include <mach/msm_bus_board.h>
+#include <mach/board.h>
+
+#include "devices.h"
+#include "board-8930.h"
+
+#ifdef CONFIG_MSM_BUS_SCALING
+static struct msm_bus_vectors grp3d_init_vectors[] = {
+ {
+ .src = MSM_BUS_MASTER_GRAPHICS_3D,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 0,
+ .ib = 0,
+ },
+};
+
+static struct msm_bus_vectors grp3d_low_vectors[] = {
+ {
+ .src = MSM_BUS_MASTER_GRAPHICS_3D,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 0,
+ .ib = KGSL_CONVERT_TO_MBPS(2000),
+ },
+};
+
+static struct msm_bus_vectors grp3d_nominal_vectors[] = {
+ {
+ .src = MSM_BUS_MASTER_GRAPHICS_3D,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 0,
+ .ib = KGSL_CONVERT_TO_MBPS(3200),
+ },
+};
+
+static struct msm_bus_vectors grp3d_max_vectors[] = {
+ {
+ .src = MSM_BUS_MASTER_GRAPHICS_3D,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 0,
+ .ib = KGSL_CONVERT_TO_MBPS(3200),
+ },
+};
+
+static struct msm_bus_paths grp3d_bus_scale_usecases[] = {
+ {
+ ARRAY_SIZE(grp3d_init_vectors),
+ grp3d_init_vectors,
+ },
+ {
+ ARRAY_SIZE(grp3d_low_vectors),
+ grp3d_low_vectors,
+ },
+ {
+ ARRAY_SIZE(grp3d_nominal_vectors),
+ grp3d_nominal_vectors,
+ },
+ {
+ ARRAY_SIZE(grp3d_max_vectors),
+ grp3d_max_vectors,
+ },
+};
+
+static struct msm_bus_scale_pdata grp3d_bus_scale_pdata = {
+ grp3d_bus_scale_usecases,
+ ARRAY_SIZE(grp3d_bus_scale_usecases),
+ .name = "grp3d",
+};
+#endif
+
+static struct resource kgsl_3d0_resources[] = {
+ {
+ .name = KGSL_3D0_REG_MEMORY,
+ .start = 0x04300000, /* GFX3D address */
+ .end = 0x0431ffff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = KGSL_3D0_IRQ,
+ .start = GFX3D_IRQ,
+ .end = GFX3D_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static const char *kgsl_3d0_iommu0_ctx_names[] = {
+ "gfx3d_user",
+ /* priv_ctx goes here */
+};
+
+static struct kgsl_device_iommu_data kgsl_3d0_iommu_data[] = {
+ {
+ .iommu_ctx_names = kgsl_3d0_iommu0_ctx_names,
+ .iommu_ctx_count = ARRAY_SIZE(kgsl_3d0_iommu0_ctx_names),
+ .physstart = 0x07C00000,
+ .physend = 0x07C00000 + SZ_1M - 1,
+ },
+};
+
+static struct kgsl_device_platform_data kgsl_3d0_pdata = {
+ .pwrlevel = {
+ {
+ .gpu_freq = 200000000,
+ .bus_freq = 3,
+ .io_fraction = 0,
+ },
+ {
+ .gpu_freq = 200000000,
+ .bus_freq = 2,
+ .io_fraction = 33,
+ },
+ {
+ .gpu_freq = 200000000,
+ .bus_freq = 1,
+ .io_fraction = 100,
+ },
+ {
+ .gpu_freq = 27000000,
+ .bus_freq = 0,
+ },
+ },
+ .init_level = 0,
+ .num_levels = 4,
+ .set_grp_async = NULL,
+ .idle_timeout = 0x1FFFFFFF,
+ .nap_allowed = false,
+ .clk_map = KGSL_CLK_CORE | KGSL_CLK_IFACE | KGSL_CLK_MEM_IFACE,
+#ifdef CONFIG_MSM_BUS_SCALING
+ .bus_scale_table = &grp3d_bus_scale_pdata,
+#endif
+ .iommu_data = kgsl_3d0_iommu_data,
+ .iommu_count = ARRAY_SIZE(kgsl_3d0_iommu_data),
+};
+
+static struct platform_device device_kgsl_3d0 = {
+ .name = "kgsl-3d0",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(kgsl_3d0_resources),
+ .resource = kgsl_3d0_resources,
+ .dev = {
+ .platform_data = &kgsl_3d0_pdata,
+ },
+};
+
+void __init msm8930_init_gpu(void)
+{
+ platform_device_register(&device_kgsl_3d0);
+}
diff --git a/arch/arm/mach-msm/board-8930.c b/arch/arm/mach-msm/board-8930.c
index f42f839..2a2cc42 100644
--- a/arch/arm/mach-msm/board-8930.c
+++ b/arch/arm/mach-msm/board-8930.c
@@ -952,15 +952,17 @@
{
#ifdef CONFIG_MSM_BUS_SCALING
msm_bus_rpm_set_mt_mask();
- msm_bus_8960_apps_fabric_pdata.rpm_enabled = 1;
- msm_bus_8960_sys_fabric_pdata.rpm_enabled = 1;
- msm_bus_8960_mm_fabric_pdata.rpm_enabled = 1;
- msm_bus_apps_fabric.dev.platform_data =
- &msm_bus_8960_apps_fabric_pdata;
- msm_bus_sys_fabric.dev.platform_data = &msm_bus_8960_sys_fabric_pdata;
- msm_bus_mm_fabric.dev.platform_data = &msm_bus_8960_mm_fabric_pdata;
- msm_bus_sys_fpb.dev.platform_data = &msm_bus_8960_sys_fpb_pdata;
- msm_bus_cpss_fpb.dev.platform_data = &msm_bus_8960_cpss_fpb_pdata;
+ msm_bus_8930_apps_fabric_pdata.rpm_enabled = 1;
+ msm_bus_8930_sys_fabric_pdata.rpm_enabled = 1;
+ msm_bus_8930_mm_fabric_pdata.rpm_enabled = 1;
+ msm_bus_8930_apps_fabric.dev.platform_data =
+ &msm_bus_8930_apps_fabric_pdata;
+ msm_bus_8930_sys_fabric.dev.platform_data =
+ &msm_bus_8930_sys_fabric_pdata;
+ msm_bus_8930_mm_fabric.dev.platform_data =
+ &msm_bus_8930_mm_fabric_pdata;
+ msm_bus_8930_sys_fpb.dev.platform_data = &msm_bus_8930_sys_fpb_pdata;
+ msm_bus_8930_cpss_fpb.dev.platform_data = &msm_bus_8930_cpss_fpb_pdata;
#endif
}
@@ -1783,7 +1785,6 @@
#endif
&android_pmem_audio_device,
#endif
- &msm_device_vidc,
&msm_device_bam_dmux,
&msm_fm_platform_init,
@@ -1813,6 +1814,12 @@
&msm_rtb_device,
#endif
&msm8930_cpu_idle_device,
+ &msm8930_msm_gov_device,
+ &msm_bus_8930_apps_fabric,
+ &msm_bus_8930_sys_fabric,
+ &msm_bus_8930_mm_fabric,
+ &msm_bus_8930_sys_fpb,
+ &msm_bus_8930_cpss_fpb,
};
static struct platform_device *cdp_devices[] __initdata = {
@@ -1833,11 +1840,6 @@
&msm_cpudai_auxpcm_tx,
&msm_cpu_fe,
&msm_stub_codec,
- &msm_kgsl_3d0,
-#ifdef CONFIG_MSM_KGSL_2D
- &msm_kgsl_2d0,
- &msm_kgsl_2d1,
-#endif
#ifdef CONFIG_MSM_GEMINI
&msm8960_gemini_device,
#endif
@@ -1854,11 +1856,6 @@
&msm_cpudai_incall_record_rx,
&msm_cpudai_incall_record_tx,
&msm_pcm_hostless,
- &msm_bus_apps_fabric,
- &msm_bus_sys_fabric,
- &msm_bus_mm_fabric,
- &msm_bus_sys_fpb,
- &msm_bus_cpss_fpb,
};
static void __init msm8930_i2c_init(void)
@@ -1879,17 +1876,6 @@
&msm8960_i2c_qup_gsbi12_pdata;
}
-static void __init msm8930_gfx_init(void)
-{
- uint32_t soc_platform_version = socinfo_get_version();
- if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1) {
- struct kgsl_device_platform_data *kgsl_3d0_pdata =
- msm_kgsl_3d0.dev.platform_data;
- kgsl_3d0_pdata->pwrlevel[0].gpu_freq = 320000000;
- kgsl_3d0_pdata->pwrlevel[1].gpu_freq = 266667000;
- }
-}
-
static struct msm_cpuidle_state msm_cstates[] __initdata = {
{0, 0, "C0", "WFI",
MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
@@ -2204,13 +2190,14 @@
msm8930_init_pmic();
#endif
msm8930_i2c_init();
- msm8930_gfx_init();
+ msm8930_init_gpu();
msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
msm_spm_l2_init(msm_spm_l2_data);
msm8930_init_buses();
platform_add_devices(msm_footswitch_devices,
msm_num_footswitch_devices);
platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
+ msm8930_add_vidc_device();
/*
* TODO: When physical 8930/PM8038 hardware becomes
* available, remove this block or add the config
diff --git a/arch/arm/mach-msm/board-8930.h b/arch/arm/mach-msm/board-8930.h
index cefaff5..45fe40f 100644
--- a/arch/arm/mach-msm/board-8930.h
+++ b/arch/arm/mach-msm/board-8930.h
@@ -109,6 +109,7 @@
void msm8930_init_cam(void);
void msm8930_init_fb(void);
void msm8930_init_pmic(void);
+extern void msm8930_add_vidc_device(void);
/*
* TODO: When physical 8930/PM8038 hardware becomes
@@ -125,6 +126,7 @@
void msm8930_allocate_fb_region(void);
void msm8930_pm8038_gpio_mpp_init(void);
void msm8930_mdp_writeback(struct memtype_reserve *reserve_table);
+void __init msm8930_init_gpu(void);
#define PLATFORM_IS_CHARM25() \
(machine_is_msm8930_cdp() && \
diff --git a/arch/arm/mach-msm/board-8960.c b/arch/arm/mach-msm/board-8960.c
index 4da1c7e..db0bbff 100644
--- a/arch/arm/mach-msm/board-8960.c
+++ b/arch/arm/mach-msm/board-8960.c
@@ -2191,6 +2191,7 @@
&msm_rtb_device,
#endif
&msm8960_cpu_idle_device,
+ &msm8960_msm_gov_device,
};
static struct platform_device *sim_devices[] __initdata = {
diff --git a/arch/arm/mach-msm/board-msm7627a-display.c b/arch/arm/mach-msm/board-msm7627a-display.c
index bf1a4c5..950815a 100644
--- a/arch/arm/mach-msm/board-msm7627a-display.c
+++ b/arch/arm/mach-msm/board-msm7627a-display.c
@@ -44,6 +44,245 @@
early_param("fb_size", fb_size_setup);
+static uint32_t lcdc_truly_gpio_initialized;
+static struct regulator_bulk_data regs_truly_lcdc[] = {
+ { .supply = "rfrx1", .min_uV = 1800000, .max_uV = 1800000 },
+};
+
+#define SKU3_LCDC_GPIO_DISPLAY_RESET 90
+#define SKU3_LCDC_GPIO_SPI_MOSI 19
+#define SKU3_LCDC_GPIO_SPI_CLK 20
+#define SKU3_LCDC_GPIO_SPI_CS0_N 21
+#define SKU3_LCDC_LCD_CAMERA_LDO_2V8 35 /*LCD_CAMERA_LDO_2V8*/
+#define SKU3_LCDC_LCD_CAMERA_LDO_1V8 34 /*LCD_CAMERA_LDO_1V8*/
+#define SKU3_1_LCDC_LCD_CAMERA_LDO_1V8 58 /*LCD_CAMERA_LDO_1V8*/
+
+static uint32_t lcdc_truly_gpio_table[] = {
+ 19,
+ 20,
+ 21,
+ 89,
+ 90,
+};
+
+static char *lcdc_gpio_name_table[5] = {
+ "spi_mosi",
+ "spi_clk",
+ "spi_cs",
+ "gpio_bkl_en",
+ "gpio_disp_reset",
+};
+
+static int lcdc_truly_gpio_init(void)
+{
+ int i;
+ int rc = 0;
+
+ if (!lcdc_truly_gpio_initialized) {
+ for (i = 0; i < ARRAY_SIZE(lcdc_truly_gpio_table); i++) {
+ rc = gpio_request(lcdc_truly_gpio_table[i],
+ lcdc_gpio_name_table[i]);
+ if (rc < 0) {
+ pr_err("Error request gpio %s\n",
+ lcdc_gpio_name_table[i]);
+ goto truly_gpio_fail;
+ }
+ rc = gpio_tlmm_config(GPIO_CFG(lcdc_truly_gpio_table[i],
+ 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
+ GPIO_CFG_2MA), GPIO_CFG_ENABLE);
+ if (rc < 0) {
+ pr_err("Error config lcdc gpio:%d\n",
+ lcdc_truly_gpio_table[i]);
+ goto truly_gpio_fail;
+ }
+ rc = gpio_direction_output(lcdc_truly_gpio_table[i], 0);
+ if (rc < 0) {
+ pr_err("Error direct lcdc gpio:%d\n",
+ lcdc_truly_gpio_table[i]);
+ goto truly_gpio_fail;
+ }
+ }
+
+ lcdc_truly_gpio_initialized = 1;
+ }
+
+ return rc;
+
+truly_gpio_fail:
+ for (; i >= 0; i--) {
+ pr_err("Freeing GPIO: %d", lcdc_truly_gpio_table[i]);
+ gpio_free(lcdc_truly_gpio_table[i]);
+ }
+
+ lcdc_truly_gpio_initialized = 0;
+ return rc;
+}
+
+
+void sku3_lcdc_lcd_camera_power_init(void)
+{
+ int rc = 0;
+ u32 socinfo = socinfo_get_platform_type();
+
+ /* LDO_EXT2V8 */
+ if (gpio_request(SKU3_LCDC_LCD_CAMERA_LDO_2V8, "lcd_camera_ldo_2v8")) {
+ pr_err("failed to request gpio lcd_camera_ldo_2v8\n");
+ return;
+ }
+
+ rc = gpio_tlmm_config(GPIO_CFG(SKU3_LCDC_LCD_CAMERA_LDO_2V8, 0,
+ GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ GPIO_CFG_ENABLE);
+
+ if (rc < 0) {
+ pr_err("%s:unable to enable lcd_camera_ldo_2v8!\n", __func__);
+ goto fail_gpio2;
+ }
+
+ /* LDO_EVT1V8 */
+ if (socinfo == 0x0B) {
+ if (gpio_request(SKU3_LCDC_LCD_CAMERA_LDO_1V8,
+ "lcd_camera_ldo_1v8")) {
+ pr_err("failed to request gpio lcd_camera_ldo_1v8\n");
+ goto fail_gpio1;
+ }
+
+ rc = gpio_tlmm_config(GPIO_CFG(SKU3_LCDC_LCD_CAMERA_LDO_1V8, 0,
+ GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ GPIO_CFG_ENABLE);
+
+ if (rc < 0) {
+ pr_err("%s: unable to enable lcdc_camera_ldo_1v8!\n",
+ __func__);
+ goto fail_gpio1;
+ }
+ } else if (socinfo == 0x0F) {
+ if (gpio_request(SKU3_1_LCDC_LCD_CAMERA_LDO_1V8,
+ "lcd_camera_ldo_1v8")) {
+ pr_err("failed to request gpio lcd_camera_ldo_1v8\n");
+ goto fail_gpio1;
+ }
+
+ rc = gpio_tlmm_config(GPIO_CFG(SKU3_1_LCDC_LCD_CAMERA_LDO_1V8,
+ 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ GPIO_CFG_ENABLE);
+
+ if (rc < 0) {
+ pr_err("%s: unable to enable lcdc_camera_ldo_1v8!\n",
+ __func__);
+ goto fail_gpio1;
+ }
+ }
+
+ rc = regulator_bulk_get(NULL, ARRAY_SIZE(regs_truly_lcdc),
+ regs_truly_lcdc);
+ if (rc)
+ pr_err("%s: could not get regulators: %d\n", __func__, rc);
+
+ rc = regulator_bulk_set_voltage(ARRAY_SIZE(regs_truly_lcdc),
+ regs_truly_lcdc);
+ if (rc)
+ pr_err("%s: could not set voltages: %d\n", __func__, rc);
+
+ return;
+
+fail_gpio1:
+ if (socinfo == 0x0B)
+ gpio_free(SKU3_LCDC_LCD_CAMERA_LDO_1V8);
+ else if (socinfo == 0x0F)
+ gpio_free(SKU3_1_LCDC_LCD_CAMERA_LDO_1V8);
+fail_gpio2:
+ gpio_free(SKU3_LCDC_LCD_CAMERA_LDO_2V8);
+ return;
+}
+
+int sku3_lcdc_lcd_camera_power_onoff(int on)
+{
+ int rc = 0;
+ u32 socinfo = socinfo_get_platform_type();
+
+ if (on) {
+ if (socinfo == 0x0B)
+ gpio_set_value_cansleep(SKU3_LCDC_LCD_CAMERA_LDO_1V8,
+ 1);
+ else if (socinfo == 0x0F)
+ gpio_set_value_cansleep(SKU3_1_LCDC_LCD_CAMERA_LDO_1V8,
+ 1);
+
+ gpio_set_value_cansleep(SKU3_LCDC_LCD_CAMERA_LDO_2V8, 1);
+
+ rc = regulator_bulk_enable(ARRAY_SIZE(regs_truly_lcdc),
+ regs_truly_lcdc);
+ if (rc)
+ pr_err("%s: could not enable regulators: %d\n",
+ __func__, rc);
+ } else {
+ if (socinfo == 0x0B)
+ gpio_set_value_cansleep(SKU3_LCDC_LCD_CAMERA_LDO_1V8,
+ 0);
+ else if (socinfo == 0x0F)
+ gpio_set_value_cansleep(SKU3_1_LCDC_LCD_CAMERA_LDO_1V8,
+ 0);
+
+ gpio_set_value_cansleep(SKU3_LCDC_LCD_CAMERA_LDO_2V8, 0);
+
+ rc = regulator_bulk_disable(ARRAY_SIZE(regs_truly_lcdc),
+ regs_truly_lcdc);
+ if (rc)
+ pr_err("%s: could not disable regulators: %d\n",
+ __func__, rc);
+ }
+
+ return rc;
+}
+
+static int sku3_lcdc_power_save(int on)
+{
+ int rc = 0;
+
+ if (on) {
+ sku3_lcdc_lcd_camera_power_onoff(1);
+ rc = lcdc_truly_gpio_init();
+ if (rc < 0) {
+ pr_err("%s(): Truly GPIO initializations failed",
+ __func__);
+ return rc;
+ }
+
+ if (lcdc_truly_gpio_initialized) {
+ /*LCD reset*/
+ gpio_set_value(SKU3_LCDC_GPIO_DISPLAY_RESET, 1);
+ msleep(20);
+ gpio_set_value(SKU3_LCDC_GPIO_DISPLAY_RESET, 0);
+ msleep(20);
+ gpio_set_value(SKU3_LCDC_GPIO_DISPLAY_RESET, 1);
+ msleep(20);
+ }
+ } else {
+ /* pull down LCD IO to avoid current leakage */
+ gpio_set_value(SKU3_LCDC_GPIO_SPI_MOSI, 0);
+ gpio_set_value(SKU3_LCDC_GPIO_SPI_CLK, 0);
+ gpio_set_value(SKU3_LCDC_GPIO_SPI_CS0_N, 0);
+ gpio_set_value(SKU3_LCDC_GPIO_DISPLAY_RESET, 0);
+
+ sku3_lcdc_lcd_camera_power_onoff(0);
+ }
+ return rc;
+}
+
+static struct msm_panel_common_pdata lcdc_truly_panel_data = {
+ .panel_config_gpio = NULL,
+ .gpio_num = lcdc_truly_gpio_table,
+};
+
+static struct platform_device lcdc_truly_panel_device = {
+ .name = "lcdc_truly_hvga_ips3p2335_pt",
+ .id = 0,
+ .dev = {
+ .platform_data = &lcdc_truly_panel_data,
+ }
+};
+
static struct regulator_bulk_data regs_lcdc[] = {
{ .supply = "gp2", .min_uV = 2850000, .max_uV = 2850000 },
{ .supply = "msme1", .min_uV = 1800000, .max_uV = 1800000 },
@@ -176,9 +415,21 @@
return ret;
}
+
+static int msm_lcdc_power_save(int on)
+{
+ int rc = 0;
+ if (machine_is_msm7627a_qrd3())
+ rc = sku3_lcdc_power_save(on);
+ else
+ rc = msm_fb_lcdc_power_save(on);
+
+ return rc;
+}
+
static struct lcdc_platform_data lcdc_pdata = {
.lcdc_gpio_config = NULL,
- .lcdc_power_save = msm_fb_lcdc_power_save,
+ .lcdc_power_save = msm_lcdc_power_save,
};
static int lcd_panel_spi_gpio_num[] = {
@@ -226,6 +477,9 @@
} else if (machine_is_msm7627a_qrd1()) {
if (!strncmp(name, "mipi_video_truly_wvga", 21))
ret = 0;
+ } else if (machine_is_msm7627a_qrd3()) {
+ if (!strncmp(name, "lcdc_truly_hvga_ips3p2335_pt", 28))
+ ret = 0;
} else if (machine_is_msm7627a_evb() || machine_is_msm8625_evb()) {
if (!strncmp(name, "mipi_cmd_nt35510_wvga", 21))
ret = 0;
@@ -332,6 +586,11 @@
&mipi_dsi_truly_panel_device,
};
+static struct platform_device *qrd3_fb_devices[] __initdata = {
+ &msm_fb_device,
+ &lcdc_truly_panel_device,
+};
+
static struct platform_device *evb_fb_devices[] __initdata = {
&msm_fb_device,
&mipi_dsi_NT35510_panel_device,
@@ -836,7 +1095,7 @@
#define MDP_303_VSYNC_GPIO 97
-#ifdef CONFIG_FB_MSM_MDP303
+#ifdef CONFIG_FB_MSM_MIPI_DSI
static struct mipi_dsi_platform_data mipi_dsi_pdata = {
.vsync_gpio = MDP_303_VSYNC_GPIO,
.dsi_power_save = mipi_dsi_panel_power,
@@ -853,17 +1112,19 @@
else if (machine_is_msm7627a_evb() || machine_is_msm8625_evb())
platform_add_devices(evb_fb_devices,
ARRAY_SIZE(evb_fb_devices));
- else if (machine_is_msm7627a_qrd3())
- return;
- else
+ else if (machine_is_msm7627a_qrd3()) {
+ sku3_lcdc_lcd_camera_power_init();
+ platform_add_devices(qrd3_fb_devices,
+ ARRAY_SIZE(qrd3_fb_devices));
+ } else
platform_add_devices(msm_fb_devices,
ARRAY_SIZE(msm_fb_devices));
msm_fb_register_device("mdp", &mdp_pdata);
if (machine_is_msm7625a_surf() || machine_is_msm7x27a_surf() ||
- machine_is_msm8625_surf())
+ machine_is_msm8625_surf() || machine_is_msm7627a_qrd3())
msm_fb_register_device("lcdc", &lcdc_pdata);
-#ifdef CONFIG_FB_MSM_MDP303
+#ifdef CONFIG_FB_MSM_MIPI_DSI
msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
#endif
}
diff --git a/arch/arm/mach-msm/board-msm7x27a-regulator.c b/arch/arm/mach-msm/board-msm7x27a-regulator.c
index 5be382f..b045f7c 100644
--- a/arch/arm/mach-msm/board-msm7x27a-regulator.c
+++ b/arch/arm/mach-msm/board-msm7x27a-regulator.c
@@ -215,7 +215,7 @@
PCOM_VREG_SMP(smps2, 4, NULL, 1100000, 1100000, 0, -1, 0, 0, 0, 0, s),
PCOM_VREG_SMP(smps3, 2, NULL, 1800000, 1800000, 0, -1, 0, 0, 0, 0, s),
PCOM_VREG_SMP(smps4, 24, NULL, 2100000, 2100000, 0, -1, 0, 0, 0, 0, s),
- PCOM_VREG_LDO(ldo01, 12, NULL, 2100000, 2100000, 0, -1, 0, 0, 0, 0, p),
+ PCOM_VREG_LDO(ldo01, 12, NULL, 1800000, 2100000, 0, -1, 0, 0, 0, 0, p),
PCOM_VREG_LDO(ldo02, 13, NULL, 2850000, 2850000, 0, -1, 0, 0, 0, 0, p),
PCOM_VREG_LDO(ldo03, 49, NULL, 1200000, 1200000, 0, -1, 0, 0, 0, 0, n),
PCOM_VREG_LDO(ldo04, 50, NULL, 1100000, 1100000, 0, -1, 0, 0, 0, 0, n),
diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index 119f89c..9ab630d 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -4865,6 +4865,7 @@
CLK_LOOKUP("xo", cxo_clk.c, "pil_qdsp6v4.2"),
CLK_LOOKUP("xo", cxo_clk.c, "pil_gss"),
CLK_LOOKUP("xo", cxo_clk.c, "BAM_RMNT"),
+ CLK_LOOKUP("xo", cxo_clk.c, "msm_xo"),
CLK_LOOKUP("pll2", pll2_clk.c, NULL),
CLK_LOOKUP("pll8", pll8_clk.c, NULL),
CLK_LOOKUP("pll4", pll4_clk.c, NULL),
@@ -5147,6 +5148,7 @@
CLK_LOOKUP("xo", cxo_clk.c, "pil_qdsp6v4.1"),
CLK_LOOKUP("xo", cxo_clk.c, "pil_qdsp6v4.2"),
CLK_LOOKUP("xo", cxo_clk.c, "BAM_RMNT"),
+ CLK_LOOKUP("xo", cxo_clk.c, "msm_xo"),
CLK_LOOKUP("pll2", pll2_clk.c, NULL),
CLK_LOOKUP("pll8", pll8_clk.c, NULL),
CLK_LOOKUP("pll4", pll4_clk.c, NULL),
diff --git a/arch/arm/mach-msm/clock-9615.c b/arch/arm/mach-msm/clock-9615.c
index 3e059b6..e1dc2ae 100644
--- a/arch/arm/mach-msm/clock-9615.c
+++ b/arch/arm/mach-msm/clock-9615.c
@@ -1602,6 +1602,7 @@
CLK_LOOKUP("xo", cxo_a_clk.c, ""),
CLK_LOOKUP("xo", cxo_clk.c, "msm_otg"),
CLK_LOOKUP("xo", cxo_clk.c, "BAM_RMNT"),
+ CLK_LOOKUP("xo", cxo_clk.c, "msm_xo"),
CLK_LOOKUP("pll0", pll0_clk.c, NULL),
CLK_LOOKUP("pll8", pll8_clk.c, NULL),
CLK_LOOKUP("pll14", pll14_clk.c, NULL),
diff --git a/arch/arm/mach-msm/devices-8064.c b/arch/arm/mach-msm/devices-8064.c
index f3c014c..6586329 100644
--- a/arch/arm/mach-msm/devices-8064.c
+++ b/arch/arm/mach-msm/devices-8064.c
@@ -30,6 +30,7 @@
#include <mach/rpm.h>
#include <mach/mdm2.h>
#include <mach/msm_smd.h>
+#include <mach/msm_dcvs.h>
#include <linux/ion.h>
#include "clock.h"
#include "devices.h"
@@ -2149,3 +2150,40 @@
.platform_data = &apq8064_LPM_latency,
},
};
+
+static struct msm_dcvs_freq_entry apq8064_freq[] = {
+ { 384000, 166981, 345600},
+ { 702000, 213049, 632502},
+ {1026000, 285712, 925613},
+ {1242000, 383945, 1176550},
+ {1458000, 419729, 1465478},
+ {1512000, 434116, 1546674},
+
+};
+
+static struct msm_dcvs_core_info apq8064_core_info = {
+ .freq_tbl = &apq8064_freq[0],
+ .core_param = {
+ .max_time_us = 100000,
+ .num_freq = ARRAY_SIZE(apq8064_freq),
+ },
+ .algo_param = {
+ .slack_time_us = 58000,
+ .scale_slack_time = 0,
+ .scale_slack_time_pct = 0,
+ .disable_pc_threshold = 1458000,
+ .em_window_size = 100000,
+ .em_max_util_pct = 97,
+ .ss_window_size = 1000000,
+ .ss_util_pct = 95,
+ .ss_iobusy_conv = 100,
+ },
+};
+
+struct platform_device apq8064_msm_gov_device = {
+ .name = "msm_dcvs_gov",
+ .id = -1,
+ .dev = {
+ .platform_data = &apq8064_core_info,
+ },
+};
diff --git a/arch/arm/mach-msm/devices-8930.c b/arch/arm/mach-msm/devices-8930.c
index 16f4db7..da3574b 100644
--- a/arch/arm/mach-msm/devices-8930.c
+++ b/arch/arm/mach-msm/devices-8930.c
@@ -13,9 +13,15 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
+#include <linux/ion.h>
#include <mach/msm_iomap.h>
#include <mach/irqs-8930.h>
#include <mach/rpm.h>
+#include <mach/msm_dcvs.h>
+#include <mach/msm_bus.h>
+#include <mach/msm_bus_board.h>
+#include <mach/board.h>
+#include <mach/socinfo.h>
#include "devices.h"
#include "rpm_log.h"
@@ -59,7 +65,7 @@
APPS_FABRIC_CFG_CLKMOD, 3),
MSM_RPM_MAP(8930, APPS_FABRIC_CFG_IOCTL,
APPS_FABRIC_CFG_IOCTL, 1),
- MSM_RPM_MAP(8930, APPS_FABRIC_ARB_0, APPS_FABRIC_ARB, 12),
+ MSM_RPM_MAP(8930, APPS_FABRIC_ARB_0, APPS_FABRIC_ARB, 6),
MSM_RPM_MAP(8930, SYS_FABRIC_CFG_HALT_0,
SYS_FABRIC_CFG_HALT, 2),
MSM_RPM_MAP(8930, SYS_FABRIC_CFG_CLKMOD_0,
@@ -67,14 +73,14 @@
MSM_RPM_MAP(8930, SYS_FABRIC_CFG_IOCTL,
SYS_FABRIC_CFG_IOCTL, 1),
MSM_RPM_MAP(8930, SYSTEM_FABRIC_ARB_0,
- SYSTEM_FABRIC_ARB, 29),
+ SYSTEM_FABRIC_ARB, 20),
MSM_RPM_MAP(8930, MMSS_FABRIC_CFG_HALT_0,
MMSS_FABRIC_CFG_HALT, 2),
MSM_RPM_MAP(8930, MMSS_FABRIC_CFG_CLKMOD_0,
MMSS_FABRIC_CFG_CLKMOD, 3),
MSM_RPM_MAP(8930, MMSS_FABRIC_CFG_IOCTL,
MMSS_FABRIC_CFG_IOCTL, 1),
- MSM_RPM_MAP(8930, MM_FABRIC_ARB_0, MM_FABRIC_ARB, 23),
+ MSM_RPM_MAP(8930, MM_FABRIC_ARB_0, MM_FABRIC_ARB, 11),
MSM_RPM_MAP(8930, PM8038_S1_0, PM8038_S1, 2),
MSM_RPM_MAP(8930, PM8038_S2_0, PM8038_S2, 2),
MSM_RPM_MAP(8930, PM8038_S3_0, PM8038_S3, 2),
@@ -284,3 +290,340 @@
.platform_data = &msm8930_LPM_latency,
},
};
+
+static struct msm_dcvs_freq_entry msm8930_freq[] = {
+ { 384000, 166981, 345600},
+ { 702000, 213049, 632502},
+ {1026000, 285712, 925613},
+ {1242000, 383945, 1176550},
+ {1458000, 419729, 1465478},
+ {1512000, 434116, 1546674},
+
+};
+
+static struct msm_dcvs_core_info msm8930_core_info = {
+ .freq_tbl = &msm8930_freq[0],
+ .core_param = {
+ .max_time_us = 100000,
+ .num_freq = ARRAY_SIZE(msm8930_freq),
+ },
+ .algo_param = {
+ .slack_time_us = 58000,
+ .scale_slack_time = 0,
+ .scale_slack_time_pct = 0,
+ .disable_pc_threshold = 1458000,
+ .em_window_size = 100000,
+ .em_max_util_pct = 97,
+ .ss_window_size = 1000000,
+ .ss_util_pct = 95,
+ .ss_iobusy_conv = 100,
+ },
+};
+
+struct platform_device msm8930_msm_gov_device = {
+ .name = "msm_dcvs_gov",
+ .id = -1,
+ .dev = {
+ .platform_data = &msm8930_core_info,
+ },
+};
+
+struct platform_device msm_bus_8930_sys_fabric = {
+ .name = "msm_bus_fabric",
+ .id = MSM_BUS_FAB_SYSTEM,
+};
+struct platform_device msm_bus_8930_apps_fabric = {
+ .name = "msm_bus_fabric",
+ .id = MSM_BUS_FAB_APPSS,
+};
+struct platform_device msm_bus_8930_mm_fabric = {
+ .name = "msm_bus_fabric",
+ .id = MSM_BUS_FAB_MMSS,
+};
+struct platform_device msm_bus_8930_sys_fpb = {
+ .name = "msm_bus_fabric",
+ .id = MSM_BUS_FAB_SYSTEM_FPB,
+};
+struct platform_device msm_bus_8930_cpss_fpb = {
+ .name = "msm_bus_fabric",
+ .id = MSM_BUS_FAB_CPSS_FPB,
+};
+
+/* MSM Video core device */
+#ifdef CONFIG_MSM_BUS_SCALING
+static struct msm_bus_vectors vidc_init_vectors[] = {
+ {
+ .src = MSM_BUS_MASTER_HD_CODEC_PORT0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 0,
+ .ib = 0,
+ },
+ {
+ .src = MSM_BUS_MASTER_HD_CODEC_PORT1,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 0,
+ .ib = 0,
+ },
+ {
+ .src = MSM_BUS_MASTER_AMPSS_M0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 0,
+ .ib = 0,
+ },
+ {
+ .src = MSM_BUS_MASTER_AMPSS_M0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 0,
+ .ib = 0,
+ },
+};
+static struct msm_bus_vectors vidc_venc_vga_vectors[] = {
+ {
+ .src = MSM_BUS_MASTER_HD_CODEC_PORT0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 54525952,
+ .ib = 436207616,
+ },
+ {
+ .src = MSM_BUS_MASTER_HD_CODEC_PORT1,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 72351744,
+ .ib = 289406976,
+ },
+ {
+ .src = MSM_BUS_MASTER_AMPSS_M0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 500000,
+ .ib = 1000000,
+ },
+ {
+ .src = MSM_BUS_MASTER_AMPSS_M0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 500000,
+ .ib = 1000000,
+ },
+};
+static struct msm_bus_vectors vidc_vdec_vga_vectors[] = {
+ {
+ .src = MSM_BUS_MASTER_HD_CODEC_PORT0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 40894464,
+ .ib = 327155712,
+ },
+ {
+ .src = MSM_BUS_MASTER_HD_CODEC_PORT1,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 48234496,
+ .ib = 192937984,
+ },
+ {
+ .src = MSM_BUS_MASTER_AMPSS_M0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 500000,
+ .ib = 2000000,
+ },
+ {
+ .src = MSM_BUS_MASTER_AMPSS_M0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 500000,
+ .ib = 2000000,
+ },
+};
+static struct msm_bus_vectors vidc_venc_720p_vectors[] = {
+ {
+ .src = MSM_BUS_MASTER_HD_CODEC_PORT0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 163577856,
+ .ib = 1308622848,
+ },
+ {
+ .src = MSM_BUS_MASTER_HD_CODEC_PORT1,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 219152384,
+ .ib = 876609536,
+ },
+ {
+ .src = MSM_BUS_MASTER_AMPSS_M0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 1750000,
+ .ib = 3500000,
+ },
+ {
+ .src = MSM_BUS_MASTER_AMPSS_M0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 1750000,
+ .ib = 3500000,
+ },
+};
+static struct msm_bus_vectors vidc_vdec_720p_vectors[] = {
+ {
+ .src = MSM_BUS_MASTER_HD_CODEC_PORT0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 121634816,
+ .ib = 973078528,
+ },
+ {
+ .src = MSM_BUS_MASTER_HD_CODEC_PORT1,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 155189248,
+ .ib = 620756992,
+ },
+ {
+ .src = MSM_BUS_MASTER_AMPSS_M0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 1750000,
+ .ib = 7000000,
+ },
+ {
+ .src = MSM_BUS_MASTER_AMPSS_M0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 1750000,
+ .ib = 7000000,
+ },
+};
+static struct msm_bus_vectors vidc_venc_1080p_vectors[] = {
+ {
+ .src = MSM_BUS_MASTER_HD_CODEC_PORT0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 372244480,
+ .ib = 2560000000U,
+ },
+ {
+ .src = MSM_BUS_MASTER_HD_CODEC_PORT1,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 501219328,
+ .ib = 2560000000U,
+ },
+ {
+ .src = MSM_BUS_MASTER_AMPSS_M0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 2500000,
+ .ib = 5000000,
+ },
+ {
+ .src = MSM_BUS_MASTER_AMPSS_M0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 2500000,
+ .ib = 5000000,
+ },
+};
+static struct msm_bus_vectors vidc_vdec_1080p_vectors[] = {
+ {
+ .src = MSM_BUS_MASTER_HD_CODEC_PORT0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 222298112,
+ .ib = 2560000000U,
+ },
+ {
+ .src = MSM_BUS_MASTER_HD_CODEC_PORT1,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 330301440,
+ .ib = 2560000000U,
+ },
+ {
+ .src = MSM_BUS_MASTER_AMPSS_M0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 2500000,
+ .ib = 700000000,
+ },
+ {
+ .src = MSM_BUS_MASTER_AMPSS_M0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 2500000,
+ .ib = 10000000,
+ },
+};
+
+static struct msm_bus_paths vidc_bus_client_config[] = {
+ {
+ ARRAY_SIZE(vidc_init_vectors),
+ vidc_init_vectors,
+ },
+ {
+ ARRAY_SIZE(vidc_venc_vga_vectors),
+ vidc_venc_vga_vectors,
+ },
+ {
+ ARRAY_SIZE(vidc_vdec_vga_vectors),
+ vidc_vdec_vga_vectors,
+ },
+ {
+ ARRAY_SIZE(vidc_venc_720p_vectors),
+ vidc_venc_720p_vectors,
+ },
+ {
+ ARRAY_SIZE(vidc_vdec_720p_vectors),
+ vidc_vdec_720p_vectors,
+ },
+ {
+ ARRAY_SIZE(vidc_venc_1080p_vectors),
+ vidc_venc_1080p_vectors,
+ },
+ {
+ ARRAY_SIZE(vidc_vdec_1080p_vectors),
+ vidc_vdec_1080p_vectors,
+ },
+};
+
+static struct msm_bus_scale_pdata vidc_bus_client_data = {
+ vidc_bus_client_config,
+ ARRAY_SIZE(vidc_bus_client_config),
+ .name = "vidc",
+};
+#endif
+
+#define MSM_VIDC_BASE_PHYS 0x04400000
+#define MSM_VIDC_BASE_SIZE 0x00100000
+
+static struct resource apq8930_device_vidc_resources[] = {
+ {
+ .start = MSM_VIDC_BASE_PHYS,
+ .end = MSM_VIDC_BASE_PHYS + MSM_VIDC_BASE_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = VCODEC_IRQ,
+ .end = VCODEC_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+struct msm_vidc_platform_data apq8930_vidc_platform_data = {
+#ifdef CONFIG_MSM_BUS_SCALING
+ .vidc_bus_client_pdata = &vidc_bus_client_data,
+#endif
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ .memtype = ION_CP_MM_HEAP_ID,
+ .enable_ion = 1,
+#else
+ .memtype = MEMTYPE_EBI1,
+ .enable_ion = 0,
+#endif
+ .disable_dmx = 0,
+ .disable_fullhd = 0,
+};
+
+struct platform_device apq8930_msm_device_vidc = {
+ .name = "msm_vidc",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(apq8930_device_vidc_resources),
+ .resource = apq8930_device_vidc_resources,
+ .dev = {
+ .platform_data = &apq8930_vidc_platform_data,
+ },
+};
+
+struct platform_device *vidc_device[] __initdata = {
+ &apq8930_msm_device_vidc
+};
+
+void __init msm8930_add_vidc_device(void)
+{
+ if (cpu_is_msm8627()) {
+ struct msm_vidc_platform_data *pdata;
+ pdata = (struct msm_vidc_platform_data *)
+ apq8930_msm_device_vidc.dev.platform_data;
+ pdata->disable_fullhd = 1;
+ }
+ platform_add_devices(vidc_device, ARRAY_SIZE(vidc_device));
+}
diff --git a/arch/arm/mach-msm/devices-8960.c b/arch/arm/mach-msm/devices-8960.c
index 18e4f5e..243e0c8 100644
--- a/arch/arm/mach-msm/devices-8960.c
+++ b/arch/arm/mach-msm/devices-8960.c
@@ -43,6 +43,7 @@
#include "rpm_stats.h"
#include "pil-q6v4.h"
#include "scm-pas.h"
+#include <mach/msm_dcvs.h>
#ifdef CONFIG_MSM_MPM
#include "mpm.h"
@@ -3229,3 +3230,40 @@
.platform_data = &msm8960_LPM_latency,
},
};
+
+static struct msm_dcvs_freq_entry msm8960_freq[] = {
+ { 384000, 166981, 345600},
+ { 702000, 213049, 632502},
+ {1026000, 285712, 925613},
+ {1242000, 383945, 1176550},
+ {1458000, 419729, 1465478},
+ {1512000, 434116, 1546674},
+
+};
+
+static struct msm_dcvs_core_info msm8960_core_info = {
+ .freq_tbl = &msm8960_freq[0],
+ .core_param = {
+ .max_time_us = 100000,
+ .num_freq = ARRAY_SIZE(msm8960_freq),
+ },
+ .algo_param = {
+ .slack_time_us = 58000,
+ .scale_slack_time = 0,
+ .scale_slack_time_pct = 0,
+ .disable_pc_threshold = 1458000,
+ .em_window_size = 100000,
+ .em_max_util_pct = 97,
+ .ss_window_size = 1000000,
+ .ss_util_pct = 95,
+ .ss_iobusy_conv = 100,
+ },
+};
+
+struct platform_device msm8960_msm_gov_device = {
+ .name = "msm_dcvs_gov",
+ .id = -1,
+ .dev = {
+ .platform_data = &msm8960_core_info,
+ },
+};
diff --git a/arch/arm/mach-msm/devices.h b/arch/arm/mach-msm/devices.h
index baa2a73..199ff85 100644
--- a/arch/arm/mach-msm/devices.h
+++ b/arch/arm/mach-msm/devices.h
@@ -334,3 +334,13 @@
extern struct platform_device msm8960_cpu_idle_device;
extern struct platform_device msm8930_cpu_idle_device;
extern struct platform_device apq8064_cpu_idle_device;
+
+extern struct platform_device msm8960_msm_gov_device;
+extern struct platform_device msm8930_msm_gov_device;
+extern struct platform_device apq8064_msm_gov_device;
+
+extern struct platform_device msm_bus_8930_apps_fabric;
+extern struct platform_device msm_bus_8930_sys_fabric;
+extern struct platform_device msm_bus_8930_mm_fabric;
+extern struct platform_device msm_bus_8930_sys_fpb;
+extern struct platform_device msm_bus_8930_cpss_fpb;
diff --git a/arch/arm/mach-msm/include/mach/msm_bus_board.h b/arch/arm/mach-msm/include/mach/msm_bus_board.h
index fd61c98..f62bc86 100644
--- a/arch/arm/mach-msm/include/mach/msm_bus_board.h
+++ b/arch/arm/mach-msm/include/mach/msm_bus_board.h
@@ -72,6 +72,13 @@
extern struct msm_bus_fabric_registration msm_bus_9615_sys_fabric_pdata;
extern struct msm_bus_fabric_registration msm_bus_9615_def_fab_pdata;
+
+extern struct msm_bus_fabric_registration msm_bus_8930_apps_fabric_pdata;
+extern struct msm_bus_fabric_registration msm_bus_8930_sys_fabric_pdata;
+extern struct msm_bus_fabric_registration msm_bus_8930_mm_fabric_pdata;
+extern struct msm_bus_fabric_registration msm_bus_8930_sys_fpb_pdata;
+extern struct msm_bus_fabric_registration msm_bus_8930_cpss_fpb_pdata;
+
void msm_bus_rpm_set_mt_mask(void);
int msm_bus_board_rpm_get_il_ids(uint16_t *id);
int msm_bus_board_get_iid(int id);
diff --git a/arch/arm/mach-msm/include/mach/rpm-8930.h b/arch/arm/mach-msm/include/mach/rpm-8930.h
index 3bcd42e..0211b67 100644
--- a/arch/arm/mach-msm/include/mach/rpm-8930.h
+++ b/arch/arm/mach-msm/include/mach/rpm-8930.h
@@ -141,106 +141,106 @@
MSM_RPM_8930_ID_APPS_FABRIC_CFG_CLKMOD_2 = 39,
MSM_RPM_8930_ID_APPS_FABRIC_CFG_IOCTL = 40,
MSM_RPM_8930_ID_APPS_FABRIC_ARB_0 = 41,
- MSM_RPM_8930_ID_APPS_FABRIC_ARB_11 =
- MSM_RPM_8930_ID_APPS_FABRIC_ARB_0 + 11,
- MSM_RPM_8930_ID_SYS_FABRIC_CFG_HALT_0 = 53,
- MSM_RPM_8930_ID_SYS_FABRIC_CFG_HALT_1 = 54,
- MSM_RPM_8930_ID_SYS_FABRIC_CFG_CLKMOD_0 = 55,
- MSM_RPM_8930_ID_SYS_FABRIC_CFG_CLKMOD_1 = 56,
- MSM_RPM_8930_ID_SYS_FABRIC_CFG_CLKMOD_2 = 57,
- MSM_RPM_8930_ID_SYS_FABRIC_CFG_IOCTL = 58,
- MSM_RPM_8930_ID_SYSTEM_FABRIC_ARB_0 = 59,
- MSM_RPM_8930_ID_SYSTEM_FABRIC_ARB_28 =
- MSM_RPM_8930_ID_SYSTEM_FABRIC_ARB_0 + 28,
- MSM_RPM_8930_ID_MMSS_FABRIC_CFG_HALT_0 = 88,
- MSM_RPM_8930_ID_MMSS_FABRIC_CFG_HALT_1 = 89,
- MSM_RPM_8930_ID_MMSS_FABRIC_CFG_CLKMOD_0 = 90,
- MSM_RPM_8930_ID_MMSS_FABRIC_CFG_CLKMOD_1 = 91,
- MSM_RPM_8930_ID_MMSS_FABRIC_CFG_CLKMOD_2 = 92,
- MSM_RPM_8930_ID_MMSS_FABRIC_CFG_IOCTL = 93,
- MSM_RPM_8930_ID_MM_FABRIC_ARB_0 = 94,
- MSM_RPM_8930_ID_MM_FABRIC_ARB_22 =
- MSM_RPM_8930_ID_MM_FABRIC_ARB_0 + 22,
+ MSM_RPM_8930_ID_APPS_FABRIC_ARB_5 =
+ MSM_RPM_8930_ID_APPS_FABRIC_ARB_0 + 5,
+ MSM_RPM_8930_ID_SYS_FABRIC_CFG_HALT_0 = 47,
+ MSM_RPM_8930_ID_SYS_FABRIC_CFG_HALT_1 = 48,
+ MSM_RPM_8930_ID_SYS_FABRIC_CFG_CLKMOD_0 = 49,
+ MSM_RPM_8930_ID_SYS_FABRIC_CFG_CLKMOD_1 = 50,
+ MSM_RPM_8930_ID_SYS_FABRIC_CFG_CLKMOD_2 = 51,
+ MSM_RPM_8930_ID_SYS_FABRIC_CFG_IOCTL = 52,
+ MSM_RPM_8930_ID_SYSTEM_FABRIC_ARB_0 = 53,
+ MSM_RPM_8930_ID_SYSTEM_FABRIC_ARB_19 =
+ MSM_RPM_8930_ID_SYSTEM_FABRIC_ARB_0 + 19,
+ MSM_RPM_8930_ID_MMSS_FABRIC_CFG_HALT_0 = 73,
+ MSM_RPM_8930_ID_MMSS_FABRIC_CFG_HALT_1 = 74,
+ MSM_RPM_8930_ID_MMSS_FABRIC_CFG_CLKMOD_0 = 75,
+ MSM_RPM_8930_ID_MMSS_FABRIC_CFG_CLKMOD_1 = 76,
+ MSM_RPM_8930_ID_MMSS_FABRIC_CFG_CLKMOD_2 = 77,
+ MSM_RPM_8930_ID_MMSS_FABRIC_CFG_IOCTL = 78,
+ MSM_RPM_8930_ID_MM_FABRIC_ARB_0 = 79,
+ MSM_RPM_8930_ID_MM_FABRIC_ARB_10 =
+ MSM_RPM_8930_ID_MM_FABRIC_ARB_0 + 10,
- MSM_RPM_8930_ID_PM8038_S1_0 = 117,
- MSM_RPM_8930_ID_PM8038_S1_1 = 118,
- MSM_RPM_8930_ID_PM8038_S2_0 = 119,
- MSM_RPM_8930_ID_PM8038_S2_1 = 120,
- MSM_RPM_8930_ID_PM8038_S3_0 = 121,
- MSM_RPM_8930_ID_PM8038_S3_1 = 122,
- MSM_RPM_8930_ID_PM8038_S4_0 = 123,
- MSM_RPM_8930_ID_PM8038_S4_1 = 124,
- MSM_RPM_8930_ID_PM8038_S5_0 = 125,
- MSM_RPM_8930_ID_PM8038_S5_1 = 126,
- MSM_RPM_8930_ID_PM8038_S6_0 = 127,
- MSM_RPM_8930_ID_PM8038_S6_1 = 128,
- MSM_RPM_8930_ID_PM8038_L1_0 = 129,
- MSM_RPM_8930_ID_PM8038_L1_1 = 130,
- MSM_RPM_8930_ID_PM8038_L2_0 = 131,
- MSM_RPM_8930_ID_PM8038_L2_1 = 132,
- MSM_RPM_8930_ID_PM8038_L3_0 = 133,
- MSM_RPM_8930_ID_PM8038_L3_1 = 134,
- MSM_RPM_8930_ID_PM8038_L4_0 = 135,
- MSM_RPM_8930_ID_PM8038_L4_1 = 136,
- MSM_RPM_8930_ID_PM8038_L5_0 = 137,
- MSM_RPM_8930_ID_PM8038_L5_1 = 138,
- MSM_RPM_8930_ID_PM8038_L6_0 = 139,
- MSM_RPM_8930_ID_PM8038_L6_1 = 140,
- MSM_RPM_8930_ID_PM8038_L7_0 = 141,
- MSM_RPM_8930_ID_PM8038_L7_1 = 142,
- MSM_RPM_8930_ID_PM8038_L8_0 = 143,
- MSM_RPM_8930_ID_PM8038_L8_1 = 144,
- MSM_RPM_8930_ID_PM8038_L9_0 = 145,
- MSM_RPM_8930_ID_PM8038_L9_1 = 146,
- MSM_RPM_8930_ID_PM8038_L10_0 = 147,
- MSM_RPM_8930_ID_PM8038_L10_1 = 148,
- MSM_RPM_8930_ID_PM8038_L11_0 = 149,
- MSM_RPM_8930_ID_PM8038_L11_1 = 150,
- MSM_RPM_8930_ID_PM8038_L12_0 = 151,
- MSM_RPM_8930_ID_PM8038_L12_1 = 152,
- MSM_RPM_8930_ID_PM8038_L13_0 = 153,
- MSM_RPM_8930_ID_PM8038_L13_1 = 154,
- MSM_RPM_8930_ID_PM8038_L14_0 = 155,
- MSM_RPM_8930_ID_PM8038_L14_1 = 156,
- MSM_RPM_8930_ID_PM8038_L15_0 = 157,
- MSM_RPM_8930_ID_PM8038_L15_1 = 158,
- MSM_RPM_8930_ID_PM8038_L16_0 = 159,
- MSM_RPM_8930_ID_PM8038_L16_1 = 160,
- MSM_RPM_8930_ID_PM8038_L17_0 = 161,
- MSM_RPM_8930_ID_PM8038_L17_1 = 162,
- MSM_RPM_8930_ID_PM8038_L18_0 = 163,
- MSM_RPM_8930_ID_PM8038_L18_1 = 164,
- MSM_RPM_8930_ID_PM8038_L19_0 = 165,
- MSM_RPM_8930_ID_PM8038_L19_1 = 166,
- MSM_RPM_8930_ID_PM8038_L20_0 = 167,
- MSM_RPM_8930_ID_PM8038_L20_1 = 168,
- MSM_RPM_8930_ID_PM8038_L21_0 = 169,
- MSM_RPM_8930_ID_PM8038_L21_1 = 170,
- MSM_RPM_8930_ID_PM8038_L22_0 = 171,
- MSM_RPM_8930_ID_PM8038_L22_1 = 172,
- MSM_RPM_8930_ID_PM8038_L23_0 = 173,
- MSM_RPM_8930_ID_PM8038_L23_1 = 174,
- MSM_RPM_8930_ID_PM8038_L24_0 = 175,
- MSM_RPM_8930_ID_PM8038_L24_1 = 176,
- MSM_RPM_8930_ID_PM8038_L25_0 = 177,
- MSM_RPM_8930_ID_PM8038_L25_1 = 178,
- MSM_RPM_8930_ID_PM8038_L26_0 = 179,
- MSM_RPM_8930_ID_PM8038_L26_1 = 180,
- MSM_RPM_8930_ID_PM8038_L27_0 = 181,
- MSM_RPM_8930_ID_PM8038_L27_1 = 182,
- MSM_RPM_8930_ID_PM8038_CLK1_0 = 183,
- MSM_RPM_8930_ID_PM8038_CLK1_1 = 184,
- MSM_RPM_8930_ID_PM8038_CLK2_0 = 185,
- MSM_RPM_8930_ID_PM8038_CLK2_1 = 186,
- MSM_RPM_8930_ID_PM8038_LVS1 = 187,
- MSM_RPM_8930_ID_PM8038_LVS2 = 188,
- MSM_RPM_8930_ID_NCP_0 = 189,
- MSM_RPM_8930_ID_NCP_1 = 190,
- MSM_RPM_8930_ID_CXO_BUFFERS = 191,
- MSM_RPM_8930_ID_USB_OTG_SWITCH = 192,
- MSM_RPM_8930_ID_HDMI_SWITCH = 193,
- MSM_RPM_8930_ID_QDSS_CLK = 194,
- MSM_RPM_8930_ID_VOLTAGE_CORNER = 195,
+ MSM_RPM_8930_ID_PM8038_S1_0 = 90,
+ MSM_RPM_8930_ID_PM8038_S1_1 = 91,
+ MSM_RPM_8930_ID_PM8038_S2_0 = 92,
+ MSM_RPM_8930_ID_PM8038_S2_1 = 93,
+ MSM_RPM_8930_ID_PM8038_S3_0 = 94,
+ MSM_RPM_8930_ID_PM8038_S3_1 = 95,
+ MSM_RPM_8930_ID_PM8038_S4_0 = 96,
+ MSM_RPM_8930_ID_PM8038_S4_1 = 97,
+ MSM_RPM_8930_ID_PM8038_S5_0 = 98,
+ MSM_RPM_8930_ID_PM8038_S5_1 = 99,
+ MSM_RPM_8930_ID_PM8038_S6_0 = 100,
+ MSM_RPM_8930_ID_PM8038_S6_1 = 101,
+ MSM_RPM_8930_ID_PM8038_L1_0 = 102,
+ MSM_RPM_8930_ID_PM8038_L1_1 = 103,
+ MSM_RPM_8930_ID_PM8038_L2_0 = 104,
+ MSM_RPM_8930_ID_PM8038_L2_1 = 105,
+ MSM_RPM_8930_ID_PM8038_L3_0 = 106,
+ MSM_RPM_8930_ID_PM8038_L3_1 = 107,
+ MSM_RPM_8930_ID_PM8038_L4_0 = 108,
+ MSM_RPM_8930_ID_PM8038_L4_1 = 109,
+ MSM_RPM_8930_ID_PM8038_L5_0 = 110,
+ MSM_RPM_8930_ID_PM8038_L5_1 = 111,
+ MSM_RPM_8930_ID_PM8038_L6_0 = 112,
+ MSM_RPM_8930_ID_PM8038_L6_1 = 113,
+ MSM_RPM_8930_ID_PM8038_L7_0 = 114,
+ MSM_RPM_8930_ID_PM8038_L7_1 = 115,
+ MSM_RPM_8930_ID_PM8038_L8_0 = 116,
+ MSM_RPM_8930_ID_PM8038_L8_1 = 117,
+ MSM_RPM_8930_ID_PM8038_L9_0 = 118,
+ MSM_RPM_8930_ID_PM8038_L9_1 = 119,
+ MSM_RPM_8930_ID_PM8038_L10_0 = 120,
+ MSM_RPM_8930_ID_PM8038_L10_1 = 121,
+ MSM_RPM_8930_ID_PM8038_L11_0 = 122,
+ MSM_RPM_8930_ID_PM8038_L11_1 = 123,
+ MSM_RPM_8930_ID_PM8038_L12_0 = 124,
+ MSM_RPM_8930_ID_PM8038_L12_1 = 125,
+ MSM_RPM_8930_ID_PM8038_L13_0 = 126,
+ MSM_RPM_8930_ID_PM8038_L13_1 = 127,
+ MSM_RPM_8930_ID_PM8038_L14_0 = 128,
+ MSM_RPM_8930_ID_PM8038_L14_1 = 129,
+ MSM_RPM_8930_ID_PM8038_L15_0 = 130,
+ MSM_RPM_8930_ID_PM8038_L15_1 = 131,
+ MSM_RPM_8930_ID_PM8038_L16_0 = 132,
+ MSM_RPM_8930_ID_PM8038_L16_1 = 133,
+ MSM_RPM_8930_ID_PM8038_L17_0 = 134,
+ MSM_RPM_8930_ID_PM8038_L17_1 = 135,
+ MSM_RPM_8930_ID_PM8038_L18_0 = 136,
+ MSM_RPM_8930_ID_PM8038_L18_1 = 137,
+ MSM_RPM_8930_ID_PM8038_L19_0 = 138,
+ MSM_RPM_8930_ID_PM8038_L19_1 = 139,
+ MSM_RPM_8930_ID_PM8038_L20_0 = 140,
+ MSM_RPM_8930_ID_PM8038_L20_1 = 141,
+ MSM_RPM_8930_ID_PM8038_L21_0 = 142,
+ MSM_RPM_8930_ID_PM8038_L21_1 = 143,
+ MSM_RPM_8930_ID_PM8038_L22_0 = 144,
+ MSM_RPM_8930_ID_PM8038_L22_1 = 145,
+ MSM_RPM_8930_ID_PM8038_L23_0 = 146,
+ MSM_RPM_8930_ID_PM8038_L23_1 = 147,
+ MSM_RPM_8930_ID_PM8038_L24_0 = 148,
+ MSM_RPM_8930_ID_PM8038_L24_1 = 149,
+ MSM_RPM_8930_ID_PM8038_L25_0 = 150,
+ MSM_RPM_8930_ID_PM8038_L25_1 = 151,
+ MSM_RPM_8930_ID_PM8038_L26_0 = 152,
+ MSM_RPM_8930_ID_PM8038_L26_1 = 153,
+ MSM_RPM_8930_ID_PM8038_L27_0 = 154,
+ MSM_RPM_8930_ID_PM8038_L27_1 = 155,
+ MSM_RPM_8930_ID_PM8038_CLK1_0 = 156,
+ MSM_RPM_8930_ID_PM8038_CLK1_1 = 157,
+ MSM_RPM_8930_ID_PM8038_CLK2_0 = 158,
+ MSM_RPM_8930_ID_PM8038_CLK2_1 = 159,
+ MSM_RPM_8930_ID_PM8038_LVS1 = 160,
+ MSM_RPM_8930_ID_PM8038_LVS2 = 161,
+ MSM_RPM_8930_ID_NCP_0 = 162,
+ MSM_RPM_8930_ID_NCP_1 = 163,
+ MSM_RPM_8930_ID_CXO_BUFFERS = 164,
+ MSM_RPM_8930_ID_USB_OTG_SWITCH = 165,
+ MSM_RPM_8930_ID_HDMI_SWITCH = 166,
+ MSM_RPM_8930_ID_QDSS_CLK = 167,
+ MSM_RPM_8930_ID_VOLTAGE_CORNER = 168,
MSM_RPM_8930_ID_LAST = MSM_RPM_8930_ID_VOLTAGE_CORNER,
};
diff --git a/arch/arm/mach-msm/include/mach/timex.h b/arch/arm/mach-msm/include/mach/timex.h
index 61f1996..542aba3 100644
--- a/arch/arm/mach-msm/include/mach/timex.h
+++ b/arch/arm/mach-msm/include/mach/timex.h
@@ -18,7 +18,7 @@
#define CLOCK_TICK_RATE 1000000
-#ifdef CONFIG_MSM_SMP
+#ifdef CONFIG_HAVE_ARCH_HAS_CURRENT_TIMER
#define ARCH_HAS_READ_CURRENT_TIMER
#endif
diff --git a/arch/arm/mach-msm/iommu.c b/arch/arm/mach-msm/iommu.c
index 853888a..a310ba0 100644
--- a/arch/arm/mach-msm/iommu.c
+++ b/arch/arm/mach-msm/iommu.c
@@ -685,6 +685,19 @@
return ret;
}
+static unsigned int get_phys_addr(struct scatterlist *sg)
+{
+ /*
+ * Try sg_dma_address first so that we can
+ * map carveout regions that do not have a
+ * struct page associated with them.
+ */
+ unsigned int pa = sg_dma_address(sg);
+ if (pa == 0)
+ pa = sg_phys(sg);
+ return pa;
+}
+
static int msm_iommu_map_range(struct iommu_domain *domain, unsigned int va,
struct scatterlist *sg, unsigned int len,
int prot)
@@ -722,7 +735,12 @@
sl_table = (unsigned long *) __va(((*fl_pte) & FL_BASE_MASK));
sl_offset = SL_OFFSET(va);
- chunk_pa = sg_phys(sg);
+ chunk_pa = get_phys_addr(sg);
+ if (chunk_pa == 0) {
+ pr_debug("No dma address for sg %p\n", sg);
+ ret = -EINVAL;
+ goto fail;
+ }
while (offset < len) {
/* Set up a 2nd level page table if one doesn't exist */
@@ -764,7 +782,13 @@
if (chunk_offset >= sg->length && offset < len) {
chunk_offset = 0;
sg = sg_next(sg);
- chunk_pa = sg_phys(sg);
+ chunk_pa = get_phys_addr(sg);
+ if (chunk_pa == 0) {
+ pr_debug("No dma address for sg %p\n",
+ sg);
+ ret = -EINVAL;
+ goto fail;
+ }
}
}
diff --git a/arch/arm/mach-msm/msm_xo.c b/arch/arm/mach-msm/msm_xo.c
index 936fd6b..86776d3 100644
--- a/arch/arm/mach-msm/msm_xo.c
+++ b/arch/arm/mach-msm/msm_xo.c
@@ -21,6 +21,7 @@
#include <linux/seq_file.h>
#include <linux/uaccess.h>
#include <linux/string.h>
+#include <linux/clk.h>
#include <mach/msm_xo.h>
#include <mach/rpm.h>
@@ -232,6 +233,9 @@
{
int ret;
struct msm_xo *xo = xo_voter->xo;
+ int is_d0 = xo == &msm_xo_sources[MSM_XO_TCXO_D0];
+ int needs_workaround = cpu_is_msm8960() || cpu_is_apq8064() ||
+ cpu_is_msm8930() || cpu_is_msm9615();
if (xo_voter->mode == mode)
return 0;
@@ -244,6 +248,20 @@
xo->votes[mode]--;
goto out;
}
+ /* TODO: Remove once RPM separates the concept of D0 and CXO */
+ if (is_d0 && needs_workaround) {
+ static struct clk *xo_clk;
+
+ if (!xo_clk) {
+ xo_clk = clk_get_sys("msm_xo", "xo");
+ BUG_ON(IS_ERR(xo_clk));
+ }
+ /* Ignore transitions from pin to on or vice versa */
+ if (mode && xo_voter->mode == MSM_XO_MODE_OFF)
+ clk_enable(xo_clk);
+ else if (!mode)
+ clk_disable(xo_clk);
+ }
xo_voter->mode = mode;
out:
return ret;
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 5b962a4..ae7bc32 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -1123,11 +1123,13 @@
}
msm_sched_clock_init();
- if (is_smp() && !cpu_is_msm8625()) {
+#ifdef ARCH_HAS_READ_CURRENT_TIMER
+ if (is_smp()) {
__raw_writel(1,
msm_clocks[MSM_CLOCK_DGT].regbase + TIMER_ENABLE);
set_delay_fn(read_current_timer_delay_loop);
}
+#endif
}
#ifdef CONFIG_SMP
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index c044060..75ec72d 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -42,3 +42,4 @@
# ARM SoC drivers
obj-$(CONFIG_UX500_SOC_DB8500) += db8500-cpufreq.o
+obj-$(CONFIG_MSM_DCVS) += cpufreq_gov_msm.o
diff --git a/drivers/cpufreq/cpufreq_gov_msm.c b/drivers/cpufreq/cpufreq_gov_msm.c
new file mode 100644
index 0000000..9c49f80
--- /dev/null
+++ b/drivers/cpufreq/cpufreq_gov_msm.c
@@ -0,0 +1,176 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/kobject.h>
+#include <linux/cpufreq.h>
+#include <linux/platform_device.h>
+#include <mach/msm_dcvs.h>
+
+struct msm_gov {
+ int cpu;
+ unsigned int cur_freq;
+ unsigned int min_freq;
+ unsigned int max_freq;
+ struct msm_dcvs_freq gov_notifier;
+ struct cpufreq_policy *policy;
+};
+
+static DEFINE_PER_CPU_SHARED_ALIGNED(struct mutex, gov_mutex);
+static DEFINE_PER_CPU_SHARED_ALIGNED(struct msm_gov, msm_gov_info);
+static char core_name[NR_CPUS][10];
+
+static void msm_gov_check_limits(struct cpufreq_policy *policy)
+{
+ struct msm_gov *gov = &per_cpu(msm_gov_info, policy->cpu);
+
+ if (policy->max < gov->cur_freq)
+ __cpufreq_driver_target(policy, policy->max,
+ CPUFREQ_RELATION_H);
+ else if (policy->min > gov->min_freq)
+ __cpufreq_driver_target(policy, policy->min,
+ CPUFREQ_RELATION_L);
+ else
+ __cpufreq_driver_target(policy, gov->cur_freq,
+ CPUFREQ_RELATION_L);
+
+ gov->cur_freq = policy->cur;
+ gov->min_freq = policy->min;
+ gov->max_freq = policy->max;
+}
+
+static int msm_dcvs_freq_set(struct msm_dcvs_freq *self,
+ unsigned int freq)
+{
+ int ret = -EINVAL;
+ struct msm_gov *gov =
+ container_of(self, struct msm_gov, gov_notifier);
+
+ mutex_lock(&per_cpu(gov_mutex, gov->cpu));
+
+ if (freq < gov->min_freq)
+ freq = gov->min_freq;
+ if (freq > gov->max_freq)
+ freq = gov->max_freq;
+
+ ret = __cpufreq_driver_target(gov->policy, freq, CPUFREQ_RELATION_L);
+ gov->cur_freq = gov->policy->cur;
+
+ mutex_unlock(&per_cpu(gov_mutex, gov->cpu));
+
+ if (!ret)
+ return gov->cur_freq;
+
+ return ret;
+}
+
+static unsigned int msm_dcvs_freq_get(struct msm_dcvs_freq *self)
+{
+ struct msm_gov *gov =
+ container_of(self, struct msm_gov, gov_notifier);
+
+ return gov->cur_freq;
+}
+
+static int cpufreq_governor_msm(struct cpufreq_policy *policy,
+ unsigned int event)
+{
+ unsigned int cpu = policy->cpu;
+ int ret = 0;
+ int handle = 0;
+ struct msm_gov *gov = &per_cpu(msm_gov_info, policy->cpu);
+ struct msm_dcvs_freq *dcvs_notifier =
+ &(per_cpu(msm_gov_info, cpu).gov_notifier);
+
+ switch (event) {
+ case CPUFREQ_GOV_START:
+ if (!cpu_online(cpu))
+ return -EINVAL;
+ BUG_ON(!policy->cur);
+ mutex_lock(&per_cpu(gov_mutex, cpu));
+ per_cpu(msm_gov_info, cpu).cpu = cpu;
+ gov->policy = policy;
+ dcvs_notifier->core_name = core_name[cpu];
+ dcvs_notifier->set_frequency = msm_dcvs_freq_set;
+ dcvs_notifier->get_frequency = msm_dcvs_freq_get;
+ handle = msm_dcvs_freq_sink_register(dcvs_notifier);
+ BUG_ON(handle < 0);
+ msm_gov_check_limits(policy);
+ mutex_unlock(&per_cpu(gov_mutex, cpu));
+ break;
+
+ case CPUFREQ_GOV_STOP:
+ mutex_lock(&per_cpu(gov_mutex, cpu));
+ msm_dcvs_freq_sink_unregister(dcvs_notifier);
+ mutex_unlock(&per_cpu(gov_mutex, cpu));
+ break;
+
+ case CPUFREQ_GOV_LIMITS:
+ mutex_lock(&per_cpu(gov_mutex, cpu));
+ msm_gov_check_limits(policy);
+ mutex_unlock(&per_cpu(gov_mutex, cpu));
+ break;
+ };
+
+ return ret;
+}
+
+struct cpufreq_governor cpufreq_gov_msm = {
+ .name = "msm-dcvs",
+ .governor = cpufreq_governor_msm,
+ .owner = THIS_MODULE,
+};
+
+static int __devinit msm_gov_probe(struct platform_device *pdev)
+{
+ int ret = 0;
+ int cpu;
+ uint32_t group_id = 0x43505530; /* CPU0 */
+ struct msm_dcvs_core_info *core = NULL;
+
+ core = pdev->dev.platform_data;
+
+ for_each_possible_cpu(cpu) {
+ mutex_init(&per_cpu(gov_mutex, cpu));
+ snprintf(core_name[cpu], 10, "cpu%d", cpu);
+ ret = msm_dcvs_register_core(core_name[cpu], group_id, core);
+ if (ret)
+ pr_err("Unable to register core for %d\n", cpu);
+ }
+
+ return cpufreq_register_governor(&cpufreq_gov_msm);
+}
+
+static int __devexit msm_gov_remove(struct platform_device *pdev)
+{
+ platform_set_drvdata(pdev, NULL);
+ return 0;
+}
+
+static struct platform_driver msm_gov_driver = {
+ .probe = msm_gov_probe,
+ .remove = __devexit_p(msm_gov_remove),
+ .driver = {
+ .name = "msm_dcvs_gov",
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init cpufreq_gov_msm_init(void)
+{
+ return platform_driver_register(&msm_gov_driver);
+}
+late_initcall(cpufreq_gov_msm_init);
diff --git a/drivers/gpu/ion/ion_carveout_heap.c b/drivers/gpu/ion/ion_carveout_heap.c
index 347ab88..7a08e50 100644
--- a/drivers/gpu/ion/ion_carveout_heap.c
+++ b/drivers/gpu/ion/ion_carveout_heap.c
@@ -110,17 +110,15 @@
struct ion_buffer *buffer)
{
struct scatterlist *sglist;
- struct page *page = phys_to_page(buffer->priv_phys);
-
- if (page == NULL)
- return NULL;
sglist = vmalloc(sizeof(struct scatterlist));
if (!sglist)
return ERR_PTR(-ENOMEM);
sg_init_table(sglist, 1);
- sg_set_page(sglist, page, buffer->size, 0);
+ sglist->length = buffer->size;
+ sglist->offset = 0;
+ sglist->dma_address = buffer->priv_phys;
return sglist;
}
diff --git a/drivers/gpu/ion/ion_cp_heap.c b/drivers/gpu/ion/ion_cp_heap.c
index ff561dc..85c0534 100644
--- a/drivers/gpu/ion/ion_cp_heap.c
+++ b/drivers/gpu/ion/ion_cp_heap.c
@@ -299,17 +299,15 @@
struct ion_buffer *buffer)
{
struct scatterlist *sglist;
- struct page *page = phys_to_page(buffer->priv_phys);
-
- if (page == NULL)
- return NULL;
sglist = vmalloc(sizeof(*sglist));
if (!sglist)
return ERR_PTR(-ENOMEM);
sg_init_table(sglist, 1);
- sg_set_page(sglist, page, buffer->size, 0);
+ sglist->length = buffer->size;
+ sglist->offset = 0;
+ sglist->dma_address = buffer->priv_phys;
return sglist;
}
diff --git a/drivers/gpu/msm/adreno_a3xx.c b/drivers/gpu/msm/adreno_a3xx.c
index 8963fc8..c01e676 100644
--- a/drivers/gpu/msm/adreno_a3xx.c
+++ b/drivers/gpu/msm/adreno_a3xx.c
@@ -12,6 +12,7 @@
*/
#include <linux/delay.h>
+#include <mach/socinfo.h>
#include "kgsl.h"
#include "adreno.h"
@@ -2567,10 +2568,11 @@
adreno_regwrite(device, A3XX_VBIF_OUT_AXI_AOOO_EN, 0x0000003C);
adreno_regwrite(device, A3XX_VBIF_OUT_AXI_AOOO, 0x003C003C);
- /* Enable 1K sort */
- adreno_regwrite(device, A3XX_VBIF_ABIT_SORT, 0x000000FF);
- adreno_regwrite(device, A3XX_VBIF_ABIT_SORT_CONF, 0x000000A4);
-
+ if (cpu_is_apq8064()) {
+ /* Enable 1K sort */
+ adreno_regwrite(device, A3XX_VBIF_ABIT_SORT, 0x000000FF);
+ adreno_regwrite(device, A3XX_VBIF_ABIT_SORT_CONF, 0x000000A4);
+ }
/* Make all blocks contribute to the GPU BUSY perf counter */
adreno_regwrite(device, A3XX_RBBM_GPU_BUSY_MASKED, 0xFFFFFFFF);
diff --git a/drivers/gpu/msm/kgsl_gpummu.c b/drivers/gpu/msm/kgsl_gpummu.c
index 97b5ef1..98216f8 100644
--- a/drivers/gpu/msm/kgsl_gpummu.c
+++ b/drivers/gpu/msm/kgsl_gpummu.c
@@ -682,7 +682,7 @@
flushtlb = 1;
for_each_sg(memdesc->sg, s, memdesc->sglen, i) {
- unsigned int paddr = sg_phys(s);
+ unsigned int paddr = kgsl_get_sg_pa(s);
unsigned int j;
/* Each sg entry might be multiple pages long */
diff --git a/drivers/gpu/msm/kgsl_sharedmem.c b/drivers/gpu/msm/kgsl_sharedmem.c
index f61a196..d083702 100644
--- a/drivers/gpu/msm/kgsl_sharedmem.c
+++ b/drivers/gpu/msm/kgsl_sharedmem.c
@@ -284,7 +284,7 @@
int i;
for_each_sg(sg, s, sglen, i) {
- unsigned int paddr = sg_phys(s);
+ unsigned int paddr = kgsl_get_sg_pa(s);
_outer_cache_range_op(op, paddr, s->length);
}
}
diff --git a/drivers/gpu/msm/kgsl_sharedmem.h b/drivers/gpu/msm/kgsl_sharedmem.h
index af0d74d..a1e4c91 100644
--- a/drivers/gpu/msm/kgsl_sharedmem.h
+++ b/drivers/gpu/msm/kgsl_sharedmem.h
@@ -80,12 +80,22 @@
int kgsl_sharedmem_init_sysfs(void);
void kgsl_sharedmem_uninit_sysfs(void);
+static inline unsigned int kgsl_get_sg_pa(struct scatterlist *sg)
+{
+ /*
+ * Try sg_dma_address first to support ion carveout
+ * regions which do not work with sg_phys().
+ */
+ unsigned int pa = sg_dma_address(sg);
+ if (pa == 0)
+ pa = sg_phys(sg);
+ return pa;
+}
+
static inline int
memdesc_sg_phys(struct kgsl_memdesc *memdesc,
unsigned int physaddr, unsigned int size)
{
- struct page *page = phys_to_page(physaddr);
-
memdesc->sg = vmalloc(sizeof(struct scatterlist) * 1);
if (memdesc->sg == NULL)
return -ENOMEM;
@@ -94,7 +104,9 @@
memdesc->sglen = 1;
sg_init_table(memdesc->sg, 1);
- sg_set_page(&memdesc->sg[0], page, size, 0);
+ memdesc->sg[0].length = size;
+ memdesc->sg[0].offset = 0;
+ memdesc->sg[0].dma_address = physaddr;
return 0;
}
diff --git a/drivers/media/video/msm/csi/msm_csic.c b/drivers/media/video/msm/csi/msm_csic.c
index 476615d..3a642c7 100644
--- a/drivers/media/video/msm/csi/msm_csic.c
+++ b/drivers/media/video/msm/csi/msm_csic.c
@@ -142,6 +142,7 @@
struct csic_device *csic_dev;
struct msm_camera_csi_params *csic_params;
void __iomem *csicbase;
+ int i;
csic_dev = v4l2_get_subdevdata(cfg_params->subdev);
csicbase = csic_dev->base;
@@ -163,24 +164,14 @@
CDBG("%s MIPI_PROTOCOL_CONTROL val=0x%x\n", __func__, val);
msm_io_w(val, csicbase + MIPI_PROTOCOL_CONTROL);
- val = (0x1 << MIPI_CALIBRATION_CONTROL_SWCAL_CAL_EN_SHFT) |
- (0x1 <<
- MIPI_CALIBRATION_CONTROL_SWCAL_STRENGTH_OVERRIDE_EN_SHFT) |
- (0x1 << MIPI_CALIBRATION_CONTROL_CAL_SW_HW_MODE_SHFT) |
- (0x1 << MIPI_CALIBRATION_CONTROL_MANUAL_OVERRIDE_EN_SHFT);
- CDBG("%s MIPI_CALIBRATION_CONTROL val=0x%x\n", __func__, val);
- msm_io_w(val, csicbase + MIPI_CALIBRATION_CONTROL);
-
val = (csic_params->settle_cnt <<
MIPI_PHY_D0_CONTROL2_SETTLE_COUNT_SHFT) |
(0x0F << MIPI_PHY_D0_CONTROL2_HS_TERM_IMP_SHFT) |
(0x1 << MIPI_PHY_D0_CONTROL2_LP_REC_EN_SHFT) |
(0x1 << MIPI_PHY_D0_CONTROL2_ERR_SOT_HS_EN_SHFT);
CDBG("%s MIPI_PHY_D0_CONTROL2 val=0x%x\n", __func__, val);
- msm_io_w(val, csicbase + MIPI_PHY_D0_CONTROL2);
- msm_io_w(val, csicbase + MIPI_PHY_D1_CONTROL2);
- msm_io_w(val, csicbase + MIPI_PHY_D2_CONTROL2);
- msm_io_w(val, csicbase + MIPI_PHY_D3_CONTROL2);
+ for (i = 0; i < csic_params->lane_cnt; i++)
+ msm_io_w(val, csicbase + MIPI_PHY_D0_CONTROL2 + i * 4);
val = (0x0F << MIPI_PHY_CL_CONTROL_HS_TERM_IMP_SHFT) |
@@ -233,7 +224,9 @@
pr_info("msm_csic_irq: %x\n", (unsigned int)csic_dev->base);
irq = msm_io_r(csic_dev->base + MIPI_INTERRUPT_STATUS);
- pr_info("%s MIPI_INTERRUPT_STATUS = 0x%x\n", __func__, irq);
+ pr_info("%s MIPI_INTERRUPT_STATUS = 0x%x 0x%x\n",
+ __func__, irq,
+ msm_io_r(csic_dev->base + MIPI_PROTOCOL_CONTROL));
msm_io_w(irq, csic_dev->base + MIPI_INTERRUPT_STATUS);
/* TODO: Needs to send this info to upper layers */
@@ -372,7 +365,7 @@
}
rc = request_irq(new_csic_dev->irq->start, msm_csic_irq,
- IRQF_TRIGGER_RISING, "csic", new_csic_dev);
+ IRQF_TRIGGER_HIGH, "csic", new_csic_dev);
if (rc < 0) {
release_mem_region(new_csic_dev->mem->start,
resource_size(new_csic_dev->mem));
diff --git a/drivers/media/video/msm/msm_vfe7x27a_v4l2.c b/drivers/media/video/msm/msm_vfe7x27a_v4l2.c
index e1f4532..a332fba 100644
--- a/drivers/media/video/msm/msm_vfe7x27a_v4l2.c
+++ b/drivers/media/video/msm/msm_vfe7x27a_v4l2.c
@@ -614,6 +614,24 @@
msm_adsp_write(vfe_mod, QDSP_CMDQUEUE,
cmd_data, len);
vfe2x_ctrl->start_pending = 0;
+ } else if (vfe2x_ctrl->stop_pending) {
+ CDBG("Send STOP\n");
+ cmd_data = buf;
+ *(uint32_t *)cmd_data = VFE_STOP;
+ /* Send Stop cmd here */
+ len = 4;
+ msm_adsp_write(vfe_mod, QDSP_CMDQUEUE,
+ cmd_data, len);
+ vfe2x_ctrl->stop_pending = 0;
+ } else if (vfe2x_ctrl->update_pending) {
+ CDBG("Send Update\n");
+ cmd_data = buf;
+ *(uint32_t *)cmd_data = VFE_UPDATE;
+ /* Send Update cmd here */
+ len = 4;
+ msm_adsp_write(vfe_mod, QDSP_CMDQUEUE,
+ cmd_data, len);
+ vfe2x_ctrl->update_pending = 0;
}
vfe2x_ctrl->tableack_pending = 0;
spin_unlock_irqrestore(&vfe2x_ctrl->table_lock, flags);
@@ -1105,7 +1123,9 @@
case VFE_CMD_CAPTURE_RAW:
spin_lock_irqsave(&vfe2x_ctrl->table_lock,
flags);
- if (!list_empty(&vfe2x_ctrl->table_q)) {
+ if ((!list_empty(&vfe2x_ctrl->table_q)) ||
+ vfe2x_ctrl->tableack_pending) {
+ CDBG("start pending\n");
vfe2x_ctrl->start_pending = 1;
spin_unlock_irqrestore(
&vfe2x_ctrl->table_lock,
@@ -1126,9 +1146,36 @@
break;
case VFE_CMD_STOP:
vfestopped = 1;
+ spin_lock_irqsave(&vfe2x_ctrl->table_lock,
+ flags);
+ if ((!list_empty(&vfe2x_ctrl->table_q)) ||
+ vfe2x_ctrl->tableack_pending) {
+ CDBG("stop pending\n");
+ vfe2x_ctrl->stop_pending = 1;
+ spin_unlock_irqrestore(
+ &vfe2x_ctrl->table_lock,
+ flags);
+ return 0;
+ }
+ spin_unlock_irqrestore(&vfe2x_ctrl->table_lock,
+ flags);
vfe2x_ctrl->vfe_started = 0;
goto config_send;
-
+ case VFE_CMD_UPDATE:
+ spin_lock_irqsave(&vfe2x_ctrl->table_lock,
+ flags);
+ if ((!list_empty(&vfe2x_ctrl->table_q)) ||
+ vfe2x_ctrl->tableack_pending) {
+ CDBG("update pending\n");
+ vfe2x_ctrl->update_pending = 1;
+ spin_unlock_irqrestore(
+ &vfe2x_ctrl->table_lock,
+ flags);
+ return 0;
+ }
+ spin_unlock_irqrestore(&vfe2x_ctrl->table_lock,
+ flags);
+ goto config_send;
default:
break;
}
diff --git a/drivers/media/video/msm/msm_vfe7x27a_v4l2.h b/drivers/media/video/msm/msm_vfe7x27a_v4l2.h
index 90237bd..2b77159 100644
--- a/drivers/media/video/msm/msm_vfe7x27a_v4l2.h
+++ b/drivers/media/video/msm/msm_vfe7x27a_v4l2.h
@@ -97,6 +97,8 @@
struct vfe_cmd_start start_cmd;
uint32_t start_pending;
uint32_t vfe_started;
+ uint32_t stop_pending;
+ uint32_t update_pending;
/* v4l2 subdev */
struct v4l2_subdev subdev;
diff --git a/drivers/media/video/msm/sensors/ov7692_qrd_v4l2.c b/drivers/media/video/msm/sensors/ov7692_qrd_v4l2.c
index 4373e22..99e96f0 100644
--- a/drivers/media/video/msm/sensors/ov7692_qrd_v4l2.c
+++ b/drivers/media/video/msm/sensors/ov7692_qrd_v4l2.c
@@ -597,6 +597,22 @@
return rc;
}
+static int32_t ov7692_write_exp_gain(struct msm_sensor_ctrl_t *s_ctrl,
+ uint16_t gain, uint32_t line)
+{
+ CDBG("ov7692_write_exp_gain : Not supported\n");
+ return 0;
+}
+
+int32_t ov7692_sensor_set_fps(struct msm_sensor_ctrl_t *s_ctrl,
+ struct fps_cfg *fps)
+{
+ CDBG("ov7692_sensor_set_fps: Not supported\n");
+ return 0;
+}
+
+
+
static void ov7692_sw_reset(struct msm_sensor_ctrl_t *s_ctrl)
{
@@ -671,7 +687,7 @@
.sensor_stop_stream = msm_sensor_stop_stream,
.sensor_group_hold_on = msm_sensor_group_hold_on,
.sensor_group_hold_off = msm_sensor_group_hold_off,
- .sensor_set_fps = msm_sensor_set_fps,
+ .sensor_set_fps = ov7692_sensor_set_fps,
.sensor_setting = msm_sensor_setting3,
.sensor_set_sensor_mode = msm_sensor_set_sensor_mode,
.sensor_mode_init = msm_sensor_mode_init,
@@ -679,6 +695,8 @@
.sensor_config = msm_sensor_config,
.sensor_power_up = ov7692_sensor_power_up,
.sensor_power_down = msm_sensor_power_down,
+ .sensor_write_exp_gain = ov7692_write_exp_gain,
+ .sensor_write_snapshot_exp_gain = ov7692_write_exp_gain,
};
static struct msm_sensor_reg_t ov7692_regs = {
diff --git a/drivers/video/msm/Kconfig b/drivers/video/msm/Kconfig
index a064d11..606d349 100644
--- a/drivers/video/msm/Kconfig
+++ b/drivers/video/msm/Kconfig
@@ -249,6 +249,20 @@
select FB_MSM_LCDC_PANEL
default n
+config FB_MSM_LCDC_TRULY_HVGA_IPS3P2335
+ bool
+ select FB_MSM_LCDC_PANEL
+ default n
+
+config FB_MSM_LCDC_TRULY_HVGA_IPS3P2335_PT_PANEL
+ depends on FB_MSM_LCDC_HW
+ bool "LCDC Truly HVGA PT Panel"
+ select FB_MSM_LCDC_TRULY_HVGA_IPS3P2335
+ default n
+ ---help---
+ Support for LCDC Truly HVGA PT panel
+
+
config FB_MSM_LCDC_SAMSUNG_OLED_PT
bool
select FB_MSM_LCDC_PANEL
diff --git a/drivers/video/msm/Makefile b/drivers/video/msm/Makefile
index aabe490..e6c869f 100644
--- a/drivers/video/msm/Makefile
+++ b/drivers/video/msm/Makefile
@@ -165,6 +165,7 @@
obj-$(CONFIG_FB_MSM_LVDS_CHIMEI_WXGA) += lvds_chimei_wxga.o
obj-$(CONFIG_FB_MSM_HDMI_MSM_PANEL) += hdmi_msm.o
obj-$(CONFIG_FB_MSM_EXT_INTERFACE_COMMON) += external_common.o
+obj-$(CONFIG_FB_MSM_LCDC_TRULY_HVGA_IPS3P2335) += lcdc_truly_ips3p2335.o
obj-$(CONFIG_FB_MSM_TVOUT) += tvout_msm.o
diff --git a/drivers/video/msm/lcdc_truly_ips3p2335.c b/drivers/video/msm/lcdc_truly_ips3p2335.c
new file mode 100644
index 0000000..838c083
--- /dev/null
+++ b/drivers/video/msm/lcdc_truly_ips3p2335.c
@@ -0,0 +1,305 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/delay.h>
+#include <linux/module.h>
+#include <mach/gpio.h>
+#include <mach/pmic.h>
+#include "msm_fb.h"
+
+static int prev_bl = 17;
+
+static int spi_cs;
+static int spi_sclk;
+static int spi_mosi;
+static int gpio_backlight_en;
+static int gpio_display_reset;
+
+struct truly_state_type {
+ boolean disp_initialized;
+ boolean display_on;
+ boolean disp_powered_up;
+};
+
+static struct truly_state_type truly_state = { 0 };
+static struct msm_panel_common_pdata *lcdc_truly_pdata;
+
+static char init_item_v1[] = { 0xff, 0x83, 0x57, };
+static char init_item_v2[] = { 0x03, };
+static char init_item_v3[] = { 0x00, 0x13, 0x1C, 0x1C, 0x83, 0x48, };
+static char init_item_v4[] = { 0x43, 0x06, 0x06, 0x06, };
+static char init_item_v5[] = { 0x53, };
+static char init_item_v6[] = { 0x02, 0x40, 0x00, 0x2a, 0x2a, 0x0d, 0x3f, };
+static char init_item_v7[] = { 0x70, 0x50, 0x01, 0x3c, 0xe8, 0x08, };
+static char init_item_v8[] = { 0x17, 0x0f, };
+static char init_item_v9[] = { 0x60};
+static char init_item_v10[] = { 0x00, 0x13, 0x1a, 0x29, 0x2d, 0x41, 0x49,
+ 0x52, 0x48, 0x41, 0x3c, 0x33, 0x30, 0x1c,
+ 0x19, 0x03, 0x00, 0x13, 0x1a, 0x29, 0x2d,
+ 0x41, 0x49, 0x52, 0x48, 0x41, 0x3c, 0x33,
+ 0x31, 0x1c, 0x19, 0x03, 0x00, 0x01,
+ };
+static char init_item_v11[] = { 0x40, };
+
+static inline void truly_spi_write_byte(char dc, uint8 data)
+{
+ uint32 bit;
+ int bnum;
+
+ gpio_set_value_cansleep(spi_sclk, 0); /* clk low */
+ /* dc: 0 for command, 1 for parameter */
+ gpio_set_value_cansleep(spi_mosi, dc);
+ udelay(1); /* at least 20 ns */
+ gpio_set_value_cansleep(spi_sclk, 1); /* clk high */
+ udelay(1); /* at least 20 ns */
+ bnum = 8; /* 8 data bits */
+ bit = 0x80;
+ while (bnum) {
+ gpio_set_value_cansleep(spi_sclk, 0); /* clk low */
+ if (data & bit)
+ gpio_set_value_cansleep(spi_mosi, 1);
+ else
+ gpio_set_value_cansleep(spi_mosi, 0);
+ udelay(1);
+ gpio_set_value_cansleep(spi_sclk, 1); /* clk high */
+ udelay(1);
+ bit >>= 1;
+ bnum--;
+ }
+}
+
+static inline int truly_spi_write(char cmd, char *data, int num)
+{
+ int i;
+
+ gpio_set_value_cansleep(spi_cs, 0); /* cs low */
+ /* command byte first */
+ truly_spi_write_byte(0, cmd);
+ /* followed by parameter bytes */
+ for (i = 0; i < num; i++) {
+ if (data)
+ truly_spi_write_byte(1, data[i]);
+ }
+ gpio_set_value_cansleep(spi_mosi, 1); /* mosi high */
+ gpio_set_value_cansleep(spi_cs, 1); /* cs high */
+ udelay(10);
+ return 0;
+}
+
+static void spi_pin_assign(void)
+{
+ /* Setting the Default GPIO's */
+ spi_mosi = *(lcdc_truly_pdata->gpio_num);
+ spi_sclk = *(lcdc_truly_pdata->gpio_num + 1);
+ spi_cs = *(lcdc_truly_pdata->gpio_num + 2);
+ gpio_backlight_en = *(lcdc_truly_pdata->gpio_num + 3);
+ gpio_display_reset = *(lcdc_truly_pdata->gpio_num + 4);
+ pr_debug("spi_mosi:%d spi_sclk:%d spi_cs:%d backlight:%d reset:%d\n",
+ spi_mosi, spi_sclk, spi_cs, gpio_backlight_en,
+ gpio_display_reset);
+
+}
+
+static void truly_disp_powerup(void)
+{
+ /* Reset the hardware first */
+ /* Include DAC power up implementation here */
+ if (!truly_state.disp_powered_up && !truly_state.display_on)
+ truly_state.disp_powered_up = TRUE;
+}
+
+static void truly_disp_reginit(void)
+{
+ pr_debug("%s disp_powered_up:%d display_on:%d\n", __func__,
+ truly_state.disp_powered_up, truly_state.display_on);
+ if (truly_state.disp_powered_up && !truly_state.display_on) {
+ gpio_set_value_cansleep(spi_cs, 1); /* cs high */
+
+ truly_spi_write(0xb9, init_item_v1, sizeof(init_item_v1));
+ msleep(20);
+ truly_spi_write(0xcc, init_item_v2, sizeof(init_item_v2));
+ truly_spi_write(0xb1, init_item_v3, sizeof(init_item_v3));
+ truly_spi_write(0xb3, init_item_v4, sizeof(init_item_v4));
+ truly_spi_write(0xb6, init_item_v5, sizeof(init_item_v5));
+ truly_spi_write(0xb4, init_item_v6, sizeof(init_item_v6));
+ truly_spi_write(0xc0, init_item_v7, sizeof(init_item_v7));
+ truly_spi_write(0xe3, init_item_v8, sizeof(init_item_v8));
+ truly_spi_write(0x3a, init_item_v9, sizeof(init_item_v9));
+ truly_spi_write(0xe0, init_item_v10, sizeof(init_item_v10));
+ truly_spi_write(0x36, init_item_v11, sizeof(init_item_v11));
+ truly_spi_write(0x11, NULL, 0);
+ msleep(150);
+ truly_spi_write(0x29, NULL, 0);
+ msleep(25);
+
+ truly_state.display_on = TRUE;
+ }
+}
+
+static int lcdc_truly_panel_on(struct platform_device *pdev)
+{
+ /* Configure reset GPIO that drives DAC */
+ if (lcdc_truly_pdata->panel_config_gpio)
+ lcdc_truly_pdata->panel_config_gpio(1);
+ gpio_set_value_cansleep(gpio_display_reset, 1);
+ truly_disp_powerup();
+ truly_disp_reginit();
+ truly_state.disp_initialized = TRUE;
+ return 0;
+}
+
+static int lcdc_truly_panel_off(struct platform_device *pdev)
+{
+ if (truly_state.disp_powered_up && truly_state.display_on) {
+ /* Main panel power off (Pull down reset) */
+ gpio_set_value_cansleep(gpio_display_reset, 0);
+ truly_state.display_on = FALSE;
+ truly_state.disp_initialized = FALSE;
+ }
+ return 0;
+}
+
+static void lcdc_truly_set_backlight(struct msm_fb_data_type *mfd)
+{
+ int step = 0, i = 0;
+ unsigned long flags;
+ int bl_level = mfd->bl_level;
+
+ /* real backlight level, 1 - max, 16 - min, 17 - off */
+ bl_level = 17 - bl_level;
+
+ if (bl_level > prev_bl) {
+ step = bl_level - prev_bl;
+ if (bl_level == 17)
+ step--;
+ } else if (bl_level < prev_bl) {
+ step = bl_level + 16 - prev_bl;
+ } else {
+ pr_info("%s: no change\n", __func__);
+ return;
+ }
+
+ if (bl_level == 17) {
+ /* turn off backlight */
+ gpio_set_value(gpio_backlight_en, 0);
+ } else {
+ local_irq_save(flags);
+
+ if (prev_bl == 17) {
+ /* turn on backlight */
+ gpio_set_value(gpio_backlight_en, 1);
+ udelay(30);
+ }
+
+ /* adjust backlight level */
+ for (i = 0; i < step; i++) {
+ gpio_set_value(gpio_backlight_en, 0);
+ udelay(1);
+ gpio_set_value(gpio_backlight_en, 1);
+ udelay(1);
+ }
+
+ local_irq_restore(flags);
+ }
+ msleep(20);
+ prev_bl = bl_level;
+
+ return;
+}
+
+static int __devinit truly_probe(struct platform_device *pdev)
+{
+
+ if (pdev->id == 0) {
+ lcdc_truly_pdata = pdev->dev.platform_data;
+
+ if (!lcdc_truly_pdata)
+ pr_err("%s pdata is null\n", __func__);
+
+ spi_pin_assign();
+ return 0;
+ }
+ msm_fb_add_device(pdev);
+
+ return 0;
+}
+
+static struct platform_driver this_driver = {
+ .probe = truly_probe,
+ .driver = {
+ .name = "lcdc_truly_hvga_ips3p2335_pt",
+ },
+};
+
+static struct msm_fb_panel_data truly_panel_data = {
+ .on = lcdc_truly_panel_on,
+ .off = lcdc_truly_panel_off,
+ .set_backlight = lcdc_truly_set_backlight,
+};
+
+static struct platform_device this_device = {
+ .name = "lcdc_truly_hvga_ips3p2335_pt",
+ .id = 1,
+ .dev = {
+ .platform_data = &truly_panel_data,
+ }
+};
+
+static int __init lcdc_truly_panel_init(void)
+{
+ int ret;
+ struct msm_panel_info *pinfo;
+
+ ret = msm_fb_detect_client("lcdc_truly_hvga_ips3p2335_pt");
+ if (ret)
+ return 0;
+
+ ret = platform_driver_register(&this_driver);
+ if (ret) {
+ pr_err("%s() driver registration failed", __func__);
+ return ret;
+ }
+
+ pinfo = &truly_panel_data.panel_info;
+ pinfo->xres = 320;
+ pinfo->yres = 480;
+ MSM_FB_SINGLE_MODE_PANEL(pinfo);
+ pinfo->type = LCDC_PANEL;
+ pinfo->pdest = DISPLAY_1;
+ pinfo->wait_cycle = 0;
+ pinfo->bpp = 18;
+ pinfo->fb_num = 2;
+ /* 10Mhz mdp_lcdc_pclk and mdp_lcdc_pad_pcl */
+ pinfo->clk_rate = 10240000;
+ pinfo->bl_max = 16;
+ pinfo->bl_min = 1;
+
+ pinfo->lcdc.h_back_porch = 16; /* hsw = 8 + hbp=16 */
+ pinfo->lcdc.h_front_porch = 4;
+ pinfo->lcdc.h_pulse_width = 8;
+ pinfo->lcdc.v_back_porch = 7; /* vsw=1 + vbp = 7 */
+ pinfo->lcdc.v_front_porch = 3;
+ pinfo->lcdc.v_pulse_width = 1;
+ pinfo->lcdc.border_clr = 0; /* blk */
+ pinfo->lcdc.underflow_clr = 0xff; /* blue */
+ pinfo->lcdc.hsync_skew = 0;
+
+ ret = platform_device_register(&this_device);
+ if (ret) {
+ pr_err("%s not able to register the device\n", __func__);
+ platform_driver_unregister(&this_driver);
+ }
+ return ret;
+}
+
+device_initcall(lcdc_truly_panel_init);
diff --git a/sound/soc/msm/msm-pcm-lpa.c b/sound/soc/msm/msm-pcm-lpa.c
index 1acb57f..575839d6 100644
--- a/sound/soc/msm/msm-pcm-lpa.c
+++ b/sound/soc/msm/msm-pcm-lpa.c
@@ -94,6 +94,8 @@
pr_debug("ASM_DATA_EVENT_WRITE_DONE\n");
pr_debug("Buffer Consumed = 0x%08x\n", *ptrmem);
prtd->pcm_irq_pos += prtd->pcm_count;
+ if (prtd->pcm_irq_pos >= prtd->pcm_size)
+ prtd->pcm_irq_pos = 0;
if (atomic_read(&prtd->start))
snd_pcm_period_elapsed(substream);
else
@@ -415,8 +417,6 @@
struct snd_pcm_runtime *runtime = substream->runtime;
struct msm_audio *prtd = runtime->private_data;
- if (prtd->pcm_irq_pos >= prtd->pcm_size)
- prtd->pcm_irq_pos = 0;
pr_debug("%s: pcm_irq_pos = %d\n", __func__, prtd->pcm_irq_pos);
return bytes_to_frames(runtime, (prtd->pcm_irq_pos));
}