Merge "defconfig: 8610: add config to mark XPU violations as fatal errors"
diff --git a/Documentation/devicetree/bindings/input/misc/cm36283.txt b/Documentation/devicetree/bindings/input/misc/cm36283.txt
new file mode 100644
index 0000000..b5ee7d9
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/misc/cm36283.txt
@@ -0,0 +1,40 @@
+Capella cm36283 L/P sensor
+
+Required properties:
+
+ - compatible : Should be "capella,cm36283".
+ - reg : i2c slave address of the device.
+ - interrupt-parent : Parent of interrupt.
+ - interrupts : L/P sample interrupt to indicate new data ready.
+ - vdd-supply : Power supply needed to power up the device.
+ - vio-supply : IO power supply needed for IO and I2C.
+ - capella,interrupt-gpio : The gpio pin for the interrupt.
+ - capella,levels : The adc value for light sensor to trigger different light level.
+ - capella,ps_close_thd_set : The threshold adc value for proximity sensor to trigger close interrupt.
+ - capella,ps_away_thd_set: The threshold adc value for proximity sensor to trigger away interrupt.
+ - capella,ls_cmd : The initial value to configure cm36283 ALS_CONF register.
+ - capella,ps_conf1_val : The initial value to configure cm36283 PS_CONF1 register.
+ - capella,ps_conf3_val : The initial value to configure cm36283 PS_CONF3 register.
+
+Optional properties:
+
+ - capella,use-polling : Property to specify if using polling instead of interrupt for adc value report.
+
+Example:
+
+ capella@60 {
+ compatible = "capella,cm36283";
+ reg = <0x60>;
+ interrupt-parent = <&msmgpio>;
+ interrupts = <80 0x2>;
+ vdd-supply = <&pm8110_l19>;
+ vio-supply = <&pm8110_l14>;
+ capella,use-polling;
+ capella,interrupt-gpio = <80>;
+ capella,levels = <0x0A 0xA0 0xE1 0x140 0x280 0x500 0xA28 0x16A8 0x1F40 0x2800>;
+ capella,ps_close_thd_set = <0xa>;
+ capella,ps_away_thd_set = <0x5>;
+ capella,ls_cmd = <0x44>; /* PS_IT=160ms, INT_PERS=2*/
+ capella,ps_conf1_val = <0x0006>; /*CM36283_PS_ITB_1_2 | CM36283_PS_DR_1_40| CM36283_PS_IT_1T | CM36283_PS_PERS_2 | CM36283_PS_RES_1*/
+ capella,ps_conf3_val = <0x3010>; /* CM36283_PS_MS_NORMAL | CM36283_PS_PROL_255 | CM36283_PS_SMART_PERS_ENABLE, */
+ };
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 8827983..9fd3afe 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -9,6 +9,7 @@
arm ARM Ltd.
atmel Atmel Corporation
bosch Bosch Sensortec GmbH
+capella Capella Microsystems, Inc.
cavium Cavium, Inc.
chrp Common Hardware Reference Platform
cortina Cortina Systems, Inc.
diff --git a/arch/arm/boot/dts/msm8226-camera-sensor-qrd.dtsi b/arch/arm/boot/dts/msm8226-camera-sensor-qrd.dtsi
index 5822a4a..3eacef2 100644
--- a/arch/arm/boot/dts/msm8226-camera-sensor-qrd.dtsi
+++ b/arch/arm/boot/dts/msm8226-camera-sensor-qrd.dtsi
@@ -150,6 +150,108 @@
qcom,cci-master = <0>;
};
+ eeprom1: qcom,eeprom@18{
+ cell-index = <1>;
+ reg = <0x18 0x0>;
+ qcom,eeprom-name = "sunny_p12v01m";
+ compatible = "qcom,eeprom";
+ qcom,slave-addr = <0x20>;
+ qcom,cci-master = <0>;
+ qcom,num-blocks = <16>;
+ qcom,page0 = <1 0x0100 2 0x01 1 1>;
+ qcom,poll0 = <0 0x0 2 0 1 1>;
+ qcom,mem0 = <0 0x0 2 0 1 0>;
+ qcom,page1 = <1 0x3d84 2 0xc1 1 1>;
+ qcom,pageen1 = <1 0x3d81 2 0x01 1 10>;
+ qcom,poll1 = <0 0x0 2 0 1 1>;
+ qcom,mem1 = <16 0x3d00 2 0 1 0>;
+ qcom,page2 = <1 0x3d84 2 0xc2 1 1>;
+ qcom,pageen2 = <1 0x3d81 2 0x01 1 10>;
+ qcom,poll2 = <0 0x0 2 0 1 1>;
+ qcom,mem2 = <16 0x3d00 2 0 1 0>;
+ qcom,page3 = <1 0x3d84 2 0xc3 1 1>;
+ qcom,pageen3 = <1 0x3d81 2 0x01 1 10>;
+ qcom,poll3 = <0 0x0 2 0 1 1>;
+ qcom,mem3 = <16 0x3d00 2 0 1 0>;
+ qcom,page4 = <1 0x3d84 2 0xc4 1 1>;
+ qcom,pageen4 = <1 0x3d81 2 0x01 1 10>;
+ qcom,poll4 = <0 0x0 2 0 1 1>;
+ qcom,mem4 = <16 0x3d00 2 0 1 0>;
+ qcom,page5 = <1 0x3d84 2 0xc5 1 1>;
+ qcom,pageen5 = <1 0x3d81 2 0x01 1 10>;
+ qcom,poll5 = <0 0x0 2 0 1 1>;
+ qcom,mem5 = <16 0x3d00 2 0 1 0>;
+ qcom,page6 = <1 0x3d84 2 0xc6 1 1>;
+ qcom,pageen6 = <1 0x3d81 2 0x01 1 10>;
+ qcom,poll6 = <0 0x0 2 0 1 1>;
+ qcom,mem6 = <16 0x3d00 2 0 1 0>;
+ qcom,page7 = <1 0x3d84 2 0xc7 1 1>;
+ qcom,pageen7 = <1 0x3d81 2 0x01 1 10>;
+ qcom,poll7 = <0 0x0 2 0 1 1>;
+ qcom,mem7 = <16 0x3d00 2 0 1 0>;
+ qcom,page8 = <1 0x3d84 2 0xc8 1 1>;
+ qcom,pageen8 = <1 0x3d81 2 0x01 1 10>;
+ qcom,poll8 = <0 0x0 2 0 1 1>;
+ qcom,mem8 = <16 0x3d00 2 0 1 0>;
+ qcom,page9 = <1 0x3d84 2 0xc9 1 1>;
+ qcom,pageen9 = <1 0x3d81 2 0x01 1 10>;
+ qcom,poll9 = <0 0x0 2 0 1 1>;
+ qcom,mem9 = <16 0x3d00 2 0 1 0>;
+ qcom,page10 = <1 0x3d84 2 0xca 1 1>;
+ qcom,pageen10 = <1 0x3d81 2 0x01 1 10>;
+ qcom,poll10 = <0 0x0 2 0 1 1>;
+ qcom,mem10 = <16 0x3d00 2 0 1 0>;
+ qcom,page11 = <1 0x3d84 2 0xcb 1 1>;
+ qcom,pageen11 = <1 0x3d81 2 0x01 1 10>;
+ qcom,poll11 = <0 0x0 2 0 1 1>;
+ qcom,mem11 = <16 0x3d00 2 0 1 0>;
+ qcom,page12 = <1 0x3d84 2 0xcc 1 1>;
+ qcom,pageen12 = <1 0x3d81 2 0x01 1 10>;
+ qcom,poll12 = <0 0x0 2 0 1 1>;
+ qcom,mem12 = <16 0x3d00 2 0 1 0>;
+ qcom,page13 = <1 0x3d84 2 0xcd 1 1>;
+ qcom,pageen13 = <1 0x3d81 2 0x01 1 10>;
+ qcom,poll13 = <0 0x0 2 0 1 1>;
+ qcom,mem13 = <16 0x3d00 2 0 1 0>;
+ qcom,page14 = <1 0x3d84 2 0xce 1 1>;
+ qcom,pageen14 = <1 0x3d81 2 0x01 1 10>;
+ qcom,poll14 = <0 0x0 2 0 1 1>;
+ qcom,mem14 = <16 0x3d00 2 0 1 0>;
+ qcom,page15 = <1 0x3d84 2 0xcf 1 1>;
+ qcom,pageen15 = <1 0x3d81 2 0x01 1 10>;
+ qcom,poll15 = <0 0x0 2 0 1 1>;
+ qcom,mem15 = <16 0x3d00 2 0 1 0>;
+ cam_vio-supply = <&pm8226_lvs1>;
+ cam_vana-supply = <&pm8226_l19>;
+ qcom,cam-vreg-name = "cam_vio", "cam_vana";
+ qcom,cam-vreg-type = <1 0>;
+ qcom,cam-vreg-min-voltage = <0 2850000>;
+ qcom,cam-vreg-max-voltage = <0 2850000>;
+ qcom,cam-vreg-op-mode = <0 80000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 26 0>,
+ <&msmgpio 37 0>,
+ <&msmgpio 36 0>,
+ <&msmgpio 22 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-vdig = <3>;
+ qcom,gpio-req-tbl-num = <0 1 2 3>;
+ qcom,gpio-req-tbl-flags = <1 0 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY",
+ "CAM_VDIG";
+ qcom,cam-power-seq-type = "sensor_vreg",
+ "sensor_vreg", "sensor_gpio",
+ "sensor_gpio", "sensor_gpio" , "sensor_clk";
+ qcom,cam-power-seq-val = "cam_vio", "cam_vana","sensor_gpio_vdig",
+ "sensor_gpio_reset",
+ "sensor_gpio_standby","sensor_cam_mclk" ;
+ qcom,cam-power-seq-cfg-val = <1 1 1 1 1 24000000>;
+ qcom,cam-power-seq-delay = <1 1 10 10 10 5>;
+ };
+
qcom,camera@6c {
compatible = "qcom,ov12830";
reg = <0x6c>;
@@ -158,7 +260,8 @@
qcom,csid-sd-index = <0>;
qcom,actuator-src = <&actuator1>;
qcom,led-flash-src = <&led_flash0>;
- qcom,mount-angle = <270>;
+ qcom,eeprom-src = <&eeprom1>;
+ qcom,mount-angle = <90>;
qcom,sensor-name = "skuf_ov12830_p12v01c";
cam_vdig-supply = <&pm8226_l5>;
cam_vana-supply = <&pm8226_l19>;
@@ -232,12 +335,79 @@
status = "ok";
};
+ eeprom2: qcom,eeprom@6b{
+ cell-index = <2>;
+ reg = <0x6b 0x0>;
+ qcom,eeprom-name = "sunny_p5v23c";
+ compatible = "qcom,eeprom";
+ qcom,slave-addr = <0x6c>;
+ qcom,cci-master = <0>;
+ qcom,num-blocks = <7>;
+
+ qcom,page0 = <1 0x0100 2 0x01 1 1>;
+ qcom,poll0 = <0 0x0 2 0 1 1>;
+ qcom,mem0 = <0 0x0 2 0 1 0>;
+
+ qcom,page1 = <1 0x3d84 2 0xc0 1 1>;
+ qcom,poll1 = <0 0x0 2 0 1 1>;
+ qcom,mem1 = <0 0x0 2 0 1 0>;
+ qcom,page2 = <1 0x3d85 2 0x00 1 1>;
+ qcom,poll2 = <0 0x0 2 0 1 1>;
+ qcom,mem2 = <0 0x0 2 0 1 0>;
+ qcom,page3 = <1 0x3d86 2 0x0f 1 1>;
+ qcom,pageen3 = <1 0x3d81 2 0x01 1 10>;
+ qcom,poll3 = <0 0x0 2 0 1 1>;
+ qcom,mem3 = <16 0x3d00 2 0 1 0>;
+
+ qcom,page4 = <1 0x3d84 2 0xc0 1 1>;
+ qcom,poll4 = <0 0x0 2 0 1 1>;
+ qcom,mem4 = <0 0x0 2 0 1 0>;
+ qcom,page5 = <1 0x3d85 2 0x10 1 1>;
+ qcom,poll5 = <0 0x0 2 0 1 1>;
+ qcom,mem5 = <0 0x0 2 0 1 0>;
+ qcom,page6 = <1 0x3d86 2 0x1f 1 1>;
+ qcom,pageen6 = <1 0x3d81 2 0x01 1 10>;
+ qcom,poll6 = <0 0x0 2 0 1 1>;
+ qcom,mem6 = <16 0x3d00 2 0 1 0>;
+
+ cam_vio-supply = <&pm8226_lvs1>;
+ cam_vana-supply = <&pm8226_l19>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";
+ qcom,cam-vreg-type = <0 1 0>;
+ qcom,cam-vreg-min-voltage = <1200000 0 2850000>;
+ qcom,cam-vreg-max-voltage = <1200000 0 2850000>;
+ qcom,cam-vreg-op-mode = <200000 0 80000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 26 0>,
+ <&msmgpio 28 0>,
+ <&msmgpio 35 0>,
+ <&msmgpio 21 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-vdig = <3>;
+ qcom,gpio-req-tbl-num = <0 1 2 3>;
+ qcom,gpio-req-tbl-flags = <1 0 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET",
+ "CAM_STANDBY",
+ "CAM_VDIG";
+ qcom,cam-power-seq-type = "sensor_vreg",
+ "sensor_vreg", "sensor_gpio",
+ "sensor_gpio", "sensor_gpio" , "sensor_clk";
+ qcom,cam-power-seq-val = "cam_vio", "cam_vana","sensor_gpio_vdig",
+ "sensor_gpio_reset",
+ "sensor_gpio_standby","sensor_cam_mclk" ;
+ qcom,cam-power-seq-cfg-val = <1 1 1 1 1 24000000>;
+ qcom,cam-power-seq-delay = <1 1 10 10 10 5>;
+ };
+
qcom,camera@6a {
compatible = "qcom,ov5648";
reg = <0x6a>;
qcom,slave-id = <0x6c 0x300a 0x5648>;
qcom,csiphy-sd-index = <1>;
qcom,csid-sd-index = <1>;
+ qcom,eeprom-src = <&eeprom2>;
qcom,mount-angle = <270>;
qcom,sensor-name = "skuf_ov5648_p5v23c";
cam_vdig-supply = <&pm8226_l5>;
@@ -267,7 +437,7 @@
qcom,gpio-set-tbl-delay = <1000 4000>;
qcom,csi-lane-assign = <0x4320>;
qcom,csi-lane-mask = <0x3>;
- qcom,sensor-position = <0>;
+ qcom,sensor-position = <1>;
qcom,sensor-mode = <1>;
qcom,cci-master = <0>;
status = "ok";
diff --git a/arch/arm/boot/dts/msm8226-camera.dtsi b/arch/arm/boot/dts/msm8226-camera.dtsi
index 23ee20d..4987dae 100644
--- a/arch/arm/boot/dts/msm8226-camera.dtsi
+++ b/arch/arm/boot/dts/msm8226-camera.dtsi
@@ -104,7 +104,7 @@
compatible = "qcom,cpp";
reg = <0xfda04000 0x100>,
<0xfda40000 0x200>,
- <0xfda18000 0x008>;
+ <0xfda18000 0x018>;
reg-names = "cpp", "cpp_vbif", "cpp_hw";
interrupts = <0 49 0>;
interrupt-names = "cpp";
diff --git a/arch/arm/boot/dts/msm8226-v1-pm.dtsi b/arch/arm/boot/dts/msm8226-v1-pm.dtsi
index 97b75c4..dcf46e6 100644
--- a/arch/arm/boot/dts/msm8226-v1-pm.dtsi
+++ b/arch/arm/boot/dts/msm8226-v1-pm.dtsi
@@ -168,12 +168,32 @@
<53 104>, /* mdss_irq */
<62 222>, /* ee0_krait_hlos_spmi_periph_irq */
<2 216>, /* tsens_upper_lower_int */
+ <0xff 18>, /* APC_qgicQTmrSecPhysIrptReq */
+ <0xff 19>, /* APC_qgicQTmrNonSecPhysIrptReq */
+ <0xff 35>, /* WDT_barkInt */
+ <0xff 40>, /* qtmr_phy_irq[0] */
+ <0xff 47>, /* rbif_irq[0] */
<0xff 56>, /* q6_wdog_expired_irq */
<0xff 57>, /* mss_to_apps_irq(0) */
<0xff 58>, /* mss_to_apps_irq(1) */
<0xff 59>, /* mss_to_apps_irq(2) */
<0xff 60>, /* mss_to_apps_irq(3) */
<0xff 61>, /* mss_a2_bam_irq */
+ <0xff 65>, /* o_gc_sys_irq[0] */
+ <0xff 74>, /* venus0_mmu_cirpt[1] */
+ <0xff 75>, /* venus0_mmu_cirpt[0] */
+ <0xff 78>, /* mdss_mmu_cirpt[0] */
+ <0xff 79>, /* mdss_mmu_cirpt[1] */
+ <0xff 97>, /* camss_vfe_mmu_cirpt[1] */
+ <0xff 102>, /* camss_jpeg_mmu_cirpt[1] */
+ <0xff 109>, /* ocmem_dm_nonsec_irq */
+ <0xff 131>, /* blsp1_qup_5_irq */
+ <0xff 141>, /* blsp1_uart_3_irq */
+ <0xff 155>, /* sdc1_irq(0) */
+ <0xff 157>, /* sdc2_irq(0) */
+ <0xff 161>, /* lpass_irq_out_spare[4] */
+ <0xff 162>, /* lpass_irq_out_spare[5]*/
+ <0xff 170>, /* sdc1_pwr_cmd_irq */
<0xff 173>, /* o_wcss_apss_smd_hi */
<0xff 174>, /* o_wcss_apss_smd_med */
<0xff 175>, /* o_wcss_apss_smd_low */
@@ -187,9 +207,7 @@
<0xff 190>, /* lpass_irq_out_apcs(2) */
<0xff 191>, /* lpass_irq_out_apcs(3) */
<0xff 192>, /* lpass_irq_out_apcs(4) */
- <0xff 194>, /* lpass_irq_out_apcs[6] */
- <0xff 195>, /* lpass_irq_out_apcs[7] */
- <0xff 196>, /* lpass_irq_out_apcs[8] */
+ <0xff 194>, /* lpass_irq_out_apcs(6) */
<0xff 200>, /* rpm_ipc(4) */
<0xff 201>, /* rpm_ipc(5) */
<0xff 202>, /* rpm_ipc(6) */
@@ -198,12 +216,16 @@
<0xff 205>, /* rpm_ipc(25) */
<0xff 206>, /* rpm_ipc(26) */
<0xff 207>, /* rpm_ipc(27) */
+ <0xff 234>, /* lpass_irq_out_spare[6]*/
+ <0xff 235>, /* lpass_irq_out_spare[7]*/
+ <0xff 240>, /* summary_irq_kpss */
+ <0xff 253>, /* sdc2_pwr_cmd_irq */
<0xff 258>, /* rpm_ipc(28) */
<0xff 259>, /* rpm_ipc(29) */
- <0xff 275>, /* rpm_ipc(30) */
- <0xff 276>, /* rpm_ipc(31) */
<0xff 269>, /* rpm_wdog_expired_irq */
- <0xff 240>; /* summary_irq_kpss */
+ <0xff 270>, /* blsp1_bam_irq[0] */
+ <0xff 275>, /* rpm_ipc(30) */
+ <0xff 276>; /* rpm_ipc(31) */
qcom,gpio-parent = <&msmgpio>;
qcom,gpio-map = <3 1>,
diff --git a/arch/arm/boot/dts/msm8226-v2-pm.dtsi b/arch/arm/boot/dts/msm8226-v2-pm.dtsi
index 92b204e..9ee47e2 100644
--- a/arch/arm/boot/dts/msm8226-v2-pm.dtsi
+++ b/arch/arm/boot/dts/msm8226-v2-pm.dtsi
@@ -170,12 +170,32 @@
<53 104>, /* mdss_irq */
<62 222>, /* ee0_krait_hlos_spmi_periph_irq */
<2 216>, /* tsens_upper_lower_int */
+ <0xff 18>, /* APC_qgicQTmrSecPhysIrptReq */
+ <0xff 19>, /* APC_qgicQTmrNonSecPhysIrptReq */
+ <0xff 35>, /* WDT_barkInt */
+ <0xff 40>, /* qtmr_phy_irq[0] */
+ <0xff 47>, /* rbif_irq[0] */
<0xff 56>, /* q6_wdog_expired_irq */
<0xff 57>, /* mss_to_apps_irq(0) */
<0xff 58>, /* mss_to_apps_irq(1) */
<0xff 59>, /* mss_to_apps_irq(2) */
<0xff 60>, /* mss_to_apps_irq(3) */
<0xff 61>, /* mss_a2_bam_irq */
+ <0xff 65>, /* o_gc_sys_irq[0] */
+ <0xff 74>, /* venus0_mmu_cirpt[1] */
+ <0xff 75>, /* venus0_mmu_cirpt[0] */
+ <0xff 78>, /* mdss_mmu_cirpt[0] */
+ <0xff 79>, /* mdss_mmu_cirpt[1] */
+ <0xff 97>, /* camss_vfe_mmu_cirpt[1] */
+ <0xff 102>, /* camss_jpeg_mmu_cirpt[1] */
+ <0xff 109>, /* ocmem_dm_nonsec_irq */
+ <0xff 131>, /* blsp1_qup_5_irq */
+ <0xff 141>, /* blsp1_uart_3_irq */
+ <0xff 155>, /* sdc1_irq(0) */
+ <0xff 157>, /* sdc2_irq(0) */
+ <0xff 161>, /* lpass_irq_out_spare[4] */
+ <0xff 162>, /* lpass_irq_out_spare[5]*/
+ <0xff 170>, /* sdc1_pwr_cmd_irq */
<0xff 173>, /* o_wcss_apss_smd_hi */
<0xff 174>, /* o_wcss_apss_smd_med */
<0xff 175>, /* o_wcss_apss_smd_low */
@@ -189,9 +209,7 @@
<0xff 190>, /* lpass_irq_out_apcs(2) */
<0xff 191>, /* lpass_irq_out_apcs(3) */
<0xff 192>, /* lpass_irq_out_apcs(4) */
- <0xff 194>, /* lpass_irq_out_apcs[6] */
- <0xff 195>, /* lpass_irq_out_apcs[7] */
- <0xff 196>, /* lpass_irq_out_apcs[8] */
+ <0xff 194>, /* lpass_irq_out_apcs(6) */
<0xff 200>, /* rpm_ipc(4) */
<0xff 201>, /* rpm_ipc(5) */
<0xff 202>, /* rpm_ipc(6) */
@@ -200,12 +218,16 @@
<0xff 205>, /* rpm_ipc(25) */
<0xff 206>, /* rpm_ipc(26) */
<0xff 207>, /* rpm_ipc(27) */
+ <0xff 234>, /* lpass_irq_out_spare[6]*/
+ <0xff 235>, /* lpass_irq_out_spare[7]*/
+ <0xff 240>, /* summary_irq_kpss */
+ <0xff 253>, /* sdc2_pwr_cmd_irq */
<0xff 258>, /* rpm_ipc(28) */
<0xff 259>, /* rpm_ipc(29) */
- <0xff 275>, /* rpm_ipc(30) */
- <0xff 276>, /* rpm_ipc(31) */
<0xff 269>, /* rpm_wdog_expired_irq */
- <0xff 240>; /* summary_irq_kpss */
+ <0xff 270>, /* blsp1_bam_irq[0] */
+ <0xff 275>, /* rpm_ipc(30) */
+ <0xff 276>; /* rpm_ipc(31) */
qcom,gpio-parent = <&msmgpio>;
qcom,gpio-map = <3 1>,
diff --git a/arch/arm/boot/dts/msm8610-mtp.dtsi b/arch/arm/boot/dts/msm8610-mtp.dtsi
index 7e80d19..8ed6ae2 100644
--- a/arch/arm/boot/dts/msm8610-mtp.dtsi
+++ b/arch/arm/boot/dts/msm8610-mtp.dtsi
@@ -114,6 +114,23 @@
fsl,irq-gpio = <&msmgpio 81 0x00>;
fsl,sensors-position = <5>;
};
+ capella@60 {
+ compatible = "capella,cm36283";
+ reg = <0x60>;
+ interrupt-parent = <&msmgpio>;
+ interrupts = <80 0x2>;
+ vdd-supply = <&pm8110_l19>;
+ vio-supply = <&pm8110_l14>;
+ capella,use-polling;
+ capella,interrupt-gpio = <&msmgpio 80 0x2>;
+ capella,levels = <0x0A 0xA0 0xE1 0x140 0x280 0x500 0xA28 0x16A8 0x1F40
+ 0x2800>;
+ capella,ps_close_thd_set = <0xa>;
+ capella,ps_away_thd_set = <0x5>;
+ capella,ls_cmd = <0x44>; /* PS_IT=160ms, INT_PERS=2*/
+ capella,ps_conf1_val = <0x0006>;
+ capella,ps_conf3_val = <0x3010>;
+ };
};
gen-vkeys {
diff --git a/arch/arm/boot/dts/msm8610-qrd-skuaa.dtsi b/arch/arm/boot/dts/msm8610-qrd-skuaa.dtsi
new file mode 100644
index 0000000..b1b47d8
--- /dev/null
+++ b/arch/arm/boot/dts/msm8610-qrd-skuaa.dtsi
@@ -0,0 +1,59 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/include/ "msm8610-qrd.dtsi"
+
+&soc {
+ sound {
+ qcom,model = "msm8x10-skuaa-snd-card";
+
+ qcom,audio-routing =
+ "RX_BIAS", "MCLK",
+ "INT_LDO_H", "MCLK",
+ "Lineout amp", "LINEOUT",
+ "MIC BIAS Internal1", "Handset Mic",
+ "MIC BIAS Internal2", "Headset Mic",
+ "AMIC1", "MIC BIAS Internal1",
+ "AMIC2", "MIC BIAS Internal2";
+
+ qcom,ext-spk-amp-gpio = <&msmgpio 92 0x0>;
+ };
+
+ qcom,dsi_v2_hx8379a_wvga_video {
+ qcom,cont-splash-enabled;
+ };
+};
+
+/ {
+ qrd_batterydata: qcom,battery-data {
+ qcom,rpull-up-kohm = <100>;
+ qcom,vref-batt-therm = <1800000>;
+
+ /include/ "batterydata-qrd-4v2-1300mah.dtsi"
+ };
+};
+
+&pm8110_bms {
+ status = "ok";
+ qcom,battery-data = <&qrd_batterydata>;
+};
+
+&pm8110_chg {
+ qcom,battery-data = <&qrd_batterydata>;
+};
+
+&pm8110_vadc {
+ chan@30 {
+ label = "batt_therm";
+ qcom,scale-function = <7>;
+ };
+};
diff --git a/arch/arm/boot/dts/msm8610-qrd-skuab.dtsi b/arch/arm/boot/dts/msm8610-qrd-skuab.dtsi
new file mode 100644
index 0000000..649bc71
--- /dev/null
+++ b/arch/arm/boot/dts/msm8610-qrd-skuab.dtsi
@@ -0,0 +1,114 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/include/ "msm8610-qrd.dtsi"
+
+&soc {
+ sound {
+ qcom,model = "msm8x10-skuab-snd-card";
+
+ qcom,audio-routing =
+ "RX_BIAS", "MCLK",
+ "INT_LDO_H", "MCLK",
+ "Lineout amp", "LINEOUT",
+ "MIC BIAS Internal1", "Handset Mic",
+ "MIC BIAS Internal2", "Headset Mic",
+ "AMIC1", "MIC BIAS Internal1",
+ "AMIC2", "MIC BIAS Internal2";
+
+ qcom,ext-spk-amp-gpio = <&msmgpio 92 0x0>;
+ };
+ i2c@f9923000{
+ focaltech@38{
+ compatible = "focaltech,5x06";
+ reg = <0x38>;
+ interrupt-parent = <&msmgpio>;
+ interrupts = <1 0x2>;
+ vdd-supply = <&pm8110_l19>;
+ vcc_i2c-supply = <&pm8110_l14>;
+ focaltech,family-id = <0x06>;
+ focaltech,reset-gpio = <&msmgpio 0 0x00>;
+ focaltech,irq-gpio = <&msmgpio 1 0x00>;
+ focaltech,display-coords = <0 0 480 854>;
+ focaltech,panel-coords = <0 0 480 946>;
+ focaltech,button-map= <139 102 158>;
+ focaltech,no-force-update;
+ focaltech,i2c-pull-up;
+ };
+ };
+ gen-vkeys {
+ compatible = "qcom,gen-vkeys";
+ label = "ft5x06_ts";
+ qcom,disp-maxx = <480>;
+ qcom,disp-maxy = <854>;
+ qcom,panel-maxx = <481>;
+ qcom,panel-maxy = <946>;
+ qcom,key-codes = <139 102 158>;
+ qcom,y-offset = <0>;
+ };
+ i2c@f9925000 {
+ fsl@1c {
+ compatible = "fsl,mma8x5x";
+ reg = <0x1c>;
+ interrupt-parent = <&msmgpio>;
+ interrupts = <81 0x2>;
+ vdd-supply = <&pm8110_l19>;
+ vio-supply = <&pm8110_l14>;
+ fsl,irq-gpio = <&msmgpio 81 0x00>;
+ fsl,sensors-position = <1>;
+ };
+ stk@48 {
+ compatible = "stk,stk3x1x";
+ reg = <0x48>;
+ interrupt-parent = <&msmgpio>;
+ interrupts = <80 0x2>;
+ vdd-supply = <&pm8110_l19>;
+ vio-supply = <&pm8110_l14>;
+ stk,irq-gpio = <&msmgpio 80 0x02>;
+ stk,transmittance = <340>;
+ stk,state-reg = <0x00>;
+ stk,psctrl-reg = <0x71>;
+ stk,alsctrl-reg = <0x38>;
+ stk,ledctrl-reg = <0xFF>;
+ stk,wait-reg = <0x07>;
+ stk,ps-thdh = <150>;
+ stk,ps-thdl = <100>;
+ };
+ };
+
+ usb@f9a55000 {
+ qcom,hsusb-otg-phy-init-seq =
+ <0x44 0x80 0x6a 0x81 0x34 0x82 0x23 0x83 0xffffffff>;
+ };
+
+ qcom,dsi_v2_otm8018b_fwvga_video {
+ qcom,cont-splash-enabled;
+ };
+};
+
+/ {
+ qrd_batterydata: qcom,battery-data {
+ qcom,rpull-up-kohm = <100>;
+ qcom,vref-batt-therm = <1800000>;
+
+ /include/ "batterydata-qrd-4v2-1800mah.dtsi"
+ };
+};
+
+&pm8110_bms {
+ status = "ok";
+ qcom,battery-data = <&qrd_batterydata>;
+};
+
+&pm8110_chg {
+ qcom,battery-data = <&qrd_batterydata>;
+};
diff --git a/arch/arm/boot/dts/msm8610-v1-pm.dtsi b/arch/arm/boot/dts/msm8610-v1-pm.dtsi
index ded517f..bd0aa0f 100644
--- a/arch/arm/boot/dts/msm8610-v1-pm.dtsi
+++ b/arch/arm/boot/dts/msm8610-v1-pm.dtsi
@@ -24,7 +24,7 @@
qcom,saw2-spm-cmd-wfi = [60 03 60 0b 0f];
qcom,saw2-spm-cmd-spc = [20 10 80 30 90 5b 60 03 60 3b 76 76
0b 94 5b 80 10 26 30 0f];
- qcom,saw2-spm-cmd-pc = [20 10 80 30 90 5b 60 03 60 3b 76 76
+ qcom,saw2-spm-cmd-pc = [20 10 80 30 90 5b 60 07 60 3b 76 76
0b 94 5b 80 10 26 30 0f];
};
@@ -41,7 +41,7 @@
qcom,saw2-spm-cmd-wfi = [60 03 60 0b 0f];
qcom,saw2-spm-cmd-spc = [20 10 80 30 90 5b 60 03 60 3b 76 76
0b 94 5b 80 10 26 30 0f];
- qcom,saw2-spm-cmd-pc = [20 10 80 30 90 5b 60 03 60 3b 76 76
+ qcom,saw2-spm-cmd-pc = [20 10 80 30 90 5b 60 07 60 3b 76 76
0b 94 5b 80 10 26 30 0f];
};
@@ -58,7 +58,7 @@
qcom,saw2-spm-cmd-wfi = [60 03 60 0b 0f];
qcom,saw2-spm-cmd-spc = [00 20 10 80 30 90 5b 60 03 60 3b 76 76
0b 94 5b 80 10 06 26 30 0f];
- qcom,saw2-spm-cmd-pc = [00 20 10 80 30 90 5b 60 03 60 3b 76 76
+ qcom,saw2-spm-cmd-pc = [00 20 10 80 30 90 5b 60 07 60 3b 76 76
0b 94 5b 80 10 06 26 30 0f];
};
@@ -75,7 +75,7 @@
qcom,saw2-spm-cmd-wfi = [60 03 60 0b 0f];
qcom,saw2-spm-cmd-spc = [20 10 80 30 90 5b 60 03 60 3b 76 76
0b 94 5b 80 10 26 30 0f];
- qcom,saw2-spm-cmd-pc = [20 10 80 30 90 5b 60 03 60 3b 76 76
+ qcom,saw2-spm-cmd-pc = [20 10 80 30 90 5b 60 07 60 3b 76 76
0b 94 5b 80 10 26 30 0f];
};
diff --git a/arch/arm/boot/dts/msm8610-v1-qrd-skuaa.dts b/arch/arm/boot/dts/msm8610-v1-qrd-skuaa.dts
index 5abe5c0..ba53acc 100644
--- a/arch/arm/boot/dts/msm8610-v1-qrd-skuaa.dts
+++ b/arch/arm/boot/dts/msm8610-v1-qrd-skuaa.dts
@@ -13,43 +13,12 @@
/dts-v1/;
/include/ "msm8610-v1.dtsi"
-/include/ "msm8610-qrd.dtsi"
+/include/ "msm8610-qrd-skuaa.dtsi"
/include/ "dsi-v2-panel-hx8379a-wvga-video.dtsi"
/include/ "msm8610-qrd-camera-sensor.dtsi"
/ {
- model = "Qualcomm MSM 8610 QRD";
+ model = "Qualcomm MSM 8610v1 QRD SKUAA";
compatible = "qcom,msm8610-qrd", "qcom,msm8610", "qcom,qrd";
qcom,board-id = <11 1>, <11 0>;
- qcom,msm-id = <147 0>, <165 0>, <161 0>, <162 0>,
- <163 0>, <164 0>, <166 0>;
-};
-
-&soc {
- sound {
- qcom,model = "msm8x10-skuaa-snd-card";
-
- qcom,audio-routing =
- "RX_BIAS", "MCLK",
- "INT_LDO_H", "MCLK",
- "Lineout amp", "LINEOUT",
- "MIC BIAS Internal1", "Handset Mic",
- "MIC BIAS Internal2", "Headset Mic",
- "AMIC1", "MIC BIAS Internal1",
- "AMIC2", "MIC BIAS Internal2";
-
- qcom,ext-spk-amp-gpio = <&msmgpio 92 0x0>;
- };
-};
-
-&pm8110_bms {
- status = "ok";
- qcom,batt-type = <5>;
-};
-
-&pm8110_vadc {
- chan@30 {
- label = "batt_therm";
- qcom,scale-function = <7>;
- };
};
diff --git a/arch/arm/boot/dts/msm8610-v1-qrd-skuab.dts b/arch/arm/boot/dts/msm8610-v1-qrd-skuab.dts
index d7a446d..5e19997 100644
--- a/arch/arm/boot/dts/msm8610-v1-qrd-skuab.dts
+++ b/arch/arm/boot/dts/msm8610-v1-qrd-skuab.dts
@@ -13,115 +13,12 @@
/dts-v1/;
/include/ "msm8610-v1.dtsi"
-/include/ "msm8610-qrd.dtsi"
+/include/ "msm8610-qrd-skuab.dtsi"
/include/ "dsi-v2-panel-otm8018b-fwvga-video.dtsi"
/include/ "msm8612-qrd-camera-sensor.dtsi"
/ {
- model = "Qualcomm MSM 8610 QRD";
+ model = "Qualcomm MSM 8610v1 QRD SKUAB";
compatible = "qcom,msm8610-qrd", "qcom,msm8610", "qcom,qrd";
qcom,board-id = <11 3>;
- qcom,msm-id = <147 0>, <165 0>, <161 0>, <162 0>,
- <163 0>, <164 0>, <166 0>;
-};
-
-&soc {
- sound {
- qcom,model = "msm8x10-skuab-snd-card";
-
- qcom,audio-routing =
- "RX_BIAS", "MCLK",
- "INT_LDO_H", "MCLK",
- "Lineout amp", "LINEOUT",
- "MIC BIAS Internal1", "Handset Mic",
- "MIC BIAS Internal2", "Headset Mic",
- "AMIC1", "MIC BIAS Internal1",
- "AMIC2", "MIC BIAS Internal2";
-
- qcom,ext-spk-amp-gpio = <&msmgpio 92 0x0>;
- };
- i2c@f9923000{
- focaltech@38{
- compatible = "focaltech,5x06";
- reg = <0x38>;
- interrupt-parent = <&msmgpio>;
- interrupts = <1 0x2>;
- vdd-supply = <&pm8110_l19>;
- vcc_i2c-supply = <&pm8110_l14>;
- focaltech,family-id = <0x06>;
- focaltech,reset-gpio = <&msmgpio 0 0x00>;
- focaltech,irq-gpio = <&msmgpio 1 0x00>;
- focaltech,display-coords = <0 0 480 854>;
- focaltech,panel-coords = <0 0 480 946>;
- focaltech,button-map= <139 102 158>;
- focaltech,no-force-update;
- focaltech,i2c-pull-up;
- };
- };
- gen-vkeys {
- compatible = "qcom,gen-vkeys";
- label = "ft5x06_ts";
- qcom,disp-maxx = <480>;
- qcom,disp-maxy = <854>;
- qcom,panel-maxx = <481>;
- qcom,panel-maxy = <946>;
- qcom,key-codes = <139 102 158>;
- qcom,y-offset = <0>;
- };
- i2c@f9925000 {
- fsl@1c {
- compatible = "fsl,mma8x5x";
- reg = <0x1c>;
- interrupt-parent = <&msmgpio>;
- interrupts = <81 0x2>;
- vdd-supply = <&pm8110_l19>;
- vio-supply = <&pm8110_l14>;
- fsl,irq-gpio = <&msmgpio 81 0x00>;
- fsl,sensors-position = <1>;
- };
- stk@48 {
- compatible = "stk,stk3x1x";
- reg = <0x48>;
- interrupt-parent = <&msmgpio>;
- interrupts = <80 0x2>;
- vdd-supply = <&pm8110_l19>;
- vio-supply = <&pm8110_l14>;
- stk,irq-gpio = <&msmgpio 80 0x02>;
- stk,transmittance = <100>;
- stk,state-reg = <0x00>;
- stk,psctrl-reg = <0x71>;
- stk,alsctrl-reg = <0x3e>;
- stk,ledctrl-reg = <0xFF>;
- stk,wait-reg = <0x07>;
- stk,ps-thdh = <150>;
- stk,ps-thdl = <100>;
- };
- };
-
- usb@f9a55000 {
- qcom,hsusb-otg-phy-init-seq =
- <0x44 0x80 0x6a 0x81 0x34 0x82 0x23 0x83 0xffffffff>;
- };
-
- qcom,dsi_v2_otm8018b_fwvga_video {
- status = "ok";
- };
-};
-
-/ {
- qrd_batterydata: qcom,battery-data {
- qcom,rpull-up-kohm = <100>;
- qcom,vref-batt-therm = <1800000>;
-
- /include/ "batterydata-qrd-4v2-1800mah.dtsi"
- };
-};
-
-&pm8110_bms {
- status = "ok";
- qcom,battery-data = <&qrd_batterydata>;
-};
-
-&pm8110_chg {
- qcom,battery-data = <&qrd_batterydata>;
};
diff --git a/arch/arm/boot/dts/msm8610-v1.dtsi b/arch/arm/boot/dts/msm8610-v1.dtsi
index 6050a75..9d8c411 100644
--- a/arch/arm/boot/dts/msm8610-v1.dtsi
+++ b/arch/arm/boot/dts/msm8610-v1.dtsi
@@ -18,3 +18,8 @@
/include/ "msm8610.dtsi"
/include/ "msm8610-v1-pm.dtsi"
+
+/ {
+ qcom,msm-id = <147 0>, <165 0>, <161 0>, <162 0>,
+ <163 0>, <164 0>, <166 0>;
+};
diff --git a/arch/arm/boot/dts/msm8610-v2-pm.dtsi b/arch/arm/boot/dts/msm8610-v2-pm.dtsi
index 68841bc..dba3da4 100644
--- a/arch/arm/boot/dts/msm8610-v2-pm.dtsi
+++ b/arch/arm/boot/dts/msm8610-v2-pm.dtsi
@@ -24,7 +24,7 @@
qcom,saw2-spm-cmd-wfi = [60 03 60 0b 0f];
qcom,saw2-spm-cmd-spc = [20 10 80 30 90 5b 60 03 60 3b 76 76
0b 94 5b 80 10 26 30 0f];
- qcom,saw2-spm-cmd-pc = [20 10 80 30 90 5b 60 07 60 3b 76 76
+ qcom,saw2-spm-cmd-pc = [20 10 80 30 90 5b 60 03 60 3b 76 76
0b 94 5b 80 10 26 30 0f];
};
@@ -41,7 +41,7 @@
qcom,saw2-spm-cmd-wfi = [60 03 60 0b 0f];
qcom,saw2-spm-cmd-spc = [20 10 80 30 90 5b 60 03 60 3b 76 76
0b 94 5b 80 10 26 30 0f];
- qcom,saw2-spm-cmd-pc = [20 10 80 30 90 5b 60 07 60 3b 76 76
+ qcom,saw2-spm-cmd-pc = [20 10 80 30 90 5b 60 03 60 3b 76 76
0b 94 5b 80 10 26 30 0f];
};
@@ -58,7 +58,7 @@
qcom,saw2-spm-cmd-wfi = [60 03 60 0b 0f];
qcom,saw2-spm-cmd-spc = [00 20 10 80 30 90 5b 60 03 60 3b 76 76
0b 94 5b 80 10 06 26 30 0f];
- qcom,saw2-spm-cmd-pc = [00 20 10 80 30 90 5b 60 07 60 3b 76 76
+ qcom,saw2-spm-cmd-pc = [00 20 10 80 30 90 5b 60 03 60 3b 76 76
0b 94 5b 80 10 06 26 30 0f];
};
@@ -75,7 +75,7 @@
qcom,saw2-spm-cmd-wfi = [60 03 60 0b 0f];
qcom,saw2-spm-cmd-spc = [20 10 80 30 90 5b 60 03 60 3b 76 76
0b 94 5b 80 10 26 30 0f];
- qcom,saw2-spm-cmd-pc = [20 10 80 30 90 5b 60 07 60 3b 76 76
+ qcom,saw2-spm-cmd-pc = [20 10 80 30 90 5b 60 03 60 3b 76 76
0b 94 5b 80 10 26 30 0f];
};
diff --git a/arch/arm/boot/dts/msm8610-v2-qrd-skuaa.dts b/arch/arm/boot/dts/msm8610-v2-qrd-skuaa.dts
index 6ad8cb5..677365f 100644
--- a/arch/arm/boot/dts/msm8610-v2-qrd-skuaa.dts
+++ b/arch/arm/boot/dts/msm8610-v2-qrd-skuaa.dts
@@ -13,15 +13,13 @@
/dts-v1/;
/include/ "msm8610-v2.dtsi"
-/include/ "msm8610-qrd.dtsi"
+/include/ "msm8610-qrd-skuaa.dtsi"
/include/ "dsi-v2-panel-hx8379a-wvga-video.dtsi"
/include/ "msm8610-qrd-camera-sensor.dtsi"
/ {
- model = "Qualcomm MSM 8610v2 QRD";
+ model = "Qualcomm MSM 8610v2 QRD SKUAA";
compatible = "qcom,msm8610-qrd", "qcom,msm8610", "qcom,qrd";
qcom,board-id = <11 1>, <11 0>;
- qcom,msm-id = <147 0x10001>, <165 0x10001>, <161 0x10001>, <162 0x10001>,
- <163 0x10001>, <164 0x10001>, <166 0x10001>;
};
diff --git a/arch/arm/boot/dts/msm8610-v2-qrd-skuab.dts b/arch/arm/boot/dts/msm8610-v2-qrd-skuab.dts
index 225be06..ccc38fc 100644
--- a/arch/arm/boot/dts/msm8610-v2-qrd-skuab.dts
+++ b/arch/arm/boot/dts/msm8610-v2-qrd-skuab.dts
@@ -13,12 +13,12 @@
/dts-v1/;
/include/ "msm8610-v2.dtsi"
-/include/ "msm8610-qrd.dtsi"
+/include/ "msm8610-qrd-skuab.dtsi"
+/include/ "dsi-v2-panel-otm8018b-fwvga-video.dtsi"
+/include/ "msm8612-qrd-camera-sensor.dtsi"
/ {
- model = "Qualcomm MSM 8610v2 QRD";
+ model = "Qualcomm MSM 8610v2 QRD SKUAB";
compatible = "qcom,msm8610-qrd", "qcom,msm8610", "qcom,qrd";
qcom,board-id = <11 3>;
- qcom,msm-id = <147 0x10001>, <165 0x10001>, <161 0x10001>, <162 0x10001>,
- <163 0x10001>, <164 0x10001>, <166 0x10001>;
};
diff --git a/arch/arm/boot/dts/msm8610-v2.dtsi b/arch/arm/boot/dts/msm8610-v2.dtsi
index 89d8f74..a1f466a 100644
--- a/arch/arm/boot/dts/msm8610-v2.dtsi
+++ b/arch/arm/boot/dts/msm8610-v2.dtsi
@@ -18,3 +18,8 @@
/include/ "msm8610.dtsi"
/include/ "msm8610-v2-pm.dtsi"
+
+/ {
+ qcom,msm-id = <147 0x10001>, <165 0x10001>, <161 0x10001>, <162 0x10001>,
+ <163 0x10001>, <164 0x10001>, <166 0x10001>;
+};
diff --git a/arch/arm/boot/dts/msm8974-camera.dtsi b/arch/arm/boot/dts/msm8974-camera.dtsi
index dd30820..610f237 100644
--- a/arch/arm/boot/dts/msm8974-camera.dtsi
+++ b/arch/arm/boot/dts/msm8974-camera.dtsi
@@ -169,7 +169,7 @@
compatible = "qcom,cpp";
reg = <0xfda04000 0x100>,
<0xfda40000 0x200>,
- <0xfda18000 0x008>;
+ <0xfda18000 0x018>;
reg-names = "cpp", "cpp_vbif", "cpp_hw";
interrupts = <0 49 0>;
interrupt-names = "cpp";
diff --git a/arch/arm/boot/dts/msm8974-mdss.dtsi b/arch/arm/boot/dts/msm8974-mdss.dtsi
index f8a8fa6..b615ebe 100644
--- a/arch/arm/boot/dts/msm8974-mdss.dtsi
+++ b/arch/arm/boot/dts/msm8974-mdss.dtsi
@@ -158,7 +158,7 @@
qcom,hdmi-tx-supply-names = "hpd-gdsc", "hpd-5v", "core-vdda", "core-vcc";
qcom,hdmi-tx-min-voltage-level = <0 0 1800000 1800000>;
qcom,hdmi-tx-max-voltage-level = <0 0 1800000 1800000>;
- qcom,hdmi-tx-peak-current = <0 0 1800000 0>;
+ qcom,hdmi-tx-peak-current = <0 0 300000 0>;
qcom,hdmi-tx-cec = <&msmgpio 31 0>;
qcom,hdmi-tx-ddc-clk = <&msmgpio 32 0>;
diff --git a/arch/arm/boot/dts/msm8974-regulator.dtsi b/arch/arm/boot/dts/msm8974-regulator.dtsi
index eae9032..a88a709 100644
--- a/arch/arm/boot/dts/msm8974-regulator.dtsi
+++ b/arch/arm/boot/dts/msm8974-regulator.dtsi
@@ -463,7 +463,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
- qcom,pfm-threshold = <73>;
+ qcom,pfm-threshold = <76>;
qcom,use-phase-scaling-factor;
krait0_vreg: regulator@f9088000 {
diff --git a/arch/arm/boot/dts/msm8974-v2-pm.dtsi b/arch/arm/boot/dts/msm8974-v2-pm.dtsi
index 07a92dc..8836975 100644
--- a/arch/arm/boot/dts/msm8974-v2-pm.dtsi
+++ b/arch/arm/boot/dts/msm8974-v2-pm.dtsi
@@ -220,6 +220,7 @@
<0xff 58>, /* mss_to_apps_irq(1) */
<0xff 59>, /* mss_to_apps_irq(2) */
<0xff 60>, /* mss_to_apps_irq(3) */
+ <0xff 61>, /* mss_a2_bam_irq */
<0xff 70>, /* iommu_pmon_nonsecure_irq */
<0xff 97>, /* iommu_nonsecure_irq */
<0xff 105>, /* iommu_pmon_nonsecure_irq */
diff --git a/arch/arm/boot/dts/msm8974pro-ac-regulator.dtsi b/arch/arm/boot/dts/msm8974pro-ac-regulator.dtsi
index 9d7f316..e0473b7 100644
--- a/arch/arm/boot/dts/msm8974pro-ac-regulator.dtsi
+++ b/arch/arm/boot/dts/msm8974pro-ac-regulator.dtsi
@@ -479,7 +479,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
- qcom,pfm-threshold = <73>;
+ qcom,pfm-threshold = <76>;
krait0_vreg: regulator@f9088000 {
compatible = "qcom,krait-regulator";
diff --git a/arch/arm/boot/dts/msm8974pro.dtsi b/arch/arm/boot/dts/msm8974pro.dtsi
index 7914a6a..9b0638d 100644
--- a/arch/arm/boot/dts/msm8974pro.dtsi
+++ b/arch/arm/boot/dts/msm8974pro.dtsi
@@ -127,7 +127,7 @@
&msm_vidc {
qcom,vidc-ns-map = <0x40000000 0x40000000>;
- qcom,load-freq-tbl = <979200 465000000>,
+ qcom,load-freq-tbl = <1036800 465000000>,
<783360 465000000>,
<489600 266670000>,
<244800 133330000>;
@@ -162,15 +162,16 @@
<1608000 604000>,
<2576000 967000>,
<4680000 1404000>,
- <49880000 1496000>;
+ <4988000 1496000>;
qcom,dec-ddr-ab-ib = <0 0>,
<208000 303000>,
- <536000 303000>,
- <1012000 303000>,
- <2024000 606000>,
- <3240000 970000>,
- <4048000 1212000>,
- <4264000 1279000>;
+ <536000 1600000>,
+ <1012000 1600000>,
+ <2024000 1600000>,
+ <3240000 1600000>,
+ <4048000 1600000>,
+ <4264000 1600000>;
+ qcom,max-hw-load = <1281600>; /* max(4k X 2304 @ 24, 4k X 2160 @ 30) + 1080p @ 30 */
qcom,buffer-type-tz-usage-table = <0x91 0x1>,
<0x42 0x2>,
<0x120 0x3>;
diff --git a/arch/arm/configs/msm8226-perf_defconfig b/arch/arm/configs/msm8226-perf_defconfig
index 63fd82b..7d96cb1 100644
--- a/arch/arm/configs/msm8226-perf_defconfig
+++ b/arch/arm/configs/msm8226-perf_defconfig
@@ -98,14 +98,17 @@
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
+CONFIG_XFRM_USER=y
CONFIG_INET=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MULTIPLE_TABLES=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+CONFIG_INET_AH=y
+CONFIG_INET_ESP=y
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
CONFIG_IPV6=y
@@ -142,6 +145,7 @@
CONFIG_NETFILTER_XT_TARGET_LOG=y
CONFIG_NETFILTER_XT_TARGET_MARK=y
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
+CONFIG_NETFILTER_XT_TARGET_NOTRACK=y
CONFIG_NETFILTER_XT_MATCH_COMMENT=y
CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
@@ -223,6 +227,7 @@
CONFIG_DM_CRYPT=y
CONFIG_NETDEVICES=y
CONFIG_DUMMY=y
+CONFIG_TUN=y
CONFIG_KS8851=y
# CONFIG_MSM_RMNET is not set
CONFIG_MSM_RMNET_BAM=y
@@ -416,8 +421,10 @@
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_SET_MODULE_RONX=y
CONFIG_KEYS=y
+CONFIG_CRYPTO_NULL=y
CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_ARC4=y
+CONFIG_CRYPTO_XCBC=y
CONFIG_CRYPTO_TWOFISH=y
CONFIG_NFC_QNCI=y
CONFIG_CRYPTO_DEV_QCRYPTO=m
diff --git a/arch/arm/configs/msm8226_defconfig b/arch/arm/configs/msm8226_defconfig
index 7d1562b..1d5c492 100644
--- a/arch/arm/configs/msm8226_defconfig
+++ b/arch/arm/configs/msm8226_defconfig
@@ -99,14 +99,17 @@
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
+CONFIG_XFRM_USER=y
CONFIG_INET=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MULTIPLE_TABLES=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+CONFIG_INET_AH=y
+CONFIG_INET_ESP=y
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
CONFIG_IPV6=y
@@ -143,6 +146,7 @@
CONFIG_NETFILTER_XT_TARGET_LOG=y
CONFIG_NETFILTER_XT_TARGET_MARK=y
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
+CONFIG_NETFILTER_XT_TARGET_NOTRACK=y
CONFIG_NETFILTER_XT_MATCH_COMMENT=y
CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
@@ -205,6 +209,7 @@
CONFIG_BT_HIDP=y
CONFIG_BT_HCISMD=y
CONFIG_CFG80211=y
+CONFIG_CFG80211_INTERNAL_REGDB=y
CONFIG_NL80211_TESTMODE=y
CONFIG_CMA=y
CONFIG_BLK_DEV_LOOP=y
@@ -467,8 +472,10 @@
CONFIG_EARLY_PRINTK=y
CONFIG_DEBUG_SET_MODULE_RONX=y
CONFIG_KEYS=y
+CONFIG_CRYPTO_NULL=y
CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_ARC4=y
+CONFIG_CRYPTO_XCBC=y
CONFIG_CRYPTO_TWOFISH=y
CONFIG_NFC_QNCI=y
CONFIG_CRYPTO_DEV_QCRYPTO=m
diff --git a/arch/arm/configs/msm8610-perf_defconfig b/arch/arm/configs/msm8610-perf_defconfig
index 2b76ba8..03ddb3a 100644
--- a/arch/arm/configs/msm8610-perf_defconfig
+++ b/arch/arm/configs/msm8610-perf_defconfig
@@ -391,3 +391,4 @@
CONFIG_SENSORS_STK3X1X=y
CONFIG_SENSORS_MMA8X5X=y
CONFIG_LOGCAT_SIZE=64
+CONFIG_SENSORS_CAPELLA_CM36283=y
diff --git a/arch/arm/configs/msm8610_defconfig b/arch/arm/configs/msm8610_defconfig
index b1527e7..aad3540 100644
--- a/arch/arm/configs/msm8610_defconfig
+++ b/arch/arm/configs/msm8610_defconfig
@@ -204,6 +204,7 @@
CONFIG_BT_HIDP=y
CONFIG_BT_HCISMD=y
CONFIG_CFG80211=y
+CONFIG_CFG80211_INTERNAL_REGDB=y
CONFIG_NL80211_TESTMODE=y
CONFIG_CMA=y
CONFIG_BLK_DEV_LOOP=y
@@ -438,3 +439,4 @@
CONFIG_MSM_RPM_RBCPR_STATS_V2_LOG=y
CONFIG_SENSORS_STK3X1X=y
CONFIG_SENSORS_MMA8X5X=y
+CONFIG_SENSORS_CAPELLA_CM36283=y
diff --git a/arch/arm/configs/msm8960_defconfig b/arch/arm/configs/msm8960_defconfig
index 9b55c3b..1d645e2 100644
--- a/arch/arm/configs/msm8960_defconfig
+++ b/arch/arm/configs/msm8960_defconfig
@@ -253,6 +253,7 @@
CONFIG_BT_HCIUART_IBS=y
CONFIG_MSM_BT_POWER=y
CONFIG_CFG80211=m
+CONFIG_CFG80211_INTERNAL_REGDB=y
# CONFIG_CFG80211_WEXT is not set
CONFIG_RFKILL=y
CONFIG_GENLOCK=y
diff --git a/arch/arm/configs/msm8974-perf_defconfig b/arch/arm/configs/msm8974-perf_defconfig
index 6ad1b12..3bc159a 100644
--- a/arch/arm/configs/msm8974-perf_defconfig
+++ b/arch/arm/configs/msm8974-perf_defconfig
@@ -159,6 +159,7 @@
CONFIG_NETFILTER_XT_TARGET_LOG=y
CONFIG_NETFILTER_XT_TARGET_MARK=y
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
+CONFIG_NETFILTER_XT_TARGET_NOTRACK=y
CONFIG_NETFILTER_XT_MATCH_COMMENT=y
CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
diff --git a/arch/arm/configs/msm8974_defconfig b/arch/arm/configs/msm8974_defconfig
index 4937a64..118fdd4 100644
--- a/arch/arm/configs/msm8974_defconfig
+++ b/arch/arm/configs/msm8974_defconfig
@@ -165,6 +165,7 @@
CONFIG_NETFILTER_XT_TARGET_LOG=y
CONFIG_NETFILTER_XT_TARGET_MARK=y
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
+CONFIG_NETFILTER_XT_TARGET_NOTRACK=y
CONFIG_NETFILTER_XT_MATCH_COMMENT=y
CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
@@ -240,6 +241,7 @@
CONFIG_BT_HCIUART_ATH3K=y
CONFIG_MSM_BT_POWER=y
CONFIG_CFG80211=y
+CONFIG_CFG80211_INTERNAL_REGDB=y
CONFIG_NL80211_TESTMODE=y
CONFIG_RFKILL=y
CONFIG_GENLOCK=y
diff --git a/arch/arm/kernel/arch_timer.c b/arch/arm/kernel/arch_timer.c
index ac4c7a3..9e27592 100644
--- a/arch/arm/kernel/arch_timer.c
+++ b/arch/arm/kernel/arch_timer.c
@@ -291,7 +291,7 @@
return 0;
}
-static inline cycle_t counter_get_cntpct_mem(void)
+static inline cycle_t notrace counter_get_cntpct_mem(void)
{
u32 cvall, cvalh, thigh;
@@ -304,7 +304,7 @@
return ((cycle_t) cvalh << 32) | cvall;
}
-static inline cycle_t counter_get_cntpct_cp15(void)
+static inline cycle_t notrace counter_get_cntpct_cp15(void)
{
u32 cvall, cvalh;
@@ -312,7 +312,7 @@
return ((cycle_t) cvalh << 32) | cvall;
}
-static inline cycle_t counter_get_cntvct_mem(void)
+static inline cycle_t notrace counter_get_cntvct_mem(void)
{
u32 cvall, cvalh, thigh;
@@ -325,7 +325,7 @@
return ((cycle_t) cvalh << 32) | cvall;
}
-static inline cycle_t counter_get_cntvct_cp15(void)
+static inline cycle_t notrace counter_get_cntvct_cp15(void)
{
u32 cvall, cvalh;
diff --git a/arch/arm/mach-msm/acpuclock-8974.c b/arch/arm/mach-msm/acpuclock-8974.c
index 6d848d2..8410019 100644
--- a/arch/arm/mach-msm/acpuclock-8974.c
+++ b/arch/arm/mach-msm/acpuclock-8974.c
@@ -899,38 +899,460 @@
{ 0, { 0 } }
};
-static struct acpu_level acpu_freq_tbl_pro_pvs0[] __initdata = {
- { 1, { 300000, PLL_0, 0, 0 }, L2(0), 800000, 999 },
- { 0, { 345600, HFPLL, 2, 36 }, L2(1), 800000, 999 },
- { 1, { 422400, HFPLL, 2, 44 }, L2(2), 800000, 999 },
- { 0, { 499200, HFPLL, 2, 52 }, L2(2), 805000, 999 },
- { 0, { 576000, HFPLL, 1, 30 }, L2(3), 815000, 999 },
- { 1, { 652800, HFPLL, 1, 34 }, L2(3), 825000, 999 },
- { 1, { 729600, HFPLL, 1, 38 }, L2(4), 835000, 999 },
- { 0, { 806400, HFPLL, 1, 42 }, L2(4), 845000, 999 },
- { 1, { 883200, HFPLL, 1, 46 }, L2(4), 855000, 999 },
- { 1, { 960000, HFPLL, 1, 50 }, L2(9), 865000, 999 },
- { 1, { 1036800, HFPLL, 1, 54 }, L2(10), 875000, 999 },
- { 0, { 1113600, HFPLL, 1, 58 }, L2(10), 890000, 999 },
- { 1, { 1190400, HFPLL, 1, 62 }, L2(10), 900000, 999 },
- { 1, { 1267200, HFPLL, 1, 66 }, L2(13), 915000, 999 },
- { 0, { 1344000, HFPLL, 1, 70 }, L2(14), 925000, 999 },
- { 0, { 1420800, HFPLL, 1, 74 }, L2(15), 940000, 999 },
- { 1, { 1497600, HFPLL, 1, 78 }, L2(16), 950000, 999 },
- { 1, { 1574400, HFPLL, 1, 82 }, L2(17), 965000, 999 },
- { 0, { 1651200, HFPLL, 1, 86 }, L2(17), 980000, 999 },
- { 1, { 1728000, HFPLL, 1, 90 }, L2(18), 995000, 999 },
- { 0, { 1804800, HFPLL, 1, 94 }, L2(18), 1010000, 999 },
- { 0, { 1881600, HFPLL, 1, 98 }, L2(18), 1025000, 999 },
- { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 1040000, 999 },
- { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 1055000, 999 },
- { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 1070000, 999 },
- { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 1085000, 999 },
- { 1, { 2265600, HFPLL, 1, 118 }, L2(19), 1100000, 999 },
- /* higher frequencies aren't available for bring up */
+static struct acpu_level acpu_ftbl_pro_2p3g_pvs0[] __initdata = {
+ { 1, { 300000, PLL_0, 0, 0 }, L2(0), 775000, 72 },
+ { 0, { 345600, HFPLL, 2, 36 }, L2(1), 775000, 83 },
+ { 1, { 422400, HFPLL, 2, 44 }, L2(2), 775000, 101 },
+ { 0, { 499200, HFPLL, 2, 52 }, L2(2), 780000, 120 },
+ { 0, { 576000, HFPLL, 1, 30 }, L2(3), 790000, 139 },
+ { 1, { 652800, HFPLL, 1, 34 }, L2(3), 800000, 159 },
+ { 1, { 729600, HFPLL, 1, 38 }, L2(4), 810000, 180 },
+ { 0, { 806400, HFPLL, 1, 42 }, L2(4), 820000, 200 },
+ { 1, { 883200, HFPLL, 1, 46 }, L2(4), 830000, 221 },
+ { 1, { 960000, HFPLL, 1, 50 }, L2(9), 840000, 242 },
+ { 1, { 1036800, HFPLL, 1, 54 }, L2(10), 850000, 264 },
+ { 0, { 1113600, HFPLL, 1, 58 }, L2(10), 865000, 287 },
+ { 1, { 1190400, HFPLL, 1, 62 }, L2(10), 875000, 308 },
+ { 1, { 1267200, HFPLL, 1, 66 }, L2(13), 890000, 333 },
+ { 0, { 1344000, HFPLL, 1, 70 }, L2(14), 900000, 356 },
+ { 0, { 1420800, HFPLL, 1, 74 }, L2(15), 915000, 380 },
+ { 1, { 1497600, HFPLL, 1, 78 }, L2(16), 925000, 404 },
+ { 1, { 1574400, HFPLL, 1, 82 }, L2(17), 940000, 430 },
+ { 0, { 1651200, HFPLL, 1, 86 }, L2(17), 955000, 456 },
+ { 1, { 1728000, HFPLL, 1, 90 }, L2(18), 970000, 482 },
+ { 0, { 1804800, HFPLL, 1, 94 }, L2(18), 985000, 510 },
+ { 0, { 1881600, HFPLL, 1, 98 }, L2(18), 1000000, 538 },
+ { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 1015000, 565 },
+ { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 1030000, 596 },
+ { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 1045000, 627 },
+ { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 1060000, 659 },
+ { 1, { 2265600, HFPLL, 1, 118 }, L2(19), 1075000, 691 },
{ 0, { 0 } }
};
+static struct acpu_level acpu_ftbl_pro_2p3g_pvs1[] __initdata = {
+ { 1, { 300000, PLL_0, 0, 0 }, L2(0), 775000, 72},
+ { 0, { 345600, HFPLL, 2, 36 }, L2(1), 775000, 83},
+ { 1, { 422400, HFPLL, 2, 44 }, L2(2), 775000, 101},
+ { 0, { 499200, HFPLL, 2, 52 }, L2(2), 775000, 120},
+ { 0, { 576000, HFPLL, 1, 30 }, L2(3), 775000, 139},
+ { 1, { 652800, HFPLL, 1, 34 }, L2(3), 785000, 159},
+ { 1, { 729600, HFPLL, 1, 38 }, L2(4), 795000, 180},
+ { 0, { 806400, HFPLL, 1, 42 }, L2(4), 805000, 200},
+ { 1, { 883200, HFPLL, 1, 46 }, L2(4), 815000, 221},
+ { 1, { 960000, HFPLL, 1, 50 }, L2(9), 825000, 242},
+ { 1, { 1036800, HFPLL, 1, 54 }, L2(10), 835000, 264},
+ { 0, { 1113600, HFPLL, 1, 58 }, L2(10), 850000, 287},
+ { 1, { 1190400, HFPLL, 1, 62 }, L2(10), 860000, 308},
+ { 1, { 1267200, HFPLL, 1, 66 }, L2(13), 870000, 333},
+ { 0, { 1344000, HFPLL, 1, 70 }, L2(14), 885000, 356},
+ { 0, { 1420800, HFPLL, 1, 74 }, L2(15), 895000, 380},
+ { 1, { 1497600, HFPLL, 1, 78 }, L2(16), 905000, 404},
+ { 1, { 1574400, HFPLL, 1, 82 }, L2(17), 920000, 430},
+ { 0, { 1651200, HFPLL, 1, 86 }, L2(17), 935000, 456},
+ { 1, { 1728000, HFPLL, 1, 90 }, L2(18), 950000, 482},
+ { 0, { 1804800, HFPLL, 1, 94 }, L2(18), 965000, 510},
+ { 0, { 1881600, HFPLL, 1, 98 }, L2(18), 980000, 538},
+ { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 995000, 565},
+ { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 1005000, 596},
+ { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 1020000, 627},
+ { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 1035000, 659},
+ { 1, { 2265600, HFPLL, 1, 118 }, L2(19), 1050000, 691},
+ { 0, { 0 } }
+};
+
+static struct acpu_level acpu_ftbl_pro_2p3g_pvs2[] __initdata = {
+ { 1, { 300000, PLL_0, 0, 0 }, L2(0), 750000, 72 },
+ { 0, { 345600, HFPLL, 2, 36 }, L2(1), 750000, 83 },
+ { 1, { 422400, HFPLL, 2, 44 }, L2(2), 750000, 101 },
+ { 0, { 499200, HFPLL, 2, 52 }, L2(2), 750000, 120 },
+ { 0, { 576000, HFPLL, 1, 30 }, L2(3), 760000, 139 },
+ { 1, { 652800, HFPLL, 1, 34 }, L2(3), 770000, 159 },
+ { 1, { 729600, HFPLL, 1, 38 }, L2(4), 780000, 180 },
+ { 0, { 806400, HFPLL, 1, 42 }, L2(4), 790000, 200 },
+ { 1, { 883200, HFPLL, 1, 46 }, L2(4), 800000, 221 },
+ { 1, { 960000, HFPLL, 1, 50 }, L2(9), 810000, 242 },
+ { 1, { 1036800, HFPLL, 1, 54 }, L2(10), 820000, 264 },
+ { 0, { 1113600, HFPLL, 1, 58 }, L2(10), 830000, 287 },
+ { 1, { 1190400, HFPLL, 1, 62 }, L2(10), 840000, 308 },
+ { 1, { 1267200, HFPLL, 1, 66 }, L2(13), 850000, 333 },
+ { 0, { 1344000, HFPLL, 1, 70 }, L2(14), 865000, 356 },
+ { 0, { 1420800, HFPLL, 1, 74 }, L2(15), 875000, 380 },
+ { 1, { 1497600, HFPLL, 1, 78 }, L2(16), 885000, 404 },
+ { 1, { 1574400, HFPLL, 1, 82 }, L2(17), 900000, 430 },
+ { 0, { 1651200, HFPLL, 1, 86 }, L2(17), 915000, 456 },
+ { 1, { 1728000, HFPLL, 1, 90 }, L2(18), 930000, 482 },
+ { 0, { 1804800, HFPLL, 1, 94 }, L2(18), 945000, 510 },
+ { 0, { 1881600, HFPLL, 1, 98 }, L2(18), 955000, 538 },
+ { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 970000, 565 },
+ { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 980000, 596 },
+ { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 995000, 627 },
+ { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 1010000, 659 },
+ { 1, { 2265600, HFPLL, 1, 118 }, L2(19), 1025000, 691 },
+ { 0, { 0 } }
+};
+
+static struct acpu_level acpu_ftbl_pro_2p3g_pvs3[] __initdata = {
+ { 1, { 300000, PLL_0, 0, 0 }, L2(0), 750000, 72},
+ { 0, { 345600, HFPLL, 2, 36 }, L2(1), 750000, 83},
+ { 1, { 422400, HFPLL, 2, 44 }, L2(2), 750000, 101},
+ { 0, { 499200, HFPLL, 2, 52 }, L2(2), 750000, 120},
+ { 0, { 576000, HFPLL, 1, 30 }, L2(3), 750000, 139},
+ { 1, { 652800, HFPLL, 1, 34 }, L2(3), 755000, 159},
+ { 1, { 729600, HFPLL, 1, 38 }, L2(4), 765000, 180},
+ { 0, { 806400, HFPLL, 1, 42 }, L2(4), 775000, 200},
+ { 1, { 883200, HFPLL, 1, 46 }, L2(4), 785000, 221},
+ { 1, { 960000, HFPLL, 1, 50 }, L2(9), 795000, 242},
+ { 1, { 1036800, HFPLL, 1, 54 }, L2(10), 805000, 264},
+ { 0, { 1113600, HFPLL, 1, 58 }, L2(10), 815000, 287},
+ { 1, { 1190400, HFPLL, 1, 62 }, L2(10), 825000, 308},
+ { 1, { 1267200, HFPLL, 1, 66 }, L2(13), 835000, 333},
+ { 0, { 1344000, HFPLL, 1, 70 }, L2(14), 850000, 356},
+ { 0, { 1420800, HFPLL, 1, 74 }, L2(15), 860000, 380},
+ { 1, { 1497600, HFPLL, 1, 78 }, L2(16), 870000, 404},
+ { 1, { 1574400, HFPLL, 1, 82 }, L2(17), 885000, 430},
+ { 0, { 1651200, HFPLL, 1, 86 }, L2(17), 900000, 456},
+ { 1, { 1728000, HFPLL, 1, 90 }, L2(18), 910000, 482},
+ { 0, { 1804800, HFPLL, 1, 94 }, L2(18), 925000, 510},
+ { 0, { 1881600, HFPLL, 1, 98 }, L2(18), 935000, 538},
+ { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 945000, 565},
+ { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 960000, 596},
+ { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 970000, 627},
+ { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 985000, 659},
+ { 1, { 2265600, HFPLL, 1, 118 }, L2(19), 1000000, 691},
+ { 0, { 0 } }
+};
+
+static struct acpu_level acpu_ftbl_pro_2p3g_pvs4[] __initdata = {
+ { 1, { 300000, PLL_0, 0, 0 }, L2(0), 750000, 72},
+ { 0, { 345600, HFPLL, 2, 36 }, L2(1), 750000, 83},
+ { 1, { 422400, HFPLL, 2, 44 }, L2(2), 750000, 101},
+ { 0, { 499200, HFPLL, 2, 52 }, L2(2), 750000, 120},
+ { 0, { 576000, HFPLL, 1, 30 }, L2(3), 750000, 139},
+ { 1, { 652800, HFPLL, 1, 34 }, L2(3), 750000, 159},
+ { 1, { 729600, HFPLL, 1, 38 }, L2(4), 755000, 180},
+ { 0, { 806400, HFPLL, 1, 42 }, L2(4), 765000, 200},
+ { 1, { 883200, HFPLL, 1, 46 }, L2(4), 775000, 221},
+ { 1, { 960000, HFPLL, 1, 50 }, L2(9), 785000, 242},
+ { 1, { 1036800, HFPLL, 1, 54 }, L2(10), 795000, 264},
+ { 0, { 1113600, HFPLL, 1, 58 }, L2(10), 805000, 287},
+ { 1, { 1190400, HFPLL, 1, 62 }, L2(10), 815000, 308},
+ { 1, { 1267200, HFPLL, 1, 66 }, L2(13), 825000, 333},
+ { 0, { 1344000, HFPLL, 1, 70 }, L2(14), 835000, 356},
+ { 0, { 1420800, HFPLL, 1, 74 }, L2(15), 845000, 380},
+ { 1, { 1497600, HFPLL, 1, 78 }, L2(16), 855000, 404},
+ { 1, { 1574400, HFPLL, 1, 82 }, L2(17), 870000, 430},
+ { 0, { 1651200, HFPLL, 1, 86 }, L2(17), 885000, 456},
+ { 1, { 1728000, HFPLL, 1, 90 }, L2(18), 895000, 482},
+ { 0, { 1804800, HFPLL, 1, 94 }, L2(18), 905000, 510},
+ { 0, { 1881600, HFPLL, 1, 98 }, L2(18), 915000, 538},
+ { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 925000, 565},
+ { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 935000, 596},
+ { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 950000, 627},
+ { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 960000, 659},
+ { 1, { 2265600, HFPLL, 1, 118 }, L2(19), 975000, 691},
+ { 0, { 0 } }
+};
+
+static struct acpu_level acpu_ftbl_pro_2p3g_pvs5[] __initdata = {
+ { 1, { 300000, PLL_0, 0, 0 }, L2(0), 725000, 72},
+ { 0, { 345600, HFPLL, 2, 36 }, L2(1), 725000, 83},
+ { 1, { 422400, HFPLL, 2, 44 }, L2(2), 725000, 101},
+ { 0, { 499200, HFPLL, 2, 52 }, L2(2), 725000, 120},
+ { 0, { 576000, HFPLL, 1, 30 }, L2(3), 725000, 139},
+ { 1, { 652800, HFPLL, 1, 34 }, L2(3), 735000, 159},
+ { 1, { 729600, HFPLL, 1, 38 }, L2(4), 745000, 180},
+ { 0, { 806400, HFPLL, 1, 42 }, L2(4), 755000, 200},
+ { 1, { 883200, HFPLL, 1, 46 }, L2(4), 765000, 221},
+ { 1, { 960000, HFPLL, 1, 50 }, L2(9), 775000, 242},
+ { 1, { 1036800, HFPLL, 1, 54 }, L2(10), 785000, 264},
+ { 0, { 1113600, HFPLL, 1, 58 }, L2(10), 795000, 287},
+ { 1, { 1190400, HFPLL, 1, 62 }, L2(10), 805000, 308},
+ { 1, { 1267200, HFPLL, 1, 66 }, L2(13), 815000, 333},
+ { 0, { 1344000, HFPLL, 1, 70 }, L2(14), 825000, 356},
+ { 0, { 1420800, HFPLL, 1, 74 }, L2(15), 835000, 380},
+ { 1, { 1497600, HFPLL, 1, 78 }, L2(16), 845000, 404},
+ { 1, { 1574400, HFPLL, 1, 82 }, L2(17), 855000, 430},
+ { 0, { 1651200, HFPLL, 1, 86 }, L2(17), 865000, 456},
+ { 1, { 1728000, HFPLL, 1, 90 }, L2(18), 875000, 482},
+ { 0, { 1804800, HFPLL, 1, 94 }, L2(18), 885000, 510},
+ { 0, { 1881600, HFPLL, 1, 98 }, L2(18), 895000, 538},
+ { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 905000, 565},
+ { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 915000, 596},
+ { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 930000, 627},
+ { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 940000, 659},
+ { 1, { 2265600, HFPLL, 1, 118 }, L2(19), 950000, 691},
+ { 0, { 0 } }
+};
+
+static struct acpu_level acpu_ftbl_pro_2p3g_pvs6[] __initdata = {
+ { 1, { 300000, PLL_0, 0, 0 }, L2(0), 725000, 72},
+ { 0, { 345600, HFPLL, 2, 36 }, L2(1), 725000, 83},
+ { 1, { 422400, HFPLL, 2, 44 }, L2(2), 725000, 101},
+ { 0, { 499200, HFPLL, 2, 52 }, L2(2), 725000, 120},
+ { 0, { 576000, HFPLL, 1, 30 }, L2(3), 725000, 139},
+ { 1, { 652800, HFPLL, 1, 34 }, L2(3), 725000, 159},
+ { 1, { 729600, HFPLL, 1, 38 }, L2(4), 735000, 180},
+ { 0, { 806400, HFPLL, 1, 42 }, L2(4), 745000, 200},
+ { 1, { 883200, HFPLL, 1, 46 }, L2(4), 755000, 221},
+ { 1, { 960000, HFPLL, 1, 50 }, L2(9), 765000, 242},
+ { 1, { 1036800, HFPLL, 1, 54 }, L2(10), 775000, 264},
+ { 0, { 1113600, HFPLL, 1, 58 }, L2(10), 785000, 287},
+ { 1, { 1190400, HFPLL, 1, 62 }, L2(10), 795000, 308},
+ { 1, { 1267200, HFPLL, 1, 66 }, L2(13), 805000, 333},
+ { 0, { 1344000, HFPLL, 1, 70 }, L2(14), 815000, 356},
+ { 0, { 1420800, HFPLL, 1, 74 }, L2(15), 825000, 380},
+ { 1, { 1497600, HFPLL, 1, 78 }, L2(16), 835000, 404},
+ { 1, { 1574400, HFPLL, 1, 82 }, L2(17), 845000, 430},
+ { 0, { 1651200, HFPLL, 1, 86 }, L2(17), 850000, 456},
+ { 1, { 1728000, HFPLL, 1, 90 }, L2(18), 860000, 482},
+ { 0, { 1804800, HFPLL, 1, 94 }, L2(18), 870000, 510},
+ { 0, { 1881600, HFPLL, 1, 98 }, L2(18), 880000, 538},
+ { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 890000, 565},
+ { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 895000, 596},
+ { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 905000, 627},
+ { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 915000, 659},
+ { 1, { 2265600, HFPLL, 1, 118 }, L2(19), 925000, 691},
+ { 0, { 0 } }
+};
+
+static struct acpu_level acpu_ftbl_pro_2p5g_pvs0[] __initdata = {
+ { 1, { 300000, PLL_0, 0, 0 }, L2(0), 800000, 76},
+ { 0, { 345600, HFPLL, 2, 36 }, L2(1), 800000, 87},
+ { 1, { 422400, HFPLL, 2, 44 }, L2(2), 800000, 106},
+ { 0, { 499200, HFPLL, 2, 52 }, L2(2), 800000, 125},
+ { 0, { 576000, HFPLL, 1, 30 }, L2(3), 800000, 145},
+ { 1, { 652800, HFPLL, 1, 34 }, L2(3), 800000, 164},
+ { 1, { 729600, HFPLL, 1, 38 }, L2(4), 800000, 183},
+ { 0, { 806400, HFPLL, 1, 42 }, L2(4), 800000, 202},
+ { 1, { 883200, HFPLL, 1, 46 }, L2(4), 800000, 222},
+ { 1, { 960000, HFPLL, 1, 50 }, L2(9), 800000, 241},
+ { 1, { 1036800, HFPLL, 1, 54 }, L2(10), 805000, 261},
+ { 0, { 1113600, HFPLL, 1, 58 }, L2(10), 815000, 282},
+ { 1, { 1190400, HFPLL, 1, 62 }, L2(10), 825000, 305},
+ { 1, { 1267200, HFPLL, 1, 66 }, L2(13), 835000, 327},
+ { 0, { 1344000, HFPLL, 1, 70 }, L2(14), 845000, 350},
+ { 0, { 1420800, HFPLL, 1, 74 }, L2(15), 855000, 373},
+ { 1, { 1497600, HFPLL, 1, 78 }, L2(16), 870000, 398},
+ { 1, { 1574400, HFPLL, 1, 82 }, L2(17), 885000, 424},
+ { 0, { 1651200, HFPLL, 1, 86 }, L2(17), 900000, 449},
+ { 1, { 1728000, HFPLL, 1, 90 }, L2(18), 915000, 476},
+ { 0, { 1804800, HFPLL, 1, 94 }, L2(18), 930000, 503},
+ { 0, { 1881600, HFPLL, 1, 98 }, L2(18), 945000, 530},
+ { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 960000, 559},
+ { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 980000, 590},
+ { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 1000000, 621},
+ { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 1020000, 654},
+ { 1, { 2265600, HFPLL, 1, 118 }, L2(19), 1040000, 686},
+ { 0, { 2342400, HFPLL, 1, 122 }, L2(19), 1060000, 723},
+ { 0, { 2419200, HFPLL, 1, 126 }, L2(19), 1080000, 761},
+ { 1, { 2496000, HFPLL, 1, 130 }, L2(19), 1100000, 800},
+ { 0, { 0 } }
+};
+
+static struct acpu_level acpu_ftbl_pro_2p5g_pvs1[] __initdata = {
+ { 1, { 300000, PLL_0, 0, 0 }, L2(0), 800000, 76},
+ { 0, { 345600, HFPLL, 2, 36 }, L2(1), 800000, 87},
+ { 1, { 422400, HFPLL, 2, 44 }, L2(2), 800000, 106},
+ { 0, { 499200, HFPLL, 2, 52 }, L2(2), 800000, 125},
+ { 0, { 576000, HFPLL, 1, 30 }, L2(3), 800000, 145},
+ { 1, { 652800, HFPLL, 1, 34 }, L2(3), 800000, 164},
+ { 1, { 729600, HFPLL, 1, 38 }, L2(4), 800000, 183},
+ { 0, { 806400, HFPLL, 1, 42 }, L2(4), 800000, 202},
+ { 1, { 883200, HFPLL, 1, 46 }, L2(4), 800000, 222},
+ { 1, { 960000, HFPLL, 1, 50 }, L2(9), 800000, 241},
+ { 1, { 1036800, HFPLL, 1, 54 }, L2(10), 800000, 261},
+ { 0, { 1113600, HFPLL, 1, 58 }, L2(10), 805000, 282},
+ { 1, { 1190400, HFPLL, 1, 62 }, L2(10), 815000, 305},
+ { 1, { 1267200, HFPLL, 1, 66 }, L2(13), 825000, 327},
+ { 0, { 1344000, HFPLL, 1, 70 }, L2(14), 835000, 350},
+ { 0, { 1420800, HFPLL, 1, 74 }, L2(15), 845000, 373},
+ { 1, { 1497600, HFPLL, 1, 78 }, L2(16), 855000, 398},
+ { 1, { 1574400, HFPLL, 1, 82 }, L2(17), 870000, 424},
+ { 0, { 1651200, HFPLL, 1, 86 }, L2(17), 885000, 449},
+ { 1, { 1728000, HFPLL, 1, 90 }, L2(18), 900000, 476},
+ { 0, { 1804800, HFPLL, 1, 94 }, L2(18), 915000, 503},
+ { 0, { 1881600, HFPLL, 1, 98 }, L2(18), 930000, 530},
+ { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 945000, 559},
+ { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 960000, 590},
+ { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 975000, 621},
+ { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 995000, 654},
+ { 1, { 2265600, HFPLL, 1, 118 }, L2(19), 1015000, 686},
+ { 0, { 2342400, HFPLL, 1, 122 }, L2(19), 1035000, 723},
+ { 0, { 2419200, HFPLL, 1, 126 }, L2(19), 1055000, 761},
+ { 1, { 2496000, HFPLL, 1, 130 }, L2(19), 1075000, 800},
+ { 0, { 0 } }
+};
+
+static struct acpu_level acpu_ftbl_pro_2p5g_pvs2[] __initdata = {
+ { 1, { 300000, PLL_0, 0, 0 }, L2(0), 775000, 76},
+ { 0, { 345600, HFPLL, 2, 36 }, L2(1), 775000, 87},
+ { 1, { 422400, HFPLL, 2, 44 }, L2(2), 775000, 106},
+ { 0, { 499200, HFPLL, 2, 52 }, L2(2), 775000, 125},
+ { 0, { 576000, HFPLL, 1, 30 }, L2(3), 775000, 145},
+ { 1, { 652800, HFPLL, 1, 34 }, L2(3), 775000, 164},
+ { 1, { 729600, HFPLL, 1, 38 }, L2(4), 775000, 183},
+ { 0, { 806400, HFPLL, 1, 42 }, L2(4), 775000, 202},
+ { 1, { 883200, HFPLL, 1, 46 }, L2(4), 775000, 222},
+ { 1, { 960000, HFPLL, 1, 50 }, L2(9), 775000, 241},
+ { 1, { 1036800, HFPLL, 1, 54 }, L2(10), 780000, 261},
+ { 0, { 1113600, HFPLL, 1, 58 }, L2(10), 790000, 282},
+ { 1, { 1190400, HFPLL, 1, 62 }, L2(10), 800000, 305},
+ { 1, { 1267200, HFPLL, 1, 66 }, L2(13), 810000, 327},
+ { 0, { 1344000, HFPLL, 1, 70 }, L2(14), 820000, 350},
+ { 0, { 1420800, HFPLL, 1, 74 }, L2(15), 830000, 373},
+ { 1, { 1497600, HFPLL, 1, 78 }, L2(16), 840000, 398},
+ { 1, { 1574400, HFPLL, 1, 82 }, L2(17), 850000, 424},
+ { 0, { 1651200, HFPLL, 1, 86 }, L2(17), 865000, 449},
+ { 1, { 1728000, HFPLL, 1, 90 }, L2(18), 880000, 476},
+ { 0, { 1804800, HFPLL, 1, 94 }, L2(18), 895000, 503},
+ { 0, { 1881600, HFPLL, 1, 98 }, L2(18), 910000, 530},
+ { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 925000, 559},
+ { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 940000, 590},
+ { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 955000, 621},
+ { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 970000, 654},
+ { 1, { 2265600, HFPLL, 1, 118 }, L2(19), 990000, 686},
+ { 0, { 2342400, HFPLL, 1, 122 }, L2(19), 1010000, 723},
+ { 0, { 2419200, HFPLL, 1, 126 }, L2(19), 1030000, 761},
+ { 1, { 2496000, HFPLL, 1, 130 }, L2(19), 1050000, 800},
+ { 0, { 0 } }
+};
+
+static struct acpu_level acpu_ftbl_pro_2p5g_pvs3[] __initdata = {
+ { 1, { 300000, PLL_0, 0, 0 }, L2(0), 775000, 76},
+ { 0, { 345600, HFPLL, 2, 36 }, L2(1), 775000, 87},
+ { 1, { 422400, HFPLL, 2, 44 }, L2(2), 775000, 106},
+ { 0, { 499200, HFPLL, 2, 52 }, L2(2), 775000, 125},
+ { 0, { 576000, HFPLL, 1, 30 }, L2(3), 775000, 145},
+ { 1, { 652800, HFPLL, 1, 34 }, L2(3), 775000, 164},
+ { 1, { 729600, HFPLL, 1, 38 }, L2(4), 775000, 183},
+ { 0, { 806400, HFPLL, 1, 42 }, L2(4), 775000, 202},
+ { 1, { 883200, HFPLL, 1, 46 }, L2(4), 775000, 222},
+ { 1, { 960000, HFPLL, 1, 50 }, L2(9), 775000, 241},
+ { 1, { 1036800, HFPLL, 1, 54 }, L2(10), 775000, 261},
+ { 0, { 1113600, HFPLL, 1, 58 }, L2(10), 780000, 282},
+ { 1, { 1190400, HFPLL, 1, 62 }, L2(10), 790000, 305},
+ { 1, { 1267200, HFPLL, 1, 66 }, L2(13), 800000, 327},
+ { 0, { 1344000, HFPLL, 1, 70 }, L2(14), 810000, 350},
+ { 0, { 1420800, HFPLL, 1, 74 }, L2(15), 820000, 373},
+ { 1, { 1497600, HFPLL, 1, 78 }, L2(16), 830000, 398},
+ { 1, { 1574400, HFPLL, 1, 82 }, L2(17), 840000, 424},
+ { 0, { 1651200, HFPLL, 1, 86 }, L2(17), 850000, 449},
+ { 1, { 1728000, HFPLL, 1, 90 }, L2(18), 865000, 476},
+ { 0, { 1804800, HFPLL, 1, 94 }, L2(18), 880000, 503},
+ { 0, { 1881600, HFPLL, 1, 98 }, L2(18), 895000, 530},
+ { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 910000, 559},
+ { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 925000, 590},
+ { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 940000, 621},
+ { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 955000, 654},
+ { 1, { 2265600, HFPLL, 1, 118 }, L2(19), 970000, 686},
+ { 0, { 2342400, HFPLL, 1, 122 }, L2(19), 985000, 723},
+ { 0, { 2419200, HFPLL, 1, 126 }, L2(19), 1005000, 761},
+ { 1, { 2496000, HFPLL, 1, 130 }, L2(19), 1025000, 800},
+ { 0, { 0 } }
+};
+
+static struct acpu_level acpu_ftbl_pro_2p5g_pvs4[] __initdata = {
+ { 1, { 300000, PLL_0, 0, 0 }, L2(0), 750000, 76},
+ { 0, { 345600, HFPLL, 2, 36 }, L2(1), 750000, 87},
+ { 1, { 422400, HFPLL, 2, 44 }, L2(2), 750000, 106},
+ { 0, { 499200, HFPLL, 2, 52 }, L2(2), 750000, 125},
+ { 0, { 576000, HFPLL, 1, 30 }, L2(3), 750000, 145},
+ { 1, { 652800, HFPLL, 1, 34 }, L2(3), 750000, 164},
+ { 1, { 729600, HFPLL, 1, 38 }, L2(4), 750000, 183},
+ { 0, { 806400, HFPLL, 1, 42 }, L2(4), 750000, 202},
+ { 1, { 883200, HFPLL, 1, 46 }, L2(4), 750000, 222},
+ { 1, { 960000, HFPLL, 1, 50 }, L2(9), 750000, 241},
+ { 1, { 1036800, HFPLL, 1, 54 }, L2(10), 760000, 261},
+ { 0, { 1113600, HFPLL, 1, 58 }, L2(10), 770000, 282},
+ { 1, { 1190400, HFPLL, 1, 62 }, L2(10), 780000, 305},
+ { 1, { 1267200, HFPLL, 1, 66 }, L2(13), 790000, 327},
+ { 0, { 1344000, HFPLL, 1, 70 }, L2(14), 800000, 350},
+ { 0, { 1420800, HFPLL, 1, 74 }, L2(15), 810000, 373},
+ { 1, { 1497600, HFPLL, 1, 78 }, L2(16), 820000, 398},
+ { 1, { 1574400, HFPLL, 1, 82 }, L2(17), 830000, 424},
+ { 0, { 1651200, HFPLL, 1, 86 }, L2(17), 840000, 449},
+ { 1, { 1728000, HFPLL, 1, 90 }, L2(18), 850000, 476},
+ { 0, { 1804800, HFPLL, 1, 94 }, L2(18), 865000, 503},
+ { 0, { 1881600, HFPLL, 1, 98 }, L2(18), 880000, 530},
+ { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 895000, 559},
+ { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 910000, 590},
+ { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 925000, 621},
+ { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 940000, 654},
+ { 1, { 2265600, HFPLL, 1, 118 }, L2(19), 955000, 686},
+ { 0, { 2342400, HFPLL, 1, 122 }, L2(19), 970000, 723},
+ { 0, { 2419200, HFPLL, 1, 126 }, L2(19), 985000, 761},
+ { 1, { 2496000, HFPLL, 1, 130 }, L2(19), 1000000, 800},
+ { 0, { 0 } }
+};
+
+static struct acpu_level acpu_ftbl_pro_2p5g_pvs5[] __initdata = {
+ { 1, { 300000, PLL_0, 0, 0 }, L2(0), 750000, 76},
+ { 0, { 345600, HFPLL, 2, 36 }, L2(1), 750000, 87},
+ { 1, { 422400, HFPLL, 2, 44 }, L2(2), 750000, 106},
+ { 0, { 499200, HFPLL, 2, 52 }, L2(2), 750000, 125},
+ { 0, { 576000, HFPLL, 1, 30 }, L2(3), 750000, 145},
+ { 1, { 652800, HFPLL, 1, 34 }, L2(3), 750000, 164},
+ { 1, { 729600, HFPLL, 1, 38 }, L2(4), 750000, 183},
+ { 0, { 806400, HFPLL, 1, 42 }, L2(4), 750000, 202},
+ { 1, { 883200, HFPLL, 1, 46 }, L2(4), 750000, 222},
+ { 1, { 960000, HFPLL, 1, 50 }, L2(9), 750000, 241},
+ { 1, { 1036800, HFPLL, 1, 54 }, L2(10), 750000, 261},
+ { 0, { 1113600, HFPLL, 1, 58 }, L2(10), 760000, 282},
+ { 1, { 1190400, HFPLL, 1, 62 }, L2(10), 770000, 305},
+ { 1, { 1267200, HFPLL, 1, 66 }, L2(13), 780000, 327},
+ { 0, { 1344000, HFPLL, 1, 70 }, L2(14), 790000, 350},
+ { 0, { 1420800, HFPLL, 1, 74 }, L2(15), 800000, 373},
+ { 1, { 1497600, HFPLL, 1, 78 }, L2(16), 810000, 398},
+ { 1, { 1574400, HFPLL, 1, 82 }, L2(17), 820000, 424},
+ { 0, { 1651200, HFPLL, 1, 86 }, L2(17), 830000, 449},
+ { 1, { 1728000, HFPLL, 1, 90 }, L2(18), 840000, 476},
+ { 0, { 1804800, HFPLL, 1, 94 }, L2(18), 850000, 503},
+ { 0, { 1881600, HFPLL, 1, 98 }, L2(18), 860000, 530},
+ { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 870000, 559},
+ { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 885000, 590},
+ { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 900000, 621},
+ { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 915000, 654},
+ { 1, { 2265600, HFPLL, 1, 118 }, L2(19), 930000, 686},
+ { 0, { 2342400, HFPLL, 1, 122 }, L2(19), 945000, 723},
+ { 0, { 2419200, HFPLL, 1, 126 }, L2(19), 960000, 761},
+ { 1, { 2496000, HFPLL, 1, 130 }, L2(19), 975000, 800},
+ { 0, { 0 } }
+};
+
+static struct acpu_level acpu_ftbl_pro_2p5g_pvs6[] __initdata = {
+ { 1, { 300000, PLL_0, 0, 0 }, L2(0), 725000, 76},
+ { 0, { 345600, HFPLL, 2, 36 }, L2(1), 725000, 87},
+ { 1, { 422400, HFPLL, 2, 44 }, L2(2), 725000, 106},
+ { 0, { 499200, HFPLL, 2, 52 }, L2(2), 725000, 125},
+ { 0, { 576000, HFPLL, 1, 30 }, L2(3), 725000, 145},
+ { 1, { 652800, HFPLL, 1, 34 }, L2(3), 725000, 164},
+ { 1, { 729600, HFPLL, 1, 38 }, L2(4), 725000, 183},
+ { 0, { 806400, HFPLL, 1, 42 }, L2(4), 725000, 202},
+ { 1, { 883200, HFPLL, 1, 46 }, L2(4), 725000, 222},
+ { 1, { 960000, HFPLL, 1, 50 }, L2(9), 725000, 241},
+ { 1, { 1036800, HFPLL, 1, 54 }, L2(10), 735000, 261},
+ { 0, { 1113600, HFPLL, 1, 58 }, L2(10), 745000, 282},
+ { 1, { 1190400, HFPLL, 1, 62 }, L2(10), 755000, 305},
+ { 1, { 1267200, HFPLL, 1, 66 }, L2(13), 765000, 327},
+ { 0, { 1344000, HFPLL, 1, 70 }, L2(14), 775000, 350},
+ { 0, { 1420800, HFPLL, 1, 74 }, L2(15), 785000, 373},
+ { 1, { 1497600, HFPLL, 1, 78 }, L2(16), 795000, 398},
+ { 1, { 1574400, HFPLL, 1, 82 }, L2(17), 805000, 424},
+ { 0, { 1651200, HFPLL, 1, 86 }, L2(17), 815000, 449},
+ { 1, { 1728000, HFPLL, 1, 90 }, L2(18), 825000, 476},
+ { 0, { 1804800, HFPLL, 1, 94 }, L2(18), 835000, 503},
+ { 0, { 1881600, HFPLL, 1, 98 }, L2(18), 845000, 530},
+ { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 855000, 559},
+ { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 865000, 590},
+ { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 875000, 621},
+ { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 890000, 654},
+ { 1, { 2265600, HFPLL, 1, 118 }, L2(19), 905000, 686},
+ { 0, { 2342400, HFPLL, 1, 122 }, L2(19), 920000, 723},
+ { 0, { 2419200, HFPLL, 1, 126 }, L2(19), 935000, 761},
+ { 1, { 2496000, HFPLL, 1, 130 }, L2(19), 950000, 800},
+ { 0, { 0 } }
+};
static struct pvs_table pvs_v1[NUM_SPEED_BINS][NUM_PVS] __initdata = {
/* 8974v1 1.7GHz Parts */
@@ -974,45 +1396,45 @@
};
static struct pvs_table pvs_pro[NUM_SPEED_BINS][NUM_PVS] __initdata = {
- /* Not used by 8974Pro */
- [0][0] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [0][1] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [0][2] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [0][3] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [0][4] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [0][5] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [0][6] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [0][7] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
+ /* 2.0 GHz is not used on 8974Pro */
+ [0][0] = { acpu_freq_tbl_2g_pvs0, sizeof(acpu_freq_tbl_2g_pvs0) },
+ [0][1] = { acpu_freq_tbl_2g_pvs1, sizeof(acpu_freq_tbl_2g_pvs1) },
+ [0][2] = { acpu_freq_tbl_2g_pvs2, sizeof(acpu_freq_tbl_2g_pvs2) },
+ [0][3] = { acpu_freq_tbl_2g_pvs3, sizeof(acpu_freq_tbl_2g_pvs3) },
+ [0][4] = { acpu_freq_tbl_2g_pvs4, sizeof(acpu_freq_tbl_2g_pvs4) },
+ [0][5] = { acpu_freq_tbl_2g_pvs5, sizeof(acpu_freq_tbl_2g_pvs5) },
+ [0][6] = { acpu_freq_tbl_2g_pvs6, sizeof(acpu_freq_tbl_2g_pvs6) },
+ [0][7] = { acpu_freq_tbl_2g_pvs6, sizeof(acpu_freq_tbl_2g_pvs6) },
- /* 8974Pro AB Bringup */
- [1][0] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [1][1] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [1][2] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [1][3] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [1][4] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [1][5] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [1][6] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [1][7] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
+ /* 8974Pro AB 2.3GHz */
+ [1][0] = { acpu_ftbl_pro_2p3g_pvs0, sizeof(acpu_ftbl_pro_2p3g_pvs0) },
+ [1][1] = { acpu_ftbl_pro_2p3g_pvs1, sizeof(acpu_ftbl_pro_2p3g_pvs1) },
+ [1][2] = { acpu_ftbl_pro_2p3g_pvs2, sizeof(acpu_ftbl_pro_2p3g_pvs2) },
+ [1][3] = { acpu_ftbl_pro_2p3g_pvs3, sizeof(acpu_ftbl_pro_2p3g_pvs3) },
+ [1][4] = { acpu_ftbl_pro_2p3g_pvs4, sizeof(acpu_ftbl_pro_2p3g_pvs4) },
+ [1][5] = { acpu_ftbl_pro_2p3g_pvs5, sizeof(acpu_ftbl_pro_2p3g_pvs5) },
+ [1][6] = { acpu_ftbl_pro_2p3g_pvs6, sizeof(acpu_ftbl_pro_2p3g_pvs6) },
+ [1][7] = { acpu_ftbl_pro_2p3g_pvs6, sizeof(acpu_ftbl_pro_2p3g_pvs6) },
- /* Not used by 8974Pro */
- [2][0] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [2][1] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [2][2] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [2][3] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [2][4] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [2][5] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [2][6] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [2][7] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
+ /* 2.2GHz is not used on 8974Pro */
+ [2][0] = { acpu_freq_tbl_2p2g_pvs0, sizeof(acpu_freq_tbl_2p2g_pvs0) },
+ [2][1] = { acpu_freq_tbl_2p2g_pvs1, sizeof(acpu_freq_tbl_2p2g_pvs1) },
+ [2][2] = { acpu_freq_tbl_2p2g_pvs2, sizeof(acpu_freq_tbl_2p2g_pvs2) },
+ [2][3] = { acpu_freq_tbl_2p2g_pvs3, sizeof(acpu_freq_tbl_2p2g_pvs3) },
+ [2][4] = { acpu_freq_tbl_2p2g_pvs4, sizeof(acpu_freq_tbl_2p2g_pvs4) },
+ [2][5] = { acpu_freq_tbl_2p2g_pvs5, sizeof(acpu_freq_tbl_2p2g_pvs5) },
+ [2][6] = { acpu_freq_tbl_2p2g_pvs6, sizeof(acpu_freq_tbl_2p2g_pvs6) },
+ [2][7] = { acpu_freq_tbl_2p2g_pvs6, sizeof(acpu_freq_tbl_2p2g_pvs6) },
- /* 8974Pro Bringup */
- [3][0] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [3][1] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [3][2] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [3][3] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [3][4] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [3][5] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [3][6] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
- [3][7] = { acpu_freq_tbl_pro_pvs0, sizeof(acpu_freq_tbl_pro_pvs0) },
+ /* 8974Pro AC 2.5GHz */
+ [3][0] = { acpu_ftbl_pro_2p5g_pvs0, sizeof(acpu_ftbl_pro_2p5g_pvs0) },
+ [3][1] = { acpu_ftbl_pro_2p5g_pvs1, sizeof(acpu_ftbl_pro_2p5g_pvs1) },
+ [3][2] = { acpu_ftbl_pro_2p5g_pvs2, sizeof(acpu_ftbl_pro_2p5g_pvs2) },
+ [3][3] = { acpu_ftbl_pro_2p5g_pvs3, sizeof(acpu_ftbl_pro_2p5g_pvs3) },
+ [3][4] = { acpu_ftbl_pro_2p5g_pvs4, sizeof(acpu_ftbl_pro_2p5g_pvs4) },
+ [3][5] = { acpu_ftbl_pro_2p5g_pvs5, sizeof(acpu_ftbl_pro_2p5g_pvs5) },
+ [3][6] = { acpu_ftbl_pro_2p5g_pvs6, sizeof(acpu_ftbl_pro_2p5g_pvs6) },
+ [3][7] = { acpu_ftbl_pro_2p5g_pvs6, sizeof(acpu_ftbl_pro_2p5g_pvs6) },
};
static struct msm_bus_scale_pdata bus_scale_data __initdata = {
diff --git a/arch/arm/mach-msm/acpuclock-krait.c b/arch/arm/mach-msm/acpuclock-krait.c
index e3a3f54..ba162a1 100644
--- a/arch/arm/mach-msm/acpuclock-krait.c
+++ b/arch/arm/mach-msm/acpuclock-krait.c
@@ -61,8 +61,8 @@
u32 regval;
regval = get_l2_indirect_reg(sc->l2cpmr_iaddr);
- regval &= ~0x3;
- regval |= (pri_src_sel & 0x3);
+ regval &= ~(0x3 | (0x3 << 8));
+ regval |= pri_src_sel | (pri_src_sel << 8);
set_l2_indirect_reg(sc->l2cpmr_iaddr, regval);
/* Wait for switch to complete. */
mb();
@@ -75,8 +75,8 @@
u32 regval;
regval = get_l2_indirect_reg(sc->l2cpmr_iaddr);
- regval &= ~(0x3 << 2);
- regval |= ((sec_src_sel & 0x3) << 2);
+ regval &= ~((0x3 << 2) | (0x3 << 10));
+ regval |= (sec_src_sel << 2) | (sec_src_sel << 10);
set_l2_indirect_reg(sc->l2cpmr_iaddr, regval);
/* Wait for switch to complete. */
mb();
@@ -784,7 +784,7 @@
/* Set PRI_SRC_SEL_HFPLL_DIV2 divider to div-2. */
regval = get_l2_indirect_reg(sc->l2cpmr_iaddr);
- regval &= ~(0x3 << 6);
+ regval &= ~(0x3 << 6 | 0x3 << 14);
set_l2_indirect_reg(sc->l2cpmr_iaddr, regval);
/* Enable and switch to the target clock source. */
diff --git a/arch/arm/mach-msm/clock-8226.c b/arch/arm/mach-msm/clock-8226.c
index c4097ca..b72cdab 100644
--- a/arch/arm/mach-msm/clock-8226.c
+++ b/arch/arm/mach-msm/clock-8226.c
@@ -353,7 +353,6 @@
#define GPLL1_N_VAL (0x004C)
#define GPLL1_USER_CTL (0x0050)
#define GPLL1_STATUS (0x005C)
-#define PERIPH_NOC_AHB_CBCR (0x0184)
#define NOC_CONF_XPU_AHB_CBCR (0x01C0)
#define MMSS_NOC_CFG_AHB_CBCR (0x024C)
#define MSS_CFG_AHB_CBCR (0x0280)
@@ -1394,17 +1393,6 @@
},
};
-static struct branch_clk gcc_periph_noc_ahb_clk = {
- .cbcr_reg = PERIPH_NOC_AHB_CBCR,
- .has_sibling = 1,
- .base = &virt_bases[GCC_BASE],
- .c = {
- .dbg_name = "gcc_periph_noc_ahb_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(gcc_periph_noc_ahb_clk.c),
- },
-};
-
static struct local_vote_clk gcc_prng_ahb_clk = {
.cbcr_reg = PRNG_AHB_CBCR,
.vote_reg = APCS_CLOCK_BRANCH_ENA_VOTE,
@@ -1571,7 +1559,6 @@
};
static struct measure_mux_entry measure_mux_GCC[] = {
- { &gcc_periph_noc_ahb_clk.c, GCC_BASE, 0x0010 },
{ &gcc_mss_cfg_ahb_clk.c, GCC_BASE, 0x0030 },
{ &gcc_mss_q6_bimc_axi_clk.c, GCC_BASE, 0x0031 },
{ &gcc_usb_hsic_ahb_clk.c, GCC_BASE, 0x0058 },
diff --git a/arch/arm/mach-msm/include/mach/qpnp-int.h b/arch/arm/mach-msm/include/mach/qpnp-int.h
index 2b86216..1f31ea5 100644
--- a/arch/arm/mach-msm/include/mach/qpnp-int.h
+++ b/arch/arm/mach-msm/include/mach/qpnp-int.h
@@ -71,6 +71,28 @@
*/
int qpnpint_handle_irq(struct spmi_controller *spmi_ctrl,
struct qpnp_irq_spec *spec);
+
+/**
+ * qpnpint_show_irq - Prints the Linux interrupt number
+ *
+ * Pass a PMIC Arbiter interrupt to Linux.
+ */
+int qpnpint_show_irq(struct spmi_controller *spmi_ctrl,
+ struct qpnp_irq_spec *spec);
+
+#ifdef CONFIG_MSM_SHOW_RESUME_IRQ
+extern int msm_show_resume_irq_mask;
+static inline bool qpnpint_show_resume_irq(void)
+{
+ return msm_show_resume_irq_mask;
+}
+#else
+static inline bool qpnpint_show_resume_irq(void)
+{
+ return false;
+}
+#endif
+
#else
static inline int __init qpnpint_of_init(struct device_node *node,
struct device_node *parent)
@@ -97,5 +119,15 @@
{
return -ENXIO;
}
+int qpnpint_show_irq(struct spmi_controller *spmi_ctrl,
+ struct qpnp_irq_spec *spec)
+{
+ return -ENXIO;
+}
+
+static inline bool qpnpint_show_resume_irq(void)
+{
+ return false;
+}
#endif /* CONFIG_MSM_QPNP_INT */
#endif /* QPNPINT_H */
diff --git a/arch/arm/mach-msm/mpm-of.c b/arch/arm/mach-msm/mpm-of.c
index a0746f9..e364393 100644
--- a/arch/arm/mach-msm/mpm-of.c
+++ b/arch/arm/mach-msm/mpm-of.c
@@ -219,12 +219,16 @@
hlist_for_each_entry(node, elem, &irq_hash[hashfn(d->hwirq)], node) {
if ((node->hwirq == d->hwirq)
&& (d->domain == node->domain)) {
- /* Update the linux irq mapping */
- msm_mpm_irqs_m2a[node->pin] = d->irq;
+ /*
+ * Update the linux irq mapping. No update required for
+ * bypass interrupts
+ */
+ if (node->pin != 0xff)
+ msm_mpm_irqs_m2a[node->pin] = d->irq;
break;
}
}
- return node ? node->pin : 0;
+ return elem ? node->pin : 0;
}
static int msm_mpm_enable_irq_exclusive(
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_arb.c b/arch/arm/mach-msm/msm_bus/msm_bus_arb.c
index 3ff7530..058e409 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_arb.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_arb.c
@@ -652,15 +652,6 @@
MSM_BUS_DBG("ab: %llu ib: %llu\n", curr_bw, curr_clk);
}
- if (index == 0) {
- /* This check protects the bus driver from clients
- * that can leave non-zero requests after
- * unregistering.
- * */
- req_clk = 0;
- req_bw = 0;
- }
-
if (!pdata->active_only) {
ret = update_path(src, pnode, req_clk, req_bw,
curr_clk, curr_bw, 0, pdata->active_only);
@@ -782,11 +773,47 @@
*/
void msm_bus_scale_unregister_client(uint32_t cl)
{
+ int i;
struct msm_bus_client *client = (struct msm_bus_client *)(cl);
+ bool warn = false;
if (IS_ERR_OR_NULL(client))
return;
- if (client->curr != 0)
+
+ for (i = 0; i < client->pdata->usecase->num_paths; i++) {
+ if ((client->pdata->usecase[0].vectors[i].ab) ||
+ (client->pdata->usecase[0].vectors[i].ib)) {
+ warn = true;
+ break;
+ }
+ }
+
+ if (warn) {
+ int num_paths = client->pdata->usecase->num_paths;
+ int ab[num_paths], ib[num_paths];
+ WARN(1, "%s called unregister with non-zero vectors\n",
+ client->pdata->name);
+
+ /*
+ * Save client values and zero them out to
+ * cleanly unregister
+ */
+ for (i = 0; i < num_paths; i++) {
+ ab[i] = client->pdata->usecase[0].vectors[i].ab;
+ ib[i] = client->pdata->usecase[0].vectors[i].ib;
+ client->pdata->usecase[0].vectors[i].ab = 0;
+ client->pdata->usecase[0].vectors[i].ib = 0;
+ }
+
msm_bus_scale_client_update_request(cl, 0);
+
+ /* Restore client vectors if required for re-registering. */
+ for (i = 0; i < num_paths; i++) {
+ client->pdata->usecase[0].vectors[i].ab = ab[i];
+ client->pdata->usecase[0].vectors[i].ib = ib[i];
+ }
+ } else if (client->curr != 0)
+ msm_bus_scale_client_update_request(cl, 0);
+
MSM_BUS_DBG("Unregistering client %d\n", cl);
mutex_lock(&msm_bus_lock);
msm_bus_scale_client_reset_pnodes(cl);
diff --git a/arch/arm/mach-msm/msm_rtb.c b/arch/arm/mach-msm/msm_rtb.c
index fdf39be..28b2195 100644
--- a/arch/arm/mach-msm/msm_rtb.c
+++ b/arch/arm/mach-msm/msm_rtb.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -89,7 +89,7 @@
.notifier_call = msm_rtb_panic_notifier,
};
-int msm_rtb_event_should_log(enum logk_event_type log_type)
+int notrace msm_rtb_event_should_log(enum logk_event_type log_type)
{
return msm_rtb.initialized && msm_rtb.enabled &&
((1 << (log_type & ~LOGTYPE_NOPC)) & msm_rtb.filter);
@@ -203,7 +203,7 @@
}
#endif
-int uncached_logk_pc(enum logk_event_type log_type, void *caller,
+int notrace uncached_logk_pc(enum logk_event_type log_type, void *caller,
void *data)
{
int i;
@@ -219,7 +219,7 @@
}
EXPORT_SYMBOL(uncached_logk_pc);
-noinline int uncached_logk(enum logk_event_type log_type, void *data)
+noinline int notrace uncached_logk(enum logk_event_type log_type, void *data)
{
return uncached_logk_pc(log_type, __builtin_return_address(0), data);
}
diff --git a/block/blk-core.c b/block/blk-core.c
index 40d9b35..123f79a 100644
--- a/block/blk-core.c
+++ b/block/blk-core.c
@@ -2058,8 +2058,10 @@
* not be passed by new incoming requests
*/
rq->cmd_flags |= REQ_STARTED;
- if (rq->cmd_flags & REQ_URGENT)
+ if (rq->cmd_flags & REQ_URGENT) {
+ WARN_ON(q->dispatched_urgent);
q->dispatched_urgent = true;
+ }
trace_block_rq_issue(q, rq);
}
diff --git a/block/cfq-iosched.c b/block/cfq-iosched.c
index b4711cb..32629e2 100644
--- a/block/cfq-iosched.c
+++ b/block/cfq-iosched.c
@@ -239,9 +239,6 @@
unsigned long workload_expires;
struct cfq_group *serving_group;
- unsigned int nr_urgent_pending;
- unsigned int nr_urgent_in_flight;
-
/*
* Each priority tree is sorted by next_request position. These
* trees are used when determining if two or more queues are
@@ -2094,14 +2091,6 @@
(RQ_CFQG(rq))->dispatched++;
elv_dispatch_sort(q, rq);
- if (rq->cmd_flags & REQ_URGENT) {
- if (!cfqd->nr_urgent_pending)
- WARN_ON(1);
- else
- cfqd->nr_urgent_pending--;
- cfqd->nr_urgent_in_flight++;
- }
-
cfqd->rq_in_flight[cfq_cfqq_sync(cfqq)]++;
cfqq->nr_sectors += blk_rq_sectors(rq);
cfq_blkiocg_update_dispatch_stats(&cfqq->cfqg->blkg, blk_rq_bytes(rq),
@@ -3205,69 +3194,6 @@
}
}
-/*
- * Called when a request (rq) is reinserted (to cfqq). Check if there's
- * something we should do about it
- */
-static void
-cfq_rq_requeued(struct cfq_data *cfqd, struct cfq_queue *cfqq,
- struct request *rq)
-{
- struct cfq_io_cq *cic = RQ_CIC(rq);
-
- cfqd->rq_queued++;
- if (rq->cmd_flags & REQ_PRIO)
- cfqq->prio_pending++;
-
- cfqq->dispatched--;
- (RQ_CFQG(rq))->dispatched--;
-
- cfqd->rq_in_flight[cfq_cfqq_sync(cfqq)]--;
-
- cfq_update_io_thinktime(cfqd, cfqq, cic);
- cfq_update_io_seektime(cfqd, cfqq, rq);
- cfq_update_idle_window(cfqd, cfqq, cic);
-
- cfqq->last_request_pos = blk_rq_pos(rq) + blk_rq_sectors(rq);
-
- if (cfqq == cfqd->active_queue) {
- if (cfq_cfqq_wait_request(cfqq)) {
- if (blk_rq_bytes(rq) > PAGE_CACHE_SIZE ||
- cfqd->busy_queues > 1) {
- cfq_del_timer(cfqd, cfqq);
- cfq_clear_cfqq_wait_request(cfqq);
- } else {
- cfq_blkiocg_update_idle_time_stats(
- &cfqq->cfqg->blkg);
- cfq_mark_cfqq_must_dispatch(cfqq);
- }
- }
- } else if (cfq_should_preempt(cfqd, cfqq, rq)) {
- cfq_preempt_queue(cfqd, cfqq);
- }
-}
-
-static int cfq_reinsert_request(struct request_queue *q, struct request *rq)
-{
- struct cfq_data *cfqd = q->elevator->elevator_data;
- struct cfq_queue *cfqq = RQ_CFQQ(rq);
-
- if (!cfqq || cfqq->cfqd != cfqd)
- return -EIO;
-
- cfq_log_cfqq(cfqd, cfqq, "re-insert_request");
- list_add(&rq->queuelist, &cfqq->fifo);
- cfq_add_rq_rb(rq);
-
- cfq_rq_requeued(cfqd, cfqq, rq);
- if (rq->cmd_flags & REQ_URGENT) {
- if (cfqd->nr_urgent_in_flight)
- cfqd->nr_urgent_in_flight--;
- cfqd->nr_urgent_pending++;
- }
- return 0;
-}
-
static void cfq_insert_request(struct request_queue *q, struct request *rq)
{
struct cfq_data *cfqd = q->elevator->elevator_data;
@@ -3282,45 +3208,7 @@
cfq_blkiocg_update_io_add_stats(&(RQ_CFQG(rq))->blkg,
&cfqd->serving_group->blkg, rq_data_dir(rq),
rq_is_sync(rq));
-
cfq_rq_enqueued(cfqd, cfqq, rq);
-
- if (rq->cmd_flags & REQ_URGENT) {
- WARN_ON(1);
- blk_dump_rq_flags(rq, "");
- rq->cmd_flags &= ~REQ_URGENT;
- }
-
- /* Request is considered URGENT if:
- * 1. The queue being served is of a lower IO priority then the new
- * request
- * OR:
- * 2. The workload being performed is ASYNC
- * Only READ requests may be considered as URGENT
- */
- if ((cfqd->active_queue &&
- cfqq->ioprio_class < cfqd->active_queue->ioprio_class) ||
- (cfqd->serving_type == ASYNC_WORKLOAD &&
- rq_data_dir(rq) == READ)) {
- rq->cmd_flags |= REQ_URGENT;
- cfqd->nr_urgent_pending++;
- }
-}
-
-
-/**
- * cfq_urgent_pending() - Return TRUE if there is an urgent
- * request on scheduler
- * @q: requests queue
- */
-static bool cfq_urgent_pending(struct request_queue *q)
-{
- struct cfq_data *cfqd = q->elevator->elevator_data;
-
- if (cfqd->nr_urgent_pending && !cfqd->nr_urgent_in_flight)
- return true;
-
- return false;
}
/*
@@ -3404,14 +3292,6 @@
const int sync = rq_is_sync(rq);
unsigned long now;
- if (rq->cmd_flags & REQ_URGENT) {
- if (!cfqd->nr_urgent_in_flight)
- WARN_ON(1);
- else
- cfqd->nr_urgent_in_flight--;
- rq->cmd_flags &= ~REQ_URGENT;
- }
-
now = jiffies;
cfq_log_cfqq(cfqd, cfqq, "complete rqnoidle %d",
!!(rq->cmd_flags & REQ_NOIDLE));
@@ -3979,8 +3859,6 @@
.elevator_bio_merged_fn = cfq_bio_merged,
.elevator_dispatch_fn = cfq_dispatch_requests,
.elevator_add_req_fn = cfq_insert_request,
- .elevator_reinsert_req_fn = cfq_reinsert_request,
- .elevator_is_urgent_fn = cfq_urgent_pending,
.elevator_activate_req_fn = cfq_activate_request,
.elevator_deactivate_req_fn = cfq_deactivate_request,
.elevator_completed_req_fn = cfq_completed_request,
diff --git a/block/elevator.c b/block/elevator.c
index 55f1f1e..44193a8 100644
--- a/block/elevator.c
+++ b/block/elevator.c
@@ -842,6 +842,7 @@
if (rq->cmd_flags & REQ_URGENT) {
q->notified_urgent = false;
+ WARN_ON(!q->dispatched_urgent);
q->dispatched_urgent = false;
}
/*
diff --git a/drivers/base/sync.c b/drivers/base/sync.c
index 2e35996..abde6d9 100644
--- a/drivers/base/sync.c
+++ b/drivers/base/sync.c
@@ -34,7 +34,7 @@
static void sync_fence_signal_pt(struct sync_pt *pt);
static int _sync_pt_has_signaled(struct sync_pt *pt);
static void sync_fence_free(struct kref *kref);
-static void sync_dump(void);
+static void sync_dump(struct sync_fence *fence);
static LIST_HEAD(sync_timeline_list_head);
static DEFINE_SPINLOCK(sync_timeline_list_lock);
@@ -611,7 +611,7 @@
if (fence->status < 0) {
pr_info("fence error %d on [%p]\n", fence->status, fence);
- sync_dump();
+ sync_dump(fence);
return fence->status;
}
@@ -619,7 +619,7 @@
if (timeout > 0) {
pr_info("fence timeout on [%p] after %dms\n", fence,
jiffies_to_msecs(timeout));
- sync_dump();
+ sync_dump(fence);
}
return -ETIME;
}
@@ -986,7 +986,7 @@
#define DUMP_CHUNK 256
static char sync_dump_buf[64 * 1024];
-void sync_dump(void)
+static void sync_dump(struct sync_fence *fence)
{
struct seq_file s = {
.buf = sync_dump_buf,
@@ -994,7 +994,9 @@
};
int i;
- sync_debugfs_show(&s, NULL);
+ seq_printf(&s, "fence:\n--------------\n");
+ sync_print_fence(&s, fence);
+ seq_printf(&s, "\n");
for (i = 0; i < s.count; i += DUMP_CHUNK) {
if ((s.count - i) > DUMP_CHUNK) {
@@ -1009,7 +1011,7 @@
}
}
#else
-static void sync_dump(void)
+static void sync_dump(struct sync_fence *fence)
{
}
#endif
diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c
index 2a6fe62..dcaa4e1 100644
--- a/drivers/gpu/msm/adreno.c
+++ b/drivers/gpu/msm/adreno.c
@@ -912,7 +912,6 @@
static bool adreno_use_default_setstate(struct adreno_device *adreno_dev)
{
return (adreno_isidle(&adreno_dev->dev) ||
- adreno_dev->drawctxt_active == NULL ||
KGSL_STATE_ACTIVE != adreno_dev->dev.state ||
atomic_read(&adreno_dev->dev.active_cnt) == 0 ||
adreno_dev->dev.cff_dump_enable);
diff --git a/drivers/hwmon/qpnp-adc-current.c b/drivers/hwmon/qpnp-adc-current.c
index 2933714..2d70faa 100644
--- a/drivers/hwmon/qpnp-adc-current.c
+++ b/drivers/hwmon/qpnp-adc-current.c
@@ -373,9 +373,9 @@
#define QPNP_COEFF_3_TYPEA 1700000
#define QPNP_COEFF_3_TYPEB 1000000
#define QPNP_COEFF_4 100
-#define QPNP_COEFF_5 15000
+#define QPNP_COEFF_5 15
#define QPNP_COEFF_6 100000
-#define QPNP_COEFF_7 21700
+#define QPNP_COEFF_7 21
#define QPNP_COEFF_8 100000000
#define QPNP_COEFF_9 38
#define QPNP_COEFF_10 40
@@ -549,19 +549,18 @@
temp_var = (coeff_a * die_temp) + coeff_b;
temp_var = div64_s64(temp_var, QPNP_COEFF_4);
- temp_var = 1000000 * (1000000 - temp_var);
+ temp_var = 1000 * (1000000 - temp_var);
if (!iadc->iadc_comp.ext_rsense) {
/* internal rsense */
- *result = div64_s64(*result * 1000000, temp_var);
+ *result = div64_s64(*result * 1000, temp_var);
}
if (iadc->iadc_comp.ext_rsense) {
/* external rsense */
sys_gain_coeff = (1000000 +
div64_s64(sys_gain_coeff, QPNP_COEFF_4));
- temp_var = div64_s64(temp_var * sys_gain_coeff,
- 1000000000);
+ temp_var = div64_s64(temp_var * sys_gain_coeff, 1000000);
*result = div64_s64(*result * 1000, temp_var);
}
pr_debug("%lld compensated into %lld\n", old, *result);
diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig
index aaa2fc8..716ea0d 100644
--- a/drivers/input/misc/Kconfig
+++ b/drivers/input/misc/Kconfig
@@ -704,4 +704,14 @@
To compile this driver as a module, choose M here: the
module will be called stk3x1x.
+config SENSORS_CAPELLA_CM36283
+ tristate "CM36283 proximity and light sensor"
+ depends on I2C
+ default n
+ help
+ Say Y here to enable the CM36283 Proximity
+ Sensor with Ambient Light Sensor.
+
+ To compile this driver as a module, choose M here: the
+ module will be called CM36283.
endif
diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile
index 445fba0..c927e0e 100644
--- a/drivers/input/misc/Makefile
+++ b/drivers/input/misc/Makefile
@@ -65,3 +65,4 @@
obj-$(CONFIG_BMP18X_I2C) += bmp18x-i2c.o
obj-$(CONFIG_SENSORS_MMA8X5X) += mma8x5x.o
obj-$(CONFIG_SENSORS_STK3X1X) += stk3x1x.o
+obj-$(CONFIG_SENSORS_CAPELLA_CM36283) += cm36283.o
diff --git a/drivers/input/misc/cm36283.c b/drivers/input/misc/cm36283.c
index a9f8140..d850a0e 100644
--- a/drivers/input/misc/cm36283.c
+++ b/drivers/input/misc/cm36283.c
@@ -2,7 +2,9 @@
*
* Copyright (C) 2012 Capella Microsystems Inc.
* Author: Frank Hsieh <pengyueh@gmail.com>
- *
+ *
+ * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
@@ -32,6 +34,7 @@
#include <linux/wakelock.h>
#include <linux/jiffies.h>
#include <linux/cm36283.h>
+#include <linux/of_gpio.h>
#include <asm/uaccess.h>
#include <asm/mach-types.h>
@@ -53,7 +56,31 @@
#define CM36283_VI2C_MIN_UV 1750000
#define CM36283_VI2C_MAX_UV 1950000
+/* cm36283 polling rate in ms */
+#define CM36283_LS_MIN_POLL_DELAY 1
+#define CM36283_LS_MAX_POLL_DELAY 1000
+#define CM36283_LS_DEFAULT_POLL_DELAY 100
+
+#define CM36283_PS_MIN_POLL_DELAY 1
+#define CM36283_PS_MAX_POLL_DELAY 1000
+#define CM36283_PS_DEFAULT_POLL_DELAY 100
+
static int record_init_fail = 0;
+
+static const int als_range[] = {
+ [CM36283_ALS_IT0] = 6554,
+ [CM36283_ALS_IT1] = 3277,
+ [CM36283_ALS_IT2] = 1638,
+ [CM36283_ALS_IT3] = 819,
+};
+
+static const int als_sense[] = {
+ [CM36283_ALS_IT0] = 10,
+ [CM36283_ALS_IT1] = 20,
+ [CM36283_ALS_IT2] = 40,
+ [CM36283_ALS_IT3] = 80,
+};
+
static void sensor_irq_do_work(struct work_struct *work);
static DECLARE_WORK(sensor_irq_work, sensor_irq_do_work);
@@ -101,23 +128,30 @@
uint16_t ls_cmd;
uint8_t record_clear_int_fail;
-
+ bool polling;
+ atomic_t ls_poll_delay;
+ atomic_t ps_poll_delay;
struct regulator *vdd;
struct regulator *vio;
+ struct delayed_work ldwork;
+ struct delayed_work pdwork;
};
struct cm36283_info *lp_info;
int fLevel=-1;
static struct mutex als_enable_mutex, als_disable_mutex, als_get_adc_mutex;
static struct mutex ps_enable_mutex, ps_disable_mutex, ps_get_adc_mutex;
static struct mutex CM36283_control_mutex;
+static struct mutex wq_lock;
static int lightsensor_enable(struct cm36283_info *lpi);
static int lightsensor_disable(struct cm36283_info *lpi);
static int initial_cm36283(struct cm36283_info *lpi);
static void psensor_initial_cmd(struct cm36283_info *lpi);
+static int cm36283_power_set(struct cm36283_info *info, bool on);
int32_t als_kadc;
-static int control_and_report(struct cm36283_info *lpi, uint8_t mode, uint16_t param);
+static int control_and_report(struct cm36283_info *lpi, uint8_t mode,
+ uint16_t param, int report);
static int I2C_RxData(uint16_t slaveAddr, uint8_t cmd, uint8_t *rxData, int length)
{
@@ -382,12 +416,91 @@
{
struct cm36283_info *lpi = lp_info;
uint16_t intFlag;
- _cm36283_I2C_Read_Word(lpi->slave_addr, INT_FLAG, &intFlag);
- control_and_report(lpi, CONTROL_INT_ISR_REPORT, intFlag);
-
+ _cm36283_I2C_Read_Word(lpi->slave_addr, INT_FLAG, &intFlag);
+ control_and_report(lpi, CONTROL_INT_ISR_REPORT, intFlag, 1);
+
enable_irq(lpi->irq);
}
+static int get_als_range(void)
+{
+ uint16_t ls_conf;
+ int ret = 0;
+ int index = 0;
+ struct cm36283_info *lpi = lp_info;
+
+ ret = _cm36283_I2C_Read_Word(lpi->slave_addr, ALS_CONF, &ls_conf);
+ if (ret) {
+ dev_err(&lpi->i2c_client->dev, "read ALS_CONF from i2c error. %d\n",
+ ret);
+ return -EIO;
+ }
+
+ index = (ls_conf & 0xC0) >> 0x06;
+ return als_range[index];
+}
+
+static int get_als_sense(void)
+{
+ uint16_t ls_conf;
+ int ret = 0;
+ int index = 0;
+ struct cm36283_info *lpi = lp_info;
+
+ ret = _cm36283_I2C_Read_Word(lpi->slave_addr, ALS_CONF, &ls_conf);
+ if (ret) {
+ dev_err(&lpi->i2c_client->dev, "read ALS_CONF from i2c error. %d\n",
+ ret);
+ return -EIO;
+ }
+
+ index = (ls_conf & 0xC0) >> 0x06;
+ return als_sense[index];
+}
+
+static void psensor_delay_work_handler(struct work_struct *work)
+{
+ struct cm36283_info *lpi = lp_info;
+ uint16_t adc_value = 0;
+ int ret;
+
+ mutex_lock(&wq_lock);
+
+ ret = get_ps_adc_value(&adc_value);
+
+ mutex_unlock(&wq_lock);
+
+ if (ret >= 0) {
+ input_report_abs(lpi->ps_input_dev, ABS_DISTANCE,
+ adc_value > lpi->ps_close_thd_set ? 0 : 1);
+ input_sync(lpi->ps_input_dev);
+ }
+ schedule_delayed_work(&lpi->pdwork,
+ msecs_to_jiffies(atomic_read(&lpi->ps_poll_delay)));
+}
+
+static void lsensor_delay_work_handler(struct work_struct *work)
+{
+ struct cm36283_info *lpi = lp_info;
+ uint16_t adc_value = 0;
+ int sense;
+
+ mutex_lock(&wq_lock);
+
+ get_ls_adc_value(&adc_value, 0);
+ sense = get_als_sense();
+
+ mutex_unlock(&wq_lock);
+
+ if (sense > 0) {
+ lpi->current_adc = adc_value;
+ input_report_abs(lpi->ls_input_dev, ABS_MISC, adc_value/sense);
+ input_sync(lpi->ls_input_dev);
+ }
+ schedule_delayed_work(&lpi->ldwork,
+ msecs_to_jiffies(atomic_read(&lpi->ls_poll_delay)));
+}
+
static irqreturn_t cm36283_irq_handler(int irq, void *data)
{
struct cm36283_info *lpi = data;
@@ -431,33 +544,44 @@
static int psensor_enable(struct cm36283_info *lpi)
{
int ret = -EIO;
+ unsigned int delay;
mutex_lock(&ps_enable_mutex);
D("[PS][CM36283] %s\n", __func__);
- if ( lpi->ps_enable ) {
+ if (lpi->ps_enable) {
D("[PS][CM36283] %s: already enabled\n", __func__);
ret = 0;
- } else
- ret = control_and_report(lpi, CONTROL_PS, 1);
-
+ } else {
+ ret = control_and_report(lpi, CONTROL_PS, 1, 0);
+ }
+
mutex_unlock(&ps_enable_mutex);
+
+ delay = atomic_read(&lpi->ps_poll_delay);
+ if (lpi->polling)
+ schedule_delayed_work(&lpi->pdwork, msecs_to_jiffies(delay));
+
return ret;
}
static int psensor_disable(struct cm36283_info *lpi)
{
int ret = -EIO;
-
+
+ if (lpi->polling)
+ cancel_delayed_work_sync(&lpi->pdwork);
+
mutex_lock(&ps_disable_mutex);
D("[PS][CM36283] %s\n", __func__);
- if ( lpi->ps_enable == 0 ) {
+ if (lpi->ps_enable == 0) {
D("[PS][CM36283] %s: already disabled\n", __func__);
ret = 0;
- } else
- ret = control_and_report(lpi, CONTROL_PS,0);
-
+ } else {
+ ret = control_and_report(lpi, CONTROL_PS, 0, 0);
+ }
+
mutex_unlock(&ps_disable_mutex);
return ret;
}
@@ -581,6 +705,7 @@
static int lightsensor_enable(struct cm36283_info *lpi)
{
int ret = -EIO;
+ unsigned int delay;
mutex_lock(&als_enable_mutex);
D("[LS][CM36283] %s\n", __func__);
@@ -588,10 +713,17 @@
if (lpi->als_enable) {
D("[LS][CM36283] %s: already enabled\n", __func__);
ret = 0;
- } else
- ret = control_and_report(lpi, CONTROL_ALS, 1);
+ } else {
+ ret = control_and_report(lpi, CONTROL_ALS, 1, 0);
+ }
mutex_unlock(&als_enable_mutex);
+
+ delay = atomic_read(&lpi->ls_poll_delay);
+ if (lpi->polling)
+ schedule_delayed_work(&lpi->ldwork,
+ msecs_to_jiffies(delay));
+
return ret;
}
@@ -601,11 +733,15 @@
mutex_lock(&als_disable_mutex);
D("[LS][CM36283] %s\n", __func__);
+ if (lpi->polling)
+ cancel_delayed_work_sync(&lpi->ldwork);
+
if ( lpi->als_enable == 0 ) {
D("[LS][CM36283] %s: already disabled\n", __func__);
ret = 0;
- } else
- ret = control_and_report(lpi, CONTROL_ALS, 0);
+ } else {
+ ret = control_and_report(lpi, CONTROL_ALS, 0, 0);
+ }
mutex_unlock(&als_disable_mutex);
return ret;
@@ -688,13 +824,14 @@
uint16_t value;
int ret;
struct cm36283_info *lpi = lp_info;
- int intr_val;
-
- intr_val = gpio_get_value(lpi->intr_pin);
+ int intr_val = -1;
get_ps_adc_value(&value);
+ if (gpio_is_valid(lpi->intr_pin))
+ intr_val = gpio_get_value(lpi->intr_pin);
- ret = sprintf(buf, "ADC[0x%04X], ENABLE = %d, intr_pin = %d\n", value, lpi->ps_enable, intr_val);
+ ret = snprintf(buf, PAGE_SIZE, "ADC[0x%04X], ENABLE=%d intr_pin=%d\n",
+ value, lpi->ps_enable, intr_val);
return ret;
}
@@ -1076,6 +1213,62 @@
}
static DEVICE_ATTR(ls_conf, 0664, ls_conf_show, ls_conf_store);
+static ssize_t ls_poll_delay_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct cm36283_info *lpi = lp_info;
+ return snprintf(buf, PAGE_SIZE, "%d\n",
+ atomic_read(&lpi->ls_poll_delay));
+}
+
+static ssize_t ls_poll_delay_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ struct cm36283_info *lpi = lp_info;
+ unsigned long interval_ms;
+
+ if (kstrtoul(buf, 10, &interval_ms))
+ return -EINVAL;
+
+ if ((interval_ms < CM36283_LS_MIN_POLL_DELAY) ||
+ (interval_ms > CM36283_LS_MAX_POLL_DELAY))
+ return -EINVAL;
+
+ atomic_set(&lpi->ls_poll_delay, (unsigned int) interval_ms);
+ return count;
+}
+
+static DEVICE_ATTR(ls_poll_delay, 0664, ls_poll_delay_show,
+ ls_poll_delay_store);
+
+static ssize_t ps_poll_delay_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct cm36283_info *lpi = lp_info;
+ return snprintf(buf, PAGE_SIZE, "%d\n",
+ atomic_read(&lpi->ps_poll_delay));
+}
+
+static ssize_t ps_poll_delay_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ struct cm36283_info *lpi = lp_info;
+ unsigned long interval_ms;
+
+ if (kstrtoul(buf, 10, &interval_ms))
+ return -EINVAL;
+
+ if ((interval_ms < CM36283_PS_MIN_POLL_DELAY) ||
+ (interval_ms > CM36283_PS_MAX_POLL_DELAY))
+ return -EINVAL;
+
+ atomic_set(&lpi->ps_poll_delay, (unsigned int) interval_ms);
+ return count;
+}
+
+static DEVICE_ATTR(ps_poll_delay, 0664, ps_poll_delay_show,
+ ps_poll_delay_store);
+
static ssize_t ls_fLevel_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
@@ -1103,6 +1296,7 @@
static int lightsensor_setup(struct cm36283_info *lpi)
{
int ret;
+ int range;
lpi->ls_input_dev = input_allocate_device();
if (!lpi->ls_input_dev) {
@@ -1113,7 +1307,9 @@
}
lpi->ls_input_dev->name = "cm36283-ls";
set_bit(EV_ABS, lpi->ls_input_dev->evbit);
- input_set_abs_params(lpi->ls_input_dev, ABS_MISC, 0, 9, 0, 0);
+
+ range = get_als_range();
+ input_set_abs_params(lpi->ls_input_dev, ABS_MISC, 0, range, 0, 0);
ret = input_register_device(lpi->ls_input_dev);
if (ret < 0) {
@@ -1188,13 +1384,8 @@
D("[PS][CM36283] %s, INTERRUPT GPIO val = %d\n", __func__, val);
ret = _cm36283_I2C_Read_Word(lpi->slave_addr, ID_REG, &idReg);
- if ((ret < 0) || (idReg != 0xC082)) {
- if (record_init_fail == 0)
- record_init_fail = 1;
- return -ENOMEM;/*If devices without cm36283 chip and did not probe driver*/
- }
-
- return 0;
+
+ return ret;
}
static int cm36283_setup(struct cm36283_info *lpi)
@@ -1228,14 +1419,15 @@
}
/*Default disable P sensor and L sensor*/
- ls_initial_cmd(lpi);
+ ls_initial_cmd(lpi);
psensor_initial_cmd(lpi);
- ret = request_any_context_irq(lpi->irq,
- cm36283_irq_handler,
- IRQF_TRIGGER_LOW,
- "cm36283",
- lpi);
+ if (!lpi->polling)
+ ret = request_any_context_irq(lpi->irq,
+ cm36283_irq_handler,
+ IRQF_TRIGGER_LOW,
+ "cm36283",
+ lpi);
if (ret < 0) {
pr_err(
"[PS][CM36283 error]%s: req_irq(%d) fail for gpio %d (%d)\n",
@@ -1274,6 +1466,78 @@
}
#endif
+static int cm36283_parse_dt(struct device *dev,
+ struct cm36283_platform_data *pdata)
+{
+ struct device_node *np = dev->of_node;
+ u32 levels[CM36283_LEVELS_SIZE], i;
+ u32 temp_val;
+ int rc;
+
+ rc = of_get_named_gpio_flags(np, "capella,interrupt-gpio",
+ 0, NULL);
+ if (rc < 0) {
+ dev_err(dev, "Unable to read interrupt pin number\n");
+ return rc;
+ } else {
+ pdata->intr = rc;
+ }
+
+ rc = of_property_read_u32_array(np, "capella,levels", levels,
+ CM36283_LEVELS_SIZE);
+ if (rc) {
+ dev_err(dev, "Unable to read levels data\n");
+ return rc;
+ } else {
+ for (i = 0; i < CM36283_LEVELS_SIZE; i++)
+ pdata->levels[i] = levels[i];
+ }
+
+ rc = of_property_read_u32(np, "capella,ps_close_thd_set", &temp_val);
+ if (rc) {
+ dev_err(dev, "Unable to read ps_close_thd_set\n");
+ return rc;
+ } else {
+ pdata->ps_close_thd_set = (u8)temp_val;
+ }
+
+ rc = of_property_read_u32(np, "capella,ps_away_thd_set", &temp_val);
+ if (rc) {
+ dev_err(dev, "Unable to read ps_away_thd_set\n");
+ return rc;
+ } else {
+ pdata->ps_away_thd_set = (u8)temp_val;
+ }
+
+ rc = of_property_read_u32(np, "capella,ls_cmd", &temp_val);
+ if (rc) {
+ dev_err(dev, "Unable to read ls_cmd\n");
+ return rc;
+ } else {
+ pdata->ls_cmd = (u16)temp_val;
+ }
+
+ rc = of_property_read_u32(np, "capella,ps_conf1_val", &temp_val);
+ if (rc) {
+ dev_err(dev, "Unable to read ps_conf1_val\n");
+ return rc;
+ } else {
+ pdata->ps_conf1_val = (u16)temp_val;
+ }
+
+ rc = of_property_read_u32(np, "capella,ps_conf3_val", &temp_val);
+ if (rc) {
+ dev_err(dev, "Unable to read ps_conf3_val\n");
+ return rc;
+ } else {
+ pdata->ps_conf3_val = (u16)temp_val;
+ }
+
+ pdata->polling = of_property_read_bool(np, "capella,use-polling");
+
+ return 0;
+}
+
static int cm36283_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
@@ -1291,12 +1555,29 @@
/*D("[CM36283] %s: client->irq = %d\n", __func__, client->irq);*/
lpi->i2c_client = client;
- pdata = client->dev.platform_data;
- if (!pdata) {
- pr_err("[PS][CM36283 error]%s: Assign platform_data error!!\n",
- __func__);
- ret = -EBUSY;
- goto err_platform_data_null;
+
+ if (client->dev.of_node) {
+ pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata) {
+ dev_err(&client->dev, "Failed to allocate memory for pdata\n");
+ ret = -ENOMEM;
+ goto err_platform_data_null;
+ }
+
+ ret = cm36283_parse_dt(&client->dev, pdata);
+ pdata->slave_addr = client->addr;
+ if (ret) {
+ dev_err(&client->dev, "Failed to get pdata from device tree\n");
+ goto err_parse_dt;
+ }
+ } else {
+ pdata = client->dev.platform_data;
+ if (!pdata) {
+ dev_err(&client->dev, "%s: Assign platform_data error!!\n",
+ __func__);
+ ret = -EBUSY;
+ goto err_platform_data_null;
+ }
}
lpi->irq = client->irq;
@@ -1313,6 +1594,12 @@
lpi->ps_close_thd_set = pdata->ps_close_thd_set;
lpi->ps_conf1_val = pdata->ps_conf1_val;
lpi->ps_conf3_val = pdata->ps_conf3_val;
+ lpi->polling = pdata->polling;
+ atomic_set(&lpi->ls_poll_delay,
+ (unsigned int) CM36283_LS_DEFAULT_POLL_DELAY);
+ atomic_set(&lpi->ps_poll_delay,
+ (unsigned int) CM36283_PS_DEFAULT_POLL_DELAY);
+
lpi->ls_cmd = pdata->ls_cmd;
@@ -1333,23 +1620,11 @@
mutex_init(&als_disable_mutex);
mutex_init(&als_get_adc_mutex);
- ret = lightsensor_setup(lpi);
- if (ret < 0) {
- pr_err("[LS][CM36283 error]%s: lightsensor_setup error!!\n",
- __func__);
- goto err_lightsensor_setup;
- }
mutex_init(&ps_enable_mutex);
mutex_init(&ps_disable_mutex);
mutex_init(&ps_get_adc_mutex);
- ret = psensor_setup(lpi);
- if (ret < 0) {
- pr_err("[PS][CM36283 error]%s: psensor_setup error!!\n",
- __func__);
- goto err_psensor_setup;
- }
//SET LUX STEP FACTOR HERE
// if adc raw value one step = 5/100 = 1/20 = 0.05 lux
@@ -1379,11 +1654,32 @@
}
wake_lock_init(&(lpi->ps_wake_lock), WAKE_LOCK_SUSPEND, "proximity");
+ ret = cm36283_power_set(lpi, true);
+ if (ret < 0) {
+ dev_err(&client->dev, "%s:cm36283 power on error!\n", __func__);
+ goto err_cm36283_power_on;
+ }
+
ret = cm36283_setup(lpi);
if (ret < 0) {
pr_err("[PS_ERR][CM36283 error]%s: cm36283_setup error!\n", __func__);
goto err_cm36283_setup;
}
+
+ ret = lightsensor_setup(lpi);
+ if (ret < 0) {
+ pr_err("[LS][CM36283 error]%s: lightsensor_setup error!!\n",
+ __func__);
+ goto err_lightsensor_setup;
+ }
+
+ ret = psensor_setup(lpi);
+ if (ret < 0) {
+ pr_err("[PS][CM36283 error]%s: psensor_setup error!!\n",
+ __func__);
+ goto err_psensor_setup;
+ }
+
lpi->cm36283_class = class_create(THIS_MODULE, "optical_sensors");
if (IS_ERR(lpi->cm36283_class)) {
ret = PTR_ERR(lpi->cm36283_class);
@@ -1430,37 +1726,45 @@
if (ret)
goto err_create_ls_device_file;
+ ret = device_create_file(lpi->ls_dev, &dev_attr_ls_poll_delay);
+ if (ret)
+ goto err_create_ls_device_file;
+
lpi->ps_dev = device_create(lpi->cm36283_class,
NULL, 0, "%s", "proximity");
if (unlikely(IS_ERR(lpi->ps_dev))) {
ret = PTR_ERR(lpi->ps_dev);
lpi->ps_dev = NULL;
- goto err_create_ls_device_file;
+ goto err_create_ps_device;
}
/* register the attributes */
ret = device_create_file(lpi->ps_dev, &dev_attr_ps_adc);
if (ret)
- goto err_create_ps_device;
+ goto err_create_ps_device_file;
ret = device_create_file(lpi->ps_dev,
&dev_attr_ps_parameters);
if (ret)
- goto err_create_ps_device;
+ goto err_create_ps_device_file;
/* register the attributes */
ret = device_create_file(lpi->ps_dev, &dev_attr_ps_conf);
if (ret)
- goto err_create_ps_device;
+ goto err_create_ps_device_file;
/* register the attributes */
ret = device_create_file(lpi->ps_dev, &dev_attr_ps_thd);
if (ret)
- goto err_create_ps_device;
+ goto err_create_ps_device_file;
ret = device_create_file(lpi->ps_dev, &dev_attr_ps_hw);
if (ret)
- goto err_create_ps_device;
+ goto err_create_ps_device_file;
+
+ ret = device_create_file(lpi->ps_dev, &dev_attr_ps_poll_delay);
+ if (ret)
+ goto err_create_ps_device_file;
#ifdef CONFIG_HAS_EARLYSUSPEND
lpi->early_suspend.level =
@@ -1470,47 +1774,59 @@
register_early_suspend(&lpi->early_suspend);
#endif
+ mutex_init(&wq_lock);
+ INIT_DELAYED_WORK(&lpi->ldwork, lsensor_delay_work_handler);
+ INIT_DELAYED_WORK(&lpi->pdwork, psensor_delay_work_handler);
D("[PS][CM36283] %s: Probe success!\n", __func__);
return ret;
-err_create_ps_device:
+err_create_ps_device_file:
device_unregister(lpi->ps_dev);
+err_create_ps_device:
err_create_ls_device_file:
device_unregister(lpi->ls_dev);
err_create_ls_device:
class_destroy(lpi->cm36283_class);
err_create_class:
-err_cm36283_setup:
- destroy_workqueue(lpi->lp_wq);
- wake_lock_destroy(&(lpi->ps_wake_lock));
-
- input_unregister_device(lpi->ls_input_dev);
- input_free_device(lpi->ls_input_dev);
+ misc_deregister(&psensor_misc);
input_unregister_device(lpi->ps_input_dev);
input_free_device(lpi->ps_input_dev);
+err_psensor_setup:
+ misc_deregister(&lightsensor_misc);
+ input_unregister_device(lpi->ls_input_dev);
+ input_free_device(lpi->ls_input_dev);
+err_lightsensor_setup:
+err_cm36283_setup:
+ cm36283_power_set(lpi, false);
+err_cm36283_power_on:
+ wake_lock_destroy(&(lpi->ps_wake_lock));
+ destroy_workqueue(lpi->lp_wq);
err_create_singlethread_workqueue:
err_lightsensor_update_table:
- misc_deregister(&psensor_misc);
-err_psensor_setup:
mutex_destroy(&CM36283_control_mutex);
- mutex_destroy(&ps_enable_mutex);
- mutex_destroy(&ps_disable_mutex);
- mutex_destroy(&ps_get_adc_mutex);
- misc_deregister(&lightsensor_misc);
-err_lightsensor_setup:
mutex_destroy(&als_enable_mutex);
mutex_destroy(&als_disable_mutex);
mutex_destroy(&als_get_adc_mutex);
+ mutex_destroy(&ps_enable_mutex);
+ mutex_destroy(&ps_disable_mutex);
+ mutex_destroy(&ps_get_adc_mutex);
+err_parse_dt:
+ if (client->dev.of_node && (pdata != NULL))
+ devm_kfree(&client->dev, pdata);
err_platform_data_null:
kfree(lpi);
+ dev_err(&client->dev, "%s:error exit! ret = %d\n", __func__, ret);
+
return ret;
}
-
-static int control_and_report( struct cm36283_info *lpi, uint8_t mode, uint16_t param ) {
- int ret=0;
+
+static int control_and_report(struct cm36283_info *lpi, uint8_t mode,
+ uint16_t param, int report)
+{
+ int ret = 0;
uint16_t adc_value = 0;
- uint16_t ps_data = 0;
+ uint16_t ps_data = 0;
int level = 0, i, val;
mutex_lock(&CM36283_control_mutex);
@@ -1575,63 +1891,62 @@
}
}
}
-
- ret = set_lsensor_range(((i == 0) || (adc_value == 0)) ? 0 :
- *(lpi->cali_table + (i - 1)) + 1,
- *(lpi->cali_table + i));
-
- lpi->ls_cmd |= CM36283_ALS_INT_EN;
-
- ret = _cm36283_I2C_Write_Word(lpi->slave_addr, ALS_CONF, lpi->ls_cmd);
-
- if ((i == 0) || (adc_value == 0))
- D("[LS][CM3628] %s: ADC=0x%03X, Level=%d, l_thd equal 0, h_thd = 0x%x \n",
- __func__, adc_value, level, *(lpi->cali_table + i));
- else
- D("[LS][CM3628] %s: ADC=0x%03X, Level=%d, l_thd = 0x%x, h_thd = 0x%x \n",
- __func__, adc_value, level, *(lpi->cali_table + (i - 1)) + 1, *(lpi->cali_table + i));
- lpi->current_level = level;
- lpi->current_adc = adc_value;
- input_report_abs(lpi->ls_input_dev, ABS_MISC, level);
- input_sync(lpi->ls_input_dev);
+ if (!lpi->polling) {
+ ret = set_lsensor_range(((i == 0) ||
+ (adc_value == 0)) ? 0 :
+ *(lpi->cali_table + (i - 1)) + 1,
+ *(lpi->cali_table + i));
+
+ lpi->ls_cmd |= CM36283_ALS_INT_EN;
+ }
+
+ ret = _cm36283_I2C_Write_Word(lpi->slave_addr, ALS_CONF,
+ lpi->ls_cmd);
+
+ if (report) {
+ lpi->current_level = level;
+ lpi->current_adc = adc_value;
+ input_report_abs(lpi->ls_input_dev, ABS_MISC, level);
+ input_sync(lpi->ls_input_dev);
+ }
}
}
#define PS_CLOSE 1
#define PS_AWAY (1<<1)
#define PS_CLOSE_AND_AWAY PS_CLOSE+PS_AWAY
+ if (report && (lpi->ps_enable)) {
+ int ps_status = 0;
+ if (mode == CONTROL_PS)
+ ps_status = PS_CLOSE_AND_AWAY;
+ else if (mode == CONTROL_INT_ISR_REPORT) {
+ if (param & INT_FLAG_PS_IF_CLOSE)
+ ps_status |= PS_CLOSE;
+ if (param & INT_FLAG_PS_IF_AWAY)
+ ps_status |= PS_AWAY;
+ }
- if(lpi->ps_enable){
- int ps_status = 0;
- if( mode == CONTROL_PS )
- ps_status = PS_CLOSE_AND_AWAY;
- else if(mode == CONTROL_INT_ISR_REPORT ){
- if ( param & INT_FLAG_PS_IF_CLOSE )
- ps_status |= PS_CLOSE;
- if ( param & INT_FLAG_PS_IF_AWAY )
- ps_status |= PS_AWAY;
- }
-
- if (ps_status!=0){
- switch(ps_status){
- case PS_CLOSE_AND_AWAY:
- get_stable_ps_adc_value(&ps_data);
- val = (ps_data >= lpi->ps_close_thd_set) ? 0 : 1;
- break;
- case PS_AWAY:
- val = 1;
- break;
- case PS_CLOSE:
- val = 0;
- break;
- };
- input_report_abs(lpi->ps_input_dev, ABS_DISTANCE, val);
- input_sync(lpi->ps_input_dev);
- }
- }
+ if (ps_status != 0) {
+ switch (ps_status) {
+ case PS_CLOSE_AND_AWAY:
+ get_stable_ps_adc_value(&ps_data);
+ val = (ps_data >= lpi->ps_close_thd_set)
+ ? 0 : 1;
+ break;
+ case PS_AWAY:
+ val = 1;
+ break;
+ case PS_CLOSE:
+ val = 0;
+ break;
+ };
+ input_report_abs(lpi->ps_input_dev, ABS_DISTANCE, val);
+ input_sync(lpi->ps_input_dev);
+ }
+ }
- mutex_unlock(&CM36283_control_mutex);
- return ret;
+ mutex_unlock(&CM36283_control_mutex);
+ return ret;
}
static int cm36283_power_set(struct cm36283_info *info, bool on)
@@ -1769,6 +2084,11 @@
{}
};
+static struct of_device_id cm36283_match_table[] = {
+ { .compatible = "capella,cm36283",},
+ { },
+};
+
static struct i2c_driver cm36283_driver = {
.id_table = cm36283_i2c_id,
.probe = cm36283_probe,
@@ -1776,6 +2096,7 @@
.name = CM36283_I2C_NAME,
.owner = THIS_MODULE,
.pm = &cm36283_pm,
+ .of_match_table = cm36283_match_table,
},
};
diff --git a/drivers/input/touchscreen/gt9xx/gt9xx.c b/drivers/input/touchscreen/gt9xx/gt9xx.c
index 4450cde..33ef141 100644
--- a/drivers/input/touchscreen/gt9xx/gt9xx.c
+++ b/drivers/input/touchscreen/gt9xx/gt9xx.c
@@ -48,11 +48,9 @@
#include <linux/of_gpio.h>
-#if GTP_ICS_SLOT_REPORT
#include <linux/input/mt.h>
-#endif
-#define GOODIX_DEV_NAME "Goodix Capacitive TouchScreen"
+#define GOODIX_DEV_NAME "Goodix-CTP"
#define CFG_MAX_TOUCH_POINTS 5
#define GOODIX_COORDS_ARR_SIZE 4
#define MAX_BUTTONS 4
@@ -367,21 +365,12 @@
GTP_SWAP(x, y);
#endif
-#if GTP_ICS_SLOT_REPORT
input_mt_slot(ts->input_dev, id);
- input_report_abs(ts->input_dev, ABS_MT_TRACKING_ID, id);
+ input_mt_report_slot_state(ts->input_dev, MT_TOOL_FINGER, true);
input_report_abs(ts->input_dev, ABS_MT_POSITION_X, x);
input_report_abs(ts->input_dev, ABS_MT_POSITION_Y, y);
input_report_abs(ts->input_dev, ABS_MT_TOUCH_MAJOR, w);
input_report_abs(ts->input_dev, ABS_MT_WIDTH_MAJOR, w);
-#else
- input_report_abs(ts->input_dev, ABS_MT_POSITION_X, x);
- input_report_abs(ts->input_dev, ABS_MT_POSITION_Y, y);
- input_report_abs(ts->input_dev, ABS_MT_TOUCH_MAJOR, w);
- input_report_abs(ts->input_dev, ABS_MT_WIDTH_MAJOR, w);
- input_report_abs(ts->input_dev, ABS_MT_TRACKING_ID, id);
- input_mt_sync(ts->input_dev);
-#endif
GTP_DEBUG("ID:%d, X:%d, Y:%d, W:%d", id, x, y, w);
}
@@ -396,15 +385,9 @@
*********************************************************/
static void gtp_touch_up(struct goodix_ts_data *ts, int id)
{
-#if GTP_ICS_SLOT_REPORT
input_mt_slot(ts->input_dev, id);
- input_report_abs(ts->input_dev, ABS_MT_TRACKING_ID, -1);
+ input_mt_report_slot_state(ts->input_dev, MT_TOOL_FINGER, false);
GTP_DEBUG("Touch id[%2d] release!", id);
-#else
- input_report_abs(ts->input_dev, ABS_MT_TOUCH_MAJOR, 0);
- input_report_abs(ts->input_dev, ABS_MT_WIDTH_MAJOR, 0);
- input_mt_sync(ts->input_dev);
-#endif
}
@@ -556,7 +539,6 @@
GTP_DEBUG("pre_touch:%02x, finger:%02x.", pre_touch, finger);
-#if GTP_ICS_SLOT_REPORT
#if GTP_WITH_PEN
if (pre_pen && (touch_num == 0)) {
GTP_DEBUG("Pen touch UP(Slot)!");
@@ -633,42 +615,6 @@
}
}
}
-#else
- input_report_key(ts->input_dev, BTN_TOUCH, (touch_num || key_value));
- if (touch_num) {
- for (i = 0; i < touch_num; i++) {
- coor_data = &point_data[i * 8 + 3];
-
- id = coor_data[0];
- input_x = coor_data[1] | coor_data[2] << 8;
- input_y = coor_data[3] | coor_data[4] << 8;
- input_w = coor_data[5] | coor_data[6] << 8;
-#if GTP_WITH_PEN
- if (id == 128) {
- GTP_DEBUG("Pen touch DOWN!");
- input_report_key(ts->input_dev,
- BTN_TOOL_PEN, 1);
- pre_pen = 1;
- id = 0;
- }
-#endif
- gtp_touch_down(ts, id, input_x, input_y, input_w);
- }
- } else if (pre_touch) {
-#if GTP_WITH_PEN
- if (pre_pen == 1) {
- GTP_DEBUG("Pen touch UP!");
- input_report_key(ts->input_dev, BTN_TOOL_PEN, 0);
- pre_pen = 0;
- }
-#endif
- GTP_DEBUG("Touch Released!");
- gtp_touch_up(ts, 0);
- }
-
- pre_touch = touch_num;
-#endif
-
input_sync(ts->input_dev);
exit_work_func:
@@ -1305,12 +1251,9 @@
ts->input_dev->evbit[0] =
BIT_MASK(EV_SYN) | BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS) ;
-#if GTP_ICS_SLOT_REPORT
+ set_bit(BTN_TOOL_FINGER, ts->input_dev->keybit);
__set_bit(INPUT_PROP_DIRECT, ts->input_dev->propbit);
input_mt_init_slots(ts->input_dev, 10);/* in case of "out of memory" */
-#else
- ts->input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
-#endif
#if GTP_HAVE_TOUCH_KEY
for (index = 0; index < GTP_MAX_KEY_NUM; index++) {
@@ -1969,7 +1912,6 @@
for (i = 0; i < GTP_MAX_TOUCH; i++)
gtp_touch_up(ts, i);
- input_report_key(ts->input_dev, BTN_TOUCH, 0);
input_sync(ts->input_dev);
ret = gtp_enter_sleep(ts);
diff --git a/drivers/input/touchscreen/gt9xx/gt9xx.h b/drivers/input/touchscreen/gt9xx/gt9xx.h
index eef170f..c9b81e7 100644
--- a/drivers/input/touchscreen/gt9xx/gt9xx.h
+++ b/drivers/input/touchscreen/gt9xx/gt9xx.h
@@ -107,7 +107,6 @@
#define GTP_DRIVER_SEND_CFG 1
#define GTP_HAVE_TOUCH_KEY 1
#define GTP_POWER_CTRL_SLEEP 0
-#define GTP_ICS_SLOT_REPORT 1
/* auto updated by .bin file as default */
#define GTP_AUTO_UPDATE 0
diff --git a/drivers/iommu/msm_iommu-v1.c b/drivers/iommu/msm_iommu-v1.c
index 53c7c30..b9c4cae 100644
--- a/drivers/iommu/msm_iommu-v1.c
+++ b/drivers/iommu/msm_iommu-v1.c
@@ -692,6 +692,7 @@
if (ret)
goto fail;
+ ret = __flush_iotlb_va(domain, va);
fail:
mutex_unlock(&msm_iommu_lock);
return ret;
@@ -741,6 +742,7 @@
if (ret)
goto fail;
+ __flush_iotlb(domain);
fail:
mutex_unlock(&msm_iommu_lock);
return ret;
diff --git a/drivers/iommu/msm_iommu_sec.c b/drivers/iommu/msm_iommu_sec.c
index 78fffb2..474efdf 100644
--- a/drivers/iommu/msm_iommu_sec.c
+++ b/drivers/iommu/msm_iommu_sec.c
@@ -371,7 +371,7 @@
map.info.ctx_id = ctx_drvdata->num;
map.info.va = va;
map.info.size = len;
- map.flags = 0;
+ map.flags = IOMMU_TLBINVAL_FLAG;
flush_va = &pa;
flush_pa = virt_to_phys(&pa);
@@ -421,7 +421,7 @@
map.info.ctx_id = ctx_drvdata->num;
map.info.va = va;
map.info.size = len;
- map.flags = 0;
+ map.flags = IOMMU_TLBINVAL_FLAG;
if (sg->length == len) {
pa = get_phys_addr(sg);
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_buf_mgr.c b/drivers/media/platform/msm/camera_v2/isp/msm_buf_mgr.c
index 2a2656f..2be1f01 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_buf_mgr.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_buf_mgr.c
@@ -288,6 +288,10 @@
pr_err("%s: Invalid bufq\n", __func__);
return rc;
}
+ if (!bufq->bufq_handle) {
+ pr_err("%s: Invalid bufq handle\n", __func__);
+ return rc;
+ }
*buf_info = NULL;
spin_lock_irqsave(&bufq->bufq_lock, flags);
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp40.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp40.c
index 4ff8849..9047c40 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp40.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp40.c
@@ -514,15 +514,17 @@
{
*irq_status0 = msm_camera_io_r(vfe_dev->vfe_base + 0x38);
*irq_status1 = msm_camera_io_r(vfe_dev->vfe_base + 0x3C);
- /*Ignore composite 3 irq which is used for dual VFE only*/
+ /*
+ * Ignore composite 2/3 irq which is used for dual VFE only
+ */
if (*irq_status0 & 0x6000000)
- *irq_status0 &= ~(0x10000000);
+ *irq_status0 &= ~(0x18000000);
msm_camera_io_w(*irq_status0, vfe_dev->vfe_base + 0x30);
msm_camera_io_w(*irq_status1, vfe_dev->vfe_base + 0x34);
msm_camera_io_w_mb(1, vfe_dev->vfe_base + 0x24);
- if (*irq_status0 & 0x10000000) {
+ if (*irq_status0 & 0x18000000) {
pr_err_ratelimited("%s: Protection triggered\n", __func__);
- *irq_status0 &= ~(0x10000000);
+ *irq_status0 &= ~(0x18000000);
}
if (*irq_status1 & (1 << 0))
@@ -608,15 +610,29 @@
comp_mask &= ~(0x7F << (comp_mask_index * 8));
comp_mask |= (axi_data->composite_info[comp_mask_index].
stream_composite_mask << (comp_mask_index * 8));
- if (stream_info->plane_cfg[0].plane_addr_offset)
- comp_mask |= (axi_data->composite_info[comp_mask_index].
- stream_composite_mask << 24);
- msm_camera_io_w(comp_mask, vfe_dev->vfe_base + 0x40);
irq_mask = msm_camera_io_r(vfe_dev->vfe_base + 0x28);
irq_mask |= 1 << (comp_mask_index + 25);
- if (stream_info->plane_cfg[0].plane_addr_offset && (comp_mask >> 24))
+
+ /*
+ * For dual VFE, composite 2/3 interrupt is used to trigger
+ * microcontroller to update certain VFE registers
+ */
+ if (stream_info->plane_cfg[0].plane_addr_offset &&
+ stream_info->stream_src == PIX_VIEWFINDER) {
+ comp_mask |= (axi_data->composite_info[comp_mask_index].
+ stream_composite_mask << 16);
+ irq_mask |= BIT(27);
+ }
+
+ if (stream_info->plane_cfg[0].plane_addr_offset &&
+ stream_info->stream_src == PIX_ENCODER) {
+ comp_mask |= (axi_data->composite_info[comp_mask_index].
+ stream_composite_mask << 24);
irq_mask |= BIT(28);
+ }
+
+ msm_camera_io_w(comp_mask, vfe_dev->vfe_base + 0x40);
msm_camera_io_w(irq_mask, vfe_dev->vfe_base + 0x28);
}
@@ -629,15 +645,25 @@
comp_mask = msm_camera_io_r(vfe_dev->vfe_base + 0x40);
comp_mask &= ~(0x7F << (comp_mask_index * 8));
- if (stream_info->plane_cfg[0].plane_addr_offset)
- comp_mask &= ~(axi_data->composite_info[comp_mask_index].
- stream_composite_mask << 24);
- msm_camera_io_w(comp_mask, vfe_dev->vfe_base + 0x40);
irq_mask = msm_camera_io_r(vfe_dev->vfe_base + 0x28);
irq_mask &= ~(1 << (comp_mask_index + 25));
- if (stream_info->plane_cfg[0].plane_addr_offset && (comp_mask >> 24))
+
+ if (stream_info->plane_cfg[0].plane_addr_offset &&
+ stream_info->stream_src == PIX_VIEWFINDER) {
+ comp_mask &= ~(axi_data->composite_info[comp_mask_index].
+ stream_composite_mask << 16);
+ irq_mask &= ~BIT(27);
+ }
+
+ if (stream_info->plane_cfg[0].plane_addr_offset &&
+ stream_info->stream_src == PIX_ENCODER) {
+ comp_mask &= ~(axi_data->composite_info[comp_mask_index].
+ stream_composite_mask << 24);
irq_mask &= ~BIT(28);
+ }
+
+ msm_camera_io_w(comp_mask, vfe_dev->vfe_base + 0x40);
msm_camera_io_w(irq_mask, vfe_dev->vfe_base + 0x28);
}
@@ -1349,7 +1375,7 @@
static struct msm_vfe_axi_hardware_info msm_vfe40_axi_hw_info = {
.num_wm = 5,
- .num_comp_mask = 3,
+ .num_comp_mask = 2,
.num_rdi = 3,
.num_rdi_master = 3,
.min_wm_ub = 64,
diff --git a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c
index 344dc71..c1f48f5 100644
--- a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c
+++ b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c
@@ -700,7 +700,7 @@
msm_cpp_create_buff_queue(cpp_dev, MSM_CPP_MAX_BUFF_QUEUE);
if (cpp_dev->is_firmware_loaded == 1) {
disable_irq(cpp_dev->irq->start);
- cpp_load_fw(cpp_dev, NULL);
+ cpp_load_fw(cpp_dev, cpp_dev->fw_name_bin);
enable_irq(cpp_dev->irq->start);
msm_camera_io_w_mb(0x7C8, cpp_dev->base +
MSM_CPP_MICRO_IRQGEN_MASK);
@@ -790,6 +790,7 @@
}
if (fw)
release_firmware(fw);
+ msm_camera_io_w_mb(0x00, cpp_dev->cpp_hw_base + 0xC);
msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_OK);
msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_CMD);
}
@@ -856,6 +857,7 @@
cpp_dev->cpp_open_cnt++;
if (cpp_dev->cpp_open_cnt == 1) {
cpp_init_hardware(cpp_dev);
+ iommu_attach_device(cpp_dev->domain, cpp_dev->iommu_ctx);
cpp_init_mem(cpp_dev);
cpp_dev->state = CPP_STATE_IDLE;
}
@@ -922,6 +924,7 @@
msm_camera_io_r(cpp_dev->cpp_hw_base + 0x8C));
msm_camera_io_w(0x0, cpp_dev->base + MSM_CPP_MICRO_CLKEN_CTL);
cpp_deinit_mem(cpp_dev);
+ iommu_detach_device(cpp_dev->domain, cpp_dev->iommu_ctx);
cpp_release_hardware(cpp_dev);
cpp_dev->state = CPP_STATE_OFF;
}
@@ -1717,6 +1720,7 @@
return msm_register_domain(&cpp_fw_layout);
}
+
static int __devinit cpp_probe(struct platform_device *pdev)
{
struct cpp_device *cpp_dev;
@@ -1831,7 +1835,6 @@
cpp_dev->msm_sd.sd.entity.revision = cpp_dev->msm_sd.sd.devnode->num;
cpp_dev->state = CPP_STATE_BOOT;
cpp_init_hardware(cpp_dev);
- iommu_attach_device(cpp_dev->domain, cpp_dev->iommu_ctx);
msm_camera_io_w(0x0, cpp_dev->base +
MSM_CPP_MICRO_IRQGEN_MASK);
@@ -1859,7 +1862,6 @@
cpp_timers[1].used = 0;
cpp_dev->fw_name_bin = NULL;
return rc;
-
ERROR3:
release_mem_region(cpp_dev->mem->start, resource_size(cpp_dev->mem));
ERROR2:
@@ -1889,7 +1891,6 @@
return 0;
}
- iommu_detach_device(cpp_dev->domain, cpp_dev->iommu_ctx);
msm_sd_unregister(&cpp_dev->msm_sd);
release_mem_region(cpp_dev->mem->start, resource_size(cpp_dev->mem));
release_mem_region(cpp_dev->vbif_mem->start,
diff --git a/drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c b/drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c
index 9aca234..229fdb2 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c
@@ -440,7 +440,7 @@
case CSID_CFG: {
struct msm_camera_csid_params csid_params;
struct msm_camera_csid_vc_cfg *vc_cfg = NULL;
- int32_t i = 0;
+ int8_t i = 0;
if (copy_from_user(&csid_params,
(void *)cdata->cfg.csid_params,
sizeof(struct msm_camera_csid_params))) {
@@ -448,6 +448,13 @@
rc = -EFAULT;
break;
}
+ if (csid_params.lut_params.num_cid < 1 ||
+ csid_params.lut_params.num_cid > 16) {
+ pr_err("%s: %d num_cid outside range\n",
+ __func__, __LINE__);
+ rc = -EINVAL;
+ break;
+ }
for (i = 0; i < csid_params.lut_params.num_cid; i++) {
vc_cfg = kzalloc(csid_params.lut_params.num_cid *
sizeof(struct msm_camera_csid_vc_cfg),
diff --git a/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c b/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c
index 32cf0d3..9384a5b 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c
@@ -124,7 +124,6 @@
j++;
lane_mask >>= 1;
}
- msleep(20);
return rc;
}
diff --git a/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_dt_util.c b/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_dt_util.c
index 3898bd8..484dd69 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_dt_util.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_dt_util.c
@@ -111,6 +111,8 @@
ps[i].seq_val = SENSOR_GPIO_RESET;
else if (!strcmp(seq_name, "sensor_gpio_standby"))
ps[i].seq_val = SENSOR_GPIO_STANDBY;
+ else if (!strcmp(seq_name, "sensor_gpio_vdig"))
+ ps[i].seq_val = SENSOR_GPIO_VDIG;
else
rc = -EILSEQ;
break;
@@ -285,6 +287,23 @@
return rc;
}
+ if (of_property_read_bool(of_node, "qcom,gpio-vdig") == true) {
+ rc = of_property_read_u32(of_node, "qcom,gpio-vdig", &val);
+ if (rc < 0) {
+ pr_err("%s:%d read qcom,gpio-reset failed rc %d\n",
+ __func__, __LINE__, rc);
+ goto ERROR;
+ } else if (val >= gpio_array_size) {
+ pr_err("%s:%d qcom,gpio-reset invalid %d\n",
+ __func__, __LINE__, val);
+ goto ERROR;
+ }
+ gconf->gpio_num_info->gpio_num[SENSOR_GPIO_VDIG] =
+ gpio_array[val];
+ CDBG("%s qcom,gpio-reset %d\n", __func__,
+ gconf->gpio_num_info->gpio_num[SENSOR_GPIO_VDIG]);
+ }
+
if (of_property_read_bool(of_node, "qcom,gpio-reset") == true) {
rc = of_property_read_u32(of_node, "qcom,gpio-reset", &val);
if (rc < 0) {
diff --git a/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.c b/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.c
index 1724db1..0447159 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.c
@@ -1342,6 +1342,13 @@
s_ctrl->power_setting_array =
sensor_slave_info.power_setting_array;
power_setting_array = &s_ctrl->power_setting_array;
+
+ if (!power_setting_array->size) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -EFAULT;
+ break;
+ }
+
power_setting_array->power_setting = kzalloc(
power_setting_array->size *
sizeof(struct msm_sensor_power_setting), GFP_KERNEL);
@@ -1403,6 +1410,12 @@
break;
}
+ if (!conf_array.size) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -EFAULT;
+ break;
+ }
+
reg_setting = kzalloc(conf_array.size *
(sizeof(struct msm_camera_i2c_reg_array)), GFP_KERNEL);
if (!reg_setting) {
@@ -1492,6 +1505,12 @@
CDBG("%s:slave_addr=0x%x, array_size=%d\n", __func__,
write_config.slave_addr,
write_config.conf_array.size);
+
+ if (!write_config.conf_array.size) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -EFAULT;
+ break;
+ }
reg_setting = kzalloc(write_config.conf_array.size *
(sizeof(struct msm_camera_i2c_reg_array)), GFP_KERNEL);
if (!reg_setting) {
@@ -1565,6 +1584,11 @@
break;
}
+ if (!conf_array.size) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -EFAULT;
+ break;
+ }
reg_setting = kzalloc(conf_array.size *
(sizeof(struct msm_camera_i2c_seq_reg_array)),
GFP_KERNEL);
@@ -1655,8 +1679,13 @@
break;
}
s_ctrl->stop_setting_valid = 1;
-
reg_setting = stop_setting->reg_setting;
+
+ if (!stop_setting->size) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -EFAULT;
+ break;
+ }
stop_setting->reg_setting = kzalloc(stop_setting->size *
(sizeof(struct msm_camera_i2c_reg_array)), GFP_KERNEL);
if (!stop_setting->reg_setting) {
diff --git a/drivers/media/platform/msm/camera_v2/sensor/ov12830.c b/drivers/media/platform/msm/camera_v2/sensor/ov12830.c
index 593892e..fb6d548 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/ov12830.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/ov12830.c
@@ -21,73 +21,73 @@
.seq_type = SENSOR_VREG,
.seq_val = CAM_VIO,
.config_val = 0,
- .delay = 5,
+ .delay = 1,
},
{
.seq_type = SENSOR_VREG,
.seq_val = CAM_VANA,
.config_val = 0,
- .delay = 5,
+ .delay = 1,
},
{
.seq_type = SENSOR_GPIO,
.seq_val = SENSOR_GPIO_VDIG,
.config_val = GPIO_OUT_LOW,
- .delay = 40,
+ .delay = 5,
},
{
.seq_type = SENSOR_GPIO,
.seq_val = SENSOR_GPIO_VDIG,
.config_val = GPIO_OUT_HIGH,
- .delay = 40,
+ .delay = 5,
},
{
.seq_type = SENSOR_VREG,
.seq_val = CAM_VAF,
.config_val = 0,
- .delay = 15,
+ .delay = 5,
},
{
.seq_type = SENSOR_GPIO,
.seq_val = SENSOR_GPIO_STANDBY,
.config_val = GPIO_OUT_LOW,
- .delay = 15,
+ .delay = 1,
},
{
.seq_type = SENSOR_GPIO,
.seq_val = SENSOR_GPIO_RESET,
.config_val = GPIO_OUT_LOW,
- .delay = 40,
+ .delay = 5,
},
{
.seq_type = SENSOR_GPIO,
.seq_val = SENSOR_GPIO_AF_PWDM,
.config_val = GPIO_OUT_LOW,
- .delay = 40,
+ .delay = 5,
},
{
.seq_type = SENSOR_GPIO,
.seq_val = SENSOR_GPIO_STANDBY,
.config_val = GPIO_OUT_HIGH,
- .delay = 40,
+ .delay = 5,
},
{
.seq_type = SENSOR_GPIO,
.seq_val = SENSOR_GPIO_RESET,
.config_val = GPIO_OUT_HIGH,
- .delay = 40,
+ .delay = 10,
},
{
.seq_type = SENSOR_GPIO,
.seq_val = SENSOR_GPIO_AF_PWDM,
.config_val = GPIO_OUT_HIGH,
- .delay = 40,
+ .delay = 5,
},
{
.seq_type = SENSOR_CLK,
.seq_val = SENSOR_CAM_MCLK,
.config_val = 24000000,
- .delay = 5,
+ .delay = 10,
},
{
.seq_type = SENSOR_I2C_MUX,
diff --git a/drivers/media/platform/msm/camera_v2/sensor/ov5648.c b/drivers/media/platform/msm/camera_v2/sensor/ov5648.c
index 7877fcb..417c7ab 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/ov5648.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/ov5648.c
@@ -22,37 +22,37 @@
.seq_type = SENSOR_VREG,
.seq_val = CAM_VIO,
.config_val = 0,
- .delay = 5,
+ .delay = 0,
},
{
.seq_type = SENSOR_GPIO,
.seq_val = SENSOR_GPIO_VDIG,
.config_val = GPIO_OUT_LOW,
- .delay = 10,
+ .delay = 5,
},
{
.seq_type = SENSOR_GPIO,
.seq_val = SENSOR_GPIO_VDIG,
.config_val = GPIO_OUT_HIGH,
- .delay = 10,
+ .delay = 5,
},
{
.seq_type = SENSOR_VREG,
.seq_val = CAM_VANA,
.config_val = 0,
- .delay = 10,
+ .delay = 5,
},
{
.seq_type = SENSOR_GPIO,
.seq_val = SENSOR_GPIO_STANDBY,
.config_val = GPIO_OUT_LOW,
- .delay = 30,
+ .delay = 5,
},
{
.seq_type = SENSOR_GPIO,
.seq_val = SENSOR_GPIO_STANDBY,
.config_val = GPIO_OUT_HIGH,
- .delay = 30,
+ .delay = 10,
},
{
.seq_type = SENSOR_GPIO,
@@ -64,13 +64,13 @@
.seq_type = SENSOR_GPIO,
.seq_val = SENSOR_GPIO_RESET,
.config_val = GPIO_OUT_HIGH,
- .delay = 30,
+ .delay = 10,
},
{
.seq_type = SENSOR_CLK,
.seq_val = SENSOR_CAM_MCLK,
.config_val = 24000000,
- .delay = 5,
+ .delay = 10,
},
{
.seq_type = SENSOR_I2C_MUX,
diff --git a/drivers/media/platform/msm/vidc/msm_venc.c b/drivers/media/platform/msm/vidc/msm_venc.c
index dcf5a0e..c1a9ad0 100644
--- a/drivers/media/platform/msm/vidc/msm_venc.c
+++ b/drivers/media/platform/msm/vidc/msm_venc.c
@@ -324,7 +324,7 @@
.name = "H264 Level",
.type = V4L2_CTRL_TYPE_MENU,
.minimum = V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
- .maximum = V4L2_MPEG_VIDEO_H264_LEVEL_5_1,
+ .maximum = V4L2_MPEG_VIDEO_H264_LEVEL_5_2,
.default_value = V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
.step = 0,
.menu_skip_mask = 0,
@@ -1127,6 +1127,8 @@
return HAL_H264_LEVEL_5;
case V4L2_MPEG_VIDEO_H264_LEVEL_5_1:
return HAL_H264_LEVEL_51;
+ case V4L2_MPEG_VIDEO_H264_LEVEL_5_2:
+ return HAL_H264_LEVEL_52;
default:
goto unknown_value;
}
diff --git a/drivers/media/platform/msm/vidc/msm_vidc_common.c b/drivers/media/platform/msm/vidc/msm_vidc_common.c
index 91fc9d0..09f67a2 100644
--- a/drivers/media/platform/msm/vidc/msm_vidc_common.c
+++ b/drivers/media/platform/msm/vidc/msm_vidc_common.c
@@ -830,12 +830,15 @@
vb->v4l2_planes[0].reserved[4] = fill_buf_done->frame_width;
vb->v4l2_planes[0].reserved[5] = fill_buf_done->frame_height;
if (vb->v4l2_planes[0].data_offset > vb->v4l2_planes[0].length)
- dprintk(VIDC_INFO, "fbd:data_offset overflow length\n");
+ dprintk(VIDC_INFO,
+ "fbd:Overflow data_offset = %d; length = %d\n",
+ vb->v4l2_planes[0].data_offset,
+ vb->v4l2_planes[0].length);
if (vb->v4l2_planes[0].bytesused > vb->v4l2_planes[0].length)
- dprintk(VIDC_INFO, "fbd:bytesused overflow length\n");
- if ((u8 *)vb->v4l2_planes[0].m.userptr !=
- response->input_done.packet_buffer)
- dprintk(VIDC_INFO, "fbd:Unexpected buffer address\n");
+ dprintk(VIDC_INFO,
+ "fbd:Overflow bytesused = %d; length = %d\n",
+ vb->v4l2_planes[0].bytesused,
+ vb->v4l2_planes[0].length);
if (!(fill_buf_done->flags1 &
HAL_BUFFERFLAG_TIMESTAMPINVALID) &&
fill_buf_done->filled_len1) {
diff --git a/drivers/media/platform/msm/vidc/vidc_hfi_api.h b/drivers/media/platform/msm/vidc/vidc_hfi_api.h
index 494242d..890a5be 100644
--- a/drivers/media/platform/msm/vidc/vidc_hfi_api.h
+++ b/drivers/media/platform/msm/vidc/vidc_hfi_api.h
@@ -316,6 +316,7 @@
HAL_H264_LEVEL_42 = 0x00002000,
HAL_H264_LEVEL_5 = 0x00004000,
HAL_H264_LEVEL_51 = 0x00008000,
+ HAL_H264_LEVEL_52 = 0x00010000,
HAL_UNUSED_H264_LEVEL = 0x10000000,
};
diff --git a/drivers/media/platform/msm/vidc/vidc_hfi_helper.h b/drivers/media/platform/msm/vidc/vidc_hfi_helper.h
index 61c6e15..de312f4 100644
--- a/drivers/media/platform/msm/vidc/vidc_hfi_helper.h
+++ b/drivers/media/platform/msm/vidc/vidc_hfi_helper.h
@@ -105,6 +105,7 @@
#define HFI_H264_LEVEL_42 0x00002000
#define HFI_H264_LEVEL_5 0x00004000
#define HFI_H264_LEVEL_51 0x00008000
+#define HFI_H264_LEVEL_52 0x00010000
#define HFI_H263_PROFILE_BASELINE 0x00000001
diff --git a/drivers/media/radio/radio-iris.c b/drivers/media/radio/radio-iris.c
index da8f6b8..a4cf18e 100644
--- a/drivers/media/radio/radio-iris.c
+++ b/drivers/media/radio/radio-iris.c
@@ -2061,8 +2061,7 @@
if (radio->fm_st_rsp.station_rsp.stereo_prg)
iris_q_event(radio, IRIS_EVT_STEREO);
-
- if (radio->fm_st_rsp.station_rsp.mute_mode)
+ else if (radio->fm_st_rsp.station_rsp.stereo_prg == 0)
iris_q_event(radio, IRIS_EVT_MONO);
if (radio->fm_st_rsp.station_rsp.rds_sync_status)
diff --git a/drivers/misc/qseecom.c b/drivers/misc/qseecom.c
index 0987b6b..58703cf 100644
--- a/drivers/misc/qseecom.c
+++ b/drivers/misc/qseecom.c
@@ -77,10 +77,11 @@
};
enum qseecom_client_handle_type {
- QSEECOM_CLIENT_APP = 0,
+ QSEECOM_CLIENT_APP = 1,
QSEECOM_LISTENER_SERVICE,
QSEECOM_SECURE_SERVICE,
QSEECOM_GENERIC,
+ QSEECOM_UNAVAILABLE_CLIENT_APP,
};
enum qseecom_ce_hw_instance {
@@ -2171,6 +2172,9 @@
struct qseecom_unload_app_ireq req;
struct cpumask mask;
+ /* unavailable client app */
+ data->type = QSEECOM_UNAVAILABLE_CLIENT_APP;
+
/* Populate the structure for sending scm call to unload image */
req.qsee_cmd_id = QSEOS_UNLOAD_EXTERNAL_ELF_COMMAND;
@@ -2943,6 +2947,8 @@
return ret;
}
break;
+ case QSEECOM_UNAVAILABLE_CLIENT_APP:
+ break;
default:
pr_err("Unsupported clnt_handle_type %d",
data->type);
diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c
index 58ba933..eb5d365 100644
--- a/drivers/mmc/core/bus.c
+++ b/drivers/mmc/core/bus.c
@@ -204,9 +204,11 @@
if (mmc_use_core_runtime_pm(card->host)) {
ret = pm_schedule_suspend(dev, card->idle_timeout);
- if (ret) {
- pr_err("%s: %s: pm_schedule_suspend failed: err: %d\n",
- mmc_hostname(host), __func__, ret);
+ if ((ret < 0) && (dev->power.runtime_error ||
+ dev->power.disable_depth > 0)) {
+ pr_err("%s: %s: %s: pm_schedule_suspend failed: err: %d\n",
+ mmc_hostname(host), __func__, dev_name(dev),
+ ret);
return ret;
}
}
diff --git a/drivers/net/wireless/wcnss/wcnss_wlan.c b/drivers/net/wireless/wcnss/wcnss_wlan.c
index 1262306..aa29748 100644
--- a/drivers/net/wireless/wcnss/wcnss_wlan.c
+++ b/drivers/net/wireless/wcnss/wcnss_wlan.c
@@ -31,6 +31,8 @@
#include <linux/kthread.h>
#include <linux/wait.h>
#include <linux/uaccess.h>
+#include <linux/suspend.h>
+#include <linux/rwsem.h>
#include <linux/mfd/pm8xxx/misc.h>
#include <mach/msm_smd.h>
@@ -1344,6 +1346,7 @@
return;
}
+static DECLARE_RWSEM(wcnss_pm_sem);
static void wcnss_nvbin_dnld(void)
{
@@ -1359,12 +1362,14 @@
const struct firmware *nv = NULL;
struct device *dev = &penv->pdev->dev;
+ down_read(&wcnss_pm_sem);
+
ret = request_firmware(&nv, NVBIN_FILE, dev);
if (ret || !nv || !nv->data || !nv->size) {
pr_err("wcnss: %s: request_firmware failed for %s\n",
__func__, NVBIN_FILE);
- return;
+ goto out;
}
/*
@@ -1457,6 +1462,9 @@
/* release firmware */
release_firmware(nv);
+out:
+ up_read(&wcnss_pm_sem);
+
return;
}
@@ -1590,7 +1598,25 @@
return;
}
+static int wcnss_pm_notify(struct notifier_block *b,
+ unsigned long event, void *p)
+{
+ switch (event) {
+ case PM_SUSPEND_PREPARE:
+ down_write(&wcnss_pm_sem);
+ break;
+ case PM_POST_SUSPEND:
+ up_write(&wcnss_pm_sem);
+ break;
+ }
+
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block wcnss_pm_notifier = {
+ .notifier_call = wcnss_pm_notify,
+};
static int
wcnss_trigger_config(struct platform_device *pdev)
@@ -2034,7 +2060,7 @@
platform_driver_register(&wcnss_wlan_driver);
platform_driver_register(&wcnss_wlan_ctrl_driver);
platform_driver_register(&wcnss_ctrl_driver);
-
+ register_pm_notifier(&wcnss_pm_notifier);
#ifdef CONFIG_WCNSS_MEM_PRE_ALLOC
ret = wcnss_prealloc_init();
if (ret < 0)
@@ -2049,17 +2075,16 @@
if (penv) {
if (penv->pil)
subsystem_put(penv->pil);
-
-
penv = NULL;
}
- platform_driver_unregister(&wcnss_ctrl_driver);
- platform_driver_unregister(&wcnss_wlan_ctrl_driver);
- platform_driver_unregister(&wcnss_wlan_driver);
#ifdef CONFIG_WCNSS_MEM_PRE_ALLOC
wcnss_prealloc_deinit();
#endif
+ unregister_pm_notifier(&wcnss_pm_notifier);
+ platform_driver_unregister(&wcnss_ctrl_driver);
+ platform_driver_unregister(&wcnss_wlan_ctrl_driver);
+ platform_driver_unregister(&wcnss_wlan_driver);
}
module_init(wcnss_wlan_init);
diff --git a/drivers/spmi/qpnp-int.c b/drivers/spmi/qpnp-int.c
index 03e9021..3e14333 100644
--- a/drivers/spmi/qpnp-int.c
+++ b/drivers/spmi/qpnp-int.c
@@ -591,8 +591,9 @@
}
EXPORT_SYMBOL(qpnpint_unregister_controller);
-int qpnpint_handle_irq(struct spmi_controller *spmi_ctrl,
- struct qpnp_irq_spec *spec)
+static int __qpnpint_handle_irq(struct spmi_controller *spmi_ctrl,
+ struct qpnp_irq_spec *spec,
+ bool show)
{
struct irq_domain *domain;
unsigned long hwirq, busno;
@@ -617,12 +618,40 @@
domain = chip_lookup[busno]->domain;
irq = irq_radix_revmap_lookup(domain, hwirq);
- generic_handle_irq(irq);
+ if (show) {
+ struct irq_desc *desc;
+ const char *name = "null";
+
+ desc = irq_to_desc(irq);
+ if (desc == NULL)
+ name = "stray irq";
+ else if (desc->action && desc->action->name)
+ name = desc->action->name;
+
+ pr_warn("%d triggered [0x%01x, 0x%02x,0x%01x] %s\n",
+ irq, spec->slave, spec->per, spec->irq, name);
+ } else {
+ generic_handle_irq(irq);
+ }
return 0;
}
+
+int qpnpint_handle_irq(struct spmi_controller *spmi_ctrl,
+ struct qpnp_irq_spec *spec)
+{
+ return __qpnpint_handle_irq(spmi_ctrl, spec, false);
+}
+
EXPORT_SYMBOL(qpnpint_handle_irq);
+int qpnpint_show_irq(struct spmi_controller *spmi_ctrl,
+ struct qpnp_irq_spec *spec)
+{
+ return __qpnpint_handle_irq(spmi_ctrl, spec, true);
+}
+EXPORT_SYMBOL(qpnpint_show_irq);
+
int __init qpnpint_of_init(struct device_node *node, struct device_node *parent)
{
struct q_chip_data *chip_d;
diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
index f85a576..bc328e0 100644
--- a/drivers/spmi/spmi-pmic-arb.c
+++ b/drivers/spmi/spmi-pmic-arb.c
@@ -24,6 +24,7 @@
#include <linux/of_spmi.h>
#include <linux/module.h>
#include <linux/seq_file.h>
+#include <linux/syscore_ops.h>
#include <mach/qpnp-int.h>
#include "spmi-dbgfs.h"
@@ -126,9 +127,12 @@
u32 mapping_table[SPMI_MAPPING_TABLE_LEN];
};
+static struct spmi_pmic_arb_dev *the_pmic_arb;
+
static u32 pmic_arb_read(struct spmi_pmic_arb_dev *dev, u32 offset)
{
u32 val = readl_relaxed(dev->base + offset);
+
pr_debug("address 0x%p, val 0x%x\n", dev->base + offset, val);
return val;
}
@@ -485,7 +489,7 @@
}
static irqreturn_t
-periph_interrupt(struct spmi_pmic_arb_dev *pmic_arb, u8 apid)
+periph_interrupt(struct spmi_pmic_arb_dev *pmic_arb, u8 apid, bool show)
{
u16 ppid = get_peripheral_id(pmic_arb, apid);
void __iomem *intr = pmic_arb->intr;
@@ -511,10 +515,12 @@
/* Read the peripheral specific interrupt bits */
status = readl_relaxed(intr + SPMI_PIC_IRQ_STATUS(apid));
- /* Clear the peripheral interrupts */
- writel_relaxed(status, intr + SPMI_PIC_IRQ_CLEAR(apid));
- /* Interrupt needs to be cleared/acknowledged before exiting ISR */
- mb();
+ if (!show) {
+ /* Clear the peripheral interrupts */
+ writel_relaxed(status, intr + SPMI_PIC_IRQ_CLEAR(apid));
+ /* Irq needs to be cleared/acknowledged before exiting ISR */
+ mb();
+ }
dev_dbg(pmic_arb->dev,
"interrupt, apid:0x%x, sid:0x%x, pid:0x%x, intr:0x%x\n",
@@ -528,14 +534,20 @@
.per = pid,
.irq = i,
};
- qpnpint_handle_irq(&pmic_arb->controller, &irq_spec);
+ if (show)
+ qpnpint_show_irq(&pmic_arb->controller,
+ &irq_spec);
+ else
+ qpnpint_handle_irq(&pmic_arb->controller,
+ &irq_spec);
}
}
return IRQ_HANDLED;
}
/* Peripheral interrupt handler */
-static irqreturn_t pmic_arb_periph_irq(int irq, void *dev_id)
+static irqreturn_t
+__pmic_arb_periph_irq(int irq, void *dev_id, bool show)
{
struct spmi_pmic_arb_dev *pmic_arb = dev_id;
void __iomem *intr = pmic_arb->intr;
@@ -556,7 +568,8 @@
for (j = 0; status && j < 32; ++j, status >>= 1) {
if (status & 0x1) {
u8 id = (i * 32) + j;
- ret |= periph_interrupt(pmic_arb, id);
+
+ ret |= periph_interrupt(pmic_arb, id, show);
}
}
}
@@ -564,6 +577,22 @@
return ret;
}
+static irqreturn_t pmic_arb_periph_irq(int irq, void *dev_id)
+{
+ return __pmic_arb_periph_irq(irq, dev_id, false);
+}
+
+static void spmi_pmic_arb_resume(void)
+{
+ if (qpnpint_show_resume_irq())
+ __pmic_arb_periph_irq(the_pmic_arb->pic_irq,
+ the_pmic_arb, true);
+}
+
+static struct syscore_ops spmi_pmic_arb_syscore_ops = {
+ .resume = spmi_pmic_arb_resume,
+};
+
/* Callback to register an APID for specific slave/peripheral */
static int pmic_arb_intr_priv_data(struct spmi_controller *ctrl,
struct qpnp_irq_spec *spec, uint32_t *data)
@@ -766,6 +795,9 @@
pr_debug("PMIC Arb Version 0x%x\n",
pmic_arb_read(pmic_arb, PMIC_ARB_VERSION));
+ the_pmic_arb = pmic_arb;
+ register_syscore_ops(&spmi_pmic_arb_syscore_ops);
+
return 0;
err_reg_controller:
diff --git a/drivers/thermal/msm8974-tsens.c b/drivers/thermal/msm8974-tsens.c
index fcc5a8d..613af4e 100644
--- a/drivers/thermal/msm8974-tsens.c
+++ b/drivers/thermal/msm8974-tsens.c
@@ -164,7 +164,7 @@
#define TSENS10_POINT2_BACKUP_MASK 0x3f000000
#define TSENS_8X26_BASE0_MASK 0x1fe000
-#define TSENS0_8X26_POINT1_MASK 0x7f00000
+#define TSENS0_8X26_POINT1_MASK 0x7e00000
#define TSENS1_8X26_POINT1_MASK 0x3f
#define TSENS2_8X26_POINT1_MASK 0xfc0
#define TSENS3_8X26_POINT1_MASK 0x3f000
@@ -174,11 +174,11 @@
#define TSENS_8X26_TSENS_CAL_SEL 0xe0000000
#define TSENS_8X26_BASE1_MASK 0xff
#define TSENS0_8X26_POINT2_MASK 0x3f00
-#define TSENS1_8X26_POINT2_MASK 0xfc00
+#define TSENS1_8X26_POINT2_MASK 0xfc000
#define TSENS2_8X26_POINT2_MASK 0x3f00000
#define TSENS3_8X26_POINT2_MASK 0xfc000000
-#define TSENS4_8X26_POINT2_MASK 0xfc000000
-#define TSENS5_8X26_POINT2_MASK 0x3f00000
+#define TSENS4_8X26_POINT2_MASK 0x3f00000
+#define TSENS5_8X26_POINT2_MASK 0xfc000000
#define TSENS6_8X26_POINT2_MASK 0x7e0000
#define TSENS_8X26_CAL_SEL_SHIFT 29
diff --git a/drivers/video/msm/mdss/dsi_host_v2.c b/drivers/video/msm/mdss/dsi_host_v2.c
index 7f731d2..5554085 100644
--- a/drivers/video/msm/mdss/dsi_host_v2.c
+++ b/drivers/video/msm/mdss/dsi_host_v2.c
@@ -25,6 +25,7 @@
#include "dsi_v2.h"
#include "dsi_io_v2.h"
#include "dsi_host_v2.h"
+#include "mdss_debug.h"
#define DSI_POLL_SLEEP_US 1000
#define DSI_POLL_TIMEOUT_US 16000
@@ -38,7 +39,10 @@
int irq_no;
unsigned char *dsi_base;
+ size_t dsi_reg_size;
struct device dis_dev;
+
+ void (*debug_enable_clk)(int on);
};
static struct dsi_host_v2_private *dsi_host_private;
@@ -877,6 +881,38 @@
return 0;
}
+static void msm_dsi_debug_enable_clock(int on)
+{
+ if (dsi_host_private->debug_enable_clk)
+ dsi_host_private->debug_enable_clk(on);
+
+ if (on)
+ msm_dsi_ahb_ctrl(1);
+ else
+ msm_dsi_ahb_ctrl(0);
+}
+
+static int msm_dsi_debug_init(void)
+{
+ int rc;
+
+ if (!mdss_res)
+ return 0;
+
+ dsi_host_private->debug_enable_clk =
+ mdss_res->debug_inf.debug_enable_clock;
+
+ mdss_res->debug_inf.debug_enable_clock = msm_dsi_debug_enable_clock;
+
+
+ rc = mdss_debug_register_base("dsi0",
+ dsi_host_private->dsi_base,
+ dsi_host_private->dsi_reg_size);
+
+ return rc;
+}
+
+
static int __devinit msm_dsi_probe(struct platform_device *pdev)
{
struct dsi_interface intf;
@@ -897,9 +933,11 @@
__func__, __LINE__);
return -ENOMEM;
} else {
+ dsi_host_private->dsi_reg_size =
+ resource_size(mdss_dsi_mres);
dsi_host_private->dsi_base = ioremap(
mdss_dsi_mres->start,
- resource_size(mdss_dsi_mres));
+ dsi_host_private->dsi_reg_size);
if (!dsi_host_private->dsi_base) {
pr_err("%s:%d unable to remap dsi resources",
__func__, __LINE__);
@@ -952,6 +990,8 @@
intf.index = 0;
intf.private = NULL;
dsi_register_interface(&intf);
+
+ msm_dsi_debug_init();
pr_debug("%s success\n", __func__);
return 0;
dsi_probe_error:
diff --git a/drivers/video/msm/mdss/dsi_io_v2.c b/drivers/video/msm/mdss/dsi_io_v2.c
index f0ad511..365c32f 100644
--- a/drivers/video/msm/mdss/dsi_io_v2.c
+++ b/drivers/video/msm/mdss/dsi_io_v2.c
@@ -41,19 +41,13 @@
void msm_dsi_ahb_ctrl(int enable)
{
if (enable) {
- if (dsi_io_private->msm_dsi_ahb_clk_on) {
- pr_debug("ahb clks already ON\n");
- return;
- }
- clk_enable(dsi_io_private->dsi_ahb_clk);
- dsi_io_private->msm_dsi_ahb_clk_on = 1;
+ dsi_io_private->msm_dsi_ahb_clk_on++;
+ if (dsi_io_private->msm_dsi_ahb_clk_on == 1)
+ clk_enable(dsi_io_private->dsi_ahb_clk);
} else {
- if (dsi_io_private->msm_dsi_ahb_clk_on == 0) {
- pr_debug("ahb clk already OFF\n");
- return;
- }
- clk_disable(dsi_io_private->dsi_ahb_clk);
- dsi_io_private->msm_dsi_ahb_clk_on = 0;
+ dsi_io_private->msm_dsi_ahb_clk_on--;
+ if (dsi_io_private->msm_dsi_ahb_clk_on == 0)
+ clk_disable(dsi_io_private->dsi_ahb_clk);
}
}
diff --git a/drivers/video/msm/mdss/mdp3.c b/drivers/video/msm/mdss/mdp3.c
index e899fa3..66ad706 100644
--- a/drivers/video/msm/mdss/mdp3.c
+++ b/drivers/video/msm/mdss/mdp3.c
@@ -49,6 +49,7 @@
#include "mdp3_hwio.h"
#include "mdp3_ctrl.h"
#include "mdp3_ppp.h"
+#include "mdss_debug.h"
#define MDP_CORE_HW_VERSION 0x03040310
struct mdp3_hw_resource *mdp3_res;
@@ -997,14 +998,6 @@
return xres * bpp;
}
-void mdp3_fbmem_clear(void)
-{
- if (mdp3_res->ion_handle && mdp3_res->virt) {
- pr_debug("mdp3_fbmem_clear\n");
- memset(mdp3_res->virt, 0, mdp3_res->size);
- }
-}
-
static int mdp3_alloc(size_t size, void **virt, unsigned long *phys)
{
int ret = 0;
@@ -1057,76 +1050,16 @@
return -ENOMEM;
}
-static int mdp3_fbmem_alloc(struct msm_fb_data_type *mfd)
-{
- int ret = -ENOMEM, dom;
- void *virt = NULL;
- unsigned long phys = 0;
- size_t size;
- u32 yres = mfd->fbi->var.yres_virtual;
-
- size = PAGE_ALIGN(mfd->fbi->fix.line_length * yres);
-
- if (mfd->index != 0) {
- mfd->fbi->screen_base = virt;
- mfd->fbi->fix.smem_start = phys;
- mfd->fbi->fix.smem_len = 0;
- return 0;
- }
-
- ret = mdp3_alloc(size, &virt, &phys);
- if (ret) {
- pr_err("fail to allocate fb memory\n");
- return ret;
- }
-
- dom = (mdp3_res->domains + MDP3_IOMMU_DOMAIN)->domain_idx;
-
- ret = ion_map_iommu(mdp3_res->ion_client, mdp3_res->ion_handle,
- dom, 0, SZ_4K, 0, &mfd->iova,
- (unsigned long *)&size, 0, 0);
-
- if (ret) {
- pr_err("%s map IOMMU error\n", __func__);
- goto ion_map_iommu_err;
- }
-
- pr_debug("allocating %u bytes at %p (%lx phys) for fb %d\n",
- size, virt, phys, mfd->index);
-
- mfd->fbi->screen_base = virt;
- mfd->fbi->fix.smem_start = phys;
- mfd->fbi->fix.smem_len = size;
- return 0;
-
-ion_map_iommu_err:
- ion_unmap_kernel(mdp3_res->ion_client, mdp3_res->ion_handle);
- ion_free(mdp3_res->ion_client, mdp3_res->ion_handle);
- mdp3_res->ion_handle = NULL;
- mdp3_res->virt = NULL;
- mdp3_res->phys = 0;
- mdp3_res->size = 0;
- return -ENOMEM;
-}
-
-void mdp3_fbmem_free(struct msm_fb_data_type *mfd)
+void mdp3_free(void)
{
pr_debug("mdp3_fbmem_free\n");
if (mdp3_res->ion_handle) {
- int dom = (mdp3_res->domains + MDP3_IOMMU_DOMAIN)->domain_idx;
-
ion_unmap_kernel(mdp3_res->ion_client, mdp3_res->ion_handle);
- ion_unmap_iommu(mdp3_res->ion_client, mdp3_res->ion_handle,
- dom, 0);
ion_free(mdp3_res->ion_client, mdp3_res->ion_handle);
mdp3_res->ion_handle = NULL;
mdp3_res->virt = NULL;
mdp3_res->phys = 0;
mdp3_res->size = 0;
- mfd->fbi->screen_base = 0;
- mfd->fbi->fix.smem_start = 0;
- mfd->fbi->fix.smem_len = 0;
- mfd->iova = 0;
}
}
@@ -1185,7 +1118,7 @@
height = (rgb_size >> 16) & 0xffff;
width = rgb_size & 0xffff;
- size = PAGE_ALIGN(height * stride * 2);
+ size = PAGE_ALIGN(height * stride);
pr_debug("splash_height=%d splash_width=%d Buffer size=%d\n",
height, width, size);
@@ -1216,7 +1149,8 @@
rc = status & 0x1;
} else {
status = MDP3_REG_READ(MDP3_REG_DMA_P_CONFIG);
- rc = status & 0x80000;
+ status &= 0x180000;
+ rc = (status == 0x080000);
}
mdp3_clk_update(MDP3_CLK_AHB, 0);
@@ -1296,17 +1230,56 @@
rc = mdp3_continuous_splash_on(pdata);
}
}
+ return rc;
+}
+
+static void mdp3_debug_enable_clock(int on)
+{
+ if (on)
+ mdp3_clk_enable(1);
+ else
+ mdp3_clk_enable(0);
+}
+
+static int mdp3_debug_init(struct platform_device *pdev)
+{
+ int rc;
+ struct mdss_data_type *mdata;
+
+ mdata = devm_kzalloc(&pdev->dev, sizeof(*mdata), GFP_KERNEL);
+ if (!mdata)
+ return -ENOMEM;
+
+ mdss_res = mdata;
+
+ mdata->debug_inf.debug_dump_stats = NULL;
+ mdata->debug_inf.debug_enable_clock = mdp3_debug_enable_clock;
+
+ rc = mdss_debugfs_init(mdata);
+ if (rc)
+ return rc;
+
+ rc = mdss_debug_register_base(NULL, mdp3_res->mdp_base ,
+ mdp3_res->mdp_reg_size);
return rc;
}
+static void mdp3_debug_deinit(struct platform_device *pdev)
+{
+ if (mdss_res) {
+ mdss_debugfs_remove(mdss_res);
+ devm_kfree(&pdev->dev, mdss_res);
+ mdss_res = NULL;
+ }
+}
+
static int mdp3_probe(struct platform_device *pdev)
{
int rc;
static struct msm_mdp_interface mdp3_interface = {
.init_fnc = mdp3_init,
.fb_mem_get_iommu_domain = mdp3_fb_mem_get_iommu_domain,
- .fb_mem_alloc_fnc = mdp3_fbmem_alloc,
.panel_register_done = mdp3_panel_register_done,
.fb_stride = mdp3_fb_stride,
};
@@ -1348,6 +1321,12 @@
goto probe_done;
}
+ rc = mdp3_debug_init(pdev);
+ if (rc) {
+ pr_err("unable to initialize mdp debugging\n");
+ goto probe_done;
+ }
+
rc = mdss_fb_register_mdp_instance(&mdp3_interface);
if (rc)
pr_err("unable to register mdp instance\n");
@@ -1361,6 +1340,11 @@
devm_kfree(&pdev->dev, mdp3_res);
mdp3_res = NULL;
+
+ if (mdss_res) {
+ devm_kfree(&pdev->dev, mdss_res);
+ mdss_res = NULL;
+ }
}
return rc;
@@ -1409,6 +1393,7 @@
pm_runtime_disable(&pdev->dev);
mdp3_bus_scale_unregister();
mdp3_clk_remove();
+ mdp3_debug_deinit(pdev);
return 0;
}
diff --git a/drivers/video/msm/mdss/mdp3.h b/drivers/video/msm/mdss/mdp3.h
index 03416c7..bd1c03d 100644
--- a/drivers/video/msm/mdss/mdp3.h
+++ b/drivers/video/msm/mdss/mdp3.h
@@ -155,9 +155,7 @@
int mdp3_iommu_enable(int client);
int mdp3_iommu_disable(int client);
int mdp3_iommu_is_attached(int client);
-void mdp3_fbmem_free(struct msm_fb_data_type *mfd);
-void mdp3_fbmem_clear(void);
-
+void mdp3_free(void);
#define MDP3_REG_WRITE(addr, val) writel_relaxed(val, mdp3_res->mdp_base + addr)
#define MDP3_REG_READ(addr) readl_relaxed(mdp3_res->mdp_base + addr)
diff --git a/drivers/video/msm/mdss/mdp3_ctrl.c b/drivers/video/msm/mdss/mdp3_ctrl.c
index 0a0c272..bb53f33 100644
--- a/drivers/video/msm/mdss/mdp3_ctrl.c
+++ b/drivers/video/msm/mdss/mdp3_ctrl.c
@@ -473,8 +473,6 @@
goto on_error;
}
- mdp3_fbmem_clear();
-
pr_debug("mdp3_ctrl_on dma start\n");
if (mfd->fbi->screen_base) {
rc = mdp3_session->dma->start(mdp3_session->dma,
@@ -684,6 +682,7 @@
pr_debug("continuous splash screen, IOMMU not attached\n");
mdp3_ctrl_off(mfd);
mdp3_ctrl_on(mfd);
+ mdp3_free();
}
mutex_lock(&mdp3_session->lock);
@@ -699,9 +698,6 @@
if (mdp3_bufq_count(&mdp3_session->bufq_out) > 2) {
data = mdp3_bufq_pop(&mdp3_session->bufq_out);
mdp3_put_img(data);
-
- if (mfd->fbi->screen_base)
- mdp3_fbmem_free(mfd);
}
mutex_unlock(&mdp3_session->lock);
diff --git a/drivers/video/msm/mdss/mdp3_dma.c b/drivers/video/msm/mdss/mdp3_dma.c
index f4421f2..31b9deb 100644
--- a/drivers/video/msm/mdss/mdp3_dma.c
+++ b/drivers/video/msm/mdss/mdp3_dma.c
@@ -18,7 +18,7 @@
#include "mdp3_hwio.h"
#define DMA_STOP_POLL_SLEEP_US 1000
-#define DMA_STOP_POLL_TIMEOUT_US 16000
+#define DMA_STOP_POLL_TIMEOUT_US 32000
#define DMA_HISTO_RESET_TIMEOUT_MS 40
#define DMA_LUT_CONFIG_MASK 0xfffffbe8
#define DMA_CCS_CONFIG_MASK 0xfffffc17
diff --git a/drivers/video/msm/mdss/mdss.h b/drivers/video/msm/mdss/mdss.h
index 840af17..25a5c9f 100644
--- a/drivers/video/msm/mdss/mdss.h
+++ b/drivers/video/msm/mdss/mdss.h
@@ -56,6 +56,12 @@
u32 val;
};
+struct mdss_debug_inf {
+ void *debug_data;
+ int (*debug_dump_stats)(void *data, char *buf, int len);
+ void (*debug_enable_clock)(int on);
+};
+
struct mdss_data_type {
u32 mdp_rev;
struct clk *mdp_clk[MDSS_MAX_CLK];
@@ -121,7 +127,7 @@
struct mdss_iommu_map_type *iommu_map;
struct early_suspend early_suspend;
- void *debug_data;
+ struct mdss_debug_inf debug_inf;
int current_bus_idx;
bool mixer_switched;
};
diff --git a/drivers/video/msm/mdss/mdss_debug.c b/drivers/video/msm/mdss/mdss_debug.c
index 13fba26..f933c8e 100644
--- a/drivers/video/msm/mdss/mdss_debug.c
+++ b/drivers/video/msm/mdss/mdss_debug.c
@@ -128,11 +128,12 @@
const char __user *user_buf, size_t count, loff_t *ppos)
{
struct mdss_debug_base *dbg = file->private_data;
+ struct mdss_data_type *mdata = mdss_res;
size_t off;
u32 data, cnt;
char buf[24];
- if (!dbg)
+ if (!dbg || !mdata)
return -ENODEV;
if (count >= sizeof(buf))
@@ -151,9 +152,13 @@
if (off >= dbg->max_offset)
return -EFAULT;
- mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
+ if (mdata->debug_inf.debug_enable_clock)
+ mdata->debug_inf.debug_enable_clock(1);
+
writel_relaxed(data, dbg->base + off);
- mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
+
+ if (mdata->debug_inf.debug_enable_clock)
+ mdata->debug_inf.debug_enable_clock(0);
pr_debug("addr=%x data=%x\n", off, data);
@@ -164,9 +169,10 @@
char __user *user_buf, size_t count, loff_t *ppos)
{
struct mdss_debug_base *dbg = file->private_data;
+ struct mdss_data_type *mdata = mdss_res;
size_t len;
- if (!dbg) {
+ if (!dbg || !mdata) {
pr_err("invalid handle\n");
return -ENODEV;
}
@@ -188,7 +194,9 @@
ptr = dbg->base + dbg->off;
tot = 0;
- mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
+ if (mdata->debug_inf.debug_enable_clock)
+ mdata->debug_inf.debug_enable_clock(1);
+
for (cnt = dbg->cnt; cnt > 0; cnt -= ROW_BYTES) {
hex_dump_to_buffer(ptr, min(cnt, ROW_BYTES),
ROW_BYTES, GROUP_BYTES, dump_buf,
@@ -203,7 +211,8 @@
if (tot >= dbg->buf_len)
break;
}
- mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
+ if (mdata->debug_inf.debug_enable_clock)
+ mdata->debug_inf.debug_enable_clock(0);
dbg->buf_len = tot;
}
@@ -246,10 +255,10 @@
char dn[80] = "";
int prefix_len = 0;
- if (!mdata || !mdata->debug_data)
+ if (!mdata || !mdata->debug_inf.debug_data)
return -ENODEV;
- mdd = mdata->debug_data;
+ mdd = mdata->debug_inf.debug_data;
dbg = kzalloc(sizeof(*dbg), GFP_KERNEL);
if (!dbg)
@@ -301,33 +310,11 @@
return 0;
}
-static int mdss_debug_stat_ctl_dump(struct mdss_mdp_ctl *ctl,
- char *bp, int len)
-{
- int tot = 0;
-
- if (!ctl->ref_cnt)
- return 0;
-
- if (ctl->intf_num) {
- tot = scnprintf(bp, len,
- "intf%d: play: %08u \tvsync: %08u \tunderrun: %08u\n",
- ctl->intf_num, ctl->play_cnt,
- ctl->vsync_cnt, ctl->underrun_cnt);
- } else {
- tot = scnprintf(bp, len, "wb: \tmode=%x \tplay: %08u\n",
- ctl->opmode, ctl->play_cnt);
- }
-
- return tot;
-}
-
static ssize_t mdss_debug_stat_read(struct file *file, char __user *buff,
size_t count, loff_t *ppos)
{
struct mdss_data_type *mdata = file->private_data;
- struct mdss_mdp_pipe *pipe;
- int i, len, tot;
+ int len, tot;
char bp[512];
if (*ppos)
@@ -337,30 +324,11 @@
tot = scnprintf(bp, len, "\nmdp:\n");
- for (i = 0; i < mdata->nctl; i++)
- tot += mdss_debug_stat_ctl_dump(mdata->ctl_off + i,
- bp + tot, len - tot);
- tot += scnprintf(bp + tot, len - tot, "\n");
+ if (mdata->debug_inf.debug_dump_stats)
+ tot += mdata->debug_inf.debug_dump_stats(mdata,
+ bp + tot, len - tot);
- for (i = 0; i < mdata->nvig_pipes; i++) {
- pipe = mdata->vig_pipes + i;
- tot += scnprintf(bp + tot, len - tot,
- "VIG%d : %08u\t", i, pipe->play_cnt);
- }
- tot += scnprintf(bp + tot, len - tot, "\n");
- for (i = 0; i < mdata->nrgb_pipes; i++) {
- pipe = mdata->rgb_pipes + i;
- tot += scnprintf(bp + tot, len - tot,
- "RGB%d : %08u\t", i, pipe->play_cnt);
- }
- tot += scnprintf(bp + tot, len - tot, "\n");
-
- for (i = 0; i < mdata->ndma_pipes; i++) {
- pipe = mdata->dma_pipes + i;
- tot += scnprintf(bp + tot, len - tot,
- "DMA%d : %08u\t", i, pipe->play_cnt);
- }
tot += scnprintf(bp + tot, len - tot, "\n");
if (copy_to_user(buff, bp, tot))
@@ -401,7 +369,7 @@
{
struct mdss_debug_data *mdd;
- if (mdata->debug_data) {
+ if (mdata->debug_inf.debug_data) {
pr_warn("mdss debugfs already initialized\n");
return -EBUSY;
}
@@ -424,18 +392,19 @@
debugfs_create_file("stat", 0644, mdd->root, mdata, &mdss_stat_fops);
debugfs_create_u32("min_mdp_clk", 0644, mdd->root,
- (u32 *)&mdata->min_mdp_clk);
+ (u32 *)&mdata->min_mdp_clk);
- mdata->debug_data = mdd;
+ mdata->debug_inf.debug_data = mdd;
return 0;
}
int mdss_debugfs_remove(struct mdss_data_type *mdata)
{
- struct mdss_debug_data *mdd = mdata->debug_data;
+ struct mdss_debug_data *mdd = mdata->debug_inf.debug_data;
mdss_debugfs_cleanup(mdd);
+ mdata->debug_inf.debug_data = NULL;
return 0;
}
diff --git a/drivers/video/msm/mdss/mdss_mdp.c b/drivers/video/msm/mdss/mdss_mdp.c
index 44d81c8..8924298 100644
--- a/drivers/video/msm/mdss/mdss_mdp.c
+++ b/drivers/video/msm/mdss/mdss_mdp.c
@@ -808,10 +808,75 @@
return 0;
}
+static int mdss_debug_stat_ctl_dump(struct mdss_mdp_ctl *ctl,
+ char *bp, int len)
+{
+ int total = 0;
+
+ if (!ctl->ref_cnt)
+ return 0;
+
+ if (ctl->intf_num) {
+ total = scnprintf(bp, len,
+ "intf%d: play: %08u \tvsync: %08u \tunderrun: %08u\n",
+ ctl->intf_num, ctl->play_cnt,
+ ctl->vsync_cnt, ctl->underrun_cnt);
+ } else {
+ total = scnprintf(bp, len, "wb: \tmode=%x \tplay: %08u\n",
+ ctl->opmode, ctl->play_cnt);
+ }
+
+ return total;
+}
+
+static int mdss_debug_dump_stats(void *data, char *buf, int len)
+{
+ struct mdss_data_type *mdata = data;
+ struct mdss_mdp_pipe *pipe;
+ int i, total = 0;
+
+ for (i = 0; i < mdata->nctl; i++)
+ total += mdss_debug_stat_ctl_dump(mdata->ctl_off + i, buf, len);
+
+ total += scnprintf(buf + total, len - total, "\n");
+
+ for (i = 0; i < mdata->nvig_pipes; i++) {
+ pipe = mdata->vig_pipes + i;
+ total += scnprintf(buf + total, len - total,
+ "VIG%d : %08u\t", i, pipe->play_cnt);
+ }
+ total += scnprintf(buf + total, len - total, "\n");
+
+ for (i = 0; i < mdata->nrgb_pipes; i++) {
+ pipe = mdata->rgb_pipes + i;
+ total += scnprintf(buf + total, len - total,
+ "RGB%d : %08u\t", i, pipe->play_cnt);
+ }
+ total += scnprintf(buf + total, len - total, "\n");
+
+ for (i = 0; i < mdata->ndma_pipes; i++) {
+ pipe = mdata->dma_pipes + i;
+ total += scnprintf(buf + total, len - total,
+ "DMA%d : %08u\t", i, pipe->play_cnt);
+ }
+ return total;
+}
+
+static void mdss_debug_enable_clock(int on)
+{
+ if (on)
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
+ else
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
+}
+
static int mdss_mdp_debug_init(struct mdss_data_type *mdata)
{
int rc;
+ mdata->debug_inf.debug_dump_stats = mdss_debug_dump_stats;
+ mdata->debug_inf.debug_enable_clock = mdss_debug_enable_clock;
+
rc = mdss_debugfs_init(mdata);
if (rc)
return rc;
diff --git a/drivers/video/msm/mdss/mdss_mdp.h b/drivers/video/msm/mdss/mdss_mdp.h
index 08849c8..70d9107 100644
--- a/drivers/video/msm/mdss/mdss_mdp.h
+++ b/drivers/video/msm/mdss/mdss_mdp.h
@@ -40,6 +40,7 @@
#define MAX_UPSCALE_RATIO 20
#define MAX_DECIMATION 4
#define MDP_MIN_VBP 4
+#define MAX_FREE_LIST_SIZE 12
#define C3_ALPHA 3 /* alpha */
#define C2_R_Cr 2 /* R/Cr */
@@ -380,6 +381,9 @@
struct list_head pipes_cleanup;
struct list_head rot_proc_list;
bool mixer_swap;
+
+ struct mdss_mdp_data free_list[MAX_FREE_LIST_SIZE];
+ int free_list_size;
};
struct mdss_mdp_perf_params {
diff --git a/drivers/video/msm/mdss/mdss_mdp_ctl.c b/drivers/video/msm/mdss/mdss_mdp_ctl.c
index 1186f1e..176d0df 100644
--- a/drivers/video/msm/mdss/mdss_mdp_ctl.c
+++ b/drivers/video/msm/mdss/mdss_mdp_ctl.c
@@ -567,6 +567,7 @@
struct mdss_mdp_ctl *ctl;
ctl = mixer->ctl;
+ mixer->rotator_mode = 0;
pr_debug("destroy ctl=%d mixer=%d\n", ctl->num, mixer->num);
diff --git a/drivers/video/msm/mdss/mdss_mdp_overlay.c b/drivers/video/msm/mdss/mdss_mdp_overlay.c
index 1a5a44b..22d2d2a 100644
--- a/drivers/video/msm/mdss/mdss_mdp_overlay.c
+++ b/drivers/video/msm/mdss/mdss_mdp_overlay.c
@@ -699,6 +699,45 @@
return 0;
}
+/**
+ * __mdss_mdp_overlay_free_list_purge() - clear free list of buffers
+ * @mfd: Msm frame buffer data structure for the associated fb
+ *
+ * Frees memory and clears current list of buffers which are pending free
+ */
+static void __mdss_mdp_overlay_free_list_purge(struct msm_fb_data_type *mfd)
+{
+ struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
+ int i;
+
+ pr_debug("purging fb%d free list\n", mfd->index);
+ for (i = 0; i < mdp5_data->free_list_size; i++)
+ mdss_mdp_overlay_free_buf(&mdp5_data->free_list[i]);
+ mdp5_data->free_list_size = 0;
+}
+
+/**
+ * __mdss_mdp_overlay_free_list_add() - add a buffer to free list
+ * @mfd: Msm frame buffer data structure for the associated fb
+ */
+static void __mdss_mdp_overlay_free_list_add(struct msm_fb_data_type *mfd,
+ struct mdss_mdp_data *buf)
+{
+ struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
+ int i;
+
+ /* if holding too many buffers free current list */
+ if (mdp5_data->free_list_size >= MAX_FREE_LIST_SIZE) {
+ pr_warn("max free list size for fb%d, purging\n", mfd->index);
+ __mdss_mdp_overlay_free_list_purge(mfd);
+ }
+
+ BUG_ON(mdp5_data->free_list_size >= MAX_FREE_LIST_SIZE);
+ i = mdp5_data->free_list_size++;
+ mdp5_data->free_list[i] = *buf;
+ memset(buf, 0, sizeof(*buf));
+}
+
static void mdss_mdp_overlay_cleanup(struct msm_fb_data_type *mfd)
{
struct mdss_mdp_pipe *pipe, *tmp;
@@ -706,18 +745,20 @@
LIST_HEAD(destroy_pipes);
mutex_lock(&mfd->lock);
+ __mdss_mdp_overlay_free_list_purge(mfd);
+
list_for_each_entry_safe(pipe, tmp, &mdp5_data->pipes_cleanup,
cleanup_list) {
list_move(&pipe->cleanup_list, &destroy_pipes);
mdss_mdp_overlay_free_buf(&pipe->back_buf);
- mdss_mdp_overlay_free_buf(&pipe->front_buf);
+ __mdss_mdp_overlay_free_list_add(mfd, &pipe->front_buf);
pipe->mfd = NULL;
}
list_for_each_entry(pipe, &mdp5_data->pipes_used, used_list) {
if (pipe->back_buf.num_planes) {
/* make back buffer active */
- mdss_mdp_overlay_free_buf(&pipe->front_buf);
+ __mdss_mdp_overlay_free_list_add(mfd, &pipe->front_buf);
swap(pipe->back_buf, pipe->front_buf);
}
}
@@ -2084,6 +2125,8 @@
rc = mdss_mdp_ctl_stop(mdp5_data->ctl);
if (rc == 0) {
+ __mdss_mdp_overlay_free_list_purge(mfd);
+
if (!mfd->ref_cnt) {
mdp5_data->borderfill_enable = false;
mdss_mdp_ctl_destroy(mdp5_data->ctl);
diff --git a/include/linux/cm36283.h b/include/linux/cm36283.h
index 362b709..2872d04 100644
--- a/include/linux/cm36283.h
+++ b/include/linux/cm36283.h
@@ -120,6 +120,15 @@
extern unsigned int ps_kparam1;
extern unsigned int ps_kparam2;
+#define CM36283_LEVELS_SIZE 10
+
+enum {
+ CM36283_ALS_IT0 = 0,
+ CM36283_ALS_IT1,
+ CM36283_ALS_IT2,
+ CM36283_ALS_IT3,
+};
+
struct cm36283_platform_data {
int intr;
uint16_t levels[10];
@@ -131,6 +140,7 @@
uint16_t ls_cmd;
uint16_t ps_conf1_val;
uint16_t ps_conf3_val;
+ bool polling;
};
#endif
diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h
index f6b93ff..38877cc 100644
--- a/include/linux/videodev2.h
+++ b/include/linux/videodev2.h
@@ -1551,6 +1551,7 @@
V4L2_MPEG_VIDEO_H264_LEVEL_4_2 = 13,
V4L2_MPEG_VIDEO_H264_LEVEL_5_0 = 14,
V4L2_MPEG_VIDEO_H264_LEVEL_5_1 = 15,
+ V4L2_MPEG_VIDEO_H264_LEVEL_5_2 = 16,
};
#define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA (V4L2_CID_MPEG_BASE+360)
#define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA (V4L2_CID_MPEG_BASE+361)
diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h
index fb2b57a..4ecadd8 100644
--- a/include/net/cfg80211.h
+++ b/include/net/cfg80211.h
@@ -3486,6 +3486,14 @@
struct cfg80211_ft_event_params *ft_event);
+
+/**
+ * cfg80211_ap_stopped - notify userspace that AP mode stopped
+ * @netdev: network device
+ * @gfp: context flags
+ */
+void cfg80211_ap_stopped(struct net_device *netdev, gfp_t gfp);
+
/* Logging, debugging and troubleshooting/diagnostic helpers. */
/* wiphy_printk helpers, similar to dev_printk */
diff --git a/include/sound/apr_audio-v2.h b/include/sound/apr_audio-v2.h
index 88fcf61..fb58d12 100644
--- a/include/sound/apr_audio-v2.h
+++ b/include/sound/apr_audio-v2.h
@@ -82,14 +82,15 @@
*/
#define ADM_CMD_DEVICE_OPEN_V5 0x00010326
-#define ADM_BIT_SHIFT_DEVICE_PERF_MODE_FLAG 13
+/* Definition for a low latency stream session. */
+#define ADM_LOW_LATENCY_DEVICE_SESSION 0x2000
+
+/* Definition for a ultra low latency stream session. */
+#define ADM_ULTRA_LOW_LATENCY_DEVICE_SESSION 0x4000
/* Definition for a legacy device session. */
#define ADM_LEGACY_DEVICE_SESSION 0
-/* Definition for a low latency stream session. */
-#define ADM_LOW_LATENCY_DEVICE_SESSION 1
-
/* Indicates that endpoint_id_2 is to be ignored.*/
#define ADM_CMD_COPP_OPEN_END_POINT_ID_2_IGNORE 0xFFFF
@@ -3816,11 +3817,12 @@
#define ASM_STREAM_CMD_OPEN_WRITE_V2 0x00010D8F
#define ASM_STREAM_CMD_OPEN_WRITE_V3 0x00010DB3
-#define ASM_SHIFT_STREAM_PERF_MODE_FLAG_IN_OPEN_WRITE 28
+#define ASM_LOW_LATENCY_STREAM_SESSION 0x10000000
+
+#define ASM_ULTRA_LOW_LATENCY_STREAM_SESSION 0x20000000
#define ASM_LEGACY_STREAM_SESSION 0
-#define ASM_LOW_LATENCY_STREAM_SESSION 1
struct asm_stream_cmd_open_write_v3 {
struct apr_hdr hdr;
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 5256d44..627dab1 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -1670,8 +1670,10 @@
{
struct rq *rq = task_rq(p);
- BUG_ON(rq != this_rq());
- BUG_ON(p == current);
+ if (WARN_ON(rq != this_rq()) ||
+ WARN_ON(p == current))
+ return;
+
lockdep_assert_held(&rq->lock);
if (!raw_spin_trylock(&p->pi_lock)) {
diff --git a/net/wireless/nl80211.c b/net/wireless/nl80211.c
index 1dee449..7db02f3 100644
--- a/net/wireless/nl80211.c
+++ b/net/wireless/nl80211.c
@@ -2408,8 +2408,8 @@
return -ENOENT;
err = rdev->ops->stop_ap(&rdev->wiphy, dev);
- if (!err)
- wdev->beacon_interval = 0;
+ wdev->beacon_interval = 0;
+
return err;
}
@@ -8473,6 +8473,18 @@
}
EXPORT_SYMBOL(cfg80211_ft_event);
+
+void cfg80211_ap_stopped(struct net_device *netdev, gfp_t gfp)
+{
+ struct wireless_dev *wdev = netdev->ieee80211_ptr;
+ struct cfg80211_registered_device *rdev = wiphy_to_dev(wdev->wiphy);
+
+ nl80211_send_mlme_event(rdev, netdev, NULL, 0,
+ NL80211_CMD_STOP_AP, gfp);
+}
+EXPORT_SYMBOL(cfg80211_ap_stopped);
+
+
/* initialisation/exit functions */
int nl80211_init(void)
diff --git a/sound/soc/codecs/wcd9306.c b/sound/soc/codecs/wcd9306.c
index fa44b72..23696c9 100644
--- a/sound/soc/codecs/wcd9306.c
+++ b/sound/soc/codecs/wcd9306.c
@@ -776,28 +776,34 @@
struct tapan_priv *tapan = snd_soc_codec_get_drvdata(codec);
struct wcd9xxx_pdata *pdata = tapan->resmgr.pdata;
int i;
+ bool found_regulator = false;
for (i = 0; i < ARRAY_SIZE(pdata->regulator); i++) {
if (pdata->regulator[i].name == NULL)
continue;
if (!strncmp(pdata->regulator[i].name,
- WCD9XXX_SUPPLY_BUCK_NAME,
- sizeof(WCD9XXX_SUPPLY_BUCK_NAME))) {
+ WCD9XXX_SUPPLY_BUCK_NAME,
+ sizeof(WCD9XXX_SUPPLY_BUCK_NAME))) {
+ found_regulator = true;
if ((pdata->regulator[i].min_uV ==
- WCD9XXX_CDC_BUCK_MV_1P8) ||
- (pdata->regulator[i].min_uV ==
- WCD9XXX_CDC_BUCK_MV_2P15))
+ WCD9XXX_CDC_BUCK_MV_1P8) ||
+ (pdata->regulator[i].min_uV ==
+ WCD9XXX_CDC_BUCK_MV_2P15))
buck_volt = pdata->regulator[i].min_uV;
break;
}
- dev_err(codec->dev,
- "%s: Failed to find regulator for %s\n",
- __func__, WCD9XXX_SUPPLY_BUCK_NAME);
}
- dev_dbg(codec->dev,
+
+ if (!found_regulator)
+ dev_err(codec->dev,
+ "%s: Failed to find regulator for %s\n",
+ __func__, WCD9XXX_SUPPLY_BUCK_NAME);
+ else
+ dev_dbg(codec->dev,
"%s: S4 voltage requested is %d\n",
__func__, buck_volt);
+
return buck_volt;
}
@@ -4923,6 +4929,13 @@
}
EXPORT_SYMBOL(tapan_hs_detect);
+void tapan_hs_detect_exit(struct snd_soc_codec *codec)
+{
+ struct tapan_priv *tapan = snd_soc_codec_get_drvdata(codec);
+ wcd9xxx_mbhc_stop(&tapan->mbhc);
+}
+EXPORT_SYMBOL(tapan_hs_detect_exit);
+
static int tapan_device_down(struct wcd9xxx *wcd9xxx)
{
struct snd_soc_codec *codec;
diff --git a/sound/soc/codecs/wcd9320.c b/sound/soc/codecs/wcd9320.c
index 6e500f5..3621879 100644
--- a/sound/soc/codecs/wcd9320.c
+++ b/sound/soc/codecs/wcd9320.c
@@ -6191,6 +6191,14 @@
}
EXPORT_SYMBOL(taiko_hs_detect);
+void taiko_hs_detect_exit(struct snd_soc_codec *codec)
+{
+ struct taiko_priv *taiko = snd_soc_codec_get_drvdata(codec);
+ wcd9xxx_mbhc_stop(&taiko->mbhc);
+ taiko->mbhc_started = false;
+}
+EXPORT_SYMBOL(taiko_hs_detect_exit);
+
void taiko_event_register(
int (*machine_event_cb)(struct snd_soc_codec *codec,
enum wcd9xxx_codec_event),
@@ -6277,14 +6285,10 @@
ret = wcd9xxx_mbhc_init(&taiko->mbhc, &taiko->resmgr, codec,
taiko_enable_mbhc_micbias,
NULL, rco_clk_rate, true);
- if (ret) {
+ if (ret)
pr_err("%s: mbhc init failed %d\n", __func__, ret);
- } else {
- ret = wcd9xxx_mbhc_start(&taiko->mbhc,
- taiko->mbhc.mbhc_cfg);
- if (!ret)
- taiko->mbhc_started = true;
- }
+ else
+ taiko_hs_detect(codec, taiko->mbhc.mbhc_cfg);
}
taiko->machine_codec_event_cb(codec, WCD9XXX_CODEC_EVENT_CODEC_UP);
diff --git a/sound/soc/codecs/wcd9320.h b/sound/soc/codecs/wcd9320.h
index 8f222ad..5ab5200 100644
--- a/sound/soc/codecs/wcd9320.h
+++ b/sound/soc/codecs/wcd9320.h
@@ -146,6 +146,7 @@
bool dapm);
extern int taiko_hs_detect(struct snd_soc_codec *codec,
struct wcd9xxx_mbhc_config *mbhc_cfg);
+extern void taiko_hs_detect_exit(struct snd_soc_codec *codec);
extern void *taiko_get_afe_config(struct snd_soc_codec *codec,
enum afe_config_type config_type);
diff --git a/sound/soc/codecs/wcd9xxx-mbhc.c b/sound/soc/codecs/wcd9xxx-mbhc.c
index 903b239..acb86416 100644
--- a/sound/soc/codecs/wcd9xxx-mbhc.c
+++ b/sound/soc/codecs/wcd9xxx-mbhc.c
@@ -67,6 +67,7 @@
#define HS_DETECT_PLUG_INERVAL_MS 100
#define SWCH_REL_DEBOUNCE_TIME_MS 50
#define SWCH_IRQ_DEBOUNCE_TIME_US 5000
+#define BTN_RELEASE_DEBOUNCE_TIME_MS 25
#define GND_MIC_SWAP_THRESHOLD 2
#define OCP_ATTEMPT 1
@@ -854,6 +855,7 @@
} else if (jack_type == SND_JACK_HEADSET) {
mbhc->polling_active = BUTTON_POLLING_SUPPORTED;
mbhc->current_plug = PLUG_TYPE_HEADSET;
+ mbhc->update_z = true;
} else if (jack_type == SND_JACK_LINEOUT) {
mbhc->current_plug = PLUG_TYPE_HIGH_HPH;
}
@@ -2838,12 +2840,11 @@
return r;
}
-static int wcd9xxx_is_fake_press(struct wcd9xxx_mbhc *mbhc)
+static int wcd9xxx_is_false_press(struct wcd9xxx_mbhc *mbhc)
{
- int i;
s16 mb_v;
+ int i = 0;
int r = 0;
- const int dces = NUM_DCE_PLUG_DETECT;
const s16 v_ins_hu =
wcd9xxx_get_current_v(mbhc, WCD9XXX_CURRENT_V_INS_HU);
const s16 v_ins_h =
@@ -2852,9 +2853,16 @@
wcd9xxx_get_current_v(mbhc, WCD9XXX_CURRENT_V_B1_HU);
const s16 v_b1_h =
wcd9xxx_get_current_v(mbhc, WCD9XXX_CURRENT_V_B1_H);
+ const unsigned long timeout =
+ jiffies + msecs_to_jiffies(BTN_RELEASE_DEBOUNCE_TIME_MS);
- for (i = 0; i < dces; i++) {
- usleep_range(10000, 10000);
+ while (time_before(jiffies, timeout)) {
+ /*
+ * This function needs to run measurements just few times during
+ * release debounce time. Make 1ms interval to avoid
+ * unnecessary excessive measurements.
+ */
+ usleep_range(1000, 1000 + WCD9XXX_USLEEP_RANGE_MARGIN_US);
if (i == 0) {
mb_v = wcd9xxx_codec_sta_dce(mbhc, 0, true);
pr_debug("%s: STA[0]: %d,%d\n", __func__, mb_v,
@@ -2872,6 +2880,7 @@
break;
}
}
+ i++;
}
return r;
@@ -2955,6 +2964,9 @@
*sta_z = wcd9xxx_codec_sta_dce(mbhc, 0, false);
*dce_z = wcd9xxx_codec_sta_dce(mbhc, 1, false);
+ pr_debug("%s: sta_z 0x%x, dce_z 0x%x\n", __func__, *sta_z & 0xFFFF,
+ *dce_z & 0xFFFF);
+
/* Connect override from micbias */
snd_soc_update_bits(codec, WCD9XXX_A_MAD_ANA_CTRL, 1 << 4, 1 << 4);
/* Disable pull down micbias to ground */
@@ -2962,6 +2974,21 @@
snd_soc_write(codec, mbhc->mbhc_bias_regs.ctl_reg, reg0);
}
+void wcd9xxx_update_z(struct wcd9xxx_mbhc *mbhc)
+{
+ const u16 sta_z = mbhc->mbhc_data.sta_z;
+ const u16 dce_z = mbhc->mbhc_data.dce_z;
+
+ wcd9xxx_get_z(mbhc, &mbhc->mbhc_data.dce_z, &mbhc->mbhc_data.sta_z);
+ pr_debug("%s: sta_z 0x%x,dce_z 0x%x -> sta_z 0x%x,dce_z 0x%x\n",
+ __func__, sta_z & 0xFFFF, dce_z & 0xFFFF,
+ mbhc->mbhc_data.sta_z & 0xFFFF,
+ mbhc->mbhc_data.dce_z & 0xFFFF);
+
+ wcd9xxx_mbhc_calc_thres(mbhc);
+ wcd9xxx_calibrate_hs_polling(mbhc);
+}
+
/*
* wcd9xxx_update_rel_threshold : update mbhc release upper bound threshold
* to ceilmv + buffer
@@ -3042,6 +3069,9 @@
vddio = (mbhc->mbhc_data.micb_mv != VDDIO_MICBIAS_MV &&
mbhc->mbhc_micbias_switched);
+ dce_z = mbhc->mbhc_data.dce_z;
+ sta_z = mbhc->mbhc_data.sta_z;
+
/* Measure scaled HW STA */
dce[0] = wcd9xxx_read_dce_result(codec);
sta = wcd9xxx_read_sta_result(codec);
@@ -3054,7 +3084,10 @@
} else {
pr_debug("%s: Button is released without resume",
__func__);
- wcd9xxx_get_z(mbhc, &dce_z, &sta_z);
+ if (mbhc->update_z) {
+ wcd9xxx_update_z(mbhc);
+ mbhc->update_z = false;
+ }
stamv = __wcd9xxx_codec_sta_dce_v(mbhc, 0, sta, sta_z,
mbhc->mbhc_data.micb_mv);
if (vddio)
@@ -3077,7 +3110,10 @@
meas++)
dce[meas] = wcd9xxx_codec_sta_dce(mbhc, 1, false);
- wcd9xxx_get_z(mbhc, &dce_z, &sta_z);
+ if (mbhc->update_z) {
+ wcd9xxx_update_z(mbhc);
+ mbhc->update_z = false;
+ }
stamv = __wcd9xxx_codec_sta_dce_v(mbhc, 0, sta, sta_z,
mbhc->mbhc_data.micb_mv);
@@ -3167,6 +3203,7 @@
static irqreturn_t wcd9xxx_release_handler(int irq, void *data)
{
int ret;
+ bool waitdebounce = true;
struct wcd9xxx_mbhc *mbhc = data;
pr_debug("%s: enter\n", __func__);
@@ -3181,7 +3218,7 @@
wcd9xxx_jack_report(mbhc, &mbhc->button_jack, 0,
mbhc->buttons_pressed);
} else {
- if (wcd9xxx_is_fake_press(mbhc)) {
+ if (wcd9xxx_is_false_press(mbhc)) {
pr_debug("%s: Fake button press interrupt\n",
__func__);
} else {
@@ -3200,6 +3237,7 @@
wcd9xxx_jack_report(mbhc,
&mbhc->button_jack,
0, mbhc->buttons_pressed);
+ waitdebounce = false;
}
}
}
@@ -3209,7 +3247,8 @@
wcd9xxx_calibrate_hs_polling(mbhc);
- msleep(SWCH_REL_DEBOUNCE_TIME_MS);
+ if (waitdebounce)
+ msleep(SWCH_REL_DEBOUNCE_TIME_MS);
wcd9xxx_start_hs_polling(mbhc);
pr_debug("%s: leave\n", __func__);
@@ -3839,17 +3878,33 @@
mbhc->mbhc_cb->enable_clock_gate)
mbhc->mbhc_cb->enable_clock_gate(mbhc->codec, true);
- if (!mbhc->mbhc_cfg->read_fw_bin)
+ if (!mbhc->mbhc_cfg->read_fw_bin ||
+ (mbhc->mbhc_cfg->read_fw_bin && mbhc->mbhc_fw)) {
rc = wcd9xxx_init_and_calibrate(mbhc);
- else
- schedule_delayed_work(&mbhc->mbhc_firmware_dwork,
- usecs_to_jiffies(FW_READ_TIMEOUT));
+ } else {
+ if (!mbhc->mbhc_fw)
+ schedule_delayed_work(&mbhc->mbhc_firmware_dwork,
+ usecs_to_jiffies(FW_READ_TIMEOUT));
+ else
+ pr_debug("%s: Skipping to read mbhc fw, 0x%p\n",
+ __func__, mbhc->mbhc_fw);
+ }
pr_debug("%s: leave %d\n", __func__, rc);
return rc;
}
EXPORT_SYMBOL(wcd9xxx_mbhc_start);
+void wcd9xxx_mbhc_stop(struct wcd9xxx_mbhc *mbhc)
+{
+ if (mbhc->mbhc_fw) {
+ cancel_delayed_work_sync(&mbhc->mbhc_firmware_dwork);
+ release_firmware(mbhc->mbhc_fw);
+ mbhc->mbhc_fw = NULL;
+ }
+}
+EXPORT_SYMBOL(wcd9xxx_mbhc_stop);
+
static enum wcd9xxx_micbias_num
wcd9xxx_event_to_micbias(const enum wcd9xxx_notify_event event)
{
@@ -4586,9 +4641,6 @@
wcd9xxx_free_irq(core_res, WCD9XXX_IRQ_HPH_PA_OCPL_FAULT, mbhc);
wcd9xxx_free_irq(core_res, WCD9XXX_IRQ_HPH_PA_OCPR_FAULT, mbhc);
- if (mbhc->mbhc_fw)
- release_firmware(mbhc->mbhc_fw);
-
wcd9xxx_resmgr_unregister_notifier(mbhc->resmgr, &mbhc->nblock);
wcd9xxx_cleanup_debugfs(mbhc);
diff --git a/sound/soc/codecs/wcd9xxx-mbhc.h b/sound/soc/codecs/wcd9xxx-mbhc.h
index 104c488..3040bc4 100644
--- a/sound/soc/codecs/wcd9xxx-mbhc.h
+++ b/sound/soc/codecs/wcd9xxx-mbhc.h
@@ -309,6 +309,8 @@
u32 rco_clk_rate;
+ bool update_z;
+
#ifdef CONFIG_DEBUG_FS
struct dentry *debugfs_poke;
struct dentry *debugfs_mbhc;
@@ -372,6 +374,7 @@
int wcd9xxx_mbhc_start(struct wcd9xxx_mbhc *mbhc,
struct wcd9xxx_mbhc_config *mbhc_cfg);
+void wcd9xxx_mbhc_stop(struct wcd9xxx_mbhc *mbhc);
int wcd9xxx_mbhc_init(struct wcd9xxx_mbhc *mbhc, struct wcd9xxx_resmgr *resmgr,
struct snd_soc_codec *codec,
int (*micbias_enable_cb) (struct snd_soc_codec*, bool),
diff --git a/sound/soc/msm/msm8974.c b/sound/soc/msm/msm8974.c
index 25bc86b..e612eec 100644
--- a/sound/soc/msm/msm8974.c
+++ b/sound/soc/msm/msm8974.c
@@ -1629,6 +1629,7 @@
pr_err("%s: Failed to register adsp state notifier\n",
__func__);
err = -EFAULT;
+ taiko_hs_detect_exit(codec);
goto out;
}
diff --git a/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c b/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c
index de60430..62fe6d2 100644
--- a/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c
+++ b/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c
@@ -371,8 +371,12 @@
msm_send_eq_values(fedai_id);
topology = get_topology(path_type);
for (i = 0; i < MSM_BACKEND_DAI_MAX; i++) {
- if (test_bit(fedai_id, &msm_bedais[i].fe_sessions) && perf_mode)
- set_bit(fedai_id, &msm_bedais[i].perf_mode);
+ if (test_bit(fedai_id, &msm_bedais[i].fe_sessions)) {
+ if (perf_mode)
+ set_bit(fedai_id, &msm_bedais[i].perf_mode);
+ else
+ clear_bit(fedai_id, &msm_bedais[i].perf_mode);
+ }
if (!is_be_dai_extproc(i) &&
(afe_get_port_type(msm_bedais[i].port_id) == port_type) &&
(msm_bedais[i].active) &&
diff --git a/sound/soc/msm/qdsp6v2/q6adm.c b/sound/soc/msm/qdsp6v2/q6adm.c
index b1f968d..d99812f 100644
--- a/sound/soc/msm/qdsp6v2/q6adm.c
+++ b/sound/soc/msm/qdsp6v2/q6adm.c
@@ -522,7 +522,6 @@
/* Should only come here if there is an APR */
/* error or malformed APR packet. Otherwise */
/* response will be returned as */
- /* ADM_CMDRSP_SHARED_MEM_MAP_REGIONS */
if (payload[1] != 0) {
pr_err("%s: ADM map error, resuming\n",
__func__);
@@ -967,11 +966,9 @@
open.hdr.opcode = ADM_CMD_DEVICE_OPEN_V5;
open.flags = 0x00;
if (perf_mode) {
- open.flags |= ADM_LOW_LATENCY_DEVICE_SESSION <<
- ADM_BIT_SHIFT_DEVICE_PERF_MODE_FLAG;
+ open.flags |= ADM_ULTRA_LOW_LATENCY_DEVICE_SESSION;
} else {
- open.flags |= ADM_LEGACY_DEVICE_SESSION <<
- ADM_BIT_SHIFT_DEVICE_PERF_MODE_FLAG;
+ open.flags |= ADM_LEGACY_DEVICE_SESSION;
}
open.mode_of_operation = path;
diff --git a/sound/soc/msm/qdsp6v2/q6asm.c b/sound/soc/msm/qdsp6v2/q6asm.c
index 6a34470..1abc47d 100644
--- a/sound/soc/msm/qdsp6v2/q6asm.c
+++ b/sound/soc/msm/qdsp6v2/q6asm.c
@@ -1504,11 +1504,9 @@
open.hdr.opcode = ASM_STREAM_CMD_OPEN_WRITE_V3;
open.mode_flags = 0x00;
if (ac->perf_mode)
- open.mode_flags |= (ASM_LOW_LATENCY_STREAM_SESSION <<
- ASM_SHIFT_STREAM_PERF_MODE_FLAG_IN_OPEN_WRITE);
+ open.mode_flags |= ASM_ULTRA_LOW_LATENCY_STREAM_SESSION;
else
- open.mode_flags |= (ASM_LEGACY_STREAM_SESSION <<
- ASM_SHIFT_STREAM_PERF_MODE_FLAG_IN_OPEN_WRITE);
+ open.mode_flags |= ASM_LEGACY_STREAM_SESSION;
/* source endpoint : matrix */
open.sink_endpointype = ASM_END_POINT_DEVICE_MATRIX;