Merge changes I5a8df4fd,Iecc97c13,I09fe3707 into msm-3.0

* changes:
  video: msm: Clear and disable histogram interrupt
  video: msm: Remove redundant code in histogram collection
  video: msm: Remove ifdef from mdp_histogram_ctrl
diff --git a/drivers/video/msm/mdp.c b/drivers/video/msm/mdp.c
index ca3c079..5b4f829 100644
--- a/drivers/video/msm/mdp.c
+++ b/drivers/video/msm/mdp.c
@@ -241,30 +241,42 @@
 int mdp_histogram_ctrl(boolean en)
 {
 	unsigned long flag;
-	boolean hist_start;
-	spin_lock_irqsave(&mdp_spin_lock, flag);
-	hist_start = mdp_is_hist_start;
-	spin_unlock_irqrestore(&mdp_spin_lock, flag);
+	unsigned long hist_base;
+	uint32_t status;
 
-	if (hist_start == TRUE) {
-		if (en == TRUE) {
-			mdp_enable_irq(MDP_HISTOGRAM_TERM);
-			mdp_hist_frame_cnt = 1;
+	if (mdp_rev >= MDP_REV_40)
+		hist_base = 0x95000;
+	else
+		hist_base = 0x94000;
+
+	if (en == TRUE) {
+		mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
+		mdp_hist_frame_cnt = 1;
+		mdp_enable_irq(MDP_HISTOGRAM_TERM);
+		spin_lock_irqsave(&mdp_spin_lock, flag);
+		if (mdp_is_hist_start == FALSE && mdp_rev >= MDP_REV_40) {
+			MDP_OUTP(MDP_BASE + hist_base + 0x10, 1);
+			MDP_OUTP(MDP_BASE + hist_base + 0x1c, INTR_HIST_DONE);
+		}
+		spin_unlock_irqrestore(&mdp_spin_lock, flag);
+		MDP_OUTP(MDP_BASE + hist_base + 0x4, mdp_hist_frame_cnt);
+		MDP_OUTP(MDP_BASE + hist_base, 1);
+		mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
+	} else {
+		if (mdp_rev >= MDP_REV_40) {
 			mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
-#ifdef CONFIG_FB_MSM_MDP40
-			MDP_OUTP(MDP_BASE + 0x95010, 1);
-			MDP_OUTP(MDP_BASE + 0x9501c, INTR_HIST_DONE);
-			MDP_OUTP(MDP_BASE + 0x95004, 1);
-			MDP_OUTP(MDP_BASE + 0x95000, 1);
-#else
-			MDP_OUTP(MDP_BASE + 0x94004, 1);
-			MDP_OUTP(MDP_BASE + 0x94000, 1);
-#endif
+			status = inpdw(MDP_BASE + hist_base + 0x1C);
+			status &= ~INTR_HIST_DONE;
+			MDP_OUTP(MDP_BASE + hist_base + 0x1C, status);
+
+			MDP_OUTP(MDP_BASE + hist_base + 0x18, INTR_HIST_DONE);
 			mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF,
-					FALSE);
-		} else
-			mdp_disable_irq(MDP_HISTOGRAM_TERM);
+									FALSE);
+		}
+
+		mdp_disable_irq(MDP_HISTOGRAM_TERM);
 	}
+
 	return 0;
 }
 
@@ -280,26 +292,18 @@
 		goto mdp_hist_start_err;
 	}
 
+	ret = mdp_histogram_ctrl(TRUE);
+
 	spin_lock_irqsave(&mdp_spin_lock, flag);
 	mdp_is_hist_start = TRUE;
 	spin_unlock_irqrestore(&mdp_spin_lock, flag);
-	mdp_enable_irq(MDP_HISTOGRAM_TERM);
-	mdp_hist_frame_cnt = 1;
-	mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
-#ifdef CONFIG_FB_MSM_MDP40
-	MDP_OUTP(MDP_BASE + 0x95004, 1);
-	MDP_OUTP(MDP_BASE + 0x95000, 1);
-#else
-	MDP_OUTP(MDP_BASE + 0x94004, 1);
-	MDP_OUTP(MDP_BASE + 0x94000, 1);
-#endif
-	mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
 
 mdp_hist_start_err:
 	mutex_unlock(&mdp_hist_mutex);
 	return ret;
 
 }
+
 int mdp_stop_histogram(struct fb_info *info)
 {
 	unsigned long flag;
@@ -310,12 +314,12 @@
 		ret = -EPERM;
 		goto mdp_hist_stop_err;
 	}
+
 	spin_lock_irqsave(&mdp_spin_lock, flag);
 	mdp_is_hist_start = FALSE;
 	spin_unlock_irqrestore(&mdp_spin_lock, flag);
-	/* disable the irq for histogram since we handled it
-	   when the control reaches here */
-	mdp_disable_irq(MDP_HISTOGRAM_TERM);
+
+	ret = mdp_histogram_ctrl(FALSE);
 
 mdp_hist_stop_err:
 	mutex_unlock(&mdp_hist_mutex);
diff --git a/drivers/video/msm/mdp.h b/drivers/video/msm/mdp.h
index 590fd13..c12a250 100644
--- a/drivers/video/msm/mdp.h
+++ b/drivers/video/msm/mdp.h
@@ -245,6 +245,10 @@
 #define TV_OUT_DMA3_START   BIT(13)
 #define MDP_HIST_DONE       BIT(20)
 
+/* histogram interrupts */
+#define INTR_HIST_DONE			BIT(1)
+#define INTR_HIST_RESET_SEQ_DONE	BIT(0)
+
 #ifdef CONFIG_FB_MSM_MDP22
 #define MDP_ANY_INTR_MASK (MDP_PPP_DONE| \
 			MDP_DMA_P_DONE| \
diff --git a/drivers/video/msm/mdp4.h b/drivers/video/msm/mdp4.h
index f60cb78..328dab7 100644
--- a/drivers/video/msm/mdp4.h
+++ b/drivers/video/msm/mdp4.h
@@ -121,11 +121,6 @@
 #define INTR_PRIMARY_READ_PTR		BIT(11)
 #define INTR_DMA_P_HISTOGRAM		BIT(17)
 
-/* histogram interrupts */
-#define INTR_HIST_DONE			BIT(1)
-#define INTR_HIST_RESET_SEQ_DONE	BIT(0)
-
-
 #ifdef CONFIG_FB_MSM_OVERLAY
 #define MDP4_ANY_INTR_MASK	(INTR_OVERLAY0_DONE|INTR_DMA_S_DONE | \
 					INTR_DMA_P_HISTOGRAM)