Merge "msm: kgsl: Pass the right timeout to adreno_drawctxt_wait()"
diff --git a/Documentation/devicetree/bindings/arm/msm/clock-krait-8974.txt b/Documentation/devicetree/bindings/arm/msm/clock-krait-8974.txt
index ee9a286..d9ccb09 100644
--- a/Documentation/devicetree/bindings/arm/msm/clock-krait-8974.txt
+++ b/Documentation/devicetree/bindings/arm/msm/clock-krait-8974.txt
@@ -41,6 +41,8 @@
- qcom,hfpll-user-vco-mask:
The mask to be used when programming the VCO selection
bits in the user control register.
+- qcom,pvs-config-ver:
+ The version of the data in qcom,speedX-pvsY-bin-vZ.
Example:
qcom,clock-krait@f9016000 {
diff --git a/Documentation/devicetree/bindings/arm/msm/cpr-regulator.txt b/Documentation/devicetree/bindings/arm/msm/cpr-regulator.txt
index 3a293a3..9af81da 100644
--- a/Documentation/devicetree/bindings/arm/msm/cpr-regulator.txt
+++ b/Documentation/devicetree/bindings/arm/msm/cpr-regulator.txt
@@ -11,7 +11,7 @@
bits to indicate what bin (and voltage range) a chip is in.
Required properties:
-- compatible: Must be "qti,cpr-regulator"
+- compatible: Must be "qcom,cpr-regulator"
- reg: Register addresses for RBCPR, RBCPR clock
select, PVS and CPR eFuse address
- reg-names: Register names. Must be "rbcpr", "rbcpr_clk",
@@ -22,41 +22,41 @@
should be 1 for SVS corner
- regulator-max-microvolt: Maximum corner value as max constraint, which
should be 4 for SUPER_TURBO or 3 for TURBO
-- qti,pvs-init-voltage: A list of integers whose length is equal to 2
- to the power of qti,pvs-fuse[num-of-bits]. The
+- qcom,pvs-init-voltage: A list of integers whose length is equal to 2
+ to the power of qcom,pvs-fuse[num-of-bits]. The
location or 0-based index of an element in the
list corresponds to the bin number. The value of
each integer corresponds to the initial voltage
of the PVS bin in turbo mode in microvolts.
-- qti,pvs-corner-ceiling-slow: Ceiling voltages of all corners for APC_PVS_SLOW
-- qti,pvs-corner-ceiling-nom: Ceiling voltages of all corners for APC_PVS_NOM
-- qti,pvs-corner-ceiling-fast: Ceiling voltages of all corners for APC_PVS_FAST
+- qcom,pvs-corner-ceiling-slow: Ceiling voltages of all corners for APC_PVS_SLOW
+- qcom,pvs-corner-ceiling-nom: Ceiling voltages of all corners for APC_PVS_NOM
+- qcom,pvs-corner-ceiling-fast: Ceiling voltages of all corners for APC_PVS_FAST
The ceiling voltages for each of above three
properties may look like this:
0 (SVS voltage): 1050000 uV
1 (NORMAL voltage): 1150000 uV
2 (TURBO voltage): 1275000 uV
- vdd-apc-supply: Regulator to supply VDD APC power
-- qti,vdd-apc-step-up-limit: Limit of vdd-apc-supply steps for scaling up.
-- qti,vdd-apc-step-down-limit: Limit of vdd-apc-supply steps for scaling down.
-- qti,cpr-ref-clk: The reference clock in kHz.
-- qti,cpr-timer-delay: The delay in microseconds for the timer interval.
-- qti,cpr-timer-cons-up: Consecutive number of timer interval (qti,cpr-timer-delay)
+- qcom,vdd-apc-step-up-limit: Limit of vdd-apc-supply steps for scaling up.
+- qcom,vdd-apc-step-down-limit: Limit of vdd-apc-supply steps for scaling down.
+- qcom,cpr-ref-clk: The reference clock in kHz.
+- qcom,cpr-timer-delay: The delay in microseconds for the timer interval.
+- qcom,cpr-timer-cons-up: Consecutive number of timer interval (qcom,cpr-timer-delay)
occurred before issuing UP interrupt.
-- qti,cpr-timer-cons-down: Consecutive number of timer interval (qti,cpr-timer-delay)
+- qcom,cpr-timer-cons-down: Consecutive number of timer interval (qcom,cpr-timer-delay)
occurred before issuing DOWN interrupt.
-- qti,cpr-irq-line: Internal interrupt route signal of RBCPR, one of 0, 1 or 2.
-- qti,cpr-step-quotient: Number of CPR quotient (Ring Oscillator(RO) count) per vdd-apc-supply step
+- qcom,cpr-irq-line: Internal interrupt route signal of RBCPR, one of 0, 1 or 2.
+- qcom,cpr-step-quotient: Number of CPR quotient (Ring Oscillator(RO) count) per vdd-apc-supply step
to issue error_steps.
-- qti,cpr-up-threshold: The threshold for CPR to issue interrupt when
+- qcom,cpr-up-threshold: The threshold for CPR to issue interrupt when
error_steps is greater than it when stepping up.
-- qti,cpr-down-threshold: The threshold for CPR to issue interrupt when
+- qcom,cpr-down-threshold: The threshold for CPR to issue interrupt when
error_steps is greater than it when stepping down.
-- qti,cpr-idle-clocks: Idle clock cycles RO can be in.
-- qti,cpr-gcnt-time: The time for gate count in microseconds.
-- qti,cpr-apc-volt-step: The voltage in microvolt per CPR step, such as 5000uV.
+- qcom,cpr-idle-clocks: Idle clock cycles RO can be in.
+- qcom,cpr-gcnt-time: The time for gate count in microseconds.
+- qcom,cpr-apc-volt-step: The voltage in microvolt per CPR step, such as 5000uV.
-- qti,pvs-fuse-redun-sel: Array of 5 elements to indicate where to read the bits, what value to
+- qcom,pvs-fuse-redun-sel: Array of 5 elements to indicate where to read the bits, what value to
compare with in order to decide if the redundant PVS fuse bits would be
used instead of the original bits and method to read fuse row, reading
register through SCM or directly. The 5 elements with index [0..4] are:
@@ -70,19 +70,19 @@
Otherwise, the original PVS bits should be selected. If the 5th
element is 0, read the fuse row from register directly. Otherwise,
read it through SCM.
-- qti,pvs-fuse: Array of 4 elements to indicate the bits for PVS fuse and read method.
+- qcom,pvs-fuse: Array of 4 elements to indicate the bits for PVS fuse and read method.
The array should have index and value like this:
[0] => the PVS fuse row number
[1] => LSB bit position of the bits
[2] => number of bits
[3] => fuse reading method, 0 for direct reading or 1 for SCM reading
-- qti,pvs-fuse-redun: Array of 4 elements to indicate the bits for redundant PVS fuse.
+- qcom,pvs-fuse-redun: Array of 4 elements to indicate the bits for redundant PVS fuse.
The array should have index and value like this:
[0] => the redundant PVS fuse row number
[1] => LSB bit position of the bits
[2] => number of bits
[3] => fuse reading method, 0 for direct reading or 1 for SCM reading
-- qti,cpr-fuse-redun-sel: Array of 5 elements to indicate where to read the bits, what value to
+- qcom,cpr-fuse-redun-sel: Array of 5 elements to indicate where to read the bits, what value to
compare with in order to decide if the redundant CPR fuse bits would be
used instead of the original bits and method to read fuse row, using SCM
to read or read register directly. The 5 elements with index [0..4] are:
@@ -96,32 +96,32 @@
Otherwise, the original CPR bits should be selected. If the 5th element
is 0, read the fuse row from register directly. Otherwise, read it through
SCM.
-- qti,cpr-fuse-row: Array of row number of CPR fuse and method to read that row. It should have
+- qcom,cpr-fuse-row: Array of row number of CPR fuse and method to read that row. It should have
index and value like this:
[0] => the fuse row number
[1] => fuse reading method, 0 for direct reading or 1 for SCM reading
-- qti,cpr-fuse-bp-cpr-disable: Bit position of the bit to indicate if CPR should be disable
-- qti,cpr-fuse-bp-scheme: Bit position of the bit to indicate if it's a global/local scheme
-- qti,cpr-fuse-target-quot: Array of bit positions in fuse for Target Quotient of all corners.
+- qcom,cpr-fuse-bp-cpr-disable: Bit position of the bit to indicate if CPR should be disable
+- qcom,cpr-fuse-bp-scheme: Bit position of the bit to indicate if it's a global/local scheme
+- qcom,cpr-fuse-target-quot: Array of bit positions in fuse for Target Quotient of all corners.
It should have index and value like this:
[0] => bit position of the LSB bit for SVS target quotient
[1] => bit position of the LSB bit for NOMINAL target quotient
[2] => bit position of the LSB bit for TURBO target quotient
-- qti,cpr-fuse-ro-sel: Array of bit positions in fuse for RO select of all corners.
+- qcom,cpr-fuse-ro-sel: Array of bit positions in fuse for RO select of all corners.
It should have index and value like this:
[0] => bit position of the LSB bit for SVS RO select bits
[1] => bit position of the LSB bit for NOMINAL RO select bits
[2] => bit position of the LSB bit for TURBO RO select bits
-- qti,cpr-fuse-redun-row: Array of row number of redundant CPR fuse and method to read that
+- qcom,cpr-fuse-redun-row: Array of row number of redundant CPR fuse and method to read that
row. It should have index and value like this:
[0] => the redundant fuse row number
[1] => the value to indicate reading the fuse row directly or using SCM
-- qti,cpr-fuse-redun-target-quot: Array of bit positions in fuse for redundant Target Quotient of all corners.
+- qcom,cpr-fuse-redun-target-quot: Array of bit positions in fuse for redundant Target Quotient of all corners.
It should have index and value like this:
[0] => bit position of the LSB bit for redundant SVS target quotient
[1] => bit position of the LSB bit for redundant NOMINAL target quotient
[2] => bit position of the LSB bit for redundant TURBO target quotient
-- qti,cpr-fuse-redun-ro-sel: Array of bit positions in eFuse for redundant RO select.
+- qcom,cpr-fuse-redun-ro-sel: Array of bit positions in eFuse for redundant RO select.
It should have index and value like this:
[0] => bit position of the LSB bit for redundant SVS RO select bits
[1] => bit position of the LSB bit for redundant NOMINAL RO select bits
@@ -131,23 +131,23 @@
Optional properties:
- vdd-mx-supply: Regulator to supply memory power as dependency
of VDD APC.
-- qti,vdd-mx-vmax: The maximum voltage in uV for vdd-mx-supply. This
+- qcom,vdd-mx-vmax: The maximum voltage in uV for vdd-mx-supply. This
is required when vdd-mx-supply is present.
-- qti,vdd-mx-vmin-method: The method to determine the minimum voltage for
+- qcom,vdd-mx-vmin-method: The method to determine the minimum voltage for
vdd-mx-supply, which can be one of following
choices compared with VDD APC:
0 => equal to the voltage(vmin) of VDD APC
1 => equal to PVS corner ceiling voltage
2 => equal to slow speed corner ceiling
- 3 => equal to qti,vdd-mx-vmax
+ 3 => equal to qcom,vdd-mx-vmax
This is required when vdd-mx-supply is present.
-- qti,cpr-fuse-redun-bp-cpr-disable: Redundant bit position of the bit to indicate if CPR should be disable
-- qti,cpr-fuse-redun-bp-scheme: Redundant bit position of the bit to indicate if it's a global/local scheme
+- qcom,cpr-fuse-redun-bp-cpr-disable: Redundant bit position of the bit to indicate if CPR should be disable
+- qcom,cpr-fuse-redun-bp-scheme: Redundant bit position of the bit to indicate if it's a global/local scheme
This property is required if cpr-fuse-redun-bp-cpr-disable
is present, and vise versa.
-- qti,cpr-enable: Present: CPR enabled by default.
+- qcom,cpr-enable: Present: CPR enabled by default.
Not Present: CPR disable by default.
-- qti,cpr-fuse-cond-min-volt-sel: Array of 5 elements to indicate where to read the bits, what value to
+- qcom,cpr-fuse-cond-min-volt-sel: Array of 5 elements to indicate where to read the bits, what value to
compare with in order to decide if the conditional minimum apc voltage needs
to be applied and the fuse reading method.
The 5 elements with index[0..4] are:
@@ -159,11 +159,11 @@
When the value of the fuse bits specified by first 3 elements is not equal to
the value in 4th element, then set the apc voltage for all parts running
at each voltage corner to be not lower than the voltage defined
- using "qti,cpr-cond-min-voltage".
-- qti,cpr-cond-min-voltage: Minimum voltage in microvolts for SVS, NOM and TURBO mode if the fuse bits
- defined in qti,cpr-fuse-cond-min-volt-sel have not been programmed with the
+ using "qcom,cpr-cond-min-voltage".
+- qcom,cpr-cond-min-voltage: Minimum voltage in microvolts for SVS, NOM and TURBO mode if the fuse bits
+ defined in qcom,cpr-fuse-cond-min-volt-sel have not been programmed with the
expected data. This is required if cpr-fuse-cond-min-volt-sel is present.
-- qti,cpr-fuse-uplift-sel: Array of 5 elements to indicate where to read the bits, what value to
+- qcom,cpr-fuse-uplift-sel: Array of 5 elements to indicate where to read the bits, what value to
compare with in order to enable or disable the pvs voltage uplift workaround,
and the fuse reading method.
The 5 elements with index[0..4] are:
@@ -175,7 +175,7 @@
[4]: => fuse reading method, 0 for direct reading or 1 for SCM reading.
When the value of the fuse bits specified by first 3 elements equals to the
value in 4th element, the pvs voltage uplift workaround will be enabled.
-- qti,speed-bin-fuse-sel: Array of 4 elements to indicate where to read the speed bin of the processor,
+- qcom,speed-bin-fuse-sel: Array of 4 elements to indicate where to read the speed bin of the processor,
and the fuse reading method.
The 4 elements with index[0..3] are:
[0]: => the fuse row number of the selector;
@@ -183,22 +183,22 @@
[2]: => number of the bits;
[3]: => fuse reading method, 0 for direct reading or 1 for SCM reading.
This is required if cpr-fuse-uplift-disable-sel is present.
-- qti,cpr-uplift-voltage: Uplift in microvolts used for increasing pvs init voltage. If this property is present,
+- qcom,cpr-uplift-voltage: Uplift in microvolts used for increasing pvs init voltage. If this property is present,
This is required if cpr-fuse-uplift-disable-sel is present.
-- qti,cpr-uplift-max-volt: Maximum voltage in microvolts used for pvs voltage uplift workaround to limit
+- qcom,cpr-uplift-max-volt: Maximum voltage in microvolts used for pvs voltage uplift workaround to limit
the maximum pvs voltage.
This is required if cpr-fuse-uplift-disable-sel is present.
-- qti,cpr-uplift-quotient: Three numbers used for pvs voltage uplift workaround to be added to the target
+- qcom,cpr-uplift-quotient: Three numbers used for pvs voltage uplift workaround to be added to the target
quotient for each corner.
The 3 quotient increment with index[0..2] are:
[0]: => for SVS corner target quotient;
[1]: => for NORM corner target quotient;
[2]: => for TURBO corner target quotient;
This is required if cpr-fuse-uplift-disable-sel is present.
-- qti,cpr-uplift-speed-bin: The speed bin value corresponding to one type of processor which needs to apply the
+- qcom,cpr-uplift-speed-bin: The speed bin value corresponding to one type of processor which needs to apply the
pvs voltage uplift workaround.
This is required if cpr-fuse-uplift-disable-sel is present.
-- qti,cpr-quot-adjust-table: Array of triples in which each triple indicates the speed bin of the CPU, the virtual
+- qcom,cpr-quot-adjust-table: Array of triples in which each triple indicates the speed bin of the CPU, the virtual
corner to use and the quotient adjustment.
The 3 elements in one triple are:
[0]: => the speed bin of the CPU.
@@ -207,17 +207,21 @@
If the speed bin in a triple is equal to the speed bin of the CPU, the adjustment would
be subtracted from the quotient value of the voltage corner when the CPU is running at
that virtual corner. Each virtual corner value must be in the range 1 to the number of
- elements in qti,cpr-corner-map.
-- qti,cpr-corner-map: Array of elements of fuse corner value for each virtual corner.
+ elements in qcom,cpr-corner-map.
+- qcom,cpr-corner-map: Array of elements of fuse corner value for each virtual corner.
The location or 1-based index of an element in the list corresponds to
the virtual corner value. For example, the first element in the list is the fuse corner
value that virtual corner 1 maps to.
- This is required if qti,cpr-quot-adjust-table is present.
+ This is required if qcom,cpr-quot-adjust-table is present.
+- qcom,cpr-quotient-adjustment: Present: CPR adjusts quotient value. The
+ adjustment equals to the quotient adjustment
+ in millivolts multiply the KV value.
+ Not Present: CPR will not adjust quotient value.
Example:
apc_vreg_corner: regulator@f9018000 {
status = "okay";
- compatible = "qti,cpr-regulator";
+ compatible = "qcom,cpr-regulator";
reg = <0xf9018000 0x1000>, <0xfc4b8000 0x1000>;
reg-names = "rbcpr", "efuse_addr";
interrupts = <0 15 0>;
@@ -225,11 +229,11 @@
regulator-min-microvolt = <1>;
regulator-max-microvolt = <3>;
- qti,pvs-fuse = <22 6 5 1>;
- qti,pvs-fuse-redun-sel = <22 24 3 2 1>;
- qti,pvs-fuse-redun = <22 27 5 1>;
+ qcom,pvs-fuse = <22 6 5 1>;
+ qcom,pvs-fuse-redun-sel = <22 24 3 2 1>;
+ qcom,pvs-fuse-redun = <22 27 5 1>;
- qti,pvs-init-voltage = <1330000 1330000 1330000 1320000
+ qcom,pvs-init-voltage = <1330000 1330000 1330000 1320000
1310000 1300000 1290000 1280000
1270000 1260000 1250000 1240000
1230000 1220000 1210000 1200000
@@ -237,46 +241,46 @@
1150000 1140000 1140000 1140000
1140000 1140000 1140000 1140000
1140000 1140000 1140000 1140000>;
- qti,pvs-corner-ceiling-slow = <1050000 1160000 1275000>;
- qti,pvs-corner-ceiling-nom = <975000 1075000 1200000>;
- qti,pvs-corner-ceiling-fast = <900000 1000000 1140000>;
+ qcom,pvs-corner-ceiling-slow = <1050000 1160000 1275000>;
+ qcom,pvs-corner-ceiling-nom = <975000 1075000 1200000>;
+ qcom,pvs-corner-ceiling-fast = <900000 1000000 1140000>;
vdd-apc-supply = <&pm8226_s2>;
vdd-mx-supply = <&pm8226_l3_ao>;
- qti,vdd-mx-vmax = <1350000>;
- qti,vdd-mx-vmin-method = <1>;
- qti,vdd-apc-step-up-limit = <1>;
- qti,vdd-apc-step-down-limit = <1>;
- qti,cpr-ref-clk = <19200>;
- qti,cpr-timer-delay = <5000>;
- qti,cpr-timer-cons-up = <1>;
- qti,cpr-timer-cons-down = <2>;
- qti,cpr-irq-line = <0>;
- qti,cpr-step-quotient = <15>;
- qti,cpr-up-threshold = <1>;
- qti,cpr-down-threshold = <2>;
- qti,cpr-idle-clocks = <5>;
- qti,cpr-gcnt-time = <1>;
- qti,cpr-apc-volt-step = <5000>;
+ qcom,vdd-mx-vmax = <1350000>;
+ qcom,vdd-mx-vmin-method = <1>;
+ qcom,vdd-apc-step-up-limit = <1>;
+ qcom,vdd-apc-step-down-limit = <1>;
+ qcom,cpr-ref-clk = <19200>;
+ qcom,cpr-timer-delay = <5000>;
+ qcom,cpr-timer-cons-up = <1>;
+ qcom,cpr-timer-cons-down = <2>;
+ qcom,cpr-irq-line = <0>;
+ qcom,cpr-step-quotient = <15>;
+ qcom,cpr-up-threshold = <1>;
+ qcom,cpr-down-threshold = <2>;
+ qcom,cpr-idle-clocks = <5>;
+ qcom,cpr-gcnt-time = <1>;
+ qcom,cpr-apc-volt-step = <5000>;
- qti,cpr-fuse-row = <138 1>;
- qti,cpr-fuse-bp-cpr-disable = <36>;
- qti,cpr-fuse-bp-scheme = <37>;
- qti,cpr-fuse-target-quot = <24 12 0>;
- qti,cpr-fuse-ro-sel = <54 38 41>;
- qti,cpr-fuse-redun-sel = <138 57 1 1 1>;
- qti,cpr-fuse-redun-row = <139 1>;
- qti,cpr-fuse-redun-target-quot = <24 12 0>;
- qti,cpr-fuse-redun-ro-sel = <46 36 39>;
- qti,cpr-fuse-cond-min-volt-sel = <54 42 6 7 1>;
- qti,cpr-cond-min-voltage = <1140000>;
- qti,cpr-fuse-uplift-sel = <22 53 1 0 0>;
- qti,cpr-uplift-voltage = <50000>;
- qti,cpr-uplift-quotient = <0 0 120>;
- qti,cpr-uplift-max-volt = <1350000>;
- qti,cpr-uplift-speed-bin = <1>;
- qti,speed-bin-fuse-sel = <22 0 3 0>;
- qti,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3>;
- qti,cpr-quot-adjust-table = <1 1 0>, <1 2 0>, <1 3 0>,
+ qcom,cpr-fuse-row = <138 1>;
+ qcom,cpr-fuse-bp-cpr-disable = <36>;
+ qcom,cpr-fuse-bp-scheme = <37>;
+ qcom,cpr-fuse-target-quot = <24 12 0>;
+ qcom,cpr-fuse-ro-sel = <54 38 41>;
+ qcom,cpr-fuse-redun-sel = <138 57 1 1 1>;
+ qcom,cpr-fuse-redun-row = <139 1>;
+ qcom,cpr-fuse-redun-target-quot = <24 12 0>;
+ qcom,cpr-fuse-redun-ro-sel = <46 36 39>;
+ qcom,cpr-fuse-cond-min-volt-sel = <54 42 6 7 1>;
+ qcom,cpr-cond-min-voltage = <1140000>;
+ qcom,cpr-fuse-uplift-sel = <22 53 1 0 0>;
+ qcom,cpr-uplift-voltage = <50000>;
+ qcom,cpr-uplift-quotient = <0 0 120>;
+ qcom,cpr-uplift-max-volt = <1350000>;
+ qcom,cpr-uplift-speed-bin = <1>;
+ qcom,speed-bin-fuse-sel = <22 0 3 0>;
+ qcom,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3>;
+ qcom,cpr-quot-adjust-table = <1 1 0>, <1 2 0>, <1 3 0>,
<1 4 0>, <1 5 450>, <1 6 375>,
<1 7 300>, <1 8 225>, <1 9 187>,
<1 10 150>, <1 11 75>, <1 12 0>;
diff --git a/Documentation/devicetree/bindings/arm/msm/cpubw.txt b/Documentation/devicetree/bindings/arm/msm/cpubw.txt
new file mode 100644
index 0000000..1dc3835
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/msm/cpubw.txt
@@ -0,0 +1,30 @@
+MSM CPU bandwidth device
+
+cpubw is a device that represents the CPU subsystem master ports in a MSM SoC
+and the related info that is needed to make CPU to DDR bandwidth votes.
+
+Required properties:
+- compatible: Must be "qcom,cpubw"
+- qcom,cpu-mem-ports: A list of tuples where each tuple consists of a bus
+ master (CPU subsystem) port number and a bus slave
+ (memory) port number.
+- qcom,bw-tbl: A list of meaningful instantaneous bandwidth values
+ (in MB/s) that can be requested from the CPU
+ subsystem to DDR. The list of values depend on the
+ supported DDR frequencies and the bus widths.
+
+Example:
+
+ qcom,cpubw {
+ compatible = "qcom,cpubw";
+ qcom,cpu-mem-ports = <1 512>, <2 512>;
+ qcom,bw-tbl =
+ < 572 /* 75 MHz */ >,
+ < 1144 /* 150 MHz */ >,
+ < 1525 /* 200 MHz */ >,
+ < 2342 /* 307 MHz */ >,
+ < 3509 /* 460 MHz */ >,
+ < 4684 /* 614 MHz */ >,
+ < 6103 /* 800 MHz */ >,
+ < 7102 /* 931 MHz */ >;
+ };
diff --git a/Documentation/devicetree/bindings/arm/msm/kraitbw-l2pm.txt b/Documentation/devicetree/bindings/arm/msm/kraitbw-l2pm.txt
new file mode 100644
index 0000000..17d55d4
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/msm/kraitbw-l2pm.txt
@@ -0,0 +1,18 @@
+MSM Krait L2 performance monitor counters for bandwidth measurement device
+
+krait-l2pm is a device that represents the Krait L2 PM counters that can be
+used to measure the bandwidth of read/write traffic from the Krait CPU
+subsystem.
+
+Required properties:
+- compatible: Must be "qcom,kraitbw_l2pm"
+- interrupts: Lists the L2 PM counter overflow IRQ.
+- qcom,bytes-per-beat: The number of bytes transferred in one data beat from
+ the Krait CPU subsystem.
+
+Example:
+ qcom,kraitbw-l2pm {
+ compatible = "qcom,kraitbw-l2pm";
+ interrupts = <0 1 1>;
+ qcom,bytes-per-beat = <8>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/msm/msm-cpufreq.txt b/Documentation/devicetree/bindings/arm/msm/msm-cpufreq.txt
index 02514d4..fed49c9 100644
--- a/Documentation/devicetree/bindings/arm/msm/msm-cpufreq.txt
+++ b/Documentation/devicetree/bindings/arm/msm/msm-cpufreq.txt
@@ -9,23 +9,15 @@
- compatible: Must be "qcom,msm-cpufreq"
- qcom,cpufreq-table: A list of tuples where each tuple consists of a
usable CPU frequency (KHz), an optional cache
- frequency (KHz) and an optional memory bandwidth
+ frequency (KHz) and a mandatory memory bandwidth
value (MBPS) listed in that order. The cache
frequencies shall not be listed if the device cannot
- run the cache asynchronous to one or more CPUs. The
- memory bandwidth values shall not be listed if the
- optional cpu-mem-ports property is not supplied.
-
-Optional properties:
-- qcom,cpu-mem-ports: A list of tuples where each tuple consists of a bus
- master (CPU) port number and a bus slave (memory)
- port number.
+ run the cache asynchronous to one or more CPUs.
Example:
qcom,msm-cpufreq@0 {
regs = <0 4>
compatible = "qcom,msm-cpufreq";
- qcom,cpu-mem-ports = <1 512>, <2 513>;
qcom,cpufreq-table =
< 300000 300000 600 >,
< 422400 422400 1200 >,
diff --git a/Documentation/devicetree/bindings/arm/msm/msm_bus.txt b/Documentation/devicetree/bindings/arm/msm/msm_bus.txt
index 6283a82..9f74225 100644
--- a/Documentation/devicetree/bindings/arm/msm/msm_bus.txt
+++ b/Documentation/devicetree/bindings/arm/msm/msm_bus.txt
@@ -20,10 +20,12 @@
these features:
qcom,ntieredslaves: Number of tiered slaves on the bus.
-qcom,qos-freq: QoS frequency (In Hz)
+qcom,qos-freq: QoS frequency (In KHz)
qcom,hw-sel: A string which decides whether QoS data
should be sent to RPM, set using BIMC or NoCs.
It can be set to "RPM", "NoC" or "BIMC".
+qcom,qos-baseoffset: Base address offset of QoS registers from the bus device
+ base address.
qcom,rpm-en: A boolean flag indicating whether RPM transactions are
supported for nodes of the bus.
qcom,ahb: A boolean flag indicating whether the bus is ahb type.
diff --git a/Documentation/devicetree/bindings/crypto/msm/qcrypto.txt b/Documentation/devicetree/bindings/crypto/msm/qcrypto.txt
index 01cc798..2ae9821 100644
--- a/Documentation/devicetree/bindings/crypto/msm/qcrypto.txt
+++ b/Documentation/devicetree/bindings/crypto/msm/qcrypto.txt
@@ -16,6 +16,12 @@
Optional properties:
- qcom,ce-hw-shared : optional, indicates if the hardware is shared between EE.
- qcom,ce-hw-key : optional, indicates if the hardware supports use of HW KEY.
+ - qcom,use-sw-aes-cbc-ecb-ctr-algo : optional, indicates if use SW aes-cbc/ecb/ctr algorithm.
+ - qcom,use-sw-aes-xts-algo : optional, indicates if use SW aes-xts algorithm.
+ - qcom,use-sw-aead-algo : optional, indicates if use SW aead algorithm.
+ - qcom,use-sw-ahash-algo : optional, indicates if use SW hash algorithm.
+ - qcom,use-sw-hmac-algo : optional, indicates if use SW hmac algorithm.
+ - qcom,use-sw-aes-ccm-algo : optional, indicates if use SW aes-ccm algorithm.
Example:
diff --git a/Documentation/devicetree/bindings/fb/mdss-mdp.txt b/Documentation/devicetree/bindings/fb/mdss-mdp.txt
index 9530c62..191db07 100644
--- a/Documentation/devicetree/bindings/fb/mdss-mdp.txt
+++ b/Documentation/devicetree/bindings/fb/mdss-mdp.txt
@@ -23,6 +23,10 @@
previous property, the amount of fetch ids
defined should match the number of offsets
defined in property: qcom,mdss-pipe-vig-off
+- qcom,mdss-pipe-vig-xin-id: Array of VBIF clients ids (xins) corresponding
+ to the respective VIG pipes. Number of xin ids
+ defined should match the number of offsets
+ defined in property: qcom,mdss-pipe-vig-off
- qcom,mdss-pipe-rgb-off: Array of offsets for MDP source surface pipes of
type RGB, the offsets are calculated from
register "mdp_phys" defined in reg property.
@@ -34,6 +38,10 @@
previous property, the amount of fetch ids
defined should match the number of offsets
defined in property: qcom,mdss-pipe-rgb-off
+- qcom,mdss-pipe-rgb-xin-id: Array of VBIF clients ids (xins) corresponding
+ to the respective RGB pipes. Number of xin ids
+ defined should match the number of offsets
+ defined in property: qcom,mdss-pipe-rgb-off
- qcom,mdss-pipe-dma-off: Array of offsets for MDP source surface pipes of
type DMA, the offsets are calculated from
register "mdp_phys" defined in reg property.
@@ -45,6 +53,10 @@
previous property, the amount of fetch ids
defined should match the number of offsets
defined in property: qcom,mdss-pipe-dma-off
+- qcom,mdss-pipe-dma-xin-id: Array of VBIF clients ids (xins) corresponding
+ to the respective DMA pipes. Number of xin ids
+ defined should match the number of offsets
+ defined in property: qcom,mdss-pipe-dma-off
- qcom,mdss-smp-data: Array of shared memory pool data. There should
be only two values in this property. The first
value corresponds to the number of smp blocks
@@ -218,6 +230,11 @@
<2 2 3>,
<2 4 5>,
<2 6 7>;
+
+ qcom,mdss-pipe-vig-xin-id = <0 4 8>;
+ qcom,mdss-pipe-rgb-xin-id = <1 5 9>;
+ qcom,mdss-pipe-dma-xin-id = <2 10>;
+
qcom,mdss-smp-data = <22 4096>;
qcom,mdss-rot-block-size = <64>;
qcom,mdss-smp-mb-per-pipe = <2>;
diff --git a/Documentation/devicetree/bindings/fb/msm-hdmi-tx.txt b/Documentation/devicetree/bindings/fb/msm-hdmi-tx.txt
index 8579ec0..b4bfb92 100644
--- a/Documentation/devicetree/bindings/fb/msm-hdmi-tx.txt
+++ b/Documentation/devicetree/bindings/fb/msm-hdmi-tx.txt
@@ -28,6 +28,7 @@
- qcom,hdmi-tx-mux-sel: gpio required to toggle HDMI output between
docking station, type A, and liquid device, type D, ports. Required
property for liquid devices.
+- qcom,hdmi-tx-ddc-mux-sel: gpio for ddc mux select.
- qcom,hdmi-tx-mux-en: gpio required to enable mux for HDMI output
on liquid devices. Required property for liquid devices.
@@ -57,6 +58,7 @@
qcom,hdmi-tx-max-voltage-level = <0 0 1800000 1800000>;
qcom,hdmi-tx-peak-current = <0 0 1800000 0>;
+ qcom,hdmi-tx-ddc-mux-sel = <&pma8084_gpios 6 0>;
qcom,hdmi-tx-cec = <&msmgpio 31 0>;
qcom,hdmi-tx-ddc-clk = <&msmgpio 32 0>;
qcom,hdmi-tx-ddc-data = <&msmgpio 33 0>;
diff --git a/Documentation/devicetree/bindings/hwmon/qpnp-adc-voltage.txt b/Documentation/devicetree/bindings/hwmon/qpnp-adc-voltage.txt
index 1be5504..dd0c440 100644
--- a/Documentation/devicetree/bindings/hwmon/qpnp-adc-voltage.txt
+++ b/Documentation/devicetree/bindings/hwmon/qpnp-adc-voltage.txt
@@ -49,6 +49,7 @@
2 : {1, 4}
3 : {1, 6}
4 : {1, 20}
+ 5 : {1, 8}
- qcom,calibration-type : Reference voltage to use for channel calibration.
Channel calibration is dependendent on the channel.
Certain channels like XO_THERM, BATT_THERM use ratiometric
diff --git a/Documentation/devicetree/bindings/i2c/i2c-qup.txt b/Documentation/devicetree/bindings/i2c/i2c-qup.txt
index fd7b635..fd96908 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-qup.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-qup.txt
@@ -36,6 +36,10 @@
callbacks.
- qcom,master-id : Master endpoint number used for voting on clocks using
bus-scaling driver.
+ - qcom,clk-ctl-xfer : When present, the clocks's state (prepare_enable/
+ unprepare_disable) is controlled by i2c-transaction's
+ begining and ending. When missing, the clock's state
+ is controlled by runtime-pm events.
Example:
i2c_3: i2c@f9966000 {
@@ -47,6 +51,7 @@
interrupt-names = "qup_err_intr";
qcom,i2c-bus-freq = <100000>;
qcom,i2c-src-freq = <24000000>;
+ qcom,clk-ctl-xfer;
qcom,scl-gpio = <&msmgpio 7 0>;
qcom,sda-gpio = <&msmgpio 6 0>;
};
diff --git a/Documentation/devicetree/bindings/input/misc/mma8x5x.txt b/Documentation/devicetree/bindings/input/misc/mma8x5x.txt
index 854939c..7e5d3a4 100644
--- a/Documentation/devicetree/bindings/input/misc/mma8x5x.txt
+++ b/Documentation/devicetree/bindings/input/misc/mma8x5x.txt
@@ -22,6 +22,7 @@
- interrupt-parent : parent of interrupt.
- interrupts : sensor signal interrupt to indicate new data ready or
a motion is detected.
+ - fsl,use-interrupt : to enable interrupt mode.
- fsl,irq-gpio : First irq gpio which is to provide interrupts to host, same
as "interrupts" node. It will also contain active low or active
high information.
@@ -36,4 +37,5 @@
vio-supply = <&pm8110_l14>;
fsl,sensors-position = <5>;
fsl,irq-gpio = <&msmgpio 0x81 0x02>;
+ fsl,use-interrupt;
};
\ No newline at end of file
diff --git a/Documentation/devicetree/bindings/power/qpnp-charger.txt b/Documentation/devicetree/bindings/power/qpnp-charger.txt
index 7d8fe0a..50381a2 100644
--- a/Documentation/devicetree/bindings/power/qpnp-charger.txt
+++ b/Documentation/devicetree/bindings/power/qpnp-charger.txt
@@ -103,6 +103,9 @@
- qcom,use-external-rsense A boolean that controls whether BMS will use
an external sensor resistor instead of the default
RDS of the batfet.
+- qcom,vbatdet-maxerr-mv This property in mV is a hystersis value for the charge
+ resume voltage property qcom,vbatdet-delta-mv. If this
+ property is not defined it defaults to 50 mV.
Sub node required structure:
- A qcom,chg node must be a child of an SPMI node that has specified
diff --git a/Documentation/devicetree/bindings/qseecom/qseecom.txt b/Documentation/devicetree/bindings/qseecom/qseecom.txt
index ac82387..9e582e2 100644
--- a/Documentation/devicetree/bindings/qseecom/qseecom.txt
+++ b/Documentation/devicetree/bindings/qseecom/qseecom.txt
@@ -11,6 +11,9 @@
- qcom, msm_bus,num_paths: The paths for source and destination ports
- qcom, msm_bus,vectors: Vectors for bus topology.
+Optional properties:
+ - qcom,support-bus-scaling : optional, indicates if driver support scaling the bus for crypto operation.
+
Example:
qcom,qseecom@fe806000 {
compatible = "qcom,qseecom";
diff --git a/Documentation/devicetree/bindings/thermal/qpnp-adc-tm.txt b/Documentation/devicetree/bindings/thermal/qpnp-adc-tm.txt
index e1681ca..e4e05d1 100644
--- a/Documentation/devicetree/bindings/thermal/qpnp-adc-tm.txt
+++ b/Documentation/devicetree/bindings/thermal/qpnp-adc-tm.txt
@@ -53,6 +53,7 @@
2 : pre-div ratio of {1, 4}
3 : pre-div ratio of {1, 6}
4 : pre-div ratio of {1, 20}
+ 5 : pre-div ratio of {1, 8}
- qcom,calibration-type : Reference voltage to use for channel calibration.
Channel calibration is dependendent on the channel.
Certain channels like XO_THERM, BATT_THERM use ratiometric
diff --git a/Documentation/usb/uicc.txt b/Documentation/usb/uicc.txt
new file mode 100644
index 0000000..7bf4d86
--- /dev/null
+++ b/Documentation/usb/uicc.txt
@@ -0,0 +1,161 @@
+Introduction
+============
+
+This feature requires supporting Mass Storage and Integrated Circuit Card
+interfaces exposed by the UICC (Universal Integrated Circuit Card) device.
+The MSM acts as a USB host and UICC acts as a peripheral. The UICC device
+that is used here is also referred to as Mega-SIM. This feature will be
+supported on MSM8x26.
+
+Hardware description
+====================
+
+The USB3503 HSIC (High Speed Inter Chip) hub's down stream port is modified
+to support Inter-Chip USB for connecting the UICC device. The USB3503 is
+connected to MSM via HSIC interface. The UICC device operates in Full Speed
+mode.
+
+The UICC device will support CCID (Integrated Circuit Card interface Device)
+specification. This interface supports 1 Bulk In, 1 Bulk Out and 1 Interrupt
+endpoint. The Interrupt endpoint is used by the device to send asynchronous
+notifications like card insertion/removal and hardware error events.
+The Bulk endpoints are used for the data communication.
+
+The UICC device will support the Mass Storage Bulk Only 1.0 specification.
+It supports SCSI Transparent subclass '06', corresponding to support of the
+SCSI Primary Command set. It implements SCSI Peripheral Device Type '00'
+(TYPE_DISK) corresponding to a direct access SCSI block device.
+
+Software description
+====================
+
+The MSM HSIC controller driver(drivers/usb/host/ehci-msm-hsic.c) takes care
+of HSIC PHY and link management. The USB3503 HSIC hub is managed by the SMSC
+hub driver(drivers/misc/smsc_hubc.c). Both these drivers are well tested on
+APQ8074 dragon board and are re-used to support this feature.
+
+The mass storage interface is managed by the standard Linux USB storage driver.
+This driver interfaces with SCSI and block layers to export the disk to
+user space.
+
+A new USB driver is implemented to manage the CCID interface. This driver is
+referred to as USB CCID driver in this document. This driver is implemented
+as a pass-through module and provides the character device interface to
+user space. The CCID specification is implemented in the user space.
+
+The CCID command and responses are exchanged over the Bulk endpoints. The
+user space application uses write() and read() calls to send commands and
+receive responses.
+
+The CCID class specific requests are sent over the control endpoint. As
+control requests have a specific format, ioctls are implemented.
+
+The UICC device sends asynchronous notifications over the interrupt endpoint.
+The card insertion/removal and hardware error events are sent to user space
+via an ioctl().
+
+Design Goals:
+============
+
+1. Re-use the existing services available in user space. This is achieved
+by implementing the kernel USB CCID driver as a pass-through module.
+
+2. Support runtime card insertion/removal.
+
+3. Support runtime power management.
+
+4. Support Multiple card configuration. More than 1 IC can be connected to
+the USB UICC device.
+
+Power Management
+================
+
+The USB core uses the runtime PM framework to auto suspend the USB devices that
+are not in use. The Auto-suspend is forbidden for all devices except hub class
+devices. The USB CCID driver enables auto-suspend for the UICC device.
+
+An USB device can be suspended only when all of its interfaces are suspended.
+The USB storage interface device acts as a parent device to the underlying
+SCSI host, target and block devices. Runtime PM must be enabled for the
+SCSI device to allow USB storage interface suspend. The SCSI device runtime
+suspend and auto-suspend timeout will be configured from user space via sysfs
+files.
+
+The HSIC platform device and USB3503 HUB device will be runtime suspended
+only after the USB UICC device is suspended.
+
+SMP/multi-core
+==============
+
+The USB CCID driver does not allow multiple clients to open the device file
+concurrently. -EBUSY will be returned if open() is attempted when the
+file is already opened.
+
+The write() and read() methods are implemented synchronously. If another
+write() is called when a previous write() is in progress, -EBUSY is
+returned. The same is applicable to read().
+
+Mutexes will be used to prevent concurrent open(), read() and write() access.
+
+Interface
+=========
+
+A character device file (/dev/ccid_bridge) will be exposed by the USB CCID
+driver. open(), read(), write(), ioctl() and close() methods are implemented.
+This device node is accessible only to the root by default. User space init
+or udev scripts should change the permissions of this device file if it needs
+to be accessed by non-root applications.
+
+open(): The open() is blocked until the UICC device is detected and the CCID
+interface probe is completed. Returns the appropriate error code in case of
+failure.
+
+read(): An URB is submitted on the Bulk In endpoint. The read() is blocked
+until the URB is completed and the data is copied to the user space buffer
+upon success. An appropriate error code is returned in case of failure.
+-ENODEV must be treated as a serious error and no further I/O will be
+attempted.
+
+write(): An URB is submitted on the Bulk Out endpoint. The write() is blocked
+until the URB is completed. An appropriate error code is returned in case of
+failure. -ENODEV must be treated as a serious error and no further I/O will be
+attempted.
+
+ioctl(): The ioctl() method is required for facilitating Control transfers and
+Interrupt transfers.
+
+USB_CCID_GET_CLASS_DESC: This read-only ioctl returns the smart card class
+descriptor as described in the 5.1 section of USB smart card class spec.
+
+USB_CCID_ABORT: This write-only ioctl sends A ABORT class specific request on
+control endpoint. The class request details are mentioned in section 5.3.1.
+
+USB_CCID_GET_CLOCK_FREQUENCIES: This read and write ioctl returns the clock
+frequencies supported by the CCID device. A GET_CLOCK_FREQUENCIES class request
+is sent on the control endpoint. The class request details are mentioned in
+section 5.3.2.
+
+USB_CCID_GET_DATA_RATES: This read and write ioctl returns the data rates
+supported by the CCID device. A GET_DATA_RATES class request is sent on the
+control endpoint. The class request details are mentioned in section 5.3.3.
+
+USB_CCID_GET_EVENT: This read-only ioctl returns the asynchronous event sent
+by the UICC device. The ioctl() is blocked until such event is received from
+the UICC device. This ioctl() returns -ENOENT error code when the device
+does not have an interrupt endpoint and does not support remote wakeup
+capability.
+
+close(): Cancels any ongoing I/O before it returns.
+
+Config options
+==============
+
+Turn on USB_EHCI_MSM_HSIC, USB_HSIC_SMSC_HUB and USB_CCID_BRIDGE configs to
+enable this feature.
+
+References
+==========
+
+Specification for Integrated Circuit(s) Cards Interface Devices
+
+Smart Cards; UICC-Terminal interface; Physical and logical characteristics
diff --git a/arch/arm/boot/dts/apq8084-mdss.dtsi b/arch/arm/boot/dts/apq8084-mdss.dtsi
index 15d5018..0e771ce 100644
--- a/arch/arm/boot/dts/apq8084-mdss.dtsi
+++ b/arch/arm/boot/dts/apq8084-mdss.dtsi
@@ -36,6 +36,10 @@
qcom,mdss-pipe-rgb-fetch-id = <16 17 18 22>;
qcom,mdss-pipe-dma-fetch-id = <10 13>;
+ qcom,mdss-pipe-vig-xin-id = <0 4 8 12>;
+ qcom,mdss-pipe-rgb-xin-id = <1 5 9 13>;
+ qcom,mdss-pipe-dma-xin-id = <2 10>;
+
qcom,mdss-smp-data = <44 8192>;
qcom,mdss-ctl-off = <0x00000600 0x00000700 0x00000800
diff --git a/arch/arm/boot/dts/dsi-panel-hx8394a-720p-video.dtsi b/arch/arm/boot/dts/dsi-panel-hx8394a-720p-video.dtsi
index 5302d8ae..760ecd7 100644
--- a/arch/arm/boot/dts/dsi-panel-hx8394a-720p-video.dtsi
+++ b/arch/arm/boot/dts/dsi-panel-hx8394a-720p-video.dtsi
@@ -77,6 +77,8 @@
qcom,mdss-dsi-mdp-trigger = "none";
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
qcom,mdss-dsi-reset-sequence = <1 20>, <0 1>, <1 20>;
+ qcom,mdss-pan-physical-width-dimension = <59>;
+ qcom,mdss-pan-physical-height-dimension = <104>;
};
};
diff --git a/arch/arm/boot/dts/dsi-panel-ssd2080m-720p-video.dtsi b/arch/arm/boot/dts/dsi-panel-ssd2080m-720p-video.dtsi
index 60bba5d..39b10b3 100644
--- a/arch/arm/boot/dts/dsi-panel-ssd2080m-720p-video.dtsi
+++ b/arch/arm/boot/dts/dsi-panel-ssd2080m-720p-video.dtsi
@@ -31,7 +31,7 @@
qcom,mdss-dsi-h-pulse-width = <14>;
qcom,mdss-dsi-h-sync-skew = <0>;
qcom,mdss-dsi-v-back-porch = <14>;
- qcom,mdss-dsi-v-front-porch = <30>;
+ qcom,mdss-dsi-v-front-porch = <25>;
qcom,mdss-dsi-v-pulse-width = <2>;
qcom,mdss-dsi-h-left-border = <0>;
qcom,mdss-dsi-h-right-border = <0>;
@@ -43,11 +43,12 @@
qcom,mdss-dsi-border-color = <0>;
qcom,mdss-dsi-pixel-packing = "tight";
qcom,mdss-dsi-on-command = [15 01 00 00 00 00 02 FF 01
+ 29 01 00 00 00 00 02 53 00
29 01 00 00 00 00 05 C6 63 00 81 31
29 01 00 00 00 00 05 CB E7 80 73 33
29 01 00 00 00 00 02 EC D2
29 01 00 00 00 00 03 B3 04 9F
- 29 01 00 00 00 00 04 B2 16 1E 10
+ 29 01 00 00 00 00 04 B2 16 26 10
29 01 00 00 00 00 02 B4 00
29 01 00 00 00 00 02 C1 04
29 01 00 00 00 00 04 C2 BE 00 58
@@ -63,19 +64,19 @@
29 01 00 00 00 00 04 E6 FF FF 0F
29 01 00 00 00 00 02 C7 3F
29 01 00 00 00 00 07 B5 47 00 00 08 00 01
- 29 01 00 00 00 00 08 C4 DF 72 12 12 66 E3 99
- 29 01 00 00 00 00 07 D0 0A 00 0D 15 1F 2E
- 29 01 00 00 00 00 06 D1 28 27 14 02 01
- 29 01 00 00 00 00 07 D2 0A 00 0D 15 1F 2E
- 29 01 00 00 00 00 06 D3 28 27 14 02 01
- 29 01 00 00 00 00 07 D4 0A 00 0D 15 1F 2E
- 29 01 00 00 00 00 06 D5 28 27 14 02 01
- 29 01 00 00 00 00 07 D6 0A 00 0D 15 1F 2E
- 29 01 00 00 00 00 06 D7 28 27 14 02 01
- 29 01 00 00 00 00 07 D8 0A 00 0D 15 1F 2E
- 29 01 00 00 00 00 06 D9 28 27 14 02 01
- 29 01 00 00 00 00 07 DA 0A 00 0D 15 1F 2E
- 29 01 00 00 00 00 06 DB 28 27 14 02 01
+ 29 01 00 00 00 00 08 C4 DF C2 0C 0C 63 E3 99
+ 29 01 00 00 00 00 07 D0 0A 00 06 09 10 20
+ 29 01 00 00 00 00 06 D1 1D 32 1B 00 00
+ 29 01 00 00 00 00 07 D2 0A 00 06 09 10 20
+ 29 01 00 00 00 00 06 D3 1D 32 1B 00 00
+ 29 01 00 00 00 00 07 D4 0A 00 06 09 10 20
+ 29 01 00 00 00 00 06 D5 1D 32 1B 00 00
+ 29 01 00 00 00 00 07 D6 0A 00 06 09 10 20
+ 29 01 00 00 00 00 06 D7 1D 32 1B 00 00
+ 29 01 00 00 00 00 07 D8 0A 00 06 09 10 20
+ 29 01 00 00 00 00 06 D9 1D 32 1B 00 00
+ 29 01 00 00 00 00 07 DA 0A 00 06 09 10 20
+ 29 01 00 00 00 00 06 DB 1D 32 1B 00 00
29 01 00 00 00 00 03 CC 10 00
29 01 00 00 00 00 04 CE 4E 55 A5
29 01 00 00 00 00 04 E0 01 02 02
@@ -84,18 +85,20 @@
29 01 00 00 00 00 03 E1 90 00
29 01 00 00 00 00 07 DE 95 CF E2 CE 11 15
29 01 00 00 00 00 02 CF 46
- 29 01 00 00 00 00 03 C5 77 47
+ 29 01 00 00 00 00 02 C5 66
29 01 00 00 00 00 03 ED 00 20
- 05 01 00 00 B4 00 02 11 00
- 05 01 00 00 82 00 02 29 00
- 15 01 00 00 00 00 02 53 2c];
- qcom,mdss-dsi-off-command = [15 01 00 00 32 00 02 10 00
- 15 01 00 00 32 00 02 53 00
- 15 01 00 00 00 00 02 c2 00
+ 15 01 00 00 00 00 02 53 2c
+ 05 01 00 00 20 00 02 11 00
+ 05 01 00 00 20 00 02 29 00];
+
+ qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 10 00
+ 39 01 00 00 20 00 02 53 00
+ 39 01 00 00 20 00 02 c2 00
39 01 00 00 00 00 02 cf 40
- 15 01 00 00 50 00 03 de 84 00
+ 39 01 00 00 20 00 03 de 84 00
39 01 00 00 00 00 02 cb 22
- 15 01 00 00 00 00 02 c3 00];
+ 39 01 00 00 00 00 02 c3 00];
+
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
qcom,mdss-dsi-h-sync-pulse = <1>;
@@ -115,5 +118,7 @@
qcom,mdss-dsi-mdp-trigger = "none";
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
qcom,mdss-dsi-reset-sequence = <1 20>, <0 2>, <1 20>;
+ qcom,mdss-dsi-lp11-init;
+ qcom,mdss-dsi-init-delay-us = <50000>;
};
};
diff --git a/arch/arm/boot/dts/dsi-panel-truly-wvga-cmd.dtsi b/arch/arm/boot/dts/dsi-panel-truly-wvga-cmd.dtsi
index 168dda4..4cd1563 100644
--- a/arch/arm/boot/dts/dsi-panel-truly-wvga-cmd.dtsi
+++ b/arch/arm/boot/dts/dsi-panel-truly-wvga-cmd.dtsi
@@ -165,5 +165,7 @@
qcom,mdss-dsi-mdp-trigger = "trigger_te";
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
qcom,mdss-dsi-reset-sequence = <1 20>, <0 2>, <1 20>;
+ qcom,mdss-pan-physical-width-dimension = <52>;
+ qcom,mdss-pan-physical-height-dimension = <86>;
};
};
diff --git a/arch/arm/boot/dts/dsi-panel-truly-wvga-video.dtsi b/arch/arm/boot/dts/dsi-panel-truly-wvga-video.dtsi
index 121e54d..bdc43a9 100644
--- a/arch/arm/boot/dts/dsi-panel-truly-wvga-video.dtsi
+++ b/arch/arm/boot/dts/dsi-panel-truly-wvga-video.dtsi
@@ -163,5 +163,7 @@
qcom,mdss-dsi-mdp-trigger = "none";
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
qcom,mdss-dsi-reset-sequence = <1 20>, <0 2>, <1 20>;
+ qcom,mdss-pan-physical-width-dimension = <52>;
+ qcom,mdss-pan-physical-height-dimension = <86>;
};
};
diff --git a/arch/arm/boot/dts/msm-pm8226.dtsi b/arch/arm/boot/dts/msm-pm8226.dtsi
index 6d506cc..a13e66a 100644
--- a/arch/arm/boot/dts/msm-pm8226.dtsi
+++ b/arch/arm/boot/dts/msm-pm8226.dtsi
@@ -860,22 +860,6 @@
qcom,current = <625>;
};
- pm8226_flash1: qcom,flash_1 {
- qcom,max-current = <1000>;
- qcom,default-state = "off";
- qcom,headroom = <3>;
- qcom,duration = <1280>;
- qcom,clamp-curr = <200>;
- qcom,startup-dly = <3>;
- qcom,safety-timer;
- linux,default-trigger =
- "flash1_trigger";
- label = "flash";
- qcom,id = <2>;
- linux,name = "led:flash_1";
- qcom,current = <625>;
- };
-
pm8226_torch: qcom,flash_torch {
qcom,max-current = <200>;
qcom,default-state = "off";
diff --git a/arch/arm/boot/dts/msm8226-camera-sensor-cdp.dtsi b/arch/arm/boot/dts/msm8226-camera-sensor-cdp.dtsi
index fa5c739..20bb2aa 100644
--- a/arch/arm/boot/dts/msm8226-camera-sensor-cdp.dtsi
+++ b/arch/arm/boot/dts/msm8226-camera-sensor-cdp.dtsi
@@ -17,7 +17,7 @@
cell-index = <0>;
compatible = "qcom,camera-led-flash";
qcom,flash-type = <1>;
- qcom,flash-source = <&pm8226_flash0 &pm8226_flash1>;
+ qcom,flash-source = <&pm8226_flash0>;
qcom,torch-source = <&pm8226_torch>;
};
};
diff --git a/arch/arm/boot/dts/msm8226-camera-sensor-mtp.dtsi b/arch/arm/boot/dts/msm8226-camera-sensor-mtp.dtsi
index 5d1e1c8..07a4383 100644
--- a/arch/arm/boot/dts/msm8226-camera-sensor-mtp.dtsi
+++ b/arch/arm/boot/dts/msm8226-camera-sensor-mtp.dtsi
@@ -17,7 +17,7 @@
cell-index = <0>;
compatible = "qcom,camera-led-flash";
qcom,flash-type = <1>;
- qcom,flash-source = <&pm8226_flash0 &pm8226_flash1>;
+ qcom,flash-source = <&pm8226_flash0>;
qcom,torch-source = <&pm8226_torch>;
};
};
diff --git a/arch/arm/boot/dts/msm8226-camera-sensor-qrd.dtsi b/arch/arm/boot/dts/msm8226-camera-sensor-qrd.dtsi
index fd6d618..0436600 100644
--- a/arch/arm/boot/dts/msm8226-camera-sensor-qrd.dtsi
+++ b/arch/arm/boot/dts/msm8226-camera-sensor-qrd.dtsi
@@ -17,7 +17,7 @@
cell-index = <0>;
compatible = "qcom,camera-led-flash";
qcom,flash-type = <1>;
- qcom,flash-source = <&pm8226_flash0 &pm8226_flash1>;
+ qcom,flash-source = <&pm8226_flash0>;
qcom,torch-source = <&pm8226_torch>;
};
};
diff --git a/arch/arm/boot/dts/msm8226-mdss.dtsi b/arch/arm/boot/dts/msm8226-mdss.dtsi
index 38cfe66..84bb234 100644
--- a/arch/arm/boot/dts/msm8226-mdss.dtsi
+++ b/arch/arm/boot/dts/msm8226-mdss.dtsi
@@ -28,6 +28,11 @@
qcom,mdss-pipe-vig-fetch-id = <1>;
qcom,mdss-pipe-rgb-fetch-id = <7>;
qcom,mdss-pipe-dma-fetch-id = <4>;
+
+ qcom,mdss-pipe-vig-xin-id = <0>;
+ qcom,mdss-pipe-rgb-xin-id = <1>;
+ qcom,mdss-pipe-dma-xin-id = <2>;
+
qcom,mdss-smp-data = <7 4096>;
qcom,mdss-ctl-off = <0x00000600 0x00000700>;
diff --git a/arch/arm/boot/dts/msm8226-qrd-skuf.dtsi b/arch/arm/boot/dts/msm8226-qrd-skuf.dtsi
index 2e32ac4..c3fcedb 100755
--- a/arch/arm/boot/dts/msm8226-qrd-skuf.dtsi
+++ b/arch/arm/boot/dts/msm8226-qrd-skuf.dtsi
@@ -82,7 +82,7 @@
avdd-supply = <&tp_power>;
goodix,panel-coords = <0 0 720 1200>;
goodix,display-coords = <0 0 720 1080>;
- goodix,button-map= <158 102 139>;
+ goodix,button-map= <139 172 158>;
goodix,product-id = "915";
goodix,cfg-data0 = [
41 D0 02 00 05 05 35 11 01 0F
diff --git a/arch/arm/boot/dts/msm8226-qrd.dtsi b/arch/arm/boot/dts/msm8226-qrd.dtsi
index 7ff97f6..84e46ea 100644
--- a/arch/arm/boot/dts/msm8226-qrd.dtsi
+++ b/arch/arm/boot/dts/msm8226-qrd.dtsi
@@ -17,6 +17,20 @@
status = "ok";
};
+ i2c@f9925000 { /* BLSP1 QUP3 */
+ nfc-nci@0e {
+ compatible = "qcom,nfc-nci";
+ reg = <0x0e>;
+ qcom,irq-gpio = <&msmgpio 21 0x00>;
+ qcom,dis-gpio = <&msmgpio 20 0x00>;
+ qcom,clk-src = "BBCLK2";
+ qcom,clk-en-gpio = <&msmgpio 0 0x00>;
+ interrupt-parent = <&msmgpio>;
+ interrupts = <21 0>;
+ qcom,clk-gpio = <&pm8226_gpios 3 0>;
+ };
+ };
+
i2c@f9927000 { /* BLSP1 QUP5 */
synaptics@20 {
compatible = "synaptics,rmi4";
diff --git a/arch/arm/boot/dts/msm8226-regulator.dtsi b/arch/arm/boot/dts/msm8226-regulator.dtsi
index dbeaa97..0146367 100644
--- a/arch/arm/boot/dts/msm8226-regulator.dtsi
+++ b/arch/arm/boot/dts/msm8226-regulator.dtsi
@@ -30,7 +30,7 @@
&soc {
apc_vreg_corner: regulator@f9018000 {
status = "okay";
- compatible = "qti,cpr-regulator";
+ compatible = "qcom,cpr-regulator";
reg = <0xf9018000 0x1000>, <0xf9011064 4>, <0xfc4b8000 0x1000>;
reg-names = "rbcpr", "rbcpr_clk", "efuse_addr";
interrupts = <0 15 0>;
@@ -38,61 +38,61 @@
regulator-min-microvolt = <1>;
regulator-max-microvolt = <12>;
- qti,pvs-fuse-redun-sel = <22 24 3 2 0>;
- qti,pvs-fuse = <22 6 5 0>;
- qti,pvs-fuse-redun = <22 27 5 0>;
+ qcom,pvs-fuse-redun-sel = <22 24 3 2 0>;
+ qcom,pvs-fuse = <22 6 5 0>;
+ qcom,pvs-fuse-redun = <22 27 5 0>;
- qti,pvs-init-voltage = <1275000 1275000 1275000 1275000 1275000
+ qcom,pvs-init-voltage = <1275000 1275000 1275000 1275000 1275000
1275000 1260000 1245000 1230000 1215000
1200000 1185000 1170000 1155000 1140000
1140000 1140000 1140000 1140000 1140000
1150000 1140000 1140000 1140000 1140000
1140000 1140000 1140000 1275000 1275000
1275000 1275000>;
- qti,pvs-corner-ceiling-slow = <1050000 1150000 1275000>;
- qti,pvs-corner-ceiling-nom = <1050000 1075000 1200000>;
- qti,pvs-corner-ceiling-fast = <1050000 1050000 1100000>;
+ qcom,pvs-corner-ceiling-slow = <1050000 1150000 1275000>;
+ qcom,pvs-corner-ceiling-nom = <1050000 1075000 1200000>;
+ qcom,pvs-corner-ceiling-fast = <1050000 1050000 1100000>;
vdd-apc-supply = <&pm8226_s2>;
vdd-mx-supply = <&pm8226_l3_ao>;
- qti,vdd-mx-vmax = <1350000>;
- qti,vdd-mx-vmin-method = <1>;
+ qcom,vdd-mx-vmax = <1350000>;
+ qcom,vdd-mx-vmin-method = <1>;
- qti,cpr-ref-clk = <19200>;
- qti,cpr-timer-delay = <5000>;
- qti,cpr-timer-cons-up = <0>;
- qti,cpr-timer-cons-down = <2>;
- qti,cpr-irq-line = <0>;
- qti,cpr-step-quotient = <15>;
- qti,cpr-up-threshold = <0>;
- qti,cpr-down-threshold = <10>;
- qti,cpr-idle-clocks = <0>;
- qti,cpr-gcnt-time = <1>;
- qti,vdd-apc-step-up-limit = <1>;
- qti,vdd-apc-step-down-limit = <1>;
- qti,cpr-apc-volt-step = <5000>;
+ qcom,cpr-ref-clk = <19200>;
+ qcom,cpr-timer-delay = <5000>;
+ qcom,cpr-timer-cons-up = <0>;
+ qcom,cpr-timer-cons-down = <2>;
+ qcom,cpr-irq-line = <0>;
+ qcom,cpr-step-quotient = <15>;
+ qcom,cpr-up-threshold = <0>;
+ qcom,cpr-down-threshold = <10>;
+ qcom,cpr-idle-clocks = <0>;
+ qcom,cpr-gcnt-time = <1>;
+ qcom,vdd-apc-step-up-limit = <1>;
+ qcom,vdd-apc-step-down-limit = <1>;
+ qcom,cpr-apc-volt-step = <5000>;
- qti,cpr-fuse-redun-sel = <138 57 1 1 0>;
- qti,cpr-fuse-row = <138 0>;
- qti,cpr-fuse-bp-cpr-disable = <36>;
- qti,cpr-fuse-bp-scheme = <37>;
- qti,cpr-fuse-target-quot = <24 12 0>;
- qti,cpr-fuse-ro-sel = <54 38 41>;
- qti,cpr-fuse-redun-row = <139 0>;
- qti,cpr-fuse-redun-target-quot = <24 12 0>;
- qti,cpr-fuse-redun-ro-sel = <46 36 39>;
+ qcom,cpr-fuse-redun-sel = <138 57 1 1 0>;
+ qcom,cpr-fuse-row = <138 0>;
+ qcom,cpr-fuse-bp-cpr-disable = <36>;
+ qcom,cpr-fuse-bp-scheme = <37>;
+ qcom,cpr-fuse-target-quot = <24 12 0>;
+ qcom,cpr-fuse-ro-sel = <54 38 41>;
+ qcom,cpr-fuse-redun-row = <139 0>;
+ qcom,cpr-fuse-redun-target-quot = <24 12 0>;
+ qcom,cpr-fuse-redun-ro-sel = <46 36 39>;
- qti,cpr-enable;
- qti,cpr-fuse-cond-min-volt-sel = <54 42 6 7 1>;
- qti,cpr-cond-min-voltage = <1140000>;
- qti,cpr-fuse-uplift-sel = <22 53 1 0 0>;
- qti,cpr-uplift-voltage = <50000>;
- qti,cpr-uplift-quotient = <0 0 120>;
- qti,cpr-uplift-max-volt = <1350000>;
- qti,cpr-uplift-speed-bin = <1>;
- qti,speed-bin-fuse-sel = <22 0 3 0>;
- qti,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3>;
- qti,cpr-quot-adjust-table =
+ qcom,cpr-enable;
+ qcom,cpr-fuse-cond-min-volt-sel = <54 42 6 7 1>;
+ qcom,cpr-cond-min-voltage = <1140000>;
+ qcom,cpr-fuse-uplift-sel = <22 53 1 0 0>;
+ qcom,cpr-uplift-voltage = <50000>;
+ qcom,cpr-uplift-quotient = <0 0 120>;
+ qcom,cpr-uplift-max-volt = <1350000>;
+ qcom,cpr-uplift-speed-bin = <1>;
+ qcom,speed-bin-fuse-sel = <22 0 3 0>;
+ qcom,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3>;
+ qcom,cpr-quot-adjust-table =
<1 5 450>,
<1 6 375>,
<1 7 300>,
diff --git a/arch/arm/boot/dts/msm8226-v2.dtsi b/arch/arm/boot/dts/msm8226-v2.dtsi
index f1f43b2..089d415 100644
--- a/arch/arm/boot/dts/msm8226-v2.dtsi
+++ b/arch/arm/boot/dts/msm8226-v2.dtsi
@@ -52,20 +52,20 @@
};
&apc_vreg_corner {
- qti,pvs-init-voltage = <1330000 1330000 1330000 1320000 1310000
+ qcom,pvs-init-voltage = <1330000 1330000 1330000 1320000 1310000
1300000 1290000 1280000 1270000 1260000
1250000 1240000 1230000 1220000 1210000
1200000 1190000 1180000 1170000 1160000
1150000 1140000 1140000 1140000 1140000
1140000 1140000 1140000 1140000 1140000
1140000 1140000>;
- qti,pvs-corner-ceiling-slow = <1050000 1150000 1280000>;
- qti,pvs-corner-ceiling-nom = <1050000 1080000 1200000>;
- qti,pvs-corner-ceiling-fast = <1050000 1050000 1100000>;
- qti,cpr-step-quotient = <30>;
- qti,cpr-up-threshold = <0>;
- qti,cpr-down-threshold = <5>;
- qti,cpr-apc-volt-step = <10000>;
+ qcom,pvs-corner-ceiling-slow = <1050000 1150000 1280000>;
+ qcom,pvs-corner-ceiling-nom = <1050000 1080000 1200000>;
+ qcom,pvs-corner-ceiling-fast = <1050000 1050000 1100000>;
+ qcom,cpr-step-quotient = <30>;
+ qcom,cpr-up-threshold = <0>;
+ qcom,cpr-down-threshold = <5>;
+ qcom,cpr-apc-volt-step = <10000>;
};
&msm_gpu {
diff --git a/arch/arm/boot/dts/msm8226.dtsi b/arch/arm/boot/dts/msm8226.dtsi
index 804cc44..e0304f5 100644
--- a/arch/arm/boot/dts/msm8226.dtsi
+++ b/arch/arm/boot/dts/msm8226.dtsi
@@ -1018,23 +1018,32 @@
cpu-vdd-supply = <&apc_vreg_corner>;
};
+ qcom,cpubw {
+ compatible = "qcom,cpubw";
+ qcom,cpu-mem-ports = <1 512>;
+ qcom,bw-tbl =
+ < 1525 /* 200 MHz */ >,
+ < 2441 /* 320 MHz */ >,
+ < 3051 /* 400 MHz */ >,
+ < 4066 /* 533 MHz */ >;
+ };
+
qcom,msm-cpufreq@0 {
reg = <0 4>;
compatible = "qcom,msm-cpufreq";
- qcom,cpu-mem-ports = <1 512>;
qcom,cpufreq-table =
- < 300000 1600 /* 200 MHz */ >,
- < 384000 1600 /* 200 MHz */ >,
- < 600000 1600 /* 200 MHz */ >,
- < 787200 3200 /* 400 MHz */ >,
- < 998400 4264 /* 533 MHz */ >,
- < 1094400 4264 /* 533 MHz */ >,
- < 1190400 4264 /* 533 MHz */ >,
- < 1305600 4264 /* 533 MHz */ >,
- < 1344000 4264 /* 533 MHz */ >,
- < 1401600 4264 /* 533 MHz */ >,
- < 1497600 4264 /* 533 MHz */ >,
- < 1593600 4264 /* 533 MHz */ >;
+ < 300000 1525 >,
+ < 384000 1525 >,
+ < 600000 1525 >,
+ < 787200 3051 >,
+ < 998400 4066 >,
+ < 1094400 4066 >,
+ < 1190400 4066 >,
+ < 1305600 4066 >,
+ < 1344000 4066 >,
+ < 1401600 4066 >,
+ < 1497600 4066 >,
+ < 1593600 4066 >;
};
qcom,ocmem@fdd00000 {
diff --git a/arch/arm/boot/dts/msm8610-mtp.dtsi b/arch/arm/boot/dts/msm8610-mtp.dtsi
index 3b0f2a2..7f48db0 100644
--- a/arch/arm/boot/dts/msm8610-mtp.dtsi
+++ b/arch/arm/boot/dts/msm8610-mtp.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-14, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -39,14 +39,14 @@
/* Object 6, Instance = 0 */
00 00 00 00 00 00
/* Object 38, Instance = 0 */
- 1D 03 00 1E 07 0D 00 00
+ 1D 05 01 0D 01 0E 00 00
/* Object 7, Instance = 0 */
20 08 32
/* Object 8, Instance = 0 */
19 00 14 14 FF 00 FF 00 00 00
/* Object 9, Instance = 0 */
83 00 00 13 0B 00 20 32 01 03
- 00 32 05 30 0A 05 0A 00 70 03
+ 00 32 05 30 05 05 0A 00 70 03
FC 01 04 2F F8 DC 00 00 40 00
00 0A 00 00 02
/* Object 18, Instance = 0 */
diff --git a/arch/arm/boot/dts/msm8610-qrd-skuab.dtsi b/arch/arm/boot/dts/msm8610-qrd-skuab.dtsi
index a22958a..c7fa9db 100644
--- a/arch/arm/boot/dts/msm8610-qrd-skuab.dtsi
+++ b/arch/arm/boot/dts/msm8610-qrd-skuab.dtsi
@@ -65,7 +65,7 @@
vcc-i2c-supply = <&pm8110_l14>;
goodix,panel-coords = <0 0 540 980>;
goodix,display-coords = <0 0 540 960>;
- goodix,button-map= <139 102 158>;
+ goodix,button-map= <139 172 158>;
goodix,product-id = "915";
goodix,enable-power-off;
goodix,cfg-data0 = [
@@ -101,6 +101,20 @@
qcom,y-offset = <0>;
};
+ i2c@f9924000 { /* BLSP-1 QUP-2 */
+ nfc-nci@e {
+ compatible = "qcom,nfc-nci";
+ reg = <0x0e>;
+ qcom,irq-gpio = <&msmgpio 77 0x00>;
+ qcom,dis-gpio = <&msmgpio 93 0x00>;
+ qcom,clk-en-gpio = <&msmgpio 78 0x00>;
+ qcom,clk-src = "GPCLK2";
+ interrupt-parent = <&msmgpio>;
+ interrupts = <77 0>;
+ qcom,clk-gpio = <&msmgpio 75 0x00>;
+ };
+ };
+
i2c@f9925000 {
fsl@1c {
compatible = "fsl,mma8x5x";
diff --git a/arch/arm/boot/dts/msm8610-regulator.dtsi b/arch/arm/boot/dts/msm8610-regulator.dtsi
index 21788f5..30c557d 100644
--- a/arch/arm/boot/dts/msm8610-regulator.dtsi
+++ b/arch/arm/boot/dts/msm8610-regulator.dtsi
@@ -30,62 +30,61 @@
&soc {
apc_vreg_corner: regulator@f9018000 {
status = "okay";
- compatible = "qti,cpr-regulator";
+ compatible = "qcom,cpr-regulator";
reg = <0xf9018000 0x1000>, <0xf9011064 4>, <0xfc4b8000 0x1000>;
reg-names = "rbcpr", "rbcpr_clk", "efuse_addr";
interrupts = <0 15 0>;
regulator-name = "apc_corner";
regulator-min-microvolt = <1>;
- regulator-max-microvolt = <12>;
+ regulator-max-microvolt = <3>;
- qti,pvs-fuse-redun-sel = <53 25 3 2 1>;
- qti,pvs-fuse = <23 6 5 1>;
- qti,pvs-fuse-redun = <61 47 5 1>;
+ qcom,pvs-fuse-redun-sel = <53 25 3 2 1>;
+ qcom,pvs-fuse = <23 6 5 1>;
+ qcom,pvs-fuse-redun = <61 47 5 1>;
- qti,pvs-init-voltage = <1275000 1275000 1275000 1275000 1275000
+ qcom,pvs-init-voltage = <1275000 1275000 1275000 1275000 1275000
1275000 1275000 1275000 1275000 1275000
1275000 1275000 1275000 1275000 1275000
1275000 1275000 1275000 1275000 1275000
1275000 1275000 1275000 1275000 1275000
1275000 1275000 1275000 1275000 1275000
1275000 1275000>;
- qti,pvs-corner-ceiling-slow = <1050000 1150000 1275000>;
- qti,pvs-corner-ceiling-nom = <1050000 1075000 1275000>;
- qti,pvs-corner-ceiling-fast = <1050000 1050000 1275000>;
+ qcom,pvs-corner-ceiling-slow = <1050000 1150000 1275000>;
+ qcom,pvs-corner-ceiling-nom = <1050000 1075000 1275000>;
+ qcom,pvs-corner-ceiling-fast = <1050000 1050000 1275000>;
vdd-apc-supply = <&pm8110_s2>;
vdd-mx-supply = <&pm8110_l3_ao>;
- qti,vdd-mx-vmax = <1350000>;
- qti,vdd-mx-vmin-method = <1>;
+ qcom,vdd-mx-vmax = <1350000>;
+ qcom,vdd-mx-vmin-method = <1>;
- qti,cpr-ref-clk = <19200>;
- qti,cpr-timer-delay = <5000>;
- qti,cpr-timer-cons-up = <0>;
- qti,cpr-timer-cons-down = <2>;
- qti,cpr-irq-line = <0>;
- qti,cpr-step-quotient = <15>;
- qti,cpr-up-threshold = <0>;
- qti,cpr-down-threshold = <10>;
- qti,cpr-idle-clocks = <5>;
- qti,cpr-gcnt-time = <1>;
- qti,vdd-apc-step-up-limit = <1>;
- qti,vdd-apc-step-down-limit = <1>;
- qti,cpr-apc-volt-step = <5000>;
+ qcom,cpr-ref-clk = <19200>;
+ qcom,cpr-timer-delay = <5000>;
+ qcom,cpr-timer-cons-up = <0>;
+ qcom,cpr-timer-cons-down = <2>;
+ qcom,cpr-irq-line = <0>;
+ qcom,cpr-step-quotient = <15>;
+ qcom,cpr-up-threshold = <0>;
+ qcom,cpr-down-threshold = <10>;
+ qcom,cpr-idle-clocks = <5>;
+ qcom,cpr-gcnt-time = <1>;
+ qcom,vdd-apc-step-up-limit = <1>;
+ qcom,vdd-apc-step-down-limit = <1>;
+ qcom,cpr-apc-volt-step = <5000>;
- qti,cpr-fuse-redun-sel = <53 25 3 2 1>;
- qti,cpr-fuse-row = <61 1>;
- qti,cpr-fuse-bp-cpr-disable = <39>;
- qti,cpr-fuse-bp-scheme = <40>;
- qti,cpr-fuse-target-quot = <27 15 3>;
- qti,cpr-fuse-ro-sel = <47 41 44>;
- qti,cpr-fuse-redun-row = <52 1>;
- qti,cpr-fuse-redun-bp-cpr-disable = <24>;
- qti,cpr-fuse-redun-bp-scheme = <25>;
- qti,cpr-fuse-redun-target-quot = <32 12 0>;
- qti,cpr-fuse-redun-ro-sel = <44 26 29>;
- qti,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3>;
+ qcom,cpr-fuse-redun-sel = <53 25 3 2 1>;
+ qcom,cpr-fuse-row = <61 1>;
+ qcom,cpr-fuse-bp-cpr-disable = <39>;
+ qcom,cpr-fuse-bp-scheme = <40>;
+ qcom,cpr-fuse-target-quot = <27 15 3>;
+ qcom,cpr-fuse-ro-sel = <47 41 44>;
+ qcom,cpr-fuse-redun-row = <52 1>;
+ qcom,cpr-fuse-redun-bp-cpr-disable = <24>;
+ qcom,cpr-fuse-redun-bp-scheme = <25>;
+ qcom,cpr-fuse-redun-target-quot = <32 12 0>;
+ qcom,cpr-fuse-redun-ro-sel = <44 26 29>;
- qti,cpr-enable;
+ qcom,cpr-enable;
};
};
diff --git a/arch/arm/boot/dts/msm8610-v1-pm.dtsi b/arch/arm/boot/dts/msm8610-v1-pm.dtsi
index ea37413..e075c71 100644
--- a/arch/arm/boot/dts/msm8610-v1-pm.dtsi
+++ b/arch/arm/boot/dts/msm8610-v1-pm.dtsi
@@ -302,6 +302,8 @@
qcom,pc-mode = "tz_l2_int";
qcom,use-sync-timer;
qcom,pc-resets-timer;
+ qcom,cpus-as-clocks;
+ qcom,synced-clocks;
};
qcom,cpu-sleep-status@f9088008{
diff --git a/arch/arm/boot/dts/msm8610-v2-pm.dtsi b/arch/arm/boot/dts/msm8610-v2-pm.dtsi
index 19fb185..447290d 100644
--- a/arch/arm/boot/dts/msm8610-v2-pm.dtsi
+++ b/arch/arm/boot/dts/msm8610-v2-pm.dtsi
@@ -304,6 +304,8 @@
qcom,pc-mode = "tz_l2_int";
qcom,use-sync-timer;
qcom,pc-resets-timer;
+ qcom,cpus-as-clocks;
+ qcom,synced-clocks;
};
qcom,cpu-sleep-status@f9088008{
diff --git a/arch/arm/boot/dts/msm8610.dtsi b/arch/arm/boot/dts/msm8610.dtsi
index 558f8c2..6e10deb 100644
--- a/arch/arm/boot/dts/msm8610.dtsi
+++ b/arch/arm/boot/dts/msm8610.dtsi
@@ -240,7 +240,6 @@
qcom,hsusb-otg-otg-control = <2>;
qcom,hsusb-otg-disable-reset;
qcom,dp-manual-pullup;
- qcom,ahb-async-bridge-bypass;
qcom,disable-retention-with-vdd-min;
qcom,msm-bus,name = "usb2";
@@ -464,11 +463,39 @@
qcom,ipi-ping;
};
- qcom,acpuclk@f9011050 {
- compatible = "qcom,acpuclk-a7";
+ qcom,clock-a7@f9011050 {
+ compatible = "qcom,clock-a7-8226";
reg = <0xf9011050 0x8>;
- reg-names = "rcg_base";
- a7_cpu-supply = <&apc_vreg_corner>;
+ reg-names = "rcg-base";
+ clock-names = "clk-4", "clk-5";
+ qcom,speed0-bin-v0 =
+ < 0 0>,
+ < 384000000 1>,
+ < 787200000 2>,
+ <1190400000 3>;
+
+ cpu-vdd-supply = <&apc_vreg_corner>;
+ };
+
+ qcom,cpubw {
+ compatible = "qcom,cpubw";
+ qcom,cpu-mem-ports = <1 512>;
+ qcom,bw-tbl =
+ < 762 /* 100 MHz */ >,
+ < 1525 /* 200 MHz */ >,
+ < 2540 /* 333 MHz */ >;
+ };
+
+ qcom,msm-cpufreq@0 {
+ reg = <0 4>;
+ compatible = "qcom,msm-cpufreq";
+ qcom,cpufreq-table =
+ < 300000 762 >,
+ < 384000 762 >,
+ < 600000 1525 >,
+ < 787200 1525 >,
+ < 998400 2540 >,
+ < 1190400 2540 >;
};
spmi_bus: qcom,spmi@fc4c0000 {
diff --git a/arch/arm/boot/dts/msm8926-camera-sensor-qrd.dtsi b/arch/arm/boot/dts/msm8926-camera-sensor-qrd.dtsi
index 9b812da..ac2d908 100644
--- a/arch/arm/boot/dts/msm8926-camera-sensor-qrd.dtsi
+++ b/arch/arm/boot/dts/msm8926-camera-sensor-qrd.dtsi
@@ -17,7 +17,7 @@
cell-index = <0>;
compatible = "qcom,camera-led-flash";
qcom,flash-type = <1>;
- qcom,flash-source = <&pm8226_flash0 &pm8226_flash1>;
+ qcom,flash-source = <&pm8226_flash0>;
qcom,torch-source = <&pm8226_torch>;
};
};
diff --git a/arch/arm/boot/dts/msm8926.dtsi b/arch/arm/boot/dts/msm8926.dtsi
index d2ab717..1c8fe4a 100644
--- a/arch/arm/boot/dts/msm8926.dtsi
+++ b/arch/arm/boot/dts/msm8926.dtsi
@@ -45,39 +45,46 @@
reg-names = "rcg-base", "efuse";
qcom,speed0-bin-v1 =
< 0 0>,
- < 384000000 1>,
- < 787200000 2>,
- <1190400000 3>;
+ < 384000000 2>,
+ < 787200000 4>,
+ <1190400000 7>;
qcom,speed6-bin-v1 =
< 0 0>,
- < 384000000 1>,
- < 787200000 2>,
- <1190400000 3>;
+ < 384000000 2>,
+ < 787200000 4>,
+ <1190400000 7>;
qcom,speed2-bin-v1 =
< 0 0>,
- < 384000000 1>,
- < 787200000 2>,
- <1401600000 3>;
+ < 384000000 2>,
+ < 787200000 4>,
+ <1401600000 10>;
qcom,speed5-bin-v1 =
< 0 0>,
- < 384000000 1>,
- < 787200000 2>,
- <1401600000 3>;
+ < 384000000 2>,
+ < 787200000 4>,
+ <1401600000 10>;
qcom,speed4-bin-v1 =
< 0 0>,
- < 384000000 1>,
- < 787200000 2>,
- <1401600000 3>;
+ < 384000000 2>,
+ < 787200000 4>,
+ <1401600000 10>;
qcom,speed7-bin-v1 =
< 0 0>,
- < 384000000 1>,
- < 787200000 2>,
- <1401600000 3>;
+ < 384000000 2>,
+ < 787200000 4>,
+ <1401600000 10>;
qcom,speed1-bin-v1 =
< 0 0>,
- < 384000000 1>,
- < 787200000 2>,
- <1593600000 3>;
+ < 384000000 2>,
+ < 787200000 4>,
+ < 998400000 5>,
+ <1094400000 6>,
+ <1190400000 7>,
+ <1305600000 8>,
+ <1344000000 9>,
+ <1401600000 10>,
+ <1497600000 11>,
+ <1593600000 12>;
};
qcom,msm-thermal {
@@ -151,20 +158,21 @@
};
&apc_vreg_corner {
- qti,pvs-init-voltage = <1350000 1340000 1330000 1320000 1310000
+ qcom,pvs-init-voltage = <1350000 1340000 1330000 1320000 1310000
1300000 1290000 1280000 1270000 1260000
1250000 1240000 1230000 1220000 1210000
1200000 1190000 1180000 1170000 1160000
1150000 1140000 1140000 1140000 1140000
1140000 1140000 1140000 1140000 1140000
1140000 1140000>;
- qti,pvs-corner-ceiling-slow = <1050000 1150000 1280000>;
- qti,pvs-corner-ceiling-nom = <1050000 1080000 1200000>;
- qti,pvs-corner-ceiling-fast = <1050000 1050000 1100000>;
- qti,cpr-step-quotient = <30>;
- qti,cpr-up-threshold = <0>;
- qti,cpr-down-threshold = <5>;
- qti,cpr-apc-volt-step = <10000>;
+ qcom,pvs-corner-ceiling-slow = <1050000 1150000 1280000>;
+ qcom,pvs-corner-ceiling-nom = <1050000 1080000 1200000>;
+ qcom,pvs-corner-ceiling-fast = <1050000 1050000 1100000>;
+ qcom,cpr-step-quotient = <30>;
+ qcom,cpr-up-threshold = <0>;
+ qcom,cpr-down-threshold = <1>;
+ qcom,cpr-apc-volt-step = <10000>;
+ qcom,cpr-quotient-adjustment = <96>;
};
&tsens {
diff --git a/arch/arm/boot/dts/msm8974-bus.dtsi b/arch/arm/boot/dts/msm8974-bus.dtsi
index af51327..b33b2b5 100644
--- a/arch/arm/boot/dts/msm8974-bus.dtsi
+++ b/arch/arm/boot/dts/msm8974-bus.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1168,12 +1168,18 @@
qcom,masterp = <0>;
qcom,tier = <2>;
qcom,hw-sel = "BIMC";
- qcom,mode = "Fixed";
+ qcom,mode = "Limiter";
qcom,qport = <0>;
qcom,ws = <10000>;
qcom,mas-hw-id = <0>;
qcom,prio-rd = <0>;
qcom,prio-wr = <0>;
+ qcom,mode-thresh = "Fixed";
+ qcom,thresh = <2000000>;
+ qcom,dual-conf;
+ qcom,bimc,bw = <300000>;
+ qcom,bimc,gp = <5000>;
+ qcom,bimc,thmp = <50>;
};
mas-ampss-m1 {
@@ -1182,12 +1188,18 @@
qcom,masterp = <1>;
qcom,tier = <2>;
qcom,hw-sel = "BIMC";
- qcom,mode = "Fixed";
+ qcom,mode = "Limiter";
qcom,qport = <1>;
qcom,ws = <10000>;
qcom,mas-hw-id = <0>;
qcom,prio-rd = <0>;
qcom,prio-wr = <0>;
+ qcom,mode-thresh = "Fixed";
+ qcom,thresh = <2000000>;
+ qcom,dual-conf;
+ qcom,bimc,bw = <300000>;
+ qcom,bimc,gp = <5000>;
+ qcom,bimc,thmp = <50>;
};
mas-mss-proc {
diff --git a/arch/arm/boot/dts/msm8974-cdp.dtsi b/arch/arm/boot/dts/msm8974-cdp.dtsi
index 9e7b2e6..27536db 100644
--- a/arch/arm/boot/dts/msm8974-cdp.dtsi
+++ b/arch/arm/boot/dts/msm8974-cdp.dtsi
@@ -757,3 +757,11 @@
&dsi_tosh_720_vid {
qcom,cont-splash-enabled;
};
+
+&dsi_generic_720p_cmd {
+ qcom,cont-splash-enabled;
+};
+
+&dsi_jdi_1080_vid {
+ qcom,cont-splash-enabled;
+};
diff --git a/arch/arm/boot/dts/msm8974-liquid.dtsi b/arch/arm/boot/dts/msm8974-liquid.dtsi
index 922e3e0..397e10e 100644
--- a/arch/arm/boot/dts/msm8974-liquid.dtsi
+++ b/arch/arm/boot/dts/msm8974-liquid.dtsi
@@ -26,13 +26,13 @@
qcom,mdss_mdp@fd900000 {
qcom,mdss-pref-prim-intf = "edp";
- qcom,panel-lpg-channel = <7>; /* LPG Channel 8 */
- qcom,panel-pwm-period = <53>;
};
qcom,mdss_edp@fd923400 {
status = "ok";
qcom,cont-splash-enabled;
+ qcom,panel-lpg-channel = <7>; /* LPG Channel 8 */
+ qcom,panel-pwm-period = <53>;
};
i2c@f9967000 {
diff --git a/arch/arm/boot/dts/msm8974-mdss.dtsi b/arch/arm/boot/dts/msm8974-mdss.dtsi
index e409c94..bf330f3 100644
--- a/arch/arm/boot/dts/msm8974-mdss.dtsi
+++ b/arch/arm/boot/dts/msm8974-mdss.dtsi
@@ -30,6 +30,11 @@
qcom,mdss-pipe-vig-fetch-id = <1 4 7>;
qcom,mdss-pipe-rgb-fetch-id = <16 17 18>;
qcom,mdss-pipe-dma-fetch-id = <10 13>;
+
+ qcom,mdss-pipe-vig-xin-id = <0 4 8>;
+ qcom,mdss-pipe-rgb-xin-id = <1 5 9>;
+ qcom,mdss-pipe-dma-xin-id = <2 10>;
+
qcom,mdss-smp-data = <22 4096>;
qcom,mdss-ctl-off = <0x00000600 0x00000700 0x00000800
diff --git a/arch/arm/boot/dts/msm8974-mtp.dtsi b/arch/arm/boot/dts/msm8974-mtp.dtsi
index f73bcdc..6cc49c4 100644
--- a/arch/arm/boot/dts/msm8974-mtp.dtsi
+++ b/arch/arm/boot/dts/msm8974-mtp.dtsi
@@ -733,3 +733,11 @@
&dsi_tosh_720_vid {
qcom,cont-splash-enabled;
};
+
+&dsi_generic_720p_cmd {
+ qcom,cont-splash-enabled;
+};
+
+&dsi_jdi_1080_vid {
+ qcom,cont-splash-enabled;
+};
diff --git a/arch/arm/boot/dts/msm8974-v2-pm.dtsi b/arch/arm/boot/dts/msm8974-v2-pm.dtsi
index e2d40f7..cdd5fde 100644
--- a/arch/arm/boot/dts/msm8974-v2-pm.dtsi
+++ b/arch/arm/boot/dts/msm8974-v2-pm.dtsi
@@ -212,6 +212,7 @@
<50 172>, /* usb1_hs_async_wakeup_irq */
<53 104>, /* mdss_irq */
<62 222>, /* ee0_krait_hlos_spmi_periph_irq */
+ <0xff 33>, /* APCC_qgicL2PerfMonIrptReq */
<0xff 34>, /* APCC_qgicL2ErrorIrptReq */
<0xff 35>, /* WDT_barkInt */
<0xff 40>, /* qtimer_phy_irq */
diff --git a/arch/arm/boot/dts/msm8974-v2.2.dtsi b/arch/arm/boot/dts/msm8974-v2.2.dtsi
index 3ed5720..14897ba 100644
--- a/arch/arm/boot/dts/msm8974-v2.2.dtsi
+++ b/arch/arm/boot/dts/msm8974-v2.2.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -93,3 +93,7 @@
qcom,retain-periph;
qcom,retain-mem;
};
+
+&gdsc_venus {
+ qcom,skip-logic-collapse;
+};
diff --git a/arch/arm/boot/dts/msm8974-v2.dtsi b/arch/arm/boot/dts/msm8974-v2.dtsi
index 9176117..5607257 100644
--- a/arch/arm/boot/dts/msm8974-v2.dtsi
+++ b/arch/arm/boot/dts/msm8974-v2.dtsi
@@ -122,7 +122,7 @@
qcom,dec-ocmem-ab-ib = <0 0>,
<176000 519000>,
<456000 519000>,
- <864000 519000>,
+ <864000 629000>,
<1728000 1038000>,
<2766000 1661000>,
<3456000 2076000>,
diff --git a/arch/arm/boot/dts/msm8974.dtsi b/arch/arm/boot/dts/msm8974.dtsi
index a912da8..f4aa25b 100644
--- a/arch/arm/boot/dts/msm8974.dtsi
+++ b/arch/arm/boot/dts/msm8974.dtsi
@@ -215,7 +215,7 @@
vdd-supply = <&gdsc_venus>;
qcom,hfi = "venus";
qcom,has-ocmem;
- qcom,max-hw-load = <1224450>; /* 4k @ 30 + 1080p @ 30*/
+ qcom,max-hw-load = <1216800>; /* 3840 x 2160 @ 30 + 1080p @ 30*/
};
qcom,vidc {
@@ -911,7 +911,8 @@
hfpll-dig-supply = <&pm8841_s2_corner_ao>;
hfpll-analog-supply = <&pm8941_l12_ao>;
qcom,hfpll-config-val = <0x04D0405D>;
- qcom,hfpll-user-vco-mask = <0x00100000>;
+ qcom,hfpll-user-vco-mask = <0x00100000>;
+ qcom,pvs-config-ver = <1>;
qcom,l2-fmax =
< 0 0 >,
@@ -1515,25 +1516,45 @@
< 2265600000 925000 691 >;
};
+ qcom,cpubw {
+ compatible = "qcom,cpubw";
+ qcom,cpu-mem-ports = <1 512>, <2 512>;
+ qcom,bw-tbl =
+ < 572 /* 75 MHz */ >,
+ < 1144 /* 150 MHz */ >,
+ < 1525 /* 200 MHz */ >,
+ < 2342 /* 307 MHz */ >,
+ < 3509 /* 460 MHz */ >,
+ < 4684 /* 614 MHz */ >,
+ < 6103 /* 800 MHz */ >,
+ < 7102 /* 931 MHz */ >;
+ };
+
+ qcom,kraitbw-l2pm {
+ compatible = "qcom,kraitbw-l2pm";
+ interrupts = <0 1 1>;
+ qcom,bytes-per-beat = <8>;
+ };
+
qcom,msm-cpufreq@0 {
reg = <0 4>;
compatible = "qcom,msm-cpufreq";
- qcom,cpu-mem-ports = <1 512>, <2 512>;
qcom,cpufreq-table =
- < 300000 300000 600 /* 75 MHz */ >,
- < 422400 422400 1200 /* 150 MHz */ >,
- < 652800 499200 1600 /* 200 MHz */ >,
- < 729600 576000 2456 /* 307 MHz */ >,
- < 883200 576000 2456 /* 307 MHz */ >,
- < 960000 960000 3680 /* 460 MHz */ >,
- < 1036800 1036800 3680 /* 460 MHz */ >,
- < 1190400 1036800 3680 /* 460 MHz */ >,
- < 1267200 1267200 4912 /* 614 MHz */ >,
- < 1497600 1497600 4912 /* 614 MHz */ >,
- < 1574400 1574400 6400 /* 800 MHz */ >,
- < 1728000 1651200 6400 /* 800 MHz */ >,
- < 1958400 1728000 7448 /* 931 MHz */ >,
- < 2265600 1728000 7448 /* 931 MHz */ >;
+ < 300000 300000 572 >,
+ < 422400 422400 1144 >,
+ < 652800 499200 1525 >,
+ < 729600 576000 2342 >,
+ < 883200 576000 2342 >,
+ < 960000 960000 3509 >,
+ < 1036800 1036800 3509 >,
+ < 1190400 1036800 3509 >,
+ < 1267200 1267200 4684 >,
+ < 1497600 1497600 4684 >,
+ < 1574400 1574400 6103 >,
+ < 1728000 1651200 6103 >,
+ < 1958400 1728000 7102 >,
+ < 2265600 1728000 7102 >,
+ < 2457600 1728000 7102 >;
};
usb3: qcom,ssusb@f9200000 {
@@ -1980,8 +2001,8 @@
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
- <1 618 0 0>,
- <1 618 0 800>;
+ <88 618 0 0>,
+ <88 618 0 800>;
};
qseecom: qcom,qseecom@7b00000 {
diff --git a/arch/arm/boot/dts/msm8974pro-ab-pm8941-mtp.dts b/arch/arm/boot/dts/msm8974pro-ab-pm8941-mtp.dts
index 6b62391..d4bb37b 100644
--- a/arch/arm/boot/dts/msm8974pro-ab-pm8941-mtp.dts
+++ b/arch/arm/boot/dts/msm8974pro-ab-pm8941-mtp.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -22,5 +22,5 @@
};
&sdhc_1 {
- qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
+ qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
};
diff --git a/arch/arm/boot/dts/msm8974pro-pm.dtsi b/arch/arm/boot/dts/msm8974pro-pm.dtsi
index 63cb68b..29aeccd 100644
--- a/arch/arm/boot/dts/msm8974pro-pm.dtsi
+++ b/arch/arm/boot/dts/msm8974pro-pm.dtsi
@@ -217,7 +217,7 @@
<0xff 18>, /* APCx_qgicQTmrSecPhysIrptReq */
<0xff 19>, /* APCx_qgicQTmrSecPhysIrptReq */
<0xff 25>, /* APCx_qgicExtFaultIrptReq */
- <0xff 33>, /*l2_perf_mon*/
+ <0xff 33>, /* APCC_qgicL2PerfMonIrptReq */
<0xff 34>, /* APCC_qgicL2ErrorIrptReq */
<0xff 35>, /* WDT_barkInt */
<0xff 40>, /* qtimer_phy_irq */
diff --git a/arch/arm/boot/dts/msm8974pro-pm8941.dtsi b/arch/arm/boot/dts/msm8974pro-pm8941.dtsi
index 2783ffd..8b13c9f 100644
--- a/arch/arm/boot/dts/msm8974pro-pm8941.dtsi
+++ b/arch/arm/boot/dts/msm8974pro-pm8941.dtsi
@@ -38,22 +38,22 @@
&krait0_vreg {
regulator-max-microvolt = <1120000>;
- qcom,ldo-delta-voltage = <25000>;
+ qcom,ldo-delta-voltage = <12500>;
};
&krait1_vreg {
regulator-max-microvolt = <1120000>;
- qcom,ldo-delta-voltage = <25000>;
+ qcom,ldo-delta-voltage = <12500>;
};
&krait2_vreg {
regulator-max-microvolt = <1120000>;
- qcom,ldo-delta-voltage = <25000>;
+ qcom,ldo-delta-voltage = <12500>;
};
&krait3_vreg {
regulator-max-microvolt = <1120000>;
- qcom,ldo-delta-voltage = <25000>;
+ qcom,ldo-delta-voltage = <12500>;
};
&tspp {
diff --git a/arch/arm/boot/dts/msm8974pro-pma8084-regulator.dtsi b/arch/arm/boot/dts/msm8974pro-pma8084-regulator.dtsi
index 00e3b8b..79d7412 100644
--- a/arch/arm/boot/dts/msm8974pro-pma8084-regulator.dtsi
+++ b/arch/arm/boot/dts/msm8974pro-pma8084-regulator.dtsi
@@ -494,7 +494,7 @@
qcom,retention-voltage = <675000>;
qcom,ldo-default-voltage = <750000>;
qcom,ldo-threshold-voltage = <850000>;
- qcom,ldo-delta-voltage = <25000>;
+ qcom,ldo-delta-voltage = <12500>;
qcom,cpu-num = <0>;
};
@@ -510,7 +510,7 @@
qcom,retention-voltage = <675000>;
qcom,ldo-default-voltage = <750000>;
qcom,ldo-threshold-voltage = <850000>;
- qcom,ldo-delta-voltage = <25000>;
+ qcom,ldo-delta-voltage = <12500>;
qcom,cpu-num = <1>;
};
@@ -526,7 +526,7 @@
qcom,retention-voltage = <675000>;
qcom,ldo-default-voltage = <750000>;
qcom,ldo-threshold-voltage = <850000>;
- qcom,ldo-delta-voltage = <25000>;
+ qcom,ldo-delta-voltage = <12500>;
qcom,cpu-num = <2>;
};
@@ -542,7 +542,7 @@
qcom,retention-voltage = <675000>;
qcom,ldo-default-voltage = <750000>;
qcom,ldo-threshold-voltage = <850000>;
- qcom,ldo-delta-voltage = <25000>;
+ qcom,ldo-delta-voltage = <12500>;
qcom,cpu-num = <3>;
};
};
diff --git a/arch/arm/boot/dts/msm8974pro.dtsi b/arch/arm/boot/dts/msm8974pro.dtsi
index 41f02fe..f9cdb6e 100755
--- a/arch/arm/boot/dts/msm8974pro.dtsi
+++ b/arch/arm/boot/dts/msm8974pro.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -699,17 +699,17 @@
< 345600000 775000 87 >,
< 422400000 775000 108 >,
< 499200000 775000 129 >,
- < 576000000 780000 150 >,
- < 652800000 790000 171 >,
- < 729600000 800000 193 >,
- < 806400000 810000 215 >,
- < 883200000 820000 237 >,
- < 960000000 830000 260 >,
- < 1036800000 840000 282 >,
- < 1113600000 850000 306 >,
- < 1190400000 860000 330 >,
- < 1267200000 870000 354 >,
- < 1344000000 880000 378 >,
+ < 576000000 785000 150 >,
+ < 652800000 795000 171 >,
+ < 729600000 805000 193 >,
+ < 806400000 815000 215 >,
+ < 883200000 825000 237 >,
+ < 960000000 835000 260 >,
+ < 1036800000 845000 282 >,
+ < 1113600000 855000 306 >,
+ < 1190400000 865000 330 >,
+ < 1267200000 875000 354 >,
+ < 1344000000 885000 378 >,
< 1420800000 895000 404 >,
< 1497600000 910000 431 >,
< 1574400000 925000 458 >,
@@ -730,18 +730,18 @@
< 345600000 775000 87 >,
< 422400000 775000 108 >,
< 499200000 775000 129 >,
- < 576000000 775000 150 >,
- < 652800000 780000 171 >,
- < 729600000 790000 193 >,
- < 806400000 800000 215 >,
- < 883200000 810000 237 >,
- < 960000000 820000 260 >,
- < 1036800000 830000 282 >,
- < 1113600000 840000 306 >,
- < 1190400000 850000 330 >,
- < 1267200000 860000 354 >,
- < 1344000000 870000 378 >,
- < 1420800000 885000 404 >,
+ < 576000000 780000 150 >,
+ < 652800000 790000 171 >,
+ < 729600000 800000 193 >,
+ < 806400000 810000 215 >,
+ < 883200000 820000 237 >,
+ < 960000000 830000 260 >,
+ < 1036800000 840000 282 >,
+ < 1113600000 850000 306 >,
+ < 1190400000 860000 330 >,
+ < 1267200000 870000 354 >,
+ < 1344000000 880000 378 >,
+ < 1420800000 890000 404 >,
< 1497600000 900000 431 >,
< 1574400000 915000 458 >,
< 1651200000 930000 486 >,
@@ -762,17 +762,17 @@
< 422400000 775000 108 >,
< 499200000 775000 129 >,
< 576000000 775000 150 >,
- < 652800000 775000 171 >,
- < 729600000 780000 193 >,
- < 806400000 790000 215 >,
- < 883200000 800000 237 >,
- < 960000000 810000 260 >,
- < 1036800000 820000 282 >,
- < 1113600000 830000 306 >,
- < 1190400000 840000 330 >,
- < 1267200000 850000 354 >,
- < 1344000000 860000 378 >,
- < 1420800000 875000 404 >,
+ < 652800000 780000 171 >,
+ < 729600000 790000 193 >,
+ < 806400000 800000 215 >,
+ < 883200000 810000 237 >,
+ < 960000000 820000 260 >,
+ < 1036800000 830000 282 >,
+ < 1113600000 840000 306 >,
+ < 1190400000 850000 330 >,
+ < 1267200000 860000 354 >,
+ < 1344000000 870000 378 >,
+ < 1420800000 880000 404 >,
< 1497600000 890000 431 >,
< 1574400000 905000 458 >,
< 1651200000 920000 486 >,
@@ -794,17 +794,17 @@
< 499200000 775000 129 >,
< 576000000 775000 150 >,
< 652800000 775000 171 >,
- < 729600000 775000 193 >,
- < 806400000 780000 215 >,
- < 883200000 790000 237 >,
- < 960000000 800000 260 >,
- < 1036800000 810000 282 >,
- < 1113600000 820000 306 >,
- < 1190400000 830000 330 >,
- < 1267200000 840000 354 >,
- < 1344000000 850000 378 >,
- < 1420800000 865000 404 >,
- < 1497600000 880000 431 >,
+ < 729600000 785000 193 >,
+ < 806400000 795000 215 >,
+ < 883200000 805000 237 >,
+ < 960000000 815000 260 >,
+ < 1036800000 825000 282 >,
+ < 1113600000 835000 306 >,
+ < 1190400000 845000 330 >,
+ < 1267200000 855000 354 >,
+ < 1344000000 865000 378 >,
+ < 1420800000 875000 404 >,
+ < 1497600000 885000 431 >,
< 1574400000 895000 458 >,
< 1651200000 910000 486 >,
< 1728000000 925000 515 >,
@@ -825,18 +825,18 @@
< 499200000 775000 129 >,
< 576000000 775000 150 >,
< 652800000 775000 171 >,
- < 729600000 775000 193 >,
- < 806400000 775000 215 >,
- < 883200000 780000 237 >,
- < 960000000 790000 260 >,
- < 1036800000 800000 282 >,
- < 1113600000 810000 306 >,
- < 1190400000 820000 330 >,
- < 1267200000 830000 354 >,
- < 1344000000 840000 378 >,
- < 1420800000 855000 404 >,
- < 1497600000 870000 431 >,
- < 1574400000 885000 458 >,
+ < 729600000 780000 193 >,
+ < 806400000 790000 215 >,
+ < 883200000 800000 237 >,
+ < 960000000 810000 260 >,
+ < 1036800000 820000 282 >,
+ < 1113600000 830000 306 >,
+ < 1190400000 840000 330 >,
+ < 1267200000 850000 354 >,
+ < 1344000000 860000 378 >,
+ < 1420800000 870000 404 >,
+ < 1497600000 880000 431 >,
+ < 1574400000 890000 458 >,
< 1651200000 900000 486 >,
< 1728000000 915000 515 >,
< 1804800000 930000 543 >,
@@ -857,18 +857,18 @@
< 576000000 775000 150 >,
< 652800000 775000 171 >,
< 729600000 775000 193 >,
- < 806400000 775000 215 >,
- < 883200000 775000 237 >,
- < 960000000 780000 260 >,
- < 1036800000 790000 282 >,
- < 1113600000 800000 306 >,
- < 1190400000 810000 330 >,
- < 1267200000 820000 354 >,
- < 1344000000 830000 378 >,
- < 1420800000 845000 404 >,
- < 1497600000 860000 431 >,
- < 1574400000 875000 458 >,
- < 1651200000 890000 486 >,
+ < 806400000 785000 215 >,
+ < 883200000 795000 237 >,
+ < 960000000 805000 260 >,
+ < 1036800000 815000 282 >,
+ < 1113600000 825000 306 >,
+ < 1190400000 835000 330 >,
+ < 1267200000 845000 354 >,
+ < 1344000000 855000 378 >,
+ < 1420800000 865000 404 >,
+ < 1497600000 875000 431 >,
+ < 1574400000 885000 458 >,
+ < 1651200000 895000 486 >,
< 1728000000 905000 515 >,
< 1804800000 920000 543 >,
< 1881600000 935000 572 >,
@@ -888,19 +888,19 @@
< 576000000 775000 150 >,
< 652800000 775000 171 >,
< 729600000 775000 193 >,
- < 806400000 775000 215 >,
- < 883200000 775000 237 >,
- < 960000000 775000 260 >,
- < 1036800000 780000 282 >,
- < 1113600000 790000 306 >,
- < 1190400000 800000 330 >,
- < 1267200000 810000 354 >,
- < 1344000000 820000 378 >,
- < 1420800000 835000 404 >,
- < 1497600000 850000 431 >,
- < 1574400000 865000 458 >,
- < 1651200000 880000 486 >,
- < 1728000000 895000 515 >,
+ < 806400000 780000 215 >,
+ < 883200000 790000 237 >,
+ < 960000000 800000 260 >,
+ < 1036800000 810000 282 >,
+ < 1113600000 820000 306 >,
+ < 1190400000 830000 330 >,
+ < 1267200000 840000 354 >,
+ < 1344000000 850000 378 >,
+ < 1420800000 860000 404 >,
+ < 1497600000 870000 431 >,
+ < 1574400000 880000 458 >,
+ < 1651200000 890000 486 >,
+ < 1728000000 900000 515 >,
< 1804800000 910000 543 >,
< 1881600000 925000 572 >,
< 1958400000 940000 604 >,
@@ -920,19 +920,19 @@
< 652800000 775000 171 >,
< 729600000 775000 193 >,
< 806400000 775000 215 >,
- < 883200000 775000 237 >,
- < 960000000 775000 260 >,
- < 1036800000 775000 282 >,
- < 1113600000 780000 306 >,
- < 1190400000 790000 330 >,
- < 1267200000 800000 354 >,
- < 1344000000 810000 378 >,
- < 1420800000 825000 404 >,
- < 1497600000 840000 431 >,
- < 1574400000 855000 458 >,
- < 1651200000 870000 486 >,
- < 1728000000 885000 515 >,
- < 1804800000 900000 543 >,
+ < 883200000 785000 237 >,
+ < 960000000 795000 260 >,
+ < 1036800000 805000 282 >,
+ < 1113600000 815000 306 >,
+ < 1190400000 825000 330 >,
+ < 1267200000 835000 354 >,
+ < 1344000000 845000 378 >,
+ < 1420800000 855000 404 >,
+ < 1497600000 865000 431 >,
+ < 1574400000 875000 458 >,
+ < 1651200000 885000 486 >,
+ < 1728000000 895000 515 >,
+ < 1804800000 905000 543 >,
< 1881600000 915000 572 >,
< 1958400000 930000 604 >,
< 2035200000 945000 636 >,
@@ -949,22 +949,22 @@
< 499200000 750000 129 >,
< 576000000 750000 150 >,
< 652800000 750000 171 >,
- < 729600000 750000 193 >,
- < 806400000 750000 215 >,
- < 883200000 750000 237 >,
- < 960000000 750000 260 >,
- < 1036800000 760000 282 >,
- < 1113600000 770000 306 >,
- < 1190400000 780000 330 >,
- < 1267200000 790000 354 >,
- < 1344000000 800000 378 >,
- < 1420800000 815000 404 >,
- < 1497600000 830000 431 >,
- < 1574400000 845000 458 >,
- < 1651200000 860000 486 >,
- < 1728000000 875000 515 >,
- < 1804800000 890000 543 >,
- < 1881600000 905000 572 >,
+ < 729600000 760000 193 >,
+ < 806400000 770000 215 >,
+ < 883200000 780000 237 >,
+ < 960000000 790000 260 >,
+ < 1036800000 800000 282 >,
+ < 1113600000 810000 306 >,
+ < 1190400000 820000 330 >,
+ < 1267200000 830000 354 >,
+ < 1344000000 840000 378 >,
+ < 1420800000 850000 404 >,
+ < 1497600000 860000 431 >,
+ < 1574400000 870000 458 >,
+ < 1651200000 880000 486 >,
+ < 1728000000 890000 515 >,
+ < 1804800000 900000 543 >,
+ < 1881600000 910000 572 >,
< 1958400000 920000 604 >,
< 2035200000 935000 636 >,
< 2112000000 950000 669 >,
@@ -980,23 +980,23 @@
< 499200000 750000 129 >,
< 576000000 750000 150 >,
< 652800000 750000 171 >,
- < 729600000 750000 193 >,
- < 806400000 750000 215 >,
- < 883200000 750000 237 >,
- < 960000000 750000 260 >,
- < 1036800000 750000 282 >,
- < 1113600000 760000 306 >,
- < 1190400000 770000 330 >,
- < 1267200000 780000 354 >,
- < 1344000000 790000 378 >,
- < 1420800000 805000 404 >,
- < 1497600000 820000 431 >,
- < 1574400000 835000 458 >,
- < 1651200000 850000 486 >,
- < 1728000000 865000 515 >,
- < 1804800000 880000 543 >,
- < 1881600000 895000 572 >,
- < 1958400000 910000 604 >,
+ < 729600000 755000 193 >,
+ < 806400000 765000 215 >,
+ < 883200000 775000 237 >,
+ < 960000000 785000 260 >,
+ < 1036800000 795000 282 >,
+ < 1113600000 805000 306 >,
+ < 1190400000 815000 330 >,
+ < 1267200000 825000 354 >,
+ < 1344000000 835000 378 >,
+ < 1420800000 845000 404 >,
+ < 1497600000 855000 431 >,
+ < 1574400000 865000 458 >,
+ < 1651200000 875000 486 >,
+ < 1728000000 885000 515 >,
+ < 1804800000 895000 543 >,
+ < 1881600000 905000 572 >,
+ < 1958400000 915000 604 >,
< 2035200000 925000 636 >,
< 2112000000 940000 669 >,
< 2150400000 955000 703 >,
@@ -1249,18 +1249,18 @@
< 499200000 775000 126 >,
< 576000000 775000 147 >,
< 652800000 775000 168 >,
- < 729600000 775000 189 >,
- < 806400000 780000 211 >,
- < 883200000 790000 233 >,
- < 960000000 800000 256 >,
- < 1036800000 810000 278 >,
- < 1113600000 820000 301 >,
- < 1190400000 830000 324 >,
- < 1267200000 840000 348 >,
- < 1344000000 850000 372 >,
- < 1420800000 860000 396 >,
- < 1497600000 870000 421 >,
- < 1574400000 880000 446 >,
+ < 729600000 780000 189 >,
+ < 806400000 785000 211 >,
+ < 883200000 795000 233 >,
+ < 960000000 805000 256 >,
+ < 1036800000 815000 278 >,
+ < 1113600000 825000 301 >,
+ < 1190400000 835000 324 >,
+ < 1267200000 845000 348 >,
+ < 1344000000 855000 372 >,
+ < 1420800000 865000 396 >,
+ < 1497600000 875000 421 >,
+ < 1574400000 885000 446 >,
< 1651200000 895000 473 >,
< 1728000000 910000 501 >,
< 1804800000 925000 529 >,
@@ -1284,17 +1284,17 @@
< 576000000 775000 147 >,
< 652800000 775000 168 >,
< 729600000 775000 189 >,
- < 806400000 775000 211 >,
- < 883200000 780000 233 >,
- < 960000000 790000 256 >,
- < 1036800000 800000 278 >,
- < 1113600000 810000 301 >,
- < 1190400000 820000 324 >,
- < 1267200000 830000 348 >,
- < 1344000000 840000 372 >,
- < 1420800000 850000 396 >,
- < 1497600000 860000 421 >,
- < 1574400000 870000 446 >,
+ < 806400000 780000 211 >,
+ < 883200000 785000 233 >,
+ < 960000000 795000 256 >,
+ < 1036800000 805000 278 >,
+ < 1113600000 815000 301 >,
+ < 1190400000 825000 324 >,
+ < 1267200000 835000 348 >,
+ < 1344000000 845000 372 >,
+ < 1420800000 855000 396 >,
+ < 1497600000 865000 421 >,
+ < 1574400000 875000 446 >,
< 1651200000 885000 473 >,
< 1728000000 900000 501 >,
< 1804800000 915000 529 >,
@@ -1319,17 +1319,17 @@
< 652800000 775000 168 >,
< 729600000 775000 189 >,
< 806400000 775000 211 >,
- < 883200000 775000 233 >,
- < 960000000 780000 256 >,
- < 1036800000 790000 278 >,
- < 1113600000 800000 301 >,
- < 1190400000 810000 324 >,
- < 1267200000 820000 348 >,
- < 1344000000 830000 372 >,
- < 1420800000 840000 396 >,
- < 1497600000 850000 421 >,
- < 1574400000 860000 446 >,
- < 1651200000 875000 473 >,
+ < 883200000 780000 233 >,
+ < 960000000 790000 256 >,
+ < 1036800000 800000 278 >,
+ < 1113600000 810000 301 >,
+ < 1190400000 820000 324 >,
+ < 1267200000 830000 348 >,
+ < 1344000000 840000 372 >,
+ < 1420800000 850000 396 >,
+ < 1497600000 860000 421 >,
+ < 1574400000 870000 446 >,
+ < 1651200000 880000 473 >,
< 1728000000 890000 501 >,
< 1804800000 905000 529 >,
< 1881600000 920000 558 >,
@@ -1353,18 +1353,18 @@
< 652800000 775000 168 >,
< 729600000 775000 189 >,
< 806400000 775000 211 >,
- < 883200000 775000 233 >,
- < 960000000 775000 256 >,
- < 1036800000 780000 278 >,
- < 1113600000 790000 301 >,
- < 1190400000 800000 324 >,
- < 1267200000 810000 348 >,
- < 1344000000 820000 372 >,
- < 1420800000 830000 396 >,
- < 1497600000 840000 421 >,
- < 1574400000 850000 446 >,
- < 1651200000 865000 473 >,
- < 1728000000 880000 501 >,
+ < 883200000 780000 233 >,
+ < 960000000 785000 256 >,
+ < 1036800000 795000 278 >,
+ < 1113600000 805000 301 >,
+ < 1190400000 815000 324 >,
+ < 1267200000 825000 348 >,
+ < 1344000000 835000 372 >,
+ < 1420800000 845000 396 >,
+ < 1497600000 855000 421 >,
+ < 1574400000 865000 446 >,
+ < 1651200000 875000 473 >,
+ < 1728000000 885000 501 >,
< 1804800000 895000 529 >,
< 1881600000 910000 558 >,
< 1958400000 925000 588 >,
@@ -1388,18 +1388,18 @@
< 729600000 775000 189 >,
< 806400000 775000 211 >,
< 883200000 775000 233 >,
- < 960000000 775000 256 >,
- < 1036800000 775000 278 >,
- < 1113600000 780000 301 >,
- < 1190400000 790000 324 >,
- < 1267200000 800000 348 >,
- < 1344000000 810000 372 >,
- < 1420800000 820000 396 >,
- < 1497600000 830000 421 >,
- < 1574400000 840000 446 >,
- < 1651200000 855000 473 >,
- < 1728000000 870000 501 >,
- < 1804800000 885000 529 >,
+ < 960000000 780000 256 >,
+ < 1036800000 790000 278 >,
+ < 1113600000 800000 301 >,
+ < 1190400000 810000 324 >,
+ < 1267200000 820000 348 >,
+ < 1344000000 830000 372 >,
+ < 1420800000 840000 396 >,
+ < 1497600000 850000 421 >,
+ < 1574400000 860000 446 >,
+ < 1651200000 870000 473 >,
+ < 1728000000 880000 501 >,
+ < 1804800000 890000 529 >,
< 1881600000 900000 558 >,
< 1958400000 915000 588 >,
< 2035200000 930000 617 >,
@@ -1422,19 +1422,19 @@
< 729600000 775000 189 >,
< 806400000 775000 211 >,
< 883200000 775000 233 >,
- < 960000000 775000 256 >,
- < 1036800000 775000 278 >,
- < 1113600000 775000 301 >,
- < 1190400000 780000 324 >,
- < 1267200000 790000 348 >,
- < 1344000000 800000 372 >,
- < 1420800000 810000 396 >,
- < 1497600000 820000 421 >,
- < 1574400000 830000 446 >,
- < 1651200000 845000 473 >,
- < 1728000000 860000 501 >,
- < 1804800000 875000 529 >,
- < 1881600000 890000 558 >,
+ < 960000000 780000 256 >,
+ < 1036800000 785000 278 >,
+ < 1113600000 795000 301 >,
+ < 1190400000 805000 324 >,
+ < 1267200000 815000 348 >,
+ < 1344000000 825000 372 >,
+ < 1420800000 835000 396 >,
+ < 1497600000 845000 421 >,
+ < 1574400000 855000 446 >,
+ < 1651200000 865000 473 >,
+ < 1728000000 875000 501 >,
+ < 1804800000 885000 529 >,
+ < 1881600000 895000 558 >,
< 1958400000 905000 588 >,
< 2035200000 920000 617 >,
< 2112000000 935000 649 >,
@@ -1457,19 +1457,19 @@
< 806400000 775000 211 >,
< 883200000 775000 233 >,
< 960000000 775000 256 >,
- < 1036800000 775000 278 >,
- < 1113600000 775000 301 >,
- < 1190400000 775000 324 >,
- < 1267200000 780000 348 >,
- < 1344000000 790000 372 >,
- < 1420800000 800000 396 >,
- < 1497600000 810000 421 >,
- < 1574400000 820000 446 >,
- < 1651200000 835000 473 >,
- < 1728000000 850000 501 >,
- < 1804800000 865000 529 >,
- < 1881600000 880000 558 >,
- < 1958400000 895000 588 >,
+ < 1036800000 780000 278 >,
+ < 1113600000 790000 301 >,
+ < 1190400000 800000 324 >,
+ < 1267200000 810000 348 >,
+ < 1344000000 820000 372 >,
+ < 1420800000 830000 396 >,
+ < 1497600000 840000 421 >,
+ < 1574400000 850000 446 >,
+ < 1651200000 860000 473 >,
+ < 1728000000 870000 501 >,
+ < 1804800000 880000 529 >,
+ < 1881600000 890000 558 >,
+ < 1958400000 900000 588 >,
< 2035200000 910000 617 >,
< 2112000000 925000 649 >,
< 2150400000 940000 682 >,
@@ -1489,22 +1489,22 @@
< 652800000 750000 168 >,
< 729600000 750000 189 >,
< 806400000 750000 211 >,
- < 883200000 750000 233 >,
- < 960000000 750000 256 >,
- < 1036800000 750000 278 >,
- < 1113600000 750000 301 >,
- < 1190400000 760000 324 >,
- < 1267200000 770000 348 >,
- < 1344000000 780000 372 >,
- < 1420800000 790000 396 >,
- < 1497600000 800000 421 >,
- < 1574400000 810000 446 >,
- < 1651200000 825000 473 >,
- < 1728000000 840000 501 >,
- < 1804800000 855000 529 >,
- < 1881600000 870000 558 >,
- < 1958400000 885000 588 >,
- < 2035200000 900000 617 >,
+ < 883200000 755000 233 >,
+ < 960000000 765000 256 >,
+ < 1036800000 775000 278 >,
+ < 1113600000 785000 301 >,
+ < 1190400000 795000 324 >,
+ < 1267200000 805000 348 >,
+ < 1344000000 815000 372 >,
+ < 1420800000 825000 396 >,
+ < 1497600000 835000 421 >,
+ < 1574400000 845000 446 >,
+ < 1651200000 855000 473 >,
+ < 1728000000 865000 501 >,
+ < 1804800000 875000 529 >,
+ < 1881600000 885000 558 >,
+ < 1958400000 895000 588 >,
+ < 2035200000 905000 617 >,
< 2112000000 915000 649 >,
< 2150400000 930000 682 >,
< 2188800000 930000 682 >,
@@ -1523,23 +1523,23 @@
< 652800000 750000 168 >,
< 729600000 750000 189 >,
< 806400000 750000 211 >,
- < 883200000 750000 233 >,
- < 960000000 750000 256 >,
- < 1036800000 750000 278 >,
- < 1113600000 750000 301 >,
- < 1190400000 750000 324 >,
- < 1267200000 760000 348 >,
- < 1344000000 770000 372 >,
- < 1420800000 780000 396 >,
- < 1497600000 790000 421 >,
- < 1574400000 800000 446 >,
- < 1651200000 815000 473 >,
- < 1728000000 830000 501 >,
- < 1804800000 845000 529 >,
- < 1881600000 860000 558 >,
- < 1958400000 875000 588 >,
- < 2035200000 890000 617 >,
- < 2112000000 905000 649 >,
+ < 883200000 755000 233 >,
+ < 960000000 760000 256 >,
+ < 1036800000 770000 278 >,
+ < 1113600000 780000 301 >,
+ < 1190400000 790000 324 >,
+ < 1267200000 800000 348 >,
+ < 1344000000 810000 372 >,
+ < 1420800000 820000 396 >,
+ < 1497600000 830000 421 >,
+ < 1574400000 840000 446 >,
+ < 1651200000 850000 473 >,
+ < 1728000000 860000 501 >,
+ < 1804800000 870000 529 >,
+ < 1881600000 880000 558 >,
+ < 1958400000 890000 588 >,
+ < 2035200000 900000 617 >,
+ < 2112000000 910000 649 >,
< 2150400000 920000 682 >,
< 2188800000 920000 682 >,
< 2265600000 935000 716 >,
@@ -1548,25 +1548,6 @@
< 2457600000 970000 802 >;
};
- qcom,msm-cpufreq@0 {
- qcom,cpufreq-table =
- < 300000 300000 300 /* 37.5 MHz */ >,
- < 422400 422400 300 /* 37.5 MHz */ >,
- < 652800 499200 300 /* 37.5 MHz */ >,
- < 729600 576000 300 /* 37.5 MHz */ >,
- < 883200 576000 300 /* 37.5 MHz */ >,
- < 960000 960000 300 /* 37.5 MHz */ >,
- < 1036800 1036800 300 /* 37.5 MHz */ >,
- < 1190400 1036800 300 /* 37.5 MHz */ >,
- < 1267200 1267200 300 /* 37.5 MHz */ >,
- < 1497600 1497600 300 /* 37.5 MHz */ >,
- < 1574400 1574400 300 /* 37.5 MHz */ >,
- < 1728000 1651200 300 /* 37.5 MHz */ >,
- < 1958400 1728000 300 /* 37.5 MHz */ >,
- < 2265600 1728000 300 /* 37.5 MHz */ >,
- < 2496000 1728000 300 /* 37.5 MHz */ >;
- };
-
i2c@f9928000 { /* BLSP-1 QUP-6 */
cell-index = <3>;
compatible = "qcom,i2c-qup";
@@ -1635,42 +1616,42 @@
reg = <0>;
qcom,gpu-freq = <578000000>;
qcom,bus-freq = <14>;
- qcom,io-fraction = <33>;
+ qcom,io-fraction = <101>;
};
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <462400000>;
qcom,bus-freq = <11>;
- qcom,io-fraction = <66>;
+ qcom,io-fraction = <101>;
};
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <389000000>;
qcom,bus-freq = <8>;
- qcom,io-fraction = <66>;
+ qcom,io-fraction = <101>;
};
qcom,gpu-pwrlevel@3 {
reg = <3>;
- qcom,gpu-freq = <320000000>;
+ qcom,gpu-freq = <330000000>;
qcom,bus-freq = <5>;
- qcom,io-fraction = <100>;
+ qcom,io-fraction = <101>;
};
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <200000000>;
qcom,bus-freq = <2>;
- qcom,io-fraction = <100>;
+ qcom,io-fraction = <101>;
};
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-freq = <27000000>;
qcom,bus-freq = <0>;
- qcom,io-fraction = <0>;
+ qcom,io-fraction = <101>;
};
};
};
@@ -1720,7 +1701,7 @@
qcom,dec-ocmem-ab-ib = <0 0>,
<176000 519000>,
<456000 519000>,
- <864000 519000>,
+ <864000 629000>,
<1728000 1038000>,
<2766000 1661000>,
<3456000 2076000>,
@@ -1770,3 +1751,7 @@
qcom,memblock-remove = <0x05a00000 0x7800000
0x0fa00000 0x500000>; /* Address and size of the hole */
};
+
+&gdsc_venus {
+ qcom,skip-logic-collapse;
+};
diff --git a/arch/arm/configs/apq8084_defconfig b/arch/arm/configs/apq8084_defconfig
index 968a5ee..823e4f8 100644
--- a/arch/arm/configs/apq8084_defconfig
+++ b/arch/arm/configs/apq8084_defconfig
@@ -301,6 +301,11 @@
# CONFIG_LCD_CLASS_DEVICE is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=y
# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_UHID=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_MAGICMOUSE=y
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_ELECOM=y
CONFIG_USB=y
CONFIG_USB_SUSPEND=y
CONFIG_USB_EHCI_HCD=y
diff --git a/arch/arm/configs/msm8226-perf_defconfig b/arch/arm/configs/msm8226-perf_defconfig
index c13f18f..18402ad 100644
--- a/arch/arm/configs/msm8226-perf_defconfig
+++ b/arch/arm/configs/msm8226-perf_defconfig
@@ -251,6 +251,7 @@
CONFIG_WCNSS_CORE=y
CONFIG_WCNSS_CORE_PRONTO=y
CONFIG_WCNSS_MEM_PRE_ALLOC=y
+CONFIG_WCNSS_REGISTER_DUMP_ON_BITE=y
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
CONFIG_KEYBOARD_GPIO=y
@@ -261,6 +262,10 @@
CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y
CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_RMI4_DEV=y
CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE=y
+CONFIG_TOUCHSCREEN_GT9XX=y
+CONFIG_GT9XX_TOUCHPANEL_DRIVER=y
+CONFIG_GT9XX_TOUCHPANEL_UPDATE=y
+CONFIG_GT9XX_TOUCHPANEL_DEBUG=y
CONFIG_TOUCHSCREEN_FT5X06=y
CONFIG_TOUCHSCREEN_GEN_VKEYS=y
CONFIG_INPUT_MISC=y
@@ -349,6 +354,8 @@
CONFIG_UHID=y
CONFIG_HID_APPLE=y
CONFIG_HID_MAGICMOUSE=y
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_ELECOM=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_SUSPEND=y
CONFIG_USB_MON=y
@@ -357,6 +364,7 @@
CONFIG_USB_EHCI_MSM=y
CONFIG_USB_EHCI_MSM_HSIC=y
CONFIG_USB_ACM=y
+CONFIG_USB_CCID_BRIDGE=y
CONFIG_USB_STORAGE=y
CONFIG_USB_STORAGE_DATAFAB=y
CONFIG_USB_STORAGE_FREECOM=y
@@ -456,8 +464,6 @@
CONFIG_MOBICORE_SUPPORT=m
CONFIG_MOBICORE_API=m
CONFIG_MSM_RPM_RBCPR_STATS_V2_LOG=y
-CONFIG_TOUCHSCREEN_GT9XX=y
-CONFIG_GT9XX_TOUCHPANEL_DRIVER=y
CONFIG_MSM_RDBG=m
CONFIG_DEVMEM=n
CONFIG_DEVKMEM=n
diff --git a/arch/arm/configs/msm8226_defconfig b/arch/arm/configs/msm8226_defconfig
index cedb6dc..bfe05c0 100644
--- a/arch/arm/configs/msm8226_defconfig
+++ b/arch/arm/configs/msm8226_defconfig
@@ -251,6 +251,7 @@
CONFIG_WCNSS_CORE=y
CONFIG_WCNSS_CORE_PRONTO=y
CONFIG_WCNSS_MEM_PRE_ALLOC=y
+CONFIG_WCNSS_REGISTER_DUMP_ON_BITE=y
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
CONFIG_KEYBOARD_GPIO=y
@@ -261,6 +262,10 @@
CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y
CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_RMI4_DEV=y
CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE=y
+CONFIG_TOUCHSCREEN_GT9XX=y
+CONFIG_GT9XX_TOUCHPANEL_DRIVER=y
+CONFIG_GT9XX_TOUCHPANEL_UPDATE=y
+CONFIG_GT9XX_TOUCHPANEL_DEBUG=y
CONFIG_TOUCHSCREEN_FT5X06=y
CONFIG_TOUCHSCREEN_GEN_VKEYS=y
CONFIG_INPUT_MISC=y
@@ -373,6 +378,8 @@
CONFIG_UHID=y
CONFIG_HID_APPLE=y
CONFIG_HID_MAGICMOUSE=y
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_ELECOM=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_SUSPEND=y
CONFIG_USB_MON=y
@@ -381,6 +388,7 @@
CONFIG_USB_EHCI_MSM=y
CONFIG_USB_EHCI_MSM_HSIC=y
CONFIG_USB_ACM=y
+CONFIG_USB_CCID_BRIDGE=y
CONFIG_USB_STORAGE=y
CONFIG_USB_STORAGE_DATAFAB=y
CONFIG_USB_STORAGE_FREECOM=y
@@ -509,6 +517,4 @@
CONFIG_MOBICORE_SUPPORT=m
CONFIG_MOBICORE_API=m
CONFIG_MSM_RPM_RBCPR_STATS_V2_LOG=y
-CONFIG_TOUCHSCREEN_GT9XX=y
-CONFIG_GT9XX_TOUCHPANEL_DRIVER=y
CONFIG_MSM_RDBG=m
diff --git a/arch/arm/configs/msm8610-perf_defconfig b/arch/arm/configs/msm8610-perf_defconfig
index bd135b3..c7abf42 100644
--- a/arch/arm/configs/msm8610-perf_defconfig
+++ b/arch/arm/configs/msm8610-perf_defconfig
@@ -223,6 +223,9 @@
CONFIG_WCNSS_CORE=y
CONFIG_WCNSS_CORE_PRONTO=y
CONFIG_WCNSS_MEM_PRE_ALLOC=y
+CONFIG_WCNSS_REGISTER_DUMP_ON_BITE=y
+# CONFIG_INPUT_MOUSEDEV is not set
+>>>>>>> 3e5f4f6... defconfig: Enable WCNSS register dump on WCNSS bite
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
CONFIG_KEYBOARD_GPIO=y
@@ -235,6 +238,8 @@
CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE=y
CONFIG_TOUCHSCREEN_GT9XX=y
CONFIG_GT9XX_TOUCHPANEL_DRIVER=y
+CONFIG_GT9XX_TOUCHPANEL_UPDATE=y
+CONFIG_GT9XX_TOUCHPANEL_DEBUG=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=y
CONFIG_INPUT_GPIO=m
@@ -328,6 +333,8 @@
CONFIG_UHID=y
CONFIG_HID_APPLE=y
CONFIG_HID_MAGICMOUSE=y
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_ELECOM=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DEBUG_FILES=y
CONFIG_USB_GADGET_DEBUG_FS=y
diff --git a/arch/arm/configs/msm8610_defconfig b/arch/arm/configs/msm8610_defconfig
index f6ef804..fe84f96 100644
--- a/arch/arm/configs/msm8610_defconfig
+++ b/arch/arm/configs/msm8610_defconfig
@@ -224,6 +224,9 @@
CONFIG_WCNSS_CORE=y
CONFIG_WCNSS_CORE_PRONTO=y
CONFIG_WCNSS_MEM_PRE_ALLOC=y
+CONFIG_WCNSS_REGISTER_DUMP_ON_BITE=y
+# CONFIG_INPUT_MOUSEDEV is not set
+>>>>>>> 3e5f4f6... defconfig: Enable WCNSS register dump on WCNSS bite
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
CONFIG_KEYBOARD_GPIO=y
@@ -236,6 +239,8 @@
CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE=y
CONFIG_TOUCHSCREEN_GT9XX=y
CONFIG_GT9XX_TOUCHPANEL_DRIVER=y
+CONFIG_GT9XX_TOUCHPANEL_UPDATE=y
+CONFIG_GT9XX_TOUCHPANEL_DEBUG=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=y
CONFIG_INPUT_GPIO=m
@@ -350,6 +355,8 @@
CONFIG_UHID=y
CONFIG_HID_APPLE=y
CONFIG_HID_MAGICMOUSE=y
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_ELECOM=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DEBUG_FILES=y
CONFIG_USB_GADGET_DEBUG_FS=y
diff --git a/arch/arm/configs/msm8974-perf_defconfig b/arch/arm/configs/msm8974-perf_defconfig
index d442371..5904aea 100755
--- a/arch/arm/configs/msm8974-perf_defconfig
+++ b/arch/arm/configs/msm8974-perf_defconfig
@@ -283,6 +283,7 @@
CONFIG_WCNSS_CORE=y
CONFIG_WCNSS_CORE_PRONTO=y
CONFIG_WCNSS_MEM_PRE_ALLOC=y
+CONFIG_WCNSS_REGISTER_DUMP_ON_BITE=y
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
CONFIG_KEYBOARD_GPIO=y
@@ -390,6 +391,7 @@
CONFIG_HID_APPLE=y
CONFIG_HID_MAGICMOUSE=y
CONFIG_HID_MICROSOFT=y
+CONFIG_HID_ELECOM=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_SUSPEND=y
CONFIG_USB_XHCI_HCD=y
diff --git a/arch/arm/configs/msm8974_defconfig b/arch/arm/configs/msm8974_defconfig
index 3e3f6a8..1f7eb49 100755
--- a/arch/arm/configs/msm8974_defconfig
+++ b/arch/arm/configs/msm8974_defconfig
@@ -289,6 +289,7 @@
CONFIG_WCNSS_CORE=y
CONFIG_WCNSS_CORE_PRONTO=y
CONFIG_WCNSS_MEM_PRE_ALLOC=y
+CONFIG_WCNSS_REGISTER_DUMP_ON_BITE=y
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
CONFIG_KEYBOARD_GPIO=y
@@ -396,6 +397,7 @@
CONFIG_HID_APPLE=y
CONFIG_HID_MAGICMOUSE=y
CONFIG_HID_MICROSOFT=y
+CONFIG_HID_ELECOM=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_SUSPEND=y
CONFIG_USB_XHCI_HCD=y
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
index e1fc42f..d3e2eb6 100644
--- a/arch/arm/include/asm/pmu.h
+++ b/arch/arm/include/asm/pmu.h
@@ -141,6 +141,8 @@
struct pmu_hw_events *(*get_hw_events)(void);
int (*test_set_event_constraints)(struct perf_event *event);
int (*clear_event_constraints)(struct perf_event *event);
+ void (*save_pm_registers)(void *hcpu);
+ void (*restore_pm_registers)(void *hcpu);
};
#define to_arm_pmu(p) (container_of(p, struct arm_pmu, pmu))
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index 2eb0c2c..7013a5c 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -148,6 +148,7 @@
#define TIF_NOTIFY_RESUME 2 /* callback before returning to user */
#define TIF_SYSCALL_TRACE 8
#define TIF_SYSCALL_AUDIT 9
+#define TIF_SYSCALL_RESTARTSYS 10
#define TIF_POLLING_NRFLAG 16
#define TIF_USING_IWMMXT 17
#define TIF_MEMDIE 18 /* is terminating due to OOM killer */
@@ -163,9 +164,11 @@
#define _TIF_USING_IWMMXT (1 << TIF_USING_IWMMXT)
#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK)
#define _TIF_SECCOMP (1 << TIF_SECCOMP)
+#define _TIF_SYSCALL_RESTARTSYS (1 << TIF_SYSCALL_RESTARTSYS)
/* Checks for any syscall work in entry-common.S */
-#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT)
+#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \
+ _TIF_SYSCALL_RESTARTSYS)
/*
* Change these and you break ASM code in entry-common.S
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 2a3ab6e..7814288 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -197,6 +197,9 @@
struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
u64 delta, prev_raw_count, new_raw_count;
+ if (event->state <= PERF_EVENT_STATE_OFF)
+ return 0;
+
again:
prev_raw_count = local64_read(&hwc->prev_count);
new_raw_count = armpmu->read_counter(idx);
@@ -425,15 +428,37 @@
return err;
}
-void
+#ifdef CONFIG_SMP
+static __ref int armpmu_cpu_up(int cpu)
+{
+ int ret = 0;
+
+ if (!cpumask_test_cpu(cpu, cpu_online_mask)) {
+ ret = cpu_up(cpu);
+ if (ret)
+ pr_err("Failed to bring up CPU: %d, ret: %d\n",
+ cpu, ret);
+ }
+ return ret;
+}
+#else
+static inline int armpmu_cpu_up(int cpu)
+{
+ return 0;
+}
+#endif
+
+void __ref
multicore_free_irq(int irq)
{
int cpu;
+ struct irq_desc *desc = irq_to_desc(irq);
if (irq >= 0) {
- for_each_cpu(cpu, cpu_online_mask) {
- smp_call_function_single(cpu,
- disable_irq_callback, &irq, 1);
+ for_each_cpu(cpu, desc->percpu_enabled) {
+ if (!armpmu_cpu_up(cpu))
+ smp_call_function_single(cpu,
+ disable_irq_callback, &irq, 1);
}
free_percpu_irq(irq, &pmu_irq_cookie);
}
@@ -716,6 +741,7 @@
armpmu->pmu.start = armpmu_start;
armpmu->pmu.stop = armpmu_stop;
armpmu->pmu.read = armpmu_read;
+ armpmu->pmu.events_across_hotplug = 1;
}
int armpmu_register(struct arm_pmu *armpmu, char *name, int type)
@@ -826,62 +852,6 @@
return 0;
}
-/*
- * PMU hardware loses all context when a CPU goes offline.
- * When a CPU is hotplugged back in, since some hardware registers are
- * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
- * junk values out of them.
- */
-static int __cpuinit pmu_cpu_notify(struct notifier_block *b,
- unsigned long action, void *hcpu)
-{
- int irq;
-
- if (cpu_has_active_perf((int)hcpu)) {
- switch ((action & ~CPU_TASKS_FROZEN)) {
-
- case CPU_DOWN_PREPARE:
- /*
- * If this is on a multicore CPU, we need
- * to disarm the PMU IRQ before disappearing.
- */
- if (cpu_pmu &&
- cpu_pmu->plat_device->dev.platform_data) {
- irq = platform_get_irq(cpu_pmu->plat_device, 0);
- smp_call_function_single((int)hcpu,
- disable_irq_callback, &irq, 1);
- }
- return NOTIFY_DONE;
-
- case CPU_UP_PREPARE:
- /*
- * If this is on a multicore CPU, we need
- * to arm the PMU IRQ before appearing.
- */
- if (cpu_pmu &&
- cpu_pmu->plat_device->dev.platform_data) {
- irq = platform_get_irq(cpu_pmu->plat_device, 0);
- smp_call_function_single((int)hcpu,
- enable_irq_callback, &irq, 1);
- }
- return NOTIFY_DONE;
-
- case CPU_STARTING:
- if (cpu_pmu && cpu_pmu->reset) {
- cpu_pmu->reset(NULL);
- return NOTIFY_OK;
- }
- default:
- return NOTIFY_DONE;
- }
- }
-
- if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
- return NOTIFY_DONE;
-
- return NOTIFY_OK;
-}
-
static void armpmu_update_counters(void)
{
struct pmu_hw_events *hw_events;
@@ -902,6 +872,79 @@
}
}
+/*
+ * PMU hardware loses all context when a CPU goes offline.
+ * When a CPU is hotplugged back in, since some hardware registers are
+ * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
+ * junk values out of them.
+ */
+static int __cpuinit pmu_cpu_notify(struct notifier_block *b,
+ unsigned long action, void *hcpu)
+{
+ int irq;
+ struct pmu *pmu;
+ int cpu = (int)hcpu;
+
+ switch ((action & ~CPU_TASKS_FROZEN)) {
+ case CPU_DOWN_PREPARE:
+ if (cpu_pmu && cpu_pmu->save_pm_registers)
+ smp_call_function_single(cpu,
+ cpu_pmu->save_pm_registers,
+ hcpu, 1);
+ break;
+ case CPU_STARTING:
+ if (cpu_pmu && cpu_pmu->restore_pm_registers)
+ smp_call_function_single(cpu,
+ cpu_pmu->restore_pm_registers,
+ hcpu, 1);
+ }
+
+ if (cpu_has_active_perf((int)hcpu)) {
+ switch ((action & ~CPU_TASKS_FROZEN)) {
+
+ case CPU_DOWN_PREPARE:
+ armpmu_update_counters();
+ /*
+ * If this is on a multicore CPU, we need
+ * to disarm the PMU IRQ before disappearing.
+ */
+ if (cpu_pmu &&
+ cpu_pmu->plat_device->dev.platform_data) {
+ irq = platform_get_irq(cpu_pmu->plat_device, 0);
+ smp_call_function_single((int)hcpu,
+ disable_irq_callback, &irq, 1);
+ }
+ return NOTIFY_DONE;
+
+ case CPU_STARTING:
+ /*
+ * If this is on a multicore CPU, we need
+ * to arm the PMU IRQ before appearing.
+ */
+ if (cpu_pmu &&
+ cpu_pmu->plat_device->dev.platform_data) {
+ irq = platform_get_irq(cpu_pmu->plat_device, 0);
+ enable_irq_callback(&irq);
+ }
+
+ if (cpu_pmu && cpu_pmu->reset) {
+ __get_cpu_var(from_idle) = 1;
+ cpu_pmu->reset(NULL);
+ pmu = &cpu_pmu->pmu;
+ pmu->pmu_enable(pmu);
+ return NOTIFY_OK;
+ }
+ default:
+ return NOTIFY_DONE;
+ }
+ }
+
+ if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
+ return NOTIFY_DONE;
+
+ return NOTIFY_OK;
+}
+
static struct notifier_block __cpuinitdata pmu_cpu_notifier = {
.notifier_call = pmu_cpu_notify,
};
@@ -913,6 +956,8 @@
struct pmu *pmu;
switch (cmd) {
case CPU_PM_ENTER:
+ if (cpu_pmu && cpu_pmu->save_pm_registers)
+ cpu_pmu->save_pm_registers((void *)smp_processor_id());
if (cpu_has_active_perf((int)v)) {
armpmu_update_counters();
pmu = &cpu_pmu->pmu;
@@ -922,6 +967,9 @@
case CPU_PM_ENTER_FAILED:
case CPU_PM_EXIT:
+ if (cpu_pmu && cpu_pmu->restore_pm_registers)
+ cpu_pmu->restore_pm_registers(
+ (void *)smp_processor_id());
if (cpu_has_active_perf((int)v) && cpu_pmu->reset) {
/*
* Flip this bit so armpmu_enable knows it needs
diff --git a/arch/arm/kernel/perf_event_msm_krait.c b/arch/arm/kernel/perf_event_msm_krait.c
index 5708d74..1fb5fd3 100644
--- a/arch/arm/kernel/perf_event_msm_krait.c
+++ b/arch/arm/kernel/perf_event_msm_krait.c
@@ -572,6 +572,33 @@
return 1;
}
+static DEFINE_PER_CPU(u32, krait_pm_pmactlr);
+
+static void krait_save_pm_registers(void *hcpu)
+{
+ u32 val;
+ u32 cpu = (int)hcpu;
+
+ /* Read PMACTLR */
+ asm volatile("mrc p15, 0, %0, c9, c15, 5" : "=r" (val));
+ per_cpu(krait_pm_pmactlr, cpu) = val;
+
+ armv7pmu_save_pm_registers(hcpu);
+}
+
+static void krait_restore_pm_registers(void *hcpu)
+{
+ u32 val;
+ u32 cpu = (int)hcpu;
+
+ val = per_cpu(krait_pm_pmactlr, cpu);
+ if (val != 0)
+ /* Restore PMACTLR */
+ asm volatile("mcr p15, 0, %0, c9, c15, 5" : : "r" (val));
+
+ armv7pmu_restore_pm_registers(hcpu);
+}
+
static struct arm_pmu krait_pmu = {
.handle_irq = armv7pmu_handle_irq,
.enable = krait_pmu_enable_event,
@@ -585,6 +612,8 @@
.test_set_event_constraints = msm_test_set_ev_constraint,
.clear_event_constraints = msm_clear_ev_constraint,
.max_period = (1LLU << 32) - 1,
+ .save_pm_registers = krait_save_pm_registers,
+ .restore_pm_registers = krait_restore_pm_registers,
};
/* NRCCG format for perf RAW codes. */
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 58e9068..7c7a9d1 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -1238,6 +1238,29 @@
&armv7_a7_perf_cache_map, 0xFF);
}
+static DEFINE_PER_CPU(u32, armv7_pm_pmuserenr);
+
+static void armv7pmu_save_pm_registers(void *hcpu)
+{
+ u32 val;
+ u32 cpu = (int)hcpu;
+
+ /* Read PMUSERENR */
+ asm volatile("mrc p15, 0, %0, c9, c14, 0" : "=r" (val));
+ per_cpu(armv7_pm_pmuserenr, cpu) = val;
+}
+
+static void armv7pmu_restore_pm_registers(void *hcpu)
+{
+ u32 val;
+ u32 cpu = (int)hcpu;
+
+ val = per_cpu(armv7_pm_pmuserenr, cpu);
+ if (val != 0)
+ /* Restore PMUSERENR */
+ asm volatile("mcr p15, 0, %0, c9, c14, 0" : : "r" (val));
+}
+
static struct arm_pmu armv7pmu = {
.handle_irq = armv7pmu_handle_irq,
.enable = armv7pmu_enable_event,
@@ -1249,6 +1272,8 @@
.stop = armv7pmu_stop,
.reset = armv7pmu_reset,
.max_period = (1LLU << 32) - 1,
+ .save_pm_registers = armv7pmu_save_pm_registers,
+ .restore_pm_registers = armv7pmu_restore_pm_registers,
};
static u32 __init armv7_read_num_pmnc_events(void)
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index c6c6be7..6533c4b 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -24,6 +24,7 @@
#include <linux/hw_breakpoint.h>
#include <linux/regset.h>
#include <linux/audit.h>
+#include <linux/unistd.h>
#include <asm/pgtable.h>
#include <asm/traps.h>
@@ -916,6 +917,8 @@
audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0,
regs->ARM_r1, regs->ARM_r2, regs->ARM_r3);
+ if (why == 0 && test_and_clear_thread_flag(TIF_SYSCALL_RESTARTSYS))
+ scno = __NR_restart_syscall - __NR_SYSCALL_BASE;
if (!test_thread_flag(TIF_SYSCALL_TRACE))
return scno;
if (!(current->ptrace & PT_PTRACED))
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index edb73b4..7f9d4ee 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -649,12 +649,10 @@
case -ERESTARTNOHAND:
case -ERESTARTSYS:
case -ERESTARTNOINTR:
+ case -ERESTART_RESTARTBLOCK:
regs->ARM_r0 = regs->ARM_ORIG_r0;
regs->ARM_pc = restart_addr;
break;
- case -ERESTART_RESTARTBLOCK:
- regs->ARM_r0 = -EINTR;
- break;
}
}
@@ -675,12 +673,14 @@
* debugger has chosen to restart at a different PC.
*/
if (regs->ARM_pc == restart_addr) {
- if (retval == -ERESTARTNOHAND
+ if (retval == -ERESTARTNOHAND ||
+ retval == -ERESTART_RESTARTBLOCK
|| (retval == -ERESTARTSYS
&& !(ka.sa.sa_flags & SA_RESTART))) {
regs->ARM_r0 = -EINTR;
regs->ARM_pc = continue_addr;
}
+ clear_thread_flag(TIF_SYSCALL_RESTARTSYS);
}
if (test_thread_flag(TIF_RESTORE_SIGMASK))
@@ -708,38 +708,15 @@
* ignore the restart.
*/
if (retval == -ERESTART_RESTARTBLOCK
- && regs->ARM_pc == continue_addr) {
- if (thumb_mode(regs)) {
- regs->ARM_r7 = __NR_restart_syscall - __NR_SYSCALL_BASE;
- regs->ARM_pc -= 2;
- } else {
-#if defined(CONFIG_AEABI) && !defined(CONFIG_OABI_COMPAT)
- regs->ARM_r7 = __NR_restart_syscall;
- regs->ARM_pc -= 4;
-#else
- u32 __user *usp;
-
- regs->ARM_sp -= 4;
- usp = (u32 __user *)regs->ARM_sp;
-
- if (put_user(regs->ARM_pc, usp) == 0) {
- regs->ARM_pc = KERN_RESTART_CODE;
- } else {
- regs->ARM_sp += 4;
- force_sigsegv(0, current);
- }
-#endif
- }
- }
-
- /* If there's no signal to deliver, we just put the saved sigmask
- * back.
- */
- if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
- clear_thread_flag(TIF_RESTORE_SIGMASK);
- sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL);
- }
+ && regs->ARM_pc == restart_addr)
+ set_thread_flag(TIF_SYSCALL_RESTARTSYS);
}
+
+ /* If there's no signal to deliver, we just put the saved sigmask
+ * back.
+ */
+ if (test_and_clear_thread_flag(TIF_RESTORE_SIGMASK))
+ set_current_blocked(¤t->saved_sigmask);
}
asmlinkage void
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index afb924f..f2d65fe 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -261,6 +261,8 @@
select MSM_GPIOMUX
select MULTI_IRQ_HANDLER
select MSM_MULTIMEDIA_USE_ION
+ select PM_DEVFREQ
+ select MSM_DEVFREQ_CPUBW
select MSM_PIL
select MSM_SPM_V2
select MSM_L2_SPM
@@ -309,11 +311,15 @@
select MSM_SPM_V2
select MSM_L2_SPM
select MSM_RPM_SMD
+ select PM_DEVFREQ
+ select MSM_DEVFREQ_CPUBW
select ENABLE_VMALLOC_SAVINGS
config ARCH_MPQ8092
bool "MPQ8092"
select ARCH_MSM_KRAITMP
+ select PM_DEVFREQ
+ select MSM_DEVFREQ_CPUBW
select GPIO_MSM_V3
select ARM_GIC
select MULTI_IRQ_HANDLER
@@ -332,6 +338,8 @@
select MSM_SCM
select MSM_GPIOMUX
select MULTI_IRQ_HANDLER
+ select PM_DEVFREQ
+ select MSM_DEVFREQ_CPUBW
select MSM_PIL
select MSM_NATIVE_RESTART
select MSM_RESTART_V2
@@ -435,6 +443,8 @@
select MEMORY_HOLE_CARVEOUT
select QMI_ENCDEC
select MSM_CORTEX_A7
+ select PM_DEVFREQ
+ select MSM_DEVFREQ_CPUBW
config ARCH_MSM8610
bool "MSM8610"
@@ -464,6 +474,8 @@
select MSM_CORTEX_A7
select CPU_FREQ_MSM
select CPU_FREQ
+ select PM_DEVFREQ
+ select MSM_DEVFREQ_CPUBW
select MSM_PIL
select MSM_RUN_QUEUE_STATS
select ARM_HAS_SG_CHAIN
@@ -504,6 +516,8 @@
select MSM_CORTEX_A7
select CPU_FREQ_MSM
select CPU_FREQ
+ select PM_DEVFREQ
+ select MSM_DEVFREQ_CPUBW
select MSM_PIL
select MSM_RUN_QUEUE_STATS
select ARM_HAS_SG_CHAIN
@@ -524,6 +538,8 @@
select ARM_GIC
select CPU_V7
select MSM_SCM
+ select PM_DEVFREQ
+ select MSM_DEVFREQ_CPUBW
select MSM_PIL
select MSM_GPIOMUX
select MULTI_IRQ_HANDLER
@@ -573,6 +589,7 @@
config ARCH_MSM_KRAIT
bool
select ARM_L1_CACHE_SHIFT_6
+ select DEVFREQ_GOV_MSM_CPUBW_HWMON
config MSM_CORTEX_A7
bool
@@ -1871,6 +1888,20 @@
endif # CPU_FREQ_MSM
+config MSM_DEVFREQ_CPUBW
+ bool "Devfreq device for CPU<->DDR IB/AB BW voting"
+ depends on PM_DEVFREQ
+ select DEVFREQ_GOV_PERFORMANCE
+ select DEVFREQ_GOV_POWERSAVE
+ select DEVFREQ_GOV_USERSPACE
+ select DEVFREQ_GOV_MSM_CPUFREQ
+ default n
+ help
+ Different devfreq governors use this devfreq device to make CPU to
+ DDR IB/AB bandwidth votes. This driver provides a SoC topology
+ agnostic interface to so that some of the devfreq governors can be
+ shared across SoCs.
+
config MSM_AVS_HW
bool "Enable Adaptive Voltage Scaling (AVS)"
default n
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 0d8458b..9c9fffc 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -413,9 +413,9 @@
obj-$(CONFIG_ARCH_MSM8974) += msm_mpmctr.o
obj-$(CONFIG_MSM_CPR_REGULATOR) += cpr-regulator.o
obj-$(CONFIG_CPU_FREQ_MSM) += cpufreq.o
+obj-$(CONFIG_MSM_DEVFREQ_CPUBW) += devfreq_cpubw.o
obj-$(CONFIG_WALL_CLK) += wallclk.o
obj-$(CONFIG_WALL_CLK_SYSFS) += wallclk_sysfs.o
obj-$(CONFIG_ARCH_RANDOM) += early_random.o
obj-$(CONFIG_PERFMAP) += perfmap.o
-obj-$(CONFIG_ARCH_MSM8974) += cpubw-krait.o
diff --git a/arch/arm/mach-msm/board-8610-gpiomux.c b/arch/arm/mach-msm/board-8610-gpiomux.c
index affe6bd..20bb0e4 100644
--- a/arch/arm/mach-msm/board-8610-gpiomux.c
+++ b/arch/arm/mach-msm/board-8610-gpiomux.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -451,6 +451,12 @@
},
};
+static struct gpiomux_setting accel_interrupt_config = {
+ .func = GPIOMUX_FUNC_GPIO,
+ .drv = GPIOMUX_DRV_6MA,
+ .pull = GPIOMUX_PULL_DOWN,
+};
+
static struct msm_gpiomux_config msm_non_qrd_configs[] __initdata = {
{
.gpio = 8, /* CAM1_STANDBY_N */
@@ -459,6 +465,13 @@
[GPIOMUX_SUSPENDED] = &gpio_suspend_config[1],
},
},
+ {
+ .gpio = 81, /*ACCEL_INT1 */
+ .settings = {
+ [GPIOMUX_ACTIVE] = &accel_interrupt_config,
+ [GPIOMUX_SUSPENDED] = &accel_interrupt_config,
+ },
+ },
};
static struct msm_gpiomux_config msm_sensor_configs[] __initdata = {
diff --git a/arch/arm/mach-msm/clock-8226.c b/arch/arm/mach-msm/clock-8226.c
index 3c5ddc5..1336ec3 100644
--- a/arch/arm/mach-msm/clock-8226.c
+++ b/arch/arm/mach-msm/clock-8226.c
@@ -1555,6 +1555,8 @@
},
};
+static DEFINE_CLK_MEASURE(wcnss_m_clk);
+
#ifdef CONFIG_DEBUG_FS
struct measure_mux_entry {
struct clk *c;
@@ -1610,6 +1612,7 @@
{ &pnoc_clk.c, GCC_BASE, 0x010},
{ &snoc_clk.c, GCC_BASE, 0x000},
{ &cnoc_clk.c, GCC_BASE, 0x008},
+ { &wcnss_m_clk, GCC_BASE, 0x0198},
/*
* measure the gcc_bimc_kpss_axi_clk instead to account for the DDR
* rate being gcc_bimc_clk/2.
@@ -3134,6 +3137,10 @@
CLK_LOOKUP("apc3_m_clk", apc3_m_clk, ""),
CLK_LOOKUP("l2_m_clk", l2_m_clk, ""),
+ /* Measure clocks for WCNSS */
+ CLK_LOOKUP("measure", measure_clk.c, "fb000000.qcom,wcnss-wlan"),
+ CLK_LOOKUP("wcnss_debug", wcnss_m_clk, "fb000000.qcom,wcnss-wlan"),
+
/* LPM Resources */
CLK_LOOKUP("xo", cxo_lpm_clk.c, "fc4281d0.qcom,mpm"),
diff --git a/arch/arm/mach-msm/clock-8610.c b/arch/arm/mach-msm/clock-8610.c
index c7bf92c..672c512 100644
--- a/arch/arm/mach-msm/clock-8610.c
+++ b/arch/arm/mach-msm/clock-8610.c
@@ -527,6 +527,7 @@
static DEFINE_CLK_MEASURE(apc2_m_clk);
static DEFINE_CLK_MEASURE(apc3_m_clk);
static DEFINE_CLK_MEASURE(l2_m_clk);
+static DEFINE_CLK_MEASURE(wcnss_m_clk);
#define APCS_SH_PLL_MODE 0x000
#define APCS_SH_PLL_L_VAL 0x004
@@ -2509,6 +2510,7 @@
{ &bimc_clk.c, GCC_BASE, 0x0155},
{ &gcc_bimc_smmu_clk.c, GCC_BASE, 0x015e},
{ &gcc_lpass_q6_axi_clk.c, GCC_BASE, 0x0160},
+ { &wcnss_m_clk, GCC_BASE, 0x0198},
{ &mmssnoc_ahb_clk.c, MMSS_BASE, 0x0001},
{ &mmss_misc_ahb_clk.c, MMSS_BASE, 0x0003},
@@ -3111,6 +3113,8 @@
CLK_LOOKUP("xo", cxo_acpu_clk.c, "f9011050.qcom,acpuclk"),
CLK_LOOKUP("gpll0", gpll0_ao_clk_src.c, "f9011050.qcom,acpuclk"),
CLK_LOOKUP("a7sspll", a7sspll.c, "f9011050.qcom,acpuclk"),
+ CLK_LOOKUP("clk-4", gpll0_ao_clk_src.c, "f9011050.qcom,clock-a7"),
+ CLK_LOOKUP("clk-5", a7sspll.c, "f9011050.qcom,clock-a7"),
CLK_LOOKUP("measure_clk", apc0_m_clk, ""),
CLK_LOOKUP("measure_clk", apc1_m_clk, ""),
@@ -3118,6 +3122,9 @@
CLK_LOOKUP("measure_clk", apc3_m_clk, ""),
CLK_LOOKUP("measure_clk", l2_m_clk, ""),
+ CLK_LOOKUP("measure", measure_clk.c, "fb000000.qcom,wcnss-wlan"),
+ CLK_LOOKUP("wcnss_debug", wcnss_m_clk, "fb000000.qcom,wcnss-wlan"),
+
CLK_LOOKUP("xo", cxo_wlan_clk.c, "fb000000.qcom,wcnss-wlan"),
CLK_LOOKUP("rf_clk", cxo_a1.c, "fb000000.qcom,wcnss-wlan"),
diff --git a/arch/arm/mach-msm/clock-8974.c b/arch/arm/mach-msm/clock-8974.c
index 6ae909b..d51e6f7 100755
--- a/arch/arm/mach-msm/clock-8974.c
+++ b/arch/arm/mach-msm/clock-8974.c
@@ -4438,6 +4438,7 @@
static DEFINE_CLK_MEASURE(krait1_m_clk);
static DEFINE_CLK_MEASURE(krait2_m_clk);
static DEFINE_CLK_MEASURE(krait3_m_clk);
+static DEFINE_CLK_MEASURE(wcnss_m_clk);
#ifdef CONFIG_DEBUG_FS
@@ -4538,6 +4539,7 @@
{&pnoc_clk.c, GCC_BASE, 0x0010},
{&snoc_clk.c, GCC_BASE, 0x0000},
{&bimc_clk.c, GCC_BASE, 0x0155},
+ {&wcnss_m_clk, GCC_BASE, 0x0198},
{&mmss_mmssnoc_axi_clk.c, MMSS_BASE, 0x0004},
{&ocmemnoc_clk.c, MMSS_BASE, 0x0007},
{&ocmemcx_ocmemnoc_clk.c, MMSS_BASE, 0x0009},
@@ -5054,6 +5056,9 @@
CLK_LOOKUP("sleep_clk", gcc_usb2b_phy_sleep_clk.c, "msm_ehci_host"),
CLK_LOOKUP("pwm_clk", div_clk2.c, "0-0048"),
+ CLK_LOOKUP("measure", measure_clk.c, "fb000000.qcom,wcnss-wlan"),
+ CLK_LOOKUP("wcnss_debug", wcnss_m_clk, "fb000000.qcom,wcnss-wlan"),
+
/* Multimedia clocks */
CLK_LOOKUP("bus_clk_src", axi_clk_src.c, ""),
CLK_LOOKUP("bus_clk", mmss_mmssnoc_axi_clk.c, ""),
@@ -5061,6 +5066,7 @@
CLK_LOOKUP("core_clk", mdss_edpaux_clk.c, "fd923400.qcom,mdss_edp"),
CLK_LOOKUP("pixel_clk", mdss_edppixel_clk.c, "fd923400.qcom,mdss_edp"),
CLK_LOOKUP("link_clk", mdss_edplink_clk.c, "fd923400.qcom,mdss_edp"),
+ CLK_LOOKUP("mdp_core_clk", mdss_mdp_clk.c, "fd923400.qcom,mdss_edp"),
CLK_LOOKUP("byte_clk", mdss_byte0_clk.c, "fd922800.qcom,mdss_dsi"),
CLK_LOOKUP("byte_clk", mdss_byte1_clk.c, "fd922e00.qcom,mdss_dsi"),
CLK_LOOKUP("core_clk", mdss_esc0_clk.c, "fd922800.qcom,mdss_dsi"),
diff --git a/arch/arm/mach-msm/clock-krait-8974.c b/arch/arm/mach-msm/clock-krait-8974.c
index 24fe303..4f133fc 100644
--- a/arch/arm/mach-msm/clock-krait-8974.c
+++ b/arch/arm/mach-msm/clock-krait-8974.c
@@ -414,7 +414,7 @@
};
static void get_krait_bin_format_b(struct platform_device *pdev,
- int *speed, int *pvs, int *ver)
+ int *speed, int *pvs, int *pvs_ver)
{
u32 pte_efuse, redundant_sel;
struct resource *res;
@@ -422,7 +422,7 @@
*speed = 0;
*pvs = 0;
- *ver = 0;
+ *pvs_ver = 0;
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "efuse");
if (!res) {
@@ -443,7 +443,7 @@
*speed = pte_efuse & 0x7;
/* 4 bits of PVS are in efuse register bits 31, 8-6. */
*pvs = ((pte_efuse >> 28) & 0x8) | ((pte_efuse >> 6) & 0x7);
- *ver = (pte_efuse >> 4) & 0x3;
+ *pvs_ver = (pte_efuse >> 4) & 0x3;
switch (redundant_sel) {
case 1:
@@ -471,7 +471,7 @@
*pvs = 0;
}
- dev_info(&pdev->dev, "PVS version: %d\n", *ver);
+ dev_info(&pdev->dev, "PVS version: %d\n", *pvs_ver);
devm_iounmap(&pdev->dev, base);
}
@@ -585,12 +585,16 @@
}
}
+static char table_name[] = "qcom,speedXX-pvsXX-bin-vXX";
+module_param_string(table_name, table_name, sizeof(table_name), S_IRUGO);
+static unsigned int pvs_config_ver;
+module_param(pvs_config_ver, uint, S_IRUGO);
+
static int clock_krait_8974_driver_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct clk *c;
- int speed, pvs, ver, rows, cpu;
- char prop_name[] = "qcom,speedXX-pvsXX-bin-vXX";
+ int speed, pvs, pvs_ver, config_ver, rows, cpu;
unsigned long *freq, cur_rate, aux_rate;
int *uv, *ua;
u32 *dscr, vco_mask, config_val;
@@ -673,15 +677,22 @@
if (!ret)
hdata.user_vco_mask = vco_mask;
- get_krait_bin_format_b(pdev, &speed, &pvs, &ver);
- snprintf(prop_name, ARRAY_SIZE(prop_name),
- "qcom,speed%d-pvs%d-bin-v%d", speed, pvs, ver);
+ ret = of_property_read_u32(dev->of_node, "qcom,pvs-config-ver",
+ &config_ver);
+ if (!ret) {
+ pvs_config_ver = config_ver;
+ dev_info(&pdev->dev, "PVS config version: %d\n", config_ver);
+ }
- rows = parse_tbl(dev, prop_name, 3,
+ get_krait_bin_format_b(pdev, &speed, &pvs, &pvs_ver);
+ snprintf(table_name, ARRAY_SIZE(table_name),
+ "qcom,speed%d-pvs%d-bin-v%d", speed, pvs, pvs_ver);
+
+ rows = parse_tbl(dev, table_name, 3,
(u32 **) &freq, (u32 **) &uv, (u32 **) &ua);
if (rows < 0) {
/* Fall back to most conservative PVS table */
- dev_err(dev, "Unable to load voltage plan %s!\n", prop_name);
+ dev_err(dev, "Unable to load voltage plan %s!\n", table_name);
ret = parse_tbl(dev, "qcom,speed0-pvs0-bin-v0", 3,
(u32 **) &freq, (u32 **) &uv, (u32 **) &ua);
if (ret < 0) {
diff --git a/arch/arm/mach-msm/clock-mdss-8974.c b/arch/arm/mach-msm/clock-mdss-8974.c
index d1b1885..1fc7f1d 100644
--- a/arch/arm/mach-msm/clock-mdss-8974.c
+++ b/arch/arm/mach-msm/clock-mdss-8974.c
@@ -151,6 +151,7 @@
#define PLL_POLL_MAX_READS 10
#define PLL_POLL_TIMEOUT_US 50
+#define SEQ_M_MAX_COUNTER 7
static long vco_cached_rate;
static unsigned char *mdss_dsi_base;
@@ -1034,12 +1035,12 @@
static void dsi_pll_toggle_lock_detect(void)
{
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_LKDET_CFG2,
- 0x05);
+ 0x0d);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_LKDET_CFG2,
- 0x04);
+ 0x0c);
udelay(1);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_LKDET_CFG2,
- 0x05);
+ 0x0d);
}
static int dsi_pll_lock_status(void)
@@ -1076,9 +1077,9 @@
* reset bit off and back on.
*/
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_TEST_CFG, 0x01);
- udelay(1000);
+ udelay(1);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_TEST_CFG, 0x00);
- udelay(1000);
+ udelay(1);
}
static int dsi_pll_enable_seq_m(void)
@@ -1093,24 +1094,25 @@
* the updates to take effect. These delays are necessary for the
* PLL to successfully lock
*/
+ DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_CAL_CFG1, 0x34);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x01);
udelay(200);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x05);
udelay(200);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x0f);
- udelay(1000);
+ udelay(600);
pll_locked = dsi_pll_toggle_lock_detect_and_check_status();
- for (i = 0; (i < 4) && !pll_locked; i++) {
+ for (i = 0; (i < SEQ_M_MAX_COUNTER) && !pll_locked; i++) {
+ DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_PWRGEN_CFG,
+ 0x00);
+ udelay(50);
DSS_REG_W(mdss_dsi_base,
- DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x07);
- if (i != 0)
- DSS_REG_W(mdss_dsi_base,
- DSI_0_PHY_PLL_UNIPHY_PLL_CAL_CFG1, 0x34);
- udelay(1);
+ DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x05);
+ udelay(100);
DSS_REG_W(mdss_dsi_base,
DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x0f);
- udelay(1000);
+ udelay(600);
pll_locked = dsi_pll_toggle_lock_detect_and_check_status();
}
@@ -1134,6 +1136,8 @@
* the updates to take effect. These delays are necessary for the
* PLL to successfully lock
*/
+ DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_PWRGEN_CFG, 0x00);
+ udelay(50);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x01);
udelay(200);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x05);
@@ -1145,7 +1149,7 @@
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x07);
udelay(200);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x0f);
- udelay(1000);
+ udelay(600);
pll_locked = dsi_pll_toggle_lock_detect_and_check_status();
pr_debug("%s: PLL status = %s\n", __func__,
@@ -1165,6 +1169,8 @@
* the updates to take effect. These delays are necessary for the
* PLL to successfully lock
*/
+ DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_PWRGEN_CFG, 0x00);
+ udelay(50);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x01);
udelay(200);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x05);
@@ -1174,7 +1180,7 @@
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x0d);
udelay(200);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x0f);
- udelay(1000);
+ udelay(600);
pll_locked = dsi_pll_toggle_lock_detect_and_check_status();
pr_debug("%s: PLL status = %s\n", __func__,
@@ -1194,12 +1200,14 @@
* the updates to take effect. These delays are necessary for the
* PLL to successfully lock
*/
+ DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_PWRGEN_CFG, 0x00);
+ udelay(50);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x01);
udelay(200);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x05);
udelay(200);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x0f);
- udelay(1000);
+ udelay(600);
pll_locked = dsi_pll_toggle_lock_detect_and_check_status();
pr_debug("%s: PLL status = %s\n", __func__,
@@ -1219,6 +1227,8 @@
* the updates to take effect. These delays are necessary for the
* PLL to successfully lock
*/
+ DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_PWRGEN_CFG, 0x00);
+ udelay(50);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x01);
udelay(200);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x05);
@@ -1226,7 +1236,7 @@
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x0d);
udelay(1);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x0f);
- udelay(1000);
+ udelay(600);
pll_locked = dsi_pll_toggle_lock_detect_and_check_status();
pr_debug("%s: PLL status = %s\n", __func__,
@@ -1247,22 +1257,22 @@
* Add necessary delays recommeded by hardware.
*/
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x01);
- udelay(1000);
+ udelay(1);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x05);
- udelay(1000);
+ udelay(200);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x07);
- udelay(1000);
+ udelay(500);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x0f);
- udelay(1000);
+ udelay(500);
- for (i = 0; i < 3; i++) {
+ for (i = 0; i < 2; i++) {
+ udelay(100);
/* DSI Uniphy lock detect setting */
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_LKDET_CFG2,
- 0x04);
+ 0x0c);
udelay(100);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_LKDET_CFG2,
- 0x05);
- udelay(500);
+ 0x0d);
/* poll for PLL ready status */
max_reads = 5;
timeout_us = 100;
@@ -1285,17 +1295,17 @@
* Add necessary delays recommeded by hardware.
*/
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x1);
- udelay(1000);
+ udelay(1);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x5);
- udelay(1000);
+ udelay(200);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x7);
- udelay(1000);
+ udelay(250);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x5);
- udelay(1000);
+ udelay(200);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x7);
- udelay(1000);
+ udelay(500);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0xf);
- udelay(2000);
+ udelay(500);
}
@@ -1459,7 +1469,7 @@
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_CHGPUMP_CFG, 0x02);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_CAL_CFG3, 0x2b);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_CAL_CFG4, 0x66);
- DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_LKDET_CFG2, 0x05);
+ DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_LKDET_CFG2, 0x0d);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_SDM_CFG1,
(u32)(sdm_cfg1 & 0xff));
@@ -1470,7 +1480,7 @@
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_SDM_CFG4, 0x00);
/* Add hardware recommended delay for correct PLL configuration */
- udelay(1000);
+ udelay(1);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_REFCLK_CFG,
(u32)refclk_cfg);
@@ -1478,7 +1488,7 @@
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_VCOLPF_CFG, 0x71);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_SDM_CFG0,
(u32)sdm_cfg0);
- DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_CAL_CFG0, 0x0a);
+ DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_CAL_CFG0, 0x12);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_CAL_CFG6, 0x30);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_CAL_CFG7, 0x00);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_CAL_CFG8, 0x60);
@@ -1640,13 +1650,14 @@
.ref_clk_rate = 19200000,
.min_rate = 350000000,
.max_rate = 750000000,
- .pll_en_seq_cnt = 6,
+ .pll_en_seq_cnt = 7,
.pll_enable_seqs[0] = dsi_pll_enable_seq_m,
- .pll_enable_seqs[1] = dsi_pll_enable_seq_d,
+ .pll_enable_seqs[1] = dsi_pll_enable_seq_m,
.pll_enable_seqs[2] = dsi_pll_enable_seq_d,
- .pll_enable_seqs[3] = dsi_pll_enable_seq_f1,
- .pll_enable_seqs[4] = dsi_pll_enable_seq_c,
- .pll_enable_seqs[5] = dsi_pll_enable_seq_e,
+ .pll_enable_seqs[3] = dsi_pll_enable_seq_d,
+ .pll_enable_seqs[4] = dsi_pll_enable_seq_f1,
+ .pll_enable_seqs[5] = dsi_pll_enable_seq_c,
+ .pll_enable_seqs[6] = dsi_pll_enable_seq_e,
.lpfr_lut_size = 10,
.lpfr_lut = (struct lpfr_cfg[]){
{479500000, 8},
@@ -1999,7 +2010,6 @@
if (status)
return 1;
- pr_err("%s: PLL NOT ready\n", __func__);
return 0;
}
diff --git a/arch/arm/mach-msm/cpr-regulator.c b/arch/arm/mach-msm/cpr-regulator.c
index fa132fa..28afc91 100644
--- a/arch/arm/mach-msm/cpr-regulator.c
+++ b/arch/arm/mach-msm/cpr-regulator.c
@@ -219,6 +219,7 @@
int *corner_map;
u32 num_corners;
int *quot_adjust;
+ u32 quotient_adjustment;
};
#define CPR_DEBUG_MASK_IRQ BIT(0)
@@ -622,13 +623,9 @@
}
cpr_vreg->last_volt[corner] = new_volt;
- /* Restore default threshold for DOWN */
- reg_mask = RBCPR_CTL_DN_THRESHOLD_MASK <<
- RBCPR_CTL_DN_THRESHOLD_SHIFT;
- reg_val = cpr_vreg->down_threshold <<
- RBCPR_CTL_DN_THRESHOLD_SHIFT;
- /* and disable auto nack down */
- reg_mask |= RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN;
+ /* Disable auto nack down */
+ reg_mask = RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN;
+ reg_val = 0;
cpr_ctl_modify(cpr_vreg, reg_mask, reg_val);
@@ -652,16 +649,12 @@
cpr_vreg->floor_volt[fuse_corner]);
cpr_irq_clr_nack(cpr_vreg);
- /* Maximize the DOWN threshold */
- reg_mask = RBCPR_CTL_DN_THRESHOLD_MASK <<
- RBCPR_CTL_DN_THRESHOLD_SHIFT;
- reg_val = reg_mask;
cpr_debug_irq("gcnt = 0x%08x (quot = %d)\n", gcnt,
quot);
/* Enable auto nack down */
- reg_mask |= RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN;
- reg_val |= RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN;
+ reg_mask = RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN;
+ reg_val = RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN;
cpr_ctl_modify(cpr_vreg, reg_mask, reg_val);
@@ -1063,13 +1056,13 @@
int rc, i;
rc = of_property_read_u32(of_node,
- "qti,cpr-uplift-voltage", &uplift_voltage);
+ "qcom,cpr-uplift-voltage", &uplift_voltage);
if (rc < 0) {
pr_err("cpr-uplift-voltage is missing, rc = %d", rc);
return rc;
}
rc = of_property_read_u32(of_node,
- "qti,cpr-uplift-max-volt", &uplift_max_volt);
+ "qcom,cpr-uplift-max-volt", &uplift_max_volt);
if (rc < 0) {
pr_err("cpr-uplift-max-volt is missing, rc = %d", rc);
return rc;
@@ -1091,11 +1084,11 @@
u64 efuse_bits;
int rc, process;
u32 pvs_fuse[4], pvs_fuse_redun_sel[5];
- u32 init_v;
+ u32 init_v, quot_adjust;
bool redundant;
size_t pvs_bins;
- rc = of_property_read_u32_array(of_node, "qti,pvs-fuse-redun-sel",
+ rc = of_property_read_u32_array(of_node, "qcom,pvs-fuse-redun-sel",
pvs_fuse_redun_sel, 5);
if (rc < 0) {
pr_err("pvs-fuse-redun-sel missing: rc=%d\n", rc);
@@ -1105,14 +1098,14 @@
redundant = cpr_fuse_is_setting_expected(cpr_vreg, pvs_fuse_redun_sel);
if (redundant) {
- rc = of_property_read_u32_array(of_node, "qti,pvs-fuse-redun",
+ rc = of_property_read_u32_array(of_node, "qcom,pvs-fuse-redun",
pvs_fuse, 4);
if (rc < 0) {
pr_err("pvs-fuse-redun missing: rc=%d\n", rc);
return rc;
}
} else {
- rc = of_property_read_u32_array(of_node, "qti,pvs-fuse",
+ rc = of_property_read_u32_array(of_node, "qcom,pvs-fuse",
pvs_fuse, 4);
if (rc < 0) {
pr_err("pvs-fuse missing: rc=%d\n", rc);
@@ -1128,7 +1121,7 @@
pvs_bins = 1 << pvs_fuse[2];
- rc = of_property_read_u32_array(of_node, "qti,pvs-init-voltage",
+ rc = of_property_read_u32_array(of_node, "qcom,pvs-init-voltage",
cpr_vreg->pvs_init_v, pvs_bins);
if (rc < 0) {
pr_err("pvs-init-voltage missing: rc=%d\n", rc);
@@ -1168,6 +1161,11 @@
cpr_vreg->process = process;
+ rc = of_property_read_u32(of_node,
+ "qcom,cpr-quotient-adjustment", "_adjust);
+ if (!rc)
+ cpr_vreg->quotient_adjustment = quot_adjust;
+
return 0;
}
@@ -1175,7 +1173,7 @@
do { \
if (!rc) { \
rc = of_property_read_u32(of_node, \
- "qti," cpr_property, \
+ "qcom," cpr_property, \
cpr_config); \
if (rc) { \
pr_err("Missing " #cpr_property \
@@ -1212,14 +1210,14 @@
/* Parse dependency parameters */
if (cpr_vreg->vdd_mx) {
- rc = of_property_read_u32(of_node, "qti,vdd-mx-vmax",
+ rc = of_property_read_u32(of_node, "qcom,vdd-mx-vmax",
&cpr_vreg->vdd_mx_vmax);
if (rc < 0) {
pr_err("vdd-mx-vmax missing: rc=%d\n", rc);
return rc;
}
- rc = of_property_read_u32(of_node, "qti,vdd-mx-vmin-method",
+ rc = of_property_read_u32(of_node, "qcom,vdd-mx-vmin-method",
&cpr_vreg->vdd_mx_vmin_method);
if (rc < 0) {
pr_err("vdd-mx-vmin-method missing: rc=%d\n", rc);
@@ -1252,7 +1250,7 @@
int rc, i;
rc = of_property_read_u32_array(of_node,
- "qti,cpr-uplift-quotient", delta_quot, 3);
+ "qcom,cpr-uplift-quotient", delta_quot, 3);
if (rc < 0) {
pr_err("cpr-uplift-quotient is missing: %d", rc);
return rc;
@@ -1271,7 +1269,7 @@
u32 *tmp;
bool corners_mapped;
- prop = of_find_property(dev->of_node, "qti,cpr-corner-map", NULL);
+ prop = of_find_property(dev->of_node, "qcom,cpr-corner-map", NULL);
if (prop) {
size = prop->length / sizeof(u32);
@@ -1294,10 +1292,10 @@
cpr_vreg->corner_map[i] = i;
} else {
rc = of_property_read_u32_array(dev->of_node,
- "qti,cpr-corner-map", &cpr_vreg->corner_map[1], size);
+ "qcom,cpr-corner-map", &cpr_vreg->corner_map[1], size);
if (rc) {
- pr_err("qti,cpr-corner-map missing, rc = %d", rc);
+ pr_err("qcom,cpr-corner-map missing, rc = %d", rc);
return rc;
}
}
@@ -1310,12 +1308,12 @@
return -ENOMEM;
}
- prop = of_find_property(dev->of_node, "qti,cpr-quot-adjust-table",
+ prop = of_find_property(dev->of_node, "qcom,cpr-quot-adjust-table",
NULL);
if (prop) {
if (!corners_mapped) {
- pr_err("qti,cpr-corner-map missing\n");
+ pr_err("qcom,cpr-corner-map missing\n");
return -EINVAL;
}
@@ -1325,9 +1323,9 @@
return -ENOMEM;
rc = of_property_read_u32_array(dev->of_node,
- "qti,cpr-quot-adjust-table", tmp, size);
+ "qcom,cpr-quot-adjust-table", tmp, size);
if (rc) {
- pr_err("qti,cpr-quot-adjust-table missing, rc = %d",
+ pr_err("qcom,cpr-quot-adjust-table missing, rc = %d",
rc);
kfree(tmp);
return rc;
@@ -1336,7 +1334,7 @@
stripe_size = sizeof(struct quot_adjust_info) / sizeof(int);
if ((size % stripe_size) != 0) {
- pr_err("qti,cpr-quot-adjust-table data is not correct");
+ pr_err("qcom,cpr-quot-adjust-table data is not correct");
kfree(tmp);
return -EINVAL;
}
@@ -1349,7 +1347,7 @@
cpr_vreg->quot_adjust[tmp[i + 1]] =
tmp[i + 2];
} else {
- pr_err("qti,cpr-quot-adjust-table data is not correct");
+ pr_err("qcom,cpr-quot-adjust-table data is not correct");
kfree(tmp);
return -EINVAL;
}
@@ -1377,7 +1375,7 @@
u32 ro_sel, val;
u64 fuse_bits, fuse_bits_2;
- rc = of_property_read_u32_array(of_node, "qti,cpr-fuse-redun-sel",
+ rc = of_property_read_u32_array(of_node, "qcom,cpr-fuse-redun-sel",
cpr_fuse_redun_sel, 5);
if (rc < 0) {
pr_err("cpr-fuse-redun-sel missing: rc=%d\n", rc);
@@ -1388,16 +1386,16 @@
if (redundant) {
rc = of_property_read_u32_array(of_node,
- "qti,cpr-fuse-redun-row",
+ "qcom,cpr-fuse-redun-row",
cpr_fuse_row, 2);
- targ_quot_str = "qti,cpr-fuse-redun-target-quot";
- ro_sel_str = "qti,cpr-fuse-redun-ro-sel";
+ targ_quot_str = "qcom,cpr-fuse-redun-target-quot";
+ ro_sel_str = "qcom,cpr-fuse-redun-ro-sel";
} else {
rc = of_property_read_u32_array(of_node,
- "qti,cpr-fuse-row",
+ "qcom,cpr-fuse-row",
cpr_fuse_row, 2);
- targ_quot_str = "qti,cpr-fuse-target-quot";
- ro_sel_str = "qti,cpr-fuse-ro-sel";
+ targ_quot_str = "qcom,cpr-fuse-target-quot";
+ ro_sel_str = "qcom,cpr-fuse-ro-sel";
}
if (rc)
return rc;
@@ -1427,7 +1425,7 @@
if (redundant) {
if (of_property_read_bool(of_node,
- "qti,cpr-fuse-redun-bp-cpr-disable")) {
+ "qcom,cpr-fuse-redun-bp-cpr-disable")) {
CPR_PROP_READ_U32(of_node,
"cpr-fuse-redun-bp-cpr-disable",
&bp_cpr_disable, rc);
@@ -1446,7 +1444,7 @@
CPR_PROP_READ_U32(of_node, "cpr-fuse-bp-scheme",
&bp_scheme, rc);
rc = of_property_read_u32_array(of_node,
- "qti,cpr-fuse-row",
+ "qcom,cpr-fuse-row",
temp_row, 2);
if (rc)
return rc;
@@ -1477,6 +1475,7 @@
& CPR_FUSE_RO_SEL_BITS_MASK;
val = (fuse_bits >> bp_target_quot[i])
& CPR_FUSE_TARGET_QUOT_BITS_MASK;
+ val += cpr_vreg->quotient_adjustment;
cpr_vreg->cpr_fuse_target_quot[i] = val;
cpr_vreg->cpr_fuse_ro_sel[i] = ro_sel;
pr_info("Corner[%d]: ro_sel = %d, target quot = %d\n",
@@ -1611,7 +1610,7 @@
return rc;
/* Init module parameter with the DT value */
- cpr_vreg->enable = of_property_read_bool(of_node, "qti,cpr-enable");
+ cpr_vreg->enable = of_property_read_bool(of_node, "qcom,cpr-enable");
cpr_enable = (int) cpr_vreg->enable;
pr_info("CPR is %s by default.\n",
cpr_vreg->enable ? "enabled" : "disabled");
@@ -1716,12 +1715,12 @@
u32 fuse_sel[5];
/*
* Restrict all pvs corner voltages to a minimum value of
- * qti,cpr-cond-min-voltage if the fuse defined in
- * qti,cpr-fuse-cond-min-volt-sel does not read back with
+ * qcom,cpr-cond-min-voltage if the fuse defined in
+ * qcom,cpr-fuse-cond-min-volt-sel does not read back with
* the expected value.
*/
rc = of_property_read_u32_array(of_node,
- "qti,cpr-fuse-cond-min-volt-sel", fuse_sel, 5);
+ "qcom,cpr-fuse-cond-min-volt-sel", fuse_sel, 5);
if (!rc) {
if (!cpr_fuse_is_setting_expected(cpr_vreg, fuse_sel))
cpr_vreg->flags |= FLAGS_SET_MIN_VOLTAGE;
@@ -1737,7 +1736,7 @@
u32 speed_bits;
rc = of_property_read_u32_array(of_node,
- "qti,speed-bin-fuse-sel", fuse_sel, 4);
+ "qcom,speed-bin-fuse-sel", fuse_sel, 4);
if (!rc) {
fuse_bits = cpr_read_efuse_row(cpr_vreg,
@@ -1760,13 +1759,13 @@
u32 uplift_speed_bin;
rc = of_property_read_u32_array(of_node,
- "qti,cpr-fuse-uplift-sel", fuse_sel, 5);
+ "qcom,cpr-fuse-uplift-sel", fuse_sel, 5);
if (!rc) {
rc = of_property_read_u32(of_node,
- "qti,cpr-uplift-speed-bin",
+ "qcom,cpr-uplift-speed-bin",
&uplift_speed_bin);
if (rc < 0) {
- pr_err("qti,cpr-uplift-speed-bin missing\n");
+ pr_err("qcom,cpr-uplift-speed-bin missing\n");
return rc;
}
if (cpr_fuse_is_setting_expected(cpr_vreg, fuse_sel)
@@ -1786,7 +1785,7 @@
u32 min_uv = 0;
rc = of_property_read_u32_array(of_node,
- "qti,pvs-corner-ceiling-slow",
+ "qcom,pvs-corner-ceiling-slow",
&cpr_vreg->pvs_corner_v[APC_PVS_SLOW][CPR_FUSE_CORNER_SVS],
CPR_FUSE_CORNER_MAX - CPR_FUSE_CORNER_SVS);
if (rc < 0) {
@@ -1795,7 +1794,7 @@
}
rc = of_property_read_u32_array(of_node,
- "qti,pvs-corner-ceiling-nom",
+ "qcom,pvs-corner-ceiling-nom",
&cpr_vreg->pvs_corner_v[APC_PVS_NOM][CPR_FUSE_CORNER_SVS],
CPR_FUSE_CORNER_MAX - CPR_FUSE_CORNER_SVS);
if (rc < 0) {
@@ -1804,7 +1803,7 @@
}
rc = of_property_read_u32_array(of_node,
- "qti,pvs-corner-ceiling-fast",
+ "qcom,pvs-corner-ceiling-fast",
&cpr_vreg->pvs_corner_v[APC_PVS_FAST][CPR_FUSE_CORNER_SVS],
CPR_FUSE_CORNER_MAX - CPR_FUSE_CORNER_SVS);
if (rc < 0) {
@@ -1820,7 +1819,7 @@
return rc;
}
if (cpr_vreg->flags & FLAGS_SET_MIN_VOLTAGE) {
- of_property_read_u32(of_node, "qti,cpr-cond-min-voltage",
+ of_property_read_u32(of_node, "qcom,cpr-cond-min-voltage",
&min_uv);
for (i = APC_PVS_SLOW; i < NUM_APC_PVS; i++)
for (j = CPR_FUSE_CORNER_SVS; j < CPR_FUSE_CORNER_MAX;
diff --git a/arch/arm/mach-msm/cpubw-krait.c b/arch/arm/mach-msm/cpubw-krait.c
deleted file mode 100644
index 4108754..0000000
--- a/arch/arm/mach-msm/cpubw-krait.c
+++ /dev/null
@@ -1,472 +0,0 @@
-/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#define pr_fmt(fmt) "cpubw-krait: " fmt
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/delay.h>
-#include <linux/ktime.h>
-#include <linux/time.h>
-#include <linux/err.h>
-#include <linux/errno.h>
-#include <linux/mutex.h>
-#include <linux/interrupt.h>
-#include <trace/events/power.h>
-#include <mach/msm_bus.h>
-#include <mach/msm_bus_board.h>
-
-#include <mach/msm-krait-l2-accessors.h>
-
-#define L2PMRESR2 0x412
-#define L2PMCR 0x400
-#define L2PMCNTENCLR 0x402
-#define L2PMCNTENSET 0x403
-#define L2PMINTENCLR 0x404
-#define L2PMINTENSET 0x405
-#define L2PMOVSR 0x406
-#define L2PMOVSSET 0x407
-#define L2PMnEVCNTCR(n) (0x420 + n * 0x10)
-#define L2PMnEVCNTR(n) (0x421 + n * 0x10)
-#define L2PMnEVCNTSR(n) (0x422 + n * 0x10)
-#define L2PMnEVFILTER(n) (0x423 + n * 0x10)
-#define L2PMnEVTYPER(n) (0x424 + n * 0x10)
-#define MON_INT 33
-
-#define MBYTE (1 << 20)
-
-#define BW(_bw) \
- { \
- .vectors = (struct msm_bus_vectors[]){ \
- {\
- .src = MSM_BUS_MASTER_AMPSS_M0, \
- .dst = MSM_BUS_SLAVE_EBI_CH0, \
- }, \
- { \
- .src = MSM_BUS_MASTER_AMPSS_M1, \
- .dst = MSM_BUS_SLAVE_EBI_CH0, \
- }, \
- }, \
- .num_paths = 2, \
- }
-
-/* Has to be a power of 2 to work correctly */
-static unsigned int bytes_per_beat = 8;
-module_param(bytes_per_beat, uint, 0644);
-
-static unsigned int sample_ms = 50;
-module_param(sample_ms, uint, 0644);
-
-static unsigned int tolerance_percent = 10;
-module_param(tolerance_percent, uint, 0644);
-
-static unsigned int guard_band_mbps = 100;
-module_param(guard_band_mbps, uint, 0644);
-
-static unsigned int decay_rate = 90;
-module_param(decay_rate, uint, 0644);
-
-static unsigned int io_percent = 15;
-module_param(io_percent, uint, 0644);
-
-static unsigned int bw_step = 200;
-module_param(bw_step, uint, 0644);
-
-static struct kernel_param_ops enable_ops;
-static bool enable;
-module_param_cb(enable, &enable_ops, &enable, S_IRUGO | S_IWUSR);
-
-static void mon_init(void)
-{
- /* Set up counters 0/1 to count write/read beats */
- set_l2_indirect_reg(L2PMRESR2, 0x8B0B0000);
- set_l2_indirect_reg(L2PMnEVCNTCR(0), 0x0);
- set_l2_indirect_reg(L2PMnEVCNTCR(1), 0x0);
- set_l2_indirect_reg(L2PMnEVCNTR(0), 0xFFFFFFFF);
- set_l2_indirect_reg(L2PMnEVCNTR(1), 0xFFFFFFFF);
- set_l2_indirect_reg(L2PMnEVFILTER(0), 0xF003F);
- set_l2_indirect_reg(L2PMnEVFILTER(1), 0xF003F);
- set_l2_indirect_reg(L2PMnEVTYPER(0), 0xA);
- set_l2_indirect_reg(L2PMnEVTYPER(1), 0xB);
-}
-
-static void global_mon_enable(bool en)
-{
- u32 regval;
-
- /* Global counter enable */
- regval = get_l2_indirect_reg(L2PMCR);
- if (en)
- regval |= BIT(0);
- else
- regval &= ~BIT(0);
- set_l2_indirect_reg(L2PMCR, regval);
-}
-
-static void mon_enable(int n)
-{
- /* Clear previous overflow state for event counter n */
- set_l2_indirect_reg(L2PMOVSR, BIT(n));
-
- /* Enable event counter n */
- set_l2_indirect_reg(L2PMCNTENSET, BIT(n));
-}
-
-static void mon_disable(int n)
-{
- /* Disable event counter n */
- set_l2_indirect_reg(L2PMCNTENCLR, BIT(n));
-}
-
-/* Returns start counter value to be used with mon_get_mbps() */
-static u32 mon_set_limit_mbyte(int n, unsigned int mbytes)
-{
- u32 regval, beats;
-
- beats = mult_frac(mbytes, MBYTE, bytes_per_beat);
- regval = 0xFFFFFFFF - beats;
- set_l2_indirect_reg(L2PMnEVCNTR(n), regval);
- pr_debug("EV%d MB: %d, start val: %x\n", n, mbytes, regval);
-
- return regval;
-}
-
-/* Returns MBps of read/writes for the sampling window. */
-static int mon_get_mbps(int n, u32 start_val, unsigned int us)
-{
- u32 overflow, count;
- long long beats;
-
- count = get_l2_indirect_reg(L2PMnEVCNTR(n));
- overflow = get_l2_indirect_reg(L2PMOVSR);
-
- if (overflow & BIT(n))
- beats = 0xFFFFFFFF - start_val + count;
- else
- beats = count - start_val;
-
- beats *= USEC_PER_SEC;
- beats *= bytes_per_beat;
- do_div(beats, us);
- beats = DIV_ROUND_UP_ULL(beats, MBYTE);
-
- pr_debug("EV%d ov: %x, cnt: %x\n", n, overflow, count);
-
- return beats;
-}
-
-static void do_bw_sample(struct work_struct *work);
-static DECLARE_DEFERRED_WORK(bw_sample, do_bw_sample);
-static struct workqueue_struct *bw_sample_wq;
-
-static DEFINE_MUTEX(bw_lock);
-static ktime_t prev_ts;
-static u32 prev_r_start_val;
-static u32 prev_w_start_val;
-
-static struct msm_bus_paths bw_levels[] = {
- BW(0), BW(200),
-};
-static struct msm_bus_scale_pdata bw_data = {
- .usecase = bw_levels,
- .num_usecases = ARRAY_SIZE(bw_levels),
- .name = "cpubw-krait",
- .active_only = 1,
-};
-static u32 bus_client;
-static void compute_bw(int mbps);
-static irqreturn_t mon_intr_handler(int irq, void *dev_id);
-
-#define START_LIMIT 100 /* MBps */
-static int start_monitoring(void)
-{
- int mb_limit;
- int ret;
-
- ret = request_threaded_irq(MON_INT, NULL, mon_intr_handler,
- IRQF_ONESHOT | IRQF_SHARED | IRQF_TRIGGER_RISING,
- "cpubw_krait", mon_intr_handler);
- if (ret) {
- pr_err("Unable to register interrupt handler\n");
- return ret;
- }
-
- bw_sample_wq = alloc_workqueue("cpubw-krait", WQ_HIGHPRI, 0);
- if (!bw_sample_wq) {
- pr_err("Unable to alloc workqueue\n");
- ret = -ENOMEM;
- goto alloc_wq_fail;
- }
-
- bus_client = msm_bus_scale_register_client(&bw_data);
- if (!bus_client) {
- pr_err("Unable to register bus client\n");
- ret = -ENODEV;
- goto bus_reg_fail;
- }
-
- compute_bw(START_LIMIT);
-
- mon_init();
- mon_disable(0);
- mon_disable(1);
-
- mb_limit = mult_frac(START_LIMIT, sample_ms, MSEC_PER_SEC);
- mb_limit /= 2;
-
- prev_r_start_val = mon_set_limit_mbyte(0, mb_limit);
- prev_w_start_val = mon_set_limit_mbyte(1, mb_limit);
-
- prev_ts = ktime_get();
-
- set_l2_indirect_reg(L2PMINTENSET, BIT(0));
- set_l2_indirect_reg(L2PMINTENSET, BIT(1));
- mon_enable(0);
- mon_enable(1);
- global_mon_enable(true);
-
- queue_delayed_work(bw_sample_wq, &bw_sample,
- msecs_to_jiffies(sample_ms));
-
- return 0;
-
-bus_reg_fail:
- destroy_workqueue(bw_sample_wq);
-alloc_wq_fail:
- disable_irq(MON_INT);
- free_irq(MON_INT, mon_intr_handler);
- return ret;
-}
-
-static void stop_monitoring(void)
-{
- global_mon_enable(false);
- mon_disable(0);
- mon_disable(1);
- set_l2_indirect_reg(L2PMINTENCLR, BIT(0));
- set_l2_indirect_reg(L2PMINTENCLR, BIT(1));
-
- disable_irq(MON_INT);
- free_irq(MON_INT, mon_intr_handler);
-
- cancel_delayed_work_sync(&bw_sample);
- destroy_workqueue(bw_sample_wq);
-
- bw_levels[0].vectors[0].ib = 0;
- bw_levels[0].vectors[0].ab = 0;
- bw_levels[0].vectors[1].ib = 0;
- bw_levels[0].vectors[1].ab = 0;
-
- bw_levels[1].vectors[0].ib = 0;
- bw_levels[1].vectors[0].ab = 0;
- bw_levels[1].vectors[1].ib = 0;
- bw_levels[1].vectors[1].ab = 0;
- msm_bus_scale_unregister_client(bus_client);
-}
-
-static void set_bw(int mbps)
-{
- static int cur_idx, cur_ab, cur_ib;
- int new_ab, new_ib;
- int i, ret;
-
- if (!io_percent)
- io_percent = 1;
- new_ab = roundup(mbps, bw_step);
- new_ib = mbps * 100 / io_percent;
- new_ib = roundup(new_ib, bw_step);
-
- if (cur_ib == new_ib && cur_ab == new_ab)
- return;
-
- i = (cur_idx + 1) % ARRAY_SIZE(bw_levels);
-
- bw_levels[i].vectors[0].ib = new_ib * 1000000ULL;
- bw_levels[i].vectors[0].ab = new_ab * 1000000ULL;
- bw_levels[i].vectors[1].ib = new_ib * 1000000ULL;
- bw_levels[i].vectors[1].ab = new_ab * 1000000ULL;
-
- pr_debug("BW MBps: Req: %d AB: %d IB: %d\n", mbps, new_ab, new_ib);
-
- ret = msm_bus_scale_client_update_request(bus_client, i);
- if (ret)
- pr_err("bandwidth request failed (%d)\n", ret);
- else {
- cur_idx = i;
- cur_ib = new_ib;
- cur_ab = new_ab;
- }
-}
-
-static void compute_bw(int mbps)
-{
- static int cur_bw;
- int new_bw;
-
- mbps += guard_band_mbps;
-
- if (mbps > cur_bw) {
- new_bw = mbps;
- } else {
- new_bw = mbps * decay_rate + cur_bw * (100 - decay_rate);
- new_bw /= 100;
- }
-
- if (new_bw == cur_bw)
- return;
-
- set_bw(new_bw);
- cur_bw = new_bw;
-}
-
-static int to_limit(int mbps)
-{
- mbps *= (100 + tolerance_percent) * sample_ms;
- mbps /= 100;
- mbps = DIV_ROUND_UP(mbps, MSEC_PER_SEC);
- return mbps;
-}
-
-static void measure_bw(void)
-{
- int r_mbps, w_mbps, mbps;
- ktime_t ts;
- unsigned int us;
-
- mutex_lock(&bw_lock);
-
- /*
- * Since we are stopping the counters, we don't want this short work
- * to be interrupted by other tasks and cause the measurements to be
- * wrong. Not blocking interrupts to avoid affecting interrupt
- * latency and since they should be short anyway because they run in
- * atomic context.
- */
- preempt_disable();
-
- ts = ktime_get();
- us = ktime_to_us(ktime_sub(ts, prev_ts));
- if (!us)
- us = 1;
-
- mon_disable(0);
- mon_disable(1);
-
- r_mbps = mon_get_mbps(0, prev_r_start_val, us);
- w_mbps = mon_get_mbps(1, prev_w_start_val, us);
-
- prev_r_start_val = mon_set_limit_mbyte(0, to_limit(r_mbps));
- prev_w_start_val = mon_set_limit_mbyte(1, to_limit(w_mbps));
-
- mon_enable(0);
- mon_enable(1);
-
- preempt_enable();
-
- mbps = r_mbps + w_mbps;
- pr_debug("R/W/BW/us = %d/%d/%d/%d\n", r_mbps, w_mbps, mbps, us);
- compute_bw(mbps);
-
- prev_ts = ts;
- mutex_unlock(&bw_lock);
-}
-
-static void do_bw_sample(struct work_struct *work)
-{
- measure_bw();
- queue_delayed_work(bw_sample_wq, &bw_sample,
- msecs_to_jiffies(sample_ms));
-}
-
-static irqreturn_t mon_intr_handler(int irq, void *dev_id)
-{
- bool pending;
- u32 regval;
-
- regval = get_l2_indirect_reg(L2PMOVSR);
- pr_debug("Got interrupt: %x\n", regval);
-
- pending = cancel_delayed_work_sync(&bw_sample);
-
- /*
- * Don't recalc bandwidth if the interrupt came just after the end
- * of the sample period (!pending). This is done for two reasons:
- *
- * 1. Sampling the BW during a very short duration can result in a
- * very inaccurate measurement due to very short bursts.
- * 2. If the limit was hit very close to the sample period, then the
- * current BW estimate is not very off and can stay as such.
- */
- if (pending)
- measure_bw();
-
- queue_delayed_work(bw_sample_wq, &bw_sample,
- msecs_to_jiffies(sample_ms));
-
- return IRQ_HANDLED;
-}
-
-static int set_enable(const char *arg, const struct kernel_param *kp)
-{
- int ret;
- bool old_val = *((bool *) kp->arg);
- bool new_val;
-
- if (!arg)
- arg = "1";
- ret = strtobool(arg, &new_val);
- if (ret)
- return ret;
-
- if (!old_val && new_val) {
- if (start_monitoring()) {
- pr_err("L2PM counters already in use.\n");
- return ret;
- } else {
- pr_info("Enabling CPU BW monitoring\n");
- }
- } else if (old_val && !new_val) {
- pr_info("Disabling CPU BW monitoring\n");
- stop_monitoring();
- }
-
- *(bool *) kp->arg = new_val;
- return 0;
-}
-
-static struct kernel_param_ops enable_ops = {
- .set = set_enable,
- .get = param_get_bool,
-};
-
-static int cpubw_krait_init(void)
-{
- bw_sample_wq = alloc_workqueue("cpubw-krait", WQ_HIGHPRI, 0);
- if (!bw_sample_wq)
- return -ENOMEM;
-
- bus_client = msm_bus_scale_register_client(&bw_data);
- if (!bus_client) {
- pr_err("Unable to register bus client\n");
- destroy_workqueue(bw_sample_wq);
- return -ENODEV;
- }
-
- return 0;
-}
-late_initcall(cpubw_krait_init);
-
-MODULE_DESCRIPTION("CPU DDR bandwidth voting driver for Krait CPUs");
-MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/mach-msm/cpufreq.c b/arch/arm/mach-msm/cpufreq.c
index 60856c2..46505e0 100644
--- a/arch/arm/mach-msm/cpufreq.c
+++ b/arch/arm/mach-msm/cpufreq.c
@@ -32,7 +32,7 @@
#include <linux/platform_device.h>
#include <trace/events/power.h>
#include <mach/socinfo.h>
-#include <mach/msm_bus.h>
+#include <mach/cpufreq.h>
#include "acpuclock.h"
@@ -47,16 +47,12 @@
static struct clk *cpu_clk[NR_CPUS];
static struct clk *l2_clk;
static unsigned int freq_index[NR_CPUS];
+static unsigned int max_freq_index;
static struct cpufreq_frequency_table *freq_table;
static unsigned int *l2_khz;
static bool is_clk;
static bool is_sync;
-static struct msm_bus_vectors *bus_vec_lst;
-static struct msm_bus_scale_pdata bus_bw = {
- .name = "msm-cpufreq",
- .active_only = 1,
-};
-static u32 bus_client;
+static unsigned long *mem_bw;
struct cpufreq_work_struct {
struct work_struct work;
@@ -77,6 +73,11 @@
static DEFINE_PER_CPU(struct cpufreq_suspend_t, cpufreq_suspend);
+unsigned long msm_cpufreq_get_bw(void)
+{
+ return mem_bw[max_freq_index];
+}
+
static void update_l2_bw(int *also_cpu)
{
int rc = 0, cpu;
@@ -98,10 +99,10 @@
goto out;
}
- if (bus_client)
- rc = msm_bus_scale_client_update_request(bus_client, index);
+ max_freq_index = index;
+ rc = devfreq_msm_cpufreq_update_bw();
if (rc)
- pr_err("Bandwidth req failed (%d)\n", rc);
+ pr_err("Unable to update BW (%d)\n", rc);
out:
mutex_unlock(&l2bw_lock);
@@ -253,6 +254,14 @@
|| cpu_is_msm8610() || (is_clk && is_sync))
cpumask_setall(policy->cpus);
+ cpu_work = &per_cpu(cpufreq_work, policy->cpu);
+ INIT_WORK(&cpu_work->work, set_cpu_work);
+ init_completion(&cpu_work->complete);
+
+ /* synchronous cpus share the same policy */
+ if (!cpu_clk[policy->cpu])
+ return 0;
+
if (cpufreq_frequency_table_cpuinfo(policy, table)) {
#ifdef CONFIG_MSM_CPU_FREQ_SET_MIN_MAX
policy->cpuinfo.min_freq = CONFIG_MSM_CPU_FREQ_MIN;
@@ -291,10 +300,6 @@
policy->cpuinfo.transition_latency =
acpuclk_get_switch_time() * NSEC_PER_USEC;
- cpu_work = &per_cpu(cpufreq_work, policy->cpu);
- INIT_WORK(&cpu_work->work, set_cpu_work);
- init_completion(&cpu_work->complete);
-
return 0;
}
@@ -397,33 +402,14 @@
};
#define PROP_TBL "qcom,cpufreq-table"
-#define PROP_PORTS "qcom,cpu-mem-ports"
static int cpufreq_parse_dt(struct device *dev)
{
- int ret, len, nf, num_cols = 1, num_paths = 0, i, j, k;
- u32 *data, *ports = NULL;
- struct msm_bus_vectors *v = NULL;
+ int ret, len, nf, num_cols = 2, i, j;
+ u32 *data;
if (l2_clk)
num_cols++;
- /* Parse optional bus ports parameter */
- if (of_find_property(dev->of_node, PROP_PORTS, &len)) {
- len /= sizeof(*ports);
- if (len % 2)
- return -EINVAL;
-
- ports = devm_kzalloc(dev, len * sizeof(*ports), GFP_KERNEL);
- if (!ports)
- return -ENOMEM;
- ret = of_property_read_u32_array(dev->of_node, PROP_PORTS,
- ports, len);
- if (ret)
- return ret;
- num_paths = len / 2;
- num_cols++;
- }
-
/* Parse CPU freq -> L2/Mem BW map table. */
if (!of_find_property(dev->of_node, PROP_TBL, &len))
return -EINVAL;
@@ -444,7 +430,9 @@
/* Allocate all data structures. */
freq_table = devm_kzalloc(dev, (nf + 1) * sizeof(*freq_table),
GFP_KERNEL);
- if (!freq_table)
+ mem_bw = devm_kzalloc(dev, nf * sizeof(*mem_bw), GFP_KERNEL);
+
+ if (!freq_table || !mem_bw)
return -ENOMEM;
if (l2_clk) {
@@ -453,15 +441,6 @@
return -ENOMEM;
}
- if (num_paths) {
- int sz_u = nf * sizeof(*bus_bw.usecase);
- int sz_v = nf * num_paths * sizeof(*bus_vec_lst);
- bus_bw.usecase = devm_kzalloc(dev, sz_u, GFP_KERNEL);
- v = bus_vec_lst = devm_kzalloc(dev, sz_v, GFP_KERNEL);
- if (!bus_bw.usecase || !bus_vec_lst)
- return -ENOMEM;
- }
-
j = 0;
for (i = 0; i < nf; i++) {
unsigned long f;
@@ -504,25 +483,12 @@
}
}
- if (num_paths) {
- unsigned int bw_mbps = data[j++];
- bus_bw.usecase[i].num_paths = num_paths;
- bus_bw.usecase[i].vectors = v;
- for (k = 0; k < num_paths; k++) {
- v->src = ports[k * 2];
- v->dst = ports[k * 2 + 1];
- v->ib = bw_mbps * 1000000ULL;
- v++;
- }
- }
+ mem_bw[i] = data[j++];
}
- bus_bw.num_usecases = i;
freq_table[i].index = i;
freq_table[i].frequency = CPUFREQ_TABLE_END;
- if (ports)
- devm_kfree(dev, ports);
devm_kfree(dev, data);
return 0;
@@ -532,15 +498,12 @@
static int msm_cpufreq_show(struct seq_file *m, void *unused)
{
unsigned int i, cpu_freq;
- uint64_t ib;
if (!freq_table)
return 0;
seq_printf(m, "%10s%10s", "CPU (KHz)", "L2 (KHz)");
- if (bus_bw.usecase)
- seq_printf(m, "%12s", "Mem (MBps)");
- seq_printf(m, "\n");
+ seq_printf(m, "%12s\n", "Mem (MBps)");
for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
cpu_freq = freq_table[i].frequency;
@@ -548,11 +511,7 @@
continue;
seq_printf(m, "%10d", cpu_freq);
seq_printf(m, "%10d", l2_khz ? l2_khz[i] : cpu_freq);
- if (bus_bw.usecase) {
- ib = bus_bw.usecase[i].vectors[0].ib;
- do_div(ib, 1000000);
- seq_printf(m, "%12llu", ib);
- }
+ seq_printf(m, "%12lu", mem_bw[i]);
seq_printf(m, "\n");
}
return 0;
@@ -602,10 +561,10 @@
cpufreq_frequency_table_get_attr(freq_table, cpu);
}
- if (bus_bw.usecase) {
- bus_client = msm_bus_scale_register_client(&bus_bw);
- if (!bus_client)
- dev_warn(dev, "Unable to register bus client\n");
+ ret = register_devfreq_msm_cpufreq();
+ if (ret) {
+ pr_err("devfreq governor registration failed\n");
+ return ret;
}
is_clk = true;
diff --git a/arch/arm/mach-msm/devfreq_cpubw.c b/arch/arm/mach-msm/devfreq_cpubw.c
new file mode 100644
index 0000000..20cabc2
--- /dev/null
+++ b/arch/arm/mach-msm/devfreq_cpubw.c
@@ -0,0 +1,221 @@
+/*
+ * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#define pr_fmt(fmt) "cpubw: " fmt
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/ktime.h>
+#include <linux/time.h>
+#include <linux/err.h>
+#include <linux/errno.h>
+#include <linux/mutex.h>
+#include <linux/interrupt.h>
+#include <linux/devfreq.h>
+#include <linux/of.h>
+#include <trace/events/power.h>
+#include <mach/msm_bus.h>
+#include <mach/msm_bus_board.h>
+
+/* Has to be ULL to prevent overflow where this macro is used. */
+#define MBYTE (1ULL << 20)
+#define MAX_PATHS 2
+
+static struct msm_bus_vectors vectors[MAX_PATHS * 2];
+static struct msm_bus_paths bw_levels[] = {
+ { .vectors = &vectors[0] },
+ { .vectors = &vectors[MAX_PATHS] },
+};
+static struct msm_bus_scale_pdata bw_data = {
+ .usecase = bw_levels,
+ .num_usecases = ARRAY_SIZE(bw_levels),
+ .name = "devfreq_cpubw",
+ .active_only = 1,
+};
+static int num_paths;
+static u32 bus_client;
+
+static int set_bw(int new_ib, int new_ab)
+{
+ static int cur_idx, cur_ab, cur_ib;
+ int i, ret;
+
+ if (cur_ib == new_ib && cur_ab == new_ab)
+ return 0;
+
+ i = (cur_idx + 1) % ARRAY_SIZE(bw_levels);
+
+ bw_levels[i].vectors[0].ib = new_ib * MBYTE;
+ bw_levels[i].vectors[0].ab = new_ab / num_paths * MBYTE;
+ bw_levels[i].vectors[1].ib = new_ib * MBYTE;
+ bw_levels[i].vectors[1].ab = new_ab / num_paths * MBYTE;
+
+ pr_debug("BW MBps: AB: %d IB: %d\n", new_ab, new_ib);
+
+ ret = msm_bus_scale_client_update_request(bus_client, i);
+ if (ret) {
+ pr_err("bandwidth request failed (%d)\n", ret);
+ } else {
+ cur_idx = i;
+ cur_ib = new_ib;
+ cur_ab = new_ab;
+ }
+
+ return ret;
+}
+
+static void find_freq(struct devfreq_dev_profile *p, unsigned long *freq,
+ u32 flags)
+{
+ int i;
+ unsigned long atmost, atleast, f;
+
+ atmost = p->freq_table[0];
+ atleast = p->freq_table[p->max_state-1];
+ for (i = 0; i < p->max_state; i++) {
+ f = p->freq_table[i];
+ if (f <= *freq)
+ atmost = max(f, atmost);
+ if (f >= *freq)
+ atleast = min(f, atleast);
+ }
+
+ if (flags & DEVFREQ_FLAG_LEAST_UPPER_BOUND)
+ *freq = atmost;
+ else
+ *freq = atleast;
+}
+
+struct devfreq_dev_profile cpubw_profile;
+static long gov_ab;
+
+int cpubw_target(struct device *dev, unsigned long *freq, u32 flags)
+{
+ find_freq(&cpubw_profile, freq, flags);
+ return set_bw(*freq, gov_ab);
+}
+
+static struct devfreq_governor_data gov_data[] = {
+ { .name = "performance" },
+ { .name = "powersave" },
+ { .name = "userspace" },
+ { .name = "msm_cpufreq" },
+ { .name = "cpubw_hwmon", .data = &gov_ab },
+};
+
+struct devfreq_dev_profile cpubw_profile = {
+ .polling_ms = 50,
+ .target = cpubw_target,
+ .governor_data = gov_data,
+ .num_governor_data = ARRAY_SIZE(gov_data),
+};
+
+#define PROP_PORTS "qcom,cpu-mem-ports"
+#define PROP_TBL "qcom,bw-tbl"
+
+static int __init cpubw_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct devfreq_dev_profile *p = &cpubw_profile;
+ struct devfreq *df;
+ u32 *data, ports[MAX_PATHS * 2];
+ int ret, len, i;
+
+ if (of_find_property(dev->of_node, PROP_PORTS, &len)) {
+ len /= sizeof(ports[0]);
+ if (len % 2 || len > ARRAY_SIZE(ports)) {
+ dev_err(dev, "Unexpected number of ports\n");
+ return -EINVAL;
+ }
+
+ ret = of_property_read_u32_array(dev->of_node, PROP_PORTS,
+ ports, len);
+ if (ret)
+ return ret;
+
+ num_paths = len / 2;
+ } else {
+ return -EINVAL;
+ }
+
+ for (i = 0; i < num_paths; i++) {
+ bw_levels[0].vectors[i].src = ports[2 * i];
+ bw_levels[0].vectors[i].dst = ports[2 * i + 1];
+ bw_levels[1].vectors[i].src = ports[2 * i];
+ bw_levels[1].vectors[i].dst = ports[2 * i + 1];
+ }
+ bw_levels[0].num_paths = num_paths;
+ bw_levels[1].num_paths = num_paths;
+
+ if (of_find_property(dev->of_node, PROP_TBL, &len)) {
+ len /= sizeof(*data);
+ data = devm_kzalloc(dev, len * sizeof(*data), GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+
+ p->freq_table = devm_kzalloc(dev,
+ len * sizeof(*p->freq_table),
+ GFP_KERNEL);
+ if (!p->freq_table)
+ return -ENOMEM;
+
+ ret = of_property_read_u32_array(dev->of_node, PROP_TBL,
+ data, len);
+ if (ret)
+ return ret;
+
+ for (i = 0; i < len; i++)
+ p->freq_table[i] = data[i];
+ p->max_state = len;
+ }
+
+ bus_client = msm_bus_scale_register_client(&bw_data);
+ if (!bus_client) {
+ dev_err(dev, "Unable to register bus client\n");
+ return -ENODEV;
+ }
+
+ df = devfreq_add_device(dev, &cpubw_profile, "msm_cpufreq", NULL);
+ if (IS_ERR(df)) {
+ msm_bus_scale_unregister_client(bus_client);
+ return PTR_ERR(df);
+ }
+
+ return 0;
+}
+
+static struct of_device_id match_table[] = {
+ { .compatible = "qcom,cpubw" },
+ {}
+};
+
+static struct platform_driver cpubw_driver = {
+ .driver = {
+ .name = "cpubw",
+ .of_match_table = match_table,
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init cpubw_init(void)
+{
+ platform_driver_probe(&cpubw_driver, cpubw_probe);
+ return 0;
+}
+device_initcall(cpubw_init);
+
+MODULE_DESCRIPTION("CPU DDR bandwidth voting driver MSM CPUs");
+MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/mach-msm/gpiomux.c b/arch/arm/mach-msm/gpiomux.c
index 1f7d56a..06eb6dc 100644
--- a/arch/arm/mach-msm/gpiomux.c
+++ b/arch/arm/mach-msm/gpiomux.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010,2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010,2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -123,6 +123,11 @@
}
EXPORT_SYMBOL(msm_gpiomux_put);
+int msm_tlmm_misc_reg_read(enum msm_tlmm_misc_reg misc_reg)
+{
+ return readl_relaxed(MSM_TLMM_BASE + misc_reg);
+}
+
void msm_tlmm_misc_reg_write(enum msm_tlmm_misc_reg misc_reg, int val)
{
writel_relaxed(val, MSM_TLMM_BASE + misc_reg);
diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h
index 6370bd4..47c07ff 100644
--- a/arch/arm/mach-msm/include/mach/board.h
+++ b/arch/arm/mach-msm/include/mach/board.h
@@ -513,6 +513,10 @@
/**
* msm_i2c_platform_data: i2c-qup driver configuration data
*
+ * @clk_ctl_xfer : When true, the clocks's state (prepare_enable/
+ * unprepare_disable) is controlled by i2c-transaction's begining and
+ * ending. When false, the clock's state is controlled by runtime-pm
+ * events.
* @active_only when set, votes when system active and removes the vote when
* system goes idle (optimises for performance). When unset, voting using
* runtime pm (optimizes for power).
@@ -521,6 +525,7 @@
*/
struct msm_i2c_platform_data {
int clk_freq;
+ bool clk_ctl_xfer;
uint32_t rmutex;
const char *rsl_id;
uint32_t pm_lat;
diff --git a/arch/arm/mach-msm/include/mach/cpufreq.h b/arch/arm/mach-msm/include/mach/cpufreq.h
new file mode 100644
index 0000000..46872d7
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/cpufreq.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2013 The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef __MACH_CPUFREQ_H
+#define __MACH_CPUFREQ_H
+
+#if defined(CONFIG_DEVFREQ_GOV_MSM_CPUFREQ)
+extern int devfreq_msm_cpufreq_update_bw(void);
+extern int register_devfreq_msm_cpufreq(void);
+#else
+static int devfreq_msm_cpufreq_update_bw(void)
+{
+ return 0;
+}
+static int register_devfreq_msm_cpufreq(void)
+{
+ return 0;
+}
+#endif
+
+#if defined(CONFIG_CPU_FREQ_MSM)
+extern unsigned long msm_cpufreq_get_bw(void);
+#else
+extern unsigned long msm_cpufreq_get_bw(void)
+{
+ return ULONG_MAX;
+}
+#endif
+
+#endif
diff --git a/arch/arm/mach-msm/include/mach/ecm_ipa.h b/arch/arm/mach-msm/include/mach/ecm_ipa.h
index f6afb2a..cdcb8d8 100644
--- a/arch/arm/mach-msm/include/mach/ecm_ipa.h
+++ b/arch/arm/mach-msm/include/mach/ecm_ipa.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -40,6 +40,8 @@
* with ecm_ipa APIs
* @host_ethaddr: host Ethernet address in network order
* @device_ethaddr: device Ethernet address in network order
+ * @skip_ep_cfg: boolean field that determines if Apps-processor
+ * should or should not configure this end-point.
*/
struct ecm_ipa_params {
ecm_ipa_callback ecm_ipa_rx_dp_notify;
@@ -47,6 +49,7 @@
u8 host_ethaddr[ETH_ALEN];
u8 device_ethaddr[ETH_ALEN];
void *private;
+ bool skip_ep_cfg;
};
diff --git a/arch/arm/mach-msm/include/mach/gpiomux.h b/arch/arm/mach-msm/include/mach/gpiomux.h
index 122ffaa..2278677 100644
--- a/arch/arm/mach-msm/include/mach/gpiomux.h
+++ b/arch/arm/mach-msm/include/mach/gpiomux.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011,2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2011,2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -118,8 +118,6 @@
TLMM_CDC_HDRV_PULL_CTL = 0x2058,
};
-void msm_tlmm_misc_reg_write(enum msm_tlmm_misc_reg misc_reg, int val);
-
#ifdef CONFIG_MSM_GPIOMUX
/* Before using gpiomux, initialize the subsystem by telling it how many
@@ -170,6 +168,14 @@
* should use msm_gpiomux_write.
*/
void __msm_gpiomux_write(unsigned gpio, struct gpiomux_setting val);
+
+/* Functions that provide an API for drivers to read from and write to
+ * miscellaneous TLMM registers.
+ */
+int msm_tlmm_misc_reg_read(enum msm_tlmm_misc_reg misc_reg);
+
+void msm_tlmm_misc_reg_write(enum msm_tlmm_misc_reg misc_reg, int val);
+
#else
static inline int msm_gpiomux_init(size_t ngpio)
{
@@ -195,5 +201,16 @@
{
return -ENOSYS;
}
+
+static inline int msm_tlmm_misc_reg_read(enum msm_tlmm_misc_reg misc_reg)
+{
+ return -ENOSYS;
+}
+
+static inline void msm_tlmm_misc_reg_write(enum msm_tlmm_misc_reg misc_reg,
+ int val)
+{
+}
+
#endif
#endif
diff --git a/arch/arm/mach-msm/include/mach/msm-krait-l2-accessors.h b/arch/arm/mach-msm/include/mach/msm-krait-l2-accessors.h
index a35ff4d..45d000b 100644
--- a/arch/arm/mach-msm/include/mach/msm-krait-l2-accessors.h
+++ b/arch/arm/mach-msm/include/mach/msm-krait-l2-accessors.h
@@ -2,7 +2,7 @@
#define __ASM_ARCH_MSM_MSM_KRAIT_L2_ACCESSORS_H
/*
- * Copyright (c) 2011,2012, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2011-2013 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -14,6 +14,55 @@
* GNU General Public License for more details.
*/
+#define MAX_L2_PERIOD ((1ULL << 32) - 1)
+#define MAX_KRAIT_L2_CTRS 10
+
+#define PMCR_NUM_EV_SHIFT 11
+#define PMCR_NUM_EV_MASK 0x1f
+
+#define L2_EVT_MASK 0xfffff
+
+#define L2_SLAVE_EV_PREFIX 4
+#define L2_TRACECTR_PREFIX 5
+
+#define L2PMCCNTR 0x409
+#define L2PMCCNTCR 0x408
+#define L2PMCCNTSR 0x40A
+#define L2CYCLE_CTR_BIT 31
+#define L2CYCLE_CTR_RAW_CODE 0xfe
+
+#define L2PMOVSR 0x406
+
+#define L2PMCR 0x400
+#define L2PMCR_RESET_ALL 0x6
+#define L2PMCR_GLOBAL_ENABLE 0x1
+#define L2PMCR_GLOBAL_DISABLE 0x0
+
+#define L2PMCNTENSET 0x403
+#define L2PMCNTENCLR 0x402
+
+#define L2PMINTENSET 0x405
+#define L2PMINTENCLR 0x404
+
+#define IA_L2PMXEVCNTCR_BASE 0x420
+#define IA_L2PMXEVTYPER_BASE 0x424
+#define IA_L2PMRESX_BASE 0x410
+#define IA_L2PMXEVFILTER_BASE 0x423
+#define IA_L2PMXEVCNTR_BASE 0x421
+
+/* event format is -e rsRCCG See get_event_desc() */
+
+#define EVENT_PREFIX_MASK 0xf0000
+#define EVENT_REG_MASK 0x0f000
+#define EVENT_GROUPSEL_MASK 0x0000f
+#define EVENT_GROUPCODE_MASK 0x00ff0
+
+#define EVENT_PREFIX_SHIFT 16
+#define EVENT_REG_SHIFT 12
+#define EVENT_GROUPCODE_SHIFT 4
+
+#define RESRX_VALUE_EN 0x80000000
+
#ifdef CONFIG_ARCH_MSM_KRAIT
extern void set_l2_indirect_reg(u32 reg_addr, u32 val);
extern u32 get_l2_indirect_reg(u32 reg_addr);
diff --git a/arch/arm/mach-msm/include/mach/msm_bus_board.h b/arch/arm/mach-msm/include/mach/msm_bus_board.h
index ef835b8..bc22517 100644
--- a/arch/arm/mach-msm/include/mach/msm_bus_board.h
+++ b/arch/arm/mach-msm/include/mach/msm_bus_board.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -41,6 +41,7 @@
int hw_sel;
void *hw_data;
uint32_t qos_freq;
+ uint32_t qos_baseoffset;
bool virt;
};
diff --git a/arch/arm/mach-msm/include/mach/qdsp6v2/usf.h b/arch/arm/mach-msm/include/mach/qdsp6v2/usf.h
index 9a27fd2..faf50d2 100644
--- a/arch/arm/mach-msm/include/mach/qdsp6v2/usf.h
+++ b/arch/arm/mach-msm/include/mach/qdsp6v2/usf.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -132,13 +132,6 @@
uint8_t *params_data;
};
-/* Input events sources */
-enum us_input_event_src_type {
- US_INPUT_SRC_PEN,
- US_INPUT_SRC_FINGER,
- US_INPUT_SRC_UNDEF
-};
-
struct us_input_info_type {
/* Touch screen dimensions: min & max;for input module */
int tsc_x_dim[MIN_MAX_DIM];
@@ -149,12 +142,10 @@
int tsc_y_tilt[MIN_MAX_DIM];
/* Touch screen pressure limits: min & max; for input module */
int tsc_pressure[MIN_MAX_DIM];
- /* The requested side buttons bitmap */
- uint16_t req_side_buttons_bitmap;
+ /* The requested buttons bitmap */
+ uint16_t req_buttons_bitmap;
/* Bitmap of types of events (USF_X_EVENT), produced by calculator */
uint16_t event_types;
- /* Input event source */
- enum us_input_event_src_type event_src;
/* Bitmap of types of events from devs, conflicting with USF */
uint16_t conflicting_event_types;
};
@@ -179,8 +170,8 @@
int inclinations[TILTS_DIM];
/* [0-1023] (10bits); 0 - pen up */
uint32_t pressure;
-/* Bitmap for side button state. 1 - down, 0 - up */
- uint16_t side_buttons_state_bitmap;
+/* Bitmap for button state. 1 - down, 0 - up */
+ uint16_t buttons_state_bitmap;
};
/* Mouse buttons, supported by USF */
diff --git a/arch/arm/mach-msm/include/mach/qseecomi.h b/arch/arm/mach-msm/include/mach/qseecomi.h
index 688dea0..222a171 100644
--- a/arch/arm/mach-msm/include/mach/qseecomi.h
+++ b/arch/arm/mach-msm/include/mach/qseecomi.h
@@ -18,13 +18,15 @@
#define QSEECOM_KEY_ID_SIZE 32
-#define QSEOS_RESULT_FAIL_LOAD_KS -57
-#define QSEOS_RESULT_FAIL_SAVE_KS -58
-#define QSEOS_RESULT_FAIL_MAX_KEYS -59
-#define QSEOS_RESULT_FAIL_KEY_ID_EXISTS -60
-#define QSEOS_RESULT_FAIL_KEY_ID_DNE -61
-#define QSEOS_RESULT_FAIL_KS_OP -62
-#define QSEOS_RESULT_FAIL_CE_PIPE_INVALID -63
+#define QSEOS_RESULT_FAIL_UNSUPPORTED_CE_PIPE -63
+#define QSEOS_RESULT_FAIL_KS_OP -64
+#define QSEOS_RESULT_FAIL_KEY_ID_EXISTS -65
+#define QSEOS_RESULT_FAIL_MAX_KEYS -66
+#define QSEOS_RESULT_FAIL_SAVE_KS -67
+#define QSEOS_RESULT_FAIL_LOAD_KS -68
+#define QSEOS_RESULT_FAIL_KS_ALREADY_DONE -69
+#define QSEOS_RESULT_FAIL_KEY_ID_DNE -70
+#define QSEOS_RESULT_FAIL_INCORRECT_PSWD -71
enum qseecom_command_scm_resp_type {
QSEOS_APP_ID = 0xEE01,
@@ -52,6 +54,7 @@
QSEOS_DELETE_KEY,
QSEOS_MAX_KEY_COUNT,
QSEOS_SET_KEY,
+ QSEOS_UPDATE_KEY_USERINFO,
QSEOS_CMD_MAX = 0xEFFFFFFF
};
@@ -166,6 +169,7 @@
uint32_t qsee_command_id;
uint32_t flags;
uint8_t key_id[QSEECOM_KEY_ID_SIZE];
+ uint8_t hash32[QSEECOM_HASH_SIZE];
};
__packed struct qseecom_key_select_ireq {
@@ -175,13 +179,23 @@
uint32_t pipe_type;
uint32_t flags;
uint8_t key_id[QSEECOM_KEY_ID_SIZE];
- unsigned char hash[QSEECOM_HASH_SIZE];
+ uint8_t hash32[QSEECOM_HASH_SIZE];
};
__packed struct qseecom_key_delete_ireq {
uint32_t qsee_command_id;
uint32_t flags;
uint8_t key_id[QSEECOM_KEY_ID_SIZE];
+ uint8_t hash32[QSEECOM_HASH_SIZE];
+
+};
+
+__packed struct qseecom_key_userinfo_update_ireq {
+ uint32_t qsee_command_id;
+ uint32_t flags;
+ uint8_t key_id[QSEECOM_KEY_ID_SIZE];
+ uint8_t current_hash32[QSEECOM_HASH_SIZE];
+ uint8_t new_hash32[QSEECOM_HASH_SIZE];
};
__packed struct qseecom_key_max_count_query_ireq {
@@ -192,10 +206,5 @@
uint32_t max_key_count;
};
-struct key_id_info {
- uint32_t ce_hw;
- uint32_t pipe;
- bool flags;
-};
#endif /* __QSEECOMI_H_ */
diff --git a/arch/arm/mach-msm/include/mach/socinfo.h b/arch/arm/mach-msm/include/mach/socinfo.h
index 6b3d590..aeb32f8 100644
--- a/arch/arm/mach-msm/include/mach/socinfo.h
+++ b/arch/arm/mach-msm/include/mach/socinfo.h
@@ -44,6 +44,7 @@
#define of_board_is_qrd() of_machine_is_compatible("qcom,qrd")
#define of_board_is_xpm() of_machine_is_compatible("qcom,xpm")
#define of_board_is_skuf() of_machine_is_compatible("qcom,skuf")
+#define of_board_is_sbc() of_machine_is_compatible("qcom,sbc")
#define machine_is_msm8974() of_machine_is_compatible("qcom,msm8974")
#define machine_is_msm9625() of_machine_is_compatible("qcom,msm9625")
@@ -75,6 +76,7 @@
#define of_board_is_qrd() 0
#define of_board_is_xpm() 0
#define of_board_is_skuf() 0
+#define of_board_is_sbc() 0
#define machine_is_msm8974() 0
#define machine_is_msm9625() 0
diff --git a/arch/arm/mach-msm/lpm_levels.c b/arch/arm/mach-msm/lpm_levels.c
index 06160f7..7553f82 100644
--- a/arch/arm/mach-msm/lpm_levels.c
+++ b/arch/arm/mach-msm/lpm_levels.c
@@ -271,7 +271,7 @@
{
int best_level = -1;
int i;
- uint32_t best_level_pwr = ~0UL;
+ uint32_t best_level_pwr = ~0U;
uint32_t pwr;
uint32_t latency_us = pm_qos_request(PM_QOS_CPU_DMA_LATENCY);
@@ -490,7 +490,7 @@
static noinline int lpm_cpu_power_select(struct cpuidle_device *dev, int *index)
{
int best_level = -1;
- uint32_t best_level_pwr = ~0UL;
+ uint32_t best_level_pwr = ~0U;
uint32_t latency_us = pm_qos_request(PM_QOS_CPU_DMA_LATENCY);
uint32_t sleep_us =
(uint32_t)(ktime_to_us(tick_nohz_get_sleep_length()));
@@ -720,8 +720,6 @@
int idx;
struct lpm_cpu_level *cpu_level = &system_state->cpu_level[cpu_index];
- cpu_level = &system_state->cpu_level[cpu_index];
-
lpm_cpu_prepare(system_state, cpu_index, from_idle);
idx = lpm_system_select(system_state, cpu_index, from_idle);
diff --git a/arch/arm/mach-msm/msm-pm.c b/arch/arm/mach-msm/msm-pm.c
index fab86d3..865cd0a 100644
--- a/arch/arm/mach-msm/msm-pm.c
+++ b/arch/arm/mach-msm/msm-pm.c
@@ -777,7 +777,7 @@
return 0;
if (!msm_pm_slp_sts[cpu].base_addr)
return 0;
- while (timeout--) {
+ while (1) {
/*
* Check for the SPM of the core being hotplugged to set
* its sleep state.The SPM sleep state indicates that the
@@ -788,10 +788,9 @@
if (acc_sts & msm_pm_slp_sts[cpu].mask)
return 0;
udelay(100);
+ WARN(++timeout == 20, "CPU%u didn't collapse in 2 ms\n", cpu);
}
- pr_info("%s(): Timed out waiting for CPU %u SPM to enter sleep state",
- __func__, cpu);
return -EBUSY;
}
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_arb.c b/arch/arm/mach-msm/msm_bus/msm_bus_arb.c
index 058e409..72e3ec3 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_arb.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_arb.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -297,6 +297,21 @@
return CREATE_PNODE_ID(src, pnode_num);
}
+static uint64_t get_node_maxib(struct msm_bus_inode_info *info)
+{
+ int i, ctx;
+ uint64_t maxib = 0;
+
+ for (i = 0; i <= info->num_pnodes; i++) {
+ for (ctx = 0; ctx < NUM_CTX; ctx++)
+ maxib = max(info->pnode[i].clk[ctx], maxib);
+ }
+
+ MSM_BUS_DBG("%s: Node %d numpnodes %d maxib %llu", __func__,
+ info->num_pnodes, info->node_info->id, maxib);
+ return maxib;
+}
+
/**
* update_path() - Update the path with the bandwidth and clock values, as
* requested by the client.
@@ -344,15 +359,6 @@
return -ENXIO;
}
- /**
- * If master supports dual configuration, check if
- * the configuration needs to be changed based on
- * incoming requests
- */
- if (info->node_info->dual_conf)
- fabdev->algo->config_master(fabdev, info,
- req_clk, req_bw);
-
info->link_info.sel_bw = &info->link_info.bw[ctx];
info->link_info.sel_clk = &info->link_info.clk[ctx];
*info->link_info.sel_bw += add_bw;
@@ -366,6 +372,19 @@
info->pnode[index].sel_clk = &info->pnode[index].clk[ctx &
cl_active_flag];
*info->pnode[index].sel_bw += add_bw;
+ *info->pnode[index].sel_clk = req_clk;
+
+ /**
+ * If master supports dual configuration, check if
+ * the configuration needs to be changed based on
+ * incoming requests
+ */
+ if (info->node_info->dual_conf) {
+ uint64_t node_maxib = 0;
+ node_maxib = get_node_maxib(info);
+ fabdev->algo->config_master(fabdev, info,
+ node_maxib, req_bw);
+ }
info->link_info.num_tiers = info->node_info->num_tiers;
info->link_info.tier = info->node_info->tier;
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_bimc.c b/arch/arm/mach-msm/msm_bus/msm_bus_bimc.c
index c745f92..a76c29b 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_bimc.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_bimc.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1919,10 +1919,12 @@
qbw.thh = div_s64((110 * bw), 100);
/* Check if info is a shared master.
* If it is, mark it dirty
- * If it isn't, then set QOS Bandwidth
+ * If it isn't, then set QOS Bandwidth.
+ * Also if dual-conf is set, don't program bw regs.
**/
- msm_bus_bimc_set_qos_bw(binfo,
- info->node_info->qport[i], &qbw);
+ if (!info->node_info->dual_conf)
+ msm_bus_bimc_set_qos_bw(binfo,
+ info->node_info->qport[i], &qbw);
}
}
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_noc.c b/arch/arm/mach-msm/msm_bus/msm_bus_noc.c
index 8f7b7f2..479826e 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_noc.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_noc.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -22,12 +22,14 @@
#define __CLZ(x) ((8 * sizeof(uint32_t)) - 1 - __fls(x))
#define SAT_SCALE 16 /* 16 bytes minimum for saturation */
#define BW_SCALE 256 /* 1/256 byte per cycle unit */
+#define QOS_DEFAULT_BASEOFFSET 0x00003000
#define MAX_BW_FIELD (NOC_QOS_BWn_BW_BMSK >> NOC_QOS_BWn_BW_SHFT)
#define MAX_SAT_FIELD (NOC_QOS_SATn_SAT_BMSK >> NOC_QOS_SATn_SAT_SHFT)
-#define NOC_QOS_REG_BASE(b) ((b) + 0x00003000)
+#define NOC_QOS_REG_BASE(b, o) ((b) + (o))
-#define NOC_QOS_ID_COREIDn_ADDR(b, n) (NOC_QOS_REG_BASE(b) + 0x80 * (n))
+#define NOC_QOS_ID_COREIDn_ADDR(b, o, n) \
+ (NOC_QOS_REG_BASE(b, o) + 0x80 * (n))
enum noc_qos_id_coreidn {
NOC_QOS_ID_COREIDn_RMSK = 0xffffffff,
NOC_QOS_ID_COREIDn_MAXn = 32,
@@ -37,8 +39,8 @@
NOC_QOS_ID_COREIDn_CORETYPEID_SHFT = 0x0,
};
-#define NOC_QOS_ID_REVISIONIDn_ADDR(b, n) \
- (NOC_QOS_REG_BASE(b) + 0x4 + 0x80 * (n))
+#define NOC_QOS_ID_REVISIONIDn_ADDR(b, o, n) \
+ (NOC_QOS_REG_BASE(b, o) + 0x4 + 0x80 * (n))
enum noc_qos_id_revisionidn {
NOC_QOS_ID_REVISIONIDn_RMSK = 0xffffffff,
NOC_QOS_ID_REVISIONIDn_MAXn = 32,
@@ -48,8 +50,8 @@
NOC_QOS_ID_REVISIONIDn_USERID_SHFT = 0x0,
};
-#define NOC_QOS_PRIORITYn_ADDR(b, n) \
- (NOC_QOS_REG_BASE(b) + 0x8 + 0x80 * (n))
+#define NOC_QOS_PRIORITYn_ADDR(b, o, n) \
+ (NOC_QOS_REG_BASE(b, o) + 0x8 + 0x80 * (n))
enum noc_qos_id_priorityn {
NOC_QOS_PRIORITYn_RMSK = 0x0000000f,
NOC_QOS_PRIORITYn_MAXn = 32,
@@ -59,8 +61,8 @@
NOC_QOS_PRIORITYn_P0_SHFT = 0x0,
};
-#define NOC_QOS_MODEn_ADDR(b, n) \
- (NOC_QOS_REG_BASE(b) + 0xC + 0x80 * (n))
+#define NOC_QOS_MODEn_ADDR(b, o, n) \
+ (NOC_QOS_REG_BASE(b, o) + 0xC + 0x80 * (n))
enum noc_qos_id_moden_rmsk {
NOC_QOS_MODEn_RMSK = 0x00000003,
NOC_QOS_MODEn_MAXn = 32,
@@ -68,8 +70,8 @@
NOC_QOS_MODEn_MODE_SHFT = 0x0,
};
-#define NOC_QOS_BWn_ADDR(b, n) \
- (NOC_QOS_REG_BASE(b) + 0x10 + 0x80 * (n))
+#define NOC_QOS_BWn_ADDR(b, o, n) \
+ (NOC_QOS_REG_BASE(b, o) + 0x10 + 0x80 * (n))
enum noc_qos_id_bwn {
NOC_QOS_BWn_RMSK = 0x0000ffff,
NOC_QOS_BWn_MAXn = 32,
@@ -78,8 +80,8 @@
};
/* QOS Saturation registers */
-#define NOC_QOS_SATn_ADDR(b, n) \
- (NOC_QOS_REG_BASE(b) + 0x14 + 0x80 * (n))
+#define NOC_QOS_SATn_ADDR(b, o, n) \
+ (NOC_QOS_REG_BASE(b, o) + 0x14 + 0x80 * (n))
enum noc_qos_id_saturationn {
NOC_QOS_SATn_RMSK = 0x000003ff,
NOC_QOS_SATn_MAXn = 32,
@@ -196,10 +198,11 @@
uint32_t reg_val;
reg_val = readl_relaxed(NOC_QOS_MODEn_ADDR(ninfo->base,
- mport)) & NOC_QOS_MODEn_RMSK;
+ ninfo->qos_baseoffset, mport)) & NOC_QOS_MODEn_RMSK;
writel_relaxed(((reg_val & (~(NOC_QOS_MODEn_MODE_BMSK))) |
(mode & NOC_QOS_MODEn_MODE_BMSK)),
- NOC_QOS_MODEn_ADDR(ninfo->base, mport));
+ NOC_QOS_MODEn_ADDR(ninfo->base, ninfo->qos_baseoffset,
+ mport));
}
/* Ensure qos mode is set before exiting */
wmb();
@@ -210,18 +213,23 @@
{
uint32_t reg_val, val;
- reg_val = readl_relaxed(NOC_QOS_PRIORITYn_ADDR(ninfo->base, mport))
- & NOC_QOS_PRIORITYn_RMSK;
+ reg_val = readl_relaxed(NOC_QOS_PRIORITYn_ADDR(ninfo->base,
+ ninfo->qos_baseoffset, mport))
+ & NOC_QOS_PRIORITYn_RMSK;
val = priority->p1 << NOC_QOS_PRIORITYn_P1_SHFT;
writel_relaxed(((reg_val & (~(NOC_QOS_PRIORITYn_P1_BMSK))) |
(val & NOC_QOS_PRIORITYn_P1_BMSK)),
- NOC_QOS_PRIORITYn_ADDR(ninfo->base, mport));
+ NOC_QOS_PRIORITYn_ADDR(ninfo->base, ninfo->qos_baseoffset,
+ mport));
- reg_val = readl_relaxed(NOC_QOS_PRIORITYn_ADDR(ninfo->base, mport))
- & NOC_QOS_PRIORITYn_RMSK;
+ reg_val = readl_relaxed(NOC_QOS_PRIORITYn_ADDR(ninfo->base,
+ ninfo->qos_baseoffset,
+ mport))
+ & NOC_QOS_PRIORITYn_RMSK;
writel_relaxed(((reg_val & (~(NOC_QOS_PRIORITYn_P0_BMSK))) |
(priority->p0 & NOC_QOS_PRIORITYn_P0_BMSK)),
- NOC_QOS_PRIORITYn_ADDR(ninfo->base, mport));
+ NOC_QOS_PRIORITYn_ADDR(ninfo->base, ninfo->qos_baseoffset,
+ mport));
/* Ensure qos priority is set before exiting */
wmb();
}
@@ -251,33 +259,38 @@
* Clear QoS accumulator
**/
mode = readl_relaxed(NOC_QOS_MODEn_ADDR(ninfo->base,
- mport)) & NOC_QOS_MODEn_MODE_BMSK;
+ ninfo->qos_baseoffset, mport))
+ & NOC_QOS_MODEn_MODE_BMSK;
if (mode == NOC_QOS_MODE_REGULATOR || mode ==
NOC_QOS_MODE_LIMITER) {
reg_val = readl_relaxed(NOC_QOS_MODEn_ADDR(ninfo->
- base, mport));
+ base, ninfo->qos_baseoffset, mport));
val = NOC_QOS_MODE_FIXED;
writel_relaxed((reg_val & (~(NOC_QOS_MODEn_MODE_BMSK)))
| (val & NOC_QOS_MODEn_MODE_BMSK),
- NOC_QOS_MODEn_ADDR(ninfo->base, mport));
+ NOC_QOS_MODEn_ADDR(ninfo->base,
+ ninfo->qos_baseoffset, mport));
}
- reg_val = readl_relaxed(NOC_QOS_BWn_ADDR(ninfo->base, mport));
+ reg_val = readl_relaxed(NOC_QOS_BWn_ADDR(ninfo->base,
+ ninfo->qos_baseoffset, mport));
val = bw_val << NOC_QOS_BWn_BW_SHFT;
writel_relaxed(((reg_val & (~(NOC_QOS_BWn_BW_BMSK))) |
(val & NOC_QOS_BWn_BW_BMSK)),
- NOC_QOS_BWn_ADDR(ninfo->base, mport));
+ NOC_QOS_BWn_ADDR(ninfo->base, ninfo->qos_baseoffset,
+ mport));
MSM_BUS_DBG("NOC: BW: Wrote value: 0x%x\n", ((reg_val &
(~NOC_QOS_BWn_BW_BMSK)) | (val &
NOC_QOS_BWn_BW_BMSK)));
reg_val = readl_relaxed(NOC_QOS_SATn_ADDR(ninfo->base,
- mport));
+ ninfo->qos_baseoffset, mport));
val = sat_val << NOC_QOS_SATn_SAT_SHFT;
writel_relaxed(((reg_val & (~(NOC_QOS_SATn_SAT_BMSK))) |
(val & NOC_QOS_SATn_SAT_BMSK)),
- NOC_QOS_SATn_ADDR(ninfo->base, mport));
+ NOC_QOS_SATn_ADDR(ninfo->base, ninfo->qos_baseoffset,
+ mport));
MSM_BUS_DBG("NOC: SAT: Wrote value: 0x%x\n", ((reg_val &
(~NOC_QOS_SATn_SAT_BMSK)) | (val &
@@ -285,10 +298,11 @@
/* Set mode back to what it was initially */
reg_val = readl_relaxed(NOC_QOS_MODEn_ADDR(ninfo->base,
- mport));
+ ninfo->qos_baseoffset, mport));
writel_relaxed((reg_val & (~(NOC_QOS_MODEn_MODE_BMSK)))
| (mode & NOC_QOS_MODEn_MODE_BMSK),
- NOC_QOS_MODEn_ADDR(ninfo->base, mport));
+ NOC_QOS_MODEn_ADDR(ninfo->base, ninfo->qos_baseoffset,
+ mport));
/* Ensure that all writes for bandwidth registers have
* completed before returning
*/
@@ -301,7 +315,8 @@
{
if (NOC_QOS_MODES_ALL_PERM == perm_mode)
return readl_relaxed(NOC_QOS_MODEn_ADDR(ninfo->base,
- mport)) & NOC_QOS_MODEn_MODE_BMSK;
+ ninfo->qos_baseoffset, mport)) &
+ NOC_QOS_MODEn_MODE_BMSK;
else
return 31 - __CLZ(mode &
NOC_QOS_MODES_ALL_PERM);
@@ -311,11 +326,11 @@
uint32_t mport, struct msm_bus_noc_qos_priority *priority)
{
priority->p1 = (readl_relaxed(NOC_QOS_PRIORITYn_ADDR(ninfo->base,
- mport)) & NOC_QOS_PRIORITYn_P1_BMSK) >>
+ ninfo->qos_baseoffset, mport)) & NOC_QOS_PRIORITYn_P1_BMSK) >>
NOC_QOS_PRIORITYn_P1_SHFT;
priority->p0 = (readl_relaxed(NOC_QOS_PRIORITYn_ADDR(ninfo->base,
- mport)) & NOC_QOS_PRIORITYn_P0_BMSK) >>
+ ninfo->qos_baseoffset, mport)) & NOC_QOS_PRIORITYn_P0_BMSK) >>
NOC_QOS_PRIORITYn_P0_SHFT;
}
@@ -325,9 +340,11 @@
if (perm_mode & (NOC_QOS_PERM_MODE_LIMITER |
NOC_QOS_PERM_MODE_REGULATOR)) {
uint32_t bw_val = readl_relaxed(NOC_QOS_BWn_ADDR(ninfo->
- base, mport)) & NOC_QOS_BWn_BW_BMSK;
+ base, ninfo->qos_baseoffset, mport)) &
+ NOC_QOS_BWn_BW_BMSK;
uint32_t sat = readl_relaxed(NOC_QOS_SATn_ADDR(ninfo->
- base, mport)) & NOC_QOS_SATn_SAT_BMSK;
+ base, ninfo->qos_baseoffset, mport)) &
+ NOC_QOS_SATn_SAT_BMSK;
qbw->bw = noc_bw(bw_val, ninfo->qos_freq);
qbw->ws = noc_ws(qbw->bw, sat, ninfo->qos_freq);
@@ -431,6 +448,12 @@
ninfo->nqos_masters = fab_pdata->nmasters;
ninfo->nslaves = fab_pdata->nslaves;
ninfo->qos_freq = fab_pdata->qos_freq;
+
+ if (!fab_pdata->qos_baseoffset)
+ ninfo->qos_baseoffset = QOS_DEFAULT_BASEOFFSET;
+ else
+ ninfo->qos_baseoffset = fab_pdata->qos_baseoffset;
+
ninfo->mas_modes = kzalloc(sizeof(uint32_t) * fab_pdata->nmasters,
GFP_KERNEL);
if (!ninfo->mas_modes) {
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_noc.h b/arch/arm/mach-msm/msm_bus/msm_bus_noc.h
index 00479c6..6ba3a24 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_noc.h
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_noc.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -44,6 +44,7 @@
uint32_t nqos_masters;
uint32_t nslaves;
uint32_t qos_freq; /* QOS Clock in KHz */
+ uint32_t qos_baseoffset;
uint32_t *mas_modes;
struct msm_bus_noc_commit cdata[NUM_CTX];
};
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_of.c b/arch/arm/mach-msm/msm_bus/msm_bus_of.c
index 06894c6..52195c7 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_of.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_of.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -173,7 +173,7 @@
of_node = pdev->dev.of_node;
pdata = get_pdata(pdev, of_node);
if (!pdata) {
- pr_err("Error getting bus pdata!\n");
+ pr_err("client has to provide missing entry for successful registration\n");
return NULL;
}
@@ -214,7 +214,7 @@
pdata = get_pdata(pdev, of_node);
if (!pdata) {
- pr_err("Error getting bus pdata!\n");
+ pr_err("client has to provide missing entry for successful registration\n");
return NULL;
}
@@ -552,6 +552,11 @@
if (of_property_read_bool(of_node, "qcom,virt"))
pdata->virt = true;
+ ret = of_property_read_u32(of_node, "qcom,qos-baseoffset",
+ &pdata->qos_baseoffset);
+ if (ret)
+ pr_debug("%s:qos_baseoffset not available\n", __func__);
+
if (of_property_read_bool(of_node, "qcom,rpm-en"))
pdata->rpm_enabled = 1;
diff --git a/arch/arm/mach-msm/msm_rq_stats.c b/arch/arm/mach-msm/msm_rq_stats.c
index f70022e..c99f0ec 100644
--- a/arch/arm/mach-msm/msm_rq_stats.c
+++ b/arch/arm/mach-msm/msm_rq_stats.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -376,11 +376,12 @@
int ret;
int i;
struct cpufreq_policy cpu_policy;
+
+#ifndef CONFIG_SMP
/* Bail out if this is not an SMP Target */
- if (!is_smp()) {
- rq_info.init = 0;
- return -ENOSYS;
- }
+ rq_info.init = 0;
+ return -ENOSYS;
+#endif
rq_wq = create_singlethread_workqueue("rq_stats");
BUG_ON(!rq_wq);
@@ -416,11 +417,11 @@
static int __init msm_rq_stats_early_init(void)
{
+#ifndef CONFIG_SMP
/* Bail out if this is not an SMP Target */
- if (!is_smp()) {
- rq_info.init = 0;
- return -ENOSYS;
- }
+ rq_info.init = 0;
+ return -ENOSYS;
+#endif
pm_notifier(system_suspend_handler, 0);
return 0;
diff --git a/arch/arm/mach-msm/msm_watchdog_v2.c b/arch/arm/mach-msm/msm_watchdog_v2.c
index ead2e95..979c5bb 100644
--- a/arch/arm/mach-msm/msm_watchdog_v2.c
+++ b/arch/arm/mach-msm/msm_watchdog_v2.c
@@ -478,8 +478,9 @@
wdog_resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
pdata->size = resource_size(wdog_resource);
pdata->phys_base = wdog_resource->start;
- if (unlikely(!(devm_request_region(&pdev->dev, pdata->phys_base,
- pdata->size, "msm-watchdog")))) {
+ if (unlikely(!(devm_request_mem_region(&pdev->dev, pdata->phys_base,
+ pdata->size, "msm-watchdog")))) {
+
dev_err(&pdev->dev, "%s cannot reserve watchdog region\n",
__func__);
return -ENXIO;
diff --git a/arch/arm/mach-msm/perf_debug.c b/arch/arm/mach-msm/perf_debug.c
index 28d8e42..05d3cef 100644
--- a/arch/arm/mach-msm/perf_debug.c
+++ b/arch/arm/mach-msm/perf_debug.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -35,6 +35,17 @@
"10 Perf: Fix counts across power collapse\n"
"11 ARM: dts: msm: add perf-events support for msm8x10, msm8x12\n"
"12 Perf: Make per-process counters configurable\n"
+ "13 msm: perf: Add L2 support for tracecounters\n"
+ "14 Perf: keep events across hotplug\n"
+ "15 Perf: bring CPU online if needed when disabling irq\n"
+ "16 Perf: Support sw events across hotplug\n"
+ "17 msm: perf: initialise krait perf L2 counter enables\n"
+ "18 msm: perf: clean up duplicate constraint events\n"
+ "19 Perf: Make per-process counters cumulative\n"
+ "20 Perf: Fix PID for tracepoints\n"
+ "21 Perf: preserve registers across hotplug\n"
+ "22 msm: perf: fix formatting of trace entry\n"
+ "23 msm: perf: Fix cpu id logic in tracectr notifier\n"
;
static ssize_t desc_read(struct file *fp, char __user *buf,
diff --git a/arch/arm/mach-msm/perf_event_msm_krait_l2.c b/arch/arm/mach-msm/perf_event_msm_krait_l2.c
index ad34457..c9e2b8f 100644
--- a/arch/arm/mach-msm/perf_event_msm_krait_l2.c
+++ b/arch/arm/mach-msm/perf_event_msm_krait_l2.c
@@ -18,54 +18,6 @@
#include <mach/msm-krait-l2-accessors.h>
-#define MAX_L2_PERIOD ((1ULL << 32) - 1)
-#define MAX_KRAIT_L2_CTRS 10
-
-#define PMCR_NUM_EV_SHIFT 11
-#define PMCR_NUM_EV_MASK 0x1f
-
-#define L2_EVT_MASK 0xfffff
-
-#define L2_SLAVE_EV_PREFIX 4
-
-#define L2PMCCNTR 0x409
-#define L2PMCCNTCR 0x408
-#define L2PMCCNTSR 0x40A
-#define L2CYCLE_CTR_BIT 31
-#define L2CYCLE_CTR_RAW_CODE 0xfe
-
-#define L2PMOVSR 0x406
-
-#define L2PMCR 0x400
-#define L2PMCR_RESET_ALL 0x6
-#define L2PMCR_GLOBAL_ENABLE 0x1
-#define L2PMCR_GLOBAL_DISABLE 0x0
-
-#define L2PMCNTENSET 0x403
-#define L2PMCNTENCLR 0x402
-
-#define L2PMINTENSET 0x405
-#define L2PMINTENCLR 0x404
-
-#define IA_L2PMXEVCNTCR_BASE 0x420
-#define IA_L2PMXEVTYPER_BASE 0x424
-#define IA_L2PMRESX_BASE 0x410
-#define IA_L2PMXEVFILTER_BASE 0x423
-#define IA_L2PMXEVCNTR_BASE 0x421
-
-/* event format is -e rsRCCG See get_event_desc() */
-
-#define EVENT_PREFIX_MASK 0xf0000
-#define EVENT_REG_MASK 0x0f000
-#define EVENT_GROUPSEL_MASK 0x0000f
-#define EVENT_GROUPCODE_MASK 0x00ff0
-
-#define EVENT_PREFIX_SHIFT 16
-#define EVENT_REG_SHIFT 12
-#define EVENT_GROUPCODE_SHIFT 4
-
-#define RESRX_VALUE_EN 0x80000000
-
/*
* The L2 PMU is shared between all CPU's, so protect
* its bitmap access.
@@ -197,13 +149,16 @@
set_l2_indirect_reg(filter_reg, filter_val);
}
-static void set_evfilter_sys_mode(int ctr, unsigned int is_slv)
+static void set_evfilter_sys_mode(int ctr, unsigned int is_slv, int cpu,
+ unsigned int is_tracectr)
{
u32 filter_reg = (ctr * 16) + IA_L2PMXEVFILTER_BASE;
u32 filter_val = l2_orig_filter_prefix | 0xf;
- if (is_slv)
+ if (is_slv == 1)
filter_val = l2_slv_filter_prefix;
+ if (is_tracectr == 1)
+ filter_val = l2_orig_filter_prefix | 1 << cpu;
set_l2_indirect_reg(filter_reg, filter_val);
}
@@ -277,6 +232,7 @@
struct event_desc evdesc;
unsigned long iflags;
unsigned int is_slv = 0;
+ unsigned int is_tracectr = 0;
unsigned int evt_prefix;
raw_spin_lock_irqsave(&krait_l2_pmu_hw_events.pmu_lock, iflags);
@@ -290,6 +246,8 @@
if (evt_prefix == L2_SLAVE_EV_PREFIX)
is_slv = 1;
+ else if (evt_prefix == L2_TRACECTR_PREFIX)
+ is_tracectr = 1;
set_evcntcr(idx);
@@ -305,7 +263,7 @@
if (cpu < 0)
set_evfilter_task_mode(idx, is_slv);
else
- set_evfilter_sys_mode(idx, is_slv);
+ set_evfilter_sys_mode(idx, is_slv, cpu, is_tracectr);
out:
enable_intenset(idx);
@@ -456,6 +414,7 @@
static int msm_l2_test_set_ev_constraint(struct perf_event *event)
{
u32 evt_type = event->attr.config & L2_EVT_MASK;
+ u8 evt_prefix = (evt_type & EVENT_PREFIX_MASK) >> EVENT_PREFIX_SHIFT;
u8 reg = (evt_type & 0x0F000) >> 12;
u8 group = evt_type & 0x0000F;
u8 code = (evt_type & 0x00FF0) >> 4;
@@ -464,6 +423,8 @@
u64 bitmap_t;
u32 shift_idx;
+ if (evt_prefix == L2_TRACECTR_PREFIX)
+ return err;
/*
* Cycle counter collision is detected in
* get_event_idx().
@@ -496,8 +457,10 @@
* This sets the event OFF on all but one
* CPU.
*/
- if (!(event->cpu < 0))
+ if (!(event->cpu < 0)) {
event->state = PERF_EVENT_STATE_OFF;
+ event->attr.constraint_duplicate = 1;
+ }
}
out:
raw_spin_unlock_irqrestore(&l2_pmu_constraints.lock, flags);
@@ -507,12 +470,15 @@
static int msm_l2_clear_ev_constraint(struct perf_event *event)
{
u32 evt_type = event->attr.config & L2_EVT_MASK;
+ u8 evt_prefix = (evt_type & EVENT_PREFIX_MASK) >> EVENT_PREFIX_SHIFT;
u8 reg = (evt_type & 0x0F000) >> 12;
u8 group = evt_type & 0x0000F;
unsigned long flags;
u64 bitmap_t;
u32 shift_idx;
+ if (evt_prefix == L2_TRACECTR_PREFIX)
+ return 1;
raw_spin_lock_irqsave(&l2_pmu_constraints.lock, flags);
shift_idx = ((reg * 4) + group);
@@ -592,6 +558,8 @@
static int __init register_krait_l2_pmu_driver(void)
{
+ int i;
+
/* Reset all ctrs */
set_l2_indirect_reg(L2PMCR, L2PMCR_RESET_ALL);
@@ -613,6 +581,11 @@
/* Avoid spurious interrupt if any */
get_reset_pmovsr();
+ /* Clear counter enables */
+ disable_counter(l2_cycle_ctr_idx);
+ for (i = 0; i < total_l2_ctrs; i++)
+ disable_counter(i);
+
return platform_driver_register(&krait_l2_pmu_driver);
}
device_initcall(register_krait_l2_pmu_driver);
diff --git a/arch/arm/mach-msm/perf_trace_counters.c b/arch/arm/mach-msm/perf_trace_counters.c
index 8fa73ae..0a679b1 100644
--- a/arch/arm/mach-msm/perf_trace_counters.c
+++ b/arch/arm/mach-msm/perf_trace_counters.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -17,21 +17,48 @@
static unsigned int tp_pid_state;
+DEFINE_PER_CPU(u32, previous_ccnt);
+DEFINE_PER_CPU(u32[NUM_L1_CTRS], previous_l1_cnts);
+DEFINE_PER_CPU(u32[NUM_L2_PERCPU], previous_l2_cnts);
+DEFINE_PER_CPU(u32, old_pid);
+/* Reset per_cpu variables that store counter values uppn CPU hotplug */
+static int tracectr_cpu_hotplug_notifier(struct notifier_block *self,
+ unsigned long action, void *hcpu)
+{
+ int ret = NOTIFY_OK;
+ int cpu = (int)hcpu;
+ int i;
+
+ if ((action & (~CPU_TASKS_FROZEN)) == CPU_UP_PREPARE) {
+ per_cpu(previous_ccnt, cpu) = 0;
+ for (i = 0; i < NUM_L1_CTRS; i++)
+ per_cpu(previous_l1_cnts[i], cpu) = 0;
+ for (i = 0; i < NUM_L2_PERCPU; i++)
+ per_cpu(previous_l2_cnts[i], cpu) = 0;
+ }
+ return ret;
+}
+
+static struct notifier_block tracectr_cpu_hotplug_notifier_block = {
+ .notifier_call = tracectr_cpu_hotplug_notifier,
+};
+
static int tracectr_notifier(struct notifier_block *self, unsigned long cmd,
void *v)
{
- static int old_pid = -1;
struct thread_info *thread = v;
int current_pid;
+ u32 cpu = thread->cpu;
if (cmd != THREAD_NOTIFY_SWITCH)
- return old_pid;
+ return -EFAULT;
current_pid = thread->task->pid;
- if (old_pid != -1)
- trace_sched_switch_with_ctrs(old_pid, current_pid);
- old_pid = current_pid;
- return old_pid;
+ if (per_cpu(old_pid, cpu) != -1)
+ trace_sched_switch_with_ctrs(per_cpu(old_pid, cpu),
+ current_pid);
+ per_cpu(old_pid, cpu) = current_pid;
+ return NOTIFY_OK;
}
static struct notifier_block tracectr_notifier_block = {
@@ -102,6 +129,7 @@
struct dentry *dir;
struct dentry *file;
unsigned int value = 1;
+ int cpu;
dir = debugfs_create_dir("perf_debug_tp", NULL);
if (!dir)
@@ -112,6 +140,15 @@
debugfs_remove(dir);
return -ENOMEM;
}
+ register_cpu_notifier(&tracectr_cpu_hotplug_notifier_block);
+ for_each_possible_cpu(cpu)
+ per_cpu(old_pid, cpu) = -1;
+ return 0;
+}
+
+int __exit exit_tracecounters(void)
+{
+ unregister_cpu_notifier(&tracectr_cpu_hotplug_notifier_block);
return 0;
}
late_initcall(init_tracecounters);
diff --git a/arch/arm/mach-msm/perf_trace_counters.h b/arch/arm/mach-msm/perf_trace_counters.h
index 8f77bad..fce176e 100644
--- a/arch/arm/mach-msm/perf_trace_counters.h
+++ b/arch/arm/mach-msm/perf_trace_counters.h
@@ -19,14 +19,21 @@
/* Ctr index for PMCNTENSET/CLR */
#define CC 0x80000000
#define C0 0x1
-#define C1 0x10
-#define C2 0x100
-#define C3 0x1000
-
+#define C1 0x2
+#define C2 0x4
+#define C3 0x8
+#define C_ALL (CC | C0 | C1 | C2 | C3)
+#define NUM_L1_CTRS 4
+#define NUM_L2_PERCPU 2
#include <linux/sched.h>
+#include <linux/cpumask.h>
#include <linux/tracepoint.h>
+#include <mach/msm-krait-l2-accessors.h>
+DECLARE_PER_CPU(u32, previous_ccnt);
+DECLARE_PER_CPU(u32[NUM_L1_CTRS], previous_l1_cnts);
+DECLARE_PER_CPU(u32[NUM_L2_PERCPU], previous_l2_cnts);
TRACE_EVENT(sched_switch_with_ctrs,
TP_PROTO(pid_t prev, pid_t next),
@@ -41,82 +48,112 @@
__field(u32, ctr1)
__field(u32, ctr2)
__field(u32, ctr3)
+ __field(u32, lctr0)
+ __field(u32, lctr1)
),
TP_fast_assign(
+ u32 cpu = smp_processor_id();
+ u32 idx;
+ u32 i;
+ u32 counter_reg;
+ u32 val;
+ u32 cnten_val;
+ u32 num_l2ctrs;
+ u32 num_cores = nr_cpu_ids;
+ u32 total_ccnt = 0;
+ u32 total_cnt = 0;
+ u32 delta_l1_cnts[NUM_L1_CTRS];
+ u32 delta_l2_cnts[NUM_L2_PERCPU];
__entry->old_pid = prev;
__entry->new_pid = next;
- /* cycle counter */
- /* Disable */
- asm volatile("mcr p15, 0, %0, c9, c12, 2" : : "r"(CC));
- /* Read value */
- asm volatile("mrc p15, 0, %0, c9, c13, 0"
- : "=r"(__entry->cctr));
- /* Reset */
- asm volatile("mcr p15, 0, %0, c9, c13, 0" : : "r"(0));
- /* Enable */
- asm volatile("mcr p15, 0, %0, c9, c12, 1" : : "r"(CC));
+ val = get_l2_indirect_reg(L2PMCR);
+ num_l2ctrs = ((val >> 11) & 0x1f) + 1;
- /* ctr 0 */
- /* Disable */
- asm volatile("mcr p15, 0, %0, c9, c12, 2" : : "r"(C0));
- /* Select */
- asm volatile("mcr p15, 0, %0, c9, c12, 5" : : "r"(0));
- /* Read value */
- asm volatile("mrc p15, 0, %0, c9, c13, 2"
- : "=r"(__entry->ctr0));
- /* Reset */
- asm volatile("mcr p15, 0, %0, c9, c13, 2" : : "r"(0));
- /* Enable */
- asm volatile("mcr p15, 0, %0, c9, c12, 1" : : "r"(C0));
+ /* Read PMCNTENSET */
+ asm volatile("mrc p15, 0, %0, c9, c12, 1"
+ : "=r"(cnten_val));
+ /* Disable all the counters that were enabled */
+ asm volatile("mcr p15, 0, %0, c9, c12, 2"
+ : : "r"(cnten_val));
+ if (cnten_val & CC) {
+ /* Read value */
+ asm volatile("mrc p15, 0, %0, c9, c13, 0"
+ : "=r"(total_ccnt));
+ __entry->cctr = total_ccnt -
+ per_cpu(previous_ccnt, cpu);
+ per_cpu(previous_ccnt, cpu) = total_ccnt;
+ }
+ for (i = 0; i < NUM_L1_CTRS; i++) {
+ if (cnten_val & (1 << i)) {
+ /* Select */
+ asm volatile(
+ "mcr p15, 0, %0, c9, c12, 5"
+ : : "r"(i));
+ /* Read value */
+ asm volatile(
+ "mrc p15, 0, %0, c9, c13, 2"
+ : "=r"(total_cnt));
- /* ctr 1 */
- /* Disable */
- asm volatile("mcr p15, 0, %0, c9, c12, 2" : : "r"(C1));
- /* Select */
- asm volatile("mcr p15, 0, %0, c9, c12, 5" : : "r"(1));
- /* Read value */
- asm volatile("mrc p15, 0, %0, c9, c13, 2"
- : "=r"(__entry->ctr1));
- /* Reset */
- asm volatile("mcr p15, 0, %0, c9, c13, 2" : : "r"(0));
- /* Enable */
- asm volatile("mcr p15, 0, %0, c9, c12, 1" : : "r"(C1));
+ delta_l1_cnts[i] = total_cnt -
+ per_cpu(previous_l1_cnts[i], cpu);
+ per_cpu(previous_l1_cnts[i], cpu) =
+ total_cnt;
+ } else
+ delta_l1_cnts[i] = 0;
+ }
+ /* Enable all the counters that were disabled */
+ asm volatile("mcr p15, 0, %0, c9, c12, 1"
+ : : "r"(cnten_val));
- /* ctr 2 */
- /* Disable */
- asm volatile("mcr p15, 0, %0, c9, c12, 2" : : "r"(C2));
- /* Select */
- asm volatile("mcr p15, 0, %0, c9, c12, 5" : : "r"(2));
- /* Read value */
- asm volatile("mrc p15, 0, %0, c9, c13, 2"
- : "=r"(__entry->ctr2));
- /* Reset */
- asm volatile("mcr p15, 0, %0, c9, c13, 2" : : "r"(0));
- /* Enable */
- asm volatile("mcr p15, 0, %0, c9, c12, 1" : : "r"(C2));
-
- /* ctr 3 */
- /* Disable */
- asm volatile("mcr p15, 0, %0, c9, c12, 2" : : "r"(C3));
- /* Select */
- asm volatile("mcr p15, 0, %0, c9, c12, 5" : : "r"(3));
- /* Read value */
- asm volatile("mrc p15, 0, %0, c9, c13, 2"
- : "=r"(__entry->ctr3));
- /* Reset */
- asm volatile("mcr p15, 0, %0, c9, c13, 2" : : "r"(0));
- /* Enable */
- asm volatile("mcr p15, 0, %0, c9, c12, 1" : : "r"(C3));
-
+ /* L2 counters */
+ /* Assign L2 counters to cores sequentially starting
+ * from zero. A core could have multiple L2 counters
+ * allocated if # L2 counters is more than the # cores
+ */
+ cnten_val = get_l2_indirect_reg(L2PMCNTENSET);
+ for (i = 0; i < NUM_L2_PERCPU; i++) {
+ idx = cpu + (num_cores * i);
+ if (idx < num_l2ctrs &&
+ (cnten_val & (1 << idx))) {
+ /* Disable */
+ set_l2_indirect_reg(L2PMCNTENCLR,
+ (1 << idx));
+ /* L2PMEVCNTR values go from 0x421,
+ * 0x431..
+ * So we multiply idx by 16 to get the
+ * counter reg value
+ */
+ counter_reg = (idx * 16) +
+ IA_L2PMXEVCNTR_BASE;
+ total_cnt =
+ get_l2_indirect_reg(counter_reg);
+ /* Enable */
+ set_l2_indirect_reg(L2PMCNTENSET,
+ (1 << idx));
+ delta_l2_cnts[i] = total_cnt -
+ per_cpu(previous_l2_cnts[i], cpu);
+ per_cpu(previous_l2_cnts[i], cpu) =
+ total_cnt;
+ } else
+ delta_l2_cnts[i] = 0;
+ }
+ __entry->ctr0 = delta_l1_cnts[0];
+ __entry->ctr1 = delta_l1_cnts[1];
+ __entry->ctr2 = delta_l1_cnts[2];
+ __entry->ctr3 = delta_l1_cnts[3];
+ __entry->lctr0 = delta_l2_cnts[0];
+ __entry->lctr1 = delta_l2_cnts[1];
),
TP_printk("prev_pid=%d, next_pid=%d, CCNTR: %u, CTR0: %u," \
- " CTR1: %u, CTR2: %u, CTR3: %u",
+ " CTR1: %u, CTR2: %u, CTR3: %u," \
+ " L2CTR0: %u, L2CTR1: %u",
__entry->old_pid, __entry->new_pid,
__entry->cctr, __entry->ctr0, __entry->ctr1,
- __entry->ctr2, __entry->ctr3)
+ __entry->ctr2, __entry->ctr3,
+ __entry->lctr0, __entry->lctr1)
);
#endif
diff --git a/arch/arm/mach-msm/qdsp6v2/apr_tal.c b/arch/arm/mach-msm/qdsp6v2/apr_tal.c
index 8826a35..e917f31 100644
--- a/arch/arm/mach-msm/qdsp6v2/apr_tal.c
+++ b/arch/arm/mach-msm/qdsp6v2/apr_tal.c
@@ -190,6 +190,9 @@
apr_tal_close(&apr_svc_ch[dl][dest][svc]);
return NULL;
}
+
+ smd_disable_read_intr(apr_svc_ch[dl][dest][svc].ch);
+
if (!apr_svc_ch[dl][dest][svc].dest_state) {
apr_svc_ch[dl][dest][svc].dest_state = 1;
pr_debug("apr_tal:Waiting for apr svc init\n");
diff --git a/arch/arm/mach-msm/qdsp6v2/ultrasound/usf.c b/arch/arm/mach-msm/qdsp6v2/ultrasound/usf.c
index a18d0f3..cf69e17 100644
--- a/arch/arm/mach-msm/qdsp6v2/ultrasound/usf.c
+++ b/arch/arm/mach-msm/qdsp6v2/ultrasound/usf.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -27,8 +27,8 @@
#include "usfcdev.h"
/* The driver version*/
-#define DRV_VERSION "1.5.1"
-#define USF_VERSION_ID 0x0151
+#define DRV_VERSION "1.6.1"
+#define USF_VERSION_ID 0x0161
/* Standard timeout in the asynchronous ops */
#define USF_TIMEOUT_JIFFIES (1*HZ) /* 1 sec */
@@ -118,14 +118,12 @@
uint16_t event_types;
/* The input devices are "input" module registered clients */
struct input_dev *input_ifs[USF_MAX_EVENT_IND];
- /* The event source */
- int event_src;
/* Bitmap of types of events, conflicting to USF's ones */
uint16_t conflicting_event_types;
/* Bitmap of types of events from devs, conflicting with USF */
uint16_t conflicting_event_filters;
- /* The requested side buttons bitmap */
- uint16_t req_side_buttons_bitmap;
+ /* The requested buttons bitmap */
+ uint16_t req_buttons_bitmap;
};
struct usf_input_dev_type {
@@ -148,17 +146,22 @@
/* The MAX number of the supported devices */
#define MAX_DEVS_NUMBER 1
-/* The opened devices container */
-static const int s_event_src_map[] = {
- BTN_TOOL_PEN, /* US_INPUT_SRC_PEN*/
- 0, /* US_INPUT_SRC_FINGER */
- 0, /* US_INPUT_SRC_UNDEF */
-};
+/*
+ * code for a special button that is used to show/hide a
+ * hovering cursor in the input framework. Must be in
+ * sync with the button code definition in the framework
+ * (EventHub.h)
+ */
+#define BTN_USF_HOVERING_CURSOR 0x230
/* Supported buttons container */
static const int s_button_map[] = {
BTN_STYLUS,
- BTN_STYLUS2
+ BTN_STYLUS2,
+ BTN_TOOL_PEN,
+ BTN_TOOL_RUBBER,
+ BTN_TOOL_FINGER,
+ BTN_USF_HOVERING_CURSOR
};
/* The opened devices container */
@@ -192,31 +195,32 @@
const char *name)
{
int i = 0;
- int num_side_buttons = min(ARRAY_SIZE(s_button_map),
- sizeof(input_info->req_side_buttons_bitmap) *
+
+ int num_buttons = min(ARRAY_SIZE(s_button_map),
+ sizeof(input_info->req_buttons_bitmap) *
BITS_IN_BYTE);
- uint16_t max_side_button_bitmap = ((1 << ARRAY_SIZE(s_button_map)) - 1);
+ uint16_t max_buttons_bitmap = ((1 << ARRAY_SIZE(s_button_map)) - 1);
+
struct input_dev *in_dev = allocate_dev(ind, name);
if (in_dev == NULL)
return -ENOMEM;
- if (input_info->req_side_buttons_bitmap > max_side_button_bitmap) {
- pr_err("%s: Requested side buttons[%d] exceeds max side buttons available[%d]\n",
+ if (input_info->req_buttons_bitmap > max_buttons_bitmap) {
+ pr_err("%s: Requested buttons[%d] exceeds max buttons available[%d]\n",
__func__,
- input_info->req_side_buttons_bitmap,
- max_side_button_bitmap);
+ input_info->req_buttons_bitmap,
+ max_buttons_bitmap);
return -EINVAL;
}
usf_info->input_ifs[ind] = in_dev;
- usf_info->req_side_buttons_bitmap =
- input_info->req_side_buttons_bitmap;
+ usf_info->req_buttons_bitmap =
+ input_info->req_buttons_bitmap;
in_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
in_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
-
- for (i = 0; i < num_side_buttons; i++)
- if (input_info->req_side_buttons_bitmap & (1 << i))
+ for (i = 0; i < num_buttons; i++)
+ if (input_info->req_buttons_bitmap & (1 << i))
in_dev->keybit[BIT_WORD(s_button_map[i])] |=
BIT_MASK(s_button_map[i]);
@@ -297,8 +301,8 @@
{
int i = 0;
- int num_side_buttons = min(ARRAY_SIZE(s_button_map),
- sizeof(usf_info->req_side_buttons_bitmap) *
+ int num_buttons = min(ARRAY_SIZE(s_button_map),
+ sizeof(usf_info->req_buttons_bitmap) *
BITS_IN_BYTE);
struct input_dev *input_if = usf_info->input_ifs[if_ind];
@@ -314,19 +318,16 @@
input_report_abs(input_if, ABS_PRESSURE, pe->pressure);
input_report_key(input_if, BTN_TOUCH, !!(pe->pressure));
- for (i = 0; i < num_side_buttons; i++) {
+ for (i = 0; i < num_buttons; i++) {
uint16_t mask = (1 << i),
- btn_state = !!(pe->side_buttons_state_bitmap & mask);
- if (usf_info->req_side_buttons_bitmap & mask)
+ btn_state = !!(pe->buttons_state_bitmap & mask);
+ if (usf_info->req_buttons_bitmap & mask)
input_report_key(input_if, s_button_map[i], btn_state);
}
- if (usf_info->event_src)
- input_report_key(input_if, usf_info->event_src, 1);
-
input_sync(input_if);
- pr_debug("%s: TSC event: xyz[%d;%d;%d], incl[%d;%d], pressure[%d], side_buttons[%d]\n",
+ pr_debug("%s: TSC event: xyz[%d;%d;%d], incl[%d;%d], pressure[%d], buttons[%d]\n",
__func__,
pe->coordinates[X_IND],
pe->coordinates[Y_IND],
@@ -334,7 +335,7 @@
pe->inclinations[X_IND],
pe->inclinations[Y_IND],
pe->pressure,
- pe->side_buttons_state_bitmap);
+ pe->buttons_state_bitmap);
}
static void notify_mouse_event(struct usf_type *usf_info,
@@ -663,12 +664,6 @@
return -EINVAL;
}
- if (input_info->event_src < ARRAY_SIZE(s_event_src_map))
- usf_info->event_src =
- s_event_src_map[input_info->event_src];
- else
- usf_info->event_src = 0;
-
for (ind = 0; ind < USF_MAX_EVENT_IND; ++ind) {
if (usf_info->input_ifs[ind] != NULL) {
pr_err("%s: input_if[%d] is already allocated\n",
@@ -686,12 +681,6 @@
if (rc)
return rc;
-
- if (usf_info->event_src)
- input_set_capability(usf_info->input_ifs[ind],
- EV_KEY,
- usf_info->event_src);
-
rc = input_register_device(usf_info->input_ifs[ind]);
if (rc) {
pr_err("%s: input_reg_dev() failed; rc=%d\n",
diff --git a/arch/arm/mach-msm/rpm-smd.c b/arch/arm/mach-msm/rpm-smd.c
index 54576a9..2a01a36 100644
--- a/arch/arm/mach-msm/rpm-smd.c
+++ b/arch/arm/mach-msm/rpm-smd.c
@@ -130,8 +130,7 @@
bool valid;
};
static struct rb_root tr_root = RB_ROOT;
-
-static int msm_rpm_send_smd_buffer(char *buf, int size, bool noirq);
+static int msm_rpm_send_smd_buffer(char *buf, uint32_t size, bool noirq);
static uint32_t msm_rpm_get_next_msg_id(void);
static inline unsigned int get_rsc_type(char *buf)
@@ -187,7 +186,8 @@
static void delete_kvp(char *msg, struct kvp *d)
{
struct kvp *n;
- int dec, size;
+ int dec;
+ uint32_t size;
n = get_next_kvp(d);
dec = (void *)n - (void *)d;
@@ -206,7 +206,7 @@
static void add_kvp(char *buf, struct kvp *n)
{
- int inc = sizeof(*n) + n->s;
+ uint32_t inc = sizeof(*n) + n->s;
BUG_ON((get_req_len(buf) + inc) > MAX_SLEEP_BUFFER);
memcpy(buf + get_buf_len(buf), n, inc);
@@ -311,7 +311,7 @@
}
}
-int msm_rpm_smd_buffer_request(char *buf, int size, gfp_t flag)
+int msm_rpm_smd_buffer_request(char *buf, uint32_t size, gfp_t flag)
{
struct slp_buf *slp;
static DEFINE_SPINLOCK(slp_buffer_lock);
@@ -367,7 +367,7 @@
pos += scnprintf(buf + pos, buflen - pos, " id = 0%x",
get_rsc_id(s->buf));
for_each_kvp(s->buf, e) {
- int i;
+ uint32_t i;
char *data = get_data(e);
memcpy(ch, &e->k, sizeof(u32));
@@ -482,14 +482,17 @@
static int msm_rpm_add_kvp_data_common(struct msm_rpm_request *handle,
uint32_t key, const uint8_t *data, int size, bool noirq)
{
- int i;
- int data_size, msg_size;
+ uint32_t i;
+ uint32_t data_size, msg_size;
if (!handle) {
pr_err("%s(): Invalid handle\n", __func__);
return -EINVAL;
}
+ if (size < 0)
+ return -EINVAL;
+
data_size = ALIGN(size, SZ_4);
msg_size = data_size + sizeof(struct rpm_request_header);
@@ -813,7 +816,7 @@
static int msm_rpm_read_smd_data(char *buf)
{
- int pkt_sz;
+ uint32_t pkt_sz;
int bytes_read = 0;
pkt_sz = smd_cur_packet_size(msm_rpm_data.ch_info);
@@ -867,7 +870,8 @@
size_t buflen = DEBUG_PRINT_BUFFER_SIZE;
char name[5];
u32 value;
- int i, j, prev_valid;
+ uint32_t i;
+ int j, prev_valid;
int valid_count = 0;
int pos = 0;
@@ -992,7 +996,7 @@
pos += scnprintf(buf + pos, buflen - pos, "\n");
printk(buf);
}
-static int msm_rpm_send_smd_buffer(char *buf, int size, bool noirq)
+static int msm_rpm_send_smd_buffer(char *buf, uint32_t size, bool noirq)
{
unsigned long flags;
int ret;
@@ -1027,8 +1031,9 @@
int msg_type, bool noirq)
{
uint8_t *tmpbuff;
- int i, ret, msg_size;
-
+ int ret;
+ uint32_t i;
+ uint32_t msg_size;
int req_hdr_sz, msg_hdr_sz;
if (!cdata->msg_hdr.data_len)
diff --git a/arch/arm/mach-msm/smd.c b/arch/arm/mach-msm/smd.c
index 09b3113..1241e44 100644
--- a/arch/arm/mach-msm/smd.c
+++ b/arch/arm/mach-msm/smd.c
@@ -2285,7 +2285,7 @@
edge_to_pids[ch->type].subsys_name);
irq_chip->irq_mask(irq_data);
if (cpumask)
- irq_chip->irq_set_affinity(irq_data, cpumask, true);
+ irq_set_affinity(int_cfg->irq_id, cpumask);
} else {
SMD_POWER_INFO("SMD Unmasking interrupts from %s\n",
edge_to_pids[ch->type].subsys_name);
diff --git a/arch/arm/mach-msm/smp2p.c b/arch/arm/mach-msm/smp2p.c
index df241f8..5574eae 100644
--- a/arch/arm/mach-msm/smp2p.c
+++ b/arch/arm/mach-msm/smp2p.c
@@ -940,7 +940,7 @@
if (size < sizeof(struct smp2p_smem)) {
SMP2P_ERR(
- "%s pid %d item size too small; expected: %d actual: %d\n",
+ "%s pid %d item size too small; expected: %zu actual: %d\n",
__func__, remote_pid,
sizeof(struct smp2p_smem), size);
smem_item = NULL;
diff --git a/arch/arm/mach-msm/smp2p_private.h b/arch/arm/mach-msm/smp2p_private.h
index 8e0d7a3..7174950 100644
--- a/arch/arm/mach-msm/smp2p_private.h
+++ b/arch/arm/mach-msm/smp2p_private.h
@@ -1,6 +1,6 @@
/* arch/arm/mach-msm/smp2p_private.h
*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -44,10 +44,10 @@
#define SMP2P_GET_BITS(hdr_val, mask, bit) \
(((hdr_val) & (mask)) >> (bit))
#define SMP2P_SET_BITS(hdr_val, mask, bit, new_value) \
- do {\
+ {\
hdr_val = (hdr_val & ~(mask)) \
| (((new_value) << (bit)) & (mask)); \
- } while (0)
+ }
#define SMP2P_GET_LOCAL_PID(hdr) \
SMP2P_GET_BITS(hdr, SMP2P_LOCAL_PID_MASK, SMP2P_LOCAL_PID_BIT)
diff --git a/drivers/char/adsprpc.c b/drivers/char/adsprpc.c
index cc8cf47..009ab57 100644
--- a/drivers/char/adsprpc.c
+++ b/drivers/char/adsprpc.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -564,10 +564,7 @@
rpra[i].buf.len = pra[i].buf.len;
if (!rpra[i].buf.len)
continue;
- if (list[i].num) {
- rpra[i].buf.pv = pra[i].buf.pv;
- continue;
- } else if (me->smmu.enabled && fds && (fds[i] >= 0)) {
+ if (me->smmu.enabled && fds && (fds[i] >= 0)) {
len = buf_page_size(pra[i].buf.len);
handles[i] = ion_import_dma_buf(me->iclient, fds[i]);
VERIFY(err, 0 == IS_ERR_OR_NULL(handles[i]));
@@ -583,6 +580,9 @@
pages[list[i].pgidx].addr = iova;
pages[list[i].pgidx].size = len;
continue;
+ } else if (list[i].num) {
+ rpra[i].buf.pv = pra[i].buf.pv;
+ continue;
}
if (rlen < pra[i].buf.len) {
struct fastrpc_buf *b;
diff --git a/drivers/char/diag/diag_dci.c b/drivers/char/diag/diag_dci.c
index 414207f..37c236d 100644
--- a/drivers/char/diag/diag_dci.c
+++ b/drivers/char/diag/diag_dci.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -282,7 +282,7 @@
{
uint16_t event_id, event_id_packet, length, temp_len;
uint8_t *event_mask_ptr, byte_mask, payload_len, payload_len_field;
- uint8_t timestamp[8], bit_index, timestamp_len;
+ uint8_t timestamp[8] = {0}, bit_index, timestamp_len;
uint8_t event_data[MAX_EVENT_SIZE];
unsigned int byte_index, total_event_len, i;
struct diag_dci_client_tbl *entry;
@@ -497,9 +497,9 @@
}
mutex_unlock(&dci_log_mask_mutex);
- ret = diag_send_dci_log_mask(driver->smd_cntl[index].ch);
+ ret = diag_send_dci_log_mask(&driver->smd_cntl[index]);
- ret = diag_send_dci_event_mask(driver->smd_cntl[index].ch);
+ ret = diag_send_dci_event_mask(&driver->smd_cntl[index]);
smd_info->notify_context = 0;
}
@@ -572,8 +572,10 @@
&driver->smd_dci[i];
if (entry.client_id == smd_info->peripheral) {
if (smd_info->ch) {
+ mutex_lock(&smd_info->smd_ch_mutex);
smd_write(smd_info->ch,
driver->apps_dci_buf, len + 10);
+ mutex_unlock(&smd_info->smd_ch_mutex);
status = DIAG_DCI_NO_ERROR;
}
break;
@@ -767,7 +769,7 @@
ret = DIAG_DCI_NO_ERROR;
}
/* send updated mask to peripherals */
- ret = diag_send_dci_log_mask(driver->smd_cntl[MODEM_DATA].ch);
+ ret = diag_send_dci_log_mask(&driver->smd_cntl[MODEM_DATA]);
} else if (*(int *)temp == DCI_EVENT_TYPE) {
/* Minimum length of a event mask config is 12 + 4 bytes for
atleast one event id to be set or reset. */
@@ -838,7 +840,7 @@
ret = DIAG_DCI_NO_ERROR;
}
/* send updated mask to peripherals */
- ret = diag_send_dci_event_mask(driver->smd_cntl[MODEM_DATA].ch);
+ ret = diag_send_dci_event_mask(&driver->smd_cntl[MODEM_DATA]);
} else {
pr_alert("diag: Incorrect DCI transaction\n");
}
@@ -950,7 +952,7 @@
}
-int diag_send_dci_event_mask(smd_channel_t *ch)
+int diag_send_dci_event_mask(struct diag_smd_info *smd_info)
{
void *buf = driver->buf_event_mask_update;
int header_size = sizeof(struct diag_ctrl_event_mask);
@@ -973,10 +975,12 @@
}
memcpy(buf, driver->event_mask, header_size);
memcpy(buf+header_size, dci_cumulative_event_mask, DCI_EVENT_MASK_SIZE);
- if (ch) {
+ if (smd_info && smd_info->ch) {
while (retry_count < 3) {
- wr_size = smd_write(ch, buf,
+ mutex_lock(&smd_info->smd_ch_mutex);
+ wr_size = smd_write(smd_info->ch, buf,
header_size + DCI_EVENT_MASK_SIZE);
+ mutex_unlock(&smd_info->smd_ch_mutex);
if (wr_size == -ENOMEM) {
retry_count++;
for (timer = 0; timer < 5; timer++)
@@ -1116,7 +1120,7 @@
mutex_unlock(&dci_log_mask_mutex);
}
-int diag_send_dci_log_mask(smd_channel_t *ch)
+int diag_send_dci_log_mask(struct diag_smd_info *smd_info)
{
void *buf = driver->buf_log_mask_update;
int header_size = sizeof(struct diag_ctrl_log_mask);
@@ -1124,7 +1128,7 @@
int i, wr_size = -ENOMEM, retry_count = 0, timer;
int ret = DIAG_DCI_NO_ERROR;
- if (!ch) {
+ if (!smd_info || !smd_info->ch) {
pr_err("diag: ch not valid for dci log mask update\n");
return DIAG_DCI_SEND_DATA_FAIL;
}
@@ -1142,9 +1146,12 @@
memcpy(buf, driver->log_mask, header_size);
memcpy(buf+header_size, log_mask_ptr+2, 512);
/* if dirty byte is set and channel is valid */
- if (ch && *(log_mask_ptr+1)) {
+ if (smd_info->ch && *(log_mask_ptr+1)) {
while (retry_count < 3) {
- wr_size = smd_write(ch, buf, header_size + 512);
+ mutex_lock(&smd_info->smd_ch_mutex);
+ wr_size = smd_write(smd_info->ch, buf,
+ header_size + 512);
+ mutex_unlock(&smd_info->smd_ch_mutex);
if (wr_size == -ENOMEM) {
retry_count++;
for (timer = 0; timer < 5; timer++)
@@ -1416,7 +1423,7 @@
}
}
mutex_unlock(&dci_log_mask_mutex);
- err = diag_send_dci_log_mask(driver->smd_cntl[MODEM_DATA].ch);
+ err = diag_send_dci_log_mask(&driver->smd_cntl[MODEM_DATA]);
return err;
}
@@ -1442,7 +1449,7 @@
*(update_ptr + j) |= *(event_mask_ptr + j);
}
mutex_unlock(&dci_event_mask_mutex);
- err = diag_send_dci_event_mask(driver->smd_cntl[MODEM_DATA].ch);
+ err = diag_send_dci_event_mask(&driver->smd_cntl[MODEM_DATA]);
return err;
}
diff --git a/drivers/char/diag/diag_dci.h b/drivers/char/diag/diag_dci.h
index c9be39a..2ab8a36 100644
--- a/drivers/char/diag/diag_dci.h
+++ b/drivers/char/diag/diag_dci.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -125,14 +125,14 @@
void update_dci_cumulative_log_mask(int offset, unsigned int byte_index,
uint8_t byte_mask);
void clear_client_dci_cumulative_log_mask(int client_index);
-int diag_send_dci_log_mask(smd_channel_t *ch);
+int diag_send_dci_log_mask(struct diag_smd_info *smd_info);
void extract_dci_log(unsigned char *buf);
int diag_dci_clear_log_mask(void);
int diag_dci_query_log_mask(uint16_t log_code);
/* DCI event streaming functions */
void update_dci_cumulative_event_mask(int offset, uint8_t byte_mask);
void clear_client_dci_cumulative_event_mask(int client_index);
-int diag_send_dci_event_mask(smd_channel_t *ch);
+int diag_send_dci_event_mask(struct diag_smd_info *smd_info);
void extract_dci_events(unsigned char *buf);
void create_dci_event_mask_tbl(unsigned char *tbl_buf);
int diag_dci_clear_event_mask(void);
diff --git a/drivers/char/diag/diag_debugfs.c b/drivers/char/diag/diag_debugfs.c
index beaf75d..d8b5599 100644
--- a/drivers/char/diag/diag_debugfs.c
+++ b/drivers/char/diag/diag_debugfs.c
@@ -195,7 +195,8 @@
char __user *ubuf, size_t count, loff_t *ppos)
{
char *buf = NULL;
- int bytes_remaining, bytes_written = 0, bytes_in_buf = 0, i = 0;
+ unsigned int bytes_remaining, bytes_written = 0;
+ unsigned int bytes_in_buf = 0, i = 0;
struct diag_dci_data_info *temp_data = dci_data_smd;
int buf_size = (DEBUG_BUF_SIZE < count) ? DEBUG_BUF_SIZE : count;
@@ -359,9 +360,9 @@
char *buf;
int ret = 0;
int i;
- int bytes_remaining;
- int bytes_in_buffer = 0;
- int bytes_written;
+ unsigned int bytes_remaining;
+ unsigned int bytes_in_buffer = 0;
+ unsigned int bytes_written;
int buf_size = (DEBUG_BUF_SIZE < count) ? DEBUG_BUF_SIZE : count;
if (diag_dbgfs_table_index >= diag_max_reg) {
@@ -524,9 +525,9 @@
char *buf;
int ret;
int i;
- int bytes_remaining;
- int bytes_in_buffer = 0;
- int bytes_written;
+ unsigned int bytes_remaining;
+ unsigned int bytes_in_buffer = 0;
+ unsigned int bytes_written;
int buf_size = (DEBUG_BUF_SIZE < count) ? DEBUG_BUF_SIZE : count;
int bytes_hsic_inited = 45;
int bytes_hsic_not_inited = 410;
diff --git a/drivers/char/diag/diag_masks.c b/drivers/char/diag/diag_masks.c
index c28b3bd..8b00ece 100644
--- a/drivers/char/diag/diag_masks.c
+++ b/drivers/char/diag/diag_masks.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2008-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2008-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -327,10 +327,10 @@
}
diag_send_feature_mask_update(smd_info);
- diag_send_msg_mask_update(smd_info->ch, ALL_SSID, ALL_SSID,
+ diag_send_msg_mask_update(smd_info, ALL_SSID, ALL_SSID,
smd_info->peripheral);
- diag_send_log_mask_update(smd_info->ch, ALL_EQUIP_ID);
- diag_send_event_mask_update(smd_info->ch, diag_event_num_bytes);
+ diag_send_log_mask_update(smd_info, ALL_EQUIP_ID);
+ diag_send_event_mask_update(smd_info, diag_event_num_bytes);
if (smd_info->notify_context == SMD_EVENT_OPEN)
diag_send_diag_mode_update_by_smd(smd_info,
@@ -339,7 +339,7 @@
smd_info->notify_context = 0;
}
-void diag_send_log_mask_update(smd_channel_t *ch, int equip_id)
+void diag_send_log_mask_update(struct diag_smd_info *smd_info, int equip_id)
{
void *buf = driver->buf_log_mask_update;
struct diag_log_mask_t *log_item = NULL;
@@ -348,6 +348,12 @@
int wr_size = -ENOMEM, retry_count = 0;
int i, header_size, send_once = 0;
+ if (!smd_info) {
+ pr_err("diag: In %s, null smd info pointer\n",
+ __func__);
+ return;
+ }
+
header_size = sizeof(struct diag_ctrl_log_mask);
log_item = (struct diag_log_mask_t *)driver->log_masks;
mutex_lock(&driver->diag_cntl_mutex);
@@ -390,10 +396,12 @@
log_mask_size);
}
- if (ch) {
+ if (smd_info->ch) {
while (retry_count < 3) {
- wr_size = smd_write(ch, buf,
+ mutex_lock(&smd_info->smd_ch_mutex);
+ wr_size = smd_write(smd_info->ch, buf,
header_size + log_mask_size);
+ mutex_unlock(&smd_info->smd_ch_mutex);
if (wr_size == -ENOMEM) {
retry_count++;
usleep_range(10000, 10100);
@@ -415,12 +423,18 @@
mutex_unlock(&driver->diag_cntl_mutex);
}
-void diag_send_event_mask_update(smd_channel_t *ch, int num_bytes)
+void diag_send_event_mask_update(struct diag_smd_info *smd_info, int num_bytes)
{
void *buf = driver->buf_event_mask_update;
int header_size = sizeof(struct diag_ctrl_event_mask);
int wr_size = -ENOMEM, retry_count = 0;
+ if (!smd_info) {
+ pr_err("diag: In %s, null smd info pointer\n",
+ __func__);
+ return;
+ }
+
mutex_lock(&driver->diag_cntl_mutex);
if (num_bytes == 0) {
pr_debug("diag: event mask not set yet, so no update\n");
@@ -459,9 +473,12 @@
return;
}
memcpy(buf, driver->event_mask, header_size);
- if (ch) {
+ if (smd_info->ch) {
while (retry_count < 3) {
- wr_size = smd_write(ch, buf, header_size + num_bytes);
+ mutex_lock(&smd_info->smd_ch_mutex);
+ wr_size = smd_write(smd_info->ch, buf,
+ header_size + num_bytes);
+ mutex_unlock(&smd_info->smd_ch_mutex);
if (wr_size == -ENOMEM) {
retry_count++;
usleep_range(10000, 10100);
@@ -476,14 +493,20 @@
mutex_unlock(&driver->diag_cntl_mutex);
}
-void diag_send_msg_mask_update(smd_channel_t *ch, int updated_ssid_first,
- int updated_ssid_last, int proc)
+void diag_send_msg_mask_update(struct diag_smd_info *smd_info,
+ int updated_ssid_first, int updated_ssid_last,
+ int proc)
{
void *buf = driver->buf_msg_mask_update;
int first, last, actual_last, size = -ENOMEM, retry_count = 0;
int header_size = sizeof(struct diag_ctrl_msg_mask);
uint8_t *ptr = driver->msg_masks;
+ if (!smd_info) {
+ pr_err("diag: In %s, null smd info pointer\n",
+ __func__);
+ return;
+ }
mutex_lock(&driver->diag_cntl_mutex);
while (*(uint32_t *)(ptr + 4)) {
first = *(uint32_t *)ptr;
@@ -543,10 +566,12 @@
driver->msg_mask->ssid_first = first;
driver->msg_mask->ssid_last = actual_last;
memcpy(buf, driver->msg_mask, header_size);
- if (ch) {
+ if (smd_info->ch) {
while (retry_count < 3) {
- size = smd_write(ch, buf, header_size +
- 4*(driver->msg_mask->msg_mask_size));
+ mutex_lock(&smd_info->smd_ch_mutex);
+ size = smd_write(smd_info->ch, buf, header_size
+ + 4*(driver->msg_mask->msg_mask_size));
+ mutex_unlock(&smd_info->smd_ch_mutex);
if (size == -ENOMEM) {
retry_count++;
usleep_range(10000, 10100);
@@ -606,7 +631,9 @@
total_len = header_size + FEATURE_MASK_LEN_BYTES;
while (retry_count < 3) {
+ mutex_lock(&smd_info->smd_ch_mutex);
wr_size = smd_write(smd_info->ch, buf, total_len);
+ mutex_unlock(&smd_info->smd_ch_mutex);
if (wr_size == -ENOMEM) {
retry_count++;
/*
@@ -661,7 +688,7 @@
for (i = 0; i < NUM_SMD_CONTROL_CHANNELS; i++) {
if (driver->smd_cntl[i].ch)
diag_send_log_mask_update(
- driver->smd_cntl[i].ch,
+ &driver->smd_cntl[i],
*(int *)buf);
}
encode_rsp_and_send(12 + payload_length - 1);
@@ -703,7 +730,7 @@
for (i = 0; i < NUM_SMD_CONTROL_CHANNELS; i++) {
if (driver->smd_cntl[i].ch)
diag_send_log_mask_update(
- driver->smd_cntl[i].ch,
+ &driver->smd_cntl[i],
ALL_EQUIP_ID);
}
@@ -774,7 +801,7 @@
for (i = 0; i < NUM_SMD_CONTROL_CHANNELS; i++) {
if (driver->smd_cntl[i].ch)
diag_send_msg_mask_update(
- driver->smd_cntl[i].ch,
+ &driver->smd_cntl[i],
ssid_first, ssid_last,
driver->smd_cntl[i].peripheral);
@@ -799,7 +826,7 @@
for (i = 0; i < NUM_SMD_CONTROL_CHANNELS; i++) {
if (driver->smd_cntl[i].ch)
diag_send_msg_mask_update(
- driver->smd_cntl[i].ch,
+ &driver->smd_cntl[i],
ALL_SSID, ALL_SSID,
driver->smd_cntl[i].peripheral);
@@ -825,7 +852,7 @@
for (i = 0; i < NUM_SMD_CONTROL_CHANNELS; i++) {
if (driver->smd_cntl[i].ch)
diag_send_event_mask_update(
- driver->smd_cntl[i].ch,
+ &driver->smd_cntl[i],
diag_event_num_bytes);
}
encode_rsp_and_send(6 + EVENT_LAST_ID/8);
@@ -843,7 +870,7 @@
for (i = 0; i < NUM_SMD_CONTROL_CHANNELS; i++) {
if (driver->smd_cntl[i].ch)
diag_send_event_mask_update(
- driver->smd_cntl[i].ch,
+ &driver->smd_cntl[i],
diag_event_num_bytes);
}
encode_rsp_and_send(2);
diff --git a/drivers/char/diag/diag_masks.h b/drivers/char/diag/diag_masks.h
index 856d4fc..3ec087d 100644
--- a/drivers/char/diag/diag_masks.h
+++ b/drivers/char/diag/diag_masks.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -21,10 +21,10 @@
uint8_t ptr[MAX_ITEMS_PER_EQUIP_ID];
} __packed;
-void diag_send_event_mask_update(smd_channel_t *, int num_bytes);
-void diag_send_msg_mask_update(smd_channel_t *, int ssid_first,
+void diag_send_event_mask_update(struct diag_smd_info *smd_info, int num_bytes);
+void diag_send_msg_mask_update(struct diag_smd_info *smd_info, int ssid_first,
int ssid_last, int proc);
-void diag_send_log_mask_update(smd_channel_t *, int);
+void diag_send_log_mask_update(struct diag_smd_info *smd_info, int);
void diag_mask_update_fn(struct work_struct *work);
void diag_send_feature_mask_update(struct diag_smd_info *smd_info);
int diag_process_apps_masks(unsigned char *buf, int len);
diff --git a/drivers/char/diag/diagchar_core.c b/drivers/char/diag/diagchar_core.c
index 002bd0c..0e27693 100644
--- a/drivers/char/diag/diagchar_core.c
+++ b/drivers/char/diag/diagchar_core.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2008-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2008-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -51,6 +51,7 @@
MODULE_LICENSE("GPL v2");
MODULE_VERSION("1.0");
+#define MIN_SIZ_ALLOW 4
#define INIT 1
#define EXIT -1
struct diagchar_dev *driver;
@@ -978,7 +979,7 @@
clear_client_dci_cumulative_log_mask(i);
/* send updated log mask to peripherals */
result =
- diag_send_dci_log_mask(driver->smd_cntl[MODEM_DATA].ch);
+ diag_send_dci_log_mask(&driver->smd_cntl[MODEM_DATA]);
if (result != DIAG_DCI_NO_ERROR) {
mutex_unlock(&driver->dci_mutex);
return result;
@@ -988,7 +989,7 @@
/* send updated event mask to peripherals */
result =
diag_send_dci_event_mask(
- driver->smd_cntl[MODEM_DATA].ch);
+ &driver->smd_cntl[MODEM_DATA]);
if (result != DIAG_DCI_NO_ERROR) {
mutex_unlock(&driver->dci_mutex);
return result;
@@ -1452,6 +1453,10 @@
index = 0;
/* Get the packet type F3/log/event/Pkt response */
err = copy_from_user((&pkt_type), buf, 4);
+ if (err) {
+ pr_alert("diag: copy failed for pkt_type\n");
+ return -EAGAIN;
+ }
/* First 4 bytes indicate the type of payload - ignore these */
if (count < 4) {
pr_err("diag: Client sending short data\n");
@@ -1493,8 +1498,9 @@
return err;
}
if (pkt_type == CALLBACK_DATA_TYPE) {
- if (payload_size > driver->itemsize) {
- pr_err("diag: Dropping packet, packet payload size crosses 4KB limit. Current payload size %d\n",
+ if (payload_size > driver->itemsize ||
+ payload_size <= MIN_SIZ_ALLOW) {
+ pr_err("diag: Dropping packet, invalid packet size. Current payload size %d\n",
payload_size);
driver->dropped_count++;
return -EBADMSG;
@@ -1628,6 +1634,11 @@
diag_get_remote(*(int *)driver->user_space_data_buf);
if (remote_proc) {
+ if (payload_size <= MIN_SIZ_ALLOW) {
+ pr_err("diag: Integer underflow in %s, payload size: %d",
+ __func__, payload_size);
+ return -EBADMSG;
+ }
token_offset = 4;
payload_size -= 4;
buf += 4;
diff --git a/drivers/char/diag/diagchar_hdlc.c b/drivers/char/diag/diagchar_hdlc.c
index 3e38a3c..6f527a5 100644
--- a/drivers/char/diag/diagchar_hdlc.c
+++ b/drivers/char/diag/diagchar_hdlc.c
@@ -177,8 +177,8 @@
int msg_start;
if (hdlc && hdlc->src_ptr && hdlc->dest_ptr &&
- (hdlc->src_size - hdlc->src_idx > 0) &&
- (hdlc->dest_size - hdlc->dest_idx > 0)) {
+ (hdlc->src_size > hdlc->src_idx) &&
+ (hdlc->dest_size > hdlc->dest_idx)) {
msg_start = (hdlc->src_idx == 0) ? 1 : 0;
diff --git a/drivers/char/diag/diagfwd_cntl.c b/drivers/char/diag/diagfwd_cntl.c
index d3c311d..a75f7f69 100644
--- a/drivers/char/diag/diagfwd_cntl.c
+++ b/drivers/char/diag/diagfwd_cntl.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -349,10 +349,19 @@
int wr_size = -ENOMEM, retry_count = 0, timer;
struct diag_smd_info *data = NULL;
- /* For now only allow the modem to receive the message */
- if (!smd_info || smd_info->type != SMD_CNTL_TYPE ||
- (smd_info->peripheral != MODEM_DATA))
+ if (!smd_info || smd_info->type != SMD_CNTL_TYPE) {
+ pr_err("diag: In %s, invalid channel info, smd_info: %p type: %d\n",
+ __func__, smd_info,
+ ((smd_info) ? smd_info->type : -1));
return;
+ }
+
+ if (smd_info->peripheral < MODEM_DATA ||
+ smd_info->peripheral > WCNSS_DATA) {
+ pr_err("diag: In %s, invalid peripheral %d\n", __func__,
+ smd_info->peripheral);
+ return;
+ }
data = &driver->smd_data[smd_info->peripheral];
if (!data)
@@ -380,7 +389,9 @@
if (smd_info->ch) {
while (retry_count < 3) {
+ mutex_lock(&smd_info->smd_ch_mutex);
wr_size = smd_write(smd_info->ch, buf, msg_size);
+ mutex_unlock(&smd_info->smd_ch_mutex);
if (wr_size == -ENOMEM) {
/*
* The smd channel is full. Delay while
@@ -433,7 +444,9 @@
stm_msg.version = 1;
stm_msg.control_data = stm_control_data;
while (retry_count < 3) {
+ mutex_lock(&smd_info->smd_ch_mutex);
wr_size = smd_write(smd_info->ch, &stm_msg, msg_size);
+ mutex_unlock(&smd_info->smd_ch_mutex);
if (wr_size == -ENOMEM) {
/*
* The smd channel is full. Delay while
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index 975a42f..4605685 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c
@@ -1726,7 +1726,8 @@
memcpy(&policy->cpuinfo, &data->cpuinfo,
sizeof(struct cpufreq_cpuinfo));
- if (policy->min > data->max || policy->max < data->min) {
+ if (policy->min > data->user_policy.max
+ || policy->max < data->user_policy.min) {
ret = -EINVAL;
goto error_out;
}
diff --git a/drivers/cpufreq/cpufreq_interactive.c b/drivers/cpufreq/cpufreq_interactive.c
index 45a41eb..e96d577 100644
--- a/drivers/cpufreq/cpufreq_interactive.c
+++ b/drivers/cpufreq/cpufreq_interactive.c
@@ -445,7 +445,7 @@
continue;
max_load = max(max_load, picpu->prev_load);
- max_freq = max(max_freq, picpu->policy->cur);
+ max_freq = max(max_freq, picpu->target_freq);
}
if (max_freq > up_threshold_any_cpu_freq &&
@@ -1283,6 +1283,7 @@
pcpu = &per_cpu(cpuinfo, j);
down_write(&pcpu->enable_sem);
pcpu->governor_enabled = 0;
+ pcpu->target_freq = 0;
del_timer_sync(&pcpu->cpu_timer);
del_timer_sync(&pcpu->cpu_slack_timer);
up_write(&pcpu->enable_sem);
diff --git a/drivers/cpufreq/cpufreq_ondemand.c b/drivers/cpufreq/cpufreq_ondemand.c
index 8f7d39c..7f8b4cd 100644
--- a/drivers/cpufreq/cpufreq_ondemand.c
+++ b/drivers/cpufreq/cpufreq_ondemand.c
@@ -978,14 +978,8 @@
dbs_info->sample_type = DBS_SUB_SAMPLE;
delay = dbs_info->freq_hi_jiffies;
} else {
- /* We want all CPUs to do sampling nearly on
- * same jiffy
- */
delay = usecs_to_jiffies(dbs_tuners_ins.sampling_rate
* dbs_info->rate_mult);
-
- if (num_online_cpus() > 1)
- delay -= jiffies % delay;
}
} else {
__cpufreq_driver_target(dbs_info->cur_policy,
diff --git a/drivers/crypto/msm/qce.h b/drivers/crypto/msm/qce.h
index afd5141..4250202 100644
--- a/drivers/crypto/msm/qce.h
+++ b/drivers/crypto/msm/qce.h
@@ -1,6 +1,6 @@
/* Qualcomm Crypto Engine driver API
*
- * Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -116,6 +116,12 @@
bool bam;
bool is_shared;
bool hw_key;
+ bool use_sw_aes_cbc_ecb_ctr_algo;
+ bool use_sw_aead_algo;
+ bool use_sw_aes_xts_algo;
+ bool use_sw_ahash_algo;
+ bool use_sw_hmac_algo;
+ bool use_sw_aes_ccm_algo;
};
/* Sha operation parameters */
diff --git a/drivers/crypto/msm/qce50.c b/drivers/crypto/msm/qce50.c
index a4154c1..63e18c9 100644
--- a/drivers/crypto/msm/qce50.c
+++ b/drivers/crypto/msm/qce50.c
@@ -1,6 +1,6 @@
/* Qualcomm Crypto Engine driver.
*
- * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -38,6 +38,7 @@
#include "qce.h"
#include "qce50.h"
#include "qcryptohw_50.h"
+#include "qce_ota.h"
#define CRYPTO_CONFIG_RESET 0xE001F
#define QCE_MAX_NUM_DSCR 0x500
@@ -96,6 +97,17 @@
enum qce_cipher_mode_enum mode;
struct qce_ce_cfg_reg_setting reg;
struct ce_sps_data ce_sps;
+ uint32_t engines_avail;
+ dma_addr_t phy_ota_src;
+ dma_addr_t phy_ota_dst;
+ unsigned int ota_size;
+
+ bool use_sw_aes_cbc_ecb_ctr_algo;
+ bool use_sw_aead_algo;
+ bool use_sw_aes_xts_algo;
+ bool use_sw_ahash_algo;
+ bool use_sw_hmac_algo;
+ bool use_sw_aes_ccm_algo;
};
/* Standard initialization vector for SHA-1, source: FIPS 180-2 */
@@ -202,6 +214,8 @@
};
pce_dev->ce_sps.minor_version = min_rev;
+ pce_dev->engines_avail = readl_relaxed(pce_dev->iobase +
+ CRYPTO_ENGINES_AVAIL);
dev_info(pce_dev->pdev, "Qualcomm Crypto %d.%d.%d device found @0x%x\n",
maj_rev, min_rev, step_rev, pce_dev->phy_iobase);
@@ -212,12 +226,14 @@
"Consumer (IN) PIPE %d, "
"Producer (OUT) PIPE %d\n"
"IO base BAM = 0x%x\n"
- "BAM IRQ %d\n",
+ "BAM IRQ %d\n"
+ "Engines Availability = 0x%x\n",
(uint32_t) pce_dev->iobase,
pce_dev->ce_sps.dest_pipe_index,
pce_dev->ce_sps.src_pipe_index,
(uint32_t)pce_dev->ce_sps.bam_iobase,
- pce_dev->ce_sps.bam_irq);
+ pce_dev->ce_sps.bam_irq,
+ pce_dev->engines_avail);
return 0;
};
@@ -268,31 +284,38 @@
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
bool sha1 = false;
struct sps_command_element *pce = NULL;
+ bool use_hw_key = false;
+ bool use_pipe_key = false;
+ uint32_t authk_size_in_word = sreq->authklen/sizeof(uint32_t);
+ uint32_t auth_cfg;
if ((sreq->alg == QCE_HASH_SHA1_HMAC) ||
(sreq->alg == QCE_HASH_SHA256_HMAC) ||
(sreq->alg == QCE_HASH_AES_CMAC)) {
- uint32_t authk_size_in_word = sreq->authklen/sizeof(uint32_t);
- _byte_stream_to_net_words(mackey32, sreq->authkey,
- sreq->authklen);
- /* check for null key. If null, use hw key*/
- for (i = 0; i < authk_size_in_word; i++) {
- if (mackey32[i] != 0)
- break;
- }
-
+ /* no more check for null key. use flag */
+ if ((sreq->flags & QCRYPTO_CTX_USE_HW_KEY)
+ == QCRYPTO_CTX_USE_HW_KEY)
+ use_hw_key = true;
+ else if ((sreq->flags & QCRYPTO_CTX_USE_PIPE_KEY) ==
+ QCRYPTO_CTX_USE_PIPE_KEY)
+ use_pipe_key = true;
pce = cmdlistinfo->go_proc;
- if (i == authk_size_in_word) {
+ if (use_hw_key == true) {
pce->addr = (uint32_t)(CRYPTO_GOPROC_QC_KEY_REG +
pce_dev->phy_iobase);
} else {
pce->addr = (uint32_t)(CRYPTO_GOPROC_REG +
pce_dev->phy_iobase);
pce = cmdlistinfo->auth_key;
- for (i = 0; i < authk_size_in_word; i++, pce++)
- pce->data = mackey32[i];
+ if (use_pipe_key == false) {
+ _byte_stream_to_net_words(mackey32,
+ sreq->authkey,
+ sreq->authklen);
+ for (i = 0; i < authk_size_in_word; i++, pce++)
+ pce->data = mackey32[i];
+ }
}
}
@@ -347,14 +370,19 @@
/* Set/reset last bit in CFG register */
pce = cmdlistinfo->auth_seg_cfg;
+ auth_cfg = pce->data & ~(1 << CRYPTO_LAST |
+ 1 << CRYPTO_FIRST |
+ 1 << CRYPTO_USE_PIPE_KEY_AUTH |
+ 1 << CRYPTO_USE_HW_KEY_AUTH);
if (sreq->last_blk)
- pce->data |= 1 << CRYPTO_LAST;
- else
- pce->data &= ~(1 << CRYPTO_LAST);
+ auth_cfg |= 1 << CRYPTO_LAST;
if (sreq->first_blk)
- pce->data |= 1 << CRYPTO_FIRST;
- else
- pce->data &= ~(1 << CRYPTO_FIRST);
+ auth_cfg |= 1 << CRYPTO_FIRST;
+ if (use_hw_key)
+ auth_cfg |= 1 << CRYPTO_USE_HW_KEY_AUTH;
+ if (use_pipe_key)
+ auth_cfg |= 1 << CRYPTO_USE_PIPE_KEY_AUTH;
+ pce->data = auth_cfg;
go_proc:
/* write auth seg size */
pce = cmdlistinfo->auth_seg_size;
@@ -443,7 +471,7 @@
uint32_t totallen_in, uint32_t coffset,
struct qce_cmdlist_info *cmdlistinfo)
{
- int32_t authk_size_in_word = q_req->authklen/sizeof(uint32_t);
+ int32_t authk_size_in_word = SHA_HMAC_KEY_SIZE/sizeof(uint32_t);
int i;
uint32_t mackey32[SHA_HMAC_KEY_SIZE/sizeof(uint32_t)] = {0};
struct sps_command_element *pce;
@@ -804,12 +832,20 @@
}
/* write xts du size */
pce = cmdlistinfo->encr_xts_du_size;
- if (!(creq->flags & QCRYPTO_CTX_XTS_MASK))
- pce->data = creq->cryptlen;
- else
+ switch (creq->flags & QCRYPTO_CTX_XTS_MASK) {
+ case QCRYPTO_CTX_XTS_DU_SIZE_512B:
pce->data = min((unsigned int)QCE_SECTOR_SIZE,
creq->cryptlen);
-
+ break;
+ case QCRYPTO_CTX_XTS_DU_SIZE_1KB:
+ pce->data =
+ min((unsigned int)QCE_SECTOR_SIZE * 2,
+ creq->cryptlen);
+ break;
+ default:
+ pce->data = creq->cryptlen;
+ break;
+ }
}
if (creq->mode != QCE_MODE_ECB) {
if (creq->mode == QCE_MODE_XTS)
@@ -889,15 +925,141 @@
return 0;
};
+static int _ce_f9_setup(struct qce_device *pce_dev, struct qce_f9_req *req,
+ struct qce_cmdlist_info *cmdlistinfo)
+{
+ uint32_t ikey32[OTA_KEY_SIZE/sizeof(uint32_t)];
+ uint32_t key_size_in_word = OTA_KEY_SIZE/sizeof(uint32_t);
+ uint32_t cfg;
+ struct sps_command_element *pce;
+ int i;
+
+ switch (req->algorithm) {
+ case QCE_OTA_ALGO_KASUMI:
+ cfg = pce_dev->reg.auth_cfg_kasumi;
+ break;
+ case QCE_OTA_ALGO_SNOW3G:
+ default:
+ cfg = pce_dev->reg.auth_cfg_snow3g;
+ break;
+ };
+
+ /* write key in CRYPTO_AUTH_IV0-3_REG */
+ _byte_stream_to_net_words(ikey32, &req->ikey[0], OTA_KEY_SIZE);
+ pce = cmdlistinfo->auth_iv;
+ for (i = 0; i < key_size_in_word; i++, pce++)
+ pce->data = ikey32[i];
+
+ /* write last bits in CRYPTO_AUTH_IV4_REG */
+ pce->data = req->last_bits;
+
+ /* write fresh to CRYPTO_AUTH_BYTECNT0_REG */
+ pce = cmdlistinfo->auth_bytecount;
+ pce->data = req->fresh;
+
+ /* write count-i to CRYPTO_AUTH_BYTECNT1_REG */
+ pce++;
+ pce->data = req->count_i;
+
+ /* write auth seg cfg */
+ pce = cmdlistinfo->auth_seg_cfg;
+ if (req->direction == QCE_OTA_DIR_DOWNLINK)
+ cfg |= BIT(CRYPTO_F9_DIRECTION);
+ pce->data = cfg;
+
+ /* write auth seg size */
+ pce = cmdlistinfo->auth_seg_size;
+ pce->data = req->msize;
+
+ /* write auth seg start*/
+ pce = cmdlistinfo->auth_seg_start;
+ pce->data = 0;
+
+ /* write seg size */
+ pce = cmdlistinfo->seg_size;
+ pce->data = req->msize;
+
+
+ /* write go */
+ pce = cmdlistinfo->go_proc;
+ pce->addr = (uint32_t)(CRYPTO_GOPROC_REG + pce_dev->phy_iobase);
+ return 0;
+}
+
+static int _ce_f8_setup(struct qce_device *pce_dev, struct qce_f8_req *req,
+ bool key_stream_mode, uint16_t npkts, uint16_t cipher_offset,
+ uint16_t cipher_size,
+ struct qce_cmdlist_info *cmdlistinfo)
+{
+ uint32_t ckey32[OTA_KEY_SIZE/sizeof(uint32_t)];
+ uint32_t key_size_in_word = OTA_KEY_SIZE/sizeof(uint32_t);
+ uint32_t cfg;
+ struct sps_command_element *pce;
+ int i;
+
+ switch (req->algorithm) {
+ case QCE_OTA_ALGO_KASUMI:
+ cfg = pce_dev->reg.encr_cfg_kasumi;
+ break;
+ case QCE_OTA_ALGO_SNOW3G:
+ default:
+ cfg = pce_dev->reg.encr_cfg_snow3g;
+ break;
+ };
+ /* write key */
+ _byte_stream_to_net_words(ckey32, &req->ckey[0], OTA_KEY_SIZE);
+ pce = cmdlistinfo->encr_key;
+ for (i = 0; i < key_size_in_word; i++, pce++)
+ pce->data = ckey32[i];
+
+ /* write encr seg cfg */
+ pce = cmdlistinfo->encr_seg_cfg;
+ if (key_stream_mode)
+ cfg |= BIT(CRYPTO_F8_KEYSTREAM_ENABLE);
+ if (req->direction == QCE_OTA_DIR_DOWNLINK)
+ cfg |= BIT(CRYPTO_F8_DIRECTION);
+ pce->data = cfg;
+
+ /* write encr seg start */
+ pce = cmdlistinfo->encr_seg_start;
+ pce->data = (cipher_offset & 0xffff);
+
+ /* write encr seg size */
+ pce = cmdlistinfo->encr_seg_size;
+ pce->data = cipher_size;
+
+ /* write seg size */
+ pce = cmdlistinfo->seg_size;
+ pce->data = req->data_len;
+
+ /* write cntr0_iv0 for countC */
+ pce = cmdlistinfo->encr_cntr_iv;
+ pce->data = req->count_c;
+ /* write cntr1_iv1 for nPkts, and bearer */
+ pce++;
+ if (npkts == 1)
+ npkts = 0;
+ pce->data = req->bearer << CRYPTO_CNTR1_IV1_REG_F8_BEARER |
+ npkts << CRYPTO_CNTR1_IV1_REG_F8_PKT_CNT;
+
+ /* write go */
+ pce = cmdlistinfo->go_proc;
+ pce->addr = (uint32_t)(CRYPTO_GOPROC_REG + pce_dev->phy_iobase);
+
+ return 0;
+}
+
static int _ce_setup_hash_direct(struct qce_device *pce_dev,
struct qce_sha_req *sreq)
{
uint32_t auth32[SHA256_DIGEST_SIZE / sizeof(uint32_t)];
uint32_t diglen;
bool use_hw_key = false;
+ bool use_pipe_key = false;
int i;
uint32_t mackey32[SHA_HMAC_KEY_SIZE/sizeof(uint32_t)] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+ uint32_t authk_size_in_word = sreq->authklen/sizeof(uint32_t);
bool sha1 = false;
uint32_t auth_cfg = 0;
@@ -944,25 +1106,25 @@
if ((sreq->alg == QCE_HASH_SHA1_HMAC) ||
(sreq->alg == QCE_HASH_SHA256_HMAC) ||
(sreq->alg == QCE_HASH_AES_CMAC)) {
- uint32_t authk_size_in_word = sreq->authklen/sizeof(uint32_t);
_byte_stream_to_net_words(mackey32, sreq->authkey,
sreq->authklen);
- /* check for null key. If null, use hw key*/
- for (i = 0; i < authk_size_in_word; i++) {
- if (mackey32[i] != 0)
- break;
- }
+ /* no more check for null key. use flag to check*/
- if (i == authk_size_in_word)
+ if ((sreq->flags & QCRYPTO_CTX_USE_HW_KEY) ==
+ QCRYPTO_CTX_USE_HW_KEY) {
use_hw_key = true;
- else
- /* Clear auth_ivn, auth_keyn registers */
+ } else if ((sreq->flags & QCRYPTO_CTX_USE_PIPE_KEY) ==
+ QCRYPTO_CTX_USE_PIPE_KEY) {
+ use_pipe_key = true;
+ } else {
+ /* setup key */
for (i = 0; i < authk_size_in_word; i++)
writel_relaxed(mackey32[i], (pce_dev->iobase +
(CRYPTO_AUTH_KEY0_REG +
i*sizeof(uint32_t))));
+ }
}
if (sreq->alg == QCE_HASH_AES_CMAC)
@@ -1036,6 +1198,10 @@
auth_cfg |= 1 << CRYPTO_FIRST;
else
auth_cfg &= ~(1 << CRYPTO_FIRST);
+ if (use_hw_key)
+ auth_cfg |= 1 << CRYPTO_USE_HW_KEY_AUTH;
+ if (use_pipe_key)
+ auth_cfg |= 1 << CRYPTO_USE_PIPE_KEY_AUTH;
go_proc:
/* write seg_cfg */
writel_relaxed(auth_cfg, pce_dev->iobase + CRYPTO_AUTH_SEG_CFG_REG);
@@ -1071,7 +1237,7 @@
static int _ce_setup_aead_direct(struct qce_device *pce_dev,
struct qce_req *q_req, uint32_t totallen_in, uint32_t coffset)
{
- int32_t authk_size_in_word = q_req->authklen/sizeof(uint32_t);
+ int32_t authk_size_in_word = SHA_HMAC_KEY_SIZE/sizeof(uint32_t);
int i;
uint32_t mackey32[SHA_HMAC_KEY_SIZE/sizeof(uint32_t)] = {0};
uint32_t a_cfg;
@@ -1454,15 +1620,25 @@
(i * sizeof(uint32_t)));
}
/* write xts du size */
- if (use_pipe_key == true)
- writel_relaxed(min((uint32_t)QCE_SECTOR_SIZE,
- creq->cryptlen),
- pce_dev->iobase +
- CRYPTO_ENCR_XTS_DU_SIZE_REG);
- else
- writel_relaxed(creq->cryptlen ,
- pce_dev->iobase +
- CRYPTO_ENCR_XTS_DU_SIZE_REG);
+ switch (creq->flags & QCRYPTO_CTX_XTS_MASK) {
+ case QCRYPTO_CTX_XTS_DU_SIZE_512B:
+ writel_relaxed(
+ min((uint32_t)QCE_SECTOR_SIZE,
+ creq->cryptlen), pce_dev->iobase +
+ CRYPTO_ENCR_XTS_DU_SIZE_REG);
+ break;
+ case QCRYPTO_CTX_XTS_DU_SIZE_1KB:
+ writel_relaxed(
+ min((uint32_t)(QCE_SECTOR_SIZE * 2),
+ creq->cryptlen), pce_dev->iobase +
+ CRYPTO_ENCR_XTS_DU_SIZE_REG);
+ break;
+ default:
+ writel_relaxed(creq->cryptlen,
+ pce_dev->iobase +
+ CRYPTO_ENCR_XTS_DU_SIZE_REG);
+ break;
+ }
}
if (creq->mode != QCE_MODE_ECB) {
if (creq->mode == QCE_MODE_XTS)
@@ -1556,6 +1732,168 @@
return 0;
};
+static int _ce_f9_setup_direct(struct qce_device *pce_dev,
+ struct qce_f9_req *req)
+{
+ uint32_t ikey32[OTA_KEY_SIZE/sizeof(uint32_t)];
+ uint32_t key_size_in_word = OTA_KEY_SIZE/sizeof(uint32_t);
+ uint32_t auth_cfg;
+ int i;
+
+ switch (req->algorithm) {
+ case QCE_OTA_ALGO_KASUMI:
+ auth_cfg = pce_dev->reg.auth_cfg_kasumi;
+ break;
+ case QCE_OTA_ALGO_SNOW3G:
+ default:
+ auth_cfg = pce_dev->reg.auth_cfg_snow3g;
+ break;
+ };
+
+ /* clear status */
+ writel_relaxed(0, pce_dev->iobase + CRYPTO_STATUS_REG);
+
+ /* set big endian configuration */
+ writel_relaxed(pce_dev->reg.crypto_cfg_be, (pce_dev->iobase +
+ CRYPTO_CONFIG_REG));
+ /*
+ * Ensure previous instructions (setting the CONFIG register)
+ * was completed before issuing starting to set other config register
+ * This is to ensure the configurations are done in correct endian-ness
+ * as set in the CONFIG registers
+ */
+ mb();
+
+ /* write enc_seg_cfg */
+ writel_relaxed(0, pce_dev->iobase + CRYPTO_ENCR_SEG_CFG_REG);
+
+ /* write ecn_seg_size */
+ writel_relaxed(0, pce_dev->iobase + CRYPTO_ENCR_SEG_SIZE_REG);
+
+ /* write key in CRYPTO_AUTH_IV0-3_REG */
+ _byte_stream_to_net_words(ikey32, &req->ikey[0], OTA_KEY_SIZE);
+ for (i = 0; i < key_size_in_word; i++)
+ writel_relaxed(ikey32[i], (pce_dev->iobase +
+ (CRYPTO_AUTH_IV0_REG + i*sizeof(uint32_t))));
+
+ /* write last bits in CRYPTO_AUTH_IV4_REG */
+ writel_relaxed(req->last_bits, (pce_dev->iobase +
+ CRYPTO_AUTH_IV4_REG));
+
+ /* write fresh to CRYPTO_AUTH_BYTECNT0_REG */
+ writel_relaxed(req->fresh, (pce_dev->iobase +
+ CRYPTO_AUTH_BYTECNT0_REG));
+
+ /* write count-i to CRYPTO_AUTH_BYTECNT1_REG */
+ writel_relaxed(req->count_i, (pce_dev->iobase +
+ CRYPTO_AUTH_BYTECNT1_REG));
+
+ /* write auth seg cfg */
+ if (req->direction == QCE_OTA_DIR_DOWNLINK)
+ auth_cfg |= BIT(CRYPTO_F9_DIRECTION);
+ writel_relaxed(auth_cfg, pce_dev->iobase + CRYPTO_AUTH_SEG_CFG_REG);
+
+ /* write auth seg size */
+ writel_relaxed(req->msize, pce_dev->iobase + CRYPTO_AUTH_SEG_SIZE_REG);
+
+ /* write auth seg start*/
+ writel_relaxed(0, pce_dev->iobase + CRYPTO_AUTH_SEG_START_REG);
+
+ /* write seg size */
+ writel_relaxed(req->msize, pce_dev->iobase + CRYPTO_SEG_SIZE_REG);
+
+ /* set little endian configuration before go*/
+ writel_relaxed(pce_dev->reg.crypto_cfg_le, (pce_dev->iobase +
+ CRYPTO_CONFIG_REG));
+ /* write go */
+ writel_relaxed(((1 << CRYPTO_GO) | (1 << CRYPTO_RESULTS_DUMP)),
+ pce_dev->iobase + CRYPTO_GOPROC_REG);
+ /*
+ * Ensure previous instructions (setting the GO register)
+ * was completed before issuing a DMA transfer request
+ */
+ mb();
+ return 0;
+}
+
+static int _ce_f8_setup_direct(struct qce_device *pce_dev,
+ struct qce_f8_req *req, bool key_stream_mode,
+ uint16_t npkts, uint16_t cipher_offset, uint16_t cipher_size)
+{
+ int i = 0;
+ uint32_t encr_cfg = 0;
+ uint32_t ckey32[OTA_KEY_SIZE/sizeof(uint32_t)];
+ uint32_t key_size_in_word = OTA_KEY_SIZE/sizeof(uint32_t);
+
+ switch (req->algorithm) {
+ case QCE_OTA_ALGO_KASUMI:
+ encr_cfg = pce_dev->reg.encr_cfg_kasumi;
+ break;
+ case QCE_OTA_ALGO_SNOW3G:
+ default:
+ encr_cfg = pce_dev->reg.encr_cfg_snow3g;
+ break;
+ };
+ /* clear status */
+ writel_relaxed(0, pce_dev->iobase + CRYPTO_STATUS_REG);
+ /* set big endian configuration */
+ writel_relaxed(pce_dev->reg.crypto_cfg_be, (pce_dev->iobase +
+ CRYPTO_CONFIG_REG));
+ /* write auth seg configuration */
+ writel_relaxed(0, pce_dev->iobase + CRYPTO_AUTH_SEG_CFG_REG);
+ /* write auth seg size */
+ writel_relaxed(0, pce_dev->iobase + CRYPTO_AUTH_SEG_SIZE_REG);
+
+ /* write key */
+ _byte_stream_to_net_words(ckey32, &req->ckey[0], OTA_KEY_SIZE);
+
+ for (i = 0; i < key_size_in_word; i++)
+ writel_relaxed(ckey32[i], (pce_dev->iobase +
+ (CRYPTO_ENCR_KEY0_REG + i*sizeof(uint32_t))));
+ /* write encr seg cfg */
+ if (key_stream_mode)
+ encr_cfg |= BIT(CRYPTO_F8_KEYSTREAM_ENABLE);
+ if (req->direction == QCE_OTA_DIR_DOWNLINK)
+ encr_cfg |= BIT(CRYPTO_F8_DIRECTION);
+ writel_relaxed(encr_cfg, pce_dev->iobase +
+ CRYPTO_ENCR_SEG_CFG_REG);
+
+ /* write encr seg start */
+ writel_relaxed((cipher_offset & 0xffff), pce_dev->iobase +
+ CRYPTO_ENCR_SEG_START_REG);
+ /* write encr seg size */
+ writel_relaxed(cipher_size, pce_dev->iobase +
+ CRYPTO_ENCR_SEG_SIZE_REG);
+
+ /* write seg size */
+ writel_relaxed(req->data_len, pce_dev->iobase +
+ CRYPTO_SEG_SIZE_REG);
+
+ /* write cntr0_iv0 for countC */
+ writel_relaxed(req->count_c, pce_dev->iobase +
+ CRYPTO_CNTR0_IV0_REG);
+ /* write cntr1_iv1 for nPkts, and bearer */
+ if (npkts == 1)
+ npkts = 0;
+ writel_relaxed(req->bearer << CRYPTO_CNTR1_IV1_REG_F8_BEARER |
+ npkts << CRYPTO_CNTR1_IV1_REG_F8_PKT_CNT,
+ pce_dev->iobase + CRYPTO_CNTR1_IV1_REG);
+
+ /* set little endian configuration before go*/
+ writel_relaxed(pce_dev->reg.crypto_cfg_le, (pce_dev->iobase +
+ CRYPTO_CONFIG_REG));
+ /* write go */
+ writel_relaxed(((1 << CRYPTO_GO) | (1 << CRYPTO_RESULTS_DUMP)),
+ pce_dev->iobase + CRYPTO_GOPROC_REG);
+ /*
+ * Ensure previous instructions (setting the GO register)
+ * was completed before issuing a DMA transfer request
+ */
+ mb();
+ return 0;
+}
+
+
static int _qce_unlock_other_pipes(struct qce_device *pce_dev)
{
int rc = 0;
@@ -1705,6 +2043,48 @@
return 0;
};
+static int _f9_complete(struct qce_device *pce_dev)
+{
+ uint32_t mac_i;
+ uint32_t status;
+ int32_t result_status;
+
+ dma_unmap_single(pce_dev->pdev, pce_dev->phy_ota_src,
+ pce_dev->ota_size, DMA_TO_DEVICE);
+ _byte_stream_to_net_words(&mac_i,
+ (char *)(&pce_dev->ce_sps.result->auth_iv[0]),
+ CRYPTO_REG_SIZE);
+ /* read status before unlock */
+ status = readl_relaxed(pce_dev->iobase + CRYPTO_STATUS_REG);
+ if (_qce_unlock_other_pipes(pce_dev)) {
+ pce_dev->qce_cb(pce_dev->areq, NULL, NULL, -ENXIO);
+ return -ENXIO;
+ }
+ if (status & ((1 << CRYPTO_SW_ERR) | (1 << CRYPTO_AXI_ERR)
+ | (1 << CRYPTO_HSD_ERR))) {
+ pr_err("f9 operation error. Status %x\n", status);
+ result_status = -ENXIO;
+ } else if (pce_dev->ce_sps.consumer_status |
+ pce_dev->ce_sps.producer_status) {
+ pr_err("f9 sps operation error. sps status %x %x\n",
+ pce_dev->ce_sps.consumer_status,
+ pce_dev->ce_sps.producer_status);
+ result_status = -ENXIO;
+ } else if ((status & (1 << CRYPTO_OPERATION_DONE)) == 0) {
+ pr_err("f9 operation not done? Status %x, sps status %x %x\n",
+ status,
+ pce_dev->ce_sps.consumer_status,
+ pce_dev->ce_sps.producer_status);
+ result_status = -ENXIO;
+ } else {
+ result_status = 0;
+ }
+ pce_dev->qce_cb(pce_dev->areq, (void *) mac_i, NULL,
+ result_status);
+
+ return 0;
+}
+
static int _ablk_cipher_complete(struct qce_device *pce_dev)
{
struct ablkcipher_request *areq;
@@ -1811,6 +2191,47 @@
return 0;
};
+static int _f8_complete(struct qce_device *pce_dev)
+{
+ uint32_t status;
+ int32_t result_status;
+
+ if (pce_dev->phy_ota_dst != 0)
+ dma_unmap_single(pce_dev->pdev, pce_dev->phy_ota_dst,
+ pce_dev->ota_size, DMA_FROM_DEVICE);
+ if (pce_dev->phy_ota_src != 0)
+ dma_unmap_single(pce_dev->pdev, pce_dev->phy_ota_src,
+ pce_dev->ota_size, (pce_dev->phy_ota_dst) ?
+ DMA_TO_DEVICE : DMA_BIDIRECTIONAL);
+ /* read status before unlock */
+ status = readl_relaxed(pce_dev->iobase + CRYPTO_STATUS_REG);
+ if (_qce_unlock_other_pipes(pce_dev)) {
+ pce_dev->qce_cb(pce_dev->areq, NULL, NULL, -ENXIO);
+ return -ENXIO;
+ }
+ if (status & ((1 << CRYPTO_SW_ERR) | (1 << CRYPTO_AXI_ERR)
+ | (1 << CRYPTO_HSD_ERR))) {
+ pr_err("f8 operation error. Status %x\n", status);
+ result_status = -ENXIO;
+ } else if (pce_dev->ce_sps.consumer_status |
+ pce_dev->ce_sps.producer_status) {
+ pr_err("f8 sps operation error. sps status %x %x\n",
+ pce_dev->ce_sps.consumer_status,
+ pce_dev->ce_sps.producer_status);
+ result_status = -ENXIO;
+ } else if ((status & (1 << CRYPTO_OPERATION_DONE)) == 0) {
+ pr_err("f8 operation not done? Status %x, sps status %x %x\n",
+ status,
+ pce_dev->ce_sps.consumer_status,
+ pce_dev->ce_sps.producer_status);
+ result_status = -ENXIO;
+ } else {
+ result_status = 0;
+ }
+ pce_dev->qce_cb(pce_dev->areq, NULL, NULL, result_status);
+ return 0;
+}
+
#ifdef QCE_DEBUG
static void _qce_dump_descr_fifos(struct qce_device *pce_dev)
{
@@ -1903,8 +2324,11 @@
static void _qce_set_flag(struct sps_transfer *sps_bam_pipe, uint32_t flag)
{
- struct sps_iovec *iovec = sps_bam_pipe->iovec +
- (sps_bam_pipe->iovec_count - 1);
+ struct sps_iovec *iovec;
+
+ if (sps_bam_pipe->iovec_count == 0)
+ return;
+ iovec = sps_bam_pipe->iovec + (sps_bam_pipe->iovec_count - 1);
iovec->flags |= flag;
}
@@ -1913,16 +2337,26 @@
{
struct sps_iovec *iovec = sps_bam_pipe->iovec +
sps_bam_pipe->iovec_count;
- if (sps_bam_pipe->iovec_count == QCE_MAX_NUM_DSCR) {
- pr_err("Num of descrptor %d exceed max (%d)",
- sps_bam_pipe->iovec_count, (uint32_t)QCE_MAX_NUM_DSCR);
- return -ENOMEM;
- }
- if (len) {
- iovec->size = len;
+ uint32_t data_cnt;
+
+ while (len > 0) {
+ if (sps_bam_pipe->iovec_count == QCE_MAX_NUM_DSCR) {
+ pr_err("Num of descrptor %d exceed max (%d)",
+ sps_bam_pipe->iovec_count,
+ (uint32_t)QCE_MAX_NUM_DSCR);
+ return -ENOMEM;
+ }
+ if (len > SPS_MAX_PKT_SIZE)
+ data_cnt = SPS_MAX_PKT_SIZE;
+ else
+ data_cnt = len;
+ iovec->size = data_cnt;
iovec->addr = addr;
iovec->flags = 0;
sps_bam_pipe->iovec_count++;
+ iovec++;
+ addr += data_cnt;
+ len -= data_cnt;
}
return 0;
}
@@ -1988,13 +2422,15 @@
int rc = 0;
_qce_dump_descr_fifos(pce_dev);
- rc = sps_transfer(pce_dev->ce_sps.consumer.pipe,
+ if (pce_dev->ce_sps.in_transfer.iovec_count) {
+ rc = sps_transfer(pce_dev->ce_sps.consumer.pipe,
&pce_dev->ce_sps.in_transfer);
- if (rc) {
- pr_err("sps_xfr() fail (consumer pipe=0x%x) rc = %d,",
+ if (rc) {
+ pr_err("sps_xfr() fail (consumer pipe=0x%x) rc = %d,",
(u32)pce_dev->ce_sps.consumer.pipe, rc);
- _qce_dump_descr_fifos_fail(pce_dev);
- return rc;
+ _qce_dump_descr_fifos_fail(pce_dev);
+ return rc;
+ }
}
rc = sps_transfer(pce_dev->ce_sps.producer.pipe,
&pce_dev->ce_sps.out_transfer);
@@ -2195,8 +2631,8 @@
list_del(&pbam->qlist);
kfree(pbam);
- pce_dev->pbam = NULL;
ret:
+ pce_dev->pbam = NULL;
mutex_unlock(&bam_register_lock);
}
@@ -2255,6 +2691,10 @@
CRYPTO_BAM_CNFG_BITS_REG);
pbam->support_cmd_dscr = (bam_cfg & CRYPTO_BAM_CD_ENABLE_MASK) ?
true : false;
+ if (pbam->support_cmd_dscr == false) {
+ pr_info("qce50 don't support command descriptor. bam_cfg%x\n",
+ bam_cfg);
+ }
pce_dev->support_cmd_dscr = pbam->support_cmd_dscr;
bam.phys_addr = pce_dev->ce_sps.bam_mem;
@@ -2282,6 +2722,7 @@
bam.manage = SPS_BAM_MGR_DEVICE_REMOTE;
else
bam.manage = SPS_BAM_MGR_LOCAL;
+
bam.ee = 1;
pr_debug("bam physical base=0x%x\n", (u32)bam.phys_addr);
@@ -2419,6 +2860,55 @@
_sha_complete(pce_dev);
};
+static void _f9_sps_producer_callback(struct sps_event_notify *notify)
+{
+ struct qce_device *pce_dev = (struct qce_device *)
+ ((struct sps_event_notify *)notify)->user;
+
+ pce_dev->ce_sps.notify = *notify;
+ pr_debug("sps ev_id=%d, addr=0x%x, size=0x%x, flags=0x%x\n",
+ notify->event_id,
+ notify->data.transfer.iovec.addr,
+ notify->data.transfer.iovec.size,
+ notify->data.transfer.iovec.flags);
+ /* done */
+ _f9_complete(pce_dev);
+}
+
+static void _f8_sps_producer_callback(struct sps_event_notify *notify)
+{
+ struct qce_device *pce_dev = (struct qce_device *)
+ ((struct sps_event_notify *)notify)->user;
+
+ pce_dev->ce_sps.notify = *notify;
+ pr_debug("sps ev_id=%d, addr=0x%x, size=0x%x, flags=0x%x\n",
+ notify->event_id,
+ notify->data.transfer.iovec.addr,
+ notify->data.transfer.iovec.size,
+ notify->data.transfer.iovec.flags);
+
+ if (pce_dev->ce_sps.producer_state == QCE_PIPE_STATE_COMP) {
+ pce_dev->ce_sps.producer_state = QCE_PIPE_STATE_IDLE;
+ /* done */
+ _f8_complete(pce_dev);
+ } else {
+ int rc = 0;
+ pce_dev->ce_sps.producer_state = QCE_PIPE_STATE_COMP;
+ pce_dev->ce_sps.out_transfer.iovec_count = 0;
+ _qce_sps_add_data(GET_PHYS_ADDR(pce_dev->ce_sps.result_dump),
+ CRYPTO_RESULT_DUMP_SIZE,
+ &pce_dev->ce_sps.out_transfer);
+ _qce_set_flag(&pce_dev->ce_sps.out_transfer,
+ SPS_IOVEC_FLAG_EOT|SPS_IOVEC_FLAG_INT);
+ rc = sps_transfer(pce_dev->ce_sps.producer.pipe,
+ &pce_dev->ce_sps.out_transfer);
+ if (rc) {
+ pr_err("sps_xfr() fail (producer pipe=0x%x) rc = %d,",
+ (u32)pce_dev->ce_sps.producer.pipe, rc);
+ }
+ }
+}
+
static void _ablk_cipher_sps_producer_callback(struct sps_event_notify *notify)
{
struct qce_device *pce_dev = (struct qce_device *)
@@ -3251,6 +3741,172 @@
return 0;
}
+static int _setup_f8_cmdlistptrs(struct qce_device *pdev,
+ unsigned char **pvaddr, enum qce_ota_algo_enum alg)
+{
+ struct sps_command_element *ce_vaddr;
+ uint32_t ce_vaddr_start;
+ struct qce_cmdlistptr_ops *cmdlistptr = &pdev->ce_sps.cmdlistptr;
+ struct qce_cmdlist_info *pcl_info = NULL;
+ int i = 0;
+ uint32_t encr_cfg = 0;
+ uint32_t key_reg = 4;
+
+ *pvaddr = (unsigned char *) ALIGN(((unsigned int)(*pvaddr)),
+ pdev->ce_sps.ce_burst_size);
+ ce_vaddr = (struct sps_command_element *)(*pvaddr);
+ ce_vaddr_start = (uint32_t)(*pvaddr);
+
+ /*
+ * Designate chunks of the allocated memory to various
+ * command list pointers related to f8 cipher algorithm defined
+ * in ce_cmdlistptrs_ops structure.
+ */
+
+ switch (alg) {
+ case QCE_OTA_ALGO_KASUMI:
+ cmdlistptr->f8_kasumi.cmdlist = (uint32_t)ce_vaddr;
+ pcl_info = &(cmdlistptr->f8_kasumi);
+ encr_cfg = pdev->reg.encr_cfg_kasumi;
+ break;
+
+ case QCE_OTA_ALGO_SNOW3G:
+ default:
+ cmdlistptr->f8_snow3g.cmdlist = (uint32_t)ce_vaddr;
+ pcl_info = &(cmdlistptr->f8_snow3g);
+ encr_cfg = pdev->reg.encr_cfg_snow3g;
+ break;
+ }
+ /* clear status register */
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_STATUS_REG,
+ 0, NULL);
+ /* set config to big endian */
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_CONFIG_REG,
+ pdev->reg.crypto_cfg_be, &pcl_info->crypto_cfg);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_SEG_SIZE_REG, 0,
+ &pcl_info->seg_size);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_ENCR_SEG_CFG_REG, encr_cfg,
+ &pcl_info->encr_seg_cfg);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_ENCR_SEG_SIZE_REG, 0,
+ &pcl_info->encr_seg_size);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_ENCR_SEG_START_REG, 0,
+ &pcl_info->encr_seg_start);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_SEG_CFG_REG, 0,
+ &pcl_info->auth_seg_cfg);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_SEG_SIZE_REG,
+ 0, &pcl_info->auth_seg_size);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_SEG_START_REG,
+ 0, &pcl_info->auth_seg_start);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_ENCR_KEY0_REG, 0,
+ &pcl_info->encr_key);
+ for (i = 1; i < key_reg; i++)
+ qce_add_cmd_element(pdev, &ce_vaddr,
+ (CRYPTO_ENCR_KEY0_REG + i * sizeof(uint32_t)),
+ 0, NULL);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_CNTR0_IV0_REG, 0,
+ &pcl_info->encr_cntr_iv);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_CNTR1_IV1_REG, 0,
+ NULL);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_CONFIG_REG,
+ pdev->reg.crypto_cfg_le, NULL);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_GOPROC_REG,
+ ((1 << CRYPTO_GO) | (1 << CRYPTO_RESULTS_DUMP)),
+ &pcl_info->go_proc);
+
+ pcl_info->size = (uint32_t)ce_vaddr - (uint32_t)ce_vaddr_start;
+ *pvaddr = (unsigned char *) ce_vaddr;
+
+ return 0;
+}
+
+static int _setup_f9_cmdlistptrs(struct qce_device *pdev,
+ unsigned char **pvaddr, enum qce_ota_algo_enum alg)
+{
+ struct sps_command_element *ce_vaddr;
+ uint32_t ce_vaddr_start;
+ struct qce_cmdlistptr_ops *cmdlistptr = &pdev->ce_sps.cmdlistptr;
+ struct qce_cmdlist_info *pcl_info = NULL;
+ int i = 0;
+ uint32_t auth_cfg = 0;
+ uint32_t iv_reg = 0;
+
+ *pvaddr = (unsigned char *) ALIGN(((unsigned int)(*pvaddr)),
+ pdev->ce_sps.ce_burst_size);
+ ce_vaddr_start = (uint32_t)(*pvaddr);
+ ce_vaddr = (struct sps_command_element *)(*pvaddr);
+
+ /*
+ * Designate chunks of the allocated memory to various
+ * command list pointers related to authentication operations
+ * defined in ce_cmdlistptrs_ops structure.
+ */
+ switch (alg) {
+ case QCE_OTA_ALGO_KASUMI:
+ cmdlistptr->f9_kasumi.cmdlist = (uint32_t)ce_vaddr;
+ pcl_info = &(cmdlistptr->f9_kasumi);
+ auth_cfg = pdev->reg.auth_cfg_kasumi;
+ break;
+
+ case QCE_OTA_ALGO_SNOW3G:
+ default:
+ cmdlistptr->f9_snow3g.cmdlist = (uint32_t)ce_vaddr;
+ pcl_info = &(cmdlistptr->f9_snow3g);
+ auth_cfg = pdev->reg.auth_cfg_snow3g;
+ };
+
+ /* clear status register */
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_STATUS_REG,
+ 0, NULL);
+ /* set config to big endian */
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_CONFIG_REG,
+ pdev->reg.crypto_cfg_be, &pcl_info->crypto_cfg);
+
+ iv_reg = 5;
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_SEG_SIZE_REG, 0,
+ &pcl_info->seg_size);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_ENCR_SEG_CFG_REG, 0,
+ &pcl_info->encr_seg_cfg);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_SEG_CFG_REG,
+ auth_cfg, &pcl_info->auth_seg_cfg);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_SEG_SIZE_REG, 0,
+ &pcl_info->auth_seg_size);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_SEG_START_REG, 0,
+ &pcl_info->auth_seg_start);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_IV0_REG, 0,
+ &pcl_info->auth_iv);
+ for (i = 1; i < iv_reg; i++) {
+ qce_add_cmd_element(pdev, &ce_vaddr,
+ (CRYPTO_AUTH_IV0_REG + i*sizeof(uint32_t)),
+ 0, NULL);
+ }
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_BYTECNT0_REG,
+ 0, &pcl_info->auth_bytecount);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_BYTECNT1_REG, 0, NULL);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_CONFIG_REG,
+ pdev->reg.crypto_cfg_le, NULL);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_GOPROC_REG,
+ ((1 << CRYPTO_GO) | (1 << CRYPTO_RESULTS_DUMP)),
+ &pcl_info->go_proc);
+
+ pcl_info->size = (uint32_t)ce_vaddr - (uint32_t)ce_vaddr_start;
+ *pvaddr = (unsigned char *) ce_vaddr;
+
+ return 0;
+}
+
static int _setup_unlock_pipe_cmdlistptrs(struct qce_device *pdev,
unsigned char **pvaddr)
{
@@ -3334,6 +3990,10 @@
_setup_aead_ccm_cmdlistptrs(pdev, pvaddr, true);
_setup_aead_ccm_cmdlistptrs(pdev, pvaddr, false);
+ _setup_f8_cmdlistptrs(pdev, pvaddr, QCE_OTA_ALGO_KASUMI);
+ _setup_f8_cmdlistptrs(pdev, pvaddr, QCE_OTA_ALGO_SNOW3G);
+ _setup_f9_cmdlistptrs(pdev, pvaddr, QCE_OTA_ALGO_KASUMI);
+ _setup_f9_cmdlistptrs(pdev, pvaddr, QCE_OTA_ALGO_SNOW3G);
_setup_unlock_pipe_cmdlistptrs(pdev, pvaddr);
return 0;
@@ -3461,6 +4121,13 @@
(CRYPTO_ENCR_ALG_DES << CRYPTO_ENCR_ALG) |
(CRYPTO_ENCR_MODE_CBC << CRYPTO_ENCR_MODE);
+ /* Initialize encr_cfg register for kasumi/snow3g alg */
+ pce_dev->reg.encr_cfg_kasumi =
+ (CRYPTO_ENCR_ALG_KASUMI << CRYPTO_ENCR_ALG);
+
+ pce_dev->reg.encr_cfg_snow3g =
+ (CRYPTO_ENCR_ALG_SNOW_3G << CRYPTO_ENCR_ALG);
+
/* Initialize auth_cfg register for CMAC alg */
pce_dev->reg.auth_cfg_cmac_128 =
(1 << CRYPTO_LAST) | (1 << CRYPTO_FIRST) |
@@ -3531,6 +4198,13 @@
((MAX_NONCE/sizeof(uint32_t)) << CRYPTO_AUTH_NONCE_NUM_WORDS);
pce_dev->reg.auth_cfg_aes_ccm_256 &= ~(1 << CRYPTO_USE_HW_KEY_AUTH);
+ /* Initialize auth_cfg register for kasumi/snow3g */
+ pce_dev->reg.auth_cfg_kasumi =
+ (CRYPTO_AUTH_ALG_KASUMI << CRYPTO_AUTH_ALG) |
+ BIT(CRYPTO_FIRST) | BIT(CRYPTO_LAST);
+ pce_dev->reg.auth_cfg_snow3g =
+ (CRYPTO_AUTH_ALG_SNOW3G << CRYPTO_AUTH_ALG) |
+ BIT(CRYPTO_FIRST) | BIT(CRYPTO_LAST);
return 0;
}
@@ -4105,6 +4779,302 @@
}
EXPORT_SYMBOL(qce_process_sha_req);
+int qce_f8_req(void *handle, struct qce_f8_req *req,
+ void *cookie, qce_comp_func_ptr_t qce_cb)
+{
+ struct qce_device *pce_dev = (struct qce_device *) handle;
+ bool key_stream_mode;
+ dma_addr_t dst;
+ int rc;
+ struct qce_cmdlist_info *cmdlistinfo;
+
+ switch (req->algorithm) {
+ case QCE_OTA_ALGO_KASUMI:
+ cmdlistinfo = &pce_dev->ce_sps.cmdlistptr.f8_kasumi;
+ break;
+ case QCE_OTA_ALGO_SNOW3G:
+ cmdlistinfo = &pce_dev->ce_sps.cmdlistptr.f8_snow3g;
+ break;
+ default:
+ return -EINVAL;
+ };
+
+ key_stream_mode = (req->data_in == NULL);
+
+ if ((key_stream_mode && (req->data_len & 0xf)) ||
+ (req->bearer >= QCE_OTA_MAX_BEARER))
+ return -EINVAL;
+
+ /* F8 cipher input */
+ if (key_stream_mode)
+ pce_dev->phy_ota_src = 0;
+ else {
+ pce_dev->phy_ota_src = dma_map_single(pce_dev->pdev,
+ req->data_in, req->data_len,
+ (req->data_in == req->data_out) ?
+ DMA_BIDIRECTIONAL : DMA_TO_DEVICE);
+ }
+
+ /* F8 cipher output */
+ if (req->data_in != req->data_out) {
+ dst = dma_map_single(pce_dev->pdev, req->data_out,
+ req->data_len, DMA_FROM_DEVICE);
+ pce_dev->phy_ota_dst = dst;
+ } else {
+ /* in place ciphering */
+ dst = pce_dev->phy_ota_src;
+ pce_dev->phy_ota_dst = 0;
+ }
+ pce_dev->ota_size = req->data_len;
+
+
+ /* set up crypto device */
+ if (pce_dev->support_cmd_dscr)
+ rc = _ce_f8_setup(pce_dev, req, key_stream_mode, 1, 0,
+ req->data_len, cmdlistinfo);
+ else
+ rc = _ce_f8_setup_direct(pce_dev, req, key_stream_mode, 1, 0,
+ req->data_len);
+ if (rc < 0)
+ goto bad;
+
+ /* setup for callback, and issue command to sps */
+ pce_dev->areq = cookie;
+ pce_dev->qce_cb = qce_cb;
+
+ /* Register producer callback event for DESC_DONE event. */
+ pce_dev->ce_sps.producer.event.callback =
+ _f8_sps_producer_callback;
+ pce_dev->ce_sps.producer.event.options = SPS_O_DESC_DONE;
+ rc = sps_register_event(pce_dev->ce_sps.producer.pipe,
+ &pce_dev->ce_sps.producer.event);
+ if (rc) {
+ pr_err("Producer callback registration failed rc = %d\n", rc);
+ goto bad;
+ }
+ _qce_sps_iovec_count_init(pce_dev);
+
+ if (pce_dev->support_cmd_dscr)
+ _qce_sps_add_cmd(pce_dev, SPS_IOVEC_FLAG_LOCK, cmdlistinfo,
+ &pce_dev->ce_sps.in_transfer);
+
+ if (!key_stream_mode) {
+ _qce_sps_add_data((uint32_t)pce_dev->phy_ota_src, req->data_len,
+ &pce_dev->ce_sps.in_transfer);
+ _qce_set_flag(&pce_dev->ce_sps.in_transfer,
+ SPS_IOVEC_FLAG_EOT|SPS_IOVEC_FLAG_NWD);
+ }
+
+ _qce_sps_add_data((uint32_t)dst, req->data_len,
+ &pce_dev->ce_sps.out_transfer);
+
+ if (req->data_len > SPS_MAX_PKT_SIZE) {
+ _qce_set_flag(&pce_dev->ce_sps.out_transfer,
+ SPS_IOVEC_FLAG_INT);
+ pce_dev->ce_sps.producer_state = QCE_PIPE_STATE_IDLE;
+ } else {
+ pce_dev->ce_sps.producer_state = QCE_PIPE_STATE_COMP;
+ _qce_sps_add_data(GET_PHYS_ADDR(pce_dev->ce_sps.result_dump),
+ CRYPTO_RESULT_DUMP_SIZE,
+ &pce_dev->ce_sps.out_transfer);
+ _qce_set_flag(&pce_dev->ce_sps.out_transfer,
+ SPS_IOVEC_FLAG_INT);
+ }
+ rc = _qce_sps_transfer(pce_dev);
+ if (rc)
+ goto bad;
+ return 0;
+bad:
+ if (pce_dev->phy_ota_dst != 0)
+ dma_unmap_single(pce_dev->pdev, pce_dev->phy_ota_dst,
+ req->data_len, DMA_FROM_DEVICE);
+ if (pce_dev->phy_ota_src != 0)
+ dma_unmap_single(pce_dev->pdev, pce_dev->phy_ota_src,
+ req->data_len,
+ (req->data_in == req->data_out) ?
+ DMA_BIDIRECTIONAL : DMA_TO_DEVICE);
+ return rc;
+}
+EXPORT_SYMBOL(qce_f8_req);
+
+int qce_f8_multi_pkt_req(void *handle, struct qce_f8_multi_pkt_req *mreq,
+ void *cookie, qce_comp_func_ptr_t qce_cb)
+{
+ struct qce_device *pce_dev = (struct qce_device *) handle;
+ uint16_t num_pkt = mreq->num_pkt;
+ uint16_t cipher_start = mreq->cipher_start;
+ uint16_t cipher_size = mreq->cipher_size;
+ struct qce_f8_req *req = &mreq->qce_f8_req;
+ uint32_t total;
+ dma_addr_t dst = 0;
+ int rc = 0;
+ struct qce_cmdlist_info *cmdlistinfo;
+
+ switch (req->algorithm) {
+ case QCE_OTA_ALGO_KASUMI:
+ cmdlistinfo = &pce_dev->ce_sps.cmdlistptr.f8_kasumi;
+ break;
+ case QCE_OTA_ALGO_SNOW3G:
+ cmdlistinfo = &pce_dev->ce_sps.cmdlistptr.f8_snow3g;
+ break;
+ default:
+ return -EINVAL;
+ };
+
+ total = num_pkt * req->data_len;
+
+ /* F8 cipher input */
+ pce_dev->phy_ota_src = dma_map_single(pce_dev->pdev,
+ req->data_in, total,
+ (req->data_in == req->data_out) ?
+ DMA_BIDIRECTIONAL : DMA_TO_DEVICE);
+
+ /* F8 cipher output */
+ if (req->data_in != req->data_out) {
+ dst = dma_map_single(pce_dev->pdev, req->data_out, total,
+ DMA_FROM_DEVICE);
+ pce_dev->phy_ota_dst = dst;
+ } else {
+ /* in place ciphering */
+ dst = pce_dev->phy_ota_src;
+ pce_dev->phy_ota_dst = 0;
+ }
+
+ pce_dev->ota_size = total;
+
+ /* set up crypto device */
+ if (pce_dev->support_cmd_dscr)
+ rc = _ce_f8_setup(pce_dev, req, false, num_pkt, cipher_start,
+ cipher_size, cmdlistinfo);
+ else
+ rc = _ce_f8_setup_direct(pce_dev, req, false, num_pkt,
+ cipher_start, cipher_size);
+ if (rc)
+ goto bad;
+
+ /* setup for callback, and issue command to sps */
+ pce_dev->areq = cookie;
+ pce_dev->qce_cb = qce_cb;
+
+ /* Register producer callback event for DESC_DONE event. */
+ pce_dev->ce_sps.producer.event.callback =
+ _f8_sps_producer_callback;
+ pce_dev->ce_sps.producer.event.options = SPS_O_DESC_DONE;
+ rc = sps_register_event(pce_dev->ce_sps.producer.pipe,
+ &pce_dev->ce_sps.producer.event);
+ if (rc) {
+ pr_err("Producer callback registration failed rc = %d\n", rc);
+ goto bad;
+ }
+ _qce_sps_iovec_count_init(pce_dev);
+
+ if (pce_dev->support_cmd_dscr)
+ _qce_sps_add_cmd(pce_dev, SPS_IOVEC_FLAG_LOCK, cmdlistinfo,
+ &pce_dev->ce_sps.in_transfer);
+
+ _qce_sps_add_data((uint32_t)pce_dev->phy_ota_src, total,
+ &pce_dev->ce_sps.in_transfer);
+ _qce_set_flag(&pce_dev->ce_sps.in_transfer,
+ SPS_IOVEC_FLAG_EOT|SPS_IOVEC_FLAG_NWD);
+
+ _qce_sps_add_data((uint32_t)dst, total,
+ &pce_dev->ce_sps.out_transfer);
+
+ if (total > SPS_MAX_PKT_SIZE) {
+ _qce_set_flag(&pce_dev->ce_sps.out_transfer,
+ SPS_IOVEC_FLAG_INT);
+ pce_dev->ce_sps.producer_state = QCE_PIPE_STATE_IDLE;
+ } else {
+ pce_dev->ce_sps.producer_state = QCE_PIPE_STATE_COMP;
+ _qce_sps_add_data(GET_PHYS_ADDR(pce_dev->ce_sps.result_dump),
+ CRYPTO_RESULT_DUMP_SIZE,
+ &pce_dev->ce_sps.out_transfer);
+ _qce_set_flag(&pce_dev->ce_sps.out_transfer,
+ SPS_IOVEC_FLAG_INT);
+ }
+ rc = _qce_sps_transfer(pce_dev);
+
+ if (rc == 0)
+ return 0;
+bad:
+ if (pce_dev->phy_ota_dst)
+ dma_unmap_single(pce_dev->pdev, pce_dev->phy_ota_dst, total,
+ DMA_FROM_DEVICE);
+ dma_unmap_single(pce_dev->pdev, pce_dev->phy_ota_src, total,
+ (req->data_in == req->data_out) ?
+ DMA_BIDIRECTIONAL : DMA_TO_DEVICE);
+ return rc;
+}
+EXPORT_SYMBOL(qce_f8_multi_pkt_req);
+
+int qce_f9_req(void *handle, struct qce_f9_req *req, void *cookie,
+ qce_comp_func_ptr_t qce_cb)
+{
+ struct qce_device *pce_dev = (struct qce_device *) handle;
+ int rc;
+ struct qce_cmdlist_info *cmdlistinfo;
+
+ switch (req->algorithm) {
+ case QCE_OTA_ALGO_KASUMI:
+ cmdlistinfo = &pce_dev->ce_sps.cmdlistptr.f9_kasumi;
+ break;
+ case QCE_OTA_ALGO_SNOW3G:
+ cmdlistinfo = &pce_dev->ce_sps.cmdlistptr.f9_snow3g;
+ break;
+ default:
+ return -EINVAL;
+ };
+
+ pce_dev->phy_ota_src = dma_map_single(pce_dev->pdev, req->message,
+ req->msize, DMA_TO_DEVICE);
+
+ pce_dev->ota_size = req->msize;
+
+ if (pce_dev->support_cmd_dscr)
+ rc = _ce_f9_setup(pce_dev, req, cmdlistinfo);
+ else
+ rc = _ce_f9_setup_direct(pce_dev, req);
+ if (rc < 0)
+ goto bad;
+
+ /* setup for callback, and issue command to sps */
+ pce_dev->areq = cookie;
+ pce_dev->qce_cb = qce_cb;
+
+ /* Register producer callback event for DESC_DONE event. */
+ pce_dev->ce_sps.producer.event.callback = _f9_sps_producer_callback;
+ pce_dev->ce_sps.producer.event.options = SPS_O_DESC_DONE;
+ rc = sps_register_event(pce_dev->ce_sps.producer.pipe,
+ &pce_dev->ce_sps.producer.event);
+ if (rc) {
+ pr_err("Producer callback registration failed rc = %d\n", rc);
+ goto bad;
+ }
+
+ _qce_sps_iovec_count_init(pce_dev);
+ if (pce_dev->support_cmd_dscr)
+ _qce_sps_add_cmd(pce_dev, SPS_IOVEC_FLAG_LOCK, cmdlistinfo,
+ &pce_dev->ce_sps.in_transfer);
+ _qce_sps_add_data((uint32_t)pce_dev->phy_ota_src, req->msize,
+ &pce_dev->ce_sps.in_transfer);
+ _qce_set_flag(&pce_dev->ce_sps.in_transfer,
+ SPS_IOVEC_FLAG_EOT|SPS_IOVEC_FLAG_NWD);
+
+ _qce_sps_add_data(GET_PHYS_ADDR(pce_dev->ce_sps.result_dump),
+ CRYPTO_RESULT_DUMP_SIZE,
+ &pce_dev->ce_sps.out_transfer);
+ _qce_set_flag(&pce_dev->ce_sps.out_transfer, SPS_IOVEC_FLAG_INT);
+ rc = _qce_sps_transfer(pce_dev);
+ if (rc)
+ goto bad;
+ return 0;
+bad:
+ dma_unmap_single(pce_dev->pdev, pce_dev->phy_ota_src,
+ req->msize, DMA_TO_DEVICE);
+ return rc;
+}
+EXPORT_SYMBOL(qce_f9_req);
+
static int __qce_get_device_tree_data(struct platform_device *pdev,
struct qce_device *pce_dev)
{
@@ -4115,6 +5085,26 @@
"qcom,ce-hw-shared");
pce_dev->support_hw_key = of_property_read_bool((&pdev->dev)->of_node,
"qcom,ce-hw-key");
+
+ pce_dev->use_sw_aes_cbc_ecb_ctr_algo =
+ of_property_read_bool((&pdev->dev)->of_node,
+ "qcom,use-sw-aes-cbc-ecb-ctr-algo");
+ pce_dev->use_sw_aead_algo =
+ of_property_read_bool((&pdev->dev)->of_node,
+ "qcom,use-sw-aead-algo");
+ pce_dev->use_sw_aes_xts_algo =
+ of_property_read_bool((&pdev->dev)->of_node,
+ "qcom,use-sw-aes-xts-algo");
+ pce_dev->use_sw_ahash_algo =
+ of_property_read_bool((&pdev->dev)->of_node,
+ "qcom,use-sw-ahash-algo");
+ pce_dev->use_sw_hmac_algo =
+ of_property_read_bool((&pdev->dev)->of_node,
+ "qcom,use-sw-hmac-algo");
+ pce_dev->use_sw_aes_ccm_algo =
+ of_property_read_bool((&pdev->dev)->of_node,
+ "qcom,use-sw-aes-ccm-algo");
+
if (of_property_read_u32((&pdev->dev)->of_node,
"qcom,bam-pipe-pair",
&pce_dev->ce_sps.pipe_pair_index)) {
@@ -4339,7 +5329,7 @@
goto err_pce_dev;
}
- pce_dev->memsize = 9 * PAGE_SIZE;
+ pce_dev->memsize = 10 * PAGE_SIZE;
pce_dev->coh_vmem = dma_alloc_coherent(pce_dev->pdev,
pce_dev->memsize, &pce_dev->coh_pmem, GFP_KERNEL);
if (pce_dev->coh_vmem == NULL) {
@@ -4354,7 +5344,7 @@
*rc = qce_enable_clk(pce_dev);
if (*rc)
- goto err;
+ goto err_enable_clk;
if (_probe_ce_engine(pce_dev)) {
*rc = -ENXIO;
@@ -4363,12 +5353,17 @@
*rc = 0;
qce_init_ce_cfg_val(pce_dev);
- qce_sps_init(pce_dev);
+ *rc = qce_sps_init(pce_dev);
+ if (*rc)
+ goto err;
qce_setup_ce_sps_data(pce_dev);
qce_disable_clk(pce_dev);
return pce_dev;
err:
+ qce_disable_clk(pce_dev);
+
+err_enable_clk:
__qce_deinit_clk(pce_dev);
err_mem:
@@ -4410,6 +5405,11 @@
}
EXPORT_SYMBOL(qce_close);
+#define OTA_SUPPORT_MASK (1 << CRYPTO_ENCR_SNOW3G_SEL |\
+ 1 << CRYPTO_ENCR_KASUMI_SEL |\
+ 1 << CRYPTO_AUTH_SNOW3G_SEL |\
+ 1 << CRYPTO_AUTH_KASUMI_SEL)
+
int qce_hw_support(void *handle, struct ce_hw_support *ce_support)
{
struct qce_device *pce_dev = (struct qce_device *)handle;
@@ -4424,7 +5424,10 @@
ce_support->cmac = true;
ce_support->aes_key_192 = false;
ce_support->aes_xts = true;
- ce_support->ota = false;
+ if ((pce_dev->engines_avail & OTA_SUPPORT_MASK) == OTA_SUPPORT_MASK)
+ ce_support->ota = true;
+ else
+ ce_support->ota = false;
ce_support->bam = true;
ce_support->is_shared = (pce_dev->is_shared == 1) ? true : false;
ce_support->hw_key = pce_dev->support_hw_key;
@@ -4433,6 +5436,19 @@
ce_support->aligned_only = false;
else
ce_support->aligned_only = true;
+
+ ce_support->use_sw_aes_cbc_ecb_ctr_algo =
+ pce_dev->use_sw_aes_cbc_ecb_ctr_algo;
+ ce_support->use_sw_aead_algo =
+ pce_dev->use_sw_aead_algo;
+ ce_support->use_sw_aes_xts_algo =
+ pce_dev->use_sw_aes_xts_algo;
+ ce_support->use_sw_ahash_algo =
+ pce_dev->use_sw_ahash_algo;
+ ce_support->use_sw_hmac_algo =
+ pce_dev->use_sw_hmac_algo;
+ ce_support->use_sw_aes_ccm_algo =
+ pce_dev->use_sw_aes_ccm_algo;
return 0;
}
EXPORT_SYMBOL(qce_hw_support);
diff --git a/drivers/crypto/msm/qce50.h b/drivers/crypto/msm/qce50.h
index adab5d4..fc387aa 100644
--- a/drivers/crypto/msm/qce50.h
+++ b/drivers/crypto/msm/qce50.h
@@ -113,6 +113,10 @@
struct qce_cmdlist_info aead_hmac_sha1_ecb_3des;
struct qce_cmdlist_info aead_aes_128_ccm;
struct qce_cmdlist_info aead_aes_256_ccm;
+ struct qce_cmdlist_info f8_kasumi;
+ struct qce_cmdlist_info f8_snow3g;
+ struct qce_cmdlist_info f9_kasumi;
+ struct qce_cmdlist_info f9_snow3g;
struct qce_cmdlist_info unlock_all_pipes;
};
@@ -140,6 +144,8 @@
uint32_t encr_cfg_3des_cbc;
uint32_t encr_cfg_3des_ecb;
+ uint32_t encr_cfg_kasumi;
+ uint32_t encr_cfg_snow3g;
uint32_t auth_cfg_cmac_128;
uint32_t auth_cfg_cmac_256;
@@ -154,7 +160,8 @@
uint32_t auth_cfg_aes_ccm_256;
uint32_t auth_cfg_aead_sha1_hmac;
uint32_t auth_cfg_aead_sha256_hmac;
-
+ uint32_t auth_cfg_kasumi;
+ uint32_t auth_cfg_snow3g;
};
/* DM data structure with buffers, commandlists & commmand pointer lists */
diff --git a/drivers/crypto/msm/qcrypto.c b/drivers/crypto/msm/qcrypto.c
index 6606706..974606d 100644
--- a/drivers/crypto/msm/qcrypto.c
+++ b/drivers/crypto/msm/qcrypto.c
@@ -1,6 +1,6 @@
/* Qualcomm Crypto driver
*
- * Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -24,6 +24,10 @@
#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <linux/debugfs.h>
+#include <linux/workqueue.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/cache.h>
#include <crypto/ctr.h>
#include <crypto/des.h>
@@ -51,6 +55,8 @@
*/
#define MAX_ALIGN_SIZE 0x40
+#define QCRYPTO_HIGH_BANDWIDTH_TIMEOUT 1000
+
struct crypto_stat {
u32 aead_sha1_aes_enc;
u32 aead_sha1_aes_dec;
@@ -83,6 +89,30 @@
static struct crypto_stat _qcrypto_stat;
static struct dentry *_debug_dent;
static char _debug_read_buf[DEBUG_MAX_RW_BUF];
+struct crypto_priv;
+struct crypto_engine {
+ struct list_head elist;
+ void *qce; /* qce handle */
+ struct platform_device *pdev; /* platform device */
+ struct crypto_async_request *req; /* current active request */
+ struct crypto_priv *pcp;
+ struct tasklet_struct done_tasklet;
+ uint32_t bus_scale_handle;
+ struct crypto_queue req_queue; /*
+ * request queue for those requests
+ * that have this engine assgined
+ * waiting to be executed
+ */
+ u32 total_req;
+ u32 err_req;
+ u32 unit;
+ int res; /* execution result */
+ unsigned int signature;
+ uint32_t high_bw_req_count;
+ bool high_bw_req;
+ struct timer_list bw_scale_down_timer;
+ struct work_struct low_bw_req_ws;
+};
struct crypto_priv {
/* CE features supported by target device*/
@@ -91,34 +121,25 @@
/* CE features/algorithms supported by HW engine*/
struct ce_hw_support ce_support;
- uint32_t bus_scale_handle;
/* the lock protects queue and req*/
spinlock_t lock;
- /* qce handle */
- void *qce;
-
/* list of registered algorithms */
struct list_head alg_list;
- /* platform device */
- struct platform_device *pdev;
-
/* current active request */
struct crypto_async_request *req;
- int res;
-
- /* request queue */
- struct crypto_queue queue;
uint32_t ce_lock_count;
- uint32_t high_bw_req_count;
-
struct work_struct unlock_ce_ws;
-
- struct tasklet_struct done_tasklet;
+ struct list_head engine_list; /* list of qcrypto engines */
+ int32_t total_units; /* total units of engines */
+ struct mutex engine_lock;
+ struct crypto_engine *next_engine; /* next assign engine */
};
-
+static struct crypto_priv qcrypto_dev;
+static struct crypto_engine *_qcrypto_static_assign_engine(
+ struct crypto_priv *cp);
/*-------------------------------------------------------------------------
* Resource Locking Service
@@ -129,8 +150,6 @@
#define NUM_RETRY 1000
#define CE_BUSY 55
-static DEFINE_MUTEX(qcrypto_sent_bw_req);
-
static int qcrypto_scm_cmd(int resource, int cmd, int *response)
{
#ifdef CONFIG_MSM_SCM
@@ -224,6 +243,7 @@
struct crypto_priv *cp;
unsigned int flags;
+ struct crypto_engine *pengine; /* fixed engine assigned */
};
struct qcrypto_cipher_req_ctx {
@@ -266,30 +286,18 @@
struct qcrypto_sha_ctx {
enum qce_hash_alg_enum alg;
- uint32_t byte_count[4];
- uint8_t digest[SHA_MAX_DIGEST_SIZE];
uint32_t diglen;
- uint8_t *tmp_tbuf;
- uint8_t *trailing_buf;
- uint8_t *in_buf;
uint32_t authkey_in_len;
- uint32_t trailing_buf_len;
- uint8_t first_blk;
- uint8_t last_blk;
uint8_t authkey[SHA_MAX_BLOCK_SIZE];
struct ahash_request *ahash_req;
struct completion ahash_req_complete;
- struct scatterlist *sg;
- struct scatterlist tmp_sg;
struct crypto_priv *cp;
unsigned int flags;
+ struct crypto_engine *pengine; /* fixed engine assigned */
};
struct qcrypto_sha_req_ctx {
- union {
- struct sha1_state sha1_state_ctx;
- struct sha256_state sha256_state_ctx;
- };
+
struct scatterlist *src;
uint32_t nbytes;
@@ -297,6 +305,20 @@
struct scatterlist dsg; /* Data sg */
unsigned char *data; /* Incoming data pointer*/
unsigned char *data2; /* Updated data pointer*/
+
+ uint32_t byte_count[4];
+ u64 count;
+ uint8_t first_blk;
+ uint8_t last_blk;
+ uint8_t trailing_buf[SHA_MAX_BLOCK_SIZE];
+ uint32_t trailing_buf_len;
+
+ /* dma buffer, Internal use */
+ uint8_t staging_dmabuf
+ [SHA_MAX_BLOCK_SIZE+SHA_MAX_DIGEST_SIZE+MAX_ALIGN_SIZE];
+
+ uint8_t digest[SHA_MAX_DIGEST_SIZE];
+ struct scatterlist sg[2];
};
static void _byte_stream_to_words(uint32_t *iv, unsigned char *b,
@@ -304,7 +326,7 @@
{
unsigned n;
- n = len / sizeof(uint32_t) ;
+ n = len / sizeof(uint32_t);
for (; n > 0; n--) {
*iv = ((*b << 24) & 0xff000000) |
(((*(b+1)) << 16) & 0xff0000) |
@@ -318,12 +340,12 @@
if (n == 3) {
*iv = ((*b << 24) & 0xff000000) |
(((*(b+1)) << 16) & 0xff0000) |
- (((*(b+2)) << 8) & 0xff00) ;
+ (((*(b+2)) << 8) & 0xff00);
} else if (n == 2) {
*iv = ((*b << 24) & 0xff000000) |
- (((*(b+1)) << 16) & 0xff0000) ;
+ (((*(b+1)) << 16) & 0xff0000);
} else if (n == 1) {
- *iv = ((*b << 24) & 0xff000000) ;
+ *iv = ((*b << 24) & 0xff000000);
}
}
@@ -352,58 +374,103 @@
}
}
-static void qcrypto_ce_high_bw_req(struct crypto_priv *cp, bool high_bw_req)
+static void qcrypto_ce_set_bus(struct crypto_engine *pengine,
+ bool high_bw_req)
{
int ret = 0;
- mutex_lock(&qcrypto_sent_bw_req);
- if (high_bw_req) {
- if (cp->high_bw_req_count == 0) {
- ret = qce_enable_clk(cp->qce);
- if (ret) {
- pr_err("%s Unable enable clk\n", __func__);
- mutex_unlock(&qcrypto_sent_bw_req);
- return;
- }
+ if (high_bw_req && pengine->high_bw_req == false) {
+ pm_stay_awake(&pengine->pdev->dev);
+ ret = qce_enable_clk(pengine->qce);
+ if (ret) {
+ pr_err("%s Unable enable clk\n", __func__);
+ goto clk_err;
+ }
+ ret = msm_bus_scale_client_update_request(
+ pengine->bus_scale_handle, 1);
+ if (ret) {
+ pr_err("%s Unable to set to high bandwidth\n",
+ __func__);
+ qce_disable_clk(pengine->qce);
+ goto clk_err;
+ }
+ pengine->high_bw_req = true;
+ } else if (high_bw_req == false && pengine->high_bw_req == true) {
+ ret = msm_bus_scale_client_update_request(
+ pengine->bus_scale_handle, 0);
+ if (ret) {
+ pr_err("%s Unable to set to low bandwidth\n",
+ __func__);
+ goto clk_err;
+ }
+ ret = qce_disable_clk(pengine->qce);
+ if (ret) {
+ pr_err("%s Unable disable clk\n", __func__);
ret = msm_bus_scale_client_update_request(
- cp->bus_scale_handle, 1);
- if (ret) {
+ pengine->bus_scale_handle, 1);
+ if (ret)
pr_err("%s Unable to set to high bandwidth\n",
- __func__);
- qce_disable_clk(cp->qce);
- mutex_unlock(&qcrypto_sent_bw_req);
- return;
- }
+ __func__);
+ goto clk_err;
}
- cp->high_bw_req_count++;
- } else {
- if (cp->high_bw_req_count == 1) {
- ret = msm_bus_scale_client_update_request(
- cp->bus_scale_handle, 0);
- if (ret) {
- pr_err("%s Unable to set to low bandwidth\n",
- __func__);
- mutex_unlock(&qcrypto_sent_bw_req);
- return;
- }
- ret = qce_disable_clk(cp->qce);
- if (ret) {
- pr_err("%s Unable disable clk\n", __func__);
- ret = msm_bus_scale_client_update_request(
- cp->bus_scale_handle, 1);
- if (ret)
- pr_err("%s Unable to set to high bandwidth\n",
- __func__);
- mutex_unlock(&qcrypto_sent_bw_req);
- return;
- }
- }
- cp->high_bw_req_count--;
+ pengine->high_bw_req = false;
+ pm_relax(&pengine->pdev->dev);
}
- mutex_unlock(&qcrypto_sent_bw_req);
+ return;
+clk_err:
+ pm_relax(&pengine->pdev->dev);
+ return;
+
}
-static int _start_qcrypto_process(struct crypto_priv *cp);
+static void qcrypto_bw_scale_down_timer_callback(unsigned long data)
+{
+ struct crypto_engine *pengine = (struct crypto_engine *)data;
+
+ schedule_work(&pengine->low_bw_req_ws);
+
+ return;
+}
+
+static void qcrypto_bw_set_timeout(struct crypto_engine *pengine)
+{
+ del_timer_sync(&(pengine->bw_scale_down_timer));
+ pengine->bw_scale_down_timer.data =
+ (unsigned long)(pengine);
+ pengine->bw_scale_down_timer.expires = jiffies +
+ msecs_to_jiffies(QCRYPTO_HIGH_BANDWIDTH_TIMEOUT);
+ add_timer(&(pengine->bw_scale_down_timer));
+}
+
+static void qcrypto_ce_bw_scaling_req(struct crypto_engine *pengine,
+ bool high_bw_req)
+{
+ mutex_lock(&pengine->pcp->engine_lock);
+ if (high_bw_req) {
+ if (pengine->high_bw_req_count == 0)
+ qcrypto_ce_set_bus(pengine, true);
+ pengine->high_bw_req_count++;
+ } else {
+ pengine->high_bw_req_count--;
+ if (pengine->high_bw_req_count == 0)
+ qcrypto_bw_set_timeout(pengine);
+ }
+ mutex_unlock(&pengine->pcp->engine_lock);
+}
+
+static void qcrypto_low_bw_req_work(struct work_struct *work)
+{
+ struct crypto_engine *pengine = container_of(work,
+ struct crypto_engine, low_bw_req_ws);
+
+ mutex_lock(&pengine->pcp->engine_lock);
+ if (pengine->high_bw_req_count == 0)
+ qcrypto_ce_set_bus(pengine, false);
+ mutex_unlock(&pengine->pcp->engine_lock);
+}
+
+static int _start_qcrypto_process(struct crypto_priv *cp,
+ struct crypto_engine *pengine);
static int qcrypto_count_sg(struct scatterlist *sg, int nbytes)
{
@@ -499,9 +566,11 @@
/* random first IV */
get_random_bytes(ctx->iv, QCRYPTO_MAX_IV_LENGTH);
+ ctx->pengine = _qcrypto_static_assign_engine(ctx->cp);
+ if (ctx->pengine == NULL)
+ return -ENODEV;
if (ctx->cp->platform_support.bus_scale_table != NULL)
- qcrypto_ce_high_bw_req(ctx->cp, true);
-
+ qcrypto_ce_bw_scaling_req(ctx->pengine, true);
return 0;
};
@@ -517,30 +586,13 @@
crypto_ahash_set_reqsize(ahash, sizeof(struct qcrypto_sha_req_ctx));
/* update context with ptr to cp */
sha_ctx->cp = q_alg->cp;
- sha_ctx->sg = NULL;
sha_ctx->flags = 0;
-
- sha_ctx->tmp_tbuf = kzalloc(SHA_MAX_BLOCK_SIZE +
- SHA_MAX_DIGEST_SIZE, GFP_KERNEL);
- if (sha_ctx->tmp_tbuf == NULL) {
- pr_err("qcrypto Can't Allocate mem: sha_ctx->tmp_tbuf, error %ld\n",
- PTR_ERR(sha_ctx->tmp_tbuf));
- return -ENOMEM;
- }
-
- sha_ctx->trailing_buf = kzalloc(SHA_MAX_BLOCK_SIZE, GFP_KERNEL);
- if (sha_ctx->trailing_buf == NULL) {
- kfree(sha_ctx->tmp_tbuf);
- sha_ctx->tmp_tbuf = NULL;
- pr_err("qcrypto Can't Allocate mem: sha_ctx->trailing_buf, error %ld\n",
- PTR_ERR(sha_ctx->trailing_buf));
- return -ENOMEM;
- }
-
sha_ctx->ahash_req = NULL;
+ sha_ctx->pengine = _qcrypto_static_assign_engine(sha_ctx->cp);
+ if (sha_ctx->pengine == NULL)
+ return -ENODEV;
if (sha_ctx->cp->platform_support.bus_scale_table != NULL)
- qcrypto_ce_high_bw_req(sha_ctx->cp, true);
-
+ qcrypto_ce_bw_scaling_req(sha_ctx->pengine, true);
return 0;
};
@@ -548,20 +600,13 @@
{
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(tfm);
- kfree(sha_ctx->tmp_tbuf);
- sha_ctx->tmp_tbuf = NULL;
- kfree(sha_ctx->trailing_buf);
- sha_ctx->trailing_buf = NULL;
- if (sha_ctx->sg != NULL) {
- kfree(sha_ctx->sg);
- sha_ctx->sg = NULL;
- }
if (sha_ctx->ahash_req != NULL) {
ahash_request_free(sha_ctx->ahash_req);
sha_ctx->ahash_req = NULL;
}
- if (sha_ctx->cp->platform_support.bus_scale_table != NULL)
- qcrypto_ce_high_bw_req(sha_ctx->cp, false);
+ if (sha_ctx->pengine &&
+ sha_ctx->cp->platform_support.bus_scale_table != NULL)
+ qcrypto_ce_bw_scaling_req(sha_ctx->pengine, false);
};
@@ -610,22 +655,25 @@
{
struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
- if (ctx->cp->platform_support.bus_scale_table != NULL)
- qcrypto_ce_high_bw_req(ctx->cp, false);
+ if (ctx->pengine && ctx->cp->platform_support.bus_scale_table != NULL)
+ qcrypto_ce_bw_scaling_req(ctx->pengine, false);
};
static void _qcrypto_cra_aead_exit(struct crypto_tfm *tfm)
{
struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
- if (ctx->cp->platform_support.bus_scale_table != NULL)
- qcrypto_ce_high_bw_req(ctx->cp, false);
+ if (ctx->pengine && ctx->cp->platform_support.bus_scale_table != NULL)
+ qcrypto_ce_bw_scaling_req(ctx->pengine, false);
};
static int _disp_stats(int id)
{
struct crypto_stat *pstat;
int len = 0;
+ unsigned long flags;
+ struct crypto_priv *cp = &qcrypto_dev;
+ struct crypto_engine *pe;
pstat = &_qcrypto_stat;
len = scnprintf(_debug_read_buf, DEBUG_MAX_RW_BUF - 1,
@@ -722,22 +770,55 @@
len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
" SHA HMAC operation success : %d\n",
pstat->sha_hmac_op_success);
+ spin_lock_irqsave(&cp->lock, flags);
+ list_for_each_entry(pe, &cp->engine_list, elist) {
+ len += snprintf(
+ _debug_read_buf + len,
+ DEBUG_MAX_RW_BUF - len - 1,
+ " Engine %d Req : %d\n",
+ pe->unit,
+ pe->total_req
+ );
+ len += snprintf(
+ _debug_read_buf + len,
+ DEBUG_MAX_RW_BUF - len - 1,
+ " Engine %d Req Error : %d\n",
+ pe->unit,
+ pe->err_req
+ );
+ }
+ spin_unlock_irqrestore(&cp->lock, flags);
return len;
}
-static int _qcrypto_remove(struct platform_device *pdev)
+static void _qcrypto_remove_engine(struct crypto_engine *pengine)
{
struct crypto_priv *cp;
struct qcrypto_alg *q_alg;
struct qcrypto_alg *n;
+ unsigned long flags;
- cp = platform_get_drvdata(pdev);
+ cp = pengine->pcp;
- if (!cp)
- return 0;
+ spin_lock_irqsave(&cp->lock, flags);
+ list_del(&pengine->elist);
+ if (cp->next_engine == pengine)
+ cp->next_engine = NULL;
+ spin_unlock_irqrestore(&cp->lock, flags);
- if (cp->platform_support.bus_scale_table != NULL)
- msm_bus_scale_unregister_client(cp->bus_scale_handle);
+ cp->total_units--;
+
+ tasklet_kill(&pengine->done_tasklet);
+ cancel_work_sync(&pengine->low_bw_req_ws);
+ del_timer_sync(&pengine->bw_scale_down_timer);
+ device_init_wakeup(&pengine->pdev->dev, false);
+
+ if (pengine->bus_scale_handle != 0)
+ msm_bus_scale_unregister_client(pengine->bus_scale_handle);
+ pengine->bus_scale_handle = 0;
+
+ if (cp->total_units)
+ return;
list_for_each_entry_safe(q_alg, n, &cp->alg_list, entry) {
if (q_alg->alg_type == QCRYPTO_ALG_CIPHER)
@@ -747,14 +828,26 @@
list_del(&q_alg->entry);
kfree(q_alg);
}
+}
- if (cp->qce)
- qce_close(cp->qce);
- tasklet_kill(&cp->done_tasklet);
- kfree(cp);
+static int _qcrypto_remove(struct platform_device *pdev)
+{
+ struct crypto_engine *pengine;
+ struct crypto_priv *cp;
+
+ pengine = platform_get_drvdata(pdev);
+
+ if (!pengine)
+ return 0;
+ cp = pengine->pcp;
+ mutex_lock(&cp->engine_lock);
+ _qcrypto_remove_engine(pengine);
+ mutex_unlock(&cp->engine_lock);
+ if (pengine->qce)
+ qce_close(pengine->qce);
+ kfree(pengine);
return 0;
-};
-
+}
static int _qcrypto_check_aes_keylen(struct crypto_ablkcipher *cipher,
struct crypto_priv *cp, unsigned int len)
@@ -894,54 +987,24 @@
static void req_done(unsigned long data)
{
struct crypto_async_request *areq;
- struct crypto_priv *cp = (struct crypto_priv *)data;
+ struct crypto_engine *pengine = (struct crypto_engine *)data;
+ struct crypto_priv *cp;
unsigned long flags;
+ int res;
+ cp = pengine->pcp;
spin_lock_irqsave(&cp->lock, flags);
- areq = cp->req;
- cp->req = NULL;
+ areq = pengine->req;
+ pengine->req = NULL;
+ res = pengine->res;
spin_unlock_irqrestore(&cp->lock, flags);
-
if (areq)
- areq->complete(areq, cp->res);
- _start_qcrypto_process(cp);
+ areq->complete(areq, res);
+ if (res)
+ pengine->err_req++;
+ _start_qcrypto_process(cp, pengine);
};
-static void _update_sha1_ctx(struct ahash_request *req)
-{
- struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
- struct sha1_state *sha_state_ctx = &rctx->sha1_state_ctx;
- struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
-
- if (sha_ctx->last_blk == 1)
- memset(sha_state_ctx, 0x00, sizeof(struct sha1_state));
- else {
- memset(sha_state_ctx->buffer, 0x00, SHA1_BLOCK_SIZE);
- memcpy(sha_state_ctx->buffer, sha_ctx->trailing_buf,
- sha_ctx->trailing_buf_len);
- _byte_stream_to_words(sha_state_ctx->state , sha_ctx->digest,
- SHA1_DIGEST_SIZE);
- }
- return;
-}
-
-static void _update_sha256_ctx(struct ahash_request *req)
-{
- struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
- struct sha256_state *sha_state_ctx = &rctx->sha256_state_ctx;
- struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
-
- if (sha_ctx->last_blk == 1)
- memset(sha_state_ctx, 0x00, sizeof(struct sha256_state));
- else {
- memset(sha_state_ctx->buf, 0x00, SHA256_BLOCK_SIZE);
- memcpy(sha_state_ctx->buf, sha_ctx->trailing_buf,
- sha_ctx->trailing_buf_len);
- _byte_stream_to_words(sha_state_ctx->state, sha_ctx->digest,
- SHA256_DIGEST_SIZE);
- }
- return;
-}
static void _qce_ahash_complete(void *cookie, unsigned char *digest,
unsigned char *authdata, int ret)
@@ -954,44 +1017,36 @@
struct crypto_stat *pstat;
uint32_t diglen = crypto_ahash_digestsize(ahash);
uint32_t *auth32 = (uint32_t *)authdata;
+ struct crypto_engine *pengine;
pstat = &_qcrypto_stat;
+ pengine = sha_ctx->pengine;
#ifdef QCRYPTO_DEBUG
- dev_info(&cp->pdev->dev, "_qce_ahash_complete: %p ret %d\n",
+ dev_info(&pengine->pdev->dev, "_qce_ahash_complete: %p ret %d\n",
areq, ret);
#endif
if (digest) {
- memcpy(sha_ctx->digest, digest, diglen);
+ memcpy(rctx->digest, digest, diglen);
memcpy(areq->result, digest, diglen);
}
if (authdata) {
- sha_ctx->byte_count[0] = auth32[0];
- sha_ctx->byte_count[1] = auth32[1];
- sha_ctx->byte_count[2] = auth32[2];
- sha_ctx->byte_count[3] = auth32[3];
+ rctx->byte_count[0] = auth32[0];
+ rctx->byte_count[1] = auth32[1];
+ rctx->byte_count[2] = auth32[2];
+ rctx->byte_count[3] = auth32[3];
}
areq->src = rctx->src;
areq->nbytes = rctx->nbytes;
- if (sha_ctx->sg != NULL) {
- kfree(sha_ctx->sg);
- sha_ctx->sg = NULL;
- }
-
- if (sha_ctx->alg == QCE_HASH_SHA1)
- _update_sha1_ctx(areq);
- if (sha_ctx->alg == QCE_HASH_SHA256)
- _update_sha256_ctx(areq);
-
- sha_ctx->last_blk = 0;
- sha_ctx->first_blk = 0;
+ rctx->last_blk = 0;
+ rctx->first_blk = 0;
if (ret) {
- cp->res = -ENXIO;
+ pengine->res = -ENXIO;
pstat->sha_op_fail++;
} else {
- cp->res = 0;
+ pengine->res = 0;
pstat->sha_op_success++;
}
if (cp->ce_support.aligned_only) {
@@ -1001,7 +1056,7 @@
if (cp->platform_support.ce_shared)
schedule_work(&cp->unlock_ce_ws);
- tasklet_schedule(&cp->done_tasklet);
+ tasklet_schedule(&pengine->done_tasklet);
};
static void _qce_ablk_cipher_complete(void *cookie, unsigned char *icb,
@@ -1012,21 +1067,22 @@
struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(areq->base.tfm);
struct crypto_priv *cp = ctx->cp;
struct crypto_stat *pstat;
+ struct crypto_engine *pengine;
pstat = &_qcrypto_stat;
-
+ pengine = ctx->pengine;
#ifdef QCRYPTO_DEBUG
- dev_info(&cp->pdev->dev, "_qce_ablk_cipher_complete: %p ret %d\n",
+ dev_info(&pengine->pdev->dev, "_qce_ablk_cipher_complete: %p ret %d\n",
areq, ret);
#endif
if (iv)
memcpy(ctx->iv, iv, crypto_ablkcipher_ivsize(ablk));
if (ret) {
- cp->res = -ENXIO;
+ pengine->res = -ENXIO;
pstat->ablk_cipher_op_fail++;
} else {
- cp->res = 0;
+ pengine->res = 0;
pstat->ablk_cipher_op_success++;
}
@@ -1050,7 +1106,7 @@
if (cp->platform_support.ce_shared)
schedule_work(&cp->unlock_ce_ws);
- tasklet_schedule(&cp->done_tasklet);
+ tasklet_schedule(&pengine->done_tasklet);
};
@@ -1063,9 +1119,10 @@
struct crypto_priv *cp = ctx->cp;
struct qcrypto_cipher_req_ctx *rctx;
struct crypto_stat *pstat;
+ struct crypto_engine *pengine;
pstat = &_qcrypto_stat;
-
+ pengine = ctx->pengine;
rctx = aead_request_ctx(areq);
if (rctx->mode == QCE_MODE_CCM) {
@@ -1162,11 +1219,11 @@
else
pstat->aead_op_success++;
- cp->res = ret;
+ pengine->res = ret;
if (cp->platform_support.ce_shared)
schedule_work(&cp->unlock_ce_ws);
- tasklet_schedule(&cp->done_tasklet);
+ tasklet_schedule(&pengine->done_tasklet);
}
static int aead_ccm_set_msg_len(u8 *block, unsigned int msglen, int csize)
@@ -1251,7 +1308,7 @@
return 0;
}
-static int _qcrypto_process_ablkcipher(struct crypto_priv *cp,
+static int _qcrypto_process_ablkcipher(struct crypto_engine *pengine,
struct crypto_async_request *async_req)
{
struct qce_req qreq;
@@ -1265,7 +1322,7 @@
cipher_ctx = crypto_tfm_ctx(async_req->tfm);
rctx = ablkcipher_request_ctx(req);
tfm = crypto_ablkcipher_reqtfm(req);
- if (cp->ce_support.aligned_only) {
+ if (pengine->pcp->ce_support.aligned_only) {
uint32_t bytes = 0;
uint32_t num_sg = 0;
@@ -1306,35 +1363,37 @@
qreq.flags = cipher_ctx->flags;
if ((cipher_ctx->enc_key_len == 0) &&
- (cp->platform_support.hw_key_support == 0))
+ (pengine->pcp->platform_support.hw_key_support == 0))
ret = -EINVAL;
else
- ret = qce_ablk_cipher_req(cp->qce, &qreq);
+ ret = qce_ablk_cipher_req(pengine->qce, &qreq);
return ret;
}
-static int _qcrypto_process_ahash(struct crypto_priv *cp,
+static int _qcrypto_process_ahash(struct crypto_engine *pengine,
struct crypto_async_request *async_req)
{
struct ahash_request *req;
struct qce_sha_req sreq;
+ struct qcrypto_sha_req_ctx *rctx;
struct qcrypto_sha_ctx *sha_ctx;
int ret = 0;
req = container_of(async_req,
struct ahash_request, base);
+ rctx = ahash_request_ctx(req);
sha_ctx = crypto_tfm_ctx(async_req->tfm);
sreq.qce_cb = _qce_ahash_complete;
- sreq.digest = &sha_ctx->digest[0];
+ sreq.digest = &rctx->digest[0];
sreq.src = req->src;
- sreq.auth_data[0] = sha_ctx->byte_count[0];
- sreq.auth_data[1] = sha_ctx->byte_count[1];
- sreq.auth_data[2] = sha_ctx->byte_count[2];
- sreq.auth_data[3] = sha_ctx->byte_count[3];
- sreq.first_blk = sha_ctx->first_blk;
- sreq.last_blk = sha_ctx->last_blk;
+ sreq.auth_data[0] = rctx->byte_count[0];
+ sreq.auth_data[1] = rctx->byte_count[1];
+ sreq.auth_data[2] = rctx->byte_count[2];
+ sreq.auth_data[3] = rctx->byte_count[3];
+ sreq.first_blk = rctx->first_blk;
+ sreq.last_blk = rctx->last_blk;
sreq.size = req->nbytes;
sreq.areq = req;
sreq.flags = sha_ctx->flags;
@@ -1363,12 +1422,12 @@
ret = -1;
break;
};
- ret = qce_process_sha_req(cp->qce, &sreq);
+ ret = qce_process_sha_req(pengine->qce, &sreq);
return ret;
}
-static int _qcrypto_process_aead(struct crypto_priv *cp,
+static int _qcrypto_process_aead(struct crypto_engine *pengine,
struct crypto_async_request *async_req)
{
struct qce_req qreq;
@@ -1417,7 +1476,7 @@
if (ret)
return ret;
- if (cp->ce_support.aligned_only) {
+ if (pengine->pcp->ce_support.aligned_only) {
uint32_t bytes = 0;
uint32_t num_sg = 0;
@@ -1487,7 +1546,7 @@
sg_mark_end(req->assoc);
} else {
/* for aead operations, other than aes(ccm) */
- if (cp->ce_support.aligned_only) {
+ if (pengine->pcp->ce_support.aligned_only) {
uint32_t bytes = 0;
uint32_t num_sg = 0;
@@ -1558,12 +1617,36 @@
req->dst = &rctx->dsg;
}
}
- ret = qce_aead_req(cp->qce, &qreq);
+ ret = qce_aead_req(pengine->qce, &qreq);
return ret;
}
+#define list_next_entry(pos, member) \
+ list_entry(pos->member.next, typeof(*pos), member)
+static struct crypto_engine *_qcrypto_static_assign_engine(
+ struct crypto_priv *cp)
+{
+ struct crypto_engine *pengine;
+ unsigned long flags;
-static int _start_qcrypto_process(struct crypto_priv *cp)
+ spin_lock_irqsave(&cp->lock, flags);
+ if (cp->next_engine)
+ pengine = cp->next_engine;
+ else
+ pengine = list_first_entry(&cp->engine_list,
+ struct crypto_engine, elist);
+
+ if (list_is_last(&pengine->elist, &cp->engine_list))
+ cp->next_engine = list_first_entry(
+ &cp->engine_list, struct crypto_engine, elist);
+ else
+ cp->next_engine = list_next_entry(pengine, elist);
+ spin_unlock_irqrestore(&cp->lock, flags);
+ return pengine;
+}
+
+static int _start_qcrypto_process(struct crypto_priv *cp,
+ struct crypto_engine *pengine)
{
struct crypto_async_request *async_req = NULL;
struct crypto_async_request *backlog = NULL;
@@ -1576,10 +1659,10 @@
again:
spin_lock_irqsave(&cp->lock, flags);
- if (cp->req == NULL) {
- backlog = crypto_get_backlog(&cp->queue);
- async_req = crypto_dequeue_request(&cp->queue);
- cp->req = async_req;
+ if (pengine->req == NULL) {
+ backlog = crypto_get_backlog(&pengine->req_queue);
+ async_req = crypto_dequeue_request(&pengine->req_queue);
+ pengine->req = async_req;
}
spin_unlock_irqrestore(&cp->lock, flags);
if (!async_req)
@@ -1590,21 +1673,22 @@
switch (type) {
case CRYPTO_ALG_TYPE_ABLKCIPHER:
- ret = _qcrypto_process_ablkcipher(cp, async_req);
+ ret = _qcrypto_process_ablkcipher(pengine, async_req);
break;
case CRYPTO_ALG_TYPE_AHASH:
- ret = _qcrypto_process_ahash(cp, async_req);
+ ret = _qcrypto_process_ahash(pengine, async_req);
break;
case CRYPTO_ALG_TYPE_AEAD:
- ret = _qcrypto_process_aead(cp, async_req);
+ ret = _qcrypto_process_aead(pengine, async_req);
break;
default:
ret = -EINVAL;
};
-
+ pengine->total_req++;
if (ret) {
+ pengine->err_req++;
spin_lock_irqsave(&cp->lock, flags);
- cp->req = NULL;
+ pengine->req = NULL;
spin_unlock_irqrestore(&cp->lock, flags);
if (type == CRYPTO_ALG_TYPE_ABLKCIPHER)
@@ -1622,6 +1706,7 @@
};
static int _qcrypto_queue_req(struct crypto_priv *cp,
+ struct crypto_engine *pengine,
struct crypto_async_request *req)
{
int ret;
@@ -1634,9 +1719,9 @@
}
spin_lock_irqsave(&cp->lock, flags);
- ret = crypto_enqueue_request(&cp->queue, req);
+ ret = crypto_enqueue_request(&pengine->req_queue, req);
spin_unlock_irqrestore(&cp->lock, flags);
- _start_qcrypto_process(cp);
+ _start_qcrypto_process(cp, pengine);
return ret;
}
@@ -1653,7 +1738,7 @@
BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
CRYPTO_ALG_TYPE_ABLKCIPHER);
#ifdef QCRYPTO_DEBUG
- dev_info(&cp->pdev->dev, "_qcrypto_enc_aes_ecb: %p\n", req);
+ dev_info(&ctx->pengine->pdev->dev, "_qcrypto_enc_aes_ecb: %p\n", req);
#endif
rctx = ablkcipher_request_ctx(req);
rctx->aead = 0;
@@ -1662,7 +1747,7 @@
rctx->mode = QCE_MODE_ECB;
pstat->ablk_cipher_aes_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_enc_aes_cbc(struct ablkcipher_request *req)
@@ -1677,7 +1762,7 @@
BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
CRYPTO_ALG_TYPE_ABLKCIPHER);
#ifdef QCRYPTO_DEBUG
- dev_info(&cp->pdev->dev, "_qcrypto_enc_aes_cbc: %p\n", req);
+ dev_info(&ctx->pengine->pdev->dev, "_qcrypto_enc_aes_cbc: %p\n", req);
#endif
rctx = ablkcipher_request_ctx(req);
rctx->aead = 0;
@@ -1686,7 +1771,7 @@
rctx->mode = QCE_MODE_CBC;
pstat->ablk_cipher_aes_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_enc_aes_ctr(struct ablkcipher_request *req)
@@ -1701,7 +1786,7 @@
BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
CRYPTO_ALG_TYPE_ABLKCIPHER);
#ifdef QCRYPTO_DEBUG
- dev_info(&cp->pdev->dev, "_qcrypto_enc_aes_ctr: %p\n", req);
+ dev_info(&ctx->pengine->pdev->dev, "_qcrypto_enc_aes_ctr: %p\n", req);
#endif
rctx = ablkcipher_request_ctx(req);
rctx->aead = 0;
@@ -1710,7 +1795,7 @@
rctx->mode = QCE_MODE_CTR;
pstat->ablk_cipher_aes_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_enc_aes_xts(struct ablkcipher_request *req)
@@ -1731,7 +1816,7 @@
rctx->mode = QCE_MODE_XTS;
pstat->ablk_cipher_aes_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_aead_encrypt_aes_ccm(struct aead_request *req)
@@ -1757,7 +1842,7 @@
rctx->iv = req->iv;
pstat->aead_ccm_aes_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
}
static int _qcrypto_enc_des_ecb(struct ablkcipher_request *req)
@@ -1778,7 +1863,7 @@
rctx->mode = QCE_MODE_ECB;
pstat->ablk_cipher_des_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_enc_des_cbc(struct ablkcipher_request *req)
@@ -1799,7 +1884,7 @@
rctx->mode = QCE_MODE_CBC;
pstat->ablk_cipher_des_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_enc_3des_ecb(struct ablkcipher_request *req)
@@ -1820,7 +1905,7 @@
rctx->mode = QCE_MODE_ECB;
pstat->ablk_cipher_3des_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_enc_3des_cbc(struct ablkcipher_request *req)
@@ -1841,7 +1926,7 @@
rctx->mode = QCE_MODE_CBC;
pstat->ablk_cipher_3des_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_dec_aes_ecb(struct ablkcipher_request *req)
@@ -1856,7 +1941,7 @@
BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
CRYPTO_ALG_TYPE_ABLKCIPHER);
#ifdef QCRYPTO_DEBUG
- dev_info(&cp->pdev->dev, "_qcrypto_dec_aes_ecb: %p\n", req);
+ dev_info(&ctx->pengine->pdev->dev, "_qcrypto_dec_aes_ecb: %p\n", req);
#endif
rctx = ablkcipher_request_ctx(req);
rctx->aead = 0;
@@ -1865,7 +1950,7 @@
rctx->mode = QCE_MODE_ECB;
pstat->ablk_cipher_aes_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_dec_aes_cbc(struct ablkcipher_request *req)
@@ -1880,7 +1965,7 @@
BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
CRYPTO_ALG_TYPE_ABLKCIPHER);
#ifdef QCRYPTO_DEBUG
- dev_info(&cp->pdev->dev, "_qcrypto_dec_aes_cbc: %p\n", req);
+ dev_info(&ctx->pengine->pdev->dev, "_qcrypto_dec_aes_cbc: %p\n", req);
#endif
rctx = ablkcipher_request_ctx(req);
@@ -1890,7 +1975,7 @@
rctx->mode = QCE_MODE_CBC;
pstat->ablk_cipher_aes_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_dec_aes_ctr(struct ablkcipher_request *req)
@@ -1905,7 +1990,7 @@
BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
CRYPTO_ALG_TYPE_ABLKCIPHER);
#ifdef QCRYPTO_DEBUG
- dev_info(&cp->pdev->dev, "_qcrypto_dec_aes_ctr: %p\n", req);
+ dev_info(&ctx->pengine->pdev->dev, "_qcrypto_dec_aes_ctr: %p\n", req);
#endif
rctx = ablkcipher_request_ctx(req);
rctx->aead = 0;
@@ -1916,7 +2001,7 @@
rctx->dir = QCE_ENCRYPT;
pstat->ablk_cipher_aes_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_dec_des_ecb(struct ablkcipher_request *req)
@@ -1937,7 +2022,7 @@
rctx->mode = QCE_MODE_ECB;
pstat->ablk_cipher_des_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_dec_des_cbc(struct ablkcipher_request *req)
@@ -1958,7 +2043,7 @@
rctx->mode = QCE_MODE_CBC;
pstat->ablk_cipher_des_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_dec_3des_ecb(struct ablkcipher_request *req)
@@ -1979,7 +2064,7 @@
rctx->mode = QCE_MODE_ECB;
pstat->ablk_cipher_3des_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_dec_3des_cbc(struct ablkcipher_request *req)
@@ -2000,7 +2085,7 @@
rctx->mode = QCE_MODE_CBC;
pstat->ablk_cipher_3des_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_dec_aes_xts(struct ablkcipher_request *req)
@@ -2021,7 +2106,7 @@
rctx->dir = QCE_DECRYPT;
pstat->ablk_cipher_aes_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
@@ -2048,7 +2133,7 @@
rctx->iv = req->iv;
pstat->aead_ccm_aes_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
}
static int _qcrypto_aead_setauthsize(struct crypto_aead *authenc,
@@ -2156,7 +2241,8 @@
pstat = &_qcrypto_stat;
#ifdef QCRYPTO_DEBUG
- dev_info(&cp->pdev->dev, "_qcrypto_aead_encrypt_aes_cbc: %p\n", req);
+ dev_info(&ctx->pengine->pdev->dev,
+ "_qcrypto_aead_encrypt_aes_cbc: %p\n", req);
#endif
rctx = aead_request_ctx(req);
@@ -2167,7 +2253,7 @@
rctx->iv = req->iv;
pstat->aead_sha1_aes_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
}
static int _qcrypto_aead_decrypt_aes_cbc(struct aead_request *req)
@@ -2180,7 +2266,8 @@
pstat = &_qcrypto_stat;
#ifdef QCRYPTO_DEBUG
- dev_info(&cp->pdev->dev, "_qcrypto_aead_decrypt_aes_cbc: %p\n", req);
+ dev_info(&ctx->pengine->pdev->dev,
+ "_qcrypto_aead_decrypt_aes_cbc: %p\n", req);
#endif
rctx = aead_request_ctx(req);
rctx->aead = 1;
@@ -2190,7 +2277,7 @@
rctx->iv = req->iv;
pstat->aead_sha1_aes_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
}
static int _qcrypto_aead_givencrypt_aes_cbc(struct aead_givcrypt_request *req)
@@ -2215,7 +2302,7 @@
/* avoid consecutive packets going out with same IV */
*(__be64 *)req->giv ^= cpu_to_be64(req->seq);
pstat->aead_sha1_aes_enc++;
- return _qcrypto_queue_req(cp, &areq->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &areq->base);
}
#ifdef QCRYPTO_AEAD_AES_CTR
@@ -2236,7 +2323,7 @@
rctx->iv = req->iv;
pstat->aead_sha1_aes_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
}
static int _qcrypto_aead_decrypt_aes_ctr(struct aead_request *req)
@@ -2259,7 +2346,7 @@
rctx->iv = req->iv;
pstat->aead_sha1_aes_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
}
static int _qcrypto_aead_givencrypt_aes_ctr(struct aead_givcrypt_request *req)
@@ -2284,7 +2371,7 @@
/* avoid consecutive packets going out with same IV */
*(__be64 *)req->giv ^= cpu_to_be64(req->seq);
pstat->aead_sha1_aes_enc++;
- return _qcrypto_queue_req(cp, &areq->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &areq->base);
};
#endif /* QCRYPTO_AEAD_AES_CTR */
@@ -2305,7 +2392,7 @@
rctx->iv = req->iv;
pstat->aead_sha1_des_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
}
static int _qcrypto_aead_decrypt_des_cbc(struct aead_request *req)
@@ -2325,7 +2412,7 @@
rctx->iv = req->iv;
pstat->aead_sha1_des_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
}
static int _qcrypto_aead_givencrypt_des_cbc(struct aead_givcrypt_request *req)
@@ -2350,7 +2437,7 @@
/* avoid consecutive packets going out with same IV */
*(__be64 *)req->giv ^= cpu_to_be64(req->seq);
pstat->aead_sha1_des_enc++;
- return _qcrypto_queue_req(cp, &areq->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &areq->base);
}
static int _qcrypto_aead_encrypt_3des_cbc(struct aead_request *req)
@@ -2370,7 +2457,7 @@
rctx->iv = req->iv;
pstat->aead_sha1_3des_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
}
static int _qcrypto_aead_decrypt_3des_cbc(struct aead_request *req)
@@ -2390,7 +2477,7 @@
rctx->iv = req->iv;
pstat->aead_sha1_3des_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
}
static int _qcrypto_aead_givencrypt_3des_cbc(struct aead_givcrypt_request *req)
@@ -2415,18 +2502,21 @@
/* avoid consecutive packets going out with same IV */
*(__be64 *)req->giv ^= cpu_to_be64(req->seq);
pstat->aead_sha1_3des_enc++;
- return _qcrypto_queue_req(cp, &areq->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &areq->base);
}
-static int _sha_init(struct qcrypto_sha_ctx *ctx)
+static int _sha_init(struct ahash_request *req)
{
- ctx->first_blk = 1;
- ctx->last_blk = 0;
- ctx->byte_count[0] = 0;
- ctx->byte_count[1] = 0;
- ctx->byte_count[2] = 0;
- ctx->byte_count[3] = 0;
- ctx->trailing_buf_len = 0;
+ struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
+
+ rctx->first_blk = 1;
+ rctx->last_blk = 0;
+ rctx->byte_count[0] = 0;
+ rctx->byte_count[1] = 0;
+ rctx->byte_count[2] = 0;
+ rctx->byte_count[3] = 0;
+ rctx->trailing_buf_len = 0;
+ rctx->count = 0;
return 0;
};
@@ -2435,18 +2525,17 @@
{
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
struct crypto_stat *pstat;
+ struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
pstat = &_qcrypto_stat;
- _sha_init(sha_ctx);
+ _sha_init(req);
sha_ctx->alg = QCE_HASH_SHA1;
- memset(&sha_ctx->trailing_buf[0], 0x00, SHA1_BLOCK_SIZE);
- memcpy(&sha_ctx->digest[0], &_std_init_vector_sha1_uint8[0],
+ memset(&rctx->trailing_buf[0], 0x00, SHA1_BLOCK_SIZE);
+ memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
SHA1_DIGEST_SIZE);
sha_ctx->diglen = SHA1_DIGEST_SIZE;
- _update_sha1_ctx(req);
-
pstat->sha1_digest++;
return 0;
};
@@ -2455,18 +2544,17 @@
{
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
struct crypto_stat *pstat;
+ struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
pstat = &_qcrypto_stat;
- _sha_init(sha_ctx);
+ _sha_init(req);
sha_ctx->alg = QCE_HASH_SHA256;
- memset(&sha_ctx->trailing_buf[0], 0x00, SHA256_BLOCK_SIZE);
- memcpy(&sha_ctx->digest[0], &_std_init_vector_sha256_uint8[0],
+ memset(&rctx->trailing_buf[0], 0x00, SHA256_BLOCK_SIZE);
+ memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
SHA256_DIGEST_SIZE);
sha_ctx->diglen = SHA256_DIGEST_SIZE;
- _update_sha256_ctx(req);
-
pstat->sha256_digest++;
return 0;
};
@@ -2475,82 +2563,126 @@
static int _sha1_export(struct ahash_request *req, void *out)
{
struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
- struct sha1_state *sha_state_ctx = &rctx->sha1_state_ctx;
struct sha1_state *out_ctx = (struct sha1_state *)out;
- out_ctx->count = sha_state_ctx->count;
- memcpy(out_ctx->state, sha_state_ctx->state, sizeof(out_ctx->state));
- memcpy(out_ctx->buffer, sha_state_ctx->buffer, SHA1_BLOCK_SIZE);
+ out_ctx->count = rctx->count;
+ _byte_stream_to_words(out_ctx->state, rctx->digest, SHA1_DIGEST_SIZE);
+ memcpy(out_ctx->buffer, rctx->trailing_buf, SHA1_BLOCK_SIZE);
return 0;
};
+static int _sha1_hmac_export(struct ahash_request *req, void *out)
+{
+ return _sha1_export(req, out);
+}
+
+/* crypto hw padding constant for hmac first operation */
+#define HMAC_PADDING 64
+
+static int __sha1_import_common(struct ahash_request *req, const void *in,
+ bool hmac)
+{
+ struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
+ struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
+ struct sha1_state *in_ctx = (struct sha1_state *)in;
+ u64 hw_count = in_ctx->count;
+
+ rctx->count = in_ctx->count;
+ memcpy(rctx->trailing_buf, in_ctx->buffer, SHA1_BLOCK_SIZE);
+ if (in_ctx->count <= SHA1_BLOCK_SIZE) {
+ rctx->first_blk = 1;
+ } else {
+ rctx->first_blk = 0;
+ /*
+ * For hmac, there is a hardware padding done
+ * when first is set. So the byte_count will be
+ * incremened by 64 after the operstion of first
+ */
+ if (hmac)
+ hw_count += HMAC_PADDING;
+ }
+ rctx->byte_count[0] = (uint32_t)(hw_count & 0xFFFFFFC0);
+ rctx->byte_count[1] = (uint32_t)(hw_count >> 32);
+ _words_to_byte_stream(in_ctx->state, rctx->digest, sha_ctx->diglen);
+
+ rctx->trailing_buf_len = (uint32_t)(in_ctx->count &
+ (SHA1_BLOCK_SIZE-1));
+ return 0;
+}
+
static int _sha1_import(struct ahash_request *req, const void *in)
{
- struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
- struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
- struct sha1_state *sha_state_ctx = &rctx->sha1_state_ctx;
- struct sha1_state *in_ctx = (struct sha1_state *)in;
-
- sha_state_ctx->count = in_ctx->count;
- memcpy(sha_state_ctx->state, in_ctx->state, sizeof(in_ctx->state));
- memcpy(sha_state_ctx->buffer, in_ctx->buffer, SHA1_BLOCK_SIZE);
- memcpy(sha_ctx->trailing_buf, in_ctx->buffer, SHA1_BLOCK_SIZE);
-
- sha_ctx->byte_count[0] = (uint32_t)(in_ctx->count & 0xFFFFFFC0);
- sha_ctx->byte_count[1] = (uint32_t)(in_ctx->count >> 32);
- _words_to_byte_stream(in_ctx->state, sha_ctx->digest, sha_ctx->diglen);
-
- sha_ctx->trailing_buf_len = (uint32_t)(in_ctx->count &
- (SHA1_BLOCK_SIZE-1));
-
- if (!(in_ctx->count))
- sha_ctx->first_blk = 1;
- else
- sha_ctx->first_blk = 0;
-
- return 0;
+ return __sha1_import_common(req, in, false);
}
+
+static int _sha1_hmac_import(struct ahash_request *req, const void *in)
+{
+ return __sha1_import_common(req, in, true);
+}
+
static int _sha256_export(struct ahash_request *req, void *out)
{
struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
- struct sha256_state *sha_state_ctx = &rctx->sha256_state_ctx;
struct sha256_state *out_ctx = (struct sha256_state *)out;
- out_ctx->count = sha_state_ctx->count;
- memcpy(out_ctx->state, sha_state_ctx->state, sizeof(out_ctx->state));
- memcpy(out_ctx->buf, sha_state_ctx->buf, SHA256_BLOCK_SIZE);
+ out_ctx->count = rctx->count;
+ _byte_stream_to_words(out_ctx->state, rctx->digest, SHA256_DIGEST_SIZE);
+ memcpy(out_ctx->buf, rctx->trailing_buf, SHA256_BLOCK_SIZE);
return 0;
};
-static int _sha256_import(struct ahash_request *req, const void *in)
+static int _sha256_hmac_export(struct ahash_request *req, void *out)
+{
+ return _sha256_export(req, out);
+}
+
+static int __sha256_import_common(struct ahash_request *req, const void *in,
+ bool hmac)
{
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
- struct sha256_state *sha_state_ctx = &rctx->sha256_state_ctx;
struct sha256_state *in_ctx = (struct sha256_state *)in;
+ u64 hw_count = in_ctx->count;
- sha_state_ctx->count = in_ctx->count;
- memcpy(sha_state_ctx->state, in_ctx->state, sizeof(in_ctx->state));
- memcpy(sha_state_ctx->buf, in_ctx->buf, SHA256_BLOCK_SIZE);
- memcpy(sha_ctx->trailing_buf, in_ctx->buf, SHA256_BLOCK_SIZE);
+ rctx->count = in_ctx->count;
+ memcpy(rctx->trailing_buf, in_ctx->buf, SHA256_BLOCK_SIZE);
- sha_ctx->byte_count[0] = (uint32_t)(in_ctx->count & 0xFFFFFFC0);
- sha_ctx->byte_count[1] = (uint32_t)(in_ctx->count >> 32);
- _words_to_byte_stream(in_ctx->state, sha_ctx->digest, sha_ctx->diglen);
+ if (in_ctx->count <= SHA256_BLOCK_SIZE) {
+ rctx->first_blk = 1;
+ } else {
+ rctx->first_blk = 0;
+ /*
+ * for hmac, there is a hardware padding done
+ * when first is set. So the byte_count will be
+ * incremened by 64 after the operstion of first
+ */
+ if (hmac)
+ hw_count += HMAC_PADDING;
+ }
- sha_ctx->trailing_buf_len = (uint32_t)(in_ctx->count &
+ rctx->byte_count[0] = (uint32_t)(hw_count & 0xFFFFFFC0);
+ rctx->byte_count[1] = (uint32_t)(hw_count >> 32);
+ _words_to_byte_stream(in_ctx->state, rctx->digest, sha_ctx->diglen);
+
+ rctx->trailing_buf_len = (uint32_t)(in_ctx->count &
(SHA256_BLOCK_SIZE-1));
- if (!(in_ctx->count))
- sha_ctx->first_blk = 1;
- else
- sha_ctx->first_blk = 0;
return 0;
}
+static int _sha256_import(struct ahash_request *req, const void *in)
+{
+ return __sha256_import_common(req, in, false);
+}
+
+static int _sha256_hmac_import(struct ahash_request *req, const void *in)
+{
+ return __sha256_import_common(req, in, true);
+}
+
static int _copy_source(struct ahash_request *req)
{
struct qcrypto_sha_req_ctx *srctx = NULL;
@@ -2593,23 +2725,19 @@
uint32_t nbytes;
uint32_t offset = 0;
uint32_t bytes = 0;
-
+ uint8_t *staging;
int ret = 0;
/* check for trailing buffer from previous updates and append it */
- total = req->nbytes + sha_ctx->trailing_buf_len;
+ total = req->nbytes + rctx->trailing_buf_len;
len = req->nbytes;
if (total <= sha_block_size) {
- k_src = &sha_ctx->trailing_buf[sha_ctx->trailing_buf_len];
+ k_src = &rctx->trailing_buf[rctx->trailing_buf_len];
num_sg = qcrypto_count_sg(req->src, len);
bytes = qcrypto_sg_copy_to_buffer(req->src, num_sg, k_src, len);
- sha_ctx->trailing_buf_len = total;
- if (sha_ctx->alg == QCE_HASH_SHA1)
- _update_sha1_ctx(req);
- if (sha_ctx->alg == QCE_HASH_SHA256)
- _update_sha256_ctx(req);
+ rctx->trailing_buf_len = total;
return 0;
}
@@ -2617,9 +2745,10 @@
rctx->src = req->src;
rctx->nbytes = req->nbytes;
- memcpy(sha_ctx->tmp_tbuf, sha_ctx->trailing_buf,
- sha_ctx->trailing_buf_len);
- k_src = &sha_ctx->trailing_buf[0];
+ staging = (uint8_t *) ALIGN(((unsigned int)rctx->staging_dmabuf),
+ L1_CACHE_BYTES);
+ memcpy(staging, rctx->trailing_buf, rctx->trailing_buf_len);
+ k_src = &rctx->trailing_buf[0];
/* get new trailing buffer */
sha_pad_len = ALIGN(total, sha_block_size) - total;
trailing_buf_len = sha_block_size - sha_pad_len;
@@ -2632,7 +2761,7 @@
nbytes = total - trailing_buf_len;
num_sg = qcrypto_count_sg(req->src, req->nbytes);
- len = sha_ctx->trailing_buf_len;
+ len = rctx->trailing_buf_len;
sg_last = req->src;
while (len < nbytes) {
@@ -2641,56 +2770,41 @@
len += sg_last->length;
sg_last = scatterwalk_sg_next(sg_last);
}
- if (sha_ctx->trailing_buf_len) {
+ if (rctx->trailing_buf_len) {
if (cp->ce_support.aligned_only) {
- sha_ctx->sg = kzalloc(sizeof(struct scatterlist),
- GFP_ATOMIC);
- if (sha_ctx->sg == NULL) {
- pr_err("MemAlloc fail sha_ctx->sg, error %ld\n",
- PTR_ERR(sha_ctx->sg));
- return -ENOMEM;
- }
rctx->data2 = kzalloc((req->nbytes + 64), GFP_ATOMIC);
if (rctx->data2 == NULL) {
pr_err("Mem Alloc fail srctx->data2, err %ld\n",
PTR_ERR(rctx->data2));
- kfree(sha_ctx->sg);
return -ENOMEM;
}
- memcpy(rctx->data2, sha_ctx->tmp_tbuf,
- sha_ctx->trailing_buf_len);
- memcpy((rctx->data2 + sha_ctx->trailing_buf_len),
+ memcpy(rctx->data2, staging,
+ rctx->trailing_buf_len);
+ memcpy((rctx->data2 + rctx->trailing_buf_len),
rctx->data, req->src->length);
kfree(rctx->data);
rctx->data = rctx->data2;
- sg_set_buf(&sha_ctx->sg[0], rctx->data,
- (sha_ctx->trailing_buf_len +
+ sg_set_buf(&rctx->sg[0], rctx->data,
+ (rctx->trailing_buf_len +
req->src->length));
- req->src = sha_ctx->sg;
- sg_mark_end(&sha_ctx->sg[0]);
+ req->src = rctx->sg;
+ sg_mark_end(&rctx->sg[0]);
} else {
sg_mark_end(sg_last);
- sha_ctx->sg = kzalloc(2 * (sizeof(struct scatterlist)),
- GFP_ATOMIC);
- if (sha_ctx->sg == NULL) {
- pr_err("MEMalloc fail sha_ctx->sg, error %ld\n",
- PTR_ERR(sha_ctx->sg));
- return -ENOMEM;
- }
-
- sg_set_buf(&sha_ctx->sg[0], sha_ctx->tmp_tbuf,
- sha_ctx->trailing_buf_len);
- sg_mark_end(&sha_ctx->sg[1]);
- sg_chain(sha_ctx->sg, 2, req->src);
- req->src = sha_ctx->sg;
+ memset(rctx->sg, 0, sizeof(rctx->sg));
+ sg_set_buf(&rctx->sg[0], staging,
+ rctx->trailing_buf_len);
+ sg_mark_end(&rctx->sg[1]);
+ sg_chain(rctx->sg, 2, req->src);
+ req->src = rctx->sg;
}
} else
sg_mark_end(sg_last);
req->nbytes = nbytes;
- sha_ctx->trailing_buf_len = trailing_buf_len;
+ rctx->trailing_buf_len = trailing_buf_len;
- ret = _qcrypto_queue_req(cp, &req->base);
+ ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
return ret;
};
@@ -2698,7 +2812,6 @@
static int _sha1_update(struct ahash_request *req)
{
struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
- struct sha1_state *sha_state_ctx = &rctx->sha1_state_ctx;
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
struct crypto_priv *cp = sha_ctx->cp;
@@ -2706,14 +2819,13 @@
if (_copy_source(req))
return -ENOMEM;
}
- sha_state_ctx->count += req->nbytes;
+ rctx->count += req->nbytes;
return _sha_update(req, SHA1_BLOCK_SIZE);
}
static int _sha256_update(struct ahash_request *req)
{
struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
- struct sha256_state *sha_state_ctx = &rctx->sha256_state_ctx;
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
struct crypto_priv *cp = sha_ctx->cp;
@@ -2722,7 +2834,7 @@
return -ENOMEM;
}
- sha_state_ctx->count += req->nbytes;
+ rctx->count += req->nbytes;
return _sha_update(req, SHA256_BLOCK_SIZE);
}
@@ -2732,26 +2844,29 @@
struct crypto_priv *cp = sha_ctx->cp;
struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
int ret = 0;
+ uint8_t *staging;
if (cp->ce_support.aligned_only) {
if (_copy_source(req))
return -ENOMEM;
}
- sha_ctx->last_blk = 1;
+ rctx->last_blk = 1;
/* save the original req structure fields*/
rctx->src = req->src;
rctx->nbytes = req->nbytes;
- sg_set_buf(&sha_ctx->tmp_sg, sha_ctx->trailing_buf,
- sha_ctx->trailing_buf_len);
- sg_mark_end(&sha_ctx->tmp_sg);
+ staging = (uint8_t *) ALIGN(((unsigned int)rctx->staging_dmabuf),
+ L1_CACHE_BYTES);
+ memcpy(staging, rctx->trailing_buf, rctx->trailing_buf_len);
+ sg_set_buf(&rctx->sg[0], staging, rctx->trailing_buf_len);
+ sg_mark_end(&rctx->sg[0]);
- req->src = &sha_ctx->tmp_sg;
- req->nbytes = sha_ctx->trailing_buf_len;
+ req->src = &rctx->sg[0];
+ req->nbytes = rctx->trailing_buf_len;
- ret = _qcrypto_queue_req(cp, &req->base);
+ ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
return ret;
};
@@ -2781,9 +2896,9 @@
/* save the original req structure fields*/
rctx->src = req->src;
rctx->nbytes = req->nbytes;
- sha_ctx->first_blk = 1;
- sha_ctx->last_blk = 1;
- ret = _qcrypto_queue_req(cp, &req->base);
+ rctx->first_blk = 1;
+ rctx->last_blk = 1;
+ ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
return ret;
}
@@ -2814,32 +2929,49 @@
unsigned int len)
{
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(&tfm->base);
+ uint8_t *in_buf;
int ret = 0;
+ struct scatterlist sg;
+ struct ahash_request *ahash_req;
+ struct completion ahash_req_complete;
- sha_ctx->in_buf = kzalloc(len + 64, GFP_KERNEL);
- if (sha_ctx->in_buf == NULL) {
- pr_err("qcrypto Can't Allocate mem: sha_ctx->in_buf, error %ld\n",
- PTR_ERR(sha_ctx->in_buf));
+ ahash_req = ahash_request_alloc(tfm, GFP_KERNEL);
+ if (ahash_req == NULL)
+ return -ENOMEM;
+ init_completion(&ahash_req_complete);
+ ahash_request_set_callback(ahash_req,
+ CRYPTO_TFM_REQ_MAY_BACKLOG,
+ _crypto_sha_hmac_ahash_req_complete,
+ &ahash_req_complete);
+ crypto_ahash_clear_flags(tfm, ~0);
+
+ in_buf = kzalloc(len + 64, GFP_KERNEL);
+ if (in_buf == NULL) {
+ pr_err("qcrypto Can't Allocate mem: in_buf, error %ld\n",
+ PTR_ERR(in_buf));
+ ahash_request_free(ahash_req);
return -ENOMEM;
}
- memcpy(sha_ctx->in_buf, key, len);
- sg_set_buf(&sha_ctx->tmp_sg, sha_ctx->in_buf, len);
- sg_mark_end(&sha_ctx->tmp_sg);
+ memcpy(in_buf, key, len);
+ sg_set_buf(&sg, in_buf, len);
+ sg_mark_end(&sg);
- ahash_request_set_crypt(sha_ctx->ahash_req, &sha_ctx->tmp_sg,
+ ahash_request_set_crypt(ahash_req, &sg,
&sha_ctx->authkey[0], len);
- ret = _sha_digest(sha_ctx->ahash_req);
+ if (sha_ctx->alg == QCE_HASH_SHA1)
+ ret = _sha1_digest(ahash_req);
+ else
+ ret = _sha256_digest(ahash_req);
if (ret == -EINPROGRESS || ret == -EBUSY) {
ret =
wait_for_completion_interruptible(
- &sha_ctx->ahash_req_complete);
+ &ahash_req_complete);
INIT_COMPLETION(sha_ctx->ahash_req_complete);
}
- sha_ctx->authkey_in_len = len;
- kfree(sha_ctx->in_buf);
- sha_ctx->in_buf = NULL;
+ kfree(in_buf);
+ ahash_request_free(ahash_req);
return ret;
}
@@ -2848,16 +2980,15 @@
unsigned int len)
{
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(&tfm->base);
-
- if (len <= SHA1_BLOCK_SIZE)
+ memset(&sha_ctx->authkey[0], 0, SHA1_BLOCK_SIZE);
+ if (len <= SHA1_BLOCK_SIZE) {
memcpy(&sha_ctx->authkey[0], key, len);
- else {
- _sha_init(sha_ctx);
+ sha_ctx->authkey_in_len = len;
+ } else {
sha_ctx->alg = QCE_HASH_SHA1;
- memcpy(&sha_ctx->digest[0], &_std_init_vector_sha1_uint8[0],
- SHA1_DIGEST_SIZE);
sha_ctx->diglen = SHA1_DIGEST_SIZE;
_sha_hmac_setkey(tfm, key, len);
+ sha_ctx->authkey_in_len = SHA1_BLOCK_SIZE;
}
return 0;
}
@@ -2867,15 +2998,15 @@
{
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(&tfm->base);
- if (len <= SHA256_BLOCK_SIZE)
+ memset(&sha_ctx->authkey[0], 0, SHA256_BLOCK_SIZE);
+ if (len <= SHA256_BLOCK_SIZE) {
memcpy(&sha_ctx->authkey[0], key, len);
- else {
- _sha_init(sha_ctx);
+ sha_ctx->authkey_in_len = len;
+ } else {
sha_ctx->alg = QCE_HASH_SHA256;
- memcpy(&sha_ctx->digest[0], &_std_init_vector_sha256_uint8[0],
- SHA256_DIGEST_SIZE);
sha_ctx->diglen = SHA256_DIGEST_SIZE;
_sha_hmac_setkey(tfm, key, len);
+ sha_ctx->authkey_in_len = SHA256_BLOCK_SIZE;
}
return 0;
@@ -2885,11 +3016,12 @@
uint32_t sha_block_size)
{
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
+ struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
int i;
for (i = 0; i < sha_block_size; i++)
- sha_ctx->trailing_buf[i] = sha_ctx->authkey[i] ^ 0x36;
- sha_ctx->trailing_buf_len = sha_block_size;
+ rctx->trailing_buf[i] = sha_ctx->authkey[i] ^ 0x36;
+ rctx->trailing_buf_len = sha_block_size;
return 0;
}
@@ -2900,16 +3032,16 @@
struct crypto_priv *cp = sha_ctx->cp;
struct crypto_stat *pstat;
int ret = 0;
+ struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
pstat = &_qcrypto_stat;
pstat->sha1_hmac_digest++;
- _sha_init(sha_ctx);
- memset(&sha_ctx->trailing_buf[0], 0x00, SHA1_BLOCK_SIZE);
- memcpy(&sha_ctx->digest[0], &_std_init_vector_sha1_uint8[0],
+ _sha_init(req);
+ memset(&rctx->trailing_buf[0], 0x00, SHA1_BLOCK_SIZE);
+ memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
SHA1_DIGEST_SIZE);
sha_ctx->diglen = SHA1_DIGEST_SIZE;
- _update_sha1_ctx(req);
if (cp->ce_support.sha_hmac)
sha_ctx->alg = QCE_HASH_SHA1_HMAC;
@@ -2927,16 +3059,17 @@
struct crypto_priv *cp = sha_ctx->cp;
struct crypto_stat *pstat;
int ret = 0;
+ struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
pstat = &_qcrypto_stat;
pstat->sha256_hmac_digest++;
- _sha_init(sha_ctx);
- memset(&sha_ctx->trailing_buf[0], 0x00, SHA256_BLOCK_SIZE);
- memcpy(&sha_ctx->digest[0], &_std_init_vector_sha256_uint8[0],
+ _sha_init(req);
+
+ memset(&rctx->trailing_buf[0], 0x00, SHA256_BLOCK_SIZE);
+ memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
SHA256_DIGEST_SIZE);
sha_ctx->diglen = SHA256_DIGEST_SIZE;
- _update_sha256_ctx(req);
if (cp->ce_support.sha_hmac)
sha_ctx->alg = QCE_HASH_SHA256_HMAC;
@@ -2965,36 +3098,39 @@
struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
struct crypto_priv *cp = sha_ctx->cp;
int i;
+ uint8_t *staging;
+ uint8_t *p;
+ staging = (uint8_t *) ALIGN(((unsigned int)rctx->staging_dmabuf),
+ L1_CACHE_BYTES);
+ p = staging;
for (i = 0; i < sha_block_size; i++)
- sha_ctx->tmp_tbuf[i] = sha_ctx->authkey[i] ^ 0x5c;
+ *p++ = sha_ctx->authkey[i] ^ 0x5c;
+ memcpy(p, &rctx->digest[0], sha_digest_size);
+ sg_set_buf(&rctx->sg[0], staging, sha_block_size +
+ sha_digest_size);
+ sg_mark_end(&rctx->sg[0]);
/* save the original req structure fields*/
rctx->src = req->src;
rctx->nbytes = req->nbytes;
- memcpy(&sha_ctx->tmp_tbuf[sha_block_size], &sha_ctx->digest[0],
- sha_digest_size);
-
- sg_set_buf(&sha_ctx->tmp_sg, sha_ctx->tmp_tbuf, sha_block_size +
- sha_digest_size);
- sg_mark_end(&sha_ctx->tmp_sg);
- req->src = &sha_ctx->tmp_sg;
+ req->src = &rctx->sg[0];
req->nbytes = sha_block_size + sha_digest_size;
- _sha_init(sha_ctx);
+ _sha_init(req);
if (sha_ctx->alg == QCE_HASH_SHA1) {
- memcpy(&sha_ctx->digest[0], &_std_init_vector_sha1_uint8[0],
+ memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
SHA1_DIGEST_SIZE);
sha_ctx->diglen = SHA1_DIGEST_SIZE;
} else {
- memcpy(&sha_ctx->digest[0], &_std_init_vector_sha256_uint8[0],
+ memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
SHA256_DIGEST_SIZE);
sha_ctx->diglen = SHA256_DIGEST_SIZE;
}
- sha_ctx->last_blk = 1;
- return _qcrypto_queue_req(cp, &req->base);
+ rctx->last_blk = 1;
+ return _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
}
static int _sha_hmac_inner_hash(struct ahash_request *req,
@@ -3004,17 +3140,19 @@
struct ahash_request *areq = sha_ctx->ahash_req;
struct crypto_priv *cp = sha_ctx->cp;
int ret = 0;
+ struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
+ uint8_t *staging;
- sha_ctx->last_blk = 1;
+ staging = (uint8_t *) ALIGN(((unsigned int)rctx->staging_dmabuf),
+ L1_CACHE_BYTES);
+ memcpy(staging, rctx->trailing_buf, rctx->trailing_buf_len);
+ sg_set_buf(&rctx->sg[0], staging, rctx->trailing_buf_len);
+ sg_mark_end(&rctx->sg[0]);
- sg_set_buf(&sha_ctx->tmp_sg, sha_ctx->trailing_buf,
- sha_ctx->trailing_buf_len);
- sg_mark_end(&sha_ctx->tmp_sg);
-
- ahash_request_set_crypt(areq, &sha_ctx->tmp_sg, &sha_ctx->digest[0],
- sha_ctx->trailing_buf_len);
- sha_ctx->last_blk = 1;
- ret = _qcrypto_queue_req(cp, &areq->base);
+ ahash_request_set_crypt(areq, &rctx->sg[0], &rctx->digest[0],
+ rctx->trailing_buf_len);
+ rctx->last_blk = 1;
+ ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &areq->base);
if (ret == -EINPROGRESS || ret == -EBUSY) {
ret =
@@ -3067,12 +3205,13 @@
{
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
struct crypto_stat *pstat;
+ struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
pstat = &_qcrypto_stat;
pstat->sha1_hmac_digest++;
- _sha_init(sha_ctx);
- memcpy(&sha_ctx->digest[0], &_std_init_vector_sha1_uint8[0],
+ _sha_init(req);
+ memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
SHA1_DIGEST_SIZE);
sha_ctx->diglen = SHA1_DIGEST_SIZE;
sha_ctx->alg = QCE_HASH_SHA1_HMAC;
@@ -3084,12 +3223,13 @@
{
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
struct crypto_stat *pstat;
+ struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
pstat = &_qcrypto_stat;
pstat->sha256_hmac_digest++;
- _sha_init(sha_ctx);
- memcpy(&sha_ctx->digest[0], &_std_init_vector_sha256_uint8[0],
+ _sha_init(req);
+ memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
SHA256_DIGEST_SIZE);
sha_ctx->diglen = SHA256_DIGEST_SIZE;
sha_ctx->alg = QCE_HASH_SHA256_HMAC;
@@ -3097,6 +3237,16 @@
return _sha_digest(req);
}
+static int _qcrypto_prefix_alg_cra_name(char cra_name[], unsigned int size)
+{
+ char new_cra_name[CRYPTO_MAX_ALG_NAME] = "qcom-";
+ if (CRYPTO_MAX_ALG_NAME < size + 5)
+ return -EINVAL;
+ strlcat(new_cra_name, cra_name, CRYPTO_MAX_ALG_NAME);
+ strlcpy(cra_name, new_cra_name, CRYPTO_MAX_ALG_NAME);
+ return 0;
+}
+
int qcrypto_cipher_set_flag(struct ablkcipher_request *req, unsigned int flags)
{
struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
@@ -3252,8 +3402,8 @@
.init = _sha1_hmac_init,
.update = _sha1_hmac_update,
.final = _sha1_hmac_final,
- .export = _sha1_export,
- .import = _sha1_import,
+ .export = _sha1_hmac_export,
+ .import = _sha1_hmac_import,
.digest = _sha1_hmac_digest,
.setkey = _sha1_hmac_setkey,
.halg = {
@@ -3280,8 +3430,8 @@
.init = _sha256_hmac_init,
.update = _sha256_hmac_update,
.final = _sha256_hmac_final,
- .export = _sha256_export,
- .import = _sha256_import,
+ .export = _sha256_hmac_export,
+ .import = _sha256_hmac_import,
.digest = _sha256_hmac_digest,
.setkey = _sha256_hmac_setkey,
.halg = {
@@ -3627,38 +3777,59 @@
{
int rc = 0;
void *handle;
- struct crypto_priv *cp;
+ struct crypto_priv *cp = &qcrypto_dev;
int i;
struct msm_ce_hw_support *platform_support;
+ struct crypto_engine *pengine;
+ unsigned long flags;
- cp = kzalloc(sizeof(*cp), GFP_KERNEL);
- if (!cp) {
+ pengine = kzalloc(sizeof(*pengine), GFP_KERNEL);
+ if (!pengine) {
pr_err("qcrypto Memory allocation of q_alg FAIL, error %ld\n",
- PTR_ERR(cp));
+ PTR_ERR(pengine));
return -ENOMEM;
}
/* open qce */
handle = qce_open(pdev, &rc);
if (handle == NULL) {
- kfree(cp);
+ kfree(pengine);
platform_set_drvdata(pdev, NULL);
return rc;
}
- INIT_LIST_HEAD(&cp->alg_list);
- platform_set_drvdata(pdev, cp);
- spin_lock_init(&cp->lock);
- tasklet_init(&cp->done_tasklet, req_done, (unsigned long)cp);
- crypto_init_queue(&cp->queue, 50);
- cp->qce = handle;
- cp->pdev = pdev;
- qce_hw_support(cp->qce, &cp->ce_support);
+ platform_set_drvdata(pdev, pengine);
+ pengine->qce = handle;
+ pengine->pcp = cp;
+ pengine->pdev = pdev;
+ pengine->req = NULL;
+
+ pengine->high_bw_req_count = 0;
+ pengine->high_bw_req = false;
+ init_timer(&(pengine->bw_scale_down_timer));
+ INIT_WORK(&pengine->low_bw_req_ws, qcrypto_low_bw_req_work);
+ pengine->bw_scale_down_timer.function =
+ qcrypto_bw_scale_down_timer_callback;
+
+ device_init_wakeup(&pengine->pdev->dev, true);
+
+ tasklet_init(&pengine->done_tasklet, req_done, (unsigned long)pengine);
+ crypto_init_queue(&pengine->req_queue, 50);
+
+ mutex_lock(&cp->engine_lock);
+ cp->total_units++;
+ pengine->unit = cp->total_units;
+
+ spin_lock_irqsave(&cp->lock, flags);
+ list_add_tail(&pengine->elist, &cp->engine_list);
+ cp->next_engine = pengine;
+ spin_unlock_irqrestore(&cp->lock, flags);
+
+ qce_hw_support(pengine->qce, &cp->ce_support);
if (cp->ce_support.bam) {
cp->platform_support.ce_shared = cp->ce_support.is_shared;
cp->platform_support.shared_ce_resource = 0;
cp->platform_support.hw_key_support = cp->ce_support.hw_key;
- cp->platform_support.bus_scale_table = NULL;
cp->platform_support.sha_hmac = 1;
cp->platform_support.bus_scale_table =
@@ -3678,26 +3849,25 @@
platform_support->bus_scale_table;
cp->platform_support.sha_hmac = platform_support->sha_hmac;
}
- cp->high_bw_req_count = 0;
- cp->ce_lock_count = 0;
-
-
- if (cp->platform_support.ce_shared)
- INIT_WORK(&cp->unlock_ce_ws, qcrypto_unlock_ce);
-
+ pengine->bus_scale_handle = 0;
if (cp->platform_support.bus_scale_table != NULL) {
- cp->bus_scale_handle =
+ pengine->bus_scale_handle =
msm_bus_scale_register_client(
(struct msm_bus_scale_pdata *)
cp->platform_support.bus_scale_table);
- if (!cp->bus_scale_handle) {
- printk(KERN_ERR "%s not able to get bus scale\n",
+ if (!pengine->bus_scale_handle) {
+ pr_err("%s not able to get bus scale\n",
__func__);
rc = -ENOMEM;
goto err;
}
}
+ if (cp->total_units != 1) {
+ mutex_unlock(&cp->engine_lock);
+ return 0;
+ }
+
/* register crypto cipher algorithms the device supports */
for (i = 0; i < ARRAY_SIZE(_qcrypto_ablk_cipher_algos); i++) {
struct qcrypto_alg *q_alg;
@@ -3708,6 +3878,17 @@
rc = PTR_ERR(q_alg);
goto err;
}
+ if (cp->ce_support.use_sw_aes_cbc_ecb_ctr_algo) {
+ rc = _qcrypto_prefix_alg_cra_name(
+ q_alg->cipher_alg.cra_name,
+ strlen(q_alg->cipher_alg.cra_name));
+ if (rc) {
+ dev_err(&pdev->dev,
+ "The algorithm name %s is too long.\n",
+ q_alg->cipher_alg.cra_name);
+ goto err;
+ }
+ }
rc = crypto_register_alg(&q_alg->cipher_alg);
if (rc) {
dev_err(&pdev->dev, "%s alg registration failed\n",
@@ -3730,6 +3911,17 @@
rc = PTR_ERR(q_alg);
goto err;
}
+ if (cp->ce_support.use_sw_aes_xts_algo) {
+ rc = _qcrypto_prefix_alg_cra_name(
+ q_alg->cipher_alg.cra_name,
+ strlen(q_alg->cipher_alg.cra_name));
+ if (rc) {
+ dev_err(&pdev->dev,
+ "The algorithm name %s is too long.\n",
+ q_alg->cipher_alg.cra_name);
+ goto err;
+ }
+ }
rc = crypto_register_alg(&q_alg->cipher_alg);
if (rc) {
dev_err(&pdev->dev, "%s alg registration failed\n",
@@ -3755,7 +3947,17 @@
rc = PTR_ERR(q_alg);
goto err;
}
-
+ if (cp->ce_support.use_sw_ahash_algo) {
+ rc = _qcrypto_prefix_alg_cra_name(
+ q_alg->sha_alg.halg.base.cra_name,
+ strlen(q_alg->sha_alg.halg.base.cra_name));
+ if (rc) {
+ dev_err(&pdev->dev,
+ "The algorithm name %s is too long.\n",
+ q_alg->sha_alg.halg.base.cra_name);
+ goto err;
+ }
+ }
rc = crypto_register_ahash(&q_alg->sha_alg);
if (rc) {
dev_err(&pdev->dev, "%s alg registration failed\n",
@@ -3781,7 +3983,17 @@
rc = PTR_ERR(q_alg);
goto err;
}
-
+ if (cp->ce_support.use_sw_aead_algo) {
+ rc = _qcrypto_prefix_alg_cra_name(
+ q_alg->cipher_alg.cra_name,
+ strlen(q_alg->cipher_alg.cra_name));
+ if (rc) {
+ dev_err(&pdev->dev,
+ "The algorithm name %s is too long.\n",
+ q_alg->cipher_alg.cra_name);
+ goto err;
+ }
+ }
rc = crypto_register_alg(&q_alg->cipher_alg);
if (rc) {
dev_err(&pdev->dev,
@@ -3808,7 +4020,18 @@
rc = PTR_ERR(q_alg);
goto err;
}
-
+ if (cp->ce_support.use_sw_hmac_algo) {
+ rc = _qcrypto_prefix_alg_cra_name(
+ q_alg->sha_alg.halg.base.cra_name,
+ strlen(
+ q_alg->sha_alg.halg.base.cra_name));
+ if (rc) {
+ dev_err(&pdev->dev,
+ "The algorithm name %s is too long.\n",
+ q_alg->sha_alg.halg.base.cra_name);
+ goto err;
+ }
+ }
rc = crypto_register_ahash(&q_alg->sha_alg);
if (rc) {
dev_err(&pdev->dev,
@@ -3834,6 +4057,17 @@
rc = PTR_ERR(q_alg);
goto err;
}
+ if (cp->ce_support.use_sw_aes_ccm_algo) {
+ rc = _qcrypto_prefix_alg_cra_name(
+ q_alg->cipher_alg.cra_name,
+ strlen(q_alg->cipher_alg.cra_name));
+ if (rc) {
+ dev_err(&pdev->dev,
+ "The algorithm name %s is too long.\n",
+ q_alg->cipher_alg.cra_name);
+ goto err;
+ }
+ }
rc = crypto_register_alg(&q_alg->cipher_alg);
if (rc) {
dev_err(&pdev->dev, "%s alg registration failed\n",
@@ -3846,9 +4080,14 @@
}
}
+ mutex_unlock(&cp->engine_lock);
return 0;
err:
- _qcrypto_remove(pdev);
+ _qcrypto_remove_engine(pengine);
+ mutex_unlock(&cp->engine_lock);
+ if (pengine->qce)
+ qce_close(pengine->qce);
+ kfree(pengine);
return rc;
};
@@ -3895,10 +4134,19 @@
static ssize_t _debug_stats_write(struct file *file, const char __user *buf,
size_t count, loff_t *ppos)
{
+ unsigned long flags;
+ struct crypto_priv *cp = &qcrypto_dev;
+ struct crypto_engine *pe;
memset((char *)&_qcrypto_stat, 0, sizeof(struct crypto_stat));
+ spin_lock_irqsave(&cp->lock, flags);
+ list_for_each_entry(pe, &cp->engine_list, elist) {
+ pe->total_req = 0;
+ pe->err_req = 0;
+ }
+ spin_unlock_irqrestore(&cp->lock, flags);
return count;
-};
+}
static const struct file_operations _debug_stats_ops = {
.open = _debug_stats_open,
@@ -3938,11 +4186,20 @@
static int __init _qcrypto_init(void)
{
int rc;
+ struct crypto_priv *pcp = &qcrypto_dev;
rc = _qcrypto_debug_init();
if (rc)
return rc;
-
+ INIT_LIST_HEAD(&pcp->alg_list);
+ INIT_LIST_HEAD(&pcp->engine_list);
+ INIT_WORK(&pcp->unlock_ce_ws, qcrypto_unlock_ce);
+ spin_lock_init(&pcp->lock);
+ mutex_init(&pcp->engine_lock);
+ pcp->total_units = 0;
+ pcp->ce_lock_count = 0;
+ pcp->platform_support.bus_scale_table = NULL;
+ pcp->next_engine = NULL;
return platform_driver_register(&_qualcomm_crypto);
}
diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
index 17bbe19..ca7953d 100644
--- a/drivers/devfreq/Kconfig
+++ b/drivers/devfreq/Kconfig
@@ -71,6 +71,25 @@
Sets the frequency using a "on-demand" algorithm.
This governor is unlikely to be useful for other devices.
+config DEVFREQ_GOV_MSM_CPUFREQ
+ bool "MSM CPUfreq"
+ depends on CPU_FREQ_MSM
+ help
+ MSM CPUfreq based governor for CPU bandwidth voting. Sets the CPU
+ to DDR BW vote based on the current CPU frequency. This governor
+ is unlikely to be useful for non-MSM devices.
+
+config DEVFREQ_GOV_MSM_CPUBW_HWMON
+ tristate "HW monitor based governor for CPUBW"
+ depends on ARCH_MSM_KRAIT
+ help
+ HW monitor based governor for CPU to DDR bandwidth voting. This
+ goveror currently supports only Krait L2 PM counters. Sets the CPU
+ BW vote by using L2 PM counters to monitor the Krait's use of DDR.
+ Since this governor uses some of the PM counters it can conflict
+ with existing profiling tools. This governor is unlikely to be
+ useful for other devices.
+
comment "DEVFREQ Drivers"
config ARM_EXYNOS4_BUS_DEVFREQ
diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile
index 29b48ff..e06ed9f 100644
--- a/drivers/devfreq/Makefile
+++ b/drivers/devfreq/Makefile
@@ -4,6 +4,8 @@
obj-$(CONFIG_DEVFREQ_GOV_POWERSAVE) += governor_powersave.o
obj-$(CONFIG_DEVFREQ_GOV_USERSPACE) += governor_userspace.o
obj-$(CONFIG_DEVFREQ_GOV_MSM_ADRENO_TZ) += governor_msm_adreno_tz.o
+obj-$(CONFIG_DEVFREQ_GOV_MSM_CPUFREQ) += governor_msm_cpufreq.o
+obj-$(CONFIG_DEVFREQ_GOV_MSM_CPUBW_HWMON) += governor_cpubw_hwmon.o
# DEVFREQ Drivers
obj-$(CONFIG_ARM_EXYNOS4_BUS_DEVFREQ) += exynos4_bus.o
diff --git a/drivers/devfreq/governor_cpubw_hwmon.c b/drivers/devfreq/governor_cpubw_hwmon.c
new file mode 100644
index 0000000..e7d373b
--- /dev/null
+++ b/drivers/devfreq/governor_cpubw_hwmon.c
@@ -0,0 +1,470 @@
+/*
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#define pr_fmt(fmt) "cpubw-hwmon: " fmt
+
+#include <linux/kernel.h>
+#include <asm/sizes.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/ktime.h>
+#include <linux/time.h>
+#include <linux/err.h>
+#include <linux/errno.h>
+#include <linux/mutex.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
+#include <linux/devfreq.h>
+#include "governor.h"
+
+#include <mach/msm-krait-l2-accessors.h>
+
+#define L2PMRESR2 0x412
+#define L2PMCR 0x400
+#define L2PMCNTENCLR 0x402
+#define L2PMCNTENSET 0x403
+#define L2PMINTENCLR 0x404
+#define L2PMINTENSET 0x405
+#define L2PMOVSR 0x406
+#define L2PMOVSSET 0x407
+#define L2PMnEVCNTCR(n) (0x420 + n * 0x10)
+#define L2PMnEVCNTR(n) (0x421 + n * 0x10)
+#define L2PMnEVCNTSR(n) (0x422 + n * 0x10)
+#define L2PMnEVFILTER(n) (0x423 + n * 0x10)
+#define L2PMnEVTYPER(n) (0x424 + n * 0x10)
+
+#define show_attr(name) \
+static ssize_t show_##name(struct device *dev, \
+ struct device_attribute *attr, char *buf) \
+{ \
+ return sprintf(buf, "%u\n", name); \
+}
+
+#define store_attr(name, _min, _max) \
+static ssize_t store_##name(struct device *dev, \
+ struct device_attribute *attr, const char *buf, \
+ size_t count) \
+{ \
+ int ret; \
+ unsigned int val; \
+ ret = sscanf(buf, "%u", &val); \
+ if (ret != 1) \
+ return -EINVAL; \
+ val = max(val, _min); \
+ val = min(val, _max); \
+ name = val; \
+ return count; \
+}
+
+#define gov_attr(__attr, min, max) \
+show_attr(__attr) \
+store_attr(__attr, min, max) \
+static DEVICE_ATTR(__attr, 0644, show_##__attr, store_##__attr)
+
+
+static int l2pm_irq;
+static unsigned int bytes_per_beat;
+static unsigned int tolerance_percent = 10;
+static unsigned int guard_band_mbps = 100;
+static unsigned int decay_rate = 90;
+static unsigned int io_percent = 16;
+static unsigned int bw_step = 190;
+
+#define MIN_MS 10U
+#define MAX_MS 500U
+static unsigned int sample_ms = 50;
+static u32 prev_r_start_val;
+static u32 prev_w_start_val;
+static unsigned long prev_ab;
+static ktime_t prev_ts;
+
+#define RD_MON 0
+#define WR_MON 1
+static void mon_init(void)
+{
+ /* Set up counters 0/1 to count write/read beats */
+ set_l2_indirect_reg(L2PMRESR2, 0x8B0B0000);
+ set_l2_indirect_reg(L2PMnEVCNTCR(RD_MON), 0x0);
+ set_l2_indirect_reg(L2PMnEVCNTCR(WR_MON), 0x0);
+ set_l2_indirect_reg(L2PMnEVCNTR(RD_MON), 0xFFFFFFFF);
+ set_l2_indirect_reg(L2PMnEVCNTR(WR_MON), 0xFFFFFFFF);
+ set_l2_indirect_reg(L2PMnEVFILTER(RD_MON), 0xF003F);
+ set_l2_indirect_reg(L2PMnEVFILTER(WR_MON), 0xF003F);
+ set_l2_indirect_reg(L2PMnEVTYPER(RD_MON), 0xA);
+ set_l2_indirect_reg(L2PMnEVTYPER(WR_MON), 0xB);
+}
+
+static void global_mon_enable(bool en)
+{
+ u32 regval;
+
+ /* Global counter enable */
+ regval = get_l2_indirect_reg(L2PMCR);
+ if (en)
+ regval |= BIT(0);
+ else
+ regval &= ~BIT(0);
+ set_l2_indirect_reg(L2PMCR, regval);
+}
+
+static void mon_enable(int n)
+{
+ /* Clear previous overflow state for event counter n */
+ set_l2_indirect_reg(L2PMOVSR, BIT(n));
+
+ /* Enable event counter n */
+ set_l2_indirect_reg(L2PMCNTENSET, BIT(n));
+}
+
+static void mon_disable(int n)
+{
+ /* Disable event counter n */
+ set_l2_indirect_reg(L2PMCNTENCLR, BIT(n));
+}
+
+static void mon_irq_enable(int n, bool en)
+{
+ if (en)
+ set_l2_indirect_reg(L2PMINTENSET, BIT(n));
+ else
+ set_l2_indirect_reg(L2PMINTENCLR, BIT(n));
+}
+
+/* Returns start counter value to be used with mon_get_mbps() */
+static u32 mon_set_limit_mbyte(int n, unsigned int mbytes)
+{
+ u32 regval, beats;
+
+ beats = mult_frac(mbytes, SZ_1M, bytes_per_beat);
+ regval = 0xFFFFFFFF - beats;
+ set_l2_indirect_reg(L2PMnEVCNTR(n), regval);
+ pr_debug("EV%d MB: %d, start val: %x\n", n, mbytes, regval);
+
+ return regval;
+}
+
+long mon_get_count(int n, u32 start_val)
+{
+ u32 overflow, count;
+
+ count = get_l2_indirect_reg(L2PMnEVCNTR(n));
+ overflow = get_l2_indirect_reg(L2PMOVSR);
+
+ pr_debug("EV%d ov: %x, cnt: %x\n", n, overflow, count);
+
+ if (overflow & BIT(n))
+ return 0xFFFFFFFF - start_val + count;
+ else
+ return count - start_val;
+}
+
+/* Returns MBps of read/writes for the sampling window. */
+unsigned int beats_to_mbps(long long beats, unsigned int us)
+{
+ beats *= USEC_PER_SEC;
+ beats *= bytes_per_beat;
+ do_div(beats, us);
+ beats = DIV_ROUND_UP_ULL(beats, SZ_1M);
+
+ return beats;
+}
+
+static int to_limit(int mbps)
+{
+ mbps *= (100 + tolerance_percent) * sample_ms;
+ mbps /= 100;
+ mbps = DIV_ROUND_UP(mbps, MSEC_PER_SEC);
+ return mbps;
+}
+
+unsigned long measure_bw_and_set_irq(void)
+{
+ long r_mbps, w_mbps, mbps;
+ ktime_t ts;
+ unsigned int us;
+
+ /*
+ * Since we are stopping the counters, we don't want this short work
+ * to be interrupted by other tasks and cause the measurements to be
+ * wrong. Not blocking interrupts to avoid affecting interrupt
+ * latency and since they should be short anyway because they run in
+ * atomic context.
+ */
+ preempt_disable();
+
+ ts = ktime_get();
+ us = ktime_to_us(ktime_sub(ts, prev_ts));
+ if (!us)
+ us = 1;
+
+ mon_disable(RD_MON);
+ mon_disable(WR_MON);
+
+ r_mbps = mon_get_count(RD_MON, prev_r_start_val);
+ r_mbps = beats_to_mbps(r_mbps, us);
+ w_mbps = mon_get_count(WR_MON, prev_w_start_val);
+ w_mbps = beats_to_mbps(w_mbps, us);
+
+ prev_r_start_val = mon_set_limit_mbyte(RD_MON, to_limit(r_mbps));
+ prev_w_start_val = mon_set_limit_mbyte(WR_MON, to_limit(w_mbps));
+ prev_ts = ts;
+
+ mon_enable(RD_MON);
+ mon_enable(WR_MON);
+
+ preempt_enable();
+
+ mbps = r_mbps + w_mbps;
+ pr_debug("R/W/BW/us = %ld/%ld/%ld/%d\n", r_mbps, w_mbps, mbps, us);
+
+ return mbps;
+}
+
+static void compute_bw(int mbps, unsigned long *freq, unsigned long *ab)
+{
+ int new_bw;
+
+ mbps += guard_band_mbps;
+
+ if (mbps > prev_ab) {
+ new_bw = mbps;
+ } else {
+ new_bw = mbps * decay_rate + prev_ab * (100 - decay_rate);
+ new_bw /= 100;
+ }
+
+ *ab = roundup(mbps, bw_step);
+ *freq = (mbps * 100) / io_percent;
+}
+
+#define TOO_SOON_US (1 * USEC_PER_MSEC)
+static irqreturn_t mon_intr_handler(int irq, void *dev)
+{
+ struct devfreq *df = dev;
+ ktime_t ts;
+ unsigned int us;
+ u32 regval;
+ int ret;
+
+ regval = get_l2_indirect_reg(L2PMOVSR);
+ pr_debug("Got interrupt: %x\n", regval);
+
+ devfreq_monitor_stop(df);
+
+ /*
+ * Don't recalc bandwidth if the interrupt comes right after a
+ * previous bandwidth calculation. This is done for two reasons:
+ *
+ * 1. Sampling the BW during a very short duration can result in a
+ * very inaccurate measurement due to very short bursts.
+ * 2. This can only happen if the limit was hit very close to the end
+ * of the previous sample period. Which means the current BW
+ * estimate is not very off and doesn't need to be readjusted.
+ */
+ ts = ktime_get();
+ us = ktime_to_us(ktime_sub(ts, prev_ts));
+ if (us > TOO_SOON_US) {
+ mutex_lock(&df->lock);
+ ret = update_devfreq(df);
+ if (ret)
+ pr_err("Unable to update freq on IRQ!\n");
+ mutex_unlock(&df->lock);
+ }
+
+ devfreq_monitor_start(df);
+
+ return IRQ_HANDLED;
+}
+
+static int start_monitoring(struct devfreq *df)
+{
+ int ret, mbyte;
+
+ ret = request_threaded_irq(l2pm_irq, NULL, mon_intr_handler,
+ IRQF_ONESHOT | IRQF_SHARED,
+ "cpubw_hwmon", df);
+ if (ret) {
+ pr_err("Unable to register interrupt handler\n");
+ return ret;
+ }
+
+ mon_init();
+ mon_disable(RD_MON);
+ mon_disable(WR_MON);
+
+ mbyte = (df->previous_freq * io_percent) / (2 * 100);
+ prev_r_start_val = mon_set_limit_mbyte(RD_MON, mbyte);
+ prev_w_start_val = mon_set_limit_mbyte(WR_MON, mbyte);
+ prev_ts = ktime_get();
+ prev_ab = 0;
+
+ mon_irq_enable(RD_MON, true);
+ mon_irq_enable(WR_MON, true);
+ mon_enable(RD_MON);
+ mon_enable(WR_MON);
+ global_mon_enable(true);
+
+ return 0;
+}
+
+static void stop_monitoring(struct devfreq *df)
+{
+ global_mon_enable(false);
+ mon_disable(RD_MON);
+ mon_disable(WR_MON);
+ mon_irq_enable(RD_MON, false);
+ mon_irq_enable(WR_MON, false);
+
+ disable_irq(l2pm_irq);
+ free_irq(l2pm_irq, df);
+}
+
+static int devfreq_cpubw_hwmon_get_freq(struct devfreq *df,
+ unsigned long *freq,
+ u32 *flag)
+{
+ unsigned long mbps;
+
+ mbps = measure_bw_and_set_irq();
+ compute_bw(mbps, freq, df->data);
+ prev_ab = *(unsigned long *) df->data;
+
+ return 0;
+}
+
+gov_attr(tolerance_percent, 0U, 30U);
+gov_attr(guard_band_mbps, 0U, 2000U);
+gov_attr(decay_rate, 0U, 100U);
+gov_attr(io_percent, 1U, 100U);
+gov_attr(bw_step, 50U, 1000U);
+
+static struct attribute *dev_attr[] = {
+ &dev_attr_tolerance_percent.attr,
+ &dev_attr_guard_band_mbps.attr,
+ &dev_attr_decay_rate.attr,
+ &dev_attr_io_percent.attr,
+ &dev_attr_bw_step.attr,
+ NULL,
+};
+
+static struct attribute_group dev_attr_group = {
+ .name = "cpubw_hwmon",
+ .attrs = dev_attr,
+};
+
+static int devfreq_cpubw_hwmon_ev_handler(struct devfreq *df,
+ unsigned int event, void *data)
+{
+ int ret;
+
+ switch (event) {
+ case DEVFREQ_GOV_START:
+ ret = start_monitoring(df);
+ if (ret)
+ return ret;
+ ret = sysfs_create_group(&df->dev.kobj, &dev_attr_group);
+ if (ret)
+ return ret;
+
+ sample_ms = df->profile->polling_ms;
+ sample_ms = max(MIN_MS, sample_ms);
+ sample_ms = min(MAX_MS, sample_ms);
+ df->profile->polling_ms = sample_ms;
+ devfreq_monitor_start(df);
+
+ pr_debug("Enabled CPU BW HW monitor governor\n");
+ break;
+
+ case DEVFREQ_GOV_STOP:
+ sysfs_remove_group(&df->dev.kobj, &dev_attr_group);
+ devfreq_monitor_stop(df);
+ *(unsigned long *)df->data = 0;
+ stop_monitoring(df);
+ pr_debug("Disabled CPU BW HW monitor governor\n");
+ break;
+
+ case DEVFREQ_GOV_INTERVAL:
+ sample_ms = *(unsigned int *)data;
+ sample_ms = max(MIN_MS, sample_ms);
+ sample_ms = min(MAX_MS, sample_ms);
+ devfreq_interval_update(df, &sample_ms);
+ break;
+ }
+
+ return 0;
+}
+
+static struct devfreq_governor devfreq_cpubw_hwmon = {
+ .name = "cpubw_hwmon",
+ .get_target_freq = devfreq_cpubw_hwmon_get_freq,
+ .event_handler = devfreq_cpubw_hwmon_ev_handler,
+};
+
+static int cpubw_hwmon_driver_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ int ret;
+
+ l2pm_irq = platform_get_irq(pdev, 0);
+ if (l2pm_irq < 0) {
+ pr_err("Unable to get IRQ number\n");
+ return l2pm_irq;
+ }
+
+ ret = of_property_read_u32(dev->of_node, "qcom,bytes-per-beat",
+ &bytes_per_beat);
+ if (ret) {
+ pr_err("Unable to read bytes per beat\n");
+ return ret;
+ }
+
+ ret = devfreq_add_governor(&devfreq_cpubw_hwmon);
+ if (ret) {
+ pr_err("devfreq governor registration failed\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static struct of_device_id match_table[] = {
+ { .compatible = "qcom,kraitbw-l2pm" },
+ {}
+};
+
+static struct platform_driver cpubw_hwmon_driver = {
+ .probe = cpubw_hwmon_driver_probe,
+ .driver = {
+ .name = "kraitbw-l2pm",
+ .of_match_table = match_table,
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init cpubw_hwmon_init(void)
+{
+ return platform_driver_register(&cpubw_hwmon_driver);
+}
+module_init(cpubw_hwmon_init);
+
+static void __exit cpubw_hwmon_exit(void)
+{
+ platform_driver_unregister(&cpubw_hwmon_driver);
+}
+module_exit(cpubw_hwmon_exit);
+
+MODULE_DESCRIPTION("HW monitor based CPU DDR bandwidth voting driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/devfreq/governor_msm_cpufreq.c b/drivers/devfreq/governor_msm_cpufreq.c
new file mode 100644
index 0000000..9b13e26
--- /dev/null
+++ b/drivers/devfreq/governor_msm_cpufreq.c
@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/devfreq.h>
+#include <mach/cpufreq.h>
+#include "governor.h"
+
+DEFINE_MUTEX(df_lock);
+static struct devfreq *df;
+
+static int devfreq_msm_cpufreq_get_freq(struct devfreq *df,
+ unsigned long *freq,
+ u32 *flag)
+{
+ *freq = msm_cpufreq_get_bw();
+ return 0;
+}
+
+int devfreq_msm_cpufreq_update_bw(void)
+{
+ int ret = 0;
+
+ mutex_lock(&df_lock);
+ if (df) {
+ mutex_lock(&df->lock);
+ ret = update_devfreq(df);
+ mutex_unlock(&df->lock);
+ }
+ mutex_unlock(&df_lock);
+ return ret;
+}
+
+static int devfreq_msm_cpufreq_ev_handler(struct devfreq *devfreq,
+ unsigned int event, void *data)
+{
+ int ret;
+
+ switch (event) {
+ case DEVFREQ_GOV_START:
+ mutex_lock(&df_lock);
+ df = devfreq;
+ mutex_unlock(&df_lock);
+
+ ret = devfreq_msm_cpufreq_update_bw();
+ if (ret) {
+ pr_err("Unable to update BW! Gov start failed!\n");
+ return ret;
+ }
+
+ devfreq_monitor_stop(df);
+ pr_debug("Enabled MSM CPUfreq governor\n");
+ break;
+
+ case DEVFREQ_GOV_STOP:
+ mutex_lock(&df_lock);
+ df = NULL;
+ mutex_unlock(&df_lock);
+
+ pr_debug("Disabled MSM CPUfreq governor\n");
+ break;
+ }
+
+ return 0;
+}
+
+static struct devfreq_governor devfreq_msm_cpufreq = {
+ .name = "msm_cpufreq",
+ .get_target_freq = devfreq_msm_cpufreq_get_freq,
+ .event_handler = devfreq_msm_cpufreq_ev_handler,
+};
+
+int register_devfreq_msm_cpufreq(void)
+{
+ return devfreq_add_governor(&devfreq_msm_cpufreq);
+}
diff --git a/drivers/devfreq/governor_performance.c b/drivers/devfreq/governor_performance.c
index af2edc2..74ae3bb 100644
--- a/drivers/devfreq/governor_performance.c
+++ b/drivers/devfreq/governor_performance.c
@@ -32,13 +32,26 @@
unsigned int event, void *data)
{
int ret = 0;
+ unsigned long freq;
- if (event == DEVFREQ_GOV_START || event == DEVFREQ_GOV_RESUME) {
- mutex_lock(&devfreq->lock);
+ mutex_lock(&devfreq->lock);
+ freq = devfreq->previous_freq;
+ switch (event) {
+ case DEVFREQ_GOV_START:
+ devfreq->profile->target(devfreq->dev.parent,
+ &freq,
+ DEVFREQ_FLAG_WAKEUP_MAXFREQ);
+ /* fall through */
+ case DEVFREQ_GOV_RESUME:
ret = update_devfreq(devfreq);
- mutex_unlock(&devfreq->lock);
+ break;
+ case DEVFREQ_GOV_SUSPEND:
+ devfreq->profile->target(devfreq->dev.parent,
+ &freq,
+ DEVFREQ_FLAG_WAKEUP_MAXFREQ);
+ break;
}
-
+ mutex_unlock(&devfreq->lock);
return ret;
}
diff --git a/drivers/devfreq/governor_simpleondemand.c b/drivers/devfreq/governor_simpleondemand.c
index bb29360..d37997d 100644
--- a/drivers/devfreq/governor_simpleondemand.c
+++ b/drivers/devfreq/governor_simpleondemand.c
@@ -29,6 +29,7 @@
unsigned int dfso_downdifferential = DFSO_DOWNDIFFERENCTIAL;
struct devfreq_simple_ondemand_data *data = df->data;
unsigned long max = (df->max_freq) ? df->max_freq : UINT_MAX;
+ unsigned long min = (df->min_freq) ? df->min_freq : 0;
if (err)
return err;
@@ -43,18 +44,30 @@
dfso_upthreshold < dfso_downdifferential)
return -EINVAL;
- /* Assume MAX if it is going to be divided by zero */
- if (stat.total_time == 0) {
- *freq = max;
- return 0;
- }
-
/* Prevent overflow */
if (stat.busy_time >= (1 << 24) || stat.total_time >= (1 << 24)) {
stat.busy_time >>= 7;
stat.total_time >>= 7;
}
+ if (data && data->simple_scaling) {
+ if (stat.busy_time * 100 >
+ stat.total_time * dfso_upthreshold)
+ *freq = max;
+ else if (stat.busy_time * 100 <
+ stat.total_time * dfso_downdifferential)
+ *freq = min;
+ else
+ *freq = df->previous_freq;
+ return 0;
+ }
+
+ /* Assume MAX if it is going to be divided by zero */
+ if (stat.total_time == 0) {
+ *freq = max;
+ return 0;
+ }
+
/* Set MAX if it's busy enough */
if (stat.busy_time * 100 >
stat.total_time * dfso_upthreshold) {
diff --git a/drivers/gpio/qpnp-pin.c b/drivers/gpio/qpnp-pin.c
index ed001f0..2753082 100644
--- a/drivers/gpio/qpnp-pin.c
+++ b/drivers/gpio/qpnp-pin.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -627,11 +627,28 @@
{
struct qpnp_pin_chip *q_chip = dev_get_drvdata(gpio_chip->dev);
struct qpnp_pin_spec *q_spec;
+ u32 intspec[3];
q_spec = qpnp_chip_gpio_get_spec(q_chip, offset);
if (!q_spec)
return -EINVAL;
+ /* if we have mapped this pin previously return the virq */
+ if (q_spec->irq)
+ return q_spec->irq;
+
+ /* call into irq_domain to get irq mapping */
+ intspec[0] = q_chip->spmi->sid;
+ intspec[1] = (q_spec->offset >> 8) & 0xFF;
+ intspec[2] = 0;
+ q_spec->irq = irq_create_of_mapping(q_chip->int_ctrl, intspec, 3);
+ if (!q_spec->irq) {
+ dev_err(&q_chip->spmi->dev, "%s: invalid irq for gpio %u\n",
+ __func__, q_spec->pmic_pin);
+ WARN_ON(1);
+ return -EINVAL;
+ }
+
return q_spec->irq;
}
@@ -1144,7 +1161,7 @@
struct spmi_resource *d_node;
int i, rc;
int lowest_gpio = UINT_MAX, highest_gpio = 0;
- u32 intspec[3], gpio;
+ u32 gpio;
char version[Q_REG_SUBTYPE - Q_REG_DIG_MAJOR_REV + 1];
const char *dev_name;
@@ -1279,18 +1296,6 @@
if (rc)
goto err_probe;
- /* call into irq_domain to get irq mapping */
- intspec[0] = q_chip->spmi->sid;
- intspec[1] = (q_spec->offset >> 8) & 0xFF;
- intspec[2] = 0;
- q_spec->irq = irq_create_of_mapping(q_chip->int_ctrl,
- intspec, 3);
- if (!q_spec->irq) {
- dev_err(&spmi->dev, "%s: invalid irq for gpio %u\n",
- __func__, gpio);
- rc = -EINVAL;
- goto err_probe;
- }
/* initialize lookup table params */
qpnp_pmic_pin_set_spec(q_chip, gpio, q_spec);
qpnp_chip_gpio_set_spec(q_chip, i, q_spec);
diff --git a/drivers/gpu/ion/ion_heap.c b/drivers/gpu/ion/ion_heap.c
index 9d33bf4..6261d89 100644
--- a/drivers/gpu/ion/ion_heap.c
+++ b/drivers/gpu/ion/ion_heap.c
@@ -108,8 +108,7 @@
*
* Note that the `pages' array should be composed of all 4K pages.
*/
-int ion_heap_pages_zero(struct page **pages, int num_pages,
- bool should_invalidate)
+int ion_heap_pages_zero(struct page **pages, int num_pages)
{
int i, j, k, npages_to_vmap;
void *ptr = NULL;
@@ -143,19 +142,17 @@
return -ENOMEM;
memset(ptr, 0, npages_to_vmap * PAGE_SIZE);
- if (should_invalidate) {
- /*
- * invalidate the cache to pick up the zeroing
- */
- for (k = 0; k < npages_to_vmap; k++) {
- void *p = kmap_atomic(pages[i + k]);
- phys_addr_t phys = page_to_phys(
- pages[i + k]);
+ /*
+ * invalidate the cache to pick up the zeroing
+ */
+ for (k = 0; k < npages_to_vmap; k++) {
+ void *p = kmap_atomic(pages[i + k]);
+ phys_addr_t phys = page_to_phys(
+ pages[i + k]);
- dmac_inv_range(p, p + PAGE_SIZE);
- outer_inv_range(phys, phys + PAGE_SIZE);
- kunmap_atomic(p);
- }
+ dmac_inv_range(p, p + PAGE_SIZE);
+ outer_inv_range(phys, phys + PAGE_SIZE);
+ kunmap_atomic(p);
}
vunmap(ptr);
}
@@ -196,8 +193,7 @@
pages_mem->free_fn(pages_mem->pages);
}
-int ion_heap_high_order_page_zero(struct page *page,
- int order, bool should_invalidate)
+int ion_heap_high_order_page_zero(struct page *page, int order)
{
int i, ret;
struct pages_mem pages_mem;
@@ -210,8 +206,7 @@
for (i = 0; i < (1 << order); ++i)
pages_mem.pages[i] = page + i;
- ret = ion_heap_pages_zero(pages_mem.pages, npages,
- should_invalidate);
+ ret = ion_heap_pages_zero(pages_mem.pages, npages);
ion_heap_free_pages_mem(&pages_mem);
return ret;
}
@@ -240,49 +235,11 @@
pages_mem.pages[npages++] = page + j;
}
- ret = ion_heap_pages_zero(pages_mem.pages, npages,
- ion_buffer_cached(buffer));
+ ret = ion_heap_pages_zero(pages_mem.pages, npages);
ion_heap_free_pages_mem(&pages_mem);
return ret;
}
-int ion_heap_buffer_zero_old(struct ion_buffer *buffer)
-{
- struct sg_table *table = buffer->sg_table;
- pgprot_t pgprot;
- struct scatterlist *sg;
- struct vm_struct *vm_struct;
- int i, j, ret = 0;
-
- if (buffer->flags & ION_FLAG_CACHED)
- pgprot = PAGE_KERNEL;
- else
- pgprot = pgprot_writecombine(PAGE_KERNEL);
-
- vm_struct = get_vm_area(PAGE_SIZE, VM_ALLOC);
- if (!vm_struct)
- return -ENOMEM;
-
- for_each_sg(table->sgl, sg, table->nents, i) {
- struct page *page = sg_page(sg);
- unsigned long len = sg_dma_len(sg);
-
- for (j = 0; j < len / PAGE_SIZE; j++) {
- struct page *sub_page = page + j;
- struct page **pages = &sub_page;
- ret = map_vm_area(vm_struct, pgprot, &pages);
- if (ret)
- goto end;
- memset(vm_struct->addr, 0, PAGE_SIZE);
- unmap_kernel_range((unsigned long)vm_struct->addr,
- PAGE_SIZE);
- }
- }
-end:
- free_vm_area(vm_struct);
- return ret;
-}
-
void ion_heap_free_page(struct ion_buffer *buffer, struct page *page,
unsigned int order)
{
@@ -333,11 +290,11 @@
if (total_drained >= size)
break;
list_del(&buffer->list);
- ion_buffer_destroy(buffer);
heap->free_list_size -= buffer->size;
if (skip_pools)
buffer->flags |= ION_FLAG_FREED_FROM_SHRINKER;
total_drained += buffer->size;
+ ion_buffer_destroy(buffer);
}
rt_mutex_unlock(&heap->lock);
diff --git a/drivers/gpu/ion/ion_page_pool.c b/drivers/gpu/ion/ion_page_pool.c
index 94f9445..cc2a36d 100644
--- a/drivers/gpu/ion/ion_page_pool.c
+++ b/drivers/gpu/ion/ion_page_pool.c
@@ -40,8 +40,7 @@
return NULL;
if (pool->gfp_mask & __GFP_ZERO)
- if (ion_heap_high_order_page_zero(
- page, pool->order, pool->should_invalidate))
+ if (ion_heap_high_order_page_zero(page, pool->order))
goto error_free_pages;
sg_init_table(&sg, 1);
@@ -175,8 +174,7 @@
return nr_freed;
}
-struct ion_page_pool *ion_page_pool_create(gfp_t gfp_mask, unsigned int order,
- bool should_invalidate)
+struct ion_page_pool *ion_page_pool_create(gfp_t gfp_mask, unsigned int order)
{
struct ion_page_pool *pool = kmalloc(sizeof(struct ion_page_pool),
GFP_KERNEL);
@@ -188,7 +186,6 @@
INIT_LIST_HEAD(&pool->high_items);
pool->gfp_mask = gfp_mask;
pool->order = order;
- pool->should_invalidate = should_invalidate;
mutex_init(&pool->mutex);
plist_node_init(&pool->list, order);
diff --git a/drivers/gpu/ion/ion_priv.h b/drivers/gpu/ion/ion_priv.h
index aa0a9e2..c57efc1 100644
--- a/drivers/gpu/ion/ion_priv.h
+++ b/drivers/gpu/ion/ion_priv.h
@@ -234,11 +234,9 @@
void ion_heap_unmap_kernel(struct ion_heap *, struct ion_buffer *);
int ion_heap_map_user(struct ion_heap *, struct ion_buffer *,
struct vm_area_struct *);
-int ion_heap_pages_zero(struct page **pages, int num_pages,
- bool should_invalidate);
+int ion_heap_pages_zero(struct page **pages, int num_pages);
int ion_heap_buffer_zero(struct ion_buffer *buffer);
-int ion_heap_high_order_page_zero(struct page *page,
- int order, bool should_invalidate);
+int ion_heap_high_order_page_zero(struct page *page, int order);
/**
* ion_heap_init_deferred_free -- initialize deferred free functionality
@@ -357,8 +355,6 @@
* @gfp_mask: gfp_mask to use from alloc
* @order: order of pages in the pool
* @list: plist node for list of pools
- * @should_invalidate: whether or not the cache needs to be invalidated at
- * page allocation time.
*
* Allows you to keep a pool of pre allocated pages to use from your heap.
* Keeping a pool of pages that is ready for dma, ie any cached mapping have
@@ -374,11 +370,9 @@
gfp_t gfp_mask;
unsigned int order;
struct plist_node list;
- bool should_invalidate;
};
-struct ion_page_pool *ion_page_pool_create(gfp_t gfp_mask, unsigned int order,
- bool should_invalidate);
+struct ion_page_pool *ion_page_pool_create(gfp_t gfp_mask, unsigned int order);
void ion_page_pool_destroy(struct ion_page_pool *);
void *ion_page_pool_alloc(struct ion_page_pool *);
void ion_page_pool_free(struct ion_page_pool *, struct page *);
diff --git a/drivers/gpu/ion/ion_system_heap.c b/drivers/gpu/ion/ion_system_heap.c
index 8e885b2..be1a89c 100644
--- a/drivers/gpu/ion/ion_system_heap.c
+++ b/drivers/gpu/ion/ion_system_heap.c
@@ -355,8 +355,7 @@
* nothing. If it succeeds you'll eventually need to use
* ion_system_heap_destroy_pools to destroy the pools.
*/
-static int ion_system_heap_create_pools(struct ion_page_pool **pools,
- bool should_invalidate)
+static int ion_system_heap_create_pools(struct ion_page_pool **pools)
{
int i;
for (i = 0; i < num_orders; i++) {
@@ -365,8 +364,7 @@
if (orders[i] > 4)
gfp_flags = high_order_gfp_flags;
- pool = ion_page_pool_create(gfp_flags, orders[i],
- should_invalidate);
+ pool = ion_page_pool_create(gfp_flags, orders[i]);
if (!pool)
goto err_create_pool;
pools[i] = pool;
@@ -397,10 +395,10 @@
if (!heap->cached_pools)
goto err_alloc_cached_pools;
- if (ion_system_heap_create_pools(heap->uncached_pools, false))
+ if (ion_system_heap_create_pools(heap->uncached_pools))
goto err_create_uncached_pools;
- if (ion_system_heap_create_pools(heap->cached_pools, true))
+ if (ion_system_heap_create_pools(heap->cached_pools))
goto err_create_cached_pools;
heap->heap.shrinker.shrink = ion_system_heap_shrink;
diff --git a/drivers/gpu/msm/adreno_a3xx_snapshot.c b/drivers/gpu/msm/adreno_a3xx_snapshot.c
index 56c4305..9f5765d 100644
--- a/drivers/gpu/msm/adreno_a3xx_snapshot.c
+++ b/drivers/gpu/msm/adreno_a3xx_snapshot.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -492,6 +492,22 @@
/* Reading these will hang the GPU if it isn't already hung */
if (hang) {
+ unsigned int reg;
+
+ /*
+ * Reading the microcode while the CP will is running will
+ * basically basically move the CP instruction pointer to
+ * whatever address we read. Big badaboom ensues. Stop the CP
+ * (if it isn't already stopped) to ensure that we are safe.
+ * We do this here and not earlier to avoid corrupting the RBBM
+ * status and CP registers - by the time we get here we don't
+ * care about the contents of the CP anymore.
+ */
+
+ adreno_readreg(adreno_dev, ADRENO_REG_CP_ME_CNTL, ®);
+ reg |= (1 << 27) | (1 << 28);
+ adreno_writereg(adreno_dev, ADRENO_REG_CP_ME_CNTL, reg);
+
snapshot = kgsl_snapshot_add_section(device,
KGSL_SNAPSHOT_SECTION_DEBUG, snapshot, remain,
a3xx_snapshot_cp_pfp_ram, NULL);
diff --git a/drivers/gpu/msm/adreno_coresight.c b/drivers/gpu/msm/adreno_coresight.c
index 1b827ff..d0ba145 100644
--- a/drivers/gpu/msm/adreno_coresight.c
+++ b/drivers/gpu/msm/adreno_coresight.c
@@ -55,7 +55,12 @@
int adreno_coresight_enable(struct coresight_device *csdev)
{
struct kgsl_device *device = dev_get_drvdata(csdev->dev.parent);
- struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
+ struct adreno_device *adreno_dev;
+
+ if (device == NULL)
+ return -ENODEV;
+
+ adreno_dev = ADRENO_DEVICE(device);
/* Check if coresight compatible device, return error otherwise */
if (adreno_dev->gpudev->coresight_enable)
@@ -80,7 +85,12 @@
void adreno_coresight_disable(struct coresight_device *csdev)
{
struct kgsl_device *device = dev_get_drvdata(csdev->dev.parent);
- struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
+ struct adreno_device *adreno_dev;
+
+ if (device == NULL)
+ return;
+
+ adreno_dev = ADRENO_DEVICE(device);
/* Check if coresight compatible device, bail otherwise */
if (adreno_dev->gpudev->coresight_disable)
@@ -134,6 +144,10 @@
struct kgsl_device *device = dev_get_drvdata(dev->parent);
struct coresight_attr *csight_attr = container_of(attr,
struct coresight_attr, attr);
+
+ if (device == NULL)
+ return -ENODEV;
+
return coresight_read_reg(device, csight_attr->regname, buf);
}
@@ -142,11 +156,16 @@
const char *buf, size_t size)
{
struct kgsl_device *device = dev_get_drvdata(dev->parent);
- struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
+ struct adreno_device *adreno_dev;
struct coresight_attr *csight_attr = container_of(attr,
struct coresight_attr, attr);
unsigned int regval = 0;
+ if (device == NULL)
+ return -ENODEV;
+
+ adreno_dev = ADRENO_DEVICE(device);
+
regval = coresight_convert_reg(buf);
if (adreno_dev->gpudev->coresight_config_debug_reg)
diff --git a/drivers/gpu/msm/adreno_dispatch.c b/drivers/gpu/msm/adreno_dispatch.c
index a39ceef..95e4017 100644
--- a/drivers/gpu/msm/adreno_dispatch.c
+++ b/drivers/gpu/msm/adreno_dispatch.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -397,7 +397,7 @@
*/
if (count)
- wake_up_interruptible_all(&drawctxt->wq);
+ wake_up_all(&drawctxt->wq);
/*
* Return positive if the context submitted commands or if we figured
diff --git a/drivers/gpu/msm/adreno_drawctxt.c b/drivers/gpu/msm/adreno_drawctxt.c
index 6007a3f..d727423 100644
--- a/drivers/gpu/msm/adreno_drawctxt.c
+++ b/drivers/gpu/msm/adreno_drawctxt.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2002,2007-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2002,2007-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -138,7 +138,7 @@
u32 timestamp, u32 type)
{
struct adreno_context *drawctxt = priv;
- wake_up_interruptible_all(&drawctxt->waiting);
+ wake_up_all(&drawctxt->waiting);
}
#define adreno_wait_event_interruptible_timeout(wq, condition, timeout, io) \
@@ -266,7 +266,7 @@
{
struct adreno_context *drawctxt = priv;
- wake_up_interruptible_all(&drawctxt->waiting);
+ wake_up_all(&drawctxt->waiting);
kgsl_context_put(&drawctxt->base);
}
@@ -310,7 +310,7 @@
mutex_unlock(&device->mutex);
if (timeout) {
- ret = (int) wait_event_interruptible_timeout(drawctxt->waiting,
+ ret = (int) wait_event_timeout(drawctxt->waiting,
_check_global_timestamp(device, timestamp),
msecs_to_jiffies(timeout));
@@ -319,7 +319,7 @@
else if (ret > 0)
ret = 0;
} else {
- ret = (int) wait_event_interruptible(drawctxt->waiting,
+ wait_event(drawctxt->waiting,
_check_global_timestamp(device, timestamp));
}
@@ -386,8 +386,8 @@
mutex_unlock(&drawctxt->mutex);
/* Give the bad news to everybody waiting around */
- wake_up_interruptible_all(&drawctxt->waiting);
- wake_up_interruptible_all(&drawctxt->wq);
+ wake_up_all(&drawctxt->waiting);
+ wake_up_all(&drawctxt->wq);
}
/**
@@ -543,6 +543,14 @@
ret = adreno_drawctxt_wait_global(adreno_dev, context,
drawctxt->internal_timestamp, 10 * 1000);
+ /*
+ * If the wait for global fails then nothing after this point is likely
+ * to work very well - BUG_ON() so we can take advantage of the debug
+ * tools to figure out what the h - e - double hockey sticks happened
+ */
+
+ BUG_ON(ret);
+
kgsl_sharedmem_writel(device, &device->memstore,
KGSL_MEMSTORE_OFFSET(context->id, soptimestamp),
drawctxt->timestamp);
@@ -557,8 +565,8 @@
drawctxt->ops->detach(drawctxt);
/* wake threads waiting to submit commands from this context */
- wake_up_interruptible_all(&drawctxt->waiting);
- wake_up_interruptible_all(&drawctxt->wq);
+ wake_up_all(&drawctxt->waiting);
+ wake_up_all(&drawctxt->wq);
return ret;
}
diff --git a/drivers/gpu/msm/adreno_profile.c b/drivers/gpu/msm/adreno_profile.c
index 28fd6d6..079e120 100644
--- a/drivers/gpu/msm/adreno_profile.c
+++ b/drivers/gpu/msm/adreno_profile.c
@@ -1106,7 +1106,7 @@
if (SIZE_SHARED_ENTRY(count) >= shared_buf_available(profile))
goto done;
- if (entry_head + SIZE_SHARED_ENTRY(count) > profile->shared_size) {
+ if (entry_head + SIZE_SHARED_ENTRY(count) >= profile->shared_size) {
/* entry_head would wrap, start entry_head at 0 in buffer */
entry_head = 0;
profile->shared_size = profile->shared_head;
diff --git a/drivers/gpu/msm/adreno_ringbuffer.c b/drivers/gpu/msm/adreno_ringbuffer.c
index 1383a20..b23d3ab 100644
--- a/drivers/gpu/msm/adreno_ringbuffer.c
+++ b/drivers/gpu/msm/adreno_ringbuffer.c
@@ -665,7 +665,8 @@
total_sizedwords += (flags & KGSL_CMD_FLAGS_INTERNAL_ISSUE) ? 2 : 0;
/* Add two dwords for the CP_INTERRUPT */
- total_sizedwords += drawctxt ? 2 : 0;
+ total_sizedwords +=
+ (drawctxt || (flags & KGSL_CMD_FLAGS_INTERNAL_ISSUE)) ? 2 : 0;
if (adreno_is_a3xx(adreno_dev))
total_sizedwords += 7;
diff --git a/drivers/gpu/msm/kgsl.c b/drivers/gpu/msm/kgsl.c
index 9aefda6..edc42f9 100644
--- a/drivers/gpu/msm/kgsl.c
+++ b/drivers/gpu/msm/kgsl.c
@@ -45,6 +45,10 @@
#undef MODULE_PARAM_PREFIX
#define MODULE_PARAM_PREFIX "kgsl."
+#ifndef arch_mmap_check
+#define arch_mmap_check(addr, len, flags) (0)
+#endif
+
static int kgsl_pagetable_count = KGSL_PAGETABLE_COUNT;
static char *ksgl_mmu_type;
module_param_named(ptcount, kgsl_pagetable_count, int, 0);
@@ -1113,7 +1117,7 @@
if (device->open_count == 0) {
/* make sure power is on to stop the device */
kgsl_pwrctrl_enable(device);
- result = device->ftbl->stop(device);
+ device->ftbl->stop(device);
kgsl_pwrctrl_set_state(device, KGSL_STATE_INIT);
atomic_dec(&device->active_cnt);
}
diff --git a/drivers/gpu/msm/kgsl_iommu.c b/drivers/gpu/msm/kgsl_iommu.c
old mode 100644
new mode 100755
index 246295b..8f65705
--- a/drivers/gpu/msm/kgsl_iommu.c
+++ b/drivers/gpu/msm/kgsl_iommu.c
@@ -72,6 +72,11 @@
static struct iommu_access_ops *iommu_access_ops;
+static int kgsl_iommu_default_setstate(struct kgsl_mmu *mmu,
+ uint32_t flags);
+static phys_addr_t
+kgsl_iommu_get_current_ptbase(struct kgsl_mmu *mmu);
+
static void _iommu_lock(struct kgsl_iommu const *iommu)
{
if (iommu_access_ops && iommu_access_ops->iommu_lock_acquire)
@@ -1485,7 +1490,7 @@
/* If chip is not 8960 then we use the 2nd context bank for pagetable
* switching on the 3D side for which a separate table is allocated */
- if (!cpu_is_msm8960() && msm_soc_version_supports_iommu_v0()) {
+ if (msm_soc_version_supports_iommu_v0()) {
mmu->priv_bank_table =
kgsl_mmu_getpagetable(mmu,
KGSL_MMU_PRIV_BANK_TABLE_NAME);
@@ -1739,9 +1744,11 @@
struct kgsl_memdesc *memdesc,
unsigned int *tlb_flags)
{
- int ret;
+ int ret = 0, lock_taken = 0;
unsigned int range = memdesc->size;
struct kgsl_iommu_pt *iommu_pt = pt->priv;
+ struct kgsl_device *device = pt->mmu->device;
+ struct kgsl_iommu *iommu = pt->mmu->priv;
/* All GPU addresses as assigned are page aligned, but some
functions purturb the gpuaddr with an offset, so apply the
@@ -1756,18 +1763,38 @@
range += PAGE_SIZE;
ret = iommu_unmap_range(iommu_pt->domain, gpuaddr, range);
- if (ret)
+ if (ret) {
KGSL_CORE_ERR("iommu_unmap_range(%p, %x, %d) failed "
"with err: %d\n", iommu_pt->domain, gpuaddr,
range, ret);
+ return ret;
+ }
/*
- * Flushing only required if per process pagetables are used. With
- * global case, flushing will happen inside iommu_map function
+ * Check to see if the current thread already holds the device mutex.
+ * If it does not, then take the device mutex which is required for
+ * flushing the tlb
*/
- if (!ret && kgsl_mmu_is_perprocess(pt->mmu))
- *tlb_flags = UINT_MAX;
- return 0;
+ if (!mutex_is_locked(&device->mutex) ||
+ device->mutex.owner != current) {
+ mutex_lock(&device->mutex);
+ lock_taken = 1;
+ }
+
+ /*
+ * Flush the tlb only if the iommu device is attached and the pagetable
+ * hasn't been switched yet
+ */
+ if (kgsl_mmu_is_perprocess(pt->mmu) &&
+ iommu->iommu_units[0].dev[KGSL_IOMMU_CONTEXT_USER].attached &&
+ kgsl_iommu_pt_equal(pt->mmu, pt,
+ kgsl_iommu_get_current_ptbase(pt->mmu)))
+ kgsl_iommu_default_setstate(pt->mmu, KGSL_MMUFLAGS_TLBFLUSH);
+
+ if (lock_taken)
+ mutex_unlock(&device->mutex);
+
+ return ret;
}
static int
diff --git a/drivers/hwmon/qpnp-adc-common.c b/drivers/hwmon/qpnp-adc-common.c
index 6a52aa3..7bc8773 100644
--- a/drivers/hwmon/qpnp-adc-common.c
+++ b/drivers/hwmon/qpnp-adc-common.c
@@ -496,7 +496,8 @@
if (!chan_properties || !chan_properties->offset_gain_numerator ||
!chan_properties->offset_gain_denominator || !adc_properties
- || !adc_chan_result)
+ || !adc_chan_result
+ || !chan_properties->adc_graph[CALIB_ABSOLUTE].dy)
return -EINVAL;
pmic_voltage = (adc_code -
diff --git a/drivers/hwmon/qpnp-adc-current.c b/drivers/hwmon/qpnp-adc-current.c
index 9839595..32c94dc 100644
--- a/drivers/hwmon/qpnp-adc-current.c
+++ b/drivers/hwmon/qpnp-adc-current.c
@@ -1011,6 +1011,11 @@
if (qpnp_iadc_is_valid(iadc) < 0)
return -EPROBE_DEFER;
+ if ((iadc->adc->calib.gain_raw - iadc->adc->calib.offset_raw) == 0) {
+ pr_err("raw offset errors! run iadc calibration again\n");
+ return -EINVAL;
+ }
+
rc = qpnp_check_pmic_temp(iadc);
if (rc) {
pr_err("Error checking pmic therm temp\n");
diff --git a/drivers/hwmon/qpnp-adc-voltage.c b/drivers/hwmon/qpnp-adc-voltage.c
index fb882b3..d462fb3 100644
--- a/drivers/hwmon/qpnp-adc-voltage.c
+++ b/drivers/hwmon/qpnp-adc-voltage.c
@@ -809,7 +809,14 @@
}
pr_debug("absolute reference raw: 625mV:0x%x 1.25V:0x%x\n",
- calib_read_1, calib_read_2);
+ calib_read_2, calib_read_1);
+
+ if (calib_read_1 == calib_read_2) {
+ pr_err("absolute reference raw: 625mV:0x%x 1.25V:0x%x\n",
+ calib_read_2, calib_read_1);
+ rc = -EINVAL;
+ goto calib_fail;
+ }
vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].dy =
(calib_read_1 - calib_read_2);
@@ -889,6 +896,14 @@
pr_debug("ratiometric reference raw: VDD:0x%x GND:0x%x\n",
calib_read_1, calib_read_2);
+
+ if (calib_read_1 == calib_read_2) {
+ pr_err("ratiometric reference raw: VDD:0x%x GND:0x%x\n",
+ calib_read_1, calib_read_2);
+ rc = -EINVAL;
+ goto calib_fail;
+ }
+
vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].dy =
(calib_read_1 - calib_read_2);
vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].dx =
diff --git a/drivers/i2c/busses/i2c-qup.c b/drivers/i2c/busses/i2c-qup.c
index 57aa835..d9a332e 100644
--- a/drivers/i2c/busses/i2c-qup.c
+++ b/drivers/i2c/busses/i2c-qup.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2009-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2009-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -85,10 +85,11 @@
QUP_MX_INPUT_DONE = 1U << 11,
};
-/* I2C mini core related values */
+/* QUP_CONFIG values and flags */
enum {
I2C_MINI_CORE = 2U << 8,
I2C_N_VAL = 0xF,
+ I2C_CORE_CLK_ON_EN = BIT(13),
};
@@ -129,6 +130,12 @@
I2C_CLK_FORCED_LOW_STATE = 5,
};
+enum msm_i2c_state {
+ MSM_I2C_PM_ACTIVE,
+ MSM_I2C_PM_SUSPENDED,
+ MSM_I2C_SYS_SUSPENDING,
+ MSM_I2C_SYS_SUSPENDED,
+};
#define QUP_MAX_CLK_STATE_RETRIES 300
#define DEFAULT_CLK_RATE (19200000)
#define I2C_STATUS_CLK_STATE 13
@@ -184,8 +191,7 @@
int in_blk_sz;
int wr_sz;
struct msm_i2c_platform_data *pdata;
- int suspended;
- int pwr_state;
+ enum msm_i2c_state pwr_state;
struct mutex mlock;
void *complete;
int i2c_gpios[ARRAY_SIZE(i2c_rsrcs)];
@@ -339,22 +345,6 @@
return 0;
}
-/*
- * Before calling qup_config_core_on_en(), please make
- * sure that QuPE core is in RESET state.
- */
-static void
-qup_config_core_on_en(struct qup_i2c_dev *dev)
-{
- uint32_t status;
-
- status = readl_relaxed(dev->base + QUP_CONFIG);
- status |= BIT(13);
- writel_relaxed(status, dev->base + QUP_CONFIG);
- /* making sure that write has really gone through */
- mb();
-}
-
#define MSM_I2C_CLK_PATH_SUSPEND (0)
#define MSM_I2C_CLK_PATH_RESUME (1)
#define MSM_I2C_CLK_PATH_MAX_BW(dev) ((dev->pdata->src_clk_rate * 8) / 1000)
@@ -500,27 +490,97 @@
}
}
-static void
-qup_i2c_pwr_mgmt(struct qup_i2c_dev *dev, unsigned int state)
+static int i2c_qup_gpio_request(struct qup_i2c_dev *dev)
{
- dev->pwr_state = state;
- if (state != 0) {
- i2c_qup_clk_path_postponed_register(dev);
- if (!dev->pdata->active_only)
- i2c_qup_clk_path_vote(dev);
+ int i;
+ int result = 0;
- clk_prepare_enable(dev->clk);
- if (!dev->pdata->keep_ahb_clk_on)
- clk_prepare_enable(dev->pclk);
- } else {
- qup_update_state(dev, QUP_RESET_STATE);
- clk_disable_unprepare(dev->clk);
- qup_config_core_on_en(dev);
- if (!dev->pdata->keep_ahb_clk_on)
- clk_disable_unprepare(dev->pclk);
- if (!dev->pdata->active_only)
- i2c_qup_clk_path_unvote(dev);
+ for (i = 0; i < ARRAY_SIZE(i2c_rsrcs); ++i) {
+ if (dev->i2c_gpios[i] >= 0) {
+ result = gpio_request(dev->i2c_gpios[i], i2c_rsrcs[i]);
+ if (result) {
+ dev_err(dev->dev,
+ "gpio_request for pin %d failed with error %d\n",
+ dev->i2c_gpios[i], result);
+ goto error;
+ }
+ }
}
+ return 0;
+
+error:
+ for (; --i >= 0;) {
+ if (dev->i2c_gpios[i] >= 0)
+ gpio_free(dev->i2c_gpios[i]);
+ }
+ return result;
+}
+
+static void i2c_qup_gpio_free(struct qup_i2c_dev *dev)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(i2c_rsrcs); ++i) {
+ if (dev->i2c_gpios[i] >= 0)
+ gpio_free(dev->i2c_gpios[i]);
+ }
+}
+
+static void i2c_qup_pm_suspend_clk(struct qup_i2c_dev *dev)
+{
+ uint32_t status;
+
+ /* reset core and enable conditional dynamic clock gating */
+ qup_update_state(dev, QUP_RESET_STATE);
+ status = readl_relaxed(dev->base + QUP_CONFIG);
+ status |= I2C_CORE_CLK_ON_EN;
+ writel_relaxed(status, dev->base + QUP_CONFIG);
+ /* ensure that write has really gone through */
+ mb();
+
+ clk_disable_unprepare(dev->clk);
+ if (!dev->pdata->keep_ahb_clk_on)
+ clk_disable_unprepare(dev->pclk);
+}
+
+static void i2c_qup_pm_resume_clk(struct qup_i2c_dev *dev)
+{
+ clk_prepare_enable(dev->clk);
+ if (!dev->pdata->keep_ahb_clk_on)
+ clk_prepare_enable(dev->pclk);
+}
+
+static void i2c_qup_pm_suspend(struct qup_i2c_dev *dev)
+{
+ if (dev->pwr_state == MSM_I2C_PM_SUSPENDED) {
+ dev_err(dev->dev, "attempt to suspend when suspended\n");
+ return;
+ }
+
+ if (!dev->pdata->clk_ctl_xfer)
+ i2c_qup_pm_suspend_clk(dev);
+
+ if (!dev->pdata->active_only)
+ i2c_qup_clk_path_unvote(dev);
+
+ i2c_qup_gpio_free(dev);
+ dev->pwr_state = MSM_I2C_PM_SUSPENDED;
+}
+
+static void i2c_qup_pm_resume(struct qup_i2c_dev *dev)
+{
+ if (dev->pwr_state == MSM_I2C_PM_ACTIVE)
+ return;
+
+ i2c_qup_gpio_request(dev);
+
+ i2c_qup_clk_path_postponed_register(dev);
+ if (!dev->pdata->active_only)
+ i2c_qup_clk_path_vote(dev);
+
+ if (!dev->pdata->clk_ctl_xfer)
+ i2c_qup_pm_resume_clk(dev);
+ dev->pwr_state = MSM_I2C_PM_ACTIVE;
}
static int
@@ -595,43 +655,6 @@
return -ETIMEDOUT;
}
-static inline int qup_i2c_request_gpios(struct qup_i2c_dev *dev)
-{
- int i;
- int result = 0;
-
- for (i = 0; i < ARRAY_SIZE(i2c_rsrcs); ++i) {
- if (dev->i2c_gpios[i] >= 0) {
- result = gpio_request(dev->i2c_gpios[i], i2c_rsrcs[i]);
- if (result) {
- dev_err(dev->dev,
- "gpio_request for pin %d failed\
- with error %d\n", dev->i2c_gpios[i],
- result);
- goto error;
- }
- }
- }
- return 0;
-
-error:
- for (; --i >= 0;) {
- if (dev->i2c_gpios[i] >= 0)
- gpio_free(dev->i2c_gpios[i]);
- }
- return result;
-}
-
-static inline void qup_i2c_free_gpios(struct qup_i2c_dev *dev)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(i2c_rsrcs); ++i) {
- if (dev->i2c_gpios[i] >= 0)
- gpio_free(dev->i2c_gpios[i]);
- }
-}
-
#ifdef DEBUG
static void qup_verify_fifo(struct qup_i2c_dev *dev, uint32_t val,
uint32_t addr, int rdwr)
@@ -948,19 +971,35 @@
long timeout;
int err;
- /* Alternate if runtime power management is disabled */
- if (!pm_runtime_enabled(dev->dev)) {
- dev_dbg(dev->dev, "Runtime PM is disabled\n");
- i2c_qup_pm_resume_runtime(dev->dev);
- } else {
- pm_runtime_get_sync(dev->dev);
- }
+ /*
+ * If all slaves of this controller behave as expected, they will
+ * implement suspend and won't call any transaction if they are
+ * suspended. Since controller is its parent, controller's suspend
+ * will be called only AFTER alls slaves are suspended.
+ * However reality is differe and some slave don't implement suspend
+ * If a slave tries to initiate transfer when we are suspended,
+ * pm_runtime_enabled is set to false by system-pm.
+ * Make sure we return error when transaction is initiated while
+ * we are in suspended state
+ */
mutex_lock(&dev->mlock);
-
- if (dev->suspended) {
+ if (dev->pwr_state >= MSM_I2C_SYS_SUSPENDING) {
+ dev_err(dev->dev,
+ "xfer not allowed when ctrl is suspended addr:0x%x\n",
+ msgs->addr);
mutex_unlock(&dev->mlock);
return -EIO;
}
+ if (!pm_runtime_enabled(dev->dev)) {
+ dev_dbg(dev->dev, "Runtime PM FEATURE is disabled\n");
+ i2c_qup_pm_resume(dev);
+ } else {
+ pm_runtime_get_sync(dev->dev);
+ }
+
+
+ if (dev->pdata->clk_ctl_xfer)
+ i2c_qup_pm_resume_clk(dev);
/* Initialize QUP registers during first transfer */
if (dev->clk_ctl == 0) {
@@ -1263,6 +1302,8 @@
dev->pos = 0;
dev->err = 0;
dev->cnt = 0;
+ if (dev->pdata->clk_ctl_xfer)
+ i2c_qup_pm_suspend_clk(dev);
mutex_unlock(&dev->mlock);
pm_runtime_mark_last_busy(dev->dev);
pm_runtime_put_autosuspend(dev->dev);
@@ -1296,14 +1337,15 @@
struct device_node *node = pdev->dev.of_node;
struct msm_i2c_dt_to_pdata_map *itr;
struct msm_i2c_dt_to_pdata_map map[] = {
- {"qcom,i2c-bus-freq", &pdata->clk_freq , DT_REQUIRED , DT_U32 , 0},
- {"cell-index" , &pdev->id , DT_REQUIRED , DT_U32 , -1},
+ {"qcom,i2c-bus-freq", &pdata->clk_freq, DT_REQUIRED, DT_U32, 0},
+ {"cell-index", &pdev->id, DT_REQUIRED, DT_U32, -1},
{"qcom,i2c-src-freq", &pdata->src_clk_rate, DT_SUGGESTED, DT_U32, 0},
- {"qcom,master-id" , &pdata->master_id , DT_SUGGESTED, DT_U32, 0},
- {"qcom,scl-gpio" , gpios , DT_OPTIONAL , DT_GPIO, -1},
- {"qcom,sda-gpio" , gpios + 1 , DT_OPTIONAL , DT_GPIO, -1},
- {"qcom,active-only" , &pdata->active_only , DT_OPTIONAL , DT_BOOL, 0},
- {NULL , NULL , 0 , 0 , 0},
+ {"qcom,master-id", &pdata->master_id, DT_SUGGESTED, DT_U32, 0},
+ {"qcom,scl-gpio", gpios, DT_OPTIONAL, DT_GPIO, -1},
+ {"qcom,sda-gpio", gpios + 1, DT_OPTIONAL, DT_GPIO, -1},
+ {"qcom,clk-ctl-xfer", &pdata->clk_ctl_xfer, DT_OPTIONAL, DT_BOOL, -1},
+ {"qcom,active-only", &pdata->active_only, DT_OPTIONAL, DT_BOOL, 0},
+ {NULL, NULL, 0, 0, 0},
};
for (itr = map; itr->dt_name ; ++itr) {
@@ -1611,7 +1653,7 @@
pdata->msm_i2c_config_gpio(dev->adapter.nr, 1);
mutex_init(&dev->mlock);
- dev->pwr_state = 0;
+ dev->pwr_state = MSM_I2C_PM_SUSPENDED;
/* If the same AHB clock is used on Modem side
* switch it on here itself and don't switch it
* on and off during suspend and resume.
@@ -1685,13 +1727,11 @@
/* Grab mutex to ensure ongoing transaction is over */
mutex_lock(&dev->mlock);
- dev->suspended = 1;
+ dev->pwr_state = MSM_I2C_SYS_SUSPENDING;
mutex_unlock(&dev->mlock);
+ i2c_qup_pm_suspend(dev);
+ dev->pwr_state = MSM_I2C_SYS_SUSPENDED;
mutex_destroy(&dev->mlock);
- if (dev->pwr_state != 0) {
- qup_i2c_pwr_mgmt(dev, 0);
- qup_i2c_free_gpios(dev);
- }
platform_set_drvdata(pdev, NULL);
if (dev->num_irqs == 3) {
free_irq(dev->out_irq, dev);
@@ -1732,14 +1772,7 @@
struct platform_device *pdev = to_platform_device(device);
struct qup_i2c_dev *dev = platform_get_drvdata(pdev);
dev_dbg(device, "pm_runtime: suspending...\n");
- /* Grab mutex to ensure ongoing transaction is over */
- mutex_lock(&dev->mlock);
- dev->suspended = 1;
- mutex_unlock(&dev->mlock);
- if (dev->pwr_state != 0) {
- qup_i2c_pwr_mgmt(dev, 0);
- qup_i2c_free_gpios(dev);
- }
+ i2c_qup_pm_suspend(dev);
return 0;
}
@@ -1747,23 +1780,22 @@
{
struct platform_device *pdev = to_platform_device(device);
struct qup_i2c_dev *dev = platform_get_drvdata(pdev);
- int ret = 0;
dev_dbg(device, "pm_runtime: resuming...\n");
- if (dev->pwr_state == 0) {
- ret = qup_i2c_request_gpios(dev);
- if (ret != 0)
- return ret;
- qup_i2c_pwr_mgmt(dev, 1);
- }
- dev->suspended = 0;
+ i2c_qup_pm_resume(dev);
return 0;
}
-static int qup_i2c_suspend(struct device *device)
+static int i2c_qup_pm_suspend_sys(struct device *device)
{
+ struct platform_device *pdev = to_platform_device(device);
+ struct qup_i2c_dev *dev = platform_get_drvdata(pdev);
+ /* Acquire mutex to ensure current transaction is over */
+ mutex_lock(&dev->mlock);
+ dev->pwr_state = MSM_I2C_SYS_SUSPENDING;
+ mutex_unlock(&dev->mlock);
if (!pm_runtime_enabled(device) || !pm_runtime_suspended(device)) {
- dev_dbg(device, "system suspend");
- i2c_qup_pm_suspend_runtime(device);
+ dev_dbg(device, "system suspend\n");
+ i2c_qup_pm_suspend(dev);
/*
* set the device's runtime PM status to 'suspended'
*/
@@ -1771,25 +1803,29 @@
pm_runtime_set_suspended(device);
pm_runtime_enable(device);
}
+ dev->pwr_state = MSM_I2C_SYS_SUSPENDED;
return 0;
}
-static int qup_i2c_resume(struct device *device)
+static int i2c_qup_pm_resume_sys(struct device *device)
{
+ struct platform_device *pdev = to_platform_device(device);
+ struct qup_i2c_dev *dev = platform_get_drvdata(pdev);
/*
* Rely on runtime-PM to call resume in case it is enabled
* Even if it's not enabled, rely on 1st client transaction to do
* clock ON and gpio configuration
*/
- dev_dbg(device, "system resume");
+ dev_dbg(device, "system resume\n");
+ dev->pwr_state = MSM_I2C_PM_SUSPENDED;
return 0;
}
#endif /* CONFIG_PM */
static const struct dev_pm_ops i2c_qup_dev_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(
- qup_i2c_suspend,
- qup_i2c_resume
+ i2c_qup_pm_suspend_sys,
+ i2c_qup_pm_resume_sys
)
SET_RUNTIME_PM_OPS(
i2c_qup_pm_suspend_runtime,
diff --git a/drivers/input/misc/bmp18x-core.c b/drivers/input/misc/bmp18x-core.c
index ae98469..6f82277 100644
--- a/drivers/input/misc/bmp18x-core.c
+++ b/drivers/input/misc/bmp18x-core.c
@@ -75,36 +75,6 @@
#define ABS_MAX_PRESSURE 120000
#define BMP_DELAY_DEFAULT 200
-struct bmp18x_calibration_data {
- s16 AC1, AC2, AC3;
- u16 AC4, AC5, AC6;
- s16 B1, B2;
- s16 MB, MC, MD;
-};
-
-/* Each client has this additional data */
-struct bmp18x_data {
- struct bmp18x_data_bus data_bus;
- struct device *dev;
- struct mutex lock;
- struct bmp18x_calibration_data calibration;
- struct sensors_classdev cdev;
- u8 oversampling_setting;
- u8 sw_oversampling_setting;
- u32 raw_temperature;
- u32 raw_pressure;
- u32 temp_measurement_period;
- u32 last_temp_measurement;
- s32 b6; /* calculated temperature correction coefficient */
-#ifdef CONFIG_HAS_EARLYSUSPEND
- struct early_suspend early_suspend;
-#endif
- struct input_dev *input;
- struct delayed_work work;
- u32 delay;
- u32 enable;
-};
-
static struct sensors_classdev sensors_cdev = {
.name = "bmp18x-pressure",
.vendor = "Bosch",
@@ -455,8 +425,15 @@
struct bmp18x_data, cdev);
struct device *dev = data->dev;
+ enabled = enabled ? 1 : 0;
mutex_lock(&data->lock);
- data->enable = enabled ? 1 : 0;
+
+ if (data->enable == enabled) {
+ dev_warn(dev, "already %s\n", enabled ? "enabled" : "disabled");
+ goto out;
+ }
+
+ data->enable = enabled;
if (data->enable) {
bmp18x_enable(dev);
@@ -466,8 +443,9 @@
cancel_delayed_work_sync(&data->work);
bmp18x_disable(dev);
}
- mutex_unlock(&data->lock);
+out:
+ mutex_unlock(&data->lock);
return 0;
}
@@ -686,6 +664,8 @@
register_early_suspend(&data->early_suspend);
#endif
+ pdata->set_power(data, 0);
+ data->power_enabled = 0;
dev_info(dev, "Succesfully initialized bmp18x!\n");
return 0;
@@ -720,10 +700,12 @@
{
struct bmp18x_platform_data *pdata = dev->platform_data;
struct bmp18x_data *data = dev_get_drvdata(dev);
- if (pdata && pdata->deinit_hw)
- pdata->deinit_hw(&data->data_bus);
+ int ret = 0;
- return 0;
+ if (pdata && pdata->set_power)
+ ret = pdata->set_power(data, 0);
+
+ return ret;
}
EXPORT_SYMBOL(bmp18x_disable);
@@ -731,10 +713,12 @@
{
struct bmp18x_platform_data *pdata = dev->platform_data;
struct bmp18x_data *data = dev_get_drvdata(dev);
- if (pdata && pdata->init_hw)
- return pdata->init_hw(&data->data_bus);
+ int ret = 0;
- return 0;
+ if (pdata && pdata->set_power)
+ ret = pdata->set_power(data, 1);
+
+ return ret;
}
EXPORT_SYMBOL(bmp18x_enable);
#endif
diff --git a/drivers/input/misc/bmp18x-i2c.c b/drivers/input/misc/bmp18x-i2c.c
index abbe6e5..75edd0b 100644
--- a/drivers/input/misc/bmp18x-i2c.c
+++ b/drivers/input/misc/bmp18x-i2c.c
@@ -24,6 +24,7 @@
#include <linux/i2c.h>
#include <linux/err.h>
#include <linux/regulator/consumer.h>
+#include <linux/delay.h>
#include "bmp18x.h"
struct sensor_regulator {
@@ -102,9 +103,13 @@
static int bmp18x_init_hw(struct bmp18x_data_bus *data_bus)
{
- if (data_bus->client)
- return bmp18x_config_regulator(data_bus->client, 1);
- return 0;
+ int ret = 0;
+ if (data_bus->client) {
+ ret = bmp18x_config_regulator(data_bus->client, 1);
+ /* The minimum start up time of bmp18x is 10ms */
+ usleep_range(15000, 20000);
+ }
+ return ret;
}
static void bmp18x_deinit_hw(struct bmp18x_data_bus *data_bus)
@@ -113,6 +118,43 @@
bmp18x_config_regulator(data_bus->client, 0);
}
+static int bmp18x_set_power(struct bmp18x_data *data, int on)
+{
+ int rc = 0;
+ int num_vreg = ARRAY_SIZE(bmp_vreg);
+ int i;
+
+ if (!on && data->power_enabled) {
+ for (i = 0; i < num_vreg; i++) {
+ rc = regulator_disable(bmp_vreg[i].vreg);
+ if (rc) {
+ dev_err(data->dev, "Regulator vdd disable failed rc=%d\n",
+ rc);
+ return rc;
+ }
+ }
+ data->power_enabled = false;
+ } else if (on && !data->power_enabled) {
+ for (i = 0; i < num_vreg; i++) {
+ rc = regulator_enable(bmp_vreg[i].vreg);
+ if (rc) {
+ dev_err(data->dev, "Regulator vdd enable failed rc=%d\n",
+ rc);
+ return rc;
+ }
+ }
+ /* The minimum start up time of bmp18x is 10ms */
+ usleep_range(15000, 20000);
+ data->power_enabled = true;
+ } else {
+ dev_warn(data->dev,
+ "Power on=%d. enabled=%d\n",
+ on, data->power_enabled);
+ }
+
+ return rc;
+}
+
#ifdef CONFIG_OF
static int bmp18x_parse_dt(struct device *dev,
struct bmp18x_platform_data *pdata)
@@ -198,6 +240,7 @@
}
pdata->init_hw = bmp18x_init_hw;
pdata->deinit_hw = bmp18x_deinit_hw;
+ pdata->set_power = bmp18x_set_power;
client->dev.platform_data = pdata;
}
return bmp18x_probe(&client->dev, &data_bus);
@@ -216,12 +259,24 @@
#ifdef CONFIG_PM
static int bmp18x_i2c_suspend(struct device *dev)
{
- return bmp18x_disable(dev);
+ int ret = 0;
+ struct bmp18x_data *data = dev_get_drvdata(dev);
+
+ if (data->enable)
+ ret = bmp18x_disable(dev);
+
+ return ret;
}
static int bmp18x_i2c_resume(struct device *dev)
{
- return bmp18x_enable(dev);
+ int ret = 0;
+ struct bmp18x_data *data = dev_get_drvdata(dev);
+
+ if (data->enable)
+ ret = bmp18x_enable(dev);
+
+ return ret;
}
static const struct dev_pm_ops bmp18x_i2c_pm_ops = {
diff --git a/drivers/input/misc/bmp18x.h b/drivers/input/misc/bmp18x.h
index d1b1ee7..6b6c4b1 100644
--- a/drivers/input/misc/bmp18x.h
+++ b/drivers/input/misc/bmp18x.h
@@ -18,6 +18,7 @@
*/
#ifndef _BMP18X_H
#define _BMP18X_H
+#include <linux/sensors.h>
#define BMP18X_NAME "bmp18x"
@@ -46,13 +47,47 @@
void *client;
};
+struct bmp18x_calibration_data {
+ s16 AC1, AC2, AC3;
+ u16 AC4, AC5, AC6;
+ s16 B1, B2;
+ s16 MB, MC, MD;
+};
+
+/* Each client has this additional data */
+struct bmp18x_data {
+ struct bmp18x_data_bus data_bus;
+ struct device *dev;
+ struct mutex lock;
+ struct bmp18x_calibration_data calibration;
+ struct sensors_classdev cdev;
+#ifdef CONFIG_HAS_EARLYSUSPEND
+ struct early_suspend early_suspend;
+#endif
+ struct input_dev *input;
+ struct delayed_work work;
+
+ u8 oversampling_setting;
+ u8 sw_oversampling_setting;
+ u32 raw_temperature;
+ u32 raw_pressure;
+ u32 temp_measurement_period;
+ u32 last_temp_measurement;
+ s32 b6; /* calculated temperature correction coefficient */
+ u32 delay;
+ u32 enable;
+ u32 power_enabled;
+};
+
struct bmp18x_platform_data {
u8 chip_id;
u8 default_oversampling;
u8 default_sw_oversampling;
u32 temp_measurement_period;
+ u32 power_enabled;
int (*init_hw)(struct bmp18x_data_bus *);
void (*deinit_hw)(struct bmp18x_data_bus *);
+ int (*set_power)(struct bmp18x_data*, int);
};
int bmp18x_probe(struct device *dev, struct bmp18x_data_bus *data_bus);
diff --git a/drivers/input/misc/cm36283.c b/drivers/input/misc/cm36283.c
index 5f08da4..a7b4735 100644
--- a/drivers/input/misc/cm36283.c
+++ b/drivers/input/misc/cm36283.c
@@ -3,7 +3,7 @@
* Copyright (C) 2012 Capella Microsystems Inc.
* Author: Frank Hsieh <pengyueh@gmail.com>
*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -75,6 +75,10 @@
.min_delay = 0,
.fifo_reserved_event_count = 0,
.fifo_max_event_count = 0,
+ .enabled = 0,
+ .delay_msec = CM36283_LS_DEFAULT_POLL_DELAY,
+ .sensors_enable = NULL,
+ .sensors_poll_delay = NULL,
};
static struct sensors_classdev sensors_proximity_cdev = {
@@ -89,6 +93,10 @@
.min_delay = 0,
.fifo_reserved_event_count = 0,
.fifo_max_event_count = 0,
+ .enabled = 0,
+ .delay_msec = CM36283_PS_DEFAULT_POLL_DELAY,
+ .sensors_enable = NULL,
+ .sensors_poll_delay = NULL,
};
@@ -159,6 +167,8 @@
struct regulator *vio;
struct delayed_work ldwork;
struct delayed_work pdwork;
+ struct sensors_classdev als_cdev;
+ struct sensors_classdev ps_cdev;
};
struct cm36283_info *lp_info;
int fLevel=-1;
@@ -806,6 +816,21 @@
return ret;
}
+static int ps_enable_set(struct sensors_classdev *sensors_cdev,
+ unsigned int enable)
+{
+ struct cm36283_info *lpi = container_of(sensors_cdev,
+ struct cm36283_info, ps_cdev);
+ int ret;
+
+ if (enable)
+ ret = psensor_enable(lpi);
+ else
+ ret = psensor_disable(lpi);
+
+ return ret;
+}
+
static ssize_t ps_enable_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
@@ -962,6 +987,27 @@
return ret;
}
+static int ls_enable_set(struct sensors_classdev *sensors_cdev,
+ unsigned int enable)
+{
+ struct cm36283_info *lpi = container_of(sensors_cdev,
+ struct cm36283_info, als_cdev);
+ int ret;
+
+ if (enable)
+ ret = lightsensor_enable(lpi);
+ else
+ ret = lightsensor_disable(lpi);
+
+ if (ret < 0) {
+ dev_err(&lpi->i2c_client->dev, "%s: set auto light sensor fail\n",
+ __func__);
+ return -EIO;
+ }
+
+ return 0;
+}
+
static ssize_t ls_enable_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
@@ -1003,9 +1049,11 @@
lpi->ls_calibrate);
dev_dbg(&lpi->i2c_client->dev, "ls_auto:0x%x\n", ls_auto);
- if (ret < 0)
+ if (ret < 0) {
dev_err(&lpi->i2c_client->dev, "%s: set auto light sensor fail\n",
__func__);
+ return ret;
+ }
return count;
}
@@ -1188,6 +1236,21 @@
return count;
}
+static int ls_poll_delay_set(struct sensors_classdev *sensors_cdev,
+ unsigned int delay_msec)
+{
+ struct cm36283_info *lpi = container_of(sensors_cdev,
+ struct cm36283_info, als_cdev);
+
+ if ((delay_msec < CM36283_LS_MIN_POLL_DELAY) ||
+ (delay_msec > CM36283_LS_MAX_POLL_DELAY))
+ return -EINVAL;
+
+ atomic_set(&lpi->ls_poll_delay, delay_msec);
+
+ return 0;
+}
+
static ssize_t ps_poll_delay_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
@@ -1213,6 +1276,20 @@
return count;
}
+static int ps_poll_delay_set(struct sensors_classdev *sensors_cdev,
+ unsigned int delay_msec)
+{
+ struct cm36283_info *lpi = container_of(sensors_cdev,
+ struct cm36283_info, als_cdev);
+
+ if ((delay_msec < CM36283_PS_MIN_POLL_DELAY) ||
+ (delay_msec > CM36283_PS_MAX_POLL_DELAY))
+ return -EINVAL;
+
+ atomic_set(&lpi->ps_poll_delay, delay_msec);
+ return 0;
+}
+
static ssize_t ls_fLevel_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
@@ -1645,12 +1722,21 @@
goto err_light_sysfs_cleanup;
}
+ lpi->als_cdev = sensors_light_cdev;
+ lpi->als_cdev.sensors_enable = ls_enable_set;
+ lpi->als_cdev.sensors_poll_delay = ls_poll_delay_set;
+ lpi->als_cdev.min_delay = CM36283_LS_MIN_POLL_DELAY * 1000;
- ret = sensors_classdev_register(&client->dev, &sensors_light_cdev);
+ lpi->ps_cdev = sensors_proximity_cdev;
+ lpi->ps_cdev.sensors_enable = ps_enable_set;
+ lpi->ps_cdev.sensors_poll_delay = ps_poll_delay_set;
+ lpi->ps_cdev.min_delay = CM36283_PS_MIN_POLL_DELAY * 1000;
+
+ ret = sensors_classdev_register(&client->dev, &lpi->als_cdev);
if (ret)
goto err_proximity_sysfs_cleanup;
- ret = sensors_classdev_register(&client->dev, &sensors_proximity_cdev);
+ ret = sensors_classdev_register(&client->dev, &lpi->ps_cdev);
if (ret)
goto err_create_class_sysfs;
@@ -1661,7 +1747,7 @@
return ret;
err_create_class_sysfs:
- sensors_classdev_unregister(&sensors_light_cdev);
+ sensors_classdev_unregister(&lpi->als_cdev);
err_proximity_sysfs_cleanup:
remove_sysfs_interfaces(&lpi->ps_input_dev->dev, proximity_attr,
ARRAY_SIZE(proximity_attr));
diff --git a/drivers/input/misc/mma8x5x.c b/drivers/input/misc/mma8x5x.c
index 0fc5693..d708d94 100644
--- a/drivers/input/misc/mma8x5x.c
+++ b/drivers/input/misc/mma8x5x.c
@@ -30,6 +30,7 @@
#include <linux/sensors.h>
#include <linux/regulator/consumer.h>
#include <linux/of_gpio.h>
+#include <linux/irq.h>
#define ACCEL_INPUT_DEV_NAME "accelerometer"
#define MMA8451_ID 0x1A
@@ -41,7 +42,7 @@
/* Polling delay in msecs */
#define POLL_INTERVAL_MIN 1
#define POLL_INTERVAL_MAX 10000
-#define POLL_INTERVAL 100
+#define POLL_INTERVAL 100 /* msecs */
/* if sensor is standby ,set POLL_STOP_TIME to slow down the poll */
#define POLL_STOP_TIME 10000
@@ -74,6 +75,13 @@
.sensors_poll_delay = NULL,
};
+#define MMA_WAKE_CFG 0x02
+#define MMA_INT_EN_DRDY 0x01
+#define MMA_INT_EN_FF_MT 0x04
+#define MMA_INT_ROUTING_CFG 0x01
+
+#define MMA_POWER_CFG_MASK 0xFE
+
struct sensor_regulator {
struct regulator *vreg;
const char *name;
@@ -86,6 +94,23 @@
{NULL, "vio", 1800000, 1800000},
};
+struct mma_odr_selection_table {
+ u32 odr_cfg;
+ u32 delay_bottom;
+ u32 delay_top;
+};
+
+static struct mma_odr_selection_table mma_odr_table[] = {
+ {0x00, 0, 1500},
+ {0x08, 1501, 3500},
+ {0x10, 3501, 7500},
+ {0x18, 7501, 15000},
+ {0x20, 15001, 50000},
+ {0x28, 50001, 120000},
+ {0x30, 120001, 400000},
+ {0x38, 400001, 10000000},
+};
+
/* register enum for mma8x5x registers */
enum {
MMA8X5X_STATUS = 0x00,
@@ -165,6 +190,7 @@
struct mma8x5x_data {
struct i2c_client *client;
struct input_polled_dev *poll_dev;
+ struct input_dev *idev;
struct mutex data_lock;
struct sensors_classdev cdev;
int active;
@@ -174,6 +200,7 @@
int int_pin;
u32 int_flags;
int poll_delay;
+ bool use_int;
};
/* Addresses scanned */
static const unsigned short normal_i2c[] = {0x1c, 0x1d, I2C_CLIENT_END};
@@ -202,7 +229,7 @@
{{ 0, 1, 0}, { 1, 0, 0}, {0, 0, -1} },
{{ 1, 0, 0}, { 0, -1, 0}, {0, 0, -1} },
};
-
+static struct mma8x5x_data *drv_data;
static int mma8x5x_config_regulator(struct i2c_client *client, bool on)
{
int rc = 0, i;
@@ -348,6 +375,98 @@
return -EIO;
}
+static int mma8x5x_delay2odr(u32 delay_ms)
+{
+ int i;
+ u32 delay_us;
+
+ delay_us = delay_ms * 1000;
+ for (i = 0; i < sizeof(mma_odr_table) /
+ sizeof(struct mma_odr_selection_table); i++) {
+ if ((delay_us <= mma_odr_table[i].delay_top) &&
+ (delay_us > mma_odr_table[i].delay_bottom))
+ break;
+ }
+ if (i < sizeof(mma_odr_table) /
+ sizeof(struct mma_odr_selection_table))
+ return mma_odr_table[i].odr_cfg;
+ else
+ return -EINVAL;
+}
+
+static int mma8x5x_device_set_odr(struct i2c_client *client, u32 delay_ms)
+{
+ int result;
+ u8 val;
+
+ result = mma8x5x_delay2odr(delay_ms);
+ if (result < 0)
+ goto out;
+ val = (u8)result;
+
+ result = i2c_smbus_read_byte_data(client, MMA8X5X_CTRL_REG1);
+ if (result < 0)
+ goto out;
+
+ val = (u8)result | val;
+ result = i2c_smbus_write_byte_data(client, MMA8X5X_CTRL_REG1,
+ (val & MMA_POWER_CFG_MASK));
+ if (result < 0)
+ goto out;
+
+ result = i2c_smbus_write_byte_data(client, MMA8X5X_CTRL_REG4,
+ MMA_INT_EN_DRDY);
+ if (result < 0)
+ goto out;
+
+ result = i2c_smbus_write_byte_data(client, MMA8X5X_CTRL_REG5,
+ MMA_INT_ROUTING_CFG);
+ if (result < 0)
+ goto out;
+
+ result = i2c_smbus_write_byte_data(client, MMA8X5X_CTRL_REG1,
+ val);
+ if (result < 0)
+ goto out;
+
+ return 0;
+out:
+ dev_err(&client->dev, "error when set ODR mma8x5x:(%d)", result);
+ return result;
+}
+static int mma8x5x_device_int_init(struct i2c_client *client)
+{
+ struct mma8x5x_data *pdata = i2c_get_clientdata(client);
+ int result;
+ int val;
+
+ result = mma8x5x_device_set_odr(client, pdata->poll_delay);
+ if (result < 0)
+ goto out;
+
+ val = MMA_WAKE_CFG;
+ result = i2c_smbus_write_byte_data(client, MMA8X5X_CTRL_REG3,
+ val);
+ if (result < 0)
+ goto out;
+
+ val = MMA_INT_EN_DRDY;
+ result = i2c_smbus_write_byte_data(client, MMA8X5X_CTRL_REG4,
+ val);
+ if (result < 0)
+ goto out;
+
+ val = MMA_INT_ROUTING_CFG;
+ result = i2c_smbus_write_byte_data(client, MMA8X5X_CTRL_REG5,
+ val);
+ if (result < 0)
+ goto out;
+
+ return 0;
+out:
+ dev_err(&client->dev, "error when int init mma8x5x:(%d)", result);
+ return result;
+}
static int mma8x5x_read_data(struct i2c_client *client,
struct mma8x5x_data_axis *data)
{
@@ -355,7 +474,7 @@
int ret;
ret = i2c_smbus_read_i2c_block_data(client,
- MMA8X5X_OUT_X_MSB, 7, tmp_data);
+ MMA8X5X_OUT_X_MSB, 7, tmp_data);
if (ret < MMA8X5X_BUF_SIZE) {
dev_err(&client->dev, "i2c block read failed\n");
return -EIO;
@@ -396,6 +515,28 @@
mma8x5x_report_data(pdata);
}
+static irqreturn_t mma8x5x_interrupt(int vec, void *data)
+{
+ struct i2c_client *client = (struct i2c_client *)data;
+ struct mma8x5x_data *pdata = i2c_get_clientdata(client);
+ struct input_dev *idev = pdata->idev;
+ struct mma8x5x_data_axis data_axis;
+
+ mutex_lock(&pdata->data_lock);
+
+ if (mma8x5x_read_data(pdata->client, &data_axis) != 0)
+ goto out;
+ mma8x5x_data_convert(pdata, &data_axis);
+ input_report_abs(idev, ABS_X, data_axis.x);
+ input_report_abs(idev, ABS_Y, data_axis.y);
+ input_report_abs(idev, ABS_Z, data_axis.z);
+ input_sync(idev);
+out:
+ mutex_unlock(&pdata->data_lock);
+
+ return IRQ_HANDLED;
+}
+
static int mma8x5x_enable_set(struct sensors_classdev *sensors_cdev,
unsigned int enable)
{
@@ -416,6 +557,9 @@
if (ret)
goto err_failed;
+ ret = mma8x5x_device_set_odr(client, pdata->poll_delay);
+ if (ret)
+ goto err_failed;
pdata->active &= ~MMA_SHUTTEDDOWN;
}
if (pdata->active == MMA_STANDBY) {
@@ -472,12 +616,17 @@
static ssize_t mma8x5x_enable_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
- struct input_polled_dev *poll_dev = dev_get_drvdata(dev);
- struct mma8x5x_data *pdata = (struct mma8x5x_data *)(poll_dev->private);
- struct i2c_client *client = pdata->client;
+ struct mma8x5x_data *pdata = drv_data;
+ struct i2c_client *client;
u8 val;
int enable;
+ if (!pdata) {
+ dev_err(dev, "Invalid driver private data!");
+ return -EINVAL;
+ }
+ client = pdata->client;
+
mutex_lock(&pdata->data_lock);
val = i2c_smbus_read_byte_data(client, MMA8X5X_CTRL_REG1);
if ((val & 0x01) && pdata->active == MMA_ACTIVED)
@@ -492,11 +641,16 @@
struct device_attribute *attr,
const char *buf, size_t count)
{
- struct input_polled_dev *poll_dev = dev_get_drvdata(dev);
- struct mma8x5x_data *pdata = (struct mma8x5x_data *)(poll_dev->private);
+ struct mma8x5x_data *pdata = drv_data;
+ struct i2c_client *client;
int ret;
unsigned long enable;
+ if (!pdata) {
+ dev_err(dev, "Invalid driver private data!");
+ return -EINVAL;
+ }
+ client = pdata->client;
ret = kstrtoul(buf, 10, &enable);
if (ret)
return ret;
@@ -509,9 +663,13 @@
static ssize_t mma8x5x_position_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
- struct input_polled_dev *poll_dev = dev_get_drvdata(dev);
- struct mma8x5x_data *pdata = (struct mma8x5x_data *)(poll_dev->private);
+ struct mma8x5x_data *pdata = drv_data;
int position = 0;
+
+ if (!pdata) {
+ dev_err(dev, "Invalid driver private data!");
+ return -EINVAL;
+ }
mutex_lock(&pdata->data_lock);
position = pdata->position ;
mutex_unlock(&pdata->data_lock);
@@ -522,10 +680,14 @@
struct device_attribute *attr,
const char *buf, size_t count)
{
- struct input_polled_dev *poll_dev = dev_get_drvdata(dev);
- struct mma8x5x_data *pdata = (struct mma8x5x_data *)(poll_dev->private);
+ struct mma8x5x_data *pdata = drv_data;
int position;
int ret;
+
+ if (!pdata) {
+ dev_err(dev, "Invalid driver private data!");
+ return -EINVAL;
+ }
ret = kstrtoint(buf, 10, &position);
if (ret)
return ret;
@@ -540,11 +702,21 @@
{
struct mma8x5x_data *pdata = container_of(sensors_cdev,
struct mma8x5x_data, cdev);
+ int ret;
- mutex_lock(&pdata->data_lock);
- pdata->poll_delay = delay_ms;
- pdata->poll_dev->poll_interval = pdata->poll_delay;
- mutex_unlock(&pdata->data_lock);
+ if (pdata->use_int) {
+ mutex_lock(&pdata->data_lock);
+ pdata->poll_delay = delay_ms;
+ ret = mma8x5x_device_set_odr(pdata->client, delay_ms);
+ mutex_unlock(&pdata->data_lock);
+ if (ret < 0)
+ return ret;
+ } else {
+ mutex_lock(&pdata->data_lock);
+ pdata->poll_delay = delay_ms;
+ pdata->poll_dev->poll_interval = pdata->poll_delay;
+ mutex_unlock(&pdata->data_lock);
+ }
return 0;
}
@@ -552,8 +724,13 @@
static ssize_t mma8x5x_poll_delay_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
- struct input_polled_dev *poll_dev = dev_get_drvdata(dev);
- struct mma8x5x_data *pdata = (struct mma8x5x_data *)(poll_dev->private);
+ struct mma8x5x_data *pdata = drv_data;
+
+ if (!pdata) {
+ dev_err(dev, "Invalid driver private data!");
+ return -EINVAL;
+ }
+
return snprintf(buf, PAGE_SIZE, "%d\n", pdata->poll_delay);
}
@@ -561,19 +738,23 @@
struct device_attribute *attr,
const char *buf, size_t count)
{
- struct input_polled_dev *poll_dev = dev_get_drvdata(dev);
- struct mma8x5x_data *pdata = (struct mma8x5x_data *)(poll_dev->private);
- int interval;
+ struct mma8x5x_data *pdata = drv_data;
+ int delay;
int ret;
- ret = kstrtoint(buf, 10, &interval);
+
+ if (!pdata) {
+ dev_err(dev, "Invalid driver private data!");
+ return -EINVAL;
+ }
+ ret = kstrtoint(buf, 10, &delay);
if (ret)
return ret;
- if (interval <= POLL_INTERVAL_MIN)
- interval = POLL_INTERVAL_MIN;
- if (interval > POLL_INTERVAL_MAX)
- interval = POLL_INTERVAL_MAX;
+ if (delay <= POLL_INTERVAL_MIN)
+ delay = POLL_INTERVAL_MIN;
+ if (delay > POLL_INTERVAL_MAX)
+ delay = POLL_INTERVAL_MAX;
- mma8x5x_poll_delay_set(&pdata->cdev, interval);
+ mma8x5x_poll_delay_set(&pdata->cdev, delay);
return count;
}
@@ -632,6 +813,8 @@
return rc;
}
+ data->use_int = of_property_read_bool(np, "fsl,use-interrupt");
+
return 0;
}
@@ -676,7 +859,7 @@
if (client->dev.of_node) {
result = mma8x5x_parse_dt(&client->dev, pdata);
if (result)
- return result;
+ goto err_parse_dt;
} else {
pdata->position = CONFIG_SENSORS_MMA_POSITION;
pdata->int_pin = -1;
@@ -684,40 +867,96 @@
}
/* Initialize the MMA8X5X chip */
+ drv_data = pdata;
pdata->client = client;
pdata->chip_id = chip_id;
pdata->mode = MODE_2G;
- pdata->poll_delay = POLL_INTERVAL;
+ pdata->poll_delay = POLL_STOP_TIME;
+ pdata->poll_dev = NULL;
mutex_init(&pdata->data_lock);
i2c_set_clientdata(client, pdata);
/* Initialize the MMA8X5X chip */
mma8x5x_device_init(client);
- /* create the input poll device */
- poll_dev = input_allocate_polled_device();
- if (!poll_dev) {
- result = -ENOMEM;
- dev_err(&client->dev, "alloc poll device failed!\n");
- goto err_alloc_poll_device;
- }
- poll_dev->poll = mma8x5x_dev_poll;
- poll_dev->poll_interval = POLL_STOP_TIME;
- poll_dev->poll_interval_min = POLL_INTERVAL_MIN;
- poll_dev->poll_interval_max = POLL_INTERVAL_MAX;
- poll_dev->private = pdata;
- idev = poll_dev->input;
- idev->name = ACCEL_INPUT_DEV_NAME;
- idev->uniq = mma8x5x_id2name(pdata->chip_id);
- idev->id.bustype = BUS_I2C;
- idev->evbit[0] = BIT_MASK(EV_ABS);
- input_set_abs_params(idev, ABS_X, -0x7fff, 0x7fff, 0, 0);
- input_set_abs_params(idev, ABS_Y, -0x7fff, 0x7fff, 0, 0);
- input_set_abs_params(idev, ABS_Z, -0x7fff, 0x7fff, 0, 0);
- pdata->poll_dev = poll_dev;
- result = input_register_polled_device(pdata->poll_dev);
- if (result) {
- dev_err(&client->dev, "register poll device failed!\n");
- goto err_register_polled_device;
+ if (pdata->use_int) {
+ if (pdata->int_pin >= 0)
+ client->irq = gpio_to_irq(pdata->int_pin);
+
+ if (gpio_is_valid(pdata->int_pin)) {
+ result = gpio_request(pdata->int_pin,
+ "mma8x5x_irq_gpio");
+ if (result) {
+ dev_err(&client->dev, "irq gpio(%d) request failed",
+ pdata->int_pin);
+ goto err_request_gpio;
+ }
+ result = gpio_direction_input(pdata->int_pin);
+ if (result) {
+ dev_err(&client->dev,
+ "set_direction for irq gpio failed\n");
+ goto err_set_direction;
+ }
+ }
+ idev = input_allocate_device();
+ if (!idev) {
+ result = -ENOMEM;
+ dev_err(&client->dev, "alloc input device failed!\n");
+ goto err_alloc_poll_device;
+ }
+ input_set_drvdata(idev, pdata);
+ idev->name = ACCEL_INPUT_DEV_NAME;
+ idev->uniq = mma8x5x_id2name(pdata->chip_id);
+ idev->id.bustype = BUS_I2C;
+ idev->evbit[0] = BIT_MASK(EV_ABS);
+ input_set_abs_params(idev, ABS_X, -0x7fff, 0x7fff, 0, 0);
+ input_set_abs_params(idev, ABS_Y, -0x7fff, 0x7fff, 0, 0);
+ input_set_abs_params(idev, ABS_Z, -0x7fff, 0x7fff, 0, 0);
+ result = input_register_device(idev);
+ if (result) {
+ dev_err(&client->dev, "register input device failed!\n");
+ goto err_register_device;
+ }
+ pdata->idev = idev;
+ device_init_wakeup(&client->dev, true);
+ enable_irq_wake(client->irq);
+ result = request_threaded_irq(client->irq, NULL,
+ mma8x5x_interrupt,
+ IRQ_TYPE_EDGE_RISING | IRQF_ONESHOT | IRQF_NO_SUSPEND,
+ ACCEL_INPUT_DEV_NAME, (void *)client);
+ if (result) {
+ dev_err(&client->dev, "Could not allocate irq(%d) !\n",
+ client->irq);
+ goto err_register_irq;
+ }
+ mma8x5x_device_int_init(client);
+ } else {
+ /* create the input poll device */
+ poll_dev = input_allocate_polled_device();
+ if (!poll_dev) {
+ result = -ENOMEM;
+ dev_err(&client->dev, "alloc poll device failed!\n");
+ goto err_alloc_poll_device;
+ }
+ pdata->poll_dev = poll_dev;
+ pdata->idev = NULL;
+ poll_dev->poll = mma8x5x_dev_poll;
+ poll_dev->poll_interval = POLL_STOP_TIME;
+ poll_dev->poll_interval_min = POLL_INTERVAL_MIN;
+ poll_dev->poll_interval_max = POLL_INTERVAL_MAX;
+ poll_dev->private = pdata;
+ idev = poll_dev->input;
+ idev->name = ACCEL_INPUT_DEV_NAME;
+ idev->uniq = mma8x5x_id2name(pdata->chip_id);
+ idev->id.bustype = BUS_I2C;
+ idev->evbit[0] = BIT_MASK(EV_ABS);
+ input_set_abs_params(idev, ABS_X, -0x7fff, 0x7fff, 0, 0);
+ input_set_abs_params(idev, ABS_Y, -0x7fff, 0x7fff, 0, 0);
+ input_set_abs_params(idev, ABS_Z, -0x7fff, 0x7fff, 0, 0);
+ result = input_register_polled_device(pdata->poll_dev);
+ if (result) {
+ dev_err(&client->dev, "register poll device failed!\n");
+ goto err_register_device;
+ }
}
result = sysfs_create_group(&idev->dev.kobj, &mma8x5x_attr_group);
if (result) {
@@ -727,7 +966,7 @@
}
pdata->cdev = sensors_cdev;
pdata->cdev.min_delay = POLL_INTERVAL_MIN * 1000;
- pdata->cdev.delay_msec = poll_dev->poll_interval;
+ pdata->cdev.delay_msec = pdata->poll_delay;
pdata->cdev.sensors_enable = mma8x5x_enable_set;
pdata->cdev.sensors_poll_delay = mma8x5x_poll_delay_set;
result = sensors_classdev_register(&client->dev, &pdata->cdev);
@@ -745,9 +984,20 @@
sysfs_remove_group(&idev->dev.kobj, &mma8x5x_attr_group);
err_create_sysfs:
input_unregister_polled_device(pdata->poll_dev);
-err_register_polled_device:
- input_free_polled_device(poll_dev);
+err_register_irq:
+ if (pdata->use_int)
+ device_init_wakeup(&client->dev, false);
+err_register_device:
+ if (pdata->use_int)
+ input_free_device(idev);
+ else
+ input_free_polled_device(pdata->poll_dev);
err_alloc_poll_device:
+err_set_direction:
+ if (gpio_is_valid(pdata->int_pin) && pdata->use_int)
+ gpio_free(pdata->int_pin);
+err_request_gpio:
+err_parse_dt:
kfree(pdata);
err_out:
mma8x5x_config_regulator(client, 0);
@@ -773,6 +1023,9 @@
{
struct i2c_client *client = to_i2c_client(dev);
struct mma8x5x_data *pdata = i2c_get_clientdata(client);
+
+ if (pdata->use_int && pdata->active == MMA_ACTIVED)
+ return 0;
if (pdata->active == MMA_ACTIVED)
mma8x5x_device_stop(client);
if (pdata->active & MMA_SHUTTEDDOWN)
@@ -789,6 +1042,8 @@
struct i2c_client *client = to_i2c_client(dev);
struct mma8x5x_data *pdata = i2c_get_clientdata(client);
+ if (pdata->use_int && pdata->active == MMA_ACTIVED)
+ return 0;
/* No need to power on while device is shutdowned from standby state */
if (pdata->active == (MMA_SHUTTEDDOWN | MMA_STANDBY))
return 0;
diff --git a/drivers/input/misc/mpu3050.c b/drivers/input/misc/mpu3050.c
index 039e078..9629aae 100644
--- a/drivers/input/misc/mpu3050.c
+++ b/drivers/input/misc/mpu3050.c
@@ -709,7 +709,7 @@
}
sensor->cdev = sensors_cdev;
- sensor->cdev.min_delay = MPU3050_MIN_POLL_INTERVAL;
+ sensor->cdev.min_delay = MPU3050_MIN_POLL_INTERVAL * 1000;
sensor->cdev.delay_msec = sensor->poll_interval;
sensor->cdev.sensors_enable = mpu3050_enable_set;
sensor->cdev.sensors_poll_delay = mpu3050_poll_delay_set;
diff --git a/drivers/input/touchscreen/atmel_mxt_ts.c b/drivers/input/touchscreen/atmel_mxt_ts.c
index b79ab7a..cd6989c 100644
--- a/drivers/input/touchscreen/atmel_mxt_ts.c
+++ b/drivers/input/touchscreen/atmel_mxt_ts.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2010 Samsung Electronics Co.Ltd
* Author: Joonyoung Shim <jy0922.shim@samsung.com>
- * Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -882,7 +882,7 @@
status = MXT_RELEASE;
}
- if (status != MXT_RELEASE) {
+ if ((status != MXT_RELEASE) && status) {
input_report_abs(input_dev, ABS_X, finger[single_id].x);
input_report_abs(input_dev, ABS_Y, finger[single_id].y);
input_report_abs(input_dev,
@@ -2550,6 +2550,15 @@
.resume = mxt_resume,
#endif
};
+#else
+static int mxt_suspend(struct device *dev)
+{
+ return 0;
+};
+static int mxt_resume(struct device *dev)
+{
+ return 0;
+};
#endif
static int mxt_debugfs_object_show(struct seq_file *m, void *v)
diff --git a/drivers/input/touchscreen/gt9xx/goodix_tool.c b/drivers/input/touchscreen/gt9xx/goodix_tool.c
index aa8159f..521599a 100644
--- a/drivers/input/touchscreen/gt9xx/goodix_tool.c
+++ b/drivers/input/touchscreen/gt9xx/goodix_tool.c
@@ -23,16 +23,15 @@
#include "gt9xx.h"
#include <linux/mutex.h>
+#include <linux/proc_fs.h>
+#include <linux/debugfs.h>
#define DATA_LENGTH_UINT 512
-#define CMD_HEAD_LENGTH (sizeof(st_cmd_head) - sizeof(u8 *))
+#define CMD_HEAD_LENGTH (sizeof(struct st_cmd_head) - sizeof(u8 *))
static char procname[20] = {0};
-#define UPDATE_FUNCTIONS
-
-#pragma pack(1)
-struct {
- u8 wr; /* write read flag£¬0:R 1:W 2:PID 3: */
+struct st_cmd_head {
+ u8 wr; /* write read flag 0:R 1:W 2:PID 3: */
u8 flag; /* 0:no need flag/int 1: need flag 2:need int */
u8 flag_addr[2];/* flag address */
u8 flag_val; /* flag val */
@@ -46,9 +45,9 @@
u8 addr[2]; /* address */
u8 res[3]; /* reserved */
u8 *data; /* data pointer */
-} st_cmd_head;
-#pragma pack()
-st_cmd_head cmd_head;
+} __packed;
+
+static struct st_cmd_head cmd_head;
static struct i2c_client *gt_client;
@@ -56,15 +55,11 @@
static struct mutex lock;
-static s32 goodix_tool_write(struct file *filp, const char __user *buff,
- unsigned long len, void *data);
-static s32 goodix_tool_read(char *page, char **start, off_t off, int count,
- int *eof, void *data);
static s32 (*tool_i2c_read)(u8 *, u16);
static s32 (*tool_i2c_write)(u8 *, u16);
-s32 DATA_LENGTH;
-s8 IC_TYPE[16] = {0};
+s32 data_length;
+s8 ic_type[16] = {0};
static void tool_set_proc_name(char *procname)
{
@@ -75,7 +70,7 @@
int i = 0, n_month = 1, n_day = 0, n_year = 0;
snprintf(date, 20, "%s", __DATE__);
- /* GTP_DEBUG("compile date: %s", date); */
+ /* pr_debug("compile date: %s", date); */
sscanf(date, "%s %d %d", month, &n_day, &n_year);
@@ -87,24 +82,27 @@
}
snprintf(procname, 20, "gmnode%04d%02d%02d", n_year, n_month, n_day);
- /* GTP_DEBUG("procname = %s", procname); */
+ /* pr_debug("procname = %s", procname); */
}
static s32 tool_i2c_read_no_extra(u8 *buf, u16 len)
{
s32 ret = -1;
- s32 i = 0;
- struct i2c_msg msgs[2];
-
- msgs[0].flags = !I2C_M_RD;
- msgs[0].addr = gt_client->addr;
- msgs[0].len = cmd_head.addr_len;
- msgs[0].buf = &buf[0];
-
- msgs[1].flags = I2C_M_RD;
- msgs[1].addr = gt_client->addr;
- msgs[1].len = len;
- msgs[1].buf = &buf[GTP_ADDR_LENGTH];
+ u8 i = 0;
+ struct i2c_msg msgs[2] = {
+ {
+ .flags = !I2C_M_RD,
+ .addr = gt_client->addr,
+ .len = cmd_head.addr_len,
+ .buf = &buf[0],
+ },
+ {
+ .flags = I2C_M_RD,
+ .addr = gt_client->addr,
+ .len = len,
+ .buf = &buf[GTP_ADDR_LENGTH],
+ },
+ };
for (i = 0; i < cmd_head.retry; i++) {
ret = i2c_transfer(gt_client->adapter, msgs, 2);
@@ -112,25 +110,35 @@
break;
}
+ if (i == cmd_head.retry) {
+ dev_err(>_client->dev, "I2C read retry limit over.\n");
+ ret = -EIO;
+ }
+
return ret;
}
static s32 tool_i2c_write_no_extra(u8 *buf, u16 len)
{
s32 ret = -1;
- s32 i = 0;
- struct i2c_msg msg;
-
- msg.flags = !I2C_M_RD;
- msg.addr = gt_client->addr;
- msg.len = len;
- msg.buf = buf;
+ u8 i = 0;
+ struct i2c_msg msg = {
+ .flags = !I2C_M_RD,
+ .addr = gt_client->addr,
+ .len = len,
+ .buf = buf,
+ };
for (i = 0; i < cmd_head.retry; i++) {
ret = i2c_transfer(gt_client->adapter, &msg, 1);
if (ret > 0)
break;
- }
+ }
+
+ if (i == cmd_head.retry) {
+ dev_err(>_client->dev, "I2C write retry limit over.\n");
+ ret = -EIO;
+ }
return ret;
}
@@ -163,22 +171,17 @@
static void register_i2c_func(void)
{
- /* if (!strncmp(IC_TYPE, "GT818", 5) || !strncmp(IC_TYPE, "GT816", 5)
- || !strncmp(IC_TYPE, "GT811", 5) || !strncmp(IC_TYPE, "GT818F", 6)
- || !strncmp(IC_TYPE, "GT827", 5) || !strncmp(IC_TYPE,"GT828", 5)
- || !strncmp(IC_TYPE, "GT813", 5)) */
-
- if (strncmp(IC_TYPE, "GT8110", 6) && strncmp(IC_TYPE, "GT8105", 6)
- && strncmp(IC_TYPE, "GT801", 5) && strncmp(IC_TYPE, "GT800", 5)
- && strncmp(IC_TYPE, "GT801PLUS", 9) && strncmp(IC_TYPE, "GT811", 5)
- && strncmp(IC_TYPE, "GTxxx", 5)) {
+ if (strcmp(ic_type, "GT8110") && strcmp(ic_type, "GT8105")
+ && strcmp(ic_type, "GT801") && strcmp(ic_type, "GT800")
+ && strcmp(ic_type, "GT801PLUS") && strcmp(ic_type, "GT811")
+ && strcmp(ic_type, "GTxxx")) {
tool_i2c_read = tool_i2c_read_with_extra;
tool_i2c_write = tool_i2c_write_with_extra;
- GTP_DEBUG("I2C function: with pre and end cmd!");
+ pr_debug("I2C function: with pre and end cmd!");
} else {
tool_i2c_read = tool_i2c_read_no_extra;
tool_i2c_write = tool_i2c_write_no_extra;
- GTP_INFO("I2C function: without pre and end cmd!");
+ pr_info("I2C function: without pre and end cmd!");
}
}
@@ -186,55 +189,11 @@
{
tool_i2c_read = NULL;
tool_i2c_write = NULL;
- GTP_INFO("I2C function: unregister i2c transfer function!");
-}
-
-s32 init_wr_node(struct i2c_client *client)
-{
- u8 i;
-
- gt_client = client;
- memset(&cmd_head, 0, sizeof(cmd_head));
- cmd_head.data = NULL;
-
- i = 5;
- while ((!cmd_head.data) && i) {
- cmd_head.data = kzalloc(i * DATA_LENGTH_UINT, GFP_KERNEL);
- if (NULL != cmd_head.data)
- break;
- i--;
- }
- if (i) {
- DATA_LENGTH = i * DATA_LENGTH_UINT;
- dev_dbg(&client->dev, "Applied memory size:%d.", DATA_LENGTH);
- } else {
- GTP_ERROR("Apply for memory failed.");
- return FAIL;
- }
-
- cmd_head.addr_len = 2;
- cmd_head.retry = 5;
-
- register_i2c_func();
-
- mutex_init(&lock);
- tool_set_proc_name(procname);
- goodix_proc_entry = create_proc_entry(procname, 0660, NULL);
- if (goodix_proc_entry == NULL) {
- GTP_ERROR("Couldn't create proc entry!");
- return FAIL;
- } else {
- GTP_INFO("Create proc entry success!");
- goodix_proc_entry->write_proc = goodix_tool_write;
- dix_proc_entry->read_proc = goodix_tool_read;
- }
-
- return SUCCESS;
+ pr_info("I2C function: unregister i2c transfer function!");
}
void uninit_wr_node(void)
{
- kfree(cmd_head.data);
cmd_head.data = NULL;
unregister_i2c_func();
remove_proc_entry(procname, NULL);
@@ -252,7 +211,7 @@
case 1:
ret = (src == dst) ? true : false;
- GTP_DEBUG("equal:src:0x%02x dst:0x%02x ret:%d.",
+ pr_debug("equal:src:0x%02x dst:0x%02x ret:%d.",
src, dst, (s32)ret);
break;
@@ -293,22 +252,18 @@
s32 i = 0;
u8 buf[32];
-/* memcpy(&buf[GTP_ADDR_LENGTH - cmd_head.addr_len],
- &cmd_head.flag_addr, cmd_head.addr_len);
- memcpy(buf, &cmd_head.flag_addr, cmd_head.addr_len);
- //Modified by Scott, 2012-02-17 */
memcpy(buf, cmd_head.flag_addr, cmd_head.addr_len);
for (i = 0; i < cmd_head.times; i++) {
if (tool_i2c_read(buf, 1) <= 0) {
- GTP_ERROR("Read flag data failed!");
+ dev_err(>_client->dev, "Read flag data failed!");
return FAIL;
}
if (true == relation(buf[GTP_ADDR_LENGTH], cmd_head.flag_val,
cmd_head.flag_relation)) {
- GTP_DEBUG("value at flag addr:0x%02x.",
+ pr_debug("value at flag addr:0x%02x.",
buf[GTP_ADDR_LENGTH]);
- GTP_DEBUG("flag value:0x%02x.", cmd_head.flag_val);
+ pr_debug("flag value:0x%02x.", cmd_head.flag_val);
break;
}
@@ -316,13 +271,34 @@
}
if (i >= cmd_head.times) {
- GTP_ERROR("Didn't get the flag to continue!");
+ dev_err(>_client->dev, "Didn't get the flag to continue!");
return FAIL;
}
return SUCCESS;
}
+#ifdef CONFIG_GT9XX_TOUCHPANEL_UPDATE
+static s32 fill_update_info(char __user *user_buf,
+ size_t count, loff_t *ppos)
+{
+ u8 buf[4];
+
+ buf[0] = show_len >> 8;
+ buf[1] = show_len & 0xff;
+ buf[2] = total_len >> 8;
+ buf[3] = total_len & 0xff;
+ return simple_read_from_buffer(user_buf, count, ppos,
+ buf, sizeof(buf));
+}
+#else
+static s32 fill_update_info(char __user *user_buf,
+ size_t count, loff_t *ppos)
+{
+ return -ENODEV;
+}
+#endif
+
/********************************************************
Function:
Goodix tool write function.
@@ -331,117 +307,99 @@
Output:
Return write length.
********************************************************/
-static s32 goodix_tool_write(struct file *filp, const char __user *buff,
- unsigned long len, void *data)
+static s32 goodix_tool_write(struct file *filp, const char __user *userbuf,
+ size_t count, loff_t *ppos)
{
s32 ret = 0;
- GTP_DEBUG_FUNC();
- GTP_DEBUG_ARRAY((u8 *)buff, len);
mutex_lock(&lock);
- ret = copy_from_user(&cmd_head, buff, CMD_HEAD_LENGTH);
+ ret = copy_from_user(&cmd_head, userbuf, CMD_HEAD_LENGTH);
if (ret) {
- GTP_ERROR("copy_from_user failed.");
+ dev_err(>_client->dev, "copy_from_user failed.");
ret = -EACCES;
goto exit;
}
- GTP_DEBUG("wr :0x%02x.", cmd_head.wr);
- GTP_DEBUG("flag:0x%02x.", cmd_head.flag);
- GTP_DEBUG("flag addr:0x%02x%02x.", cmd_head.flag_addr[0],
- cmd_head.flag_addr[1]);
- GTP_DEBUG("flag val:0x%02x.", cmd_head.flag_val);
- GTP_DEBUG("flag rel:0x%02x.", cmd_head.flag_relation);
- GTP_DEBUG("circle :%d.", (s32)cmd_head.circle);
- GTP_DEBUG("times :%d.", (s32)cmd_head.times);
- GTP_DEBUG("retry :%d.", (s32)cmd_head.retry);
- GTP_DEBUG("delay :%d.", (s32)cmd_head.delay);
- GTP_DEBUG("data len:%d.", (s32)cmd_head.data_len);
- GTP_DEBUG("addr len:%d.", (s32)cmd_head.addr_len);
- GTP_DEBUG("addr:0x%02x%02x.", cmd_head.addr[0], cmd_head.addr[1]);
- GTP_DEBUG("len:%d.", (s32)len);
- GTP_DEBUG("buf[20]:0x%02x.", buff[CMD_HEAD_LENGTH]);
+ dev_dbg(>_client->dev, "wr:0x%02x, flag:0x%02x, flag addr:0x%02x%02x, flag val:0x%02x, flag rel:0x%02x, circle:%d, times:%d, retry:%d, delay:%d, data len:%d, addr len:%d, addr:0x%02x%02x, write len: %d.",
+ cmd_head.wr, cmd_head.flag, cmd_head.flag_addr[0],
+ cmd_head.flag_addr[1], cmd_head.flag_val,
+ cmd_head.flag_relation, (s32)cmd_head.circle,
+ (s32)cmd_head.times, (s32)cmd_head.retry, (s32)cmd_head.delay,
+ (s32)cmd_head.data_len, (s32)cmd_head.addr_len,
+ cmd_head.addr[0], cmd_head.addr[1], (s32)count);
- if (cmd_head.data_len > (DATA_LENGTH - GTP_ADDR_LENGTH)) {
- pr_err("data len %d > data buff %d, rejected!\n",
- cmd_head.data_len, (DATA_LENGTH - GTP_ADDR_LENGTH));
+ if (cmd_head.data_len > (data_length - GTP_ADDR_LENGTH)) {
+ dev_err(>_client->dev, "data len %d > data buff %d, rejected!\n",
+ cmd_head.data_len, (data_length - GTP_ADDR_LENGTH));
ret = -EINVAL;
goto exit;
}
if (cmd_head.addr_len > GTP_ADDR_LENGTH) {
- pr_err(" addr len %d > data buff %d, rejected!\n",
+ dev_err(>_client->dev, "addr len %d > data buff %d, rejected!\n",
cmd_head.addr_len, GTP_ADDR_LENGTH);
ret = -EINVAL;
goto exit;
}
- if (cmd_head.wr == 1) {
- /* copy_from_user(&cmd_head.data[cmd_head.addr_len],
- &buff[CMD_HEAD_LENGTH], cmd_head.data_len); */
+ if (cmd_head.wr == GTP_RW_WRITE) {
ret = copy_from_user(&cmd_head.data[GTP_ADDR_LENGTH],
- &buff[CMD_HEAD_LENGTH], cmd_head.data_len);
- if (ret)
- GTP_ERROR("copy_from_user failed.");
+ &userbuf[CMD_HEAD_LENGTH], cmd_head.data_len);
+ if (ret) {
+ dev_err(>_client->dev, "copy_from_user failed.");
+ goto exit;
+ }
memcpy(&cmd_head.data[GTP_ADDR_LENGTH - cmd_head.addr_len],
cmd_head.addr, cmd_head.addr_len);
- GTP_DEBUG_ARRAY(cmd_head.data,
- cmd_head.data_len + cmd_head.addr_len);
- GTP_DEBUG_ARRAY((u8 *)&buff[CMD_HEAD_LENGTH],
- cmd_head.data_len);
-
- if (cmd_head.flag == 1) {
- if (FAIL == comfirm()) {
- GTP_ERROR("[WRITE]Comfirm fail!");
+ if (cmd_head.flag == GTP_NEED_FLAG) {
+ if (comfirm() == FAIL) {
+ dev_err(>_client->dev, "Comfirm fail!");
ret = -EINVAL;
goto exit;
}
- } else if (cmd_head.flag == 2) {
+ } else if (cmd_head.flag == GTP_NEED_INTERRUPT) {
/* Need interrupt! */
}
if (tool_i2c_write(
&cmd_head.data[GTP_ADDR_LENGTH - cmd_head.addr_len],
cmd_head.data_len + cmd_head.addr_len) <= 0) {
- GTP_ERROR("[WRITE]Write data failed!");
+ dev_err(>_client->dev, "Write data failed!");
ret = -EIO;
goto exit;
}
- GTP_DEBUG_ARRAY(
- &cmd_head.data[GTP_ADDR_LENGTH - cmd_head.addr_len],
- cmd_head.data_len + cmd_head.addr_len);
if (cmd_head.delay)
msleep(cmd_head.delay);
ret = cmd_head.data_len + CMD_HEAD_LENGTH;
goto exit;
- } else if (cmd_head.wr == 3) { /* Write ic type */
-
- ret = copy_from_user(&cmd_head.data[0], &buff[CMD_HEAD_LENGTH],
+ } else if (cmd_head.wr == GTP_RW_WRITE_IC_TYPE) { /* Write ic type */
+ ret = copy_from_user(&cmd_head.data[0],
+ &userbuf[CMD_HEAD_LENGTH],
cmd_head.data_len);
- if (ret)
- GTP_ERROR("copy_from_user failed.");
+ if (ret) {
+ dev_err(>_client->dev, "copy_from_user failed.");
+ goto exit;
+ }
- if (cmd_head.data_len > sizeof(IC_TYPE)) {
- pr_err("<<-GTP->> data len %d > data buff %d, rejected!\n",
- cmd_head.data_len, sizeof(IC_TYPE));
+ if (cmd_head.data_len > sizeof(ic_type)) {
+ dev_err(>_client->dev,
+ "data len %d > data buff %d, rejected!\n",
+ cmd_head.data_len, sizeof(ic_type));
ret = -EINVAL;
goto exit;
}
- memcpy(IC_TYPE, cmd_head.data, cmd_head.data_len);
+ memcpy(ic_type, cmd_head.data, cmd_head.data_len);
register_i2c_func();
ret = cmd_head.data_len + CMD_HEAD_LENGTH;
goto exit;
- } else if (cmd_head.wr == 5) {
-
- /* memcpy(IC_TYPE, cmd_head.data, cmd_head.data_len); */
-
+ } else if (cmd_head.wr == GTP_RW_NO_WRITE) {
ret = cmd_head.data_len + CMD_HEAD_LENGTH;
goto exit;
- } else if (cmd_head.wr == 7) { /* disable irq! */
+ } else if (cmd_head.wr == GTP_RW_DISABLE_IRQ) { /* disable irq! */
gtp_irq_disable(i2c_get_clientdata(gt_client));
#if GTP_ESD_PROTECT
@@ -449,7 +407,7 @@
#endif
ret = CMD_HEAD_LENGTH;
goto exit;
- } else if (cmd_head.wr == 9) { /* enable irq! */
+ } else if (cmd_head.wr == GTP_RW_ENABLE_IRQ) { /* enable irq! */
gtp_irq_enable(i2c_get_clientdata(gt_client));
#if GTP_ESD_PROTECT
@@ -457,49 +415,51 @@
#endif
ret = CMD_HEAD_LENGTH;
goto exit;
- } else if (cmd_head.wr == 17) {
+ } else if (cmd_head.wr == GTP_RW_CHECK_RAWDIFF_MODE) {
struct goodix_ts_data *ts = i2c_get_clientdata(gt_client);
ret = copy_from_user(&cmd_head.data[GTP_ADDR_LENGTH],
- &buff[CMD_HEAD_LENGTH], cmd_head.data_len);
- if (ret)
- GTP_DEBUG("copy_from_user failed.");
+ &userbuf[CMD_HEAD_LENGTH], cmd_head.data_len);
+ if (ret) {
+ pr_debug("copy_from_user failed.");
+ goto exit;
+ }
if (cmd_head.data[GTP_ADDR_LENGTH]) {
- GTP_DEBUG("gtp enter rawdiff.");
+ pr_debug("gtp enter rawdiff.");
ts->gtp_rawdiff_mode = true;
} else {
ts->gtp_rawdiff_mode = false;
- GTP_DEBUG("gtp leave rawdiff.");
+ pr_debug("gtp leave rawdiff.");
}
ret = CMD_HEAD_LENGTH;
goto exit;
- }
-#ifdef UPDATE_FUNCTIONS
- else if (cmd_head.wr == 11) { /* Enter update mode! */
- if (FAIL == gup_enter_update_mode(gt_client)) {
+ } else if (cmd_head.wr == GTP_RW_ENTER_UPDATE_MODE) {
+ /* Enter update mode! */
+ if (gup_enter_update_mode(gt_client) == FAIL) {
ret = -EBUSY;
goto exit;
}
- } else if (cmd_head.wr == 13) { /* Leave update mode! */
- gup_leave_update_mode();
- } else if (cmd_head.wr == 15) { /* Update firmware! */
+ } else if (cmd_head.wr == GTP_RW_LEAVE_UPDATE_MODE) {
+ /* Leave update mode! */
+ gup_leave_update_mode(gt_client);
+ } else if (cmd_head.wr == GTP_RW_UPDATE_FW) {
+ /* Update firmware! */
show_len = 0;
total_len = 0;
- if (cmd_head.data_len + 1 > DATA_LENGTH) {
- pr_err("<<-GTP->> data len %d > data buff %d, rejected!\n",
- cmd_head.data_len + 1, DATA_LENGTH);
+ if (cmd_head.data_len + 1 > data_length) {
+ dev_err(>_client->dev, "data len %d > data buff %d, rejected!\n",
+ cmd_head.data_len + 1, data_length);
ret = -EINVAL;
goto exit;
}
memset(cmd_head.data, 0, cmd_head.data_len + 1);
- memcpy(cmd_head.data, &buff[CMD_HEAD_LENGTH],
+ memcpy(cmd_head.data, &userbuf[CMD_HEAD_LENGTH],
cmd_head.data_len);
- if (FAIL == gup_update_proc((void *)cmd_head.data)) {
+ if (gup_update_proc((void *)cmd_head.data) == FAIL) {
ret = -EBUSY;
goto exit;
}
}
-#endif
ret = CMD_HEAD_LENGTH;
exit:
@@ -511,95 +471,130 @@
Function:
Goodix tool read function.
Input:
- standard proc read function param.
+ standard seq file read function param.
Output:
Return read length.
********************************************************/
-static s32 goodix_tool_read(char *page, char **start, off_t off, int count,
- int *eof, void *data)
+static s32 goodix_tool_read(struct file *file, char __user *user_buf,
+ size_t count, loff_t *ppos)
{
+ u16 data_len = 0;
s32 ret;
- GTP_DEBUG_FUNC();
+ u8 buf[32];
mutex_lock(&lock);
- if (cmd_head.wr % 2) {
- pr_err("<< [READ]command head wrong\n");
+ if (cmd_head.wr & 0x1) {
+ dev_err(>_client->dev, "command head wrong\n");
ret = -EINVAL;
goto exit;
- } else if (!cmd_head.wr) {
- u16 len = 0;
- s16 data_len = 0;
- u16 loc = 0;
+ }
- if (cmd_head.flag == 1) {
- if (FAIL == comfirm()) {
- GTP_ERROR("[READ]Comfirm fail!");
+ switch (cmd_head.wr) {
+ case GTP_RW_READ:
+ if (cmd_head.flag == GTP_NEED_FLAG) {
+ if (comfirm() == FAIL) {
+ dev_err(>_client->dev, "Comfirm fail!");
ret = -EINVAL;
goto exit;
}
- } else if (cmd_head.flag == 2) {
+ } else if (cmd_head.flag == GTP_NEED_INTERRUPT) {
/* Need interrupt! */
}
memcpy(cmd_head.data, cmd_head.addr, cmd_head.addr_len);
- GTP_DEBUG("[CMD HEAD DATA] ADDR:0x%02x%02x.", cmd_head.data[0],
+ pr_debug("[CMD HEAD DATA] ADDR:0x%02x%02x.", cmd_head.data[0],
cmd_head.data[1]);
- GTP_DEBUG("[CMD HEAD ADDR] ADDR:0x%02x%02x.", cmd_head.addr[0],
+ pr_debug("[CMD HEAD ADDR] ADDR:0x%02x%02x.", cmd_head.addr[0],
cmd_head.addr[1]);
if (cmd_head.delay)
msleep(cmd_head.delay);
data_len = cmd_head.data_len;
- while (data_len > 0) {
- if (data_len > DATA_LENGTH)
- len = DATA_LENGTH;
- else
- len = data_len;
-
- data_len -= len;
-
- if (tool_i2c_read(cmd_head.data, len) <= 0) {
- GTP_ERROR("[READ]Read data failed!");
- ret = -EINVAL;
- goto exit;
- }
- memcpy(&page[loc], &cmd_head.data[GTP_ADDR_LENGTH],
- len);
- loc += len;
-
- GTP_DEBUG_ARRAY(&cmd_head.data[GTP_ADDR_LENGTH], len);
- GTP_DEBUG_ARRAY(page, len);
+ if (data_len <= 0 || (data_len > data_length)) {
+ dev_err(>_client->dev, "Invalid data length %d\n",
+ data_len);
+ ret = -EINVAL;
+ goto exit;
}
- } else if (cmd_head.wr == 2) {
- /* memcpy(page, "gt8", cmd_head.data_len);
- memcpy(page, "GT818", 5);
- page[5] = 0; */
+ if (data_len > count)
+ data_len = count;
- GTP_DEBUG("Return ic type:%s len:%d.", page,
- (s32)cmd_head.data_len);
- ret = cmd_head.data_len;
- goto exit;
- /* return sizeof(IC_TYPE_NAME); */
- } else if (cmd_head.wr == 4) {
- page[0] = show_len >> 8;
- page[1] = show_len & 0xff;
- page[2] = total_len >> 8;
- page[3] = total_len & 0xff;
- } else if (6 == cmd_head.wr) {
- /* Read error code! */
- } else if (8 == cmd_head.wr) { /*Read driver version */
- /* memcpy(page, GTP_DRIVER_VERSION,
- strlen(GTP_DRIVER_VERSION)); */
- s32 tmp_len;
- tmp_len = strlen(GTP_DRIVER_VERSION);
- memcpy(page, GTP_DRIVER_VERSION, tmp_len);
- page[tmp_len] = 0;
+ if (tool_i2c_read(cmd_head.data, data_len) <= 0) {
+ dev_err(>_client->dev, "Read data failed!\n");
+ ret = -EIO;
+ goto exit;
+ }
+ ret = simple_read_from_buffer(user_buf, count, ppos,
+ &cmd_head.data[GTP_ADDR_LENGTH], data_len);
+ break;
+ case GTP_RW_FILL_INFO:
+ ret = fill_update_info(user_buf, count, ppos);
+ break;
+ case GTP_RW_READ_VERSION:
+ /* Read driver version */
+ data_len = scnprintf(buf, sizeof(buf), "%s\n",
+ GTP_DRIVER_VERSION);
+ ret = simple_read_from_buffer(user_buf, count, ppos,
+ buf, data_len);
+ break;
+ default:
+ ret = -EINVAL;
+ break;
}
- ret = cmd_head.data_len;
exit:
mutex_unlock(&lock);
return ret;
}
+
+static const struct file_operations goodix_proc_fops = {
+ .write = goodix_tool_write,
+ .read = goodix_tool_read,
+ .open = simple_open,
+ .owner = THIS_MODULE,
+};
+
+s32 init_wr_node(struct i2c_client *client)
+{
+ u8 i;
+
+ gt_client = client;
+ memset(&cmd_head, 0, sizeof(cmd_head));
+ cmd_head.data = NULL;
+
+ i = GTP_I2C_RETRY_5;
+ while ((!cmd_head.data) && i) {
+ cmd_head.data = devm_kzalloc(&client->dev,
+ i * DATA_LENGTH_UINT, GFP_KERNEL);
+ if (cmd_head.data)
+ break;
+ i--;
+ }
+ if (i) {
+ data_length = i * DATA_LENGTH_UINT;
+ dev_dbg(&client->dev, "Applied memory size:%d.", data_length);
+ } else {
+ dev_err(&client->dev, "Apply for memory failed.");
+ return FAIL;
+ }
+
+ cmd_head.addr_len = 2;
+ cmd_head.retry = GTP_I2C_RETRY_5;
+
+ register_i2c_func();
+
+ mutex_init(&lock);
+ tool_set_proc_name(procname);
+ goodix_proc_entry = proc_create(procname,
+ S_IWUSR | S_IWGRP | S_IRUSR | S_IRGRP,
+ goodix_proc_entry,
+ &goodix_proc_fops);
+ if (goodix_proc_entry == NULL) {
+ dev_err(&client->dev, "Couldn't create proc entry!");
+ return FAIL;
+ }
+
+ return SUCCESS;
+}
diff --git a/drivers/input/touchscreen/gt9xx/gt9xx.c b/drivers/input/touchscreen/gt9xx/gt9xx.c
index 6d4c638..912d87c 100644
--- a/drivers/input/touchscreen/gt9xx/gt9xx.c
+++ b/drivers/input/touchscreen/gt9xx/gt9xx.c
@@ -1,6 +1,6 @@
/* drivers/input/touchscreen/gt9xx.c
*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* Linux Foundation chooses to take subject only to the GPLv2 license
* terms, and distributes only under these terms.
@@ -47,17 +47,16 @@
#include "gt9xx.h"
#include <linux/of_gpio.h>
-
+#include <linux/irq.h>
+#include <linux/module.h>
#include <linux/input/mt.h>
+#include <linux/debugfs.h>
#define GOODIX_DEV_NAME "Goodix-CTP"
#define CFG_MAX_TOUCH_POINTS 5
#define GOODIX_COORDS_ARR_SIZE 4
#define MAX_BUTTONS 4
-/* HIGH: 0x28/0x29, LOW: 0xBA/0xBB */
-#define GTP_I2C_ADDRESS_HIGH 0x14
-#define GTP_I2C_ADDRESS_LOW 0x5D
#define CFG_GROUP_LEN(p_cfg_grp) (sizeof(p_cfg_grp) / sizeof(p_cfg_grp[0]))
#define GOODIX_VTG_MIN_UV 2600000
@@ -82,17 +81,8 @@
static const u16 touch_key_array[] = {KEY_MENU, KEY_HOMEPAGE, KEY_BACK};
#define GTP_MAX_KEY_NUM (sizeof(touch_key_array)/sizeof(touch_key_array[0]))
-#if GTP_DEBUG_ON
-static const int key_codes[] = {
- KEY_HOME, KEY_BACK, KEY_MENU, KEY_SEARCH
-};
-static const char *const key_names[] = {
- "Key_Home", "Key_Back", "Key_Menu", "Key_Search"
-};
-#endif
#endif
-static void gtp_reset_guitar(struct goodix_ts_data *ts, int ms);
static void gtp_int_sync(struct goodix_ts_data *ts, int ms);
static int gtp_i2c_test(struct i2c_client *client);
static int goodix_power_off(struct goodix_ts_data *ts);
@@ -100,7 +90,9 @@
#if defined(CONFIG_FB)
static int fb_notifier_callback(struct notifier_block *self,
- unsigned long event, void *data);
+ unsigned long event, void *data);
+static int goodix_ts_suspend(struct device *dev);
+static int goodix_ts_resume(struct device *dev);
#elif defined(CONFIG_HAS_EARLYSUSPEND)
static void goodix_ts_early_suspend(struct early_suspend *h);
static void goodix_ts_late_resume(struct early_suspend *h);
@@ -111,7 +103,6 @@
static struct workqueue_struct *gtp_esd_check_workqueue;
static void gtp_esd_check_func(struct work_struct *work);
static int gtp_init_ext_watchdog(struct i2c_client *client);
-struct i2c_client *i2c_connect_client;
#endif
#if GTP_SLIDE_WAKEUP
@@ -126,6 +117,12 @@
bool init_done;
static u8 chip_gt9xxs; /* true if ic is gt9xxs, like gt915s */
u8 grp_cfg_version;
+struct i2c_client *i2c_connect_client;
+
+#define GTP_DEBUGFS_DIR "ts_debug"
+#define GTP_DEBUGFS_FILE_SUSPEND "suspend"
+#define GTP_DEBUGFS_FILE_DATA "data"
+#define GTP_DEBUGFS_FILE_ADDR "addr"
/*******************************************************
Function:
@@ -142,27 +139,30 @@
int gtp_i2c_read(struct i2c_client *client, u8 *buf, int len)
{
struct goodix_ts_data *ts = i2c_get_clientdata(client);
- struct i2c_msg msgs[2];
int ret = -EIO;
- int retries = 0;
+ u8 retries;
+ struct i2c_msg msgs[2] = {
+ {
+ .flags = !I2C_M_RD,
+ .addr = client->addr,
+ .len = GTP_ADDR_LENGTH,
+ .buf = &buf[0],
+ },
+ {
+ .flags = I2C_M_RD,
+ .addr = client->addr,
+ .len = len - GTP_ADDR_LENGTH,
+ .buf = &buf[GTP_ADDR_LENGTH],
+ },
+ };
- msgs[0].flags = !I2C_M_RD;
- msgs[0].addr = client->addr;
- msgs[0].len = GTP_ADDR_LENGTH;
- msgs[0].buf = &buf[0];
-
- msgs[1].flags = I2C_M_RD;
- msgs[1].addr = client->addr;
- msgs[1].len = len - GTP_ADDR_LENGTH;
- msgs[1].buf = &buf[GTP_ADDR_LENGTH];
-
- while (retries < 5) {
+ for (retries = 0; retries < GTP_I2C_RETRY_5; retries++) {
ret = i2c_transfer(client->adapter, msgs, 2);
if (ret == 2)
break;
- retries++;
+ dev_err(&client->dev, "I2C retry: %d\n", retries + 1);
}
- if (retries >= 5) {
+ if (retries == GTP_I2C_RETRY_5) {
#if GTP_SLIDE_WAKEUP
/* reset chip would quit doze mode */
if (DOZE_ENABLED == doze_status)
@@ -172,7 +172,7 @@
gtp_reset_guitar(ts, 10);
else
dev_warn(&client->dev,
- "<GTP> gtp_reset_guitar exit init_done=%d:\n",
+ "gtp_reset_guitar exit init_done=%d:\n",
init_done);
}
return ret;
@@ -193,22 +193,22 @@
int gtp_i2c_write(struct i2c_client *client, u8 *buf, int len)
{
struct goodix_ts_data *ts = i2c_get_clientdata(client);
- struct i2c_msg msg;
int ret = -EIO;
- int retries = 0;
+ u8 retries;
+ struct i2c_msg msg = {
+ .flags = !I2C_M_RD,
+ .addr = client->addr,
+ .len = len,
+ .buf = buf,
+ };
- msg.flags = !I2C_M_RD;
- msg.addr = client->addr;
- msg.len = len;
- msg.buf = buf;
-
- while (retries < 5) {
+ for (retries = 0; retries < GTP_I2C_RETRY_5; retries++) {
ret = i2c_transfer(client->adapter, &msg, 1);
if (ret == 1)
break;
- retries++;
+ dev_err(&client->dev, "I2C retry: %d\n", retries + 1);
}
- if ((retries >= 5)) {
+ if ((retries == GTP_I2C_RETRY_5)) {
#if GTP_SLIDE_WAKEUP
if (DOZE_ENABLED == doze_status)
return ret;
@@ -217,11 +217,12 @@
gtp_reset_guitar(ts, 10);
else
dev_warn(&client->dev,
- "<GTP> gtp_reset_guitar exit init_done=%d:\n",
+ "gtp_reset_guitar exit init_done=%d:\n",
init_done);
}
return ret;
}
+
/*******************************************************
Function:
i2c read twice, compare the results
@@ -241,7 +242,7 @@
u8 confirm_buf[16] = {0};
u8 retry = 0;
- while (retry++ < 3) {
+ while (retry++ < GTP_I2C_RETRY_3) {
memset(buf, 0xAA, 16);
buf[0] = (u8)(addr >> 8);
buf[1] = (u8)(addr & 0xFF);
@@ -255,7 +256,7 @@
if (!memcmp(buf, confirm_buf, len + 2))
break;
}
- if (retry < 3) {
+ if (retry < GTP_I2C_RETRY_3) {
memcpy(rxbuf, confirm_buf + 2, len);
return SUCCESS;
} else {
@@ -275,7 +276,7 @@
result of i2c write operation.
> 0: succeed, otherwise: failed
*********************************************************/
-static int gtp_send_cfg(struct goodix_ts_data *ts)
+int gtp_send_cfg(struct goodix_ts_data *ts)
{
int ret;
#if GTP_DRIVER_SEND_CFG
@@ -286,7 +287,7 @@
"Ic fixed config, no config sent!");
ret = 2;
} else {
- for (retry = 0; retry < 5; retry++) {
+ for (retry = 0; retry < GTP_I2C_RETRY_5; retry++) {
ret = gtp_i2c_write(ts->client,
ts->config_data,
GTP_CONFIG_MAX_LENGTH + GTP_ADDR_LENGTH);
@@ -498,31 +499,19 @@
memcpy(&point_data[12], &buf[2], 8 * (touch_num - 1));
}
-#if GTP_HAVE_TOUCH_KEY
+
key_value = point_data[3 + 8 * touch_num];
if (key_value || pre_key) {
- for (i = 0; i < GTP_MAX_KEY_NUM; i++) {
-
-#if GTP_DEBUG_ON
- for (ret = 0; ret < 4; ++ret) {
- if (key_codes[ret] == touch_key_array[i]) {
- GTP_DEBUG("Key: %s %s",
- key_names[ret],
- (key_value & (0x01 << i))
- ? "Down" : "Up");
- break;
- }
- }
-#endif
-
+ for (i = 0; i < ts->pdata->num_button; i++) {
input_report_key(ts->input_dev,
- touch_key_array[i], key_value & (0x01<<i));
+ ts->pdata->button_map[i],
+ key_value & (0x01<<i));
}
touch_num = 0;
pre_touch = 0;
}
-#endif
+
pre_key = key_value;
#if GTP_WITH_PEN
@@ -618,26 +607,6 @@
/*******************************************************
Function:
- Timer interrupt service routine for polling mode.
-Input:
- timer: timer struct pointer
-Output:
- Timer work mode.
- HRTIMER_NORESTART: no restart mode
-*********************************************************/
-static enum hrtimer_restart goodix_ts_timer_handler(struct hrtimer *timer)
-{
- struct goodix_ts_data
- *ts = container_of(timer, struct goodix_ts_data, timer);
-
- queue_work(ts->goodix_wq, &ts->work);
- hrtimer_start(&ts->timer, ktime_set(0, (GTP_POLL_TIME + 6) * 1000000),
- HRTIMER_MODE_REL);
- return HRTIMER_NORESTART;
-}
-
-/*******************************************************
-Function:
External interrupt service routine for interrupt mode.
Input:
irq: interrupt number.
@@ -679,7 +648,7 @@
Output:
None.
*******************************************************/
-static void gtp_reset_guitar(struct goodix_ts_data *ts, int ms)
+void gtp_reset_guitar(struct goodix_ts_data *ts, int ms)
{
/* This reset sequence will selcet I2C slave address */
gpio_direction_output(ts->pdata->reset_gpio, 0);
@@ -726,7 +695,7 @@
#endif
gtp_irq_disable(ts);
- while (retry++ < 5) {
+ while (retry++ < GTP_I2C_RETRY_3) {
i2c_control_buf[0] = 0x80;
i2c_control_buf[1] = 0x46;
ret = gtp_i2c_write(ts->client, i2c_control_buf, 3);
@@ -786,7 +755,7 @@
return 0;
} else {
usleep(5000);
- while (retry++ < 5) {
+ while (retry++ < GTP_I2C_RETRY_5) {
ret = gtp_i2c_write(ts->client, i2c_control_buf, 3);
if (ret == 1) {
dev_dbg(&ts->client->dev, "GTP enter sleep!");
@@ -1074,7 +1043,7 @@
ret = gtp_i2c_read(client, buf, sizeof(buf));
if (ret < 0) {
- dev_err(&client->dev, "GTP read version failed.\n");
+ dev_err(&client->dev, "GTP read product_id failed.\n");
return -EIO;
}
@@ -1109,7 +1078,7 @@
static int gtp_i2c_test(struct i2c_client *client)
{
u8 buf[3] = { GTP_REG_CONFIG_DATA >> 8, GTP_REG_CONFIG_DATA & 0xff };
- int retry = 5;
+ int retry = GTP_I2C_RETRY_5;
int ret = -EIO;
while (retry--) {
@@ -1214,7 +1183,7 @@
*******************************************************/
static int gtp_request_irq(struct goodix_ts_data *ts)
{
- int ret;
+ int ret = 0;
const u8 irq_table[] = GTP_IRQ_TAB;
ret = request_threaded_irq(ts->client->irq, NULL,
@@ -1222,21 +1191,12 @@
irq_table[ts->int_trigger_type],
ts->client->name, ts);
if (ret) {
- dev_err(&ts->client->dev, "Request IRQ failed!ERRNO:%d.\n",
- ret);
- gpio_direction_input(ts->pdata->irq_gpio);
-
- hrtimer_init(&ts->timer, CLOCK_MONOTONIC,
- HRTIMER_MODE_REL);
- ts->timer.function = goodix_ts_timer_handler;
- hrtimer_start(&ts->timer, ktime_set(1, 0),
- HRTIMER_MODE_REL);
ts->use_irq = false;
return ret;
} else {
gtp_irq_disable(ts);
ts->use_irq = true;
- return 0;
+ return ret;
}
}
@@ -1270,12 +1230,12 @@
__set_bit(INPUT_PROP_DIRECT, ts->input_dev->propbit);
input_mt_init_slots(ts->input_dev, 10);/* in case of "out of memory" */
-#if GTP_HAVE_TOUCH_KEY
- for (index = 0; index < GTP_MAX_KEY_NUM; index++) {
+
+ for (index = 0; index < ts->pdata->num_button; index++) {
input_set_capability(ts->input_dev,
- EV_KEY, touch_key_array[index]);
+ EV_KEY, ts->pdata->button_map[index]);
}
-#endif
+
#if GTP_SLIDE_WAKEUP
input_set_capability(ts->input_dev, EV_KEY, KEY_POWER);
@@ -1570,12 +1530,62 @@
return size;
}
+static ssize_t gtp_fw_upgrade_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct goodix_ts_data *ts = dev_get_drvdata(dev);
+ return snprintf(buf, 2, "%d\n", ts->fw_loading);
+}
+
+static ssize_t gtp_fw_upgrade_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t size)
+{
+ struct goodix_ts_data *ts = dev_get_drvdata(dev);
+ unsigned long val;
+ int ret;
+
+ if (size > 2)
+ return -EINVAL;
+
+ ret = kstrtoul(buf, 10, &val);
+ if (ret != 0)
+ return ret;
+
+ if (ts->gtp_is_suspend) {
+ dev_err(&ts->client->dev,
+ "Can't start fw upgrade. Device is in suspend state.");
+ return -EBUSY;
+ }
+
+ mutex_lock(&ts->input_dev->mutex);
+ if (!ts->fw_loading && val) {
+ disable_irq(ts->client->irq);
+ ts->fw_loading = true;
+ if (config_enabled(CONFIG_GT9XX_TOUCHPANEL_UPDATE)) {
+ ret = gup_update_proc(NULL);
+ if (ret == FAIL)
+ dev_err(&ts->client->dev,
+ "Fail to update GTP firmware.\n");
+ }
+ ts->fw_loading = false;
+ enable_irq(ts->client->irq);
+ }
+ mutex_unlock(&ts->input_dev->mutex);
+
+ return size;
+}
+
static DEVICE_ATTR(fw_name, (S_IRUGO | S_IWUSR | S_IWGRP),
gtp_fw_name_show,
gtp_fw_name_store);
+static DEVICE_ATTR(fw_upgrade, (S_IRUGO | S_IWUSR | S_IWGRP),
+ gtp_fw_upgrade_show,
+ gtp_fw_upgrade_store);
static struct attribute *gtp_attrs[] = {
&dev_attr_fw_name.attr,
+ &dev_attr_fw_upgrade.attr,
NULL
};
@@ -1583,6 +1593,154 @@
.attrs = gtp_attrs,
};
+static int gtp_debug_addr_is_valid(u16 addr)
+{
+ if (addr < GTP_VALID_ADDR_START || addr > GTP_VALID_ADDR_END) {
+ pr_err("GTP reg address is invalid: 0x%x\n", addr);
+ return false;
+ }
+
+ return true;
+}
+
+static int gtp_debug_data_set(void *_data, u64 val)
+{
+ struct goodix_ts_data *ts = _data;
+
+ mutex_lock(&ts->input_dev->mutex);
+ if (gtp_debug_addr_is_valid(ts->addr))
+ dev_err(&ts->client->dev,
+ "Writing to GTP registers not supported.\n");
+ mutex_unlock(&ts->input_dev->mutex);
+
+ return 0;
+}
+
+static int gtp_debug_data_get(void *_data, u64 *val)
+{
+ struct goodix_ts_data *ts = _data;
+ int ret;
+ u8 buf[3] = {0};
+
+ mutex_lock(&ts->input_dev->mutex);
+ buf[0] = ts->addr >> 8;
+ buf[1] = ts->addr & 0x00ff;
+
+ if (gtp_debug_addr_is_valid(ts->addr)) {
+ ret = gtp_i2c_read(ts->client, buf, 3);
+ if (ret < 0)
+ dev_err(&ts->client->dev,
+ "GTP read register 0x%x failed (%d)\n",
+ ts->addr, ret);
+ else
+ *val = buf[2];
+ }
+ mutex_unlock(&ts->input_dev->mutex);
+
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(debug_data_fops, gtp_debug_data_get,
+ gtp_debug_data_set, "%llx\n");
+
+static int gtp_debug_addr_set(void *_data, u64 val)
+{
+ struct goodix_ts_data *ts = _data;
+
+ if (gtp_debug_addr_is_valid(val)) {
+ mutex_lock(&ts->input_dev->mutex);
+ ts->addr = val;
+ mutex_unlock(&ts->input_dev->mutex);
+ }
+
+ return 0;
+}
+
+static int gtp_debug_addr_get(void *_data, u64 *val)
+{
+ struct goodix_ts_data *ts = _data;
+
+ mutex_lock(&ts->input_dev->mutex);
+ if (gtp_debug_addr_is_valid(ts->addr))
+ *val = ts->addr;
+ mutex_unlock(&ts->input_dev->mutex);
+
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(debug_addr_fops, gtp_debug_addr_get,
+ gtp_debug_addr_set, "%llx\n");
+
+static int gtp_debug_suspend_set(void *_data, u64 val)
+{
+ struct goodix_ts_data *ts = _data;
+
+ mutex_lock(&ts->input_dev->mutex);
+ if (val)
+ goodix_ts_suspend(&ts->client->dev);
+ else
+ goodix_ts_resume(&ts->client->dev);
+ mutex_unlock(&ts->input_dev->mutex);
+
+ return 0;
+}
+
+static int gtp_debug_suspend_get(void *_data, u64 *val)
+{
+ struct goodix_ts_data *ts = _data;
+
+ mutex_lock(&ts->input_dev->mutex);
+ *val = ts->gtp_is_suspend;
+ mutex_unlock(&ts->input_dev->mutex);
+
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(debug_suspend_fops, gtp_debug_suspend_get,
+ gtp_debug_suspend_set, "%lld\n");
+
+static int gtp_debugfs_init(struct goodix_ts_data *data)
+{
+ data->debug_base = debugfs_create_dir(GTP_DEBUGFS_DIR, NULL);
+
+ if (IS_ERR_OR_NULL(data->debug_base)) {
+ dev_err(&data->client->dev, "Failed to create debugfs dir.\n");
+ return -EINVAL;
+ }
+
+ if ((IS_ERR_OR_NULL(debugfs_create_file(GTP_DEBUGFS_FILE_SUSPEND,
+ S_IWUSR | S_IWGRP | S_IRUSR | S_IRGRP,
+ data->debug_base,
+ data,
+ &debug_suspend_fops)))) {
+ dev_err(&data->client->dev, "Failed to create suspend file.\n");
+ debugfs_remove_recursive(data->debug_base);
+ return -EINVAL;
+ }
+
+ if ((IS_ERR_OR_NULL(debugfs_create_file(GTP_DEBUGFS_FILE_DATA,
+ S_IWUSR | S_IWGRP | S_IRUSR | S_IRGRP,
+ data->debug_base,
+ data,
+ &debug_data_fops)))) {
+ dev_err(&data->client->dev, "Failed to create data file.\n");
+ debugfs_remove_recursive(data->debug_base);
+ return -EINVAL;
+ }
+
+ if ((IS_ERR_OR_NULL(debugfs_create_file(GTP_DEBUGFS_FILE_ADDR,
+ S_IWUSR | S_IWGRP | S_IRUSR | S_IRGRP,
+ data->debug_base,
+ data,
+ &debug_addr_fops)))) {
+ dev_err(&data->client->dev, "Failed to create addr file.\n");
+ debugfs_remove_recursive(data->debug_base);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static int goodix_ts_get_dt_coords(struct device *dev, char *name,
struct goodix_ts_platform_data *pdata)
{
@@ -1687,6 +1845,9 @@
dev_err(dev, "Unable to read key codes\n");
return rc;
}
+ pdata->num_button = num_buttons;
+ memcpy(pdata->button_map, button_map,
+ pdata->num_button * sizeof(u32));
}
read_cfg_num = 0;
@@ -1760,16 +1921,14 @@
return -EINVAL;
}
-#if GTP_ESD_PROTECT
i2c_connect_client = client;
-#endif
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
dev_err(&client->dev, "GTP I2C not supported\n");
return -ENODEV;
}
- ts = kzalloc(sizeof(*ts), GFP_KERNEL);
+ ts = devm_kzalloc(&client->dev, sizeof(*ts), GFP_KERNEL);
if (!ts) {
dev_err(&client->dev, "GTP not enough memory for ts\n");
return -ENOMEM;
@@ -1816,15 +1975,14 @@
strlcpy(ts->fw_name, pdata->fw_name,
strlen(pdata->fw_name) + 1);
-#if GTP_AUTO_UPDATE
- ret = gup_init_update_proc(ts);
- if (ret < 0) {
- dev_err(&client->dev,
- "GTP Create firmware update thread error.\n");
- goto exit_power_off;
+ if (config_enabled(CONFIG_GT9XX_TOUCHPANEL_UPDATE)) {
+ ret = gup_init_update_proc(ts);
+ if (ret < 0) {
+ dev_err(&client->dev,
+ "GTP Create firmware update thread error.\n");
+ goto exit_power_off;
+ }
}
-#endif
-
ret = gtp_init_panel(ts);
if (ret < 0) {
dev_err(&client->dev, "GTP init panel failed.\n");
@@ -1859,13 +2017,13 @@
INIT_WORK(&ts->work, goodix_ts_work_func);
ret = gtp_request_irq(ts);
- if (ret < 0)
- dev_info(&client->dev, "GTP works in polling mode.\n");
+ if (ret)
+ dev_info(&client->dev, "GTP request irq failed %d.\n", ret);
else
dev_info(&client->dev, "GTP works in interrupt mode.\n");
ret = gtp_read_fw_version(client, &version_info);
- if (ret != 0)
+ if (ret != 2)
dev_err(&client->dev, "GTP firmware version read failed.\n");
ret = gtp_check_product_id(client);
@@ -1876,7 +2034,7 @@
if (ts->use_irq)
gtp_irq_enable(ts);
-#if GTP_CREATE_WR_NODE
+#ifdef CONFIG_GT9XX_TOUCHPANEL_DEBUG
init_wr_node(client);
#endif
@@ -1889,6 +2047,13 @@
goto exit_free_irq;
}
+ ret = gtp_debugfs_init(ts);
+ if (ret != 0) {
+ dev_err(&client->dev, "Failed to create debugfs entries, %d\n",
+ ret);
+ goto exit_remove_sysfs;
+ }
+
init_done = true;
return 0;
exit_free_irq:
@@ -1913,6 +2078,8 @@
input_free_device(ts->input_dev);
ts->input_dev = NULL;
}
+exit_remove_sysfs:
+ sysfs_remove_group(&ts->input_dev->dev.kobj, >p_attr_grp);
exit_free_inputdev:
kfree(ts->config_data);
exit_power_off:
@@ -1926,7 +2093,6 @@
gpio_free(pdata->irq_gpio);
exit_free_client_data:
i2c_set_clientdata(client, NULL);
- kfree(ts);
return ret;
}
@@ -1953,7 +2119,7 @@
#endif
mutex_destroy(&ts->lock);
-#if GTP_CREATE_WR_NODE
+#ifdef CONFIG_GT9XX_TOUCHPANEL_DEBUG
uninit_wr_node();
#endif
@@ -1978,7 +2144,6 @@
input_free_device(ts->input_dev);
ts->input_dev = NULL;
}
- kfree(ts->config_data);
if (gpio_is_valid(ts->pdata->reset_gpio))
gpio_free(ts->pdata->reset_gpio);
@@ -1988,8 +2153,8 @@
goodix_power_off(ts);
goodix_power_deinit(ts);
i2c_set_clientdata(client, NULL);
- kfree(ts);
}
+ debugfs_remove_recursive(ts->debug_base);
return 0;
}
@@ -2008,9 +2173,21 @@
struct goodix_ts_data *ts = dev_get_drvdata(dev);
int ret = 0, i;
+ if (ts->gtp_is_suspend) {
+ dev_dbg(&ts->client->dev, "Already in suspend state.\n");
+ return 0;
+ }
+
mutex_lock(&ts->lock);
+
+ if (ts->fw_loading) {
+ dev_info(&ts->client->dev,
+ "Fw upgrade in progress, can't go to suspend.");
+ mutex_unlock(&ts->lock);
+ return 0;
+ }
+
#if GTP_ESD_PROTECT
- ts->gtp_is_suspend = 1;
gtp_esd_switch(ts->client, SWITCH_OFF);
#endif
@@ -2036,6 +2213,7 @@
*/
msleep(58);
mutex_unlock(&ts->lock);
+ ts->gtp_is_suspend = 1;
return ret;
}
@@ -2053,6 +2231,11 @@
struct goodix_ts_data *ts = dev_get_drvdata(dev);
int ret = 0;
+ if (!ts->gtp_is_suspend) {
+ dev_dbg(&ts->client->dev, "Already in awake state.\n");
+ return 0;
+ }
+
mutex_lock(&ts->lock);
ret = gtp_wakeup_sleep(ts);
@@ -2070,10 +2253,10 @@
ktime_set(1, 0), HRTIMER_MODE_REL);
#if GTP_ESD_PROTECT
- ts->gtp_is_suspend = 0;
gtp_esd_switch(ts->client, SWITCH_ON);
#endif
mutex_unlock(&ts->lock);
+ ts->gtp_is_suspend = 0;
return ret;
}
@@ -2190,13 +2373,13 @@
msg.len = 4;
msg.buf = opr_buffer;
- while (retries < 5) {
+ while (retries < GTP_I2C_RETRY_5) {
ret = i2c_transfer(client->adapter, &msg, 1);
if (ret == 1)
return 1;
retries++;
}
- if (retries >= 5)
+ if (retries == GTP_I2C_RETRY_5)
dev_err(&client->dev, "init external watchdog failed!");
return 0;
}
@@ -2212,7 +2395,7 @@
*******************************************************/
static void gtp_esd_check_func(struct work_struct *work)
{
- s32 i;
+ s32 retry;
s32 ret = -1;
struct goodix_ts_data *ts = NULL;
u8 test[4] = {0x80, 0x40};
@@ -2229,7 +2412,7 @@
return;
#endif
- for (i = 0; i < 3; i++) {
+ for (retry = 0; retry < GTP_I2C_RETRY_3; retry++) {
ret = gtp_i2c_read(ts->client, test, 4);
if ((ret < 0)) {
@@ -2238,7 +2421,7 @@
} else {
if ((test[2] == 0xAA) || (test[3] != 0xAA)) {
/* IC works abnormally..*/
- i = 3;
+ retry = GTP_I2C_RETRY_3;
break;
} else {
/* IC works normally, Write 0x8040 0xAA*/
@@ -2248,7 +2431,7 @@
}
}
}
- if (i >= 3) {
+ if (retry == GTP_I2C_RETRY_3) {
dev_err(&ts->client->dev,
"IC Working ABNORMALLY, Resetting Guitar...\n");
gtp_reset_guitar(ts, 50);
diff --git a/drivers/input/touchscreen/gt9xx/gt9xx.h b/drivers/input/touchscreen/gt9xx/gt9xx.h
index 1d31f2a..7a1af23 100644
--- a/drivers/input/touchscreen/gt9xx/gt9xx.h
+++ b/drivers/input/touchscreen/gt9xx/gt9xx.h
@@ -1,6 +1,6 @@
/* drivers/input/touchscreen/gt9xx.h
*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* Linux Foundation chooses to take subject only to the GPLv2 license
* terms, and distributes only under these terms.
@@ -25,18 +25,9 @@
#include <linux/kernel.h>
#include <linux/i2c.h>
-#include <linux/irq.h>
-#include <linux/input.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
#include <linux/delay.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
#include <linux/gpio.h>
-#include <linux/regulator/consumer.h>
-#include <linux/firmware.h>
-#include <linux/debugfs.h>
-#include <linux/mutex.h>
+#include <linux/uaccess.h>
#if defined(CONFIG_FB)
#include <linux/notifier.h>
@@ -46,6 +37,7 @@
#define GOODIX_SUSPEND_LEVEL 1
#endif
+#define MAX_BUTTONS 4
#define GOODIX_MAX_CFG_GROUP 6
#define GTP_FW_NAME_MAXSIZE 50
@@ -69,6 +61,8 @@
bool enable_power_off;
size_t config_data_len[GOODIX_MAX_CFG_GROUP];
u8 *config_data[GOODIX_MAX_CFG_GROUP];
+ u32 button_map[MAX_BUTTONS];
+ u8 num_button;
};
struct goodix_ts_data {
spinlock_t irq_lock;
@@ -79,10 +73,12 @@
struct workqueue_struct *goodix_wq;
struct work_struct work;
char fw_name[GTP_FW_NAME_MAXSIZE];
+ struct delayed_work goodix_update_work;
s32 irq_is_disabled;
s32 use_irq;
u16 abs_x_max;
u16 abs_y_max;
+ u16 addr;
u8 max_touch_num;
u8 int_trigger_type;
u8 green_wake_mode;
@@ -97,6 +93,7 @@
u8 fw_error;
bool power_on;
struct mutex lock;
+ bool fw_loading;
struct regulator *avdd;
struct regulator *vdd;
struct regulator *vcc_i2c;
@@ -105,6 +102,7 @@
#elif defined(CONFIG_HAS_EARLYSUSPEND)
struct early_suspend early_suspend;
#endif
+ struct dentry *debug_base;
};
extern u16 show_len;
@@ -115,14 +113,6 @@
#define GTP_CHANGE_X2Y 0
#define GTP_DRIVER_SEND_CFG 1
#define GTP_HAVE_TOUCH_KEY 1
-
-/* auto updated by .bin file as default */
-#define GTP_AUTO_UPDATE 0
-/* auto updated by head_fw_array in gt9xx_firmware.h,
- * function together with GTP_AUTO_UPDATE */
-#define GTP_HEADER_FW_UPDATE 0
-
-#define GTP_CREATE_WR_NODE 0
#define GTP_ESD_PROTECT 0
#define GTP_WITH_PEN 0
@@ -131,30 +121,14 @@
/* double-click wakeup, function together with GTP_SLIDE_WAKEUP */
#define GTP_DBL_CLK_WAKEUP 0
-#define GTP_DEBUG_ON 0
-#define GTP_DEBUG_ARRAY_ON 0
-#define GTP_DEBUG_FUNC_ON 0
-
-/*************************** PART2:TODO define *******************************/
-/* STEP_1(REQUIRED): Define Configuration Information Group(s) */
-/* Sensor_ID Map: */
-/* sensor_opt1 sensor_opt2 Sensor_ID
- * GND GND 0
- * VDDIO GND 1
- * NC GND 2
- * GND NC/300K 3
- * VDDIO NC/300K 4
- * NC NC/300K 5
-*/
-
-#define GTP_IRQ_TAB {\
+#define GTP_IRQ_TAB {\
IRQ_TYPE_EDGE_RISING,\
IRQ_TYPE_EDGE_FALLING,\
IRQ_TYPE_LEVEL_LOW,\
IRQ_TYPE_LEVEL_HIGH\
}
-/* STEP_3(optional): Specify your special config info if needed */
+
#define GTP_IRQ_TAB_RISING 0
#define GTP_IRQ_TAB_FALLING 1
#if GTP_CUSTOM_CFG
@@ -193,53 +167,61 @@
#define GTP_REG_FW_VERSION 0x8144
#define GTP_REG_PRODUCT_ID 0x8140
+#define GTP_I2C_RETRY_3 3
+#define GTP_I2C_RETRY_5 5
+#define GTP_I2C_RETRY_10 10
+
#define RESOLUTION_LOC 3
#define TRIGGER_LOC 8
+/* HIGH: 0x28/0x29, LOW: 0xBA/0xBB */
+#define GTP_I2C_ADDRESS_HIGH 0x14
+#define GTP_I2C_ADDRESS_LOW 0x5D
+#define GTP_VALID_ADDR_START 0x8040
+#define GTP_VALID_ADDR_END 0x8177
+
#define CFG_GROUP_LEN(p_cfg_grp) (sizeof(p_cfg_grp) / sizeof(p_cfg_grp[0]))
-/* Log define */
-#define GTP_DEBUG(fmt, arg...) do {\
- if (GTP_DEBUG_ON) {\
- pr_debug("<<-GTP-DEBUG->> [%d]"fmt"\n",\
- __LINE__, ##arg); } \
- } while (0)
-#define GTP_DEBUG_ARRAY(array, num) do {\
- s32 i; \
- u8 *a = array; \
- if (GTP_DEBUG_ARRAY_ON) {\
- pr_debug("<<-GTP-DEBUG-ARRAY->>\n");\
- for (i = 0; i < (num); i++) { \
- pr_debug("%02x ", (a)[i]);\
- if ((i + 1) % 10 == 0) { \
- pr_debug("\n");\
- } \
- } \
- pr_debug("\n");\
- } \
- } while (0)
+/* GTP CM_HEAD RW flags */
+#define GTP_RW_READ 0
+#define GTP_RW_WRITE 1
+#define GTP_RW_READ_IC_TYPE 2
+#define GTP_RW_WRITE_IC_TYPE 3
+#define GTP_RW_FILL_INFO 4
+#define GTP_RW_NO_WRITE 5
+#define GTP_RW_READ_ERROR 6
+#define GTP_RW_DISABLE_IRQ 7
+#define GTP_RW_READ_VERSION 8
+#define GTP_RW_ENABLE_IRQ 9
+#define GTP_RW_ENTER_UPDATE_MODE 11
+#define GTP_RW_LEAVE_UPDATE_MODE 13
+#define GTP_RW_UPDATE_FW 15
+#define GTP_RW_CHECK_RAWDIFF_MODE 17
-#define GTP_DEBUG_FUNC() do {\
- if (GTP_DEBUG_FUNC_ON)\
- pr_debug("<<-GTP-FUNC->> Func:%s@Line:%d\n",\
- __func__, __LINE__);\
- } while (0)
+/* GTP need flag or interrupt */
+#define GTP_NO_NEED 0
+#define GTP_NEED_FLAG 1
+#define GTP_NEED_INTERRUPT 2
-#define GTP_SWAP(x, y) do {\
- typeof(x) z = x;\
- x = y;\
- y = z;\
- } while (0)
/*****************************End of Part III********************************/
void gtp_esd_switch(struct i2c_client *client, int on);
-#if GTP_CREATE_WR_NODE
-extern s32 init_wr_node(struct i2c_client *client);
-extern void uninit_wr_node(void);
+int gtp_i2c_read_dbl_check(struct i2c_client *client, u16 addr,
+ u8 *rxbuf, int len);
+int gtp_send_cfg(struct goodix_ts_data *ts);
+void gtp_reset_guitar(struct goodix_ts_data *ts, int ms);
+void gtp_irq_disable(struct goodix_ts_data *ts);
+void gtp_irq_enable(struct goodix_ts_data *ts);
+
+#ifdef CONFIG_GT9XX_TOUCHPANEL_DEBUG
+s32 init_wr_node(struct i2c_client *client);
+void uninit_wr_node(void);
#endif
-#if GTP_AUTO_UPDATE
-extern u8 gup_init_update_proc(struct goodix_ts_data *ts);
-#endif
+u8 gup_init_update_proc(struct goodix_ts_data *ts);
+s32 gup_enter_update_mode(struct i2c_client *client);
+void gup_leave_update_mode(struct i2c_client *client);
+s32 gup_update_proc(void *dir);
+extern struct i2c_client *i2c_connect_client;
#endif /* _GOODIX_GT9XX_H_ */
diff --git a/drivers/input/touchscreen/gt9xx/gt9xx_update.c b/drivers/input/touchscreen/gt9xx/gt9xx_update.c
index cf83154..71e8a55 100644
--- a/drivers/input/touchscreen/gt9xx/gt9xx_update.c
+++ b/drivers/input/touchscreen/gt9xx/gt9xx_update.c
@@ -31,25 +31,19 @@
* 2. support firmware header array update.
* By Meta, 2013/03/11
*/
-#include <linux/kthread.h>
#include "gt9xx.h"
+#include <linux/firmware.h>
+#include <linux/workqueue.h>
+#include <linux/kernel.h>
-#if GTP_HEADER_FW_UPDATE
-#include <linux/namei.h>
-#include <linux/mount.h>
-#include "gt9xx_firmware.h"
-#endif
+#define FIRMWARE_NAME_LEN_MAX 256
#define GUP_REG_HW_INFO 0x4220
#define GUP_REG_FW_MSG 0x41E4
#define GUP_REG_PID_VID 0x8140
-#define GUP_SEARCH_FILE_TIMES 50
-#define UPDATE_FILE_PATH_2 "/data/_goodix_update_.bin"
-#define UPDATE_FILE_PATH_1 "/sdcard/_goodix_update_.bin"
-
-#define CONFIG_FILE_PATH_1 "/data/_goodix_config_.cfg"
-#define CONFIG_FILE_PATH_2 "/sdcard/_goodix_config_.cfg"
+#define GOODIX_FIRMWARE_FILE_NAME "_goodix_update_.bin"
+#define GOODIX_CONFIG_FILE_NAME "_goodix_config_.cfg"
#define FW_HEAD_LENGTH 14
#define FW_SECTION_LENGTH 0x2000
@@ -73,24 +67,22 @@
#define FAIL 0
#define SUCCESS 1
-#pragma pack(1)
-struct {
+struct st_fw_head {
u8 hw_info[4]; /* hardware info */
u8 pid[8]; /* product id */
u16 vid; /* version id */
-} st_fw_head;
-#pragma pack()
+} __packed;
-struct {
+struct st_update_msg {
u8 force_update;
u8 fw_flag;
- struct file *file;
- struct file *cfg_file;
- st_fw_head ic_fw_msg;
- mm_segment_t old_fs;
-} st_update_msg;
+ bool need_free;
+ u8 *fw_data;
+ u32 fw_len;
+ struct st_fw_head ic_fw_msg;
+};
-st_update_msg update_msg;
+static struct st_update_msg update_msg;
u16 show_len;
u16 total_len;
u8 got_file_flag;
@@ -107,25 +99,24 @@
numbers of i2c_msgs to transfer:
2: succeed, otherwise: failed
*********************************************************/
-s32 gup_i2c_read(struct i2c_client *client, u8 *buf, s32 len)
+static s32 gup_i2c_read(struct i2c_client *client, u8 *buf, s32 len)
{
- struct i2c_msg msgs[2];
s32 ret = -1;
- s32 retries = 0;
-
- GTP_DEBUG_FUNC();
-
- msgs[0].flags = !I2C_M_RD;
- msgs[0].addr = client->addr;
- msgs[0].len = GTP_ADDR_LENGTH;
- msgs[0].buf = &buf[0];
- /* msgs[0].scl_rate = 300 * 1000; (for Rockchip) */
-
- msgs[1].flags = I2C_M_RD;
- msgs[1].addr = client->addr;
- msgs[1].len = len - GTP_ADDR_LENGTH;
- msgs[1].buf = &buf[GTP_ADDR_LENGTH];
- /* msgs[1].scl_rate = 300 * 1000; */
+ u8 retries = 0;
+ struct i2c_msg msgs[2] = {
+ {
+ .flags = !I2C_M_RD,
+ .addr = client->addr,
+ .len = GTP_ADDR_LENGTH,
+ .buf = &buf[0],
+ },
+ {
+ .flags = I2C_M_RD,
+ .addr = client->addr,
+ .len = len - GTP_ADDR_LENGTH,
+ .buf = &buf[GTP_ADDR_LENGTH],
+ },
+ };
while (retries < 5) {
ret = i2c_transfer(client->adapter, msgs, 2);
@@ -134,6 +125,11 @@
retries++;
}
+ if (retries == 5) {
+ dev_err(&client->dev, "I2C read retry limit over.\n");
+ ret = -EIO;
+ }
+
return ret;
}
@@ -151,17 +147,14 @@
*********************************************************/
s32 gup_i2c_write(struct i2c_client *client, u8 *buf, s32 len)
{
- struct i2c_msg msg;
s32 ret = -1;
- s32 retries = 0;
-
- GTP_DEBUG_FUNC();
-
- msg.flags = !I2C_M_RD;
- msg.addr = client->addr;
- msg.len = len;
- msg.buf = buf;
- /* msg.scl_rate = 300 * 1000; (for Rockchip) */
+ u8 retries = 0;
+ struct i2c_msg msg = {
+ .flags = !I2C_M_RD,
+ .addr = client->addr,
+ .len = len,
+ .buf = buf,
+ };
while (retries < 5) {
ret = i2c_transfer(client->adapter, &msg, 1);
@@ -170,123 +163,105 @@
retries++;
}
+ if (retries == 5) {
+ dev_err(&client->dev, "I2C write retry limit over.\n");
+ ret = -EIO;
+ }
+
return ret;
}
static s32 gup_init_panel(struct goodix_ts_data *ts)
{
+ struct i2c_client *client = ts->client;
+ u8 *config_data;
s32 ret = 0;
s32 i = 0;
u8 check_sum = 0;
u8 opr_buf[16];
u8 sensor_id = 0;
- u8 cfg_info_group1[] = CTP_CFG_GROUP1;
- u8 cfg_info_group2[] = CTP_CFG_GROUP2;
- u8 cfg_info_group3[] = CTP_CFG_GROUP3;
- u8 cfg_info_group4[] = CTP_CFG_GROUP4;
- u8 cfg_info_group5[] = CTP_CFG_GROUP5;
- u8 cfg_info_group6[] = CTP_CFG_GROUP6;
- u8 *send_cfg_buf[] = {cfg_info_group1, cfg_info_group2, cfg_info_group3,
- cfg_info_group4, cfg_info_group5, cfg_info_group6};
- u8 cfg_info_len[] = { CFG_GROUP_LEN(cfg_info_group1),
- CFG_GROUP_LEN(cfg_info_group2),
- CFG_GROUP_LEN(cfg_info_group3),
- CFG_GROUP_LEN(cfg_info_group4),
- CFG_GROUP_LEN(cfg_info_group5),
- CFG_GROUP_LEN(cfg_info_group6)};
+ for (i = 0; i < GOODIX_MAX_CFG_GROUP; i++)
+ if (ts->pdata->config_data_len[i])
+ break;
- if ((!cfg_info_len[1]) && (!cfg_info_len[2]) &&
- (!cfg_info_len[3]) && (!cfg_info_len[4]) &&
- (!cfg_info_len[5])) {
+ if (i == GOODIX_MAX_CFG_GROUP) {
sensor_id = 0;
} else {
- ret = gtp_i2c_read_dbl_check(ts->client, GTP_REG_SENSOR_ID,
+ ret = gtp_i2c_read_dbl_check(client, GTP_REG_SENSOR_ID,
&sensor_id, 1);
if (SUCCESS == ret) {
- if (sensor_id >= 0x06) {
- GTP_ERROR("Invalid sensor_id(0x%02X), " \
- "No Config Sent!", sensor_id);
+ if (sensor_id >= GOODIX_MAX_CFG_GROUP) {
+ pr_err("Invalid sensor_id(0x%02X), No Config Sent!",
+ sensor_id);
return -EINVAL;
}
} else {
- GTP_ERROR("Failed to get sensor_id, No config sent!");
+ pr_err("Failed to get sensor_id, No config sent!");
return -EINVAL;
}
}
- GTP_DEBUG("Sensor_ID: %d", sensor_id);
+ pr_debug("Sensor ID selected: %d", sensor_id);
- ts->gtp_cfg_len = cfg_info_len[sensor_id];
-
- if (ts->gtp_cfg_len < GTP_CONFIG_MIN_LENGTH) {
- GTP_ERROR("Sensor_ID(%d) matches with NULL or INVALID CONFIG" \
- " GROUP! NO Config Sent! You need to check you header" \
- " file CFG_GROUP section!", sensor_id);
+ if (ts->pdata->config_data_len[sensor_id] < GTP_CONFIG_MIN_LENGTH ||
+ !ts->pdata->config_data_len[sensor_id]) {
+ pr_err("Sensor_ID(%d) matches with NULL or INVALID CONFIG GROUP!",
+ sensor_id);
return -EINVAL;
}
- ret = gtp_i2c_read_dbl_check(ts->client, GTP_REG_CONFIG_DATA,
+ ret = gtp_i2c_read_dbl_check(client, GTP_REG_CONFIG_DATA,
&opr_buf[0], 1);
-
if (ret == SUCCESS) {
- GTP_DEBUG("CFG_GROUP%d Config Version: %d, IC Config Version:" \
- " %d", sensor_id+1, send_cfg_buf[sensor_id][0], opr_buf[0]);
+ pr_debug("CFG_GROUP%d Config Version: %d, IC Config Version: %d",
+ sensor_id + 1,
+ ts->pdata->config_data[sensor_id][0],
+ opr_buf[0]);
- send_cfg_buf[sensor_id][0] = opr_buf[0];
+ ts->pdata->config_data[sensor_id][0] = opr_buf[0];
ts->fixed_cfg = 0;
- /*
- if (opr_buf[0] < 90) {
- grp_cfg_version = send_cfg_buf[sensor_id][0];
- *** backup group config version ***
- send_cfg_buf[sensor_id][0] = 0x00;
- ts->fixed_cfg = 0;
- } else { *** treated as fixed config, not send config ***
- GTP_INFO("Ic fixed config with config version(%d)",
- opr_buf[0]);
- ts->fixed_cfg = 1;
- }*/
} else {
- GTP_ERROR("Failed to get ic config version!No config sent!");
+ pr_err("Failed to get ic config version!No config sent!");
return -EINVAL;
}
- memset(&config[GTP_ADDR_LENGTH], 0, GTP_CONFIG_MAX_LENGTH);
- memcpy(&config[GTP_ADDR_LENGTH], send_cfg_buf[sensor_id],
- ts->gtp_cfg_len);
+ config_data = ts->pdata->config_data[sensor_id];
+ ts->config_data = ts->pdata->config_data[sensor_id];
+ ts->gtp_cfg_len = ts->pdata->config_data_len[sensor_id];
- GTP_DEBUG("X_MAX = %d, Y_MAX = %d, TRIGGER = 0x%02x",
+ pr_debug("X_MAX = %d, Y_MAX = %d, TRIGGER = 0x%02x",
ts->abs_x_max, ts->abs_y_max, ts->int_trigger_type);
- config[RESOLUTION_LOC] = (u8)GTP_MAX_WIDTH;
- config[RESOLUTION_LOC + 1] = (u8)(GTP_MAX_WIDTH>>8);
- config[RESOLUTION_LOC + 2] = (u8)GTP_MAX_HEIGHT;
- config[RESOLUTION_LOC + 3] = (u8)(GTP_MAX_HEIGHT>>8);
+ config_data[RESOLUTION_LOC] = (u8)GTP_MAX_WIDTH;
+ config_data[RESOLUTION_LOC + 1] = (u8)(GTP_MAX_WIDTH>>8);
+ config_data[RESOLUTION_LOC + 2] = (u8)GTP_MAX_HEIGHT;
+ config_data[RESOLUTION_LOC + 3] = (u8)(GTP_MAX_HEIGHT>>8);
if (GTP_INT_TRIGGER == 0) /* RISING */
- config[TRIGGER_LOC] &= 0xfe;
+ config_data[TRIGGER_LOC] &= 0xfe;
else if (GTP_INT_TRIGGER == 1) /* FALLING */
- config[TRIGGER_LOC] |= 0x01;
+ config_data[TRIGGER_LOC] |= 0x01;
check_sum = 0;
for (i = GTP_ADDR_LENGTH; i < ts->gtp_cfg_len; i++)
- check_sum += config[i];
+ check_sum += config_data[i];
- config[ts->gtp_cfg_len] = (~check_sum) + 1;
+ config_data[ts->gtp_cfg_len] = (~check_sum) + 1;
- GTP_DEBUG_FUNC();
- ret = gtp_send_cfg(ts->client);
+ ret = gtp_send_cfg(ts);
if (ret < 0)
- GTP_ERROR("Send config error.");
+ pr_err("Send config error.");
+ ts->config_data = NULL;
+ ts->gtp_cfg_len = 0;
msleep(20);
return 0;
}
-
static u8 gup_get_ic_msg(struct i2c_client *client, u16 addr, u8 *msg, s32 len)
{
- s32 i = 0;
+ u8 i = 0;
msg[0] = (addr >> 8) & 0xff;
msg[1] = addr & 0xff;
@@ -296,7 +271,7 @@
break;
if (i >= 5) {
- GTP_ERROR("Read data from 0x%02x%02x failed!", msg[0], msg[1]);
+ pr_err("Read data from 0x%02x%02x failed!", msg[0], msg[1]);
return FAIL;
}
@@ -305,19 +280,19 @@
static u8 gup_set_ic_msg(struct i2c_client *client, u16 addr, u8 val)
{
- s32 i = 0;
- u8 msg[3];
-
- msg[0] = (addr >> 8) & 0xff;
- msg[1] = addr & 0xff;
- msg[2] = val;
+ u8 i = 0;
+ u8 msg[3] = {
+ (addr >> 8) & 0xff,
+ addr & 0xff,
+ val,
+ };
for (i = 0; i < 5; i++)
if (gup_i2c_write(client, msg, GTP_ADDR_LENGTH + 1) > 0)
break;
if (i >= 5) {
- GTP_ERROR("Set data to 0x%02x%02x failed!", msg[0], msg[1]);
+ pr_err("Set data to 0x%02x%02x failed!", msg[0], msg[1]);
return FAIL;
}
@@ -335,7 +310,7 @@
ret = gtp_i2c_read_dbl_check(client, GUP_REG_HW_INFO,
&buf[GTP_ADDR_LENGTH], 4);
if (ret == FAIL) {
- GTP_ERROR("[get_ic_fw_msg]get hw_info failed,exit");
+ pr_err("get hw_info failed,exit");
return FAIL;
}
@@ -344,7 +319,7 @@
for (i = 0; i < 4; i++)
update_msg.ic_fw_msg.hw_info[i] = buf[GTP_ADDR_LENGTH + 3 - i];
- GTP_DEBUG("IC Hardware info:%02x%02x%02x%02x",
+ pr_debug("IC Hardware info:%02x%02x%02x%02x",
update_msg.ic_fw_msg.hw_info[0],
update_msg.ic_fw_msg.hw_info[1],
update_msg.ic_fw_msg.hw_info[2],
@@ -354,31 +329,31 @@
for (retry = 0; retry < 2; retry++) {
ret = gup_get_ic_msg(client, GUP_REG_FW_MSG, buf, 1);
if (ret == FAIL) {
- GTP_ERROR("Read firmware message fail.");
+ pr_err("Read firmware message fail.");
return ret;
}
update_msg.force_update = buf[GTP_ADDR_LENGTH];
if ((0xBE != update_msg.force_update) && (!retry)) {
- GTP_INFO("The check sum in ic is error.");
- GTP_INFO("The IC will be updated by force.");
+ pr_info("The check sum in ic is error.");
+ pr_info("The IC will be updated by force.");
continue;
}
break;
}
- GTP_DEBUG("IC force update flag:0x%x", update_msg.force_update);
+ pr_debug("IC force update flag:0x%x", update_msg.force_update);
/* step3:get pid & vid */
ret = gtp_i2c_read_dbl_check(client, GUP_REG_PID_VID,
&buf[GTP_ADDR_LENGTH], 6);
- if (FAIL == ret) {
- GTP_ERROR("[get_ic_fw_msg]get pid & vid failed,exit");
+ if (ret == FAIL) {
+ pr_err("get pid & vid failed,exit");
return FAIL;
}
memset(update_msg.ic_fw_msg.pid, 0, sizeof(update_msg.ic_fw_msg.pid));
memcpy(update_msg.ic_fw_msg.pid, &buf[GTP_ADDR_LENGTH], 4);
- GTP_DEBUG("IC Product id:%s", update_msg.ic_fw_msg.pid);
+ pr_debug("IC Product id:%s", update_msg.ic_fw_msg.pid);
/* GT9XX PID MAPPING
|-----FLASH-----RAM-----|
@@ -392,7 +367,7 @@
|------9110P----9111----|*/
if (update_msg.ic_fw_msg.pid[0] != 0) {
if (!memcmp(update_msg.ic_fw_msg.pid, "9111", 4)) {
- GTP_DEBUG("IC Mapping Product id:%s",
+ pr_debug("IC Mapping Product id:%s",
update_msg.ic_fw_msg.pid);
memcpy(update_msg.ic_fw_msg.pid, "9110P", 5);
}
@@ -400,7 +375,7 @@
update_msg.ic_fw_msg.vid = buf[GTP_ADDR_LENGTH + 4] +
(buf[GTP_ADDR_LENGTH + 5] << 8);
- GTP_DEBUG("IC version id:%04x", update_msg.ic_fw_msg.vid);
+ pr_debug("IC version id:%04x", update_msg.ic_fw_msg.vid);
return SUCCESS;
}
@@ -408,19 +383,21 @@
s32 gup_enter_update_mode(struct i2c_client *client)
{
s32 ret = -1;
- s32 retry = 0;
+ u8 retry = 0;
u8 rd_buf[3];
+ struct goodix_ts_data *ts = i2c_get_clientdata(client);
/* step1:RST output low last at least 2ms */
- GTP_GPIO_OUTPUT(GTP_RST_PORT, 0);
- msleep(20);
+ gpio_direction_output(ts->pdata->reset_gpio, 0);
+ usleep(20000);
/* step2:select I2C slave addr,INT:0--0xBA;1--0x28. */
- GTP_GPIO_OUTPUT(GTP_INT_PORT, (client->addr == 0x14));
+ gpio_direction_output(ts->pdata->irq_gpio,
+ (client->addr == GTP_I2C_ADDRESS_HIGH));
msleep(20);
/* step3:RST output high reset guitar */
- GTP_GPIO_OUTPUT(GTP_RST_PORT, 1);
+ gpio_direction_output(ts->pdata->reset_gpio, 1);
/* 20121211 modify start */
msleep(20);
@@ -428,25 +405,25 @@
/* step4:Hold ss51 & dsp */
ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
if (ret <= 0) {
- GTP_DEBUG("Hold ss51 & dsp I2C error,retry:%d", retry);
+ pr_debug("Hold ss51 & dsp I2C error,retry:%d", retry);
continue;
}
/* step5:Confirm hold */
ret = gup_get_ic_msg(client, _rRW_MISCTL__SWRST_B0_, rd_buf, 1);
if (ret <= 0) {
- GTP_DEBUG("Hold ss51 & dsp I2C error,retry:%d", retry);
+ pr_debug("Hold ss51 & dsp I2C error,retry:%d", retry);
continue;
}
if (rd_buf[GTP_ADDR_LENGTH] == 0x0C) {
- GTP_DEBUG("Hold ss51 & dsp confirm SUCCESS");
+ pr_debug("Hold ss51 & dsp confirm SUCCESS");
break;
}
- GTP_DEBUG("Hold ss51 & dsp confirm 0x4180 failed,value:%d",
+ pr_debug("Hold ss51 & dsp confirm 0x4180 failed,value:%d",
rd_buf[GTP_ADDR_LENGTH]);
}
if (retry >= 200) {
- GTP_ERROR("Enter update Hold ss51 failed.");
+ pr_err("Enter update Hold ss51 failed.");
return FAIL;
}
@@ -457,12 +434,13 @@
return ret;
}
-void gup_leave_update_mode(void)
+void gup_leave_update_mode(struct i2c_client *client)
{
- GTP_GPIO_AS_INT(GTP_INT_PORT);
+ struct goodix_ts_data *ts = i2c_get_clientdata(client);
- GTP_DEBUG("[leave_update_mode]reset chip.");
- gtp_reset_guitar(i2c_connect_client, 20);
+ gpio_direction_input(ts->pdata->irq_gpio);
+ pr_debug("reset chip.");
+ gtp_reset_guitar(ts, 20);
}
/* Get the correct nvram data
@@ -483,7 +461,8 @@
3. IC PID == 91XX || File PID == 91XX
*/
-static u8 gup_enter_update_judge(st_fw_head *fw_head)
+static u8 gup_enter_update_judge(struct i2c_client *client,
+ struct st_fw_head *fw_head)
{
u16 u16_tmp;
s32 i = 0;
@@ -491,38 +470,37 @@
u16_tmp = fw_head->vid;
fw_head->vid = (u16)(u16_tmp>>8) + (u16)(u16_tmp<<8);
- GTP_DEBUG("FILE HARDWARE INFO:%02x%02x%02x%02x", fw_head->hw_info[0],
+ pr_debug("FILE HARDWARE INFO:%02x%02x%02x%02x", fw_head->hw_info[0],
fw_head->hw_info[1], fw_head->hw_info[2], fw_head->hw_info[3]);
- TP_DEBUG("FILE PID:%s", fw_head->pid);
- TP_DEBUG("FILE VID:%04x", fw_head->vid);
+ pr_debug("FILE PID:%s", fw_head->pid);
+ pr_debug("FILE VID:%04x", fw_head->vid);
- TP_DEBUG("IC HARDWARE INFO:%02x%02x%02x%02x",
+ pr_debug("IC HARDWARE INFO:%02x%02x%02x%02x",
update_msg.ic_fw_msg.hw_info[0],
update_msg.ic_fw_msg.hw_info[1],
update_msg.ic_fw_msg.hw_info[2],
update_msg.ic_fw_msg.hw_info[3]);
- TP_DEBUG("IC PID:%s", update_msg.ic_fw_msg.pid);
- TP_DEBUG("IC VID:%04x", update_msg.ic_fw_msg.vid);
+ pr_debug("IC PID:%s", update_msg.ic_fw_msg.pid);
+ pr_debug("IC VID:%04x", update_msg.ic_fw_msg.vid);
/* First two conditions */
if (!memcmp(fw_head->hw_info, update_msg.ic_fw_msg.hw_info,
sizeof(update_msg.ic_fw_msg.hw_info))) {
- GTP_DEBUG("Get the same hardware info.");
+ pr_debug("Get the same hardware info.");
if (update_msg.force_update != 0xBE) {
- GTP_INFO("FW chksum error,need enter update.");
+ pr_info("FW chksum error,need enter update.");
return SUCCESS;
}
/* 20130523 start */
if (strlen(update_msg.ic_fw_msg.pid) < 3) {
- GTP_INFO("Illegal IC pid, need enter update");
+ pr_info("Illegal IC pid, need enter update");
return SUCCESS;
} else {
for (i = 0; i < 3; i++) {
if ((update_msg.ic_fw_msg.pid[i] < 0x30) ||
(update_msg.ic_fw_msg.pid[i] > 0x39)) {
- GTP_INFO("Illegal IC pid, out of " \
- "bound, need enter update");
+ pr_info("Illegal IC pid, out of bound, need enter update");
return SUCCESS;
}
}
@@ -534,398 +512,243 @@
(!memcmp(update_msg.ic_fw_msg.pid, "91XX", 4)) ||
(!memcmp(fw_head->pid, "91XX", 4))) {
if (!memcmp(fw_head->pid, "91XX", 4))
- GTP_DEBUG("Force none same pid update mode.");
+ pr_debug("Force none same pid update mode.");
else
- GTP_DEBUG("Get the same pid.");
+ pr_debug("Get the same pid.");
/* The third condition */
if (fw_head->vid > update_msg.ic_fw_msg.vid) {
- GTP_INFO("Need enter update.");
+ pr_info("Need enter update.");
return SUCCESS;
}
- GTP_ERROR("Don't meet the third condition.");
- GTP_ERROR("File VID <= Ic VID, update aborted!");
+ pr_err("Don't meet the third condition.");
+ pr_err("File VID <= Ic VID, update aborted!");
} else {
- GTP_ERROR("File PID != Ic PID, update aborted!");
+ pr_err("File PID != Ic PID, update aborted!");
}
} else {
- GTP_ERROR("Different Hardware, update aborted!");
+ pr_err("Different Hardware, update aborted!");
}
return FAIL;
}
-static u8 ascii2hex(u8 a)
+static s8 gup_update_config(struct i2c_client *client,
+ const struct firmware *cfg)
{
- s8 value = 0;
-
- if (a >= '0' && a <= '9')
- value = a - '0';
- else if (a >= 'A' && a <= 'F')
- value = a - 'A' + 0x0A;
- else if (a >= 'a' && a <= 'f')
- value = a - 'a' + 0x0A;
- else
- value = 0xff;
-
- return value;
-}
-
-static s8 gup_update_config(struct i2c_client *client)
-{
- s32 file_len = 0;
s32 ret = 0;
s32 i = 0;
s32 file_cfg_len = 0;
- s32 chip_cfg_len = 0;
+ u32 chip_cfg_len = 0;
s32 count = 0;
u8 *buf;
- u8 *pre_buf;
u8 *file_config;
- /* u8 checksum = 0; */
u8 pid[8];
+ u8 high, low;
- if (update_msg.cfg_file == NULL) {
- GTP_ERROR("[update_cfg]No need to upgrade config!");
+ if (!cfg || !cfg->data) {
+ pr_err("No need to upgrade config!");
return FAIL;
}
- file_len = update_msg.cfg_file->f_op->llseek(update_msg.cfg_file,
- 0, SEEK_END);
ret = gup_get_ic_msg(client, GUP_REG_PID_VID, pid, 6);
if (ret == FAIL) {
- GTP_ERROR("[update_cfg]Read product id & version id fail.");
+ pr_err("Read product id & version id fail.");
return FAIL;
}
pid[5] = '\0';
- GTP_DEBUG("update cfg get pid:%s", &pid[GTP_ADDR_LENGTH]);
+ pr_debug("update cfg get pid:%s", &pid[GTP_ADDR_LENGTH]);
chip_cfg_len = 186;
if (!memcmp(&pid[GTP_ADDR_LENGTH], "968", 3) ||
- !memcmp(&pid[GTP_ADDR_LENGTH], "910", 3) ||
- !memcmp(&pid[GTP_ADDR_LENGTH], "960", 3)) {
+ !memcmp(&pid[GTP_ADDR_LENGTH], "910", 3) ||
+ !memcmp(&pid[GTP_ADDR_LENGTH], "960", 3)) {
chip_cfg_len = 228;
}
- GTP_DEBUG("[update_cfg]config file len:%d", file_len);
- GTP_DEBUG("[update_cfg]need config len:%d", chip_cfg_len);
- if ((file_len+5) < chip_cfg_len*5) {
- GTP_ERROR("Config length error");
+ pr_debug("config file ASCII len:%d", cfg->size);
+ pr_debug("need config binary len:%d", chip_cfg_len);
+ if ((cfg->size + 5) < chip_cfg_len * 5) {
+ pr_err("Config length error");
return -EINVAL;
}
- buf = kzalloc(file_len, GFP_KERNEL);
- pre_buf = kzalloc(file_len, GFP_KERNEL);
- file_config = kzalloc(chip_cfg_len + GTP_ADDR_LENGTH, GFP_KERNEL);
- update_msg.cfg_file->f_op->llseek(update_msg.cfg_file, 0, SEEK_SET);
-
- GTP_DEBUG("[update_cfg]Read config from file.");
- ret = update_msg.cfg_file->f_op->read(update_msg.cfg_file,
- (char *)pre_buf, file_len, &update_msg.cfg_file->f_pos);
- if (ret < 0) {
- GTP_ERROR("[update_cfg]Read config file failed.");
- goto update_cfg_file_failed;
+ buf = devm_kzalloc(&client->dev, cfg->size, GFP_KERNEL);
+ if (!buf) {
+ dev_err(&client->dev, "Memory allocation failed for buf.");
+ return -ENOMEM;
}
- GTP_DEBUG("[update_cfg]Delete illgal charactor.");
- for (i = 0, count = 0; i < file_len; i++) {
- if (pre_buf[i] == ' ' || pre_buf[i] == '\r'
- || pre_buf[i] == '\n')
+ file_config = devm_kzalloc(&client->dev, chip_cfg_len + GTP_ADDR_LENGTH,
+ GFP_KERNEL);
+ if (!file_config) {
+ dev_err(&client->dev, "Memory allocation failed.");
+ return -ENOMEM;
+ }
+
+ pr_debug("Delete illgal charactor.");
+ for (i = 0, count = 0; i < cfg->size; i++) {
+ if (cfg->data[i] == ' ' || cfg->data[i] == '\r'
+ || cfg->data[i] == '\n')
continue;
- buf[count++] = pre_buf[i];
+ buf[count++] = cfg->data[i];
}
- GTP_DEBUG("[update_cfg]Ascii to hex.");
+ pr_debug("Ascii to hex.");
file_config[0] = GTP_REG_CONFIG_DATA >> 8;
file_config[1] = GTP_REG_CONFIG_DATA & 0xff;
- for (i = 0, file_cfg_len = GTP_ADDR_LENGTH; i < count; i + = 5) {
- if ((buf[i] == '0') && ((buf[i+1] == 'x') ||
- (buf[i+1] == 'X'))) {
- u8 high, low;
- high = ascii2hex(buf[i+2]);
- low = ascii2hex(buf[i+3]);
+ for (i = 0, file_cfg_len = GTP_ADDR_LENGTH; i < count; i = i + 5) {
+ if ((buf[i] == '0') && ((buf[i + 1] == 'x') ||
+ (buf[i + 1] == 'X'))) {
+ ret = hex2bin(&high, &buf[i + 2], 1);
+ if (ret) {
+ pr_err("Failed to convert high address from hex2bin");
+ return ret;
+ }
+ ret = hex2bin(&low, &buf[i + 3], 1);
+ if (ret) {
+ pr_err("Failed to convert low address from hex2bin");
+ return ret;
+ }
if ((high == 0xFF) || (low == 0xFF)) {
ret = 0;
- GTP_ERROR("[update_cfg]Illegal config file.");
- goto update_cfg_file_failed;
+ pr_err("Illegal config file.");
+ return ret;
}
file_config[file_cfg_len++] = (high<<4) + low;
} else {
ret = 0;
- GTP_ERROR("[update_cfg]Illegal config file.");
- goto update_cfg_file_failed;
+ pr_err("Illegal config file.");
+ return ret;
}
}
- /* cal checksum */
- /* for(i=GTP_ADDR_LENGTH; i<chip_cfg_len; i++)
- checksum += file_config[i];
- file_config[chip_cfg_len] = (~checksum) + 1;
- file_config[chip_cfg_len+1] = 0x01; */
-
- GTP_DEBUG("config:");
- GTP_DEBUG_ARRAY(file_config+2, file_cfg_len);
-
i = 0;
while (i++ < 5) {
ret = gup_i2c_write(client, file_config, file_cfg_len);
if (ret > 0) {
- GTP_INFO("[update_cfg]Send config SUCCESS.");
+ pr_info("Send config SUCCESS.");
break;
}
- GTP_ERROR("[update_cfg]Send config i2c error.");
+ pr_err("Send config i2c error.");
}
-update_cfg_file_failed:
- kfree(pre_buf);
- kfree(buf);
- kfree(file_config);
return ret;
}
-#if GTP_HEADER_FW_UPDATE
-static u8 gup_check_fs_mounted(char *path_name)
+static s32 gup_get_firmware_file(struct i2c_client *client,
+ struct st_update_msg *msg, u8 *path)
{
- struct path root_path;
- struct path path;
- int err;
- err = kern_path("/", LOOKUP_FOLLOW, &root_path);
+ s32 ret;
+ const struct firmware *fw = NULL;
- if (err) {
- GTP_DEBUG("\"/\" NOT Mounted: %d", err);
- return FAIL;
- }
- err = kern_path(path_name, LOOKUP_FOLLOW, &path);
-
- if (err) {
- GTP_DEBUG("/data/ NOT Mounted: %d", err);
- return FAIL;
+ ret = request_firmware(&fw, path, &client->dev);
+ if (ret < 0) {
+ dev_info(&client->dev, "Cannot get firmware - %s (%d)\n",
+ path, ret);
+ return -EEXIST;
}
- return SUCCESS;
+ dev_dbg(&client->dev, "Config File: %s size=%d", path, fw->size);
+ msg->fw_data =
+ devm_kzalloc(&client->dev, fw->size, GFP_KERNEL);
+ if (!msg->fw_data) {
+ dev_err(&client->dev,
+ "Not enough memory for firmware data.");
+ release_firmware(fw);
+ return -ENOMEM;
+ }
- /* if (path.mnt->mnt_sb == root_path.mnt->mnt_sb)
- return FAIL;
- else
- return SUCCESS; */
+ memcpy(msg->fw_data, fw->data, fw->size);
+ msg->fw_len = fw->size;
+ msg->need_free = true;
+ release_firmware(fw);
+ return 0;
}
-#endif
-static u8 gup_check_update_file(struct i2c_client *client, st_fw_head *fw_head,
- u8 *path)
+static u8 gup_check_firmware_name(struct i2c_client *client,
+ u8 **path_p)
+{
+ u8 len;
+ u8 *fname;
+
+ if (!(*path_p)) {
+ *path_p = GOODIX_FIRMWARE_FILE_NAME;
+ return 0;
+ }
+
+ len = strnlen(*path_p, FIRMWARE_NAME_LEN_MAX);
+ if (len >= FIRMWARE_NAME_LEN_MAX) {
+ dev_err(&client->dev, "firmware name too long!");
+ return -EINVAL;
+ }
+
+ fname = strrchr(*path_p, '/');
+ if (fname) {
+ fname = fname + 1;
+ *path_p = fname;
+ }
+ return 0;
+}
+
+static u8 gup_check_update_file(struct i2c_client *client,
+ struct st_fw_head *fw_head, u8 *path)
{
s32 ret = 0;
s32 i = 0;
s32 fw_checksum = 0;
- u8 buf[FW_HEAD_LENGTH];
+ u16 temp;
+ const struct firmware *fw = NULL;
- if (path) {
- GTP_DEBUG("Update File path:%s, %d", path, strlen(path));
- update_msg.file = file_open(path, O_RDONLY, 0);
-
- if (IS_ERR(update_msg.file)) {
- GTP_ERROR("Open update file(%s) error!", path);
- return FAIL;
- }
- } else {
-#if GTP_HEADER_FW_UPDATE
- for (i = 0; i < (GUP_SEARCH_FILE_TIMES); i++) {
- GTP_DEBUG("Waiting for /data mounted [%d]", i);
-
- if (gup_check_fs_mounted("/data") == SUCCESS) {
- GTP_DEBUG("/data Mounted!");
- break;
- }
- msleep(3000);
- }
- if (i >= (GUP_SEARCH_FILE_TIMES)) {
- GTP_ERROR("Wait for /data mounted timeout!");
- return FAIL;
- }
-
- /* update config */
- update_msg.cfg_file = file_open(CONFIG_FILE_PATH_1,
- O_RDONLY, 0);
-
- if (IS_ERR(update_msg.cfg_file)) {
- GTP_DEBUG("%s is unavailable", CONFIG_FILE_PATH_1);
- } else {
- GTP_INFO("Update Config File: %s", CONFIG_FILE_PATH_1);
- ret = gup_update_config(client);
- if (ret <= 0)
- GTP_ERROR("Update config failed.");
- filp_close(update_msg.cfg_file, NULL);
- }
-
- if (sizeof(header_fw_array) < (FW_HEAD_LENGTH+FW_SECTION_LENGTH
- *4 + FW_DSP_ISP_LENGTH+FW_DSP_LENGTH + FW_BOOT_LENGTH)) {
- GTP_ERROR("INVALID header_fw_array, check your " \
- "gt9xx_firmware.h file!");
- return FAIL;
- }
- update_msg.file = file_open(UPDATE_FILE_PATH_2, O_CREAT |
- O_RDWR, 0666);
- if ((IS_ERR(update_msg.file))) {
- GTP_ERROR("Failed to Create file: %s for fw_header!",
- UPDATE_FILE_PATH_2);
- return FAIL;
- }
- update_msg.file->f_op->llseek(update_msg.file, 0, SEEK_SET);
- update_msg.file->f_op->write(update_msg.file,
- (char *)header_fw_array, sizeof(header_fw_array),
- &update_msg.file->f_pos);
- file_close(update_msg.file, NULL);
- update_msg.file = file_open(UPDATE_FILE_PATH_2, O_RDONLY, 0);
-#else
- u8 fp_len = max(sizeof(UPDATE_FILE_PATH_1),
- sizeof(UPDATE_FILE_PATH_2));
- u8 cfp_len = max(sizeof(CONFIG_FILE_PATH_1),
- sizeof(CONFIG_FILE_PATH_2));
- u8 *search_update_path = kzalloc(fp_len, GFP_KERNEL);
- u8 *search_cfg_path = kzalloc(cfp_len, GFP_KERNEL);
- /* Begin to search update file,the config file & firmware
- file must be in the same path,single or double. */
- searching_file = 1;
- for (i = 0; i < GUP_SEARCH_FILE_TIMES; i++) {
- if (searching_file == 0) {
- kfree(search_update_path);
- kfree(search_cfg_path);
- GTP_INFO(".bin/.cfg update file search " \
- "forcely terminated!");
- return FAIL;
- }
- if (i % 2) {
- memcpy(search_update_path, UPDATE_FILE_PATH_1,
- sizeof(UPDATE_FILE_PATH_1));
- memcpy(search_cfg_path, CONFIG_FILE_PATH_1,
- sizeof(CONFIG_FILE_PATH_1));
- } else {
- memcpy(search_update_path, UPDATE_FILE_PATH_2,
- sizeof(UPDATE_FILE_PATH_2));
- memcpy(search_cfg_path, CONFIG_FILE_PATH_2,
- sizeof(CONFIG_FILE_PATH_2));
- }
-
- if (!(got_file_flag&0x0F)) {
- update_msg.file = file_open(search_update_path,
- O_RDONLY, 0);
- if (!IS_ERR(update_msg.file)) {
- GTP_DEBUG("Find the bin file");
- got_file_flag |= 0x0F;
- }
- }
- if (!(got_file_flag & 0xF0)) {
- update_msg.cfg_file = file_open(search_cfg_path,
- O_RDONLY, 0);
- if (!IS_ERR(update_msg.cfg_file)) {
- GTP_DEBUG("Find the cfg file");
- got_file_flag |= 0xF0;
- }
- }
-
- if (got_file_flag) {
- if (got_file_flag == 0xFF)
- break;
- else
- i += 4;
- }
- GTP_DEBUG("%3d:Searching %s %s file...", i,
- (got_file_flag & 0x0F) ? "" : "bin",
- (got_file_flag & 0xF0) ? "" : "cfg");
-
- msleep(3000);
- }
-
- searching_file = 0;
- kfree(search_update_path);
- kfree(search_cfg_path);
-
- if (!got_file_flag) {
- GTP_ERROR("Can't find update file.");
- goto load_failed;
- }
-
- if (got_file_flag & 0xF0) {
- GTP_DEBUG("Got the update config file.");
- ret = gup_update_config(client);
- if (ret <= 0)
- GTP_ERROR("Update config failed.");
- filp_close(update_msg.cfg_file, NULL);
- msleep(500); /* waiting config to be stored in FLASH. */
- }
- if (got_file_flag & 0x0F) {
- GTP_DEBUG("Got the update firmware file.");
- } else {
- GTP_ERROR("No need to upgrade firmware.");
- goto load_failed;
- }
-#endif
- }
-
- update_msg.old_fs = get_fs();
- set_fs(KERNEL_DS);
-
- update_msg.file->f_op->llseek(update_msg.file, 0, SEEK_SET);
- /* update_msg.file->f_pos = 0; */
-
- ret = update_msg.file->f_op->read(update_msg.file, (char *)buf,
- FW_HEAD_LENGTH, &update_msg.file->f_pos);
+ ret = request_firmware(&fw, GOODIX_CONFIG_FILE_NAME, &client->dev);
if (ret < 0) {
- GTP_ERROR("Read firmware head in update file error.");
- goto load_failed;
+ dev_info(&client->dev, "Cannot get config file - %s (%d)\n",
+ GOODIX_CONFIG_FILE_NAME, ret);
+ } else {
+ dev_dbg(&client->dev,
+ "Update config File: %s", GOODIX_CONFIG_FILE_NAME);
+ ret = gup_update_config(client, fw);
+ if (ret <= 0)
+ dev_err(&client->dev, "Update config failed.");
+ release_firmware(fw);
}
- memcpy(fw_head, buf, FW_HEAD_LENGTH);
+
+ update_msg.need_free = false;
+ update_msg.fw_len = 0;
+
+ if (gup_check_firmware_name(client, &path))
+ goto load_failed;
+
+ if (gup_get_firmware_file(client, &update_msg, path))
+ goto load_failed;
+
+ memcpy(fw_head, update_msg.fw_data, FW_HEAD_LENGTH);
/* check firmware legality */
fw_checksum = 0;
for (i = 0; i < FW_SECTION_LENGTH * 4 + FW_DSP_ISP_LENGTH +
- FW_DSP_LENGTH + FW_BOOT_LENGTH; i + = 2) {
- u16 temp;
- ret = update_msg.file->f_op->read(update_msg.file, (char *)buf,
- 2, &update_msg.file->f_pos);
- if (ret < 0) {
- GTP_ERROR("Read firmware file error.");
- goto load_failed;
- }
- /* GTP_DEBUG("BUF[0]:%x", buf[0]); */
- temp = (buf[0]<<8) + buf[1];
+ FW_DSP_LENGTH + FW_BOOT_LENGTH; i += 2) {
+ temp = (update_msg.fw_data[FW_HEAD_LENGTH + i] << 8) +
+ update_msg.fw_data[FW_HEAD_LENGTH + i + 1];
fw_checksum += temp;
}
- GTP_DEBUG("firmware checksum:%x", fw_checksum&0xFFFF);
+ pr_debug("firmware checksum:%x", fw_checksum & 0xFFFF);
if (fw_checksum & 0xFFFF) {
- GTP_ERROR("Illegal firmware file.");
+ dev_err(&client->dev, "Illegal firmware file.");
goto load_failed;
}
return SUCCESS;
load_failed:
- set_fs(update_msg.old_fs);
+ if (update_msg.need_free) {
+ devm_kfree(&client->dev, update_msg.fw_data);
+ update_msg.need_free = false;
+ }
return FAIL;
}
-#if 0
-static u8 gup_check_update_header(struct i2c_client *client,
- st_fw_head *fw_head)
-{
- const u8 *pos;
- int i = 0;
- u8 mask_num = 0;
- s32 ret = 0;
-
- pos = HEADER_UPDATE_DATA;
-
- memcpy(fw_head, pos, FW_HEAD_LENGTH);
- pos += FW_HEAD_LENGTH;
-
- ret = gup_enter_update_judge(fw_head);
- if (SUCCESS == ret)
- return SUCCESS;
- return FAIL;
-}
-#endif
-
static u8 gup_burn_proc(struct i2c_client *client, u8 *burn_buf, u16 start_addr,
u16 total_length)
{
@@ -937,10 +760,10 @@
u8 rd_buf[PACK_SIZE + GTP_ADDR_LENGTH];
u8 retry = 0;
- GTP_DEBUG("Begin burn %dk data to addr 0x%x", (total_length/1024),
+ pr_debug("Begin burn %dk data to addr 0x%x", (total_length / 1024),
start_addr);
while (burn_length < total_length) {
- GTP_DEBUG("B/T:%04d/%04d", burn_length, total_length);
+ pr_debug("B/T:%04d/%04d", burn_length, total_length);
frame_length = ((total_length - burn_length) > PACK_SIZE)
? PACK_SIZE : (total_length - burn_length);
wr_buf[0] = (u8)(burn_addr>>8);
@@ -954,33 +777,26 @@
ret = gup_i2c_write(client, wr_buf,
GTP_ADDR_LENGTH + frame_length);
if (ret <= 0) {
- GTP_ERROR("Write frame data i2c error.");
+ pr_err("Write frame data i2c error.");
continue;
}
ret = gup_i2c_read(client, rd_buf, GTP_ADDR_LENGTH +
frame_length);
if (ret <= 0) {
- GTP_ERROR("Read back frame data i2c error.");
+ pr_err("Read back frame data i2c error.");
continue;
}
if (memcmp(&wr_buf[GTP_ADDR_LENGTH],
&rd_buf[GTP_ADDR_LENGTH], frame_length)) {
- GTP_ERROR("Check frame data fail,not equal.");
- GTP_DEBUG("write array:");
- GTP_DEBUG_ARRAY(&wr_buf[GTP_ADDR_LENGTH],
- frame_length);
- GTP_DEBUG("read array:");
- GTP_DEBUG_ARRAY(&rd_buf[GTP_ADDR_LENGTH],
- frame_length);
+ pr_err("Check frame data fail,not equal.");
continue;
} else {
- /* GTP_DEBUG("Check frame data success."); */
break;
}
}
if (retry >= MAX_FRAME_CHECK_TIME) {
- GTP_ERROR("Burn frame data time out,exit.");
+ pr_err("Burn frame data time out,exit.");
return FAIL;
}
burn_length += frame_length;
@@ -991,20 +807,15 @@
static u8 gup_load_section_file(u8 *buf, u16 offset, u16 length)
{
- s32 ret = 0;
-
- if (update_msg.file == NULL) {
- GTP_ERROR("cannot find update file,load section file fail.");
+ if (!update_msg.fw_data ||
+ update_msg.fw_len < FW_HEAD_LENGTH + offset + length) {
+ pr_err(
+ "<<-GTP->> cannot load section data. fw_len=%d read end=%d\n",
+ update_msg.fw_len ,
+ FW_HEAD_LENGTH + offset + length);
return FAIL;
}
- update_msg.file->f_pos = FW_HEAD_LENGTH + offset;
-
- ret = update_msg.file->f_op->read(update_msg.file, (char *)buf, length,
- &update_msg.file->f_pos);
- if (ret < 0) {
- GTP_ERROR("Read update file fail.");
- return FAIL;
- }
+ memcpy(buf, &update_msg.fw_data[FW_HEAD_LENGTH + offset], length);
return SUCCESS;
}
@@ -1023,30 +834,26 @@
? PACK_SIZE : (chk_length - recall_length);
ret = gup_get_ic_msg(client, recall_addr, rd_buf, frame_length);
if (ret <= 0) {
- GTP_ERROR("recall i2c error,exit");
+ pr_err("recall i2c error,exit");
return FAIL;
}
if (memcmp(&rd_buf[GTP_ADDR_LENGTH], &chk_src[recall_length],
frame_length)) {
- GTP_ERROR("Recall frame data fail,not equal.");
- GTP_DEBUG("chk_src array:");
- GTP_DEBUG_ARRAY(&chk_src[recall_length], frame_length);
- GTP_DEBUG("recall array:");
- GTP_DEBUG_ARRAY(&rd_buf[GTP_ADDR_LENGTH], frame_length);
+ pr_err("Recall frame data fail,not equal.");
return FAIL;
}
recall_length += frame_length;
recall_addr += frame_length;
}
- GTP_DEBUG("Recall check %dk firmware success.", (chk_length/1024));
+ pr_debug("Recall check %dk firmware success.", (chk_length/1024));
return SUCCESS;
}
static u8 gup_burn_fw_section(struct i2c_client *client, u8 *fw_section,
- u16 start_addr, u8 bank_cmdi)
+ u16 start_addr, u8 bank_cmd)
{
s32 ret = 0;
u8 rd_buf[5];
@@ -1054,14 +861,14 @@
/* step1:hold ss51 & dsp */
ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_section]hold ss51 & dsp fail.");
+ pr_err("hold ss51 & dsp fail.");
return FAIL;
}
/* step2:set scramble */
ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_section]set scramble fail.");
+ pr_err("set scramble fail.");
return FAIL;
}
@@ -1069,7 +876,7 @@
ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK,
(bank_cmd >> 4)&0x0F);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_section]select bank %d fail.",
+ pr_err("select bank %d fail.",
(bank_cmd >> 4)&0x0F);
return FAIL;
}
@@ -1077,21 +884,21 @@
/* step4:enable accessing code */
ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x01);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_section]enable accessing code fail.");
+ pr_err("enable accessing code fail.");
return FAIL;
}
/* step5:burn 8k fw section */
ret = gup_burn_proc(client, fw_section, start_addr, FW_SECTION_LENGTH);
if (ret == FAIL) {
- GTP_ERROR("[burn_fw_section]burn fw_section fail.");
+ pr_err("burn fw_section fail.");
return FAIL;
}
/* step6:hold ss51 & release dsp */
ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x04);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_section]hold ss51 & release dsp fail.");
+ pr_err("hold ss51 & release dsp fail.");
return FAIL;
}
/* must delay */
@@ -1100,26 +907,24 @@
/* step7:send burn cmd to move data to flash from sram */
ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, bank_cmd&0x0f);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_section]send burn cmd fail.");
+ pr_err("send burn cmd fail.");
return FAIL;
}
- GTP_DEBUG("[burn_fw_section]Wait for the burn is complete......");
+ pr_debug("Wait for the burn is complete.");
do {
ret = gup_get_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, rd_buf, 1);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_section]Get burn state fail");
+ pr_err("Get burn state fail");
return FAIL;
}
msleep(20);
- /* GTP_DEBUG("[burn_fw_section]Get burn state:%d.",
- rd_buf[GTP_ADDR_LENGTH]); */
} while (rd_buf[GTP_ADDR_LENGTH]);
/* step8:select bank */
ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK,
(bank_cmd >> 4)&0x0F);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_section]select bank %d fail.",
+ pr_err("select bank %d fail.",
(bank_cmd >> 4)&0x0F);
return FAIL;
}
@@ -1127,7 +932,7 @@
/* step9:enable accessing code */
ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x01);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_section]enable accessing code fail.");
+ pr_err("enable accessing code fail.");
return FAIL;
}
@@ -1135,14 +940,14 @@
ret = gup_recall_check(client, fw_section, start_addr,
FW_SECTION_LENGTH);
if (ret == FAIL) {
- GTP_ERROR("[burn_fw_section]recall check 8k firmware fail.");
+ pr_err("recall check 8k firmware fail.");
return FAIL;
}
/* step11:disable accessing code */
ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x00);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_section]disable accessing code fail.");
+ pr_err("disable accessing code fail.");
return FAIL;
}
@@ -1155,115 +960,105 @@
u8 *fw_dsp_isp = NULL;
u8 retry = 0;
- GTP_DEBUG("[burn_dsp_isp]Begin burn dsp isp---->>");
+ pr_debug("Begin burn dsp isp.");
/* step1:alloc memory */
- GTP_DEBUG("[burn_dsp_isp]step1:alloc memory");
+ pr_debug("step1:alloc memory");
while (retry++ < 5) {
- fw_dsp_isp = kzalloc(FW_DSP_ISP_LENGTH, GFP_KERNEL);
+ fw_dsp_isp = devm_kzalloc(&client->dev, FW_DSP_ISP_LENGTH,
+ GFP_KERNEL);
if (fw_dsp_isp == NULL) {
continue;
} else {
- GTP_INFO("[burn_dsp_isp]Alloc %dk byte memory success.",
+ pr_info("Alloc %dk byte memory success.",
(FW_DSP_ISP_LENGTH/1024));
break;
}
}
- if (retry >= 5) {
- GTP_ERROR("[burn_dsp_isp]Alloc memory fail,exit.");
+ if (retry == 5) {
+ pr_err("Alloc memory fail,exit.");
return FAIL;
}
/* step2:load dsp isp file data */
- GTP_DEBUG("[burn_dsp_isp]step2:load dsp isp file data");
+ pr_debug("step2:load dsp isp file data");
ret = gup_load_section_file(fw_dsp_isp, (4 * FW_SECTION_LENGTH +
FW_DSP_LENGTH + FW_BOOT_LENGTH), FW_DSP_ISP_LENGTH);
if (ret == FAIL) {
- GTP_ERROR("[burn_dsp_isp]load firmware dsp_isp fail.");
- goto exit_burn_dsp_isp;
+ pr_err("load firmware dsp_isp fail.");
+ return FAIL;
}
/* step3:disable wdt,clear cache enable */
- GTP_DEBUG("[burn_dsp_isp]step3:disable wdt,clear cache enable");
+ pr_debug("step3:disable wdt,clear cache enable");
ret = gup_set_ic_msg(client, _bRW_MISCTL__TMR0_EN, 0x00);
if (ret <= 0) {
- GTP_ERROR("[burn_dsp_isp]disable wdt fail.");
- ret = FAIL;
- goto exit_burn_dsp_isp;
+ pr_err("disable wdt fail.");
+ return FAIL;
}
ret = gup_set_ic_msg(client, _bRW_MISCTL__CACHE_EN, 0x00);
if (ret <= 0) {
- GTP_ERROR("[burn_dsp_isp]clear cache enable fail.");
- ret = FAIL;
- goto exit_burn_dsp_isp;
+ pr_err("clear cache enable fail.");
+ return FAIL;
}
/* step4:hold ss51 & dsp */
- GTP_DEBUG("[burn_dsp_isp]step4:hold ss51 & dsp");
+ pr_debug("step4:hold ss51 & dsp");
ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
if (ret <= 0) {
- GTP_ERROR("[burn_dsp_isp]hold ss51 & dsp fail.");
- ret = FAIL;
- goto exit_burn_dsp_isp;
+ pr_err("hold ss51 & dsp fail.");
+ return FAIL;
}
/* step5:set boot from sram */
- GTP_DEBUG("[burn_dsp_isp]step5:set boot from sram");
+ pr_debug("step5:set boot from sram");
ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOTCTL_B0_, 0x02);
if (ret <= 0) {
- GTP_ERROR("[burn_dsp_isp]set boot from sram fail.");
- ret = FAIL;
- goto exit_burn_dsp_isp;
+ pr_err("set boot from sram fail.");
+ return FAIL;
}
/* step6:software reboot */
- GTP_DEBUG("[burn_dsp_isp]step6:software reboot");
+ pr_debug("step6:software reboot");
ret = gup_set_ic_msg(client, _bWO_MISCTL__CPU_SWRST_PULSE, 0x01);
if (ret <= 0) {
- GTP_ERROR("[burn_dsp_isp]software reboot fail.");
- ret = FAIL;
- goto exit_burn_dsp_isp;
+ pr_err("software reboot fail.");
+ return FAIL;
}
/* step7:select bank2 */
- GTP_DEBUG("[burn_dsp_isp]step7:select bank2");
+ pr_debug("step7:select bank2");
ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, 0x02);
if (ret <= 0) {
- GTP_ERROR("[burn_dsp_isp]select bank2 fail.");
- ret = FAIL;
- goto exit_burn_dsp_isp;
+ pr_err("select bank2 fail.");
+ return FAIL;
}
/* step8:enable accessing code */
- GTP_DEBUG("[burn_dsp_isp]step8:enable accessing code");
+ pr_debug("step8:enable accessing code");
ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x01);
if (ret <= 0) {
- GTP_ERROR("[burn_dsp_isp]enable accessing code fail.");
- ret = FAIL;
- goto exit_burn_dsp_isp;
+ pr_err("enable accessing code fail.");
+ return FAIL;
}
/* step9:burn 4k dsp_isp */
- GTP_DEBUG("[burn_dsp_isp]step9:burn 4k dsp_isp");
+ pr_debug("step9:burn 4k dsp_isp");
ret = gup_burn_proc(client, fw_dsp_isp, 0xC000, FW_DSP_ISP_LENGTH);
if (ret == FAIL) {
- GTP_ERROR("[burn_dsp_isp]burn dsp_isp fail.");
- goto exit_burn_dsp_isp;
+ pr_err("burn dsp_isp fail.");
+ return FAIL;
}
/* step10:set scramble */
- GTP_DEBUG("[burn_dsp_isp]step10:set scramble");
+ pr_debug("step10:set scramble");
ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00);
if (ret <= 0) {
- GTP_ERROR("[burn_dsp_isp]set scramble fail.");
- ret = FAIL;
- goto exit_burn_dsp_isp;
+ pr_err("set scramble fail.");
+ return FAIL;
}
- ret = SUCCESS;
-exit_burn_dsp_isp:
- kfree(fw_dsp_isp);
- return ret;
+ return SUCCESS;
}
static u8 gup_burn_fw_ss51(struct i2c_client *client)
@@ -1272,106 +1067,102 @@
u8 retry = 0;
s32 ret = 0;
- GTP_DEBUG("[burn_fw_ss51]Begin burn ss51 firmware---->>");
+ pr_debug("Begin burn ss51 firmware.");
/* step1:alloc memory */
- GTP_DEBUG("[burn_fw_ss51]step1:alloc memory");
+ pr_debug("step1:alloc memory");
while (retry++ < 5) {
- fw_ss51 = kzalloc(FW_SECTION_LENGTH, GFP_KERNEL);
+ fw_ss51 = devm_kzalloc(&client->dev, FW_SECTION_LENGTH,
+ GFP_KERNEL);
if (fw_ss51 == NULL) {
continue;
} else {
- GTP_INFO("[burn_fw_ss51]Alloc %dk byte memory success.",
+ pr_info("Alloc %dk byte memory success.",
(FW_SECTION_LENGTH/1024));
break;
}
}
- if (retry >= 5) {
- GTP_ERROR("[burn_fw_ss51]Alloc memory fail,exit.");
+ if (retry == 5) {
+ pr_err("Alloc memory fail,exit.");
return FAIL;
}
/* step2:load ss51 firmware section 1 file data */
- GTP_DEBUG("[burn_fw_ss51]step2:load ss51 firmware section 1 file data");
+ pr_debug("step2:load ss51 firmware section 1 file data");
ret = gup_load_section_file(fw_ss51, 0, FW_SECTION_LENGTH);
if (ret == FAIL) {
- GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 1 fail.");
- goto exit_burn_fw_ss51;
+ pr_err("load ss51 firmware section 1 fail.");
+ return FAIL;
}
/* step3:clear control flag */
- GTP_DEBUG("[burn_fw_ss51]step3:clear control flag");
+ pr_debug("step3:clear control flag");
ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x00);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_ss51]clear control flag fail.");
- ret = FAIL;
- goto exit_burn_fw_ss51;
+ pr_err("clear control flag fail.");
+ return FAIL;
}
/* step4:burn ss51 firmware section 1 */
- GTP_DEBUG("[burn_fw_ss51]step4:burn ss51 firmware section 1");
+ pr_debug("step4:burn ss51 firmware section 1");
ret = gup_burn_fw_section(client, fw_ss51, 0xC000, 0x01);
if (ret == FAIL) {
- GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 1 fail.");
- goto exit_burn_fw_ss51;
+ pr_err("burn ss51 firmware section 1 fail.");
+ return FAIL;
}
/* step5:load ss51 firmware section 2 file data */
- GTP_DEBUG("[burn_fw_ss51]step5:load ss51 firmware section 2 file data");
+ pr_debug("step5:load ss51 firmware section 2 file data");
ret = gup_load_section_file(fw_ss51, FW_SECTION_LENGTH,
FW_SECTION_LENGTH);
if (ret == FAIL) {
- GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 2 fail.");
- goto exit_burn_fw_ss51;
+ pr_err("[burn_fw_ss51]load ss51 firmware section 2 fail.");
+ return FAIL;
}
/* step6:burn ss51 firmware section 2 */
- GTP_DEBUG("[burn_fw_ss51]step6:burn ss51 firmware section 2");
+ pr_debug("step6:burn ss51 firmware section 2");
ret = gup_burn_fw_section(client, fw_ss51, 0xE000, 0x02);
if (ret == FAIL) {
- GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 2 fail.");
- goto exit_burn_fw_ss51;
+ pr_err("burn ss51 firmware section 2 fail.");
+ return FAIL;
}
/* step7:load ss51 firmware section 3 file data */
- GTP_DEBUG("[burn_fw_ss51]step7:load ss51 firmware section 3 file data");
+ pr_debug("step7:load ss51 firmware section 3 file data");
ret = gup_load_section_file(fw_ss51, 2*FW_SECTION_LENGTH,
FW_SECTION_LENGTH);
if (ret == FAIL) {
- GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 3 fail.");
- goto exit_burn_fw_ss51;
+ pr_err("load ss51 firmware section 3 fail.");
+ return FAIL;
}
/* step8:burn ss51 firmware section 3 */
- GTP_DEBUG("[burn_fw_ss51]step8:burn ss51 firmware section 3");
+ pr_debug("step8:burn ss51 firmware section 3");
ret = gup_burn_fw_section(client, fw_ss51, 0xC000, 0x13);
if (ret == FAIL) {
- GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 3 fail.");
- goto exit_burn_fw_ss51;
+ pr_err("burn ss51 firmware section 3 fail.");
+ return FAIL;
}
/* step9:load ss51 firmware section 4 file data */
- GTP_DEBUG("[burn_fw_ss51]step9:load ss51 firmware section 4 file data");
+ pr_debug("step9:load ss51 firmware section 4 file data");
ret = gup_load_section_file(fw_ss51, 3*FW_SECTION_LENGTH,
FW_SECTION_LENGTH);
if (ret == FAIL) {
- GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 4 fail.");
- goto exit_burn_fw_ss51;
+ pr_err("load ss51 firmware section 4 fail.");
+ return FAIL;
}
/* step10:burn ss51 firmware section 4 */
- GTP_DEBUG("[burn_fw_ss51]step10:burn ss51 firmware section 4");
+ pr_debug("step10:burn ss51 firmware section 4");
ret = gup_burn_fw_section(client, fw_ss51, 0xE000, 0x14);
if (ret == FAIL) {
- GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 4 fail.");
- goto exit_burn_fw_ss51;
+ pr_err("burn ss51 firmware section 4 fail.");
+ return FAIL;
}
- ret = SUCCESS;
-
-exit_burn_fw_ss51:
- kfree(fw_ss51);
- return ret;
+ return SUCCESS;
}
static u8 gup_burn_fw_dsp(struct i2c_client *client)
@@ -1381,111 +1172,101 @@
u8 retry = 0;
u8 rd_buf[5];
- GTP_DEBUG("[burn_fw_dsp]Begin burn dsp firmware---->>");
+ pr_debug("Begin burn dsp firmware.");
/* step1:alloc memory */
- GTP_DEBUG("[burn_fw_dsp]step1:alloc memory");
+ pr_debug("step1:alloc memory");
while (retry++ < 5) {
- fw_dsp = kzalloc(FW_DSP_LENGTH, GFP_KERNEL);
+ fw_dsp = devm_kzalloc(&client->dev, FW_DSP_LENGTH,
+ GFP_KERNEL);
if (fw_dsp == NULL) {
continue;
} else {
- GTP_INFO("[burn_fw_dsp]Alloc %dk byte memory success.",
+ pr_info("Alloc %dk byte memory success.",
(FW_SECTION_LENGTH/1024));
break;
}
}
- if (retry >= 5) {
- GTP_ERROR("[burn_fw_dsp]Alloc memory fail,exit.");
+ if (retry == 5) {
+ pr_err("Alloc memory fail,exit.");
return FAIL;
}
/* step2:load firmware dsp */
- GTP_DEBUG("[burn_fw_dsp]step2:load firmware dsp");
+ pr_debug("step2:load firmware dsp");
ret = gup_load_section_file(fw_dsp, 4*FW_SECTION_LENGTH, FW_DSP_LENGTH);
if (ret == FAIL) {
- GTP_ERROR("[burn_fw_dsp]load firmware dsp fail.");
- goto exit_burn_fw_dsp;
+ pr_err("load firmware dsp fail.");
+ return ret;
}
/* step3:select bank3 */
- GTP_DEBUG("[burn_fw_dsp]step3:select bank3");
+ pr_debug("step3:select bank3");
ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, 0x03);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_dsp]select bank3 fail.");
- ret = FAIL;
- goto exit_burn_fw_dsp;
+ pr_err("select bank3 fail.");
+ return FAIL;
}
/* Step4:hold ss51 & dsp */
- GTP_DEBUG("[burn_fw_dsp]step4:hold ss51 & dsp");
+ pr_debug("step4:hold ss51 & dsp");
ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_dsp]hold ss51 & dsp fail.");
- ret = FAIL;
- goto exit_burn_fw_dsp;
+ pr_err("hold ss51 & dsp fail.");
+ return FAIL;
}
/* step5:set scramble */
- GTP_DEBUG("[burn_fw_dsp]step5:set scramble");
+ pr_debug("step5:set scramble");
ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_dsp]set scramble fail.");
- ret = FAIL;
- goto exit_burn_fw_dsp;
+ pr_err("set scramble fail.");
+ return FAIL;
}
/* step6:release ss51 & dsp */
- GTP_DEBUG("[burn_fw_dsp]step6:release ss51 & dsp");
+ pr_debug("step6:release ss51 & dsp");
ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x04);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_dsp]release ss51 & dsp fail.");
- ret = FAIL;
- goto exit_burn_fw_dsp;
+ pr_err("release ss51 & dsp fail.");
+ return FAIL;
}
/* must delay */
msleep(20);
/* step7:burn 4k dsp firmware */
- GTP_DEBUG("[burn_fw_dsp]step7:burn 4k dsp firmware");
+ pr_debug("step7:burn 4k dsp firmware");
ret = gup_burn_proc(client, fw_dsp, 0x9000, FW_DSP_LENGTH);
- if (FAIL == ret) {
- GTP_ERROR("[burn_fw_dsp]burn fw_section fail.");
- goto exit_burn_fw_dsp;
+ if (ret == FAIL) {
+ pr_err("[burn_fw_dsp]burn fw_section fail.");
+ return ret;
}
/* step8:send burn cmd to move data to flash from sram */
- GTP_DEBUG("[burn_fw_dsp]step8:send burn cmd to move data to flash" \
- "from sram");
+ pr_debug("step8:send burn cmd to move data to flash from sram");
ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x05);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_dsp]send burn cmd fail.");
- goto exit_burn_fw_dsp;
+ pr_err("send burn cmd fail.");
+ return ret;
}
- GTP_DEBUG("[burn_fw_dsp]Wait for the burn is complete......");
+ pr_debug("Wait for the burn is complete.");
do {
ret = gup_get_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, rd_buf, 1);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_dsp]Get burn state fail");
- goto exit_burn_fw_dsp;
+ pr_err("Get burn state fail");
+ return ret;
}
msleep(20);
- /* GTP_DEBUG("[burn_fw_dsp]Get burn state:%d.",
- rd_buf[GTP_ADDR_LENGTH]); */
} while (rd_buf[GTP_ADDR_LENGTH]);
/* step9:recall check 4k dsp firmware */
- GTP_DEBUG("[burn_fw_dsp]step9:recall check 4k dsp firmware");
+ pr_debug("step9:recall check 4k dsp firmware");
ret = gup_recall_check(client, fw_dsp, 0x9000, FW_DSP_LENGTH);
if (ret == FAIL) {
- GTP_ERROR("[burn_fw_dsp]recall check 4k dsp firmware fail.");
- goto exit_burn_fw_dsp;
+ pr_err("recall check 4k dsp firmware fail.");
+ return ret;
}
- ret = SUCCESS;
-
-exit_burn_fw_dsp:
- kfree(fw_dsp);
- return ret;
+ return SUCCESS;
}
static u8 gup_burn_fw_boot(struct i2c_client *client)
@@ -1495,176 +1276,165 @@
u8 retry = 0;
u8 rd_buf[5];
- GTP_DEBUG("[burn_fw_boot]Begin burn bootloader firmware---->>");
+ pr_debug("Begin burn bootloader firmware.");
/* step1:Alloc memory */
- GTP_DEBUG("[burn_fw_boot]step1:Alloc memory");
+ pr_debug("step1:Alloc memory");
while (retry++ < 5) {
- fw_boot = kzalloc(FW_BOOT_LENGTH, GFP_KERNEL);
+ fw_boot = devm_kzalloc(&client->dev, FW_BOOT_LENGTH,
+ GFP_KERNEL);
if (fw_boot == NULL) {
continue;
} else {
- GTP_INFO("[burn_fw_boot]Alloc %dk byte memory success.",
+ pr_info("Alloc %dk byte memory success.",
(FW_BOOT_LENGTH/1024));
break;
}
}
- if (retry >= 5) {
- GTP_ERROR("[burn_fw_boot]Alloc memory fail,exit.");
+ if (retry == 5) {
+ pr_err("Alloc memory fail,exit.");
return FAIL;
}
/* step2:load firmware bootloader */
- GTP_DEBUG("[burn_fw_boot]step2:load firmware bootloader");
+ pr_debug("step2:load firmware bootloader");
ret = gup_load_section_file(fw_boot, (4 * FW_SECTION_LENGTH +
FW_DSP_LENGTH), FW_BOOT_LENGTH);
if (ret == FAIL) {
- GTP_ERROR("[burn_fw_boot]load firmware dsp fail.");
- goto exit_burn_fw_boot;
+ pr_err("load firmware dsp fail.");
+ return ret;
}
/* step3:hold ss51 & dsp */
- GTP_DEBUG("[burn_fw_boot]step3:hold ss51 & dsp");
+ pr_debug("step3:hold ss51 & dsp");
ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_boot]hold ss51 & dsp fail.");
- ret = FAIL;
- goto exit_burn_fw_boot;
+ pr_err("hold ss51 & dsp fail.");
+ return FAIL;
}
/* step4:set scramble */
- GTP_DEBUG("[burn_fw_boot]step4:set scramble");
+ pr_debug("step4:set scramble");
ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_boot]set scramble fail.");
- ret = FAIL;
- goto exit_burn_fw_boot;
+ pr_err("set scramble fail.");
+ return FAIL;
}
/* step5:release ss51 & dsp */
- GTP_DEBUG("[burn_fw_boot]step5:release ss51 & dsp");
+ pr_debug("step5:release ss51 & dsp");
ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x04);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_boot]release ss51 & dsp fail.");
- ret = FAIL;
- goto exit_burn_fw_boot;
+ pr_err("release ss51 & dsp fail.");
+ return FAIL;
}
/* must delay */
msleep(20);
/* step6:select bank3 */
- GTP_DEBUG("[burn_fw_boot]step6:select bank3");
+ pr_debug("step6:select bank3");
ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, 0x03);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_boot]select bank3 fail.");
- ret = FAIL;
- goto exit_burn_fw_boot;
+ pr_err("select bank3 fail.");
+ return FAIL;
}
/* step7:burn 2k bootloader firmware */
- GTP_DEBUG("[burn_fw_boot]step7:burn 2k bootloader firmware");
+ pr_debug("step7:burn 2k bootloader firmware");
ret = gup_burn_proc(client, fw_boot, 0x9000, FW_BOOT_LENGTH);
if (ret == FAIL) {
- GTP_ERROR("[burn_fw_boot]burn fw_section fail.");
- goto exit_burn_fw_boot;
+ pr_err("burn fw_section fail.");
+ return ret;
}
/* step7:send burn cmd to move data to flash from sram */
- GTP_DEBUG("[burn_fw_boot]step7:send burn cmd to move data to" \
- "flash from sram");
+ pr_debug("step7:send burn cmd to flash data from sram");
ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x06);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_boot]send burn cmd fail.");
- goto exit_burn_fw_boot;
+ pr_err("send burn cmd fail.");
+ return ret;
}
- GTP_DEBUG("[burn_fw_boot]Wait for the burn is complete......");
+ pr_debug("Wait for the burn is complete.");
do {
ret = gup_get_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, rd_buf, 1);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_boot]Get burn state fail");
- goto exit_burn_fw_boot;
+ pr_err("Get burn state fail");
+ return ret;
}
msleep(20);
- /* GTP_DEBUG("[burn_fw_boot]Get burn state:%d.",
- rd_buf[GTP_ADDR_LENGTH]); */
} while (rd_buf[GTP_ADDR_LENGTH]);
/* step8:recall check 2k bootloader firmware */
- GTP_DEBUG("[burn_fw_boot]step8:recall check 2k bootloader firmware");
+ pr_debug("step8:recall check 2k bootloader firmware");
ret = gup_recall_check(client, fw_boot, 0x9000, FW_BOOT_LENGTH);
if (ret == FAIL) {
- GTP_ERROR("[burn_fw_boot]recall check 4k dsp firmware fail.");
- goto exit_burn_fw_boot;
+ pr_err("recall check 4k dsp firmware fail.");
+ return ret;
}
/* step9:enable download DSP code */
- GTP_DEBUG("[burn_fw_boot]step9:enable download DSP code ");
+ pr_debug("step9:enable download DSP code ");
ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x99);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_boot]enable download DSP code fail.");
- ret = FAIL;
- goto exit_burn_fw_boot;
+ pr_err("enable download DSP code fail.");
+ return FAIL;
}
/* step10:release ss51 & hold dsp */
- GTP_DEBUG("[burn_fw_boot]step10:release ss51 & hold dsp");
+ pr_debug("step10:release ss51 & hold dsp");
ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x08);
if (ret <= 0) {
- GTP_ERROR("[burn_fw_boot]release ss51 & hold dsp fail.");
- ret = FAIL;
- goto exit_burn_fw_boot;
+ pr_err("release ss51 & hold dsp fail.");
+ return FAIL;
}
- ret = SUCCESS;
-
-exit_burn_fw_boot:
- kfree(fw_boot);
- return ret;
+ return SUCCESS;
}
s32 gup_update_proc(void *dir)
{
s32 ret = 0;
- u8 retry = 0;
- st_fw_head fw_head;
+ u8 retry = 0;
+ struct st_fw_head fw_head;
struct goodix_ts_data *ts = NULL;
- GTP_DEBUG("[update_proc]Begin update ......");
+ pr_debug("Begin update.");
+
+ if (!i2c_connect_client) {
+ pr_err("No i2c connect client for %s\n", __func__);
+ return -EIO;
+ }
show_len = 1;
total_len = 100;
- if (dir == NULL)
- /* wait main thread to be completed */
- msleep(3000);
ts = i2c_get_clientdata(i2c_connect_client);
if (searching_file) {
/* exit .bin update file searching */
searching_file = 0;
- GTP_INFO("Exiting searching .bin update file...");
+ pr_info("Exiting searching .bin update file.");
/* wait for auto update quitted completely */
while ((show_len != 200) && (show_len != 100))
msleep(100);
}
- update_msg.file = NULL;
ret = gup_check_update_file(i2c_connect_client, &fw_head, (u8 *)dir);
if (ret == FAIL) {
- GTP_ERROR("[update_proc]check update file fail.");
+ pr_err("check update file fail.");
goto file_fail;
}
/* gtp_reset_guitar(i2c_connect_client, 20); */
ret = gup_get_ic_fw_msg(i2c_connect_client);
if (ret == FAIL) {
- GTP_ERROR("[update_proc]get ic message fail.");
+ pr_err("get ic message fail.");
goto file_fail;
}
- ret = gup_enter_update_judge(&fw_head);
+ ret = gup_enter_update_judge(ts->client, &fw_head);
if (ret == FAIL) {
- GTP_ERROR("[update_proc]Check *.bin file fail.");
+ pr_err("Check *.bin file fail.");
goto file_fail;
}
@@ -1675,7 +1445,7 @@
#endif
ret = gup_enter_update_mode(i2c_connect_client);
if (ret == FAIL) {
- GTP_ERROR("[update_proc]enter update mode fail.");
+ pr_err("enter update mode fail.");
goto update_fail;
}
@@ -1684,52 +1454,46 @@
total_len = 100;
ret = gup_burn_dsp_isp(i2c_connect_client);
if (ret == FAIL) {
- GTP_ERROR("[update_proc]burn dsp isp fail.");
+ pr_err("burn dsp isp fail.");
continue;
}
show_len += 10;
ret = gup_burn_fw_ss51(i2c_connect_client);
if (ret == FAIL) {
- GTP_ERROR("[update_proc]burn ss51 firmware fail.");
+ pr_err("burn ss51 firmware fail.");
continue;
}
show_len += 40;
ret = gup_burn_fw_dsp(i2c_connect_client);
if (ret == FAIL) {
- GTP_ERROR("[update_proc]burn dsp firmware fail.");
+ pr_err("burn dsp firmware fail.");
continue;
}
show_len += 20;
ret = gup_burn_fw_boot(i2c_connect_client);
if (ret == FAIL) {
- GTP_ERROR("[update_proc]burn bootloader fw fail.");
+ pr_err("burn bootloader fw fail.");
continue;
}
show_len += 10;
- GTP_INFO("[update_proc]UPDATE SUCCESS.");
+ pr_info("UPDATE SUCCESS.");
break;
}
if (retry >= 5) {
- GTP_ERROR("[update_proc]retry timeout,UPDATE FAIL.");
+ pr_err("retry timeout,UPDATE FAIL.");
goto update_fail;
}
- GTP_DEBUG("[update_proc]leave update mode.");
- gup_leave_update_mode();
+ pr_debug("leave update mode.");
+ gup_leave_update_mode(i2c_connect_client);
msleep(100);
- /* GTP_DEBUG("[update_proc]send config.");
- ret = gtp_send_cfg(i2c_connect_client);
- if(ret < 0) {
- GTP_ERROR("[update_proc]send config fail.");
- } */
-
if (ts->fw_error) {
- GTP_INFO("firmware error auto update, resent config!");
+ pr_info("firmware error auto update, resent config!");
gup_init_panel(ts);
}
show_len = 100;
@@ -1740,7 +1504,11 @@
#if GTP_ESD_PROTECT
gtp_esd_switch(ts->client, SWITCH_ON);
#endif
- filp_close(update_msg.file, NULL);
+ if (update_msg.need_free) {
+ devm_kfree(&ts->client->dev, update_msg.fw_data);
+ update_msg.need_free = false;
+ }
+
return SUCCESS;
update_fail:
@@ -1752,26 +1520,28 @@
#endif
file_fail:
- if (update_msg.file && !IS_ERR(update_msg.file))
- filp_close(update_msg.file, NULL);
-
show_len = 200;
total_len = 100;
+ if (update_msg.need_free) {
+ devm_kfree(&ts->client->dev, update_msg.fw_data);
+ update_msg.need_free = false;
+ }
return FAIL;
}
-#if GTP_AUTO_UPDATE
+static void gup_update_work(struct work_struct *work)
+{
+ if (gup_update_proc(NULL) == FAIL)
+ pr_err("Goodix update work fail!\n");
+}
+
u8 gup_init_update_proc(struct goodix_ts_data *ts)
{
- struct task_struct *thread = NULL;
+ dev_dbg(&ts->client->dev, "Ready to run update work.");
- GTP_INFO("Ready to run update thread.");
- thread = kthread_run(gup_update_proc, (void *)NULL, "guitar_update");
- if (IS_ERR(thread)) {
- GTP_ERROR("Failed to create update thread.\n");
- return -EINVAL;
- }
+ INIT_DELAYED_WORK(&ts->goodix_update_work, gup_update_work);
+ schedule_delayed_work(&ts->goodix_update_work,
+ msecs_to_jiffies(3000));
return 0;
}
-#endif
diff --git a/drivers/input/touchscreen/synaptics_fw_update.c b/drivers/input/touchscreen/synaptics_fw_update.c
index 7da0376..e577353 100644
--- a/drivers/input/touchscreen/synaptics_fw_update.c
+++ b/drivers/input/touchscreen/synaptics_fw_update.c
@@ -1559,7 +1559,7 @@
}
dev_dbg(&fwu->rmi4_data->i2c_client->dev,
- "%s: Firmware image size = %d\n",
+ "%s: Firmware image size = %zu\n",
__func__, fw_entry->size);
fwu->data_buffer = fw_entry->data;
@@ -1670,7 +1670,7 @@
if (count < fwu->config_size) {
dev_err(&rmi4_data->i2c_client->dev,
- "%s: Not enough space (%d bytes) in buffer\n",
+ "%s: Not enough space (%zu bytes) in buffer\n",
__func__, count);
return -EINVAL;
}
diff --git a/drivers/iommu/msm_iommu_sec.c b/drivers/iommu/msm_iommu_sec.c
index 5a1806e..38dd41b 100644
--- a/drivers/iommu/msm_iommu_sec.c
+++ b/drivers/iommu/msm_iommu_sec.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -43,6 +43,7 @@
#define IOMMU_SECURE_CFG 2
#define IOMMU_SECURE_PTBL_SIZE 3
#define IOMMU_SECURE_PTBL_INIT 4
+#define IOMMU_SET_CP_POOL_SIZE 5
#define IOMMU_SECURE_MAP 6
#define IOMMU_SECURE_UNMAP 7
#define IOMMU_SECURE_MAP2 0x0B
@@ -51,9 +52,21 @@
/* commands for SCM_SVC_UTIL */
#define IOMMU_DUMP_SMMU_FAULT_REGS 0X0C
+#define MAXIMUM_VIRT_SIZE (300*SZ_1M)
+
+
+#define MAKE_CP_VERSION(major, minor, patch) \
+ (((major & 0x3FF) << 22) | ((minor & 0x3FF) << 12) | (patch & 0xFFF))
+
static struct iommu_access_ops *iommu_access_ops;
+static const struct of_device_id msm_smmu_list[] = {
+ { .compatible = "qcom,msm-smmu-v1", },
+ { .compatible = "qcom,msm-smmu-v2", },
+ { }
+};
+
struct msm_scm_paddr_list {
unsigned int list;
unsigned int list_size;
@@ -78,6 +91,11 @@
unsigned int flags;
};
+struct msm_cp_pool_size {
+ uint32_t size;
+ uint32_t spare;
+};
+
#define NUM_DUMP_REGS 14
/*
* some space to allow the number of registers returned by the secure
@@ -282,15 +300,37 @@
int psize[2] = {0, 0};
unsigned int spare;
int ret, ptbl_ret = 0;
+ int version;
- for_each_compatible_node(np, NULL, "qcom,msm-smmu-v1")
- if (of_find_property(np, "qcom,iommu-secure-id", NULL))
+ for_each_matching_node(np, msm_smmu_list)
+ if (of_find_property(np, "qcom,iommu-secure-id", NULL) &&
+ of_device_is_available(np))
break;
if (!np)
return 0;
of_node_put(np);
+
+ version = scm_get_feat_version(SCM_SVC_MP);
+
+ if (version >= MAKE_CP_VERSION(1, 1, 1)) {
+ struct msm_cp_pool_size psize;
+ int retval;
+
+ psize.size = MAXIMUM_VIRT_SIZE;
+ psize.spare = 0;
+
+ ret = scm_call(SCM_SVC_MP, IOMMU_SET_CP_POOL_SIZE, &psize,
+ sizeof(psize), &retval, sizeof(retval));
+
+ if (ret) {
+ pr_err("scm call IOMMU_SET_CP_POOL_SIZE failed\n");
+ goto fail;
+ }
+
+ }
+
ret = scm_call(SCM_SVC_MP, IOMMU_SECURE_PTBL_SIZE, &spare,
sizeof(spare), psize, sizeof(psize));
if (ret) {
diff --git a/drivers/leds/leds-qpnp.c b/drivers/leds/leds-qpnp.c
index da90440..9208599 100644
--- a/drivers/leds/leds-qpnp.c
+++ b/drivers/leds/leds-qpnp.c
@@ -136,11 +136,11 @@
#define FLASH_SELFCHECK_ENABLE 0x80
#define FLASH_RAMP_STEP_27US 0xBF
-#define FLASH_STROBE_SW 0xC0
-#define FLASH_STROBE_HW 0x04
+#define FLASH_HW_SW_STROBE_SEL_MASK 0x04
#define FLASH_STROBE_MASK 0xC7
#define FLASH_LED_0_OUTPUT 0x80
#define FLASH_LED_1_OUTPUT 0x40
+#define FLASH_TORCH_OUTPUT 0xC0
#define FLASH_CURRENT_PRGM_MIN 1
#define FLASH_CURRENT_PRGM_SHIFT 1
@@ -1001,6 +1001,13 @@
goto error_reg_write;
}
+ if (!led->flash_cfg->strobe_type)
+ led->flash_cfg->trigger_flash &=
+ ~FLASH_HW_SW_STROBE_SEL_MASK;
+ else
+ led->flash_cfg->trigger_flash |=
+ FLASH_HW_SW_STROBE_SEL_MASK;
+
rc = qpnp_led_masked_write(led,
FLASH_LED_STROBE_CTRL(led->base),
led->flash_cfg->trigger_flash,
@@ -1080,30 +1087,22 @@
*/
usleep(FLASH_RAMP_UP_DELAY_US);
- if (!led->flash_cfg->strobe_type) {
- rc = qpnp_led_masked_write(led,
- FLASH_LED_STROBE_CTRL(led->base),
- led->flash_cfg->trigger_flash,
- led->flash_cfg->trigger_flash);
- if (rc) {
- dev_err(&led->spmi_dev->dev,
- "LED %d strobe reg write failed(%d)\n",
- led->id, rc);
- goto error_flash_set;
- }
- } else {
- rc = qpnp_led_masked_write(led,
- FLASH_LED_STROBE_CTRL(led->base),
- (led->flash_cfg->trigger_flash |
- FLASH_STROBE_HW),
- (led->flash_cfg->trigger_flash |
- FLASH_STROBE_HW));
- if (rc) {
- dev_err(&led->spmi_dev->dev,
- "LED %d strobe reg write failed(%d)\n",
- led->id, rc);
- goto error_flash_set;
- }
+ if (!led->flash_cfg->strobe_type)
+ led->flash_cfg->trigger_flash &=
+ ~FLASH_HW_SW_STROBE_SEL_MASK;
+ else
+ led->flash_cfg->trigger_flash |=
+ FLASH_HW_SW_STROBE_SEL_MASK;
+
+ rc = qpnp_led_masked_write(led,
+ FLASH_LED_STROBE_CTRL(led->base),
+ led->flash_cfg->trigger_flash,
+ led->flash_cfg->trigger_flash);
+ if (rc) {
+ dev_err(&led->spmi_dev->dev,
+ "LED %d strobe reg write failed(%d)\n",
+ led->id, rc);
+ goto error_flash_set;
}
}
} else {
@@ -1614,6 +1613,15 @@
}
+ /* Reset WLED enable register */
+ rc = qpnp_led_masked_write(led, WLED_MOD_CTRL_REG(led->base),
+ WLED_8_BIT_MASK, WLED_BOOST_OFF);
+ if (rc) {
+ dev_err(&led->spmi_dev->dev,
+ "WLED write ctrl reg failed(%d)\n", rc);
+ return rc;
+ }
+
/* dump wled registers */
qpnp_dump_regs(led, wled_debug_regs, ARRAY_SIZE(wled_debug_regs));
@@ -2733,7 +2741,7 @@
led->flash_cfg->enable_module = FLASH_ENABLE_MODULE;
} else
led->flash_cfg->enable_module = FLASH_ENABLE_ALL;
- led->flash_cfg->trigger_flash = FLASH_STROBE_SW;
+ led->flash_cfg->trigger_flash = FLASH_TORCH_OUTPUT;
}
rc = of_property_read_u32(node, "qcom,current", &val);
diff --git a/drivers/media/platform/msm/camera_v2/camera/camera.c b/drivers/media/platform/msm/camera_v2/camera/camera.c
index eda6150..3f7ba6b 100644
--- a/drivers/media/platform/msm/camera_v2/camera/camera.c
+++ b/drivers/media/platform/msm/camera_v2/camera/camera.c
@@ -64,9 +64,13 @@
struct msm_v4l2_event_data *event_data =
(struct msm_v4l2_event_data *)&event->u.data[0];
- if (event_data->status > MSM_CAMERA_ERR_EVT_BASE)
+ if (event_data->status > MSM_CAMERA_ERR_EVT_BASE) {
+ pr_err("%s : event_data status out of bounds\n",
+ __func__);
+ pr_err("%s : Line %d event_data->status 0X%x\n",
+ __func__, __LINE__, event_data->status);
return -EFAULT;
-
+ }
return 0;
}
@@ -461,9 +465,11 @@
struct camera_v4l2_private *sp;
sp = kzalloc(sizeof(*sp), GFP_KERNEL);
- if (!sp)
- return -ENOMEM;
+ if (!sp) {
+ pr_err("%s : memory not available\n", __func__);
+ return -ENOMEM;
+ }
filep->private_data = &sp->fh;
/* stream_id = open id */
@@ -498,9 +504,10 @@
/* free up this buffer when stream is done */
q->drv_priv =
kzalloc(sizeof(struct msm_v4l2_format_data), GFP_KERNEL);
- if (!q->drv_priv)
+ if (!q->drv_priv) {
+ pr_err("%s : memory not available\n", __func__);
return -ENOMEM;
-
+ }
q->mem_ops = msm_vb2_get_q_mem_ops();
q->ops = msm_vb2_get_q_ops();
@@ -530,38 +537,60 @@
BUG_ON(!pvdev);
rc = camera_v4l2_fh_open(filep);
- if (rc < 0)
- goto fh_open_fail;
+ if (rc < 0) {
+ pr_err("%s : camera_v4l2_fh_open failed Line %d rc %d\n",
+ __func__, __LINE__, rc);
+ goto fh_open_fail;
+ }
/* every stream has a vb2 queue */
rc = camera_v4l2_vb2_q_init(filep);
- if (rc < 0)
- goto vb2_q_fail;
+ if (rc < 0) {
+ pr_err("%s : vb2 queue init fails Line %d rc %d\n",
+ __func__, __LINE__, rc);
+ goto vb2_q_fail;
+ }
if (!atomic_read(&pvdev->opened)) {
pm_stay_awake(&pvdev->vdev->dev);
/* create a new session when first opened */
rc = msm_create_session(pvdev->vdev->num, pvdev->vdev);
- if (rc < 0)
+ if (rc < 0) {
+ pr_err("%s : session creation failed Line %d rc %d\n",
+ __func__, __LINE__, rc);
goto session_fail;
+ }
rc = msm_create_command_ack_q(pvdev->vdev->num, 0);
- if (rc < 0)
- goto command_ack_q_fail;
+ if (rc < 0) {
+ pr_err("%s : creation of command_ack queue failed\n",
+ __func__);
+ pr_err("%s : Line %d rc %d\n", __func__, __LINE__, rc);
+ goto command_ack_q_fail;
+ }
camera_pack_event(filep, MSM_CAMERA_NEW_SESSION, 0, -1, &event);
rc = msm_post_event(&event, MSM_POST_EVT_TIMEOUT);
- if (rc < 0)
+ if (rc < 0) {
+ pr_err("%s : posting of NEW_SESSION event failed\n",
+ __func__);
+ pr_err("%s : Line %d rc %d\n", __func__, __LINE__, rc);
goto post_fail;
-
+ }
rc = camera_check_event_status(&event);
- if (rc < 0)
+ if (rc < 0) {
+ pr_err("%s : checking event status fails Line %d rc %d\n",
+ __func__, __LINE__, rc);
goto post_fail;
+ }
} else {
rc = msm_create_command_ack_q(pvdev->vdev->num,
atomic_read(&pvdev->stream_cnt));
- if (rc < 0)
+ if (rc < 0) {
+ pr_err("%s : creation of command_ack queue failed Line %d rc %d\n",
+ __func__, __LINE__, rc);
goto session_fail;
+ }
}
atomic_add(1, &pvdev->opened);
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_buf_mgr.c b/drivers/media/platform/msm/camera_v2/isp/msm_buf_mgr.c
index 59b648d..a85f853 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_buf_mgr.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_buf_mgr.c
@@ -374,11 +374,14 @@
if (bufq->buf_type == ISP_SHARE_BUF) {
temp_buf_info = kzalloc(
sizeof(struct msm_isp_buffer), GFP_ATOMIC);
- temp_buf_info->buf_reuse_flag = 1;
- temp_buf_info->buf_used[id] = 1;
- temp_buf_info->buf_get_count = 1;
- list_add_tail(&temp_buf_info->share_list,
- &bufq->share_head);
+ if (temp_buf_info) {
+ temp_buf_info->buf_reuse_flag = 1;
+ temp_buf_info->buf_used[id] = 1;
+ temp_buf_info->buf_get_count = 1;
+ list_add_tail(&temp_buf_info->share_list,
+ &bufq->share_head);
+ } else
+ rc = -ENOMEM;
}
} else {
(*buf_info)->state = MSM_ISP_BUFFER_STATE_DEQUEUED;
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp.h b/drivers/media/platform/msm/camera_v2/isp/msm_isp.h
index 9dd0085..95673d5 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp.h
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp.h
@@ -71,6 +71,12 @@
DISABLE_CAMIF_IMMEDIATELY
};
+enum msm_isp_reset_type {
+ ISP_RST_HARD,
+ ISP_RST_SOFT,
+ ISP_RST_MAX
+};
+
struct msm_isp_timestamp {
/*Monotonic clock for v4l2 buffer*/
struct timeval buf_time;
@@ -147,7 +153,8 @@
struct msm_vfe_core_ops {
void (*reg_update) (struct vfe_device *vfe_dev);
- long (*reset_hw) (struct vfe_device *vfe_dev);
+ long (*reset_hw) (struct vfe_device *vfe_dev,
+ enum msm_isp_reset_type reset_type);
int (*init_hw) (struct vfe_device *vfe_dev);
void (*init_hw_reg) (struct vfe_device *vfe_dev);
void (*release_hw) (struct vfe_device *vfe_dev);
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp32.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp32.c
index 410fe8f..044f6f1 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp32.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp32.c
@@ -152,6 +152,11 @@
msm_camera_io_w_mb(0x1CFFFFFF, vfe_dev->vfe_base + 0x20);
msm_camera_io_w(0xFFFFFFFF, vfe_dev->vfe_base + 0x24);
msm_camera_io_w_mb(0x1FFFFFFF, vfe_dev->vfe_base + 0x28);
+ msm_camera_io_w(0x0, vfe_dev->vfe_base+0x6FC);
+ msm_camera_io_w( 0x10000000,vfe_dev->vfe_base + VFE32_RDI_BASE(1));
+ msm_camera_io_w( 0x10000000,vfe_dev->vfe_base + VFE32_RDI_BASE(2));
+ msm_camera_io_w(0x0, vfe_dev->vfe_base + VFE32_XBAR_BASE(0));
+ msm_camera_io_w(0x0, vfe_dev->vfe_base + VFE32_XBAR_BASE(4));
}
@@ -322,7 +327,6 @@
uint32_t irq_status0, uint32_t irq_status1,
struct msm_isp_timestamp *ts)
{
- uint32_t rdi_status;
if (!(irq_status0 & 0x20) && !(irq_status1 & 0x1C000000))
return;
@@ -335,18 +339,6 @@
if (irq_status1 & BIT(28))
msm_isp_sof_notify(vfe_dev, VFE_RAW_2, ts);
- if (vfe_dev->axi_data.stream_update) {
- rdi_status = msm_camera_io_r(vfe_dev->vfe_base +
- VFE32_XBAR_BASE(0));
- rdi_status |= msm_camera_io_r(vfe_dev->vfe_base +
- VFE32_XBAR_BASE(4));
-
- if (((rdi_status & BIT(7)) || (rdi_status & BIT(7)) ||
- (rdi_status & BIT(7)) || (rdi_status & BIT(7))) &&
- (!(irq_status0 & 0x20)))
- return;
- }
-
if (vfe_dev->axi_data.stream_update)
msm_isp_axi_stream_update(vfe_dev);
if (atomic_read(&vfe_dev->stats_data.stats_update))
@@ -365,10 +357,24 @@
msm_camera_io_w_mb(0xF, vfe_dev->vfe_base + 0x260);
}
-static long msm_vfe32_reset_hardware(struct vfe_device *vfe_dev)
+static uint32_t msm_vfe32_reset_values[ISP_RST_MAX] =
{
+ 0x3FF, /* ISP_RST_HARD reset everything */
+ 0x3EF /* ISP_RST_SOFT same as HARD RESET */
+};
+
+static long msm_vfe32_reset_hardware(struct vfe_device *vfe_dev ,
+ enum msm_isp_reset_type reset_type)
+{
+
+ uint32_t rst_val;
+ if (reset_type >= ISP_RST_MAX) {
+ pr_err("%s: Error Invalid parameter\n", __func__);
+ reset_type = ISP_RST_HARD;
+ }
+ rst_val = msm_vfe32_reset_values[reset_type];
init_completion(&vfe_dev->reset_complete);
- msm_camera_io_w_mb(0x3FF, vfe_dev->vfe_base + 0x4);
+ msm_camera_io_w_mb(rst_val, vfe_dev->vfe_base + 0x4);
return wait_for_completion_interruptible_timeout(
&vfe_dev->reset_complete, msecs_to_jiffies(50));
}
@@ -381,9 +387,8 @@
msm_camera_io_w_mb(reload_mask, vfe_dev->vfe_base + 0x38);
} else {
/*vfe32 B-family: 8610*/
- msm_camera_io_w(0x0, vfe_dev->vfe_base + 0x24);
msm_camera_io_w(0x0, vfe_dev->vfe_base + 0x28);
- msm_camera_io_w(0x0, vfe_dev->vfe_base + 0x20);
+ msm_camera_io_w(0x1C800000, vfe_dev->vfe_base + 0x20);
msm_camera_io_w_mb(0x1, vfe_dev->vfe_base + 0x18);
msm_camera_io_w(0x9AAAAAAA , vfe_dev->vfe_base + 0x600);
msm_camera_io_w(reload_mask, vfe_dev->vfe_base + 0x38);
@@ -632,9 +637,6 @@
vfe_dev->axi_data.src_info[VFE_PIX_0].active = 0;
} else if (update_state == DISABLE_CAMIF_IMMEDIATELY) {
msm_camera_io_w_mb(0x6, vfe_dev->vfe_base + 0x1E0);
- vfe_dev->hw_info->vfe_ops.axi_ops.halt(vfe_dev);
- vfe_dev->hw_info->vfe_ops.core_ops.reset_hw(vfe_dev);
- vfe_dev->hw_info->vfe_ops.core_ops.init_hw_reg(vfe_dev);
vfe_dev->axi_data.src_info[VFE_PIX_0].active = 0;
}
}
@@ -708,6 +710,8 @@
{
uint32_t val = 0;
uint32_t wm_base = VFE32_WM_BASE(stream_info->wm[plane_idx]);
+ /* FRAME BASED */
+ msm_camera_io_w(val, vfe_dev->vfe_base + wm_base);
/*WR_IMAGE_SIZE*/
msm_camera_io_w(val, vfe_dev->vfe_base + wm_base + 0x10);
/*WR_BUFFER_CFG*/
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp40.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp40.c
index 8c7890d..d53d7f6 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp40.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp40.c
@@ -581,10 +581,24 @@
msm_camera_io_w_mb(0xF, vfe_dev->vfe_base + 0x378);
}
-static long msm_vfe40_reset_hardware(struct vfe_device *vfe_dev)
+static uint32_t msm_vfe40_reset_values[ISP_RST_MAX] =
{
+ 0x1FF, /* ISP_RST_HARD reset everything */
+ 0x1EF /* ISP_RST_SOFT all modules without registers */
+};
+
+
+static long msm_vfe40_reset_hardware(struct vfe_device *vfe_dev ,
+ enum msm_isp_reset_type reset_type)
+{
+ uint32_t rst_val;
+ if (reset_type >= ISP_RST_MAX) {
+ pr_err("%s: Error Invalid parameter\n", __func__);
+ reset_type = ISP_RST_HARD;
+ }
+ rst_val = msm_vfe40_reset_values[reset_type];
init_completion(&vfe_dev->reset_complete);
- msm_camera_io_w_mb(0x1FF, vfe_dev->vfe_base + 0xC);
+ msm_camera_io_w_mb(rst_val, vfe_dev->vfe_base + 0xC);
return wait_for_completion_interruptible_timeout(
&vfe_dev->reset_complete, msecs_to_jiffies(50));
}
@@ -886,9 +900,6 @@
vfe_dev->axi_data.src_info[VFE_PIX_0].active = 0;
} else if (update_state == DISABLE_CAMIF_IMMEDIATELY) {
msm_camera_io_w_mb(0x6, vfe_dev->vfe_base + 0x2F4);
- vfe_dev->hw_info->vfe_ops.axi_ops.halt(vfe_dev);
- vfe_dev->hw_info->vfe_ops.core_ops.reset_hw(vfe_dev);
- vfe_dev->hw_info->vfe_ops.core_ops.init_hw_reg(vfe_dev);
vfe_dev->axi_data.src_info[VFE_PIX_0].active = 0;
}
}
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c
index 97b6347..c0e5a47 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -211,7 +211,7 @@
plane_cfg[plane_idx].output_width;
else
size = plane_cfg[plane_idx].output_height *
- plane_cfg[plane_idx].output_width / 2;
+ plane_cfg[plane_idx].output_width;
break;
case V4L2_PIX_FMT_NV14:
case V4L2_PIX_FMT_NV41:
@@ -220,7 +220,7 @@
plane_cfg[plane_idx].output_width;
else
size = plane_cfg[plane_idx].output_height *
- plane_cfg[plane_idx].output_width / 8;
+ plane_cfg[plane_idx].output_width;
break;
case V4L2_PIX_FMT_NV16:
case V4L2_PIX_FMT_NV61:
@@ -947,6 +947,68 @@
}
}
+static void msm_isp_update_rdi_output_count(
+ struct vfe_device *vfe_dev,
+ struct msm_vfe_axi_stream_cfg_cmd *stream_cfg_cmd)
+{
+ int i;
+ struct msm_vfe_axi_stream *stream_info;
+ struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data;
+
+ if (stream_cfg_cmd->num_streams > MAX_NUM_STREAM) {
+ return;
+ }
+
+ for (i = 0; i < stream_cfg_cmd->num_streams; i++) {
+ if (HANDLE_TO_IDX(stream_cfg_cmd->stream_handle[i])
+ > MAX_NUM_STREAM) {
+ return;
+ }
+ stream_info =
+ &axi_data->stream_info[
+ HANDLE_TO_IDX(stream_cfg_cmd->stream_handle[i])];
+ if (stream_info->stream_src < RDI_INTF_0)
+ continue;
+ if (stream_info->stream_src == RDI_INTF_0) {
+ if (stream_cfg_cmd->cmd == START_STREAM)
+ vfe_dev->axi_data.src_info[VFE_RAW_0].
+ raw_stream_count++;
+ else
+ vfe_dev->axi_data.src_info[VFE_RAW_0].
+ raw_stream_count--;
+ } else if (stream_info->stream_src == RDI_INTF_1) {
+ if (stream_cfg_cmd->cmd == START_STREAM)
+ vfe_dev->axi_data.src_info[VFE_RAW_1].
+ raw_stream_count++;
+ else
+ vfe_dev->axi_data.src_info[VFE_RAW_1].
+ raw_stream_count--;
+ } else if (stream_info->stream_src == RDI_INTF_2) {
+ if (stream_cfg_cmd->cmd == START_STREAM)
+ vfe_dev->axi_data.src_info[VFE_RAW_2].
+ raw_stream_count++;
+ else
+ vfe_dev->axi_data.src_info[VFE_RAW_2].
+ raw_stream_count--;
+ }
+
+ }
+}
+
+static uint8_t msm_isp_get_curr_stream_cnt(
+ struct vfe_device *vfe_dev)
+{
+ uint8_t curr_stream_cnt = 0;
+ curr_stream_cnt = vfe_dev->axi_data.src_info[VFE_RAW_0].
+ raw_stream_count + vfe_dev->axi_data.src_info[VFE_RAW_1].
+ raw_stream_count + vfe_dev->axi_data.src_info[VFE_RAW_2].
+ raw_stream_count + vfe_dev->axi_data.src_info[VFE_PIX_0].
+ pix_stream_count + vfe_dev->axi_data.src_info[VFE_PIX_0].
+ raw_stream_count;
+
+ return curr_stream_cnt;
+}
+
void msm_camera_io_dump_2(void __iomem *addr, int size)
{
char line_str[128], *p_str;
@@ -1144,11 +1206,23 @@
vfe_dev->hw_info->vfe_ops.core_ops.reg_update(vfe_dev);
msm_isp_update_camif_output_count(vfe_dev, stream_cfg_cmd);
+ msm_isp_update_rdi_output_count(vfe_dev, stream_cfg_cmd);
if (camif_update == ENABLE_CAMIF) {
vfe_dev->axi_data.src_info[VFE_PIX_0].frame_id = 0;
vfe_dev->hw_info->vfe_ops.core_ops.
update_camif_state(vfe_dev, camif_update);
}
+
+ if (vfe_dev->axi_data.src_info[VFE_RAW_0].raw_stream_count > 0) {
+ vfe_dev->axi_data.src_info[VFE_RAW_0].frame_id = 0;
+ }
+ else if (vfe_dev->axi_data.src_info[VFE_RAW_1].raw_stream_count > 0) {
+ vfe_dev->axi_data.src_info[VFE_RAW_1].frame_id = 0;
+ }
+ else if (vfe_dev->axi_data.src_info[VFE_RAW_2].raw_stream_count > 0) {
+ vfe_dev->axi_data.src_info[VFE_RAW_2].frame_id = 0;
+ }
+
if (wait_for_complete)
rc = msm_isp_axi_wait_for_cfg_done(vfe_dev, camif_update);
@@ -1160,7 +1234,7 @@
enum msm_isp_camif_update_state camif_update)
{
int i, rc = 0;
- uint8_t wait_for_complete = 0;
+ uint8_t wait_for_complete = 0, cur_stream_cnt = 0;
struct msm_vfe_axi_stream *stream_info;
struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data;
@@ -1216,6 +1290,15 @@
vfe_dev->hw_info->vfe_ops.core_ops.
update_camif_state(vfe_dev, DISABLE_CAMIF_IMMEDIATELY);
msm_isp_update_camif_output_count(vfe_dev, stream_cfg_cmd);
+ msm_isp_update_rdi_output_count(vfe_dev, stream_cfg_cmd);
+ cur_stream_cnt = msm_isp_get_curr_stream_cnt(vfe_dev);
+ if (cur_stream_cnt == 0) {
+ if (camif_update == DISABLE_CAMIF_IMMEDIATELY) {
+ vfe_dev->hw_info->vfe_ops.axi_ops.halt(vfe_dev);
+ }
+ vfe_dev->hw_info->vfe_ops.core_ops.reset_hw(vfe_dev, ISP_RST_SOFT);
+ vfe_dev->hw_info->vfe_ops.core_ops.init_hw_reg(vfe_dev);
+ }
for (i = 0; i < stream_cfg_cmd->num_streams; i++) {
stream_info = &axi_data->stream_info[
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c
index 3cb48d1..7347251 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -277,6 +277,43 @@
return rc;
}
+static int msm_isp_get_max_clk_rate(struct vfe_device *vfe_dev, long *rate)
+{
+ int clk_idx = 0;
+ unsigned long max_value = ~0;
+ long round_rate = 0;
+
+ if (!vfe_dev || !rate) {
+ pr_err("%s:%d failed: vfe_dev %p rate %p\n", __func__, __LINE__,
+ vfe_dev, rate);
+ return -EINVAL;
+ }
+
+ *rate = 0;
+ if (!vfe_dev->hw_info) {
+ pr_err("%s:%d failed: vfe_dev->hw_info %p\n", __func__,
+ __LINE__, vfe_dev->hw_info);
+ return -EINVAL;
+ }
+
+ clk_idx = vfe_dev->hw_info->vfe_clk_idx;
+ if (clk_idx >= ARRAY_SIZE(vfe_dev->vfe_clk)) {
+ pr_err("%s:%d failed: clk_idx %d max array size %d\n",
+ __func__, __LINE__, clk_idx,
+ ARRAY_SIZE(vfe_dev->vfe_clk));
+ return -EINVAL;
+ }
+
+ round_rate = clk_round_rate(vfe_dev->vfe_clk[clk_idx], max_value);
+ if (round_rate < 0) {
+ pr_err("%s: Invalid vfe clock rate\n", __func__);
+ return -EINVAL;
+ }
+
+ *rate = round_rate;
+ return 0;
+}
+
static int msm_isp_set_clk_rate(struct vfe_device *vfe_dev, long *rate)
{
int rc = 0;
@@ -618,6 +655,23 @@
case GET_SOC_HW_VER:
*cfg_data = vfe_dev->soc_hw_version;
break;
+ case GET_MAX_CLK_RATE: {
+ int rc = 0;
+
+ if (cmd_len < sizeof(unsigned long)) {
+ pr_err("%s:%d failed: invalid cmd len %d exp %d\n",
+ __func__, __LINE__, cmd_len,
+ sizeof(unsigned long));
+ return -EINVAL;
+ }
+ rc = msm_isp_get_max_clk_rate(vfe_dev,
+ (unsigned long *)cfg_data);
+ if (rc < 0) {
+ pr_err("%s:%d failed: rc %d\n", __func__, __LINE__, rc);
+ return -EINVAL;
+ }
+ break;
+ }
}
return 0;
}
@@ -1048,7 +1102,7 @@
return -EBUSY;
}
- rc = vfe_dev->hw_info->vfe_ops.core_ops.reset_hw(vfe_dev);
+ rc = vfe_dev->hw_info->vfe_ops.core_ops.reset_hw(vfe_dev, ISP_RST_HARD);
if (rc <= 0) {
pr_err("%s: reset timeout\n", __func__);
mutex_unlock(&vfe_dev->core_mutex);
diff --git a/drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c b/drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c
index c4a23ca..9a8963d 100755
--- a/drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c
+++ b/drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1045,7 +1045,8 @@
case MSM_SD_SHUTDOWN: {
struct ispif_device *ispif =
(struct ispif_device *)v4l2_get_subdevdata(sd);
- msm_ispif_release(ispif);
+ if (ispif && ispif->base)
+ msm_ispif_release(ispif);
return 0;
}
default:
diff --git a/drivers/media/platform/msm/camera_v2/ispif/msm_ispif_hwreg_v1.h b/drivers/media/platform/msm/camera_v2/ispif/msm_ispif_hwreg_v1.h
index c8a4366..567a263 100644
--- a/drivers/media/platform/msm/camera_v2/ispif/msm_ispif_hwreg_v1.h
+++ b/drivers/media/platform/msm/camera_v2/ispif/msm_ispif_hwreg_v1.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -34,12 +34,20 @@
#define ISPIF_VFE_m_INTF_CMD_0(m) (0x0004 + ISPIF_VFE(m))
#define ISPIF_VFE_m_INTF_CMD_1(m) (0x0030 + ISPIF_VFE(m))
#define ISPIF_VFE_m_PIX_INTF_n_CID_MASK(m, n) (0x0010 + ISPIF_VFE(m) + 4*(n))
-#define ISPIF_VFE_m_RDI_INTF_n_CID_MASK(m, n) (0x0014 + ISPIF_VFE(m) + 4*(n))
+#define ISPIF_VFE_m_RDI_INTF_n_CID_MASK(m, n) (0x0014 + ISPIF_VFE(m) + \
+ ((n > 0) ? (0x20) : 0) \
+ + 8*(n))
#define ISPIF_VFE_m_PIX_OUTPUT_n_MISR(m, n) (0x0290 + ISPIF_VFE(m) + 4*(n))
-#define ISPIF_VFE_m_RDI_OUTPUT_n_MISR_0(m, n) (0x0298 + ISPIF_VFE(m) + 8*(n))
-#define ISPIF_VFE_m_RDI_OUTPUT_n_MISR_1(m, n) (0x029C + ISPIF_VFE(m) + 8*(n))
+#define ISPIF_VFE_m_RDI_OUTPUT_n_MISR_0(m, n) (0x001C + ISPIF_VFE(m) + \
+ ((n > 0) ? (0x24) : 0) \
+ + 0xc*(n))
+#define ISPIF_VFE_m_RDI_OUTPUT_n_MISR_1(m, n) (0x0020 + ISPIF_VFE(m) + \
+ ((n > 0) ? (0x24) : 0) \
+ + 0xc*(n))
#define ISPIF_VFE_m_PIX_INTF_n_STATUS(m, n) (0x0024 + ISPIF_VFE(m) + 4*(n))
-#define ISPIF_VFE_m_RDI_INTF_n_STATUS(m, n) (0x0028 + ISPIF_VFE(m) + 4*(n))
+#define ISPIF_VFE_m_RDI_INTF_n_STATUS(m, n) (0x0028 + ISPIF_VFE(m) + \
+ ((n > 0) ? (0x34) : 0) \
+ + 8*(n))
/* Defines for compatibility with newer ISPIF versions */
#define ISPIF_RST_CMD_1_ADDR (0x0000)
diff --git a/drivers/media/platform/msm/camera_v2/jpeg_10/msm_jpeg_sync.c b/drivers/media/platform/msm/camera_v2/jpeg_10/msm_jpeg_sync.c
index 5cc51ff..4331f95 100644
--- a/drivers/media/platform/msm/camera_v2/jpeg_10/msm_jpeg_sync.c
+++ b/drivers/media/platform/msm/camera_v2/jpeg_10/msm_jpeg_sync.c
@@ -16,6 +16,7 @@
#include <linux/list.h>
#include <linux/uaccess.h>
#include <linux/slab.h>
+#include <linux/ratelimit.h>
#include <media/msm_jpeg.h>
#include "msm_jpeg_sync.h"
#include "msm_jpeg_core.h"
@@ -909,7 +910,7 @@
rc = msm_jpeg_ioctl_set_clk_rate(pgmn_dev, arg);
break;
default:
- JPEG_PR_ERR(KERN_INFO "%s:%d] cmd = %d not supported\n",
+ pr_err_ratelimited("%s:%d] cmd = %d not supported\n",
__func__, __LINE__, _IOC_NR(cmd));
rc = -EINVAL;
break;
diff --git a/drivers/media/platform/msm/camera_v2/msm.c b/drivers/media/platform/msm/camera_v2/msm.c
index 8a2c8e5..b1a23b4 100644
--- a/drivers/media/platform/msm/camera_v2/msm.c
+++ b/drivers/media/platform/msm/camera_v2/msm.c
@@ -341,17 +341,26 @@
{
struct msm_session *session = NULL;
- if (!msm_session_q)
+ if (!msm_session_q) {
+ pr_err("%s : session queue not available Line %d\n",
+ __func__, __LINE__);
return -ENODEV;
+ }
session = msm_queue_find(msm_session_q, struct msm_session,
list, __msm_queue_find_session, &session_id);
- if (session)
+ if (session) {
+ pr_err("%s : Session not found Line %d\n",
+ __func__, __LINE__);
return -EINVAL;
+ }
session = kzalloc(sizeof(*session), GFP_KERNEL);
- if (!session)
+ if (!session) {
+ pr_err("%s : Memory not available Line %d\n",
+ __func__, __LINE__);
return -ENOMEM;
+ }
session->session_id = session_id;
session->event_q.vdev = vdev;
@@ -367,17 +376,25 @@
struct msm_session *session;
struct msm_command_ack *cmd_ack;
- if (!msm_session_q)
+ if (!msm_session_q) {
+ pr_err("%s : Session queue not available Line %d\n",
+ __func__, __LINE__);
return -ENODEV;
+ }
session = msm_queue_find(msm_session_q, struct msm_session,
list, __msm_queue_find_session, &session_id);
- if (!session)
+ if (!session) {
+ pr_err("%s : Session not found Line %d\n",
+ __func__, __LINE__);
return -EINVAL;
+ }
mutex_lock(&session->lock);
cmd_ack = kzalloc(sizeof(*cmd_ack), GFP_KERNEL);
if (!cmd_ack) {
mutex_unlock(&session->lock);
+ pr_err("%s : memory not available Line %d\n",
+ __func__, __LINE__);
return -ENOMEM;
}
@@ -652,6 +669,8 @@
spin_lock_irqsave(&msm_eventq_lock, flags);
if (!msm_eventq) {
spin_unlock_irqrestore(&msm_eventq_lock, flags);
+ pr_err("%s : msm event queue not available Line %d\n",
+ __func__, __LINE__);
return -ENODEV;
}
spin_unlock_irqrestore(&msm_eventq_lock, flags);
@@ -661,14 +680,19 @@
/* send to imaging server and wait for ACK */
session = msm_queue_find(msm_session_q, struct msm_session,
list, __msm_queue_find_session, &session_id);
- if (WARN_ON(!session))
+ if (WARN_ON(!session)) {
+ pr_err("%s : session not found Line %d\n",
+ __func__, __LINE__);
return -EIO;
+ }
mutex_lock(&session->lock);
cmd_ack = msm_queue_find(&session->command_ack_q,
struct msm_command_ack, list,
__msm_queue_find_command_ack_q, &stream_id);
if (WARN_ON(!cmd_ack)) {
mutex_unlock(&session->lock);
+ pr_err("%s : cmd_ack not found Line %d\n",
+ __func__, __LINE__);
return -EIO;
}
@@ -676,6 +700,8 @@
if (timeout < 0) {
mutex_unlock(&session->lock);
+ pr_err("%s : timeout cannot be negative Line %d\n",
+ __func__, __LINE__);
return rc;
}
@@ -704,6 +730,8 @@
struct msm_command, list);
if (!cmd) {
mutex_unlock(&session->lock);
+ pr_err("%s : cmd dequeue failed Line %d\n",
+ __func__, __LINE__);
return -EINVAL;
}
@@ -711,9 +739,15 @@
/* compare cmd_ret and event */
if (WARN_ON(event->type != cmd->event.type) ||
- WARN_ON(event->id != cmd->event.id))
+ WARN_ON(event->id != cmd->event.id)) {
+ pr_err("%s : Either event type or id didnot match Line %d\n",
+ __func__, __LINE__);
+ pr_err("%s : event->type %d event->id %d\n", __func__,
+ event->type, event->id);
+ pr_err("%s : cmd->event.type %d cmd->event.id %d\n", __func__,
+ cmd->event.type, cmd->event.id);
rc = -EINVAL;
-
+ }
*event = cmd->event;
kzfree(cmd);
diff --git a/drivers/media/platform/msm/camera_v2/msm_buf_mgr/msm_generic_buf_mgr.c b/drivers/media/platform/msm/camera_v2/msm_buf_mgr/msm_generic_buf_mgr.c
index 7520ce5..cb8fcdd 100644
--- a/drivers/media/platform/msm/camera_v2/msm_buf_mgr/msm_generic_buf_mgr.c
+++ b/drivers/media/platform/msm/camera_v2/msm_buf_mgr/msm_generic_buf_mgr.c
@@ -109,8 +109,9 @@
if (!list_empty(&buf_mngr_dev->buf_qhead)) {
list_for_each_entry_safe(bufs,
save, &buf_mngr_dev->buf_qhead, entry) {
- pr_err("%s: Delete invalid bufs =%x\n", __func__,
- (unsigned int)bufs);
+ pr_err("%s: Error delete invalid bufs =%x, ses_id=%d, str_id=%d, idx=%d\n",
+ __func__, (unsigned int)bufs, bufs->session_id,
+ bufs->stream_id, bufs->vb2_buf->v4l2_buf.index);
list_del_init(&bufs->entry);
kfree(bufs);
}
@@ -118,6 +119,36 @@
spin_unlock_irqrestore(&buf_mngr_dev->buf_q_spinlock, flags);
}
+static int msm_generic_buf_mngr_open(struct v4l2_subdev *sd,
+ struct v4l2_subdev_fh *fh)
+{
+ int rc = 0;
+ struct msm_buf_mngr_device *buf_mngr_dev = v4l2_get_subdevdata(sd);
+ if (!buf_mngr_dev) {
+ pr_err("%s buf manager device NULL\n", __func__);
+ rc = -ENODEV;
+ return rc;
+ }
+ buf_mngr_dev->msm_buf_mngr_open_cnt++;
+ return rc;
+}
+
+static int msm_generic_buf_mngr_close(struct v4l2_subdev *sd,
+ struct v4l2_subdev_fh *fh)
+{
+ int rc = 0;
+ struct msm_buf_mngr_device *buf_mngr_dev = v4l2_get_subdevdata(sd);
+ if (!buf_mngr_dev) {
+ pr_err("%s buf manager device NULL\n", __func__);
+ rc = -ENODEV;
+ return rc;
+ }
+ buf_mngr_dev->msm_buf_mngr_open_cnt--;
+ if (buf_mngr_dev->msm_buf_mngr_open_cnt == 0)
+ msm_buf_mngr_sd_shutdown(buf_mngr_dev);
+ return rc;
+}
+
static long msm_buf_mngr_subdev_ioctl(struct v4l2_subdev *sd,
unsigned int cmd, void *arg)
{
@@ -141,6 +172,12 @@
case VIDIOC_MSM_BUF_MNGR_PUT_BUF:
rc = msm_buf_mngr_put_buf(buf_mngr_dev, argp);
break;
+ case VIDIOC_MSM_BUF_MNGR_INIT:
+ rc = msm_generic_buf_mngr_open(sd, NULL);
+ break;
+ case VIDIOC_MSM_BUF_MNGR_DEINIT:
+ rc = msm_generic_buf_mngr_close(sd, NULL);
+ break;
case MSM_SD_SHUTDOWN:
msm_buf_mngr_sd_shutdown(buf_mngr_dev);
break;
@@ -154,6 +191,12 @@
.ioctl = msm_buf_mngr_subdev_ioctl,
};
+static const struct v4l2_subdev_internal_ops
+ msm_generic_buf_mngr_subdev_internal_ops = {
+ .open = msm_generic_buf_mngr_open,
+ .close = msm_generic_buf_mngr_close,
+};
+
static const struct v4l2_subdev_ops msm_buf_mngr_subdev_ops = {
.core = &msm_buf_mngr_subdev_core_ops,
};
@@ -183,6 +226,8 @@
msm_buf_mngr_dev->subdev.sd.entity.type = MEDIA_ENT_T_V4L2_SUBDEV;
msm_buf_mngr_dev->subdev.sd.entity.group_id =
MSM_CAMERA_SUBDEV_BUF_MNGR;
+ msm_buf_mngr_dev->subdev.sd.internal_ops =
+ &msm_generic_buf_mngr_subdev_internal_ops;
msm_buf_mngr_dev->subdev.close_seq = MSM_SD_CLOSE_4TH_CATEGORY;
rc = msm_sd_register(&msm_buf_mngr_dev->subdev);
if (rc != 0) {
diff --git a/drivers/media/platform/msm/camera_v2/msm_buf_mgr/msm_generic_buf_mgr.h b/drivers/media/platform/msm/camera_v2/msm_buf_mgr/msm_generic_buf_mgr.h
index 56886cd..49fad22 100644
--- a/drivers/media/platform/msm/camera_v2/msm_buf_mgr/msm_generic_buf_mgr.h
+++ b/drivers/media/platform/msm/camera_v2/msm_buf_mgr/msm_generic_buf_mgr.h
@@ -36,5 +36,6 @@
spinlock_t buf_q_spinlock;
struct msm_sd_subdev subdev;
struct msm_sd_req_vb2_q vb2_ops;
+ uint32_t msm_buf_mngr_open_cnt;
};
#endif
diff --git a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c
index 215b069..10a0085 100644
--- a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c
+++ b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c
@@ -67,6 +67,9 @@
/* dump the frame command before writing to the hardware */
#define MSM_CPP_DUMP_FRM_CMD 0
+static int msm_cpp_buffer_ops(struct cpp_device *cpp_dev,
+ uint32_t buff_mgr_ops, struct msm_buf_mngr_info *buff_mgr_info);
+
#if CONFIG_MSM_CPP_DBG
#define CPP_DBG(fmt, args...) pr_err(fmt, ##args)
#else
@@ -714,6 +717,14 @@
goto req_irq_fail;
}
cpp_dev->buf_mgr_subdev = msm_buf_mngr_get_subdev();
+
+ rc = msm_cpp_buffer_ops(cpp_dev,
+ VIDIOC_MSM_BUF_MNGR_INIT, NULL);
+ if (rc < 0) {
+ pr_err("buf mngr init failed\n");
+ free_irq(cpp_dev->irq->start, cpp_dev);
+ goto req_irq_fail;
+ }
}
cpp_dev->hw_info.cpp_hw_version =
@@ -757,7 +768,12 @@
static void cpp_release_hardware(struct cpp_device *cpp_dev)
{
+ int32_t rc;
if (cpp_dev->state != CPP_STATE_BOOT) {
+ rc = msm_cpp_buffer_ops(cpp_dev,
+ VIDIOC_MSM_BUF_MNGR_DEINIT, NULL);
+ if (rc < 0)
+ pr_err("error in buf mngr deinit rc=%d\n", rc);
free_irq(cpp_dev->irq->start, cpp_dev);
tasklet_kill(&cpp_dev->cpp_tasklet);
atomic_set(&cpp_dev->irq_cnt, 0);
@@ -1192,7 +1208,7 @@
uint32_t *cpp_frame_msg;
unsigned long in_phyaddr, out_phyaddr0, out_phyaddr1;
uint16_t num_stripes = 0;
- struct msm_buf_mngr_info buff_mgr_info;
+ struct msm_buf_mngr_info buff_mgr_info, dup_buff_mgr_info;
struct msm_cpp_frame_info_t *u_frame_info =
(struct msm_cpp_frame_info_t *)ioctl_ptr->ioctl_ptr;
int32_t status = 0;
@@ -1279,19 +1295,20 @@
new_frame->duplicate_identity);
memset(&new_frame->output_buffer_info[1], 0,
sizeof(struct msm_cpp_buffer_info_t));
- memset(&buff_mgr_info, 0, sizeof(struct msm_buf_mngr_info));
- buff_mgr_info.session_id =
+ memset(&dup_buff_mgr_info, 0, sizeof(struct msm_buf_mngr_info));
+ dup_buff_mgr_info.session_id =
((new_frame->duplicate_identity >> 16) & 0xFFFF);
- buff_mgr_info.stream_id =
+ dup_buff_mgr_info.stream_id =
(new_frame->duplicate_identity & 0xFFFF);
rc = msm_cpp_buffer_ops(cpp_dev, VIDIOC_MSM_BUF_MNGR_GET_BUF,
- &buff_mgr_info);
+ &dup_buff_mgr_info);
if (rc < 0) {
rc = -EAGAIN;
pr_debug("error getting buffer rc:%d\n", rc);
- goto ERROR2;
+ goto ERROR3;
}
- new_frame->output_buffer_info[1].index = buff_mgr_info.index;
+ new_frame->output_buffer_info[1].index =
+ dup_buff_mgr_info.index;
out_phyaddr1 = msm_cpp_fetch_buffer_info(cpp_dev,
&new_frame->output_buffer_info[1],
((new_frame->duplicate_identity >> 16) & 0xFFFF),
@@ -1300,6 +1317,8 @@
if (!out_phyaddr1) {
pr_err("error gettting output physical address\n");
rc = -EINVAL;
+ msm_cpp_buffer_ops(cpp_dev, VIDIOC_MSM_BUF_MNGR_PUT_BUF,
+ &dup_buff_mgr_info);
goto ERROR3;
}
/* set duplicate enable bit */
diff --git a/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.c b/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.c
index ea16ebd..ef8b996 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.c
@@ -411,6 +411,43 @@
return rc;
}
+static int32_t msm_actuator_set_position(
+ struct msm_actuator_ctrl_t *a_ctrl,
+ struct msm_actuator_set_position_t *set_pos)
+{
+ int32_t rc = 0;
+ int32_t index;
+ uint16_t next_lens_position;
+ uint16_t delay;
+ uint32_t hw_params = 0;
+ struct msm_camera_i2c_reg_setting reg_setting;
+ CDBG("%s Enter %d\n", __func__, __LINE__);
+ if (set_pos->number_of_steps == 0)
+ return rc;
+
+ a_ctrl->i2c_tbl_index = 0;
+ for (index = 0; index < set_pos->number_of_steps; index++) {
+ next_lens_position = set_pos->pos[index];
+ delay = set_pos->delay[index];
+ a_ctrl->func_tbl->actuator_parse_i2c_params(a_ctrl,
+ next_lens_position, hw_params, delay);
+
+ reg_setting.reg_setting = a_ctrl->i2c_reg_tbl;
+ reg_setting.size = a_ctrl->i2c_tbl_index;
+ reg_setting.data_type = a_ctrl->i2c_data_type;
+
+ rc = a_ctrl->i2c_client.i2c_func_tbl->i2c_write_table_w_microdelay(
+ &a_ctrl->i2c_client, ®_setting);
+ if (rc < 0) {
+ pr_err("%s Failed I2C write Line %d\n", __func__, __LINE__);
+ return rc;
+ }
+ a_ctrl->i2c_tbl_index = 0;
+ }
+ CDBG("%s exit %d\n", __func__, __LINE__);
+ return rc;
+}
+
static int32_t msm_actuator_init(struct msm_actuator_ctrl_t *a_ctrl,
struct msm_actuator_set_info_t *set_info) {
struct reg_settings_t *init_settings = NULL;
@@ -565,6 +602,12 @@
pr_err("move focus failed %d\n", rc);
break;
+ case CFG_SET_POSITION:
+ rc = a_ctrl->func_tbl->actuator_set_position(a_ctrl,
+ &cdata->cfg.setpos);
+ if (rc < 0)
+ pr_err("actuator_set_position failed %d\n", rc);
+ break;
default:
break;
}
@@ -919,6 +962,7 @@
.actuator_set_default_focus = msm_actuator_set_default_focus,
.actuator_init_focus = msm_actuator_init_focus,
.actuator_parse_i2c_params = msm_actuator_parse_i2c_params,
+ .actuator_set_position = msm_actuator_set_position,
},
};
diff --git a/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.h b/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.h
index 809c9cf..7ec9a49 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.h
+++ b/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.h
@@ -43,6 +43,8 @@
struct damping_params_t *,
int8_t,
int16_t);
+ int32_t (*actuator_set_position)(struct msm_actuator_ctrl_t *,
+ struct msm_actuator_set_position_t *);
};
struct msm_actuator {
diff --git a/drivers/media/platform/msm/camera_v2/sensor/cci/msm_cci.c b/drivers/media/platform/msm/camera_v2/sensor/cci/msm_cci.c
index 4e1f73e..e072e53 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/cci/msm_cci.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/cci/msm_cci.c
@@ -631,7 +631,11 @@
static int msm_cci_subdev_g_chip_ident(struct v4l2_subdev *sd,
struct v4l2_dbg_chip_ident *chip)
{
- BUG_ON(!chip);
+ if (!chip) {
+ pr_err("%s:%d: NULL pointer supplied for chip ident\n",
+ __func__, __LINE__);
+ return -EINVAL;
+ }
chip->ident = V4L2_IDENT_CCI;
chip->revision = 0;
return 0;
diff --git a/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.c b/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.c
old mode 100644
new mode 100755
index 03145c8..7e84e7b
--- a/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -967,6 +967,7 @@
struct msm_sensor_power_setting_array *power_setting_array = NULL;
struct msm_sensor_power_setting *power_setting = NULL;
struct msm_camera_sensor_board_info *data = s_ctrl->sensordata;
+ uint32_t retry = 0;
s_ctrl->stop_setting_valid = 0;
CDBG("%s:%d\n", __func__, __LINE__);
@@ -1068,13 +1069,22 @@
}
}
- if (s_ctrl->func_tbl->sensor_match_id)
- rc = s_ctrl->func_tbl->sensor_match_id(s_ctrl);
- else
- rc = msm_sensor_match_id(s_ctrl);
- if (rc < 0) {
- pr_err("%s:%d match id failed rc %d\n", __func__, __LINE__, rc);
- goto power_up_failed;
+ for (retry = 0; retry < 3; retry++)
+ {
+ if (s_ctrl->func_tbl->sensor_match_id)
+ rc = s_ctrl->func_tbl->sensor_match_id(s_ctrl);
+ else
+ rc = msm_sensor_match_id(s_ctrl);
+ if (rc < 0) {
+ if (retry < 2) {
+ continue;
+ } else {
+ pr_err("%s:%d match id failed rc %d\n", __func__, __LINE__, rc);
+ goto power_up_failed;
+ }
+ } else {
+ break;
+ }
}
CDBG("%s exit\n", __func__);
@@ -1864,11 +1874,11 @@
s_ctrl->msm_sd.sd.entity.group_id = MSM_CAMERA_SUBDEV_SENSOR;
s_ctrl->msm_sd.sd.entity.name =
s_ctrl->msm_sd.sd.name;
- mount_pos = s_ctrl->sensordata->sensor_init_params->position;
- mount_pos = mount_pos << 8;
- mount_pos = mount_pos |
- (s_ctrl->sensordata->sensor_init_params->sensor_mount_angle / 90);
- s_ctrl->msm_sd.sd.entity.flags = mount_pos;
+
+ mount_pos = s_ctrl->sensordata->sensor_init_params->position << 16;
+ mount_pos = mount_pos | ((s_ctrl->sensordata->sensor_init_params->
+ sensor_mount_angle / 90) << 8);
+ s_ctrl->msm_sd.sd.entity.flags = mount_pos | MEDIA_ENT_FL_DEFAULT;
rc = camera_init_v4l2(&s_ctrl->pdev->dev, &session_id);
CDBG("%s rc %d session_id %d\n", __func__, rc, session_id);
@@ -1985,11 +1995,10 @@
s_ctrl->msm_sd.sd.entity.name =
s_ctrl->msm_sd.sd.name;
- mount_pos = s_ctrl->sensordata->sensor_init_params->position;
- mount_pos = mount_pos << 8;
- mount_pos = mount_pos |
- (s_ctrl->sensordata->sensor_init_params->sensor_mount_angle / 90);
- s_ctrl->msm_sd.sd.entity.flags = mount_pos;
+ mount_pos = s_ctrl->sensordata->sensor_init_params->position << 16;
+ mount_pos = mount_pos | ((s_ctrl->sensordata->sensor_init_params->
+ sensor_mount_angle / 90) << 8);
+ s_ctrl->msm_sd.sd.entity.flags = mount_pos | MEDIA_ENT_FL_DEFAULT;
rc = camera_init_v4l2(&s_ctrl->sensor_i2c_client->client->dev,
&session_id);
diff --git a/drivers/media/platform/msm/vidc/msm_v4l2_vidc.c b/drivers/media/platform/msm/vidc/msm_v4l2_vidc.c
index 468ba74..5e3699d 100644
--- a/drivers/media/platform/msm/vidc/msm_v4l2_vidc.c
+++ b/drivers/media/platform/msm/vidc/msm_v4l2_vidc.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -389,18 +389,22 @@
rc = msm_vidc_initialize_core(pdev, core);
if (rc) {
dprintk(VIDC_ERR, "Failed to init core\n");
- goto err_v4l2_register;
+ goto err_core_init;
}
rc = device_create_file(&pdev->dev, &dev_attr_pwr_collapse_delay);
if (rc) {
dprintk(VIDC_ERR,
"Failed to create pwr_collapse_delay sysfs node");
- goto err_v4l2_register;
+ goto err_core_init;
}
if (core->hfi_type == VIDC_HFI_Q6) {
dprintk(VIDC_ERR, "Q6 hfi device probe called\n");
nr += MSM_VIDC_MAX_DEVICES;
+ core->id = MSM_VIDC_CORE_Q6;
+ } else {
+ core->id = MSM_VIDC_CORE_VENUS;
}
+
rc = v4l2_device_register(&pdev->dev, &core->v4l2_dev);
if (rc) {
dprintk(VIDC_ERR, "Failed to register v4l2 device\n");
@@ -453,16 +457,20 @@
vidc_driver->num_cores);
goto err_cores_exceeded;
}
- core->id = vidc_driver->num_cores++;
+ vidc_driver->num_cores++;
mutex_unlock(&vidc_driver->lock);
core->device = vidc_hfi_initialize(core->hfi_type, core->id,
&core->resources, &handle_cmd_response);
- if (!core->device) {
- dprintk(VIDC_ERR, "Failed to create HFI device\n");
+ if (IS_ERR_OR_NULL(core->device)) {
mutex_lock(&vidc_driver->lock);
vidc_driver->num_cores--;
mutex_unlock(&vidc_driver->lock);
+ rc = PTR_ERR(core->device);
+ if (rc != -EPROBE_DEFER)
+ dprintk(VIDC_ERR, "Failed to create HFI device\n");
+ else
+ dprintk(VIDC_DBG, "msm_vidc: request probe defer\n");
goto err_cores_exceeded;
}
@@ -487,6 +495,8 @@
err_dec_register:
v4l2_device_unregister(&core->v4l2_dev);
err_v4l2_register:
+ device_remove_file(&pdev->dev, &dev_attr_pwr_collapse_delay);
+err_core_init:
kfree(core);
err_no_mem:
return rc;
@@ -523,6 +533,7 @@
}
static const struct of_device_id msm_vidc_dt_match[] = {
{.compatible = "qcom,msm-vidc"},
+ {}
};
MODULE_DEVICE_TABLE(of, msm_vidc_dt_match);
diff --git a/drivers/media/platform/msm/vidc/msm_vdec.c b/drivers/media/platform/msm/vidc/msm_vdec.c
index 7e24510..5c735d6 100644
--- a/drivers/media/platform/msm/vidc/msm_vdec.c
+++ b/drivers/media/platform/msm/vidc/msm_vdec.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -24,13 +24,9 @@
#define MAX_NUM_OUTPUT_BUFFERS 6
#define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8080
-#define TZ_INFO_GET_FEATURE_VERSION_ID 0x3
#define TZ_DYNAMIC_BUFFER_FEATURE_ID 12
#define TZ_FEATURE_VERSION(major, minor, patch) \
(((major & 0x3FF) << 22) | ((minor & 0x3FF) << 12) | (patch & 0xFFF))
-struct tz_get_feature_version {
- u32 feature_id;
-};
enum msm_vdec_ctrl_cluster {
MSM_VDEC_CTRL_CLUSTER_MAX = 1 << 0,
@@ -1535,17 +1531,16 @@
static int check_tz_dynamic_buffer_support(void)
{
int rc = 0;
- struct tz_get_feature_version tz_feature_id;
- unsigned int resp = 0;
+ int version = scm_get_feat_version(TZ_DYNAMIC_BUFFER_FEATURE_ID);
- tz_feature_id.feature_id = TZ_DYNAMIC_BUFFER_FEATURE_ID;
- rc = scm_call(SCM_SVC_INFO,
- TZ_INFO_GET_FEATURE_VERSION_ID, &tz_feature_id,
- sizeof(tz_feature_id), &resp, sizeof(resp));
- if ((rc) || (resp != TZ_FEATURE_VERSION(1, 1, 0))) {
+ /*
+ * if the version is < 1.1.0 then dynamic buffer allocation is
+ * not supported
+ */
+ if (version < TZ_FEATURE_VERSION(1, 1, 0)) {
dprintk(VIDC_DBG,
- "Dyamic buffer mode not supported, failed to get tz feature version id : %u, rc : %d, response : %u\n",
- tz_feature_id.feature_id, rc, resp);
+ "Dynamic buffer mode not supported, tz version is : %u vs required : %u\n",
+ version, TZ_FEATURE_VERSION(1, 1, 0));
rc = -ENOTSUPP;
}
return rc;
diff --git a/drivers/media/platform/msm/vidc/msm_venc.c b/drivers/media/platform/msm/vidc/msm_venc.c
index c0bf32c..de59e81 100644
--- a/drivers/media/platform/msm/vidc/msm_venc.c
+++ b/drivers/media/platform/msm/vidc/msm_venc.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -168,7 +168,7 @@
.name = "Intra Period for P frames",
.type = V4L2_CTRL_TYPE_INTEGER,
.minimum = 0,
- .maximum = 10*DEFAULT_FRAME_RATE,
+ .maximum = INT_MAX,
.default_value = 2*DEFAULT_FRAME_RATE-1,
.step = 1,
.menu_skip_mask = 0,
diff --git a/drivers/media/platform/msm/vidc/msm_vidc.c b/drivers/media/platform/msm/vidc/msm_vidc.c
index a9521a1..9774c3c 100644
--- a/drivers/media/platform/msm/vidc/msm_vidc.c
+++ b/drivers/media/platform/msm/vidc/msm_vidc.c
@@ -246,38 +246,38 @@
return ret;
}
-struct buffer_info *get_same_fd_buffer(struct msm_vidc_inst *inst,
- struct list_head *list, int fd, int *plane)
+struct msm_smem *get_same_fd_buffer(struct msm_vidc_inst *inst,
+ struct list_head *list, int fd)
{
struct buffer_info *temp;
- struct buffer_info *ret = NULL;
+ struct msm_smem *same_fd_handle = NULL;
+
int i;
if (fd == 0)
return NULL;
- if (!list || fd < 0 || !plane) {
+ if (!list || fd < 0) {
dprintk(VIDC_ERR, "Invalid input\n");
goto err_invalid_input;
}
- *plane = 0;
mutex_lock(&inst->lock);
list_for_each_entry(temp, list, list) {
for (i = 0; (i < temp->num_planes)
&& (i < VIDEO_MAX_PLANES); i++) {
- if (temp && temp->fd[i] == fd) {
+ if (temp && (temp->fd[i] == fd) &&
+ temp->handle[i] && temp->mapped[i]) {
temp->same_fd_ref[i]++;
dprintk(VIDC_INFO,
"Found same fd buffer\n");
- ret = temp;
- *plane = i;
+ same_fd_handle = temp->handle[i];
break;
}
}
- if (ret)
+ if (same_fd_handle)
break;
}
mutex_unlock(&inst->lock);
err_invalid_input:
- return ret;
+ return same_fd_handle;
}
struct buffer_info *device_to_uvaddr(struct msm_vidc_inst *inst,
@@ -324,7 +324,6 @@
binfo->num_planes = b->length;
binfo->memory = b->memory;
binfo->v4l2_index = b->index;
- binfo->dequeued = false;
binfo->timestamp.tv_sec = b->timestamp.tv_sec;
binfo->timestamp.tv_usec = b->timestamp.tv_usec;
dprintk(VIDC_DBG, "%s: fd[%d] = %d b->index = %d",
@@ -341,6 +340,7 @@
b->index = binfo->v4l2_index;
b->timestamp.tv_sec = binfo->timestamp.tv_sec;
b->timestamp.tv_usec = binfo->timestamp.tv_usec;
+ binfo->dequeued = false;
for (i = 0; i < binfo->num_planes; ++i) {
b->m.planes[i].reserved[0] = binfo->fd[i];
b->m.planes[i].reserved[1] = binfo->buff_off[i];
@@ -423,6 +423,7 @@
struct buffer_info *temp = NULL;
int plane = 0;
int i = 0, rc = 0;
+ struct msm_smem *same_fd_handle = NULL;
if (!b || !inst) {
dprintk(VIDC_ERR, "%s: invalid input\n", __func__);
@@ -480,16 +481,17 @@
if (rc < 0)
goto exit;
- temp = get_same_fd_buffer(inst, &inst->registered_bufs,
- b->m.planes[i].reserved[0], &plane);
+ same_fd_handle = get_same_fd_buffer(inst,
+ &inst->registered_bufs,
+ b->m.planes[i].reserved[0]);
populate_buf_info(binfo, b, i);
- if (temp) {
+ if (same_fd_handle) {
binfo->device_addr[i] =
- temp->handle[plane]->device_addr + binfo->buff_off[i];
+ same_fd_handle->device_addr + binfo->buff_off[i];
b->m.planes[i].m.userptr = binfo->device_addr[i];
binfo->mapped[i] = false;
- binfo->handle[i] = temp->handle[i];
+ binfo->handle[i] = same_fd_handle;
} else {
if (inst->map_output_buffer) {
binfo->handle[i] =
diff --git a/drivers/media/platform/msm/vidc/msm_vidc_common.c b/drivers/media/platform/msm/vidc/msm_vidc_common.c
index 8921b13..7ae2cb5 100644
--- a/drivers/media/platform/msm/vidc/msm_vidc_common.c
+++ b/drivers/media/platform/msm/vidc/msm_vidc_common.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -2960,9 +2960,6 @@
dprintk(VIDC_DBG,
"released buffer held in driver before issuing flush: 0x%x fd[0]: %d\n",
binfo->device_addr[0], binfo->fd[0]);
- /*delete this buffer info from registered list*/
- list_del(&binfo->list);
- kfree(binfo);
/*send event to client*/
v4l2_event_queue_fh(&inst->event_handler,
&buf_event);
diff --git a/drivers/media/platform/msm/vidc/q6_hfi.c b/drivers/media/platform/msm/vidc/q6_hfi.c
index 8e91f34..e70635d 100644
--- a/drivers/media/platform/msm/vidc/q6_hfi.c
+++ b/drivers/media/platform/msm/vidc/q6_hfi.c
@@ -210,8 +210,9 @@
iommu_map = &iommu_group_set->iommu_maps[i];
iommu_map->group = iommu_group_find(iommu_map->name);
if (!iommu_map->group) {
- dprintk(VIDC_ERR, "Failed to find group :%s\n",
+ dprintk(VIDC_DBG, "Failed to find group :%s\n",
iommu_map->name);
+ rc = -EPROBE_DEFER;
goto fail_group;
}
domain = iommu_group_get_iommudata(iommu_map->group);
@@ -219,6 +220,7 @@
dprintk(VIDC_ERR,
"Failed to get domain data for group %p",
iommu_map->group);
+ rc = -EINVAL;
goto fail_group;
}
iommu_map->domain = msm_find_domain_no(domain);
@@ -226,6 +228,7 @@
dprintk(VIDC_ERR,
"Failed to get domain index for domain %p",
domain);
+ rc = -EINVAL;
goto fail_group;
}
}
@@ -239,7 +242,7 @@
iommu_map->group = NULL;
iommu_map->domain = -1;
}
- return -EINVAL;
+ return rc;
}
static void q6_hfi_deregister_iommu_domains(struct q6_hfi_device *device)
@@ -275,8 +278,12 @@
device->res = res;
rc = q6_hfi_register_iommu_domains(device);
- if (rc)
- dprintk(VIDC_ERR, "Failed to register iommu domains: %d\n", rc);
+ if (rc) {
+ if (rc != -EPROBE_DEFER) {
+ dprintk(VIDC_ERR,
+ "Failed to register iommu domains: %d\n", rc);
+ }
+ }
return rc;
}
@@ -351,14 +358,15 @@
rc = q6_hfi_init_resources(device, res);
if (rc) {
- dprintk(VIDC_ERR, "Failed to init resources: %d\n", rc);
+ if (rc != -EPROBE_DEFER)
+ dprintk(VIDC_ERR, "Failed to init resources: %d\n", rc);
goto err_fail_init_res;
}
return device;
err_fail_init_res:
q6_hfi_delete_device(device);
- return NULL;
+ return ERR_PTR(rc);
}
void q6_hfi_delete_device(void *device)
@@ -1379,6 +1387,12 @@
}
hdev->hfi_device_data = q6_hfi_get_device(device_id, res, callback);
+ if (IS_ERR_OR_NULL(hdev->hfi_device_data)) {
+ rc = PTR_ERR(hdev->hfi_device_data);
+ rc = !rc ? -EINVAL : rc;
+ goto err_hfi_init;
+ }
+
q6_init_hfi_callbacks(hdev);
err_hfi_init:
diff --git a/drivers/media/platform/msm/vidc/venus_hfi.c b/drivers/media/platform/msm/vidc/venus_hfi.c
index 2596a30..9359823 100644
--- a/drivers/media/platform/msm/vidc/venus_hfi.c
+++ b/drivers/media/platform/msm/vidc/venus_hfi.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -85,6 +85,9 @@
static int venus_hfi_power_enable(void *dev);
+static unsigned long venus_hfi_get_clock_rate(struct venus_core_clock *clock,
+ int num_mbs_per_sec);
+
static void venus_hfi_dump_packet(u8 *packet)
{
u32 c = 0, packet_size = *(u32 *)packet;
@@ -853,6 +856,7 @@
fail_clk_enable:
for (i--; i >= 0; i--) {
cl = &device->resources.clock[i];
+ usleep(100);
clk_disable(cl->clk);
}
return rc;
@@ -861,7 +865,7 @@
/*Calling function is responsible to acquire device->clk_pwr_lock*/
static inline void venus_hfi_clk_disable(struct venus_hfi_device *device)
{
- int i;
+ int i, rc = 0;
struct venus_core_clock *cl;
if (!device) {
@@ -873,8 +877,17 @@
return;
}
+ /* We get better power savings if we lower the venus core clock to the
+ * lowest level before disabling it. */
+ rc = clk_set_rate(device->resources.clock[VCODEC_CLK].clk,
+ venus_hfi_get_clock_rate(
+ &device->resources.clock[VCODEC_CLK], 0));
+ if (rc)
+ dprintk(VIDC_WARN, "Failed to set clock rate to min: %d\n", rc);
+
for (i = 0; i <= device->clk_gating_level; i++) {
cl = &device->resources.clock[i];
+ usleep(100);
clk_disable(cl->clk);
}
device->clocks_enabled = 0;
@@ -1523,11 +1536,16 @@
int enable)
{
u8 packet[VIDC_IFACEQ_VAR_SMALL_PKT_SIZE];
+ u32 hw_version;
struct hfi_cmd_sys_set_property_packet *pkt =
(struct hfi_cmd_sys_set_property_packet *) &packet;
- create_pkt_cmd_sys_idle_indicator(pkt, enable);
- if (venus_hfi_iface_cmdq_write(device, pkt))
- return -ENOTEMPTY;
+ hw_version = venus_hfi_read_register(device, VIDC_WRAPPER_HW_VERSION);
+ dprintk(VIDC_DBG, "Venus HW version: 0x%x\n", hw_version);
+ if ((hw_version & 0xFFFF0000) != 0x10030000) {
+ create_pkt_cmd_sys_idle_indicator(pkt, enable);
+ if (venus_hfi_iface_cmdq_write(device, pkt))
+ return -ENOTEMPTY;
+ }
return 0;
}
@@ -1635,15 +1653,23 @@
return 0;
}
-static int venus_hfi_is_cmd_pending(struct venus_hfi_device *dev)
+static int venus_hfi_get_q_size(struct venus_hfi_device *dev,
+ unsigned int q_index)
{
struct hfi_queue_header *queue;
struct vidc_iface_q_info *q_info;
u32 write_ptr, read_ptr;
u32 rc = 0;
- q_info = &dev->iface_queues[VIDC_IFACEQ_CMDQ_IDX];
- if (!q_info)
+ if (q_index >= VIDC_IFACEQ_NUMQ) {
+ dprintk(VIDC_ERR, "Invalid q index: %d\n", q_index);
+ return -ENOENT;
+ }
+
+ q_info = &dev->iface_queues[q_index];
+ if (!q_info) {
dprintk(VIDC_ERR, "cannot read shared Q's");
+ return -ENOENT;
+ }
queue = (struct hfi_queue_header *) q_info->q_hdr;
if (!queue) {
dprintk(VIDC_ERR, "queue not present");
@@ -1667,9 +1693,12 @@
}
/*SYS Idle should be last message so mask any further interrupts
* until clocks are enabled again.*/
- venus_hfi_write_register(device,
- VIDC_WRAPPER_INTR_MASK,
- VIDC_WRAPPER_INTR_MASK_A2HVCODEC_BMSK | VIDC_WRAPPER_INTR_MASK_A2HCPU_BMSK, 0);
+ if (!venus_hfi_get_q_size(device, VIDC_IFACEQ_MSGQ_IDX)) {
+ venus_hfi_write_register(device,
+ VIDC_WRAPPER_INTR_MASK,
+ VIDC_WRAPPER_INTR_MASK_A2HVCODEC_BMSK |
+ VIDC_WRAPPER_INTR_MASK_A2HCPU_BMSK, 0);
+ }
venus_hfi_clk_disable(device);
if (!queue_delayed_work(device->venus_pm_workq, &venus_hfi_pm_work,
msecs_to_jiffies(msm_vidc_pwr_collapse_delay)))
@@ -2512,7 +2541,7 @@
}
mutex_lock(&device->write_lock);
mutex_lock(&device->clk_pwr_lock);
- rc = venus_hfi_is_cmd_pending(device);
+ rc = venus_hfi_get_q_size(device, VIDC_IFACEQ_CMDQ_IDX);
ctrl_status = venus_hfi_read_register(
device,
VIDC_CPU_CS_SCIACMDARG0);
@@ -2777,13 +2806,17 @@
mutex_lock(&device->clk_pwr_lock);
if (device->clocks_enabled) {
for (i = VCODEC_CLK; i < VCODEC_MAX_CLKS; i++) {
+ if (i == VCODEC_OCMEM_CLK && !device->res->has_ocmem)
+ continue;
cl = &device->resources.clock[i];
+ usleep(100);
clk_disable(cl->clk);
}
} else {
for (i = device->clk_gating_level + 1;
i < VCODEC_MAX_CLKS; i++) {
cl = &device->resources.clock[i];
+ usleep(100);
clk_disable(cl->clk);
}
}
@@ -2826,6 +2859,7 @@
fail_clk_enable:
for (; i >= 0; i--) {
cl = &device->resources.clock[i];
+ usleep(100);
clk_disable_unprepare(cl->clk);
}
mutex_unlock(&device->clk_pwr_lock);
@@ -2848,8 +2882,9 @@
iommu_map = &iommu_group_set->iommu_maps[i];
iommu_map->group = iommu_group_find(iommu_map->name);
if (!iommu_map->group) {
- dprintk(VIDC_ERR, "Failed to find group :%s\n",
+ dprintk(VIDC_DBG, "Failed to find group :%s\n",
iommu_map->name);
+ rc = -EPROBE_DEFER;
goto fail_group;
}
domain = iommu_group_get_iommudata(iommu_map->group);
@@ -2857,6 +2892,7 @@
dprintk(VIDC_ERR,
"Failed to get domain data for group %p",
iommu_map->group);
+ rc = -EINVAL;
goto fail_group;
}
iommu_map->domain = msm_find_domain_no(domain);
@@ -2864,6 +2900,7 @@
dprintk(VIDC_ERR,
"Failed to get domain index for domain %p",
domain);
+ rc = -EINVAL;
goto fail_group;
}
}
@@ -2877,7 +2914,7 @@
iommu_map->group = NULL;
iommu_map->domain = -1;
}
- return -EINVAL;
+ return rc;
}
static void venus_hfi_deregister_iommu_domains(struct venus_hfi_device *device)
@@ -3164,7 +3201,10 @@
rc = venus_hfi_register_iommu_domains(device, res);
if (rc) {
- dprintk(VIDC_ERR, "Failed to register iommu domains: %d\n", rc);
+ if (rc != -EPROBE_DEFER) {
+ dprintk(VIDC_ERR,
+ "Failed to register iommu domains: %d\n", rc);
+ }
goto err_register_iommu_domain;
}
@@ -3495,7 +3535,7 @@
struct venus_hfi_device *hdevice = NULL;
int rc = 0;
- if (device_id || !res || !callback) {
+ if (!res || !callback) {
dprintk(VIDC_ERR, "Invalid Paramters");
return NULL;
}
@@ -3570,14 +3610,15 @@
rc = venus_hfi_init_resources(device, res);
if (rc) {
- dprintk(VIDC_ERR, "Failed to init resources: %d\n", rc);
+ if (rc != -EPROBE_DEFER)
+ dprintk(VIDC_ERR, "Failed to init resources: %d\n", rc);
goto err_fail_init_res;
}
return device;
err_fail_init_res:
venus_hfi_delete_device(device);
- return NULL;
+ return ERR_PTR(rc);
}
void venus_hfi_delete_device(void *device)
@@ -3661,6 +3702,12 @@
}
hdev->hfi_device_data = venus_hfi_get_device(device_id, res, callback);
+ if (IS_ERR_OR_NULL(hdev->hfi_device_data)) {
+ rc = PTR_ERR(hdev->hfi_device_data);
+ rc = !rc ? -EINVAL : rc;
+ goto err_venus_hfi_init;
+ }
+
venus_init_hfi_callbacks(hdev);
err_venus_hfi_init:
diff --git a/drivers/media/platform/msm/vidc/vidc_hfi.c b/drivers/media/platform/msm/vidc/vidc_hfi.c
index 46293a6..ef0de37 100644
--- a/drivers/media/platform/msm/vidc/vidc_hfi.c
+++ b/drivers/media/platform/msm/vidc/vidc_hfi.c
@@ -44,7 +44,8 @@
}
if (rc) {
- dprintk(VIDC_ERR, "%s device init failed rc = %d",
+ if (rc != -EPROBE_DEFER)
+ dprintk(VIDC_ERR, "%s device init failed rc = %d",
__func__, rc);
goto err_hfi_init;
}
@@ -53,7 +54,7 @@
err_hfi_init:
kfree(hdev);
- return NULL;
+ return ERR_PTR(rc);
}
void vidc_hfi_deinitialize(enum msm_vidc_hfi_type hfi_type,
diff --git a/drivers/media/platform/msm/wfd/enc-venus-subdev.c b/drivers/media/platform/msm/wfd/enc-venus-subdev.c
index 9cd199b..7e64714 100644
--- a/drivers/media/platform/msm/wfd/enc-venus-subdev.c
+++ b/drivers/media/platform/msm/wfd/enc-venus-subdev.c
@@ -377,7 +377,8 @@
goto vidc_wq_create_fail;
}
- inst->vidc_context = msm_vidc_open(MSM_VIDC_CORE_0, MSM_VIDC_ENCODER);
+ inst->vidc_context = msm_vidc_open(MSM_VIDC_CORE_VENUS,
+ MSM_VIDC_ENCODER);
if (!inst->vidc_context) {
WFD_MSG_ERR("Failed to create vidc context\n");
rc = -ENXIO;
diff --git a/drivers/media/platform/msm/wfd/vsg-subdev.c b/drivers/media/platform/msm/wfd/vsg-subdev.c
index c20250e..433468e 100644
--- a/drivers/media/platform/msm/wfd/vsg-subdev.c
+++ b/drivers/media/platform/msm/wfd/vsg-subdev.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -23,12 +23,8 @@
#define DEFAULT_MAX_FRAME_INTERVAL (1*NSEC_PER_SEC)
#define DEFAULT_MODE ((enum vsg_modes)VSG_MODE_CFR)
#define MAX_BUFS_BUSY_WITH_ENC 5
+#define TICKS_PER_TIMEOUT 2
-static void vsg_reset_timer(struct hrtimer *timer, ktime_t time)
-{
- hrtimer_forward_now(timer, time);
- hrtimer_restart(timer);
-}
static int vsg_release_input_buffer(struct vsg_context *context,
struct vsg_buf_info *buf)
@@ -120,9 +116,10 @@
INIT_LIST_HEAD(&buf_info->node);
ktime_get_ts(&buf_info->time);
- vsg_reset_timer(&context->threshold_timer, ns_to_ktime(
- context->max_frame_interval));
-
+ if (work->work_delayed) {
+ buf_info->time = timespec_sub(buf_info->time,
+ context->delayed_frame_interval);
+ }
temp = NULL;
list_for_each_entry(temp, &context->busy_queue.node, node) {
if (mdp_buf_info_equals(&temp->mdp_buf_info,
@@ -233,6 +230,7 @@
INIT_WORK(&new_work->work, vsg_work_func);
new_work->context = context;
+ new_work->work_delayed = work->work_delayed;
queue_work(context->work_queue, &new_work->work);
}
@@ -245,25 +243,43 @@
{
struct vsg_context *context = NULL;
struct vsg_work *task = NULL;
-
- task = kzalloc(sizeof(*task), GFP_ATOMIC);
+ int64_t max_frame_interval = 0;
context = container_of(timer, struct vsg_context,
threshold_timer);
+
+ if (!context) {
+ WFD_MSG_ERR("Context not proper in %s", __func__);
+ goto threshold_err_no_context;
+ }
+ max_frame_interval = context->max_frame_interval;
+ if (list_empty(&context->free_queue.node) && !context->vsync_wait) {
+ context->vsync_wait = true;
+ max_frame_interval = context->max_frame_interval /
+ TICKS_PER_TIMEOUT;
+ goto restart_timer;
+ } else if (context->vsync_wait) {
+ max_frame_interval = context->max_frame_interval /
+ TICKS_PER_TIMEOUT;
+ context->vsync_wait = false;
+ }
+
+ task = kzalloc(sizeof(*task), GFP_ATOMIC);
if (!task) {
WFD_MSG_ERR("Out of memory in %s", __func__);
goto threshold_err_bad_param;
- } else if (!context) {
- WFD_MSG_ERR("Context not proper in %s", __func__);
- goto threshold_err_no_context;
}
INIT_WORK(&task->work, vsg_timer_helper_func);
task->context = context;
+ task->work_delayed = false;
+ if (max_frame_interval < context->max_frame_interval)
+ task->work_delayed = true;
queue_work(context->work_queue, &task->work);
+restart_timer:
threshold_err_bad_param:
hrtimer_forward_now(&context->threshold_timer, ns_to_ktime(
- context->max_frame_interval));
+ max_frame_interval));
return HRTIMER_RESTART;
threshold_err_no_context:
return HRTIMER_NORESTART;
@@ -298,6 +314,7 @@
context->last_buffer = NULL;
context->mode = DEFAULT_MODE;
context->state = VSG_STATE_NONE;
+ context->vsync_wait = false;
mutex_init(&context->mutex);
sd->dev_priv = context;
@@ -444,7 +461,7 @@
* otherwise, diff between two consecutive frames might
* be less than max_frame_interval (for just one sample)
*/
- vsg_reset_timer(&context->threshold_timer,
+ hrtimer_forward_now(&context->threshold_timer,
ns_to_ktime(context->max_frame_interval));
}
}
@@ -568,7 +585,8 @@
context->max_frame_interval, interval);
context->max_frame_interval = interval;
}
-
+ context->delayed_frame_interval =
+ ns_to_timespec(context->frame_interval / TICKS_PER_TIMEOUT);
mutex_unlock(&context->mutex);
return 0;
}
diff --git a/drivers/media/platform/msm/wfd/vsg-subdev.h b/drivers/media/platform/msm/wfd/vsg-subdev.h
index 3347e5b..bbaced1 100644
--- a/drivers/media/platform/msm/wfd/vsg-subdev.h
+++ b/drivers/media/platform/msm/wfd/vsg-subdev.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -56,7 +56,7 @@
};
struct vsg_context {
- struct vsg_buf_info free_queue, busy_queue;
+ struct vsg_buf_info free_queue, busy_queue;
struct vsg_msg_ops vmops;
/* All time related values below in nanosecs */
int64_t frame_interval, max_frame_interval, frame_interval_variance;
@@ -66,11 +66,14 @@
struct vsg_buf_info *last_buffer;
int mode;
int state;
+ bool vsync_wait;
+ struct timespec delayed_frame_interval;
};
struct vsg_work {
struct vsg_context *context;
struct work_struct work;
+ bool work_delayed;
};
struct vsg_encode_work {
diff --git a/drivers/media/radio/radio-iris.c b/drivers/media/radio/radio-iris.c
index 188673d..9f18508 100644
--- a/drivers/media/radio/radio-iris.c
+++ b/drivers/media/radio/radio-iris.c
@@ -2391,6 +2391,7 @@
struct sk_buff *skb)
{
struct iris_device *radio = video_get_drvdata(video_get_dev());
+ radio->search_on = 0;
iris_q_event(radio, IRIS_EVT_SEEK_COMPLETE);
}
@@ -2920,6 +2921,7 @@
{
int retval = 0;
enum search_t srch;
+ int saved_val;
if (unlikely(radio == NULL)) {
FMDERR(":radio is null");
@@ -2927,6 +2929,7 @@
}
srch = radio->g_search_mode & SRCH_MODE;
+ saved_val = radio->search_on;
radio->search_on = on;
if (on) {
switch (srch) {
@@ -2961,6 +2964,8 @@
retval = hci_cmd(HCI_FM_CANCEL_SEARCH_CMD, radio->fm_hdev);
}
+ if (retval < 0)
+ radio->search_on = saved_val;
return retval;
}
@@ -3013,18 +3018,22 @@
static int iris_recv_set_region(struct iris_device *radio, int req_region)
{
int retval;
+ int saved_val;
if (unlikely(radio == NULL)) {
FMDERR(":radio is null");
return -EINVAL;
}
-
+ saved_val = radio->region;
radio->region = req_region;
retval = hci_set_fm_recv_conf(
&radio->recv_conf,
radio->fm_hdev);
+ if (retval < 0)
+ radio->region = saved_val;
+
return retval;
}
@@ -3032,16 +3041,22 @@
static int iris_trans_set_region(struct iris_device *radio, int req_region)
{
int retval;
+ int saved_val;
if (unlikely(radio == NULL)) {
FMDERR(":radio is null");
return -EINVAL;
}
+
+ saved_val = radio->region;
radio->region = req_region;
retval = hci_set_fm_trans_conf(
&radio->trans_conf,
radio->fm_hdev);
+
+ if (retval < 0)
+ radio->region = saved_val;
return retval;
}
@@ -3129,30 +3144,44 @@
if (unlikely(radio == NULL)) {
FMDERR(":radio is null");
- return -EINVAL;
+ retval = -EINVAL;
+ goto END;
}
if (unlikely(ctrl == NULL)) {
FMDERR("%s, v4l2 ctrl is null\n", __func__);
- return -EINVAL;
+ retval = -EINVAL;
+ goto END;
}
switch (ctrl->id) {
case V4L2_CID_AUDIO_VOLUME:
break;
case V4L2_CID_AUDIO_MUTE:
- ctrl->value = radio->mute_mode.hard_mute;
+ if (is_valid_hard_mute(radio->mute_mode.hard_mute))
+ ctrl->value = radio->mute_mode.hard_mute;
+ else
+ retval = -EINVAL;
break;
case V4L2_CID_PRIVATE_IRIS_SRCHMODE:
- ctrl->value = radio->g_search_mode;
+ if (is_valid_srch_mode(radio->g_search_mode))
+ ctrl->value = radio->g_search_mode;
+ else
+ retval = -EINVAL;
break;
case V4L2_CID_PRIVATE_IRIS_SCANDWELL:
- ctrl->value = radio->g_scan_time;
+ if (is_valid_scan_dwell_prd(radio->g_scan_time))
+ ctrl->value = radio->g_scan_time;
+ else
+ retval = -EINVAL;
break;
case V4L2_CID_PRIVATE_IRIS_SRCHON:
ctrl->value = radio->search_on;
break;
case V4L2_CID_PRIVATE_IRIS_STATE:
- ctrl->value = radio->mode;
+ if (is_valid_fm_state(radio->mode))
+ ctrl->value = radio->mode;
+ else
+ retval = -EINVAL;
break;
case V4L2_CID_PRIVATE_IRIS_IOVERC:
retval = hci_cmd(HCI_FM_STATION_DBG_PARAM_CMD, radio->fm_hdev);
@@ -3162,68 +3191,115 @@
break;
case V4L2_CID_PRIVATE_IRIS_INTDET:
retval = hci_cmd(HCI_FM_STATION_DBG_PARAM_CMD, radio->fm_hdev);
- if (retval < 0)
- return retval;
- ctrl->value = radio->st_dbg_param.in_det_out;
+ if (retval == 0)
+ ctrl->value = radio->st_dbg_param.in_det_out;
+ else
+ retval = -EINVAL;
break;
case V4L2_CID_PRIVATE_IRIS_REGION:
ctrl->value = radio->region;
break;
case V4L2_CID_PRIVATE_IRIS_SIGNAL_TH:
retval = hci_cmd(HCI_FM_GET_SIGNAL_TH_CMD, radio->fm_hdev);
- if (retval < 0) {
- FMDERR("Error in get signal threshold %d\n", retval);
- return retval;
- }
- ctrl->value = radio->sig_th.sig_threshold;
+ if ((retval == 0) &&
+ is_valid_sig_th(radio->sig_th.sig_threshold))
+ ctrl->value = radio->sig_th.sig_threshold;
+ else
+ retval = -EINVAL;
break;
case V4L2_CID_PRIVATE_IRIS_SRCH_PTY:
- ctrl->value = radio->srch_rds.srch_pty;
+ if (is_valid_pty(radio->srch_rds.srch_pty))
+ ctrl->value = radio->srch_rds.srch_pty;
+ else
+ retval = -EINVAL;
break;
case V4L2_CID_PRIVATE_IRIS_SRCH_PI:
- ctrl->value = radio->srch_rds.srch_pi;
+ if (is_valid_pi(radio->srch_rds.srch_pi))
+ ctrl->value = radio->srch_rds.srch_pi;
+ else
+ retval = -EINVAL;
break;
case V4L2_CID_PRIVATE_IRIS_SRCH_CNT:
- ctrl->value = radio->srch_st_result.num_stations_found;
+ if (is_valid_srch_station_cnt(
+ radio->srch_st_result.num_stations_found))
+ ctrl->value = radio->srch_st_result.num_stations_found;
+ else
+ retval = -EINVAL;
break;
case V4L2_CID_PRIVATE_IRIS_EMPHASIS:
if (radio->mode == FM_RECV) {
- ctrl->value = radio->recv_conf.emphasis;
+ retval = hci_cmd(HCI_FM_GET_RECV_CONF_CMD,
+ radio->fm_hdev);
+ if ((retval == 0) &&
+ is_valid_emphasis(radio->recv_conf.emphasis))
+ ctrl->value = radio->recv_conf.emphasis;
+ else
+ retval = -EINVAL;
} else if (radio->mode == FM_TRANS) {
- ctrl->value = radio->trans_conf.emphasis;
+ retval = hci_cmd(HCI_FM_GET_TX_CONFIG,
+ radio->fm_hdev);
+ if ((retval == 0) &&
+ is_valid_emphasis(radio->trans_conf.emphasis))
+ ctrl->value = radio->trans_conf.emphasis;
+ else
+ retval = -EINVAL;
} else {
- FMDERR("Error in radio mode"
- " %d\n", retval);
- return -EINVAL;
+ retval = -EINVAL;
+ FMDERR("Error in radio mode"" %d\n", retval);
}
break;
case V4L2_CID_PRIVATE_IRIS_RDS_STD:
if (radio->mode == FM_RECV) {
- ctrl->value = radio->recv_conf.rds_std;
+ retval = hci_cmd(HCI_FM_GET_RECV_CONF_CMD,
+ radio->fm_hdev);
+ if ((retval == 0) &&
+ is_valid_rds_std(radio->recv_conf.rds_std))
+ ctrl->value = radio->recv_conf.rds_std;
+ else
+ retval = -EINVAL;
} else if (radio->mode == FM_TRANS) {
- ctrl->value = radio->trans_conf.rds_std;
+ retval = hci_cmd(HCI_FM_GET_TX_CONFIG,
+ radio->fm_hdev);
+ if ((retval == 0) &&
+ is_valid_rds_std(radio->trans_conf.rds_std))
+ ctrl->value = radio->trans_conf.rds_std;
+ else
+ retval = -EINVAL;
} else {
+ retval = -EINVAL;
FMDERR("Error in radio mode"
" %d\n", retval);
- return -EINVAL;
}
break;
case V4L2_CID_PRIVATE_IRIS_SPACING:
if (radio->mode == FM_RECV) {
- ctrl->value = radio->recv_conf.ch_spacing;
+ retval = hci_cmd(HCI_FM_GET_RECV_CONF_CMD,
+ radio->fm_hdev);
+ if ((retval == 0) &&
+ is_valid_chan_spacing(
+ radio->recv_conf.ch_spacing))
+ ctrl->value = radio->recv_conf.ch_spacing;
+ else
+ retval = -EINVAL;
} else {
+ retval = -EINVAL;
FMDERR("Error in radio mode"
" %d\n", retval);
- return -EINVAL;
}
break;
case V4L2_CID_PRIVATE_IRIS_RDSON:
if (radio->mode == FM_RECV) {
- ctrl->value = radio->recv_conf.rds_std;
+ retval = hci_cmd(HCI_FM_GET_RECV_CONF_CMD,
+ radio->fm_hdev);
+ if ((retval == 0) &&
+ is_valid_rds_std(radio->recv_conf.rds_std))
+ ctrl->value = radio->recv_conf.rds_std;
+ else
+ retval = -EINVAL;
} else {
+ retval = -EINVAL;
FMDERR("Error in radio mode"
" %d\n", retval);
- return -EINVAL;
}
break;
case V4L2_CID_PRIVATE_IRIS_RDSGROUP_MASK:
@@ -3243,7 +3319,12 @@
ctrl->value = radio->g_antenna;
break;
case V4L2_CID_PRIVATE_IRIS_SOFT_MUTE:
- ctrl->value = radio->mute_mode.soft_mute;
+ retval = hci_cmd(HCI_FM_STATION_DBG_PARAM_CMD, radio->fm_hdev);
+ if ((retval == 0) &&
+ is_valid_soft_mute(radio->mute_mode.soft_mute))
+ ctrl->value = radio->mute_mode.soft_mute;
+ else
+ retval = -EINVAL;
break;
case V4L2_CID_PRIVATE_IRIS_DO_CALIBRATION:
retval = iris_do_calibration(radio);
@@ -3252,47 +3333,30 @@
if (radio->mode == FM_RECV) {
retval = hci_cmd(HCI_FM_GET_STATION_PARAM_CMD,
radio->fm_hdev);
- if (retval < 0) {
- FMDERR("Get SINR Failed");
- return retval;
- }
- ctrl->value = radio->fm_st_rsp.station_rsp.sinr;
-
+ if (retval == 0)
+ ctrl->value = radio->fm_st_rsp.station_rsp.sinr;
} else
retval = -EINVAL;
break;
case V4L2_CID_PRIVATE_INTF_HIGH_THRESHOLD:
retval = hci_cmd(HCI_FM_GET_DET_CH_TH_CMD, radio->fm_hdev);
- if (retval < 0) {
- FMDERR("Get High det threshold failed %x", retval);
- return retval;
- }
- ctrl->value = radio->ch_det_threshold.high_th;
+ if (retval == 0)
+ ctrl->value = radio->ch_det_threshold.high_th;
break;
case V4L2_CID_PRIVATE_INTF_LOW_THRESHOLD:
retval = hci_cmd(HCI_FM_GET_DET_CH_TH_CMD, radio->fm_hdev);
- if (retval < 0) {
- FMDERR("Get Low det threshold failed %x", retval);
- return retval;
- }
- ctrl->value = radio->ch_det_threshold.low_th;
+ if (retval == 0)
+ ctrl->value = radio->ch_det_threshold.low_th;
break;
case V4L2_CID_PRIVATE_SINR_THRESHOLD:
retval = hci_cmd(HCI_FM_GET_DET_CH_TH_CMD, radio->fm_hdev);
- if (retval < 0) {
- FMDERR("Get SINR threshold failed %x", retval);
- return retval;
- }
- ctrl->value = radio->ch_det_threshold.sinr;
+ if (retval == 0)
+ ctrl->value = radio->ch_det_threshold.sinr;
break;
case V4L2_CID_PRIVATE_SINR_SAMPLES:
retval = hci_cmd(HCI_FM_GET_DET_CH_TH_CMD, radio->fm_hdev);
- if (retval < 0) {
- FMDERR("Get SINR samples failed %x", retval);
- return retval;
- }
-
- ctrl->value = radio->ch_det_threshold.sinr_samples;
+ if (retval == 0)
+ ctrl->value = radio->ch_det_threshold.sinr_samples;
break;
case V4L2_CID_PRIVATE_VALID_CHANNEL:
ctrl->value = radio->is_station_valid;
@@ -3304,13 +3368,11 @@
rd.param = 0;
retval = hci_def_data_read(&rd, radio->fm_hdev);
- if (retval < 0) {
- FMDERR("Get AF Jump Threshold failed %x", retval);
- return retval;
+ if (retval == 0) {
+ lsb = radio->default_data.data[AF_RMSSI_TH_LSB_OFFSET];
+ msb = radio->default_data.data[AF_RMSSI_TH_MSB_OFFSET];
+ ctrl->value = ((msb << 8) | lsb);
}
- lsb = radio->default_data.data[AF_RMSSI_TH_LSB_OFFSET];
- msb = radio->default_data.data[AF_RMSSI_TH_MSB_OFFSET];
- ctrl->value = ((msb << 8) | lsb);
break;
case V4L2_CID_PRIVATE_AF_RMSSI_SAMPLES:
rd.mode = FM_RDS_CNFG_MODE;
@@ -3319,11 +3381,9 @@
rd.param = 0;
retval = hci_def_data_read(&rd, radio->fm_hdev);
- if (retval < 0) {
- FMDERR("Get AF jump rmssi samples failed %x", retval);
- return retval;
- }
- ctrl->value = radio->default_data.data[AF_RMSSI_SAMPLES_OFFSET];
+ if (retval == 0)
+ ctrl->value =
+ radio->default_data.data[AF_RMSSI_SAMPLES_OFFSET];
break;
case V4L2_CID_PRIVATE_GOOD_CH_RMSSI_TH:
rd.mode = FM_RX_CONFG_MODE;
@@ -3332,13 +3392,12 @@
rd.param = 0;
retval = hci_def_data_read(&rd, radio->fm_hdev);
- if (retval < 0) {
- FMDERR("get good channel rmssi th failed %x", retval);
- return retval;
+ if (retval == 0) {
+ ctrl->value =
+ radio->default_data.data[GD_CH_RMSSI_TH_OFFSET];
+ if (ctrl->value > MAX_GD_CH_RMSSI_TH)
+ ctrl->value -= 256;
}
- ctrl->value = radio->default_data.data[GD_CH_RMSSI_TH_OFFSET];
- if (ctrl->value > MAX_GD_CH_RMSSI_TH)
- ctrl->value -= 256;
break;
case V4L2_CID_PRIVATE_SRCHALGOTYPE:
rd.mode = FM_RX_CONFG_MODE;
@@ -3347,11 +3406,9 @@
rd.param = 0;
retval = hci_def_data_read(&rd, radio->fm_hdev);
- if (retval < 0) {
- FMDERR("get search algo type failed %x", retval);
- return retval;
- }
- ctrl->value = radio->default_data.data[SRCH_ALGO_TYPE_OFFSET];
+ if (retval == 0)
+ ctrl->value =
+ radio->default_data.data[SRCH_ALGO_TYPE_OFFSET];
break;
case V4L2_CID_PRIVATE_SINRFIRSTSTAGE:
rd.mode = FM_RX_CONFG_MODE;
@@ -3360,13 +3417,12 @@
rd.param = 0;
retval = hci_def_data_read(&rd, radio->fm_hdev);
- if (retval < 0) {
- FMDERR("default data read failed %x", retval);
- return retval;
+ if (retval == 0) {
+ ctrl->value =
+ radio->default_data.data[SINRFIRSTSTAGE_OFFSET];
+ if (ctrl->value > MAX_SINR_FIRSTSTAGE)
+ ctrl->value -= 256;
}
- ctrl->value = radio->default_data.data[SINRFIRSTSTAGE_OFFSET];
- if (ctrl->value > MAX_SINR_FIRSTSTAGE)
- ctrl->value -= 256;
break;
case V4L2_CID_PRIVATE_RMSSIFIRSTSTAGE:
rd.mode = FM_RX_CONFG_MODE;
@@ -3375,13 +3431,12 @@
rd.param = 0;
retval = hci_def_data_read(&rd, radio->fm_hdev);
- if (retval < 0) {
- FMDERR("default data read failed %x", retval);
- return retval;
+ if (retval == 0) {
+ ctrl->value =
+ radio->default_data.data[RMSSIFIRSTSTAGE_OFFSET];
+ if (ctrl->value > MAX_RMSSI_FIRSTSTAGE)
+ ctrl->value -= 256;
}
- ctrl->value = radio->default_data.data[RMSSIFIRSTSTAGE_OFFSET];
- if (ctrl->value > MAX_RMSSI_FIRSTSTAGE)
- ctrl->value -= 256;
break;
case V4L2_CID_PRIVATE_CF0TH12:
rd.mode = FM_RX_CONFG_MODE;
@@ -3390,26 +3445,31 @@
rd.param = 0;
retval = hci_def_data_read(&rd, radio->fm_hdev);
- if (retval < 0) {
- FMDERR("default data read failed %x", retval);
- return retval;
+ if (retval == 0) {
+ ctrl->value =
+ radio->default_data.data[CF0TH12_BYTE1_OFFSET];
+ cf0 = radio->default_data.data[CF0TH12_BYTE2_OFFSET];
+ ctrl->value |= (cf0 << 8);
+ cf0 = radio->default_data.data[CF0TH12_BYTE3_OFFSET];
+ ctrl->value |= (cf0 << 16);
+ cf0 = radio->default_data.data[CF0TH12_BYTE4_OFFSET];
+ if (cf0 > 127)
+ cf0 -= 256;
+ ctrl->value |= (cf0 << 24);
}
- ctrl->value = radio->default_data.data[CF0TH12_BYTE1_OFFSET];
- cf0 = radio->default_data.data[CF0TH12_BYTE2_OFFSET];
- ctrl->value |= (cf0 << 8);
- cf0 = radio->default_data.data[CF0TH12_BYTE3_OFFSET];
- ctrl->value |= (cf0 << 16);
- cf0 = radio->default_data.data[CF0TH12_BYTE4_OFFSET];
- if (cf0 > 127)
- cf0 -= 256;
- ctrl->value |= (cf0 << 24);
break;
default:
retval = -EINVAL;
+ break;
}
+
+END:
+ if (retval > 0)
+ retval = -EINVAL;
if (retval < 0)
FMDERR("get control failed with %d, id: %d\n",
retval, ctrl->id);
+
return retval;
}
@@ -3423,27 +3483,36 @@
if (unlikely(radio == NULL)) {
FMDERR(":radio is null");
- return -EINVAL;
+ retval = -EINVAL;
+ goto END;
}
if (unlikely((ctrl == NULL)) || unlikely((ctrl->count == 0))
|| unlikely((ctrl->controls == NULL))) {
FMDERR("%s, invalid v4l2 ctrl\n", __func__);
- return -EINVAL;
+ retval = -EINVAL;
+ goto END;
}
switch ((ctrl->controls[0]).id) {
case V4L2_CID_PRIVATE_IRIS_READ_DEFAULT:
data = (ctrl->controls[0]).string;
memset(&default_data_rd, 0, sizeof(default_data_rd));
if (copy_from_user(&default_data_rd.mode, data,
- sizeof(default_data_rd)))
- return -EFAULT;
+ sizeof(default_data_rd))) {
+ retval = -EFAULT;
+ goto END;
+ }
retval = hci_def_data_read(&default_data_rd, radio->fm_hdev);
break;
default:
retval = -EINVAL;
+ break;
}
+END:
+ if (retval > 0)
+ retval = -EINVAL;
+
return retval;
}
@@ -3462,13 +3531,15 @@
if (unlikely(radio == NULL)) {
FMDERR(":radio is null");
- return -EINVAL;
+ retval = -EINVAL;
+ goto END;
}
if (unlikely((ctrl == NULL)) || unlikely((ctrl->count == 0))
|| unlikely((ctrl->controls == NULL))) {
FMDERR("%s, invalid v4l2 ctrl\n", __func__);
- return -EINVAL;
+ retval = -EINVAL;
+ goto END;
}
switch ((ctrl->controls[0]).id) {
@@ -3482,16 +3553,23 @@
data = (ctrl->controls[0]).string;
if (copy_from_user(tx_ps.ps_data,
- data, bytes_to_copy))
- return -EFAULT;
- tx_ps.ps_control = 0x01;
- tx_ps.pi = radio->pi;
- tx_ps.pty = radio->pty;
- tx_ps.ps_repeatcount = radio->ps_repeatcount;
- tx_ps.ps_num = (bytes_to_copy / PS_STRING_LEN);
+ data, bytes_to_copy)) {
+ FMDERR("%s: copy from user for tx ps name failed\n",
+ __func__);
+ retval = -EFAULT;
+ goto END;
+ } else {
+ tx_ps.ps_control = 0x01;
+ tx_ps.pi = radio->pi;
+ tx_ps.pty = radio->pty;
+ tx_ps.ps_repeatcount = radio->ps_repeatcount;
+ tx_ps.ps_num = (bytes_to_copy / PS_STRING_LEN);
- retval = radio_hci_request(radio->fm_hdev, hci_trans_ps_req,
- (unsigned long)&tx_ps, RADIO_HCI_TIMEOUT);
+ retval = radio_hci_request(radio->fm_hdev,
+ hci_trans_ps_req,
+ (unsigned long)&tx_ps,
+ RADIO_HCI_TIMEOUT);
+ }
break;
case V4L2_CID_RDS_TX_RADIO_TEXT:
bytes_to_copy =
@@ -3501,16 +3579,22 @@
memset(tx_rt.rt_data, 0, MAX_RT_LENGTH);
if (copy_from_user(tx_rt.rt_data,
- data, bytes_to_copy))
- return -EFAULT;
+ data, bytes_to_copy)) {
+ FMDERR("%s: copy from user for tx rt failed\n",
+ __func__);
+ retval = -EFAULT;
+ goto END;
+ } else {
+ tx_rt.rt_control = 0x01;
+ tx_rt.pi = radio->pi;
+ tx_rt.pty = radio->pty;
+ tx_rt.rt_len = bytes_to_copy;
- tx_rt.rt_control = 0x01;
- tx_rt.pi = radio->pi;
- tx_rt.pty = radio->pty;
- tx_rt.rt_len = bytes_to_copy;
-
- retval = radio_hci_request(radio->fm_hdev, hci_trans_rt_req,
- (unsigned long)&tx_rt, RADIO_HCI_TIMEOUT);
+ retval = radio_hci_request(radio->fm_hdev,
+ hci_trans_rt_req,
+ (unsigned long)&tx_rt,
+ RADIO_HCI_TIMEOUT);
+ }
break;
case V4L2_CID_PRIVATE_IRIS_WRITE_DEFAULT:
data = (ctrl->controls[0]).string;
@@ -3525,7 +3609,8 @@
*/
if (ctrl->controls[0].size > (DEFAULT_DATA_SIZE + 2)) {
pr_err("%s: Default data buffer overflow!\n", __func__);
- return -EINVAL;
+ retval = -EINVAL;
+ goto END;
}
/* copy only 'size' bytes of data as requested by user */
@@ -3534,7 +3619,8 @@
if (retval > 0) {
pr_err("%s: Failed to copy %d bytes of default data"
" passed by user\n", __func__, retval);
- return -EFAULT;
+ retval = -EFAULT;
+ goto END;
}
FMDBG("%s: XFR Mode\t: 0x%x\n", __func__, default_data.mode);
FMDBG("%s: XFR Data Length\t: %d\n", __func__,
@@ -3549,7 +3635,8 @@
if (default_data.length != (ctrl->controls[0].size - 2)) {
pr_err("%s: Invalid 'length' parameter passed for "
"actual xfr data\n", __func__);
- return -EINVAL;
+ retval = -EINVAL;
+ goto END;
}
retval = hci_def_data_write(&default_data, radio->fm_hdev);
break;
@@ -3558,24 +3645,32 @@
bytes_to_copy = (ctrl->controls[0]).size;
if (bytes_to_copy < PROCS_CALIB_SIZE) {
FMDERR("data is less than required size");
- return -EFAULT;
+ retval = -EFAULT;
+ goto END;
}
memset(proc_cal_req.data, 0, PROCS_CALIB_SIZE);
proc_cal_req.mode = PROCS_CALIB_MODE;
if (copy_from_user(&proc_cal_req.data[0],
- data, sizeof(proc_cal_req.data)))
- return -EFAULT;
+ data, sizeof(proc_cal_req.data))) {
+ retval = -EFAULT;
+ goto END;
+ }
retval = radio_hci_request(radio->fm_hdev,
hci_fm_set_cal_req_proc,
(unsigned long)&proc_cal_req,
RADIO_HCI_TIMEOUT);
- if (retval < 0)
- FMDERR("Set Process calibration failed %d", retval);
break;
default:
FMDBG("Shouldn't reach here\n");
retval = -1;
+ goto END;
+ break;
}
+
+END:
+ if (retval > 0)
+ retval = -EINVAL;
+
return retval;
}
@@ -3586,6 +3681,7 @@
int retval = 0;
unsigned int rds_grps_proc = 0;
__u8 temp_val = 0;
+ int saved_val;
unsigned long arg = 0;
struct hci_fm_tx_ps tx_ps = {0};
struct hci_fm_tx_rt tx_rt = {0};
@@ -3596,39 +3692,69 @@
if (unlikely(radio == NULL)) {
FMDERR(":radio is null");
- return -EINVAL;
+ retval = -EINVAL;
+ goto END;
}
if (unlikely(ctrl == NULL)) {
FMDERR("%s, v4l2 ctrl is null\n", __func__);
- return -EINVAL;
+ retval = -EINVAL;
+ goto END;
}
switch (ctrl->id) {
case V4L2_CID_PRIVATE_IRIS_TX_TONE:
+ if (!is_valid_tone(ctrl->value)) {
+ retval = -EINVAL;
+ FMDERR("%s: tone value is not valid\n", __func__);
+ goto END;
+ }
+ saved_val = radio->tone_freq;
radio->tone_freq = ctrl->value;
retval = radio_hci_request(radio->fm_hdev,
hci_fm_tone_generator, arg,
msecs_to_jiffies(RADIO_HCI_TIMEOUT));
- if (retval < 0)
+ if (retval < 0) {
FMDERR("Error while setting the tone %d", retval);
+ radio->tone_freq = saved_val;
+ }
break;
case V4L2_CID_AUDIO_VOLUME:
break;
case V4L2_CID_AUDIO_MUTE:
+ if (!is_valid_hard_mute(ctrl->value)) {
+ retval = -EINVAL;
+ FMDERR("%s: hard mute value is not valid\n", __func__);
+ goto END;
+ }
+ saved_val = radio->mute_mode.hard_mute;
radio->mute_mode.hard_mute = ctrl->value;
radio->mute_mode.soft_mute = IOC_SFT_MUTE;
retval = hci_set_fm_mute_mode(
&radio->mute_mode,
radio->fm_hdev);
- if (retval < 0)
+ if (retval < 0) {
FMDERR("Error while set FM hard mute"" %d\n",
- retval);
+ retval);
+ radio->mute_mode.hard_mute = saved_val;
+ }
break;
case V4L2_CID_PRIVATE_IRIS_SRCHMODE:
- radio->g_search_mode = ctrl->value;
+ if (is_valid_srch_mode(ctrl->value)) {
+ radio->g_search_mode = ctrl->value;
+ } else {
+ FMDERR("%s: srch mode is not valid\n", __func__);
+ retval = -EINVAL;
+ goto END;
+ }
break;
case V4L2_CID_PRIVATE_IRIS_SCANDWELL:
- radio->g_scan_time = ctrl->value;
+ if (is_valid_scan_dwell_prd(ctrl->value)) {
+ radio->g_scan_time = ctrl->value;
+ } else {
+ FMDERR("%s: scandwell period is not valid\n", __func__);
+ retval = -EINVAL;
+ goto END;
+ }
break;
case V4L2_CID_PRIVATE_IRIS_SRCHON:
iris_search(radio, ctrl->value, SRCH_DIR_UP);
@@ -3636,8 +3762,12 @@
case V4L2_CID_PRIVATE_IRIS_STATE:
switch (ctrl->value) {
case FM_RECV:
- if (is_enable_rx_possible(radio) != 0)
- return -EINVAL;
+ if (is_enable_rx_possible(radio) != 0) {
+ FMDERR("%s: fm is not in proper state\n",
+ __func__);
+ retval = -EINVAL;
+ goto END;
+ }
radio->mode = FM_RECV_TURNING_ON;
retval = hci_cmd(HCI_FM_ENABLE_RECV_CMD,
radio->fm_hdev);
@@ -3645,14 +3775,16 @@
FMDERR("Error while enabling RECV FM"
" %d\n", retval);
radio->mode = FM_OFF;
- return retval;
+ goto END;
} else {
initialise_recv(radio);
}
break;
case FM_TRANS:
- if (is_enable_tx_possible(radio) != 0)
- return -EINVAL;
+ if (is_enable_tx_possible(radio) != 0) {
+ retval = -EINVAL;
+ goto END;
+ }
radio->mode = FM_TRANS_TURNING_ON;
retval = hci_cmd(HCI_FM_ENABLE_TRANS_CMD,
radio->fm_hdev);
@@ -3660,7 +3792,7 @@
FMDERR("Error while enabling TRANS FM"
" %d\n", retval);
radio->mode = FM_OFF;
- return retval;
+ goto END;
} else {
initialise_trans(radio);
}
@@ -3676,7 +3808,7 @@
FMDERR("Err on disable recv FM"
" %d\n", retval);
radio->mode = FM_RECV;
- return retval;
+ goto END;
}
break;
case FM_TRANS:
@@ -3688,7 +3820,7 @@
FMDERR("Err disabling trans FM"
" %d\n", retval);
radio->mode = FM_TRANS;
- return retval;
+ goto END;
}
break;
default:
@@ -3703,136 +3835,236 @@
if (radio->mode == FM_RECV) {
retval = iris_recv_set_region(radio, ctrl->value);
} else {
- if (radio->mode == FM_TRANS)
+ if (radio->mode == FM_TRANS) {
retval = iris_trans_set_region(radio,
ctrl->value);
- else
+ } else {
+ FMDERR("%s: fm is not in proper state\n",
+ __func__);
retval = -EINVAL;
+ goto END;
+ }
}
break;
case V4L2_CID_PRIVATE_IRIS_SIGNAL_TH:
+ if (!is_valid_sig_th(ctrl->value)) {
+ retval = -EINVAL;
+ FMDERR("%s: sig threshold is not valid\n", __func__);
+ goto END;
+ }
temp_val = ctrl->value;
retval = hci_fm_set_signal_threshold(
&temp_val,
radio->fm_hdev);
if (retval < 0) {
FMDERR("Error while setting signal threshold\n");
- break;
+ goto END;
}
break;
case V4L2_CID_PRIVATE_IRIS_SRCH_PTY:
- radio->srch_rds.srch_pty = ctrl->value;
- radio->srch_st_list.srch_pty = ctrl->value;
+ if (is_valid_pty(ctrl->value)) {
+ radio->srch_rds.srch_pty = ctrl->value;
+ radio->srch_st_list.srch_pty = ctrl->value;
+ } else {
+ FMDERR("%s: pty is not valid\n", __func__);
+ retval = -EINVAL;
+ goto END;
+ }
break;
case V4L2_CID_PRIVATE_IRIS_SRCH_PI:
- radio->srch_rds.srch_pi = ctrl->value;
+ if (is_valid_pi(ctrl->value)) {
+ radio->srch_rds.srch_pi = ctrl->value;
+ } else {
+ retval = -EINVAL;
+ FMDERR("%s: Pi is not valid\n", __func__);
+ goto END;
+ }
break;
case V4L2_CID_PRIVATE_IRIS_SRCH_CNT:
- radio->srch_st_list.srch_list_max = ctrl->value;
+ if (is_valid_srch_station_cnt(ctrl->value)) {
+ radio->srch_st_list.srch_list_max = ctrl->value;
+ } else {
+ retval = -EINVAL;
+ FMDERR("%s: srch station count is not valid\n",
+ __func__);
+ goto END;
+ }
break;
case V4L2_CID_PRIVATE_IRIS_SPACING:
+ if (!is_valid_chan_spacing(ctrl->value)) {
+ retval = -EINVAL;
+ FMDERR("%s: channel spacing is not valid\n", __func__);
+ goto END;
+ }
if (radio->mode == FM_RECV) {
+ saved_val = radio->recv_conf.ch_spacing;
radio->recv_conf.ch_spacing = ctrl->value;
retval = hci_set_fm_recv_conf(
&radio->recv_conf,
radio->fm_hdev);
- if (retval < 0)
+ if (retval < 0) {
FMDERR("Error in setting channel spacing");
+ radio->recv_conf.ch_spacing = saved_val;
+ goto END;
+ }
}
break;
case V4L2_CID_PRIVATE_IRIS_EMPHASIS:
+ if (!is_valid_emphasis(ctrl->value)) {
+ retval = -EINVAL;
+ FMDERR("%s, emphasis is not valid\n", __func__);
+ goto END;
+ }
switch (radio->mode) {
case FM_RECV:
+ saved_val = radio->recv_conf.emphasis;
radio->recv_conf.emphasis = ctrl->value;
retval = hci_set_fm_recv_conf(
&radio->recv_conf,
radio->fm_hdev);
- if (retval < 0)
+ if (retval < 0) {
FMDERR("Error in setting emphasis");
+ radio->recv_conf.emphasis = saved_val;
+ goto END;
+ }
break;
case FM_TRANS:
+ saved_val = radio->trans_conf.emphasis;
radio->trans_conf.emphasis = ctrl->value;
retval = hci_set_fm_trans_conf(
&radio->trans_conf,
radio->fm_hdev);
- if (retval < 0)
+ if (retval < 0) {
FMDERR("Error in setting emphasis");
+ radio->trans_conf.emphasis = saved_val;
+ goto END;
+ }
break;
default:
retval = -EINVAL;
+ FMDERR("%s, FM is not in proper state\n", __func__);
+ goto END;
+ break;
}
break;
case V4L2_CID_PRIVATE_IRIS_RDS_STD:
+ if (!is_valid_rds_std(ctrl->value)) {
+ retval = -EINVAL;
+ FMDERR("%s: rds std is not valid\n", __func__);
+ goto END;
+ }
switch (radio->mode) {
case FM_RECV:
+ saved_val = radio->recv_conf.rds_std;
radio->recv_conf.rds_std = ctrl->value;
retval = hci_set_fm_recv_conf(
&radio->recv_conf,
radio->fm_hdev);
- if (retval < 0)
+ if (retval < 0) {
FMDERR("Error in rds_std");
+ radio->recv_conf.rds_std = saved_val;
+ goto END;
+ }
break;
case FM_TRANS:
+ saved_val = radio->trans_conf.rds_std;
radio->trans_conf.rds_std = ctrl->value;
retval = hci_set_fm_trans_conf(
&radio->trans_conf,
radio->fm_hdev);
- if (retval < 0)
+ if (retval < 0) {
FMDERR("Error in rds_Std");
+ radio->trans_conf.rds_std = saved_val;
+ goto END;
+ }
break;
default:
retval = -EINVAL;
+ FMDERR("%s: fm is not in proper state\n", __func__);
+ goto END;
+ break;
}
break;
case V4L2_CID_PRIVATE_IRIS_RDSON:
+ if (!is_valid_rds_std(ctrl->value)) {
+ retval = -EINVAL;
+ FMDERR("%s: rds std is not valid\n", __func__);
+ goto END;
+ }
switch (radio->mode) {
case FM_RECV:
+ saved_val = radio->recv_conf.rds_std;
radio->recv_conf.rds_std = ctrl->value;
retval = hci_set_fm_recv_conf(
&radio->recv_conf,
radio->fm_hdev);
- if (retval < 0)
+ if (retval < 0) {
FMDERR("Error in rds_std");
+ radio->recv_conf.rds_std = saved_val;
+ goto END;
+ }
break;
case FM_TRANS:
+ saved_val = radio->trans_conf.rds_std;
radio->trans_conf.rds_std = ctrl->value;
retval = hci_set_fm_trans_conf(
&radio->trans_conf,
radio->fm_hdev);
- if (retval < 0)
+ if (retval < 0) {
FMDERR("Error in rds_Std");
+ radio->trans_conf.rds_std = saved_val;
+ goto END;
+ }
break;
default:
retval = -EINVAL;
+ FMDERR("%s: fm is not in proper state\n", __func__);
+ goto END;
+ break;
}
break;
case V4L2_CID_PRIVATE_IRIS_RDSGROUP_MASK:
+ saved_val = radio->rds_grp.rds_grp_enable_mask;
grp_mask = (grp_mask | oda_agt | ctrl->value);
radio->rds_grp.rds_grp_enable_mask = grp_mask;
radio->rds_grp.rds_buf_size = 1;
radio->rds_grp.en_rds_change_filter = 0;
retval = hci_fm_rds_grp(&radio->rds_grp, radio->fm_hdev);
- if (retval < 0)
+ if (retval < 0) {
FMDERR("error in setting group mask\n");
+ radio->rds_grp.rds_grp_enable_mask = saved_val;
+ goto END;
+ }
break;
case V4L2_CID_PRIVATE_IRIS_RDSGROUP_PROC:
+ saved_val = radio->g_rds_grp_proc_ps;
rds_grps_proc = radio->g_rds_grp_proc_ps | ctrl->value;
radio->g_rds_grp_proc_ps = (rds_grps_proc >> RDS_CONFIG_OFFSET);
retval = hci_fm_rds_grps_process(
&radio->g_rds_grp_proc_ps,
radio->fm_hdev);
+ if (retval < 0) {
+ radio->g_rds_grp_proc_ps = saved_val;
+ goto END;
+ }
break;
case V4L2_CID_PRIVATE_IRIS_RDSD_BUF:
radio->rds_grp.rds_buf_size = ctrl->value;
break;
case V4L2_CID_PRIVATE_IRIS_PSALL:
+ saved_val = radio->g_rds_grp_proc_ps;
rds_grps_proc = (ctrl->value << RDS_CONFIG_OFFSET);
radio->g_rds_grp_proc_ps |= rds_grps_proc;
retval = hci_fm_rds_grps_process(
&radio->g_rds_grp_proc_ps,
radio->fm_hdev);
+ if (retval < 0) {
+ radio->g_rds_grp_proc_ps = saved_val;
+ goto END;
+ }
break;
case V4L2_CID_PRIVATE_IRIS_AF_JUMP:
+ saved_val = radio->g_rds_grp_proc_ps;
/*Clear the current AF jump settings*/
radio->g_rds_grp_proc_ps &= ~(1 << RDS_AF_JUMP_OFFSET);
radio->af_jump_bit = ctrl->value;
@@ -3842,24 +4074,45 @@
retval = hci_fm_rds_grps_process(
&radio->g_rds_grp_proc_ps,
radio->fm_hdev);
+ if (retval < 0) {
+ radio->g_rds_grp_proc_ps = saved_val;
+ goto END;
+ }
break;
case V4L2_CID_PRIVATE_IRIS_LP_MODE:
set_low_power_mode(radio, ctrl->value);
break;
case V4L2_CID_PRIVATE_IRIS_ANTENNA:
+ if (!is_valid_antenna(ctrl->value)) {
+ retval = -EINVAL;
+ FMDERR("%s: antenna type is not valid\n", __func__);
+ goto END;
+ }
temp_val = ctrl->value;
retval = hci_fm_set_antenna(&temp_val, radio->fm_hdev);
if (retval < 0) {
FMDERR("Set Antenna failed retval = %x", retval);
- return retval;
+ goto END;
}
radio->g_antenna = ctrl->value;
break;
case V4L2_CID_RDS_TX_PTY:
- radio->pty = ctrl->value;
+ if (is_valid_pty(ctrl->value)) {
+ radio->pty = ctrl->value;
+ } else {
+ retval = -EINVAL;
+ FMDERR("%s: pty is not valid\n", __func__);
+ goto END;
+ }
break;
case V4L2_CID_RDS_TX_PI:
- radio->pi = ctrl->value;
+ if (is_valid_pi(ctrl->value)) {
+ radio->pi = ctrl->value;
+ } else {
+ retval = -EINVAL;
+ FMDERR("%s: pi is not valid\n", __func__);
+ goto END;
+ }
break;
case V4L2_CID_PRIVATE_IRIS_STOP_RDS_TX_PS_NAME:
tx_ps.ps_control = 0x00;
@@ -3872,7 +4125,13 @@
(unsigned long)&tx_rt, RADIO_HCI_TIMEOUT);
break;
case V4L2_CID_PRIVATE_IRIS_TX_SETPSREPEATCOUNT:
- radio->ps_repeatcount = ctrl->value;
+ if (is_valid_ps_repeat_cnt(ctrl->value)) {
+ radio->ps_repeatcount = ctrl->value;
+ } else {
+ retval = -EINVAL;
+ FMDERR("%s: ps repeat count is not valid\n", __func__);
+ goto END;
+ }
break;
case V4L2_CID_TUNE_POWER_LEVEL:
if (ctrl->value > FM_TX_PWR_LVL_MAX)
@@ -3887,8 +4146,8 @@
retval = hci_def_data_read(&rd, radio->fm_hdev);
if (retval < 0) {
FMDERR("Default data read failed for PHY_CFG %d\n",
- retval);
- break;
+ retval);
+ goto END;
}
memset(&wrd, 0, sizeof(wrd));
wrd.mode = FM_TX_PHY_CFG_MODE;
@@ -3900,48 +4159,58 @@
retval = hci_def_data_write(&wrd, radio->fm_hdev);
if (retval < 0)
FMDERR("Default write failed for PHY_TXGAIN %d\n",
- retval);
+ retval);
break;
case V4L2_CID_PRIVATE_IRIS_SOFT_MUTE:
+ if (!is_valid_soft_mute(ctrl->value)) {
+ retval = -EINVAL;
+ FMDERR("%s: soft mute is not valid\n", __func__);
+ goto END;
+ }
+ saved_val = radio->mute_mode.soft_mute;
radio->mute_mode.soft_mute = ctrl->value;
retval = hci_set_fm_mute_mode(
&radio->mute_mode,
radio->fm_hdev);
- if (retval < 0)
+ if (retval < 0) {
FMDERR("Error while setting FM soft mute"" %d\n",
- retval);
+ retval);
+ radio->mute_mode.soft_mute = saved_val;
+ goto END;
+ }
break;
case V4L2_CID_PRIVATE_IRIS_RIVA_ACCS_ADDR:
radio->riva_data_req.cmd_params.start_addr = ctrl->value;
break;
case V4L2_CID_PRIVATE_IRIS_RIVA_ACCS_LEN:
- if ((ctrl->value > 0) &&
- (ctrl->value <= MAX_RIVA_PEEK_RSP_SIZE)) {
+ if (is_valid_peek_len(ctrl->value)) {
radio->riva_data_req.cmd_params.length = ctrl->value;
} else {
- FMDERR("Length %d is more than the buffer size %d\n",
- ctrl->value, MAX_RIVA_PEEK_RSP_SIZE);
retval = -EINVAL;
+ FMDERR("%s: riva access len is not valid\n", __func__);
+ goto END;
}
break;
case V4L2_CID_PRIVATE_IRIS_RIVA_POKE:
- if (radio->riva_data_req.cmd_params.length <= MAX_RIVA_PEEK_RSP_SIZE) {
- retval = copy_from_user(radio->riva_data_req.data,
- (void *)ctrl->value,
- radio->riva_data_req.cmd_params.length);
- if (retval == 0) {
- radio->riva_data_req.cmd_params.subopcode =
- RIVA_POKE_OPCODE;
- retval = hci_poke_data(&radio->riva_data_req,
- radio->fm_hdev);
- } else {
- retval = -EINVAL;
+ if (radio->riva_data_req.cmd_params.length <=
+ MAX_RIVA_PEEK_RSP_SIZE) {
+ retval = copy_from_user(
+ radio->riva_data_req.data,
+ (void *)ctrl->value,
+ radio->riva_data_req.cmd_params.length);
+ if (retval != 0) {
+ retval = -retval;
+ goto END;
}
+ radio->riva_data_req.cmd_params.subopcode =
+ RIVA_POKE_OPCODE;
+ retval = hci_poke_data(
+ &radio->riva_data_req,
+ radio->fm_hdev);
} else {
- FMDERR("Can not copy into driver's buffer. Length %d is more than"
- "the buffer size %d\n", radio->riva_data_req.cmd_params.length,
- MAX_RIVA_PEEK_RSP_SIZE);
+ FMDERR("Can not copy into driver's buffer.\n");
retval = -EINVAL;
+ goto END;
}
break;
case V4L2_CID_PRIVATE_IRIS_SSBI_ACCS_ADDR:
@@ -3962,80 +4231,133 @@
hci_ssbi_peek_reg(&radio->ssbi_peek_reg, radio->fm_hdev);
break;
case V4L2_CID_PRIVATE_IRIS_RDS_GRP_COUNTERS:
- temp_val = ctrl->value;
- hci_read_grp_counters(&temp_val, radio->fm_hdev);
+ if (is_valid_reset_cntr(ctrl->value)) {
+ temp_val = ctrl->value;
+ hci_read_grp_counters(&temp_val, radio->fm_hdev);
+ } else {
+ FMDERR("%s: reset counter value is not valid\n",
+ __func__);
+ retval = -EINVAL;
+ goto END;
+ }
break;
case V4L2_CID_PRIVATE_IRIS_HLSI:
+ if (!is_valid_hlsi(ctrl->value)) {
+ FMDERR("%s: hlsi value is not valid\n", __func__);
+ retval = -EINVAL;
+ goto END;
+ }
retval = hci_cmd(HCI_FM_GET_RECV_CONF_CMD,
radio->fm_hdev);
if (retval)
- break;
+ goto END;
+ saved_val = radio->recv_conf.hlsi;
radio->recv_conf.hlsi = ctrl->value;
retval = hci_set_fm_recv_conf(
&radio->recv_conf,
radio->fm_hdev);
+ if (retval < 0)
+ radio->recv_conf.hlsi = saved_val;
break;
case V4L2_CID_PRIVATE_IRIS_SET_NOTCH_FILTER:
- temp_val = ctrl->value;
- retval = hci_set_notch_filter(&temp_val, radio->fm_hdev);
+ if (is_valid_notch_filter(ctrl->value)) {
+ temp_val = ctrl->value;
+ retval = hci_set_notch_filter(&temp_val,
+ radio->fm_hdev);
+ } else {
+ FMDERR("%s: notch filter is not valid\n", __func__);
+ retval = -EINVAL;
+ goto END;
+ }
break;
case V4L2_CID_PRIVATE_INTF_HIGH_THRESHOLD:
+ if (!is_valid_intf_det_hgh_th(ctrl->value)) {
+ FMDERR("%s: intf high threshold is not valid\n",
+ __func__);
+ retval = -EINVAL;
+ goto END;
+ }
retval = hci_cmd(HCI_FM_GET_DET_CH_TH_CMD, radio->fm_hdev);
if (retval < 0) {
FMDERR("Failed to get chnl det thresholds %d", retval);
- return retval;
+ goto END;
}
+ saved_val = radio->ch_det_threshold.high_th;
radio->ch_det_threshold.high_th = ctrl->value;
retval = hci_set_ch_det_thresholds_req(&radio->ch_det_threshold,
radio->fm_hdev);
if (retval < 0) {
FMDERR("Failed to set High det threshold %d ", retval);
- return retval;
+ radio->ch_det_threshold.high_th = saved_val;
+ goto END;
}
break;
case V4L2_CID_PRIVATE_INTF_LOW_THRESHOLD:
+ if (!is_valid_intf_det_low_th(ctrl->value)) {
+ FMDERR("%s: intf det low threshold is not valid\n",
+ __func__);
+ retval = -EINVAL;
+ goto END;
+ }
retval = hci_cmd(HCI_FM_GET_DET_CH_TH_CMD, radio->fm_hdev);
if (retval < 0) {
FMDERR("Failed to get chnl det thresholds %d", retval);
- return retval;
+ goto END;
}
+ saved_val = radio->ch_det_threshold.low_th;
radio->ch_det_threshold.low_th = ctrl->value;
retval = hci_set_ch_det_thresholds_req(&radio->ch_det_threshold,
radio->fm_hdev);
if (retval < 0) {
FMDERR("Failed to Set Low det threshold %d", retval);
- return retval;
+ radio->ch_det_threshold.low_th = saved_val;
+ goto END;
}
break;
case V4L2_CID_PRIVATE_SINR_THRESHOLD:
+ if (!is_valid_sinr_th(ctrl->value)) {
+ FMDERR("%s: sinr threshold is not valid\n", __func__);
+ retval = -EINVAL;
+ goto END;
+ }
retval = hci_cmd(HCI_FM_GET_DET_CH_TH_CMD, radio->fm_hdev);
if (retval < 0) {
FMDERR("Failed to get chnl det thresholds %d", retval);
- return retval;
+ goto END;
}
+ saved_val = radio->ch_det_threshold.sinr;
radio->ch_det_threshold.sinr = ctrl->value;
retval = hci_set_ch_det_thresholds_req(&radio->ch_det_threshold,
radio->fm_hdev);
if (retval < 0) {
FMDERR("Failed to set SINR threshold %d", retval);
- return retval;
+ radio->ch_det_threshold.sinr = saved_val;
+ goto END;
}
break;
case V4L2_CID_PRIVATE_SINR_SAMPLES:
+ if (!is_valid_sinr_samples(ctrl->value)) {
+ FMDERR("%s: sinr samples count is not valid\n",
+ __func__);
+ retval = -EINVAL;
+ goto END;
+ }
retval = hci_cmd(HCI_FM_GET_DET_CH_TH_CMD, radio->fm_hdev);
if (retval < 0) {
FMDERR("Failed to get chnl det thresholds %d", retval);
- return retval;
+ goto END;
}
+ saved_val = radio->ch_det_threshold.sinr_samples;
radio->ch_det_threshold.sinr_samples = ctrl->value;
retval = hci_set_ch_det_thresholds_req(&radio->ch_det_threshold,
radio->fm_hdev);
if (retval < 0) {
FMDERR("Failed to set SINR samples %d", retval);
- return retval;
+ radio->ch_det_threshold.sinr_samples = saved_val;
+ goto END;
}
break;
@@ -4082,18 +4404,23 @@
if (retval < 0) {
FMDERR("%s: Failed to determine channel's validity\n",
__func__);
- return retval;
+ goto END;
} else {
sinr_th = radio->ch_det_threshold.sinr;
intf_det_low_th = radio->ch_det_threshold.low_th;
intf_det_high_th = radio->ch_det_threshold.high_th;
}
-
+ if (!is_valid_sinr_th(sinr_th) ||
+ !is_valid_intf_det_low_th(intf_det_low_th) ||
+ !is_valid_intf_det_hgh_th(intf_det_high_th)) {
+ retval = -EINVAL;
+ goto END;
+ }
retval = hci_cmd(HCI_FM_GET_STATION_PARAM_CMD, radio->fm_hdev);
if (retval < 0) {
FMDERR("%s: Failed to determine channel's validity\n",
__func__);
- return retval;
+ goto END;
} else
sinr = radio->fm_st_rsp.station_rsp.sinr;
@@ -4101,7 +4428,7 @@
if (retval < 0) {
FMDERR("%s: Failed to determine channel's validity\n",
__func__);
- return retval;
+ goto END;
} else
intf_det_out = radio->st_dbg_param.in_det_out;
@@ -4120,7 +4447,7 @@
retval = hci_def_data_read(&rd, radio->fm_hdev);
if (retval < 0) {
FMDERR("default data read failed %x", retval);
- return retval;
+ goto END;
}
wrd.mode = FM_RDS_CNFG_MODE;
wrd.length = FM_RDS_CNFG_LEN;
@@ -4141,7 +4468,7 @@
retval = hci_def_data_read(&rd, radio->fm_hdev);
if (retval < 0) {
FMDERR("default data read failed %x", retval);
- return retval;
+ goto END;
}
wrd.mode = FM_RDS_CNFG_MODE;
wrd.length = FM_RDS_CNFG_LEN;
@@ -4161,7 +4488,7 @@
retval = hci_def_data_read(&rd, radio->fm_hdev);
if (retval < 0) {
FMDERR("default data read failed %x", retval);
- return retval;
+ goto END;
}
wrd.mode = FM_RX_CONFG_MODE;
wrd.length = FM_RX_CNFG_LEN;
@@ -4181,7 +4508,7 @@
retval = hci_def_data_read(&rd, radio->fm_hdev);
if (retval < 0) {
FMDERR("default data read failed %x", retval);
- return retval;
+ goto END;
}
wrd.mode = FM_RX_CONFG_MODE;
wrd.length = FM_RX_CNFG_LEN;
@@ -4201,7 +4528,7 @@
retval = hci_def_data_read(&rd, radio->fm_hdev);
if (retval < 0) {
FMDERR("default data read failed %x", retval);
- return retval;
+ goto END;
}
wrd.mode = FM_RX_CONFG_MODE;
wrd.length = FM_RX_CNFG_LEN;
@@ -4221,7 +4548,7 @@
retval = hci_def_data_read(&rd, radio->fm_hdev);
if (retval < 0) {
FMDERR("default data read failed %x", retval);
- return retval;
+ goto END;
}
wrd.mode = FM_RX_CONFG_MODE;
wrd.length = FM_RX_CNFG_LEN;
@@ -4241,7 +4568,7 @@
retval = hci_def_data_read(&rd, radio->fm_hdev);
if (retval < 0) {
FMDERR("default data read failed %x", retval);
- return retval;
+ goto END;
}
wrd.mode = FM_RX_CONFG_MODE;
wrd.length = FM_RX_CNFG_LEN;
@@ -4264,7 +4591,7 @@
retval = hci_def_data_read(&rd, radio->fm_hdev);
if (retval < 0) {
FMDERR("default data read failed for PS0 %x", retval);
- return retval;
+ goto END;
}
wrd.mode = RDS_PS0_XFR_MODE;
wrd.length = RDS_PS0_LEN;
@@ -4278,7 +4605,13 @@
break;
default:
retval = -EINVAL;
+ break;
}
+
+END:
+ if (retval > 0)
+ retval = -EINVAL;
+
return retval;
}
diff --git a/drivers/media/video/v4l2-ioctl.c b/drivers/media/video/v4l2-ioctl.c
index 5b2ec1f..ca28003 100644
--- a/drivers/media/video/v4l2-ioctl.c
+++ b/drivers/media/video/v4l2-ioctl.c
@@ -2348,6 +2348,7 @@
int ret = 0;
switch (cmd) {
+ case VIDIOC_PREPARE_BUF:
case VIDIOC_QUERYBUF:
case VIDIOC_QBUF:
case VIDIOC_DQBUF: {
diff --git a/drivers/mfd/wcd9xxx-core-resource.c b/drivers/mfd/wcd9xxx-core-resource.c
index 1791d72..1d0f894 100644
--- a/drivers/mfd/wcd9xxx-core-resource.c
+++ b/drivers/mfd/wcd9xxx-core-resource.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -55,6 +55,8 @@
int (*codec_read)(struct wcd9xxx_core_resource*, unsigned short),
int (*codec_write)(struct wcd9xxx_core_resource*, unsigned short, u8),
int (*codec_bulk_read) (struct wcd9xxx_core_resource*, unsigned short,
+ int, u8*),
+ int (*codec_bulk_write) (struct wcd9xxx_core_resource*, unsigned short,
int, u8*))
{
mutex_init(&wcd9xxx_core_res->pm_lock);
@@ -68,6 +70,7 @@
wcd9xxx_core_res->codec_reg_read = codec_read;
wcd9xxx_core_res->codec_reg_write = codec_write;
wcd9xxx_core_res->codec_bulk_read = codec_bulk_read;
+ wcd9xxx_core_res->codec_bulk_write = codec_bulk_write;
wcd9xxx_core_res->num_irqs = num_irqs;
wcd9xxx_core_res->num_irq_regs = num_irq_regs;
diff --git a/drivers/mfd/wcd9xxx-core.c b/drivers/mfd/wcd9xxx-core.c
index 64053de..1c42431 100644
--- a/drivers/mfd/wcd9xxx-core.c
+++ b/drivers/mfd/wcd9xxx-core.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -605,7 +605,7 @@
wcd9xxx->codec_type->num_irqs,
wcd9xxx_num_irq_regs(wcd9xxx),
wcd9xxx_reg_read, wcd9xxx_reg_write,
- wcd9xxx_bulk_read);
+ wcd9xxx_bulk_read, wcd9xxx_bulk_write);
if (wcd9xxx_core_irq_init(&wcd9xxx->core_res))
goto err;
diff --git a/drivers/mfd/wcd9xxx-irq.c b/drivers/mfd/wcd9xxx-irq.c
index 9209f0b..7644984 100644
--- a/drivers/mfd/wcd9xxx-irq.c
+++ b/drivers/mfd/wcd9xxx-irq.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -316,10 +316,12 @@
}
memset(status, 0xff, num_irq_regs);
- wcd9xxx_bulk_write(wcd9xxx_res, WCD9XXX_A_INTR_CLEAR0,
- num_irq_regs, status);
+
+ ret = wcd9xxx_res->codec_bulk_write(wcd9xxx_res,
+ WCD9XXX_A_INTR_CLEAR0,
+ num_irq_regs, status);
if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_I2C)
- wcd9xxx_reg_write(wcd9xxx_res,
+ wcd9xxx_res->codec_reg_write(wcd9xxx_res,
WCD9XXX_A_INTR_MODE, 0x02);
}
wcd9xxx_unlock_sleep(wcd9xxx_res);
diff --git a/drivers/misc/isa1200.c b/drivers/misc/isa1200.c
index 8090b95..d7fa87b 100644
--- a/drivers/misc/isa1200.c
+++ b/drivers/misc/isa1200.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2009 Samsung Electronics
* Kyungmin Park <kyungmin.park@samsung.com>
- * Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -318,7 +318,7 @@
value |= (haptic->pdata->mode_ctrl << 3) |
(haptic->pdata->overdrive_high << 5) |
- (haptic->pdata->overdrive_en << 5) |
+ (haptic->pdata->overdrive_en << 6) |
(haptic->pdata->chip_en << 7);
rc = isa1200_write_reg(client, ISA1200_HCTRL0, value);
diff --git a/drivers/misc/qseecom.c b/drivers/misc/qseecom.c
index c5c0ce8..aad7fb3 100644
--- a/drivers/misc/qseecom.c
+++ b/drivers/misc/qseecom.c
@@ -71,6 +71,9 @@
#define RPMB_SERVICE 0x2000
+#define QSEECOM_SEND_CMD_CRYPTO_TIMEOUT 2000
+#define QSEECOM_LOAD_APP_CRYPTO_TIMEOUT 2000
+
enum qseecom_clk_definitions {
CLK_DFAB = 0,
CLK_SFPB,
@@ -162,6 +165,12 @@
struct qseecom_clk qsee;
struct qseecom_clk ce_drv;
struct cdev cdev;
+
+ bool support_bus_scaling;
+ uint32_t cumulative_mode;
+ enum qseecom_bandwidth_request_mode current_mode;
+ struct timer_list bw_scale_down_timer;
+ struct work_struct bw_inactive_req_ws;
};
struct qseecom_client_handle {
@@ -191,6 +200,7 @@
atomic_t ioctl_count;
bool perf_enabled;
bool fast_load_enabled;
+ enum qseecom_bandwidth_request_mode mode;
};
enum qseecom_set_clear_key_flag {
@@ -212,6 +222,10 @@
uint32_t len;
};
+uint8_t *key_id_array[QSEECOM_KEY_ID_SIZE] = {
+ "Disk Encryption"
+};
+
/* Function proto types */
static int qsee_vote_for_clock(struct qseecom_dev_handle *, int32_t);
static void qsee_disable_clock_vote(struct qseecom_dev_handle *, int32_t);
@@ -324,6 +338,7 @@
return -EFAULT;
data->listener.id = 0;
+ data->type = QSEECOM_LISTENER_SERVICE;
if (!__qseecom_is_svc_unique(data, &rcvd_lstnr)) {
pr_err("Service is not unique and is already registered\n");
data->released = true;
@@ -433,6 +448,157 @@
return ret;
}
+static int __qseecom_set_msm_bus_request(uint32_t mode)
+{
+ int ret = 0;
+ struct qseecom_clk *qclk;
+
+ qclk = &qseecom.qsee;
+ if (qclk->ce_core_src_clk != NULL) {
+ if (mode == INACTIVE) {
+ __qseecom_disable_clk(CLK_QSEE);
+ } else {
+ ret = __qseecom_enable_clk(CLK_QSEE);
+ if (ret)
+ pr_err("CLK enabling failed (%d) MODE (%d)\n",
+ ret, mode);
+ }
+ }
+
+ if ((!ret) && (qseecom.current_mode != mode)) {
+ ret = msm_bus_scale_client_update_request(
+ qseecom.qsee_perf_client, mode);
+ if (ret) {
+ pr_err("Bandwidth req failed(%d) MODE (%d)\n",
+ ret, mode);
+ if (qclk->ce_core_src_clk != NULL) {
+ if (mode == INACTIVE)
+ __qseecom_enable_clk(CLK_QSEE);
+ else
+ __qseecom_disable_clk(CLK_QSEE);
+ }
+ }
+ qseecom.current_mode = mode;
+ }
+ return ret;
+}
+
+static void qseecom_bw_inactive_req_work(struct work_struct *work)
+{
+ mutex_lock(&app_access_lock);
+ mutex_lock(&qsee_bw_mutex);
+ __qseecom_set_msm_bus_request(INACTIVE);
+ pr_debug("current_mode = %d, cumulative_mode = %d\n",
+ qseecom.current_mode, qseecom.cumulative_mode);
+ mutex_unlock(&qsee_bw_mutex);
+ mutex_unlock(&app_access_lock);
+ return;
+}
+
+static void qseecom_scale_bus_bandwidth_timer_callback(unsigned long data)
+{
+ schedule_work(&qseecom.bw_inactive_req_ws);
+ return;
+}
+
+static int qseecom_scale_bus_bandwidth_timer(uint32_t mode, uint32_t duration)
+{
+ int32_t ret = 0;
+ int32_t request_mode = INACTIVE;
+
+ mutex_lock(&qsee_bw_mutex);
+ if (mode == 0) {
+ if (qseecom.cumulative_mode > MEDIUM)
+ request_mode = HIGH;
+ else
+ request_mode = qseecom.cumulative_mode;
+ } else {
+ request_mode = mode;
+ }
+ __qseecom_set_msm_bus_request(request_mode);
+
+ del_timer_sync(&(qseecom.bw_scale_down_timer));
+ qseecom.bw_scale_down_timer.expires = jiffies +
+ msecs_to_jiffies(duration);
+ add_timer(&(qseecom.bw_scale_down_timer));
+
+ mutex_unlock(&qsee_bw_mutex);
+ return ret;
+}
+
+
+static int qseecom_unregister_bus_bandwidth_needs(
+ struct qseecom_dev_handle *data)
+{
+ int32_t ret = 0;
+
+ qseecom.cumulative_mode -= data->mode;
+ data->mode = INACTIVE;
+
+ return ret;
+}
+
+static int __qseecom_register_bus_bandwidth_needs(
+ struct qseecom_dev_handle *data, uint32_t request_mode)
+{
+ int32_t ret = 0;
+
+ if (data->mode == INACTIVE) {
+ qseecom.cumulative_mode += request_mode;
+ data->mode = request_mode;
+ } else {
+ if (data->mode != request_mode) {
+ qseecom.cumulative_mode -= data->mode;
+ qseecom.cumulative_mode += request_mode;
+ data->mode = request_mode;
+ }
+ }
+ return ret;
+}
+
+static int qseecom_scale_bus_bandwidth(struct qseecom_dev_handle *data,
+ void __user *argp)
+{
+ int32_t ret = 0;
+ int32_t req_mode;
+
+ ret = copy_from_user(&req_mode, argp, sizeof(req_mode));
+ if (ret) {
+ pr_err("copy_from_user failed\n");
+ return ret;
+ }
+ if (req_mode > HIGH) {
+ pr_err("Invalid bandwidth mode (%d)\n", req_mode);
+ return ret;
+ }
+ mutex_lock(&qsee_bw_mutex);
+ ret = __qseecom_register_bus_bandwidth_needs(data, req_mode);
+ mutex_unlock(&qsee_bw_mutex);
+
+ return ret;
+}
+
+static void __qseecom_disable_clk_scale_down(struct qseecom_dev_handle *data)
+{
+ if (!qseecom.support_bus_scaling)
+ qsee_disable_clock_vote(data, CLK_SFPB);
+ return;
+}
+
+static int __qseecom_enable_clk_scale_up(struct qseecom_dev_handle *data)
+{
+ int ret = 0;
+ if (qseecom.support_bus_scaling) {
+ qseecom_scale_bus_bandwidth_timer(
+ MEDIUM, QSEECOM_LOAD_APP_CRYPTO_TIMEOUT);
+ } else {
+ ret = qsee_vote_for_clock(data, CLK_SFPB);
+ if (ret)
+ pr_err("Fail vote for clk SFPB ret %d\n", ret);
+ }
+ return ret;
+}
+
static int qseecom_set_client_mem_param(struct qseecom_dev_handle *data,
void __user *argp)
{
@@ -622,7 +788,7 @@
u32 app_id = 0;
struct ion_handle *ihandle; /* Ion handle */
struct qseecom_load_img_req load_img_req;
- int32_t ret;
+ int32_t ret = 0;
ion_phys_addr_t pa = 0;
uint32_t len;
struct qseecom_command_scm_resp resp;
@@ -637,16 +803,16 @@
return -EFAULT;
}
/* Vote for the SFPB clock */
- ret = qsee_vote_for_clock(data, CLK_SFPB);
+ ret = __qseecom_enable_clk_scale_up(data);
if (ret)
- pr_warning("Unable to vote for SFPB clock");
+ return ret;
req.qsee_cmd_id = QSEOS_APP_LOOKUP_COMMAND;
load_img_req.img_name[MAX_APP_NAME_SIZE-1] = '\0';
memcpy(req.app_name, load_img_req.img_name, MAX_APP_NAME_SIZE);
ret = __qseecom_check_app_exists(req);
if (ret < 0) {
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return ret;
}
@@ -672,7 +838,7 @@
load_img_req.ifd_data_fd);
if (IS_ERR_OR_NULL(ihandle)) {
pr_err("Ion client could not retrieve the handle\n");
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return -ENOMEM;
}
@@ -697,7 +863,7 @@
pr_err("scm_call to load app failed\n");
if (!IS_ERR_OR_NULL(ihandle))
ion_free(qseecom.ion_clnt, ihandle);
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return -EINVAL;
}
@@ -705,7 +871,7 @@
pr_err("scm_call rsp.result is QSEOS_RESULT_FAILURE\n");
if (!IS_ERR_OR_NULL(ihandle))
ion_free(qseecom.ion_clnt, ihandle);
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return -EFAULT;
}
@@ -716,7 +882,7 @@
ret);
if (!IS_ERR_OR_NULL(ihandle))
ion_free(qseecom.ion_clnt, ihandle);
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return ret;
}
}
@@ -726,7 +892,7 @@
resp.result);
if (!IS_ERR_OR_NULL(ihandle))
ion_free(qseecom.ion_clnt, ihandle);
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return -EFAULT;
}
@@ -735,7 +901,7 @@
entry = kmalloc(sizeof(*entry), GFP_KERNEL);
if (!entry) {
pr_err("kmalloc failed\n");
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return -ENOMEM;
}
entry->app_id = app_id;
@@ -758,10 +924,10 @@
if (copy_to_user(argp, &load_img_req, sizeof(load_img_req))) {
pr_err("copy_to_user failed\n");
kzfree(entry);
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return -EFAULT;
}
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return 0;
}
@@ -949,6 +1115,8 @@
return -EINVAL;
}
+ data->type = QSEECOM_SECURE_SERVICE;
+
switch (req.cmd_id) {
case QSEOS_RPMB_PROVISION_KEY_COMMAND:
case QSEOS_RPMB_ERASE_COMMAND:
@@ -961,15 +1129,25 @@
return -EINVAL;
}
- ret = qsee_vote_for_clock(data, CLK_DFAB);
- if (ret) {
- pr_err("Failed to vote for DFAB clock%d\n", ret);
- return ret;
- }
- ret = qsee_vote_for_clock(data, CLK_SFPB);
- if (ret) {
- pr_err("Failed to vote for SFPB clock%d\n", ret);
- goto exit_reset_dfab_freq;
+ if (qseecom.support_bus_scaling) {
+ qseecom_scale_bus_bandwidth_timer(HIGH,
+ QSEECOM_SEND_CMD_CRYPTO_TIMEOUT);
+ if (ret) {
+ pr_err("Fail to set bw HIGH%d\n", ret);
+ return ret;
+ }
+ } else {
+ ret = qsee_vote_for_clock(data, CLK_DFAB);
+ if (ret) {
+ pr_err("Failed to vote for DFAB clock%d\n", ret);
+ return ret;
+ }
+ ret = qsee_vote_for_clock(data, CLK_SFPB);
+ if (ret) {
+ qsee_disable_clock_vote(data, CLK_DFAB);
+ pr_err("Failed to vote for SFPB clock%d\n", ret);
+ goto exit;
+ }
}
msm_ion_do_cache_op(qseecom.ion_clnt, data->client.ihandle,
@@ -983,7 +1161,11 @@
ION_IOC_INV_CACHES);
if (ret) {
pr_err("qseecom_scm_call failed with err: %d\n", ret);
- goto exit_reset_sdfab_freq;
+ if (!qseecom.support_bus_scaling) {
+ qsee_disable_clock_vote(data, CLK_DFAB);
+ qsee_disable_clock_vote(data, CLK_SFPB);
+ }
+ goto exit;
}
switch (resp.result) {
@@ -1006,10 +1188,7 @@
ret = -EINVAL;
break;
}
-exit_reset_sdfab_freq:
- qsee_disable_clock_vote(data, CLK_SFPB);
-exit_reset_dfab_freq:
- qsee_disable_clock_vote(data, CLK_DFAB);
+exit:
return ret;
}
@@ -1121,26 +1300,6 @@
return ret;
}
-static int qseecom_unprotect_buffer(void __user *argp)
-{
- int ret = 0;
- struct ion_handle *ihandle;
- int32_t ion_fd;
-
- ret = copy_from_user(&ion_fd, argp, sizeof(ion_fd));
- if (ret) {
- pr_err("copy_from_user failed");
- return ret;
- }
-
- ihandle = ion_import_dma_buf(qseecom.ion_clnt, ion_fd);
-
- ret = msm_ion_unsecure_buffer(qseecom.ion_clnt, ihandle);
- if (ret)
- return -EINVAL;
- return 0;
-}
-
static int __qseecom_update_cmd_buf(void *msg, bool cleanup,
struct qseecom_dev_handle *data,
bool listener_svc)
@@ -1189,21 +1348,6 @@
pr_err("Ion client can't retrieve the handle\n");
return -ENOMEM;
}
- switch (lstnr_resp->protection_mode) {
- case QSEOS_PROTECT_BUFFER:
- ret = msm_ion_secure_buffer(qseecom.ion_clnt,
- ihandle,
- VIDEO_PIXEL,
- 0);
- break;
- case QSEOS_UNPROTECT_PROTECTED_BUFFER:
- ret = msm_ion_unsecure_buffer(qseecom.ion_clnt,
- ihandle);
- break;
- case QSEOS_UNPROTECTED_BUFFER:
- default:
- break;
- }
field = lstnr_resp->resp_buf_ptr +
lstnr_resp->ifd_data[i].cmd_buf_offset;
} else {
@@ -1515,10 +1659,9 @@
/* Populate the remaining parameters */
load_req.qsee_cmd_id = QSEOS_APP_START_COMMAND;
memcpy(load_req.app_name, appname, MAX_APP_NAME_SIZE);
- ret = qsee_vote_for_clock(data, CLK_SFPB);
+ ret = __qseecom_enable_clk_scale_up(data);
if (ret) {
kzfree(img_data);
- pr_warning("Unable to vote for SFPB clock");
return -EIO;
}
@@ -1530,7 +1673,7 @@
kzfree(img_data);
if (ret) {
pr_err("scm_call to load failed : ret %d\n", ret);
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return -EIO;
}
@@ -1553,7 +1696,7 @@
ret = -EINVAL;
break;
}
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return ret;
}
@@ -1582,9 +1725,8 @@
/* Populate the remaining parameters */
load_req.qsee_cmd_id = QSEOS_LOAD_SERV_IMAGE_COMMAND;
/* Vote for the SFPB clock */
- ret = qsee_vote_for_clock(data, CLK_SFPB);
+ ret = __qseecom_enable_clk_scale_up(data);
if (ret) {
- pr_err("Unable to vote for SFPB clock: ret = %d", ret);
kzfree(img_data);
return -EIO;
}
@@ -1620,7 +1762,7 @@
}
}
kzfree(img_data);
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return ret;
}
@@ -1830,10 +1972,24 @@
pr_err("Unable to find the handle, exiting\n");
else
ret = qseecom_unload_app(data);
- if (data->fast_load_enabled == true)
- qsee_disable_clock_vote(data, CLK_SFPB);
- if (data->perf_enabled == true)
- qsee_disable_clock_vote(data, CLK_DFAB);
+
+ if (qseecom.support_bus_scaling) {
+ mutex_lock(&qsee_bw_mutex);
+ if (data->mode != INACTIVE) {
+ qseecom_unregister_bus_bandwidth_needs(data);
+ if (qseecom.cumulative_mode == INACTIVE) {
+ ret = __qseecom_set_msm_bus_request(INACTIVE);
+ if (ret)
+ pr_err("Fail to scale down bus\n");
+ }
+ }
+ mutex_unlock(&qsee_bw_mutex);
+ } else {
+ if (data->fast_load_enabled == true)
+ qsee_disable_clock_vote(data, CLK_SFPB);
+ if (data->perf_enabled == true)
+ qsee_disable_clock_vote(data, CLK_DFAB);
+ }
if (ret == 0) {
kzfree(data);
kzfree(*handle);
@@ -1864,7 +2020,9 @@
mutex_lock(&app_access_lock);
atomic_inc(&data->ioctl_count);
-
+ if (qseecom.support_bus_scaling)
+ qseecom_scale_bus_bandwidth_timer(INACTIVE,
+ QSEECOM_SEND_CMD_CRYPTO_TIMEOUT);
ret = __qseecom_send_cmd(data, &req);
atomic_dec(&data->ioctl_count);
@@ -1887,17 +2045,30 @@
return -EINVAL;
}
if (high) {
- ret = qsee_vote_for_clock(handle->dev, CLK_DFAB);
- if (ret)
- pr_err("Failed to vote for DFAB clock%d\n", ret);
- ret = qsee_vote_for_clock(handle->dev, CLK_SFPB);
- if (ret) {
- pr_err("Failed to vote for SFPB clock%d\n", ret);
- qsee_disable_clock_vote(handle->dev, CLK_DFAB);
+ if (qseecom.support_bus_scaling) {
+ mutex_lock(&qsee_bw_mutex);
+ __qseecom_register_bus_bandwidth_needs(handle->dev,
+ HIGH);
+ mutex_unlock(&qsee_bw_mutex);
+ if (ret)
+ pr_err("Failed to scale bus (med) %d\n", ret);
+ } else {
+ ret = qsee_vote_for_clock(handle->dev, CLK_DFAB);
+ if (ret)
+ pr_err("Failed to vote for DFAB clock%d\n",
+ ret);
+ ret = qsee_vote_for_clock(handle->dev, CLK_SFPB);
+ if (ret) {
+ pr_err("Failed to vote for SFPB clock%d\n",
+ ret);
+ qsee_disable_clock_vote(handle->dev, CLK_DFAB);
+ }
}
} else {
- qsee_disable_clock_vote(handle->dev, CLK_DFAB);
- qsee_disable_clock_vote(handle->dev, CLK_SFPB);
+ if (!qseecom.support_bus_scaling) {
+ qsee_disable_clock_vote(handle->dev, CLK_DFAB);
+ qsee_disable_clock_vote(handle->dev, CLK_SFPB);
+ }
}
return ret;
}
@@ -2262,9 +2433,8 @@
}
/* Vote for the SFPB clock */
- ret = qsee_vote_for_clock(data, CLK_SFPB);
+ ret = __qseecom_enable_clk_scale_up(data);
if (ret) {
- pr_err("Unable to vote for SFPB clock: ret = %d", ret);
ret = -EIO;
goto exit_cpu_restore;
}
@@ -2302,7 +2472,7 @@
}
exit_disable_clock:
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
exit_cpu_restore:
/* Restore the CPU mask */
mask = CPU_MASK_ALL;
@@ -2459,25 +2629,20 @@
static int __qseecom_generate_and_save_key(struct qseecom_dev_handle *data,
enum qseecom_key_management_usage_type usage,
- uint8_t *key_id, uint32_t flags)
+ struct qseecom_key_generate_ireq *ireq)
{
- struct qseecom_key_generate_ireq ireq;
struct qseecom_command_scm_resp resp;
int ret;
- if (usage != QSEOS_KM_USAGE_DISK_ENCRYPTION) {
+ if (usage < QSEOS_KM_USAGE_DISK_ENCRYPTION ||
+ usage >= QSEOS_KM_USAGE_MAX) {
pr_err("Error:: unsupported usage %d\n", usage);
return -EFAULT;
}
-
- memcpy(ireq.key_id, key_id, QSEECOM_KEY_ID_SIZE);
- ireq.flags = flags;
- ireq.qsee_command_id = QSEOS_GENERATE_KEY;
-
__qseecom_enable_clk(CLK_QSEE);
ret = scm_call(SCM_SVC_TZSCHEDULER, 1,
- &ireq, sizeof(struct qseecom_key_generate_ireq),
+ ireq, sizeof(struct qseecom_key_generate_ireq),
&resp, sizeof(resp));
if (ret) {
pr_err("scm call to generate key failed : %d\n", ret);
@@ -2515,9 +2680,8 @@
static int __qseecom_delete_saved_key(struct qseecom_dev_handle *data,
enum qseecom_key_management_usage_type usage,
- uint8_t *key_id, uint32_t flags)
+ struct qseecom_key_delete_ireq *ireq)
{
- struct qseecom_key_delete_ireq ireq;
struct qseecom_command_scm_resp resp;
int ret;
@@ -2526,14 +2690,10 @@
return -EFAULT;
}
- memcpy(ireq.key_id, key_id, QSEECOM_KEY_ID_SIZE);
- ireq.flags = flags;
- ireq.qsee_command_id = QSEOS_DELETE_KEY;
-
__qseecom_enable_clk(CLK_QSEE);
ret = scm_call(SCM_SVC_TZSCHEDULER, 1,
- &ireq, sizeof(struct qseecom_key_delete_ireq),
+ ireq, sizeof(struct qseecom_key_delete_ireq),
&resp, sizeof(struct qseecom_command_scm_resp));
if (ret) {
pr_err("scm call to delete key failed : %d\n", ret);
@@ -2563,13 +2723,13 @@
static int __qseecom_set_clear_ce_key(struct qseecom_dev_handle *data,
enum qseecom_key_management_usage_type usage,
- struct qseecom_set_key_parameter *set_key_para)
+ struct qseecom_key_select_ireq *ireq)
{
- struct qseecom_key_select_ireq ireq;
struct qseecom_command_scm_resp resp;
int ret;
- if (usage != QSEOS_KM_USAGE_DISK_ENCRYPTION) {
+ if (usage < QSEOS_KM_USAGE_DISK_ENCRYPTION ||
+ usage >= QSEOS_KM_USAGE_MAX) {
pr_err("Error:: unsupported usage %d\n", usage);
return -EFAULT;
}
@@ -2578,24 +2738,8 @@
if (qseecom.qsee.instance != qseecom.ce_drv.instance)
__qseecom_enable_clk(CLK_CE_DRV);
- memcpy(ireq.key_id, set_key_para->key_id, QSEECOM_KEY_ID_SIZE);
- ireq.qsee_command_id = QSEOS_SET_KEY;
- ireq.ce = set_key_para->ce_hw;
- ireq.pipe = set_key_para->pipe;
- ireq.flags = set_key_para->flags;
-
- /* set both PIPE_ENC and PIPE_ENC_XTS*/
- ireq.pipe_type = QSEOS_PIPE_ENC|QSEOS_PIPE_ENC_XTS;
-
- if (set_key_para->set_clear_key_flag ==
- QSEECOM_SET_CE_KEY_CMD)
- memcpy((void *)ireq.hash, (void *)set_key_para->hash32,
- QSEECOM_HASH_SIZE);
- else
- memset((void *)ireq.hash, 0, QSEECOM_HASH_SIZE);
-
ret = scm_call(SCM_SVC_TZSCHEDULER, 1,
- &ireq, sizeof(struct qseecom_key_select_ireq),
+ ireq, sizeof(struct qseecom_key_select_ireq),
&resp, sizeof(struct qseecom_command_scm_resp));
if (ret) {
pr_err("scm call to set QSEOS_PIPE_ENC key failed : %d\n", ret);
@@ -2628,16 +2772,63 @@
return ret;
}
+static int __qseecom_update_current_key_user_info(
+ struct qseecom_dev_handle *data,
+ enum qseecom_key_management_usage_type usage,
+ struct qseecom_key_userinfo_update_ireq *ireq)
+{
+ struct qseecom_command_scm_resp resp;
+ int ret;
+
+ if (usage < QSEOS_KM_USAGE_DISK_ENCRYPTION ||
+ usage >= QSEOS_KM_USAGE_MAX) {
+ pr_err("Error:: unsupported usage %d\n", usage);
+ return -EFAULT;
+ }
+
+ __qseecom_enable_clk(CLK_QSEE);
+
+ ret = scm_call(SCM_SVC_TZSCHEDULER, 1,
+ ireq, sizeof(struct qseecom_key_userinfo_update_ireq),
+ &resp, sizeof(struct qseecom_command_scm_resp));
+ if (ret) {
+ pr_err("scm call to update key userinfo failed : %d\n", ret);
+ __qseecom_disable_clk(CLK_QSEE);
+ if (qseecom.qsee.instance != qseecom.ce_drv.instance)
+ __qseecom_disable_clk(CLK_CE_DRV);
+ return ret;
+ }
+
+ switch (resp.result) {
+ case QSEOS_RESULT_SUCCESS:
+ break;
+ case QSEOS_RESULT_INCOMPLETE:
+ ret = __qseecom_process_incomplete_cmd(data, &resp);
+ if (ret)
+ pr_err("process_incomplete_cmd FAILED, resp.result %d\n",
+ resp.result);
+ break;
+ case QSEOS_RESULT_FAILURE:
+ default:
+ pr_err("Set key scm call failed resp.result %d\n", resp.result);
+ ret = -EINVAL;
+ break;
+ }
+
+ __qseecom_disable_clk(CLK_QSEE);
+ return ret;
+}
+
static int qseecom_create_key(struct qseecom_dev_handle *data,
void __user *argp)
{
uint32_t ce_hw = 0;
uint32_t pipe = 0;
- uint8_t key_id[QSEECOM_KEY_ID_SIZE] = {0};
int ret = 0;
uint32_t flags = 0;
- struct qseecom_set_key_parameter set_key_para;
struct qseecom_create_key_req create_key_req;
+ struct qseecom_key_generate_ireq generate_key_ireq;
+ struct qseecom_key_select_ireq set_key_ireq;
ret = copy_from_user(&create_key_req, argp, sizeof(create_key_req));
if (ret) {
@@ -2645,7 +2836,8 @@
return ret;
}
- if (create_key_req.usage != QSEOS_KM_USAGE_DISK_ENCRYPTION) {
+ if (create_key_req.usage < QSEOS_KM_USAGE_DISK_ENCRYPTION ||
+ create_key_req.usage >= QSEOS_KM_USAGE_MAX) {
pr_err("Error:: unsupported usage %d\n", create_key_req.usage);
return -EFAULT;
}
@@ -2656,23 +2848,40 @@
return -EINVAL;
}
+ generate_key_ireq.flags = flags;
+ generate_key_ireq.qsee_command_id = QSEOS_GENERATE_KEY;
+ memset((void *)generate_key_ireq.key_id, 0, QSEECOM_KEY_ID_SIZE);
+ memset((void *)generate_key_ireq.hash32, 0, QSEECOM_HASH_SIZE);
+ memcpy((void *)generate_key_ireq.key_id,
+ (void *)key_id_array[create_key_req.usage - 1],
+ QSEECOM_KEY_ID_SIZE);
+ memcpy((void *)generate_key_ireq.hash32,
+ (void *)create_key_req.hash32, QSEECOM_HASH_SIZE);
+
ret = __qseecom_generate_and_save_key(data, create_key_req.usage,
- key_id, flags);
+ &generate_key_ireq);
if (ret) {
pr_err("Failed to generate key on storage: %d\n", ret);
return -EFAULT;
}
- set_key_para.ce_hw = ce_hw;
- set_key_para.pipe = pipe;
- memcpy(set_key_para.key_id, key_id, QSEECOM_KEY_ID_SIZE);
- set_key_para.flags = flags;
- set_key_para.set_clear_key_flag = QSEECOM_SET_CE_KEY_CMD;
- memcpy((void *)set_key_para.hash32, (void *)create_key_req.hash32,
+ set_key_ireq.qsee_command_id = QSEOS_SET_KEY;
+ set_key_ireq.ce = ce_hw;
+ set_key_ireq.pipe = pipe;
+ set_key_ireq.flags = flags;
+
+ /* set both PIPE_ENC and PIPE_ENC_XTS*/
+ set_key_ireq.pipe_type = QSEOS_PIPE_ENC|QSEOS_PIPE_ENC_XTS;
+ memset((void *)set_key_ireq.key_id, 0, QSEECOM_KEY_ID_SIZE);
+ memset((void *)set_key_ireq.hash32, 0, QSEECOM_HASH_SIZE);
+ memcpy((void *)set_key_ireq.key_id,
+ (void *)key_id_array[create_key_req.usage - 1],
+ QSEECOM_KEY_ID_SIZE);
+ memcpy((void *)set_key_ireq.hash32, (void *)create_key_req.hash32,
QSEECOM_HASH_SIZE);
ret = __qseecom_set_clear_ce_key(data, create_key_req.usage,
- &set_key_para);
+ &set_key_ireq);
if (ret) {
pr_err("Failed to create key: pipe %d, ce %d: %d\n",
pipe, ce_hw, ret);
@@ -2687,12 +2896,12 @@
{
uint32_t ce_hw = 0;
uint32_t pipe = 0;
- uint8_t key_id[QSEECOM_KEY_ID_SIZE] = {0};
int ret = 0;
uint32_t flags = 0;
int i;
struct qseecom_wipe_key_req wipe_key_req;
- struct qseecom_set_key_parameter clear_key_para;
+ struct qseecom_key_delete_ireq delete_key_ireq;
+ struct qseecom_key_select_ireq clear_key_ireq;
ret = copy_from_user(&wipe_key_req, argp, sizeof(wipe_key_req));
if (ret) {
@@ -2700,7 +2909,8 @@
return ret;
}
- if (wipe_key_req.usage != QSEOS_KM_USAGE_DISK_ENCRYPTION) {
+ if (wipe_key_req.usage < QSEOS_KM_USAGE_DISK_ENCRYPTION ||
+ wipe_key_req.usage >= QSEOS_KM_USAGE_MAX) {
pr_err("Error:: unsupported usage %d\n", wipe_key_req.usage);
return -EFAULT;
}
@@ -2711,22 +2921,32 @@
return -EINVAL;
}
- ret = __qseecom_delete_saved_key(data, wipe_key_req.usage, key_id,
- flags);
+ delete_key_ireq.flags = flags;
+ delete_key_ireq.qsee_command_id = QSEOS_DELETE_KEY;
+ memset((void *)delete_key_ireq.key_id, 0, QSEECOM_KEY_ID_SIZE);
+ memcpy((void *)delete_key_ireq.key_id,
+ (void *)key_id_array[wipe_key_req.usage - 1],
+ QSEECOM_KEY_ID_SIZE);
+ memset((void *)delete_key_ireq.hash32, 0, QSEECOM_HASH_SIZE);
+
+ ret = __qseecom_delete_saved_key(data, wipe_key_req.usage,
+ &delete_key_ireq);
if (ret) {
pr_err("Failed to delete key from ssd storage: %d\n", ret);
return -EFAULT;
}
- /* an invalid key_id 0xff is used to indicate clear key*/
+ clear_key_ireq.qsee_command_id = QSEOS_SET_KEY;
+ clear_key_ireq.ce = ce_hw;
+ clear_key_ireq.pipe = pipe;
+ clear_key_ireq.flags = flags;
+ clear_key_ireq.pipe_type = QSEOS_PIPE_ENC|QSEOS_PIPE_ENC_XTS;
for (i = 0; i < QSEECOM_KEY_ID_SIZE; i++)
- clear_key_para.key_id[i] = 0xff;
- clear_key_para.ce_hw = ce_hw;
- clear_key_para.pipe = pipe;
- clear_key_para.flags = flags;
- clear_key_para.set_clear_key_flag = QSEECOM_CLEAR_CE_KEY_CMD;
+ clear_key_ireq.key_id[i] = 0xff;
+ memset((void *)clear_key_ireq.hash32, 0, QSEECOM_HASH_SIZE);
+
ret = __qseecom_set_clear_ce_key(data, wipe_key_req.usage,
- &clear_key_para);
+ &clear_key_ireq);
if (ret) {
pr_err("Failed to wipe key: pipe %d, ce %d: %d\n",
pipe, ce_hw, ret);
@@ -2736,6 +2956,48 @@
return ret;
}
+static int qseecom_update_key_user_info(struct qseecom_dev_handle *data,
+ void __user *argp)
+{
+ int ret = 0;
+ uint32_t flags = 0;
+ struct qseecom_update_key_userinfo_req update_key_req;
+ struct qseecom_key_userinfo_update_ireq ireq;
+
+ ret = copy_from_user(&update_key_req, argp, sizeof(update_key_req));
+ if (ret) {
+ pr_err("copy_from_user failed\n");
+ return ret;
+ }
+
+ if (update_key_req.usage < QSEOS_KM_USAGE_DISK_ENCRYPTION ||
+ update_key_req.usage >= QSEOS_KM_USAGE_MAX) {
+ pr_err("Error:: unsupported usage %d\n", update_key_req.usage);
+ return -EFAULT;
+ }
+
+ ireq.qsee_command_id = QSEOS_UPDATE_KEY_USERINFO;
+ ireq.flags = flags;
+ memset(ireq.key_id, 0, QSEECOM_KEY_ID_SIZE);
+ memset((void *)ireq.current_hash32, 0, QSEECOM_HASH_SIZE);
+ memset((void *)ireq.new_hash32, 0, QSEECOM_HASH_SIZE);
+ memcpy(ireq.key_id, key_id_array[update_key_req.usage - 1],
+ QSEECOM_KEY_ID_SIZE);
+ memcpy((void *)ireq.current_hash32,
+ (void *)update_key_req.current_hash32, QSEECOM_HASH_SIZE);
+ memcpy((void *)ireq.new_hash32,
+ (void *)update_key_req.new_hash32, QSEECOM_HASH_SIZE);
+
+ ret = __qseecom_update_current_key_user_info(data, update_key_req.usage,
+ &ireq);
+ if (ret) {
+ pr_err("Failed to update key info: %d\n", ret);
+ return -EFAULT;
+ }
+ return ret;
+
+}
+
static int qseecom_is_es_activated(void __user *argp)
{
struct qseecom_is_es_activated_req req;
@@ -2853,6 +3115,7 @@
break;
}
case QSEECOM_IOCTL_SEND_CMD_REQ: {
+ pr_debug("qseecom.current_mode %d\n", qseecom.current_mode);
if ((data->client.app_id == 0) ||
(data->type != QSEECOM_CLIENT_APP)) {
pr_err("send cmd req: invalid handle (%d) app_id(%d)\n",
@@ -2862,6 +3125,9 @@
}
/* Only one client allowed here at a time */
mutex_lock(&app_access_lock);
+ if (qseecom.support_bus_scaling)
+ qseecom_scale_bus_bandwidth_timer(INACTIVE,
+ QSEECOM_SEND_CMD_CRYPTO_TIMEOUT);
atomic_inc(&data->ioctl_count);
ret = qseecom_send_cmd(data, argp);
atomic_dec(&data->ioctl_count);
@@ -2872,6 +3138,7 @@
break;
}
case QSEECOM_IOCTL_SEND_MODFD_CMD_REQ: {
+ pr_debug("qseecom.current_mode %d\n", qseecom.current_mode);
if ((data->client.app_id == 0) ||
(data->type != QSEECOM_CLIENT_APP)) {
pr_err("send mdfd cmd: invalid handle (%d) appid(%d)\n",
@@ -2881,6 +3148,9 @@
}
/* Only one client allowed here at a time */
mutex_lock(&app_access_lock);
+ if (qseecom.support_bus_scaling)
+ qseecom_scale_bus_bandwidth_timer(INACTIVE,
+ QSEECOM_SEND_CMD_CRYPTO_TIMEOUT);
atomic_inc(&data->ioctl_count);
ret = qseecom_send_modfd_cmd(data, argp);
atomic_dec(&data->ioctl_count);
@@ -3007,12 +3277,18 @@
break;
}
atomic_inc(&data->ioctl_count);
- ret = qsee_vote_for_clock(data, CLK_DFAB);
- if (ret)
- pr_err("Failed to vote for DFAB clock%d\n", ret);
- ret = qsee_vote_for_clock(data, CLK_SFPB);
- if (ret)
- pr_err("Failed to vote for SFPB clock%d\n", ret);
+ if (qseecom.support_bus_scaling) {
+ mutex_lock(&qsee_bw_mutex);
+ __qseecom_register_bus_bandwidth_needs(data, HIGH);
+ mutex_unlock(&qsee_bw_mutex);
+ } else {
+ ret = qsee_vote_for_clock(data, CLK_DFAB);
+ if (ret)
+ pr_err("Fail to vote for DFAB clock%d\n", ret);
+ ret = qsee_vote_for_clock(data, CLK_SFPB);
+ if (ret)
+ pr_err("Fail to vote for SFPB clock%d\n", ret);
+ }
atomic_dec(&data->ioctl_count);
break;
}
@@ -3032,8 +3308,24 @@
break;
}
atomic_inc(&data->ioctl_count);
+ if (!qseecom.support_bus_scaling) {
qsee_disable_clock_vote(data, CLK_DFAB);
qsee_disable_clock_vote(data, CLK_SFPB);
+ }
+ atomic_dec(&data->ioctl_count);
+ break;
+ }
+
+ case QSEECOM_IOCTL_SET_BUS_SCALING_REQ: {
+ if ((data->client.app_id == 0) ||
+ (data->type != QSEECOM_CLIENT_APP)) {
+ pr_err("set bus scale: invalid handle (%d) appid(%d)\n",
+ data->type, data->client.app_id);
+ ret = -EINVAL;
+ break;
+ }
+ atomic_inc(&data->ioctl_count);
+ ret = qseecom_scale_bus_bandwidth(data, argp);
atomic_dec(&data->ioctl_count);
break;
}
@@ -3115,14 +3407,12 @@
return -EINVAL;
}
data->released = true;
- mutex_lock(&app_access_lock);
atomic_inc(&data->ioctl_count);
ret = qseecom_create_key(data, argp);
if (ret)
pr_err("failed to create encryption key: %d\n", ret);
atomic_dec(&data->ioctl_count);
- mutex_unlock(&app_access_lock);
break;
}
case QSEECOM_IOCTL_WIPE_KEY_REQ: {
@@ -3138,13 +3428,31 @@
return -EINVAL;
}
data->released = true;
- mutex_lock(&app_access_lock);
atomic_inc(&data->ioctl_count);
ret = qseecom_wipe_key(data, argp);
if (ret)
pr_err("failed to wipe encryption key: %d\n", ret);
atomic_dec(&data->ioctl_count);
- mutex_unlock(&app_access_lock);
+ break;
+ }
+ case QSEECOM_IOCTL_UPDATE_KEY_USER_INFO_REQ: {
+ if (data->type != QSEECOM_GENERIC) {
+ pr_err("update key req: invalid handle (%d)\n",
+ data->type);
+ ret = -EINVAL;
+ break;
+ }
+ if (qseecom.qsee_version < QSEE_VERSION_05) {
+ pr_err("Update Key feature unsupported in qsee ver %u\n",
+ qseecom.qsee_version);
+ return -EINVAL;
+ }
+ data->released = true;
+ atomic_inc(&data->ioctl_count);
+ ret = qseecom_update_key_user_info(data, argp);
+ if (ret)
+ pr_err("failed to update key user info: %d\n", ret);
+ atomic_dec(&data->ioctl_count);
break;
}
case QSEECOM_IOCTL_SAVE_PARTITION_HASH_REQ: {
@@ -3194,23 +3502,6 @@
pr_err("failed qseecom_send_mod_resp: %d\n", ret);
break;
}
- case QSEECOM_IOCTL_UNPROTECT_BUF: {
- if ((data->listener.id == 0) ||
- (data->type != QSEECOM_LISTENER_SERVICE)) {
- pr_err("receive req: invalid handle (%d), lid(%d)\n",
- data->type, data->listener.id);
- ret = -EINVAL;
- break;
- }
- /* Only one client allowed here at a time */
- atomic_inc(&data->ioctl_count);
- ret = qseecom_unprotect_buffer(argp);
- atomic_dec(&data->ioctl_count);
- wake_up_all(&data->abort_wq);
- if (ret)
- pr_err("failed qseecom_unprotect: %d\n", ret);
- break;
- }
default:
pr_err("Invalid IOCTL: %d\n", cmd);
return -EINVAL;
@@ -3232,6 +3523,7 @@
data->abort = 0;
data->type = QSEECOM_GENERIC;
data->released = false;
+ data->mode = INACTIVE;
init_waitqueue_head(&data->abort_wq);
atomic_set(&data->ioctl_count, 0);
@@ -3244,8 +3536,8 @@
int ret = 0;
if (data->released == false) {
- pr_warn("data: released = false, type = %d, data = 0x%x\n",
- data->type, (u32)data);
+ pr_warn("data: released=false, type=%d, mode=%d, data=0x%x\n",
+ data->type, data->mode, (u32)data);
switch (data->type) {
case QSEECOM_LISTENER_SERVICE:
ret = qseecom_unregister_listener(data);
@@ -3268,11 +3560,23 @@
}
}
- if (data->fast_load_enabled == true)
- qsee_disable_clock_vote(data, CLK_SFPB);
- if (data->perf_enabled == true)
- qsee_disable_clock_vote(data, CLK_DFAB);
-
+ if (qseecom.support_bus_scaling) {
+ mutex_lock(&qsee_bw_mutex);
+ if (data->mode != INACTIVE) {
+ qseecom_unregister_bus_bandwidth_needs(data);
+ if (qseecom.cumulative_mode == INACTIVE) {
+ ret = __qseecom_set_msm_bus_request(INACTIVE);
+ if (ret)
+ pr_err("Fail to scale down bus\n");
+ }
+ }
+ mutex_unlock(&qsee_bw_mutex);
+ } else {
+ if (data->fast_load_enabled == true)
+ qsee_disable_clock_vote(data, CLK_SFPB);
+ if (data->perf_enabled == true)
+ qsee_disable_clock_vote(data, CLK_DFAB);
+ }
kfree(data);
return ret;
@@ -3415,6 +3719,10 @@
qseecom.qsee.ce_core_src_clk = NULL;
qseecom.qsee.ce_bus_clk = NULL;
+ qseecom.cumulative_mode = 0;
+ qseecom.current_mode = INACTIVE;
+ qseecom.support_bus_scaling = false;
+
qseecom.ce_drv.ce_core_clk = NULL;
qseecom.ce_drv.ce_clk = NULL;
qseecom.ce_drv.ce_core_src_clk = NULL;
@@ -3494,7 +3802,11 @@
/* register client for bus scaling */
if (pdev->dev.of_node) {
-
+ qseecom.support_bus_scaling =
+ of_property_read_bool((&pdev->dev)->of_node,
+ "qcom,support-bus-scaling");
+ pr_warn("support_bus_scaling=0x%x",
+ qseecom.support_bus_scaling);
if (of_property_read_u32((&pdev->dev)->of_node,
"qcom,disk-encrypt-pipe-pair",
&qseecom.ce_info.disk_encrypt_pipe)) {
@@ -3587,7 +3899,13 @@
qseecom_platform_support = (struct msm_bus_scale_pdata *)
pdev->dev.platform_data;
}
-
+ if (qseecom.support_bus_scaling) {
+ init_timer(&(qseecom.bw_scale_down_timer));
+ INIT_WORK(&qseecom.bw_inactive_req_ws,
+ qseecom_bw_inactive_req_work);
+ qseecom.bw_scale_down_timer.function =
+ qseecom_scale_bus_bandwidth_timer_callback;
+ }
qseecom.qsee_perf_client = msm_bus_scale_register_client(
qseecom_platform_support);
@@ -3653,6 +3971,11 @@
if (pdev->dev.platform_data != NULL)
msm_bus_scale_unregister_client(qseecom.qsee_perf_client);
+ if (qseecom.support_bus_scaling) {
+ cancel_work_sync(&qseecom.bw_inactive_req_ws);
+ del_timer_sync(&qseecom.bw_scale_down_timer);
+ }
+
/* register client for bus scaling */
if (pdev->dev.of_node) {
__qseecom_deinit_clk(CLK_QSEE);
diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c
index ff3e4ac..f4493a1 100644
--- a/drivers/mmc/card/block.c
+++ b/drivers/mmc/card/block.c
@@ -3160,6 +3160,9 @@
/* send power off notification */
if (mmc_card_mmc(card)) {
mmc_rpm_hold(card->host, &card->dev);
+ mmc_claim_host(card->host);
+ mmc_stop_bkops(card);
+ mmc_release_host(card->host);
mmc_send_long_pon(card);
mmc_rpm_release(card->host, &card->dev);
}
diff --git a/drivers/mmc/card/mmc_block_test.c b/drivers/mmc/card/mmc_block_test.c
index 39296ef..5cc2806 100644
--- a/drivers/mmc/card/mmc_block_test.c
+++ b/drivers/mmc/card/mmc_block_test.c
@@ -2285,6 +2285,9 @@
size_t count,
loff_t *offset)
{
+ if (!access_ok(VERIFY_WRITE, buffer, count))
+ return count;
+
memset((void *)buffer, 0, count);
snprintf(buffer, count,
@@ -2383,6 +2386,9 @@
size_t count,
loff_t *offset)
{
+ if (!access_ok(VERIFY_WRITE, buffer, count))
+ return count;
+
memset((void *)buffer, 0, count);
snprintf(buffer, count,
@@ -2491,6 +2497,9 @@
size_t count,
loff_t *offset)
{
+ if (!access_ok(VERIFY_WRITE, buffer, count))
+ return count;
+
memset((void *)buffer, 0, count);
snprintf(buffer, count,
@@ -2605,6 +2614,9 @@
size_t count,
loff_t *offset)
{
+ if (!access_ok(VERIFY_WRITE, buffer, count))
+ return count;
+
memset((void *)buffer, 0, count);
snprintf(buffer, count,
@@ -2730,6 +2742,9 @@
size_t count,
loff_t *offset)
{
+ if (!access_ok(VERIFY_WRITE, buffer, count))
+ return count;
+
memset((void *)buffer, 0, count);
snprintf(buffer, count,
@@ -2818,6 +2833,9 @@
size_t count,
loff_t *offset)
{
+ if (!access_ok(VERIFY_WRITE, buffer, count))
+ return count;
+
memset((void *)buffer, 0, count);
snprintf(buffer, count,
@@ -2978,6 +2996,9 @@
size_t count,
loff_t *offset)
{
+ if (!access_ok(VERIFY_WRITE, buffer, count))
+ return count;
+
memset((void *)buffer, 0, count);
snprintf(buffer, count,
@@ -3051,6 +3072,9 @@
size_t count,
loff_t *offset)
{
+ if (!access_ok(VERIFY_WRITE, buffer, count))
+ return count;
+
memset((void *)buffer, 0, count);
snprintf(buffer, count,
diff --git a/drivers/mmc/card/queue.c b/drivers/mmc/card/queue.c
index 8986829..cef1a41 100644
--- a/drivers/mmc/card/queue.c
+++ b/drivers/mmc/card/queue.c
@@ -348,22 +348,43 @@
#endif
if (!mqrq_cur->bounce_buf && !mqrq_prev->bounce_buf) {
+ unsigned int max_segs = host->max_segs;
+
blk_queue_bounce_limit(mq->queue, limit);
blk_queue_max_hw_sectors(mq->queue,
min(host->max_blk_count, host->max_req_size / 512));
- blk_queue_max_segments(mq->queue, host->max_segs);
blk_queue_max_segment_size(mq->queue, host->max_seg_size);
+retry:
+ blk_queue_max_segments(mq->queue, host->max_segs);
mqrq_cur->sg = mmc_alloc_sg(host->max_segs, &ret);
- if (ret)
+ if (ret == -ENOMEM)
+ goto cur_sg_alloc_failed;
+ else if (ret)
goto cleanup_queue;
-
mqrq_prev->sg = mmc_alloc_sg(host->max_segs, &ret);
- if (ret)
+ if (ret == -ENOMEM)
+ goto prev_sg_alloc_failed;
+ else if (ret)
goto cleanup_queue;
+
+ goto success;
+
+prev_sg_alloc_failed:
+ kfree(mqrq_cur->sg);
+ mqrq_cur->sg = NULL;
+cur_sg_alloc_failed:
+ host->max_segs /= 2;
+ if (host->max_segs) {
+ goto retry;
+ } else {
+ host->max_segs = max_segs;
+ goto cleanup_queue;
+ }
}
+success:
sema_init(&mq->thread_sem, 1);
mq->thread = kthread_run(mmc_queue_thread, mq, "mmcqd/%d%s",
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index f288231..94a13f9 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -895,7 +895,9 @@
mmc_post_req(host, host->areq->mrq, 0);
host->areq = NULL;
if (areq) {
- if (!(areq->cmd_flags & REQ_URGENT)) {
+ if (!(areq->cmd_flags & (REQ_URGENT
+ | REQ_FUA
+ | REQ_FLUSH))) {
areq->reinsert_req(areq);
mmc_post_req(host, areq->mrq, 0);
} else {
@@ -3146,6 +3148,7 @@
return;
mmc_bus_get(host);
+ mmc_rpm_hold(host, &host->class_dev);
/*
* if there is a _removable_ card registered, check whether it is
@@ -3178,10 +3181,13 @@
/* if there still is a card present, stop here */
if (host->bus_ops != NULL) {
+ mmc_rpm_release(host, &host->class_dev);
mmc_bus_put(host);
goto out;
}
+ mmc_rpm_release(host, &host->class_dev);
+
/*
* Only we can add a new handler, so it's safe to
* release the lock here.
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 4d3a560..739a237 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -2,7 +2,7 @@
* drivers/mmc/host/sdhci-msm.c - Qualcomm MSM SDHCI Platform
* driver source file
*
- * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -2355,6 +2355,12 @@
bool curr_pwrsave;
if (!clock) {
+ /*
+ * disable pwrsave to ensure clock is not auto-gated until
+ * the rate is >400KHz (initialization complete).
+ */
+ writel_relaxed(readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC) &
+ ~CORE_CLK_PWRSAVE, host->ioaddr + CORE_VENDOR_SPEC);
sdhci_msm_prepare_clocks(host, false);
host->clock = clock;
return;
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 830223d..32f5220 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -746,12 +746,6 @@
if (host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL)
return 0xE;
- /* During initialization, don't use max timeout as the clock is slow */
- if ((host->quirks2 & SDHCI_QUIRK2_USE_RESERVED_MAX_TIMEOUT) &&
- (host->clock > 400000)) {
- return 0xF;
- }
-
/* Unspecified timeout, assume max */
if (!data && !cmd->cmd_timeout_ms)
return 0xE;
@@ -1498,6 +1492,7 @@
struct sdhci_host *host;
bool present;
unsigned long flags;
+ u32 tuning_opcode;
host = mmc_priv(mmc);
@@ -1552,14 +1547,25 @@
* is no on-going data transfer. If so, we need to execute
* tuning procedure before sending command.
*/
- if ((host->flags & SDHCI_NEEDS_RETUNING) &&
+ if ((mrq->cmd->opcode != MMC_SEND_TUNING_BLOCK) &&
+ (mrq->cmd->opcode != MMC_SEND_TUNING_BLOCK_HS400) &&
+ (mrq->cmd->opcode != MMC_SEND_TUNING_BLOCK_HS200) &&
+ (host->flags & SDHCI_NEEDS_RETUNING) &&
!(present_state & (SDHCI_DOING_WRITE | SDHCI_DOING_READ))) {
- spin_unlock_irqrestore(&host->lock, flags);
- sdhci_execute_tuning(mmc, mrq->cmd->opcode);
- spin_lock_irqsave(&host->lock, flags);
+ if (mmc->card) {
+ /* eMMC uses cmd21 but sd and sdio use cmd19 */
+ tuning_opcode =
+ mmc->card->type == MMC_TYPE_MMC ?
+ MMC_SEND_TUNING_BLOCK_HS200 :
+ MMC_SEND_TUNING_BLOCK;
+ host->mrq = NULL;
+ spin_unlock_irqrestore(&host->lock, flags);
+ sdhci_execute_tuning(mmc, tuning_opcode);
+ spin_lock_irqsave(&host->lock, flags);
- /* Restore original mmc_request structure */
- host->mrq = mrq;
+ /* Restore original mmc_request structure */
+ host->mrq = mrq;
+ }
}
if (mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23))
@@ -2527,6 +2533,8 @@
}
if (host->cmd->error) {
+ if (host->cmd->error == -EILSEQ)
+ host->flags |= SDHCI_NEEDS_RETUNING;
tasklet_schedule(&host->finish_tasklet);
return;
}
@@ -2655,8 +2663,11 @@
SDHCI_COMMAND));
if ((command != MMC_SEND_TUNING_BLOCK_HS400) &&
(command != MMC_SEND_TUNING_BLOCK_HS200) &&
- (command != MMC_SEND_TUNING_BLOCK))
+ (command != MMC_SEND_TUNING_BLOCK)) {
pr_msg = true;
+ if (intmask & SDHCI_INT_DATA_CRC)
+ host->flags |= SDHCI_NEEDS_RETUNING;
+ }
} else {
pr_msg = true;
}
diff --git a/drivers/net/ethernet/msm/ecm_ipa.c b/drivers/net/ethernet/msm/ecm_ipa.c
index 644a751..cc2ade4 100644
--- a/drivers/net/ethernet/msm/ecm_ipa.c
+++ b/drivers/net/ethernet/msm/ecm_ipa.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -294,6 +294,7 @@
params->ecm_ipa_rx_dp_notify = ecm_ipa_packet_receive_notify;
params->ecm_ipa_tx_dp_notify = ecm_ipa_tx_complete_notify;
params->private = (void *)ecm_ipa_ctx;
+ params->skip_ep_cfg = false;
ecm_ipa_ctx->state = ECM_IPA_INITIALIZED;
ECM_IPA_STATE_DEBUG(ecm_ipa_ctx);
diff --git a/drivers/net/ethernet/msm/msm_rmnet_bam.c b/drivers/net/ethernet/msm/msm_rmnet_bam.c
index 9f06258..7ec317a 100644
--- a/drivers/net/ethernet/msm/msm_rmnet_bam.c
+++ b/drivers/net/ethernet/msm/msm_rmnet_bam.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -341,6 +341,8 @@
if (bam_ret != 0 && bam_ret != -EAGAIN && bam_ret != -EFAULT) {
pr_err("[%s] %s: write returned error %d",
dev->name, __func__, bam_ret);
+ if (RMNET_IS_MODE_QOS(opmode))
+ skb_pull(skb, sizeof(struct QMI_QOS_HDR_S));
return -EPERM;
}
diff --git a/drivers/net/usb/rmnet_usb_data.c b/drivers/net/usb/rmnet_usb_data.c
index f9bb5c8..b0db01e 100644
--- a/drivers/net/usb/rmnet_usb_data.c
+++ b/drivers/net/usb/rmnet_usb_data.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -362,13 +362,10 @@
return skb;
}
-static __be16 rmnet_ip_type_trans(struct sk_buff *skb,
- struct net_device *dev)
+static __be16 rmnet_ip_type_trans(struct sk_buff *skb)
{
__be16 protocol = 0;
- skb->dev = dev;
-
switch (skb->data[0] & 0xf0) {
case 0x40:
protocol = htons(ETH_P_IP);
@@ -404,7 +401,6 @@
/*map urb to actual network iface based on mux id*/
unet_id = unet_offset + mux_id;
skb->dev = unet_list[unet_id]->net;
- entry->dev = unet_list[unet_id];
}
}
@@ -414,7 +410,7 @@
static int rmnet_usb_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
{
if (test_bit(RMNET_MODE_LLP_IP, &dev->data[0]))
- skb->protocol = rmnet_ip_type_trans(skb, dev->net);
+ skb->protocol = rmnet_ip_type_trans(skb);
else /*set zero for eth mode*/
skb->protocol = 0;
diff --git a/drivers/net/wireless/wcnss/wcnss_wlan.c b/drivers/net/wireless/wcnss/wcnss_wlan.c
index 8e695c3..d75c8a3 100644
--- a/drivers/net/wireless/wcnss/wcnss_wlan.c
+++ b/drivers/net/wireless/wcnss/wcnss_wlan.c
@@ -148,6 +148,9 @@
#define MSM_PRONTO_TXP_PHY_ABORT 0xfb080488
#define MSM_PRONTO_BRDG_ERR_SRC 0xfb080fb0
+#define MSM_PRONTO_ALARMS_TXCTL 0xfb0120a8
+#define MSM_PRONTO_ALARMS_TACTL 0xfb012448
+
#define WCNSS_DEF_WLAN_RX_BUFF_COUNT 1024
#define WCNSS_VBATT_THRESHOLD 3500000
#define WCNSS_VBATT_GUARD 200
@@ -167,6 +170,8 @@
#define WCNSS_USR_SERIAL_NUM (WCNSS_USR_CTRL_MSG_START + 1)
#define WCNSS_USR_HAS_CAL_DATA (WCNSS_USR_CTRL_MSG_START + 2)
+#define MAC_ADDRESS_STR "%02x:%02x:%02x:%02x:%02x:%02x"
+
/* message types */
#define WCNSS_CTRL_MSG_START 0x01000000
#define WCNSS_VERSION_REQ (WCNSS_CTRL_MSG_START + 0)
@@ -181,6 +186,8 @@
#define WCNSS_BUILD_VER_REQ (WCNSS_CTRL_MSG_START + 9)
#define WCNSS_BUILD_VER_RSP (WCNSS_CTRL_MSG_START + 10)
+/* max 20mhz channel count */
+#define WCNSS_MAX_CH_NUM 45
#define VALID_VERSION(version) \
((strncmp(version, "INVALID", WCNSS_VERSION_LEN)) ? 1 : 0)
@@ -356,6 +363,8 @@
void __iomem *wlan_tx_status;
void __iomem *wlan_tx_phy_aborts;
void __iomem *wlan_brdg_err_source;
+ void __iomem *alarms_txctl;
+ void __iomem *alarms_tactl;
void __iomem *fiq_reg;
int nv_downloaded;
unsigned char *fw_cal_data;
@@ -371,14 +380,61 @@
int iris_xo_mode_set;
int fw_vbatt_state;
int ctrl_device_opened;
+ char wlan_nv_macAddr[WLAN_MAC_ADDR_SIZE];
struct mutex dev_lock;
struct mutex ctrl_lock;
wait_queue_head_t read_wait;
struct qpnp_adc_tm_btm_param vbat_monitor_params;
struct qpnp_adc_tm_chip *adc_tm_dev;
struct mutex vbat_monitor_mutex;
+ u16 unsafe_ch_count;
+ u16 unsafe_ch_list[WCNSS_MAX_CH_NUM];
} *penv = NULL;
+static ssize_t wcnss_wlan_macaddr_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ char macAddr[WLAN_MAC_ADDR_SIZE];
+
+ if (!penv)
+ return -ENODEV;
+
+ pr_debug("%s: Receive MAC Addr From user space: %s\n", __func__, buf);
+
+ if (WLAN_MAC_ADDR_SIZE != sscanf(buf, MAC_ADDRESS_STR,
+ (int *)&macAddr[0], (int *)&macAddr[1],
+ (int *)&macAddr[2], (int *)&macAddr[3],
+ (int *)&macAddr[4], (int *)&macAddr[5])) {
+
+ pr_err("%s: Failed to Copy MAC\n", __func__);
+ return -EINVAL;
+ }
+
+ memcpy(penv->wlan_nv_macAddr, macAddr, sizeof(penv->wlan_nv_macAddr));
+
+ pr_info("%s: Write MAC Addr:" MAC_ADDRESS_STR "\n", __func__,
+ penv->wlan_nv_macAddr[0], penv->wlan_nv_macAddr[1],
+ penv->wlan_nv_macAddr[2], penv->wlan_nv_macAddr[3],
+ penv->wlan_nv_macAddr[4], penv->wlan_nv_macAddr[5]);
+
+ return count;
+}
+
+static ssize_t wcnss_wlan_macaddr_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ if (!penv)
+ return -ENODEV;
+
+ return scnprintf(buf, PAGE_SIZE, MAC_ADDRESS_STR,
+ penv->wlan_nv_macAddr[0], penv->wlan_nv_macAddr[1],
+ penv->wlan_nv_macAddr[2], penv->wlan_nv_macAddr[3],
+ penv->wlan_nv_macAddr[4], penv->wlan_nv_macAddr[5]);
+}
+
+static DEVICE_ATTR(wcnss_mac_addr, S_IRUSR | S_IWUSR,
+ wcnss_wlan_macaddr_show, wcnss_wlan_macaddr_store);
+
static ssize_t wcnss_serial_number_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
@@ -682,6 +738,12 @@
reg = readl_relaxed(penv->wlan_tx_status);
pr_info_ratelimited("%s: WLAN_TX_STATUS %08x\n", __func__, reg);
+
+ reg = readl_relaxed(penv->alarms_txctl);
+ pr_err("ALARMS_TXCTL %08x\n", reg);
+
+ reg = readl_relaxed(penv->alarms_tactl);
+ pr_err("ALARMS_TACTL %08x\n", reg);
}
EXPORT_SYMBOL(wcnss_pronto_log_debug_regs);
@@ -727,8 +789,14 @@
if (ret)
goto remove_thermal;
+ ret = device_create_file(dev, &dev_attr_wcnss_mac_addr);
+ if (ret)
+ goto remove_version;
+
return 0;
+remove_version:
+ device_remove_file(dev, &dev_attr_wcnss_version);
remove_thermal:
device_remove_file(dev, &dev_attr_thermal_mitigation);
remove_serial:
@@ -743,6 +811,7 @@
device_remove_file(dev, &dev_attr_serial_number);
device_remove_file(dev, &dev_attr_thermal_mitigation);
device_remove_file(dev, &dev_attr_wcnss_version);
+ device_remove_file(dev, &dev_attr_wcnss_mac_addr);
}
}
static void wcnss_smd_notify_event(void *data, unsigned int event)
@@ -1040,6 +1109,20 @@
}
EXPORT_SYMBOL(wcnss_get_serial_number);
+int wcnss_get_wlan_mac_address(char mac_addr[WLAN_MAC_ADDR_SIZE])
+{
+ if (!penv)
+ return -ENODEV;
+
+ memcpy(mac_addr, penv->wlan_nv_macAddr, WLAN_MAC_ADDR_SIZE);
+ pr_debug("%s: Get MAC Addr:" MAC_ADDRESS_STR "\n", __func__,
+ penv->wlan_nv_macAddr[0], penv->wlan_nv_macAddr[1],
+ penv->wlan_nv_macAddr[2], penv->wlan_nv_macAddr[3],
+ penv->wlan_nv_macAddr[4], penv->wlan_nv_macAddr[5]);
+ return 0;
+}
+EXPORT_SYMBOL(wcnss_get_wlan_mac_address);
+
static int enable_wcnss_suspend_notify;
static int enable_wcnss_suspend_notify_set(const char *val,
@@ -1177,6 +1260,35 @@
}
EXPORT_SYMBOL(wcnss_get_wlan_rx_buff_count);
+int wcnss_set_wlan_unsafe_channel(u16 *unsafe_ch_list, u16 ch_count)
+{
+ if (penv && unsafe_ch_list &&
+ (ch_count <= WCNSS_MAX_CH_NUM)) {
+ memcpy((char *)penv->unsafe_ch_list,
+ (char *)unsafe_ch_list, ch_count * sizeof(u16));
+ penv->unsafe_ch_count = ch_count;
+ return 0;
+ } else
+ return -ENODEV;
+}
+EXPORT_SYMBOL(wcnss_set_wlan_unsafe_channel);
+
+int wcnss_get_wlan_unsafe_channel(u16 *unsafe_ch_list, u16 buffer_size,
+ u16 *ch_count)
+{
+ if (penv) {
+ if (buffer_size < penv->unsafe_ch_count * sizeof(u16))
+ return -ENODEV;
+ memcpy((char *)unsafe_ch_list,
+ (char *)penv->unsafe_ch_list,
+ penv->unsafe_ch_count * sizeof(u16));
+ *ch_count = penv->unsafe_ch_count;
+ return 0;
+ } else
+ return -ENODEV;
+}
+EXPORT_SYMBOL(wcnss_get_wlan_unsafe_channel);
+
static int wcnss_smd_tx(void *data, int len)
{
int ret = 0;
@@ -2085,6 +2197,18 @@
pr_err("%s: ioremap wlan TX STATUS failed\n", __func__);
goto fail_ioremap9;
}
+ penv->alarms_txctl = ioremap(MSM_PRONTO_ALARMS_TXCTL, SZ_8);
+ if (!penv->alarms_txctl) {
+ ret = -ENOMEM;
+ pr_err("%s: ioremap alarms TXCTL failed\n", __func__);
+ goto fail_ioremap10;
+ }
+ penv->alarms_tactl = ioremap(MSM_PRONTO_ALARMS_TACTL, SZ_8);
+ if (!penv->alarms_tactl) {
+ ret = -ENOMEM;
+ pr_err("%s: ioremap alarms TACTL failed\n", __func__);
+ goto fail_ioremap11;
+ }
}
penv->adc_tm_dev = qpnp_get_adc_tm(&penv->pdev->dev, "wcnss");
if (IS_ERR(penv->adc_tm_dev)) {
@@ -2110,6 +2234,12 @@
fail_pil:
if (penv->riva_ccu_base)
iounmap(penv->riva_ccu_base);
+ if (penv->alarms_tactl)
+ iounmap(penv->alarms_tactl);
+fail_ioremap11:
+ if (penv->alarms_txctl)
+ iounmap(penv->alarms_txctl);
+fail_ioremap10:
if (penv->wlan_tx_status)
iounmap(penv->wlan_tx_status);
fail_ioremap9:
diff --git a/drivers/nfc/nfc-nci.c b/drivers/nfc/nfc-nci.c
index 99e17a6..b808f97 100644
--- a/drivers/nfc/nfc-nci.c
+++ b/drivers/nfc/nfc-nci.c
@@ -33,7 +33,7 @@
unsigned int dis_gpio;
unsigned int ven_gpio;
unsigned int reg;
- const char *clk_src;
+ const char *clk_src_name;
unsigned int clk_src_gpio;
};
@@ -44,15 +44,19 @@
MODULE_DEVICE_TABLE(of, msm_match_table);
-#define MAX_BUFFER_SIZE (780)
+#define MAX_BUFFER_SIZE (780)
+#define PACKET_MAX_LENGTH (258)
/* Read data */
#define PACKET_HEADER_SIZE_NCI (4)
-#define PACKET_TYPE_NCI (16)
-#define MAX_PACKET_SIZE (PACKET_HEADER_SIZE_NCI + 255)
-#define MAX_QCA_REG (116)
+#define PACKET_TYPE_NCI (16)
+#define MAX_PACKET_SIZE (PACKET_HEADER_SIZE_NCI + 255)
+#define MAX_QCA_REG (116)
+/* will timeout in approx. 100ms as 10us steps */
+#define NTF_TIMEOUT (10000)
+#define CORE_RESET_RSP_GID (0x60)
+#define CORE_RESET_OID (0x00)
+#define CORE_RST_NTF_LENGTH (0x02)
-static int nfc_i2c_write(struct i2c_client *client, u8 *buf, int len);
-static int nfcc_initialise(struct i2c_client *client, unsigned short curr_addr);
struct qca199x_dev {
wait_queue_head_t read_wq;
@@ -63,11 +67,23 @@
unsigned int dis_gpio;
unsigned int ven_gpio;
bool irq_enabled;
+ bool sent_first_nci_write;
spinlock_t irq_enabled_lock;
unsigned int count_irq;
enum nfcc_state state;
+ unsigned int clk_src_gpio;
+ const char *clk_src_name;
+ struct clk *s_clk;
+ bool clk_run;
};
+static int nfc_i2c_write(struct i2c_client *client, u8 *buf, int len);
+static int nfcc_initialise(struct i2c_client *client, unsigned short curr_addr);
+static int qca199x_clock_select(struct qca199x_dev *qca199x_dev);
+static int qca199x_clock_deselect(struct qca199x_dev *qca199x_dev);
+
+
+
/*
* To allow filtering of nfc logging from user. This is set via
* IOCTL NFC_KERNEL_LOGGING_MODE.
@@ -205,23 +221,33 @@
/* NORMAL NCI Behaviour */
/* Read the header */
ret = i2c_master_recv(qca199x_dev->client, len, PAYLOAD_HEADER_LENGTH);
+ /*
+ We ignore all packets of length PAYLOAD_HEADER_LENGTH
+ or less (i.e <=3). In this case return a total length
+ of ZERO. So ALL PACKETS MUST HAVE A PAYLOAD.
+ If ret < 0 then this is an error code.
+ */
if (ret != PAYLOAD_HEADER_LENGTH) {
- total = 0;
+ if (ret < 0)
+ total = ret;
+ else
+ total = 0;
goto err;
}
length = len[PAYLOAD_HEADER_LENGTH - 1];
- if (length == 0)
- total = 0;
+ if (length == 0) {
+ ret = 0;
+ total = ret;
+ goto err;
+ }
/** make sure full packet fits in the buffer **/
if ((length > 0) && ((length + PAYLOAD_HEADER_LENGTH) <= count)) {
/* Read the packet */
ret = i2c_master_recv(qca199x_dev->client, tmp, (length +
PAYLOAD_HEADER_LENGTH));
- if (ret < 0) {
- total = 0;
+ total = ret;
+ if (ret < 0)
goto err;
- }
- total = (length + PAYLOAD_HEADER_LENGTH);
}
if (total > 0) {
@@ -232,14 +258,57 @@
total = -EFAULT;
}
}
- mutex_unlock(&qca199x_dev->read_mutex);
err:
- if (ret < 0)
mutex_unlock(&qca199x_dev->read_mutex);
done:
return total;
}
+/*
+ Local routine to read from nfcc buffer. This is called to clear any
+ pending receive messages in the nfcc's read buffer, which may be there
+ following a POR. In this way, the upper layers (Device Transport) will
+ associate the next rsp/ntf nci message with the next nci command to the
+ nfcc. Otherwise, the DT may interpret a ntf from the nfcc as being from
+ the nci core reset command when in fact it was already present in the
+ nfcc read buffer following a POR.
+*/
+
+int nfcc_read_buff_svc(struct qca199x_dev *qca199x_dev)
+{
+ unsigned char tmp[PACKET_MAX_LENGTH];
+ unsigned char len[PAYLOAD_HEADER_LENGTH];
+ int total, length, ret;
+ total = 0;
+ length = 0;
+ mutex_lock(&qca199x_dev->read_mutex);
+ memset(tmp, 0, sizeof(tmp));
+ memset(len, 0, sizeof(len));
+
+ /* Read the header */
+ ret = i2c_master_recv(qca199x_dev->client, len, PAYLOAD_HEADER_LENGTH);
+ if (ret < PAYLOAD_HEADER_LENGTH) {
+ total = ret;
+ goto leave;
+ }
+ length = len[PAYLOAD_HEADER_LENGTH - 1];
+ if (length == 0) {
+ ret = PAYLOAD_HEADER_LENGTH;
+ total = ret;
+ goto leave;
+ }
+ /** make sure full packet fits in the buffer **/
+ if ((length > 0) && ((length + PAYLOAD_HEADER_LENGTH) <= PACKET_MAX_LENGTH)) {
+ /* Read the packet */
+ ret = i2c_master_recv(qca199x_dev->client, tmp, (length +
+ PAYLOAD_HEADER_LENGTH));
+ total = ret;
+ }
+leave:
+ mutex_unlock(&qca199x_dev->read_mutex);
+ return total;
+}
+
static ssize_t nfc_write(struct file *filp, const char __user *buf,
size_t count, loff_t *offset)
{
@@ -247,6 +316,7 @@
char tmp[MAX_BUFFER_SIZE];
int ret = 0;
enum ehandler_mode dmode;
+ int nfcc_buffer = 0;
if (count > MAX_BUFFER_SIZE) {
dev_err(&qca199x_dev->client->dev, "out of memory\n");
@@ -257,10 +327,28 @@
"nfc-nci write: failed to copy from user space\n");
return -EFAULT;
}
+ /*
+ A catch for when the DT is sending the initial NCI write
+ following a hardware POR. In this case we should clear any
+ pending messages in nfcc buffer and open the interrupt gate
+ for new messages coming from the nfcc.
+ */
+ if ((qca199x_dev->sent_first_nci_write == false) &&
+ (qca199x_dev->irq_enabled == false)) {
+ /* check rsp/ntf from nfcc read-side buffer */
+ nfcc_buffer = nfcc_read_buff_svc(qca199x_dev);
+ /* There has been an error while reading from nfcc */
+ if (nfcc_buffer < 0) {
+ dev_err(&qca199x_dev->client->dev,
+ "nfc-nci write: error while servicing nfcc read buffer\n");
+ }
+ qca199x_dev->sent_first_nci_write = true;
+ qca199x_enable_irq(qca199x_dev);
+ }
mutex_lock(&qca199x_dev->read_mutex);
dmode = device_mode.handle_flavour;
/* FTM-DIRECT-I2C RD/WR MODE */
- /* This is a special FTM-i2c mode case,where tester is not using NCI */
+ /* This is a special FTM-i2c mode case, where tester is not using NCI */
if ((dmode == UNSOLICITED_FTM_RAW_MODE) ||
(dmode == SOLICITED_FTM_RAW_MODE)) {
/* Read From Register */
@@ -378,6 +466,9 @@
struct qca199x_dev *qca199x_dev = filp->private_data;
if (arg == 0) {
+ r = qca199x_clock_select(qca199x_dev);
+ if (r < 0)
+ goto err_req;
gpio_set_value(qca199x_dev->dis_gpio, 0);
r = gpio_direction_output(qca199x_dev->dis_gpio, 1);
if (r) {
@@ -389,6 +480,23 @@
gpio_set_value(qca199x_dev->dis_gpio, 0);
msleep(20);
} else if (arg == 1) {
+ /*
+ We are attempting a hardware reset so let us disable
+ interrupts to avoid spurious notifications to upper
+ layers.
+ */
+ qca199x_disable_irq(qca199x_dev);
+ /* Deselection of clock */
+ r = qca199x_clock_deselect(qca199x_dev);
+ if (r < 0)
+ goto err_req;
+ /*
+ Also, set flag for initial NCI write following resetas
+ may wish to do some house keeping. Ensure no pending
+ messages in NFCC buffers which may be wrongly
+ construed as response to initial message
+ */
+ qca199x_dev->sent_first_nci_write = false;
gpio_set_value(qca199x_dev->dis_gpio, 0);
r = gpio_direction_output(qca199x_dev->dis_gpio, 1);
if (r) {
@@ -402,10 +510,12 @@
} else if (arg == 2) {
mutex_lock(&qca199x_dev->read_mutex);
r = nfcc_initialise(qca199x_dev->client, 0xE);
+ /* Also reset first NCI write */
+ qca199x_dev->sent_first_nci_write = false;
mutex_unlock(&qca199x_dev->read_mutex);
if (r) {
dev_err(&qca199x_dev->client->dev,
- "nfc-nci probe: request nfcc initialise failed\n");
+ "nfc_ioctl_power_states: request nfcc initialise failed\n");
goto err_req;
}
} else if (arg == 3) {
@@ -536,8 +646,6 @@
return raw_chip_version;
}
-
-
/*
* Inside nfc_ioctl_kernel_logging
*
@@ -664,72 +772,211 @@
unsigned char raw_1P8_PAD_CFG_CLK_REQ[] = {0xA5, 0x1};
unsigned char raw_1P8_PAD_CFG_PWR_REQ[] = {0xA7, 0x1};
unsigned char buf = 0;
+ bool core_reset_completed = false;
+ unsigned char rsp[6];
+ int time_taken = 0;
+ int ret = 0;
client->addr = curr_addr;
r = i2c_master_send(client, &buf, 1);
+ if (r < 0)
+ goto err_init;
+
buf = 0;
r = i2c_master_recv(client, &buf, 1);
+ if (r < 0)
+ goto err_init;
+
if (0x10 != (0x10 & buf)) {
RAW(s73, 0x02);
r = nfc_i2c_write(client, &raw_s73[0], sizeof(raw_s73));
+ if (r < 0)
+ goto err_init;
+
usleep(1000);
RAW(1p8_CONTROL_011, XTAL_CLOCK | 0x01);
r = nfc_i2c_write(client, &raw_1p8_CONTROL_011[0],
sizeof(raw_1p8_CONTROL_011));
+ if (r < 0)
+ goto err_init;
+
usleep(1000);
RAW(1P8_CONTROL_010, (0x8));
r = nfc_i2c_write(client, &raw_1P8_CONTROL_010[0],
sizeof(raw_1P8_CONTROL_010));
+ if (r < 0)
+ goto err_init;
usleep(10000); /* 10ms wait */
RAW(1P8_CONTROL_010, (0xC));
r = nfc_i2c_write(client, &raw_1P8_CONTROL_010[0],
sizeof(raw_1P8_CONTROL_010));
+ if (r < 0)
+ goto err_init;
+
usleep(100); /* 100uS wait */
RAW(1P8_X0_0B0, (FREQ_SEL_19));
r = nfc_i2c_write(client, &raw_1P8_X0_0B0[0],
sizeof(raw_1P8_X0_0B0));
+ if (r < 0)
+ goto err_init;
+
usleep(1000);
/* PWR_EN = 1 */
RAW(1P8_CONTROL_010, (0xd));
r = nfc_i2c_write(client, &raw_1P8_CONTROL_010[0],
sizeof(raw_1P8_CONTROL_010));
+ if (r < 0)
+ goto err_init;
+
+
usleep(20000); /* 20ms wait */
/* LS_EN = 1 */
RAW(1P8_CONTROL_010, 0xF);
r = nfc_i2c_write(client, &raw_1P8_CONTROL_010[0],
sizeof(raw_1P8_CONTROL_010));
+ if (r < 0)
+ goto err_init;
+
usleep(20000); /* 20ms wait */
/* Enable the PMIC clock */
RAW(1P8_PAD_CFG_CLK_REQ, (0x1));
r = nfc_i2c_write(client, &raw_1P8_PAD_CFG_CLK_REQ[0],
sizeof(raw_1P8_PAD_CFG_CLK_REQ));
+ if (r < 0)
+ goto err_init;
+
usleep(1000);
RAW(1P8_PAD_CFG_PWR_REQ, (0x1));
r = nfc_i2c_write(client, &raw_1P8_PAD_CFG_PWR_REQ[0],
sizeof(raw_1P8_PAD_CFG_PWR_REQ));
+ if (r < 0)
+ goto err_init;
+
usleep(1000);
RAW(slave2, 0x10);
r = nfc_i2c_write(client, &raw_slave2[0], sizeof(raw_slave2));
+ if (r < 0)
+ goto err_init;
+
usleep(1000);
RAW(slave1, NCI_I2C_SLAVE);
r = nfc_i2c_write(client, &raw_slave1[0], sizeof(raw_slave1));
+ if (r < 0)
+ goto err_init;
+
usleep(1000);
/* QCA199x NFCC CPU should now boot... */
r = i2c_master_recv(client, &raw_slave1_rd, 1);
/* Talk on NCI slave address NCI_I2C_SLAVE 0x2C*/
client->addr = NCI_I2C_SLAVE;
+
+ /*
+ Start with small delay and then we will poll until we
+ get a core reset notification - This is time for chip
+ & NFCC controller to come-up.
+ */
+ usleep(1000); /* 1 ms */
+
+ do {
+ ret = i2c_master_recv(client, rsp, 5);
+ /* Found core reset notification */
+ if (((rsp[0] == CORE_RESET_RSP_GID) &&
+ (rsp[1] == CORE_RESET_OID) &&
+ (rsp[2] == CORE_RST_NTF_LENGTH))
+ || time_taken == NTF_TIMEOUT) {
+ core_reset_completed = true;
+ }
+ usleep(10); /* 10us sleep before retry */
+ time_taken++;
+ } while (!core_reset_completed);
r = 0;
} else {
- r = 1;
+ goto err_init;
+ }
+ return r;
+err_init:
+ r = 1;
+ dev_err(&client->dev,
+ "nfc-nci nfcc_initialise: failed. Check Hardware\n");
+ return r;
+}
+/*
+ Routine to Select clocks
+*/
+static int qca199x_clock_select(struct qca199x_dev *qca199x_dev)
+{
+ int r = 0;
+
+ if (!strcmp(qca199x_dev->clk_src_name, "BBCLK2")) {
+ qca199x_dev->s_clk =
+ clk_get(&qca199x_dev->client->dev, "ref_clk");
+ if (qca199x_dev->s_clk == NULL)
+ goto err_invalid_dis_gpio;
+ } else if (!strcmp(qca199x_dev->clk_src_name, "RFCLK3")) {
+ qca199x_dev->s_clk =
+ clk_get(&qca199x_dev->client->dev, "ref_clk_rf");
+ if (qca199x_dev->s_clk == NULL)
+ goto err_invalid_dis_gpio;
+ } else if (!strcmp(qca199x_dev->clk_src_name, "GPCLK")) {
+ if (gpio_is_valid(qca199x_dev->clk_src_gpio)) {
+ qca199x_dev->s_clk =
+ clk_get(&qca199x_dev->client->dev, "core_clk");
+ if (qca199x_dev->s_clk == NULL)
+ goto err_invalid_dis_gpio;
+ } else {
+ goto err_invalid_dis_gpio;
+ }
+ } else if (!strcmp(qca199x_dev->clk_src_name, "GPCLK2")) {
+ if (gpio_is_valid(qca199x_dev->clk_src_gpio)) {
+ qca199x_dev->s_clk =
+ clk_get(&qca199x_dev->client->dev, "core_clk_pvt");
+ if (qca199x_dev->s_clk == NULL)
+ goto err_invalid_dis_gpio;
+ } else {
+ goto err_invalid_dis_gpio;
+ }
+ } else {
+ qca199x_dev->s_clk = NULL;
+ goto err_invalid_dis_gpio;
+ }
+ if (qca199x_dev->clk_run == false) {
+ r = clk_prepare_enable(qca199x_dev->s_clk);
+ if (r)
+ goto err_invalid_clk;
+ qca199x_dev->clk_run = true;
+ }
+ r = 0;
+ return r;
+
+err_invalid_clk:
+ r = -1;
+ return r;
+err_invalid_dis_gpio:
+ r = -2;
+ return r;
+}
+/*
+ Routine to De-Select clocks
+*/
+
+static int qca199x_clock_deselect(struct qca199x_dev *qca199x_dev)
+{
+ int r = -1;
+ if (qca199x_dev->s_clk != NULL) {
+ if (qca199x_dev->clk_run == true) {
+ clk_disable_unprepare(qca199x_dev->s_clk);
+ qca199x_dev->clk_run = false;
+ }
+ return 0;
}
return r;
}
@@ -755,10 +1002,10 @@
if ((!gpio_is_valid(pdata->irq_gpio)))
return -EINVAL;
- r = of_property_read_string(np, "qcom,clk-src", &pdata->clk_src);
+ r = of_property_read_string(np, "qcom,clk-src", &pdata->clk_src_name);
- if ((!strcmp(pdata->clk_src, "GPCLK")) ||
- (!strcmp(pdata->clk_src, "GPCLK2")))
+ if ((!strcmp(pdata->clk_src_name, "GPCLK")) ||
+ (!strcmp(pdata->clk_src_name, "GPCLK2")))
pdata->clk_src_gpio = of_get_named_gpio(np,
"qcom,clk-en-gpio", 0);
@@ -772,7 +1019,6 @@
{
int r = 0;
int irqn = 0;
- struct clk *nfc_clk = NULL;
struct device_node *node = client->dev.of_node;
struct qca199x_platform_data *platform_data;
struct qca199x_dev *qca199x_dev;
@@ -810,12 +1056,13 @@
"nfc-nci probe: failed to allocate memory for module data\n");
return -ENOMEM;
}
+ qca199x_dev->client = client;
if (gpio_is_valid(platform_data->irq_gpio)) {
r = gpio_request(platform_data->irq_gpio, "nfc_irq_gpio");
if (r) {
dev_err(&client->dev, "unable to request gpio [%d]\n",
platform_data->irq_gpio);
- goto err_irq;
+ goto err_free_dev;
}
r = gpio_direction_input(platform_data->irq_gpio);
if (r) {
@@ -843,7 +1090,7 @@
dev_err(&client->dev,
"NFC: unable to request gpio [%d]\n",
platform_data->dis_gpio);
- goto err_free_dev;
+ goto err_irq;
}
r = gpio_direction_output(platform_data->dis_gpio, 1);
if (r) {
@@ -856,40 +1103,17 @@
dev_err(&client->dev, "dis gpio not provided\n");
goto err_irq;
}
- gpio_set_value(platform_data->dis_gpio, 1);/* HPD */
- msleep(20);
- gpio_set_value(platform_data->dis_gpio, 0);/* ULPM */
- if (!strcmp(platform_data->clk_src, "BBCLK2")) {
- nfc_clk = clk_get(&client->dev, "ref_clk");
- if (nfc_clk == NULL)
+ /* Get the clock source name and gpio from from Device Tree */
+ qca199x_dev->clk_src_name = platform_data->clk_src_name;
+ qca199x_dev->clk_src_gpio = platform_data->clk_src_gpio;
+ qca199x_dev->clk_run = false;
+ r = qca199x_clock_select(qca199x_dev);
+ if (r != 0) {
+ if (r == -1)
+ goto err_clk;
+ else
goto err_dis_gpio;
- } else if (!strcmp(platform_data->clk_src, "RFCLK3")) {
- nfc_clk = clk_get(&client->dev, "ref_clk_rf");
- if (nfc_clk == NULL)
- goto err_dis_gpio;
- } else if (!strcmp(platform_data->clk_src, "GPCLK")) {
- if (gpio_is_valid(platform_data->clk_src_gpio)) {
- nfc_clk = clk_get(&client->dev, "core_clk");
- if (nfc_clk == NULL)
- goto err_dis_gpio;
- } else {
- goto err_dis_gpio;
- }
- } else if (!strcmp(platform_data->clk_src, "GPCLK2")) {
- if (gpio_is_valid(platform_data->clk_src_gpio)) {
- nfc_clk = clk_get(&client->dev, "core_clk_pvt");
- if (nfc_clk == NULL)
- goto err_dis_gpio;
- } else {
- goto err_dis_gpio;
- }
- } else {
- nfc_clk = NULL;
}
- r = clk_prepare_enable(nfc_clk);
- if (r)
- goto err_clk;
-
platform_data->ven_gpio = of_get_named_gpio(node,
"qcom,clk-gpio", 0);
@@ -902,7 +1126,6 @@
}
r = gpio_direction_input(platform_data->ven_gpio);
if (r) {
-
dev_err(&client->dev,
"unable to set direction for gpio [%d]\n",
platform_data->ven_gpio);
@@ -915,7 +1138,6 @@
qca199x_dev->dis_gpio = platform_data->dis_gpio;
qca199x_dev->irq_gpio = platform_data->irq_gpio;
qca199x_dev->ven_gpio = platform_data->ven_gpio;
- qca199x_dev->client = client;
/* init mutex and queues */
init_waitqueue_head(&qca199x_dev->read_wq);
@@ -950,12 +1172,6 @@
* for reading. It is cleared when all data has been read.
*/
device_mode.handle_flavour = UNSOLICITED_MODE;
- r = nfcc_initialise(client, platform_data->reg);
- if (r) {
- dev_err(&client->dev, "nfc-nci probe: request nfcc initialise failed\n");
- goto err_nfcc_init_failed;
- }
-
qca199x_dev->irq_enabled = true;
r = request_irq(client->irq, qca199x_dev_irq_handler,
IRQF_TRIGGER_RISING, client->name, qca199x_dev);
@@ -965,12 +1181,12 @@
}
qca199x_disable_irq(qca199x_dev);
i2c_set_clientdata(client, qca199x_dev);
+ gpio_set_value(platform_data->dis_gpio, 1);
dev_dbg(&client->dev,
"nfc-nci probe: %s, probing qca1990 exited successfully\n",
__func__);
return 0;
-err_nfcc_init_failed:
err_request_irq_failed:
misc_deregister(&qca199x_dev->qca199x_device);
err_misc_register:
@@ -978,13 +1194,13 @@
err_ven_gpio:
gpio_free(platform_data->ven_gpio);
err_clk:
- clk_disable_unprepare(nfc_clk);
+ qca199x_clock_deselect(qca199x_dev);
err_dis_gpio:
r = gpio_direction_input(platform_data->dis_gpio);
if (r)
dev_err(&client->dev, "nfc-nci probe: Unable to set direction\n");
- if ((!strcmp(platform_data->clk_src, "GPCLK")) ||
- (!strcmp(platform_data->clk_src, "GPCLK2"))) {
+ if ((!strcmp(platform_data->clk_src_name, "GPCLK")) ||
+ (!strcmp(platform_data->clk_src_name, "GPCLK2"))) {
r = gpio_direction_input(platform_data->clk_src_gpio);
if (r)
dev_err(&client->dev, "nfc-nci probe: Unable to set direction\n");
diff --git a/drivers/platform/msm/ipa/ipa.c b/drivers/platform/msm/ipa/ipa.c
index 1ef1f1b..20603f5 100644
--- a/drivers/platform/msm/ipa/ipa.c
+++ b/drivers/platform/msm/ipa/ipa.c
@@ -205,6 +205,8 @@
retval = -EFAULT;
break;
}
+ /* null terminate the string */
+ nat_mem.dev_name[IPA_RESOURCE_NAME_MAX - 1] = '\0';
if (allocate_nat_device(&nat_mem)) {
retval = -EFAULT;
diff --git a/drivers/platform/msm/ipa/ipa_nat.c b/drivers/platform/msm/ipa/ipa_nat.c
index e2c344f..6ee16fb 100644
--- a/drivers/platform/msm/ipa/ipa_nat.c
+++ b/drivers/platform/msm/ipa/ipa_nat.c
@@ -166,7 +166,7 @@
nat_ctx->dev =
device_create(nat_ctx->class, NULL, nat_ctx->dev_num, nat_ctx,
- mem->dev_name);
+ "%s", mem->dev_name);
if (IS_ERR(nat_ctx->dev)) {
IPAERR("device_create err:%ld\n", PTR_ERR(nat_ctx->dev));
diff --git a/drivers/power/qpnp-bms.c b/drivers/power/qpnp-bms.c
index 85a70ea..2fcab32 100644
--- a/drivers/power/qpnp-bms.c
+++ b/drivers/power/qpnp-bms.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -757,7 +757,20 @@
static bool is_battery_charging(struct qpnp_bms_chip *chip)
{
- return get_battery_status(chip) == POWER_SUPPLY_STATUS_CHARGING;
+ union power_supply_propval ret = {0,};
+
+ if (chip->batt_psy == NULL)
+ chip->batt_psy = power_supply_get_by_name("battery");
+ if (chip->batt_psy) {
+ /* if battery has been registered, use the status property */
+ chip->batt_psy->get_property(chip->batt_psy,
+ POWER_SUPPLY_PROP_CHARGE_TYPE, &ret);
+ return ret.intval != POWER_SUPPLY_CHARGE_TYPE_NONE;
+ }
+
+ /* Default to false if the battery power supply is not registered. */
+ pr_debug("battery power supply is not registered\n");
+ return false;
}
static bool is_battery_full(struct qpnp_bms_chip *chip)
@@ -2496,7 +2509,7 @@
soc = calculate_soc_from_voltage(chip);
} else {
if (!chip->batfet_closed)
- qpnp_iadc_calibrate_for_trim(chip->iadc_dev, true);
+ qpnp_iadc_calibrate_for_trim(chip->iadc_dev, false);
rc = qpnp_vadc_read(chip->vadc_dev, LR_MUX1_BATT_THERM,
&result);
if (rc) {
@@ -2548,7 +2561,7 @@
soc = calculate_soc_from_voltage(chip);
} else {
if (!chip->batfet_closed)
- qpnp_iadc_calibrate_for_trim(chip->iadc_dev, true);
+ qpnp_iadc_calibrate_for_trim(chip->iadc_dev, false);
rc = qpnp_vadc_read(chip->vadc_dev, LR_MUX1_BATT_THERM,
&result);
if (rc) {
@@ -3273,12 +3286,11 @@
{
bool batfet_closed;
- if (chip->iadc_bms_revision2 > CALIB_WRKARND_DIG_MAJOR_MAX)
- return;
-
batfet_closed = is_batfet_closed(chip);
if (chip->batfet_closed != batfet_closed) {
chip->batfet_closed = batfet_closed;
+ if (chip->iadc_bms_revision2 > CALIB_WRKARND_DIG_MAJOR_MAX)
+ return;
if (batfet_closed == false) {
/* batfet opened */
schedule_work(&chip->batfet_open_work);
diff --git a/drivers/power/qpnp-charger.c b/drivers/power/qpnp-charger.c
index 32623f4..1223fe0 100644
--- a/drivers/power/qpnp-charger.c
+++ b/drivers/power/qpnp-charger.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -247,6 +247,7 @@
* @max_voltage_mv: the max volts the batt should be charged up to
* @min_voltage_mv: min battery voltage before turning the FET on
* @batt_weak_voltage_mv: Weak battery voltage threshold
+ * @vbatdet_max_err_mv resume voltage hysterisis
* @max_bat_chg_current: maximum battery charge current in mA
* @warm_bat_chg_ma: warm battery maximum charge current in mA
* @cool_bat_chg_ma: cool battery maximum charge current in mA
@@ -323,6 +324,7 @@
unsigned int max_voltage_mv;
unsigned int min_voltage_mv;
unsigned int batt_weak_voltage_mv;
+ unsigned int vbatdet_max_err_mv;
int prev_usb_max_ma;
int set_vddmax_mv;
int delta_vddmax_mv;
@@ -1197,7 +1199,9 @@
pr_err("failed to read usb_chgpth_sts rc=%d\n", rc);
pr_debug("chg_gone triggered\n");
- if (qpnp_chg_is_usb_chg_plugged_in(chip) && (usb_sts & CHG_GONE_IRQ)) {
+ if ((qpnp_chg_is_usb_chg_plugged_in(chip)
+ || qpnp_chg_is_dc_chg_plugged_in(chip))
+ && (usb_sts & CHG_GONE_IRQ)) {
qpnp_chg_charge_en(chip, 0);
qpnp_chg_force_run_on_batt(chip, 1);
schedule_delayed_work(&chip->arb_stop_work,
@@ -1516,15 +1520,35 @@
return IRQ_HANDLED;
}
+#define TEST_EN_SMBC_LOOP 0xE5
+#define IBAT_REGULATION_DISABLE BIT(2)
static irqreturn_t
qpnp_chg_bat_if_batt_temp_irq_handler(int irq, void *_chip)
{
struct qpnp_chg_chip *chip = _chip;
- int batt_temp_good;
+ int batt_temp_good, rc;
batt_temp_good = qpnp_chg_is_batt_temp_ok(chip);
pr_debug("batt-temp triggered: %d\n", batt_temp_good);
+ rc = qpnp_chg_masked_write(chip,
+ chip->buck_base + SEC_ACCESS,
+ 0xFF,
+ 0xA5, 1);
+ if (rc) {
+ pr_err("failed to write SEC_ACCESS rc=%d\n", rc);
+ return rc;
+ }
+
+ rc = qpnp_chg_masked_write(chip,
+ chip->buck_base + TEST_EN_SMBC_LOOP,
+ IBAT_REGULATION_DISABLE,
+ batt_temp_good ? 0 : IBAT_REGULATION_DISABLE, 1);
+ if (rc) {
+ pr_err("failed to write COMP_OVR1 rc=%d\n", rc);
+ return rc;
+ }
+
pr_debug("psy changed batt_psy\n");
power_supply_changed(&chip->batt_psy);
return IRQ_HANDLED;
@@ -1986,6 +2010,24 @@
return POWER_SUPPLY_CHARGE_TYPE_NONE;
}
+#define DEFAULT_CAPACITY 50
+static int
+get_batt_capacity(struct qpnp_chg_chip *chip)
+{
+ union power_supply_propval ret = {0,};
+
+ if (chip->fake_battery_soc >= 0)
+ return chip->fake_battery_soc;
+ if (chip->use_default_batt_values || !get_prop_batt_present(chip))
+ return DEFAULT_CAPACITY;
+ if (chip->bms_psy) {
+ chip->bms_psy->get_property(chip->bms_psy,
+ POWER_SUPPLY_PROP_CAPACITY, &ret);
+ return ret.intval;
+ }
+ return DEFAULT_CAPACITY;
+}
+
static int
get_prop_batt_status(struct qpnp_chg_chip *chip)
{
@@ -2009,11 +2051,18 @@
return POWER_SUPPLY_CHARGE_TYPE_NONE;
}
- if (chgr_sts & TRKL_CHG_ON_IRQ && bat_if_sts & BAT_FET_ON_IRQ)
+ if ((chgr_sts & TRKL_CHG_ON_IRQ) && !(bat_if_sts & BAT_FET_ON_IRQ))
return POWER_SUPPLY_STATUS_CHARGING;
if (chgr_sts & FAST_CHG_ON_IRQ && bat_if_sts & BAT_FET_ON_IRQ)
return POWER_SUPPLY_STATUS_CHARGING;
+ /* report full if state of charge is 100 and a charger is connected */
+ if ((qpnp_chg_is_usb_chg_plugged_in(chip) ||
+ qpnp_chg_is_dc_chg_plugged_in(chip))
+ && get_batt_capacity(chip) == 100) {
+ return POWER_SUPPLY_STATUS_FULL;
+ }
+
return POWER_SUPPLY_STATUS_DISCHARGING;
}
@@ -2065,7 +2114,6 @@
return 0;
}
-#define DEFAULT_CAPACITY 50
static int
get_prop_capacity(struct qpnp_chg_chip *chip)
{
@@ -3104,12 +3152,13 @@
vbat_lower_than_vbatdet = !(chg_sts & VBAT_DET_LOW_IRQ);
if (vbat_lower_than_vbatdet && vbat_mv <
(chip->max_voltage_mv - chip->resume_delta_mv
- - VBATDET_MAX_ERR_MV)) {
+ - chip->vbatdet_max_err_mv)) {
vbat_low_count++;
pr_debug("woke up too early vbat_mv = %d, max_mv = %d, resume_mv = %d tolerance_mv = %d low_count = %d\n",
vbat_mv, chip->max_voltage_mv,
chip->resume_delta_mv,
- VBATDET_MAX_ERR_MV, vbat_low_count);
+ chip->vbatdet_max_err_mv,
+ vbat_low_count);
if (vbat_low_count >= CONSECUTIVE_COUNT) {
pr_debug("woke up too early stopping\n");
qpnp_chg_enable_irq(&chip->chg_vbatdet_lo);
@@ -3842,6 +3891,7 @@
chip->batt_temp_ok.irq, rc);
return rc;
}
+ qpnp_chg_bat_if_batt_temp_irq_handler(0, chip);
enable_irq_wake(chip->batt_temp_ok.irq);
@@ -4335,6 +4385,7 @@
OF_PROP_READ(chip, cold_batt_p, "batt-cold-percentage", rc, 1);
OF_PROP_READ(chip, soc_resume_limit, "resume-soc", rc, 1);
OF_PROP_READ(chip, batt_weak_voltage_mv, "vbatweak-mv", rc, 1);
+ OF_PROP_READ(chip, vbatdet_max_err_mv, "vbatdet-maxerr-mv", rc, 1);
if (rc)
return rc;
@@ -4353,6 +4404,9 @@
}
}
+ if (!chip->vbatdet_max_err_mv)
+ chip->vbatdet_max_err_mv = VBATDET_MAX_ERR_MV;
+
/* Look up JEITA compliance parameters if cool and warm temp provided */
if (chip->cool_bat_decidegc || chip->warm_bat_decidegc) {
chip->adc_tm_dev = qpnp_get_adc_tm(chip->dev, "chg");
diff --git a/drivers/scsi/scsi_scan.c b/drivers/scsi/scsi_scan.c
index 01b0374..c29d98b 100644
--- a/drivers/scsi/scsi_scan.c
+++ b/drivers/scsi/scsi_scan.c
@@ -925,6 +925,10 @@
transport_configure_device(&sdev->sdev_gendev);
+ /* The LLD can override auto suspend tunables in ->slave_configure() */
+ sdev->use_rpm_auto = 0;
+ sdev->autosuspend_delay = SCSI_DEFAULT_AUTOSUSPEND_DELAY;
+
if (sdev->host->hostt->slave_configure) {
ret = sdev->host->hostt->slave_configure(sdev);
if (ret) {
diff --git a/drivers/scsi/scsi_sysfs.c b/drivers/scsi/scsi_sysfs.c
index 04c2a27..89a1af1 100644
--- a/drivers/scsi/scsi_sysfs.c
+++ b/drivers/scsi/scsi_sysfs.c
@@ -885,7 +885,8 @@
device_enable_async_suspend(&sdev->sdev_gendev);
scsi_autopm_get_target(starget);
pm_runtime_set_active(&sdev->sdev_gendev);
- pm_runtime_forbid(&sdev->sdev_gendev);
+ if (!sdev->use_rpm_auto)
+ pm_runtime_forbid(&sdev->sdev_gendev);
pm_runtime_enable(&sdev->sdev_gendev);
scsi_autopm_put_target(starget);
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
index f454610..2b09d59 100644
--- a/drivers/scsi/sd.c
+++ b/drivers/scsi/sd.c
@@ -2612,6 +2612,10 @@
gd->events |= DISK_EVENT_MEDIA_CHANGE;
}
+ blk_pm_runtime_init(sdp->request_queue, dev);
+ if (sdp->autosuspend_delay >= 0)
+ pm_runtime_set_autosuspend_delay(dev, sdp->autosuspend_delay);
+
add_disk(gd);
sd_dif_config_host(sdkp);
@@ -2619,7 +2623,6 @@
sd_printk(KERN_NOTICE, sdkp, "Attached SCSI %sdisk\n",
sdp->removable ? "removable " : "");
- blk_pm_runtime_init(sdp->request_queue, dev);
scsi_autopm_put_device(sdp);
put_device(&sdkp->dev);
}
diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index b743bd6..48959ab 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -1773,6 +1773,12 @@
*hba_handle = hba;
+ /*
+ * The device-initialize-sequence hasn't been invoked yet.
+ * Set the device to power-off state
+ */
+ ufshcd_set_ufs_dev_poweroff(hba);
+
async_schedule(ufshcd_async_scan, hba);
return 0;
diff --git a/drivers/slimbus/slim-msm-ngd.c b/drivers/slimbus/slim-msm-ngd.c
index adca457..dc728eb 100644
--- a/drivers/slimbus/slim-msm-ngd.c
+++ b/drivers/slimbus/slim-msm-ngd.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -268,8 +268,25 @@
* Messages related to data channel management can't
* wait since they are holding reconfiguration lock.
* clk_pause in resume (which can change state back to
- * MSM_CTRL_AWAKE), will need that lock
+ * MSM_CTRL_AWAKE), will need that lock.
+ * Port disconnection, channel removal calls should pass
+ * through since there is no activity on the bus and
+ * those calls are triggered by clients due to
+ * device_down callback in that situation.
+ * Returning 0 on the disconnections and
+ * removals will ensure consistent state of channels,
+ * ports with the HW
*/
+ if ((txn->mt == SLIM_MSG_MT_DEST_REFERRED_USER) &&
+ ((mc == SLIM_USR_MC_CHAN_CTRL ||
+ mc == SLIM_USR_MC_DISCONNECT_PORT ||
+ mc == SLIM_USR_MC_RECONFIG_NOW)))
+ return 0;
+ if ((txn->mt == SLIM_MSG_MT_CORE) &&
+ ((mc == SLIM_MSG_MC_DISCONNECT_PORT ||
+ mc == SLIM_MSG_MC_NEXT_REMOVE_CHANNEL ||
+ mc == SLIM_USR_MC_RECONFIG_NOW)))
+ return 0;
if ((txn->mt == SLIM_MSG_MT_CORE) &&
((mc >= SLIM_MSG_MC_CONNECT_SOURCE &&
mc <= SLIM_MSG_MC_CHANGE_CONTENT) ||
@@ -278,7 +295,7 @@
return -EREMOTEIO;
if ((txn->mt == SLIM_MSG_MT_DEST_REFERRED_USER) &&
((mc >= SLIM_USR_MC_DEFINE_CHAN &&
- mc <= SLIM_USR_MC_DISCONNECT_PORT)))
+ mc < SLIM_USR_MC_DISCONNECT_PORT)))
return -EREMOTEIO;
timeout = wait_for_completion_timeout(&dev->ctrl_up,
HZ);
diff --git a/drivers/spmi/spmi-dbgfs.c b/drivers/spmi/spmi-dbgfs.c
index 27df09333..b0a354b 100644
--- a/drivers/spmi/spmi-dbgfs.c
+++ b/drivers/spmi/spmi-dbgfs.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -48,9 +48,9 @@
/* Log buffer */
struct spmi_log_buffer {
- u32 rpos; /* Current 'read' position in buffer */
- u32 wpos; /* Current 'write' position in buffer */
- u32 len; /* Length of the buffer */
+ size_t rpos; /* Current 'read' position in buffer */
+ size_t wpos; /* Current 'write' position in buffer */
+ size_t len; /* Length of the buffer */
char data[0]; /* Log buffer */
};
@@ -583,10 +583,10 @@
pr_debug("Creating SPMI debugfs file-system\n");
root = debugfs_create_dir(DFS_ROOT_NAME, NULL);
- if (IS_ERR(root)) {
+ if (IS_ERR_OR_NULL(root)) {
pr_err("Error creating top level directory err:%ld",
(long)root);
- if ((int)root == -ENODEV)
+ if (PTR_ERR(root) == -ENODEV)
pr_err("debugfs is not enabled in the kernel");
return NULL;
}
diff --git a/drivers/spmi/spmi.c b/drivers/spmi/spmi.c
index 348ed3e..43f2710 100644
--- a/drivers/spmi/spmi.c
+++ b/drivers/spmi/spmi.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -809,8 +809,8 @@
if (ret)
goto exit;
- dev_dbg(&ctrl->dev, "Bus spmi-%d registered: dev:%x\n",
- ctrl->nr, (u32)&ctrl->dev);
+ dev_dbg(&ctrl->dev, "Bus spmi-%d registered: dev:0x%p\n",
+ ctrl->nr, &ctrl->dev);
spmi_dfs_add_controller(ctrl);
return 0;
diff --git a/drivers/staging/android/ashmem.c b/drivers/staging/android/ashmem.c
index 42a5a71..7ca247a 100644
--- a/drivers/staging/android/ashmem.c
+++ b/drivers/staging/android/ashmem.c
@@ -224,21 +224,29 @@
/* If size is not set, or set to 0, always return EOF. */
if (asma->size == 0)
- goto out;
+ goto out_unlock;
if (!asma->file) {
ret = -EBADF;
- goto out;
+ goto out_unlock;
}
+ mutex_unlock(&ashmem_mutex);
+
+ /*
+ * asma and asma->file are used outside the lock here. We assume
+ * once asma->file is set it will never be changed, and will not
+ * be destroyed until all references to the file are dropped and
+ * ashmem_release is called.
+ */
ret = asma->file->f_op->read(asma->file, buf, len, pos);
- if (ret < 0)
- goto out;
+ if (ret >= 0) {
+ /** Update backing file pos, since f_ops->read() doesn't */
+ asma->file->f_pos = *pos;
+ }
+ return ret;
- /** Update backing file pos, since f_ops->read() doesn't */
- asma->file->f_pos = *pos;
-
-out:
+out_unlock:
mutex_unlock(&ashmem_mutex);
return ret;
}
@@ -406,50 +414,68 @@
static int set_name(struct ashmem_area *asma, void __user *name)
{
+ int len;
int ret = 0;
+ char local_name[ASHMEM_NAME_LEN];
+ /*
+ * Holding the ashmem_mutex while doing a copy_from_user might cause
+ * an data abort which would try to access mmap_sem. If another
+ * thread has invoked ashmem_mmap then it will be holding the
+ * semaphore and will be waiting for ashmem_mutex, there by leading to
+ * deadlock. We'll release the mutex and take the name to a local
+ * variable that does not need protection and later copy the local
+ * variable to the structure member with lock held.
+ */
+ len = strncpy_from_user(local_name, name, ASHMEM_NAME_LEN);
+ if (len < 0)
+ return len;
+ if (len == ASHMEM_NAME_LEN)
+ local_name[ASHMEM_NAME_LEN - 1] = '\0';
mutex_lock(&ashmem_mutex);
-
/* cannot change an existing mapping's name */
- if (unlikely(asma->file)) {
+ if (unlikely(asma->file))
ret = -EINVAL;
- goto out;
- }
+ else
+ strcpy(asma->name + ASHMEM_NAME_PREFIX_LEN, local_name);
- if (unlikely(copy_from_user(asma->name + ASHMEM_NAME_PREFIX_LEN,
- name, ASHMEM_NAME_LEN)))
- ret = -EFAULT;
- asma->name[ASHMEM_FULL_NAME_LEN-1] = '\0';
-
-out:
mutex_unlock(&ashmem_mutex);
-
return ret;
}
static int get_name(struct ashmem_area *asma, void __user *name)
{
int ret = 0;
+ size_t len;
+ /*
+ * Have a local variable to which we'll copy the content
+ * from asma with the lock held. Later we can copy this to the user
+ * space safely without holding any locks. So even if we proceed to
+ * wait for mmap_sem, it won't lead to deadlock.
+ */
+ char local_name[ASHMEM_NAME_LEN];
mutex_lock(&ashmem_mutex);
if (asma->name[ASHMEM_NAME_PREFIX_LEN] != '\0') {
- size_t len;
/*
* Copying only `len', instead of ASHMEM_NAME_LEN, bytes
* prevents us from revealing one user's stack to another.
*/
len = strlen(asma->name + ASHMEM_NAME_PREFIX_LEN) + 1;
- if (unlikely(copy_to_user(name,
- asma->name + ASHMEM_NAME_PREFIX_LEN, len)))
- ret = -EFAULT;
+ memcpy(local_name, asma->name + ASHMEM_NAME_PREFIX_LEN, len);
} else {
- if (unlikely(copy_to_user(name, ASHMEM_NAME_DEF,
- sizeof(ASHMEM_NAME_DEF))))
- ret = -EFAULT;
+ len = sizeof(ASHMEM_NAME_DEF);
+ memcpy(local_name, ASHMEM_NAME_DEF, len);
}
mutex_unlock(&ashmem_mutex);
+ /*
+ * Now we are just copying from the stack variable to userland
+ * No lock held
+ */
+ if (unlikely(copy_to_user(name, local_name, len)))
+ ret = -EFAULT;
return ret;
}
diff --git a/drivers/thermal/msm_thermal.c b/drivers/thermal/msm_thermal.c
index c366086..891eb2f 100644
--- a/drivers/thermal/msm_thermal.c
+++ b/drivers/thermal/msm_thermal.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -156,7 +156,7 @@
#define VDD_RES_RO_ATTRIB(_rail, ko_attr, j, _name) \
ko_attr.attr.name = __stringify(_name); \
- ko_attr.attr.mode = 444; \
+ ko_attr.attr.mode = 0444; \
ko_attr.show = vdd_rstr_reg_##_name##_show; \
ko_attr.store = NULL; \
sysfs_attr_init(&ko_attr.attr); \
@@ -164,7 +164,7 @@
#define VDD_RES_RW_ATTRIB(_rail, ko_attr, j, _name) \
ko_attr.attr.name = __stringify(_name); \
- ko_attr.attr.mode = 644; \
+ ko_attr.attr.mode = 0644; \
ko_attr.show = vdd_rstr_reg_##_name##_show; \
ko_attr.store = vdd_rstr_reg_##_name##_store; \
sysfs_attr_init(&ko_attr.attr); \
@@ -181,7 +181,7 @@
#define OCR_RW_ATTRIB(_rail, ko_attr, j, _name) \
ko_attr.attr.name = __stringify(_name); \
- ko_attr.attr.mode = 644; \
+ ko_attr.attr.mode = 0644; \
ko_attr.show = ocr_reg_##_name##_show; \
ko_attr.store = ocr_reg_##_name##_store; \
sysfs_attr_init(&ko_attr.attr); \
@@ -189,7 +189,7 @@
#define PSM_RW_ATTRIB(_rail, ko_attr, j, _name) \
ko_attr.attr.name = __stringify(_name); \
- ko_attr.attr.mode = 644; \
+ ko_attr.attr.mode = 0644; \
ko_attr.show = psm_reg_##_name##_show; \
ko_attr.store = psm_reg_##_name##_store; \
sysfs_attr_init(&ko_attr.attr); \
@@ -425,7 +425,7 @@
static struct vdd_rstr_enable vdd_rstr_en = {
.ko_attr.attr.name = __stringify(enabled),
- .ko_attr.attr.mode = 644,
+ .ko_attr.attr.mode = 0644,
.ko_attr.show = vdd_rstr_en_show,
.ko_attr.store = vdd_rstr_en_store,
.enabled = 1,
@@ -2426,8 +2426,8 @@
key = "qcom,cpu-sensors";
cpu_cnt = of_property_count_strings(node, key);
- if (cpu_cnt != num_possible_cpus()) {
- pr_err("%s: Wrong number of cpu\n", KBUILD_MODNAME);
+ if (cpu_cnt < num_possible_cpus()) {
+ pr_err("%s: Wrong number of cpu sensors\n", KBUILD_MODNAME);
ret = -EINVAL;
goto hotplug_node_fail;
}
diff --git a/drivers/usb/class/Kconfig b/drivers/usb/class/Kconfig
index 2519e32..f7321e5 100644
--- a/drivers/usb/class/Kconfig
+++ b/drivers/usb/class/Kconfig
@@ -50,3 +50,15 @@
To compile this driver as a module, choose M here: the
module will be called usbtmc.
+
+config USB_CCID_BRIDGE
+ tristate "USB Smart Card Class (CCID) support"
+ help
+ Say Y here if you want to connect a USB Smart Card device that
+ follows the USB.org specification for Integrated Circuit(s) Cards
+ Interface Devices to your computer's USB port. This module
+ provides a character device interface to exchange the messages.
+ Ioctls facilitate control transfers and interrupt transfers.
+
+ To compile this driver as a module, choose M here: the
+ module will be called ccid_bridge.
diff --git a/drivers/usb/class/Makefile b/drivers/usb/class/Makefile
index 32e8527..c2ee6f3 100644
--- a/drivers/usb/class/Makefile
+++ b/drivers/usb/class/Makefile
@@ -7,3 +7,4 @@
obj-$(CONFIG_USB_PRINTER) += usblp.o
obj-$(CONFIG_USB_WDM) += cdc-wdm.o
obj-$(CONFIG_USB_TMC) += usbtmc.o
+obj-$(CONFIG_USB_CCID_BRIDGE) += ccid_bridge.o
diff --git a/drivers/usb/class/ccid_bridge.c b/drivers/usb/class/ccid_bridge.c
new file mode 100644
index 0000000..a3e100a
--- /dev/null
+++ b/drivers/usb/class/ccid_bridge.c
@@ -0,0 +1,885 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#define pr_fmt(fmt) "%s: " fmt "\n", __func__
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/uaccess.h>
+#include <linux/usb.h>
+#include <linux/wait.h>
+#include <linux/cdev.h>
+
+#include <linux/usb/ccid_bridge.h>
+
+#define CCID_CLASS_DECRIPTOR_TYPE 0x21
+#define CCID_NOTIFY_SLOT_CHANGE 0x50
+#define CCID_NOTIFY_HARDWARE_ERROR 0x51
+#define CCID_ABORT_REQ 0x1
+#define CCID_GET_CLK_FREQ_REQ 0x2
+#define CCID_GET_DATA_RATES 0x3
+
+#define CCID_BRIDGE_MSG_SZ 512
+#define CCID_BRIDGE_OPEN_TIMEOUT 500 /* msec */
+#define CCID_CONTROL_TIMEOUT 500 /* msec */
+#define CCID_BRIDGE_MSG_TIMEOUT 500 /* msec */
+
+struct ccid_bridge {
+ struct usb_device *udev;
+ struct usb_interface *intf;
+ unsigned int in_pipe;
+ unsigned int out_pipe;
+ unsigned int int_pipe;
+ struct urb *inturb;
+ struct urb *readurb;
+ struct urb *writeurb;
+
+ bool opened;
+ bool events_supported;
+ bool is_suspended;
+ struct mutex open_mutex;
+ struct mutex write_mutex;
+ struct mutex read_mutex;
+ struct mutex event_mutex;
+ int write_result;
+ int read_result;
+ int event_result;
+ wait_queue_head_t open_wq;
+ wait_queue_head_t write_wq;
+ wait_queue_head_t read_wq;
+ wait_queue_head_t event_wq;
+ struct usb_ccid_event cur_event;
+ void *intbuf;
+
+ dev_t chrdev;
+ struct cdev cdev;
+ struct class *class;
+ struct device *device;
+};
+
+static struct ccid_bridge *__ccid_bridge_dev;
+
+static void ccid_bridge_out_cb(struct urb *urb)
+{
+ struct ccid_bridge *ccid = urb->context;
+
+ if (urb->dev->state == USB_STATE_NOTATTACHED)
+ ccid->write_result = -ENODEV;
+ else
+ ccid->write_result = urb->status ? : urb->actual_length;
+
+ pr_debug("write result = %d", ccid->write_result);
+ wake_up(&ccid->write_wq);
+}
+
+static void ccid_bridge_in_cb(struct urb *urb)
+{
+ struct ccid_bridge *ccid = urb->context;
+
+ if (urb->dev->state == USB_STATE_NOTATTACHED)
+ ccid->read_result = -ENODEV;
+ else
+ ccid->read_result = urb->status ? : urb->actual_length;
+
+ pr_debug("read result = %d", ccid->read_result);
+ wake_up(&ccid->read_wq);
+}
+
+static void ccid_bridge_int_cb(struct urb *urb)
+{
+ struct ccid_bridge *ccid = urb->context;
+ u8 *msg_type;
+ bool wakeup = true;
+
+ if (urb->dev->state == USB_STATE_NOTATTACHED || (urb->status &&
+ urb->status != -ENOENT)) {
+ ccid->event_result = -ENODEV;
+ wakeup = true;
+ goto out;
+ }
+
+ /*
+ * Don't wakeup the event ioctl process during suspend.
+ * The suspend state is not visible to user space.
+ * we wake up the process after resume to send RESUME
+ * event if the device supports remote wakeup.
+ */
+ if (urb->status == -ENOENT && !urb->actual_length) {
+ ccid->event_result = -ENOENT;
+ wakeup = false;
+ goto out;
+ }
+
+ ccid->event_result = 0;
+ msg_type = urb->transfer_buffer;
+ switch (*msg_type) {
+ case CCID_NOTIFY_SLOT_CHANGE:
+ pr_debug("NOTIFY_SLOT_CHANGE event arrived");
+ ccid->cur_event.event = USB_CCID_NOTIFY_SLOT_CHANGE_EVENT;
+ ccid->cur_event.u.notify.slot_icc_state = *(++msg_type);
+ break;
+ case CCID_NOTIFY_HARDWARE_ERROR:
+ pr_debug("NOTIFY_HARDWARE_ERROR event arrived");
+ ccid->cur_event.event = USB_CCID_HARDWARE_ERROR_EVENT;
+ ccid->cur_event.u.error.slot = *(++msg_type);
+ ccid->cur_event.u.error.seq = *(++msg_type);
+ ccid->cur_event.u.error.error_code = *(++msg_type);
+ break;
+ default:
+ pr_err("UNKNOWN event arrived\n");
+ ccid->event_result = -EINVAL;
+ }
+
+out:
+ pr_debug("returning %d", ccid->event_result);
+ if (wakeup)
+ wake_up(&ccid->event_wq);
+}
+
+static int ccid_bridge_submit_inturb(struct ccid_bridge *ccid)
+{
+ int ret = 0;
+
+ /*
+ * Don't resume the bus to submit an interrupt URB.
+ * We submit the URB in resume path. This is important.
+ * Because the device will be in suspend state during
+ * multiple system suspend/resume cycles. The user space
+ * process comes here during system resume after it is
+ * unfrozen.
+ */
+ if (!ccid->int_pipe || ccid->is_suspended)
+ goto out;
+
+ ret = usb_autopm_get_interface(ccid->intf);
+ if (ret < 0) {
+ pr_debug("fail to get autopm with %d\n", ret);
+ goto out;
+ }
+ ret = usb_submit_urb(ccid->inturb, GFP_KERNEL);
+ if (ret < 0)
+ pr_err("fail to submit int urb with %d\n", ret);
+ usb_autopm_put_interface(ccid->intf);
+
+out:
+ pr_debug("returning %d", ret);
+ return ret;
+}
+
+static int ccid_bridge_get_event(struct ccid_bridge *ccid)
+{
+ int ret = 0;
+
+ /*
+ * The first event returned after the device resume
+ * will be RESUME event. This event is set by
+ * the resume.
+ */
+ if (ccid->cur_event.event)
+ goto out;
+
+ ccid->event_result = -EINPROGRESS;
+
+ ret = ccid_bridge_submit_inturb(ccid);
+ if (ret < 0)
+ goto out;
+
+ /*
+ * Wait for the notification on interrupt endpoint
+ * or remote wakeup event from the resume. The
+ * int urb completion handler and resume callback
+ * take care of setting the current event.
+ */
+ mutex_unlock(&ccid->event_mutex);
+ ret = wait_event_interruptible(ccid->event_wq,
+ (ccid->event_result != -EINPROGRESS));
+ mutex_lock(&ccid->event_mutex);
+
+ if (ret == -ERESTARTSYS) /* interrupted */
+ usb_kill_urb(ccid->inturb);
+ else
+ ret = ccid->event_result;
+out:
+ pr_debug("returning %d", ret);
+ return ret;
+}
+
+static int ccid_bridge_open(struct inode *ip, struct file *fp)
+{
+ struct ccid_bridge *ccid = container_of(ip->i_cdev,
+ struct ccid_bridge, cdev);
+ int ret;
+
+ pr_debug("called");
+
+ mutex_lock(&ccid->open_mutex);
+ if (ccid->opened) {
+ ret = -EBUSY;
+ goto out;
+ }
+ mutex_unlock(&ccid->open_mutex);
+
+ ret = wait_event_interruptible_timeout(ccid->open_wq,
+ ccid->intf != NULL, msecs_to_jiffies(
+ CCID_BRIDGE_OPEN_TIMEOUT));
+
+ mutex_lock(&ccid->open_mutex);
+
+ if (ret != -ERESTARTSYS && ccid->intf) {
+ fp->private_data = ccid;
+ ccid->opened = true;
+ ret = 0;
+ } else if (!ret) { /* timed out */
+ ret = -ENODEV;
+ }
+out:
+ mutex_unlock(&ccid->open_mutex);
+ pr_debug("returning %d", ret);
+ return ret;
+}
+
+static ssize_t ccid_bridge_write(struct file *fp, const char __user *ubuf,
+ size_t count, loff_t *pos)
+{
+ struct ccid_bridge *ccid = fp->private_data;
+ int ret;
+ char *kbuf;
+
+ pr_debug("called with %d", count);
+
+ if (!ccid->intf) {
+ pr_debug("intf is not active");
+ return -ENODEV;
+ }
+
+ mutex_lock(&ccid->write_mutex);
+
+ if (!count || count > CCID_BRIDGE_MSG_SZ) {
+ pr_err("invalid count");
+ ret = -EINVAL;
+ goto out;
+ }
+
+ kbuf = kmalloc(count, GFP_KERNEL);
+ if (!kbuf) {
+ pr_err("fail to allocate memory");
+ ret = -ENOMEM;
+ goto out;
+ }
+
+ ret = copy_from_user(kbuf, ubuf, count);
+ if (ret) {
+ pr_err("fail to copy user buf");
+ ret = -EFAULT;
+ goto free_kbuf;
+ }
+
+ ret = usb_autopm_get_interface(ccid->intf);
+ if (ret) {
+ pr_err("fail to get autopm with %d", ret);
+ goto free_kbuf;
+ }
+
+ ccid->write_result = 0;
+
+ usb_fill_bulk_urb(ccid->writeurb, ccid->udev, ccid->out_pipe,
+ kbuf, count, ccid_bridge_out_cb, ccid);
+ ret = usb_submit_urb(ccid->writeurb, GFP_KERNEL);
+ if (ret < 0) {
+ pr_err("urb submit fail with %d", ret);
+ goto put_pm;
+ }
+
+ ret = wait_event_interruptible_timeout(ccid->write_wq,
+ ccid->write_result != 0,
+ msecs_to_jiffies(CCID_BRIDGE_MSG_TIMEOUT));
+ if (!ret || ret == -ERESTARTSYS) { /* timedout or interrupted */
+ usb_kill_urb(ccid->writeurb);
+ if (!ret)
+ ret = -ETIMEDOUT;
+ } else {
+ ret = ccid->write_result;
+ }
+
+ pr_debug("returning %d", ret);
+
+put_pm:
+ if (ret != -ENODEV)
+ usb_autopm_put_interface(ccid->intf);
+free_kbuf:
+ kfree(kbuf);
+out:
+ mutex_unlock(&ccid->write_mutex);
+ return ret;
+
+}
+
+static ssize_t ccid_bridge_read(struct file *fp, char __user *ubuf,
+ size_t count, loff_t *pos)
+{
+ struct ccid_bridge *ccid = fp->private_data;
+ int ret;
+ char *kbuf;
+
+ pr_debug("called with %d", count);
+ if (!ccid->intf) {
+ pr_debug("intf is not active");
+ return -ENODEV;
+ }
+
+ mutex_lock(&ccid->read_mutex);
+
+ if (!count || count > CCID_BRIDGE_MSG_SZ) {
+ pr_err("invalid count");
+ ret = -EINVAL;
+ goto out;
+ }
+
+ kbuf = kmalloc(count, GFP_KERNEL);
+ if (!kbuf) {
+ pr_err("fail to allocate memory");
+ ret = -ENOMEM;
+ goto out;
+ }
+
+ ret = usb_autopm_get_interface(ccid->intf);
+ if (ret) {
+ pr_err("fail to get autopm with %d", ret);
+ goto free_kbuf;
+ }
+
+ ccid->read_result = 0;
+
+ usb_fill_bulk_urb(ccid->readurb, ccid->udev, ccid->in_pipe,
+ kbuf, count, ccid_bridge_in_cb, ccid);
+ ret = usb_submit_urb(ccid->readurb, GFP_KERNEL);
+ if (ret < 0) {
+ pr_err("urb submit fail with %d", ret);
+ if (ret != -ENODEV)
+ usb_autopm_put_interface(ccid->intf);
+ goto free_kbuf;
+ }
+
+
+ ret = wait_event_interruptible_timeout(ccid->read_wq,
+ ccid->read_result != 0,
+ msecs_to_jiffies(CCID_BRIDGE_MSG_TIMEOUT));
+ if (!ret || ret == -ERESTARTSYS) { /* timedout or interrupted */
+ usb_kill_urb(ccid->readurb);
+ if (!ret)
+ ret = -ETIMEDOUT;
+ } else {
+ ret = ccid->read_result;
+ }
+
+
+ if (ret > 0) {
+ if (copy_to_user(ubuf, kbuf, ret))
+ ret = -EFAULT;
+ }
+
+ usb_autopm_put_interface(ccid->intf);
+ pr_debug("returning %d", ret);
+
+free_kbuf:
+ kfree(kbuf);
+out:
+ mutex_unlock(&ccid->read_mutex);
+ return ret;
+}
+
+static long
+ccid_bridge_ioctl(struct file *fp, unsigned int cmd, unsigned long arg)
+{
+ struct ccid_bridge *ccid = fp->private_data;
+ char *buf;
+ struct usb_ccid_data data;
+ struct usb_ccid_abort abort;
+ struct usb_descriptor_header *header;
+ int ret;
+ struct usb_device *udev = ccid->udev;
+ __u8 intf = ccid->intf->cur_altsetting->desc.bInterfaceNumber;
+ __u8 breq = 0;
+
+ if (!ccid->intf) {
+ pr_debug("intf is not active");
+ return -ENODEV;
+ }
+
+ mutex_lock(&ccid->event_mutex);
+ switch (cmd) {
+ case USB_CCID_GET_CLASS_DESC:
+ pr_debug("GET_CLASS_DESC ioctl called");
+ ret = copy_from_user(&data, (void __user *)arg, sizeof(data));
+ if (ret) {
+ ret = -EFAULT;
+ break;
+ }
+ ret = __usb_get_extra_descriptor(udev->rawdescriptors[0],
+ le16_to_cpu(udev->config[0].desc.wTotalLength),
+ CCID_CLASS_DECRIPTOR_TYPE, (void **) &buf);
+ if (ret) {
+ ret = -ENOENT;
+ break;
+ }
+ header = (struct usb_descriptor_header *) buf;
+ if (data.length != header->bLength) {
+ ret = -EINVAL;
+ break;
+ }
+ ret = copy_to_user((void __user *)data.data, buf, data.length);
+ if (ret)
+ ret = -EFAULT;
+ break;
+ case USB_CCID_GET_CLOCK_FREQUENCIES:
+ pr_debug("GET_CLOCK_FREQUENCIES ioctl called");
+ breq = CCID_GET_CLK_FREQ_REQ;
+ /* fall through */
+ case USB_CCID_GET_DATA_RATES:
+ if (!breq) {
+ pr_debug("GET_DATA_RATES ioctl called");
+ breq = CCID_GET_DATA_RATES;
+ }
+ ret = copy_from_user(&data, (void __user *)arg, sizeof(data));
+ if (ret) {
+ ret = -EFAULT;
+ break;
+ }
+ buf = kmalloc(data.length, GFP_KERNEL);
+ if (!buf) {
+ ret = -ENOMEM;
+ break;
+ }
+ ret = usb_autopm_get_interface(ccid->intf);
+ if (ret < 0) {
+ pr_debug("fail to get autopm with %d", ret);
+ break;
+ }
+ ret = usb_control_msg(ccid->udev,
+ usb_rcvctrlpipe(ccid->udev, 0),
+ breq, (USB_DIR_IN | USB_TYPE_CLASS |
+ USB_RECIP_INTERFACE), 0, intf, buf,
+ data.length, CCID_CONTROL_TIMEOUT);
+ usb_autopm_put_interface(ccid->intf);
+ if (ret == data.length) {
+ ret = copy_to_user((void __user *)data.data, buf,
+ data.length);
+ if (ret)
+ ret = -EFAULT;
+ } else {
+ if (ret > 0)
+ ret = -EPIPE;
+ }
+ kfree(buf);
+ break;
+ case USB_CCID_ABORT:
+ pr_debug("ABORT ioctl called");
+ breq = CCID_ABORT_REQ;
+ ret = copy_from_user(&abort, (void __user *)arg, sizeof(abort));
+ if (ret) {
+ ret = -EFAULT;
+ break;
+ }
+ ret = usb_autopm_get_interface(ccid->intf);
+ if (ret < 0) {
+ pr_debug("fail to get autopm with %d", ret);
+ break;
+ }
+ ret = usb_control_msg(ccid->udev,
+ usb_sndctrlpipe(ccid->udev, 0),
+ breq, (USB_DIR_OUT | USB_TYPE_CLASS |
+ USB_RECIP_INTERFACE),
+ (abort.seq << 8) | abort.slot, intf, NULL,
+ 0, CCID_CONTROL_TIMEOUT);
+ if (ret < 0)
+ pr_err("abort request failed with err %d\n", ret);
+ usb_autopm_put_interface(ccid->intf);
+ break;
+ case USB_CCID_GET_EVENT:
+ pr_debug("GET_EVENT ioctl called");
+ if (!ccid->events_supported) {
+ ret = -ENOENT;
+ break;
+ }
+ ret = ccid_bridge_get_event(ccid);
+ if (ret == 0) {
+ ret = copy_to_user((void __user *)arg, &ccid->cur_event,
+ sizeof(ccid->cur_event));
+ if (ret)
+ ret = -EFAULT;
+ }
+ ccid->cur_event.event = 0;
+ break;
+ default:
+ pr_err("UNKNOWN ioctl called");
+ ret = -EINVAL;
+ break;
+ }
+
+ mutex_unlock(&ccid->event_mutex);
+ pr_debug("returning %d", ret);
+ return ret;
+}
+
+static int ccid_bridge_release(struct inode *ip, struct file *fp)
+{
+ struct ccid_bridge *ccid = fp->private_data;
+
+ pr_debug("called");
+
+ usb_kill_urb(ccid->writeurb);
+ usb_kill_urb(ccid->readurb);
+ if (ccid->int_pipe)
+ usb_kill_urb(ccid->inturb);
+
+ ccid->event_result = -EIO;
+ wake_up(&ccid->event_wq);
+
+ mutex_lock(&ccid->open_mutex);
+ ccid->opened = false;
+ mutex_unlock(&ccid->open_mutex);
+ return 0;
+}
+
+static const struct file_operations ccid_bridge_fops = {
+ .owner = THIS_MODULE,
+ .open = ccid_bridge_open,
+ .write = ccid_bridge_write,
+ .read = ccid_bridge_read,
+ .unlocked_ioctl = ccid_bridge_ioctl,
+ .release = ccid_bridge_release,
+};
+
+static int ccid_bridge_suspend(struct usb_interface *intf, pm_message_t message)
+{
+ struct ccid_bridge *ccid = usb_get_intfdata(intf);
+ int ret = 0;
+
+ pr_debug("called");
+
+ if (!ccid->opened)
+ goto out;
+
+ mutex_lock(&ccid->event_mutex);
+ if (ccid->int_pipe) {
+ usb_kill_urb(ccid->inturb);
+ if (ccid->event_result != -ENOENT) {
+ ret = -EBUSY;
+ goto rel_mutex;
+ }
+ }
+
+ ccid->is_suspended = true;
+rel_mutex:
+ mutex_unlock(&ccid->event_mutex);
+out:
+ pr_debug("returning %d", ret);
+ return ret;
+}
+
+static int ccid_bridge_resume(struct usb_interface *intf)
+{
+ struct ccid_bridge *ccid = usb_get_intfdata(intf);
+ int ret;
+
+ pr_debug("called");
+
+ if (!ccid->opened)
+ goto out;
+
+ mutex_lock(&ccid->event_mutex);
+
+ ccid->is_suspended = false;
+
+ if (device_can_wakeup(&ccid->udev->dev)) {
+ ccid->event_result = 0;
+ ccid->cur_event.event = USB_CCID_RESUME_EVENT;
+ wake_up(&ccid->event_wq);
+ } else if (ccid->int_pipe) {
+ ccid->event_result = -EINPROGRESS;
+ ret = usb_submit_urb(ccid->inturb, GFP_KERNEL);
+ if (ret < 0)
+ pr_debug("fail to submit inturb with %d\n", ret);
+ }
+
+ mutex_unlock(&ccid->event_mutex);
+out:
+ return 0;
+}
+
+static int
+ccid_bridge_probe(struct usb_interface *intf, const struct usb_device_id *id)
+{
+ struct ccid_bridge *ccid = __ccid_bridge_dev;
+ struct usb_host_interface *intf_desc;
+ struct usb_endpoint_descriptor *ep_desc;
+ struct usb_host_endpoint *ep;
+ __u8 epin_addr = 0, epout_addr = 0, epint_addr = 0;
+ int i, ret;
+
+ intf_desc = intf->cur_altsetting;
+
+ if (intf_desc->desc.bNumEndpoints > 3)
+ return -ENODEV;
+
+ for (i = 0; i < intf_desc->desc.bNumEndpoints; i++) {
+ ep_desc = &intf_desc->endpoint[i].desc;
+
+ if (usb_endpoint_is_bulk_in(ep_desc))
+ epin_addr = ep_desc->bEndpointAddress;
+ else if (usb_endpoint_is_bulk_out(ep_desc))
+ epout_addr = ep_desc->bEndpointAddress;
+ else if (usb_endpoint_is_int_in(ep_desc))
+ epint_addr = ep_desc->bEndpointAddress;
+ else
+ return -ENODEV;
+ }
+
+ if (!epin_addr || !epout_addr)
+ return -ENODEV;
+
+ ccid->udev = usb_get_dev(interface_to_usbdev(intf));
+ ccid->in_pipe = usb_rcvbulkpipe(ccid->udev, epin_addr);
+ ccid->out_pipe = usb_sndbulkpipe(ccid->udev, epout_addr);
+ if (epint_addr)
+ ccid->int_pipe = usb_rcvbulkpipe(ccid->udev, epint_addr);
+
+ ccid->writeurb = usb_alloc_urb(0, GFP_KERNEL);
+ if (!ccid->writeurb) {
+ pr_err("fail to allocate write urb");
+ ret = -ENOMEM;
+ goto put_udev;
+ }
+ ccid->readurb = usb_alloc_urb(0, GFP_KERNEL);
+ if (!ccid->readurb) {
+ pr_err("fail to allocate read urb");
+ ret = -ENOMEM;
+ goto free_writeurb;
+ }
+
+ if (ccid->int_pipe) {
+ pr_debug("interrupt endpoint is present");
+ ep = usb_pipe_endpoint(ccid->udev, ccid->int_pipe);
+ ccid->inturb = usb_alloc_urb(0, GFP_KERNEL);
+ if (!ccid->inturb) {
+ pr_err("fail to allocate int urb");
+ ret = -ENOMEM;
+ goto free_readurb;
+ }
+ ccid->intbuf = kmalloc(usb_endpoint_maxp(&ep->desc),
+ GFP_KERNEL);
+ if (!ccid->intbuf) {
+ pr_err("fail to allocated int buf");
+ ret = -ENOMEM;
+ goto free_inturb;
+ }
+ usb_fill_int_urb(ccid->inturb, ccid->udev,
+ usb_rcvintpipe(ccid->udev, epint_addr),
+ ccid->intbuf, usb_endpoint_maxp(&ep->desc),
+ ccid_bridge_int_cb, ccid,
+ ep->desc.bInterval);
+ }
+
+ if (ccid->int_pipe || device_can_wakeup(&ccid->udev->dev)) {
+ pr_debug("event support is present");
+ ccid->events_supported = true;
+ }
+
+ usb_set_intfdata(intf, ccid);
+
+ mutex_lock(&ccid->open_mutex);
+ ccid->intf = intf;
+ wake_up(&ccid->open_wq);
+ mutex_unlock(&ccid->open_mutex);
+
+ pr_info("success");
+ return 0;
+
+free_inturb:
+ if (ccid->int_pipe)
+ usb_free_urb(ccid->inturb);
+free_readurb:
+ usb_free_urb(ccid->readurb);
+free_writeurb:
+ usb_free_urb(ccid->writeurb);
+put_udev:
+ usb_put_dev(ccid->udev);
+ return ret;
+}
+
+static void ccid_bridge_disconnect(struct usb_interface *intf)
+{
+ struct ccid_bridge *ccid = usb_get_intfdata(intf);
+
+ pr_debug("called");
+
+ usb_kill_urb(ccid->writeurb);
+ usb_kill_urb(ccid->readurb);
+ if (ccid->int_pipe)
+ usb_kill_urb(ccid->inturb);
+
+ ccid->event_result = -ENODEV;
+ wake_up(&ccid->event_wq);
+
+ /*
+ * This would synchronize any ongoing read/write/ioctl.
+ * After acquiring the mutex, we can safely set
+ * intf to NULL.
+ */
+ mutex_lock(&ccid->open_mutex);
+ mutex_lock(&ccid->write_mutex);
+ mutex_lock(&ccid->read_mutex);
+ mutex_lock(&ccid->event_mutex);
+
+ usb_free_urb(ccid->writeurb);
+ usb_free_urb(ccid->readurb);
+ if (ccid->int_pipe) {
+ usb_free_urb(ccid->inturb);
+ kfree(ccid->intbuf);
+ ccid->int_pipe = 0;
+ }
+
+ ccid->intf = NULL;
+
+ mutex_unlock(&ccid->event_mutex);
+ mutex_unlock(&ccid->read_mutex);
+ mutex_unlock(&ccid->write_mutex);
+ mutex_unlock(&ccid->open_mutex);
+
+}
+
+static const struct usb_device_id ccid_bridge_ids[] = {
+ { USB_INTERFACE_INFO(USB_CLASS_CSCID, 0, 0) },
+
+ {} /* terminating entry */
+};
+MODULE_DEVICE_TABLE(usb, ccid_bridge_ids);
+
+static struct usb_driver ccid_bridge_driver = {
+ .name = "ccid_bridge",
+ .probe = ccid_bridge_probe,
+ .disconnect = ccid_bridge_disconnect,
+ .suspend = ccid_bridge_suspend,
+ .resume = ccid_bridge_resume,
+ .id_table = ccid_bridge_ids,
+ .supports_autosuspend = 1,
+};
+
+static int __init ccid_bridge_init(void)
+{
+ int ret;
+ struct ccid_bridge *ccid;
+
+ ccid = kzalloc(sizeof(*ccid), GFP_KERNEL);
+ if (!ccid) {
+ pr_err("Fail to allocate ccid");
+ ret = -ENOMEM;
+ goto out;
+ }
+ __ccid_bridge_dev = ccid;
+
+ mutex_init(&ccid->open_mutex);
+ mutex_init(&ccid->write_mutex);
+ mutex_init(&ccid->read_mutex);
+ mutex_init(&ccid->event_mutex);
+
+ init_waitqueue_head(&ccid->open_wq);
+ init_waitqueue_head(&ccid->write_wq);
+ init_waitqueue_head(&ccid->read_wq);
+ init_waitqueue_head(&ccid->event_wq);
+
+ ret = usb_register(&ccid_bridge_driver);
+ if (ret < 0) {
+ pr_err("Fail to register ccid usb driver with %d", ret);
+ goto free_ccid;
+ }
+
+ ret = alloc_chrdev_region(&ccid->chrdev, 0, 1, "ccid_bridge");
+ if (ret < 0) {
+ pr_err("Fail to allocate ccid char dev region with %d", ret);
+ goto unreg_driver;
+ }
+ ccid->class = class_create(THIS_MODULE, "ccid_bridge");
+ if (IS_ERR(ccid->class)) {
+ ret = PTR_ERR(ccid->class);
+ pr_err("Fail to create ccid class with %d", ret);
+ goto unreg_chrdev;
+ }
+ cdev_init(&ccid->cdev, &ccid_bridge_fops);
+ ccid->cdev.owner = THIS_MODULE;
+
+ ret = cdev_add(&ccid->cdev, ccid->chrdev, 1);
+ if (ret < 0) {
+ pr_err("Fail to add ccid cdev with %d", ret);
+ goto destroy_class;
+ }
+ ccid->device = device_create(ccid->class,
+ NULL, ccid->chrdev, NULL,
+ "ccid_bridge");
+ if (IS_ERR(ccid->device)) {
+ ret = PTR_ERR(ccid->device);
+ pr_err("Fail to create ccid device with %d", ret);
+ goto del_cdev;
+ }
+
+ pr_info("success");
+
+ return 0;
+
+del_cdev:
+ cdev_del(&ccid->cdev);
+destroy_class:
+ class_destroy(ccid->class);
+unreg_chrdev:
+ unregister_chrdev_region(ccid->chrdev, 1);
+unreg_driver:
+ usb_deregister(&ccid_bridge_driver);
+free_ccid:
+ mutex_destroy(&ccid->open_mutex);
+ mutex_destroy(&ccid->write_mutex);
+ mutex_destroy(&ccid->read_mutex);
+ mutex_destroy(&ccid->event_mutex);
+ kfree(ccid);
+ __ccid_bridge_dev = NULL;
+out:
+ return ret;
+}
+
+static void __exit ccid_bridge_exit(void)
+{
+ struct ccid_bridge *ccid = __ccid_bridge_dev;
+
+ pr_debug("called");
+ device_destroy(ccid->class, ccid->chrdev);
+ cdev_del(&ccid->cdev);
+ class_destroy(ccid->class);
+ unregister_chrdev_region(ccid->chrdev, 1);
+
+ usb_deregister(&ccid_bridge_driver);
+
+ mutex_destroy(&ccid->open_mutex);
+ mutex_destroy(&ccid->write_mutex);
+ mutex_destroy(&ccid->read_mutex);
+ mutex_destroy(&ccid->event_mutex);
+
+ kfree(ccid);
+ __ccid_bridge_dev = NULL;
+}
+
+module_init(ccid_bridge_init);
+module_exit(ccid_bridge_exit);
+
+MODULE_DESCRIPTION("USB CCID bridge driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index d97d548..827ac9d 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -3159,7 +3159,8 @@
for (i = 0; i < GET_DESCRIPTOR_TRIES; (++i, msleep(100))) {
if (USE_NEW_SCHEME(retry_counter) &&
!(hcd->driver->flags & HCD_USB3) &&
- !(hcd->driver->flags & HCD_OLD_ENUM)) {
+ !((hcd->driver->flags & HCD_RT_OLD_ENUM) &&
+ !hdev->parent)) {
struct usb_device_descriptor *buf;
int r = 0;
@@ -3261,7 +3262,8 @@
msleep(10);
if (USE_NEW_SCHEME(retry_counter) &&
!(hcd->driver->flags & HCD_USB3) &&
- !(hcd->driver->flags & HCD_OLD_ENUM))
+ !((hcd->driver->flags & HCD_RT_OLD_ENUM) &&
+ !hdev->parent))
break;
}
diff --git a/drivers/usb/dwc3/debug.h b/drivers/usb/dwc3/debug.h
index 4901f4b..57d27cd 100644
--- a/drivers/usb/dwc3/debug.h
+++ b/drivers/usb/dwc3/debug.h
@@ -48,15 +48,17 @@
extern void dwc3_debugfs_exit(struct dwc3 *);
extern void dbg_print_reg(const char *name, int reg);
#else
-static inline void dbg_event(u8, const char*, int)
+static inline void dbg_event(u8 ep_num, const char *name, int status)
{ }
-static inline void dbg_print(u8, const char*, int, const char*)
+static inline void dbg_print(u8 ep_num, const char *name, int status,
+ const char *extra)
{ }
-static inline void dbg_done(u8, const u32, int)
+static inline void dbg_done(u8 ep_num, const u32 count, int status)
{ }
-static inline void dbg_queue(u8, const struct usb_request*, int)
+static inline void dbg_queue(u8 ep_num, const struct usb_request *req,
+ int status)
{ }
-static inline void dbg_setup(u8, const struct usb_ctrlrequest*)
+static inline void dbg_setup(u8 ep_num, const struct usb_ctrlrequest *req)
{ }
static inline void dbg_print_reg(const char *name, int reg)
{ }
diff --git a/drivers/usb/dwc3/dwc3-msm.c b/drivers/usb/dwc3/dwc3-msm.c
index 97592c4..667a8a2 100644
--- a/drivers/usb/dwc3/dwc3-msm.c
+++ b/drivers/usb/dwc3/dwc3-msm.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1512,6 +1512,7 @@
case DWC3_CONTROLLER_ERROR_EVENT:
dev_info(mdwc->dev, "DWC3_CONTROLLER_ERROR_EVENT received\n");
dwc3_msm_dump_phy_info(mdwc);
+ dwc3_msm_write_reg(mdwc->base, DWC3_DEVTEN, 0);
/*
* schedule work for doing block reset for recovery from erratic
* error event.
@@ -1567,10 +1568,23 @@
{
struct dwc3_msm *mdwc = container_of(w, struct dwc3_msm,
usb_block_reset_work);
+ u32 reg;
dev_dbg(mdwc->dev, "%s\n", __func__);
dwc3_msm_block_reset(&mdwc->ext_xceiv, true);
+
+ reg = (DWC3_DEVTEN_EVNTOVERFLOWEN |
+ DWC3_DEVTEN_CMDCMPLTEN |
+ DWC3_DEVTEN_ERRTICERREN |
+ DWC3_DEVTEN_WKUPEVTEN |
+ DWC3_DEVTEN_ULSTCNGEN |
+ DWC3_DEVTEN_CONNECTDONEEN |
+ DWC3_DEVTEN_USBRSTEN |
+ DWC3_DEVTEN_DISCONNEVTEN);
+ dwc3_msm_write_reg(mdwc->base, DWC3_DEVTEN, reg);
+
+
}
static void dwc3_chg_enable_secondary_det(struct dwc3_msm *mdwc)
@@ -1791,6 +1805,11 @@
return;
}
+ /* Skip if charger type was already detected externally */
+ if (mdwc->chg_state == USB_CHG_STATE_DETECTED &&
+ charger->chg_type != DWC3_INVALID_CHARGER)
+ return;
+
mdwc->chg_state = USB_CHG_STATE_UNDEFINED;
charger->chg_type = DWC3_INVALID_CHARGER;
queue_delayed_work(system_nrt_wq, &mdwc->chg_work, 0);
diff --git a/drivers/usb/gadget/f_qc_rndis.c b/drivers/usb/gadget/f_qc_rndis.c
index c1ab552..1af076b 100644
--- a/drivers/usb/gadget/f_qc_rndis.c
+++ b/drivers/usb/gadget/f_qc_rndis.c
@@ -6,7 +6,7 @@
* Copyright (C) 2008 Nokia Corporation
* Copyright (C) 2009 Samsung Electronics
* Author: Michal Nazarewicz (mina86@mina86.com)
- * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
@@ -615,7 +615,6 @@
/* read the request; process it later */
value = w_length;
req->complete = rndis_qc_command_complete;
- req->context = rndis;
/* later, rndis_response_available() sends a notification */
break;
@@ -651,6 +650,7 @@
DBG(cdev, "rndis req%02x.%02x v%04x i%04x l%d\n",
ctrl->bRequestType, ctrl->bRequest,
w_value, w_index, w_length);
+ req->context = rndis;
req->zero = (value < w_length);
req->length = value;
value = usb_ep_queue(cdev->gadget->ep0, req, GFP_ATOMIC);
diff --git a/drivers/usb/gadget/f_qdss.c b/drivers/usb/gadget/f_qdss.c
index 7e474f3..4ecfeac 100644
--- a/drivers/usb/gadget/f_qdss.c
+++ b/drivers/usb/gadget/f_qdss.c
@@ -1,7 +1,7 @@
/*
* f_qdss.c -- QDSS function Driver
*
- * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -415,6 +415,8 @@
pr_debug("qdss_unbind\n");
+ flush_workqueue(qdss->wq);
+
if (gadget_is_dwc3(gadget))
dwc3_tx_fifo_resize_request(qdss->data, false);
diff --git a/drivers/usb/gadget/u_bam.c b/drivers/usb/gadget/u_bam.c
index 843c207..4bd7f39 100644
--- a/drivers/usb/gadget/u_bam.c
+++ b/drivers/usb/gadget/u_bam.c
@@ -54,28 +54,31 @@
#define DL_INTR_THRESHOLD 20
-unsigned int bam_mux_tx_pkt_drop_thld = BAM_MUX_TX_PKT_DROP_THRESHOLD;
+static unsigned int bam_pending_limit = BAM_PENDING_LIMIT;
+module_param(bam_pending_limit, uint, S_IRUGO | S_IWUSR);
+
+static unsigned int bam_mux_tx_pkt_drop_thld = BAM_MUX_TX_PKT_DROP_THRESHOLD;
module_param(bam_mux_tx_pkt_drop_thld, uint, S_IRUGO | S_IWUSR);
-unsigned int bam_mux_rx_fctrl_en_thld = BAM_MUX_RX_PKT_FCTRL_EN_TSHOLD;
+static unsigned int bam_mux_rx_fctrl_en_thld = BAM_MUX_RX_PKT_FCTRL_EN_TSHOLD;
module_param(bam_mux_rx_fctrl_en_thld, uint, S_IRUGO | S_IWUSR);
-unsigned int bam_mux_rx_fctrl_support = BAM_MUX_RX_PKT_FLOW_CTRL_SUPPORT;
+static unsigned int bam_mux_rx_fctrl_support = BAM_MUX_RX_PKT_FLOW_CTRL_SUPPORT;
module_param(bam_mux_rx_fctrl_support, uint, S_IRUGO | S_IWUSR);
-unsigned int bam_mux_rx_fctrl_dis_thld = BAM_MUX_RX_PKT_FCTRL_DIS_TSHOLD;
+static unsigned int bam_mux_rx_fctrl_dis_thld = BAM_MUX_RX_PKT_FCTRL_DIS_TSHOLD;
module_param(bam_mux_rx_fctrl_dis_thld, uint, S_IRUGO | S_IWUSR);
-unsigned int bam_mux_tx_q_size = BAM_MUX_TX_Q_SIZE;
+static unsigned int bam_mux_tx_q_size = BAM_MUX_TX_Q_SIZE;
module_param(bam_mux_tx_q_size, uint, S_IRUGO | S_IWUSR);
-unsigned int bam_mux_rx_q_size = BAM_MUX_RX_Q_SIZE;
+static unsigned int bam_mux_rx_q_size = BAM_MUX_RX_Q_SIZE;
module_param(bam_mux_rx_q_size, uint, S_IRUGO | S_IWUSR);
-unsigned int bam_mux_rx_req_size = BAM_MUX_RX_REQ_SIZE;
+static unsigned int bam_mux_rx_req_size = BAM_MUX_RX_REQ_SIZE;
module_param(bam_mux_rx_req_size, uint, S_IRUGO | S_IWUSR);
-unsigned int dl_intr_threshold = DL_INTR_THRESHOLD;
+static unsigned int dl_intr_threshold = DL_INTR_THRESHOLD;
module_param(dl_intr_threshold, uint, S_IRUGO | S_IWUSR);
#define BAM_CH_OPENED BIT(0)
@@ -113,6 +116,10 @@
unsigned int rx_len;
unsigned long to_modem;
unsigned long to_host;
+ unsigned int rx_flow_control_disable;
+ unsigned int rx_flow_control_enable;
+ unsigned int rx_flow_control_triggered;
+ unsigned int max_num_pkts_pending_with_bam;
};
struct gbam_port {
@@ -324,7 +331,7 @@
return;
}
- while (d->pending_with_bam < BAM_PENDING_LIMIT) {
+ while (d->pending_with_bam < bam_pending_limit) {
skb = __skb_dequeue(&d->rx_skb_q);
if (!skb)
break;
@@ -347,14 +354,21 @@
dev_kfree_skb_any(skb);
break;
}
+ if (d->pending_with_bam > d->max_num_pkts_pending_with_bam)
+ d->max_num_pkts_pending_with_bam = d->pending_with_bam;
}
qlen = d->rx_skb_q.qlen;
spin_unlock_irqrestore(&port->port_lock_ul, flags);
- if (qlen < BAM_MUX_RX_PKT_FCTRL_DIS_TSHOLD)
+ if (qlen < bam_mux_rx_fctrl_dis_thld) {
+ if (d->rx_flow_control_triggered) {
+ d->rx_flow_control_disable++;
+ d->rx_flow_control_triggered = 0;
+ }
gbam_start_rx(port);
+ }
}
/*-------------------------------------------------------------*/
@@ -435,7 +449,10 @@
*/
if (bam_mux_rx_fctrl_support &&
d->rx_skb_q.qlen >= bam_mux_rx_fctrl_en_thld) {
-
+ if (!d->rx_flow_control_triggered) {
+ d->rx_flow_control_triggered = 1;
+ d->rx_flow_control_enable++;
+ }
list_add_tail(&req->list, &d->rx_idle);
spin_unlock(&port->port_lock_ul);
return;
@@ -1223,6 +1240,10 @@
"dpkts_pwith_bam: %u\n"
"to_usbhost_dcnt: %u\n"
"tomodem__dcnt: %u\n"
+ "rx_flow_control_disable_count: %u\n"
+ "rx_flow_control_enable_count: %u\n"
+ "rx_flow_control_triggered: %u\n"
+ "max_num_pkts_pending_with_bam: %u\n"
"tx_buf_len: %u\n"
"rx_buf_len: %u\n"
"data_ch_open: %d\n"
@@ -1231,6 +1252,10 @@
d->to_host, d->to_modem,
d->pending_with_bam,
d->tohost_drp_cnt, d->tomodem_drp_cnt,
+ d->rx_flow_control_disable,
+ d->rx_flow_control_enable,
+ d->rx_flow_control_triggered,
+ d->max_num_pkts_pending_with_bam,
d->tx_skb_q.qlen, d->rx_skb_q.qlen,
test_bit(BAM_CH_OPENED, &d->flags),
test_bit(BAM_CH_READY, &d->flags));
@@ -1269,6 +1294,10 @@
d->pending_with_bam = 0;
d->tohost_drp_cnt = 0;
d->tomodem_drp_cnt = 0;
+ d->rx_flow_control_disable = 0;
+ d->rx_flow_control_enable = 0;
+ d->rx_flow_control_triggered = 0;
+ d->max_num_pkts_pending_with_bam = 0;
spin_unlock(&port->port_lock_dl);
spin_unlock_irqrestore(&port->port_lock_ul, flags);
@@ -1434,6 +1463,10 @@
d->pending_with_bam = 0;
d->tohost_drp_cnt = 0;
d->tomodem_drp_cnt = 0;
+ d->rx_flow_control_disable = 0;
+ d->rx_flow_control_enable = 0;
+ d->rx_flow_control_triggered = 0;
+ d->max_num_pkts_pending_with_bam = 0;
}
spin_unlock(&port->port_lock_dl);
diff --git a/drivers/usb/host/ehci-msm-hsic.c b/drivers/usb/host/ehci-msm-hsic.c
index 1030664..a89ac06 100644
--- a/drivers/usb/host/ehci-msm-hsic.c
+++ b/drivers/usb/host/ehci-msm-hsic.c
@@ -1486,7 +1486,7 @@
* generic hardware linkage
*/
.irq = msm_hsic_irq,
- .flags = HCD_USB2 | HCD_MEMORY | HCD_OLD_ENUM,
+ .flags = HCD_USB2 | HCD_MEMORY | HCD_RT_OLD_ENUM,
.reset = ehci_hsic_reset,
.start = ehci_run,
diff --git a/drivers/usb/storage/scsiglue.c b/drivers/usb/storage/scsiglue.c
index a324a5d..669fca9 100644
--- a/drivers/usb/storage/scsiglue.c
+++ b/drivers/usb/storage/scsiglue.c
@@ -230,6 +230,11 @@
US_FL_SCM_MULT_TARG)) &&
us->protocol == USB_PR_BULK)
us->use_last_sector_hacks = 1;
+
+ if (us->sdev_autosuspend_delay >= 0) {
+ sdev->use_rpm_auto = 1;
+ sdev->autosuspend_delay = us->sdev_autosuspend_delay;
+ }
} else {
/* Non-disk-type devices don't need to blacklist any pages
diff --git a/drivers/usb/storage/usb.c b/drivers/usb/storage/usb.c
index 2653e73..be7044b 100644
--- a/drivers/usb/storage/usb.c
+++ b/drivers/usb/storage/usb.c
@@ -742,6 +742,28 @@
return 0;
}
+/* Initialize SCSI device auto-suspend timeout here */
+static void usb_stor_set_scsi_autosuspend(struct us_data *us)
+{
+ struct usb_device *udev = us->pusb_dev;
+ struct usb_host_config *config = udev->actconfig;
+ struct usb_host_interface *intf;
+ int i;
+
+ /*
+ * Some USB UICC devices has Mass storage interface along
+ * with CCID interface. These cards are inserted all the
+ * time. Enable SCSI auto-suspend for such devices.
+ */
+ for (i = 0; i < config->desc.bNumInterfaces; i++) {
+ intf = config->interface[i]->cur_altsetting;
+ if (intf->desc.bInterfaceClass == USB_CLASS_CSCID) {
+ us->sdev_autosuspend_delay = 2000; /* msec */
+ return;
+ }
+ }
+}
+
/* Initialize all the dynamic resources we need */
static int usb_stor_acquire_resources(struct us_data *us)
{
@@ -990,6 +1012,10 @@
result = usb_stor_acquire_resources(us);
if (result)
goto BadDevice;
+
+ us->sdev_autosuspend_delay = -1;
+ usb_stor_set_scsi_autosuspend(us);
+
snprintf(us->scsi_name, sizeof(us->scsi_name), "usb-storage %s",
dev_name(&us->pusb_intf->dev));
result = scsi_add_host(us_to_host(us), dev);
diff --git a/drivers/usb/storage/usb.h b/drivers/usb/storage/usb.h
index 75f70f0..db75080 100644
--- a/drivers/usb/storage/usb.h
+++ b/drivers/usb/storage/usb.h
@@ -161,6 +161,7 @@
/* hacks for READ CAPACITY bug handling */
int use_last_sector_hacks;
int last_sector_retries;
+ int sdev_autosuspend_delay;
};
/* Convert between us_data and the corresponding Scsi_Host */
diff --git a/drivers/video/msm/mdss/dsi_host_v2.c b/drivers/video/msm/mdss/dsi_host_v2.c
index 25ee3e4..53b6fc6 100644
--- a/drivers/video/msm/mdss/dsi_host_v2.c
+++ b/drivers/video/msm/mdss/dsi_host_v2.c
@@ -959,11 +959,17 @@
msm_dsi_clk_ctrl(&ctrl->panel_data, 1);
+ if (0 == (req->flags & CMD_REQ_LP_MODE))
+ dsi_set_tx_power_mode(0);
+
if (req->flags & CMD_REQ_RX)
msm_dsi_cmdlist_rx(ctrl, req);
else
msm_dsi_cmdlist_tx(ctrl, req);
+ if (0 == (req->flags & CMD_REQ_LP_MODE))
+ dsi_set_tx_power_mode(1);
+
msm_dsi_clk_ctrl(&ctrl->panel_data, 0);
mutex_unlock(&ctrl->cmd_mutex);
diff --git a/drivers/video/msm/mdss/mdp3.c b/drivers/video/msm/mdss/mdp3.c
index 02bd7e9..0cf1093 100644
--- a/drivers/video/msm/mdss/mdp3.c
+++ b/drivers/video/msm/mdss/mdp3.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
* Copyright (C) 2007 Google Incorporated
*
* This software is licensed under the terms of the GNU General Public
@@ -1667,69 +1667,79 @@
return xres * bpp;
}
-static int mdp3_alloc(size_t size, void **virt, unsigned long *phys)
+static int mdp3_alloc(struct msm_fb_data_type *mfd)
{
- int ret = 0;
+ int ret;
+ int dom;
+ void *virt;
+ unsigned long phys;
+ u32 offsets[2];
+ size_t size;
+ struct platform_device *pdev = mfd->pdev;
- if (mdp3_res->ion_handle) {
- pr_debug("memory already alloc\n");
- *virt = mdp3_res->virt;
- *phys = mdp3_res->phys;
- return 0;
+ mfd->fbi->screen_base = NULL;
+ mfd->fbi->fix.smem_start = 0;
+ mfd->fbi->fix.smem_len = 0;
+
+ ret = of_property_read_u32_array(pdev->dev.of_node,
+ "qcom,memblock-reserve", offsets, 2);
+
+ if (ret) {
+ pr_err("fail to parse splash memory address\n");
+ return ret;
}
- mdp3_res->ion_handle = ion_alloc(mdp3_res->ion_client, size,
- SZ_1M,
- ION_HEAP(ION_QSECOM_HEAP_ID), 0);
+ phys = offsets[0];
+ size = PAGE_ALIGN(mfd->fbi->fix.line_length *
+ mfd->fbi->var.yres_virtual);
- if (!IS_ERR_OR_NULL(mdp3_res->ion_handle)) {
- *virt = ion_map_kernel(mdp3_res->ion_client,
- mdp3_res->ion_handle);
- if (IS_ERR(*virt)) {
- pr_err("map kernel error\n");
- goto ion_map_kernel_err;
- }
+ if (size > offsets[1]) {
+ pr_err("reserved splash memory size too small\n");
+ return -EINVAL;
+ }
- ret = ion_phys(mdp3_res->ion_client, mdp3_res->ion_handle,
- phys, &size);
- if (ret) {
- pr_err("%s ion_phys error\n", __func__);
- goto ion_map_phys_err;
- }
-
- mdp3_res->virt = *virt;
- mdp3_res->phys = *phys;
- mdp3_res->size = size;
- } else {
- pr_err("%s ion alloc fail\n", __func__);
- mdp3_res->ion_handle = NULL;
+ virt = phys_to_virt(phys);
+ if (unlikely(!virt)) {
+ pr_err("unable to map in splash memory\n");
return -ENOMEM;
}
- return 0;
+ dom = mdp3_res->domains[MDP3_DMA_IOMMU_DOMAIN].domain_idx;
+ ret = msm_iommu_map_contig_buffer(phys, dom, 0, size, SZ_4K, 0,
+ &mfd->iova);
-ion_map_phys_err:
- ion_unmap_kernel(mdp3_res->ion_client, mdp3_res->ion_handle);
-ion_map_kernel_err:
- ion_free(mdp3_res->ion_client, mdp3_res->ion_handle);
- mdp3_res->ion_handle = NULL;
- mdp3_res->virt = NULL;
- mdp3_res->phys = 0;
- mdp3_res->size = 0;
- return -ENOMEM;
+ if (ret) {
+ pr_err("fail to map to IOMMU %d\n", ret);
+ return ret;
+ }
+ pr_info("allocating %u bytes at %p (%lx phys) for fb %d\n",
+ size, virt, phys, mfd->index);
+
+ mfd->fbi->screen_base = virt;
+ mfd->fbi->fix.smem_start = phys;
+ mfd->fbi->fix.smem_len = size;
+
+ return 0;
}
-void mdp3_free(void)
+void mdp3_free(struct msm_fb_data_type *mfd)
{
- pr_debug("mdp3_fbmem_free\n");
- if (mdp3_res->ion_handle) {
- ion_unmap_kernel(mdp3_res->ion_client, mdp3_res->ion_handle);
- ion_free(mdp3_res->ion_client, mdp3_res->ion_handle);
- mdp3_res->ion_handle = NULL;
- mdp3_res->virt = NULL;
- mdp3_res->phys = 0;
- mdp3_res->size = 0;
+ size_t size = 0;
+ int dom;
+
+ if (!mfd->iova || !mfd->fbi->screen_base) {
+ pr_info("no fbmem allocated\n");
+ return;
}
+
+ size = mfd->fbi->fix.smem_len;
+ dom = mdp3_res->domains[MDP3_DMA_IOMMU_DOMAIN].domain_idx;
+ msm_iommu_unmap_contig_buffer(mfd->iova, dom, 0, size);
+
+ mfd->fbi->screen_base = NULL;
+ mfd->fbi->fix.smem_start = 0;
+ mfd->fbi->fix.smem_len = 0;
+ mfd->iova = 0;
}
int mdp3_parse_dt_splash(struct msm_fb_data_type *mfd)
@@ -1752,16 +1762,17 @@
mdp3_res->splash_mem_addr = offsets[0];
mdp3_res->splash_mem_size = offsets[1];
- pr_debug("memaddr=%x size=%x\n", mdp3_res->splash_mem_addr,
+ pr_debug("memaddr=%lx size=%x\n", mdp3_res->splash_mem_addr,
mdp3_res->splash_mem_size);
return rc;
}
-void mdp3_release_splash_memory(void)
+void mdp3_release_splash_memory(struct msm_fb_data_type *mfd)
{
/* Give back the reserved memory to the system */
if (mdp3_res->splash_mem_addr) {
+ mdp3_free(mfd);
pr_debug("mdp3_release_splash_memory\n");
memblock_free(mdp3_res->splash_mem_addr,
mdp3_res->splash_mem_size);
@@ -1811,44 +1822,6 @@
return mdp3_res->cont_splash_en;
}
-int mdp3_continuous_splash_copy(struct mdss_panel_data *pdata)
-{
- unsigned long splash_phys, phys;
- void *splash_virt, *virt;
- u32 height, width, rgb_size, stride;
- size_t size;
- int rc;
-
- if (pdata->panel_info.type != MIPI_VIDEO_PANEL) {
- pr_debug("cmd mode panel, no need to copy splash image\n");
- return 0;
- }
-
- rgb_size = MDP3_REG_READ(MDP3_REG_DMA_P_SIZE);
- stride = MDP3_REG_READ(MDP3_REG_DMA_P_IBUF_Y_STRIDE);
- stride = stride & 0x3FFF;
- splash_phys = MDP3_REG_READ(MDP3_REG_DMA_P_IBUF_ADDR);
-
- height = (rgb_size >> 16) & 0xffff;
- width = rgb_size & 0xffff;
- size = PAGE_ALIGN(height * stride);
- pr_debug("splash_height=%d splash_width=%d Buffer size=%d\n",
- height, width, size);
-
- rc = mdp3_alloc(size, &virt, &phys);
- if (rc) {
- pr_err("fail to allocate memory for continuous splash image\n");
- return rc;
- }
-
- splash_virt = ioremap(splash_phys, stride * height);
- memcpy(virt, splash_virt, stride * height);
- iounmap(splash_virt);
- MDP3_REG_WRITE(MDP3_REG_DMA_P_IBUF_ADDR, phys);
-
- return 0;
-}
-
static int mdp3_is_display_on(struct mdss_panel_data *pdata)
{
int rc = 0;
@@ -1883,6 +1856,9 @@
mdp3_clk_set_rate(MDP3_CLK_VSYNC, MDP_VSYNC_CLK_RATE,
MDP3_CLIENT_DMA_P);
+ mdp3_clk_set_rate(MDP3_CLK_CORE, MDP_CORE_CLK_RATE,
+ MDP3_CLIENT_DMA_P);
+
rc = mdp3_clk_prepare();
if (rc) {
pr_err("fail to prepare clk\n");
@@ -2171,6 +2147,7 @@
.fb_mem_get_iommu_domain = mdp3_fb_mem_get_iommu_domain,
.panel_register_done = mdp3_panel_register_done,
.fb_stride = mdp3_fb_stride,
+ .fb_mem_alloc_fnc = mdp3_alloc,
};
struct mdp3_intr_cb underrun_cb = {
diff --git a/drivers/video/msm/mdss/mdp3.h b/drivers/video/msm/mdss/mdp3.h
index f1f0455..a253d8f 100644
--- a/drivers/video/msm/mdss/mdp3.h
+++ b/drivers/video/msm/mdss/mdp3.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
* Copyright (C) 2007 Google Incorporated
*
* This program is free software; you can redistribute it and/or modify
@@ -26,6 +26,7 @@
#include "mdss_fb.h"
#define MDP_VSYNC_CLK_RATE 19200000
+#define MDP_CORE_CLK_RATE 100000000
#define KOFF_TIMEOUT msecs_to_jiffies(84)
enum {
@@ -136,9 +137,6 @@
struct ion_handle *ion_handle;
struct mutex iommu_lock;
struct rb_root iommu_root;
- void *virt;
- unsigned long phys;
- size_t size;
struct mdp3_dma dma[MDP3_DMA_MAX];
struct mdp3_intf intf[MDP3_DMA_OUTPUT_SEL_MAX];
@@ -153,7 +151,7 @@
struct early_suspend suspend_handler;
struct mdss_panel_cfg pan_cfg;
- u32 splash_mem_addr;
+ unsigned long splash_mem_addr;
u32 splash_mem_size;
int clk_prepare_count;
@@ -194,9 +192,9 @@
int mdp3_iommu_enable(int client);
int mdp3_iommu_disable(int client);
int mdp3_iommu_is_attached(int client);
-void mdp3_free(void);
+void mdp3_free(struct msm_fb_data_type *mfd);
int mdp3_parse_dt_splash(struct msm_fb_data_type *mfd);
-void mdp3_release_splash_memory(void);
+void mdp3_release_splash_memory(struct msm_fb_data_type *mfd);
int mdp3_create_sysfs_link(struct device *dev);
int mdp3_get_cont_spash_en(void);
int mdp3_get_mdp_dsi_clk(void);
diff --git a/drivers/video/msm/mdss/mdp3_ctrl.c b/drivers/video/msm/mdss/mdp3_ctrl.c
index b204493..8b390ca 100644
--- a/drivers/video/msm/mdss/mdp3_ctrl.c
+++ b/drivers/video/msm/mdss/mdp3_ctrl.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -25,7 +25,6 @@
#include "mdp3.h"
#include "mdp3_ppp.h"
-#define MDP_CORE_CLK_RATE 100000000
#define VSYNC_EXPIRE_TICK 4
static void mdp3_ctrl_pan_display(struct msm_fb_data_type *mfd,
@@ -628,17 +627,8 @@
}
mdp3_session->clk_on = 1;
- pr_debug("mdp3_ctrl_on dma start\n");
- if (mfd->fbi->screen_base) {
- rc = mdp3_session->dma->start(mdp3_session->dma,
- mdp3_session->intf);
- if (rc) {
- pr_err("fail to start the MDP display interface\n");
- goto on_error;
- }
- } else {
- mdp3_session->first_commit = true;
- }
+
+ mdp3_session->first_commit = true;
on_error:
if (!rc)
@@ -718,9 +708,11 @@
off_error:
mdp3_session->status = 0;
mdp3_bufq_deinit(&mdp3_session->bufq_out);
+ if (mdp3_session->overlay.id != MSMFB_NEW_REQUEST) {
+ mdp3_session->overlay.id = MSMFB_NEW_REQUEST;
+ mdp3_bufq_deinit(&mdp3_session->bufq_in);
+ }
mutex_unlock(&mdp3_session->lock);
- if (mdp3_session->overlay.id != MSMFB_NEW_REQUEST)
- mdp3_overlay_unset(mfd, mdp3_session->overlay.id);
return 0;
}
@@ -764,10 +756,7 @@
if (vsync_client.handler)
mdp3_dma->vsync_enable(mdp3_dma, &vsync_client);
- if (mfd->fbi->screen_base)
- rc = mdp3_dma->start(mdp3_dma, mdp3_session->intf);
- else
- mdp3_session->first_commit = true;
+ mdp3_session->first_commit = true;
reset_error:
mutex_unlock(&mdp3_session->lock);
@@ -855,10 +844,7 @@
if (vsync_client.handler)
mdp3_dma->vsync_enable(mdp3_dma, &vsync_client);
- if (mfd->fbi->screen_base)
- rc = mdp3_dma->start(mdp3_dma, mdp3_session->intf);
- else
- mdp3_session->first_commit = true;
+ mdp3_session->first_commit = true;
reset_error:
mutex_unlock(&mdp3_session->lock);
@@ -906,11 +892,7 @@
mdp3_session->overlay = *req;
if (req->id == MSMFB_NEW_REQUEST) {
if (dma->source_config.stride != stride ||
- dma->source_config.width != req->src.width ||
- dma->source_config.height != req->src.height ||
dma->source_config.format != format) {
- dma->source_config.width = req->src.width;
- dma->source_config.height = req->src.height,
dma->source_config.format = format;
dma->source_config.stride = stride;
mdp3_clk_enable(1, 0);
@@ -932,7 +914,6 @@
struct mdp3_session_data *mdp3_session = mfd->mdp.private1;
struct fb_info *fbi = mfd->fbi;
struct fb_fix_screeninfo *fix;
- struct mdss_panel_info *panel_info = mfd->panel_info;
int format;
fix = &fbi->fix;
@@ -941,8 +922,6 @@
if (mdp3_session->overlay.id == ndx && ndx == 1) {
struct mdp3_dma *dma = mdp3_session->dma;
- dma->source_config.width = panel_info->xres,
- dma->source_config.height = panel_info->yres,
dma->source_config.format = format;
dma->source_config.stride = fix->line_length;
mdp3_clk_enable(1, 0);
@@ -1031,7 +1010,6 @@
mdp3_ctrl_reset(mfd);
reset_done = true;
}
- mdp3_release_splash_memory();
mutex_lock(&mdp3_session->lock);
@@ -1066,6 +1044,7 @@
}
if (mdp3_bufq_count(&mdp3_session->bufq_out) > 1) {
+ mdp3_release_splash_memory(mfd);
data = mdp3_bufq_pop(&mdp3_session->bufq_out);
mdp3_put_img(data, MDP3_CLIENT_DMA_P);
}
@@ -1111,7 +1090,6 @@
pr_debug("continuous splash screen, IOMMU not attached\n");
mdp3_ctrl_reset(mfd);
}
- mdp3_release_splash_memory();
mutex_lock(&mdp3_session->lock);
diff --git a/drivers/video/msm/mdss/mdp3_hwio.h b/drivers/video/msm/mdss/mdp3_hwio.h
index 5205b42..39690ef 100644
--- a/drivers/video/msm/mdss/mdp3_hwio.h
+++ b/drivers/video/msm/mdss/mdp3_hwio.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -272,6 +272,8 @@
#define MDP3_PPP_BLEND_BG_ALPHA_SEL 0x70010
+#define MDP3_PPP_ACTIVE BIT(0)
+
/*interrupt mask*/
#define MDP3_INTR_DP0_ROI_DONE_BIT BIT(0)
diff --git a/drivers/video/msm/mdss/mdp3_ppp.c b/drivers/video/msm/mdss/mdp3_ppp.c
index d778af8..270c096 100644
--- a/drivers/video/msm/mdss/mdp3_ppp.c
+++ b/drivers/video/msm/mdss/mdp3_ppp.c
@@ -83,9 +83,7 @@
};
struct ppp_status {
- int busy;
bool wait_for_pop;
- spinlock_t ppp_lock;
struct completion ppp_comp;
struct completion pop_q_comp;
struct mutex req_mutex; /* Protect request queue */
@@ -271,24 +269,16 @@
int mdp3_ppp_pipe_wait(void)
{
int ret = 1;
- int wait;
- unsigned long flag;
/*
- * wait 5 secs for operation to complete before declaring
+ * wait 40 ms for ppp operation to complete before declaring
* the MDP hung
*/
- spin_lock_irqsave(&ppp_stat->ppp_lock, flag);
- wait = ppp_stat->busy;
- spin_unlock_irqrestore(&ppp_stat->ppp_lock, flag);
-
- if (wait) {
- ret = wait_for_completion_interruptible_timeout(
- &ppp_stat->ppp_comp, 5 * HZ);
- if (!ret)
- pr_err("%s: Timed out waiting for the MDP.\n",
- __func__);
- }
+ ret = wait_for_completion_timeout(
+ &ppp_stat->ppp_comp, msecs_to_jiffies(40));
+ if (!ret)
+ pr_err("%s: Timed out waiting for the MDP.\n",
+ __func__);
return ret;
}
@@ -321,11 +311,7 @@
static void mdp3_ppp_intr_handler(int type, void *arg)
{
- spin_lock(&ppp_stat->ppp_lock);
- ppp_stat->busy = false;
- spin_unlock(&ppp_stat->ppp_lock);
complete(&ppp_stat->ppp_comp);
- mdp3_irq_disable_nosync(type);
}
static int mdp3_ppp_callback_setup(void)
@@ -342,17 +328,11 @@
void mdp3_ppp_kickoff(void)
{
- unsigned long flag;
- mdp3_irq_enable(MDP3_PPP_DONE);
-
init_completion(&ppp_stat->ppp_comp);
-
- spin_lock_irqsave(&ppp_stat->ppp_lock, flag);
- ppp_stat->busy = true;
- spin_unlock_irqrestore(&ppp_stat->ppp_lock, flag);
+ mdp3_irq_enable(MDP3_PPP_DONE);
ppp_enable();
-
mdp3_ppp_pipe_wait();
+ mdp3_irq_disable(MDP3_PPP_DONE);
}
int mdp3_ppp_turnon(struct msm_fb_data_type *mfd, int on_off)
@@ -390,7 +370,11 @@
void mdp3_start_ppp(struct ppp_blit_op *blit_op)
{
/* Wait for the pipe to clear */
- do { } while (mdp3_ppp_pipe_wait() <= 0);
+ if (MDP3_REG_READ(MDP3_REG_DISPLAY_STATUS) &
+ MDP3_PPP_ACTIVE) {
+ pr_err("ppp core is hung up on previous request\n");
+ return;
+ }
config_ppp_op_mode(blit_op);
if (blit_op->solid_fill) {
MDP3_REG_WRITE(0x10138, 0x10000000);
@@ -1099,7 +1083,7 @@
while (req_q->count >= MDP3_PPP_MAX_LIST_REQ) {
ppp_stat->wait_for_pop = true;
mutex_unlock(&ppp_stat->req_mutex);
- rc = wait_for_completion_interruptible_timeout(
+ rc = wait_for_completion_timeout(
&ppp_stat->pop_q_comp, 5 * HZ);
if (rc == 0) {
/* This will only occur if there is serious problem */
@@ -1211,13 +1195,11 @@
INIT_WORK(&ppp_stat->blit_work, mdp3_ppp_blit_wq_handler);
INIT_WORK(&ppp_stat->free_bw_work, mdp3_free_bw_wq_handler);
init_completion(&ppp_stat->pop_q_comp);
- spin_lock_init(&ppp_stat->ppp_lock);
mutex_init(&ppp_stat->req_mutex);
mutex_init(&ppp_stat->config_ppp_mutex);
init_timer(&ppp_stat->free_bw_timer);
ppp_stat->free_bw_timer.function = mdp3_free_fw_timer_func;
ppp_stat->free_bw_timer.data = 0;
- ppp_stat->busy = false;
ppp_stat->mfd = mfd;
mdp3_ppp_callback_setup();
return 0;
diff --git a/drivers/video/msm/mdss/mdss.h b/drivers/video/msm/mdss/mdss.h
index ce4005e..53292f8 100644
--- a/drivers/video/msm/mdss/mdss.h
+++ b/drivers/video/msm/mdss/mdss.h
@@ -93,6 +93,8 @@
size_t mdp_reg_size;
char __iomem *vbif_base;
+ struct mutex reg_lock;
+
u32 irq;
u32 irq_mask;
u32 irq_ena;
@@ -163,6 +165,8 @@
int current_bus_idx;
bool mixer_switched;
struct mdss_panel_cfg pan_cfg;
+
+ int handoff_pending;
};
extern struct mdss_data_type *mdss_res;
diff --git a/drivers/video/msm/mdss/mdss_dsi.h b/drivers/video/msm/mdss/mdss_dsi.h
index 855ec6c..b89a935 100644
--- a/drivers/video/msm/mdss/mdss_dsi.h
+++ b/drivers/video/msm/mdss/mdss_dsi.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -330,7 +330,8 @@
void mdss_dsi_phy_enable(struct mdss_dsi_ctrl_pdata *ctrl, int on);
void mdss_dsi_phy_init(struct mdss_panel_data *pdata);
void mdss_dsi_phy_sw_reset(unsigned char *ctrl_base);
-void mdss_dsi_cmd_test_pattern(struct mdss_panel_data *pdata);
+void mdss_dsi_cmd_test_pattern(struct mdss_dsi_ctrl_pdata *ctrl);
+void mdss_dsi_video_test_pattern(struct mdss_dsi_ctrl_pdata *ctrl);
void mdss_dsi_panel_pwm_cfg(struct mdss_dsi_ctrl_pdata *ctrl);
void mdss_dsi_ctrl_init(struct mdss_dsi_ctrl_pdata *ctrl);
diff --git a/drivers/video/msm/mdss/mdss_dsi_cmd.h b/drivers/video/msm/mdss/mdss_dsi_cmd.h
index c480756..f806e78 100644
--- a/drivers/video/msm/mdss/mdss_dsi_cmd.h
+++ b/drivers/video/msm/mdss/mdss_dsi_cmd.h
@@ -98,6 +98,7 @@
#define CMD_REQ_COMMIT 0x0002
#define CMD_CLK_CTRL 0x0004
#define CMD_REQ_NO_MAX_PKT_SIZE 0x0008
+#define CMD_REQ_LP_MODE 0x0010
struct dcs_cmd_req {
struct dsi_cmd_desc *cmds;
diff --git a/drivers/video/msm/mdss/mdss_dsi_host.c b/drivers/video/msm/mdss/mdss_dsi_host.c
index 65e6214..bd156fc 100644
--- a/drivers/video/msm/mdss/mdss_dsi_host.c
+++ b/drivers/video/msm/mdss/mdss_dsi_host.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -200,28 +200,34 @@
spin_unlock(&ctrl->irq_lock);
}
-void mdss_dsi_cmd_test_pattern(struct mdss_panel_data *pdata)
+void mdss_dsi_video_test_pattern(struct mdss_dsi_ctrl_pdata *ctrl)
{
- struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
int i;
- if (pdata == NULL) {
- pr_err("%s: Invalid input data\n", __func__);
- return;
- }
-
- ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
- panel_data);
-
- MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x015c, 0x201);
- MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x016c, 0xff0000); /* red */
+ MIPI_OUTP((ctrl->ctrl_base) + 0x015c, 0x021);
+ MIPI_OUTP((ctrl->ctrl_base) + 0x0164, 0xff0000); /* red */
i = 0;
while (i++ < 50) {
- MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x0184, 0x1);
+ MIPI_OUTP((ctrl->ctrl_base) + 0x0180, 0x1);
/* Add sleep to get ~50 fps frame rate*/
msleep(20);
}
- MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x015c, 0x0);
+ MIPI_OUTP((ctrl->ctrl_base) + 0x015c, 0x0);
+}
+
+void mdss_dsi_cmd_test_pattern(struct mdss_dsi_ctrl_pdata *ctrl)
+{
+ int i;
+
+ MIPI_OUTP((ctrl->ctrl_base) + 0x015c, 0x201);
+ MIPI_OUTP((ctrl->ctrl_base) + 0x016c, 0xff0000); /* red */
+ i = 0;
+ while (i++ < 50) {
+ MIPI_OUTP((ctrl->ctrl_base) + 0x0184, 0x1);
+ /* Add sleep to get ~50 fps frame rate*/
+ msleep(20);
+ }
+ MIPI_OUTP((ctrl->ctrl_base) + 0x015c, 0x0);
}
void mdss_dsi_host_init(struct mipi_panel_info *pinfo,
diff --git a/drivers/video/msm/mdss/mdss_dsi_panel.c b/drivers/video/msm/mdss/mdss_dsi_panel.c
index 8c3e470..6e44099 100644
--- a/drivers/video/msm/mdss/mdss_dsi_panel.c
+++ b/drivers/video/msm/mdss/mdss_dsi_panel.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -118,6 +118,11 @@
cmdreq.cmds = pcmds->cmds;
cmdreq.cmds_cnt = pcmds->cmd_cnt;
cmdreq.flags = CMD_REQ_COMMIT;
+
+ /*Panel ON/Off commands should be sent in DSI Low Power Mode*/
+ if (pcmds->link_state == DSI_LP_MODE)
+ cmdreq.flags |= CMD_REQ_LP_MODE;
+
cmdreq.rlen = 0;
cmdreq.cb = NULL;
@@ -824,7 +829,7 @@
rc = of_property_read_u32(np, "qcom,mdss-dsi-virtual-channel-id", &tmp);
pinfo->mipi.vc = (!rc ? tmp : 0);
pinfo->mipi.rgb_swap = DSI_RGB_SWAP_RGB;
- data = of_get_property(np, "mdss-dsi-color-order", NULL);
+ data = of_get_property(np, "qcom,mdss-dsi-color-order", NULL);
if (data) {
if (!strcmp(data, "rgb_swap_rbg"))
pinfo->mipi.rgb_swap = DSI_RGB_SWAP_RBG;
diff --git a/drivers/video/msm/mdss/mdss_edp.c b/drivers/video/msm/mdss/mdss_edp.c
index 95c746e..eca73a8 100644
--- a/drivers/video/msm/mdss/mdss_edp.c
+++ b/drivers/video/msm/mdss/mdss_edp.c
@@ -33,8 +33,6 @@
#include <mach/dma.h>
#include "mdss.h"
-#include "mdss_panel.h"
-#include "mdss_mdp.h"
#include "mdss_edp.h"
#include "mdss_debug.h"
@@ -198,6 +196,7 @@
int ret = 0;
struct mdss_edp_drv_pdata *edp_drv = NULL;
int bl_max;
+ int period_ns;
edp_drv = container_of(pdata, struct mdss_edp_drv_pdata, panel_data);
if (!edp_drv) {
@@ -210,13 +209,29 @@
if (bl_level > bl_max)
bl_level = bl_max;
- ret = pwm_config_us(edp_drv->bl_pwm,
- bl_level * edp_drv->pwm_period / bl_max,
- edp_drv->pwm_period);
- if (ret) {
- pr_err("%s: pwm_config_us() failed err=%d.\n", __func__,
- ret);
- return;
+ /* In order to avoid overflow, use the microsecond version
+ * of pwm_config if the pwm_period is greater than or equal
+ * to 1 second.
+ */
+ if (edp_drv->pwm_period >= USEC_PER_SEC) {
+ ret = pwm_config_us(edp_drv->bl_pwm,
+ bl_level * edp_drv->pwm_period / bl_max,
+ edp_drv->pwm_period);
+ if (ret) {
+ pr_err("%s: pwm_config_us() failed err=%d.\n",
+ __func__, ret);
+ return;
+ }
+ } else {
+ period_ns = edp_drv->pwm_period * NSEC_PER_USEC;
+ ret = pwm_config(edp_drv->bl_pwm,
+ bl_level * period_ns / bl_max,
+ period_ns);
+ if (ret) {
+ pr_err("%s: pwm_config() failed err=%d.\n",
+ __func__, ret);
+ return;
+ }
}
ret = pwm_enable(edp_drv->bl_pwm);
@@ -375,6 +390,7 @@
void mdss_edp_clock_synchrous(struct mdss_edp_drv_pdata *ep, int sync)
{
u32 data;
+ u32 color;
/* EDP_MISC1_MISC0 */
data = edp_read(ep->base + 0x02c);
@@ -384,6 +400,20 @@
else
data &= ~0x01;
+ /* only legacy rgb mode supported */
+ color = 0; /* 6 bits */
+ if (ep->edid.color_depth == 8)
+ color = 0x01;
+ else if (ep->edid.color_depth == 10)
+ color = 0x02;
+ else if (ep->edid.color_depth == 12)
+ color = 0x03;
+ else if (ep->edid.color_depth == 16)
+ color = 0x04;
+
+ color <<= 5; /* bit 5 to bit 7 */
+
+ data |= color;
/* EDP_MISC1_MISC0 */
edp_write(ep->base + 0x2c, data);
}
@@ -515,8 +545,6 @@
pr_debug("%s:+, cont_splash=%d\n", __func__, edp_drv->cont_splash);
- mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
-
if (!edp_drv->cont_splash) { /* vote for clocks */
mdss_edp_phy_pll_reset(edp_drv);
mdss_edp_aux_reset(edp_drv);
@@ -576,6 +604,8 @@
}
pr_debug("%s:+, cont_splash=%d\n", __func__, edp_drv->cont_splash);
+ /* wait until link training is completed */
+ mutex_lock(&edp_drv->train_mutex);
INIT_COMPLETION(edp_drv->idle_comp);
mdss_edp_state_ctrl(edp_drv, ST_PUSH_IDLE);
@@ -605,12 +635,12 @@
mdss_edp_clk_disable(edp_drv);
mdss_edp_unprepare_clocks(edp_drv);
- mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
-
mdss_edp_aux_ctrl(edp_drv, 0);
pr_debug("%s-: state_ctrl=%x\n", __func__,
edp_read(edp_drv->base + 0x8));
+
+ mutex_unlock(&edp_drv->train_mutex);
return 0;
}
@@ -707,6 +737,9 @@
edp_drv->panel_data.panel_info.brightness_max =
(!ret ? tmp : MDSS_MAX_BL_BRIGHTNESS);
+ edp_drv->panel_data.panel_info.edp.frame_rate =
+ DEFAULT_FRAME_RATE;/* 60 fps */
+
edp_drv->panel_data.event_handler = mdss_edp_event_handler;
edp_drv->panel_data.set_backlight = mdss_edp_set_backlight;
@@ -792,7 +825,6 @@
if (ep->cont_splash)
return;
- INIT_COMPLETION(ep->train_comp);
mdss_edp_link_train(ep);
}
@@ -1073,10 +1105,6 @@
pr_debug("%s:cont_splash=%d\n", __func__, edp_drv->cont_splash);
- /* need mdss clock to receive irq */
- if (!edp_drv->cont_splash)
- mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
-
/* only need aux and ahb clock for aux channel */
mdss_edp_prepare_aux_clocks(edp_drv);
mdss_edp_aux_clk_enable(edp_drv);
@@ -1105,9 +1133,6 @@
mdss_edp_aux_clk_disable(edp_drv);
mdss_edp_unprepare_aux_clocks(edp_drv);
- if (!edp_drv->cont_splash)
- mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
-
if (edp_drv->cont_splash) { /* vote for clocks */
mdss_edp_prepare_clocks(edp_drv);
mdss_edp_clk_enable(edp_drv);
diff --git a/drivers/video/msm/mdss/mdss_edp.h b/drivers/video/msm/mdss/mdss_edp.h
index 0c0200d..12e3be7 100644
--- a/drivers/video/msm/mdss/mdss_edp.h
+++ b/drivers/video/msm/mdss/mdss_edp.h
@@ -293,6 +293,7 @@
struct clk *pixel_clk;
struct clk *ahb_clk;
struct clk *link_clk;
+ struct clk *mdp_core_clk;
int clk_on;
/* gpios */
@@ -314,6 +315,7 @@
struct completion idle_comp;
struct completion video_comp;
struct mutex aux_mutex;
+ struct mutex train_mutex;
u32 aux_cmd_busy;
u32 aux_cmd_i2c;
int aux_trans_num;
diff --git a/drivers/video/msm/mdss/mdss_edp_aux.c b/drivers/video/msm/mdss/mdss_edp_aux.c
index bbcee19..1c36ab0 100644
--- a/drivers/video/msm/mdss/mdss_edp_aux.c
+++ b/drivers/video/msm/mdss/mdss_edp_aux.c
@@ -1196,7 +1196,6 @@
static void edp_clear_training_pattern(struct mdss_edp_drv_pdata *ep)
{
pr_debug("%s:\n", __func__);
- edp_write(ep->base + EDP_STATE_CTRL, 0);
edp_train_pattern_set_write(ep, 0);
usleep(ep->dpcd.training_read_interval);
}
@@ -1224,6 +1223,7 @@
mdss_edp_config_ctrl(ep);
mdss_edp_lane_power_ctrl(ep, 1);
+ mdss_edp_state_ctrl(ep, 0);
edp_clear_training_pattern(ep);
usleep(ep->dpcd.training_read_interval);
@@ -1240,6 +1240,7 @@
pr_debug("%s: Training 1 completed successfully", __func__);
+ mdss_edp_state_ctrl(ep, 0);
edp_clear_training_pattern(ep);
ret = edp_start_link_train_2(ep);
if (ret < 0) {
@@ -1312,12 +1313,18 @@
int mdss_edp_link_train(struct mdss_edp_drv_pdata *ep)
{
- return edp_aux_link_train(ep);
+ int ret;
+
+ mutex_lock(&ep->train_mutex);
+ ret = edp_aux_link_train(ep);
+ mutex_unlock(&ep->train_mutex);
+ return ret;
}
void mdss_edp_aux_init(struct mdss_edp_drv_pdata *ep)
{
mutex_init(&ep->aux_mutex);
+ mutex_init(&ep->train_mutex);
init_completion(&ep->aux_comp);
init_completion(&ep->train_comp);
init_completion(&ep->idle_comp);
diff --git a/drivers/video/msm/mdss/mdss_fb.c b/drivers/video/msm/mdss/mdss_fb.c
index 77080e8..5905894 100644
--- a/drivers/video/msm/mdss/mdss_fb.c
+++ b/drivers/video/msm/mdss/mdss_fb.c
@@ -121,9 +121,13 @@
if (notify > NOTIFY_UPDATE_POWER_OFF)
return -EINVAL;
- if (notify == NOTIFY_UPDATE_START) {
+ if (mfd->update.is_suspend) {
+ to_user = NOTIFY_TYPE_SUSPEND;
+ mfd->update.is_suspend = 0;
+ ret = 1;
+ } else if (notify == NOTIFY_UPDATE_START) {
INIT_COMPLETION(mfd->update.comp);
- ret = wait_for_completion_interruptible_timeout(
+ ret = wait_for_completion_timeout(
&mfd->update.comp, 4 * HZ);
to_user = (unsigned int)mfd->update.value;
if (mfd->update.type == NOTIFY_TYPE_SUSPEND) {
@@ -132,13 +136,13 @@
}
} else if (notify == NOTIFY_UPDATE_STOP) {
INIT_COMPLETION(mfd->no_update.comp);
- ret = wait_for_completion_interruptible_timeout(
+ ret = wait_for_completion_timeout(
&mfd->no_update.comp, 4 * HZ);
to_user = (unsigned int)mfd->no_update.value;
} else {
if (mfd->panel_power_on) {
INIT_COMPLETION(mfd->power_off_comp);
- ret = wait_for_completion_interruptible_timeout(
+ ret = wait_for_completion_timeout(
&mfd->power_off_comp, 1 * HZ);
}
}
@@ -773,6 +777,7 @@
}
mutex_lock(&mfd->update.lock);
mfd->update.type = NOTIFY_TYPE_UPDATE;
+ mfd->update.is_suspend = 0;
mutex_unlock(&mfd->update.lock);
}
break;
@@ -787,7 +792,9 @@
mutex_lock(&mfd->update.lock);
mfd->update.type = NOTIFY_TYPE_SUSPEND;
+ mfd->update.is_suspend = 1;
mutex_unlock(&mfd->update.lock);
+ complete(&mfd->update.comp);
del_timer(&mfd->no_update.timer);
mfd->no_update.value = NOTIFY_TYPE_SUSPEND;
complete(&mfd->no_update.comp);
diff --git a/drivers/video/msm/mdss/mdss_fb.h b/drivers/video/msm/mdss/mdss_fb.h
index e796fc6..f9203c0 100644
--- a/drivers/video/msm/mdss/mdss_fb.h
+++ b/drivers/video/msm/mdss/mdss_fb.h
@@ -85,6 +85,7 @@
struct completion comp;
struct mutex lock;
int value;
+ int is_suspend;
};
struct msm_sync_pt_data {
diff --git a/drivers/video/msm/mdss/mdss_hdmi_cec.c b/drivers/video/msm/mdss/mdss_hdmi_cec.c
index 410f2b3..9d85070 100644
--- a/drivers/video/msm/mdss/mdss_hdmi_cec.c
+++ b/drivers/video/msm/mdss/mdss_hdmi_cec.c
@@ -366,7 +366,7 @@
DSS_REG_W(io, HDMI_CEC_CTRL, BIT(0) | BIT(1) |
((msg->frame_size & 0x1F) << 4) | BIT(9));
- if (!wait_for_completion_interruptible_timeout(
+ if (!wait_for_completion_timeout(
&cec_ctrl->cec_msg_wr_done, HZ)) {
DEV_ERR("%s: timedout", __func__);
hdmi_cec_dump_msg(cec_ctrl, msg);
diff --git a/drivers/video/msm/mdss/mdss_hdmi_hdcp.c b/drivers/video/msm/mdss/mdss_hdmi_hdcp.c
index 8ff9059..e56e9fa 100644
--- a/drivers/video/msm/mdss/mdss_hdmi_hdcp.c
+++ b/drivers/video/msm/mdss/mdss_hdmi_hdcp.c
@@ -520,7 +520,7 @@
/* Write R0' to HDCP registers and check to see if it is a match */
INIT_COMPLETION(hdcp_ctrl->r0_checked);
DSS_REG_W(io, HDMI_HDCP_RCVPORT_DATA2_0, (((u32)buf[1]) << 8) | buf[0]);
- timeout_count = wait_for_completion_interruptible_timeout(
+ timeout_count = wait_for_completion_timeout(
&hdcp_ctrl->r0_checked, HZ*2);
link0_status = DSS_REG_R(io, HDMI_HDCP_LINK0_STATUS);
is_match = link0_status & BIT(12);
diff --git a/drivers/video/msm/mdss/mdss_hdmi_tx.c b/drivers/video/msm/mdss/mdss_hdmi_tx.c
index 99f45ed..426855c 100644
--- a/drivers/video/msm/mdss/mdss_hdmi_tx.c
+++ b/drivers/video/msm/mdss/mdss_hdmi_tx.c
@@ -20,6 +20,7 @@
#include <linux/of_gpio.h>
#include <linux/of_platform.h>
#include <linux/types.h>
+#include <linux/msm_hdmi.h>
#include <mach/msm_hdmi_audio_codec.h>
#define REG_DUMP 0
@@ -133,6 +134,7 @@
};
struct dss_gpio ddc_gpio_config[] = {
+ {0, 1, COMPATIBLE_NAME "-ddc-mux-sel"},
{0, 1, COMPATIBLE_NAME "-ddc-clk"},
{0, 1, COMPATIBLE_NAME "-ddc-data"}
};
@@ -222,6 +224,77 @@
{20480, 247500} } },
};
+int register_hdmi_cable_notification(struct hdmi_cable_notify *handler)
+{
+ struct hdmi_tx_ctrl *hdmi_ctrl = NULL;
+ struct list_head *pos;
+
+ if (!hdmi_tx_hw.ptr) {
+ DEV_WARN("%s: HDMI Tx core not ready\n", __func__);
+ return -EPROBE_DEFER;
+ }
+
+ if (!handler) {
+ DEV_ERR("%s: Empty handler\n", __func__);
+ return -ENODEV;
+ }
+
+ hdmi_ctrl = (struct hdmi_tx_ctrl *) hdmi_tx_hw.ptr;
+
+ mutex_lock(&hdmi_ctrl->cable_notify_mutex);
+ handler->status = hdmi_ctrl->hpd_state;
+ list_for_each(pos, &hdmi_ctrl->cable_notify_handlers);
+ list_add_tail(&handler->link, pos);
+ mutex_unlock(&hdmi_ctrl->cable_notify_mutex);
+
+ return handler->status;
+} /* register_hdmi_cable_notification */
+
+int unregister_hdmi_cable_notification(struct hdmi_cable_notify *handler)
+{
+ struct hdmi_tx_ctrl *hdmi_ctrl = NULL;
+
+ if (!hdmi_tx_hw.ptr) {
+ DEV_WARN("%s: HDMI Tx core not ready\n", __func__);
+ return -ENODEV;
+ }
+
+ if (!handler) {
+ DEV_ERR("%s: Empty handler\n", __func__);
+ return -ENODEV;
+ }
+
+ hdmi_ctrl = (struct hdmi_tx_ctrl *) hdmi_tx_hw.ptr;
+
+ mutex_lock(&hdmi_ctrl->cable_notify_mutex);
+ list_del(&handler->link);
+ mutex_unlock(&hdmi_ctrl->cable_notify_mutex);
+
+ return 0;
+} /* unregister_hdmi_cable_notification */
+
+static void hdmi_tx_cable_notify_work(struct work_struct *work)
+{
+ struct hdmi_tx_ctrl *hdmi_ctrl = NULL;
+ struct hdmi_cable_notify *pos;
+
+ hdmi_ctrl = container_of(work, struct hdmi_tx_ctrl, cable_notify_work);
+
+ if (!hdmi_ctrl) {
+ DEV_ERR("%s: invalid hdmi data\n", __func__);
+ return;
+ }
+
+ mutex_lock(&hdmi_ctrl->cable_notify_mutex);
+ list_for_each_entry(pos, &hdmi_ctrl->cable_notify_handlers, link) {
+ if (pos->status != hdmi_ctrl->hpd_state) {
+ pos->status = hdmi_ctrl->hpd_state;
+ pos->hpd_notify(pos);
+ }
+ }
+ mutex_unlock(&hdmi_ctrl->cable_notify_mutex);
+} /* hdmi_tx_cable_notify_work */
+
static bool hdmi_tx_is_cea_format(int mode)
{
bool cea_fmt;
@@ -327,6 +400,9 @@
if (!hdmi_ctrl->pdata.primary && (hdmi_ctrl->sdev.state != val))
switch_set_state(&hdmi_ctrl->sdev, val);
+
+ /* Notify all registered modules of cable connection status */
+ schedule_work(&hdmi_ctrl->cable_notify_work);
} /* hdmi_tx_send_cable_notification */
static inline u32 hdmi_tx_is_dvi_mode(struct hdmi_tx_ctrl *hdmi_ctrl)
@@ -2536,7 +2612,7 @@
flush_work_sync(&hdmi_ctrl->power_off_work);
if (hdmi_ctrl->pdata.primary) {
- timeout = wait_for_completion_interruptible_timeout(
+ timeout = wait_for_completion_timeout(
&hdmi_ctrl->hpd_done, HZ);
if (!timeout) {
DEV_ERR("%s: cable connection hasn't happened yet\n",
@@ -2835,6 +2911,7 @@
if (hdmi_ctrl->workq)
destroy_workqueue(hdmi_ctrl->workq);
mutex_destroy(&hdmi_ctrl->lut_lock);
+ mutex_destroy(&hdmi_ctrl->cable_notify_mutex);
mutex_destroy(&hdmi_ctrl->mutex);
hdmi_tx_hw.ptr = NULL;
@@ -2864,6 +2941,10 @@
hdmi_setup_video_mode_lut();
mutex_init(&hdmi_ctrl->mutex);
mutex_init(&hdmi_ctrl->lut_lock);
+ mutex_init(&hdmi_ctrl->cable_notify_mutex);
+
+ INIT_LIST_HEAD(&hdmi_ctrl->cable_notify_handlers);
+
hdmi_ctrl->workq = create_workqueue("hdmi_tx_workq");
if (!hdmi_ctrl->workq) {
DEV_ERR("%s: hdmi_tx_workq creation failed.\n", __func__);
@@ -2881,8 +2962,9 @@
hdmi_ctrl->hpd_initialized = false;
hdmi_ctrl->hpd_off_pending = false;
init_completion(&hdmi_ctrl->hpd_done);
- INIT_WORK(&hdmi_ctrl->hpd_int_work, hdmi_tx_hpd_int_work);
+ INIT_WORK(&hdmi_ctrl->hpd_int_work, hdmi_tx_hpd_int_work);
+ INIT_WORK(&hdmi_ctrl->cable_notify_work, hdmi_tx_cable_notify_work);
INIT_WORK(&hdmi_ctrl->power_off_work, hdmi_tx_power_off_work);
spin_lock_init(&hdmi_ctrl->hpd_state_lock);
@@ -3003,7 +3085,7 @@
u32 timeout;
hdmi_ctrl->panel_suspend = false;
- timeout = wait_for_completion_interruptible_timeout(
+ timeout = wait_for_completion_timeout(
&hdmi_ctrl->hpd_done, HZ/10);
if (!timeout & !hdmi_ctrl->hpd_state) {
DEV_INFO("%s: cable removed during suspend\n",
diff --git a/drivers/video/msm/mdss/mdss_hdmi_tx.h b/drivers/video/msm/mdss/mdss_hdmi_tx.h
index 0787dee..8233ba8 100644
--- a/drivers/video/msm/mdss/mdss_hdmi_tx.h
+++ b/drivers/video/msm/mdss/mdss_hdmi_tx.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -55,6 +55,8 @@
struct mutex mutex;
struct mutex lut_lock;
+ struct mutex cable_notify_mutex;
+ struct list_head cable_notify_handlers;
struct kobject *kobj;
struct switch_dev sdev;
struct switch_dev audio_sdev;
@@ -78,6 +80,7 @@
struct work_struct hpd_int_work;
struct work_struct power_off_work;
+ struct work_struct cable_notify_work;
bool hdcp_feature_on;
u32 present_hdcp;
diff --git a/drivers/video/msm/mdss/mdss_hdmi_util.c b/drivers/video/msm/mdss/mdss_hdmi_util.c
index 711ec68..6f6c805 100644
--- a/drivers/video/msm/mdss/mdss_hdmi_util.c
+++ b/drivers/video/msm/mdss/mdss_hdmi_util.c
@@ -46,6 +46,7 @@
int hdmi_get_video_id_code(struct msm_hdmi_mode_timing_info *timing_in)
{
int i, vic = -1;
+ struct msm_hdmi_mode_timing_info *supported_timing;
if (!timing_in) {
DEV_ERR("%s: invalid input\n", __func__);
@@ -54,8 +55,7 @@
/* active_low_h, active_low_v and interlaced are not checked against */
for (i = 0; i < HDMI_VFRMT_MAX; i++) {
- struct msm_hdmi_mode_timing_info *supported_timing =
- &hdmi_supported_video_mode_lut[i];
+ supported_timing = &hdmi_supported_video_mode_lut[i];
if (!supported_timing->supported)
continue;
@@ -84,8 +84,24 @@
break;
}
- if (vic < 0)
- DEV_ERR("%s: timing asked is not yet supported\n", __func__);
+ if (vic < 0) {
+ for (i = 0; i < HDMI_VFRMT_MAX; i++) {
+ supported_timing = &hdmi_supported_video_mode_lut[i];
+ if (!supported_timing->supported)
+ continue;
+ if (timing_in->active_h != supported_timing->active_h)
+ continue;
+ if (timing_in->active_v != supported_timing->active_v)
+ continue;
+ vic = (int)supported_timing->video_format;
+ break;
+ }
+ }
+
+ if (vic < 0) {
+ DEV_ERR("%s: timing is not supported h=%d v=%d\n",
+ __func__, timing_in->active_h, timing_in->active_v);
+ }
exit:
DEV_DBG("%s: vic = %d timing = %s\n", __func__, vic,
@@ -296,7 +312,7 @@
INIT_COMPLETION(ddc_ctrl->ddc_sw_done);
DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_CTRL, BIT(0) | BIT(20));
- time_out_count = wait_for_completion_interruptible_timeout(
+ time_out_count = wait_for_completion_timeout(
&ddc_ctrl->ddc_sw_done, HZ/2);
DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_INT_CTRL, BIT(1));
if (!time_out_count) {
@@ -547,7 +563,7 @@
INIT_COMPLETION(ddc_ctrl->ddc_sw_done);
DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_CTRL, BIT(0) | BIT(21));
- time_out_count = wait_for_completion_interruptible_timeout(
+ time_out_count = wait_for_completion_timeout(
&ddc_ctrl->ddc_sw_done, HZ/2);
reg_val = DSS_REG_R(ddc_ctrl->io, HDMI_DDC_INT_CTRL);
@@ -721,7 +737,7 @@
INIT_COMPLETION(ddc_ctrl->ddc_sw_done);
DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_CTRL, BIT(0) | BIT(20));
- time_out_count = wait_for_completion_interruptible_timeout(
+ time_out_count = wait_for_completion_timeout(
&ddc_ctrl->ddc_sw_done, HZ/2);
reg_val = DSS_REG_R(ddc_ctrl->io, HDMI_DDC_INT_CTRL);
diff --git a/drivers/video/msm/mdss/mdss_mdp.c b/drivers/video/msm/mdss/mdss_mdp.c
index 131744c..a42aa87 100644
--- a/drivers/video/msm/mdss/mdss_mdp.c
+++ b/drivers/video/msm/mdss/mdss_mdp.c
@@ -80,6 +80,7 @@
static DEFINE_SPINLOCK(mdp_lock);
static DEFINE_MUTEX(mdp_clk_lock);
static DEFINE_MUTEX(bus_bw_lock);
+static DEFINE_MUTEX(mdp_iommu_lock);
#define MDP_BUS_VECTOR_ENTRY(ab_val, ib_val) \
{ \
@@ -654,6 +655,8 @@
pm_runtime_get_sync(&mdata->pdev->dev);
msm_bus_scale_client_update_request(
mdata->bus_hdl, mdata->current_bus_idx);
+ if (!mdata->handoff_pending)
+ mdss_iommu_attach(mdata);
}
}
@@ -784,8 +787,10 @@
struct mdss_iommu_map_type *iomap;
int i;
+ mutex_lock(&mdp_iommu_lock);
if (mdata->iommu_attached) {
pr_debug("mdp iommu already attached\n");
+ mutex_unlock(&mdp_iommu_lock);
return 0;
}
@@ -802,6 +807,7 @@
}
mdata->iommu_attached = true;
+ mutex_unlock(&mdp_iommu_lock);
return 0;
}
@@ -812,8 +818,10 @@
struct mdss_iommu_map_type *iomap;
int i;
+ mutex_lock(&mdp_iommu_lock);
if (!mdata->iommu_attached) {
pr_debug("mdp iommu already dettached\n");
+ mutex_unlock(&mdp_iommu_lock);
return 0;
}
@@ -830,6 +838,7 @@
}
mdata->iommu_attached = false;
+ mutex_unlock(&mdp_iommu_lock);
return 0;
}
@@ -906,7 +915,8 @@
int i, total = 0;
for (i = 0; i < mdata->nctl; i++)
- total += mdss_debug_stat_ctl_dump(mdata->ctl_off + i, buf, len);
+ total += mdss_debug_stat_ctl_dump(mdata->ctl_off + i,
+ buf + total, len - total);
total += scnprintf(buf + total, len - total, "\n");
@@ -1047,11 +1057,13 @@
if (mdata != NULL) {
if (on) {
pr_debug("Enable MDP FS for splash.\n");
+ mdata->handoff_pending = true;
regulator_enable(mdata->fs);
mdss_hw_init(mdata);
} else {
pr_debug("Disable MDP FS for splash.\n");
regulator_disable(mdata->fs);
+ mdata->handoff_pending = false;
}
} else {
pr_warn("mdss mdata not initialized\n");
@@ -1136,6 +1148,7 @@
mdata->pdev = pdev;
platform_set_drvdata(pdev, mdata);
mdss_res = mdata;
+ mutex_init(&mdata->reg_lock);
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mdp_phys");
if (!res) {
@@ -1234,6 +1247,7 @@
if (IS_ERR_VALUE(rc)) {
mdss_mdp_hw.ptr = NULL;
mdss_mdp_pp_term(&pdev->dev);
+ mutex_destroy(&mdata->reg_lock);
mdss_res = NULL;
}
@@ -1552,8 +1566,8 @@
{
u32 npipes, dma_off;
int rc = 0;
- u32 nids = 0, setup_cnt = 0, len;
- u32 *offsets = NULL, *ftch_id = NULL;
+ u32 nfids = 0, setup_cnt = 0, len, nxids = 0;
+ u32 *offsets = NULL, *ftch_id = NULL, *xin_id = NULL;
struct mdss_data_type *mdata = platform_get_drvdata(pdev);
@@ -1564,33 +1578,47 @@
mdata->ndma_pipes = mdss_mdp_parse_dt_prop_len(pdev,
"qcom,mdss-pipe-dma-off");
- nids += mdss_mdp_parse_dt_prop_len(pdev,
- "qcom,mdss-pipe-vig-fetch-id");
- nids += mdss_mdp_parse_dt_prop_len(pdev,
- "qcom,mdss-pipe-rgb-fetch-id");
- nids += mdss_mdp_parse_dt_prop_len(pdev,
- "qcom,mdss-pipe-dma-fetch-id");
-
npipes = mdata->nvig_pipes + mdata->nrgb_pipes + mdata->ndma_pipes;
- if (npipes != nids) {
+ nfids += mdss_mdp_parse_dt_prop_len(pdev,
+ "qcom,mdss-pipe-vig-fetch-id");
+ nfids += mdss_mdp_parse_dt_prop_len(pdev,
+ "qcom,mdss-pipe-rgb-fetch-id");
+ nfids += mdss_mdp_parse_dt_prop_len(pdev,
+ "qcom,mdss-pipe-dma-fetch-id");
+ if (npipes != nfids) {
pr_err("device tree err: unequal number of pipes and smp ids");
return -EINVAL;
}
+ nxids += mdss_mdp_parse_dt_prop_len(pdev, "qcom,mdss-pipe-vig-xin-id");
+ nxids += mdss_mdp_parse_dt_prop_len(pdev, "qcom,mdss-pipe-rgb-xin-id");
+ nxids += mdss_mdp_parse_dt_prop_len(pdev, "qcom,mdss-pipe-dma-xin-id");
+ if (npipes != nxids) {
+ pr_err("device tree err: unequal number of pipes and xin ids");
+ return -EINVAL;
+ }
+
offsets = kzalloc(sizeof(u32) * npipes, GFP_KERNEL);
if (!offsets) {
pr_err("no mem assigned for offsets: kzalloc fail\n");
return -ENOMEM;
}
- ftch_id = kzalloc(sizeof(u32) * nids, GFP_KERNEL);
+ ftch_id = kzalloc(sizeof(u32) * nfids, GFP_KERNEL);
if (!ftch_id) {
pr_err("no mem assigned for ftch_id: kzalloc fail\n");
rc = -ENOMEM;
goto ftch_alloc_fail;
}
+ xin_id = kzalloc(sizeof(u32) * nxids, GFP_KERNEL);
+ if (!xin_id) {
+ pr_err("no mem assigned for xin_id: kzalloc fail\n");
+ rc = -ENOMEM;
+ goto xin_alloc_fail;
+ }
+
mdata->vig_pipes = devm_kzalloc(&mdata->pdev->dev,
sizeof(struct mdss_mdp_pipe) * mdata->nvig_pipes, GFP_KERNEL);
if (!mdata->vig_pipes) {
@@ -1618,7 +1646,12 @@
rc = mdss_mdp_parse_dt_handler(pdev, "qcom,mdss-pipe-vig-fetch-id",
ftch_id, mdata->nvig_pipes);
if (rc)
- goto parse_done;
+ goto parse_fail;
+
+ rc = mdss_mdp_parse_dt_handler(pdev, "qcom,mdss-pipe-vig-xin-id",
+ xin_id, mdata->nvig_pipes);
+ if (rc)
+ goto parse_fail;
rc = mdss_mdp_parse_dt_handler(pdev, "qcom,mdss-pipe-vig-off",
offsets, mdata->nvig_pipes);
@@ -1627,7 +1660,7 @@
len = min_t(int, DEFAULT_TOTAL_VIG_PIPES, (int)mdata->nvig_pipes);
rc = mdss_mdp_pipe_addr_setup(mdata, mdata->vig_pipes, offsets, ftch_id,
- MDSS_MDP_PIPE_TYPE_VIG, MDSS_MDP_SSPP_VIG0, len);
+ xin_id, MDSS_MDP_PIPE_TYPE_VIG, MDSS_MDP_SSPP_VIG0, len);
if (rc)
goto parse_fail;
@@ -1638,6 +1671,11 @@
if (rc)
goto parse_fail;
+ rc = mdss_mdp_parse_dt_handler(pdev, "qcom,mdss-pipe-rgb-xin-id",
+ xin_id + mdata->nvig_pipes, mdata->nrgb_pipes);
+ if (rc)
+ goto parse_fail;
+
rc = mdss_mdp_parse_dt_handler(pdev, "qcom,mdss-pipe-rgb-off",
offsets + mdata->nvig_pipes, mdata->nrgb_pipes);
if (rc)
@@ -1646,7 +1684,8 @@
len = min_t(int, DEFAULT_TOTAL_RGB_PIPES, (int)mdata->nrgb_pipes);
rc = mdss_mdp_pipe_addr_setup(mdata, mdata->rgb_pipes,
offsets + mdata->nvig_pipes, ftch_id + mdata->nvig_pipes,
- MDSS_MDP_PIPE_TYPE_RGB, MDSS_MDP_SSPP_RGB0, len);
+ xin_id + mdata->nvig_pipes, MDSS_MDP_PIPE_TYPE_RGB,
+ MDSS_MDP_SSPP_RGB0, len);
if (rc)
goto parse_fail;
@@ -1658,6 +1697,11 @@
if (rc)
goto parse_fail;
+ rc = mdss_mdp_parse_dt_handler(pdev, "qcom,mdss-pipe-dma-xin-id",
+ xin_id + dma_off, mdata->ndma_pipes);
+ if (rc)
+ goto parse_fail;
+
rc = mdss_mdp_parse_dt_handler(pdev, "qcom,mdss-pipe-dma-off",
offsets + dma_off, mdata->ndma_pipes);
if (rc)
@@ -1665,8 +1709,8 @@
len = mdata->ndma_pipes;
rc = mdss_mdp_pipe_addr_setup(mdata, mdata->dma_pipes,
- offsets + dma_off, ftch_id + dma_off, MDSS_MDP_PIPE_TYPE_DMA,
- MDSS_MDP_SSPP_DMA0, len);
+ offsets + dma_off, ftch_id + dma_off, xin_id + dma_off,
+ MDSS_MDP_PIPE_TYPE_DMA, MDSS_MDP_SSPP_DMA0, len);
if (rc)
goto parse_fail;
@@ -1677,6 +1721,7 @@
mdata->vig_pipes + DEFAULT_TOTAL_VIG_PIPES,
offsets + DEFAULT_TOTAL_VIG_PIPES,
ftch_id + DEFAULT_TOTAL_VIG_PIPES,
+ xin_id + DEFAULT_TOTAL_VIG_PIPES,
MDSS_MDP_PIPE_TYPE_VIG, setup_cnt,
mdata->nvig_pipes - DEFAULT_TOTAL_VIG_PIPES);
if (rc)
@@ -1690,6 +1735,7 @@
mdata->rgb_pipes + DEFAULT_TOTAL_RGB_PIPES,
offsets + mdata->nvig_pipes + DEFAULT_TOTAL_RGB_PIPES,
ftch_id + mdata->nvig_pipes + DEFAULT_TOTAL_RGB_PIPES,
+ xin_id + mdata->nvig_pipes + DEFAULT_TOTAL_RGB_PIPES,
MDSS_MDP_PIPE_TYPE_RGB, setup_cnt,
mdata->nrgb_pipes - DEFAULT_TOTAL_RGB_PIPES);
if (rc)
@@ -1708,6 +1754,8 @@
kfree(mdata->vig_pipes);
parse_done:
vig_alloc_fail:
+ kfree(xin_id);
+xin_alloc_fail:
kfree(ftch_id);
ftch_alloc_fail:
kfree(offsets);
diff --git a/drivers/video/msm/mdss/mdss_mdp.h b/drivers/video/msm/mdss/mdss_mdp.h
index 8918df8..1c4efb4 100644
--- a/drivers/video/msm/mdss/mdss_mdp.h
+++ b/drivers/video/msm/mdss/mdss_mdp.h
@@ -32,7 +32,7 @@
#define MDP_CLK_DEFAULT_RATE 200000000
#define PHASE_STEP_SHIFT 21
#define MAX_MIXER_WIDTH 2048
-#define MAX_MIXER_HEIGHT 2400
+#define MAX_MIXER_HEIGHT 0xFFFF
#define MAX_IMG_WIDTH 0x3FFF
#define MAX_IMG_HEIGHT 0x3FFF
#define MAX_DST_W MAX_MIXER_WIDTH
@@ -344,6 +344,7 @@
u32 ndx;
char __iomem *base;
u32 ftch_id;
+ u32 xin_id;
atomic_t ref_cnt;
u32 play_cnt;
int pid;
@@ -368,7 +369,6 @@
u8 overfetch_disable;
u32 transp;
u32 bg_color;
- u8 has_buf;
struct msm_fb_data_type *mfd;
struct mdss_mdp_mixer *mixer;
@@ -603,8 +603,8 @@
void mdss_mdp_smp_release(struct mdss_mdp_pipe *pipe);
int mdss_mdp_pipe_addr_setup(struct mdss_data_type *mdata,
- struct mdss_mdp_pipe *head, u32 *offsets, u32 *ftch_y_id, u32 type,
- u32 num_base, u32 len);
+ struct mdss_mdp_pipe *head, u32 *offsets, u32 *ftch_y_id, u32 *xin_id,
+ u32 type, u32 num_base, u32 len);
int mdss_mdp_mixer_addr_setup(struct mdss_data_type *mdata, u32 *mixer_offsets,
u32 *dspp_offsets, u32 *pingpong_offsets, u32 type, u32 len);
int mdss_mdp_ctl_addr_setup(struct mdss_data_type *mdata, u32 *ctl_offsets,
@@ -613,6 +613,7 @@
int mdss_mdp_pipe_destroy(struct mdss_mdp_pipe *pipe);
int mdss_mdp_pipe_queue_data(struct mdss_mdp_pipe *pipe,
struct mdss_mdp_data *src_data);
+int mdss_mdp_pipe_fetch_halt(struct mdss_mdp_pipe *pipe);
int mdss_mdp_data_check(struct mdss_mdp_data *data,
struct mdss_mdp_plane_sizes *ps);
diff --git a/drivers/video/msm/mdss/mdss_mdp_ctl.c b/drivers/video/msm/mdss/mdss_mdp_ctl.c
index d57e4fb..db67773 100644
--- a/drivers/video/msm/mdss/mdss_mdp_ctl.c
+++ b/drivers/video/msm/mdss/mdss_mdp_ctl.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1459,6 +1459,8 @@
if (mixer->num == MDSS_MDP_INTF_LAYERMIXER3)
ctl->flush_bits |= BIT(20);
+ else if (mixer->type == MDSS_MDP_MIXER_TYPE_WRITEBACK)
+ ctl->flush_bits |= BIT(9) << mixer->num;
else
ctl->flush_bits |= BIT(6) << mixer->num;
diff --git a/drivers/video/msm/mdss/mdss_mdp_hwio.h b/drivers/video/msm/mdss/mdss_mdp_hwio.h
index e4f1e39..9948738 100644
--- a/drivers/video/msm/mdss/mdss_mdp_hwio.h
+++ b/drivers/video/msm/mdss/mdss_mdp_hwio.h
@@ -438,6 +438,7 @@
#define MDSS_MDP_REG_DSPP_HIST_CTL_BASE 0x210
#define MDSS_MDP_REG_DSPP_HIST_LUT_BASE 0x230
#define MDSS_MDP_REG_DSPP_PA_BASE 0x238
+#define MDSS_MDP_REG_DSPP_SIX_ZONE_BASE 0x248
#define MDSS_MDP_REG_DSPP_GAMUT_BASE 0x2DC
#define MDSS_MDP_REG_DSPP_GC_BASE 0x2B0
@@ -579,4 +580,8 @@
#define MDSS_MDP_LP_MISR_SEL_LMIX4_BLEND 0x10
#define MDSS_MDP_LP_MISR_SEL_LMIX4_GC 0x11
+/* following offsets are with respect to MDP VBIF base */
+#define MMSS_VBIF_XIN_HALT_CTRL0 0x200
+#define MMSS_VBIF_XIN_HALT_CTRL1 0x204
+
#endif
diff --git a/drivers/video/msm/mdss/mdss_mdp_intf_cmd.c b/drivers/video/msm/mdss/mdss_mdp_intf_cmd.c
index c4a0645..ae45587 100644
--- a/drivers/video/msm/mdss/mdss_mdp_intf_cmd.c
+++ b/drivers/video/msm/mdss/mdss_mdp_intf_cmd.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -427,9 +427,6 @@
pdata->panel_info.cont_splash_enabled = 0;
- ret = mdss_mdp_ctl_intf_event(ctl, MDSS_EVENT_CONT_SPLASH_FINISH,
- NULL);
-
mdss_mdp_ctl_intf_event(ctl, MDSS_EVENT_PANEL_CLK_CTRL, (void *)0);
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
diff --git a/drivers/video/msm/mdss/mdss_mdp_overlay.c b/drivers/video/msm/mdss/mdss_mdp_overlay.c
index 572af1c..2ba231d 100644
--- a/drivers/video/msm/mdss/mdss_mdp_overlay.c
+++ b/drivers/video/msm/mdss/mdss_mdp_overlay.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -292,7 +292,10 @@
memset(&pipe->scale, 0, sizeof(struct mdp_scale_data));
rc = mdss_mdp_calc_phase_step(src, pipe->dst.w,
&pipe->scale.phase_step_x[0]);
- if (rc) {
+ if (rc == -EOVERFLOW) {
+ /* overflow on horizontal direction is acceptable */
+ rc = 0;
+ } else if (rc) {
pr_err("Horizontal scaling calculation failed=%d! %d->%d\n",
rc, src, pipe->dst.w);
return rc;
@@ -301,7 +304,11 @@
src = pipe->src.h >> pipe->vert_deci;
rc = mdss_mdp_calc_phase_step(src, pipe->dst.h,
&pipe->scale.phase_step_y[0]);
- if (rc) {
+
+ if ((rc == -EOVERFLOW) && (pipe->type == MDSS_MDP_PIPE_TYPE_VIG)) {
+ /* overflow on Qseed2 scaler is acceptable */
+ rc = 0;
+ } else if (rc) {
pr_err("Vertical scaling calculation failed=%d! %d->%d\n",
rc, src, pipe->dst.h);
return rc;
@@ -310,7 +317,7 @@
(1 << PHASE_STEP_SHIFT)) / 2;
pipe->scale.init_phase_y[0] = (pipe->scale.phase_step_y[0] -
(1 << PHASE_STEP_SHIFT)) / 2;
- return 0;
+ return rc;
}
static inline void __mdss_mdp_overlay_set_chroma_sample(
@@ -591,12 +598,6 @@
!mdp5_data->mdata->has_wfd_blk)
mdss_mdp_smp_release(pipe);
- /*
- * Clear previous SMP reservations and reserve according to the
- * latest configuration
- */
- mdss_mdp_smp_unreserve(pipe);
-
ret = mdss_mdp_smp_reserve(pipe);
if (ret) {
pr_debug("mdss_mdp_smp_reserve failed. ret=%d\n", ret);
@@ -604,7 +605,6 @@
}
pipe->params_changed++;
- pipe->has_buf = 0;
req->vert_deci = pipe->vert_deci;
@@ -762,6 +762,7 @@
list_for_each_entry_safe(pipe, tmp, &mdp5_data->pipes_cleanup,
cleanup_list) {
list_move(&pipe->cleanup_list, &destroy_pipes);
+ mdss_mdp_pipe_fetch_halt(pipe);
mdss_mdp_overlay_free_buf(&pipe->back_buf);
__mdss_mdp_overlay_free_list_add(mfd, &pipe->front_buf);
pipe->mfd = NULL;
@@ -835,8 +836,7 @@
if (ctl->power_on) {
if (!mdp5_data->mdata->batfet)
mdss_mdp_batfet_ctrl(mdp5_data->mdata, true);
- if (!is_mdss_iommu_attached() &&
- !mfd->panel_info->cont_splash_enabled)
+ if (!mfd->panel_info->cont_splash_enabled)
mdss_iommu_attach(mdp5_data->mdata);
return 0;
}
@@ -956,9 +956,6 @@
int ret = 0;
int sd_in_pipe = 0;
- if (!is_mdss_iommu_attached() && !mfd->panel_info->cont_splash_enabled)
- mdss_iommu_attach(mdp5_data->mdata);
-
if (ctl->shared_lock)
mutex_lock(ctl->shared_lock);
@@ -1258,9 +1255,15 @@
pr_debug("ov queue pnum=%d\n", pipe->num);
+ if (pipe->flags & MDP_SOLID_FILL)
+ pr_warn("Unexpected buffer queue to a solid fill pipe\n");
+
flags = (pipe->flags & MDP_SECURE_OVERLAY_SESSION);
flags |= (pipe->flags & MDP_SECURE_DISPLAY_OVERLAY_SESSION);
+ if (!mfd->panel_info->cont_splash_enabled)
+ mdss_iommu_attach(mdata);
+
src_data = &pipe->back_buf;
if (src_data->num_planes) {
pr_warn("dropped buffer pnum=%d play=%d addr=0x%x\n",
@@ -1272,7 +1275,6 @@
if (IS_ERR_VALUE(ret)) {
pr_err("src_data pmem error\n");
}
- pipe->has_buf = 1;
mdss_mdp_pipe_unmap(pipe);
return ret;
@@ -1544,7 +1546,6 @@
else
buf->p[0].len = fbi->fix.smem_len - offset;
buf->num_planes = 1;
- pipe->has_buf = 1;
mdss_mdp_pipe_unmap(pipe);
if (fbi->var.xres > MAX_MIXER_WIDTH || mfd->split_display) {
@@ -1562,7 +1563,6 @@
pipe_ndx[1] = pipe->ndx;
pipe->back_buf = *buf;
- pipe->has_buf = 1;
mdss_mdp_pipe_unmap(pipe);
}
mutex_unlock(&mdp5_data->ov_lock);
@@ -2544,8 +2544,8 @@
* increasing ref_cnt to help balance clocks once done.
*/
if (pdata->panel_info.cont_splash_enabled) {
- mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
mdss_mdp_footswitch_ctrl_splash(1);
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
}
return 0;
}
diff --git a/drivers/video/msm/mdss/mdss_mdp_pipe.c b/drivers/video/msm/mdss/mdss_mdp_pipe.c
index 0abd4d5..b7553a9 100644
--- a/drivers/video/msm/mdss/mdss_mdp_pipe.c
+++ b/drivers/video/msm/mdss/mdss_mdp_pipe.c
@@ -15,6 +15,7 @@
#include <linux/bitmap.h>
#include <linux/errno.h>
+#include <linux/iopoll.h>
#include <linux/mutex.h>
#include "mdss_mdp.h"
@@ -25,10 +26,14 @@
#define SMP_MB_ENTRY_SIZE 16
#define MAX_BPP 4
+#define PIPE_HALT_TIMEOUT_US 0x4000
+
static DEFINE_MUTEX(mdss_mdp_sspp_lock);
static DEFINE_MUTEX(mdss_mdp_smp_lock);
static int mdss_mdp_pipe_free(struct mdss_mdp_pipe *pipe);
+static int mdss_mdp_smp_mmb_set(int client_id, unsigned long *smp);
+static void mdss_mdp_smp_mmb_free(unsigned long *smp, bool write);
static struct mdss_mdp_pipe *mdss_mdp_pipe_search_by_client_id(
struct mdss_data_type *mdata, int client_id);
@@ -55,8 +60,27 @@
else
n -= fixed_cnt;
- /* reserve more blocks if needed, but can't free mmb at this point */
- for (i = bitmap_weight(smp_map->allocated, SMP_MB_CNT); i < n; i++) {
+ i = bitmap_weight(smp_map->allocated, SMP_MB_CNT);
+
+ /*
+ * SMP programming is not double buffered. Fail the request,
+ * that calls for change in smp configuration (addition/removal
+ * of smp blocks), so that fallback solution happens.
+ */
+ if (i != 0 && n != i) {
+ pr_debug("Can't change mmb config, num_blks: %d alloc: %d\n",
+ n, i);
+ return 0;
+ }
+
+ /*
+ * Clear previous SMP reservations and reserve according to the
+ * latest configuration
+ */
+ mdss_mdp_smp_mmb_free(smp_map->reserved, false);
+
+ /* Reserve mmb blocks*/
+ for (; i < n; i++) {
if (bitmap_full(mdata->mmb_alloc_map, SMP_MB_CNT))
break;
@@ -176,6 +200,31 @@
pipe->src_fmt, &ps);
if (rc)
return rc;
+ /*
+ * Override fetch strides with SMP buffer size for both the
+ * planes
+ */
+ if (pipe->src_fmt->fetch_planes == MDSS_MDP_PLANE_INTERLEAVED) {
+ /*
+ * BWC line buffer needs to be divided into 16
+ * segments and every segment is aligned to format
+ * specific RAU size
+ */
+ ps.ystride[0] = ALIGN(pipe->src.w / 16 , 32) * 16 *
+ ps.rau_h[0] * pipe->src_fmt->bpp;
+ ps.ystride[1] = 0;
+ } else {
+ u32 bwc_width = ALIGN(pipe->src.w / 16, 64) * 16;
+ ps.ystride[0] = bwc_width * ps.rau_h[0];
+ ps.ystride[1] = bwc_width * ps.rau_h[1];
+ /*
+ * Since chroma for H1V2 is not subsampled it needs
+ * to be accounted for with bpp factor
+ */
+ if (pipe->src_fmt->chroma_sample ==
+ MDSS_MDP_CHROMA_H1V2)
+ ps.ystride[1] *= 2;
+ }
pr_debug("BWC SMP strides ystride0=%x ystride1=%x\n",
ps.ystride[0], ps.ystride[1]);
} else {
@@ -224,6 +273,15 @@
nlines = pipe->bwc_mode ? 1 : 2;
mutex_lock(&mdss_mdp_smp_lock);
+ for (i = (MAX_PLANES - 1); i >= ps.num_planes; i--) {
+ if (bitmap_weight(pipe->smp_map[i].allocated, SMP_MB_CNT)) {
+ pr_debug("Extra mmb identified for pnum=%d plane=%d\n",
+ pipe->num, i);
+ mutex_unlock(&mdss_mdp_smp_lock);
+ return -EAGAIN;
+ }
+ }
+
for (i = 0; i < ps.num_planes; i++) {
if (rot_mode) {
num_blks = 1;
@@ -460,6 +518,13 @@
pipe = NULL;
}
+ if (pipe && mdss_mdp_pipe_fetch_halt(pipe)) {
+ pr_err("%d failed because vbif client is in bad state\n",
+ pipe->num);
+ atomic_dec(&pipe->ref_cnt);
+ return NULL;
+ }
+
if (pipe) {
pr_debug("type=%x pnum=%d\n", pipe->type, pipe->num);
mutex_init(&pipe->pp_res.hist.hist_mutex);
@@ -470,7 +535,7 @@
* shared as long as its attached to a writeback mixer
*/
pipe = mdata->dma_pipes + mixer->num;
- mdss_mdp_pipe_map(pipe);
+ atomic_inc(&pipe->ref_cnt);
pr_debug("pipe sharing for pipe=%d\n", pipe->num);
} else {
pr_err("no %d type pipes available\n", type);
@@ -589,6 +654,7 @@
mdss_mdp_smp_free(pipe);
pipe->flags = 0;
pipe->bwc_mode = 0;
+ pipe->mfd = NULL;
memset(&pipe->scale, 0, sizeof(struct mdp_scale_data));
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
@@ -596,6 +662,64 @@
return 0;
}
+/**
+ * mdss_mdp_pipe_fetch_halt() - Halt VBIF client corresponding to specified pipe
+ * @pipe: pointer to the pipe data structure which needs to be halted.
+ *
+ * Check if VBIF client corresponding to specified pipe is idle or not. If not
+ * send a halt request for the client in question and wait for it be idle.
+ *
+ * This function would typically be called after pipe is unstaged or before it
+ * is initialized. On success it should be assumed that pipe is in idle state
+ * and would not fetch any more data. This function cannot be called from
+ * interrupt context.
+ */
+int mdss_mdp_pipe_fetch_halt(struct mdss_mdp_pipe *pipe)
+{
+ bool is_idle;
+ int rc = 0;
+ u32 reg_val, idle_mask, status;
+ struct mdss_data_type *mdata = mdss_mdp_get_mdata();
+
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
+
+ idle_mask = BIT(pipe->xin_id + 16);
+ reg_val = readl_relaxed(mdata->vbif_base + MMSS_VBIF_XIN_HALT_CTRL1);
+
+ is_idle = (reg_val & idle_mask) ? true : false;
+ if (!is_idle) {
+ pr_debug("%pS: pipe%d is not idle. xin_id=%d halt_ctrl1=0x%x\n",
+ __builtin_return_address(0), pipe->num, pipe->xin_id,
+ reg_val);
+
+ mutex_lock(&mdata->reg_lock);
+ reg_val = readl_relaxed(mdata->vbif_base +
+ MMSS_VBIF_XIN_HALT_CTRL0);
+ writel_relaxed(reg_val | BIT(pipe->xin_id),
+ mdata->vbif_base + MMSS_VBIF_XIN_HALT_CTRL0);
+ mutex_unlock(&mdata->reg_lock);
+
+ rc = readl_poll_timeout(mdata->vbif_base +
+ MMSS_VBIF_XIN_HALT_CTRL1, status, (status & idle_mask),
+ 1000, PIPE_HALT_TIMEOUT_US);
+ if (rc == -ETIMEDOUT)
+ pr_err("VBIF client %d not halting. TIMEDOUT.\n",
+ pipe->xin_id);
+ else
+ pr_debug("VBIF client %d is halted\n", pipe->xin_id);
+
+ mutex_lock(&mdata->reg_lock);
+ reg_val = readl_relaxed(mdata->vbif_base +
+ MMSS_VBIF_XIN_HALT_CTRL0);
+ writel_relaxed(reg_val & ~BIT(pipe->xin_id),
+ mdata->vbif_base + MMSS_VBIF_XIN_HALT_CTRL0);
+ mutex_unlock(&mdata->reg_lock);
+ }
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
+
+ return rc;
+}
+
int mdss_mdp_pipe_destroy(struct mdss_mdp_pipe *pipe)
{
int tmp;
@@ -853,8 +977,8 @@
}
int mdss_mdp_pipe_addr_setup(struct mdss_data_type *mdata,
- struct mdss_mdp_pipe *head, u32 *offsets, u32 *ftch_id, u32 type,
- u32 num_base, u32 len)
+ struct mdss_mdp_pipe *head, u32 *offsets, u32 *ftch_id, u32 *xin_id,
+ u32 type, u32 num_base, u32 len)
{
u32 i;
@@ -866,6 +990,7 @@
for (i = 0; i < len; i++) {
head[i].type = type;
head[i].ftch_id = ftch_id[i];
+ head[i].xin_id = xin_id[i];
head[i].num = i + num_base;
head[i].ndx = BIT(i + num_base);
head[i].base = mdata->mdp_base + offsets[i];
@@ -972,7 +1097,7 @@
(pipe->mixer->type == MDSS_MDP_MIXER_TYPE_WRITEBACK)
&& (ctl->mdata->mixer_switched)) ||
ctl->roi_changed;
- if (src_data == NULL || !pipe->has_buf) {
+ if (src_data == NULL || (pipe->flags & MDP_SOLID_FILL)) {
pipe->params_changed = 0;
mdss_mdp_pipe_solidfill_setup(pipe);
goto update_nobuf;
diff --git a/drivers/video/msm/mdss/mdss_mdp_pp.c b/drivers/video/msm/mdss/mdss_mdp_pp.c
index cbfe344..9b6d130 100644
--- a/drivers/video/msm/mdss/mdss_mdp_pp.c
+++ b/drivers/video/msm/mdss/mdss_mdp_pp.c
@@ -174,10 +174,13 @@
GAMUT_T5_SIZE + GAMUT_T6_SIZE + GAMUT_T7_SIZE)
#define MDSS_MDP_PA_SIZE 0xC
+#define MDSS_MDP_SIX_ZONE_SIZE 0xC
+#define MDSS_MDP_MEM_COL_SIZE 0x3C
#define MDSS_MDP_GC_SIZE 0x28
#define MDSS_MDP_PCC_SIZE 0xB8
#define MDSS_MDP_GAMUT_SIZE 0x5C
-#define MDSS_MDP_IGC_DSPP_COLORS 0x3
+#define MDSS_MDP_IGC_DSPP_SIZE 0x28
+#define MDSS_MDP_IGC_SSPP_SIZE 0x88
#define TOTAL_BLEND_STAGES 0x4
#define PP_FLAGS_DIRTY_PA 0x1
@@ -2372,7 +2375,7 @@
{
int i, start_idx, idx;
- start_idx = (readl_relaxed(addr) >> 16) & 0xF;
+ start_idx = ((readl_relaxed(addr) >> 16) & 0xF) + 1;
for (i = start_idx; i < GC_LUT_SEGMENTS; i++) {
idx = min((uint8_t)i, (uint8_t)(num_stages-1));
writel_relaxed(lut_data[idx].x_start, addr);
@@ -2382,7 +2385,7 @@
writel_relaxed(lut_data[idx].x_start, addr);
}
addr += 4;
- start_idx = (readl_relaxed(addr) >> 16) & 0xF;
+ start_idx = ((readl_relaxed(addr) >> 16) & 0xF) + 1;
for (i = start_idx; i < GC_LUT_SEGMENTS; i++) {
idx = min((uint8_t)i, (uint8_t)(num_stages-1));
writel_relaxed(lut_data[idx].slope, addr);
@@ -2392,7 +2395,7 @@
writel_relaxed(lut_data[idx].slope, addr);
}
addr += 4;
- start_idx = (readl_relaxed(addr) >> 16) & 0xF;
+ start_idx = ((readl_relaxed(addr) >> 16) & 0xF) + 1;
for (i = start_idx; i < GC_LUT_SEGMENTS; i++) {
idx = min((uint8_t)i, (uint8_t)(num_stages-1));
writel_relaxed(lut_data[idx].offset, addr);
@@ -2506,15 +2509,17 @@
argc_addr = mdss_mdp_get_mixer_addr_off(dspp_num) +
MDSS_MDP_REG_LM_GC_LUT_BASE;
pgc_ptr = &mdss_pp_res->argc_disp_cfg[disp_num];
- mdss_pp_res->pp_disp_flags[disp_num] |=
- PP_FLAGS_DIRTY_ARGC;
+ if (config->flags & MDP_PP_OPS_WRITE)
+ mdss_pp_res->pp_disp_flags[disp_num] |=
+ PP_FLAGS_DIRTY_ARGC;
break;
case MDSS_PP_DSPP_CFG:
argc_addr = mdss_mdp_get_dspp_addr_off(dspp_num) +
MDSS_MDP_REG_DSPP_GC_BASE;
pgc_ptr = &mdss_pp_res->pgc_disp_cfg[disp_num];
- mdss_pp_res->pp_disp_flags[disp_num] |=
- PP_FLAGS_DIRTY_PGC;
+ if (config->flags & MDP_PP_OPS_WRITE)
+ mdss_pp_res->pp_disp_flags[disp_num] |=
+ PP_FLAGS_DIRTY_PGC;
break;
default:
goto argc_config_exit;
@@ -3960,7 +3965,7 @@
mutex_unlock(&ad->lock);
}
if (wait) {
- ret = wait_for_completion_interruptible_timeout(
+ ret = wait_for_completion_timeout(
&ad->comp, HIST_WAIT_TIMEOUT(1));
if (ret == 0)
ret = -ETIMEDOUT;
@@ -4583,6 +4588,14 @@
} else if ((ptr == base + MDSS_MDP_REG_DSPP_DITHER_DEPTH)) {
ret = MDP_PP_OPS_READ | MDP_PP_OPS_WRITE;
break;
+ /* Six zone and mem color */
+ } else if (mdss_res->mdp_rev >= MDSS_MDP_HW_REV_103 &&
+ (ptr >= base + MDSS_MDP_REG_DSPP_SIX_ZONE_BASE) &&
+ (ptr <= base + MDSS_MDP_REG_DSPP_SIX_ZONE_BASE +
+ MDSS_MDP_SIX_ZONE_SIZE +
+ MDSS_MDP_MEM_COL_SIZE)) {
+ ret = MDP_PP_OPS_READ | MDP_PP_OPS_WRITE;
+ break;
}
}
@@ -4623,10 +4636,11 @@
MDSS_MDP_PA_SIZE)) {
ret = MDP_PP_OPS_READ | MDP_PP_OPS_WRITE;
break;
- /* IGC range */
- } else if ((ptr >= base + MDSS_MDP_REG_IGC_VIG_BASE) &&
- (ptr <= base + MDSS_MDP_REG_IGC_VIG_BASE +
- MDSS_MDP_GC_SIZE)) {
+ /* Mem color range */
+ } else if (mdss_res->mdp_rev >= MDSS_MDP_HW_REV_103 &&
+ (ptr >= base + MDSS_MDP_REG_VIG_MEM_COL_BASE) &&
+ (ptr <= base + MDSS_MDP_REG_VIG_MEM_COL_BASE +
+ MDSS_MDP_MEM_COL_SIZE)) {
ret = MDP_PP_OPS_READ | MDP_PP_OPS_WRITE;
break;
}
@@ -4657,12 +4671,6 @@
} else if (ptr == base + MDSS_MDP_REG_SSPP_SRC_OP_MODE) {
ret = MDP_PP_OPS_READ | MDP_PP_OPS_WRITE;
break;
- /* IGC range */
- } else if ((ptr >= base + MDSS_MDP_REG_IGC_RGB_BASE) &&
- (ptr <= base + MDSS_MDP_REG_IGC_RGB_BASE +
- MDSS_MDP_GC_SIZE)) {
- ret = MDP_PP_OPS_READ | MDP_PP_OPS_WRITE;
- break;
}
}
@@ -4691,12 +4699,6 @@
} else if (ptr == base + MDSS_MDP_REG_SSPP_SRC_OP_MODE) {
ret = MDP_PP_OPS_READ | MDP_PP_OPS_WRITE;
break;
- /* IGC range */
- } else if ((ptr >= base + MDSS_MDP_REG_IGC_DMA_BASE) &&
- (ptr <= base + MDSS_MDP_REG_IGC_DMA_BASE +
- MDSS_MDP_GC_SIZE)) {
- ret = MDP_PP_OPS_READ | MDP_PP_OPS_WRITE;
- break;
}
}
@@ -4763,9 +4765,15 @@
} else if (ptr == (mdss_res->mdp_base + MDSS_MDP_REG_HW_VERSION) ||
ptr == (mdss_res->mdp_base + MDSS_MDP_REG_DISP_INTF_SEL)) {
ret = MDP_PP_OPS_READ;
+ /* IGC DSPP range */
} else if (ptr >= (mdss_res->mdp_base + MDSS_MDP_REG_IGC_DSPP_BASE) &&
- ptr < (mdss_res->mdp_base + MDSS_MDP_REG_IGC_DSPP_BASE +
- MDSS_MDP_IGC_DSPP_COLORS)) {
+ ptr <= (mdss_res->mdp_base + MDSS_MDP_REG_IGC_DSPP_BASE +
+ MDSS_MDP_IGC_DSPP_SIZE)) {
+ ret = MDP_PP_OPS_READ | MDP_PP_OPS_WRITE;
+ /* IGC SSPP range */
+ } else if (ptr >= (mdss_res->mdp_base + MDSS_MDP_REG_IGC_VIG_BASE) &&
+ ptr <= (mdss_res->mdp_base + MDSS_MDP_REG_IGC_VIG_BASE +
+ MDSS_MDP_IGC_SSPP_SIZE)) {
ret = MDP_PP_OPS_READ | MDP_PP_OPS_WRITE;
} else if (ptr >= dspp_base && ptr < (dspp_base +
(mdss_res->nmixers_intf * MDSS_MDP_DSPP_ADDRESS_OFFSET))) {
diff --git a/drivers/video/msm/mdss/mdss_mdp_rotator.c b/drivers/video/msm/mdss/mdss_mdp_rotator.c
index 883a728..91e6373 100644
--- a/drivers/video/msm/mdss/mdss_mdp_rotator.c
+++ b/drivers/video/msm/mdss/mdss_mdp_rotator.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -48,6 +48,8 @@
rot->ref_cnt++;
rot->session_id = i | MDSS_MDP_ROT_SESSION_MASK;
mutex_init(&rot->lock);
+ INIT_LIST_HEAD(&rot->head);
+ INIT_LIST_HEAD(&rot->list);
break;
}
}
@@ -104,8 +106,11 @@
if (!pipe) {
mdss_mdp_wb_mixer_destroy(mixer);
pr_debug("dma pipe allocation failed\n");
+ return NULL;
}
+ pipe->mixer_stage = MDSS_MDP_STAGE_UNUSED;
+
return pipe;
}
@@ -125,7 +130,6 @@
if (ctl->shared_lock)
mutex_unlock(ctl->shared_lock);
}
- mdss_mdp_smp_release(rot->pipe);
mutex_unlock(&rot->lock);
return 0;
@@ -167,7 +171,6 @@
if (rot->pipe) {
pr_debug("use new rotator pipe=%d\n", rot->pipe->num);
- rot->pipe->mixer_stage = MDSS_MDP_STAGE_UNUSED;
list_add_tail(&rot->head, &rotator_queue);
} else if (!list_empty(&rotator_queue)) {
tmp = list_first_entry(&rotator_queue,
@@ -197,6 +200,39 @@
return 0;
}
+/**
+ * __mdss_mdp_rotator_to_pipe() - setup pipe according to rotator session params
+ * @rot: Pointer to rotator session
+ * @pipe: Pointer to pipe driving structure
+ *
+ * After calling this the pipe structure will contain all parameters required
+ * to use rotator pipe. Note that this function assumes rotator pipe is idle.
+ */
+static int __mdss_mdp_rotator_to_pipe(struct mdss_mdp_rotator_session *rot,
+ struct mdss_mdp_pipe *pipe)
+{
+ int ret;
+
+ pipe->flags = rot->flags;
+ pipe->src_fmt = mdss_mdp_get_format_params(rot->format);
+ pipe->img_width = rot->img_width;
+ pipe->img_height = rot->img_height;
+ pipe->src = rot->src_rect;
+ pipe->dst = rot->src_rect;
+ pipe->dst.x = 0;
+ pipe->dst.y = 0;
+ pipe->params_changed++;
+ rot->params_changed = 0;
+
+ ret = mdss_mdp_smp_reserve(pipe);
+ if (ret) {
+ pr_err("unable to mdss_mdp_smp_reserve rot data\n");
+ return ret;
+ }
+
+ return 0;
+}
+
static int mdss_mdp_rotator_queue_sub(struct mdss_mdp_rotator_session *rot,
struct mdss_mdp_data *src_data,
struct mdss_mdp_data *dst_data)
@@ -232,28 +268,17 @@
}
if (rot->params_changed || rot_ctl->mdata->mixer_switched) {
- rot->params_changed = 0;
- rot_pipe->flags = rot->flags;
- rot_pipe->src_fmt = mdss_mdp_get_format_params(rot->format);
- rot_pipe->img_width = rot->img_width;
- rot_pipe->img_height = rot->img_height;
- rot_pipe->src = rot->src_rect;
- rot_pipe->dst = rot->src_rect;
- rot_pipe->dst.x = 0;
- rot_pipe->dst.y = 0;
- rot_pipe->params_changed++;
+ ret = __mdss_mdp_rotator_to_pipe(rot, rot_pipe);
+ if (ret) {
+ pr_err("rotator session=%x to pipe=%d failed %d\n",
+ rot->session_id, rot_pipe->num, ret);
+ goto error;
+ }
}
- ret = mdss_mdp_smp_reserve(rot->pipe);
- if (ret) {
- pr_err("unable to mdss_mdp_smp_reserve rot data\n");
- goto error;
- }
-
- ret = mdss_mdp_pipe_queue_data(rot->pipe, src_data);
+ ret = mdss_mdp_pipe_queue_data(rot_pipe, src_data);
if (ret) {
pr_err("unable to queue rot data\n");
- mdss_mdp_smp_unreserve(rot->pipe);
goto error;
}
@@ -367,6 +392,45 @@
return ret;
}
+/*
+ * Try to reserve hardware resources for rotator session if possible, if this
+ * is not possible we may still have a chance to reuse existing pipes used by
+ * other sessions at a later point.
+ */
+static int __mdss_mdp_rotator_pipe_reserve(struct mdss_mdp_rotator_session *rot)
+{
+ int ret;
+
+ if (!rot->pipe) {
+ rot->pipe = mdss_mdp_rotator_pipe_alloc();
+ if (rot->pipe) {
+ pr_debug("reserved rotator pipe=%d\n", rot->pipe->num);
+ list_add_tail(&rot->head, &rotator_queue);
+ } else {
+ /*
+ * if rotator queue is not empty means that we'll be
+ * able to reuse existing rotator pipes for this rotator
+ * session, otherwise it means that there are no DMA
+ * pipes available so we should abort now
+ */
+ if (list_empty(&rotator_queue)) {
+ pr_err("unable to reserve rot pipe\n");
+ return -ENODEV;
+ }
+
+ pr_debug("unable to get rot pipe but some in queue\n");
+ return 0;
+ }
+ }
+
+ ret = __mdss_mdp_rotator_to_pipe(rot, rot->pipe);
+ if (ret)
+ pr_err("rotator session=%x to pipe=%d failed %d\n",
+ rot->session_id, rot->pipe->num, ret);
+
+ return ret;
+}
+
int mdss_mdp_rotator_setup(struct msm_fb_data_type *mfd,
struct mdp_overlay *req)
{
@@ -391,14 +455,14 @@
if (req->id == MSMFB_NEW_REQUEST) {
rot = mdss_mdp_rotator_session_alloc();
- rot->pid = current->tgid;
- list_add(&rot->list, &mdp5_data->rot_proc_list);
-
if (!rot) {
pr_err("unable to allocate rotator session\n");
ret = -ENOMEM;
goto rot_err;
}
+
+ rot->pid = current->tgid;
+ list_add(&rot->list, &mdp5_data->rot_proc_list);
} else if (req->id & MDSS_MDP_ROT_SESSION_MASK) {
rot = mdss_mdp_rotator_session_get(req->id);
@@ -526,15 +590,22 @@
rot->params_changed++;
+ ret = __mdss_mdp_rotator_pipe_reserve(rot);
+ if (!ret && rot->next)
+ ret = __mdss_mdp_rotator_pipe_reserve(rot->next);
+
+ if (ret)
+ goto rot_err;
+
req->id = rot->session_id;
rot_err:
- mutex_unlock(&rotator_lock);
if (ret) {
pr_err("Unable to setup rotator session\n");
- if (rot)
- mdss_mdp_rotator_release(rot);
+ if (rot && (req->id == MSMFB_NEW_REQUEST))
+ mdss_mdp_rotator_finish(rot);
}
+ mutex_unlock(&rotator_lock);
return ret;
}
@@ -560,6 +631,9 @@
list_del(&rot->head);
}
+ if (!list_empty(&rot->list))
+ list_del(&rot->list);
+
rot_sync_pt_data = rot->rot_sync_pt_data;
commit_work = rot->commit_work;
memset(rot, 0, sizeof(*rot));
@@ -616,6 +690,7 @@
struct msmfb_overlay_data *req)
{
struct mdss_mdp_rotator_session *rot;
+ struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
int ret;
u32 flgs;
@@ -635,6 +710,9 @@
goto dst_buf_fail;
}
+ if (!mfd->panel_info->cont_splash_enabled)
+ mdss_iommu_attach(mdp5_data->mdata);
+
mdss_mdp_overlay_free_buf(&rot->src_buf);
ret = mdss_mdp_overlay_get_buf(mfd, &rot->src_buf, &req->data, 1, flgs);
if (ret) {
@@ -671,8 +749,6 @@
mdss_mdp_overlay_free_buf(&rot->dst_buf);
rot->pid = 0;
- if (!list_empty(&rot->list))
- list_del_init(&rot->list);
ret = mdss_mdp_rotator_finish(rot);
}
mutex_unlock(&rotator_lock);
diff --git a/drivers/video/msm/mdss/mdss_mdp_util.c b/drivers/video/msm/mdss/mdss_mdp_util.c
index c3e1916..79873b6 100644
--- a/drivers/video/msm/mdss/mdss_mdp_util.c
+++ b/drivers/video/msm/mdss/mdss_mdp_util.c
@@ -592,9 +592,9 @@
int mdss_mdp_calc_phase_step(u32 src, u32 dst, u32 *out_phase)
{
- u32 unit, residue;
+ u32 unit, residue, result;
- if (dst == 0)
+ if (src == 0 || dst == 0)
return -EINVAL;
unit = 1 << PHASE_STEP_SHIFT;
@@ -602,8 +602,13 @@
/* check if overflow is possible */
if (src > dst) {
- residue = *out_phase & (unit - 1);
- if (residue && ((residue * dst) < (unit - residue)))
+ residue = *out_phase - unit;
+ result = (residue * dst) + residue;
+
+ while (result > (unit + (unit >> 1)))
+ result -= unit;
+
+ if ((result > residue) && (result < unit))
return -EOVERFLOW;
}
diff --git a/drivers/video/msm/mdss/mdss_mdp_wb.c b/drivers/video/msm/mdss/mdss_mdp_wb.c
index 5789341..761b85a 100644
--- a/drivers/video/msm/mdss/mdss_mdp_wb.c
+++ b/drivers/video/msm/mdss/mdss_mdp_wb.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -51,7 +51,8 @@
REGISTERED,
IN_FREE_QUEUE,
IN_BUSY_QUEUE,
- WITH_CLIENT
+ WITH_CLIENT,
+ WB_BUFFER_READY,
};
struct mdss_mdp_wb_data {
@@ -438,6 +439,7 @@
{
struct mdss_mdp_wb *wb = mfd_to_wb(mfd);
struct mdss_mdp_wb_data *node = NULL;
+ struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
int ret = 0;
if (!wb) {
@@ -447,19 +449,46 @@
pr_debug("fb%d queue\n", wb->fb_ndx);
+ if (!mfd->panel_info->cont_splash_enabled)
+ mdss_iommu_attach(mdp5_data->mdata);
+
mutex_lock(&wb->lock);
if (local)
node = get_local_node(wb, data);
if (node == NULL)
node = get_user_node(mfd, data);
- if (!node || node->state == IN_BUSY_QUEUE ||
- node->state == IN_FREE_QUEUE) {
- pr_err("memory not registered or Buffer already with us\n");
- ret = -EINVAL;
+ if (!node) {
+ pr_err("memory not registered\n");
+ ret = -ENOENT;
} else {
- list_add_tail(&node->active_entry, &wb->free_queue);
- node->state = IN_FREE_QUEUE;
+ struct mdss_mdp_img_data *buf = &node->buf_data.p[0];
+
+ switch (node->state) {
+ case IN_FREE_QUEUE:
+ pr_err("node 0x%pa was already queueued before\n",
+ &buf->addr);
+ ret = -EINVAL;
+ break;
+ case IN_BUSY_QUEUE:
+ pr_err("node 0x%pa still in busy state\n", &buf->addr);
+ ret = -EBUSY;
+ break;
+ case WB_BUFFER_READY:
+ pr_debug("node 0x%pa re-queueded without dequeue\n",
+ &buf->addr);
+ list_del(&node->active_entry);
+ case WITH_CLIENT:
+ case REGISTERED:
+ list_add_tail(&node->active_entry, &wb->free_queue);
+ node->state = IN_FREE_QUEUE;
+ break;
+ default:
+ pr_err("Invalid node 0x%pa state %d\n",
+ &buf->addr, node->state);
+ ret = -EINVAL;
+ break;
+ }
}
mutex_unlock(&wb->lock);
@@ -529,6 +558,8 @@
if (!ctl->power_on)
return 0;
+ memset(&wb_args, 0, sizeof(wb_args));
+
mutex_lock(&mdss_mdp_wb_buf_lock);
if (wb) {
mutex_lock(&wb->lock);
@@ -569,6 +600,7 @@
if (wb && node) {
mutex_lock(&wb->lock);
list_add_tail(&node->active_entry, &wb->busy_queue);
+ node->state = WB_BUFFER_READY;
mutex_unlock(&wb->lock);
wake_up(&wb->wait_q);
}
diff --git a/drivers/video/msm/mdss/mdss_panel.h b/drivers/video/msm/mdss/mdss_panel.h
index a42ff1e..5d8e03b 100644
--- a/drivers/video/msm/mdss/mdss_panel.h
+++ b/drivers/video/msm/mdss/mdss_panel.h
@@ -227,6 +227,10 @@
u32 init_delay;
};
+struct edp_panel_info {
+ char frame_rate; /* fps */
+};
+
enum dynamic_fps_update {
DFPS_SUSPEND_RESUME_MODE,
DFPS_IMMEDIATE_CLK_UPDATE_MODE,
@@ -309,6 +313,7 @@
struct fbc_panel_info fbc;
struct mipi_panel_info mipi;
struct lvds_panel_info lvds;
+ struct edp_panel_info edp;
};
struct mdss_panel_data {
@@ -349,6 +354,9 @@
case MIPI_CMD_PANEL:
frame_rate = panel_info->mipi.frame_rate;
break;
+ case EDP_PANEL:
+ frame_rate = panel_info->edp.frame_rate;
+ break;
case WRITEBACK_PANEL:
frame_rate = DEFAULT_FRAME_RATE;
break;
diff --git a/drivers/video/msm/mdss/mdss_qpic.c b/drivers/video/msm/mdss/mdss_qpic.c
index fa6bd3d..54b837a 100644
--- a/drivers/video/msm/mdss/mdss_qpic.c
+++ b/drivers/video/msm/mdss/mdss_qpic.c
@@ -368,7 +368,7 @@
phys_addr += block_len;
len -= block_len;
}
- ret = wait_for_completion_interruptible_timeout(
+ ret = wait_for_completion_timeout(
&qpic_res->qpic_endpt.completion,
msecs_to_jiffies(100 * 4));
if (ret <= 0)
diff --git a/drivers/video/msm/mdss/mhl_sii8334.c b/drivers/video/msm/mdss/mhl_sii8334.c
index ab01566..0f84b2d 100644
--- a/drivers/video/msm/mdss/mhl_sii8334.c
+++ b/drivers/video/msm/mdss/mhl_sii8334.c
@@ -193,6 +193,7 @@
enum mhl_st_type to_mode, bool hpd_off);
static void mhl_init_reg_settings(struct mhl_tx_ctrl *mhl_ctrl,
bool mhl_disc_en);
+static int mhl_gpio_config(struct mhl_tx_ctrl *mhl_ctrl, int on);
int mhl_i2c_reg_read(struct i2c_client *client,
uint8_t slave_addr_index, uint8_t reg_offset)
@@ -359,12 +360,18 @@
int timeout;
pr_debug("%s:%u\n", __func__, __LINE__);
+
+ if (mhl_ctrl->mhl_mode) {
+ pr_debug("%s: already in mhl mode\n", __func__);
+ return 0;
+ }
+
INIT_COMPLETION(mhl_ctrl->rgnd_done);
/*
* after toggling reset line and enabling disc
* tx can take a while to generate intr
*/
- timeout = wait_for_completion_interruptible_timeout
+ timeout = wait_for_completion_timeout
(&mhl_ctrl->rgnd_done, HZ * 3);
if (!timeout) {
/*
@@ -374,7 +381,8 @@
pr_warn("%s:%u timedout\n", __func__, __LINE__);
return -ENODEV;
}
- return mhl_ctrl->mhl_mode ? 0 : 1;
+
+ return 0;
}
/* USB_HANDSHAKING FUNCTIONS */
@@ -385,26 +393,7 @@
struct mhl_tx_ctrl *mhl_ctrl = data;
struct i2c_client *client = mhl_ctrl->i2c_handle;
unsigned long flags;
-
- if (!mhl_ctrl->irq_req_done) {
- rc = request_threaded_irq(mhl_ctrl->i2c_handle->irq, NULL,
- &mhl_tx_isr,
- IRQF_TRIGGER_LOW | IRQF_ONESHOT,
- client->dev.driver->name, mhl_ctrl);
- if (rc) {
- pr_err("request_threaded_irq failed, status: %d\n",
- rc);
- return -EINVAL;
- } else {
- pr_debug("request_threaded_irq succeeded\n");
- mhl_ctrl->irq_req_done = true;
- }
- } else {
- enable_irq(client->irq);
- }
-
- /* wait for i2c interrupt line to be activated */
- msleep(100);
+ int discovery_retry = 5;
if (id) {
/* When MHL cable is disconnected we get a sii8334
@@ -424,6 +413,23 @@
mhl_ctrl->notify_usb_online = usb_notify_cb;
mhl_ctrl->notify_ctx = ctx;
}
+again:
+ if (!mhl_ctrl->irq_req_done) {
+ rc = request_threaded_irq(mhl_ctrl->i2c_handle->irq, NULL,
+ &mhl_tx_isr, IRQF_TRIGGER_LOW | IRQF_ONESHOT,
+ client->dev.driver->name, mhl_ctrl);
+ if (rc) {
+ pr_debug("request_threaded_irq failed, status: %d\n",
+ rc);
+ return -EINVAL;
+ } else {
+ pr_debug("request_threaded_irq succeeded\n");
+ mhl_ctrl->irq_req_done = true;
+ }
+
+ /* wait for i2c interrupt line to be activated */
+ msleep(100);
+ }
if (!mhl_ctrl->disc_enabled) {
spin_lock_irqsave(&mhl_ctrl->lock, flags);
@@ -439,16 +445,38 @@
mhl_init_reg_settings(mhl_ctrl, true);
/* allow tx to enable dev disc after D3 state */
msleep(100);
- rc = mhl_sii_wait_for_rgnd(mhl_ctrl);
+ if (mhl_sii_wait_for_rgnd(mhl_ctrl)) {
+ pr_err("%s: discovery timeout\n", __func__);
+
+ free_irq(mhl_ctrl->i2c_handle->irq, mhl_ctrl);
+ mhl_gpio_config(mhl_ctrl, 0);
+ mhl_ctrl->irq_req_done = false;
+
+ msleep(100);
+
+ mhl_gpio_config(mhl_ctrl, 1);
+ if (discovery_retry--) {
+ pr_debug("%s: retrying discovery\n", __func__);
+ goto again;
+ } else {
+ pr_err("%s: discovery failed, ret to USB\n",
+ __func__);
+ if (mhl_ctrl->notify_usb_online)
+ mhl_ctrl->notify_usb_online(
+ mhl_ctrl->notify_ctx, 0);
+ }
+ }
} else {
if (mhl_ctrl->cur_state == POWER_STATE_D3) {
- rc = mhl_sii_wait_for_rgnd(mhl_ctrl);
+ mhl_sii_wait_for_rgnd(mhl_ctrl);
} else {
/* in MHL mode */
pr_debug("%s:%u\n", __func__, __LINE__);
- rc = 0;
}
}
+
+ rc = mhl_ctrl->mhl_mode ? 0 : 1;
+
pr_debug("%s: ret result: %s\n", __func__, rc ? "usb" : " mhl");
return rc;
}
@@ -796,6 +824,7 @@
rc ? "failed" : "passed");
}
mhl_ctrl->cur_state = POWER_STATE_D3;
+ mhl_ctrl->mhl_mode = 0;
break;
default:
break;
@@ -1274,7 +1303,7 @@
INIT_COMPLETION(mhl_ctrl->msc_cmd_done);
MHL_SII_REG_NAME_WR(REG_CBUS_PRI_START, start_bit);
- timeout = wait_for_completion_interruptible_timeout
+ timeout = wait_for_completion_timeout
(&mhl_ctrl->msc_cmd_done, msecs_to_jiffies(T_ABORT_NEXT));
if (!timeout) {
pr_err("%s: cbus_command_send timed out!\n", __func__);
@@ -1918,19 +1947,28 @@
{
struct mhl_tx_ctrl *mhl_ctrl = i2c_get_clientdata(client);
- if (mhl_ctrl->irq_req_done) {
- enable_irq_wake(client->irq);
- disable_irq(client->irq);
+ pr_debug("%s\n", __func__);
+
+ if (!mhl_ctrl)
+ return 0;
+
+ free_irq(mhl_ctrl->i2c_handle->irq, mhl_ctrl);
+ mhl_ctrl->irq_req_done = false;
+
+ if (mhl_ctrl->mhl_mode) {
+ mhl_ctrl->mhl_mode = 0;
+ power_supply_changed(&mhl_ctrl->mhl_psy);
+ if (mhl_ctrl->notify_usb_online)
+ mhl_ctrl->notify_usb_online(mhl_ctrl->notify_ctx, 0);
}
+
return 0;
}
static int mhl_i2c_resume_sub(struct i2c_client *client)
{
- struct mhl_tx_ctrl *mhl_ctrl = i2c_get_clientdata(client);
+ pr_debug("%s\n", __func__);
- if (mhl_ctrl->irq_req_done)
- disable_irq_wake(client->irq);
return 0;
}
#endif /* defined(CONFIG_PM) || defined(CONFIG_PM_SLEEP) */
diff --git a/drivers/video/msm/mdss/msm_mdss_io_8974.c b/drivers/video/msm/mdss/msm_mdss_io_8974.c
index a63275b..5d4610c 100644
--- a/drivers/video/msm/mdss/msm_mdss_io_8974.c
+++ b/drivers/video/msm/mdss/msm_mdss_io_8974.c
@@ -675,6 +675,8 @@
clk_put(edp_drv->ahb_clk);
if (edp_drv->link_clk)
clk_put(edp_drv->link_clk);
+ if (edp_drv->mdp_core_clk)
+ clk_put(edp_drv->mdp_core_clk);
}
int mdss_edp_clk_init(struct mdss_edp_drv_pdata *edp_drv)
@@ -709,6 +711,14 @@
goto mdss_edp_clk_err;
}
+ /* need mdss clock to receive irq */
+ edp_drv->mdp_core_clk = clk_get(dev, "mdp_core_clk");
+ if (IS_ERR(edp_drv->mdp_core_clk)) {
+ pr_err("%s: Can't find mdp_core_clk", __func__);
+ edp_drv->mdp_core_clk = NULL;
+ goto mdss_edp_clk_err;
+ }
+
return 0;
mdss_edp_clk_err:
@@ -736,7 +746,16 @@
goto c1;
}
+ /* need mdss clock to receive irq */
+ ret = clk_enable(edp_drv->mdp_core_clk);
+ if (ret) {
+ pr_err("%s: Failed to enable mdp_core_clk\n", __func__);
+ goto c0;
+ }
+
return 0;
+c0:
+ clk_disable(edp_drv->ahb_clk);
c1:
clk_disable(edp_drv->aux_clk);
c2:
@@ -748,6 +767,7 @@
{
clk_disable(edp_drv->aux_clk);
clk_disable(edp_drv->ahb_clk);
+ clk_disable(edp_drv->mdp_core_clk);
}
int mdss_edp_clk_enable(struct mdss_edp_drv_pdata *edp_drv)
@@ -791,11 +811,18 @@
pr_err("%s: Failed to enable link clk\n", __func__);
goto c1;
}
+ ret = clk_enable(edp_drv->mdp_core_clk);
+ if (ret) {
+ pr_err("%s: Failed to enable mdp_core_clk\n", __func__);
+ goto c0;
+ }
edp_drv->clk_on = 1;
return 0;
+c0:
+ clk_disable(edp_drv->link_clk);
c1:
clk_disable(edp_drv->ahb_clk);
c2:
@@ -817,6 +844,7 @@
clk_disable(edp_drv->pixel_clk);
clk_disable(edp_drv->ahb_clk);
clk_disable(edp_drv->link_clk);
+ clk_disable(edp_drv->mdp_core_clk);
edp_drv->clk_on = 0;
}
@@ -825,10 +853,11 @@
{
int ret;
+ /* ahb clock should be prepared first */
ret = clk_prepare(edp_drv->ahb_clk);
if (ret) {
pr_err("%s: Failed to prepare ahb clk\n", __func__);
- goto c1;
+ goto c3;
}
ret = clk_prepare(edp_drv->aux_clk);
if (ret) {
@@ -836,16 +865,26 @@
goto c2;
}
+ /* need mdss clock to receive irq */
+ ret = clk_prepare(edp_drv->mdp_core_clk);
+ if (ret) {
+ pr_err("%s: Failed to prepare mdp_core clk\n", __func__);
+ goto c1;
+ }
+
return 0;
c1:
- clk_unprepare(edp_drv->ahb_clk);
+ clk_unprepare(edp_drv->aux_clk);
c2:
+ clk_unprepare(edp_drv->ahb_clk);
+c3:
return ret;
}
void mdss_edp_unprepare_aux_clocks(struct mdss_edp_drv_pdata *edp_drv)
{
+ clk_unprepare(edp_drv->mdp_core_clk);
clk_unprepare(edp_drv->aux_clk);
clk_unprepare(edp_drv->ahb_clk);
}
@@ -854,7 +893,7 @@
{
int ret;
- /* ahb clock should be first one to enable */
+ /* ahb clock should be prepared first */
ret = clk_prepare(edp_drv->ahb_clk);
if (ret) {
pr_err("%s: Failed to prepare ahb clk\n", __func__);
@@ -875,8 +914,15 @@
pr_err("%s: Failed to prepare link clk\n", __func__);
goto c1;
}
+ ret = clk_prepare(edp_drv->mdp_core_clk);
+ if (ret) {
+ pr_err("%s: Failed to prepare mdp_core clk\n", __func__);
+ goto c0;
+ }
return 0;
+c0:
+ clk_unprepare(edp_drv->link_clk);
c1:
clk_unprepare(edp_drv->pixel_clk);
c2:
@@ -889,6 +935,7 @@
void mdss_edp_unprepare_clocks(struct mdss_edp_drv_pdata *edp_drv)
{
+ clk_unprepare(edp_drv->mdp_core_clk);
clk_unprepare(edp_drv->aux_clk);
clk_unprepare(edp_drv->pixel_clk);
clk_unprepare(edp_drv->link_clk);
diff --git a/fs/ext4/ext4_jbd2.c b/fs/ext4/ext4_jbd2.c
index aca1790..d0b8f98 100644
--- a/fs/ext4/ext4_jbd2.c
+++ b/fs/ext4/ext4_jbd2.c
@@ -109,10 +109,10 @@
if (ext4_handle_valid(handle)) {
err = jbd2_journal_dirty_metadata(handle, bh);
- if (err) {
- /* Errors can only happen if there is a bug */
- handle->h_err = err;
- __ext4_journal_stop(where, line, handle);
+ /* Errors can only happen if there is a bug */
+ if (WARN_ON_ONCE(err)) {
+ ext4_journal_abort_handle(where, line, __func__, bh,
+ handle, err);
}
} else {
if (inode)
diff --git a/fs/ext4/super.c b/fs/ext4/super.c
index e1fb1d5..48609bc 100644
--- a/fs/ext4/super.c
+++ b/fs/ext4/super.c
@@ -4105,6 +4105,7 @@
ext4_commit_super(sb, 1);
jbd2_journal_clear_err(journal);
+ jbd2_journal_update_sb_errno(journal);
}
}
diff --git a/fs/ext4/xattr.c b/fs/ext4/xattr.c
index e88748e..6c27436 100644
--- a/fs/ext4/xattr.c
+++ b/fs/ext4/xattr.c
@@ -1267,6 +1267,8 @@
s_min_extra_isize) {
tried_min_extra_isize++;
new_extra_isize = s_min_extra_isize;
+ kfree(is); is = NULL;
+ kfree(bs); bs = NULL;
goto retry;
}
error = -1;
diff --git a/fs/fuse/file.c b/fs/fuse/file.c
index 6b83222..837a6e3 100644
--- a/fs/fuse/file.c
+++ b/fs/fuse/file.c
@@ -692,6 +692,8 @@
lock_page(newpage);
put_page(newpage);
+ lru_cache_add_file(newpage);
+
/* finally release the old page and swap pointers */
unlock_page(oldpage);
page_cache_release(oldpage);
diff --git a/fs/jbd2/journal.c b/fs/jbd2/journal.c
index 1afb701..9956ac6 100644
--- a/fs/jbd2/journal.c
+++ b/fs/jbd2/journal.c
@@ -1340,7 +1340,7 @@
* Update a journal's errno. Write updated superblock to disk waiting for IO
* to complete.
*/
-static void jbd2_journal_update_sb_errno(journal_t *journal)
+void jbd2_journal_update_sb_errno(journal_t *journal)
{
journal_superblock_t *sb = journal->j_superblock;
@@ -1352,6 +1352,7 @@
jbd2_write_superblock(journal, WRITE_SYNC);
}
+EXPORT_SYMBOL(jbd2_journal_update_sb_errno);
/*
* Read the superblock for a given journal, performing initial
diff --git a/include/linux/devfreq.h b/include/linux/devfreq.h
index d00847a..70b3eef 100644
--- a/include/linux/devfreq.h
+++ b/include/linux/devfreq.h
@@ -51,6 +51,7 @@
* bound (greatest lower bound)
*/
#define DEVFREQ_FLAG_LEAST_UPPER_BOUND 0x1
+#define DEVFREQ_FLAG_WAKEUP_MAXFREQ 0x2
#define DEVFREQ_FLAG_FAST_HINT 0x2
#define DEVFREQ_FLAG_SLOW_HINT 0x4
@@ -227,6 +228,9 @@
* the governor may consider slowing the frequency down.
* Specify 0 to use the default. Valid value = 0 to 100.
* downdifferential < upthreshold must hold.
+ * @simple_scaling: Setting this flag will scale the clocks up only if the
+ * load is above @upthreshold and will scale the clocks
+ * down only if the load is below @downdifferential.
*
* If the fed devfreq_simple_ondemand_data pointer is NULL to the governor,
* the governor uses the default values.
@@ -234,6 +238,7 @@
struct devfreq_simple_ondemand_data {
unsigned int upthreshold;
unsigned int downdifferential;
+ unsigned int simple_scaling;
};
#endif
diff --git a/include/linux/jbd2.h b/include/linux/jbd2.h
index 912c30a..2ed66ef 100644
--- a/include/linux/jbd2.h
+++ b/include/linux/jbd2.h
@@ -1091,6 +1091,7 @@
extern int jbd2_journal_recover (journal_t *journal);
extern int jbd2_journal_wipe (journal_t *, int);
extern int jbd2_journal_skip_recovery (journal_t *);
+extern void jbd2_journal_update_sb_errno(journal_t *);
extern void jbd2_journal_update_sb_log_tail (journal_t *, tid_t,
unsigned long, int);
extern void __jbd2_journal_abort_hard (journal_t *);
diff --git a/include/linux/mfd/wcd9xxx/core-resource.h b/include/linux/mfd/wcd9xxx/core-resource.h
index 442496e..b45cf6a 100644
--- a/include/linux/mfd/wcd9xxx/core-resource.h
+++ b/include/linux/mfd/wcd9xxx/core-resource.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -67,6 +67,8 @@
unsigned short, u8);
int (*codec_bulk_read) (struct wcd9xxx_core_resource *,
unsigned short, int, u8 *);
+ int (*codec_bulk_write) (struct wcd9xxx_core_resource *,
+ unsigned short, int, u8 *);
/* Pointer to parent container data structure */
void *parent;
@@ -80,6 +82,8 @@
int (*codec_read)(struct wcd9xxx_core_resource *, unsigned short),
int (*codec_write)(struct wcd9xxx_core_resource *, unsigned short, u8),
int (*codec_bulk_read) (struct wcd9xxx_core_resource *, unsigned short,
+ int, u8 *),
+ int (*codec_bulk_write) (struct wcd9xxx_core_resource *, unsigned short,
int, u8 *));
extern void wcd9xxx_core_res_deinit(
diff --git a/include/linux/msm_hdmi.h b/include/linux/msm_hdmi.h
new file mode 100644
index 0000000..70fae94
--- /dev/null
+++ b/include/linux/msm_hdmi.h
@@ -0,0 +1,57 @@
+/* include/linux/msm_hdmi.h
+ *
+ * Copyright (c) 2014 The Linux Foundation. All rights reserved.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef _MSM_HDMI_H_
+#define _MSM_HDMI_H_
+
+/*
+ * HDMI cable notify handler sturcture.
+ * link A link for the linked list
+ * status Current status of HDMI cable connection
+ * hpd_notify Callback function to provide cable status
+ */
+struct hdmi_cable_notify {
+ struct list_head link;
+ int status;
+ void (*hpd_notify) (struct hdmi_cable_notify *h);
+};
+
+#ifdef CONFIG_FB_MSM_MDSS_HDMI_PANEL
+/*
+ * Register for HDMI cable connect or disconnect notification.
+ * @param handler callback handler for notification
+ * @return negative value as error otherwise current status of cable
+ */
+int register_hdmi_cable_notification(
+ struct hdmi_cable_notify *handler);
+
+/*
+ * Un-register for HDMI cable connect or disconnect notification.
+ * @param handler callback handler for notification
+ * @return negative value as error
+ */
+int unregister_hdmi_cable_notification(
+ struct hdmi_cable_notify *handler);
+#else
+int register_hdmi_cable_notification(
+ struct hdmi_cable_notify *handler) {
+ return 0;
+}
+
+int unregister_hdmi_cable_notification(
+ struct hdmi_cable_notify *handler) {
+ return 0;
+}
+#endif /* CONFIG_FB_MSM_MDSS_HDMI_PANEL */
+
+#endif /*_MSM_HDMI_H_*/
diff --git a/include/linux/msm_mdp.h b/include/linux/msm_mdp.h
index 121a00c..b7f9b86 100644
--- a/include/linux/msm_mdp.h
+++ b/include/linux/msm_mdp.h
@@ -169,7 +169,7 @@
#define MDP_BLUR 0x10
#define MDP_BLEND_FG_PREMULT 0x20000
#define MDP_IS_FG 0x40000
-#define MDP_SOLID_FILL 0x0000100
+#define MDP_SOLID_FILL 0x00000020
#define MDP_DEINTERLACE 0x80000000
#define MDP_SHARPENING 0x40000000
#define MDP_NO_DMA_BARRIER_START 0x20000000
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index ddbb6a9..289754e 100644
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -254,8 +254,9 @@
exclude_host : 1, /* don't count in host */
exclude_guest : 1, /* don't count in guest */
+ constraint_duplicate : 1,
- __reserved_1 : 43;
+ __reserved_1 : 42;
union {
__u32 wakeup_events; /* wakeup every n events */
@@ -740,6 +741,8 @@
int * __percpu pmu_disable_count;
struct perf_cpu_context * __percpu pmu_cpu_context;
int task_ctx_nr;
+ u32 events_across_hotplug:1,
+ reserved:31;
/*
* Fully disable/enable this PMU, can be used to protect from the PMI
diff --git a/include/linux/qpnp/qpnp-adc.h b/include/linux/qpnp/qpnp-adc.h
index e6dcc3b..2b47b88 100644
--- a/include/linux/qpnp/qpnp-adc.h
+++ b/include/linux/qpnp/qpnp-adc.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -190,6 +190,7 @@
* %CHAN_PATH_SCALING2: ratio of {1, 4}
* %CHAN_PATH_SCALING3: ratio of {1, 6}
* %CHAN_PATH_SCALING4: ratio of {1, 20}
+ * %CHAN_PATH_SCALING5: ratio of {1, 8}
* %CHAN_PATH_NONE: Do not use this pre-scaling ratio type.
*
* The pre-scaling is applied for signals to be within the voltage range
@@ -201,6 +202,7 @@
PATH_SCALING2,
PATH_SCALING3,
PATH_SCALING4,
+ PATH_SCALING5,
PATH_SCALING_NONE,
};
@@ -893,7 +895,8 @@
{1, 3},
{1, 4},
{1, 6},
- {1, 20}
+ {1, 20},
+ {1, 8}
};
/**
diff --git a/include/linux/qrng.h b/include/linux/qrng.h
index 35708e3..8c09627 100644
--- a/include/linux/qrng.h
+++ b/include/linux/qrng.h
@@ -1,5 +1,5 @@
-#ifndef __QRNG_H_
-#define __QRNG_H_
+#ifndef _QRNG_H_
+#define _QRNG_H_
#include <linux/types.h>
#include <linux/ioctl.h>
@@ -9,4 +9,4 @@
#define QRNG_IOCTL_RESET_BUS_BANDWIDTH\
_IO(QRNG_IOC_MAGIC, 1)
-#endif /* __QRNG_H_ */
+#endif /* _QRNG_H_ */
diff --git a/include/linux/qseecom.h b/include/linux/qseecom.h
index a45c34c..b7ba63a 100644
--- a/include/linux/qseecom.h
+++ b/include/linux/qseecom.h
@@ -127,6 +127,7 @@
enum qseecom_key_management_usage_type {
QSEOS_KM_USAGE_DISK_ENCRYPTION = 0x01,
+ QSEOS_KM_USAGE_MAX
};
struct qseecom_create_key_req {
@@ -138,6 +139,12 @@
enum qseecom_key_management_usage_type usage;
};
+struct qseecom_update_key_userinfo_req {
+ unsigned char current_hash32[QSEECOM_HASH_SIZE];
+ unsigned char new_hash32[QSEECOM_HASH_SIZE];
+ enum qseecom_key_management_usage_type usage;
+};
+
#define SHA256_DIGEST_LENGTH (256/8)
/*
* struct qseecom_save_partition_hash_req
@@ -157,11 +164,6 @@
int is_activated; /* out */
};
-enum qseecom_buffer_protection {
- QSEOS_UNPROTECTED_BUFFER,
- QSEOS_PROTECT_BUFFER,
- QSEOS_UNPROTECT_PROTECTED_BUFFER,
-};
enum qseecom_bandwidth_request_mode {
INACTIVE = 0,
@@ -181,7 +183,6 @@
void *resp_buf_ptr; /* in */
unsigned int resp_len; /* in */
struct qseecom_ion_fd_info ifd_data[MAX_ION_FD]; /* in */
- enum qseecom_buffer_protection protection_mode; /* in */
};
#define QSEECOM_IOC_MAGIC 0x97
@@ -250,10 +251,10 @@
#define QSEECOM_IOCTL_SEND_MODFD_RESP \
_IOWR(QSEECOM_IOC_MAGIC, 21, struct qseecom_send_modfd_listener_resp)
-#define QSEECOM_IOCTL_UNPROTECT_BUF \
- _IOWR(QSEECOM_IOC_MAGIC, 22, int)
-
#define QSEECOM_IOCTL_SET_BUS_SCALING_REQ \
_IOWR(QSEECOM_IOC_MAGIC, 23, int)
+#define QSEECOM_IOCTL_UPDATE_KEY_USER_INFO_REQ \
+ _IOWR(QSEECOM_IOC_MAGIC, 24, struct qseecom_update_key_userinfo_req)
+
#endif /* __QSEECOM_H_ */
diff --git a/include/linux/regulator/cpr-regulator.h b/include/linux/regulator/cpr-regulator.h
index 2e2d931..3b23d17 100644
--- a/include/linux/regulator/cpr-regulator.h
+++ b/include/linux/regulator/cpr-regulator.h
@@ -16,7 +16,7 @@
#include <linux/regulator/machine.h>
-#define CPR_REGULATOR_DRIVER_NAME "qti,cpr-regulator"
+#define CPR_REGULATOR_DRIVER_NAME "qcom,cpr-regulator"
#define CPR_PVS_EFUSE_BITS_MAX 5
#define CPR_PVS_EFUSE_BINS_MAX (1 << CPR_PVS_EFUSE_BITS_MAX)
diff --git a/include/linux/usb/Kbuild b/include/linux/usb/Kbuild
index 087d163..fe4d6da 100644
--- a/include/linux/usb/Kbuild
+++ b/include/linux/usb/Kbuild
@@ -1,4 +1,5 @@
header-y += audio.h
+header-y += ccid_bridge.h
header-y += cdc.h
header-y += ch9.h
header-y += ch11.h
diff --git a/include/linux/usb/ccid_bridge.h b/include/linux/usb/ccid_bridge.h
new file mode 100644
index 0000000..1d1b895
--- /dev/null
+++ b/include/linux/usb/ccid_bridge.h
@@ -0,0 +1,64 @@
+#ifndef __UAPI_USB_CCID_BRIDGE_H
+#define __UAPI_USB_CCID_BRIDGE_H
+
+#include <linux/ioctl.h>
+
+/**
+ * struct usb_ccid_data - Used to receive the CCID class descriptor,
+ * clock rates and data rates supported by the device.
+ * @length: The length of the buffer.
+ * @data: The buffer as it is returned by the device for GET_DESCRIPTOR,
+ * GET_CLOCK_FREQUENCIES and GET_DATA_RATES requests.
+ */
+struct usb_ccid_data {
+ uint8_t length;
+ void *data;
+};
+
+/**
+ * struct usb_ccid_abort - Used to abort an already sent command.
+ * @seq: The sequence number of the command.
+ * @slot: The slot of the IC, on which the command is sent.
+ */
+struct usb_ccid_abort {
+ uint8_t seq;
+ uint8_t slot;
+};
+
+#define USB_CCID_NOTIFY_SLOT_CHANGE_EVENT 1
+#define USB_CCID_HARDWARE_ERROR_EVENT 2
+#define USB_CCID_RESUME_EVENT 3
+/**
+ * struct usb_ccid_event - Used to receive notify slot change or hardware
+ * error event.
+ * @notify: If the event is USB_CCID_NOTIFY_SLOT_CHANGE_EVENT, slot_icc_state
+ * has the information about the current slots state.
+ * @error: If the event is USB_CCID_HARDWARE_ERROR_EVENT, error has
+ * information about the hardware error condition.
+ */
+struct usb_ccid_event {
+ uint8_t event;
+ union {
+ struct {
+ uint8_t slot_icc_state;
+ } notify;
+
+ struct {
+ uint8_t slot;
+ uint8_t seq;
+ uint8_t error_code;
+ } error;
+ } u;
+};
+
+#define USB_CCID_GET_CLASS_DESC _IOWR('C', 0, struct usb_ccid_data)
+
+#define USB_CCID_GET_CLOCK_FREQUENCIES _IOWR('C', 1, struct usb_ccid_data)
+
+#define USB_CCID_GET_DATA_RATES _IOWR('C', 2, struct usb_ccid_data)
+
+#define USB_CCID_ABORT _IOW('C', 3, struct usb_ccid_abort)
+
+#define USB_CCID_GET_EVENT _IOR('C', 4, struct usb_ccid_event)
+
+#endif /* __UAPI_USB_CCID_BRIDGE_H */
diff --git a/include/linux/usb/hcd.h b/include/linux/usb/hcd.h
index 4fb20f6..f9dec0b 100644
--- a/include/linux/usb/hcd.h
+++ b/include/linux/usb/hcd.h
@@ -212,7 +212,8 @@
#define HCD_MEMORY 0x0001 /* HC regs use memory (else I/O) */
#define HCD_LOCAL_MEM 0x0002 /* HC needs local memory */
#define HCD_SHARED 0x0004 /* Two (or more) usb_hcds share HW */
-#define HCD_OLD_ENUM 0x0008 /* HC supports short enumeration */
+#define HCD_RT_OLD_ENUM 0x0008 /* HC supports short enumeration
+ on root port */
#define HCD_USB11 0x0010 /* USB 1.1 */
#define HCD_USB2 0x0020 /* USB 2.0 */
#define HCD_USB3 0x0040 /* USB 3.0 */
diff --git a/include/linux/wcnss_wlan.h b/include/linux/wcnss_wlan.h
index 39357e0..9badfa3 100644
--- a/include/linux/wcnss_wlan.h
+++ b/include/linux/wcnss_wlan.h
@@ -41,6 +41,7 @@
#define HAVE_WCNSS_RESET_INTR 1
#define HAVE_WCNSS_CAL_DOWNLOAD 1
#define HAVE_WCNSS_RX_BUFF_COUNT 1
+#define WLAN_MAC_ADDR_SIZE (6)
struct device *wcnss_wlan_get_device(void);
struct resource *wcnss_wlan_get_memory_map(struct device *dev);
@@ -64,6 +65,7 @@
int wcnss_free_power_on_lock(char *driver_name);
unsigned int wcnss_get_serial_number(void);
void wcnss_flush_delayed_boot_votes(void);
+int wcnss_get_wlan_mac_address(char mac_addr[WLAN_MAC_ADDR_SIZE]);
void wcnss_allow_suspend(void);
void wcnss_prevent_suspend(void);
int wcnss_hardware_type(void);
@@ -86,7 +88,11 @@
{
}
#endif
-
+int wcnss_set_wlan_unsafe_channel(
+ u16 *unsafe_ch_list, u16 ch_count);
+int wcnss_get_wlan_unsafe_channel(
+ u16 *unsafe_ch_list, u16 buffer_size,
+ u16 *ch_count);
#define wcnss_wlan_get_drvdata(dev) dev_get_drvdata(dev)
#define wcnss_wlan_set_drvdata(dev, data) dev_set_drvdata((dev), (data))
/* WLAN driver uses these names */
diff --git a/include/media/msm_cam_sensor.h b/include/media/msm_cam_sensor.h
index 38d3aab..c0df1d7 100644
--- a/include/media/msm_cam_sensor.h
+++ b/include/media/msm_cam_sensor.h
@@ -47,6 +47,7 @@
#define MAX_EEPROM_NAME 32
#define MAX_AF_ITERATIONS 3
+#define MAX_NUMBER_OF_STEPS 47
enum flash_type {
LED_FLASH = 1,
@@ -440,6 +441,7 @@
CFG_GET_ACTUATOR_INFO,
CFG_SET_ACTUATOR_INFO,
CFG_SET_DEFAULT_FOCUS,
+ CFG_SET_POSITION,
CFG_MOVE_FOCUS,
};
@@ -538,6 +540,13 @@
ACTUATOR_WEB_CAM_2,
};
+
+struct msm_actuator_set_position_t {
+ uint16_t number_of_steps;
+ uint16_t pos[MAX_NUMBER_OF_STEPS];
+ uint16_t delay[MAX_NUMBER_OF_STEPS];
+};
+
struct msm_actuator_cfg_data {
int cfgtype;
uint8_t is_af_supported;
@@ -545,6 +554,7 @@
struct msm_actuator_move_params_t move;
struct msm_actuator_set_info_t set_info;
struct msm_actuator_get_info_t get_info;
+ struct msm_actuator_set_position_t setpos;
enum af_camera_name cam_name;
} cfg;
};
diff --git a/include/media/msm_vidc.h b/include/media/msm_vidc.h
index bc85ebb..81db11a 100644
--- a/include/media/msm_vidc.h
+++ b/include/media/msm_vidc.h
@@ -7,8 +7,8 @@
#include <linux/videodev2.h>
enum core_id {
- MSM_VIDC_CORE_0 = 0,
- MSM_VIDC_CORE_1, /* for Q6 core */
+ MSM_VIDC_CORE_VENUS = 0,
+ MSM_VIDC_CORE_Q6,
MSM_VIDC_CORES_MAX,
};
diff --git a/include/media/msmb_generic_buf_mgr.h b/include/media/msmb_generic_buf_mgr.h
index efcb425..237380f 100644
--- a/include/media/msmb_generic_buf_mgr.h
+++ b/include/media/msmb_generic_buf_mgr.h
@@ -20,4 +20,10 @@
#define VIDIOC_MSM_BUF_MNGR_BUF_DONE \
_IOWR('V', BASE_VIDIOC_PRIVATE + 35, struct msm_buf_mngr_info)
+#define VIDIOC_MSM_BUF_MNGR_INIT \
+ _IOWR('V', BASE_VIDIOC_PRIVATE + 36, struct msm_buf_mngr_info)
+
+#define VIDIOC_MSM_BUF_MNGR_DEINIT \
+ _IOWR('V', BASE_VIDIOC_PRIVATE + 37, struct msm_buf_mngr_info)
+
#endif
diff --git a/include/media/msmb_isp.h b/include/media/msmb_isp.h
index 568a3fa..3ba0abe 100644
--- a/include/media/msmb_isp.h
+++ b/include/media/msmb_isp.h
@@ -228,6 +228,7 @@
VFE_READ_DMI_32BIT,
VFE_READ_DMI_64BIT,
GET_SOC_HW_VER,
+ GET_MAX_CLK_RATE,
};
struct msm_vfe_cfg_cmd2 {
diff --git a/include/media/radio-iris.h b/include/media/radio-iris.h
index d28a8c0..518dfb1 100644
--- a/include/media/radio-iris.h
+++ b/include/media/radio-iris.h
@@ -32,6 +32,50 @@
#include <linux/mutex.h>
#include <linux/atomic.h>
#include "radio-iris-commands.h"
+const unsigned char MIN_TX_TONE_VAL = 0x00;
+const unsigned char MAX_TX_TONE_VAL = 0x07;
+const unsigned char MIN_HARD_MUTE_VAL = 0x00;
+const unsigned char MAX_HARD_MUTE_VAL = 0x03;
+const unsigned char MIN_SRCH_MODE = 0x00;
+const unsigned char MAX_SRCH_MODE = 0x09;
+const unsigned char MIN_SCAN_DWELL = 0x00;
+const unsigned char MAX_SCAN_DWELL = 0x0F;
+const unsigned char MIN_SIG_TH = 0x00;
+const unsigned char MAX_SIG_TH = 0x03;
+const unsigned char MIN_PTY = 0X00;
+const unsigned char MAX_PTY = 0x1F;
+const unsigned short MIN_PI = 0x0000;
+const unsigned short MAX_PI = 0xFFFF;
+const unsigned char MIN_SRCH_STATIONS_CNT = 0x00;
+const unsigned char MAX_SRCH_STATIONS_CNT = 0x14;
+const unsigned char MIN_CHAN_SPACING = 0x00;
+const unsigned char MAX_CHAN_SPACING = 0x02;
+const unsigned char MIN_EMPHASIS = 0x00;
+const unsigned char MAX_EMPHASIS = 0x01;
+const unsigned char MIN_RDS_STD = 0x00;
+const unsigned char MAX_RDS_STD = 0x02;
+const unsigned char MIN_ANTENNA_VAL = 0x00;
+const unsigned char MAX_ANTENNA_VAL = 0x01;
+const unsigned char MIN_TX_PS_REPEAT_CNT = 0x01;
+const unsigned char MAX_TX_PS_REPEAT_CNT = 0x0F;
+const unsigned char MIN_SOFT_MUTE = 0x00;
+const unsigned char MAX_SOFT_MUTE = 0x01;
+const unsigned char MIN_PEEK_ACCESS_LEN = 0x01;
+const unsigned char MAX_PEEK_ACCESS_LEN = 0xF9;
+const unsigned char MIN_RESET_CNTR = 0x00;
+const unsigned char MAX_RESET_CNTR = 0x01;
+const unsigned char MIN_HLSI = 0x00;
+const unsigned char MAX_HLSI = 0x02;
+const unsigned char MIN_NOTCH_FILTER = 0x00;
+const unsigned char MAX_NOTCH_FILTER = 0x02;
+const unsigned char MIN_INTF_DET_OUT_LW_TH = 0x00;
+const unsigned char MAX_INTF_DET_OUT_LW_TH = 0xFF;
+const unsigned char MIN_INTF_DET_OUT_HG_TH = 0x00;
+const unsigned char MAX_INTF_DET_OUT_HG_TH = 0xFF;
+const signed char MIN_SINR_TH = -128;
+const signed char MAX_SINR_TH = 127;
+const unsigned char MIN_SINR_SAMPLES = 0x01;
+const unsigned char MAX_SINR_SAMPLES = 0xFF;
/* ---- HCI Packet structures ---- */
#define RADIO_HCI_COMMAND_HDR_SIZE sizeof(struct radio_hci_command_hdr)
@@ -630,6 +674,7 @@
FM_TURNING_OFF,
FM_RECV_TURNING_ON,
FM_TRANS_TURNING_ON,
+ FM_MAX_NO_STATES,
};
enum emphasis_type {
@@ -828,4 +873,209 @@
int hci_fm_do_calibration(__u8 *arg, struct radio_hci_dev *hdev);
int hci_fm_do_calibration(__u8 *arg, struct radio_hci_dev *hdev);
+static inline int is_valid_tone(int tone)
+{
+ if ((tone >= MIN_TX_TONE_VAL) &&
+ (tone <= MAX_TX_TONE_VAL))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_hard_mute(int hard_mute)
+{
+ if ((hard_mute >= MIN_HARD_MUTE_VAL) &&
+ (hard_mute <= MAX_HARD_MUTE_VAL))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_srch_mode(int srch_mode)
+{
+ if ((srch_mode >= MIN_SRCH_MODE) &&
+ (srch_mode <= MAX_SRCH_MODE))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_scan_dwell_prd(int scan_dwell_prd)
+{
+ if ((scan_dwell_prd >= MIN_SCAN_DWELL) &&
+ (scan_dwell_prd <= MAX_SCAN_DWELL))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_sig_th(int sig_th)
+{
+ if ((sig_th >= MIN_SIG_TH) &&
+ (sig_th <= MAX_SIG_TH))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_pty(int pty)
+{
+ if ((pty >= MIN_PTY) &&
+ (pty <= MAX_PTY))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_pi(int pi)
+{
+ if ((pi >= MIN_PI) &&
+ (pi <= MAX_PI))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_srch_station_cnt(int cnt)
+{
+ if ((cnt >= MIN_SRCH_STATIONS_CNT) &&
+ (cnt <= MAX_SRCH_STATIONS_CNT))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_chan_spacing(int spacing)
+{
+ if ((spacing >= MIN_CHAN_SPACING) &&
+ (spacing <= MAX_CHAN_SPACING))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_emphasis(int emphasis)
+{
+ if ((emphasis >= MIN_EMPHASIS) &&
+ (emphasis <= MAX_EMPHASIS))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_rds_std(int rds_std)
+{
+ if ((rds_std >= MIN_RDS_STD) &&
+ (rds_std <= MAX_RDS_STD))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_antenna(int antenna_type)
+{
+ if ((antenna_type >= MIN_ANTENNA_VAL) &&
+ (antenna_type <= MAX_ANTENNA_VAL))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_ps_repeat_cnt(int cnt)
+{
+ if ((cnt >= MIN_TX_PS_REPEAT_CNT) &&
+ (cnt <= MAX_TX_PS_REPEAT_CNT))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_soft_mute(int soft_mute)
+{
+ if ((soft_mute >= MIN_SOFT_MUTE) &&
+ (soft_mute <= MAX_SOFT_MUTE))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_peek_len(int len)
+{
+ if ((len >= MIN_PEEK_ACCESS_LEN) &&
+ (len <= MAX_PEEK_ACCESS_LEN))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_reset_cntr(int cntr)
+{
+ if ((cntr >= MIN_RESET_CNTR) &&
+ (cntr <= MAX_RESET_CNTR))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_hlsi(int hlsi)
+{
+ if ((hlsi >= MIN_HLSI) &&
+ (hlsi <= MAX_HLSI))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_notch_filter(int filter)
+{
+ if ((filter >= MIN_NOTCH_FILTER) &&
+ (filter <= MAX_NOTCH_FILTER))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_intf_det_low_th(int th)
+{
+ if ((th >= MIN_INTF_DET_OUT_LW_TH) &&
+ (th <= MAX_INTF_DET_OUT_LW_TH))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_intf_det_hgh_th(int th)
+{
+ if ((th >= MIN_INTF_DET_OUT_HG_TH) &&
+ (th <= MAX_INTF_DET_OUT_HG_TH))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_sinr_th(int th)
+{
+ if ((th >= MIN_SINR_TH) &&
+ (th <= MAX_SINR_TH))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_sinr_samples(int samples_cnt)
+{
+ if ((samples_cnt >= MIN_SINR_SAMPLES) &&
+ (samples_cnt <= MAX_SINR_SAMPLES))
+ return 1;
+ else
+ return 0;
+}
+
+static inline int is_valid_fm_state(int state)
+{
+ if ((state >= 0) && (state < FM_MAX_NO_STATES))
+ return 1;
+ else
+ return 0;
+}
#endif /* __RADIO_HCI_CORE_H */
diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h
index 7c6a558..6a54bb4 100644
--- a/include/scsi/scsi_device.h
+++ b/include/scsi/scsi_device.h
@@ -152,7 +152,10 @@
unsigned no_read_disc_info:1; /* Avoid READ_DISC_INFO cmds */
unsigned no_read_capacity_16:1; /* Avoid READ_CAPACITY_16 cmds */
unsigned is_visible:1; /* is the device visible in sysfs */
+ unsigned use_rpm_auto:1; /* Enable runtime PM auto suspend */
+#define SCSI_DEFAULT_AUTOSUSPEND_DELAY -1
+ int autosuspend_delay;
DECLARE_BITMAP(supported_events, SDEV_EVT_MAXBITS); /* supported events */
struct list_head event_list; /* asserted events */
struct work_struct event_work;
diff --git a/kernel/events/core.c b/kernel/events/core.c
index aafa4c1..7dd822b 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -1194,6 +1194,28 @@
return 0;
}
+#ifdef CONFIG_SMP
+static void perf_retry_remove(struct perf_event *event)
+{
+ int up_ret;
+ /*
+ * CPU was offline. Bring it online so we can
+ * gracefully exit a perf context.
+ */
+ up_ret = cpu_up(event->cpu);
+ if (!up_ret)
+ /* Try the remove call once again. */
+ cpu_function_call(event->cpu, __perf_remove_from_context,
+ event);
+ else
+ pr_err("Failed to bring up CPU: %d, ret: %d\n",
+ event->cpu, up_ret);
+}
+#else
+static void perf_retry_remove(struct perf_event *event)
+{
+}
+#endif
/*
* Remove the event from a task's (or a CPU's) list of events.
@@ -1208,19 +1230,22 @@
* When called from perf_event_exit_task, it's OK because the
* context has been detached from its task.
*/
-static void perf_remove_from_context(struct perf_event *event)
+static void __ref perf_remove_from_context(struct perf_event *event)
{
struct perf_event_context *ctx = event->ctx;
struct task_struct *task = ctx->task;
+ int ret;
lockdep_assert_held(&ctx->mutex);
if (!task) {
/*
- * Per cpu events are removed via an smp call and
- * the removal is always successful.
+ * Per cpu events are removed via an smp call
*/
- cpu_function_call(event->cpu, __perf_remove_from_context, event);
+ ret = cpu_function_call(event->cpu, __perf_remove_from_context,
+ event);
+ if (ret == -ENXIO)
+ perf_retry_remove(event);
return;
}
@@ -2934,6 +2959,14 @@
struct perf_event *event = file->private_data;
struct task_struct *owner;
+ /*
+ * Event can be in state OFF because of a constraint check.
+ * Change to ACTIVE so that it gets cleaned up correctly.
+ */
+ if ((event->state == PERF_EVENT_STATE_OFF) &&
+ event->attr.constraint_duplicate)
+ event->state = PERF_EVENT_STATE_ACTIVE;
+
file->private_data = NULL;
rcu_read_lock();
@@ -5171,6 +5204,7 @@
.read = perf_swevent_read,
.event_idx = perf_swevent_event_idx,
+ .events_across_hotplug = 1,
};
#ifdef CONFIG_EVENT_TRACING
@@ -5265,6 +5299,7 @@
.read = perf_swevent_read,
.event_idx = perf_swevent_event_idx,
+ .events_across_hotplug = 1,
};
static inline void perf_tp_register(void)
@@ -5492,6 +5527,7 @@
.read = cpu_clock_event_read,
.event_idx = perf_swevent_event_idx,
+ .events_across_hotplug = 1,
};
/*
@@ -5572,6 +5608,7 @@
.read = task_clock_event_read,
.event_idx = perf_swevent_event_idx,
+ .events_across_hotplug = 1,
};
static void perf_pmu_nop_void(struct pmu *pmu)
@@ -7029,11 +7066,20 @@
idx = srcu_read_lock(&pmus_srcu);
list_for_each_entry_rcu(pmu, &pmus, entry) {
- ctx = &per_cpu_ptr(pmu->pmu_cpu_context, cpu)->ctx;
+ /*
+ * If keeping events across hotplugging is supported, do not
+ * remove the event list, but keep it alive across CPU hotplug.
+ * The context is exited via an fd close path when userspace
+ * is done and the target CPU is online.
+ */
+ if (!pmu->events_across_hotplug) {
+ ctx = &per_cpu_ptr(pmu->pmu_cpu_context, cpu)->ctx;
- mutex_lock(&ctx->mutex);
- smp_call_function_single(cpu, __perf_event_exit_context, ctx, 1);
- mutex_unlock(&ctx->mutex);
+ mutex_lock(&ctx->mutex);
+ smp_call_function_single(cpu, __perf_event_exit_context,
+ ctx, 1);
+ mutex_unlock(&ctx->mutex);
+ }
}
srcu_read_unlock(&pmus_srcu, idx);
}
diff --git a/kernel/events/hw_breakpoint.c b/kernel/events/hw_breakpoint.c
index bb38c4d..98e6903 100644
--- a/kernel/events/hw_breakpoint.c
+++ b/kernel/events/hw_breakpoint.c
@@ -635,6 +635,7 @@
.read = hw_breakpoint_pmu_read,
.event_idx = hw_breakpoint_event_idx,
+ .events_across_hotplug = 1,
};
int __init init_hw_breakpoint(void)
diff --git a/kernel/time/alarmtimer.c b/kernel/time/alarmtimer.c
index aa27d39..a2a28a0 100644
--- a/kernel/time/alarmtimer.c
+++ b/kernel/time/alarmtimer.c
@@ -98,6 +98,8 @@
static inline void alarmtimer_rtc_timer_init(void)
{
+ mutex_init(&power_on_alarm_lock);
+
rtc_timer_init(&rtctimer, NULL, NULL);
}
@@ -123,6 +125,7 @@
static inline int alarmtimer_rtc_interface_setup(void) { return 0; }
static inline void alarmtimer_rtc_interface_remove(void) { }
static inline void alarmtimer_rtc_timer_init(void) { }
+void set_power_on_alarm(long secs, bool enable) { }
#endif
/**
diff --git a/lib/Kconfig b/lib/Kconfig
index 8437e36..09f0d8a 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -379,7 +379,7 @@
Implementation is done using GnuPG MPI library
config QMI_ENCDEC
- bool
+ bool "QMI Encode/Decode Library"
help
Library to encode & decode QMI messages from within
the kernel. The kernel drivers encode the C structure into
@@ -388,7 +388,7 @@
and then decode it into a C structure.
config QMI_ENCDEC_DEBUG
- bool
+ bool "QMI Encode/Decode Library Debug"
help
Kernel config option to enable debugging QMI Encode/Decode
library. This will log the information regarding the element
diff --git a/net/wireless/db.txt b/net/wireless/db.txt
index b1efe57..35b86ff 100644
--- a/net/wireless/db.txt
+++ b/net/wireless/db.txt
@@ -849,7 +849,7 @@
country TW:
(2402 - 2472 @ 40), (3, 27)
- (5270 - 5330 @ 80), (6, 17), DFS
+ (5270 - 5330 @ 40), (6, 17), DFS
(5490 - 5710 @ 80), (6, 30), DFS
(5735 - 5815 @ 80), (6, 30)
@@ -909,7 +909,7 @@
(5250 - 5330 @ 80), (3, 24), DFS
(5490 - 5600 @ 80), (3, 24), DFS
(5650 - 5710 @ 40), (3, 24), DFS
- (5735 - 5835 @ 80), (3, 30)
+ (5710 - 5835 @ 80), (3, 30)
# 60g band
# reference: http://cfr.regstoday.com/47cfr15.aspx#47_CFR_15p255
# channels 1,2,3, EIRP=40dBm(43dBm peak)
diff --git a/net/wireless/scan.c b/net/wireless/scan.c
index 3adfe7f..e40104f 100644
--- a/net/wireless/scan.c
+++ b/net/wireless/scan.c
@@ -1014,8 +1014,6 @@
if (wreq->scan_type == IW_SCAN_TYPE_PASSIVE)
creq->n_ssids = 0;
}
- for (i = 0; i < IEEE80211_NUM_BANDS; i++)
- creq->rates[i] = (1 << wiphy->bands[i]->n_bitrates) - 1;
for (i = 0; i < IEEE80211_NUM_BANDS; i++)
if (wiphy->bands[i])
diff --git a/sound/compress_offload/core.c b/sound/compress_offload/core.c
deleted file mode 100644
index 987594a..0000000
--- a/sound/compress_offload/core.c
+++ /dev/null
@@ -1,658 +0,0 @@
-/*
- * core.c - compress offload core
- *
- * Copyright (C) 2011 Intel Corporation
- * Authors: Vinod Koul <vinod.koul@linux.intel.com>
- * Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
- *
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- *
- */
-#include <linux/file.h>
-#include <linux/fs.h>
-#include <linux/list.h>
-#include <linux/miscdevice.h>
-#include <linux/mm.h>
-#include <linux/mutex.h>
-#include <linux/poll.h>
-#include <linux/slab.h>
-#include <linux/sched.h>
-#include <linux/uio.h>
-#include <linux/uaccess.h>
-#include <sound/snd_compress_params.h>
-#include <sound/compress_offload.h>
-#include <sound/compress_driver.h>
-
-/* TODO:
- * - Integrate with alsa, compressed devices should register as alsa devices
- * as /dev/snd_compr_xxx
- * - Integrate with ASoC:
- * Opening compressed path should also start the codec dai
- * TBD how the cpu dai will be viewed and started.
- * ASoC should always be optional part
- * (we should be able to use this framework in non asoc systems
- * - Multiple node representation
- * driver should be able to register multiple nodes
- * - Version numbering for API
- */
-
-static DEFINE_MUTEX(device_mutex);
-static LIST_HEAD(device_list);
-static LIST_HEAD(misc_list);
-
-/*
- * currently we are using misc device for registration and exposing ioctls
- * this is temporary and will be moved to snd
- * the device should be registered as /dev/snd_compr.....
- */
-
-struct snd_compr_misc {
- struct miscdevice misc;
- struct list_head list;
- struct snd_compr *compr;
-};
-
-struct snd_ioctl_data {
- struct snd_compr_misc *misc;
- unsigned long caps;
- unsigned int minor;
- struct snd_compr_stream stream;
-};
-
-static struct snd_compr_misc *snd_compr_get_device(unsigned int minor)
-{
- struct snd_compr_misc *misc;
-
- list_for_each_entry(misc, &misc_list, list) {
- if (minor == misc->misc.minor)
- return misc;
- }
- return NULL;
-}
-
-static int snd_compr_open(struct inode *inode, struct file *f)
-{
- unsigned int minor = iminor(inode);
- struct snd_compr_misc *misc = snd_compr_get_device(minor);
- struct snd_ioctl_data *data;
- struct snd_compr_runtime *runtime;
- unsigned int direction;
- int ret;
-
- mutex_lock(&device_mutex);
- if (f->f_flags & O_WRONLY)
- direction = SNDRV_PCM_STREAM_PLAYBACK;
- else {
- ret = -ENXIO;
- goto out;
- }
- /* curently only encoded playback is supported, above needs to be
- * removed once we have recording support */
-
- data = kzalloc(sizeof(*data), GFP_KERNEL);
- if (!data) {
- ret = -ENOMEM;
- goto out;
- }
- data->misc = misc;
- data->minor = minor;
- data->stream.ops = misc->compr->ops;
- data->stream.direction = direction;
- data->stream.private_data = misc->compr->private_data;
- data->stream.device = misc->compr;
- runtime = kzalloc(sizeof(*runtime), GFP_KERNEL);
- if (!runtime) {
- ret = -ENOMEM;
- kfree(data);
- goto out;
- }
- runtime->state = SNDRV_PCM_STATE_OPEN;
- init_waitqueue_head(&runtime->sleep);
- data->stream.runtime = runtime;
- f->private_data = (void *)data;
- ret = misc->compr->ops->open(&data->stream);
- if (ret) {
- kfree(runtime);
- kfree(data);
- goto out;
- }
-out:
- mutex_unlock(&device_mutex);
- return ret;
-}
-
-static int snd_compr_free(struct inode *inode, struct file *f)
-{
- struct snd_ioctl_data *data = f->private_data;
- mutex_lock(&device_mutex);
- data->stream.ops->free(&data->stream);
- kfree(data->stream.runtime->buffer);
- kfree(data->stream.runtime);
- kfree(data);
- mutex_unlock(&device_mutex);
- return 0;
-}
-
-static void snd_compr_update_tstamp(struct snd_compr_stream *stream,
- struct snd_compr_tstamp *tstamp)
-{
- stream->ops->pointer(stream, tstamp);
- stream->runtime->hw_pointer = tstamp->copied_bytes;
-}
-
-static size_t snd_compr_calc_avail(struct snd_compr_stream *stream,
- struct snd_compr_avail *avail)
-{
- size_t avail_calc;
-
- snd_compr_update_tstamp(stream, &avail->tstamp);
- avail_calc = stream->runtime->app_pointer - stream->runtime->hw_pointer;
- if (avail_calc < 0)
- avail_calc = stream->runtime->buffer_size + avail_calc;
- avail->avail = avail_calc;
- return avail_calc;
-}
-
-static size_t snd_compr_get_avail(struct snd_compr_stream *stream)
-{
- struct snd_compr_avail avail;
-
- return snd_compr_calc_avail(stream, &avail);
-}
-
-static int
-snd_compr_ioctl_avail(struct snd_compr_stream *stream, unsigned long arg)
-{
- struct snd_compr_avail ioctl_avail;
-
- snd_compr_calc_avail(stream, &ioctl_avail);
-
- if (copy_to_user((unsigned long __user *)arg, &ioctl_avail, sizeof(ioctl_avail)))
- return -EFAULT;
- return 0;
-}
-
-static int snd_compr_write_data(struct snd_compr_stream *stream,
- const char __user *buf, size_t count)
-{
- void *dstn;
- size_t copy;
-
- dstn = stream->runtime->buffer + stream->runtime->app_pointer;
- if (count < stream->runtime->buffer_size - stream->runtime->app_pointer) {
- if (copy_from_user(dstn, buf, count))
- return -EFAULT;
- stream->runtime->app_pointer += count;
- } else {
- copy = stream->runtime->buffer_size - stream->runtime->app_pointer;
- if (copy_from_user(dstn, buf, copy))
- return -EFAULT;
- if (copy_from_user(stream->runtime->buffer, buf + copy, count - copy))
- return -EFAULT;
- stream->runtime->app_pointer = count - copy;
- }
- /* if DSP cares, let it know data has been written */
- if (stream->ops->ack)
- stream->ops->ack(stream);
- return count;
-}
-
-static ssize_t snd_compr_write(struct file *f, const char __user *buf,
- size_t count, loff_t *offset)
-{
- struct snd_ioctl_data *data = f->private_data;
- struct snd_compr_stream *stream;
- size_t avail;
- int retval;
-
- BUG_ON(!data);
- stream = &data->stream;
- mutex_lock(&stream->device->lock);
- /* write is allowed when stream is running or has been steup */
- if (stream->runtime->state != SNDRV_PCM_STATE_SETUP &&
- stream->runtime->state != SNDRV_PCM_STATE_RUNNING) {
- mutex_unlock(&stream->device->lock);
- return -EPERM;
- }
-
- avail = snd_compr_get_avail(stream);
- /* calculate how much we can write to buffer */
- if (avail > count)
- avail = count;
-
- if (stream->ops->copy)
- retval = stream->ops->copy(stream, buf, avail);
- else
- retval = snd_compr_write_data(stream, buf, avail);
-
- /* while initiating the stream, write should be called before START
- * call, so in setup move state */
- if (stream->runtime->state == SNDRV_PCM_STATE_SETUP)
- stream->runtime->state = SNDRV_PCM_STATE_PREPARED;
-
- mutex_unlock(&stream->device->lock);
- return retval;
-}
-
-
-static ssize_t snd_compr_read(struct file *f, char __user *buf,
- size_t count, loff_t *offset)
-{
- return -ENXIO;
-}
-
-static int snd_compr_mmap(struct file *f, struct vm_area_struct *vma)
-{
- return -ENXIO;
-}
-
-unsigned int snd_compr_poll(struct file *f, poll_table *wait)
-{
- struct snd_ioctl_data *data = f->private_data;
- struct snd_compr_stream *stream;
- int retval = 0;
-
- BUG_ON(!data);
- stream = &data->stream;
-
- mutex_lock(&stream->device->lock);
- if (stream->runtime->state != SNDRV_PCM_STATE_RUNNING) {
- retval = -ENXIO;
- goto out;
- }
- poll_wait(f, &stream->runtime->sleep, wait);
-
- /* this would change after read is implemented, we would need to
- * check for direction here */
- if (stream->runtime->state != SNDRV_PCM_STATE_RUNNING)
- retval = POLLOUT | POLLWRNORM;
-out:
- mutex_unlock(&stream->device->lock);
- return retval;
-}
-
-void snd_compr_fragment_elapsed(struct snd_compr_stream *stream)
-{
- size_t avail;
-
- if (stream->direction != SNDRV_PCM_STREAM_PLAYBACK)
- return;
- avail = snd_compr_get_avail(stream);
- if (avail >= stream->runtime->fragment_size)
- wake_up(&stream->runtime->sleep);
-}
-EXPORT_SYMBOL_GPL(snd_compr_fragment_elapsed);
-
-void snd_compr_frame_elapsed(struct snd_compr_stream *stream)
-{
- size_t avail;
-
- if (stream->direction != SNDRV_PCM_STREAM_CAPTURE)
- return;
- avail = snd_compr_get_avail(stream);
- if (avail)
- wake_up(&stream->runtime->sleep);
-}
-EXPORT_SYMBOL_GPL(snd_compr_frame_elapsed);
-
-static int snd_compr_get_caps(struct snd_compr_stream *stream, unsigned long arg)
-{
- int retval;
- struct snd_compr_caps caps;
-
- if (!stream->ops->get_caps)
- return -ENXIO;
-
- retval = stream->ops->get_caps(stream, &caps);
- if (retval)
- goto out;
- if (copy_to_user((void __user *)arg, &caps, sizeof(caps)))
- retval = -EFAULT;
-out:
- return retval;
-}
-
-static int snd_compr_get_codec_caps(struct snd_compr_stream *stream, unsigned long arg)
-{
- int retval;
- struct snd_compr_codec_caps *caps;
-
- if (!stream->ops->get_codec_caps)
- return -ENXIO;
-
- caps = kmalloc(sizeof(*caps), GFP_KERNEL);
- if (!caps)
- return -ENOMEM;
-
- retval = stream->ops->get_codec_caps(stream, caps);
- if (retval)
- goto out;
- if (copy_to_user((void __user *)arg, caps, sizeof(*caps)))
- retval = -EFAULT;
-
-out:
- kfree(caps);
- return retval;
-}
-
-/* revisit this with snd_pcm_preallocate_xxx */
-static int snd_compr_allocate_buffer(struct snd_compr_stream *stream,
- struct snd_compr_params *params)
-{
- unsigned int buffer_size;
- void *buffer;
-
- buffer_size = params->buffer.fragment_size * params->buffer.fragments;
- if (stream->ops->copy) {
- buffer = NULL;
- /* if copy is defined the driver will be required to copy
- * the data from core
- */
- } else {
- buffer = kmalloc(buffer_size, GFP_KERNEL);
- if (!buffer)
- return -ENOMEM;
- }
- stream->runtime->fragment_size = params->buffer.fragment_size;
- stream->runtime->fragments = params->buffer.fragments;
- stream->runtime->buffer = buffer;
- stream->runtime->buffer_size = buffer_size;
- return 0;
-}
-
-static int snd_compr_set_params(struct snd_compr_stream *stream, unsigned long arg)
-{
- struct snd_compr_params *params;
- int retval;
-
- if (stream->runtime->state == SNDRV_PCM_STATE_OPEN) {
- /*
- * we should allow parameter change only when stream has been
- * opened not in other cases
- */
- params = kmalloc(sizeof(*params), GFP_KERNEL);
- if (!params)
- return -ENOMEM;
- if (copy_from_user(params, (void __user *)arg, sizeof(*params)))
- return -EFAULT;
- retval = snd_compr_allocate_buffer(stream, params);
- if (retval) {
- kfree(params);
- return -ENOMEM;
- }
- retval = stream->ops->set_params(stream, params);
- if (retval)
- goto out;
- stream->runtime->state = SNDRV_PCM_STATE_SETUP;
- } else
- return -EPERM;
-out:
- kfree(params);
- return retval;
-}
-
-static int snd_compr_get_params(struct snd_compr_stream *stream, unsigned long arg)
-{
- struct snd_compr_params *params;
- int retval;
-
- if (!stream->ops->get_params)
- return -ENXIO;
-
- params = kmalloc(sizeof(*params), GFP_KERNEL);
- if (!params)
- return -ENOMEM;
- retval = stream->ops->get_params(stream, params);
- if (retval)
- goto out;
- if (copy_to_user((char __user *)arg, params, sizeof(*params)))
- retval = -EFAULT;
-
-out:
- kfree(params);
- return retval;
-}
-
-static int snd_compr_tstamp(struct snd_compr_stream *stream, unsigned long arg)
-{
- struct snd_compr_tstamp tstamp;
-
- snd_compr_update_tstamp(stream, &tstamp);
- if (copy_to_user((struct snd_compr_tstamp __user *)arg, &tstamp, sizeof(tstamp)))
- return -EFAULT;
- return 0;
-}
-
-static int snd_compr_pause(struct snd_compr_stream *stream)
-{
- int retval;
-
- if (stream->runtime->state == SNDRV_PCM_STATE_PAUSED)
- return 0;
- retval = stream->ops->trigger(stream, SNDRV_PCM_TRIGGER_PAUSE_PUSH);
- if (!retval) {
- stream->runtime->state = SNDRV_PCM_STATE_PAUSED;
- wake_up(&stream->runtime->sleep);
- }
- return retval;
-}
-
-static int snd_compr_resume(struct snd_compr_stream *stream)
-{
- int retval;
-
- if (stream->runtime->state != SNDRV_PCM_STATE_PAUSED)
- return -EPERM;
- retval = stream->ops->trigger(stream, SNDRV_PCM_TRIGGER_PAUSE_RELEASE);
- if (!retval)
- stream->runtime->state = SNDRV_PCM_STATE_RUNNING;
- return retval;
-}
-
-static int snd_compr_start(struct snd_compr_stream *stream)
-{
- int retval;
-
- if (stream->runtime->state != SNDRV_PCM_STATE_PREPARED)
- return -EPERM;
- retval = stream->ops->trigger(stream, SNDRV_PCM_TRIGGER_START);
- if (!retval)
- stream->runtime->state = SNDRV_PCM_STATE_RUNNING;
- return retval;
-}
-
-static int snd_compr_stop(struct snd_compr_stream *stream)
-{
- int retval;
-
- if (stream->runtime->state != SNDRV_PCM_STATE_PREPARED)
- return -EPERM;
- retval = stream->ops->trigger(stream, SNDRV_PCM_TRIGGER_STOP);
- if (!retval) {
- stream->runtime->state = SNDRV_PCM_STATE_SETUP;
- wake_up(&stream->runtime->sleep);
- }
- return retval;
-}
-
-static int snd_compr_drain(struct snd_compr_stream *stream)
-{
- int retval;
-
- if (stream->runtime->state != SNDRV_PCM_STATE_PREPARED ||
- stream->runtime->state != SNDRV_PCM_STATE_PAUSED)
- return -EPERM;
- retval = stream->ops->trigger(stream, SND_COMPR_TRIGGER_DRAIN);
- if (!retval) {
- stream->runtime->state = SNDRV_PCM_STATE_SETUP;
- wake_up(&stream->runtime->sleep);
- }
- return retval;
-}
-
-static long snd_compr_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
-{
- struct snd_ioctl_data *data = f->private_data;
- struct snd_compr_stream *stream;
- int retval = -ENOTTY;
-
- BUG_ON(!data);
- stream = &data->stream;
- mutex_lock(&stream->device->lock);
- switch (_IOC_NR(cmd)) {
- case _IOC_NR(SNDRV_COMPRESS_GET_CAPS):
- retval = snd_compr_get_caps(stream, arg);
- break;
- case _IOC_NR(SNDRV_COMPRESS_GET_CODEC_CAPS):
- retval = snd_compr_get_codec_caps(stream, arg);
- break;
- case _IOC_NR(SNDRV_COMPRESS_SET_PARAMS):
- retval = snd_compr_set_params(stream, arg);
- break;
- case _IOC_NR(SNDRV_COMPRESS_GET_PARAMS):
- retval = snd_compr_get_params(stream, arg);
- break;
- case _IOC_NR(SNDRV_COMPRESS_TSTAMP):
- retval = snd_compr_tstamp(stream, arg);
- break;
- case _IOC_NR(SNDRV_COMPRESS_AVAIL):
- retval = snd_compr_ioctl_avail(stream, arg);
- case _IOC_NR(SNDRV_COMPRESS_PAUSE):
- retval = snd_compr_pause(stream);
- break;
- case _IOC_NR(SNDRV_COMPRESS_RESUME):
- retval = snd_compr_resume(stream);
- break;
- case _IOC_NR(SNDRV_COMPRESS_START):
- retval = snd_compr_start(stream);
- break;
- case _IOC_NR(SNDRV_COMPRESS_STOP):
- retval = snd_compr_stop(stream);
- break;
- case _IOC_NR(SNDRV_COMPRESS_DRAIN):
- cmd = SND_COMPR_TRIGGER_DRAIN;
- retval = snd_compr_drain(stream);
- break;
- }
- mutex_unlock(&stream->device->lock);
- return retval;
-}
-
-static const struct file_operations snd_comp_file = {
- .owner = THIS_MODULE,
- .open = snd_compr_open,
- .release = snd_compr_free,
- .read = snd_compr_read,
- .write = snd_compr_write,
- .unlocked_ioctl = snd_compr_ioctl,
- .mmap = snd_compr_mmap,
- .poll = snd_compr_poll,
-};
-
-static int snd_compress_add_device(struct snd_compr *device)
-{
- int ret;
-
- struct snd_compr_misc *misc = kzalloc(sizeof(*misc), GFP_KERNEL);
-
- misc->misc.name = device->name;
- misc->misc.fops = &snd_comp_file;
- misc->misc.minor = MISC_DYNAMIC_MINOR;
- misc->compr = device;
- ret = misc_register(&misc->misc);
- if (ret) {
- pr_err("couldn't register misc device\n");
- kfree(misc);
- } else {
- pr_debug("Got minor %d\n", misc->misc.minor);
- list_add_tail(&misc->list, &misc_list);
- }
- return ret;
-}
-
-static int snd_compress_remove_device(struct snd_compr *device)
-{
- struct snd_compr_misc *misc, *__misc;
-
- list_for_each_entry_safe(misc, __misc, &misc_list, list) {
- if (device == misc->compr) {
- misc_deregister(&misc->misc);
- list_del(&device->list);
- kfree(misc);
- }
- }
- return 0;
-}
-/**
- * snd_compress_register - register compressed device
- *
- * @device: compressed device to register
- */
-int snd_compress_register(struct snd_compr *device)
-{
- int retval;
-
- if (device->name == NULL || device->dev == NULL || device->ops == NULL)
- return -EINVAL;
- BUG_ON(!device->ops->open);
- BUG_ON(!device->ops->free);
- BUG_ON(!device->ops->set_params);
- BUG_ON(!device->ops->get_params);
- BUG_ON(!device->ops->trigger);
- BUG_ON(!device->ops->pointer);
- BUG_ON(!device->ops->get_caps);
- BUG_ON(!device->ops->get_codec_caps);
-
- INIT_LIST_HEAD(&device->list);
- /* todo register the compressed streams */
- /* todo integrate with asoc */
-
- /* register a compressed card TBD if this needs change */
-
- pr_debug("Registering compressed device %s\n", device->name);
- mutex_lock(&device_mutex);
- /* register a msic device for now */
- retval = snd_compress_add_device(device);
- if (!retval)
- list_add_tail(&device->list, &device_list);
- mutex_unlock(&device_mutex);
- return retval;
-}
-EXPORT_SYMBOL_GPL(snd_compress_register);
-
-int snd_compress_deregister(struct snd_compr *device)
-{
- pr_debug("Removing compressed device %s\n", device->name);
- mutex_lock(&device_mutex);
- snd_compress_remove_device(device);
- list_del(&device->list);
- mutex_unlock(&device_mutex);
- return 0;
-}
-EXPORT_SYMBOL_GPL(snd_compress_deregister);
-
-static int __init snd_compress_init(void)
-{
- return 0;
-}
-
-static void __exit snd_compress_exit(void)
-{
-}
-
-module_init(snd_compress_init);
-module_exit(snd_compress_exit);
diff --git a/sound/soc/codecs/msm8x10-wcd.c b/sound/soc/codecs/msm8x10-wcd.c
index 1962ff0..7706e3e 100644
--- a/sound/soc/codecs/msm8x10-wcd.c
+++ b/sound/soc/codecs/msm8x10-wcd.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -50,6 +50,8 @@
#define BITS_PER_REG 8
#define MSM8X10_WCD_TX_PORT_NUMBER 4
+#define DAPM_MICBIAS_EXTERNAL_STANDALONE "MIC BIAS External Standalone"
+
#define MSM8X10_WCD_I2S_MASTER_MODE_MASK 0x08
#define MSM8X10_DINO_CODEC_BASE_ADDR 0xFE043000
#define MSM8X10_DINO_CODEC_REG_SIZE 0x200
@@ -395,6 +397,32 @@
return temp;
}
+static int __msm8x10_wcd_bulk_write(struct msm8x10_wcd *msm8x10_wcd,
+ unsigned short reg, int count, u8 *buf)
+{
+ int ret = -EINVAL;
+ mutex_lock(&msm8x10_wcd->io_lock);
+ if (MSM8X10_WCD_IS_HELICON_REG(reg))
+ ret = msm8x10_wcd_i2c_write(reg, count, buf);
+ else if (MSM8X10_WCD_IS_DINO_REG(reg))
+ ret = msm8x10_wcd_abh_write_device(msm8x10_wcd, reg,
+ buf, count);
+ if (ret < 0)
+ dev_err(msm8x10_wcd->dev,
+ "%s: codec bulk write failed\n", __func__);
+ mutex_unlock(&msm8x10_wcd->io_lock);
+ return ret;
+}
+
+int msm8x10_wcd_bulk_write(struct wcd9xxx_core_resource *core_res,
+ unsigned short reg, int count, u8 *buf)
+{
+ struct msm8x10_wcd *msm8x10_wcd =
+ (struct msm8x10_wcd *) core_res->parent;
+ return __msm8x10_wcd_bulk_write(msm8x10_wcd, reg, count, buf);
+}
+EXPORT_SYMBOL(msm8x10_wcd_bulk_write);
+
int msm8x10_wcd_reg_read(struct wcd9xxx_core_resource *core_res,
unsigned short reg)
{
@@ -1271,6 +1299,10 @@
"ZERO", "RX3", "RX2"
};
+static const char * const rx_rdac3_text[] = {
+ "RX1", "RX2"
+};
+
static const struct soc_enum rx_mix1_inp1_chain_enum =
SOC_ENUM_SINGLE(MSM8X10_WCD_A_CDC_CONN_RX1_B1_CTL, 0, 6, rx_mix1_text);
@@ -1312,6 +1344,10 @@
SOC_ENUM_SINGLE(MSM8X10_WCD_A_CDC_CONN_LO_DAC_CTL, 0, 3,
rx_rdac4_text);
+static const struct soc_enum rx_rdac3_enum =
+ SOC_ENUM_SINGLE(MSM8X10_WCD_A_CDC_CONN_HPHR_DAC_CTL, 0, 2,
+ rx_rdac3_text);
+
static const struct soc_enum adc2_enum =
SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
@@ -1345,6 +1381,9 @@
static const struct snd_kcontrol_new rx_dac4_mux =
SOC_DAPM_ENUM("RDAC4 MUX Mux", rx_rdac4_enum);
+static const struct snd_kcontrol_new rx_dac3_mux =
+ SOC_DAPM_ENUM("RDAC3 MUX Mux", rx_rdac3_enum);
+
static const struct snd_kcontrol_new tx_adc2_mux =
SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
@@ -1635,6 +1674,8 @@
/* Always pull up TxFe for TX2 to Micbias */
snd_soc_update_bits(codec, micb_int_reg, 0x04, 0x04);
+ snd_soc_update_bits(codec, MSM8X10_WCD_A_MICB_1_CTL,
+ 0x80, 0x80);
break;
case SND_SOC_DAPM_POST_PMU:
usleep_range(20000, 20100);
@@ -1642,6 +1683,8 @@
wcd9xxx_resmgr_notifier_call(&msm8x10_wcd->resmgr, e_post_on);
break;
case SND_SOC_DAPM_POST_PMD:
+ snd_soc_update_bits(codec, MSM8X10_WCD_A_MICB_1_CTL,
+ 0x80, 0x00);
/* Let MBHC module know so micbias switch to be off */
wcd9xxx_resmgr_notifier_call(&msm8x10_wcd->resmgr, e_post_off);
@@ -1972,7 +2015,10 @@
{"DAC1", "Switch", "RX1 CHAIN"},
{"HPHL DAC", "Switch", "RX1 CHAIN"},
- {"HPHR DAC", NULL, "RX2 CHAIN"},
+ {"HPHR DAC", NULL, "RDAC3 MUX"},
+
+ {"RDAC3 MUX", "RX1", "RX1 CHAIN"},
+ {"RDAC3 MUX", "RX2", "RX2 CHAIN"},
{"LINEOUT", NULL, "LINEOUT PA"},
{"SPK_OUT", NULL, "SPK PA"},
@@ -2300,7 +2346,8 @@
SND_SOC_DAPM_OUTPUT("EAR"),
SND_SOC_DAPM_PGA_E("EAR PA", MSM8X10_WCD_A_RX_EAR_EN, 4, 0, NULL, 0,
- msm8x10_wcd_codec_enable_ear_pa, SND_SOC_DAPM_POST_PMU),
+ msm8x10_wcd_codec_enable_ear_pa,
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
SND_SOC_DAPM_MIXER("DAC1", MSM8X10_WCD_A_RX_EAR_EN, 6, 0, dac1_switch,
ARRAY_SIZE(dac1_switch)),
@@ -2414,6 +2461,8 @@
&rx2_mix2_inp1_mux),
SND_SOC_DAPM_MUX("RDAC4 MUX", SND_SOC_NOPM, 0, 0,
&rx_dac4_mux),
+ SND_SOC_DAPM_MUX("RDAC3 MUX", SND_SOC_NOPM, 0, 0,
+ &rx_dac3_mux),
SND_SOC_DAPM_SUPPLY("MICBIAS_REGULATOR", SND_SOC_NOPM,
ON_DEMAND_MICBIAS, 0,
@@ -2458,6 +2507,11 @@
MSM8X10_WCD_A_MICB_1_CTL, 7, 0,
msm8x10_wcd_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_MICBIAS_E(DAPM_MICBIAS_EXTERNAL_STANDALONE,
+ MSM8X10_WCD_A_MICB_1_CTL,
+ 7, 0, msm8x10_wcd_codec_enable_micbias,
+ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
+ SND_SOC_DAPM_POST_PMD),
SND_SOC_DAPM_ADC_E("ADC1", NULL, MSM8X10_WCD_A_TX_1_EN, 7, 0,
msm8x10_wcd_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
@@ -2709,6 +2763,30 @@
return ret;
}
+static int msm8x10_wcd_enable_mbhc_micbias(struct snd_soc_codec *codec,
+ bool enable)
+{
+ int rc;
+
+ if (enable)
+ rc = snd_soc_dapm_force_enable_pin(&codec->dapm,
+ DAPM_MICBIAS_EXTERNAL_STANDALONE);
+ else
+ rc = snd_soc_dapm_disable_pin(&codec->dapm,
+ DAPM_MICBIAS_EXTERNAL_STANDALONE);
+ snd_soc_dapm_sync(&codec->dapm);
+
+ snd_soc_update_bits(codec, WCD9XXX_A_MICB_1_CTL,
+ 0x80, enable ? 0x80 : 0x00);
+ if (rc)
+ pr_debug("%s: Failed to force %s micbias", __func__,
+ enable ? "enable" : "disable");
+ else
+ pr_debug("%s: Trying force %s micbias", __func__,
+ enable ? "enable" : "disable");
+ return rc;
+}
+
static void msm8x10_wcd_micb_internal(struct snd_soc_codec *codec, bool on)
{
snd_soc_update_bits(codec, MSM8X10_WCD_A_MICB_1_INT_RBIAS,
@@ -3191,7 +3269,8 @@
ret = wcd9xxx_mbhc_init(&msm8x10_wcd_priv->mbhc,
&msm8x10_wcd_priv->resmgr,
- codec, NULL, &mbhc_cb, &cdc_intr_ids,
+ codec, msm8x10_wcd_enable_mbhc_micbias,
+ &mbhc_cb, &cdc_intr_ids,
HELICON_MCLK_CLK_9P6MHZ, true);
if (ret) {
dev_err(msm8x10_wcd->dev, "%s: Failed to initialize mbhc\n",
@@ -3565,7 +3644,8 @@
MSM8X10_WCD_NUM_IRQ_REGS,
msm8x10_wcd_reg_read,
msm8x10_wcd_reg_write,
- msm8x10_wcd_bulk_read);
+ msm8x10_wcd_bulk_read,
+ msm8x10_wcd_bulk_write);
if (wcd9xxx_core_irq_init(core_res)) {
dev_err(msm8x10->dev,
"%s: irq initialization failed\n", __func__);
diff --git a/sound/soc/codecs/msm_hdmi_codec_rx.c b/sound/soc/codecs/msm_hdmi_codec_rx.c
index 73c9547e..9cf37b4 100644
--- a/sound/soc/codecs/msm_hdmi_codec_rx.c
+++ b/sound/soc/codecs/msm_hdmi_codec_rx.c
@@ -21,8 +21,6 @@
#define MSM_HDMI_PCM_RATES SNDRV_PCM_RATE_48000
-static int msm_hdmi_audio_codec_return_value;
-
struct msm_hdmi_audio_codec_rx_data {
struct platform_device *hdmi_core_pdev;
struct msm_hdmi_audio_codec_ops hdmi_ops;
@@ -86,18 +84,18 @@
struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
+ int rv;
struct msm_hdmi_audio_codec_rx_data *codec_data =
dev_get_drvdata(dai->codec->dev);
- msm_hdmi_audio_codec_return_value =
- codec_data->hdmi_ops.hdmi_cable_status(
+ rv = codec_data->hdmi_ops.hdmi_cable_status(
codec_data->hdmi_core_pdev, 1);
- if (IS_ERR_VALUE(msm_hdmi_audio_codec_return_value)) {
+ if (IS_ERR_VALUE(rv)) {
dev_err(dai->dev,
"%s() HDMI core is not ready\n", __func__);
}
- return msm_hdmi_audio_codec_return_value;
+ return rv;
}
static int msm_hdmi_audio_codec_rx_dai_hw_params(
@@ -109,16 +107,17 @@
u32 level_shift = 0; /* 0dB */
bool down_mix = 0;
u32 num_channels = params_channels(params);
- int rc = 0;
+ int rv = 0;
struct msm_hdmi_audio_codec_rx_data *codec_data =
dev_get_drvdata(dai->codec->dev);
- /*refer to HDMI spec CEA-861-E: Table 28 Audio InfoFrame Data Byte 4*/
- if (IS_ERR_VALUE(msm_hdmi_audio_codec_return_value)) {
+ rv = codec_data->hdmi_ops.hdmi_cable_status(
+ codec_data->hdmi_core_pdev, 1);
+ if (IS_ERR_VALUE(rv)) {
dev_err(dai->dev,
"%s() HDMI core is not ready\n", __func__);
- return msm_hdmi_audio_codec_return_value;
+ return rv;
}
switch (num_channels) {
@@ -153,16 +152,16 @@
__func__, num_channels, params_rate(params),
channel_allocation);
- rc = codec_data->hdmi_ops.audio_info_setup(
+ rv = codec_data->hdmi_ops.audio_info_setup(
codec_data->hdmi_core_pdev,
params_rate(params), num_channels,
channel_allocation, level_shift, down_mix);
- if (IS_ERR_VALUE(rc)) {
+ if (IS_ERR_VALUE(rv)) {
dev_err(dai->dev,
"%s() HDMI core is not ready\n", __func__);
}
- return rc;
+ return rv;
}
static void msm_hdmi_audio_codec_rx_dai_shutdown(
diff --git a/sound/soc/codecs/wcd9306.c b/sound/soc/codecs/wcd9306.c
index 27ea648..07f4a5b 100644
--- a/sound/soc/codecs/wcd9306.c
+++ b/sound/soc/codecs/wcd9306.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1120,7 +1120,7 @@
SOC_SINGLE_TLV("LINEOUT2 Volume", TAPAN_A_RX_LINE_2_GAIN, 0, 14, 1,
line_gain),
- SOC_SINGLE_TLV("SPK DRV Volume", TAPAN_A_SPKR_DRV_GAIN, 3, 7, 1,
+ SOC_SINGLE_TLV("SPK DRV Volume", TAPAN_A_SPKR_DRV_GAIN, 3, 8, 1,
line_gain),
SOC_SINGLE_TLV("ADC1 Volume", TAPAN_A_TX_1_EN, 2, 19, 0, analog_gain),
@@ -1888,9 +1888,10 @@
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
- if (w->reg == TAPAN_A_TX_3_EN)
+ if (w->reg == TAPAN_A_TX_3_EN ||
+ w->reg == TAPAN_A_TX_1_EN)
wcd9xxx_resmgr_notifier_call(&tapan->resmgr,
- WCD9XXX_EVENT_PRE_TX_3_ON);
+ WCD9XXX_EVENT_PRE_TX_1_3_ON);
snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift,
1 << init_bit_shift);
break;
@@ -1900,9 +1901,10 @@
break;
case SND_SOC_DAPM_POST_PMD:
- if (w->reg == TAPAN_A_TX_3_EN)
+ if (w->reg == TAPAN_A_TX_3_EN ||
+ w->reg == TAPAN_A_TX_1_EN)
wcd9xxx_resmgr_notifier_call(&tapan->resmgr,
- WCD9XXX_EVENT_POST_TX_3_OFF);
+ WCD9XXX_EVENT_POST_TX_1_3_OFF);
break;
}
return 0;
diff --git a/sound/soc/codecs/wcd9xxx-mbhc.c b/sound/soc/codecs/wcd9xxx-mbhc.c
index a7d1563..32ca0c6 100644
--- a/sound/soc/codecs/wcd9xxx-mbhc.c
+++ b/sound/soc/codecs/wcd9xxx-mbhc.c
@@ -1468,6 +1468,12 @@
type = PLUG_TYPE_INVALID;
}
}
+
+ if (type == PLUG_TYPE_HEADSET &&
+ (mbhc->mbhc_cfg->micbias_enable_flags &
+ (1 << MBHC_MICBIAS_ENABLE_REGULAR_HEADSET)))
+ mbhc->micbias_enable = true;
+
exit:
pr_debug("%s: Plug type %d detected\n", __func__, type);
return type;
@@ -2038,7 +2044,8 @@
/* if PA is already on, switch micbias source to VDDIO */
if (mbhc->event_state &
- (1 << MBHC_EVENT_PA_HPHL | 1 << MBHC_EVENT_PA_HPHR))
+ (1 << MBHC_EVENT_PA_HPHL | 1 << MBHC_EVENT_PA_HPHR |
+ 1 << MBHC_EVENT_PRE_TX_1_3_ON))
__wcd9xxx_switch_micbias(mbhc, 1, false, false);
wcd9xxx_start_hs_polling(mbhc);
} else if (plug_type == PLUG_TYPE_HIGH_HPH) {
@@ -4269,6 +4276,14 @@
if (!mbhc->polling_active)
wcd9xxx_enable_mbhc_txfe(mbhc, false);
}
+ if (mbhc->micbias_enable && mbhc->polling_active &&
+ !(snd_soc_read(mbhc->codec, mbhc->mbhc_bias_regs.ctl_reg)
+ & 0x80)) {
+ pr_debug("%s:Micbias turned off by recording, set up again",
+ __func__);
+ snd_soc_update_bits(codec, mbhc->mbhc_bias_regs.ctl_reg,
+ 0x80, 0x80);
+ }
break;
/* PA usage change */
case WCD9XXX_EVENT_PRE_HPHL_PA_ON:
@@ -4289,7 +4304,7 @@
hphlocp_off_report(mbhc, SND_JACK_OC_HPHL);
if (!(mbhc->event_state &
(1 << MBHC_EVENT_PA_HPHL | 1 << MBHC_EVENT_PA_HPHR |
- 1 << MBHC_EVENT_PRE_TX_3_ON)))
+ 1 << MBHC_EVENT_PRE_TX_1_3_ON)))
wcd9xxx_switch_micbias(mbhc, 0);
break;
case WCD9XXX_EVENT_POST_HPHR_PA_OFF:
@@ -4301,7 +4316,7 @@
hphrocp_off_report(mbhc, SND_JACK_OC_HPHL);
if (!(mbhc->event_state &
(1 << MBHC_EVENT_PA_HPHL | 1 << MBHC_EVENT_PA_HPHR |
- 1 << MBHC_EVENT_PRE_TX_3_ON)))
+ 1 << MBHC_EVENT_PRE_TX_1_3_ON)))
wcd9xxx_switch_micbias(mbhc, 0);
break;
/* Clock usage change */
@@ -4383,23 +4398,23 @@
case WCD9XXX_EVENT_POST_BG_MBHC_ON:
/* Not used for now */
break;
- case WCD9XXX_EVENT_PRE_TX_3_ON:
+ case WCD9XXX_EVENT_PRE_TX_1_3_ON:
/*
* if polling is ON, mbhc micbias not enabled
* switch micbias source to VDDIO
*/
- set_bit(MBHC_EVENT_PRE_TX_3_ON, &mbhc->event_state);
+ set_bit(MBHC_EVENT_PRE_TX_1_3_ON, &mbhc->event_state);
if (!(snd_soc_read(codec, mbhc->mbhc_bias_regs.ctl_reg)
& 0x80) &&
mbhc->polling_active && !mbhc->mbhc_micbias_switched)
wcd9xxx_switch_micbias(mbhc, 1);
break;
- case WCD9XXX_EVENT_POST_TX_3_OFF:
+ case WCD9XXX_EVENT_POST_TX_1_3_OFF:
/*
* Switch back to micbias if HPH PA or TX3 path
* is disabled
*/
- clear_bit(MBHC_EVENT_PRE_TX_3_ON, &mbhc->event_state);
+ clear_bit(MBHC_EVENT_PRE_TX_1_3_ON, &mbhc->event_state);
if (mbhc->polling_active && mbhc->mbhc_micbias_switched &&
!(mbhc->event_state & (1 << MBHC_EVENT_PA_HPHL |
1 << MBHC_EVENT_PA_HPHR)))
diff --git a/sound/soc/codecs/wcd9xxx-mbhc.h b/sound/soc/codecs/wcd9xxx-mbhc.h
index 98f73fc..b5031a6 100644
--- a/sound/soc/codecs/wcd9xxx-mbhc.h
+++ b/sound/soc/codecs/wcd9xxx-mbhc.h
@@ -123,8 +123,8 @@
enum wcd9xxx_mbhc_event_state {
MBHC_EVENT_PA_HPHL,
MBHC_EVENT_PA_HPHR,
- MBHC_EVENT_PRE_TX_3_ON,
- MBHC_EVENT_POST_TX_3_OFF,
+ MBHC_EVENT_PRE_TX_1_3_ON,
+ MBHC_EVENT_POST_TX_1_3_OFF,
};
struct wcd9xxx_mbhc_general_cfg {
diff --git a/sound/soc/codecs/wcd9xxx-resmgr.c b/sound/soc/codecs/wcd9xxx-resmgr.c
index e56b182..4843b51 100644
--- a/sound/soc/codecs/wcd9xxx-resmgr.c
+++ b/sound/soc/codecs/wcd9xxx-resmgr.c
@@ -92,8 +92,8 @@
"WCD9XXX_EVENT_POST_RESUME",
- "WCD9XXX_EVENT_PRE_TX_3_ON",
- "WCD9XXX_EVENT_POST_TX_3_OFF",
+ "WCD9XXX_EVENT_PRE_TX_1_3_ON",
+ "WCD9XXX_EVENT_POST_TX_1_3_OFF",
"WCD9XXX_EVENT_LAST",
};
diff --git a/sound/soc/codecs/wcd9xxx-resmgr.h b/sound/soc/codecs/wcd9xxx-resmgr.h
index 9f383b6..29896fc 100644
--- a/sound/soc/codecs/wcd9xxx-resmgr.h
+++ b/sound/soc/codecs/wcd9xxx-resmgr.h
@@ -105,8 +105,8 @@
WCD9XXX_EVENT_POST_RESUME,
- WCD9XXX_EVENT_PRE_TX_3_ON,
- WCD9XXX_EVENT_POST_TX_3_OFF,
+ WCD9XXX_EVENT_PRE_TX_1_3_ON,
+ WCD9XXX_EVENT_POST_TX_1_3_OFF,
WCD9XXX_EVENT_LAST,
};
diff --git a/sound/soc/msm/msm-compr-q6.c b/sound/soc/msm/msm-compr-q6.c
index 373090e..635f125 100644
--- a/sound/soc/msm/msm-compr-q6.c
+++ b/sound/soc/msm/msm-compr-q6.c
@@ -1179,7 +1179,13 @@
char modelId[128];
struct snd_dec_dts opt_dts =
compr->info.codec_param.codec.dts;
- int modelIdLength = opt_dts.modelIdLength;
+ unsigned int modelIdLength = opt_dts.modelIdLength;
+ if (modelIdLength >= sizeof(modelId)) {
+ rc = -EINVAL;
+ pr_err("%s: ERROR: modelIdLength is"
+ "invalid\n", __func__);
+ return rc;
+ }
if (copy_from_user(modelId, (void *)opt_dts.modelId,
modelIdLength))
pr_err("%s: ERROR: copy modelId\n", __func__);
@@ -1222,8 +1228,14 @@
char modelId[128];
struct snd_dec_dts opt_dts =
compr->info.codec_param.codec.dts;
- int modelIdLength = opt_dts.modelIdLength;
+ unsigned int modelIdLength = opt_dts.modelIdLength;
pr_debug("SND_AUDIOCODEC_DTS\n");
+ if (modelIdLength >= sizeof(modelId)) {
+ rc = -EINVAL;
+ pr_err("%s: ERROR: modelIdLength is"
+ "invalid\n", __func__);
+ return rc;
+ }
if (copy_from_user(modelId, (void *)opt_dts.modelId,
modelIdLength))
pr_err("%s: ERROR: copy modelId\n", __func__);
diff --git a/sound/soc/msm/msm8x10.c b/sound/soc/msm/msm8x10.c
index c1ba26a..caf81fc 100644
--- a/sound/soc/msm/msm8x10.c
+++ b/sound/soc/msm/msm8x10.c
@@ -99,6 +99,8 @@
.insert_detect = true,
.swap_gnd_mic = NULL,
.use_int_rbias = false,
+ .micbias_enable_flags = 1 << MBHC_MICBIAS_ENABLE_THRESHOLD_HEADSET |
+ 1 << MBHC_MICBIAS_ENABLE_REGULAR_HEADSET,
.cs_enable_flags = (1 << MBHC_CS_ENABLE_POLLING |
1 << MBHC_CS_ENABLE_INSERTION |
1 << MBHC_CS_ENABLE_REMOVAL),
@@ -607,21 +609,21 @@
btn_high = wcd9xxx_mbhc_cal_btn_det_mp(btn_cfg,
MBHC_BTN_DET_V_BTN_HIGH);
btn_low[0] = -50;
- btn_high[0] = 10;
- btn_low[1] = 11;
- btn_high[1] = 52;
- btn_low[2] = 53;
- btn_high[2] = 94;
- btn_low[3] = 95;
- btn_high[3] = 133;
- btn_low[4] = 134;
- btn_high[4] = 171;
- btn_low[5] = 172;
- btn_high[5] = 208;
- btn_low[6] = 209;
- btn_high[6] = 244;
- btn_low[7] = 245;
- btn_high[7] = 330;
+ btn_high[0] = 20;
+ btn_low[1] = 21;
+ btn_high[1] = 61;
+ btn_low[2] = 62;
+ btn_high[2] = 104;
+ btn_low[3] = 105;
+ btn_high[3] = 148;
+ btn_low[4] = 149;
+ btn_high[4] = 189;
+ btn_low[5] = 190;
+ btn_high[5] = 228;
+ btn_low[6] = 229;
+ btn_high[6] = 269;
+ btn_low[7] = 270;
+ btn_high[7] = 500;
n_ready = wcd9xxx_mbhc_cal_btn_det_mp(btn_cfg, MBHC_BTN_DET_N_READY);
n_ready[0] = 80;
n_ready[1] = 68;
diff --git a/sound/soc/msm/qdsp6v2/audio_ocmem.c b/sound/soc/msm/qdsp6v2/audio_ocmem.c
index 4a25606..3fe8033 100644
--- a/sound/soc/msm/qdsp6v2/audio_ocmem.c
+++ b/sound/soc/msm/qdsp6v2/audio_ocmem.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -79,7 +79,7 @@
#define clear_bit_pos(x, y) (atomic_set(&x, (atomic_read(&x) & (~(1 << y)))))
#define test_bit_pos(x, y) ((atomic_read(&x)) & (1 << y))
-static int enable_ocmem_audio_voice = 1;
+static int enable_ocmem_audio_voice;
module_param(enable_ocmem_audio_voice, int,
S_IRUGO | S_IWUSR | S_IWGRP);
MODULE_PARM_DESC(enable_ocmem_audio_voice, "control OCMEM usage for audio/voice");
@@ -536,6 +536,7 @@
mutex_unlock(&audio_ocmem_lcl.state_process_lock);
fail_cmd:
pr_debug("%s: exit\n", __func__);
+ audio_ocmem_lcl.buf = NULL;
audio_ocmem_lcl.audio_ocmem_running = false;
return ret;
}
@@ -834,6 +835,7 @@
ret = ocmem_free(OCMEM_LP_AUDIO, audio_ocmem_lcl.buf);
if (ret)
pr_err("%s: ocmem_free failed\n", __func__);
+ audio_ocmem_lcl.buf = NULL;
}
static int lpass_notifier_cb(struct notifier_block *this, unsigned long code,
diff --git a/sound/soc/msm/qdsp6v2/msm-compress-q6-v2.c b/sound/soc/msm/qdsp6v2/msm-compress-q6-v2.c
index c83e623..6394f0b 100644
--- a/sound/soc/msm/qdsp6v2/msm-compress-q6-v2.c
+++ b/sound/soc/msm/qdsp6v2/msm-compress-q6-v2.c
@@ -67,6 +67,7 @@
uint32_t initial_samples_drop;
uint32_t trailing_samples_drop;
uint32_t gapless_transition;
+ bool use_dsp_gapless_mode;
};
struct msm_compr_pdata {
@@ -74,6 +75,7 @@
struct snd_compr_stream *cstream[MSM_FRONTEND_DAI_MAX];
uint32_t volume[MSM_FRONTEND_DAI_MAX][2]; /* For both L & R */
struct msm_compr_audio_effects *audio_effects[MSM_FRONTEND_DAI_MAX];
+ bool use_dsp_gapless_mode;
};
struct msm_compr_audio {
@@ -175,7 +177,7 @@
pr_debug("%s: bytes_received = %d copied_total = %d\n",
__func__, prtd->bytes_received, prtd->copied_total);
- if (prtd->first_buffer)
+ if (prtd->first_buffer && prtd->gapless_state.use_dsp_gapless_mode)
q6asm_send_meta_data(prtd->audio_client,
prtd->gapless_state.initial_samples_drop,
prtd->gapless_state.trailing_samples_drop);
@@ -407,7 +409,11 @@
case FORMAT_MPEG4_AAC:
memset(&aac_cfg, 0x0, sizeof(struct asm_aac_cfg));
aac_cfg.aot = AAC_ENC_MODE_EAAC_P;
- aac_cfg.format = 0x03;
+ if (prtd->codec_param.codec.format ==
+ SND_AUDIOSTREAMFORMAT_MP4ADTS)
+ aac_cfg.format = 0x0;
+ else
+ aac_cfg.format = 0x03;
aac_cfg.ch_cfg = prtd->num_channels;
aac_cfg.sample_rate = prtd->sample_rate;
ret = q6asm_stream_media_format_block_aac(prtd->audio_client,
@@ -449,7 +455,8 @@
pr_debug("%s\n", __func__);
ret = q6asm_stream_open_write_v2(ac,
prtd->codec, bits_per_sample,
- ac->stream_id, true/*gapless*/);
+ ac->stream_id,
+ prtd->gapless_state.use_dsp_gapless_mode);
if (ret < 0) {
pr_err("%s: Session out open failed\n", __func__);
return -ENOMEM;
@@ -557,6 +564,13 @@
prtd->first_buffer = 1;
prtd->partial_drain_delay = 0;
memset(&prtd->gapless_state, 0, sizeof(struct msm_compr_gapless_state));
+ /*
+ * Update the use_dsp_gapless_mode from gapless struture with the value
+ * part of platform data.
+ */
+ prtd->gapless_state.use_dsp_gapless_mode = pdata->use_dsp_gapless_mode;
+
+ pr_debug("%s: gapless mode %d", __func__, pdata->use_dsp_gapless_mode);
spin_lock_init(&prtd->lock);
@@ -870,6 +884,10 @@
break;
case SND_COMPR_TRIGGER_PARTIAL_DRAIN:
pr_debug("%s: SND_COMPR_TRIGGER_PARTIAL_DRAIN\n", __func__);
+ if (!prtd->gapless_state.use_dsp_gapless_mode) {
+ pr_debug("%s: set partial drain as drain\n", __func__);
+ cmd = SND_COMPR_TRIGGER_DRAIN;
+ }
case SND_COMPR_TRIGGER_DRAIN:
pr_debug("%s: SNDRV_COMPRESS_DRAIN\n", __func__);
/* Make sure all the data is sent to DSP before sending EOS */
@@ -916,6 +934,7 @@
if ((cmd == SND_COMPR_TRIGGER_PARTIAL_DRAIN) &&
(prtd->gapless_state.set_next_stream_id)) {
/* wait for the last buffer to be returned */
+
if (prtd->last_buffer) {
pr_debug("%s: last buffer drain\n", __func__);
rc = msm_compr_drain_buffer(prtd, &flags);
@@ -1014,7 +1033,7 @@
rc = -EINTR;
/*FIXME : what if a flush comes while PC is here */
- if (rc == 0 && (cmd == SND_COMPR_TRIGGER_PARTIAL_DRAIN)) {
+ if (rc == 0) {
/*
* Failed to open second stream in DSP for gapless
* so prepare the current stream in session for gapless playback
@@ -1043,12 +1062,18 @@
prtd->first_buffer = 1;
prtd->last_buffer = 0;
atomic_set(&prtd->drain, 0);
+ atomic_set(&prtd->xrun, 1);
q6asm_run_nowait(prtd->audio_client, 0, 0, 0);
spin_unlock_irqrestore(&prtd->lock, flags);
}
prtd->cmd_interrupt = 0;
break;
case SND_COMPR_TRIGGER_NEXT_TRACK:
+ if (!prtd->gapless_state.use_dsp_gapless_mode) {
+ pr_debug("%s: ignore trigger next track\n", __func__);
+ rc = 0;
+ break;
+ }
pr_debug("%s: SND_COMPR_TRIGGER_NEXT_TRACK\n", __func__);
spin_lock_irqsave(&prtd->lock, flags);
rc = 0;
@@ -1060,9 +1085,9 @@
}
spin_unlock_irqrestore(&prtd->lock, flags);
rc = q6asm_stream_open_write_v2(prtd->audio_client,
- prtd->codec, 16,
- stream_id,
- true /*gapless*/);
+ prtd->codec, 16,
+ stream_id,
+ prtd->gapless_state.use_dsp_gapless_mode);
if (rc < 0) {
pr_err("%s: Session out open failed for gapless\n",
__func__);
@@ -1316,7 +1341,6 @@
prtd = cstream->runtime->private_data;
if (!prtd && !prtd->audio_client)
return -EINVAL;
-
ac = prtd->audio_client;
if (metadata->key == SNDRV_COMPRESS_ENCODER_PADDING) {
pr_debug("%s, got encoder padding %u", __func__, metadata->value[0]);
@@ -1472,6 +1496,13 @@
pdata->cstream[i] = NULL;
}
+ /*
+ * use_dsp_gapless_mode part of platform data(pdata) is updated from HAL
+ * through a mixer control before compress driver is opened. The mixer
+ * control is used to decide if dsp gapless mode needs to be enabled.
+ * Gapless is disabled by default.
+ */
+ pdata->use_dsp_gapless_mode = false;
return 0;
}
@@ -1581,7 +1612,7 @@
fe_audio_effects_config_control[0].name = mixer_str;
fe_audio_effects_config_control[0].private_value = rtd->dai_link->be_id;
- pr_debug("Registering new mixer ctl %s", mixer_str);
+ pr_debug("Registering new mixer ctl %s\n", mixer_str);
snd_soc_add_platform_controls(rtd->platform,
fe_audio_effects_config_control,
ARRAY_SIZE(fe_audio_effects_config_control));
@@ -1589,6 +1620,38 @@
return 0;
}
+static int msm_compr_gapless_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol);
+ struct msm_compr_pdata *pdata = (struct msm_compr_pdata *)
+ snd_soc_platform_get_drvdata(platform);
+ pdata->use_dsp_gapless_mode = ucontrol->value.integer.value[0];
+ pr_debug("%s: value: %ld\n", __func__,
+ ucontrol->value.integer.value[0]);
+
+ return 0;
+}
+
+static int msm_compr_gapless_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol);
+ struct msm_compr_pdata *pdata =
+ snd_soc_platform_get_drvdata(platform);
+ pr_debug("%s:gapless mode %d\n", __func__, pdata->use_dsp_gapless_mode);
+ ucontrol->value.integer.value[0] = pdata->use_dsp_gapless_mode;
+
+ return 0;
+}
+
+static const struct snd_kcontrol_new msm_compr_gapless_controls[] = {
+ SOC_SINGLE_EXT("Compress Gapless Playback",
+ 0, 0, 1, 0,
+ msm_compr_gapless_get,
+ msm_compr_gapless_put),
+};
+
static int msm_compr_new(struct snd_soc_pcm_runtime *rtd)
{
int rc;
@@ -1619,7 +1682,10 @@
static struct snd_soc_platform_driver msm_soc_platform = {
.probe = msm_compr_probe,
.compr_ops = &msm_compr_ops,
- .pcm_new = msm_compr_new,
+ .pcm_new = msm_compr_new,
+ .controls = msm_compr_gapless_controls,
+ .num_controls = ARRAY_SIZE(msm_compr_gapless_controls),
+
};
static __devinit int msm_compr_dev_probe(struct platform_device *pdev)
diff --git a/sound/soc/msm/qdsp6v2/msm-lsm-client.c b/sound/soc/msm/qdsp6v2/msm-lsm-client.c
index 3f57078..ff82299 100644
--- a/sound/soc/msm/qdsp6v2/msm-lsm-client.c
+++ b/sound/soc/msm/qdsp6v2/msm-lsm-client.c
@@ -170,6 +170,9 @@
*/
rc = -EFAULT;
} else {
+ if (!access_ok(VERIFY_READ, user,
+ sizeof(struct snd_lsm_event_status)))
+ rc = -EFAULT;
if (user->payload_size <
event_status->payload_size) {
pr_debug("%s: provided %dbytes isn't enough, needs %dbytes\n",
diff --git a/sound/soc/msm/qdsp6v2/q6asm.c b/sound/soc/msm/qdsp6v2/q6asm.c
index 24f5f3b..ee26f2e 100644
--- a/sound/soc/msm/qdsp6v2/q6asm.c
+++ b/sound/soc/msm/qdsp6v2/q6asm.c
@@ -335,15 +335,12 @@
static int q6asm_session_alloc(struct audio_client *ac)
{
int n;
- mutex_lock(&session_lock);
for (n = 1; n <= SESSION_MAX; n++) {
if (!session[n]) {
session[n] = ac;
- mutex_unlock(&session_lock);
return n;
}
}
- mutex_unlock(&session_lock);
return -ENOMEM;
}
@@ -351,9 +348,7 @@
{
pr_debug("%s: sessionid[%d]\n", __func__, ac->session);
rtac_remove_popp_from_adm_devices(ac->session);
- mutex_lock(&session_lock);
session[ac->session] = 0;
- mutex_unlock(&session_lock);
ac->session = 0;
ac->perf_mode = LEGACY_PCM_MODE;
ac->fptr_cache_ops = NULL;
@@ -724,6 +719,9 @@
struct audio_port_data *port;
if (!ac || !ac->session)
return;
+
+ mutex_lock(&session_lock);
+
pr_debug("%s: Session id %d\n", __func__, ac->session);
if (ac->io_mode & SYNC_IO_MODE) {
for (loopcnt = 0; loopcnt <= OUT; loopcnt++) {
@@ -748,6 +746,8 @@
/*done:*/
kfree(ac);
ac = NULL;
+ mutex_unlock(&session_lock);
+
return;
}
@@ -804,9 +804,13 @@
ac = kzalloc(sizeof(struct audio_client), GFP_KERNEL);
if (!ac)
return NULL;
+
+ mutex_lock(&session_lock);
n = q6asm_session_alloc(ac);
- if (n <= 0)
+ if (n <= 0) {
+ mutex_unlock(&session_lock);
goto fail_session;
+ }
ac->session = n;
ac->cb = cb;
ac->priv = priv;
@@ -820,7 +824,8 @@
if (ac->apr == NULL) {
pr_err("%s Registration with APR failed\n", __func__);
- goto fail;
+ mutex_unlock(&session_lock);
+ goto fail;
}
ac->apr2 = apr_register("ADSP", "ASM", \
(apr_fn)q6asm_callback,\
@@ -829,14 +834,17 @@
if (ac->apr2 == NULL) {
pr_err("%s Registration with APR-2 failed\n", __func__);
- goto fail;
+ mutex_unlock(&session_lock);
+ goto fail;
}
rtac_set_asm_handle(n, ac->apr);
pr_debug("%s Registering the common port with APR\n", __func__);
ac->mmap_apr = q6asm_mmap_apr_reg();
- if (ac->mmap_apr == NULL)
+ if (ac->mmap_apr == NULL) {
+ mutex_unlock(&session_lock);
goto fail;
+ }
init_waitqueue_head(&ac->cmd_wait);
init_waitqueue_head(&ac->time_wait);
@@ -856,6 +864,8 @@
pr_debug("%s: session[%d]\n", __func__, ac->session);
+ mutex_unlock(&session_lock);
+
return ac;
fail:
q6asm_audio_client_free(ac);
@@ -1056,8 +1066,11 @@
{
uint32_t sid = 0;
uint32_t dir = 0;
+ uint32_t i = IN;
uint32_t *payload;
unsigned long dsp_flags;
+ struct asm_buffer_node *buf_node = NULL;
+ struct list_head *ptr, *next;
struct audio_client *ac = NULL;
struct audio_port_data *port;
@@ -1076,6 +1089,20 @@
data->reset_proc,
this_mmap.apr);
apr_reset(this_mmap.apr);
+ for (; i <= OUT; i++) {
+ list_for_each_safe(ptr, next,
+ &common_client.port[i].mem_map_handle) {
+ buf_node = list_entry(ptr,
+ struct asm_buffer_node,
+ list);
+ if (buf_node->buf_addr_lsw ==
+ common_client.port[i].buf->phys) {
+ list_del(&buf_node->list);
+ kfree(buf_node);
+ }
+ }
+ pr_debug("%s:Clearing custom topology\n", __func__);
+ }
this_mmap.apr = NULL;
reset_custom_topology_flags();
set_custom_topology = 1;
@@ -1209,6 +1236,9 @@
}
if (data->opcode == RESET_EVENTS) {
+ if(ac->apr == NULL) {
+ ac->apr = ac->apr2;
+ }
pr_debug("q6asm_callback: Reset event is received: %d %d apr[%p]\n",
data->reset_event, data->reset_proc, ac->apr);
if (ac->cb)
@@ -3073,6 +3103,9 @@
rc = -EINVAL;
goto fail_cmd;
}
+
+ rc = 0;
+fail_cmd:
list_for_each_safe(ptr, next, &ac->port[dir].mem_map_handle) {
buf_node = list_entry(ptr, struct asm_buffer_node,
list);
@@ -3082,9 +3115,6 @@
break;
}
}
-
- rc = 0;
-fail_cmd:
return rc;
}
@@ -3252,6 +3282,9 @@
pr_err("timeout. waited for memory_unmap\n");
goto fail_cmd;
}
+ rc = 0;
+
+fail_cmd:
list_for_each_safe(ptr, next, &ac->port[dir].mem_map_handle) {
buf_node = list_entry(ptr, struct asm_buffer_node,
list);
@@ -3261,9 +3294,6 @@
break;
}
}
- rc = 0;
-
-fail_cmd:
return rc;
}
diff --git a/sound/soc/msm/qdsp6v2/q6voice.c b/sound/soc/msm/qdsp6v2/q6voice.c
index c4395c2..0c7472f 100644
--- a/sound/soc/msm/qdsp6v2/q6voice.c
+++ b/sound/soc/msm/qdsp6v2/q6voice.c
@@ -29,7 +29,7 @@
#include "q6voice.h"
-#define TIMEOUT_MS 200
+#define TIMEOUT_MS 300
#define CMD_STATUS_SUCCESS 0
diff --git a/sound/soc/soc-compress.c b/sound/soc/soc-compress.c
index b9af9b6..0970a83 100644
--- a/sound/soc/soc-compress.c
+++ b/sound/soc/soc-compress.c
@@ -95,7 +95,7 @@
else
stream = SNDRV_PCM_STREAM_CAPTURE;
- mutex_lock_nested(&fe->card->mutex, SND_SOC_CARD_CLASS_RUNTIME);
+ mutex_lock(&fe->card->dpcm_mutex);
if (platform->driver->compr_ops && platform->driver->compr_ops->open) {
ret = platform->driver->compr_ops->open(cstream);
@@ -154,7 +154,7 @@
codec_dai->active++;
fe->codec->active++;
- mutex_unlock(&fe->card->mutex);
+ mutex_unlock(&fe->card->dpcm_mutex);
return 0;
@@ -166,7 +166,7 @@
platform->driver->compr_ops->free(cstream);
out:
fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_NO;
- mutex_unlock(&fe->card->mutex);
+ mutex_unlock(&fe->card->dpcm_mutex);
return ret;
}
@@ -273,8 +273,7 @@
else
stream = SNDRV_PCM_STREAM_CAPTURE;
- mutex_lock_nested(&fe->card->mutex, SND_SOC_CARD_CLASS_RUNTIME);
-
+ mutex_lock(&fe->card->dpcm_mutex);
if (cstream->direction == SND_COMPRESS_PLAYBACK) {
cpu_dai->playback_active--;
codec_dai->playback_active--;
@@ -323,7 +322,7 @@
platform->driver->compr_ops->free(cstream);
//cpu_dai->runtime = NULL;
- mutex_unlock(&fe->card->mutex);
+ mutex_unlock(&fe->card->dpcm_mutex);
return 0;
}
@@ -393,8 +392,7 @@
stream = SNDRV_PCM_STREAM_CAPTURE;
- mutex_lock_nested(&fe->card->mutex, SND_SOC_CARD_CLASS_RUNTIME);
-
+ mutex_lock(&fe->card->dpcm_mutex);
if (platform->driver->compr_ops && platform->driver->compr_ops->trigger) {
ret = platform->driver->compr_ops->trigger(cstream, cmd);
if (ret < 0)
@@ -422,7 +420,7 @@
out:
fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_NO;
- mutex_unlock(&fe->card->mutex);
+ mutex_unlock(&fe->card->dpcm_mutex);
return ret;
}
@@ -489,8 +487,7 @@
if (hw_params == NULL)
return -ENOMEM;
- mutex_lock_nested(&fe->card->mutex, SND_SOC_CARD_CLASS_RUNTIME);
-
+ mutex_lock(&fe->card->dpcm_mutex);
/* first we call set_params for the platform driver
* this should configure the soc side
* if the machine has compressed ops then we call that as well
@@ -535,7 +532,7 @@
out:
fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_NO;
- mutex_unlock(&fe->card->mutex);
+ mutex_unlock(&fe->card->dpcm_mutex);
return ret;
}
diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c
index 63bbbdd..2f9e319 100644
--- a/sound/soc/soc-dapm.c
+++ b/sound/soc/soc-dapm.c
@@ -1904,16 +1904,12 @@
}
if (found) {
- if (widget->platform) {
- soc_dpcm_runtime_update(widget);
- } else {
- dapm_mark_dirty(widget, "mux change");
- dapm_power_widgets(widget->dapm,
- SND_SOC_DAPM_STREAM_NOP);
- }
+ dapm_mark_dirty(widget, "mux change");
+ dapm_power_widgets(widget->dapm,
+ SND_SOC_DAPM_STREAM_NOP);
}
- return 0;
+ return found;
}
int snd_soc_dapm_mux_update_power(struct snd_soc_dapm_widget *widget,
@@ -1925,6 +1921,8 @@
mutex_lock_nested(&card->dapm_mutex, SND_SOC_DAPM_CLASS_PCM);
ret = soc_dapm_mux_update_power(widget, kcontrol, change, mux, e);
mutex_unlock(&card->dapm_mutex);
+ if (ret > 0)
+ soc_dpcm_runtime_update(widget);
return ret;
}
EXPORT_SYMBOL_GPL(snd_soc_dapm_mux_update_power);
@@ -1953,16 +1951,11 @@
}
if (found) {
- if (widget->platform) {
- soc_dpcm_runtime_update(widget);
- } else {
dapm_mark_dirty(widget, "mixer update");
dapm_power_widgets(widget->dapm, SND_SOC_DAPM_STREAM_NOP);
- }
-
}
- return 0;
+ return found;
}
int snd_soc_dapm_mixer_update_power(struct snd_soc_dapm_widget *widget,
@@ -1973,6 +1966,8 @@
mutex_lock_nested(&card->dapm_mutex, SND_SOC_DAPM_CLASS_PCM);
ret = soc_dapm_mixer_update_power(widget, kcontrol, connect);
mutex_unlock(&card->dapm_mutex);
+ if (ret > 0)
+ soc_dpcm_runtime_update(widget);
return ret;
}
EXPORT_SYMBOL_GPL(snd_soc_dapm_mixer_update_power);
@@ -3100,9 +3095,11 @@
{
struct snd_soc_dapm_context *pdapm = &rtd->platform->dapm;
struct snd_soc_dapm_context *cdapm = &rtd->codec->dapm;
+ struct snd_soc_card *card = rtd->card;
dev_dbg(rtd->dev, "rtd stream %d event %d\n", stream, event);
+ mutex_lock_nested(&card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME);
if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
widget_stream_event(pdapm, rtd->cpu_dai->playback_aif, event);
widget_stream_event(cdapm, rtd->codec_dai->playback_aif, event);
@@ -3110,6 +3107,7 @@
widget_stream_event(pdapm, rtd->cpu_dai->capture_aif, event);
widget_stream_event(cdapm, rtd->codec_dai->capture_aif, event);
}
+ mutex_unlock(&card->dapm_mutex);
/* do we need to notify any clients that DAPM stream is complete */
if (pdapm->stream_event)
@@ -3133,14 +3131,14 @@
int snd_soc_dapm_stream_event(struct snd_soc_pcm_runtime *rtd,
const char *stream, int event)
{
+ struct snd_soc_card *card = rtd->card;
struct snd_soc_codec *codec = rtd->codec;
if (stream == NULL)
return 0;
-
- mutex_lock(&codec->mutex);
+ mutex_lock_nested(&card->dapm_mutex, SND_SOC_DAPM_CLASS_PCM);
soc_dapm_stream_event(&codec->dapm, stream, event);
- mutex_unlock(&codec->mutex);
+ mutex_unlock(&card->dapm_mutex);
return 0;
}