tree 6b8174332407ac8f4d2c5f6445912b935ff06110
parent ae0a846e411dc0b568e8ccda584896310ee5f369
author Catalin Marinas <catalin.marinas@arm.com> 1171476896 +0100
committer Russell King <rmk+kernel@arm.linux.org.uk> 1171550650 +0000

[ARM] 4108/2:  Allow multiple GIC interrupt controllers in a system

The current implementation only assumes one GIC to be present in the
system. However, there are platforms with more than one cascaded interrupt
controllers (RealView/EB MPCore for example).

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>