msm: vidc: Add vendor-specific prefix to non-generic properties
Device tree conventions require vendor-specific prefixes
for non-generic property names.
Change-Id: I1a2081b04caa302003386a6079244d44ffd6343c
Signed-off-by: Vinay Kalia <vkalia@codeaurora.org>
diff --git a/Documentation/devicetree/bindings/media/video/msm-vidc.txt b/Documentation/devicetree/bindings/media/video/msm-vidc.txt
index 6b1deb6..edb774e 100644
--- a/Documentation/devicetree/bindings/media/video/msm-vidc.txt
+++ b/Documentation/devicetree/bindings/media/video/msm-vidc.txt
@@ -3,24 +3,24 @@
Required properties:
- compatible : one of:
- "qcom,msm-vidc"
-- hfi : supported Host-Firmware Interface, one of:
+- qcom,hfi : supported Host-Firmware Interface, one of:
- "venus"
- "q6"
Optional properties:
- reg : offset and length of the register set for the device.
- interrupts : should contain the vidc interrupt.
-- vidc-cp-map : start and size of device virtual address range for secure buffers.
- Video hardware uses this address range to identify if the buffers are secure
- or non-secure.
-- vidc-ns-map : start and size of device virtual address range for non-secure buffers.
- Video hardware uses this address range to identify if the buffers are secure
- or non-secure.
-- load-freq-tbl : load (in macroblocks/sec) and corresponding vcodec clock
- required for optimal performance in descending order.
-- reg-presets : list of offset-value pairs for registers to be written. The
- offsets are from the base offset specified in 'reg'. This is mainly used
- for QoS, vbif, etc. presets for video.
+- qcom,vidc-cp-map : start and size of device virtual address range for
+ secure buffers. Video hardware uses this address range to identify if
+ the buffers are secure or non-secure.
+- qcom,vidc-ns-map : start and size of device virtual address range for
+ non-secure buffers. Video hardware uses this address range to identify
+ if the buffers are secure or non-secure.
+- qcom,load-freq-tbl : load (in macroblocks/sec) and corresponding vcodec
+ clock required for optimal performance in descending order.
+- qcom,reg-presets : list of offset-value pairs for registers to be written.
+ The offsets are from the base offset specified in 'reg'. This is mainly
+ used for QoS, vbif, etc. presets for video.
Example:
@@ -29,15 +29,15 @@
compatible = "qcom,msm-vidc";
reg = <0xfdc00000 0xff000>;
interrupts = <0 44 0>;
- vidc-cp-map = <0x1000000 0x40000000>;
- vidc-ns-map = <0x40000000 0x40000000>;
- load-freq-tbl = <979200 410000000>,
+ qcom,vidc-cp-map = <0x1000000 0x40000000>;
+ qcom,vidc-ns-map = <0x40000000 0x40000000>;
+ qcom,load-freq-tbl = <979200 410000000>,
<560145 266670000>,
<421161 200000000>,
<243000 133330000>,
<108000 100000000>,
<36000 50000000>;
- hfi = "venus";
- reg-presets = <0x80004 0x1>,
+ qcom,hfi = "venus";
+ qcom,reg-presets = <0x80004 0x1>,
<0x80178 0x00001FFF>;
};
diff --git a/arch/arm/boot/dts/msm8974.dtsi b/arch/arm/boot/dts/msm8974.dtsi
index e67464a..102f548 100644
--- a/arch/arm/boot/dts/msm8974.dtsi
+++ b/arch/arm/boot/dts/msm8974.dtsi
@@ -65,14 +65,14 @@
compatible = "qcom,msm-vidc";
reg = <0xfdc00000 0xff000>;
interrupts = <0 44 0>;
- vidc-cp-map = <0x1000000 0x3f000000>;
- vidc-ns-map = <0x40000000 0x40000000>;
- load-freq-tbl = <979200 410000000>,
+ qcom,vidc-cp-map = <0x1000000 0x3f000000>;
+ qcom,vidc-ns-map = <0x40000000 0x40000000>;
+ qcom,load-freq-tbl = <979200 410000000>,
<783360 410000000>,
<489600 266670000>,
<244800 133330000>;
- hfi = "venus";
- reg-presets = <0x80004 0x1>,
+ qcom,hfi = "venus";
+ qcom,reg-presets = <0x80004 0x1>,
<0x80178 0x00001FFF>,
<0x8017c 0x1FFF1FFF>,
<0x800b0 0x10101001>,
diff --git a/drivers/media/platform/msm/vidc/msm_v4l2_vidc.c b/drivers/media/platform/msm/vidc/msm_v4l2_vidc.c
index 0d0baa5..47eccfa 100644
--- a/drivers/media/platform/msm/vidc/msm_v4l2_vidc.c
+++ b/drivers/media/platform/msm/vidc/msm_v4l2_vidc.c
@@ -703,7 +703,7 @@
const char *hfi_name = NULL;
if (np) {
- rc = of_property_read_string(np, "hfi", &hfi_name);
+ rc = of_property_read_string(np, "qcom,hfi", &hfi_name);
if (rc) {
dprintk(VIDC_ERR,
"Failed to read hfi from device tree\n");
@@ -749,7 +749,7 @@
int num_elements = 0;
struct platform_device *pdev = res->pdev;
- num_elements = get_u32_array_num_elements(pdev, "load-freq-tbl");
+ num_elements = get_u32_array_num_elements(pdev, "qcom,load-freq-tbl");
if (num_elements == 0) {
dprintk(VIDC_ERR, "no elements in frequency table\n");
return rc;
@@ -765,7 +765,8 @@
}
if (of_property_read_u32_array(pdev->dev.of_node,
- "load-freq-tbl", (u32 *)res->load_freq_tbl, num_elements * 2)) {
+ "qcom,load-freq-tbl", (u32 *)res->load_freq_tbl,
+ num_elements * 2)) {
dprintk(VIDC_ERR, "Failed to read frequency table\n");
msm_vidc_free_freq_table(res);
return -EINVAL;
@@ -782,8 +783,8 @@
int i;
struct platform_device *pdev = res->pdev;
char *names[MAX_MAP] = {
- [CP_MAP] = "vidc-cp-map",
- [NS_MAP] = "vidc-ns-map",
+ [CP_MAP] = "qcom,vidc-cp-map",
+ [NS_MAP] = "qcom,vidc-ns-map",
};
char *contexts[MAX_MAP] = {
[CP_MAP] = "venus_cp",
@@ -833,7 +834,7 @@
int rc = 0;
reg_set = &res->reg_set;
- reg_set->count = get_u32_array_num_elements(pdev, "reg-presets");
+ reg_set->count = get_u32_array_num_elements(pdev, "qcom,reg-presets");
if (reg_set->count == 0) {
dprintk(VIDC_DBG, "no elements in reg set\n");
return rc;
@@ -847,7 +848,7 @@
return -ENOMEM;
}
- if (of_property_read_u32_array(pdev->dev.of_node, "reg-presets",
+ if (of_property_read_u32_array(pdev->dev.of_node, "qcom,reg-presets",
(u32 *)reg_set->reg_tbl, reg_set->count * 2)) {
dprintk(VIDC_ERR, "Failed to read register table\n");
msm_vidc_free_reg_table(res);
@@ -962,7 +963,7 @@
size = pdata->iommu_table[MSM_VIDC_V4L2_IOMMU_MAP_CP][1];
res->iommu_maps[CP_MAP] = (struct msm_vidc_iommu_info) {
.addr_range = {(u32) start, (u32) size},
- .name = "vidc-cp-map",
+ .name = "qcom,vidc-cp-map",
.ctx = "venus_cp",
};
@@ -970,7 +971,7 @@
size = pdata->iommu_table[MSM_VIDC_V4L2_IOMMU_MAP_NS][1];
res->iommu_maps[NS_MAP] = (struct msm_vidc_iommu_info) {
.addr_range = {(u32) start, (u32) size},
- .name = "vidc-ns-map",
+ .name = "qcom,vidc-ns-map",
.ctx = "venus_ns",
};
return rc;